pm80xx: Added pm8006 controller support
[linux-2.6-block.git] / drivers / scsi / qla2xxx / qla_isr.c
CommitLineData
1da177e4 1/*
fa90c54f 2 * QLogic Fibre Channel HBA Driver
bd21eaf9 3 * Copyright (c) 2003-2014 QLogic Corporation
1da177e4 4 *
fa90c54f 5 * See LICENSE.qla2xxx for copyright and licensing details.
1da177e4
LT
6 */
7#include "qla_def.h"
2d70c103 8#include "qla_target.h"
1da177e4 9
05236a05 10#include <linux/delay.h>
5a0e3ad6 11#include <linux/slab.h>
df7baa50 12#include <scsi/scsi_tcq.h>
9a069e19 13#include <scsi/scsi_bsg_fc.h>
bad75002 14#include <scsi/scsi_eh.h>
df7baa50 15
1da177e4 16static void qla2x00_mbx_completion(scsi_qla_host_t *, uint16_t);
73208dfd 17static void qla2x00_status_entry(scsi_qla_host_t *, struct rsp_que *, void *);
2afa19a9 18static void qla2x00_status_cont_entry(struct rsp_que *, sts_cont_entry_t *);
73208dfd
AC
19static void qla2x00_error_entry(scsi_qla_host_t *, struct rsp_que *,
20 sts_entry_t *);
9a853f71 21
1da177e4
LT
22/**
23 * qla2100_intr_handler() - Process interrupts for the ISP2100 and ISP2200.
24 * @irq:
25 * @dev_id: SCSI driver HA context
1da177e4
LT
26 *
27 * Called by system whenever the host adapter generates an interrupt.
28 *
29 * Returns handled flag.
30 */
31irqreturn_t
7d12e780 32qla2100_intr_handler(int irq, void *dev_id)
1da177e4 33{
e315cd28
AC
34 scsi_qla_host_t *vha;
35 struct qla_hw_data *ha;
3d71644c 36 struct device_reg_2xxx __iomem *reg;
1da177e4 37 int status;
1da177e4 38 unsigned long iter;
14e660e6 39 uint16_t hccr;
9a853f71 40 uint16_t mb[4];
e315cd28 41 struct rsp_que *rsp;
43fac4d9 42 unsigned long flags;
1da177e4 43
e315cd28
AC
44 rsp = (struct rsp_que *) dev_id;
45 if (!rsp) {
3256b435
CD
46 ql_log(ql_log_info, NULL, 0x505d,
47 "%s: NULL response queue pointer.\n", __func__);
1da177e4
LT
48 return (IRQ_NONE);
49 }
50
e315cd28 51 ha = rsp->hw;
3d71644c 52 reg = &ha->iobase->isp;
1da177e4
LT
53 status = 0;
54
43fac4d9 55 spin_lock_irqsave(&ha->hardware_lock, flags);
2afa19a9 56 vha = pci_get_drvdata(ha->pdev);
1da177e4 57 for (iter = 50; iter--; ) {
14e660e6 58 hccr = RD_REG_WORD(&reg->hccr);
c821e0d5 59 if (qla2x00_check_reg16_for_disconnect(vha, hccr))
f3ddac19 60 break;
14e660e6
SJ
61 if (hccr & HCCR_RISC_PAUSE) {
62 if (pci_channel_offline(ha->pdev))
63 break;
64
65 /*
66 * Issue a "HARD" reset in order for the RISC interrupt
a06a0f8e 67 * bit to be cleared. Schedule a big hammer to get
14e660e6
SJ
68 * out of the RISC PAUSED state.
69 */
70 WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
71 RD_REG_WORD(&reg->hccr);
72
e315cd28
AC
73 ha->isp_ops->fw_dump(vha, 1);
74 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
14e660e6
SJ
75 break;
76 } else if ((RD_REG_WORD(&reg->istatus) & ISR_RISC_INT) == 0)
1da177e4
LT
77 break;
78
79 if (RD_REG_WORD(&reg->semaphore) & BIT_0) {
80 WRT_REG_WORD(&reg->hccr, HCCR_CLR_RISC_INT);
81 RD_REG_WORD(&reg->hccr);
82
83 /* Get mailbox data. */
9a853f71
AV
84 mb[0] = RD_MAILBOX_REG(ha, reg, 0);
85 if (mb[0] > 0x3fff && mb[0] < 0x8000) {
e315cd28 86 qla2x00_mbx_completion(vha, mb[0]);
1da177e4 87 status |= MBX_INTERRUPT;
9a853f71
AV
88 } else if (mb[0] > 0x7fff && mb[0] < 0xc000) {
89 mb[1] = RD_MAILBOX_REG(ha, reg, 1);
90 mb[2] = RD_MAILBOX_REG(ha, reg, 2);
91 mb[3] = RD_MAILBOX_REG(ha, reg, 3);
73208dfd 92 qla2x00_async_event(vha, rsp, mb);
1da177e4
LT
93 } else {
94 /*EMPTY*/
7c3df132
SK
95 ql_dbg(ql_dbg_async, vha, 0x5025,
96 "Unrecognized interrupt type (%d).\n",
97 mb[0]);
1da177e4
LT
98 }
99 /* Release mailbox registers. */
100 WRT_REG_WORD(&reg->semaphore, 0);
101 RD_REG_WORD(&reg->semaphore);
102 } else {
73208dfd 103 qla2x00_process_response_queue(rsp);
1da177e4
LT
104
105 WRT_REG_WORD(&reg->hccr, HCCR_CLR_RISC_INT);
106 RD_REG_WORD(&reg->hccr);
107 }
108 }
36439832 109 qla2x00_handle_mbx_completion(ha, status);
43fac4d9 110 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1da177e4 111
1da177e4
LT
112 return (IRQ_HANDLED);
113}
114
f3ddac19 115bool
c821e0d5 116qla2x00_check_reg32_for_disconnect(scsi_qla_host_t *vha, uint32_t reg)
f3ddac19
CD
117{
118 /* Check for PCI disconnection */
119 if (reg == 0xffffffff) {
beb9e315 120 if (!test_and_set_bit(PFLG_DISCONNECTED, &vha->pci_flags) &&
6b383979
JL
121 !test_bit(PFLG_DRIVER_REMOVING, &vha->pci_flags) &&
122 !test_bit(PFLG_DRIVER_PROBING, &vha->pci_flags)) {
232792b6
JL
123 /*
124 * Schedule this (only once) on the default system
125 * workqueue so that all the adapter workqueues and the
126 * DPC thread can be shutdown cleanly.
127 */
128 schedule_work(&vha->hw->board_disable);
129 }
f3ddac19
CD
130 return true;
131 } else
132 return false;
133}
134
c821e0d5
JL
135bool
136qla2x00_check_reg16_for_disconnect(scsi_qla_host_t *vha, uint16_t reg)
137{
138 return qla2x00_check_reg32_for_disconnect(vha, 0xffff0000 | reg);
139}
140
1da177e4
LT
141/**
142 * qla2300_intr_handler() - Process interrupts for the ISP23xx and ISP63xx.
143 * @irq:
144 * @dev_id: SCSI driver HA context
1da177e4
LT
145 *
146 * Called by system whenever the host adapter generates an interrupt.
147 *
148 * Returns handled flag.
149 */
150irqreturn_t
7d12e780 151qla2300_intr_handler(int irq, void *dev_id)
1da177e4 152{
e315cd28 153 scsi_qla_host_t *vha;
3d71644c 154 struct device_reg_2xxx __iomem *reg;
1da177e4 155 int status;
1da177e4
LT
156 unsigned long iter;
157 uint32_t stat;
1da177e4 158 uint16_t hccr;
9a853f71 159 uint16_t mb[4];
e315cd28
AC
160 struct rsp_que *rsp;
161 struct qla_hw_data *ha;
43fac4d9 162 unsigned long flags;
1da177e4 163
e315cd28
AC
164 rsp = (struct rsp_que *) dev_id;
165 if (!rsp) {
3256b435
CD
166 ql_log(ql_log_info, NULL, 0x5058,
167 "%s: NULL response queue pointer.\n", __func__);
1da177e4
LT
168 return (IRQ_NONE);
169 }
170
e315cd28 171 ha = rsp->hw;
3d71644c 172 reg = &ha->iobase->isp;
1da177e4
LT
173 status = 0;
174
43fac4d9 175 spin_lock_irqsave(&ha->hardware_lock, flags);
2afa19a9 176 vha = pci_get_drvdata(ha->pdev);
1da177e4
LT
177 for (iter = 50; iter--; ) {
178 stat = RD_REG_DWORD(&reg->u.isp2300.host_status);
c821e0d5 179 if (qla2x00_check_reg32_for_disconnect(vha, stat))
f3ddac19 180 break;
1da177e4 181 if (stat & HSR_RISC_PAUSED) {
85880801 182 if (unlikely(pci_channel_offline(ha->pdev)))
14e660e6
SJ
183 break;
184
1da177e4 185 hccr = RD_REG_WORD(&reg->hccr);
f3ddac19 186
1da177e4 187 if (hccr & (BIT_15 | BIT_13 | BIT_11 | BIT_8))
7c3df132
SK
188 ql_log(ql_log_warn, vha, 0x5026,
189 "Parity error -- HCCR=%x, Dumping "
190 "firmware.\n", hccr);
1da177e4 191 else
7c3df132
SK
192 ql_log(ql_log_warn, vha, 0x5027,
193 "RISC paused -- HCCR=%x, Dumping "
194 "firmware.\n", hccr);
1da177e4
LT
195
196 /*
197 * Issue a "HARD" reset in order for the RISC
198 * interrupt bit to be cleared. Schedule a big
a06a0f8e 199 * hammer to get out of the RISC PAUSED state.
1da177e4
LT
200 */
201 WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
202 RD_REG_WORD(&reg->hccr);
07f31805 203
e315cd28
AC
204 ha->isp_ops->fw_dump(vha, 1);
205 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
1da177e4
LT
206 break;
207 } else if ((stat & HSR_RISC_INT) == 0)
208 break;
209
1da177e4 210 switch (stat & 0xff) {
1da177e4
LT
211 case 0x1:
212 case 0x2:
213 case 0x10:
214 case 0x11:
e315cd28 215 qla2x00_mbx_completion(vha, MSW(stat));
1da177e4
LT
216 status |= MBX_INTERRUPT;
217
218 /* Release mailbox registers. */
219 WRT_REG_WORD(&reg->semaphore, 0);
220 break;
221 case 0x12:
9a853f71
AV
222 mb[0] = MSW(stat);
223 mb[1] = RD_MAILBOX_REG(ha, reg, 1);
224 mb[2] = RD_MAILBOX_REG(ha, reg, 2);
225 mb[3] = RD_MAILBOX_REG(ha, reg, 3);
73208dfd 226 qla2x00_async_event(vha, rsp, mb);
9a853f71
AV
227 break;
228 case 0x13:
73208dfd 229 qla2x00_process_response_queue(rsp);
1da177e4
LT
230 break;
231 case 0x15:
9a853f71
AV
232 mb[0] = MBA_CMPLT_1_16BIT;
233 mb[1] = MSW(stat);
73208dfd 234 qla2x00_async_event(vha, rsp, mb);
1da177e4
LT
235 break;
236 case 0x16:
9a853f71
AV
237 mb[0] = MBA_SCSI_COMPLETION;
238 mb[1] = MSW(stat);
239 mb[2] = RD_MAILBOX_REG(ha, reg, 2);
73208dfd 240 qla2x00_async_event(vha, rsp, mb);
1da177e4
LT
241 break;
242 default:
7c3df132
SK
243 ql_dbg(ql_dbg_async, vha, 0x5028,
244 "Unrecognized interrupt type (%d).\n", stat & 0xff);
1da177e4
LT
245 break;
246 }
247 WRT_REG_WORD(&reg->hccr, HCCR_CLR_RISC_INT);
248 RD_REG_WORD_RELAXED(&reg->hccr);
249 }
36439832 250 qla2x00_handle_mbx_completion(ha, status);
43fac4d9 251 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1da177e4 252
1da177e4
LT
253 return (IRQ_HANDLED);
254}
255
256/**
257 * qla2x00_mbx_completion() - Process mailbox command completions.
258 * @ha: SCSI driver HA context
259 * @mb0: Mailbox0 register
260 */
261static void
e315cd28 262qla2x00_mbx_completion(scsi_qla_host_t *vha, uint16_t mb0)
1da177e4
LT
263{
264 uint16_t cnt;
4fa94f83 265 uint32_t mboxes;
1da177e4 266 uint16_t __iomem *wptr;
e315cd28 267 struct qla_hw_data *ha = vha->hw;
3d71644c 268 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1da177e4 269
4fa94f83
AV
270 /* Read all mbox registers? */
271 mboxes = (1 << ha->mbx_count) - 1;
272 if (!ha->mcp)
a720101d 273 ql_dbg(ql_dbg_async, vha, 0x5001, "MBX pointer ERROR.\n");
4fa94f83
AV
274 else
275 mboxes = ha->mcp->in_mb;
276
1da177e4
LT
277 /* Load return mailbox registers. */
278 ha->flags.mbox_int = 1;
279 ha->mailbox_out[0] = mb0;
4fa94f83 280 mboxes >>= 1;
1da177e4
LT
281 wptr = (uint16_t __iomem *)MAILBOX_REG(ha, reg, 1);
282
283 for (cnt = 1; cnt < ha->mbx_count; cnt++) {
fa2a1ce5 284 if (IS_QLA2200(ha) && cnt == 8)
1da177e4 285 wptr = (uint16_t __iomem *)MAILBOX_REG(ha, reg, 8);
4fa94f83 286 if ((cnt == 4 || cnt == 5) && (mboxes & BIT_0))
1da177e4 287 ha->mailbox_out[cnt] = qla2x00_debounce_register(wptr);
4fa94f83 288 else if (mboxes & BIT_0)
1da177e4 289 ha->mailbox_out[cnt] = RD_REG_WORD(wptr);
fa2a1ce5 290
1da177e4 291 wptr++;
4fa94f83 292 mboxes >>= 1;
1da177e4 293 }
1da177e4
LT
294}
295
8a659571
AV
296static void
297qla81xx_idc_event(scsi_qla_host_t *vha, uint16_t aen, uint16_t descr)
298{
299 static char *event[] =
300 { "Complete", "Request Notification", "Time Extension" };
301 int rval;
302 struct device_reg_24xx __iomem *reg24 = &vha->hw->iobase->isp24;
9e5054ec 303 struct device_reg_82xx __iomem *reg82 = &vha->hw->iobase->isp82;
8a659571
AV
304 uint16_t __iomem *wptr;
305 uint16_t cnt, timeout, mb[QLA_IDC_ACK_REGS];
306
307 /* Seed data -- mailbox1 -> mailbox7. */
9e5054ec
CD
308 if (IS_QLA81XX(vha->hw) || IS_QLA83XX(vha->hw))
309 wptr = (uint16_t __iomem *)&reg24->mailbox1;
310 else if (IS_QLA8044(vha->hw))
311 wptr = (uint16_t __iomem *)&reg82->mailbox_out[1];
312 else
313 return;
314
8a659571
AV
315 for (cnt = 0; cnt < QLA_IDC_ACK_REGS; cnt++, wptr++)
316 mb[cnt] = RD_REG_WORD(wptr);
317
7c3df132 318 ql_dbg(ql_dbg_async, vha, 0x5021,
6246b8a1 319 "Inter-Driver Communication %s -- "
7c3df132
SK
320 "%04x %04x %04x %04x %04x %04x %04x.\n",
321 event[aen & 0xff], mb[0], mb[1], mb[2], mb[3],
322 mb[4], mb[5], mb[6]);
454073c9
SV
323 switch (aen) {
324 /* Handle IDC Error completion case. */
325 case MBA_IDC_COMPLETE:
326 if (mb[1] >> 15) {
327 vha->hw->flags.idc_compl_status = 1;
9aaf2cea 328 if (vha->hw->notify_dcbx_comp && !vha->vp_idx)
454073c9
SV
329 complete(&vha->hw->dcbx_comp);
330 }
331 break;
332
333 case MBA_IDC_NOTIFY:
334 /* Acknowledgement needed? [Notify && non-zero timeout]. */
335 timeout = (descr >> 8) & 0xf;
336 ql_dbg(ql_dbg_async, vha, 0x5022,
337 "%lu Inter-Driver Communication %s -- ACK timeout=%d.\n",
338 vha->host_no, event[aen & 0xff], timeout);
339
340 if (!timeout)
341 return;
342 rval = qla2x00_post_idc_ack_work(vha, mb);
343 if (rval != QLA_SUCCESS)
344 ql_log(ql_log_warn, vha, 0x5023,
345 "IDC failed to post ACK.\n");
346 break;
347 case MBA_IDC_TIME_EXT:
348 vha->hw->idc_extend_tmo = descr;
349 ql_dbg(ql_dbg_async, vha, 0x5087,
350 "%lu Inter-Driver Communication %s -- "
351 "Extend timeout by=%d.\n",
352 vha->host_no, event[aen & 0xff], vha->hw->idc_extend_tmo);
353 break;
bf5b8ad7 354 }
8a659571
AV
355}
356
daae62a3 357#define LS_UNKNOWN 2
d0297c9a
JC
358const char *
359qla2x00_get_link_speed_str(struct qla_hw_data *ha, uint16_t speed)
daae62a3 360{
f73cb695
CD
361 static const char *const link_speeds[] = {
362 "1", "2", "?", "4", "8", "16", "32", "10"
d0297c9a 363 };
f73cb695 364#define QLA_LAST_SPEED 7
daae62a3
CD
365
366 if (IS_QLA2100(ha) || IS_QLA2200(ha))
d0297c9a
JC
367 return link_speeds[0];
368 else if (speed == 0x13)
f73cb695
CD
369 return link_speeds[QLA_LAST_SPEED];
370 else if (speed < QLA_LAST_SPEED)
d0297c9a
JC
371 return link_speeds[speed];
372 else
373 return link_speeds[LS_UNKNOWN];
daae62a3
CD
374}
375
fa492630 376static void
7d613ac6
SV
377qla83xx_handle_8200_aen(scsi_qla_host_t *vha, uint16_t *mb)
378{
379 struct qla_hw_data *ha = vha->hw;
380
381 /*
382 * 8200 AEN Interpretation:
383 * mb[0] = AEN code
384 * mb[1] = AEN Reason code
385 * mb[2] = LSW of Peg-Halt Status-1 Register
386 * mb[6] = MSW of Peg-Halt Status-1 Register
387 * mb[3] = LSW of Peg-Halt Status-2 register
388 * mb[7] = MSW of Peg-Halt Status-2 register
389 * mb[4] = IDC Device-State Register value
390 * mb[5] = IDC Driver-Presence Register value
391 */
392 ql_dbg(ql_dbg_async, vha, 0x506b, "AEN Code: mb[0] = 0x%x AEN reason: "
393 "mb[1] = 0x%x PH-status1: mb[2] = 0x%x PH-status1: mb[6] = 0x%x.\n",
394 mb[0], mb[1], mb[2], mb[6]);
395 ql_dbg(ql_dbg_async, vha, 0x506c, "PH-status2: mb[3] = 0x%x "
396 "PH-status2: mb[7] = 0x%x Device-State: mb[4] = 0x%x "
397 "Drv-Presence: mb[5] = 0x%x.\n", mb[3], mb[7], mb[4], mb[5]);
398
399 if (mb[1] & (IDC_PEG_HALT_STATUS_CHANGE | IDC_NIC_FW_REPORTED_FAILURE |
400 IDC_HEARTBEAT_FAILURE)) {
401 ha->flags.nic_core_hung = 1;
402 ql_log(ql_log_warn, vha, 0x5060,
403 "83XX: F/W Error Reported: Check if reset required.\n");
404
405 if (mb[1] & IDC_PEG_HALT_STATUS_CHANGE) {
406 uint32_t protocol_engine_id, fw_err_code, err_level;
407
408 /*
409 * IDC_PEG_HALT_STATUS_CHANGE interpretation:
410 * - PEG-Halt Status-1 Register:
411 * (LSW = mb[2], MSW = mb[6])
412 * Bits 0-7 = protocol-engine ID
413 * Bits 8-28 = f/w error code
414 * Bits 29-31 = Error-level
415 * Error-level 0x1 = Non-Fatal error
416 * Error-level 0x2 = Recoverable Fatal error
417 * Error-level 0x4 = UnRecoverable Fatal error
418 * - PEG-Halt Status-2 Register:
419 * (LSW = mb[3], MSW = mb[7])
420 */
421 protocol_engine_id = (mb[2] & 0xff);
422 fw_err_code = (((mb[2] & 0xff00) >> 8) |
423 ((mb[6] & 0x1fff) << 8));
424 err_level = ((mb[6] & 0xe000) >> 13);
425 ql_log(ql_log_warn, vha, 0x5061, "PegHalt Status-1 "
426 "Register: protocol_engine_id=0x%x "
427 "fw_err_code=0x%x err_level=0x%x.\n",
428 protocol_engine_id, fw_err_code, err_level);
429 ql_log(ql_log_warn, vha, 0x5062, "PegHalt Status-2 "
430 "Register: 0x%x%x.\n", mb[7], mb[3]);
431 if (err_level == ERR_LEVEL_NON_FATAL) {
432 ql_log(ql_log_warn, vha, 0x5063,
433 "Not a fatal error, f/w has recovered "
434 "iteself.\n");
435 } else if (err_level == ERR_LEVEL_RECOVERABLE_FATAL) {
436 ql_log(ql_log_fatal, vha, 0x5064,
437 "Recoverable Fatal error: Chip reset "
438 "required.\n");
439 qla83xx_schedule_work(vha,
440 QLA83XX_NIC_CORE_RESET);
441 } else if (err_level == ERR_LEVEL_UNRECOVERABLE_FATAL) {
442 ql_log(ql_log_fatal, vha, 0x5065,
443 "Unrecoverable Fatal error: Set FAILED "
444 "state, reboot required.\n");
445 qla83xx_schedule_work(vha,
446 QLA83XX_NIC_CORE_UNRECOVERABLE);
447 }
448 }
449
450 if (mb[1] & IDC_NIC_FW_REPORTED_FAILURE) {
451 uint16_t peg_fw_state, nw_interface_link_up;
452 uint16_t nw_interface_signal_detect, sfp_status;
453 uint16_t htbt_counter, htbt_monitor_enable;
454 uint16_t sfp_additonal_info, sfp_multirate;
455 uint16_t sfp_tx_fault, link_speed, dcbx_status;
456
457 /*
458 * IDC_NIC_FW_REPORTED_FAILURE interpretation:
459 * - PEG-to-FC Status Register:
460 * (LSW = mb[2], MSW = mb[6])
461 * Bits 0-7 = Peg-Firmware state
462 * Bit 8 = N/W Interface Link-up
463 * Bit 9 = N/W Interface signal detected
464 * Bits 10-11 = SFP Status
465 * SFP Status 0x0 = SFP+ transceiver not expected
466 * SFP Status 0x1 = SFP+ transceiver not present
467 * SFP Status 0x2 = SFP+ transceiver invalid
468 * SFP Status 0x3 = SFP+ transceiver present and
469 * valid
470 * Bits 12-14 = Heartbeat Counter
471 * Bit 15 = Heartbeat Monitor Enable
472 * Bits 16-17 = SFP Additional Info
473 * SFP info 0x0 = Unregocnized transceiver for
474 * Ethernet
475 * SFP info 0x1 = SFP+ brand validation failed
476 * SFP info 0x2 = SFP+ speed validation failed
477 * SFP info 0x3 = SFP+ access error
478 * Bit 18 = SFP Multirate
479 * Bit 19 = SFP Tx Fault
480 * Bits 20-22 = Link Speed
481 * Bits 23-27 = Reserved
482 * Bits 28-30 = DCBX Status
483 * DCBX Status 0x0 = DCBX Disabled
484 * DCBX Status 0x1 = DCBX Enabled
485 * DCBX Status 0x2 = DCBX Exchange error
486 * Bit 31 = Reserved
487 */
488 peg_fw_state = (mb[2] & 0x00ff);
489 nw_interface_link_up = ((mb[2] & 0x0100) >> 8);
490 nw_interface_signal_detect = ((mb[2] & 0x0200) >> 9);
491 sfp_status = ((mb[2] & 0x0c00) >> 10);
492 htbt_counter = ((mb[2] & 0x7000) >> 12);
493 htbt_monitor_enable = ((mb[2] & 0x8000) >> 15);
494 sfp_additonal_info = (mb[6] & 0x0003);
495 sfp_multirate = ((mb[6] & 0x0004) >> 2);
496 sfp_tx_fault = ((mb[6] & 0x0008) >> 3);
497 link_speed = ((mb[6] & 0x0070) >> 4);
498 dcbx_status = ((mb[6] & 0x7000) >> 12);
499
500 ql_log(ql_log_warn, vha, 0x5066,
501 "Peg-to-Fc Status Register:\n"
502 "peg_fw_state=0x%x, nw_interface_link_up=0x%x, "
503 "nw_interface_signal_detect=0x%x"
504 "\nsfp_statis=0x%x.\n ", peg_fw_state,
505 nw_interface_link_up, nw_interface_signal_detect,
506 sfp_status);
507 ql_log(ql_log_warn, vha, 0x5067,
508 "htbt_counter=0x%x, htbt_monitor_enable=0x%x, "
509 "sfp_additonal_info=0x%x, sfp_multirate=0x%x.\n ",
510 htbt_counter, htbt_monitor_enable,
511 sfp_additonal_info, sfp_multirate);
512 ql_log(ql_log_warn, vha, 0x5068,
513 "sfp_tx_fault=0x%x, link_state=0x%x, "
514 "dcbx_status=0x%x.\n", sfp_tx_fault, link_speed,
515 dcbx_status);
516
517 qla83xx_schedule_work(vha, QLA83XX_NIC_CORE_RESET);
518 }
519
520 if (mb[1] & IDC_HEARTBEAT_FAILURE) {
521 ql_log(ql_log_warn, vha, 0x5069,
522 "Heartbeat Failure encountered, chip reset "
523 "required.\n");
524
525 qla83xx_schedule_work(vha, QLA83XX_NIC_CORE_RESET);
526 }
527 }
528
529 if (mb[1] & IDC_DEVICE_STATE_CHANGE) {
530 ql_log(ql_log_info, vha, 0x506a,
531 "IDC Device-State changed = 0x%x.\n", mb[4]);
6c3943cd
SK
532 if (ha->flags.nic_core_reset_owner)
533 return;
7d613ac6
SV
534 qla83xx_schedule_work(vha, MBA_IDC_AEN);
535 }
536}
537
bb4cf5b7
CD
538int
539qla2x00_is_a_vp_did(scsi_qla_host_t *vha, uint32_t rscn_entry)
540{
541 struct qla_hw_data *ha = vha->hw;
542 scsi_qla_host_t *vp;
543 uint32_t vp_did;
544 unsigned long flags;
545 int ret = 0;
546
547 if (!ha->num_vhosts)
548 return ret;
549
550 spin_lock_irqsave(&ha->vport_slock, flags);
551 list_for_each_entry(vp, &ha->vp_list, list) {
552 vp_did = vp->d_id.b24;
553 if (vp_did == rscn_entry) {
554 ret = 1;
555 break;
556 }
557 }
558 spin_unlock_irqrestore(&ha->vport_slock, flags);
559
560 return ret;
561}
562
1da177e4
LT
563/**
564 * qla2x00_async_event() - Process aynchronous events.
565 * @ha: SCSI driver HA context
9a853f71 566 * @mb: Mailbox registers (0 - 3)
1da177e4 567 */
2c3dfe3f 568void
73208dfd 569qla2x00_async_event(scsi_qla_host_t *vha, struct rsp_que *rsp, uint16_t *mb)
1da177e4 570{
1da177e4 571 uint16_t handle_cnt;
bdab23da 572 uint16_t cnt, mbx;
1da177e4 573 uint32_t handles[5];
e315cd28 574 struct qla_hw_data *ha = vha->hw;
3d71644c 575 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
bdab23da 576 struct device_reg_24xx __iomem *reg24 = &ha->iobase->isp24;
bc5c2aad 577 struct device_reg_82xx __iomem *reg82 = &ha->iobase->isp82;
ef86cb20 578 uint32_t rscn_entry, host_pid, tmp_pid;
4d4df193 579 unsigned long flags;
ef86cb20 580 fc_port_t *fcport = NULL;
1da177e4
LT
581
582 /* Setup to process RIO completion. */
583 handle_cnt = 0;
6246b8a1 584 if (IS_CNA_CAPABLE(ha))
3a03eb79 585 goto skip_rio;
1da177e4
LT
586 switch (mb[0]) {
587 case MBA_SCSI_COMPLETION:
9a853f71 588 handles[0] = le32_to_cpu((uint32_t)((mb[2] << 16) | mb[1]));
1da177e4
LT
589 handle_cnt = 1;
590 break;
591 case MBA_CMPLT_1_16BIT:
9a853f71 592 handles[0] = mb[1];
1da177e4
LT
593 handle_cnt = 1;
594 mb[0] = MBA_SCSI_COMPLETION;
595 break;
596 case MBA_CMPLT_2_16BIT:
9a853f71
AV
597 handles[0] = mb[1];
598 handles[1] = mb[2];
1da177e4
LT
599 handle_cnt = 2;
600 mb[0] = MBA_SCSI_COMPLETION;
601 break;
602 case MBA_CMPLT_3_16BIT:
9a853f71
AV
603 handles[0] = mb[1];
604 handles[1] = mb[2];
605 handles[2] = mb[3];
1da177e4
LT
606 handle_cnt = 3;
607 mb[0] = MBA_SCSI_COMPLETION;
608 break;
609 case MBA_CMPLT_4_16BIT:
9a853f71
AV
610 handles[0] = mb[1];
611 handles[1] = mb[2];
612 handles[2] = mb[3];
1da177e4
LT
613 handles[3] = (uint32_t)RD_MAILBOX_REG(ha, reg, 6);
614 handle_cnt = 4;
615 mb[0] = MBA_SCSI_COMPLETION;
616 break;
617 case MBA_CMPLT_5_16BIT:
9a853f71
AV
618 handles[0] = mb[1];
619 handles[1] = mb[2];
620 handles[2] = mb[3];
1da177e4
LT
621 handles[3] = (uint32_t)RD_MAILBOX_REG(ha, reg, 6);
622 handles[4] = (uint32_t)RD_MAILBOX_REG(ha, reg, 7);
623 handle_cnt = 5;
624 mb[0] = MBA_SCSI_COMPLETION;
625 break;
626 case MBA_CMPLT_2_32BIT:
9a853f71 627 handles[0] = le32_to_cpu((uint32_t)((mb[2] << 16) | mb[1]));
1da177e4
LT
628 handles[1] = le32_to_cpu(
629 ((uint32_t)(RD_MAILBOX_REG(ha, reg, 7) << 16)) |
630 RD_MAILBOX_REG(ha, reg, 6));
631 handle_cnt = 2;
632 mb[0] = MBA_SCSI_COMPLETION;
633 break;
634 default:
635 break;
636 }
3a03eb79 637skip_rio:
1da177e4
LT
638 switch (mb[0]) {
639 case MBA_SCSI_COMPLETION: /* Fast Post */
e315cd28 640 if (!vha->flags.online)
1da177e4
LT
641 break;
642
643 for (cnt = 0; cnt < handle_cnt; cnt++)
73208dfd
AC
644 qla2x00_process_completed_request(vha, rsp->req,
645 handles[cnt]);
1da177e4
LT
646 break;
647
648 case MBA_RESET: /* Reset */
7c3df132
SK
649 ql_dbg(ql_dbg_async, vha, 0x5002,
650 "Asynchronous RESET.\n");
1da177e4 651
e315cd28 652 set_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
1da177e4
LT
653 break;
654
655 case MBA_SYSTEM_ERR: /* System Error */
f73cb695 656 mbx = (IS_QLA81XX(ha) || IS_QLA83XX(ha) || IS_QLA27XX(ha)) ?
6246b8a1 657 RD_REG_WORD(&reg24->mailbox7) : 0;
7c3df132 658 ql_log(ql_log_warn, vha, 0x5003,
bdab23da
AV
659 "ISP System Error - mbx1=%xh mbx2=%xh mbx3=%xh "
660 "mbx7=%xh.\n", mb[1], mb[2], mb[3], mbx);
1da177e4 661
e315cd28 662 ha->isp_ops->fw_dump(vha, 1);
1da177e4 663
e428924c 664 if (IS_FWI2_CAPABLE(ha)) {
9a853f71 665 if (mb[1] == 0 && mb[2] == 0) {
7c3df132 666 ql_log(ql_log_fatal, vha, 0x5004,
9a853f71
AV
667 "Unrecoverable Hardware Error: adapter "
668 "marked OFFLINE!\n");
e315cd28 669 vha->flags.online = 0;
6246b8a1 670 vha->device_flags |= DFLG_DEV_FAILED;
b1d46989 671 } else {
25985edc 672 /* Check to see if MPI timeout occurred */
f73cb695 673 if ((mbx & MBX_3) && (ha->port_no == 0))
b1d46989
MI
674 set_bit(MPI_RESET_NEEDED,
675 &vha->dpc_flags);
676
e315cd28 677 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
b1d46989 678 }
9a853f71 679 } else if (mb[1] == 0) {
7c3df132 680 ql_log(ql_log_fatal, vha, 0x5005,
1da177e4
LT
681 "Unrecoverable Hardware Error: adapter marked "
682 "OFFLINE!\n");
e315cd28 683 vha->flags.online = 0;
6246b8a1 684 vha->device_flags |= DFLG_DEV_FAILED;
1da177e4 685 } else
e315cd28 686 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
1da177e4
LT
687 break;
688
689 case MBA_REQ_TRANSFER_ERR: /* Request Transfer Error */
7c3df132
SK
690 ql_log(ql_log_warn, vha, 0x5006,
691 "ISP Request Transfer Error (%x).\n", mb[1]);
1da177e4 692
e315cd28 693 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
1da177e4
LT
694 break;
695
696 case MBA_RSP_TRANSFER_ERR: /* Response Transfer Error */
7c3df132
SK
697 ql_log(ql_log_warn, vha, 0x5007,
698 "ISP Response Transfer Error.\n");
1da177e4 699
e315cd28 700 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
1da177e4
LT
701 break;
702
703 case MBA_WAKEUP_THRES: /* Request Queue Wake-up */
7c3df132
SK
704 ql_dbg(ql_dbg_async, vha, 0x5008,
705 "Asynchronous WAKEUP_THRES.\n");
1da177e4 706
2d70c103 707 break;
1da177e4 708 case MBA_LIP_OCCURRED: /* Loop Initialization Procedure */
cfb0919c 709 ql_dbg(ql_dbg_async, vha, 0x5009,
7c3df132 710 "LIP occurred (%x).\n", mb[1]);
1da177e4 711
e315cd28
AC
712 if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
713 atomic_set(&vha->loop_state, LOOP_DOWN);
714 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
715 qla2x00_mark_all_devices_lost(vha, 1);
1da177e4
LT
716 }
717
e315cd28
AC
718 if (vha->vp_idx) {
719 atomic_set(&vha->vp_state, VP_FAILED);
720 fc_vport_set_state(vha->fc_vport, FC_VPORT_FAILED);
2c3dfe3f
SJ
721 }
722
e315cd28
AC
723 set_bit(REGISTER_FC4_NEEDED, &vha->dpc_flags);
724 set_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags);
1da177e4 725
e315cd28
AC
726 vha->flags.management_server_logged_in = 0;
727 qla2x00_post_aen_work(vha, FCH_EVT_LIP, mb[1]);
1da177e4
LT
728 break;
729
730 case MBA_LOOP_UP: /* Loop Up Event */
daae62a3 731 if (IS_QLA2100(ha) || IS_QLA2200(ha))
d8b45213 732 ha->link_data_rate = PORT_SPEED_1GB;
daae62a3 733 else
1da177e4 734 ha->link_data_rate = mb[1];
1da177e4 735
8e5a9484 736 ql_log(ql_log_info, vha, 0x500a,
daae62a3 737 "LOOP UP detected (%s Gbps).\n",
d0297c9a 738 qla2x00_get_link_speed_str(ha, ha->link_data_rate));
1da177e4 739
e315cd28
AC
740 vha->flags.management_server_logged_in = 0;
741 qla2x00_post_aen_work(vha, FCH_EVT_LINKUP, ha->link_data_rate);
1da177e4
LT
742 break;
743
744 case MBA_LOOP_DOWN: /* Loop Down Event */
6246b8a1
GM
745 mbx = (IS_QLA81XX(ha) || IS_QLA8031(ha))
746 ? RD_REG_WORD(&reg24->mailbox4) : 0;
7ec0effd
AD
747 mbx = (IS_P3P_TYPE(ha)) ? RD_REG_WORD(&reg82->mailbox_out[4])
748 : mbx;
8e5a9484 749 ql_log(ql_log_info, vha, 0x500b,
7c3df132
SK
750 "LOOP DOWN detected (%x %x %x %x).\n",
751 mb[1], mb[2], mb[3], mbx);
1da177e4 752
e315cd28
AC
753 if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
754 atomic_set(&vha->loop_state, LOOP_DOWN);
755 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
2486c627
HM
756 /*
757 * In case of loop down, restore WWPN from
758 * NVRAM in case of FA-WWPN capable ISP
718abbdc 759 * Restore for Physical Port only
2486c627 760 */
718abbdc
SC
761 if (!vha->vp_idx) {
762 if (ha->flags.fawwpn_enabled) {
763 void *wwpn = ha->init_cb->port_name;
764 memcpy(vha->port_name, wwpn, WWN_SIZE);
765 fc_host_port_name(vha->host) =
766 wwn_to_u64(vha->port_name);
767 ql_dbg(ql_dbg_init + ql_dbg_verbose,
768 vha, 0x0144, "LOOP DOWN detected,"
769 "restore WWPN %016llx\n",
770 wwn_to_u64(vha->port_name));
771 }
772
773 clear_bit(VP_CONFIG_OK, &vha->vp_flags);
2486c627
HM
774 }
775
e315cd28
AC
776 vha->device_flags |= DFLG_NO_CABLE;
777 qla2x00_mark_all_devices_lost(vha, 1);
1da177e4
LT
778 }
779
e315cd28
AC
780 if (vha->vp_idx) {
781 atomic_set(&vha->vp_state, VP_FAILED);
782 fc_vport_set_state(vha->fc_vport, FC_VPORT_FAILED);
2c3dfe3f
SJ
783 }
784
e315cd28 785 vha->flags.management_server_logged_in = 0;
d8b45213 786 ha->link_data_rate = PORT_SPEED_UNKNOWN;
e315cd28 787 qla2x00_post_aen_work(vha, FCH_EVT_LINKDOWN, 0);
1da177e4
LT
788 break;
789
790 case MBA_LIP_RESET: /* LIP reset occurred */
cfb0919c 791 ql_dbg(ql_dbg_async, vha, 0x500c,
cc3ef7bc 792 "LIP reset occurred (%x).\n", mb[1]);
1da177e4 793
e315cd28
AC
794 if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
795 atomic_set(&vha->loop_state, LOOP_DOWN);
796 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
797 qla2x00_mark_all_devices_lost(vha, 1);
1da177e4
LT
798 }
799
e315cd28
AC
800 if (vha->vp_idx) {
801 atomic_set(&vha->vp_state, VP_FAILED);
802 fc_vport_set_state(vha->fc_vport, FC_VPORT_FAILED);
2c3dfe3f
SJ
803 }
804
e315cd28 805 set_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
1da177e4
LT
806
807 ha->operating_mode = LOOP;
e315cd28
AC
808 vha->flags.management_server_logged_in = 0;
809 qla2x00_post_aen_work(vha, FCH_EVT_LIPRESET, mb[1]);
1da177e4
LT
810 break;
811
3a03eb79 812 /* case MBA_DCBX_COMPLETE: */
1da177e4
LT
813 case MBA_POINT_TO_POINT: /* Point-to-Point */
814 if (IS_QLA2100(ha))
815 break;
816
7ec0effd 817 if (IS_CNA_CAPABLE(ha)) {
7c3df132
SK
818 ql_dbg(ql_dbg_async, vha, 0x500d,
819 "DCBX Completed -- %04x %04x %04x.\n",
820 mb[1], mb[2], mb[3]);
9aaf2cea 821 if (ha->notify_dcbx_comp && !vha->vp_idx)
23f2ebd1
SR
822 complete(&ha->dcbx_comp);
823
824 } else
7c3df132
SK
825 ql_dbg(ql_dbg_async, vha, 0x500e,
826 "Asynchronous P2P MODE received.\n");
1da177e4
LT
827
828 /*
829 * Until there's a transition from loop down to loop up, treat
830 * this as loop down only.
831 */
e315cd28
AC
832 if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
833 atomic_set(&vha->loop_state, LOOP_DOWN);
834 if (!atomic_read(&vha->loop_down_timer))
835 atomic_set(&vha->loop_down_timer,
1da177e4 836 LOOP_DOWN_TIME);
e315cd28 837 qla2x00_mark_all_devices_lost(vha, 1);
1da177e4
LT
838 }
839
e315cd28
AC
840 if (vha->vp_idx) {
841 atomic_set(&vha->vp_state, VP_FAILED);
842 fc_vport_set_state(vha->fc_vport, FC_VPORT_FAILED);
2c3dfe3f
SJ
843 }
844
e315cd28
AC
845 if (!(test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags)))
846 set_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
847
848 set_bit(REGISTER_FC4_NEEDED, &vha->dpc_flags);
849 set_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags);
4346b149
AV
850
851 ha->flags.gpsc_supported = 1;
e315cd28 852 vha->flags.management_server_logged_in = 0;
1da177e4
LT
853 break;
854
855 case MBA_CHG_IN_CONNECTION: /* Change in connection mode */
856 if (IS_QLA2100(ha))
857 break;
858
cfb0919c 859 ql_dbg(ql_dbg_async, vha, 0x500f,
1da177e4
LT
860 "Configuration change detected: value=%x.\n", mb[1]);
861
e315cd28
AC
862 if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
863 atomic_set(&vha->loop_state, LOOP_DOWN);
864 if (!atomic_read(&vha->loop_down_timer))
865 atomic_set(&vha->loop_down_timer,
1da177e4 866 LOOP_DOWN_TIME);
e315cd28 867 qla2x00_mark_all_devices_lost(vha, 1);
1da177e4
LT
868 }
869
e315cd28
AC
870 if (vha->vp_idx) {
871 atomic_set(&vha->vp_state, VP_FAILED);
872 fc_vport_set_state(vha->fc_vport, FC_VPORT_FAILED);
2c3dfe3f
SJ
873 }
874
e315cd28
AC
875 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
876 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
1da177e4
LT
877 break;
878
879 case MBA_PORT_UPDATE: /* Port database update */
55903b9d
SV
880 /*
881 * Handle only global and vn-port update events
882 *
883 * Relevant inputs:
884 * mb[1] = N_Port handle of changed port
885 * OR 0xffff for global event
886 * mb[2] = New login state
887 * 7 = Port logged out
888 * mb[3] = LSB is vp_idx, 0xff = all vps
889 *
890 * Skip processing if:
891 * Event is global, vp_idx is NOT all vps,
892 * vp_idx does not match
893 * Event is not global, vp_idx does not match
894 */
12cec63e
AV
895 if (IS_QLA2XXX_MIDTYPE(ha) &&
896 ((mb[1] == 0xffff && (mb[3] & 0xff) != 0xff) ||
897 (mb[1] != 0xffff)) && vha->vp_idx != (mb[3] & 0xff))
898 break;
73208dfd 899
9764ff88
AV
900 /* Global event -- port logout or port unavailable. */
901 if (mb[1] == 0xffff && mb[2] == 0x7) {
7c3df132
SK
902 ql_dbg(ql_dbg_async, vha, 0x5010,
903 "Port unavailable %04x %04x %04x.\n",
904 mb[1], mb[2], mb[3]);
daae62a3
CD
905 ql_log(ql_log_warn, vha, 0x505e,
906 "Link is offline.\n");
9764ff88
AV
907
908 if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
909 atomic_set(&vha->loop_state, LOOP_DOWN);
910 atomic_set(&vha->loop_down_timer,
911 LOOP_DOWN_TIME);
912 vha->device_flags |= DFLG_NO_CABLE;
913 qla2x00_mark_all_devices_lost(vha, 1);
914 }
915
916 if (vha->vp_idx) {
917 atomic_set(&vha->vp_state, VP_FAILED);
918 fc_vport_set_state(vha->fc_vport,
919 FC_VPORT_FAILED);
faadc5e7 920 qla2x00_mark_all_devices_lost(vha, 1);
9764ff88
AV
921 }
922
923 vha->flags.management_server_logged_in = 0;
924 ha->link_data_rate = PORT_SPEED_UNKNOWN;
925 break;
926 }
927
1da177e4 928 /*
cc3ef7bc 929 * If PORT UPDATE is global (received LIP_OCCURRED/LIP_RESET
1da177e4
LT
930 * event etc. earlier indicating loop is down) then process
931 * it. Otherwise ignore it and Wait for RSCN to come in.
932 */
e315cd28 933 atomic_set(&vha->loop_down_timer, 0);
8e5a9484
CD
934 if (atomic_read(&vha->loop_state) != LOOP_DOWN &&
935 atomic_read(&vha->loop_state) != LOOP_DEAD) {
7c3df132
SK
936 ql_dbg(ql_dbg_async, vha, 0x5011,
937 "Asynchronous PORT UPDATE ignored %04x/%04x/%04x.\n",
938 mb[1], mb[2], mb[3]);
2d70c103
NB
939
940 qlt_async_event(mb[0], vha, mb);
1da177e4
LT
941 break;
942 }
943
7c3df132
SK
944 ql_dbg(ql_dbg_async, vha, 0x5012,
945 "Port database changed %04x %04x %04x.\n",
946 mb[1], mb[2], mb[3]);
1da177e4
LT
947
948 /*
949 * Mark all devices as missing so we will login again.
950 */
e315cd28 951 atomic_set(&vha->loop_state, LOOP_UP);
1da177e4 952
e315cd28 953 qla2x00_mark_all_devices_lost(vha, 1);
1da177e4 954
2d70c103
NB
955 if (vha->vp_idx == 0 && !qla_ini_mode_enabled(vha))
956 set_bit(SCR_PENDING, &vha->dpc_flags);
957
e315cd28
AC
958 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
959 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
ded6411f 960 set_bit(VP_CONFIG_OK, &vha->vp_flags);
2d70c103
NB
961
962 qlt_async_event(mb[0], vha, mb);
1da177e4
LT
963 break;
964
965 case MBA_RSCN_UPDATE: /* State Change Registration */
3c397400 966 /* Check if the Vport has issued a SCR */
e315cd28 967 if (vha->vp_idx && test_bit(VP_SCR_NEEDED, &vha->vp_flags))
3c397400
SJ
968 break;
969 /* Only handle SCNs for our Vport index. */
0d6e61bc 970 if (ha->flags.npiv_supported && vha->vp_idx != (mb[3] & 0xff))
3c397400 971 break;
0d6e61bc 972
7c3df132
SK
973 ql_dbg(ql_dbg_async, vha, 0x5013,
974 "RSCN database changed -- %04x %04x %04x.\n",
975 mb[1], mb[2], mb[3]);
1da177e4 976
59d72d87 977 rscn_entry = ((mb[1] & 0xff) << 16) | mb[2];
e315cd28
AC
978 host_pid = (vha->d_id.b.domain << 16) | (vha->d_id.b.area << 8)
979 | vha->d_id.b.al_pa;
1da177e4 980 if (rscn_entry == host_pid) {
7c3df132
SK
981 ql_dbg(ql_dbg_async, vha, 0x5014,
982 "Ignoring RSCN update to local host "
983 "port ID (%06x).\n", host_pid);
1da177e4
LT
984 break;
985 }
986
59d72d87
RA
987 /* Ignore reserved bits from RSCN-payload. */
988 rscn_entry = ((mb[1] & 0x3ff) << 16) | mb[2];
1da177e4 989
bb4cf5b7
CD
990 /* Skip RSCNs for virtual ports on the same physical port */
991 if (qla2x00_is_a_vp_did(vha, rscn_entry))
992 break;
993
ef86cb20
CD
994 /*
995 * Search for the rport related to this RSCN entry and mark it
996 * as lost.
997 */
998 list_for_each_entry(fcport, &vha->vp_fcports, list) {
999 if (atomic_read(&fcport->state) != FCS_ONLINE)
1000 continue;
1001 tmp_pid = fcport->d_id.b24;
1002 if (fcport->d_id.b24 == rscn_entry) {
1003 qla2x00_mark_device_lost(vha, fcport, 0, 0);
1004 break;
1005 }
1006 }
1007
e315cd28
AC
1008 atomic_set(&vha->loop_down_timer, 0);
1009 vha->flags.management_server_logged_in = 0;
1da177e4 1010
e315cd28
AC
1011 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
1012 set_bit(RSCN_UPDATE, &vha->dpc_flags);
1013 qla2x00_post_aen_work(vha, FCH_EVT_RSCN, rscn_entry);
1da177e4
LT
1014 break;
1015
1016 /* case MBA_RIO_RESPONSE: */
1017 case MBA_ZIO_RESPONSE:
7c3df132
SK
1018 ql_dbg(ql_dbg_async, vha, 0x5015,
1019 "[R|Z]IO update completion.\n");
1da177e4 1020
e428924c 1021 if (IS_FWI2_CAPABLE(ha))
2afa19a9 1022 qla24xx_process_response_queue(vha, rsp);
4fdfefe5 1023 else
73208dfd 1024 qla2x00_process_response_queue(rsp);
1da177e4 1025 break;
9a853f71
AV
1026
1027 case MBA_DISCARD_RND_FRAME:
7c3df132
SK
1028 ql_dbg(ql_dbg_async, vha, 0x5016,
1029 "Discard RND Frame -- %04x %04x %04x.\n",
1030 mb[1], mb[2], mb[3]);
9a853f71 1031 break;
45ebeb56
AV
1032
1033 case MBA_TRACE_NOTIFICATION:
7c3df132
SK
1034 ql_dbg(ql_dbg_async, vha, 0x5017,
1035 "Trace Notification -- %04x %04x.\n", mb[1], mb[2]);
45ebeb56 1036 break;
4d4df193
HK
1037
1038 case MBA_ISP84XX_ALERT:
7c3df132
SK
1039 ql_dbg(ql_dbg_async, vha, 0x5018,
1040 "ISP84XX Alert Notification -- %04x %04x %04x.\n",
1041 mb[1], mb[2], mb[3]);
4d4df193
HK
1042
1043 spin_lock_irqsave(&ha->cs84xx->access_lock, flags);
1044 switch (mb[1]) {
1045 case A84_PANIC_RECOVERY:
7c3df132
SK
1046 ql_log(ql_log_info, vha, 0x5019,
1047 "Alert 84XX: panic recovery %04x %04x.\n",
1048 mb[2], mb[3]);
4d4df193
HK
1049 break;
1050 case A84_OP_LOGIN_COMPLETE:
1051 ha->cs84xx->op_fw_version = mb[3] << 16 | mb[2];
7c3df132
SK
1052 ql_log(ql_log_info, vha, 0x501a,
1053 "Alert 84XX: firmware version %x.\n",
1054 ha->cs84xx->op_fw_version);
4d4df193
HK
1055 break;
1056 case A84_DIAG_LOGIN_COMPLETE:
1057 ha->cs84xx->diag_fw_version = mb[3] << 16 | mb[2];
7c3df132
SK
1058 ql_log(ql_log_info, vha, 0x501b,
1059 "Alert 84XX: diagnostic firmware version %x.\n",
1060 ha->cs84xx->diag_fw_version);
4d4df193
HK
1061 break;
1062 case A84_GOLD_LOGIN_COMPLETE:
1063 ha->cs84xx->diag_fw_version = mb[3] << 16 | mb[2];
1064 ha->cs84xx->fw_update = 1;
7c3df132
SK
1065 ql_log(ql_log_info, vha, 0x501c,
1066 "Alert 84XX: gold firmware version %x.\n",
1067 ha->cs84xx->gold_fw_version);
4d4df193
HK
1068 break;
1069 default:
7c3df132
SK
1070 ql_log(ql_log_warn, vha, 0x501d,
1071 "Alert 84xx: Invalid Alert %04x %04x %04x.\n",
4d4df193
HK
1072 mb[1], mb[2], mb[3]);
1073 }
1074 spin_unlock_irqrestore(&ha->cs84xx->access_lock, flags);
1075 break;
3a03eb79 1076 case MBA_DCBX_START:
7c3df132
SK
1077 ql_dbg(ql_dbg_async, vha, 0x501e,
1078 "DCBX Started -- %04x %04x %04x.\n",
1079 mb[1], mb[2], mb[3]);
3a03eb79
AV
1080 break;
1081 case MBA_DCBX_PARAM_UPDATE:
7c3df132
SK
1082 ql_dbg(ql_dbg_async, vha, 0x501f,
1083 "DCBX Parameters Updated -- %04x %04x %04x.\n",
1084 mb[1], mb[2], mb[3]);
3a03eb79
AV
1085 break;
1086 case MBA_FCF_CONF_ERR:
7c3df132
SK
1087 ql_dbg(ql_dbg_async, vha, 0x5020,
1088 "FCF Configuration Error -- %04x %04x %04x.\n",
1089 mb[1], mb[2], mb[3]);
3a03eb79 1090 break;
3a03eb79 1091 case MBA_IDC_NOTIFY:
7ec0effd 1092 if (IS_QLA8031(vha->hw) || IS_QLA8044(ha)) {
67b2a31f
CD
1093 mb[4] = RD_REG_WORD(&reg24->mailbox4);
1094 if (((mb[2] & 0x7fff) == MBC_PORT_RESET ||
1095 (mb[2] & 0x7fff) == MBC_SET_PORT_CONFIG) &&
1096 (mb[4] & INTERNAL_LOOPBACK_MASK) != 0) {
8fcd6b8b 1097 set_bit(ISP_QUIESCE_NEEDED, &vha->dpc_flags);
67b2a31f
CD
1098 /*
1099 * Extend loop down timer since port is active.
1100 */
1101 if (atomic_read(&vha->loop_state) == LOOP_DOWN)
1102 atomic_set(&vha->loop_down_timer,
1103 LOOP_DOWN_TIME);
8fcd6b8b
CD
1104 qla2xxx_wake_dpc(vha);
1105 }
67b2a31f 1106 }
8fcd6b8b 1107 case MBA_IDC_COMPLETE:
9aaf2cea 1108 if (ha->notify_lb_portup_comp && !vha->vp_idx)
f356bef1
CD
1109 complete(&ha->lb_portup_comp);
1110 /* Fallthru */
3a03eb79 1111 case MBA_IDC_TIME_EXT:
7ec0effd
AD
1112 if (IS_QLA81XX(vha->hw) || IS_QLA8031(vha->hw) ||
1113 IS_QLA8044(ha))
7d613ac6
SV
1114 qla81xx_idc_event(vha, mb[0], mb[1]);
1115 break;
1116
1117 case MBA_IDC_AEN:
1118 mb[4] = RD_REG_WORD(&reg24->mailbox4);
1119 mb[5] = RD_REG_WORD(&reg24->mailbox5);
1120 mb[6] = RD_REG_WORD(&reg24->mailbox6);
1121 mb[7] = RD_REG_WORD(&reg24->mailbox7);
1122 qla83xx_handle_8200_aen(vha, mb);
3a03eb79 1123 break;
7d613ac6 1124
b5a340dd
JC
1125 case MBA_DPORT_DIAGNOSTICS:
1126 ql_dbg(ql_dbg_async, vha, 0x5052,
1127 "D-Port Diagnostics: %04x %04x=%s\n", mb[0], mb[1],
1128 mb[1] == 0 ? "start" :
1129 mb[1] == 1 ? "done (ok)" :
1130 mb[1] == 2 ? "done (error)" : "other");
1131 break;
1132
6246b8a1
GM
1133 default:
1134 ql_dbg(ql_dbg_async, vha, 0x5057,
1135 "Unknown AEN:%04x %04x %04x %04x\n",
1136 mb[0], mb[1], mb[2], mb[3]);
1da177e4 1137 }
2c3dfe3f 1138
2d70c103
NB
1139 qlt_async_event(mb[0], vha, mb);
1140
e315cd28 1141 if (!vha->vp_idx && ha->num_vhosts)
73208dfd 1142 qla2x00_alert_all_vps(rsp, mb);
1da177e4
LT
1143}
1144
1145/**
1146 * qla2x00_process_completed_request() - Process a Fast Post response.
1147 * @ha: SCSI driver HA context
1148 * @index: SRB index
1149 */
8ae6d9c7 1150void
73208dfd 1151qla2x00_process_completed_request(struct scsi_qla_host *vha,
8ae6d9c7 1152 struct req_que *req, uint32_t index)
1da177e4
LT
1153{
1154 srb_t *sp;
e315cd28 1155 struct qla_hw_data *ha = vha->hw;
1da177e4
LT
1156
1157 /* Validate handle. */
8d93f550 1158 if (index >= req->num_outstanding_cmds) {
7c3df132
SK
1159 ql_log(ql_log_warn, vha, 0x3014,
1160 "Invalid SCSI command index (%x).\n", index);
1da177e4 1161
7ec0effd 1162 if (IS_P3P_TYPE(ha))
8f7daead
GM
1163 set_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags);
1164 else
1165 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
1da177e4
LT
1166 return;
1167 }
1168
e315cd28 1169 sp = req->outstanding_cmds[index];
1da177e4
LT
1170 if (sp) {
1171 /* Free outstanding command slot. */
e315cd28 1172 req->outstanding_cmds[index] = NULL;
1da177e4 1173
1da177e4 1174 /* Save ISP completion status */
9ba56b95 1175 sp->done(ha, sp, DID_OK << 16);
1da177e4 1176 } else {
7c3df132 1177 ql_log(ql_log_warn, vha, 0x3016, "Invalid SCSI SRB.\n");
1da177e4 1178
7ec0effd 1179 if (IS_P3P_TYPE(ha))
8f7daead
GM
1180 set_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags);
1181 else
1182 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
1da177e4
LT
1183 }
1184}
1185
8ae6d9c7 1186srb_t *
ac280b67
AV
1187qla2x00_get_sp_from_handle(scsi_qla_host_t *vha, const char *func,
1188 struct req_que *req, void *iocb)
1189{
1190 struct qla_hw_data *ha = vha->hw;
1191 sts_entry_t *pkt = iocb;
1192 srb_t *sp = NULL;
1193 uint16_t index;
1194
1195 index = LSW(pkt->handle);
8d93f550 1196 if (index >= req->num_outstanding_cmds) {
7c3df132
SK
1197 ql_log(ql_log_warn, vha, 0x5031,
1198 "Invalid command index (%x).\n", index);
7ec0effd 1199 if (IS_P3P_TYPE(ha))
8f7daead
GM
1200 set_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags);
1201 else
1202 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
ac280b67
AV
1203 goto done;
1204 }
1205 sp = req->outstanding_cmds[index];
1206 if (!sp) {
7c3df132
SK
1207 ql_log(ql_log_warn, vha, 0x5032,
1208 "Invalid completion handle (%x) -- timed-out.\n", index);
ac280b67
AV
1209 return sp;
1210 }
1211 if (sp->handle != index) {
7c3df132
SK
1212 ql_log(ql_log_warn, vha, 0x5033,
1213 "SRB handle (%x) mismatch %x.\n", sp->handle, index);
ac280b67
AV
1214 return NULL;
1215 }
9a069e19 1216
ac280b67 1217 req->outstanding_cmds[index] = NULL;
9a069e19 1218
ac280b67
AV
1219done:
1220 return sp;
1221}
1222
1223static void
1224qla2x00_mbx_iocb_entry(scsi_qla_host_t *vha, struct req_que *req,
1225 struct mbx_entry *mbx)
1226{
1227 const char func[] = "MBX-IOCB";
1228 const char *type;
ac280b67
AV
1229 fc_port_t *fcport;
1230 srb_t *sp;
4916392b 1231 struct srb_iocb *lio;
99b0bec7 1232 uint16_t *data;
5ff1d584 1233 uint16_t status;
ac280b67
AV
1234
1235 sp = qla2x00_get_sp_from_handle(vha, func, req, mbx);
1236 if (!sp)
1237 return;
1238
9ba56b95
GM
1239 lio = &sp->u.iocb_cmd;
1240 type = sp->name;
ac280b67 1241 fcport = sp->fcport;
4916392b 1242 data = lio->u.logio.data;
ac280b67 1243
5ff1d584 1244 data[0] = MBS_COMMAND_ERROR;
4916392b 1245 data[1] = lio->u.logio.flags & SRB_LOGIN_RETRIED ?
5ff1d584 1246 QLA_LOGIO_LOGIN_RETRIED : 0;
ac280b67 1247 if (mbx->entry_status) {
7c3df132 1248 ql_dbg(ql_dbg_async, vha, 0x5043,
cfb0919c 1249 "Async-%s error entry - hdl=%x portid=%02x%02x%02x "
d3fa9e7d 1250 "entry-status=%x status=%x state-flag=%x "
cfb0919c
CD
1251 "status-flags=%x.\n", type, sp->handle,
1252 fcport->d_id.b.domain, fcport->d_id.b.area,
d3fa9e7d
AV
1253 fcport->d_id.b.al_pa, mbx->entry_status,
1254 le16_to_cpu(mbx->status), le16_to_cpu(mbx->state_flags),
7c3df132 1255 le16_to_cpu(mbx->status_flags));
d3fa9e7d 1256
cfb0919c 1257 ql_dump_buffer(ql_dbg_async + ql_dbg_buffer, vha, 0x5029,
7c3df132 1258 (uint8_t *)mbx, sizeof(*mbx));
ac280b67 1259
99b0bec7 1260 goto logio_done;
ac280b67
AV
1261 }
1262
5ff1d584 1263 status = le16_to_cpu(mbx->status);
9ba56b95 1264 if (status == 0x30 && sp->type == SRB_LOGIN_CMD &&
5ff1d584
AV
1265 le16_to_cpu(mbx->mb0) == MBS_COMMAND_COMPLETE)
1266 status = 0;
1267 if (!status && le16_to_cpu(mbx->mb0) == MBS_COMMAND_COMPLETE) {
7c3df132 1268 ql_dbg(ql_dbg_async, vha, 0x5045,
cfb0919c
CD
1269 "Async-%s complete - hdl=%x portid=%02x%02x%02x mbx1=%x.\n",
1270 type, sp->handle, fcport->d_id.b.domain,
1271 fcport->d_id.b.area, fcport->d_id.b.al_pa,
1272 le16_to_cpu(mbx->mb1));
ac280b67
AV
1273
1274 data[0] = MBS_COMMAND_COMPLETE;
9ba56b95 1275 if (sp->type == SRB_LOGIN_CMD) {
99b0bec7
AV
1276 fcport->port_type = FCT_TARGET;
1277 if (le16_to_cpu(mbx->mb1) & BIT_0)
1278 fcport->port_type = FCT_INITIATOR;
6ac52608 1279 else if (le16_to_cpu(mbx->mb1) & BIT_1)
99b0bec7 1280 fcport->flags |= FCF_FCP2_DEVICE;
5ff1d584 1281 }
99b0bec7 1282 goto logio_done;
ac280b67
AV
1283 }
1284
1285 data[0] = le16_to_cpu(mbx->mb0);
1286 switch (data[0]) {
1287 case MBS_PORT_ID_USED:
1288 data[1] = le16_to_cpu(mbx->mb1);
1289 break;
1290 case MBS_LOOP_ID_USED:
1291 break;
1292 default:
1293 data[0] = MBS_COMMAND_ERROR;
ac280b67
AV
1294 break;
1295 }
1296
7c3df132 1297 ql_log(ql_log_warn, vha, 0x5046,
cfb0919c
CD
1298 "Async-%s failed - hdl=%x portid=%02x%02x%02x status=%x "
1299 "mb0=%x mb1=%x mb2=%x mb6=%x mb7=%x.\n", type, sp->handle,
1300 fcport->d_id.b.domain, fcport->d_id.b.area, fcport->d_id.b.al_pa,
1301 status, le16_to_cpu(mbx->mb0), le16_to_cpu(mbx->mb1),
ac280b67 1302 le16_to_cpu(mbx->mb2), le16_to_cpu(mbx->mb6),
7c3df132 1303 le16_to_cpu(mbx->mb7));
ac280b67 1304
99b0bec7 1305logio_done:
9ba56b95 1306 sp->done(vha, sp, 0);
ac280b67
AV
1307}
1308
9bc4f4fb
HZ
1309static void
1310qla2x00_ct_entry(scsi_qla_host_t *vha, struct req_que *req,
1311 sts_entry_t *pkt, int iocb_type)
1312{
1313 const char func[] = "CT_IOCB";
1314 const char *type;
9bc4f4fb 1315 srb_t *sp;
9bc4f4fb
HZ
1316 struct fc_bsg_job *bsg_job;
1317 uint16_t comp_status;
9ba56b95 1318 int res;
9bc4f4fb
HZ
1319
1320 sp = qla2x00_get_sp_from_handle(vha, func, req, pkt);
1321 if (!sp)
1322 return;
1323
9ba56b95 1324 bsg_job = sp->u.bsg_job;
9bc4f4fb 1325
9ba56b95 1326 type = "ct pass-through";
9bc4f4fb
HZ
1327
1328 comp_status = le16_to_cpu(pkt->comp_status);
1329
1330 /* return FC_CTELS_STATUS_OK and leave the decoding of the ELS/CT
1331 * fc payload to the caller
1332 */
1333 bsg_job->reply->reply_data.ctels_reply.status = FC_CTELS_STATUS_OK;
1334 bsg_job->reply_len = sizeof(struct fc_bsg_reply);
1335
1336 if (comp_status != CS_COMPLETE) {
1337 if (comp_status == CS_DATA_UNDERRUN) {
9ba56b95 1338 res = DID_OK << 16;
9bc4f4fb
HZ
1339 bsg_job->reply->reply_payload_rcv_len =
1340 le16_to_cpu(((sts_entry_t *)pkt)->rsp_info_len);
1341
7c3df132
SK
1342 ql_log(ql_log_warn, vha, 0x5048,
1343 "CT pass-through-%s error "
9bc4f4fb 1344 "comp_status-status=0x%x total_byte = 0x%x.\n",
7c3df132
SK
1345 type, comp_status,
1346 bsg_job->reply->reply_payload_rcv_len);
9bc4f4fb 1347 } else {
7c3df132
SK
1348 ql_log(ql_log_warn, vha, 0x5049,
1349 "CT pass-through-%s error "
1350 "comp_status-status=0x%x.\n", type, comp_status);
9ba56b95 1351 res = DID_ERROR << 16;
9bc4f4fb
HZ
1352 bsg_job->reply->reply_payload_rcv_len = 0;
1353 }
cfb0919c 1354 ql_dump_buffer(ql_dbg_async + ql_dbg_buffer, vha, 0x5035,
7c3df132 1355 (uint8_t *)pkt, sizeof(*pkt));
9bc4f4fb 1356 } else {
9ba56b95 1357 res = DID_OK << 16;
9bc4f4fb
HZ
1358 bsg_job->reply->reply_payload_rcv_len =
1359 bsg_job->reply_payload.payload_len;
1360 bsg_job->reply_len = 0;
1361 }
1362
9ba56b95 1363 sp->done(vha, sp, res);
9bc4f4fb
HZ
1364}
1365
9a069e19
GM
1366static void
1367qla24xx_els_ct_entry(scsi_qla_host_t *vha, struct req_que *req,
1368 struct sts_entry_24xx *pkt, int iocb_type)
1369{
1370 const char func[] = "ELS_CT_IOCB";
1371 const char *type;
9a069e19 1372 srb_t *sp;
9a069e19
GM
1373 struct fc_bsg_job *bsg_job;
1374 uint16_t comp_status;
1375 uint32_t fw_status[3];
1376 uint8_t* fw_sts_ptr;
9ba56b95 1377 int res;
9a069e19
GM
1378
1379 sp = qla2x00_get_sp_from_handle(vha, func, req, pkt);
1380 if (!sp)
1381 return;
9ba56b95 1382 bsg_job = sp->u.bsg_job;
9a069e19
GM
1383
1384 type = NULL;
9ba56b95 1385 switch (sp->type) {
9a069e19
GM
1386 case SRB_ELS_CMD_RPT:
1387 case SRB_ELS_CMD_HST:
1388 type = "els";
1389 break;
1390 case SRB_CT_CMD:
1391 type = "ct pass-through";
1392 break;
1393 default:
37fed3ee 1394 ql_dbg(ql_dbg_user, vha, 0x503e,
9ba56b95 1395 "Unrecognized SRB: (%p) type=%d.\n", sp, sp->type);
9a069e19
GM
1396 return;
1397 }
1398
1399 comp_status = fw_status[0] = le16_to_cpu(pkt->comp_status);
1400 fw_status[1] = le16_to_cpu(((struct els_sts_entry_24xx*)pkt)->error_subcode_1);
1401 fw_status[2] = le16_to_cpu(((struct els_sts_entry_24xx*)pkt)->error_subcode_2);
1402
1403 /* return FC_CTELS_STATUS_OK and leave the decoding of the ELS/CT
1404 * fc payload to the caller
1405 */
1406 bsg_job->reply->reply_data.ctels_reply.status = FC_CTELS_STATUS_OK;
1407 bsg_job->reply_len = sizeof(struct fc_bsg_reply) + sizeof(fw_status);
1408
1409 if (comp_status != CS_COMPLETE) {
1410 if (comp_status == CS_DATA_UNDERRUN) {
9ba56b95 1411 res = DID_OK << 16;
9a069e19 1412 bsg_job->reply->reply_payload_rcv_len =
9ba56b95 1413 le16_to_cpu(((struct els_sts_entry_24xx *)pkt)->total_byte_count);
9a069e19 1414
37fed3ee 1415 ql_dbg(ql_dbg_user, vha, 0x503f,
cfb0919c 1416 "ELS-CT pass-through-%s error hdl=%x comp_status-status=0x%x "
9a069e19 1417 "error subcode 1=0x%x error subcode 2=0x%x total_byte = 0x%x.\n",
cfb0919c 1418 type, sp->handle, comp_status, fw_status[1], fw_status[2],
7c3df132
SK
1419 le16_to_cpu(((struct els_sts_entry_24xx *)
1420 pkt)->total_byte_count));
9a069e19
GM
1421 fw_sts_ptr = ((uint8_t*)bsg_job->req->sense) + sizeof(struct fc_bsg_reply);
1422 memcpy( fw_sts_ptr, fw_status, sizeof(fw_status));
1423 }
1424 else {
37fed3ee 1425 ql_dbg(ql_dbg_user, vha, 0x5040,
cfb0919c 1426 "ELS-CT pass-through-%s error hdl=%x comp_status-status=0x%x "
9a069e19 1427 "error subcode 1=0x%x error subcode 2=0x%x.\n",
cfb0919c 1428 type, sp->handle, comp_status,
7c3df132
SK
1429 le16_to_cpu(((struct els_sts_entry_24xx *)
1430 pkt)->error_subcode_1),
1431 le16_to_cpu(((struct els_sts_entry_24xx *)
1432 pkt)->error_subcode_2));
9ba56b95 1433 res = DID_ERROR << 16;
9a069e19
GM
1434 bsg_job->reply->reply_payload_rcv_len = 0;
1435 fw_sts_ptr = ((uint8_t*)bsg_job->req->sense) + sizeof(struct fc_bsg_reply);
1436 memcpy( fw_sts_ptr, fw_status, sizeof(fw_status));
1437 }
37fed3ee 1438 ql_dump_buffer(ql_dbg_user + ql_dbg_buffer, vha, 0x5056,
7c3df132 1439 (uint8_t *)pkt, sizeof(*pkt));
9a069e19
GM
1440 }
1441 else {
9ba56b95 1442 res = DID_OK << 16;
9a069e19
GM
1443 bsg_job->reply->reply_payload_rcv_len = bsg_job->reply_payload.payload_len;
1444 bsg_job->reply_len = 0;
1445 }
1446
9ba56b95 1447 sp->done(vha, sp, res);
9a069e19
GM
1448}
1449
ac280b67
AV
1450static void
1451qla24xx_logio_entry(scsi_qla_host_t *vha, struct req_que *req,
1452 struct logio_entry_24xx *logio)
1453{
1454 const char func[] = "LOGIO-IOCB";
1455 const char *type;
ac280b67
AV
1456 fc_port_t *fcport;
1457 srb_t *sp;
4916392b 1458 struct srb_iocb *lio;
99b0bec7 1459 uint16_t *data;
ac280b67
AV
1460 uint32_t iop[2];
1461
1462 sp = qla2x00_get_sp_from_handle(vha, func, req, logio);
1463 if (!sp)
1464 return;
1465
9ba56b95
GM
1466 lio = &sp->u.iocb_cmd;
1467 type = sp->name;
ac280b67 1468 fcport = sp->fcport;
4916392b 1469 data = lio->u.logio.data;
ac280b67 1470
5ff1d584 1471 data[0] = MBS_COMMAND_ERROR;
4916392b 1472 data[1] = lio->u.logio.flags & SRB_LOGIN_RETRIED ?
5ff1d584 1473 QLA_LOGIO_LOGIN_RETRIED : 0;
ac280b67 1474 if (logio->entry_status) {
5e19ed90 1475 ql_log(ql_log_warn, fcport->vha, 0x5034,
cfb0919c 1476 "Async-%s error entry - hdl=%x"
d3fa9e7d 1477 "portid=%02x%02x%02x entry-status=%x.\n",
cfb0919c
CD
1478 type, sp->handle, fcport->d_id.b.domain,
1479 fcport->d_id.b.area, fcport->d_id.b.al_pa,
1480 logio->entry_status);
1481 ql_dump_buffer(ql_dbg_async + ql_dbg_buffer, vha, 0x504d,
7c3df132 1482 (uint8_t *)logio, sizeof(*logio));
ac280b67 1483
99b0bec7 1484 goto logio_done;
ac280b67
AV
1485 }
1486
1487 if (le16_to_cpu(logio->comp_status) == CS_COMPLETE) {
5e19ed90 1488 ql_dbg(ql_dbg_async, fcport->vha, 0x5036,
cfb0919c
CD
1489 "Async-%s complete - hdl=%x portid=%02x%02x%02x "
1490 "iop0=%x.\n", type, sp->handle, fcport->d_id.b.domain,
1491 fcport->d_id.b.area, fcport->d_id.b.al_pa,
7c3df132 1492 le32_to_cpu(logio->io_parameter[0]));
ac280b67
AV
1493
1494 data[0] = MBS_COMMAND_COMPLETE;
9ba56b95 1495 if (sp->type != SRB_LOGIN_CMD)
99b0bec7 1496 goto logio_done;
ac280b67
AV
1497
1498 iop[0] = le32_to_cpu(logio->io_parameter[0]);
1499 if (iop[0] & BIT_4) {
1500 fcport->port_type = FCT_TARGET;
1501 if (iop[0] & BIT_8)
8474f3a0 1502 fcport->flags |= FCF_FCP2_DEVICE;
b0cd579c 1503 } else if (iop[0] & BIT_5)
ac280b67 1504 fcport->port_type = FCT_INITIATOR;
b0cd579c 1505
2d70c103
NB
1506 if (iop[0] & BIT_7)
1507 fcport->flags |= FCF_CONF_COMP_SUPPORTED;
1508
ac280b67
AV
1509 if (logio->io_parameter[7] || logio->io_parameter[8])
1510 fcport->supported_classes |= FC_COS_CLASS2;
1511 if (logio->io_parameter[9] || logio->io_parameter[10])
1512 fcport->supported_classes |= FC_COS_CLASS3;
1513
99b0bec7 1514 goto logio_done;
ac280b67
AV
1515 }
1516
1517 iop[0] = le32_to_cpu(logio->io_parameter[0]);
1518 iop[1] = le32_to_cpu(logio->io_parameter[1]);
1519 switch (iop[0]) {
1520 case LSC_SCODE_PORTID_USED:
1521 data[0] = MBS_PORT_ID_USED;
1522 data[1] = LSW(iop[1]);
1523 break;
1524 case LSC_SCODE_NPORT_USED:
1525 data[0] = MBS_LOOP_ID_USED;
1526 break;
ac280b67
AV
1527 default:
1528 data[0] = MBS_COMMAND_ERROR;
ac280b67
AV
1529 break;
1530 }
1531
5e19ed90 1532 ql_dbg(ql_dbg_async, fcport->vha, 0x5037,
cfb0919c
CD
1533 "Async-%s failed - hdl=%x portid=%02x%02x%02x comp=%x "
1534 "iop0=%x iop1=%x.\n", type, sp->handle, fcport->d_id.b.domain,
d3fa9e7d 1535 fcport->d_id.b.area, fcport->d_id.b.al_pa,
ac280b67
AV
1536 le16_to_cpu(logio->comp_status),
1537 le32_to_cpu(logio->io_parameter[0]),
7c3df132 1538 le32_to_cpu(logio->io_parameter[1]));
ac280b67 1539
99b0bec7 1540logio_done:
9ba56b95 1541 sp->done(vha, sp, 0);
ac280b67
AV
1542}
1543
3822263e 1544static void
faef62d1 1545qla24xx_tm_iocb_entry(scsi_qla_host_t *vha, struct req_que *req, void *tsk)
3822263e
MI
1546{
1547 const char func[] = "TMF-IOCB";
1548 const char *type;
1549 fc_port_t *fcport;
1550 srb_t *sp;
1551 struct srb_iocb *iocb;
3822263e 1552 struct sts_entry_24xx *sts = (struct sts_entry_24xx *)tsk;
3822263e
MI
1553
1554 sp = qla2x00_get_sp_from_handle(vha, func, req, tsk);
1555 if (!sp)
1556 return;
1557
9ba56b95
GM
1558 iocb = &sp->u.iocb_cmd;
1559 type = sp->name;
3822263e 1560 fcport = sp->fcport;
faef62d1 1561 iocb->u.tmf.data = QLA_SUCCESS;
3822263e
MI
1562
1563 if (sts->entry_status) {
5e19ed90 1564 ql_log(ql_log_warn, fcport->vha, 0x5038,
cfb0919c
CD
1565 "Async-%s error - hdl=%x entry-status(%x).\n",
1566 type, sp->handle, sts->entry_status);
faef62d1 1567 iocb->u.tmf.data = QLA_FUNCTION_FAILED;
3822263e 1568 } else if (sts->comp_status != __constant_cpu_to_le16(CS_COMPLETE)) {
5e19ed90 1569 ql_log(ql_log_warn, fcport->vha, 0x5039,
cfb0919c
CD
1570 "Async-%s error - hdl=%x completion status(%x).\n",
1571 type, sp->handle, sts->comp_status);
faef62d1
AB
1572 iocb->u.tmf.data = QLA_FUNCTION_FAILED;
1573 } else if ((le16_to_cpu(sts->scsi_status) &
3822263e 1574 SS_RESPONSE_INFO_LEN_VALID)) {
faef62d1
AB
1575 if (le32_to_cpu(sts->rsp_data_len) < 4) {
1576 ql_log(ql_log_warn, fcport->vha, 0x503b,
1577 "Async-%s error - hdl=%x not enough response(%d).\n",
1578 type, sp->handle, sts->rsp_data_len);
1579 } else if (sts->data[3]) {
1580 ql_log(ql_log_warn, fcport->vha, 0x503c,
1581 "Async-%s error - hdl=%x response(%x).\n",
1582 type, sp->handle, sts->data[3]);
8d2b21db 1583 iocb->u.tmf.data = QLA_FUNCTION_FAILED;
faef62d1 1584 }
3822263e
MI
1585 }
1586
faef62d1 1587 if (iocb->u.tmf.data != QLA_SUCCESS)
7c3df132
SK
1588 ql_dump_buffer(ql_dbg_async + ql_dbg_buffer, vha, 0x5055,
1589 (uint8_t *)sts, sizeof(*sts));
3822263e 1590
9ba56b95 1591 sp->done(vha, sp, 0);
3822263e
MI
1592}
1593
1da177e4
LT
1594/**
1595 * qla2x00_process_response_queue() - Process response queue entries.
1596 * @ha: SCSI driver HA context
1597 */
1598void
73208dfd 1599qla2x00_process_response_queue(struct rsp_que *rsp)
1da177e4 1600{
73208dfd
AC
1601 struct scsi_qla_host *vha;
1602 struct qla_hw_data *ha = rsp->hw;
3d71644c 1603 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1da177e4
LT
1604 sts_entry_t *pkt;
1605 uint16_t handle_cnt;
1606 uint16_t cnt;
73208dfd 1607
2afa19a9 1608 vha = pci_get_drvdata(ha->pdev);
1da177e4 1609
e315cd28 1610 if (!vha->flags.online)
1da177e4
LT
1611 return;
1612
e315cd28
AC
1613 while (rsp->ring_ptr->signature != RESPONSE_PROCESSED) {
1614 pkt = (sts_entry_t *)rsp->ring_ptr;
1da177e4 1615
e315cd28
AC
1616 rsp->ring_index++;
1617 if (rsp->ring_index == rsp->length) {
1618 rsp->ring_index = 0;
1619 rsp->ring_ptr = rsp->ring;
1da177e4 1620 } else {
e315cd28 1621 rsp->ring_ptr++;
1da177e4
LT
1622 }
1623
1624 if (pkt->entry_status != 0) {
73208dfd 1625 qla2x00_error_entry(vha, rsp, pkt);
1da177e4
LT
1626 ((response_t *)pkt)->signature = RESPONSE_PROCESSED;
1627 wmb();
1628 continue;
1629 }
1630
1631 switch (pkt->entry_type) {
1632 case STATUS_TYPE:
73208dfd 1633 qla2x00_status_entry(vha, rsp, pkt);
1da177e4
LT
1634 break;
1635 case STATUS_TYPE_21:
1636 handle_cnt = ((sts21_entry_t *)pkt)->handle_count;
1637 for (cnt = 0; cnt < handle_cnt; cnt++) {
73208dfd 1638 qla2x00_process_completed_request(vha, rsp->req,
1da177e4
LT
1639 ((sts21_entry_t *)pkt)->handle[cnt]);
1640 }
1641 break;
1642 case STATUS_TYPE_22:
1643 handle_cnt = ((sts22_entry_t *)pkt)->handle_count;
1644 for (cnt = 0; cnt < handle_cnt; cnt++) {
73208dfd 1645 qla2x00_process_completed_request(vha, rsp->req,
1da177e4
LT
1646 ((sts22_entry_t *)pkt)->handle[cnt]);
1647 }
1648 break;
1649 case STATUS_CONT_TYPE:
2afa19a9 1650 qla2x00_status_cont_entry(rsp, (sts_cont_entry_t *)pkt);
1da177e4 1651 break;
ac280b67
AV
1652 case MBX_IOCB_TYPE:
1653 qla2x00_mbx_iocb_entry(vha, rsp->req,
1654 (struct mbx_entry *)pkt);
3822263e 1655 break;
9bc4f4fb
HZ
1656 case CT_IOCB_TYPE:
1657 qla2x00_ct_entry(vha, rsp->req, pkt, CT_IOCB_TYPE);
1658 break;
1da177e4
LT
1659 default:
1660 /* Type Not Supported. */
7c3df132
SK
1661 ql_log(ql_log_warn, vha, 0x504a,
1662 "Received unknown response pkt type %x "
1da177e4 1663 "entry status=%x.\n",
7c3df132 1664 pkt->entry_type, pkt->entry_status);
1da177e4
LT
1665 break;
1666 }
1667 ((response_t *)pkt)->signature = RESPONSE_PROCESSED;
1668 wmb();
1669 }
1670
1671 /* Adjust ring index */
e315cd28 1672 WRT_REG_WORD(ISP_RSP_Q_OUT(ha, reg), rsp->ring_index);
1da177e4
LT
1673}
1674
4733fcb1 1675static inline void
5544213b 1676qla2x00_handle_sense(srb_t *sp, uint8_t *sense_data, uint32_t par_sense_len,
9ba56b95 1677 uint32_t sense_len, struct rsp_que *rsp, int res)
4733fcb1 1678{
7c3df132 1679 struct scsi_qla_host *vha = sp->fcport->vha;
9ba56b95
GM
1680 struct scsi_cmnd *cp = GET_CMD_SP(sp);
1681 uint32_t track_sense_len;
4733fcb1
AV
1682
1683 if (sense_len >= SCSI_SENSE_BUFFERSIZE)
1684 sense_len = SCSI_SENSE_BUFFERSIZE;
1685
9ba56b95
GM
1686 SET_CMD_SENSE_LEN(sp, sense_len);
1687 SET_CMD_SENSE_PTR(sp, cp->sense_buffer);
1688 track_sense_len = sense_len;
1689
1690 if (sense_len > par_sense_len)
5544213b 1691 sense_len = par_sense_len;
4733fcb1
AV
1692
1693 memcpy(cp->sense_buffer, sense_data, sense_len);
1694
9ba56b95
GM
1695 SET_CMD_SENSE_PTR(sp, cp->sense_buffer + sense_len);
1696 track_sense_len -= sense_len;
1697 SET_CMD_SENSE_LEN(sp, track_sense_len);
1698
1699 if (track_sense_len != 0) {
2afa19a9 1700 rsp->status_srb = sp;
9ba56b95
GM
1701 cp->result = res;
1702 }
4733fcb1 1703
cfb0919c
CD
1704 if (sense_len) {
1705 ql_dbg(ql_dbg_io + ql_dbg_buffer, vha, 0x301c,
9cb78c16 1706 "Check condition Sense data, nexus%ld:%d:%llu cmd=%p.\n",
cfb0919c
CD
1707 sp->fcport->vha->host_no, cp->device->id, cp->device->lun,
1708 cp);
7c3df132
SK
1709 ql_dump_buffer(ql_dbg_io + ql_dbg_buffer, vha, 0x302b,
1710 cp->sense_buffer, sense_len);
cfb0919c 1711 }
4733fcb1
AV
1712}
1713
bad75002
AE
1714struct scsi_dif_tuple {
1715 __be16 guard; /* Checksum */
d6a03581 1716 __be16 app_tag; /* APPL identifier */
bad75002
AE
1717 __be32 ref_tag; /* Target LBA or indirect LBA */
1718};
1719
1720/*
1721 * Checks the guard or meta-data for the type of error
1722 * detected by the HBA. In case of errors, we set the
1723 * ASC/ASCQ fields in the sense buffer with ILLEGAL_REQUEST
1724 * to indicate to the kernel that the HBA detected error.
1725 */
8cb2049c 1726static inline int
bad75002
AE
1727qla2x00_handle_dif_error(srb_t *sp, struct sts_entry_24xx *sts24)
1728{
7c3df132 1729 struct scsi_qla_host *vha = sp->fcport->vha;
9ba56b95 1730 struct scsi_cmnd *cmd = GET_CMD_SP(sp);
8cb2049c
AE
1731 uint8_t *ap = &sts24->data[12];
1732 uint8_t *ep = &sts24->data[20];
bad75002
AE
1733 uint32_t e_ref_tag, a_ref_tag;
1734 uint16_t e_app_tag, a_app_tag;
1735 uint16_t e_guard, a_guard;
1736
8cb2049c
AE
1737 /*
1738 * swab32 of the "data" field in the beginning of qla2x00_status_entry()
1739 * would make guard field appear at offset 2
1740 */
1741 a_guard = le16_to_cpu(*(uint16_t *)(ap + 2));
1742 a_app_tag = le16_to_cpu(*(uint16_t *)(ap + 0));
1743 a_ref_tag = le32_to_cpu(*(uint32_t *)(ap + 4));
1744 e_guard = le16_to_cpu(*(uint16_t *)(ep + 2));
1745 e_app_tag = le16_to_cpu(*(uint16_t *)(ep + 0));
1746 e_ref_tag = le32_to_cpu(*(uint32_t *)(ep + 4));
bad75002 1747
7c3df132
SK
1748 ql_dbg(ql_dbg_io, vha, 0x3023,
1749 "iocb(s) %p Returned STATUS.\n", sts24);
bad75002 1750
7c3df132
SK
1751 ql_dbg(ql_dbg_io, vha, 0x3024,
1752 "DIF ERROR in cmd 0x%x lba 0x%llx act ref"
bad75002 1753 " tag=0x%x, exp ref_tag=0x%x, act app tag=0x%x, exp app"
7c3df132 1754 " tag=0x%x, act guard=0x%x, exp guard=0x%x.\n",
bad75002 1755 cmd->cmnd[0], (u64)scsi_get_lba(cmd), a_ref_tag, e_ref_tag,
7c3df132 1756 a_app_tag, e_app_tag, a_guard, e_guard);
bad75002 1757
8cb2049c
AE
1758 /*
1759 * Ignore sector if:
1760 * For type 3: ref & app tag is all 'f's
1761 * For type 0,1,2: app tag is all 'f's
1762 */
1763 if ((a_app_tag == 0xffff) &&
1764 ((scsi_get_prot_type(cmd) != SCSI_PROT_DIF_TYPE3) ||
1765 (a_ref_tag == 0xffffffff))) {
1766 uint32_t blocks_done, resid;
1767 sector_t lba_s = scsi_get_lba(cmd);
1768
1769 /* 2TB boundary case covered automatically with this */
1770 blocks_done = e_ref_tag - (uint32_t)lba_s + 1;
1771
1772 resid = scsi_bufflen(cmd) - (blocks_done *
1773 cmd->device->sector_size);
1774
1775 scsi_set_resid(cmd, resid);
1776 cmd->result = DID_OK << 16;
1777
1778 /* Update protection tag */
1779 if (scsi_prot_sg_count(cmd)) {
1780 uint32_t i, j = 0, k = 0, num_ent;
1781 struct scatterlist *sg;
1782 struct sd_dif_tuple *spt;
1783
1784 /* Patch the corresponding protection tags */
1785 scsi_for_each_prot_sg(cmd, sg,
1786 scsi_prot_sg_count(cmd), i) {
1787 num_ent = sg_dma_len(sg) / 8;
1788 if (k + num_ent < blocks_done) {
1789 k += num_ent;
1790 continue;
1791 }
1792 j = blocks_done - k - 1;
1793 k = blocks_done;
1794 break;
1795 }
1796
1797 if (k != blocks_done) {
cfb0919c 1798 ql_log(ql_log_warn, vha, 0x302f,
8ec9c7fb
RD
1799 "unexpected tag values tag:lba=%x:%llx)\n",
1800 e_ref_tag, (unsigned long long)lba_s);
8cb2049c
AE
1801 return 1;
1802 }
1803
1804 spt = page_address(sg_page(sg)) + sg->offset;
1805 spt += j;
1806
1807 spt->app_tag = 0xffff;
1808 if (scsi_get_prot_type(cmd) == SCSI_PROT_DIF_TYPE3)
1809 spt->ref_tag = 0xffffffff;
1810 }
1811
1812 return 0;
1813 }
1814
bad75002
AE
1815 /* check guard */
1816 if (e_guard != a_guard) {
1817 scsi_build_sense_buffer(1, cmd->sense_buffer, ILLEGAL_REQUEST,
1818 0x10, 0x1);
1819 set_driver_byte(cmd, DRIVER_SENSE);
1820 set_host_byte(cmd, DID_ABORT);
1821 cmd->result |= SAM_STAT_CHECK_CONDITION << 1;
8cb2049c 1822 return 1;
bad75002
AE
1823 }
1824
e02587d7
AE
1825 /* check ref tag */
1826 if (e_ref_tag != a_ref_tag) {
bad75002 1827 scsi_build_sense_buffer(1, cmd->sense_buffer, ILLEGAL_REQUEST,
e02587d7 1828 0x10, 0x3);
bad75002
AE
1829 set_driver_byte(cmd, DRIVER_SENSE);
1830 set_host_byte(cmd, DID_ABORT);
1831 cmd->result |= SAM_STAT_CHECK_CONDITION << 1;
8cb2049c 1832 return 1;
bad75002
AE
1833 }
1834
e02587d7
AE
1835 /* check appl tag */
1836 if (e_app_tag != a_app_tag) {
bad75002 1837 scsi_build_sense_buffer(1, cmd->sense_buffer, ILLEGAL_REQUEST,
e02587d7 1838 0x10, 0x2);
bad75002
AE
1839 set_driver_byte(cmd, DRIVER_SENSE);
1840 set_host_byte(cmd, DID_ABORT);
1841 cmd->result |= SAM_STAT_CHECK_CONDITION << 1;
8cb2049c 1842 return 1;
bad75002 1843 }
e02587d7 1844
8cb2049c 1845 return 1;
bad75002
AE
1846}
1847
a9b6f722
SK
1848static void
1849qla25xx_process_bidir_status_iocb(scsi_qla_host_t *vha, void *pkt,
1850 struct req_que *req, uint32_t index)
1851{
1852 struct qla_hw_data *ha = vha->hw;
1853 srb_t *sp;
1854 uint16_t comp_status;
1855 uint16_t scsi_status;
1856 uint16_t thread_id;
1857 uint32_t rval = EXT_STATUS_OK;
1858 struct fc_bsg_job *bsg_job = NULL;
1859 sts_entry_t *sts;
1860 struct sts_entry_24xx *sts24;
1861 sts = (sts_entry_t *) pkt;
1862 sts24 = (struct sts_entry_24xx *) pkt;
1863
1864 /* Validate handle. */
8d93f550 1865 if (index >= req->num_outstanding_cmds) {
a9b6f722
SK
1866 ql_log(ql_log_warn, vha, 0x70af,
1867 "Invalid SCSI completion handle 0x%x.\n", index);
1868 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
1869 return;
1870 }
1871
1872 sp = req->outstanding_cmds[index];
1873 if (sp) {
1874 /* Free outstanding command slot. */
1875 req->outstanding_cmds[index] = NULL;
1876 bsg_job = sp->u.bsg_job;
1877 } else {
1878 ql_log(ql_log_warn, vha, 0x70b0,
1879 "Req:%d: Invalid ISP SCSI completion handle(0x%x)\n",
1880 req->id, index);
1881
1882 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
1883 return;
1884 }
1885
1886 if (IS_FWI2_CAPABLE(ha)) {
1887 comp_status = le16_to_cpu(sts24->comp_status);
1888 scsi_status = le16_to_cpu(sts24->scsi_status) & SS_MASK;
1889 } else {
1890 comp_status = le16_to_cpu(sts->comp_status);
1891 scsi_status = le16_to_cpu(sts->scsi_status) & SS_MASK;
1892 }
1893
1894 thread_id = bsg_job->request->rqst_data.h_vendor.vendor_cmd[1];
1895 switch (comp_status) {
1896 case CS_COMPLETE:
1897 if (scsi_status == 0) {
1898 bsg_job->reply->reply_payload_rcv_len =
1899 bsg_job->reply_payload.payload_len;
fabbb8df
JC
1900 vha->qla_stats.input_bytes +=
1901 bsg_job->reply->reply_payload_rcv_len;
1902 vha->qla_stats.input_requests++;
a9b6f722
SK
1903 rval = EXT_STATUS_OK;
1904 }
1905 goto done;
1906
1907 case CS_DATA_OVERRUN:
1908 ql_dbg(ql_dbg_user, vha, 0x70b1,
1909 "Command completed with date overrun thread_id=%d\n",
1910 thread_id);
1911 rval = EXT_STATUS_DATA_OVERRUN;
1912 break;
1913
1914 case CS_DATA_UNDERRUN:
1915 ql_dbg(ql_dbg_user, vha, 0x70b2,
1916 "Command completed with date underrun thread_id=%d\n",
1917 thread_id);
1918 rval = EXT_STATUS_DATA_UNDERRUN;
1919 break;
1920 case CS_BIDIR_RD_OVERRUN:
1921 ql_dbg(ql_dbg_user, vha, 0x70b3,
1922 "Command completed with read data overrun thread_id=%d\n",
1923 thread_id);
1924 rval = EXT_STATUS_DATA_OVERRUN;
1925 break;
1926
1927 case CS_BIDIR_RD_WR_OVERRUN:
1928 ql_dbg(ql_dbg_user, vha, 0x70b4,
1929 "Command completed with read and write data overrun "
1930 "thread_id=%d\n", thread_id);
1931 rval = EXT_STATUS_DATA_OVERRUN;
1932 break;
1933
1934 case CS_BIDIR_RD_OVERRUN_WR_UNDERRUN:
1935 ql_dbg(ql_dbg_user, vha, 0x70b5,
1936 "Command completed with read data over and write data "
1937 "underrun thread_id=%d\n", thread_id);
1938 rval = EXT_STATUS_DATA_OVERRUN;
1939 break;
1940
1941 case CS_BIDIR_RD_UNDERRUN:
1942 ql_dbg(ql_dbg_user, vha, 0x70b6,
1943 "Command completed with read data data underrun "
1944 "thread_id=%d\n", thread_id);
1945 rval = EXT_STATUS_DATA_UNDERRUN;
1946 break;
1947
1948 case CS_BIDIR_RD_UNDERRUN_WR_OVERRUN:
1949 ql_dbg(ql_dbg_user, vha, 0x70b7,
1950 "Command completed with read data under and write data "
1951 "overrun thread_id=%d\n", thread_id);
1952 rval = EXT_STATUS_DATA_UNDERRUN;
1953 break;
1954
1955 case CS_BIDIR_RD_WR_UNDERRUN:
1956 ql_dbg(ql_dbg_user, vha, 0x70b8,
1957 "Command completed with read and write data underrun "
1958 "thread_id=%d\n", thread_id);
1959 rval = EXT_STATUS_DATA_UNDERRUN;
1960 break;
1961
1962 case CS_BIDIR_DMA:
1963 ql_dbg(ql_dbg_user, vha, 0x70b9,
1964 "Command completed with data DMA error thread_id=%d\n",
1965 thread_id);
1966 rval = EXT_STATUS_DMA_ERR;
1967 break;
1968
1969 case CS_TIMEOUT:
1970 ql_dbg(ql_dbg_user, vha, 0x70ba,
1971 "Command completed with timeout thread_id=%d\n",
1972 thread_id);
1973 rval = EXT_STATUS_TIMEOUT;
1974 break;
1975 default:
1976 ql_dbg(ql_dbg_user, vha, 0x70bb,
1977 "Command completed with completion status=0x%x "
1978 "thread_id=%d\n", comp_status, thread_id);
1979 rval = EXT_STATUS_ERR;
1980 break;
1981 }
8d2b21db 1982 bsg_job->reply->reply_payload_rcv_len = 0;
a9b6f722
SK
1983
1984done:
1985 /* Return the vendor specific reply to API */
1986 bsg_job->reply->reply_data.vendor_reply.vendor_rsp[0] = rval;
1987 bsg_job->reply_len = sizeof(struct fc_bsg_reply);
1988 /* Always return DID_OK, bsg will send the vendor specific response
1989 * in this case only */
1990 sp->done(vha, sp, (DID_OK << 6));
1991
1992}
1993
1da177e4
LT
1994/**
1995 * qla2x00_status_entry() - Process a Status IOCB entry.
1996 * @ha: SCSI driver HA context
1997 * @pkt: Entry pointer
1998 */
1999static void
73208dfd 2000qla2x00_status_entry(scsi_qla_host_t *vha, struct rsp_que *rsp, void *pkt)
1da177e4 2001{
1da177e4 2002 srb_t *sp;
1da177e4
LT
2003 fc_port_t *fcport;
2004 struct scsi_cmnd *cp;
9a853f71
AV
2005 sts_entry_t *sts;
2006 struct sts_entry_24xx *sts24;
1da177e4
LT
2007 uint16_t comp_status;
2008 uint16_t scsi_status;
b7d2280c 2009 uint16_t ox_id;
1da177e4
LT
2010 uint8_t lscsi_status;
2011 int32_t resid;
5544213b
AV
2012 uint32_t sense_len, par_sense_len, rsp_info_len, resid_len,
2013 fw_resid_len;
9a853f71 2014 uint8_t *rsp_info, *sense_data;
e315cd28 2015 struct qla_hw_data *ha = vha->hw;
2afa19a9
AC
2016 uint32_t handle;
2017 uint16_t que;
2018 struct req_que *req;
b7d2280c 2019 int logit = 1;
9ba56b95 2020 int res = 0;
a9b6f722 2021 uint16_t state_flags = 0;
e05fe292 2022 uint16_t retry_delay = 0;
9a853f71
AV
2023
2024 sts = (sts_entry_t *) pkt;
2025 sts24 = (struct sts_entry_24xx *) pkt;
e428924c 2026 if (IS_FWI2_CAPABLE(ha)) {
9a853f71
AV
2027 comp_status = le16_to_cpu(sts24->comp_status);
2028 scsi_status = le16_to_cpu(sts24->scsi_status) & SS_MASK;
a9b6f722 2029 state_flags = le16_to_cpu(sts24->state_flags);
9a853f71
AV
2030 } else {
2031 comp_status = le16_to_cpu(sts->comp_status);
2032 scsi_status = le16_to_cpu(sts->scsi_status) & SS_MASK;
2033 }
2afa19a9
AC
2034 handle = (uint32_t) LSW(sts->handle);
2035 que = MSW(sts->handle);
2036 req = ha->req_q_map[que];
a9083016 2037
36008cf1
CD
2038 /* Check for invalid queue pointer */
2039 if (req == NULL ||
2040 que >= find_first_zero_bit(ha->req_qid_map, ha->max_req_queues)) {
2041 ql_dbg(ql_dbg_io, vha, 0x3059,
2042 "Invalid status handle (0x%x): Bad req pointer. req=%p, "
2043 "que=%u.\n", sts->handle, req, que);
2044 return;
2045 }
2046
1da177e4 2047 /* Validate handle. */
8d93f550 2048 if (handle < req->num_outstanding_cmds)
2afa19a9 2049 sp = req->outstanding_cmds[handle];
8d93f550 2050 else
1da177e4
LT
2051 sp = NULL;
2052
2053 if (sp == NULL) {
cfb0919c 2054 ql_dbg(ql_dbg_io, vha, 0x3017,
7c3df132 2055 "Invalid status handle (0x%x).\n", sts->handle);
1da177e4 2056
acd3ce88
CD
2057 if (!test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags)) {
2058 if (IS_P3P_TYPE(ha))
2059 set_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags);
2060 else
2061 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
2062 qla2xxx_wake_dpc(vha);
2063 }
1da177e4
LT
2064 return;
2065 }
a9b6f722
SK
2066
2067 if (unlikely((state_flags & BIT_1) && (sp->type == SRB_BIDI_CMD))) {
2068 qla25xx_process_bidir_status_iocb(vha, pkt, req, handle);
2069 return;
2070 }
2071
faef62d1
AB
2072 /* Task Management completion. */
2073 if (sp->type == SRB_TM_CMD) {
2074 qla24xx_tm_iocb_entry(vha, req, pkt);
2075 return;
2076 }
2077
a9b6f722
SK
2078 /* Fast path completion. */
2079 if (comp_status == CS_COMPLETE && scsi_status == 0) {
2080 qla2x00_process_completed_request(vha, req, handle);
2081
2082 return;
2083 }
2084
2085 req->outstanding_cmds[handle] = NULL;
9ba56b95 2086 cp = GET_CMD_SP(sp);
1da177e4 2087 if (cp == NULL) {
cfb0919c 2088 ql_dbg(ql_dbg_io, vha, 0x3018,
7c3df132
SK
2089 "Command already returned (0x%x/%p).\n",
2090 sts->handle, sp);
1da177e4
LT
2091
2092 return;
2093 }
2094
8ae6d9c7 2095 lscsi_status = scsi_status & STATUS_MASK;
1da177e4 2096
bdf79621 2097 fcport = sp->fcport;
1da177e4 2098
b7d2280c 2099 ox_id = 0;
5544213b
AV
2100 sense_len = par_sense_len = rsp_info_len = resid_len =
2101 fw_resid_len = 0;
e428924c 2102 if (IS_FWI2_CAPABLE(ha)) {
0f00a206
LC
2103 if (scsi_status & SS_SENSE_LEN_VALID)
2104 sense_len = le32_to_cpu(sts24->sense_len);
2105 if (scsi_status & SS_RESPONSE_INFO_LEN_VALID)
2106 rsp_info_len = le32_to_cpu(sts24->rsp_data_len);
2107 if (scsi_status & (SS_RESIDUAL_UNDER | SS_RESIDUAL_OVER))
2108 resid_len = le32_to_cpu(sts24->rsp_residual_count);
2109 if (comp_status == CS_DATA_UNDERRUN)
2110 fw_resid_len = le32_to_cpu(sts24->residual_len);
9a853f71
AV
2111 rsp_info = sts24->data;
2112 sense_data = sts24->data;
2113 host_to_fcp_swap(sts24->data, sizeof(sts24->data));
b7d2280c 2114 ox_id = le16_to_cpu(sts24->ox_id);
5544213b 2115 par_sense_len = sizeof(sts24->data);
e05fe292
CD
2116 /* Valid values of the retry delay timer are 0x1-0xffef */
2117 if (sts24->retry_delay > 0 && sts24->retry_delay < 0xfff1)
2118 retry_delay = sts24->retry_delay;
9a853f71 2119 } else {
0f00a206
LC
2120 if (scsi_status & SS_SENSE_LEN_VALID)
2121 sense_len = le16_to_cpu(sts->req_sense_length);
2122 if (scsi_status & SS_RESPONSE_INFO_LEN_VALID)
2123 rsp_info_len = le16_to_cpu(sts->rsp_info_len);
9a853f71
AV
2124 resid_len = le32_to_cpu(sts->residual_length);
2125 rsp_info = sts->rsp_info;
2126 sense_data = sts->req_sense_data;
5544213b 2127 par_sense_len = sizeof(sts->req_sense_data);
9a853f71
AV
2128 }
2129
1da177e4
LT
2130 /* Check for any FCP transport errors. */
2131 if (scsi_status & SS_RESPONSE_INFO_LEN_VALID) {
9a853f71 2132 /* Sense data lies beyond any FCP RESPONSE data. */
5544213b 2133 if (IS_FWI2_CAPABLE(ha)) {
9a853f71 2134 sense_data += rsp_info_len;
5544213b
AV
2135 par_sense_len -= rsp_info_len;
2136 }
9a853f71 2137 if (rsp_info_len > 3 && rsp_info[3]) {
5e19ed90 2138 ql_dbg(ql_dbg_io, fcport->vha, 0x3019,
7c3df132
SK
2139 "FCP I/O protocol failure (0x%x/0x%x).\n",
2140 rsp_info_len, rsp_info[3]);
1da177e4 2141
9ba56b95 2142 res = DID_BUS_BUSY << 16;
b7d2280c 2143 goto out;
1da177e4
LT
2144 }
2145 }
2146
3e8ce320
AV
2147 /* Check for overrun. */
2148 if (IS_FWI2_CAPABLE(ha) && comp_status == CS_COMPLETE &&
2149 scsi_status & SS_RESIDUAL_OVER)
2150 comp_status = CS_DATA_OVERRUN;
2151
e05fe292
CD
2152 /*
2153 * Check retry_delay_timer value if we receive a busy or
2154 * queue full.
2155 */
2156 if (lscsi_status == SAM_STAT_TASK_SET_FULL ||
2157 lscsi_status == SAM_STAT_BUSY)
2158 qla2x00_set_retry_delay_timestamp(fcport, retry_delay);
2159
1da177e4
LT
2160 /*
2161 * Based on Host and scsi status generate status code for Linux
2162 */
2163 switch (comp_status) {
2164 case CS_COMPLETE:
df7baa50 2165 case CS_QUEUE_FULL:
1da177e4 2166 if (scsi_status == 0) {
9ba56b95 2167 res = DID_OK << 16;
1da177e4
LT
2168 break;
2169 }
2170 if (scsi_status & (SS_RESIDUAL_UNDER | SS_RESIDUAL_OVER)) {
9a853f71 2171 resid = resid_len;
385d70b4 2172 scsi_set_resid(cp, resid);
0da69df1
AV
2173
2174 if (!lscsi_status &&
385d70b4 2175 ((unsigned)(scsi_bufflen(cp) - resid) <
0da69df1 2176 cp->underflow)) {
5e19ed90 2177 ql_dbg(ql_dbg_io, fcport->vha, 0x301a,
7c3df132 2178 "Mid-layer underflow "
b7d2280c 2179 "detected (0x%x of 0x%x bytes).\n",
7c3df132 2180 resid, scsi_bufflen(cp));
0da69df1 2181
9ba56b95 2182 res = DID_ERROR << 16;
0da69df1
AV
2183 break;
2184 }
1da177e4 2185 }
9ba56b95 2186 res = DID_OK << 16 | lscsi_status;
1da177e4 2187
df7baa50 2188 if (lscsi_status == SAM_STAT_TASK_SET_FULL) {
5e19ed90 2189 ql_dbg(ql_dbg_io, fcport->vha, 0x301b,
7c3df132 2190 "QUEUE FULL detected.\n");
df7baa50
AV
2191 break;
2192 }
b7d2280c 2193 logit = 0;
1da177e4
LT
2194 if (lscsi_status != SS_CHECK_CONDITION)
2195 break;
2196
b80ca4f7 2197 memset(cp->sense_buffer, 0, SCSI_SENSE_BUFFERSIZE);
1da177e4
LT
2198 if (!(scsi_status & SS_SENSE_LEN_VALID))
2199 break;
2200
5544213b 2201 qla2x00_handle_sense(sp, sense_data, par_sense_len, sense_len,
9ba56b95 2202 rsp, res);
1da177e4
LT
2203 break;
2204
2205 case CS_DATA_UNDERRUN:
ed17c71b 2206 /* Use F/W calculated residual length. */
0f00a206
LC
2207 resid = IS_FWI2_CAPABLE(ha) ? fw_resid_len : resid_len;
2208 scsi_set_resid(cp, resid);
2209 if (scsi_status & SS_RESIDUAL_UNDER) {
2210 if (IS_FWI2_CAPABLE(ha) && fw_resid_len != resid_len) {
5e19ed90 2211 ql_dbg(ql_dbg_io, fcport->vha, 0x301d,
7c3df132
SK
2212 "Dropped frame(s) detected "
2213 "(0x%x of 0x%x bytes).\n",
2214 resid, scsi_bufflen(cp));
0f00a206 2215
9ba56b95 2216 res = DID_ERROR << 16 | lscsi_status;
4e85e3d9 2217 goto check_scsi_status;
6acf8190 2218 }
ed17c71b 2219
0f00a206
LC
2220 if (!lscsi_status &&
2221 ((unsigned)(scsi_bufflen(cp) - resid) <
2222 cp->underflow)) {
5e19ed90 2223 ql_dbg(ql_dbg_io, fcport->vha, 0x301e,
7c3df132 2224 "Mid-layer underflow "
b7d2280c 2225 "detected (0x%x of 0x%x bytes).\n",
7c3df132 2226 resid, scsi_bufflen(cp));
e038a1be 2227
9ba56b95 2228 res = DID_ERROR << 16;
0f00a206
LC
2229 break;
2230 }
4aee5766
GM
2231 } else if (lscsi_status != SAM_STAT_TASK_SET_FULL &&
2232 lscsi_status != SAM_STAT_BUSY) {
2233 /*
2234 * scsi status of task set and busy are considered to be
2235 * task not completed.
2236 */
2237
5e19ed90 2238 ql_dbg(ql_dbg_io, fcport->vha, 0x301f,
7c3df132 2239 "Dropped frame(s) detected (0x%x "
4aee5766
GM
2240 "of 0x%x bytes).\n", resid,
2241 scsi_bufflen(cp));
0f00a206 2242
9ba56b95 2243 res = DID_ERROR << 16 | lscsi_status;
0374f55e 2244 goto check_scsi_status;
4aee5766
GM
2245 } else {
2246 ql_dbg(ql_dbg_io, fcport->vha, 0x3030,
2247 "scsi_status: 0x%x, lscsi_status: 0x%x\n",
2248 scsi_status, lscsi_status);
1da177e4
LT
2249 }
2250
9ba56b95 2251 res = DID_OK << 16 | lscsi_status;
b7d2280c 2252 logit = 0;
0f00a206 2253
0374f55e 2254check_scsi_status:
1da177e4 2255 /*
fa2a1ce5 2256 * Check to see if SCSI Status is non zero. If so report SCSI
1da177e4
LT
2257 * Status.
2258 */
2259 if (lscsi_status != 0) {
ffec28a3 2260 if (lscsi_status == SAM_STAT_TASK_SET_FULL) {
5e19ed90 2261 ql_dbg(ql_dbg_io, fcport->vha, 0x3020,
7c3df132 2262 "QUEUE FULL detected.\n");
b7d2280c 2263 logit = 1;
ffec28a3
AV
2264 break;
2265 }
1da177e4
LT
2266 if (lscsi_status != SS_CHECK_CONDITION)
2267 break;
2268
b80ca4f7 2269 memset(cp->sense_buffer, 0, SCSI_SENSE_BUFFERSIZE);
1da177e4
LT
2270 if (!(scsi_status & SS_SENSE_LEN_VALID))
2271 break;
2272
5544213b 2273 qla2x00_handle_sense(sp, sense_data, par_sense_len,
9ba56b95 2274 sense_len, rsp, res);
1da177e4
LT
2275 }
2276 break;
2277
1da177e4
LT
2278 case CS_PORT_LOGGED_OUT:
2279 case CS_PORT_CONFIG_CHG:
2280 case CS_PORT_BUSY:
2281 case CS_INCOMPLETE:
2282 case CS_PORT_UNAVAILABLE:
b7d2280c 2283 case CS_TIMEOUT:
ff454b01
CD
2284 case CS_RESET:
2285
056a4483
MC
2286 /*
2287 * We are going to have the fc class block the rport
2288 * while we try to recover so instruct the mid layer
2289 * to requeue until the class decides how to handle this.
2290 */
9ba56b95 2291 res = DID_TRANSPORT_DISRUPTED << 16;
b7d2280c
AV
2292
2293 if (comp_status == CS_TIMEOUT) {
2294 if (IS_FWI2_CAPABLE(ha))
2295 break;
2296 else if ((le16_to_cpu(sts->status_flags) &
2297 SF_LOGOUT_SENT) == 0)
2298 break;
2299 }
2300
5e19ed90 2301 ql_dbg(ql_dbg_io, fcport->vha, 0x3021,
0e948975
CD
2302 "Port to be marked lost on fcport=%02x%02x%02x, current "
2303 "port state= %s.\n", fcport->d_id.b.domain,
2304 fcport->d_id.b.area, fcport->d_id.b.al_pa,
2305 port_state_str[atomic_read(&fcport->state)]);
b7d2280c 2306
a7a28504 2307 if (atomic_read(&fcport->state) == FCS_ONLINE)
e315cd28 2308 qla2x00_mark_device_lost(fcport->vha, fcport, 1, 1);
1da177e4
LT
2309 break;
2310
1da177e4 2311 case CS_ABORTED:
9ba56b95 2312 res = DID_RESET << 16;
1da177e4 2313 break;
bad75002
AE
2314
2315 case CS_DIF_ERROR:
8cb2049c 2316 logit = qla2x00_handle_dif_error(sp, sts24);
fb6e4668 2317 res = cp->result;
bad75002 2318 break;
9e522cd8
AE
2319
2320 case CS_TRANSPORT:
2321 res = DID_ERROR << 16;
2322
2323 if (!IS_PI_SPLIT_DET_CAPABLE(ha))
2324 break;
2325
2326 if (state_flags & BIT_4)
2327 scmd_printk(KERN_WARNING, cp,
2328 "Unsupported device '%s' found.\n",
2329 cp->device->vendor);
2330 break;
2331
1da177e4 2332 default:
9ba56b95 2333 res = DID_ERROR << 16;
1da177e4
LT
2334 break;
2335 }
2336
b7d2280c
AV
2337out:
2338 if (logit)
5e19ed90 2339 ql_dbg(ql_dbg_io, fcport->vha, 0x3022,
9cb78c16 2340 "FCP command status: 0x%x-0x%x (0x%x) nexus=%ld:%d:%llu "
7b833558 2341 "portid=%02x%02x%02x oxid=0x%x cdb=%10phN len=0x%x "
7c3df132 2342 "rsp_info=0x%x resid=0x%x fw_resid=0x%x.\n",
9ba56b95 2343 comp_status, scsi_status, res, vha->host_no,
cfb0919c
CD
2344 cp->device->id, cp->device->lun, fcport->d_id.b.domain,
2345 fcport->d_id.b.area, fcport->d_id.b.al_pa, ox_id,
7b833558 2346 cp->cmnd, scsi_bufflen(cp), rsp_info_len,
7c3df132 2347 resid_len, fw_resid_len);
b7d2280c 2348
2afa19a9 2349 if (rsp->status_srb == NULL)
9ba56b95 2350 sp->done(ha, sp, res);
1da177e4
LT
2351}
2352
2353/**
2354 * qla2x00_status_cont_entry() - Process a Status Continuations entry.
2355 * @ha: SCSI driver HA context
2356 * @pkt: Entry pointer
2357 *
2358 * Extended sense data.
2359 */
2360static void
2afa19a9 2361qla2x00_status_cont_entry(struct rsp_que *rsp, sts_cont_entry_t *pkt)
1da177e4 2362{
9ba56b95 2363 uint8_t sense_sz = 0;
2afa19a9 2364 struct qla_hw_data *ha = rsp->hw;
7c3df132 2365 struct scsi_qla_host *vha = pci_get_drvdata(ha->pdev);
9ba56b95 2366 srb_t *sp = rsp->status_srb;
1da177e4 2367 struct scsi_cmnd *cp;
9ba56b95
GM
2368 uint32_t sense_len;
2369 uint8_t *sense_ptr;
1da177e4 2370
9ba56b95
GM
2371 if (!sp || !GET_CMD_SENSE_LEN(sp))
2372 return;
1da177e4 2373
9ba56b95
GM
2374 sense_len = GET_CMD_SENSE_LEN(sp);
2375 sense_ptr = GET_CMD_SENSE_PTR(sp);
1da177e4 2376
9ba56b95
GM
2377 cp = GET_CMD_SP(sp);
2378 if (cp == NULL) {
2379 ql_log(ql_log_warn, vha, 0x3025,
2380 "cmd is NULL: already returned to OS (sp=%p).\n", sp);
1da177e4 2381
9ba56b95
GM
2382 rsp->status_srb = NULL;
2383 return;
1da177e4 2384 }
1da177e4 2385
9ba56b95
GM
2386 if (sense_len > sizeof(pkt->data))
2387 sense_sz = sizeof(pkt->data);
2388 else
2389 sense_sz = sense_len;
c4631191 2390
9ba56b95
GM
2391 /* Move sense data. */
2392 if (IS_FWI2_CAPABLE(ha))
2393 host_to_fcp_swap(pkt->data, sizeof(pkt->data));
2394 memcpy(sense_ptr, pkt->data, sense_sz);
2395 ql_dump_buffer(ql_dbg_io + ql_dbg_buffer, vha, 0x302c,
2396 sense_ptr, sense_sz);
c4631191 2397
9ba56b95
GM
2398 sense_len -= sense_sz;
2399 sense_ptr += sense_sz;
c4631191 2400
9ba56b95
GM
2401 SET_CMD_SENSE_PTR(sp, sense_ptr);
2402 SET_CMD_SENSE_LEN(sp, sense_len);
2403
2404 /* Place command on done queue. */
2405 if (sense_len == 0) {
2406 rsp->status_srb = NULL;
2407 sp->done(ha, sp, cp->result);
c4631191 2408 }
c4631191
GM
2409}
2410
1da177e4
LT
2411/**
2412 * qla2x00_error_entry() - Process an error entry.
2413 * @ha: SCSI driver HA context
2414 * @pkt: Entry pointer
2415 */
2416static void
73208dfd 2417qla2x00_error_entry(scsi_qla_host_t *vha, struct rsp_que *rsp, sts_entry_t *pkt)
1da177e4
LT
2418{
2419 srb_t *sp;
e315cd28 2420 struct qla_hw_data *ha = vha->hw;
c4631191 2421 const char func[] = "ERROR-IOCB";
2afa19a9 2422 uint16_t que = MSW(pkt->handle);
a6fe35c0 2423 struct req_que *req = NULL;
9ba56b95 2424 int res = DID_ERROR << 16;
7c3df132 2425
9ba56b95
GM
2426 ql_dbg(ql_dbg_async, vha, 0x502a,
2427 "type of error status in response: 0x%x\n", pkt->entry_status);
2428
a6fe35c0
AE
2429 if (que >= ha->max_req_queues || !ha->req_q_map[que])
2430 goto fatal;
2431
2432 req = ha->req_q_map[que];
2433
9ba56b95
GM
2434 if (pkt->entry_status & RF_BUSY)
2435 res = DID_BUS_BUSY << 16;
1da177e4 2436
c4631191 2437 sp = qla2x00_get_sp_from_handle(vha, func, req, pkt);
a6fe35c0 2438 if (sp) {
9ba56b95 2439 sp->done(ha, sp, res);
a6fe35c0 2440 return;
1da177e4 2441 }
a6fe35c0
AE
2442fatal:
2443 ql_log(ql_log_warn, vha, 0x5030,
2444 "Error entry - invalid handle/queue.\n");
2445
7ec0effd 2446 if (IS_P3P_TYPE(ha))
a6fe35c0
AE
2447 set_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags);
2448 else
2449 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
2450 qla2xxx_wake_dpc(vha);
1da177e4
LT
2451}
2452
9a853f71
AV
2453/**
2454 * qla24xx_mbx_completion() - Process mailbox command completions.
2455 * @ha: SCSI driver HA context
2456 * @mb0: Mailbox0 register
2457 */
2458static void
e315cd28 2459qla24xx_mbx_completion(scsi_qla_host_t *vha, uint16_t mb0)
9a853f71
AV
2460{
2461 uint16_t cnt;
4fa94f83 2462 uint32_t mboxes;
9a853f71 2463 uint16_t __iomem *wptr;
e315cd28 2464 struct qla_hw_data *ha = vha->hw;
9a853f71
AV
2465 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
2466
4fa94f83
AV
2467 /* Read all mbox registers? */
2468 mboxes = (1 << ha->mbx_count) - 1;
2469 if (!ha->mcp)
a720101d 2470 ql_dbg(ql_dbg_async, vha, 0x504e, "MBX pointer ERROR.\n");
4fa94f83
AV
2471 else
2472 mboxes = ha->mcp->in_mb;
2473
9a853f71
AV
2474 /* Load return mailbox registers. */
2475 ha->flags.mbox_int = 1;
2476 ha->mailbox_out[0] = mb0;
4fa94f83 2477 mboxes >>= 1;
9a853f71
AV
2478 wptr = (uint16_t __iomem *)&reg->mailbox1;
2479
2480 for (cnt = 1; cnt < ha->mbx_count; cnt++) {
4fa94f83
AV
2481 if (mboxes & BIT_0)
2482 ha->mailbox_out[cnt] = RD_REG_WORD(wptr);
2483
2484 mboxes >>= 1;
9a853f71
AV
2485 wptr++;
2486 }
9a853f71
AV
2487}
2488
4440e46d
AB
2489static void
2490qla24xx_abort_iocb_entry(scsi_qla_host_t *vha, struct req_que *req,
2491 struct abort_entry_24xx *pkt)
2492{
2493 const char func[] = "ABT_IOCB";
2494 srb_t *sp;
2495 struct srb_iocb *abt;
2496
2497 sp = qla2x00_get_sp_from_handle(vha, func, req, pkt);
2498 if (!sp)
2499 return;
2500
2501 abt = &sp->u.iocb_cmd;
2502 abt->u.abt.comp_status = le32_to_cpu(pkt->nport_handle);
2503 sp->done(vha, sp, 0);
2504}
2505
9a853f71
AV
2506/**
2507 * qla24xx_process_response_queue() - Process response queue entries.
2508 * @ha: SCSI driver HA context
2509 */
2afa19a9
AC
2510void qla24xx_process_response_queue(struct scsi_qla_host *vha,
2511 struct rsp_que *rsp)
9a853f71 2512{
9a853f71 2513 struct sts_entry_24xx *pkt;
a9083016 2514 struct qla_hw_data *ha = vha->hw;
9a853f71 2515
e315cd28 2516 if (!vha->flags.online)
9a853f71
AV
2517 return;
2518
e315cd28
AC
2519 while (rsp->ring_ptr->signature != RESPONSE_PROCESSED) {
2520 pkt = (struct sts_entry_24xx *)rsp->ring_ptr;
9a853f71 2521
e315cd28
AC
2522 rsp->ring_index++;
2523 if (rsp->ring_index == rsp->length) {
2524 rsp->ring_index = 0;
2525 rsp->ring_ptr = rsp->ring;
9a853f71 2526 } else {
e315cd28 2527 rsp->ring_ptr++;
9a853f71
AV
2528 }
2529
2530 if (pkt->entry_status != 0) {
73208dfd 2531 qla2x00_error_entry(vha, rsp, (sts_entry_t *) pkt);
2d70c103 2532
f83adb61
QT
2533 if (qlt_24xx_process_response_error(vha, pkt))
2534 goto process_err;
2d70c103 2535
9a853f71
AV
2536 ((response_t *)pkt)->signature = RESPONSE_PROCESSED;
2537 wmb();
2538 continue;
2539 }
f83adb61 2540process_err:
9a853f71
AV
2541
2542 switch (pkt->entry_type) {
2543 case STATUS_TYPE:
73208dfd 2544 qla2x00_status_entry(vha, rsp, pkt);
9a853f71
AV
2545 break;
2546 case STATUS_CONT_TYPE:
2afa19a9 2547 qla2x00_status_cont_entry(rsp, (sts_cont_entry_t *)pkt);
9a853f71 2548 break;
2c3dfe3f 2549 case VP_RPT_ID_IOCB_TYPE:
e315cd28 2550 qla24xx_report_id_acquisition(vha,
2c3dfe3f
SJ
2551 (struct vp_rpt_id_entry_24xx *)pkt);
2552 break;
ac280b67
AV
2553 case LOGINOUT_PORT_IOCB_TYPE:
2554 qla24xx_logio_entry(vha, rsp->req,
2555 (struct logio_entry_24xx *)pkt);
2556 break;
f83adb61 2557 case CT_IOCB_TYPE:
9a069e19 2558 qla24xx_els_ct_entry(vha, rsp->req, pkt, CT_IOCB_TYPE);
9a069e19 2559 break;
f83adb61 2560 case ELS_IOCB_TYPE:
9a069e19
GM
2561 qla24xx_els_ct_entry(vha, rsp->req, pkt, ELS_IOCB_TYPE);
2562 break;
2d70c103
NB
2563 case ABTS_RECV_24XX:
2564 /* ensure that the ATIO queue is empty */
2565 qlt_24xx_process_atio_queue(vha);
2566 case ABTS_RESP_24XX:
2567 case CTIO_TYPE7:
2568 case NOTIFY_ACK_TYPE:
f83adb61 2569 case CTIO_CRC2:
2d70c103
NB
2570 qlt_response_pkt_all_vps(vha, (response_t *)pkt);
2571 break;
54883291
SK
2572 case MARKER_TYPE:
2573 /* Do nothing in this case, this check is to prevent it
2574 * from falling into default case
2575 */
2576 break;
4440e46d
AB
2577 case ABORT_IOCB_TYPE:
2578 qla24xx_abort_iocb_entry(vha, rsp->req,
2579 (struct abort_entry_24xx *)pkt);
2580 break;
9a853f71
AV
2581 default:
2582 /* Type Not Supported. */
7c3df132
SK
2583 ql_dbg(ql_dbg_async, vha, 0x5042,
2584 "Received unknown response pkt type %x "
9a853f71 2585 "entry status=%x.\n",
7c3df132 2586 pkt->entry_type, pkt->entry_status);
9a853f71
AV
2587 break;
2588 }
2589 ((response_t *)pkt)->signature = RESPONSE_PROCESSED;
2590 wmb();
2591 }
2592
2593 /* Adjust ring index */
7ec0effd 2594 if (IS_P3P_TYPE(ha)) {
a9083016
GM
2595 struct device_reg_82xx __iomem *reg = &ha->iobase->isp82;
2596 WRT_REG_DWORD(&reg->rsp_q_out[0], rsp->ring_index);
2597 } else
2598 WRT_REG_DWORD(rsp->rsp_q_out, rsp->ring_index);
9a853f71
AV
2599}
2600
05236a05 2601static void
e315cd28 2602qla2xxx_check_risc_status(scsi_qla_host_t *vha)
05236a05
AV
2603{
2604 int rval;
2605 uint32_t cnt;
e315cd28 2606 struct qla_hw_data *ha = vha->hw;
05236a05
AV
2607 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
2608
f73cb695
CD
2609 if (!IS_QLA25XX(ha) && !IS_QLA81XX(ha) && !IS_QLA83XX(ha) &&
2610 !IS_QLA27XX(ha))
05236a05
AV
2611 return;
2612
2613 rval = QLA_SUCCESS;
2614 WRT_REG_DWORD(&reg->iobase_addr, 0x7C00);
2615 RD_REG_DWORD(&reg->iobase_addr);
2616 WRT_REG_DWORD(&reg->iobase_window, 0x0001);
2617 for (cnt = 10000; (RD_REG_DWORD(&reg->iobase_window) & BIT_0) == 0 &&
2618 rval == QLA_SUCCESS; cnt--) {
2619 if (cnt) {
2620 WRT_REG_DWORD(&reg->iobase_window, 0x0001);
2621 udelay(10);
2622 } else
2623 rval = QLA_FUNCTION_TIMEOUT;
2624 }
2625 if (rval == QLA_SUCCESS)
2626 goto next_test;
2627
b2ec76c5 2628 rval = QLA_SUCCESS;
05236a05
AV
2629 WRT_REG_DWORD(&reg->iobase_window, 0x0003);
2630 for (cnt = 100; (RD_REG_DWORD(&reg->iobase_window) & BIT_0) == 0 &&
2631 rval == QLA_SUCCESS; cnt--) {
2632 if (cnt) {
2633 WRT_REG_DWORD(&reg->iobase_window, 0x0003);
2634 udelay(10);
2635 } else
2636 rval = QLA_FUNCTION_TIMEOUT;
2637 }
2638 if (rval != QLA_SUCCESS)
2639 goto done;
2640
2641next_test:
2642 if (RD_REG_DWORD(&reg->iobase_c8) & BIT_3)
7c3df132
SK
2643 ql_log(ql_log_info, vha, 0x504c,
2644 "Additional code -- 0x55AA.\n");
05236a05
AV
2645
2646done:
2647 WRT_REG_DWORD(&reg->iobase_window, 0x0000);
2648 RD_REG_DWORD(&reg->iobase_window);
2649}
2650
9a853f71 2651/**
6246b8a1 2652 * qla24xx_intr_handler() - Process interrupts for the ISP23xx and ISP24xx.
9a853f71
AV
2653 * @irq:
2654 * @dev_id: SCSI driver HA context
9a853f71
AV
2655 *
2656 * Called by system whenever the host adapter generates an interrupt.
2657 *
2658 * Returns handled flag.
2659 */
2660irqreturn_t
7d12e780 2661qla24xx_intr_handler(int irq, void *dev_id)
9a853f71 2662{
e315cd28
AC
2663 scsi_qla_host_t *vha;
2664 struct qla_hw_data *ha;
9a853f71
AV
2665 struct device_reg_24xx __iomem *reg;
2666 int status;
9a853f71
AV
2667 unsigned long iter;
2668 uint32_t stat;
2669 uint32_t hccr;
7d613ac6 2670 uint16_t mb[8];
e315cd28 2671 struct rsp_que *rsp;
43fac4d9 2672 unsigned long flags;
9a853f71 2673
e315cd28
AC
2674 rsp = (struct rsp_que *) dev_id;
2675 if (!rsp) {
3256b435
CD
2676 ql_log(ql_log_info, NULL, 0x5059,
2677 "%s: NULL response queue pointer.\n", __func__);
9a853f71
AV
2678 return IRQ_NONE;
2679 }
2680
e315cd28 2681 ha = rsp->hw;
9a853f71
AV
2682 reg = &ha->iobase->isp24;
2683 status = 0;
2684
85880801
AV
2685 if (unlikely(pci_channel_offline(ha->pdev)))
2686 return IRQ_HANDLED;
2687
43fac4d9 2688 spin_lock_irqsave(&ha->hardware_lock, flags);
2afa19a9 2689 vha = pci_get_drvdata(ha->pdev);
9a853f71
AV
2690 for (iter = 50; iter--; ) {
2691 stat = RD_REG_DWORD(&reg->host_status);
c821e0d5 2692 if (qla2x00_check_reg32_for_disconnect(vha, stat))
f3ddac19 2693 break;
9a853f71 2694 if (stat & HSRX_RISC_PAUSED) {
85880801 2695 if (unlikely(pci_channel_offline(ha->pdev)))
14e660e6
SJ
2696 break;
2697
9a853f71
AV
2698 hccr = RD_REG_DWORD(&reg->hccr);
2699
7c3df132
SK
2700 ql_log(ql_log_warn, vha, 0x504b,
2701 "RISC paused -- HCCR=%x, Dumping firmware.\n",
2702 hccr);
05236a05 2703
e315cd28 2704 qla2xxx_check_risc_status(vha);
05236a05 2705
e315cd28
AC
2706 ha->isp_ops->fw_dump(vha, 1);
2707 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
9a853f71
AV
2708 break;
2709 } else if ((stat & HSRX_RISC_INT) == 0)
2710 break;
2711
2712 switch (stat & 0xff) {
fafbda9f
AE
2713 case INTR_ROM_MB_SUCCESS:
2714 case INTR_ROM_MB_FAILED:
2715 case INTR_MB_SUCCESS:
2716 case INTR_MB_FAILED:
e315cd28 2717 qla24xx_mbx_completion(vha, MSW(stat));
9a853f71
AV
2718 status |= MBX_INTERRUPT;
2719
2720 break;
fafbda9f 2721 case INTR_ASYNC_EVENT:
9a853f71
AV
2722 mb[0] = MSW(stat);
2723 mb[1] = RD_REG_WORD(&reg->mailbox1);
2724 mb[2] = RD_REG_WORD(&reg->mailbox2);
2725 mb[3] = RD_REG_WORD(&reg->mailbox3);
73208dfd 2726 qla2x00_async_event(vha, rsp, mb);
9a853f71 2727 break;
fafbda9f
AE
2728 case INTR_RSP_QUE_UPDATE:
2729 case INTR_RSP_QUE_UPDATE_83XX:
2afa19a9 2730 qla24xx_process_response_queue(vha, rsp);
9a853f71 2731 break;
fafbda9f 2732 case INTR_ATIO_QUE_UPDATE:
2d70c103
NB
2733 qlt_24xx_process_atio_queue(vha);
2734 break;
fafbda9f 2735 case INTR_ATIO_RSP_QUE_UPDATE:
2d70c103
NB
2736 qlt_24xx_process_atio_queue(vha);
2737 qla24xx_process_response_queue(vha, rsp);
2738 break;
9a853f71 2739 default:
7c3df132
SK
2740 ql_dbg(ql_dbg_async, vha, 0x504f,
2741 "Unrecognized interrupt type (%d).\n", stat * 0xff);
9a853f71
AV
2742 break;
2743 }
2744 WRT_REG_DWORD(&reg->hccr, HCCRX_CLR_RISC_INT);
2745 RD_REG_DWORD_RELAXED(&reg->hccr);
cb860bbd
GM
2746 if (unlikely(IS_QLA83XX(ha) && (ha->pdev->revision == 1)))
2747 ndelay(3500);
9a853f71 2748 }
36439832 2749 qla2x00_handle_mbx_completion(ha, status);
43fac4d9 2750 spin_unlock_irqrestore(&ha->hardware_lock, flags);
9a853f71 2751
9a853f71
AV
2752 return IRQ_HANDLED;
2753}
2754
a8488abe
AV
2755static irqreturn_t
2756qla24xx_msix_rsp_q(int irq, void *dev_id)
2757{
e315cd28
AC
2758 struct qla_hw_data *ha;
2759 struct rsp_que *rsp;
a8488abe 2760 struct device_reg_24xx __iomem *reg;
2afa19a9 2761 struct scsi_qla_host *vha;
0f19bc68 2762 unsigned long flags;
f3ddac19 2763 uint32_t stat = 0;
a8488abe 2764
e315cd28
AC
2765 rsp = (struct rsp_que *) dev_id;
2766 if (!rsp) {
3256b435
CD
2767 ql_log(ql_log_info, NULL, 0x505a,
2768 "%s: NULL response queue pointer.\n", __func__);
e315cd28
AC
2769 return IRQ_NONE;
2770 }
2771 ha = rsp->hw;
a8488abe
AV
2772 reg = &ha->iobase->isp24;
2773
0f19bc68 2774 spin_lock_irqsave(&ha->hardware_lock, flags);
a8488abe 2775
a67093d4 2776 vha = pci_get_drvdata(ha->pdev);
f3ddac19
CD
2777 /*
2778 * Use host_status register to check to PCI disconnection before we
2779 * we process the response queue.
2780 */
2781 stat = RD_REG_DWORD(&reg->host_status);
c821e0d5 2782 if (qla2x00_check_reg32_for_disconnect(vha, stat))
f3ddac19 2783 goto out;
2afa19a9 2784 qla24xx_process_response_queue(vha, rsp);
3155754a 2785 if (!ha->flags.disable_msix_handshake) {
eb94114b
AC
2786 WRT_REG_DWORD(&reg->hccr, HCCRX_CLR_RISC_INT);
2787 RD_REG_DWORD_RELAXED(&reg->hccr);
2788 }
f3ddac19 2789out:
0f19bc68 2790 spin_unlock_irqrestore(&ha->hardware_lock, flags);
a8488abe
AV
2791
2792 return IRQ_HANDLED;
2793}
2794
68ca949c
AC
2795static irqreturn_t
2796qla25xx_msix_rsp_q(int irq, void *dev_id)
2797{
2798 struct qla_hw_data *ha;
f3ddac19 2799 scsi_qla_host_t *vha;
68ca949c 2800 struct rsp_que *rsp;
3155754a 2801 struct device_reg_24xx __iomem *reg;
0f19bc68 2802 unsigned long flags;
f3ddac19 2803 uint32_t hccr = 0;
68ca949c
AC
2804
2805 rsp = (struct rsp_que *) dev_id;
2806 if (!rsp) {
3256b435
CD
2807 ql_log(ql_log_info, NULL, 0x505b,
2808 "%s: NULL response queue pointer.\n", __func__);
68ca949c
AC
2809 return IRQ_NONE;
2810 }
2811 ha = rsp->hw;
f3ddac19 2812 vha = pci_get_drvdata(ha->pdev);
68ca949c 2813
3155754a 2814 /* Clear the interrupt, if enabled, for this response queue */
d424754c 2815 if (!ha->flags.disable_msix_handshake) {
3155754a 2816 reg = &ha->iobase->isp24;
0f19bc68 2817 spin_lock_irqsave(&ha->hardware_lock, flags);
3155754a 2818 WRT_REG_DWORD(&reg->hccr, HCCRX_CLR_RISC_INT);
f3ddac19 2819 hccr = RD_REG_DWORD_RELAXED(&reg->hccr);
0f19bc68 2820 spin_unlock_irqrestore(&ha->hardware_lock, flags);
3155754a 2821 }
c821e0d5 2822 if (qla2x00_check_reg32_for_disconnect(vha, hccr))
f3ddac19 2823 goto out;
68ca949c
AC
2824 queue_work_on((int) (rsp->id - 1), ha->wq, &rsp->q_work);
2825
f3ddac19 2826out:
68ca949c
AC
2827 return IRQ_HANDLED;
2828}
2829
a8488abe
AV
2830static irqreturn_t
2831qla24xx_msix_default(int irq, void *dev_id)
2832{
e315cd28
AC
2833 scsi_qla_host_t *vha;
2834 struct qla_hw_data *ha;
2835 struct rsp_que *rsp;
a8488abe
AV
2836 struct device_reg_24xx __iomem *reg;
2837 int status;
a8488abe
AV
2838 uint32_t stat;
2839 uint32_t hccr;
7d613ac6 2840 uint16_t mb[8];
0f19bc68 2841 unsigned long flags;
a8488abe 2842
e315cd28
AC
2843 rsp = (struct rsp_que *) dev_id;
2844 if (!rsp) {
3256b435
CD
2845 ql_log(ql_log_info, NULL, 0x505c,
2846 "%s: NULL response queue pointer.\n", __func__);
e315cd28
AC
2847 return IRQ_NONE;
2848 }
2849 ha = rsp->hw;
a8488abe
AV
2850 reg = &ha->iobase->isp24;
2851 status = 0;
2852
0f19bc68 2853 spin_lock_irqsave(&ha->hardware_lock, flags);
2afa19a9 2854 vha = pci_get_drvdata(ha->pdev);
87f27015 2855 do {
a8488abe 2856 stat = RD_REG_DWORD(&reg->host_status);
c821e0d5 2857 if (qla2x00_check_reg32_for_disconnect(vha, stat))
f3ddac19 2858 break;
a8488abe 2859 if (stat & HSRX_RISC_PAUSED) {
85880801 2860 if (unlikely(pci_channel_offline(ha->pdev)))
14e660e6
SJ
2861 break;
2862
a8488abe
AV
2863 hccr = RD_REG_DWORD(&reg->hccr);
2864
7c3df132
SK
2865 ql_log(ql_log_info, vha, 0x5050,
2866 "RISC paused -- HCCR=%x, Dumping firmware.\n",
2867 hccr);
05236a05 2868
e315cd28 2869 qla2xxx_check_risc_status(vha);
05236a05 2870
e315cd28
AC
2871 ha->isp_ops->fw_dump(vha, 1);
2872 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
a8488abe
AV
2873 break;
2874 } else if ((stat & HSRX_RISC_INT) == 0)
2875 break;
2876
2877 switch (stat & 0xff) {
fafbda9f
AE
2878 case INTR_ROM_MB_SUCCESS:
2879 case INTR_ROM_MB_FAILED:
2880 case INTR_MB_SUCCESS:
2881 case INTR_MB_FAILED:
e315cd28 2882 qla24xx_mbx_completion(vha, MSW(stat));
a8488abe
AV
2883 status |= MBX_INTERRUPT;
2884
2885 break;
fafbda9f 2886 case INTR_ASYNC_EVENT:
a8488abe
AV
2887 mb[0] = MSW(stat);
2888 mb[1] = RD_REG_WORD(&reg->mailbox1);
2889 mb[2] = RD_REG_WORD(&reg->mailbox2);
2890 mb[3] = RD_REG_WORD(&reg->mailbox3);
73208dfd 2891 qla2x00_async_event(vha, rsp, mb);
a8488abe 2892 break;
fafbda9f
AE
2893 case INTR_RSP_QUE_UPDATE:
2894 case INTR_RSP_QUE_UPDATE_83XX:
2afa19a9 2895 qla24xx_process_response_queue(vha, rsp);
a8488abe 2896 break;
fafbda9f 2897 case INTR_ATIO_QUE_UPDATE:
2d70c103
NB
2898 qlt_24xx_process_atio_queue(vha);
2899 break;
fafbda9f 2900 case INTR_ATIO_RSP_QUE_UPDATE:
2d70c103
NB
2901 qlt_24xx_process_atio_queue(vha);
2902 qla24xx_process_response_queue(vha, rsp);
2903 break;
a8488abe 2904 default:
7c3df132
SK
2905 ql_dbg(ql_dbg_async, vha, 0x5051,
2906 "Unrecognized interrupt type (%d).\n", stat & 0xff);
a8488abe
AV
2907 break;
2908 }
2909 WRT_REG_DWORD(&reg->hccr, HCCRX_CLR_RISC_INT);
87f27015 2910 } while (0);
36439832 2911 qla2x00_handle_mbx_completion(ha, status);
0f19bc68 2912 spin_unlock_irqrestore(&ha->hardware_lock, flags);
a8488abe 2913
a8488abe
AV
2914 return IRQ_HANDLED;
2915}
2916
2917/* Interrupt handling helpers. */
2918
2919struct qla_init_msix_entry {
a8488abe 2920 const char *name;
476834c2 2921 irq_handler_t handler;
a8488abe
AV
2922};
2923
68ca949c 2924static struct qla_init_msix_entry msix_entries[3] = {
2afa19a9
AC
2925 { "qla2xxx (default)", qla24xx_msix_default },
2926 { "qla2xxx (rsp_q)", qla24xx_msix_rsp_q },
68ca949c 2927 { "qla2xxx (multiq)", qla25xx_msix_rsp_q },
a8488abe
AV
2928};
2929
a9083016
GM
2930static struct qla_init_msix_entry qla82xx_msix_entries[2] = {
2931 { "qla2xxx (default)", qla82xx_msix_default },
2932 { "qla2xxx (rsp_q)", qla82xx_msix_rsp_q },
2933};
2934
aa230bc5
AE
2935static struct qla_init_msix_entry qla83xx_msix_entries[3] = {
2936 { "qla2xxx (default)", qla24xx_msix_default },
2937 { "qla2xxx (rsp_q)", qla24xx_msix_rsp_q },
2938 { "qla2xxx (atio_q)", qla83xx_msix_atio_q },
2939};
2940
a8488abe 2941static void
e315cd28 2942qla24xx_disable_msix(struct qla_hw_data *ha)
a8488abe
AV
2943{
2944 int i;
2945 struct qla_msix_entry *qentry;
7c3df132 2946 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev);
a8488abe 2947
73208dfd
AC
2948 for (i = 0; i < ha->msix_count; i++) {
2949 qentry = &ha->msix_entries[i];
a8488abe 2950 if (qentry->have_irq)
73208dfd 2951 free_irq(qentry->vector, qentry->rsp);
a8488abe
AV
2952 }
2953 pci_disable_msix(ha->pdev);
73208dfd
AC
2954 kfree(ha->msix_entries);
2955 ha->msix_entries = NULL;
2956 ha->flags.msix_enabled = 0;
7c3df132
SK
2957 ql_dbg(ql_dbg_init, vha, 0x0042,
2958 "Disabled the MSI.\n");
a8488abe
AV
2959}
2960
2961static int
73208dfd 2962qla24xx_enable_msix(struct qla_hw_data *ha, struct rsp_que *rsp)
a8488abe 2963{
ad038fa8 2964#define MIN_MSIX_COUNT 2
f324777e 2965#define ATIO_VECTOR 2
a8488abe 2966 int i, ret;
73208dfd 2967 struct msix_entry *entries;
a8488abe 2968 struct qla_msix_entry *qentry;
7c3df132 2969 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev);
73208dfd
AC
2970
2971 entries = kzalloc(sizeof(struct msix_entry) * ha->msix_count,
a9083016 2972 GFP_KERNEL);
7c3df132
SK
2973 if (!entries) {
2974 ql_log(ql_log_warn, vha, 0x00bc,
2975 "Failed to allocate memory for msix_entry.\n");
73208dfd 2976 return -ENOMEM;
7c3df132 2977 }
a8488abe 2978
73208dfd
AC
2979 for (i = 0; i < ha->msix_count; i++)
2980 entries[i].entry = i;
a8488abe 2981
84e32a06
AG
2982 ret = pci_enable_msix_range(ha->pdev,
2983 entries, MIN_MSIX_COUNT, ha->msix_count);
2984 if (ret < 0) {
2985 ql_log(ql_log_fatal, vha, 0x00c7,
2986 "MSI-X: Failed to enable support, "
2987 "giving up -- %d/%d.\n",
2988 ha->msix_count, ret);
2989 goto msix_out;
2990 } else if (ret < ha->msix_count) {
7c3df132
SK
2991 ql_log(ql_log_warn, vha, 0x00c6,
2992 "MSI-X: Failed to enable support "
2993 "-- %d/%d\n Retry with %d vectors.\n",
2994 ha->msix_count, ret, ret);
73208dfd 2995 }
84e32a06
AG
2996 ha->msix_count = ret;
2997 ha->max_rsp_queues = ha->msix_count - 1;
73208dfd
AC
2998 ha->msix_entries = kzalloc(sizeof(struct qla_msix_entry) *
2999 ha->msix_count, GFP_KERNEL);
3000 if (!ha->msix_entries) {
7c3df132
SK
3001 ql_log(ql_log_fatal, vha, 0x00c8,
3002 "Failed to allocate memory for ha->msix_entries.\n");
73208dfd 3003 ret = -ENOMEM;
a8488abe
AV
3004 goto msix_out;
3005 }
3006 ha->flags.msix_enabled = 1;
3007
73208dfd
AC
3008 for (i = 0; i < ha->msix_count; i++) {
3009 qentry = &ha->msix_entries[i];
3010 qentry->vector = entries[i].vector;
3011 qentry->entry = entries[i].entry;
a8488abe 3012 qentry->have_irq = 0;
73208dfd 3013 qentry->rsp = NULL;
a8488abe
AV
3014 }
3015
2afa19a9 3016 /* Enable MSI-X vectors for the base queue */
f324777e 3017 for (i = 0; i < 2; i++) {
2afa19a9 3018 qentry = &ha->msix_entries[i];
f324777e 3019 if (IS_P3P_TYPE(ha))
a9083016
GM
3020 ret = request_irq(qentry->vector,
3021 qla82xx_msix_entries[i].handler,
3022 0, qla82xx_msix_entries[i].name, rsp);
f324777e 3023 else
a9083016
GM
3024 ret = request_irq(qentry->vector,
3025 msix_entries[i].handler,
3026 0, msix_entries[i].name, rsp);
f324777e
CD
3027 if (ret)
3028 goto msix_register_fail;
3029 qentry->have_irq = 1;
3030 qentry->rsp = rsp;
3031 rsp->msix = qentry;
3032 }
3033
3034 /*
3035 * If target mode is enable, also request the vector for the ATIO
3036 * queue.
3037 */
3038 if (QLA_TGT_MODE_ENABLED() && IS_ATIO_MSIX_CAPABLE(ha)) {
3039 qentry = &ha->msix_entries[ATIO_VECTOR];
3040 ret = request_irq(qentry->vector,
3041 qla83xx_msix_entries[ATIO_VECTOR].handler,
3042 0, qla83xx_msix_entries[ATIO_VECTOR].name, rsp);
2afa19a9
AC
3043 qentry->have_irq = 1;
3044 qentry->rsp = rsp;
3045 rsp->msix = qentry;
73208dfd 3046 }
73208dfd 3047
f324777e
CD
3048msix_register_fail:
3049 if (ret) {
3050 ql_log(ql_log_fatal, vha, 0x00cb,
3051 "MSI-X: unable to register handler -- %x/%d.\n",
3052 qentry->vector, ret);
3053 qla24xx_disable_msix(ha);
3054 ha->mqenable = 0;
3055 goto msix_out;
3056 }
3057
73208dfd 3058 /* Enable MSI-X vector for response queue update for queue 0 */
f73cb695 3059 if (IS_QLA83XX(ha) || IS_QLA27XX(ha)) {
6246b8a1
GM
3060 if (ha->msixbase && ha->mqiobase &&
3061 (ha->max_rsp_queues > 1 || ha->max_req_queues > 1))
3062 ha->mqenable = 1;
3063 } else
3064 if (ha->mqiobase
3065 && (ha->max_rsp_queues > 1 || ha->max_req_queues > 1))
3066 ha->mqenable = 1;
7c3df132
SK
3067 ql_dbg(ql_dbg_multiq, vha, 0xc005,
3068 "mqiobase=%p, max_rsp_queues=%d, max_req_queues=%d.\n",
3069 ha->mqiobase, ha->max_rsp_queues, ha->max_req_queues);
3070 ql_dbg(ql_dbg_init, vha, 0x0055,
3071 "mqiobase=%p, max_rsp_queues=%d, max_req_queues=%d.\n",
3072 ha->mqiobase, ha->max_rsp_queues, ha->max_req_queues);
73208dfd 3073
a8488abe 3074msix_out:
73208dfd 3075 kfree(entries);
a8488abe
AV
3076 return ret;
3077}
3078
3079int
73208dfd 3080qla2x00_request_irqs(struct qla_hw_data *ha, struct rsp_que *rsp)
a8488abe 3081{
7fa3e239 3082 int ret = QLA_FUNCTION_FAILED;
f73cb695 3083 device_reg_t *reg = ha->iobase;
7c3df132 3084 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev);
a8488abe
AV
3085
3086 /* If possible, enable MSI-X. */
6246b8a1 3087 if (!IS_QLA2432(ha) && !IS_QLA2532(ha) && !IS_QLA8432(ha) &&
f73cb695
CD
3088 !IS_CNA_CAPABLE(ha) && !IS_QLA2031(ha) && !IS_QLAFX00(ha) &&
3089 !IS_QLA27XX(ha))
6377a7ae
BH
3090 goto skip_msi;
3091
3092 if (ha->pdev->subsystem_vendor == PCI_VENDOR_ID_HP &&
3093 (ha->pdev->subsystem_device == 0x7040 ||
3094 ha->pdev->subsystem_device == 0x7041 ||
3095 ha->pdev->subsystem_device == 0x1705)) {
7c3df132
SK
3096 ql_log(ql_log_warn, vha, 0x0034,
3097 "MSI-X: Unsupported ISP 2432 SSVID/SSDID (0x%X,0x%X).\n",
6377a7ae 3098 ha->pdev->subsystem_vendor,
7c3df132 3099 ha->pdev->subsystem_device);
6377a7ae
BH
3100 goto skip_msi;
3101 }
a8488abe 3102
42cd4f5d 3103 if (IS_QLA2432(ha) && (ha->pdev->revision < QLA_MSIX_CHIP_REV_24XX)) {
7c3df132
SK
3104 ql_log(ql_log_warn, vha, 0x0035,
3105 "MSI-X; Unsupported ISP2432 (0x%X, 0x%X).\n",
42cd4f5d 3106 ha->pdev->revision, QLA_MSIX_CHIP_REV_24XX);
a8488abe
AV
3107 goto skip_msix;
3108 }
3109
73208dfd 3110 ret = qla24xx_enable_msix(ha, rsp);
a8488abe 3111 if (!ret) {
7c3df132
SK
3112 ql_dbg(ql_dbg_init, vha, 0x0036,
3113 "MSI-X: Enabled (0x%X, 0x%X).\n",
3114 ha->chip_revision, ha->fw_attributes);
963b0fdd 3115 goto clear_risc_ints;
a8488abe 3116 }
7fa3e239 3117
a8488abe 3118skip_msix:
cbedb601 3119
7fa3e239
SC
3120 ql_log(ql_log_info, vha, 0x0037,
3121 "Falling back-to MSI mode -%d.\n", ret);
3122
3a03eb79 3123 if (!IS_QLA24XX(ha) && !IS_QLA2532(ha) && !IS_QLA8432(ha) &&
f73cb695
CD
3124 !IS_QLA8001(ha) && !IS_P3P_TYPE(ha) && !IS_QLAFX00(ha) &&
3125 !IS_QLA27XX(ha))
cbedb601
AV
3126 goto skip_msi;
3127
3128 ret = pci_enable_msi(ha->pdev);
3129 if (!ret) {
7c3df132
SK
3130 ql_dbg(ql_dbg_init, vha, 0x0038,
3131 "MSI: Enabled.\n");
cbedb601 3132 ha->flags.msi_enabled = 1;
a9083016 3133 } else
7c3df132 3134 ql_log(ql_log_warn, vha, 0x0039,
7fa3e239
SC
3135 "Falling back-to INTa mode -- %d.\n", ret);
3136skip_msi:
a033b655
GM
3137
3138 /* Skip INTx on ISP82xx. */
3139 if (!ha->flags.msi_enabled && IS_QLA82XX(ha))
3140 return QLA_FUNCTION_FAILED;
3141
fd34f556 3142 ret = request_irq(ha->pdev->irq, ha->isp_ops->intr_handler,
7992abfc
MH
3143 ha->flags.msi_enabled ? 0 : IRQF_SHARED,
3144 QLA2XXX_DRIVER_NAME, rsp);
963b0fdd 3145 if (ret) {
7c3df132 3146 ql_log(ql_log_warn, vha, 0x003a,
a8488abe
AV
3147 "Failed to reserve interrupt %d already in use.\n",
3148 ha->pdev->irq);
963b0fdd 3149 goto fail;
8ae6d9c7 3150 } else if (!ha->flags.msi_enabled) {
68d91cbd
SK
3151 ql_dbg(ql_dbg_init, vha, 0x0125,
3152 "INTa mode: Enabled.\n");
8ae6d9c7
GM
3153 ha->flags.mr_intr_valid = 1;
3154 }
7992abfc 3155
963b0fdd 3156clear_risc_ints:
4bb2efc4
JC
3157 if (IS_FWI2_CAPABLE(ha) || IS_QLAFX00(ha))
3158 goto fail;
963b0fdd 3159
c6952483 3160 spin_lock_irq(&ha->hardware_lock);
4bb2efc4 3161 WRT_REG_WORD(&reg->isp.semaphore, 0);
c6952483 3162 spin_unlock_irq(&ha->hardware_lock);
a8488abe 3163
963b0fdd 3164fail:
a8488abe
AV
3165 return ret;
3166}
3167
3168void
e315cd28 3169qla2x00_free_irqs(scsi_qla_host_t *vha)
a8488abe 3170{
e315cd28 3171 struct qla_hw_data *ha = vha->hw;
9a347ff4
CD
3172 struct rsp_que *rsp;
3173
3174 /*
3175 * We need to check that ha->rsp_q_map is valid in case we are called
3176 * from a probe failure context.
3177 */
3178 if (!ha->rsp_q_map || !ha->rsp_q_map[0])
3179 return;
3180 rsp = ha->rsp_q_map[0];
a8488abe
AV
3181
3182 if (ha->flags.msix_enabled)
3183 qla24xx_disable_msix(ha);
90a86fc0 3184 else if (ha->flags.msi_enabled) {
e315cd28 3185 free_irq(ha->pdev->irq, rsp);
cbedb601 3186 pci_disable_msi(ha->pdev);
90a86fc0
JC
3187 } else
3188 free_irq(ha->pdev->irq, rsp);
a8488abe 3189}
e315cd28 3190
73208dfd
AC
3191
3192int qla25xx_request_irq(struct rsp_que *rsp)
3193{
3194 struct qla_hw_data *ha = rsp->hw;
2afa19a9 3195 struct qla_init_msix_entry *intr = &msix_entries[2];
73208dfd 3196 struct qla_msix_entry *msix = rsp->msix;
7c3df132 3197 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev);
73208dfd
AC
3198 int ret;
3199
3200 ret = request_irq(msix->vector, intr->handler, 0, intr->name, rsp);
3201 if (ret) {
7c3df132
SK
3202 ql_log(ql_log_fatal, vha, 0x00e6,
3203 "MSI-X: Unable to register handler -- %x/%d.\n",
3204 msix->vector, ret);
73208dfd
AC
3205 return ret;
3206 }
3207 msix->have_irq = 1;
3208 msix->rsp = rsp;
3209 return ret;
3210}