Commit | Line | Data |
---|---|---|
1da177e4 | 1 | /* |
fa90c54f | 2 | * QLogic Fibre Channel HBA Driver |
bd21eaf9 | 3 | * Copyright (c) 2003-2014 QLogic Corporation |
1da177e4 | 4 | * |
fa90c54f | 5 | * See LICENSE.qla2xxx for copyright and licensing details. |
1da177e4 LT |
6 | */ |
7 | #include "qla_def.h" | |
2d70c103 | 8 | #include "qla_target.h" |
1da177e4 | 9 | |
05236a05 | 10 | #include <linux/delay.h> |
5a0e3ad6 | 11 | #include <linux/slab.h> |
df7baa50 | 12 | #include <scsi/scsi_tcq.h> |
9a069e19 | 13 | #include <scsi/scsi_bsg_fc.h> |
bad75002 | 14 | #include <scsi/scsi_eh.h> |
df7baa50 | 15 | |
1da177e4 | 16 | static void qla2x00_mbx_completion(scsi_qla_host_t *, uint16_t); |
73208dfd | 17 | static void qla2x00_status_entry(scsi_qla_host_t *, struct rsp_que *, void *); |
2afa19a9 | 18 | static void qla2x00_status_cont_entry(struct rsp_que *, sts_cont_entry_t *); |
73208dfd AC |
19 | static void qla2x00_error_entry(scsi_qla_host_t *, struct rsp_que *, |
20 | sts_entry_t *); | |
cdb898c5 QT |
21 | static void qla_irq_affinity_notify(struct irq_affinity_notify *, |
22 | const cpumask_t *); | |
23 | static void qla_irq_affinity_release(struct kref *); | |
24 | ||
9a853f71 | 25 | |
1da177e4 LT |
26 | /** |
27 | * qla2100_intr_handler() - Process interrupts for the ISP2100 and ISP2200. | |
28 | * @irq: | |
29 | * @dev_id: SCSI driver HA context | |
1da177e4 LT |
30 | * |
31 | * Called by system whenever the host adapter generates an interrupt. | |
32 | * | |
33 | * Returns handled flag. | |
34 | */ | |
35 | irqreturn_t | |
7d12e780 | 36 | qla2100_intr_handler(int irq, void *dev_id) |
1da177e4 | 37 | { |
e315cd28 AC |
38 | scsi_qla_host_t *vha; |
39 | struct qla_hw_data *ha; | |
3d71644c | 40 | struct device_reg_2xxx __iomem *reg; |
1da177e4 | 41 | int status; |
1da177e4 | 42 | unsigned long iter; |
14e660e6 | 43 | uint16_t hccr; |
9a853f71 | 44 | uint16_t mb[4]; |
e315cd28 | 45 | struct rsp_que *rsp; |
43fac4d9 | 46 | unsigned long flags; |
1da177e4 | 47 | |
e315cd28 AC |
48 | rsp = (struct rsp_que *) dev_id; |
49 | if (!rsp) { | |
3256b435 CD |
50 | ql_log(ql_log_info, NULL, 0x505d, |
51 | "%s: NULL response queue pointer.\n", __func__); | |
1da177e4 LT |
52 | return (IRQ_NONE); |
53 | } | |
54 | ||
e315cd28 | 55 | ha = rsp->hw; |
3d71644c | 56 | reg = &ha->iobase->isp; |
1da177e4 LT |
57 | status = 0; |
58 | ||
43fac4d9 | 59 | spin_lock_irqsave(&ha->hardware_lock, flags); |
2afa19a9 | 60 | vha = pci_get_drvdata(ha->pdev); |
1da177e4 | 61 | for (iter = 50; iter--; ) { |
14e660e6 | 62 | hccr = RD_REG_WORD(®->hccr); |
c821e0d5 | 63 | if (qla2x00_check_reg16_for_disconnect(vha, hccr)) |
f3ddac19 | 64 | break; |
14e660e6 SJ |
65 | if (hccr & HCCR_RISC_PAUSE) { |
66 | if (pci_channel_offline(ha->pdev)) | |
67 | break; | |
68 | ||
69 | /* | |
70 | * Issue a "HARD" reset in order for the RISC interrupt | |
a06a0f8e | 71 | * bit to be cleared. Schedule a big hammer to get |
14e660e6 SJ |
72 | * out of the RISC PAUSED state. |
73 | */ | |
74 | WRT_REG_WORD(®->hccr, HCCR_RESET_RISC); | |
75 | RD_REG_WORD(®->hccr); | |
76 | ||
e315cd28 AC |
77 | ha->isp_ops->fw_dump(vha, 1); |
78 | set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); | |
14e660e6 SJ |
79 | break; |
80 | } else if ((RD_REG_WORD(®->istatus) & ISR_RISC_INT) == 0) | |
1da177e4 LT |
81 | break; |
82 | ||
83 | if (RD_REG_WORD(®->semaphore) & BIT_0) { | |
84 | WRT_REG_WORD(®->hccr, HCCR_CLR_RISC_INT); | |
85 | RD_REG_WORD(®->hccr); | |
86 | ||
87 | /* Get mailbox data. */ | |
9a853f71 AV |
88 | mb[0] = RD_MAILBOX_REG(ha, reg, 0); |
89 | if (mb[0] > 0x3fff && mb[0] < 0x8000) { | |
e315cd28 | 90 | qla2x00_mbx_completion(vha, mb[0]); |
1da177e4 | 91 | status |= MBX_INTERRUPT; |
9a853f71 AV |
92 | } else if (mb[0] > 0x7fff && mb[0] < 0xc000) { |
93 | mb[1] = RD_MAILBOX_REG(ha, reg, 1); | |
94 | mb[2] = RD_MAILBOX_REG(ha, reg, 2); | |
95 | mb[3] = RD_MAILBOX_REG(ha, reg, 3); | |
73208dfd | 96 | qla2x00_async_event(vha, rsp, mb); |
1da177e4 LT |
97 | } else { |
98 | /*EMPTY*/ | |
7c3df132 SK |
99 | ql_dbg(ql_dbg_async, vha, 0x5025, |
100 | "Unrecognized interrupt type (%d).\n", | |
101 | mb[0]); | |
1da177e4 LT |
102 | } |
103 | /* Release mailbox registers. */ | |
104 | WRT_REG_WORD(®->semaphore, 0); | |
105 | RD_REG_WORD(®->semaphore); | |
106 | } else { | |
73208dfd | 107 | qla2x00_process_response_queue(rsp); |
1da177e4 LT |
108 | |
109 | WRT_REG_WORD(®->hccr, HCCR_CLR_RISC_INT); | |
110 | RD_REG_WORD(®->hccr); | |
111 | } | |
112 | } | |
36439832 | 113 | qla2x00_handle_mbx_completion(ha, status); |
43fac4d9 | 114 | spin_unlock_irqrestore(&ha->hardware_lock, flags); |
1da177e4 | 115 | |
1da177e4 LT |
116 | return (IRQ_HANDLED); |
117 | } | |
118 | ||
f3ddac19 | 119 | bool |
c821e0d5 | 120 | qla2x00_check_reg32_for_disconnect(scsi_qla_host_t *vha, uint32_t reg) |
f3ddac19 CD |
121 | { |
122 | /* Check for PCI disconnection */ | |
a30c2a3b | 123 | if (reg == 0xffffffff && !pci_channel_offline(vha->hw->pdev)) { |
beb9e315 | 124 | if (!test_and_set_bit(PFLG_DISCONNECTED, &vha->pci_flags) && |
6b383979 JL |
125 | !test_bit(PFLG_DRIVER_REMOVING, &vha->pci_flags) && |
126 | !test_bit(PFLG_DRIVER_PROBING, &vha->pci_flags)) { | |
232792b6 JL |
127 | /* |
128 | * Schedule this (only once) on the default system | |
129 | * workqueue so that all the adapter workqueues and the | |
130 | * DPC thread can be shutdown cleanly. | |
131 | */ | |
132 | schedule_work(&vha->hw->board_disable); | |
133 | } | |
f3ddac19 CD |
134 | return true; |
135 | } else | |
136 | return false; | |
137 | } | |
138 | ||
c821e0d5 JL |
139 | bool |
140 | qla2x00_check_reg16_for_disconnect(scsi_qla_host_t *vha, uint16_t reg) | |
141 | { | |
142 | return qla2x00_check_reg32_for_disconnect(vha, 0xffff0000 | reg); | |
143 | } | |
144 | ||
1da177e4 LT |
145 | /** |
146 | * qla2300_intr_handler() - Process interrupts for the ISP23xx and ISP63xx. | |
147 | * @irq: | |
148 | * @dev_id: SCSI driver HA context | |
1da177e4 LT |
149 | * |
150 | * Called by system whenever the host adapter generates an interrupt. | |
151 | * | |
152 | * Returns handled flag. | |
153 | */ | |
154 | irqreturn_t | |
7d12e780 | 155 | qla2300_intr_handler(int irq, void *dev_id) |
1da177e4 | 156 | { |
e315cd28 | 157 | scsi_qla_host_t *vha; |
3d71644c | 158 | struct device_reg_2xxx __iomem *reg; |
1da177e4 | 159 | int status; |
1da177e4 LT |
160 | unsigned long iter; |
161 | uint32_t stat; | |
1da177e4 | 162 | uint16_t hccr; |
9a853f71 | 163 | uint16_t mb[4]; |
e315cd28 AC |
164 | struct rsp_que *rsp; |
165 | struct qla_hw_data *ha; | |
43fac4d9 | 166 | unsigned long flags; |
1da177e4 | 167 | |
e315cd28 AC |
168 | rsp = (struct rsp_que *) dev_id; |
169 | if (!rsp) { | |
3256b435 CD |
170 | ql_log(ql_log_info, NULL, 0x5058, |
171 | "%s: NULL response queue pointer.\n", __func__); | |
1da177e4 LT |
172 | return (IRQ_NONE); |
173 | } | |
174 | ||
e315cd28 | 175 | ha = rsp->hw; |
3d71644c | 176 | reg = &ha->iobase->isp; |
1da177e4 LT |
177 | status = 0; |
178 | ||
43fac4d9 | 179 | spin_lock_irqsave(&ha->hardware_lock, flags); |
2afa19a9 | 180 | vha = pci_get_drvdata(ha->pdev); |
1da177e4 LT |
181 | for (iter = 50; iter--; ) { |
182 | stat = RD_REG_DWORD(®->u.isp2300.host_status); | |
c821e0d5 | 183 | if (qla2x00_check_reg32_for_disconnect(vha, stat)) |
f3ddac19 | 184 | break; |
1da177e4 | 185 | if (stat & HSR_RISC_PAUSED) { |
85880801 | 186 | if (unlikely(pci_channel_offline(ha->pdev))) |
14e660e6 SJ |
187 | break; |
188 | ||
1da177e4 | 189 | hccr = RD_REG_WORD(®->hccr); |
f3ddac19 | 190 | |
1da177e4 | 191 | if (hccr & (BIT_15 | BIT_13 | BIT_11 | BIT_8)) |
7c3df132 SK |
192 | ql_log(ql_log_warn, vha, 0x5026, |
193 | "Parity error -- HCCR=%x, Dumping " | |
194 | "firmware.\n", hccr); | |
1da177e4 | 195 | else |
7c3df132 SK |
196 | ql_log(ql_log_warn, vha, 0x5027, |
197 | "RISC paused -- HCCR=%x, Dumping " | |
198 | "firmware.\n", hccr); | |
1da177e4 LT |
199 | |
200 | /* | |
201 | * Issue a "HARD" reset in order for the RISC | |
202 | * interrupt bit to be cleared. Schedule a big | |
a06a0f8e | 203 | * hammer to get out of the RISC PAUSED state. |
1da177e4 LT |
204 | */ |
205 | WRT_REG_WORD(®->hccr, HCCR_RESET_RISC); | |
206 | RD_REG_WORD(®->hccr); | |
07f31805 | 207 | |
e315cd28 AC |
208 | ha->isp_ops->fw_dump(vha, 1); |
209 | set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); | |
1da177e4 LT |
210 | break; |
211 | } else if ((stat & HSR_RISC_INT) == 0) | |
212 | break; | |
213 | ||
1da177e4 | 214 | switch (stat & 0xff) { |
1da177e4 LT |
215 | case 0x1: |
216 | case 0x2: | |
217 | case 0x10: | |
218 | case 0x11: | |
e315cd28 | 219 | qla2x00_mbx_completion(vha, MSW(stat)); |
1da177e4 LT |
220 | status |= MBX_INTERRUPT; |
221 | ||
222 | /* Release mailbox registers. */ | |
223 | WRT_REG_WORD(®->semaphore, 0); | |
224 | break; | |
225 | case 0x12: | |
9a853f71 AV |
226 | mb[0] = MSW(stat); |
227 | mb[1] = RD_MAILBOX_REG(ha, reg, 1); | |
228 | mb[2] = RD_MAILBOX_REG(ha, reg, 2); | |
229 | mb[3] = RD_MAILBOX_REG(ha, reg, 3); | |
73208dfd | 230 | qla2x00_async_event(vha, rsp, mb); |
9a853f71 AV |
231 | break; |
232 | case 0x13: | |
73208dfd | 233 | qla2x00_process_response_queue(rsp); |
1da177e4 LT |
234 | break; |
235 | case 0x15: | |
9a853f71 AV |
236 | mb[0] = MBA_CMPLT_1_16BIT; |
237 | mb[1] = MSW(stat); | |
73208dfd | 238 | qla2x00_async_event(vha, rsp, mb); |
1da177e4 LT |
239 | break; |
240 | case 0x16: | |
9a853f71 AV |
241 | mb[0] = MBA_SCSI_COMPLETION; |
242 | mb[1] = MSW(stat); | |
243 | mb[2] = RD_MAILBOX_REG(ha, reg, 2); | |
73208dfd | 244 | qla2x00_async_event(vha, rsp, mb); |
1da177e4 LT |
245 | break; |
246 | default: | |
7c3df132 SK |
247 | ql_dbg(ql_dbg_async, vha, 0x5028, |
248 | "Unrecognized interrupt type (%d).\n", stat & 0xff); | |
1da177e4 LT |
249 | break; |
250 | } | |
251 | WRT_REG_WORD(®->hccr, HCCR_CLR_RISC_INT); | |
252 | RD_REG_WORD_RELAXED(®->hccr); | |
253 | } | |
36439832 | 254 | qla2x00_handle_mbx_completion(ha, status); |
43fac4d9 | 255 | spin_unlock_irqrestore(&ha->hardware_lock, flags); |
1da177e4 | 256 | |
1da177e4 LT |
257 | return (IRQ_HANDLED); |
258 | } | |
259 | ||
260 | /** | |
261 | * qla2x00_mbx_completion() - Process mailbox command completions. | |
262 | * @ha: SCSI driver HA context | |
263 | * @mb0: Mailbox0 register | |
264 | */ | |
265 | static void | |
e315cd28 | 266 | qla2x00_mbx_completion(scsi_qla_host_t *vha, uint16_t mb0) |
1da177e4 LT |
267 | { |
268 | uint16_t cnt; | |
4fa94f83 | 269 | uint32_t mboxes; |
1da177e4 | 270 | uint16_t __iomem *wptr; |
e315cd28 | 271 | struct qla_hw_data *ha = vha->hw; |
3d71644c | 272 | struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; |
1da177e4 | 273 | |
4fa94f83 AV |
274 | /* Read all mbox registers? */ |
275 | mboxes = (1 << ha->mbx_count) - 1; | |
276 | if (!ha->mcp) | |
a720101d | 277 | ql_dbg(ql_dbg_async, vha, 0x5001, "MBX pointer ERROR.\n"); |
4fa94f83 AV |
278 | else |
279 | mboxes = ha->mcp->in_mb; | |
280 | ||
1da177e4 LT |
281 | /* Load return mailbox registers. */ |
282 | ha->flags.mbox_int = 1; | |
283 | ha->mailbox_out[0] = mb0; | |
4fa94f83 | 284 | mboxes >>= 1; |
1da177e4 LT |
285 | wptr = (uint16_t __iomem *)MAILBOX_REG(ha, reg, 1); |
286 | ||
287 | for (cnt = 1; cnt < ha->mbx_count; cnt++) { | |
fa2a1ce5 | 288 | if (IS_QLA2200(ha) && cnt == 8) |
1da177e4 | 289 | wptr = (uint16_t __iomem *)MAILBOX_REG(ha, reg, 8); |
4fa94f83 | 290 | if ((cnt == 4 || cnt == 5) && (mboxes & BIT_0)) |
1da177e4 | 291 | ha->mailbox_out[cnt] = qla2x00_debounce_register(wptr); |
4fa94f83 | 292 | else if (mboxes & BIT_0) |
1da177e4 | 293 | ha->mailbox_out[cnt] = RD_REG_WORD(wptr); |
fa2a1ce5 | 294 | |
1da177e4 | 295 | wptr++; |
4fa94f83 | 296 | mboxes >>= 1; |
1da177e4 | 297 | } |
1da177e4 LT |
298 | } |
299 | ||
8a659571 AV |
300 | static void |
301 | qla81xx_idc_event(scsi_qla_host_t *vha, uint16_t aen, uint16_t descr) | |
302 | { | |
303 | static char *event[] = | |
304 | { "Complete", "Request Notification", "Time Extension" }; | |
305 | int rval; | |
306 | struct device_reg_24xx __iomem *reg24 = &vha->hw->iobase->isp24; | |
9e5054ec | 307 | struct device_reg_82xx __iomem *reg82 = &vha->hw->iobase->isp82; |
8a659571 AV |
308 | uint16_t __iomem *wptr; |
309 | uint16_t cnt, timeout, mb[QLA_IDC_ACK_REGS]; | |
310 | ||
311 | /* Seed data -- mailbox1 -> mailbox7. */ | |
9e5054ec CD |
312 | if (IS_QLA81XX(vha->hw) || IS_QLA83XX(vha->hw)) |
313 | wptr = (uint16_t __iomem *)®24->mailbox1; | |
314 | else if (IS_QLA8044(vha->hw)) | |
315 | wptr = (uint16_t __iomem *)®82->mailbox_out[1]; | |
316 | else | |
317 | return; | |
318 | ||
8a659571 AV |
319 | for (cnt = 0; cnt < QLA_IDC_ACK_REGS; cnt++, wptr++) |
320 | mb[cnt] = RD_REG_WORD(wptr); | |
321 | ||
7c3df132 | 322 | ql_dbg(ql_dbg_async, vha, 0x5021, |
6246b8a1 | 323 | "Inter-Driver Communication %s -- " |
7c3df132 SK |
324 | "%04x %04x %04x %04x %04x %04x %04x.\n", |
325 | event[aen & 0xff], mb[0], mb[1], mb[2], mb[3], | |
326 | mb[4], mb[5], mb[6]); | |
454073c9 SV |
327 | switch (aen) { |
328 | /* Handle IDC Error completion case. */ | |
329 | case MBA_IDC_COMPLETE: | |
330 | if (mb[1] >> 15) { | |
331 | vha->hw->flags.idc_compl_status = 1; | |
9aaf2cea | 332 | if (vha->hw->notify_dcbx_comp && !vha->vp_idx) |
454073c9 SV |
333 | complete(&vha->hw->dcbx_comp); |
334 | } | |
335 | break; | |
336 | ||
337 | case MBA_IDC_NOTIFY: | |
338 | /* Acknowledgement needed? [Notify && non-zero timeout]. */ | |
339 | timeout = (descr >> 8) & 0xf; | |
340 | ql_dbg(ql_dbg_async, vha, 0x5022, | |
341 | "%lu Inter-Driver Communication %s -- ACK timeout=%d.\n", | |
342 | vha->host_no, event[aen & 0xff], timeout); | |
343 | ||
344 | if (!timeout) | |
345 | return; | |
346 | rval = qla2x00_post_idc_ack_work(vha, mb); | |
347 | if (rval != QLA_SUCCESS) | |
348 | ql_log(ql_log_warn, vha, 0x5023, | |
349 | "IDC failed to post ACK.\n"); | |
350 | break; | |
351 | case MBA_IDC_TIME_EXT: | |
352 | vha->hw->idc_extend_tmo = descr; | |
353 | ql_dbg(ql_dbg_async, vha, 0x5087, | |
354 | "%lu Inter-Driver Communication %s -- " | |
355 | "Extend timeout by=%d.\n", | |
356 | vha->host_no, event[aen & 0xff], vha->hw->idc_extend_tmo); | |
357 | break; | |
bf5b8ad7 | 358 | } |
8a659571 AV |
359 | } |
360 | ||
daae62a3 | 361 | #define LS_UNKNOWN 2 |
d0297c9a JC |
362 | const char * |
363 | qla2x00_get_link_speed_str(struct qla_hw_data *ha, uint16_t speed) | |
daae62a3 | 364 | { |
f73cb695 CD |
365 | static const char *const link_speeds[] = { |
366 | "1", "2", "?", "4", "8", "16", "32", "10" | |
d0297c9a | 367 | }; |
f73cb695 | 368 | #define QLA_LAST_SPEED 7 |
daae62a3 CD |
369 | |
370 | if (IS_QLA2100(ha) || IS_QLA2200(ha)) | |
d0297c9a JC |
371 | return link_speeds[0]; |
372 | else if (speed == 0x13) | |
f73cb695 CD |
373 | return link_speeds[QLA_LAST_SPEED]; |
374 | else if (speed < QLA_LAST_SPEED) | |
d0297c9a JC |
375 | return link_speeds[speed]; |
376 | else | |
377 | return link_speeds[LS_UNKNOWN]; | |
daae62a3 CD |
378 | } |
379 | ||
fa492630 | 380 | static void |
7d613ac6 SV |
381 | qla83xx_handle_8200_aen(scsi_qla_host_t *vha, uint16_t *mb) |
382 | { | |
383 | struct qla_hw_data *ha = vha->hw; | |
384 | ||
385 | /* | |
386 | * 8200 AEN Interpretation: | |
387 | * mb[0] = AEN code | |
388 | * mb[1] = AEN Reason code | |
389 | * mb[2] = LSW of Peg-Halt Status-1 Register | |
390 | * mb[6] = MSW of Peg-Halt Status-1 Register | |
391 | * mb[3] = LSW of Peg-Halt Status-2 register | |
392 | * mb[7] = MSW of Peg-Halt Status-2 register | |
393 | * mb[4] = IDC Device-State Register value | |
394 | * mb[5] = IDC Driver-Presence Register value | |
395 | */ | |
396 | ql_dbg(ql_dbg_async, vha, 0x506b, "AEN Code: mb[0] = 0x%x AEN reason: " | |
397 | "mb[1] = 0x%x PH-status1: mb[2] = 0x%x PH-status1: mb[6] = 0x%x.\n", | |
398 | mb[0], mb[1], mb[2], mb[6]); | |
399 | ql_dbg(ql_dbg_async, vha, 0x506c, "PH-status2: mb[3] = 0x%x " | |
400 | "PH-status2: mb[7] = 0x%x Device-State: mb[4] = 0x%x " | |
401 | "Drv-Presence: mb[5] = 0x%x.\n", mb[3], mb[7], mb[4], mb[5]); | |
402 | ||
403 | if (mb[1] & (IDC_PEG_HALT_STATUS_CHANGE | IDC_NIC_FW_REPORTED_FAILURE | | |
404 | IDC_HEARTBEAT_FAILURE)) { | |
405 | ha->flags.nic_core_hung = 1; | |
406 | ql_log(ql_log_warn, vha, 0x5060, | |
407 | "83XX: F/W Error Reported: Check if reset required.\n"); | |
408 | ||
409 | if (mb[1] & IDC_PEG_HALT_STATUS_CHANGE) { | |
410 | uint32_t protocol_engine_id, fw_err_code, err_level; | |
411 | ||
412 | /* | |
413 | * IDC_PEG_HALT_STATUS_CHANGE interpretation: | |
414 | * - PEG-Halt Status-1 Register: | |
415 | * (LSW = mb[2], MSW = mb[6]) | |
416 | * Bits 0-7 = protocol-engine ID | |
417 | * Bits 8-28 = f/w error code | |
418 | * Bits 29-31 = Error-level | |
419 | * Error-level 0x1 = Non-Fatal error | |
420 | * Error-level 0x2 = Recoverable Fatal error | |
421 | * Error-level 0x4 = UnRecoverable Fatal error | |
422 | * - PEG-Halt Status-2 Register: | |
423 | * (LSW = mb[3], MSW = mb[7]) | |
424 | */ | |
425 | protocol_engine_id = (mb[2] & 0xff); | |
426 | fw_err_code = (((mb[2] & 0xff00) >> 8) | | |
427 | ((mb[6] & 0x1fff) << 8)); | |
428 | err_level = ((mb[6] & 0xe000) >> 13); | |
429 | ql_log(ql_log_warn, vha, 0x5061, "PegHalt Status-1 " | |
430 | "Register: protocol_engine_id=0x%x " | |
431 | "fw_err_code=0x%x err_level=0x%x.\n", | |
432 | protocol_engine_id, fw_err_code, err_level); | |
433 | ql_log(ql_log_warn, vha, 0x5062, "PegHalt Status-2 " | |
434 | "Register: 0x%x%x.\n", mb[7], mb[3]); | |
435 | if (err_level == ERR_LEVEL_NON_FATAL) { | |
436 | ql_log(ql_log_warn, vha, 0x5063, | |
437 | "Not a fatal error, f/w has recovered " | |
438 | "iteself.\n"); | |
439 | } else if (err_level == ERR_LEVEL_RECOVERABLE_FATAL) { | |
440 | ql_log(ql_log_fatal, vha, 0x5064, | |
441 | "Recoverable Fatal error: Chip reset " | |
442 | "required.\n"); | |
443 | qla83xx_schedule_work(vha, | |
444 | QLA83XX_NIC_CORE_RESET); | |
445 | } else if (err_level == ERR_LEVEL_UNRECOVERABLE_FATAL) { | |
446 | ql_log(ql_log_fatal, vha, 0x5065, | |
447 | "Unrecoverable Fatal error: Set FAILED " | |
448 | "state, reboot required.\n"); | |
449 | qla83xx_schedule_work(vha, | |
450 | QLA83XX_NIC_CORE_UNRECOVERABLE); | |
451 | } | |
452 | } | |
453 | ||
454 | if (mb[1] & IDC_NIC_FW_REPORTED_FAILURE) { | |
455 | uint16_t peg_fw_state, nw_interface_link_up; | |
456 | uint16_t nw_interface_signal_detect, sfp_status; | |
457 | uint16_t htbt_counter, htbt_monitor_enable; | |
458 | uint16_t sfp_additonal_info, sfp_multirate; | |
459 | uint16_t sfp_tx_fault, link_speed, dcbx_status; | |
460 | ||
461 | /* | |
462 | * IDC_NIC_FW_REPORTED_FAILURE interpretation: | |
463 | * - PEG-to-FC Status Register: | |
464 | * (LSW = mb[2], MSW = mb[6]) | |
465 | * Bits 0-7 = Peg-Firmware state | |
466 | * Bit 8 = N/W Interface Link-up | |
467 | * Bit 9 = N/W Interface signal detected | |
468 | * Bits 10-11 = SFP Status | |
469 | * SFP Status 0x0 = SFP+ transceiver not expected | |
470 | * SFP Status 0x1 = SFP+ transceiver not present | |
471 | * SFP Status 0x2 = SFP+ transceiver invalid | |
472 | * SFP Status 0x3 = SFP+ transceiver present and | |
473 | * valid | |
474 | * Bits 12-14 = Heartbeat Counter | |
475 | * Bit 15 = Heartbeat Monitor Enable | |
476 | * Bits 16-17 = SFP Additional Info | |
477 | * SFP info 0x0 = Unregocnized transceiver for | |
478 | * Ethernet | |
479 | * SFP info 0x1 = SFP+ brand validation failed | |
480 | * SFP info 0x2 = SFP+ speed validation failed | |
481 | * SFP info 0x3 = SFP+ access error | |
482 | * Bit 18 = SFP Multirate | |
483 | * Bit 19 = SFP Tx Fault | |
484 | * Bits 20-22 = Link Speed | |
485 | * Bits 23-27 = Reserved | |
486 | * Bits 28-30 = DCBX Status | |
487 | * DCBX Status 0x0 = DCBX Disabled | |
488 | * DCBX Status 0x1 = DCBX Enabled | |
489 | * DCBX Status 0x2 = DCBX Exchange error | |
490 | * Bit 31 = Reserved | |
491 | */ | |
492 | peg_fw_state = (mb[2] & 0x00ff); | |
493 | nw_interface_link_up = ((mb[2] & 0x0100) >> 8); | |
494 | nw_interface_signal_detect = ((mb[2] & 0x0200) >> 9); | |
495 | sfp_status = ((mb[2] & 0x0c00) >> 10); | |
496 | htbt_counter = ((mb[2] & 0x7000) >> 12); | |
497 | htbt_monitor_enable = ((mb[2] & 0x8000) >> 15); | |
498 | sfp_additonal_info = (mb[6] & 0x0003); | |
499 | sfp_multirate = ((mb[6] & 0x0004) >> 2); | |
500 | sfp_tx_fault = ((mb[6] & 0x0008) >> 3); | |
501 | link_speed = ((mb[6] & 0x0070) >> 4); | |
502 | dcbx_status = ((mb[6] & 0x7000) >> 12); | |
503 | ||
504 | ql_log(ql_log_warn, vha, 0x5066, | |
505 | "Peg-to-Fc Status Register:\n" | |
506 | "peg_fw_state=0x%x, nw_interface_link_up=0x%x, " | |
507 | "nw_interface_signal_detect=0x%x" | |
508 | "\nsfp_statis=0x%x.\n ", peg_fw_state, | |
509 | nw_interface_link_up, nw_interface_signal_detect, | |
510 | sfp_status); | |
511 | ql_log(ql_log_warn, vha, 0x5067, | |
512 | "htbt_counter=0x%x, htbt_monitor_enable=0x%x, " | |
513 | "sfp_additonal_info=0x%x, sfp_multirate=0x%x.\n ", | |
514 | htbt_counter, htbt_monitor_enable, | |
515 | sfp_additonal_info, sfp_multirate); | |
516 | ql_log(ql_log_warn, vha, 0x5068, | |
517 | "sfp_tx_fault=0x%x, link_state=0x%x, " | |
518 | "dcbx_status=0x%x.\n", sfp_tx_fault, link_speed, | |
519 | dcbx_status); | |
520 | ||
521 | qla83xx_schedule_work(vha, QLA83XX_NIC_CORE_RESET); | |
522 | } | |
523 | ||
524 | if (mb[1] & IDC_HEARTBEAT_FAILURE) { | |
525 | ql_log(ql_log_warn, vha, 0x5069, | |
526 | "Heartbeat Failure encountered, chip reset " | |
527 | "required.\n"); | |
528 | ||
529 | qla83xx_schedule_work(vha, QLA83XX_NIC_CORE_RESET); | |
530 | } | |
531 | } | |
532 | ||
533 | if (mb[1] & IDC_DEVICE_STATE_CHANGE) { | |
534 | ql_log(ql_log_info, vha, 0x506a, | |
535 | "IDC Device-State changed = 0x%x.\n", mb[4]); | |
6c3943cd SK |
536 | if (ha->flags.nic_core_reset_owner) |
537 | return; | |
7d613ac6 SV |
538 | qla83xx_schedule_work(vha, MBA_IDC_AEN); |
539 | } | |
540 | } | |
541 | ||
bb4cf5b7 CD |
542 | int |
543 | qla2x00_is_a_vp_did(scsi_qla_host_t *vha, uint32_t rscn_entry) | |
544 | { | |
545 | struct qla_hw_data *ha = vha->hw; | |
546 | scsi_qla_host_t *vp; | |
547 | uint32_t vp_did; | |
548 | unsigned long flags; | |
549 | int ret = 0; | |
550 | ||
551 | if (!ha->num_vhosts) | |
552 | return ret; | |
553 | ||
554 | spin_lock_irqsave(&ha->vport_slock, flags); | |
555 | list_for_each_entry(vp, &ha->vp_list, list) { | |
556 | vp_did = vp->d_id.b24; | |
557 | if (vp_did == rscn_entry) { | |
558 | ret = 1; | |
559 | break; | |
560 | } | |
561 | } | |
562 | spin_unlock_irqrestore(&ha->vport_slock, flags); | |
563 | ||
564 | return ret; | |
565 | } | |
566 | ||
17cac3a1 JC |
567 | static inline fc_port_t * |
568 | qla2x00_find_fcport_by_loopid(scsi_qla_host_t *vha, uint16_t loop_id) | |
569 | { | |
570 | fc_port_t *fcport; | |
571 | ||
572 | list_for_each_entry(fcport, &vha->vp_fcports, list) | |
573 | if (fcport->loop_id == loop_id) | |
574 | return fcport; | |
575 | return NULL; | |
576 | } | |
577 | ||
1da177e4 LT |
578 | /** |
579 | * qla2x00_async_event() - Process aynchronous events. | |
580 | * @ha: SCSI driver HA context | |
9a853f71 | 581 | * @mb: Mailbox registers (0 - 3) |
1da177e4 | 582 | */ |
2c3dfe3f | 583 | void |
73208dfd | 584 | qla2x00_async_event(scsi_qla_host_t *vha, struct rsp_que *rsp, uint16_t *mb) |
1da177e4 | 585 | { |
1da177e4 | 586 | uint16_t handle_cnt; |
bdab23da | 587 | uint16_t cnt, mbx; |
1da177e4 | 588 | uint32_t handles[5]; |
e315cd28 | 589 | struct qla_hw_data *ha = vha->hw; |
3d71644c | 590 | struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; |
bdab23da | 591 | struct device_reg_24xx __iomem *reg24 = &ha->iobase->isp24; |
bc5c2aad | 592 | struct device_reg_82xx __iomem *reg82 = &ha->iobase->isp82; |
52c82823 | 593 | uint32_t rscn_entry, host_pid; |
4d4df193 | 594 | unsigned long flags; |
ef86cb20 | 595 | fc_port_t *fcport = NULL; |
1da177e4 LT |
596 | |
597 | /* Setup to process RIO completion. */ | |
598 | handle_cnt = 0; | |
6246b8a1 | 599 | if (IS_CNA_CAPABLE(ha)) |
3a03eb79 | 600 | goto skip_rio; |
1da177e4 LT |
601 | switch (mb[0]) { |
602 | case MBA_SCSI_COMPLETION: | |
9a853f71 | 603 | handles[0] = le32_to_cpu((uint32_t)((mb[2] << 16) | mb[1])); |
1da177e4 LT |
604 | handle_cnt = 1; |
605 | break; | |
606 | case MBA_CMPLT_1_16BIT: | |
9a853f71 | 607 | handles[0] = mb[1]; |
1da177e4 LT |
608 | handle_cnt = 1; |
609 | mb[0] = MBA_SCSI_COMPLETION; | |
610 | break; | |
611 | case MBA_CMPLT_2_16BIT: | |
9a853f71 AV |
612 | handles[0] = mb[1]; |
613 | handles[1] = mb[2]; | |
1da177e4 LT |
614 | handle_cnt = 2; |
615 | mb[0] = MBA_SCSI_COMPLETION; | |
616 | break; | |
617 | case MBA_CMPLT_3_16BIT: | |
9a853f71 AV |
618 | handles[0] = mb[1]; |
619 | handles[1] = mb[2]; | |
620 | handles[2] = mb[3]; | |
1da177e4 LT |
621 | handle_cnt = 3; |
622 | mb[0] = MBA_SCSI_COMPLETION; | |
623 | break; | |
624 | case MBA_CMPLT_4_16BIT: | |
9a853f71 AV |
625 | handles[0] = mb[1]; |
626 | handles[1] = mb[2]; | |
627 | handles[2] = mb[3]; | |
1da177e4 LT |
628 | handles[3] = (uint32_t)RD_MAILBOX_REG(ha, reg, 6); |
629 | handle_cnt = 4; | |
630 | mb[0] = MBA_SCSI_COMPLETION; | |
631 | break; | |
632 | case MBA_CMPLT_5_16BIT: | |
9a853f71 AV |
633 | handles[0] = mb[1]; |
634 | handles[1] = mb[2]; | |
635 | handles[2] = mb[3]; | |
1da177e4 LT |
636 | handles[3] = (uint32_t)RD_MAILBOX_REG(ha, reg, 6); |
637 | handles[4] = (uint32_t)RD_MAILBOX_REG(ha, reg, 7); | |
638 | handle_cnt = 5; | |
639 | mb[0] = MBA_SCSI_COMPLETION; | |
640 | break; | |
641 | case MBA_CMPLT_2_32BIT: | |
9a853f71 | 642 | handles[0] = le32_to_cpu((uint32_t)((mb[2] << 16) | mb[1])); |
1da177e4 LT |
643 | handles[1] = le32_to_cpu( |
644 | ((uint32_t)(RD_MAILBOX_REG(ha, reg, 7) << 16)) | | |
645 | RD_MAILBOX_REG(ha, reg, 6)); | |
646 | handle_cnt = 2; | |
647 | mb[0] = MBA_SCSI_COMPLETION; | |
648 | break; | |
649 | default: | |
650 | break; | |
651 | } | |
3a03eb79 | 652 | skip_rio: |
1da177e4 LT |
653 | switch (mb[0]) { |
654 | case MBA_SCSI_COMPLETION: /* Fast Post */ | |
e315cd28 | 655 | if (!vha->flags.online) |
1da177e4 LT |
656 | break; |
657 | ||
658 | for (cnt = 0; cnt < handle_cnt; cnt++) | |
73208dfd AC |
659 | qla2x00_process_completed_request(vha, rsp->req, |
660 | handles[cnt]); | |
1da177e4 LT |
661 | break; |
662 | ||
663 | case MBA_RESET: /* Reset */ | |
7c3df132 SK |
664 | ql_dbg(ql_dbg_async, vha, 0x5002, |
665 | "Asynchronous RESET.\n"); | |
1da177e4 | 666 | |
e315cd28 | 667 | set_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); |
1da177e4 LT |
668 | break; |
669 | ||
670 | case MBA_SYSTEM_ERR: /* System Error */ | |
f73cb695 | 671 | mbx = (IS_QLA81XX(ha) || IS_QLA83XX(ha) || IS_QLA27XX(ha)) ? |
6246b8a1 | 672 | RD_REG_WORD(®24->mailbox7) : 0; |
7c3df132 | 673 | ql_log(ql_log_warn, vha, 0x5003, |
bdab23da AV |
674 | "ISP System Error - mbx1=%xh mbx2=%xh mbx3=%xh " |
675 | "mbx7=%xh.\n", mb[1], mb[2], mb[3], mbx); | |
1da177e4 | 676 | |
e315cd28 | 677 | ha->isp_ops->fw_dump(vha, 1); |
1da177e4 | 678 | |
e428924c | 679 | if (IS_FWI2_CAPABLE(ha)) { |
9a853f71 | 680 | if (mb[1] == 0 && mb[2] == 0) { |
7c3df132 | 681 | ql_log(ql_log_fatal, vha, 0x5004, |
9a853f71 AV |
682 | "Unrecoverable Hardware Error: adapter " |
683 | "marked OFFLINE!\n"); | |
e315cd28 | 684 | vha->flags.online = 0; |
6246b8a1 | 685 | vha->device_flags |= DFLG_DEV_FAILED; |
b1d46989 | 686 | } else { |
25985edc | 687 | /* Check to see if MPI timeout occurred */ |
f73cb695 | 688 | if ((mbx & MBX_3) && (ha->port_no == 0)) |
b1d46989 MI |
689 | set_bit(MPI_RESET_NEEDED, |
690 | &vha->dpc_flags); | |
691 | ||
e315cd28 | 692 | set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); |
b1d46989 | 693 | } |
9a853f71 | 694 | } else if (mb[1] == 0) { |
7c3df132 | 695 | ql_log(ql_log_fatal, vha, 0x5005, |
1da177e4 LT |
696 | "Unrecoverable Hardware Error: adapter marked " |
697 | "OFFLINE!\n"); | |
e315cd28 | 698 | vha->flags.online = 0; |
6246b8a1 | 699 | vha->device_flags |= DFLG_DEV_FAILED; |
1da177e4 | 700 | } else |
e315cd28 | 701 | set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); |
1da177e4 LT |
702 | break; |
703 | ||
704 | case MBA_REQ_TRANSFER_ERR: /* Request Transfer Error */ | |
7c3df132 SK |
705 | ql_log(ql_log_warn, vha, 0x5006, |
706 | "ISP Request Transfer Error (%x).\n", mb[1]); | |
1da177e4 | 707 | |
e315cd28 | 708 | set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); |
1da177e4 LT |
709 | break; |
710 | ||
711 | case MBA_RSP_TRANSFER_ERR: /* Response Transfer Error */ | |
7c3df132 | 712 | ql_log(ql_log_warn, vha, 0x5007, |
41233cd3 | 713 | "ISP Response Transfer Error (%x).\n", mb[1]); |
1da177e4 | 714 | |
e315cd28 | 715 | set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); |
1da177e4 LT |
716 | break; |
717 | ||
718 | case MBA_WAKEUP_THRES: /* Request Queue Wake-up */ | |
7c3df132 | 719 | ql_dbg(ql_dbg_async, vha, 0x5008, |
41233cd3 JC |
720 | "Asynchronous WAKEUP_THRES (%x).\n", mb[1]); |
721 | break; | |
1da177e4 | 722 | |
41233cd3 | 723 | case MBA_LOOP_INIT_ERR: |
75d560e0 | 724 | ql_log(ql_log_warn, vha, 0x5090, |
41233cd3 JC |
725 | "LOOP INIT ERROR (%x).\n", mb[1]); |
726 | ha->isp_ops->fw_dump(vha, 1); | |
727 | set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); | |
2d70c103 | 728 | break; |
41233cd3 | 729 | |
1da177e4 | 730 | case MBA_LIP_OCCURRED: /* Loop Initialization Procedure */ |
cfb0919c | 731 | ql_dbg(ql_dbg_async, vha, 0x5009, |
7c3df132 | 732 | "LIP occurred (%x).\n", mb[1]); |
1da177e4 | 733 | |
e315cd28 AC |
734 | if (atomic_read(&vha->loop_state) != LOOP_DOWN) { |
735 | atomic_set(&vha->loop_state, LOOP_DOWN); | |
736 | atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME); | |
737 | qla2x00_mark_all_devices_lost(vha, 1); | |
1da177e4 LT |
738 | } |
739 | ||
e315cd28 AC |
740 | if (vha->vp_idx) { |
741 | atomic_set(&vha->vp_state, VP_FAILED); | |
742 | fc_vport_set_state(vha->fc_vport, FC_VPORT_FAILED); | |
2c3dfe3f SJ |
743 | } |
744 | ||
e315cd28 AC |
745 | set_bit(REGISTER_FC4_NEEDED, &vha->dpc_flags); |
746 | set_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags); | |
1da177e4 | 747 | |
e315cd28 AC |
748 | vha->flags.management_server_logged_in = 0; |
749 | qla2x00_post_aen_work(vha, FCH_EVT_LIP, mb[1]); | |
1da177e4 LT |
750 | break; |
751 | ||
752 | case MBA_LOOP_UP: /* Loop Up Event */ | |
daae62a3 | 753 | if (IS_QLA2100(ha) || IS_QLA2200(ha)) |
d8b45213 | 754 | ha->link_data_rate = PORT_SPEED_1GB; |
daae62a3 | 755 | else |
1da177e4 | 756 | ha->link_data_rate = mb[1]; |
1da177e4 | 757 | |
8e5a9484 | 758 | ql_log(ql_log_info, vha, 0x500a, |
daae62a3 | 759 | "LOOP UP detected (%s Gbps).\n", |
d0297c9a | 760 | qla2x00_get_link_speed_str(ha, ha->link_data_rate)); |
1da177e4 | 761 | |
e315cd28 AC |
762 | vha->flags.management_server_logged_in = 0; |
763 | qla2x00_post_aen_work(vha, FCH_EVT_LINKUP, ha->link_data_rate); | |
1da177e4 LT |
764 | break; |
765 | ||
766 | case MBA_LOOP_DOWN: /* Loop Down Event */ | |
6246b8a1 GM |
767 | mbx = (IS_QLA81XX(ha) || IS_QLA8031(ha)) |
768 | ? RD_REG_WORD(®24->mailbox4) : 0; | |
7ec0effd AD |
769 | mbx = (IS_P3P_TYPE(ha)) ? RD_REG_WORD(®82->mailbox_out[4]) |
770 | : mbx; | |
8e5a9484 | 771 | ql_log(ql_log_info, vha, 0x500b, |
7c3df132 SK |
772 | "LOOP DOWN detected (%x %x %x %x).\n", |
773 | mb[1], mb[2], mb[3], mbx); | |
1da177e4 | 774 | |
e315cd28 AC |
775 | if (atomic_read(&vha->loop_state) != LOOP_DOWN) { |
776 | atomic_set(&vha->loop_state, LOOP_DOWN); | |
777 | atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME); | |
2486c627 HM |
778 | /* |
779 | * In case of loop down, restore WWPN from | |
780 | * NVRAM in case of FA-WWPN capable ISP | |
718abbdc | 781 | * Restore for Physical Port only |
2486c627 | 782 | */ |
718abbdc SC |
783 | if (!vha->vp_idx) { |
784 | if (ha->flags.fawwpn_enabled) { | |
785 | void *wwpn = ha->init_cb->port_name; | |
786 | memcpy(vha->port_name, wwpn, WWN_SIZE); | |
787 | fc_host_port_name(vha->host) = | |
788 | wwn_to_u64(vha->port_name); | |
789 | ql_dbg(ql_dbg_init + ql_dbg_verbose, | |
790 | vha, 0x0144, "LOOP DOWN detected," | |
791 | "restore WWPN %016llx\n", | |
792 | wwn_to_u64(vha->port_name)); | |
793 | } | |
794 | ||
795 | clear_bit(VP_CONFIG_OK, &vha->vp_flags); | |
2486c627 HM |
796 | } |
797 | ||
e315cd28 AC |
798 | vha->device_flags |= DFLG_NO_CABLE; |
799 | qla2x00_mark_all_devices_lost(vha, 1); | |
1da177e4 LT |
800 | } |
801 | ||
e315cd28 AC |
802 | if (vha->vp_idx) { |
803 | atomic_set(&vha->vp_state, VP_FAILED); | |
804 | fc_vport_set_state(vha->fc_vport, FC_VPORT_FAILED); | |
2c3dfe3f SJ |
805 | } |
806 | ||
e315cd28 | 807 | vha->flags.management_server_logged_in = 0; |
d8b45213 | 808 | ha->link_data_rate = PORT_SPEED_UNKNOWN; |
e315cd28 | 809 | qla2x00_post_aen_work(vha, FCH_EVT_LINKDOWN, 0); |
1da177e4 LT |
810 | break; |
811 | ||
812 | case MBA_LIP_RESET: /* LIP reset occurred */ | |
cfb0919c | 813 | ql_dbg(ql_dbg_async, vha, 0x500c, |
cc3ef7bc | 814 | "LIP reset occurred (%x).\n", mb[1]); |
1da177e4 | 815 | |
e315cd28 AC |
816 | if (atomic_read(&vha->loop_state) != LOOP_DOWN) { |
817 | atomic_set(&vha->loop_state, LOOP_DOWN); | |
818 | atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME); | |
819 | qla2x00_mark_all_devices_lost(vha, 1); | |
1da177e4 LT |
820 | } |
821 | ||
e315cd28 AC |
822 | if (vha->vp_idx) { |
823 | atomic_set(&vha->vp_state, VP_FAILED); | |
824 | fc_vport_set_state(vha->fc_vport, FC_VPORT_FAILED); | |
2c3dfe3f SJ |
825 | } |
826 | ||
e315cd28 | 827 | set_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); |
1da177e4 LT |
828 | |
829 | ha->operating_mode = LOOP; | |
e315cd28 AC |
830 | vha->flags.management_server_logged_in = 0; |
831 | qla2x00_post_aen_work(vha, FCH_EVT_LIPRESET, mb[1]); | |
1da177e4 LT |
832 | break; |
833 | ||
3a03eb79 | 834 | /* case MBA_DCBX_COMPLETE: */ |
1da177e4 LT |
835 | case MBA_POINT_TO_POINT: /* Point-to-Point */ |
836 | if (IS_QLA2100(ha)) | |
837 | break; | |
838 | ||
7ec0effd | 839 | if (IS_CNA_CAPABLE(ha)) { |
7c3df132 SK |
840 | ql_dbg(ql_dbg_async, vha, 0x500d, |
841 | "DCBX Completed -- %04x %04x %04x.\n", | |
842 | mb[1], mb[2], mb[3]); | |
9aaf2cea | 843 | if (ha->notify_dcbx_comp && !vha->vp_idx) |
23f2ebd1 SR |
844 | complete(&ha->dcbx_comp); |
845 | ||
846 | } else | |
7c3df132 SK |
847 | ql_dbg(ql_dbg_async, vha, 0x500e, |
848 | "Asynchronous P2P MODE received.\n"); | |
1da177e4 LT |
849 | |
850 | /* | |
851 | * Until there's a transition from loop down to loop up, treat | |
852 | * this as loop down only. | |
853 | */ | |
e315cd28 AC |
854 | if (atomic_read(&vha->loop_state) != LOOP_DOWN) { |
855 | atomic_set(&vha->loop_state, LOOP_DOWN); | |
856 | if (!atomic_read(&vha->loop_down_timer)) | |
857 | atomic_set(&vha->loop_down_timer, | |
1da177e4 | 858 | LOOP_DOWN_TIME); |
e315cd28 | 859 | qla2x00_mark_all_devices_lost(vha, 1); |
1da177e4 LT |
860 | } |
861 | ||
e315cd28 AC |
862 | if (vha->vp_idx) { |
863 | atomic_set(&vha->vp_state, VP_FAILED); | |
864 | fc_vport_set_state(vha->fc_vport, FC_VPORT_FAILED); | |
2c3dfe3f SJ |
865 | } |
866 | ||
e315cd28 AC |
867 | if (!(test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags))) |
868 | set_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); | |
869 | ||
870 | set_bit(REGISTER_FC4_NEEDED, &vha->dpc_flags); | |
871 | set_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags); | |
4346b149 AV |
872 | |
873 | ha->flags.gpsc_supported = 1; | |
e315cd28 | 874 | vha->flags.management_server_logged_in = 0; |
1da177e4 LT |
875 | break; |
876 | ||
877 | case MBA_CHG_IN_CONNECTION: /* Change in connection mode */ | |
878 | if (IS_QLA2100(ha)) | |
879 | break; | |
880 | ||
cfb0919c | 881 | ql_dbg(ql_dbg_async, vha, 0x500f, |
1da177e4 LT |
882 | "Configuration change detected: value=%x.\n", mb[1]); |
883 | ||
e315cd28 AC |
884 | if (atomic_read(&vha->loop_state) != LOOP_DOWN) { |
885 | atomic_set(&vha->loop_state, LOOP_DOWN); | |
886 | if (!atomic_read(&vha->loop_down_timer)) | |
887 | atomic_set(&vha->loop_down_timer, | |
1da177e4 | 888 | LOOP_DOWN_TIME); |
e315cd28 | 889 | qla2x00_mark_all_devices_lost(vha, 1); |
1da177e4 LT |
890 | } |
891 | ||
e315cd28 AC |
892 | if (vha->vp_idx) { |
893 | atomic_set(&vha->vp_state, VP_FAILED); | |
894 | fc_vport_set_state(vha->fc_vport, FC_VPORT_FAILED); | |
2c3dfe3f SJ |
895 | } |
896 | ||
e315cd28 AC |
897 | set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); |
898 | set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); | |
1da177e4 LT |
899 | break; |
900 | ||
901 | case MBA_PORT_UPDATE: /* Port database update */ | |
55903b9d SV |
902 | /* |
903 | * Handle only global and vn-port update events | |
904 | * | |
905 | * Relevant inputs: | |
906 | * mb[1] = N_Port handle of changed port | |
907 | * OR 0xffff for global event | |
908 | * mb[2] = New login state | |
909 | * 7 = Port logged out | |
910 | * mb[3] = LSB is vp_idx, 0xff = all vps | |
911 | * | |
912 | * Skip processing if: | |
913 | * Event is global, vp_idx is NOT all vps, | |
914 | * vp_idx does not match | |
915 | * Event is not global, vp_idx does not match | |
916 | */ | |
12cec63e AV |
917 | if (IS_QLA2XXX_MIDTYPE(ha) && |
918 | ((mb[1] == 0xffff && (mb[3] & 0xff) != 0xff) || | |
919 | (mb[1] != 0xffff)) && vha->vp_idx != (mb[3] & 0xff)) | |
920 | break; | |
73208dfd | 921 | |
17cac3a1 | 922 | if (mb[2] == 0x7) { |
7c3df132 | 923 | ql_dbg(ql_dbg_async, vha, 0x5010, |
17cac3a1 JC |
924 | "Port %s %04x %04x %04x.\n", |
925 | mb[1] == 0xffff ? "unavailable" : "logout", | |
7c3df132 | 926 | mb[1], mb[2], mb[3]); |
17cac3a1 JC |
927 | |
928 | if (mb[1] == 0xffff) | |
929 | goto global_port_update; | |
930 | ||
931 | /* Port logout */ | |
932 | fcport = qla2x00_find_fcport_by_loopid(vha, mb[1]); | |
933 | if (!fcport) | |
934 | break; | |
935 | if (atomic_read(&fcport->state) != FCS_ONLINE) | |
936 | break; | |
937 | ql_dbg(ql_dbg_async, vha, 0x508a, | |
938 | "Marking port lost loopid=%04x portid=%06x.\n", | |
939 | fcport->loop_id, fcport->d_id.b24); | |
940 | qla2x00_mark_device_lost(fcport->vha, fcport, 1, 1); | |
941 | break; | |
942 | ||
943 | global_port_update: | |
9764ff88 AV |
944 | if (atomic_read(&vha->loop_state) != LOOP_DOWN) { |
945 | atomic_set(&vha->loop_state, LOOP_DOWN); | |
946 | atomic_set(&vha->loop_down_timer, | |
947 | LOOP_DOWN_TIME); | |
948 | vha->device_flags |= DFLG_NO_CABLE; | |
949 | qla2x00_mark_all_devices_lost(vha, 1); | |
950 | } | |
951 | ||
952 | if (vha->vp_idx) { | |
953 | atomic_set(&vha->vp_state, VP_FAILED); | |
954 | fc_vport_set_state(vha->fc_vport, | |
955 | FC_VPORT_FAILED); | |
faadc5e7 | 956 | qla2x00_mark_all_devices_lost(vha, 1); |
9764ff88 AV |
957 | } |
958 | ||
959 | vha->flags.management_server_logged_in = 0; | |
960 | ha->link_data_rate = PORT_SPEED_UNKNOWN; | |
961 | break; | |
962 | } | |
963 | ||
1da177e4 | 964 | /* |
cc3ef7bc | 965 | * If PORT UPDATE is global (received LIP_OCCURRED/LIP_RESET |
1da177e4 LT |
966 | * event etc. earlier indicating loop is down) then process |
967 | * it. Otherwise ignore it and Wait for RSCN to come in. | |
968 | */ | |
e315cd28 | 969 | atomic_set(&vha->loop_down_timer, 0); |
8e5a9484 CD |
970 | if (atomic_read(&vha->loop_state) != LOOP_DOWN && |
971 | atomic_read(&vha->loop_state) != LOOP_DEAD) { | |
7c3df132 SK |
972 | ql_dbg(ql_dbg_async, vha, 0x5011, |
973 | "Asynchronous PORT UPDATE ignored %04x/%04x/%04x.\n", | |
974 | mb[1], mb[2], mb[3]); | |
2d70c103 NB |
975 | |
976 | qlt_async_event(mb[0], vha, mb); | |
1da177e4 LT |
977 | break; |
978 | } | |
979 | ||
7c3df132 SK |
980 | ql_dbg(ql_dbg_async, vha, 0x5012, |
981 | "Port database changed %04x %04x %04x.\n", | |
982 | mb[1], mb[2], mb[3]); | |
1da177e4 LT |
983 | |
984 | /* | |
985 | * Mark all devices as missing so we will login again. | |
986 | */ | |
e315cd28 | 987 | atomic_set(&vha->loop_state, LOOP_UP); |
1da177e4 | 988 | |
e315cd28 | 989 | qla2x00_mark_all_devices_lost(vha, 1); |
1da177e4 | 990 | |
2d70c103 NB |
991 | if (vha->vp_idx == 0 && !qla_ini_mode_enabled(vha)) |
992 | set_bit(SCR_PENDING, &vha->dpc_flags); | |
993 | ||
e315cd28 AC |
994 | set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); |
995 | set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); | |
ded6411f | 996 | set_bit(VP_CONFIG_OK, &vha->vp_flags); |
2d70c103 NB |
997 | |
998 | qlt_async_event(mb[0], vha, mb); | |
1da177e4 LT |
999 | break; |
1000 | ||
1001 | case MBA_RSCN_UPDATE: /* State Change Registration */ | |
3c397400 | 1002 | /* Check if the Vport has issued a SCR */ |
e315cd28 | 1003 | if (vha->vp_idx && test_bit(VP_SCR_NEEDED, &vha->vp_flags)) |
3c397400 SJ |
1004 | break; |
1005 | /* Only handle SCNs for our Vport index. */ | |
0d6e61bc | 1006 | if (ha->flags.npiv_supported && vha->vp_idx != (mb[3] & 0xff)) |
3c397400 | 1007 | break; |
0d6e61bc | 1008 | |
7c3df132 SK |
1009 | ql_dbg(ql_dbg_async, vha, 0x5013, |
1010 | "RSCN database changed -- %04x %04x %04x.\n", | |
1011 | mb[1], mb[2], mb[3]); | |
1da177e4 | 1012 | |
59d72d87 | 1013 | rscn_entry = ((mb[1] & 0xff) << 16) | mb[2]; |
e315cd28 AC |
1014 | host_pid = (vha->d_id.b.domain << 16) | (vha->d_id.b.area << 8) |
1015 | | vha->d_id.b.al_pa; | |
1da177e4 | 1016 | if (rscn_entry == host_pid) { |
7c3df132 SK |
1017 | ql_dbg(ql_dbg_async, vha, 0x5014, |
1018 | "Ignoring RSCN update to local host " | |
1019 | "port ID (%06x).\n", host_pid); | |
1da177e4 LT |
1020 | break; |
1021 | } | |
1022 | ||
59d72d87 RA |
1023 | /* Ignore reserved bits from RSCN-payload. */ |
1024 | rscn_entry = ((mb[1] & 0x3ff) << 16) | mb[2]; | |
1da177e4 | 1025 | |
bb4cf5b7 CD |
1026 | /* Skip RSCNs for virtual ports on the same physical port */ |
1027 | if (qla2x00_is_a_vp_did(vha, rscn_entry)) | |
1028 | break; | |
1029 | ||
ef86cb20 CD |
1030 | /* |
1031 | * Search for the rport related to this RSCN entry and mark it | |
1032 | * as lost. | |
1033 | */ | |
1034 | list_for_each_entry(fcport, &vha->vp_fcports, list) { | |
1035 | if (atomic_read(&fcport->state) != FCS_ONLINE) | |
1036 | continue; | |
ef86cb20 CD |
1037 | if (fcport->d_id.b24 == rscn_entry) { |
1038 | qla2x00_mark_device_lost(vha, fcport, 0, 0); | |
1039 | break; | |
1040 | } | |
1041 | } | |
1042 | ||
e315cd28 AC |
1043 | atomic_set(&vha->loop_down_timer, 0); |
1044 | vha->flags.management_server_logged_in = 0; | |
1da177e4 | 1045 | |
e315cd28 AC |
1046 | set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); |
1047 | set_bit(RSCN_UPDATE, &vha->dpc_flags); | |
1048 | qla2x00_post_aen_work(vha, FCH_EVT_RSCN, rscn_entry); | |
1da177e4 LT |
1049 | break; |
1050 | ||
1051 | /* case MBA_RIO_RESPONSE: */ | |
1052 | case MBA_ZIO_RESPONSE: | |
7c3df132 SK |
1053 | ql_dbg(ql_dbg_async, vha, 0x5015, |
1054 | "[R|Z]IO update completion.\n"); | |
1da177e4 | 1055 | |
e428924c | 1056 | if (IS_FWI2_CAPABLE(ha)) |
2afa19a9 | 1057 | qla24xx_process_response_queue(vha, rsp); |
4fdfefe5 | 1058 | else |
73208dfd | 1059 | qla2x00_process_response_queue(rsp); |
1da177e4 | 1060 | break; |
9a853f71 AV |
1061 | |
1062 | case MBA_DISCARD_RND_FRAME: | |
7c3df132 SK |
1063 | ql_dbg(ql_dbg_async, vha, 0x5016, |
1064 | "Discard RND Frame -- %04x %04x %04x.\n", | |
1065 | mb[1], mb[2], mb[3]); | |
9a853f71 | 1066 | break; |
45ebeb56 AV |
1067 | |
1068 | case MBA_TRACE_NOTIFICATION: | |
7c3df132 SK |
1069 | ql_dbg(ql_dbg_async, vha, 0x5017, |
1070 | "Trace Notification -- %04x %04x.\n", mb[1], mb[2]); | |
45ebeb56 | 1071 | break; |
4d4df193 HK |
1072 | |
1073 | case MBA_ISP84XX_ALERT: | |
7c3df132 SK |
1074 | ql_dbg(ql_dbg_async, vha, 0x5018, |
1075 | "ISP84XX Alert Notification -- %04x %04x %04x.\n", | |
1076 | mb[1], mb[2], mb[3]); | |
4d4df193 HK |
1077 | |
1078 | spin_lock_irqsave(&ha->cs84xx->access_lock, flags); | |
1079 | switch (mb[1]) { | |
1080 | case A84_PANIC_RECOVERY: | |
7c3df132 SK |
1081 | ql_log(ql_log_info, vha, 0x5019, |
1082 | "Alert 84XX: panic recovery %04x %04x.\n", | |
1083 | mb[2], mb[3]); | |
4d4df193 HK |
1084 | break; |
1085 | case A84_OP_LOGIN_COMPLETE: | |
1086 | ha->cs84xx->op_fw_version = mb[3] << 16 | mb[2]; | |
7c3df132 SK |
1087 | ql_log(ql_log_info, vha, 0x501a, |
1088 | "Alert 84XX: firmware version %x.\n", | |
1089 | ha->cs84xx->op_fw_version); | |
4d4df193 HK |
1090 | break; |
1091 | case A84_DIAG_LOGIN_COMPLETE: | |
1092 | ha->cs84xx->diag_fw_version = mb[3] << 16 | mb[2]; | |
7c3df132 SK |
1093 | ql_log(ql_log_info, vha, 0x501b, |
1094 | "Alert 84XX: diagnostic firmware version %x.\n", | |
1095 | ha->cs84xx->diag_fw_version); | |
4d4df193 HK |
1096 | break; |
1097 | case A84_GOLD_LOGIN_COMPLETE: | |
1098 | ha->cs84xx->diag_fw_version = mb[3] << 16 | mb[2]; | |
1099 | ha->cs84xx->fw_update = 1; | |
7c3df132 SK |
1100 | ql_log(ql_log_info, vha, 0x501c, |
1101 | "Alert 84XX: gold firmware version %x.\n", | |
1102 | ha->cs84xx->gold_fw_version); | |
4d4df193 HK |
1103 | break; |
1104 | default: | |
7c3df132 SK |
1105 | ql_log(ql_log_warn, vha, 0x501d, |
1106 | "Alert 84xx: Invalid Alert %04x %04x %04x.\n", | |
4d4df193 HK |
1107 | mb[1], mb[2], mb[3]); |
1108 | } | |
1109 | spin_unlock_irqrestore(&ha->cs84xx->access_lock, flags); | |
1110 | break; | |
3a03eb79 | 1111 | case MBA_DCBX_START: |
7c3df132 SK |
1112 | ql_dbg(ql_dbg_async, vha, 0x501e, |
1113 | "DCBX Started -- %04x %04x %04x.\n", | |
1114 | mb[1], mb[2], mb[3]); | |
3a03eb79 AV |
1115 | break; |
1116 | case MBA_DCBX_PARAM_UPDATE: | |
7c3df132 SK |
1117 | ql_dbg(ql_dbg_async, vha, 0x501f, |
1118 | "DCBX Parameters Updated -- %04x %04x %04x.\n", | |
1119 | mb[1], mb[2], mb[3]); | |
3a03eb79 AV |
1120 | break; |
1121 | case MBA_FCF_CONF_ERR: | |
7c3df132 SK |
1122 | ql_dbg(ql_dbg_async, vha, 0x5020, |
1123 | "FCF Configuration Error -- %04x %04x %04x.\n", | |
1124 | mb[1], mb[2], mb[3]); | |
3a03eb79 | 1125 | break; |
3a03eb79 | 1126 | case MBA_IDC_NOTIFY: |
7ec0effd | 1127 | if (IS_QLA8031(vha->hw) || IS_QLA8044(ha)) { |
67b2a31f CD |
1128 | mb[4] = RD_REG_WORD(®24->mailbox4); |
1129 | if (((mb[2] & 0x7fff) == MBC_PORT_RESET || | |
1130 | (mb[2] & 0x7fff) == MBC_SET_PORT_CONFIG) && | |
1131 | (mb[4] & INTERNAL_LOOPBACK_MASK) != 0) { | |
8fcd6b8b | 1132 | set_bit(ISP_QUIESCE_NEEDED, &vha->dpc_flags); |
67b2a31f CD |
1133 | /* |
1134 | * Extend loop down timer since port is active. | |
1135 | */ | |
1136 | if (atomic_read(&vha->loop_state) == LOOP_DOWN) | |
1137 | atomic_set(&vha->loop_down_timer, | |
1138 | LOOP_DOWN_TIME); | |
8fcd6b8b CD |
1139 | qla2xxx_wake_dpc(vha); |
1140 | } | |
67b2a31f | 1141 | } |
8fcd6b8b | 1142 | case MBA_IDC_COMPLETE: |
9aaf2cea | 1143 | if (ha->notify_lb_portup_comp && !vha->vp_idx) |
f356bef1 CD |
1144 | complete(&ha->lb_portup_comp); |
1145 | /* Fallthru */ | |
3a03eb79 | 1146 | case MBA_IDC_TIME_EXT: |
7ec0effd AD |
1147 | if (IS_QLA81XX(vha->hw) || IS_QLA8031(vha->hw) || |
1148 | IS_QLA8044(ha)) | |
7d613ac6 SV |
1149 | qla81xx_idc_event(vha, mb[0], mb[1]); |
1150 | break; | |
1151 | ||
1152 | case MBA_IDC_AEN: | |
1153 | mb[4] = RD_REG_WORD(®24->mailbox4); | |
1154 | mb[5] = RD_REG_WORD(®24->mailbox5); | |
1155 | mb[6] = RD_REG_WORD(®24->mailbox6); | |
1156 | mb[7] = RD_REG_WORD(®24->mailbox7); | |
1157 | qla83xx_handle_8200_aen(vha, mb); | |
3a03eb79 | 1158 | break; |
7d613ac6 | 1159 | |
b5a340dd JC |
1160 | case MBA_DPORT_DIAGNOSTICS: |
1161 | ql_dbg(ql_dbg_async, vha, 0x5052, | |
ef55e513 | 1162 | "D-Port Diagnostics: %04x result=%s\n", |
ec891462 | 1163 | mb[0], |
b5a340dd | 1164 | mb[1] == 0 ? "start" : |
ef55e513 JC |
1165 | mb[1] == 1 ? "done (pass)" : |
1166 | mb[1] == 2 ? "done (error)" : "other"); | |
b5a340dd JC |
1167 | break; |
1168 | ||
a29b3dd7 JC |
1169 | case MBA_TEMPERATURE_ALERT: |
1170 | ql_dbg(ql_dbg_async, vha, 0x505e, | |
1171 | "TEMPERATURE ALERT: %04x %04x %04x\n", mb[1], mb[2], mb[3]); | |
1172 | if (mb[1] == 0x12) | |
1173 | schedule_work(&ha->board_disable); | |
1174 | break; | |
1175 | ||
6246b8a1 GM |
1176 | default: |
1177 | ql_dbg(ql_dbg_async, vha, 0x5057, | |
1178 | "Unknown AEN:%04x %04x %04x %04x\n", | |
1179 | mb[0], mb[1], mb[2], mb[3]); | |
1da177e4 | 1180 | } |
2c3dfe3f | 1181 | |
2d70c103 NB |
1182 | qlt_async_event(mb[0], vha, mb); |
1183 | ||
e315cd28 | 1184 | if (!vha->vp_idx && ha->num_vhosts) |
73208dfd | 1185 | qla2x00_alert_all_vps(rsp, mb); |
1da177e4 LT |
1186 | } |
1187 | ||
1188 | /** | |
1189 | * qla2x00_process_completed_request() - Process a Fast Post response. | |
1190 | * @ha: SCSI driver HA context | |
1191 | * @index: SRB index | |
1192 | */ | |
8ae6d9c7 | 1193 | void |
73208dfd | 1194 | qla2x00_process_completed_request(struct scsi_qla_host *vha, |
8ae6d9c7 | 1195 | struct req_que *req, uint32_t index) |
1da177e4 LT |
1196 | { |
1197 | srb_t *sp; | |
e315cd28 | 1198 | struct qla_hw_data *ha = vha->hw; |
1da177e4 LT |
1199 | |
1200 | /* Validate handle. */ | |
8d93f550 | 1201 | if (index >= req->num_outstanding_cmds) { |
7c3df132 SK |
1202 | ql_log(ql_log_warn, vha, 0x3014, |
1203 | "Invalid SCSI command index (%x).\n", index); | |
1da177e4 | 1204 | |
7ec0effd | 1205 | if (IS_P3P_TYPE(ha)) |
8f7daead GM |
1206 | set_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags); |
1207 | else | |
1208 | set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); | |
1da177e4 LT |
1209 | return; |
1210 | } | |
1211 | ||
e315cd28 | 1212 | sp = req->outstanding_cmds[index]; |
1da177e4 LT |
1213 | if (sp) { |
1214 | /* Free outstanding command slot. */ | |
e315cd28 | 1215 | req->outstanding_cmds[index] = NULL; |
1da177e4 | 1216 | |
1da177e4 | 1217 | /* Save ISP completion status */ |
9ba56b95 | 1218 | sp->done(ha, sp, DID_OK << 16); |
1da177e4 | 1219 | } else { |
7c3df132 | 1220 | ql_log(ql_log_warn, vha, 0x3016, "Invalid SCSI SRB.\n"); |
1da177e4 | 1221 | |
7ec0effd | 1222 | if (IS_P3P_TYPE(ha)) |
8f7daead GM |
1223 | set_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags); |
1224 | else | |
1225 | set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); | |
1da177e4 LT |
1226 | } |
1227 | } | |
1228 | ||
8ae6d9c7 | 1229 | srb_t * |
ac280b67 AV |
1230 | qla2x00_get_sp_from_handle(scsi_qla_host_t *vha, const char *func, |
1231 | struct req_que *req, void *iocb) | |
1232 | { | |
1233 | struct qla_hw_data *ha = vha->hw; | |
1234 | sts_entry_t *pkt = iocb; | |
1235 | srb_t *sp = NULL; | |
1236 | uint16_t index; | |
1237 | ||
1238 | index = LSW(pkt->handle); | |
8d93f550 | 1239 | if (index >= req->num_outstanding_cmds) { |
7c3df132 SK |
1240 | ql_log(ql_log_warn, vha, 0x5031, |
1241 | "Invalid command index (%x).\n", index); | |
7ec0effd | 1242 | if (IS_P3P_TYPE(ha)) |
8f7daead GM |
1243 | set_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags); |
1244 | else | |
1245 | set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); | |
ac280b67 AV |
1246 | goto done; |
1247 | } | |
1248 | sp = req->outstanding_cmds[index]; | |
1249 | if (!sp) { | |
7c3df132 SK |
1250 | ql_log(ql_log_warn, vha, 0x5032, |
1251 | "Invalid completion handle (%x) -- timed-out.\n", index); | |
ac280b67 AV |
1252 | return sp; |
1253 | } | |
1254 | if (sp->handle != index) { | |
7c3df132 SK |
1255 | ql_log(ql_log_warn, vha, 0x5033, |
1256 | "SRB handle (%x) mismatch %x.\n", sp->handle, index); | |
ac280b67 AV |
1257 | return NULL; |
1258 | } | |
9a069e19 | 1259 | |
ac280b67 | 1260 | req->outstanding_cmds[index] = NULL; |
9a069e19 | 1261 | |
ac280b67 AV |
1262 | done: |
1263 | return sp; | |
1264 | } | |
1265 | ||
1266 | static void | |
1267 | qla2x00_mbx_iocb_entry(scsi_qla_host_t *vha, struct req_que *req, | |
1268 | struct mbx_entry *mbx) | |
1269 | { | |
1270 | const char func[] = "MBX-IOCB"; | |
1271 | const char *type; | |
ac280b67 AV |
1272 | fc_port_t *fcport; |
1273 | srb_t *sp; | |
4916392b | 1274 | struct srb_iocb *lio; |
99b0bec7 | 1275 | uint16_t *data; |
5ff1d584 | 1276 | uint16_t status; |
ac280b67 AV |
1277 | |
1278 | sp = qla2x00_get_sp_from_handle(vha, func, req, mbx); | |
1279 | if (!sp) | |
1280 | return; | |
1281 | ||
9ba56b95 GM |
1282 | lio = &sp->u.iocb_cmd; |
1283 | type = sp->name; | |
ac280b67 | 1284 | fcport = sp->fcport; |
4916392b | 1285 | data = lio->u.logio.data; |
ac280b67 | 1286 | |
5ff1d584 | 1287 | data[0] = MBS_COMMAND_ERROR; |
4916392b | 1288 | data[1] = lio->u.logio.flags & SRB_LOGIN_RETRIED ? |
5ff1d584 | 1289 | QLA_LOGIO_LOGIN_RETRIED : 0; |
ac280b67 | 1290 | if (mbx->entry_status) { |
7c3df132 | 1291 | ql_dbg(ql_dbg_async, vha, 0x5043, |
cfb0919c | 1292 | "Async-%s error entry - hdl=%x portid=%02x%02x%02x " |
d3fa9e7d | 1293 | "entry-status=%x status=%x state-flag=%x " |
cfb0919c CD |
1294 | "status-flags=%x.\n", type, sp->handle, |
1295 | fcport->d_id.b.domain, fcport->d_id.b.area, | |
d3fa9e7d AV |
1296 | fcport->d_id.b.al_pa, mbx->entry_status, |
1297 | le16_to_cpu(mbx->status), le16_to_cpu(mbx->state_flags), | |
7c3df132 | 1298 | le16_to_cpu(mbx->status_flags)); |
d3fa9e7d | 1299 | |
cfb0919c | 1300 | ql_dump_buffer(ql_dbg_async + ql_dbg_buffer, vha, 0x5029, |
7c3df132 | 1301 | (uint8_t *)mbx, sizeof(*mbx)); |
ac280b67 | 1302 | |
99b0bec7 | 1303 | goto logio_done; |
ac280b67 AV |
1304 | } |
1305 | ||
5ff1d584 | 1306 | status = le16_to_cpu(mbx->status); |
9ba56b95 | 1307 | if (status == 0x30 && sp->type == SRB_LOGIN_CMD && |
5ff1d584 AV |
1308 | le16_to_cpu(mbx->mb0) == MBS_COMMAND_COMPLETE) |
1309 | status = 0; | |
1310 | if (!status && le16_to_cpu(mbx->mb0) == MBS_COMMAND_COMPLETE) { | |
7c3df132 | 1311 | ql_dbg(ql_dbg_async, vha, 0x5045, |
cfb0919c CD |
1312 | "Async-%s complete - hdl=%x portid=%02x%02x%02x mbx1=%x.\n", |
1313 | type, sp->handle, fcport->d_id.b.domain, | |
1314 | fcport->d_id.b.area, fcport->d_id.b.al_pa, | |
1315 | le16_to_cpu(mbx->mb1)); | |
ac280b67 AV |
1316 | |
1317 | data[0] = MBS_COMMAND_COMPLETE; | |
9ba56b95 | 1318 | if (sp->type == SRB_LOGIN_CMD) { |
99b0bec7 AV |
1319 | fcport->port_type = FCT_TARGET; |
1320 | if (le16_to_cpu(mbx->mb1) & BIT_0) | |
1321 | fcport->port_type = FCT_INITIATOR; | |
6ac52608 | 1322 | else if (le16_to_cpu(mbx->mb1) & BIT_1) |
99b0bec7 | 1323 | fcport->flags |= FCF_FCP2_DEVICE; |
5ff1d584 | 1324 | } |
99b0bec7 | 1325 | goto logio_done; |
ac280b67 AV |
1326 | } |
1327 | ||
1328 | data[0] = le16_to_cpu(mbx->mb0); | |
1329 | switch (data[0]) { | |
1330 | case MBS_PORT_ID_USED: | |
1331 | data[1] = le16_to_cpu(mbx->mb1); | |
1332 | break; | |
1333 | case MBS_LOOP_ID_USED: | |
1334 | break; | |
1335 | default: | |
1336 | data[0] = MBS_COMMAND_ERROR; | |
ac280b67 AV |
1337 | break; |
1338 | } | |
1339 | ||
7c3df132 | 1340 | ql_log(ql_log_warn, vha, 0x5046, |
cfb0919c CD |
1341 | "Async-%s failed - hdl=%x portid=%02x%02x%02x status=%x " |
1342 | "mb0=%x mb1=%x mb2=%x mb6=%x mb7=%x.\n", type, sp->handle, | |
1343 | fcport->d_id.b.domain, fcport->d_id.b.area, fcport->d_id.b.al_pa, | |
1344 | status, le16_to_cpu(mbx->mb0), le16_to_cpu(mbx->mb1), | |
ac280b67 | 1345 | le16_to_cpu(mbx->mb2), le16_to_cpu(mbx->mb6), |
7c3df132 | 1346 | le16_to_cpu(mbx->mb7)); |
ac280b67 | 1347 | |
99b0bec7 | 1348 | logio_done: |
9ba56b95 | 1349 | sp->done(vha, sp, 0); |
ac280b67 AV |
1350 | } |
1351 | ||
9bc4f4fb HZ |
1352 | static void |
1353 | qla2x00_ct_entry(scsi_qla_host_t *vha, struct req_que *req, | |
1354 | sts_entry_t *pkt, int iocb_type) | |
1355 | { | |
1356 | const char func[] = "CT_IOCB"; | |
1357 | const char *type; | |
9bc4f4fb | 1358 | srb_t *sp; |
9bc4f4fb | 1359 | struct fc_bsg_job *bsg_job; |
01e0e15c | 1360 | struct fc_bsg_reply *bsg_reply; |
9bc4f4fb | 1361 | uint16_t comp_status; |
9ba56b95 | 1362 | int res; |
9bc4f4fb HZ |
1363 | |
1364 | sp = qla2x00_get_sp_from_handle(vha, func, req, pkt); | |
1365 | if (!sp) | |
1366 | return; | |
1367 | ||
9ba56b95 | 1368 | bsg_job = sp->u.bsg_job; |
01e0e15c | 1369 | bsg_reply = bsg_job->reply; |
9bc4f4fb | 1370 | |
9ba56b95 | 1371 | type = "ct pass-through"; |
9bc4f4fb HZ |
1372 | |
1373 | comp_status = le16_to_cpu(pkt->comp_status); | |
1374 | ||
1375 | /* return FC_CTELS_STATUS_OK and leave the decoding of the ELS/CT | |
1376 | * fc payload to the caller | |
1377 | */ | |
01e0e15c | 1378 | bsg_reply->reply_data.ctels_reply.status = FC_CTELS_STATUS_OK; |
9bc4f4fb HZ |
1379 | bsg_job->reply_len = sizeof(struct fc_bsg_reply); |
1380 | ||
1381 | if (comp_status != CS_COMPLETE) { | |
1382 | if (comp_status == CS_DATA_UNDERRUN) { | |
9ba56b95 | 1383 | res = DID_OK << 16; |
01e0e15c | 1384 | bsg_reply->reply_payload_rcv_len = |
9bc4f4fb HZ |
1385 | le16_to_cpu(((sts_entry_t *)pkt)->rsp_info_len); |
1386 | ||
7c3df132 SK |
1387 | ql_log(ql_log_warn, vha, 0x5048, |
1388 | "CT pass-through-%s error " | |
9bc4f4fb | 1389 | "comp_status-status=0x%x total_byte = 0x%x.\n", |
7c3df132 | 1390 | type, comp_status, |
01e0e15c | 1391 | bsg_reply->reply_payload_rcv_len); |
9bc4f4fb | 1392 | } else { |
7c3df132 SK |
1393 | ql_log(ql_log_warn, vha, 0x5049, |
1394 | "CT pass-through-%s error " | |
1395 | "comp_status-status=0x%x.\n", type, comp_status); | |
9ba56b95 | 1396 | res = DID_ERROR << 16; |
01e0e15c | 1397 | bsg_reply->reply_payload_rcv_len = 0; |
9bc4f4fb | 1398 | } |
cfb0919c | 1399 | ql_dump_buffer(ql_dbg_async + ql_dbg_buffer, vha, 0x5035, |
7c3df132 | 1400 | (uint8_t *)pkt, sizeof(*pkt)); |
9bc4f4fb | 1401 | } else { |
9ba56b95 | 1402 | res = DID_OK << 16; |
01e0e15c | 1403 | bsg_reply->reply_payload_rcv_len = |
9bc4f4fb HZ |
1404 | bsg_job->reply_payload.payload_len; |
1405 | bsg_job->reply_len = 0; | |
1406 | } | |
1407 | ||
9ba56b95 | 1408 | sp->done(vha, sp, res); |
9bc4f4fb HZ |
1409 | } |
1410 | ||
9a069e19 GM |
1411 | static void |
1412 | qla24xx_els_ct_entry(scsi_qla_host_t *vha, struct req_que *req, | |
1413 | struct sts_entry_24xx *pkt, int iocb_type) | |
1414 | { | |
1415 | const char func[] = "ELS_CT_IOCB"; | |
1416 | const char *type; | |
9a069e19 | 1417 | srb_t *sp; |
9a069e19 | 1418 | struct fc_bsg_job *bsg_job; |
01e0e15c | 1419 | struct fc_bsg_reply *bsg_reply; |
9a069e19 GM |
1420 | uint16_t comp_status; |
1421 | uint32_t fw_status[3]; | |
1422 | uint8_t* fw_sts_ptr; | |
9ba56b95 | 1423 | int res; |
9a069e19 GM |
1424 | |
1425 | sp = qla2x00_get_sp_from_handle(vha, func, req, pkt); | |
1426 | if (!sp) | |
1427 | return; | |
9ba56b95 | 1428 | bsg_job = sp->u.bsg_job; |
01e0e15c | 1429 | bsg_reply = bsg_job->reply; |
9a069e19 GM |
1430 | |
1431 | type = NULL; | |
9ba56b95 | 1432 | switch (sp->type) { |
9a069e19 GM |
1433 | case SRB_ELS_CMD_RPT: |
1434 | case SRB_ELS_CMD_HST: | |
1435 | type = "els"; | |
1436 | break; | |
1437 | case SRB_CT_CMD: | |
1438 | type = "ct pass-through"; | |
1439 | break; | |
6eb54715 HM |
1440 | case SRB_ELS_DCMD: |
1441 | type = "Driver ELS logo"; | |
1442 | ql_dbg(ql_dbg_user, vha, 0x5047, | |
1443 | "Completing %s: (%p) type=%d.\n", type, sp, sp->type); | |
1444 | sp->done(vha, sp, 0); | |
1445 | return; | |
9a069e19 | 1446 | default: |
37fed3ee | 1447 | ql_dbg(ql_dbg_user, vha, 0x503e, |
9ba56b95 | 1448 | "Unrecognized SRB: (%p) type=%d.\n", sp, sp->type); |
9a069e19 GM |
1449 | return; |
1450 | } | |
1451 | ||
1452 | comp_status = fw_status[0] = le16_to_cpu(pkt->comp_status); | |
1453 | fw_status[1] = le16_to_cpu(((struct els_sts_entry_24xx*)pkt)->error_subcode_1); | |
1454 | fw_status[2] = le16_to_cpu(((struct els_sts_entry_24xx*)pkt)->error_subcode_2); | |
1455 | ||
1456 | /* return FC_CTELS_STATUS_OK and leave the decoding of the ELS/CT | |
1457 | * fc payload to the caller | |
1458 | */ | |
01e0e15c | 1459 | bsg_reply->reply_data.ctels_reply.status = FC_CTELS_STATUS_OK; |
9a069e19 GM |
1460 | bsg_job->reply_len = sizeof(struct fc_bsg_reply) + sizeof(fw_status); |
1461 | ||
1462 | if (comp_status != CS_COMPLETE) { | |
1463 | if (comp_status == CS_DATA_UNDERRUN) { | |
9ba56b95 | 1464 | res = DID_OK << 16; |
01e0e15c | 1465 | bsg_reply->reply_payload_rcv_len = |
9ba56b95 | 1466 | le16_to_cpu(((struct els_sts_entry_24xx *)pkt)->total_byte_count); |
9a069e19 | 1467 | |
37fed3ee | 1468 | ql_dbg(ql_dbg_user, vha, 0x503f, |
cfb0919c | 1469 | "ELS-CT pass-through-%s error hdl=%x comp_status-status=0x%x " |
9a069e19 | 1470 | "error subcode 1=0x%x error subcode 2=0x%x total_byte = 0x%x.\n", |
cfb0919c | 1471 | type, sp->handle, comp_status, fw_status[1], fw_status[2], |
7c3df132 SK |
1472 | le16_to_cpu(((struct els_sts_entry_24xx *) |
1473 | pkt)->total_byte_count)); | |
9a069e19 GM |
1474 | fw_sts_ptr = ((uint8_t*)bsg_job->req->sense) + sizeof(struct fc_bsg_reply); |
1475 | memcpy( fw_sts_ptr, fw_status, sizeof(fw_status)); | |
1476 | } | |
1477 | else { | |
37fed3ee | 1478 | ql_dbg(ql_dbg_user, vha, 0x5040, |
cfb0919c | 1479 | "ELS-CT pass-through-%s error hdl=%x comp_status-status=0x%x " |
9a069e19 | 1480 | "error subcode 1=0x%x error subcode 2=0x%x.\n", |
cfb0919c | 1481 | type, sp->handle, comp_status, |
7c3df132 SK |
1482 | le16_to_cpu(((struct els_sts_entry_24xx *) |
1483 | pkt)->error_subcode_1), | |
1484 | le16_to_cpu(((struct els_sts_entry_24xx *) | |
1485 | pkt)->error_subcode_2)); | |
9ba56b95 | 1486 | res = DID_ERROR << 16; |
01e0e15c | 1487 | bsg_reply->reply_payload_rcv_len = 0; |
9a069e19 GM |
1488 | fw_sts_ptr = ((uint8_t*)bsg_job->req->sense) + sizeof(struct fc_bsg_reply); |
1489 | memcpy( fw_sts_ptr, fw_status, sizeof(fw_status)); | |
1490 | } | |
37fed3ee | 1491 | ql_dump_buffer(ql_dbg_user + ql_dbg_buffer, vha, 0x5056, |
7c3df132 | 1492 | (uint8_t *)pkt, sizeof(*pkt)); |
9a069e19 GM |
1493 | } |
1494 | else { | |
9ba56b95 | 1495 | res = DID_OK << 16; |
01e0e15c | 1496 | bsg_reply->reply_payload_rcv_len = bsg_job->reply_payload.payload_len; |
9a069e19 GM |
1497 | bsg_job->reply_len = 0; |
1498 | } | |
1499 | ||
9ba56b95 | 1500 | sp->done(vha, sp, res); |
9a069e19 GM |
1501 | } |
1502 | ||
ac280b67 AV |
1503 | static void |
1504 | qla24xx_logio_entry(scsi_qla_host_t *vha, struct req_que *req, | |
1505 | struct logio_entry_24xx *logio) | |
1506 | { | |
1507 | const char func[] = "LOGIO-IOCB"; | |
1508 | const char *type; | |
ac280b67 AV |
1509 | fc_port_t *fcport; |
1510 | srb_t *sp; | |
4916392b | 1511 | struct srb_iocb *lio; |
99b0bec7 | 1512 | uint16_t *data; |
ac280b67 AV |
1513 | uint32_t iop[2]; |
1514 | ||
1515 | sp = qla2x00_get_sp_from_handle(vha, func, req, logio); | |
1516 | if (!sp) | |
1517 | return; | |
1518 | ||
9ba56b95 GM |
1519 | lio = &sp->u.iocb_cmd; |
1520 | type = sp->name; | |
ac280b67 | 1521 | fcport = sp->fcport; |
4916392b | 1522 | data = lio->u.logio.data; |
ac280b67 | 1523 | |
5ff1d584 | 1524 | data[0] = MBS_COMMAND_ERROR; |
4916392b | 1525 | data[1] = lio->u.logio.flags & SRB_LOGIN_RETRIED ? |
5ff1d584 | 1526 | QLA_LOGIO_LOGIN_RETRIED : 0; |
ac280b67 | 1527 | if (logio->entry_status) { |
5e19ed90 | 1528 | ql_log(ql_log_warn, fcport->vha, 0x5034, |
cfb0919c | 1529 | "Async-%s error entry - hdl=%x" |
d3fa9e7d | 1530 | "portid=%02x%02x%02x entry-status=%x.\n", |
cfb0919c CD |
1531 | type, sp->handle, fcport->d_id.b.domain, |
1532 | fcport->d_id.b.area, fcport->d_id.b.al_pa, | |
1533 | logio->entry_status); | |
1534 | ql_dump_buffer(ql_dbg_async + ql_dbg_buffer, vha, 0x504d, | |
7c3df132 | 1535 | (uint8_t *)logio, sizeof(*logio)); |
ac280b67 | 1536 | |
99b0bec7 | 1537 | goto logio_done; |
ac280b67 AV |
1538 | } |
1539 | ||
1540 | if (le16_to_cpu(logio->comp_status) == CS_COMPLETE) { | |
5e19ed90 | 1541 | ql_dbg(ql_dbg_async, fcport->vha, 0x5036, |
cfb0919c CD |
1542 | "Async-%s complete - hdl=%x portid=%02x%02x%02x " |
1543 | "iop0=%x.\n", type, sp->handle, fcport->d_id.b.domain, | |
1544 | fcport->d_id.b.area, fcport->d_id.b.al_pa, | |
7c3df132 | 1545 | le32_to_cpu(logio->io_parameter[0])); |
ac280b67 AV |
1546 | |
1547 | data[0] = MBS_COMMAND_COMPLETE; | |
9ba56b95 | 1548 | if (sp->type != SRB_LOGIN_CMD) |
99b0bec7 | 1549 | goto logio_done; |
ac280b67 AV |
1550 | |
1551 | iop[0] = le32_to_cpu(logio->io_parameter[0]); | |
1552 | if (iop[0] & BIT_4) { | |
1553 | fcport->port_type = FCT_TARGET; | |
1554 | if (iop[0] & BIT_8) | |
8474f3a0 | 1555 | fcport->flags |= FCF_FCP2_DEVICE; |
b0cd579c | 1556 | } else if (iop[0] & BIT_5) |
ac280b67 | 1557 | fcport->port_type = FCT_INITIATOR; |
b0cd579c | 1558 | |
2d70c103 NB |
1559 | if (iop[0] & BIT_7) |
1560 | fcport->flags |= FCF_CONF_COMP_SUPPORTED; | |
1561 | ||
ac280b67 AV |
1562 | if (logio->io_parameter[7] || logio->io_parameter[8]) |
1563 | fcport->supported_classes |= FC_COS_CLASS2; | |
1564 | if (logio->io_parameter[9] || logio->io_parameter[10]) | |
1565 | fcport->supported_classes |= FC_COS_CLASS3; | |
1566 | ||
99b0bec7 | 1567 | goto logio_done; |
ac280b67 AV |
1568 | } |
1569 | ||
1570 | iop[0] = le32_to_cpu(logio->io_parameter[0]); | |
1571 | iop[1] = le32_to_cpu(logio->io_parameter[1]); | |
1572 | switch (iop[0]) { | |
1573 | case LSC_SCODE_PORTID_USED: | |
1574 | data[0] = MBS_PORT_ID_USED; | |
1575 | data[1] = LSW(iop[1]); | |
1576 | break; | |
1577 | case LSC_SCODE_NPORT_USED: | |
1578 | data[0] = MBS_LOOP_ID_USED; | |
1579 | break; | |
ac280b67 AV |
1580 | default: |
1581 | data[0] = MBS_COMMAND_ERROR; | |
ac280b67 AV |
1582 | break; |
1583 | } | |
1584 | ||
5e19ed90 | 1585 | ql_dbg(ql_dbg_async, fcport->vha, 0x5037, |
cfb0919c CD |
1586 | "Async-%s failed - hdl=%x portid=%02x%02x%02x comp=%x " |
1587 | "iop0=%x iop1=%x.\n", type, sp->handle, fcport->d_id.b.domain, | |
d3fa9e7d | 1588 | fcport->d_id.b.area, fcport->d_id.b.al_pa, |
ac280b67 AV |
1589 | le16_to_cpu(logio->comp_status), |
1590 | le32_to_cpu(logio->io_parameter[0]), | |
7c3df132 | 1591 | le32_to_cpu(logio->io_parameter[1])); |
ac280b67 | 1592 | |
99b0bec7 | 1593 | logio_done: |
9ba56b95 | 1594 | sp->done(vha, sp, 0); |
ac280b67 AV |
1595 | } |
1596 | ||
3822263e | 1597 | static void |
faef62d1 | 1598 | qla24xx_tm_iocb_entry(scsi_qla_host_t *vha, struct req_que *req, void *tsk) |
3822263e MI |
1599 | { |
1600 | const char func[] = "TMF-IOCB"; | |
1601 | const char *type; | |
1602 | fc_port_t *fcport; | |
1603 | srb_t *sp; | |
1604 | struct srb_iocb *iocb; | |
3822263e | 1605 | struct sts_entry_24xx *sts = (struct sts_entry_24xx *)tsk; |
3822263e MI |
1606 | |
1607 | sp = qla2x00_get_sp_from_handle(vha, func, req, tsk); | |
1608 | if (!sp) | |
1609 | return; | |
1610 | ||
9ba56b95 GM |
1611 | iocb = &sp->u.iocb_cmd; |
1612 | type = sp->name; | |
3822263e | 1613 | fcport = sp->fcport; |
faef62d1 | 1614 | iocb->u.tmf.data = QLA_SUCCESS; |
3822263e MI |
1615 | |
1616 | if (sts->entry_status) { | |
5e19ed90 | 1617 | ql_log(ql_log_warn, fcport->vha, 0x5038, |
cfb0919c CD |
1618 | "Async-%s error - hdl=%x entry-status(%x).\n", |
1619 | type, sp->handle, sts->entry_status); | |
faef62d1 | 1620 | iocb->u.tmf.data = QLA_FUNCTION_FAILED; |
ad950360 | 1621 | } else if (sts->comp_status != cpu_to_le16(CS_COMPLETE)) { |
5e19ed90 | 1622 | ql_log(ql_log_warn, fcport->vha, 0x5039, |
cfb0919c CD |
1623 | "Async-%s error - hdl=%x completion status(%x).\n", |
1624 | type, sp->handle, sts->comp_status); | |
faef62d1 AB |
1625 | iocb->u.tmf.data = QLA_FUNCTION_FAILED; |
1626 | } else if ((le16_to_cpu(sts->scsi_status) & | |
3822263e | 1627 | SS_RESPONSE_INFO_LEN_VALID)) { |
faef62d1 AB |
1628 | if (le32_to_cpu(sts->rsp_data_len) < 4) { |
1629 | ql_log(ql_log_warn, fcport->vha, 0x503b, | |
1630 | "Async-%s error - hdl=%x not enough response(%d).\n", | |
1631 | type, sp->handle, sts->rsp_data_len); | |
1632 | } else if (sts->data[3]) { | |
1633 | ql_log(ql_log_warn, fcport->vha, 0x503c, | |
1634 | "Async-%s error - hdl=%x response(%x).\n", | |
1635 | type, sp->handle, sts->data[3]); | |
8d2b21db | 1636 | iocb->u.tmf.data = QLA_FUNCTION_FAILED; |
faef62d1 | 1637 | } |
3822263e MI |
1638 | } |
1639 | ||
faef62d1 | 1640 | if (iocb->u.tmf.data != QLA_SUCCESS) |
7c3df132 SK |
1641 | ql_dump_buffer(ql_dbg_async + ql_dbg_buffer, vha, 0x5055, |
1642 | (uint8_t *)sts, sizeof(*sts)); | |
3822263e | 1643 | |
9ba56b95 | 1644 | sp->done(vha, sp, 0); |
3822263e MI |
1645 | } |
1646 | ||
1da177e4 LT |
1647 | /** |
1648 | * qla2x00_process_response_queue() - Process response queue entries. | |
1649 | * @ha: SCSI driver HA context | |
1650 | */ | |
1651 | void | |
73208dfd | 1652 | qla2x00_process_response_queue(struct rsp_que *rsp) |
1da177e4 | 1653 | { |
73208dfd AC |
1654 | struct scsi_qla_host *vha; |
1655 | struct qla_hw_data *ha = rsp->hw; | |
3d71644c | 1656 | struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; |
1da177e4 LT |
1657 | sts_entry_t *pkt; |
1658 | uint16_t handle_cnt; | |
1659 | uint16_t cnt; | |
73208dfd | 1660 | |
2afa19a9 | 1661 | vha = pci_get_drvdata(ha->pdev); |
1da177e4 | 1662 | |
e315cd28 | 1663 | if (!vha->flags.online) |
1da177e4 LT |
1664 | return; |
1665 | ||
e315cd28 AC |
1666 | while (rsp->ring_ptr->signature != RESPONSE_PROCESSED) { |
1667 | pkt = (sts_entry_t *)rsp->ring_ptr; | |
1da177e4 | 1668 | |
e315cd28 AC |
1669 | rsp->ring_index++; |
1670 | if (rsp->ring_index == rsp->length) { | |
1671 | rsp->ring_index = 0; | |
1672 | rsp->ring_ptr = rsp->ring; | |
1da177e4 | 1673 | } else { |
e315cd28 | 1674 | rsp->ring_ptr++; |
1da177e4 LT |
1675 | } |
1676 | ||
1677 | if (pkt->entry_status != 0) { | |
73208dfd | 1678 | qla2x00_error_entry(vha, rsp, pkt); |
1da177e4 LT |
1679 | ((response_t *)pkt)->signature = RESPONSE_PROCESSED; |
1680 | wmb(); | |
1681 | continue; | |
1682 | } | |
1683 | ||
1684 | switch (pkt->entry_type) { | |
1685 | case STATUS_TYPE: | |
73208dfd | 1686 | qla2x00_status_entry(vha, rsp, pkt); |
1da177e4 LT |
1687 | break; |
1688 | case STATUS_TYPE_21: | |
1689 | handle_cnt = ((sts21_entry_t *)pkt)->handle_count; | |
1690 | for (cnt = 0; cnt < handle_cnt; cnt++) { | |
73208dfd | 1691 | qla2x00_process_completed_request(vha, rsp->req, |
1da177e4 LT |
1692 | ((sts21_entry_t *)pkt)->handle[cnt]); |
1693 | } | |
1694 | break; | |
1695 | case STATUS_TYPE_22: | |
1696 | handle_cnt = ((sts22_entry_t *)pkt)->handle_count; | |
1697 | for (cnt = 0; cnt < handle_cnt; cnt++) { | |
73208dfd | 1698 | qla2x00_process_completed_request(vha, rsp->req, |
1da177e4 LT |
1699 | ((sts22_entry_t *)pkt)->handle[cnt]); |
1700 | } | |
1701 | break; | |
1702 | case STATUS_CONT_TYPE: | |
2afa19a9 | 1703 | qla2x00_status_cont_entry(rsp, (sts_cont_entry_t *)pkt); |
1da177e4 | 1704 | break; |
ac280b67 AV |
1705 | case MBX_IOCB_TYPE: |
1706 | qla2x00_mbx_iocb_entry(vha, rsp->req, | |
1707 | (struct mbx_entry *)pkt); | |
3822263e | 1708 | break; |
9bc4f4fb HZ |
1709 | case CT_IOCB_TYPE: |
1710 | qla2x00_ct_entry(vha, rsp->req, pkt, CT_IOCB_TYPE); | |
1711 | break; | |
1da177e4 LT |
1712 | default: |
1713 | /* Type Not Supported. */ | |
7c3df132 SK |
1714 | ql_log(ql_log_warn, vha, 0x504a, |
1715 | "Received unknown response pkt type %x " | |
1da177e4 | 1716 | "entry status=%x.\n", |
7c3df132 | 1717 | pkt->entry_type, pkt->entry_status); |
1da177e4 LT |
1718 | break; |
1719 | } | |
1720 | ((response_t *)pkt)->signature = RESPONSE_PROCESSED; | |
1721 | wmb(); | |
1722 | } | |
1723 | ||
1724 | /* Adjust ring index */ | |
e315cd28 | 1725 | WRT_REG_WORD(ISP_RSP_Q_OUT(ha, reg), rsp->ring_index); |
1da177e4 LT |
1726 | } |
1727 | ||
4733fcb1 | 1728 | static inline void |
5544213b | 1729 | qla2x00_handle_sense(srb_t *sp, uint8_t *sense_data, uint32_t par_sense_len, |
9ba56b95 | 1730 | uint32_t sense_len, struct rsp_que *rsp, int res) |
4733fcb1 | 1731 | { |
7c3df132 | 1732 | struct scsi_qla_host *vha = sp->fcport->vha; |
9ba56b95 GM |
1733 | struct scsi_cmnd *cp = GET_CMD_SP(sp); |
1734 | uint32_t track_sense_len; | |
4733fcb1 AV |
1735 | |
1736 | if (sense_len >= SCSI_SENSE_BUFFERSIZE) | |
1737 | sense_len = SCSI_SENSE_BUFFERSIZE; | |
1738 | ||
9ba56b95 GM |
1739 | SET_CMD_SENSE_LEN(sp, sense_len); |
1740 | SET_CMD_SENSE_PTR(sp, cp->sense_buffer); | |
1741 | track_sense_len = sense_len; | |
1742 | ||
1743 | if (sense_len > par_sense_len) | |
5544213b | 1744 | sense_len = par_sense_len; |
4733fcb1 AV |
1745 | |
1746 | memcpy(cp->sense_buffer, sense_data, sense_len); | |
1747 | ||
9ba56b95 GM |
1748 | SET_CMD_SENSE_PTR(sp, cp->sense_buffer + sense_len); |
1749 | track_sense_len -= sense_len; | |
1750 | SET_CMD_SENSE_LEN(sp, track_sense_len); | |
1751 | ||
1752 | if (track_sense_len != 0) { | |
2afa19a9 | 1753 | rsp->status_srb = sp; |
9ba56b95 GM |
1754 | cp->result = res; |
1755 | } | |
4733fcb1 | 1756 | |
cfb0919c CD |
1757 | if (sense_len) { |
1758 | ql_dbg(ql_dbg_io + ql_dbg_buffer, vha, 0x301c, | |
9cb78c16 | 1759 | "Check condition Sense data, nexus%ld:%d:%llu cmd=%p.\n", |
cfb0919c CD |
1760 | sp->fcport->vha->host_no, cp->device->id, cp->device->lun, |
1761 | cp); | |
7c3df132 SK |
1762 | ql_dump_buffer(ql_dbg_io + ql_dbg_buffer, vha, 0x302b, |
1763 | cp->sense_buffer, sense_len); | |
cfb0919c | 1764 | } |
4733fcb1 AV |
1765 | } |
1766 | ||
bad75002 AE |
1767 | struct scsi_dif_tuple { |
1768 | __be16 guard; /* Checksum */ | |
d6a03581 | 1769 | __be16 app_tag; /* APPL identifier */ |
bad75002 AE |
1770 | __be32 ref_tag; /* Target LBA or indirect LBA */ |
1771 | }; | |
1772 | ||
1773 | /* | |
1774 | * Checks the guard or meta-data for the type of error | |
1775 | * detected by the HBA. In case of errors, we set the | |
1776 | * ASC/ASCQ fields in the sense buffer with ILLEGAL_REQUEST | |
1777 | * to indicate to the kernel that the HBA detected error. | |
1778 | */ | |
8cb2049c | 1779 | static inline int |
bad75002 AE |
1780 | qla2x00_handle_dif_error(srb_t *sp, struct sts_entry_24xx *sts24) |
1781 | { | |
7c3df132 | 1782 | struct scsi_qla_host *vha = sp->fcport->vha; |
9ba56b95 | 1783 | struct scsi_cmnd *cmd = GET_CMD_SP(sp); |
8cb2049c AE |
1784 | uint8_t *ap = &sts24->data[12]; |
1785 | uint8_t *ep = &sts24->data[20]; | |
bad75002 AE |
1786 | uint32_t e_ref_tag, a_ref_tag; |
1787 | uint16_t e_app_tag, a_app_tag; | |
1788 | uint16_t e_guard, a_guard; | |
1789 | ||
8cb2049c AE |
1790 | /* |
1791 | * swab32 of the "data" field in the beginning of qla2x00_status_entry() | |
1792 | * would make guard field appear at offset 2 | |
1793 | */ | |
1794 | a_guard = le16_to_cpu(*(uint16_t *)(ap + 2)); | |
1795 | a_app_tag = le16_to_cpu(*(uint16_t *)(ap + 0)); | |
1796 | a_ref_tag = le32_to_cpu(*(uint32_t *)(ap + 4)); | |
1797 | e_guard = le16_to_cpu(*(uint16_t *)(ep + 2)); | |
1798 | e_app_tag = le16_to_cpu(*(uint16_t *)(ep + 0)); | |
1799 | e_ref_tag = le32_to_cpu(*(uint32_t *)(ep + 4)); | |
bad75002 | 1800 | |
7c3df132 SK |
1801 | ql_dbg(ql_dbg_io, vha, 0x3023, |
1802 | "iocb(s) %p Returned STATUS.\n", sts24); | |
bad75002 | 1803 | |
7c3df132 SK |
1804 | ql_dbg(ql_dbg_io, vha, 0x3024, |
1805 | "DIF ERROR in cmd 0x%x lba 0x%llx act ref" | |
bad75002 | 1806 | " tag=0x%x, exp ref_tag=0x%x, act app tag=0x%x, exp app" |
7c3df132 | 1807 | " tag=0x%x, act guard=0x%x, exp guard=0x%x.\n", |
bad75002 | 1808 | cmd->cmnd[0], (u64)scsi_get_lba(cmd), a_ref_tag, e_ref_tag, |
7c3df132 | 1809 | a_app_tag, e_app_tag, a_guard, e_guard); |
bad75002 | 1810 | |
8cb2049c AE |
1811 | /* |
1812 | * Ignore sector if: | |
1813 | * For type 3: ref & app tag is all 'f's | |
1814 | * For type 0,1,2: app tag is all 'f's | |
1815 | */ | |
1816 | if ((a_app_tag == 0xffff) && | |
1817 | ((scsi_get_prot_type(cmd) != SCSI_PROT_DIF_TYPE3) || | |
1818 | (a_ref_tag == 0xffffffff))) { | |
1819 | uint32_t blocks_done, resid; | |
1820 | sector_t lba_s = scsi_get_lba(cmd); | |
1821 | ||
1822 | /* 2TB boundary case covered automatically with this */ | |
1823 | blocks_done = e_ref_tag - (uint32_t)lba_s + 1; | |
1824 | ||
1825 | resid = scsi_bufflen(cmd) - (blocks_done * | |
1826 | cmd->device->sector_size); | |
1827 | ||
1828 | scsi_set_resid(cmd, resid); | |
1829 | cmd->result = DID_OK << 16; | |
1830 | ||
1831 | /* Update protection tag */ | |
1832 | if (scsi_prot_sg_count(cmd)) { | |
1833 | uint32_t i, j = 0, k = 0, num_ent; | |
1834 | struct scatterlist *sg; | |
27c0e83b | 1835 | struct t10_pi_tuple *spt; |
8cb2049c AE |
1836 | |
1837 | /* Patch the corresponding protection tags */ | |
1838 | scsi_for_each_prot_sg(cmd, sg, | |
1839 | scsi_prot_sg_count(cmd), i) { | |
1840 | num_ent = sg_dma_len(sg) / 8; | |
1841 | if (k + num_ent < blocks_done) { | |
1842 | k += num_ent; | |
1843 | continue; | |
1844 | } | |
1845 | j = blocks_done - k - 1; | |
1846 | k = blocks_done; | |
1847 | break; | |
1848 | } | |
1849 | ||
1850 | if (k != blocks_done) { | |
cfb0919c | 1851 | ql_log(ql_log_warn, vha, 0x302f, |
8ec9c7fb RD |
1852 | "unexpected tag values tag:lba=%x:%llx)\n", |
1853 | e_ref_tag, (unsigned long long)lba_s); | |
8cb2049c AE |
1854 | return 1; |
1855 | } | |
1856 | ||
1857 | spt = page_address(sg_page(sg)) + sg->offset; | |
1858 | spt += j; | |
1859 | ||
1860 | spt->app_tag = 0xffff; | |
1861 | if (scsi_get_prot_type(cmd) == SCSI_PROT_DIF_TYPE3) | |
1862 | spt->ref_tag = 0xffffffff; | |
1863 | } | |
1864 | ||
1865 | return 0; | |
1866 | } | |
1867 | ||
bad75002 AE |
1868 | /* check guard */ |
1869 | if (e_guard != a_guard) { | |
1870 | scsi_build_sense_buffer(1, cmd->sense_buffer, ILLEGAL_REQUEST, | |
1871 | 0x10, 0x1); | |
1872 | set_driver_byte(cmd, DRIVER_SENSE); | |
1873 | set_host_byte(cmd, DID_ABORT); | |
1874 | cmd->result |= SAM_STAT_CHECK_CONDITION << 1; | |
8cb2049c | 1875 | return 1; |
bad75002 AE |
1876 | } |
1877 | ||
e02587d7 AE |
1878 | /* check ref tag */ |
1879 | if (e_ref_tag != a_ref_tag) { | |
bad75002 | 1880 | scsi_build_sense_buffer(1, cmd->sense_buffer, ILLEGAL_REQUEST, |
e02587d7 | 1881 | 0x10, 0x3); |
bad75002 AE |
1882 | set_driver_byte(cmd, DRIVER_SENSE); |
1883 | set_host_byte(cmd, DID_ABORT); | |
1884 | cmd->result |= SAM_STAT_CHECK_CONDITION << 1; | |
8cb2049c | 1885 | return 1; |
bad75002 AE |
1886 | } |
1887 | ||
e02587d7 AE |
1888 | /* check appl tag */ |
1889 | if (e_app_tag != a_app_tag) { | |
bad75002 | 1890 | scsi_build_sense_buffer(1, cmd->sense_buffer, ILLEGAL_REQUEST, |
e02587d7 | 1891 | 0x10, 0x2); |
bad75002 AE |
1892 | set_driver_byte(cmd, DRIVER_SENSE); |
1893 | set_host_byte(cmd, DID_ABORT); | |
1894 | cmd->result |= SAM_STAT_CHECK_CONDITION << 1; | |
8cb2049c | 1895 | return 1; |
bad75002 | 1896 | } |
e02587d7 | 1897 | |
8cb2049c | 1898 | return 1; |
bad75002 AE |
1899 | } |
1900 | ||
a9b6f722 SK |
1901 | static void |
1902 | qla25xx_process_bidir_status_iocb(scsi_qla_host_t *vha, void *pkt, | |
1903 | struct req_que *req, uint32_t index) | |
1904 | { | |
1905 | struct qla_hw_data *ha = vha->hw; | |
1906 | srb_t *sp; | |
1907 | uint16_t comp_status; | |
1908 | uint16_t scsi_status; | |
1909 | uint16_t thread_id; | |
1910 | uint32_t rval = EXT_STATUS_OK; | |
1911 | struct fc_bsg_job *bsg_job = NULL; | |
01e0e15c JT |
1912 | struct fc_bsg_request *bsg_request; |
1913 | struct fc_bsg_reply *bsg_reply; | |
a9b6f722 SK |
1914 | sts_entry_t *sts; |
1915 | struct sts_entry_24xx *sts24; | |
1916 | sts = (sts_entry_t *) pkt; | |
1917 | sts24 = (struct sts_entry_24xx *) pkt; | |
1918 | ||
1919 | /* Validate handle. */ | |
8d93f550 | 1920 | if (index >= req->num_outstanding_cmds) { |
a9b6f722 SK |
1921 | ql_log(ql_log_warn, vha, 0x70af, |
1922 | "Invalid SCSI completion handle 0x%x.\n", index); | |
1923 | set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); | |
1924 | return; | |
1925 | } | |
1926 | ||
1927 | sp = req->outstanding_cmds[index]; | |
01e0e15c | 1928 | if (!sp) { |
a9b6f722 SK |
1929 | ql_log(ql_log_warn, vha, 0x70b0, |
1930 | "Req:%d: Invalid ISP SCSI completion handle(0x%x)\n", | |
1931 | req->id, index); | |
1932 | ||
1933 | set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); | |
1934 | return; | |
1935 | } | |
1936 | ||
01e0e15c JT |
1937 | /* Free outstanding command slot. */ |
1938 | req->outstanding_cmds[index] = NULL; | |
1939 | bsg_job = sp->u.bsg_job; | |
1940 | bsg_request = bsg_job->request; | |
1941 | bsg_reply = bsg_job->reply; | |
1942 | ||
a9b6f722 SK |
1943 | if (IS_FWI2_CAPABLE(ha)) { |
1944 | comp_status = le16_to_cpu(sts24->comp_status); | |
1945 | scsi_status = le16_to_cpu(sts24->scsi_status) & SS_MASK; | |
1946 | } else { | |
1947 | comp_status = le16_to_cpu(sts->comp_status); | |
1948 | scsi_status = le16_to_cpu(sts->scsi_status) & SS_MASK; | |
1949 | } | |
1950 | ||
01e0e15c | 1951 | thread_id = bsg_request->rqst_data.h_vendor.vendor_cmd[1]; |
a9b6f722 SK |
1952 | switch (comp_status) { |
1953 | case CS_COMPLETE: | |
1954 | if (scsi_status == 0) { | |
01e0e15c | 1955 | bsg_reply->reply_payload_rcv_len = |
a9b6f722 | 1956 | bsg_job->reply_payload.payload_len; |
fabbb8df | 1957 | vha->qla_stats.input_bytes += |
01e0e15c | 1958 | bsg_reply->reply_payload_rcv_len; |
fabbb8df | 1959 | vha->qla_stats.input_requests++; |
a9b6f722 SK |
1960 | rval = EXT_STATUS_OK; |
1961 | } | |
1962 | goto done; | |
1963 | ||
1964 | case CS_DATA_OVERRUN: | |
1965 | ql_dbg(ql_dbg_user, vha, 0x70b1, | |
1966 | "Command completed with date overrun thread_id=%d\n", | |
1967 | thread_id); | |
1968 | rval = EXT_STATUS_DATA_OVERRUN; | |
1969 | break; | |
1970 | ||
1971 | case CS_DATA_UNDERRUN: | |
1972 | ql_dbg(ql_dbg_user, vha, 0x70b2, | |
1973 | "Command completed with date underrun thread_id=%d\n", | |
1974 | thread_id); | |
1975 | rval = EXT_STATUS_DATA_UNDERRUN; | |
1976 | break; | |
1977 | case CS_BIDIR_RD_OVERRUN: | |
1978 | ql_dbg(ql_dbg_user, vha, 0x70b3, | |
1979 | "Command completed with read data overrun thread_id=%d\n", | |
1980 | thread_id); | |
1981 | rval = EXT_STATUS_DATA_OVERRUN; | |
1982 | break; | |
1983 | ||
1984 | case CS_BIDIR_RD_WR_OVERRUN: | |
1985 | ql_dbg(ql_dbg_user, vha, 0x70b4, | |
1986 | "Command completed with read and write data overrun " | |
1987 | "thread_id=%d\n", thread_id); | |
1988 | rval = EXT_STATUS_DATA_OVERRUN; | |
1989 | break; | |
1990 | ||
1991 | case CS_BIDIR_RD_OVERRUN_WR_UNDERRUN: | |
1992 | ql_dbg(ql_dbg_user, vha, 0x70b5, | |
1993 | "Command completed with read data over and write data " | |
1994 | "underrun thread_id=%d\n", thread_id); | |
1995 | rval = EXT_STATUS_DATA_OVERRUN; | |
1996 | break; | |
1997 | ||
1998 | case CS_BIDIR_RD_UNDERRUN: | |
1999 | ql_dbg(ql_dbg_user, vha, 0x70b6, | |
2000 | "Command completed with read data data underrun " | |
2001 | "thread_id=%d\n", thread_id); | |
2002 | rval = EXT_STATUS_DATA_UNDERRUN; | |
2003 | break; | |
2004 | ||
2005 | case CS_BIDIR_RD_UNDERRUN_WR_OVERRUN: | |
2006 | ql_dbg(ql_dbg_user, vha, 0x70b7, | |
2007 | "Command completed with read data under and write data " | |
2008 | "overrun thread_id=%d\n", thread_id); | |
2009 | rval = EXT_STATUS_DATA_UNDERRUN; | |
2010 | break; | |
2011 | ||
2012 | case CS_BIDIR_RD_WR_UNDERRUN: | |
2013 | ql_dbg(ql_dbg_user, vha, 0x70b8, | |
2014 | "Command completed with read and write data underrun " | |
2015 | "thread_id=%d\n", thread_id); | |
2016 | rval = EXT_STATUS_DATA_UNDERRUN; | |
2017 | break; | |
2018 | ||
2019 | case CS_BIDIR_DMA: | |
2020 | ql_dbg(ql_dbg_user, vha, 0x70b9, | |
2021 | "Command completed with data DMA error thread_id=%d\n", | |
2022 | thread_id); | |
2023 | rval = EXT_STATUS_DMA_ERR; | |
2024 | break; | |
2025 | ||
2026 | case CS_TIMEOUT: | |
2027 | ql_dbg(ql_dbg_user, vha, 0x70ba, | |
2028 | "Command completed with timeout thread_id=%d\n", | |
2029 | thread_id); | |
2030 | rval = EXT_STATUS_TIMEOUT; | |
2031 | break; | |
2032 | default: | |
2033 | ql_dbg(ql_dbg_user, vha, 0x70bb, | |
2034 | "Command completed with completion status=0x%x " | |
2035 | "thread_id=%d\n", comp_status, thread_id); | |
2036 | rval = EXT_STATUS_ERR; | |
2037 | break; | |
2038 | } | |
01e0e15c | 2039 | bsg_reply->reply_payload_rcv_len = 0; |
a9b6f722 SK |
2040 | |
2041 | done: | |
2042 | /* Return the vendor specific reply to API */ | |
01e0e15c | 2043 | bsg_reply->reply_data.vendor_reply.vendor_rsp[0] = rval; |
a9b6f722 SK |
2044 | bsg_job->reply_len = sizeof(struct fc_bsg_reply); |
2045 | /* Always return DID_OK, bsg will send the vendor specific response | |
2046 | * in this case only */ | |
2047 | sp->done(vha, sp, (DID_OK << 6)); | |
2048 | ||
2049 | } | |
2050 | ||
1da177e4 LT |
2051 | /** |
2052 | * qla2x00_status_entry() - Process a Status IOCB entry. | |
2053 | * @ha: SCSI driver HA context | |
2054 | * @pkt: Entry pointer | |
2055 | */ | |
2056 | static void | |
73208dfd | 2057 | qla2x00_status_entry(scsi_qla_host_t *vha, struct rsp_que *rsp, void *pkt) |
1da177e4 | 2058 | { |
1da177e4 | 2059 | srb_t *sp; |
1da177e4 LT |
2060 | fc_port_t *fcport; |
2061 | struct scsi_cmnd *cp; | |
9a853f71 AV |
2062 | sts_entry_t *sts; |
2063 | struct sts_entry_24xx *sts24; | |
1da177e4 LT |
2064 | uint16_t comp_status; |
2065 | uint16_t scsi_status; | |
b7d2280c | 2066 | uint16_t ox_id; |
1da177e4 LT |
2067 | uint8_t lscsi_status; |
2068 | int32_t resid; | |
5544213b AV |
2069 | uint32_t sense_len, par_sense_len, rsp_info_len, resid_len, |
2070 | fw_resid_len; | |
9a853f71 | 2071 | uint8_t *rsp_info, *sense_data; |
e315cd28 | 2072 | struct qla_hw_data *ha = vha->hw; |
2afa19a9 AC |
2073 | uint32_t handle; |
2074 | uint16_t que; | |
2075 | struct req_que *req; | |
b7d2280c | 2076 | int logit = 1; |
9ba56b95 | 2077 | int res = 0; |
a9b6f722 | 2078 | uint16_t state_flags = 0; |
e05fe292 | 2079 | uint16_t retry_delay = 0; |
9a853f71 AV |
2080 | |
2081 | sts = (sts_entry_t *) pkt; | |
2082 | sts24 = (struct sts_entry_24xx *) pkt; | |
e428924c | 2083 | if (IS_FWI2_CAPABLE(ha)) { |
9a853f71 AV |
2084 | comp_status = le16_to_cpu(sts24->comp_status); |
2085 | scsi_status = le16_to_cpu(sts24->scsi_status) & SS_MASK; | |
a9b6f722 | 2086 | state_flags = le16_to_cpu(sts24->state_flags); |
9a853f71 AV |
2087 | } else { |
2088 | comp_status = le16_to_cpu(sts->comp_status); | |
2089 | scsi_status = le16_to_cpu(sts->scsi_status) & SS_MASK; | |
2090 | } | |
2afa19a9 AC |
2091 | handle = (uint32_t) LSW(sts->handle); |
2092 | que = MSW(sts->handle); | |
2093 | req = ha->req_q_map[que]; | |
a9083016 | 2094 | |
36008cf1 CD |
2095 | /* Check for invalid queue pointer */ |
2096 | if (req == NULL || | |
2097 | que >= find_first_zero_bit(ha->req_qid_map, ha->max_req_queues)) { | |
2098 | ql_dbg(ql_dbg_io, vha, 0x3059, | |
2099 | "Invalid status handle (0x%x): Bad req pointer. req=%p, " | |
2100 | "que=%u.\n", sts->handle, req, que); | |
2101 | return; | |
2102 | } | |
2103 | ||
1da177e4 | 2104 | /* Validate handle. */ |
c7bc4cae | 2105 | if (handle < req->num_outstanding_cmds) { |
2afa19a9 | 2106 | sp = req->outstanding_cmds[handle]; |
c7bc4cae CD |
2107 | if (!sp) { |
2108 | ql_dbg(ql_dbg_io, vha, 0x3075, | |
2109 | "%s(%ld): Already returned command for status handle (0x%x).\n", | |
2110 | __func__, vha->host_no, sts->handle); | |
2111 | return; | |
2112 | } | |
2113 | } else { | |
cfb0919c | 2114 | ql_dbg(ql_dbg_io, vha, 0x3017, |
c7bc4cae CD |
2115 | "Invalid status handle, out of range (0x%x).\n", |
2116 | sts->handle); | |
1da177e4 | 2117 | |
acd3ce88 CD |
2118 | if (!test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags)) { |
2119 | if (IS_P3P_TYPE(ha)) | |
2120 | set_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags); | |
2121 | else | |
2122 | set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); | |
2123 | qla2xxx_wake_dpc(vha); | |
2124 | } | |
1da177e4 LT |
2125 | return; |
2126 | } | |
a9b6f722 SK |
2127 | |
2128 | if (unlikely((state_flags & BIT_1) && (sp->type == SRB_BIDI_CMD))) { | |
2129 | qla25xx_process_bidir_status_iocb(vha, pkt, req, handle); | |
2130 | return; | |
2131 | } | |
2132 | ||
faef62d1 AB |
2133 | /* Task Management completion. */ |
2134 | if (sp->type == SRB_TM_CMD) { | |
2135 | qla24xx_tm_iocb_entry(vha, req, pkt); | |
2136 | return; | |
2137 | } | |
2138 | ||
a9b6f722 SK |
2139 | /* Fast path completion. */ |
2140 | if (comp_status == CS_COMPLETE && scsi_status == 0) { | |
2141 | qla2x00_process_completed_request(vha, req, handle); | |
2142 | ||
2143 | return; | |
2144 | } | |
2145 | ||
2146 | req->outstanding_cmds[handle] = NULL; | |
9ba56b95 | 2147 | cp = GET_CMD_SP(sp); |
1da177e4 | 2148 | if (cp == NULL) { |
cfb0919c | 2149 | ql_dbg(ql_dbg_io, vha, 0x3018, |
7c3df132 SK |
2150 | "Command already returned (0x%x/%p).\n", |
2151 | sts->handle, sp); | |
1da177e4 LT |
2152 | |
2153 | return; | |
2154 | } | |
2155 | ||
8ae6d9c7 | 2156 | lscsi_status = scsi_status & STATUS_MASK; |
1da177e4 | 2157 | |
bdf79621 | 2158 | fcport = sp->fcport; |
1da177e4 | 2159 | |
b7d2280c | 2160 | ox_id = 0; |
5544213b AV |
2161 | sense_len = par_sense_len = rsp_info_len = resid_len = |
2162 | fw_resid_len = 0; | |
e428924c | 2163 | if (IS_FWI2_CAPABLE(ha)) { |
0f00a206 LC |
2164 | if (scsi_status & SS_SENSE_LEN_VALID) |
2165 | sense_len = le32_to_cpu(sts24->sense_len); | |
2166 | if (scsi_status & SS_RESPONSE_INFO_LEN_VALID) | |
2167 | rsp_info_len = le32_to_cpu(sts24->rsp_data_len); | |
2168 | if (scsi_status & (SS_RESIDUAL_UNDER | SS_RESIDUAL_OVER)) | |
2169 | resid_len = le32_to_cpu(sts24->rsp_residual_count); | |
2170 | if (comp_status == CS_DATA_UNDERRUN) | |
2171 | fw_resid_len = le32_to_cpu(sts24->residual_len); | |
9a853f71 AV |
2172 | rsp_info = sts24->data; |
2173 | sense_data = sts24->data; | |
2174 | host_to_fcp_swap(sts24->data, sizeof(sts24->data)); | |
b7d2280c | 2175 | ox_id = le16_to_cpu(sts24->ox_id); |
5544213b | 2176 | par_sense_len = sizeof(sts24->data); |
e05fe292 CD |
2177 | /* Valid values of the retry delay timer are 0x1-0xffef */ |
2178 | if (sts24->retry_delay > 0 && sts24->retry_delay < 0xfff1) | |
2179 | retry_delay = sts24->retry_delay; | |
9a853f71 | 2180 | } else { |
0f00a206 LC |
2181 | if (scsi_status & SS_SENSE_LEN_VALID) |
2182 | sense_len = le16_to_cpu(sts->req_sense_length); | |
2183 | if (scsi_status & SS_RESPONSE_INFO_LEN_VALID) | |
2184 | rsp_info_len = le16_to_cpu(sts->rsp_info_len); | |
9a853f71 AV |
2185 | resid_len = le32_to_cpu(sts->residual_length); |
2186 | rsp_info = sts->rsp_info; | |
2187 | sense_data = sts->req_sense_data; | |
5544213b | 2188 | par_sense_len = sizeof(sts->req_sense_data); |
9a853f71 AV |
2189 | } |
2190 | ||
1da177e4 LT |
2191 | /* Check for any FCP transport errors. */ |
2192 | if (scsi_status & SS_RESPONSE_INFO_LEN_VALID) { | |
9a853f71 | 2193 | /* Sense data lies beyond any FCP RESPONSE data. */ |
5544213b | 2194 | if (IS_FWI2_CAPABLE(ha)) { |
9a853f71 | 2195 | sense_data += rsp_info_len; |
5544213b AV |
2196 | par_sense_len -= rsp_info_len; |
2197 | } | |
9a853f71 | 2198 | if (rsp_info_len > 3 && rsp_info[3]) { |
5e19ed90 | 2199 | ql_dbg(ql_dbg_io, fcport->vha, 0x3019, |
7c3df132 SK |
2200 | "FCP I/O protocol failure (0x%x/0x%x).\n", |
2201 | rsp_info_len, rsp_info[3]); | |
1da177e4 | 2202 | |
9ba56b95 | 2203 | res = DID_BUS_BUSY << 16; |
b7d2280c | 2204 | goto out; |
1da177e4 LT |
2205 | } |
2206 | } | |
2207 | ||
3e8ce320 AV |
2208 | /* Check for overrun. */ |
2209 | if (IS_FWI2_CAPABLE(ha) && comp_status == CS_COMPLETE && | |
2210 | scsi_status & SS_RESIDUAL_OVER) | |
2211 | comp_status = CS_DATA_OVERRUN; | |
2212 | ||
e05fe292 CD |
2213 | /* |
2214 | * Check retry_delay_timer value if we receive a busy or | |
2215 | * queue full. | |
2216 | */ | |
2217 | if (lscsi_status == SAM_STAT_TASK_SET_FULL || | |
2218 | lscsi_status == SAM_STAT_BUSY) | |
2219 | qla2x00_set_retry_delay_timestamp(fcport, retry_delay); | |
2220 | ||
1da177e4 LT |
2221 | /* |
2222 | * Based on Host and scsi status generate status code for Linux | |
2223 | */ | |
2224 | switch (comp_status) { | |
2225 | case CS_COMPLETE: | |
df7baa50 | 2226 | case CS_QUEUE_FULL: |
1da177e4 | 2227 | if (scsi_status == 0) { |
9ba56b95 | 2228 | res = DID_OK << 16; |
1da177e4 LT |
2229 | break; |
2230 | } | |
2231 | if (scsi_status & (SS_RESIDUAL_UNDER | SS_RESIDUAL_OVER)) { | |
9a853f71 | 2232 | resid = resid_len; |
385d70b4 | 2233 | scsi_set_resid(cp, resid); |
0da69df1 AV |
2234 | |
2235 | if (!lscsi_status && | |
385d70b4 | 2236 | ((unsigned)(scsi_bufflen(cp) - resid) < |
0da69df1 | 2237 | cp->underflow)) { |
5e19ed90 | 2238 | ql_dbg(ql_dbg_io, fcport->vha, 0x301a, |
7c3df132 | 2239 | "Mid-layer underflow " |
b7d2280c | 2240 | "detected (0x%x of 0x%x bytes).\n", |
7c3df132 | 2241 | resid, scsi_bufflen(cp)); |
0da69df1 | 2242 | |
9ba56b95 | 2243 | res = DID_ERROR << 16; |
0da69df1 AV |
2244 | break; |
2245 | } | |
1da177e4 | 2246 | } |
9ba56b95 | 2247 | res = DID_OK << 16 | lscsi_status; |
1da177e4 | 2248 | |
df7baa50 | 2249 | if (lscsi_status == SAM_STAT_TASK_SET_FULL) { |
5e19ed90 | 2250 | ql_dbg(ql_dbg_io, fcport->vha, 0x301b, |
7c3df132 | 2251 | "QUEUE FULL detected.\n"); |
df7baa50 AV |
2252 | break; |
2253 | } | |
b7d2280c | 2254 | logit = 0; |
1da177e4 LT |
2255 | if (lscsi_status != SS_CHECK_CONDITION) |
2256 | break; | |
2257 | ||
b80ca4f7 | 2258 | memset(cp->sense_buffer, 0, SCSI_SENSE_BUFFERSIZE); |
1da177e4 LT |
2259 | if (!(scsi_status & SS_SENSE_LEN_VALID)) |
2260 | break; | |
2261 | ||
5544213b | 2262 | qla2x00_handle_sense(sp, sense_data, par_sense_len, sense_len, |
9ba56b95 | 2263 | rsp, res); |
1da177e4 LT |
2264 | break; |
2265 | ||
2266 | case CS_DATA_UNDERRUN: | |
ed17c71b | 2267 | /* Use F/W calculated residual length. */ |
0f00a206 LC |
2268 | resid = IS_FWI2_CAPABLE(ha) ? fw_resid_len : resid_len; |
2269 | scsi_set_resid(cp, resid); | |
2270 | if (scsi_status & SS_RESIDUAL_UNDER) { | |
2271 | if (IS_FWI2_CAPABLE(ha) && fw_resid_len != resid_len) { | |
5e19ed90 | 2272 | ql_dbg(ql_dbg_io, fcport->vha, 0x301d, |
7c3df132 SK |
2273 | "Dropped frame(s) detected " |
2274 | "(0x%x of 0x%x bytes).\n", | |
2275 | resid, scsi_bufflen(cp)); | |
0f00a206 | 2276 | |
9ba56b95 | 2277 | res = DID_ERROR << 16 | lscsi_status; |
4e85e3d9 | 2278 | goto check_scsi_status; |
6acf8190 | 2279 | } |
ed17c71b | 2280 | |
0f00a206 LC |
2281 | if (!lscsi_status && |
2282 | ((unsigned)(scsi_bufflen(cp) - resid) < | |
2283 | cp->underflow)) { | |
5e19ed90 | 2284 | ql_dbg(ql_dbg_io, fcport->vha, 0x301e, |
7c3df132 | 2285 | "Mid-layer underflow " |
b7d2280c | 2286 | "detected (0x%x of 0x%x bytes).\n", |
7c3df132 | 2287 | resid, scsi_bufflen(cp)); |
e038a1be | 2288 | |
9ba56b95 | 2289 | res = DID_ERROR << 16; |
0f00a206 LC |
2290 | break; |
2291 | } | |
4aee5766 GM |
2292 | } else if (lscsi_status != SAM_STAT_TASK_SET_FULL && |
2293 | lscsi_status != SAM_STAT_BUSY) { | |
2294 | /* | |
2295 | * scsi status of task set and busy are considered to be | |
2296 | * task not completed. | |
2297 | */ | |
2298 | ||
5e19ed90 | 2299 | ql_dbg(ql_dbg_io, fcport->vha, 0x301f, |
7c3df132 | 2300 | "Dropped frame(s) detected (0x%x " |
4aee5766 GM |
2301 | "of 0x%x bytes).\n", resid, |
2302 | scsi_bufflen(cp)); | |
0f00a206 | 2303 | |
9ba56b95 | 2304 | res = DID_ERROR << 16 | lscsi_status; |
0374f55e | 2305 | goto check_scsi_status; |
4aee5766 GM |
2306 | } else { |
2307 | ql_dbg(ql_dbg_io, fcport->vha, 0x3030, | |
2308 | "scsi_status: 0x%x, lscsi_status: 0x%x\n", | |
2309 | scsi_status, lscsi_status); | |
1da177e4 LT |
2310 | } |
2311 | ||
9ba56b95 | 2312 | res = DID_OK << 16 | lscsi_status; |
b7d2280c | 2313 | logit = 0; |
0f00a206 | 2314 | |
0374f55e | 2315 | check_scsi_status: |
1da177e4 | 2316 | /* |
fa2a1ce5 | 2317 | * Check to see if SCSI Status is non zero. If so report SCSI |
1da177e4 LT |
2318 | * Status. |
2319 | */ | |
2320 | if (lscsi_status != 0) { | |
ffec28a3 | 2321 | if (lscsi_status == SAM_STAT_TASK_SET_FULL) { |
5e19ed90 | 2322 | ql_dbg(ql_dbg_io, fcport->vha, 0x3020, |
7c3df132 | 2323 | "QUEUE FULL detected.\n"); |
b7d2280c | 2324 | logit = 1; |
ffec28a3 AV |
2325 | break; |
2326 | } | |
1da177e4 LT |
2327 | if (lscsi_status != SS_CHECK_CONDITION) |
2328 | break; | |
2329 | ||
b80ca4f7 | 2330 | memset(cp->sense_buffer, 0, SCSI_SENSE_BUFFERSIZE); |
1da177e4 LT |
2331 | if (!(scsi_status & SS_SENSE_LEN_VALID)) |
2332 | break; | |
2333 | ||
5544213b | 2334 | qla2x00_handle_sense(sp, sense_data, par_sense_len, |
9ba56b95 | 2335 | sense_len, rsp, res); |
1da177e4 LT |
2336 | } |
2337 | break; | |
2338 | ||
1da177e4 LT |
2339 | case CS_PORT_LOGGED_OUT: |
2340 | case CS_PORT_CONFIG_CHG: | |
2341 | case CS_PORT_BUSY: | |
2342 | case CS_INCOMPLETE: | |
2343 | case CS_PORT_UNAVAILABLE: | |
b7d2280c | 2344 | case CS_TIMEOUT: |
ff454b01 CD |
2345 | case CS_RESET: |
2346 | ||
056a4483 MC |
2347 | /* |
2348 | * We are going to have the fc class block the rport | |
2349 | * while we try to recover so instruct the mid layer | |
2350 | * to requeue until the class decides how to handle this. | |
2351 | */ | |
9ba56b95 | 2352 | res = DID_TRANSPORT_DISRUPTED << 16; |
b7d2280c AV |
2353 | |
2354 | if (comp_status == CS_TIMEOUT) { | |
2355 | if (IS_FWI2_CAPABLE(ha)) | |
2356 | break; | |
2357 | else if ((le16_to_cpu(sts->status_flags) & | |
2358 | SF_LOGOUT_SENT) == 0) | |
2359 | break; | |
2360 | } | |
2361 | ||
5e19ed90 | 2362 | ql_dbg(ql_dbg_io, fcport->vha, 0x3021, |
0e948975 CD |
2363 | "Port to be marked lost on fcport=%02x%02x%02x, current " |
2364 | "port state= %s.\n", fcport->d_id.b.domain, | |
2365 | fcport->d_id.b.area, fcport->d_id.b.al_pa, | |
2366 | port_state_str[atomic_read(&fcport->state)]); | |
b7d2280c | 2367 | |
a7a28504 | 2368 | if (atomic_read(&fcport->state) == FCS_ONLINE) |
e315cd28 | 2369 | qla2x00_mark_device_lost(fcport->vha, fcport, 1, 1); |
1da177e4 LT |
2370 | break; |
2371 | ||
1da177e4 | 2372 | case CS_ABORTED: |
9ba56b95 | 2373 | res = DID_RESET << 16; |
1da177e4 | 2374 | break; |
bad75002 AE |
2375 | |
2376 | case CS_DIF_ERROR: | |
8cb2049c | 2377 | logit = qla2x00_handle_dif_error(sp, sts24); |
fb6e4668 | 2378 | res = cp->result; |
bad75002 | 2379 | break; |
9e522cd8 AE |
2380 | |
2381 | case CS_TRANSPORT: | |
2382 | res = DID_ERROR << 16; | |
2383 | ||
2384 | if (!IS_PI_SPLIT_DET_CAPABLE(ha)) | |
2385 | break; | |
2386 | ||
2387 | if (state_flags & BIT_4) | |
2388 | scmd_printk(KERN_WARNING, cp, | |
2389 | "Unsupported device '%s' found.\n", | |
2390 | cp->device->vendor); | |
2391 | break; | |
2392 | ||
1da177e4 | 2393 | default: |
9ba56b95 | 2394 | res = DID_ERROR << 16; |
1da177e4 LT |
2395 | break; |
2396 | } | |
2397 | ||
b7d2280c AV |
2398 | out: |
2399 | if (logit) | |
5e19ed90 | 2400 | ql_dbg(ql_dbg_io, fcport->vha, 0x3022, |
9cb78c16 | 2401 | "FCP command status: 0x%x-0x%x (0x%x) nexus=%ld:%d:%llu " |
7b833558 | 2402 | "portid=%02x%02x%02x oxid=0x%x cdb=%10phN len=0x%x " |
c7bc4cae | 2403 | "rsp_info=0x%x resid=0x%x fw_resid=0x%x sp=%p cp=%p.\n", |
9ba56b95 | 2404 | comp_status, scsi_status, res, vha->host_no, |
cfb0919c CD |
2405 | cp->device->id, cp->device->lun, fcport->d_id.b.domain, |
2406 | fcport->d_id.b.area, fcport->d_id.b.al_pa, ox_id, | |
7b833558 | 2407 | cp->cmnd, scsi_bufflen(cp), rsp_info_len, |
c7bc4cae | 2408 | resid_len, fw_resid_len, sp, cp); |
b7d2280c | 2409 | |
2afa19a9 | 2410 | if (rsp->status_srb == NULL) |
9ba56b95 | 2411 | sp->done(ha, sp, res); |
1da177e4 LT |
2412 | } |
2413 | ||
2414 | /** | |
2415 | * qla2x00_status_cont_entry() - Process a Status Continuations entry. | |
2416 | * @ha: SCSI driver HA context | |
2417 | * @pkt: Entry pointer | |
2418 | * | |
2419 | * Extended sense data. | |
2420 | */ | |
2421 | static void | |
2afa19a9 | 2422 | qla2x00_status_cont_entry(struct rsp_que *rsp, sts_cont_entry_t *pkt) |
1da177e4 | 2423 | { |
9ba56b95 | 2424 | uint8_t sense_sz = 0; |
2afa19a9 | 2425 | struct qla_hw_data *ha = rsp->hw; |
7c3df132 | 2426 | struct scsi_qla_host *vha = pci_get_drvdata(ha->pdev); |
9ba56b95 | 2427 | srb_t *sp = rsp->status_srb; |
1da177e4 | 2428 | struct scsi_cmnd *cp; |
9ba56b95 GM |
2429 | uint32_t sense_len; |
2430 | uint8_t *sense_ptr; | |
1da177e4 | 2431 | |
9ba56b95 GM |
2432 | if (!sp || !GET_CMD_SENSE_LEN(sp)) |
2433 | return; | |
1da177e4 | 2434 | |
9ba56b95 GM |
2435 | sense_len = GET_CMD_SENSE_LEN(sp); |
2436 | sense_ptr = GET_CMD_SENSE_PTR(sp); | |
1da177e4 | 2437 | |
9ba56b95 GM |
2438 | cp = GET_CMD_SP(sp); |
2439 | if (cp == NULL) { | |
2440 | ql_log(ql_log_warn, vha, 0x3025, | |
2441 | "cmd is NULL: already returned to OS (sp=%p).\n", sp); | |
1da177e4 | 2442 | |
9ba56b95 GM |
2443 | rsp->status_srb = NULL; |
2444 | return; | |
1da177e4 | 2445 | } |
1da177e4 | 2446 | |
9ba56b95 GM |
2447 | if (sense_len > sizeof(pkt->data)) |
2448 | sense_sz = sizeof(pkt->data); | |
2449 | else | |
2450 | sense_sz = sense_len; | |
c4631191 | 2451 | |
9ba56b95 GM |
2452 | /* Move sense data. */ |
2453 | if (IS_FWI2_CAPABLE(ha)) | |
2454 | host_to_fcp_swap(pkt->data, sizeof(pkt->data)); | |
2455 | memcpy(sense_ptr, pkt->data, sense_sz); | |
2456 | ql_dump_buffer(ql_dbg_io + ql_dbg_buffer, vha, 0x302c, | |
2457 | sense_ptr, sense_sz); | |
c4631191 | 2458 | |
9ba56b95 GM |
2459 | sense_len -= sense_sz; |
2460 | sense_ptr += sense_sz; | |
c4631191 | 2461 | |
9ba56b95 GM |
2462 | SET_CMD_SENSE_PTR(sp, sense_ptr); |
2463 | SET_CMD_SENSE_LEN(sp, sense_len); | |
2464 | ||
2465 | /* Place command on done queue. */ | |
2466 | if (sense_len == 0) { | |
2467 | rsp->status_srb = NULL; | |
2468 | sp->done(ha, sp, cp->result); | |
c4631191 | 2469 | } |
c4631191 GM |
2470 | } |
2471 | ||
1da177e4 LT |
2472 | /** |
2473 | * qla2x00_error_entry() - Process an error entry. | |
2474 | * @ha: SCSI driver HA context | |
2475 | * @pkt: Entry pointer | |
2476 | */ | |
2477 | static void | |
73208dfd | 2478 | qla2x00_error_entry(scsi_qla_host_t *vha, struct rsp_que *rsp, sts_entry_t *pkt) |
1da177e4 LT |
2479 | { |
2480 | srb_t *sp; | |
e315cd28 | 2481 | struct qla_hw_data *ha = vha->hw; |
c4631191 | 2482 | const char func[] = "ERROR-IOCB"; |
2afa19a9 | 2483 | uint16_t que = MSW(pkt->handle); |
a6fe35c0 | 2484 | struct req_que *req = NULL; |
9ba56b95 | 2485 | int res = DID_ERROR << 16; |
7c3df132 | 2486 | |
9ba56b95 GM |
2487 | ql_dbg(ql_dbg_async, vha, 0x502a, |
2488 | "type of error status in response: 0x%x\n", pkt->entry_status); | |
2489 | ||
a6fe35c0 AE |
2490 | if (que >= ha->max_req_queues || !ha->req_q_map[que]) |
2491 | goto fatal; | |
2492 | ||
2493 | req = ha->req_q_map[que]; | |
2494 | ||
9ba56b95 GM |
2495 | if (pkt->entry_status & RF_BUSY) |
2496 | res = DID_BUS_BUSY << 16; | |
1da177e4 | 2497 | |
c4631191 | 2498 | sp = qla2x00_get_sp_from_handle(vha, func, req, pkt); |
a6fe35c0 | 2499 | if (sp) { |
9ba56b95 | 2500 | sp->done(ha, sp, res); |
a6fe35c0 | 2501 | return; |
1da177e4 | 2502 | } |
a6fe35c0 AE |
2503 | fatal: |
2504 | ql_log(ql_log_warn, vha, 0x5030, | |
fd49a540 | 2505 | "Error entry - invalid handle/queue (%04x).\n", que); |
1da177e4 LT |
2506 | } |
2507 | ||
9a853f71 AV |
2508 | /** |
2509 | * qla24xx_mbx_completion() - Process mailbox command completions. | |
2510 | * @ha: SCSI driver HA context | |
2511 | * @mb0: Mailbox0 register | |
2512 | */ | |
2513 | static void | |
e315cd28 | 2514 | qla24xx_mbx_completion(scsi_qla_host_t *vha, uint16_t mb0) |
9a853f71 AV |
2515 | { |
2516 | uint16_t cnt; | |
4fa94f83 | 2517 | uint32_t mboxes; |
9a853f71 | 2518 | uint16_t __iomem *wptr; |
e315cd28 | 2519 | struct qla_hw_data *ha = vha->hw; |
9a853f71 AV |
2520 | struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; |
2521 | ||
4fa94f83 AV |
2522 | /* Read all mbox registers? */ |
2523 | mboxes = (1 << ha->mbx_count) - 1; | |
2524 | if (!ha->mcp) | |
a720101d | 2525 | ql_dbg(ql_dbg_async, vha, 0x504e, "MBX pointer ERROR.\n"); |
4fa94f83 AV |
2526 | else |
2527 | mboxes = ha->mcp->in_mb; | |
2528 | ||
9a853f71 AV |
2529 | /* Load return mailbox registers. */ |
2530 | ha->flags.mbox_int = 1; | |
2531 | ha->mailbox_out[0] = mb0; | |
4fa94f83 | 2532 | mboxes >>= 1; |
9a853f71 AV |
2533 | wptr = (uint16_t __iomem *)®->mailbox1; |
2534 | ||
2535 | for (cnt = 1; cnt < ha->mbx_count; cnt++) { | |
4fa94f83 AV |
2536 | if (mboxes & BIT_0) |
2537 | ha->mailbox_out[cnt] = RD_REG_WORD(wptr); | |
2538 | ||
2539 | mboxes >>= 1; | |
9a853f71 AV |
2540 | wptr++; |
2541 | } | |
9a853f71 AV |
2542 | } |
2543 | ||
4440e46d AB |
2544 | static void |
2545 | qla24xx_abort_iocb_entry(scsi_qla_host_t *vha, struct req_que *req, | |
2546 | struct abort_entry_24xx *pkt) | |
2547 | { | |
2548 | const char func[] = "ABT_IOCB"; | |
2549 | srb_t *sp; | |
2550 | struct srb_iocb *abt; | |
2551 | ||
2552 | sp = qla2x00_get_sp_from_handle(vha, func, req, pkt); | |
2553 | if (!sp) | |
2554 | return; | |
2555 | ||
2556 | abt = &sp->u.iocb_cmd; | |
2557 | abt->u.abt.comp_status = le32_to_cpu(pkt->nport_handle); | |
2558 | sp->done(vha, sp, 0); | |
2559 | } | |
2560 | ||
9a853f71 AV |
2561 | /** |
2562 | * qla24xx_process_response_queue() - Process response queue entries. | |
2563 | * @ha: SCSI driver HA context | |
2564 | */ | |
2afa19a9 AC |
2565 | void qla24xx_process_response_queue(struct scsi_qla_host *vha, |
2566 | struct rsp_que *rsp) | |
9a853f71 | 2567 | { |
9a853f71 | 2568 | struct sts_entry_24xx *pkt; |
a9083016 | 2569 | struct qla_hw_data *ha = vha->hw; |
9a853f71 | 2570 | |
e315cd28 | 2571 | if (!vha->flags.online) |
9a853f71 AV |
2572 | return; |
2573 | ||
262e2bfd | 2574 | if (rsp->msix && rsp->msix->cpuid != smp_processor_id()) { |
cdb898c5 QT |
2575 | /* if kernel does not notify qla of IRQ's CPU change, |
2576 | * then set it here. | |
2577 | */ | |
2578 | rsp->msix->cpuid = smp_processor_id(); | |
2579 | ha->tgt.rspq_vector_cpuid = rsp->msix->cpuid; | |
2580 | } | |
2581 | ||
e315cd28 AC |
2582 | while (rsp->ring_ptr->signature != RESPONSE_PROCESSED) { |
2583 | pkt = (struct sts_entry_24xx *)rsp->ring_ptr; | |
9a853f71 | 2584 | |
e315cd28 AC |
2585 | rsp->ring_index++; |
2586 | if (rsp->ring_index == rsp->length) { | |
2587 | rsp->ring_index = 0; | |
2588 | rsp->ring_ptr = rsp->ring; | |
9a853f71 | 2589 | } else { |
e315cd28 | 2590 | rsp->ring_ptr++; |
9a853f71 AV |
2591 | } |
2592 | ||
2593 | if (pkt->entry_status != 0) { | |
73208dfd | 2594 | qla2x00_error_entry(vha, rsp, (sts_entry_t *) pkt); |
2d70c103 | 2595 | |
f83adb61 QT |
2596 | if (qlt_24xx_process_response_error(vha, pkt)) |
2597 | goto process_err; | |
2d70c103 | 2598 | |
9a853f71 AV |
2599 | ((response_t *)pkt)->signature = RESPONSE_PROCESSED; |
2600 | wmb(); | |
2601 | continue; | |
2602 | } | |
f83adb61 | 2603 | process_err: |
9a853f71 AV |
2604 | |
2605 | switch (pkt->entry_type) { | |
2606 | case STATUS_TYPE: | |
73208dfd | 2607 | qla2x00_status_entry(vha, rsp, pkt); |
9a853f71 AV |
2608 | break; |
2609 | case STATUS_CONT_TYPE: | |
2afa19a9 | 2610 | qla2x00_status_cont_entry(rsp, (sts_cont_entry_t *)pkt); |
9a853f71 | 2611 | break; |
2c3dfe3f | 2612 | case VP_RPT_ID_IOCB_TYPE: |
e315cd28 | 2613 | qla24xx_report_id_acquisition(vha, |
2c3dfe3f SJ |
2614 | (struct vp_rpt_id_entry_24xx *)pkt); |
2615 | break; | |
ac280b67 AV |
2616 | case LOGINOUT_PORT_IOCB_TYPE: |
2617 | qla24xx_logio_entry(vha, rsp->req, | |
2618 | (struct logio_entry_24xx *)pkt); | |
2619 | break; | |
f83adb61 | 2620 | case CT_IOCB_TYPE: |
9a069e19 | 2621 | qla24xx_els_ct_entry(vha, rsp->req, pkt, CT_IOCB_TYPE); |
9a069e19 | 2622 | break; |
f83adb61 | 2623 | case ELS_IOCB_TYPE: |
9a069e19 GM |
2624 | qla24xx_els_ct_entry(vha, rsp->req, pkt, ELS_IOCB_TYPE); |
2625 | break; | |
2d70c103 | 2626 | case ABTS_RECV_24XX: |
2f424b9b QT |
2627 | if (IS_QLA83XX(ha) || IS_QLA27XX(ha)) { |
2628 | /* ensure that the ATIO queue is empty */ | |
2629 | qlt_handle_abts_recv(vha, (response_t *)pkt); | |
2630 | break; | |
2631 | } else { | |
2632 | /* drop through */ | |
2633 | qlt_24xx_process_atio_queue(vha, 1); | |
2634 | } | |
2d70c103 NB |
2635 | case ABTS_RESP_24XX: |
2636 | case CTIO_TYPE7: | |
2637 | case NOTIFY_ACK_TYPE: | |
f83adb61 | 2638 | case CTIO_CRC2: |
2d70c103 NB |
2639 | qlt_response_pkt_all_vps(vha, (response_t *)pkt); |
2640 | break; | |
54883291 SK |
2641 | case MARKER_TYPE: |
2642 | /* Do nothing in this case, this check is to prevent it | |
2643 | * from falling into default case | |
2644 | */ | |
2645 | break; | |
4440e46d AB |
2646 | case ABORT_IOCB_TYPE: |
2647 | qla24xx_abort_iocb_entry(vha, rsp->req, | |
2648 | (struct abort_entry_24xx *)pkt); | |
2649 | break; | |
9a853f71 AV |
2650 | default: |
2651 | /* Type Not Supported. */ | |
7c3df132 SK |
2652 | ql_dbg(ql_dbg_async, vha, 0x5042, |
2653 | "Received unknown response pkt type %x " | |
9a853f71 | 2654 | "entry status=%x.\n", |
7c3df132 | 2655 | pkt->entry_type, pkt->entry_status); |
9a853f71 AV |
2656 | break; |
2657 | } | |
2658 | ((response_t *)pkt)->signature = RESPONSE_PROCESSED; | |
2659 | wmb(); | |
2660 | } | |
2661 | ||
2662 | /* Adjust ring index */ | |
7ec0effd | 2663 | if (IS_P3P_TYPE(ha)) { |
a9083016 GM |
2664 | struct device_reg_82xx __iomem *reg = &ha->iobase->isp82; |
2665 | WRT_REG_DWORD(®->rsp_q_out[0], rsp->ring_index); | |
2666 | } else | |
2667 | WRT_REG_DWORD(rsp->rsp_q_out, rsp->ring_index); | |
9a853f71 AV |
2668 | } |
2669 | ||
05236a05 | 2670 | static void |
e315cd28 | 2671 | qla2xxx_check_risc_status(scsi_qla_host_t *vha) |
05236a05 AV |
2672 | { |
2673 | int rval; | |
2674 | uint32_t cnt; | |
e315cd28 | 2675 | struct qla_hw_data *ha = vha->hw; |
05236a05 AV |
2676 | struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; |
2677 | ||
f73cb695 CD |
2678 | if (!IS_QLA25XX(ha) && !IS_QLA81XX(ha) && !IS_QLA83XX(ha) && |
2679 | !IS_QLA27XX(ha)) | |
05236a05 AV |
2680 | return; |
2681 | ||
2682 | rval = QLA_SUCCESS; | |
2683 | WRT_REG_DWORD(®->iobase_addr, 0x7C00); | |
2684 | RD_REG_DWORD(®->iobase_addr); | |
2685 | WRT_REG_DWORD(®->iobase_window, 0x0001); | |
2686 | for (cnt = 10000; (RD_REG_DWORD(®->iobase_window) & BIT_0) == 0 && | |
2687 | rval == QLA_SUCCESS; cnt--) { | |
2688 | if (cnt) { | |
2689 | WRT_REG_DWORD(®->iobase_window, 0x0001); | |
2690 | udelay(10); | |
2691 | } else | |
2692 | rval = QLA_FUNCTION_TIMEOUT; | |
2693 | } | |
2694 | if (rval == QLA_SUCCESS) | |
2695 | goto next_test; | |
2696 | ||
b2ec76c5 | 2697 | rval = QLA_SUCCESS; |
05236a05 AV |
2698 | WRT_REG_DWORD(®->iobase_window, 0x0003); |
2699 | for (cnt = 100; (RD_REG_DWORD(®->iobase_window) & BIT_0) == 0 && | |
2700 | rval == QLA_SUCCESS; cnt--) { | |
2701 | if (cnt) { | |
2702 | WRT_REG_DWORD(®->iobase_window, 0x0003); | |
2703 | udelay(10); | |
2704 | } else | |
2705 | rval = QLA_FUNCTION_TIMEOUT; | |
2706 | } | |
2707 | if (rval != QLA_SUCCESS) | |
2708 | goto done; | |
2709 | ||
2710 | next_test: | |
2711 | if (RD_REG_DWORD(®->iobase_c8) & BIT_3) | |
7c3df132 SK |
2712 | ql_log(ql_log_info, vha, 0x504c, |
2713 | "Additional code -- 0x55AA.\n"); | |
05236a05 AV |
2714 | |
2715 | done: | |
2716 | WRT_REG_DWORD(®->iobase_window, 0x0000); | |
2717 | RD_REG_DWORD(®->iobase_window); | |
2718 | } | |
2719 | ||
9a853f71 | 2720 | /** |
6246b8a1 | 2721 | * qla24xx_intr_handler() - Process interrupts for the ISP23xx and ISP24xx. |
9a853f71 AV |
2722 | * @irq: |
2723 | * @dev_id: SCSI driver HA context | |
9a853f71 AV |
2724 | * |
2725 | * Called by system whenever the host adapter generates an interrupt. | |
2726 | * | |
2727 | * Returns handled flag. | |
2728 | */ | |
2729 | irqreturn_t | |
7d12e780 | 2730 | qla24xx_intr_handler(int irq, void *dev_id) |
9a853f71 | 2731 | { |
e315cd28 AC |
2732 | scsi_qla_host_t *vha; |
2733 | struct qla_hw_data *ha; | |
9a853f71 AV |
2734 | struct device_reg_24xx __iomem *reg; |
2735 | int status; | |
9a853f71 AV |
2736 | unsigned long iter; |
2737 | uint32_t stat; | |
2738 | uint32_t hccr; | |
7d613ac6 | 2739 | uint16_t mb[8]; |
e315cd28 | 2740 | struct rsp_que *rsp; |
43fac4d9 | 2741 | unsigned long flags; |
9a853f71 | 2742 | |
e315cd28 AC |
2743 | rsp = (struct rsp_que *) dev_id; |
2744 | if (!rsp) { | |
3256b435 CD |
2745 | ql_log(ql_log_info, NULL, 0x5059, |
2746 | "%s: NULL response queue pointer.\n", __func__); | |
9a853f71 AV |
2747 | return IRQ_NONE; |
2748 | } | |
2749 | ||
e315cd28 | 2750 | ha = rsp->hw; |
9a853f71 AV |
2751 | reg = &ha->iobase->isp24; |
2752 | status = 0; | |
2753 | ||
85880801 AV |
2754 | if (unlikely(pci_channel_offline(ha->pdev))) |
2755 | return IRQ_HANDLED; | |
2756 | ||
43fac4d9 | 2757 | spin_lock_irqsave(&ha->hardware_lock, flags); |
2afa19a9 | 2758 | vha = pci_get_drvdata(ha->pdev); |
9a853f71 AV |
2759 | for (iter = 50; iter--; ) { |
2760 | stat = RD_REG_DWORD(®->host_status); | |
c821e0d5 | 2761 | if (qla2x00_check_reg32_for_disconnect(vha, stat)) |
f3ddac19 | 2762 | break; |
9a853f71 | 2763 | if (stat & HSRX_RISC_PAUSED) { |
85880801 | 2764 | if (unlikely(pci_channel_offline(ha->pdev))) |
14e660e6 SJ |
2765 | break; |
2766 | ||
9a853f71 AV |
2767 | hccr = RD_REG_DWORD(®->hccr); |
2768 | ||
7c3df132 SK |
2769 | ql_log(ql_log_warn, vha, 0x504b, |
2770 | "RISC paused -- HCCR=%x, Dumping firmware.\n", | |
2771 | hccr); | |
05236a05 | 2772 | |
e315cd28 | 2773 | qla2xxx_check_risc_status(vha); |
05236a05 | 2774 | |
e315cd28 AC |
2775 | ha->isp_ops->fw_dump(vha, 1); |
2776 | set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); | |
9a853f71 AV |
2777 | break; |
2778 | } else if ((stat & HSRX_RISC_INT) == 0) | |
2779 | break; | |
2780 | ||
2781 | switch (stat & 0xff) { | |
fafbda9f AE |
2782 | case INTR_ROM_MB_SUCCESS: |
2783 | case INTR_ROM_MB_FAILED: | |
2784 | case INTR_MB_SUCCESS: | |
2785 | case INTR_MB_FAILED: | |
e315cd28 | 2786 | qla24xx_mbx_completion(vha, MSW(stat)); |
9a853f71 AV |
2787 | status |= MBX_INTERRUPT; |
2788 | ||
2789 | break; | |
fafbda9f | 2790 | case INTR_ASYNC_EVENT: |
9a853f71 AV |
2791 | mb[0] = MSW(stat); |
2792 | mb[1] = RD_REG_WORD(®->mailbox1); | |
2793 | mb[2] = RD_REG_WORD(®->mailbox2); | |
2794 | mb[3] = RD_REG_WORD(®->mailbox3); | |
73208dfd | 2795 | qla2x00_async_event(vha, rsp, mb); |
9a853f71 | 2796 | break; |
fafbda9f AE |
2797 | case INTR_RSP_QUE_UPDATE: |
2798 | case INTR_RSP_QUE_UPDATE_83XX: | |
2afa19a9 | 2799 | qla24xx_process_response_queue(vha, rsp); |
9a853f71 | 2800 | break; |
2f424b9b QT |
2801 | case INTR_ATIO_QUE_UPDATE:{ |
2802 | unsigned long flags2; | |
2803 | spin_lock_irqsave(&ha->tgt.atio_lock, flags2); | |
2804 | qlt_24xx_process_atio_queue(vha, 1); | |
2805 | spin_unlock_irqrestore(&ha->tgt.atio_lock, flags2); | |
2d70c103 | 2806 | break; |
2f424b9b QT |
2807 | } |
2808 | case INTR_ATIO_RSP_QUE_UPDATE: { | |
2809 | unsigned long flags2; | |
2810 | spin_lock_irqsave(&ha->tgt.atio_lock, flags2); | |
2811 | qlt_24xx_process_atio_queue(vha, 1); | |
2812 | spin_unlock_irqrestore(&ha->tgt.atio_lock, flags2); | |
2813 | ||
2d70c103 NB |
2814 | qla24xx_process_response_queue(vha, rsp); |
2815 | break; | |
2f424b9b | 2816 | } |
9a853f71 | 2817 | default: |
7c3df132 SK |
2818 | ql_dbg(ql_dbg_async, vha, 0x504f, |
2819 | "Unrecognized interrupt type (%d).\n", stat * 0xff); | |
9a853f71 AV |
2820 | break; |
2821 | } | |
2822 | WRT_REG_DWORD(®->hccr, HCCRX_CLR_RISC_INT); | |
2823 | RD_REG_DWORD_RELAXED(®->hccr); | |
cb860bbd GM |
2824 | if (unlikely(IS_QLA83XX(ha) && (ha->pdev->revision == 1))) |
2825 | ndelay(3500); | |
9a853f71 | 2826 | } |
36439832 | 2827 | qla2x00_handle_mbx_completion(ha, status); |
43fac4d9 | 2828 | spin_unlock_irqrestore(&ha->hardware_lock, flags); |
9a853f71 | 2829 | |
9a853f71 AV |
2830 | return IRQ_HANDLED; |
2831 | } | |
2832 | ||
a8488abe AV |
2833 | static irqreturn_t |
2834 | qla24xx_msix_rsp_q(int irq, void *dev_id) | |
2835 | { | |
e315cd28 AC |
2836 | struct qla_hw_data *ha; |
2837 | struct rsp_que *rsp; | |
a8488abe | 2838 | struct device_reg_24xx __iomem *reg; |
2afa19a9 | 2839 | struct scsi_qla_host *vha; |
0f19bc68 | 2840 | unsigned long flags; |
f3ddac19 | 2841 | uint32_t stat = 0; |
a8488abe | 2842 | |
e315cd28 AC |
2843 | rsp = (struct rsp_que *) dev_id; |
2844 | if (!rsp) { | |
3256b435 CD |
2845 | ql_log(ql_log_info, NULL, 0x505a, |
2846 | "%s: NULL response queue pointer.\n", __func__); | |
e315cd28 AC |
2847 | return IRQ_NONE; |
2848 | } | |
2849 | ha = rsp->hw; | |
a8488abe AV |
2850 | reg = &ha->iobase->isp24; |
2851 | ||
0f19bc68 | 2852 | spin_lock_irqsave(&ha->hardware_lock, flags); |
a8488abe | 2853 | |
a67093d4 | 2854 | vha = pci_get_drvdata(ha->pdev); |
f3ddac19 CD |
2855 | /* |
2856 | * Use host_status register to check to PCI disconnection before we | |
2857 | * we process the response queue. | |
2858 | */ | |
2859 | stat = RD_REG_DWORD(®->host_status); | |
c821e0d5 | 2860 | if (qla2x00_check_reg32_for_disconnect(vha, stat)) |
f3ddac19 | 2861 | goto out; |
2afa19a9 | 2862 | qla24xx_process_response_queue(vha, rsp); |
3155754a | 2863 | if (!ha->flags.disable_msix_handshake) { |
eb94114b AC |
2864 | WRT_REG_DWORD(®->hccr, HCCRX_CLR_RISC_INT); |
2865 | RD_REG_DWORD_RELAXED(®->hccr); | |
2866 | } | |
f3ddac19 | 2867 | out: |
0f19bc68 | 2868 | spin_unlock_irqrestore(&ha->hardware_lock, flags); |
a8488abe AV |
2869 | |
2870 | return IRQ_HANDLED; | |
2871 | } | |
2872 | ||
68ca949c AC |
2873 | static irqreturn_t |
2874 | qla25xx_msix_rsp_q(int irq, void *dev_id) | |
2875 | { | |
2876 | struct qla_hw_data *ha; | |
f3ddac19 | 2877 | scsi_qla_host_t *vha; |
68ca949c | 2878 | struct rsp_que *rsp; |
3155754a | 2879 | struct device_reg_24xx __iomem *reg; |
0f19bc68 | 2880 | unsigned long flags; |
f3ddac19 | 2881 | uint32_t hccr = 0; |
68ca949c AC |
2882 | |
2883 | rsp = (struct rsp_que *) dev_id; | |
2884 | if (!rsp) { | |
3256b435 CD |
2885 | ql_log(ql_log_info, NULL, 0x505b, |
2886 | "%s: NULL response queue pointer.\n", __func__); | |
68ca949c AC |
2887 | return IRQ_NONE; |
2888 | } | |
2889 | ha = rsp->hw; | |
f3ddac19 | 2890 | vha = pci_get_drvdata(ha->pdev); |
68ca949c | 2891 | |
3155754a | 2892 | /* Clear the interrupt, if enabled, for this response queue */ |
d424754c | 2893 | if (!ha->flags.disable_msix_handshake) { |
3155754a | 2894 | reg = &ha->iobase->isp24; |
0f19bc68 | 2895 | spin_lock_irqsave(&ha->hardware_lock, flags); |
3155754a | 2896 | WRT_REG_DWORD(®->hccr, HCCRX_CLR_RISC_INT); |
f3ddac19 | 2897 | hccr = RD_REG_DWORD_RELAXED(®->hccr); |
0f19bc68 | 2898 | spin_unlock_irqrestore(&ha->hardware_lock, flags); |
3155754a | 2899 | } |
c821e0d5 | 2900 | if (qla2x00_check_reg32_for_disconnect(vha, hccr)) |
f3ddac19 | 2901 | goto out; |
68ca949c AC |
2902 | queue_work_on((int) (rsp->id - 1), ha->wq, &rsp->q_work); |
2903 | ||
f3ddac19 | 2904 | out: |
68ca949c AC |
2905 | return IRQ_HANDLED; |
2906 | } | |
2907 | ||
a8488abe AV |
2908 | static irqreturn_t |
2909 | qla24xx_msix_default(int irq, void *dev_id) | |
2910 | { | |
e315cd28 AC |
2911 | scsi_qla_host_t *vha; |
2912 | struct qla_hw_data *ha; | |
2913 | struct rsp_que *rsp; | |
a8488abe AV |
2914 | struct device_reg_24xx __iomem *reg; |
2915 | int status; | |
a8488abe AV |
2916 | uint32_t stat; |
2917 | uint32_t hccr; | |
7d613ac6 | 2918 | uint16_t mb[8]; |
0f19bc68 | 2919 | unsigned long flags; |
a8488abe | 2920 | |
e315cd28 AC |
2921 | rsp = (struct rsp_que *) dev_id; |
2922 | if (!rsp) { | |
3256b435 CD |
2923 | ql_log(ql_log_info, NULL, 0x505c, |
2924 | "%s: NULL response queue pointer.\n", __func__); | |
e315cd28 AC |
2925 | return IRQ_NONE; |
2926 | } | |
2927 | ha = rsp->hw; | |
a8488abe AV |
2928 | reg = &ha->iobase->isp24; |
2929 | status = 0; | |
2930 | ||
0f19bc68 | 2931 | spin_lock_irqsave(&ha->hardware_lock, flags); |
2afa19a9 | 2932 | vha = pci_get_drvdata(ha->pdev); |
87f27015 | 2933 | do { |
a8488abe | 2934 | stat = RD_REG_DWORD(®->host_status); |
c821e0d5 | 2935 | if (qla2x00_check_reg32_for_disconnect(vha, stat)) |
f3ddac19 | 2936 | break; |
a8488abe | 2937 | if (stat & HSRX_RISC_PAUSED) { |
85880801 | 2938 | if (unlikely(pci_channel_offline(ha->pdev))) |
14e660e6 SJ |
2939 | break; |
2940 | ||
a8488abe AV |
2941 | hccr = RD_REG_DWORD(®->hccr); |
2942 | ||
7c3df132 SK |
2943 | ql_log(ql_log_info, vha, 0x5050, |
2944 | "RISC paused -- HCCR=%x, Dumping firmware.\n", | |
2945 | hccr); | |
05236a05 | 2946 | |
e315cd28 | 2947 | qla2xxx_check_risc_status(vha); |
05236a05 | 2948 | |
e315cd28 AC |
2949 | ha->isp_ops->fw_dump(vha, 1); |
2950 | set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); | |
a8488abe AV |
2951 | break; |
2952 | } else if ((stat & HSRX_RISC_INT) == 0) | |
2953 | break; | |
2954 | ||
2955 | switch (stat & 0xff) { | |
fafbda9f AE |
2956 | case INTR_ROM_MB_SUCCESS: |
2957 | case INTR_ROM_MB_FAILED: | |
2958 | case INTR_MB_SUCCESS: | |
2959 | case INTR_MB_FAILED: | |
e315cd28 | 2960 | qla24xx_mbx_completion(vha, MSW(stat)); |
a8488abe AV |
2961 | status |= MBX_INTERRUPT; |
2962 | ||
2963 | break; | |
fafbda9f | 2964 | case INTR_ASYNC_EVENT: |
a8488abe AV |
2965 | mb[0] = MSW(stat); |
2966 | mb[1] = RD_REG_WORD(®->mailbox1); | |
2967 | mb[2] = RD_REG_WORD(®->mailbox2); | |
2968 | mb[3] = RD_REG_WORD(®->mailbox3); | |
73208dfd | 2969 | qla2x00_async_event(vha, rsp, mb); |
a8488abe | 2970 | break; |
fafbda9f AE |
2971 | case INTR_RSP_QUE_UPDATE: |
2972 | case INTR_RSP_QUE_UPDATE_83XX: | |
2afa19a9 | 2973 | qla24xx_process_response_queue(vha, rsp); |
a8488abe | 2974 | break; |
2f424b9b QT |
2975 | case INTR_ATIO_QUE_UPDATE:{ |
2976 | unsigned long flags2; | |
2977 | spin_lock_irqsave(&ha->tgt.atio_lock, flags2); | |
2978 | qlt_24xx_process_atio_queue(vha, 1); | |
2979 | spin_unlock_irqrestore(&ha->tgt.atio_lock, flags2); | |
2d70c103 | 2980 | break; |
2f424b9b QT |
2981 | } |
2982 | case INTR_ATIO_RSP_QUE_UPDATE: { | |
2983 | unsigned long flags2; | |
2984 | spin_lock_irqsave(&ha->tgt.atio_lock, flags2); | |
2985 | qlt_24xx_process_atio_queue(vha, 1); | |
2986 | spin_unlock_irqrestore(&ha->tgt.atio_lock, flags2); | |
2987 | ||
2d70c103 NB |
2988 | qla24xx_process_response_queue(vha, rsp); |
2989 | break; | |
2f424b9b | 2990 | } |
a8488abe | 2991 | default: |
7c3df132 SK |
2992 | ql_dbg(ql_dbg_async, vha, 0x5051, |
2993 | "Unrecognized interrupt type (%d).\n", stat & 0xff); | |
a8488abe AV |
2994 | break; |
2995 | } | |
2996 | WRT_REG_DWORD(®->hccr, HCCRX_CLR_RISC_INT); | |
87f27015 | 2997 | } while (0); |
36439832 | 2998 | qla2x00_handle_mbx_completion(ha, status); |
0f19bc68 | 2999 | spin_unlock_irqrestore(&ha->hardware_lock, flags); |
a8488abe | 3000 | |
a8488abe AV |
3001 | return IRQ_HANDLED; |
3002 | } | |
3003 | ||
3004 | /* Interrupt handling helpers. */ | |
3005 | ||
3006 | struct qla_init_msix_entry { | |
a8488abe | 3007 | const char *name; |
476834c2 | 3008 | irq_handler_t handler; |
a8488abe AV |
3009 | }; |
3010 | ||
68ca949c | 3011 | static struct qla_init_msix_entry msix_entries[3] = { |
2afa19a9 AC |
3012 | { "qla2xxx (default)", qla24xx_msix_default }, |
3013 | { "qla2xxx (rsp_q)", qla24xx_msix_rsp_q }, | |
68ca949c | 3014 | { "qla2xxx (multiq)", qla25xx_msix_rsp_q }, |
a8488abe AV |
3015 | }; |
3016 | ||
a9083016 GM |
3017 | static struct qla_init_msix_entry qla82xx_msix_entries[2] = { |
3018 | { "qla2xxx (default)", qla82xx_msix_default }, | |
3019 | { "qla2xxx (rsp_q)", qla82xx_msix_rsp_q }, | |
3020 | }; | |
3021 | ||
aa230bc5 AE |
3022 | static struct qla_init_msix_entry qla83xx_msix_entries[3] = { |
3023 | { "qla2xxx (default)", qla24xx_msix_default }, | |
3024 | { "qla2xxx (rsp_q)", qla24xx_msix_rsp_q }, | |
3025 | { "qla2xxx (atio_q)", qla83xx_msix_atio_q }, | |
3026 | }; | |
3027 | ||
a8488abe | 3028 | static void |
e315cd28 | 3029 | qla24xx_disable_msix(struct qla_hw_data *ha) |
a8488abe AV |
3030 | { |
3031 | int i; | |
3032 | struct qla_msix_entry *qentry; | |
7c3df132 | 3033 | scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); |
a8488abe | 3034 | |
73208dfd AC |
3035 | for (i = 0; i < ha->msix_count; i++) { |
3036 | qentry = &ha->msix_entries[i]; | |
cdb898c5 QT |
3037 | if (qentry->have_irq) { |
3038 | /* un-register irq cpu affinity notification */ | |
3039 | irq_set_affinity_notifier(qentry->vector, NULL); | |
73208dfd | 3040 | free_irq(qentry->vector, qentry->rsp); |
cdb898c5 | 3041 | } |
a8488abe AV |
3042 | } |
3043 | pci_disable_msix(ha->pdev); | |
73208dfd AC |
3044 | kfree(ha->msix_entries); |
3045 | ha->msix_entries = NULL; | |
3046 | ha->flags.msix_enabled = 0; | |
7c3df132 SK |
3047 | ql_dbg(ql_dbg_init, vha, 0x0042, |
3048 | "Disabled the MSI.\n"); | |
a8488abe AV |
3049 | } |
3050 | ||
3051 | static int | |
73208dfd | 3052 | qla24xx_enable_msix(struct qla_hw_data *ha, struct rsp_que *rsp) |
a8488abe | 3053 | { |
ad038fa8 | 3054 | #define MIN_MSIX_COUNT 2 |
f324777e | 3055 | #define ATIO_VECTOR 2 |
a8488abe | 3056 | int i, ret; |
73208dfd | 3057 | struct msix_entry *entries; |
a8488abe | 3058 | struct qla_msix_entry *qentry; |
7c3df132 | 3059 | scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); |
73208dfd AC |
3060 | |
3061 | entries = kzalloc(sizeof(struct msix_entry) * ha->msix_count, | |
a9083016 | 3062 | GFP_KERNEL); |
7c3df132 SK |
3063 | if (!entries) { |
3064 | ql_log(ql_log_warn, vha, 0x00bc, | |
3065 | "Failed to allocate memory for msix_entry.\n"); | |
73208dfd | 3066 | return -ENOMEM; |
7c3df132 | 3067 | } |
a8488abe | 3068 | |
73208dfd AC |
3069 | for (i = 0; i < ha->msix_count; i++) |
3070 | entries[i].entry = i; | |
a8488abe | 3071 | |
84e32a06 AG |
3072 | ret = pci_enable_msix_range(ha->pdev, |
3073 | entries, MIN_MSIX_COUNT, ha->msix_count); | |
3074 | if (ret < 0) { | |
3075 | ql_log(ql_log_fatal, vha, 0x00c7, | |
3076 | "MSI-X: Failed to enable support, " | |
3077 | "giving up -- %d/%d.\n", | |
3078 | ha->msix_count, ret); | |
3079 | goto msix_out; | |
3080 | } else if (ret < ha->msix_count) { | |
7c3df132 SK |
3081 | ql_log(ql_log_warn, vha, 0x00c6, |
3082 | "MSI-X: Failed to enable support " | |
3083 | "-- %d/%d\n Retry with %d vectors.\n", | |
3084 | ha->msix_count, ret, ret); | |
cb43285f QT |
3085 | ha->msix_count = ret; |
3086 | ha->max_rsp_queues = ha->msix_count - 1; | |
73208dfd AC |
3087 | } |
3088 | ha->msix_entries = kzalloc(sizeof(struct qla_msix_entry) * | |
3089 | ha->msix_count, GFP_KERNEL); | |
3090 | if (!ha->msix_entries) { | |
7c3df132 SK |
3091 | ql_log(ql_log_fatal, vha, 0x00c8, |
3092 | "Failed to allocate memory for ha->msix_entries.\n"); | |
73208dfd | 3093 | ret = -ENOMEM; |
a8488abe AV |
3094 | goto msix_out; |
3095 | } | |
3096 | ha->flags.msix_enabled = 1; | |
3097 | ||
73208dfd AC |
3098 | for (i = 0; i < ha->msix_count; i++) { |
3099 | qentry = &ha->msix_entries[i]; | |
3100 | qentry->vector = entries[i].vector; | |
3101 | qentry->entry = entries[i].entry; | |
a8488abe | 3102 | qentry->have_irq = 0; |
73208dfd | 3103 | qentry->rsp = NULL; |
cdb898c5 QT |
3104 | qentry->irq_notify.notify = qla_irq_affinity_notify; |
3105 | qentry->irq_notify.release = qla_irq_affinity_release; | |
3106 | qentry->cpuid = -1; | |
a8488abe AV |
3107 | } |
3108 | ||
2afa19a9 | 3109 | /* Enable MSI-X vectors for the base queue */ |
f324777e | 3110 | for (i = 0; i < 2; i++) { |
2afa19a9 | 3111 | qentry = &ha->msix_entries[i]; |
ef8d1d51 JT |
3112 | qentry->rsp = rsp; |
3113 | rsp->msix = qentry; | |
f324777e | 3114 | if (IS_P3P_TYPE(ha)) |
a9083016 GM |
3115 | ret = request_irq(qentry->vector, |
3116 | qla82xx_msix_entries[i].handler, | |
3117 | 0, qla82xx_msix_entries[i].name, rsp); | |
f324777e | 3118 | else |
a9083016 GM |
3119 | ret = request_irq(qentry->vector, |
3120 | msix_entries[i].handler, | |
3121 | 0, msix_entries[i].name, rsp); | |
f324777e CD |
3122 | if (ret) |
3123 | goto msix_register_fail; | |
3124 | qentry->have_irq = 1; | |
cdb898c5 QT |
3125 | |
3126 | /* Register for CPU affinity notification. */ | |
3127 | irq_set_affinity_notifier(qentry->vector, &qentry->irq_notify); | |
3128 | ||
3129 | /* Schedule work (ie. trigger a notification) to read cpu | |
3130 | * mask for this specific irq. | |
3131 | * kref_get is required because | |
3132 | * irq_affinity_notify() will do | |
3133 | * kref_put(). | |
3134 | */ | |
3135 | kref_get(&qentry->irq_notify.kref); | |
3136 | schedule_work(&qentry->irq_notify.work); | |
f324777e CD |
3137 | } |
3138 | ||
3139 | /* | |
3140 | * If target mode is enable, also request the vector for the ATIO | |
3141 | * queue. | |
3142 | */ | |
3143 | if (QLA_TGT_MODE_ENABLED() && IS_ATIO_MSIX_CAPABLE(ha)) { | |
3144 | qentry = &ha->msix_entries[ATIO_VECTOR]; | |
ef8d1d51 JT |
3145 | qentry->rsp = rsp; |
3146 | rsp->msix = qentry; | |
f324777e CD |
3147 | ret = request_irq(qentry->vector, |
3148 | qla83xx_msix_entries[ATIO_VECTOR].handler, | |
3149 | 0, qla83xx_msix_entries[ATIO_VECTOR].name, rsp); | |
2afa19a9 | 3150 | qentry->have_irq = 1; |
73208dfd | 3151 | } |
73208dfd | 3152 | |
f324777e CD |
3153 | msix_register_fail: |
3154 | if (ret) { | |
3155 | ql_log(ql_log_fatal, vha, 0x00cb, | |
3156 | "MSI-X: unable to register handler -- %x/%d.\n", | |
3157 | qentry->vector, ret); | |
3158 | qla24xx_disable_msix(ha); | |
3159 | ha->mqenable = 0; | |
3160 | goto msix_out; | |
3161 | } | |
3162 | ||
73208dfd | 3163 | /* Enable MSI-X vector for response queue update for queue 0 */ |
f73cb695 | 3164 | if (IS_QLA83XX(ha) || IS_QLA27XX(ha)) { |
6246b8a1 GM |
3165 | if (ha->msixbase && ha->mqiobase && |
3166 | (ha->max_rsp_queues > 1 || ha->max_req_queues > 1)) | |
3167 | ha->mqenable = 1; | |
3168 | } else | |
3169 | if (ha->mqiobase | |
3170 | && (ha->max_rsp_queues > 1 || ha->max_req_queues > 1)) | |
3171 | ha->mqenable = 1; | |
7c3df132 SK |
3172 | ql_dbg(ql_dbg_multiq, vha, 0xc005, |
3173 | "mqiobase=%p, max_rsp_queues=%d, max_req_queues=%d.\n", | |
3174 | ha->mqiobase, ha->max_rsp_queues, ha->max_req_queues); | |
3175 | ql_dbg(ql_dbg_init, vha, 0x0055, | |
3176 | "mqiobase=%p, max_rsp_queues=%d, max_req_queues=%d.\n", | |
3177 | ha->mqiobase, ha->max_rsp_queues, ha->max_req_queues); | |
73208dfd | 3178 | |
a8488abe | 3179 | msix_out: |
73208dfd | 3180 | kfree(entries); |
a8488abe AV |
3181 | return ret; |
3182 | } | |
3183 | ||
3184 | int | |
73208dfd | 3185 | qla2x00_request_irqs(struct qla_hw_data *ha, struct rsp_que *rsp) |
a8488abe | 3186 | { |
7fa3e239 | 3187 | int ret = QLA_FUNCTION_FAILED; |
f73cb695 | 3188 | device_reg_t *reg = ha->iobase; |
7c3df132 | 3189 | scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); |
a8488abe AV |
3190 | |
3191 | /* If possible, enable MSI-X. */ | |
6246b8a1 | 3192 | if (!IS_QLA2432(ha) && !IS_QLA2532(ha) && !IS_QLA8432(ha) && |
f73cb695 CD |
3193 | !IS_CNA_CAPABLE(ha) && !IS_QLA2031(ha) && !IS_QLAFX00(ha) && |
3194 | !IS_QLA27XX(ha)) | |
6377a7ae BH |
3195 | goto skip_msi; |
3196 | ||
3197 | if (ha->pdev->subsystem_vendor == PCI_VENDOR_ID_HP && | |
3198 | (ha->pdev->subsystem_device == 0x7040 || | |
3199 | ha->pdev->subsystem_device == 0x7041 || | |
3200 | ha->pdev->subsystem_device == 0x1705)) { | |
7c3df132 SK |
3201 | ql_log(ql_log_warn, vha, 0x0034, |
3202 | "MSI-X: Unsupported ISP 2432 SSVID/SSDID (0x%X,0x%X).\n", | |
6377a7ae | 3203 | ha->pdev->subsystem_vendor, |
7c3df132 | 3204 | ha->pdev->subsystem_device); |
6377a7ae BH |
3205 | goto skip_msi; |
3206 | } | |
a8488abe | 3207 | |
42cd4f5d | 3208 | if (IS_QLA2432(ha) && (ha->pdev->revision < QLA_MSIX_CHIP_REV_24XX)) { |
7c3df132 SK |
3209 | ql_log(ql_log_warn, vha, 0x0035, |
3210 | "MSI-X; Unsupported ISP2432 (0x%X, 0x%X).\n", | |
42cd4f5d | 3211 | ha->pdev->revision, QLA_MSIX_CHIP_REV_24XX); |
a8488abe AV |
3212 | goto skip_msix; |
3213 | } | |
3214 | ||
73208dfd | 3215 | ret = qla24xx_enable_msix(ha, rsp); |
a8488abe | 3216 | if (!ret) { |
7c3df132 SK |
3217 | ql_dbg(ql_dbg_init, vha, 0x0036, |
3218 | "MSI-X: Enabled (0x%X, 0x%X).\n", | |
3219 | ha->chip_revision, ha->fw_attributes); | |
963b0fdd | 3220 | goto clear_risc_ints; |
a8488abe | 3221 | } |
7fa3e239 | 3222 | |
a8488abe | 3223 | skip_msix: |
cbedb601 | 3224 | |
7fa3e239 SC |
3225 | ql_log(ql_log_info, vha, 0x0037, |
3226 | "Falling back-to MSI mode -%d.\n", ret); | |
3227 | ||
3a03eb79 | 3228 | if (!IS_QLA24XX(ha) && !IS_QLA2532(ha) && !IS_QLA8432(ha) && |
f73cb695 CD |
3229 | !IS_QLA8001(ha) && !IS_P3P_TYPE(ha) && !IS_QLAFX00(ha) && |
3230 | !IS_QLA27XX(ha)) | |
cbedb601 AV |
3231 | goto skip_msi; |
3232 | ||
3233 | ret = pci_enable_msi(ha->pdev); | |
3234 | if (!ret) { | |
7c3df132 SK |
3235 | ql_dbg(ql_dbg_init, vha, 0x0038, |
3236 | "MSI: Enabled.\n"); | |
cbedb601 | 3237 | ha->flags.msi_enabled = 1; |
a9083016 | 3238 | } else |
7c3df132 | 3239 | ql_log(ql_log_warn, vha, 0x0039, |
7fa3e239 SC |
3240 | "Falling back-to INTa mode -- %d.\n", ret); |
3241 | skip_msi: | |
a033b655 GM |
3242 | |
3243 | /* Skip INTx on ISP82xx. */ | |
3244 | if (!ha->flags.msi_enabled && IS_QLA82XX(ha)) | |
3245 | return QLA_FUNCTION_FAILED; | |
3246 | ||
fd34f556 | 3247 | ret = request_irq(ha->pdev->irq, ha->isp_ops->intr_handler, |
7992abfc MH |
3248 | ha->flags.msi_enabled ? 0 : IRQF_SHARED, |
3249 | QLA2XXX_DRIVER_NAME, rsp); | |
963b0fdd | 3250 | if (ret) { |
7c3df132 | 3251 | ql_log(ql_log_warn, vha, 0x003a, |
a8488abe AV |
3252 | "Failed to reserve interrupt %d already in use.\n", |
3253 | ha->pdev->irq); | |
963b0fdd | 3254 | goto fail; |
8ae6d9c7 | 3255 | } else if (!ha->flags.msi_enabled) { |
68d91cbd SK |
3256 | ql_dbg(ql_dbg_init, vha, 0x0125, |
3257 | "INTa mode: Enabled.\n"); | |
8ae6d9c7 GM |
3258 | ha->flags.mr_intr_valid = 1; |
3259 | } | |
7992abfc | 3260 | |
963b0fdd | 3261 | clear_risc_ints: |
4bb2efc4 JC |
3262 | if (IS_FWI2_CAPABLE(ha) || IS_QLAFX00(ha)) |
3263 | goto fail; | |
963b0fdd | 3264 | |
c6952483 | 3265 | spin_lock_irq(&ha->hardware_lock); |
4bb2efc4 | 3266 | WRT_REG_WORD(®->isp.semaphore, 0); |
c6952483 | 3267 | spin_unlock_irq(&ha->hardware_lock); |
a8488abe | 3268 | |
963b0fdd | 3269 | fail: |
a8488abe AV |
3270 | return ret; |
3271 | } | |
3272 | ||
3273 | void | |
e315cd28 | 3274 | qla2x00_free_irqs(scsi_qla_host_t *vha) |
a8488abe | 3275 | { |
e315cd28 | 3276 | struct qla_hw_data *ha = vha->hw; |
9a347ff4 CD |
3277 | struct rsp_que *rsp; |
3278 | ||
3279 | /* | |
3280 | * We need to check that ha->rsp_q_map is valid in case we are called | |
3281 | * from a probe failure context. | |
3282 | */ | |
3283 | if (!ha->rsp_q_map || !ha->rsp_q_map[0]) | |
3284 | return; | |
3285 | rsp = ha->rsp_q_map[0]; | |
a8488abe AV |
3286 | |
3287 | if (ha->flags.msix_enabled) | |
3288 | qla24xx_disable_msix(ha); | |
90a86fc0 | 3289 | else if (ha->flags.msi_enabled) { |
e315cd28 | 3290 | free_irq(ha->pdev->irq, rsp); |
cbedb601 | 3291 | pci_disable_msi(ha->pdev); |
90a86fc0 JC |
3292 | } else |
3293 | free_irq(ha->pdev->irq, rsp); | |
a8488abe | 3294 | } |
e315cd28 | 3295 | |
73208dfd AC |
3296 | |
3297 | int qla25xx_request_irq(struct rsp_que *rsp) | |
3298 | { | |
3299 | struct qla_hw_data *ha = rsp->hw; | |
2afa19a9 | 3300 | struct qla_init_msix_entry *intr = &msix_entries[2]; |
73208dfd | 3301 | struct qla_msix_entry *msix = rsp->msix; |
7c3df132 | 3302 | scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); |
73208dfd AC |
3303 | int ret; |
3304 | ||
3305 | ret = request_irq(msix->vector, intr->handler, 0, intr->name, rsp); | |
3306 | if (ret) { | |
7c3df132 SK |
3307 | ql_log(ql_log_fatal, vha, 0x00e6, |
3308 | "MSI-X: Unable to register handler -- %x/%d.\n", | |
3309 | msix->vector, ret); | |
73208dfd AC |
3310 | return ret; |
3311 | } | |
3312 | msix->have_irq = 1; | |
3313 | msix->rsp = rsp; | |
3314 | return ret; | |
3315 | } | |
cdb898c5 QT |
3316 | |
3317 | ||
3318 | /* irq_set_affinity/irqbalance will trigger notification of cpu mask update */ | |
3319 | static void qla_irq_affinity_notify(struct irq_affinity_notify *notify, | |
3320 | const cpumask_t *mask) | |
3321 | { | |
3322 | struct qla_msix_entry *e = | |
3323 | container_of(notify, struct qla_msix_entry, irq_notify); | |
3324 | struct qla_hw_data *ha; | |
3325 | struct scsi_qla_host *base_vha; | |
3326 | ||
3327 | /* user is recommended to set mask to just 1 cpu */ | |
3328 | e->cpuid = cpumask_first(mask); | |
3329 | ||
3330 | ha = e->rsp->hw; | |
3331 | base_vha = pci_get_drvdata(ha->pdev); | |
3332 | ||
3333 | ql_dbg(ql_dbg_init, base_vha, 0xffff, | |
3334 | "%s: host %ld : vector %d cpu %d \n", __func__, | |
3335 | base_vha->host_no, e->vector, e->cpuid); | |
3336 | ||
3337 | if (e->have_irq) { | |
3338 | if ((IS_QLA83XX(ha) || IS_QLA27XX(ha)) && | |
3339 | (e->entry == QLA83XX_RSPQ_MSIX_ENTRY_NUMBER)) { | |
3340 | ha->tgt.rspq_vector_cpuid = e->cpuid; | |
3341 | ql_dbg(ql_dbg_init, base_vha, 0xffff, | |
3342 | "%s: host%ld: rspq vector %d cpu %d runtime change\n", | |
3343 | __func__, base_vha->host_no, e->vector, e->cpuid); | |
3344 | } | |
3345 | } | |
3346 | } | |
3347 | ||
fb3269ba | 3348 | static void qla_irq_affinity_release(struct kref *ref) |
cdb898c5 QT |
3349 | { |
3350 | struct irq_affinity_notify *notify = | |
3351 | container_of(ref, struct irq_affinity_notify, kref); | |
3352 | struct qla_msix_entry *e = | |
3353 | container_of(notify, struct qla_msix_entry, irq_notify); | |
3354 | struct scsi_qla_host *base_vha = pci_get_drvdata(e->rsp->hw->pdev); | |
3355 | ||
3356 | ql_dbg(ql_dbg_init, base_vha, 0xffff, | |
3357 | "%s: host%ld: vector %d cpu %d \n", __func__, | |
3358 | base_vha->host_no, e->vector, e->cpuid); | |
3359 | } |