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scsi: qla2xxx: Leave a blank line after declarations
[linux-2.6-block.git] / drivers / scsi / qla2xxx / qla_isr.c
CommitLineData
1da177e4 1/*
fa90c54f 2 * QLogic Fibre Channel HBA Driver
bd21eaf9 3 * Copyright (c) 2003-2014 QLogic Corporation
1da177e4 4 *
fa90c54f 5 * See LICENSE.qla2xxx for copyright and licensing details.
1da177e4
LT		 6 */
7#include "qla_def.h"
2d70c103 8#include "qla_target.h"
1da177e4 9
05236a05 10#include <linux/delay.h>
5a0e3ad6 11#include <linux/slab.h>
e326d22a 12#include <linux/cpu.h>
09ce66ae 13#include <linux/t10-pi.h>
df7baa50 14#include <scsi/scsi_tcq.h>
9a069e19 15#include <scsi/scsi_bsg_fc.h>
bad75002 16#include <scsi/scsi_eh.h>
d32041ec
JT		 17#include <scsi/fc/fc_fs.h>
18#include <linux/nvme-fc-driver.h>
df7baa50 19
1da177e4 20static void qla2x00_mbx_completion(scsi_qla_host_t *, uint16_t);
73208dfd 21static void qla2x00_status_entry(scsi_qla_host_t *, struct rsp_que *, void *);
2afa19a9 22static void qla2x00_status_cont_entry(struct rsp_que *, sts_cont_entry_t *);
c5419e26 23static int qla2x00_error_entry(scsi_qla_host_t *, struct rsp_que *,
73208dfd 24 sts_entry_t *);
9a853f71 25
1da177e4
LT		 26/**
27 * qla2100_intr_handler() - Process interrupts for the ISP2100 and ISP2200.
807eb907 28 * @irq: interrupt number
1da177e4 29 * @dev_id: SCSI driver HA context
1da177e4
LT		 30 *
31 * Called by system whenever the host adapter generates an interrupt.
32 *
33 * Returns handled flag.
34 */
35irqreturn_t
7d12e780 36qla2100_intr_handler(int irq, void *dev_id)
1da177e4 37{
e315cd28
AC		 38 scsi_qla_host_t *vha;
39 struct qla_hw_data *ha;
3d71644c 40 struct device_reg_2xxx __iomem *reg;
1da177e4 41 int status;
1da177e4 42 unsigned long iter;
14e660e6 43 uint16_t hccr;
9a853f71 44 uint16_t mb[4];
e315cd28 45 struct rsp_que *rsp;
43fac4d9 46 unsigned long flags;
1da177e4 47
e315cd28
AC		 48 rsp = (struct rsp_que *) dev_id;
49 if (!rsp) {
3256b435
CD		 50 ql_log(ql_log_info, NULL, 0x505d,
51 "%s: NULL response queue pointer.\n", __func__);
1da177e4
LT		 52 return (IRQ_NONE);
53 }
54
e315cd28 55 ha = rsp->hw;
3d71644c 56 reg = &ha->iobase->isp;
1da177e4
LT		 57 status = 0;
58
43fac4d9 59 spin_lock_irqsave(&ha->hardware_lock, flags);
2afa19a9 60 vha = pci_get_drvdata(ha->pdev);
1da177e4 61 for (iter = 50; iter--; ) {
14e660e6 62 hccr = RD_REG_WORD(&reg->hccr);
c821e0d5 63 if (qla2x00_check_reg16_for_disconnect(vha, hccr))
f3ddac19 64 break;
14e660e6
SJ		 65 if (hccr & HCCR_RISC_PAUSE) {
66 if (pci_channel_offline(ha->pdev))
67 break;
68
69 /*
70 * Issue a "HARD" reset in order for the RISC interrupt
a06a0f8e 71 * bit to be cleared. Schedule a big hammer to get
14e660e6
SJ		 72 * out of the RISC PAUSED state.
73 */
74 WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
75 RD_REG_WORD(&reg->hccr);
76
e315cd28
AC		 77 ha->isp_ops->fw_dump(vha, 1);
78 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
14e660e6
SJ		 79 break;
80 } else if ((RD_REG_WORD(&reg->istatus) & ISR_RISC_INT) == 0)
1da177e4
LT		 81 break;
82
83 if (RD_REG_WORD(&reg->semaphore) & BIT_0) {
84 WRT_REG_WORD(&reg->hccr, HCCR_CLR_RISC_INT);
85 RD_REG_WORD(&reg->hccr);
86
87 /* Get mailbox data. */
9a853f71
AV		 88 mb[0] = RD_MAILBOX_REG(ha, reg, 0);
89 if (mb[0] > 0x3fff && mb[0] < 0x8000) {
e315cd28 90 qla2x00_mbx_completion(vha, mb[0]);
1da177e4 91 status |= MBX_INTERRUPT;
9a853f71
AV		 92 } else if (mb[0] > 0x7fff && mb[0] < 0xc000) {
93 mb[1] = RD_MAILBOX_REG(ha, reg, 1);
94 mb[2] = RD_MAILBOX_REG(ha, reg, 2);
95 mb[3] = RD_MAILBOX_REG(ha, reg, 3);
73208dfd 96 qla2x00_async_event(vha, rsp, mb);
1da177e4
LT		 97 } else {
98 /*EMPTY*/
7c3df132
SK		 99 ql_dbg(ql_dbg_async, vha, 0x5025,
100 "Unrecognized interrupt type (%d).\n",
101 mb[0]);
1da177e4
LT		 102 }
103 /* Release mailbox registers. */
104 WRT_REG_WORD(&reg->semaphore, 0);
105 RD_REG_WORD(&reg->semaphore);
106 } else {
73208dfd 107 qla2x00_process_response_queue(rsp);
1da177e4
LT		 108
109 WRT_REG_WORD(&reg->hccr, HCCR_CLR_RISC_INT);
110 RD_REG_WORD(&reg->hccr);
111 }
112 }
36439832 113 qla2x00_handle_mbx_completion(ha, status);
43fac4d9 114 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1da177e4 115
1da177e4
LT		 116 return (IRQ_HANDLED);
117}
118
f3ddac19 119bool
c821e0d5 120qla2x00_check_reg32_for_disconnect(scsi_qla_host_t *vha, uint32_t reg)
f3ddac19
CD		 121{
122 /* Check for PCI disconnection */
a30c2a3b 123 if (reg == 0xffffffff && !pci_channel_offline(vha->hw->pdev)) {
beb9e315 124 if (!test_and_set_bit(PFLG_DISCONNECTED, &vha->pci_flags) &&
6b383979
JL		 125 !test_bit(PFLG_DRIVER_REMOVING, &vha->pci_flags) &&
126 !test_bit(PFLG_DRIVER_PROBING, &vha->pci_flags)) {
232792b6
JL		 127 /*
128 * Schedule this (only once) on the default system
129 * workqueue so that all the adapter workqueues and the
130 * DPC thread can be shutdown cleanly.
131 */
132 schedule_work(&vha->hw->board_disable);
133 }
f3ddac19
CD		 134 return true;
135 } else
136 return false;
137}
138
c821e0d5
JL		 139bool
140qla2x00_check_reg16_for_disconnect(scsi_qla_host_t *vha, uint16_t reg)
141{
142 return qla2x00_check_reg32_for_disconnect(vha, 0xffff0000 | reg);
143}
144
1da177e4
LT		 145/**
146 * qla2300_intr_handler() - Process interrupts for the ISP23xx and ISP63xx.
807eb907 147 * @irq: interrupt number
1da177e4 148 * @dev_id: SCSI driver HA context
1da177e4
LT		 149 *
150 * Called by system whenever the host adapter generates an interrupt.
151 *
152 * Returns handled flag.
153 */
154irqreturn_t
7d12e780 155qla2300_intr_handler(int irq, void *dev_id)
1da177e4 156{
e315cd28 157 scsi_qla_host_t *vha;
3d71644c 158 struct device_reg_2xxx __iomem *reg;
1da177e4 159 int status;
1da177e4
LT		 160 unsigned long iter;
161 uint32_t stat;
1da177e4 162 uint16_t hccr;
9a853f71 163 uint16_t mb[4];
e315cd28
AC		 164 struct rsp_que *rsp;
165 struct qla_hw_data *ha;
43fac4d9 166 unsigned long flags;
1da177e4 167
e315cd28
AC		 168 rsp = (struct rsp_que *) dev_id;
169 if (!rsp) {
3256b435
CD		 170 ql_log(ql_log_info, NULL, 0x5058,
171 "%s: NULL response queue pointer.\n", __func__);
1da177e4
LT		 172 return (IRQ_NONE);
173 }
174
e315cd28 175 ha = rsp->hw;
3d71644c 176 reg = &ha->iobase->isp;
1da177e4
LT		 177 status = 0;
178
43fac4d9 179 spin_lock_irqsave(&ha->hardware_lock, flags);
2afa19a9 180 vha = pci_get_drvdata(ha->pdev);
1da177e4
LT		 181 for (iter = 50; iter--; ) {
182 stat = RD_REG_DWORD(&reg->u.isp2300.host_status);
c821e0d5 183 if (qla2x00_check_reg32_for_disconnect(vha, stat))
f3ddac19 184 break;
1da177e4 185 if (stat & HSR_RISC_PAUSED) {
85880801 186 if (unlikely(pci_channel_offline(ha->pdev)))
14e660e6
SJ		 187 break;
188
1da177e4 189 hccr = RD_REG_WORD(&reg->hccr);
f3ddac19 190
1da177e4 191 if (hccr & (BIT_15 | BIT_13 | BIT_11 | BIT_8))
7c3df132
SK		 192 ql_log(ql_log_warn, vha, 0x5026,
193 "Parity error -- HCCR=%x, Dumping "
194 "firmware.\n", hccr);
1da177e4 195 else
7c3df132
SK		 196 ql_log(ql_log_warn, vha, 0x5027,
197 "RISC paused -- HCCR=%x, Dumping "
198 "firmware.\n", hccr);
1da177e4
LT		 199
200 /*
201 * Issue a "HARD" reset in order for the RISC
202 * interrupt bit to be cleared. Schedule a big
a06a0f8e 203 * hammer to get out of the RISC PAUSED state.
1da177e4
LT		 204 */
205 WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
206 RD_REG_WORD(&reg->hccr);
07f31805 207
e315cd28
AC		 208 ha->isp_ops->fw_dump(vha, 1);
209 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
1da177e4
LT		 210 break;
211 } else if ((stat & HSR_RISC_INT) == 0)
212 break;
213
1da177e4 214 switch (stat & 0xff) {
1da177e4
LT		 215 case 0x1:
216 case 0x2:
217 case 0x10:
218 case 0x11:
e315cd28 219 qla2x00_mbx_completion(vha, MSW(stat));
1da177e4
LT		 220 status |= MBX_INTERRUPT;
221
222 /* Release mailbox registers. */
223 WRT_REG_WORD(&reg->semaphore, 0);
224 break;
225 case 0x12:
9a853f71
AV		 226 mb[0] = MSW(stat);
227 mb[1] = RD_MAILBOX_REG(ha, reg, 1);
228 mb[2] = RD_MAILBOX_REG(ha, reg, 2);
229 mb[3] = RD_MAILBOX_REG(ha, reg, 3);
73208dfd 230 qla2x00_async_event(vha, rsp, mb);
9a853f71
AV		 231 break;
232 case 0x13:
73208dfd 233 qla2x00_process_response_queue(rsp);
1da177e4
LT		 234 break;
235 case 0x15:
9a853f71
AV		 236 mb[0] = MBA_CMPLT_1_16BIT;
237 mb[1] = MSW(stat);
73208dfd 238 qla2x00_async_event(vha, rsp, mb);
1da177e4
LT		 239 break;
240 case 0x16:
9a853f71
AV		 241 mb[0] = MBA_SCSI_COMPLETION;
242 mb[1] = MSW(stat);
243 mb[2] = RD_MAILBOX_REG(ha, reg, 2);
73208dfd 244 qla2x00_async_event(vha, rsp, mb);
1da177e4
LT		 245 break;
246 default:
7c3df132
SK		 247 ql_dbg(ql_dbg_async, vha, 0x5028,
248 "Unrecognized interrupt type (%d).\n", stat & 0xff);
1da177e4
LT		 249 break;
250 }
251 WRT_REG_WORD(&reg->hccr, HCCR_CLR_RISC_INT);
252 RD_REG_WORD_RELAXED(&reg->hccr);
253 }
36439832 254 qla2x00_handle_mbx_completion(ha, status);
43fac4d9 255 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1da177e4 256
1da177e4
LT		 257 return (IRQ_HANDLED);
258}
259
260/**
261 * qla2x00_mbx_completion() - Process mailbox command completions.
2db6228d 262 * @vha: SCSI driver HA context
1da177e4
LT		 263 * @mb0: Mailbox0 register
264 */
265static void
e315cd28 266qla2x00_mbx_completion(scsi_qla_host_t *vha, uint16_t mb0)
1da177e4
LT		 267{
268 uint16_t cnt;
4fa94f83 269 uint32_t mboxes;
1da177e4 270 uint16_t __iomem *wptr;
e315cd28 271 struct qla_hw_data *ha = vha->hw;
3d71644c 272 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1da177e4 273
4fa94f83 274 /* Read all mbox registers? */
c02189e1
BVA		 275 WARN_ON_ONCE(ha->mbx_count > 32);
276 mboxes = (1ULL << ha->mbx_count) - 1;
4fa94f83 277 if (!ha->mcp)
a720101d 278 ql_dbg(ql_dbg_async, vha, 0x5001, "MBX pointer ERROR.\n");
4fa94f83
AV		 279 else
280 mboxes = ha->mcp->in_mb;
281
1da177e4
LT		 282 /* Load return mailbox registers. */
283 ha->flags.mbox_int = 1;
284 ha->mailbox_out[0] = mb0;
4fa94f83 285 mboxes >>= 1;
1da177e4
LT		 286 wptr = (uint16_t __iomem *)MAILBOX_REG(ha, reg, 1);
287
288 for (cnt = 1; cnt < ha->mbx_count; cnt++) {
fa2a1ce5 289 if (IS_QLA2200(ha) && cnt == 8)
1da177e4 290 wptr = (uint16_t __iomem *)MAILBOX_REG(ha, reg, 8);
4fa94f83 291 if ((cnt == 4 || cnt == 5) && (mboxes & BIT_0))
1da177e4 292 ha->mailbox_out[cnt] = qla2x00_debounce_register(wptr);
4fa94f83 293 else if (mboxes & BIT_0)
1da177e4 294 ha->mailbox_out[cnt] = RD_REG_WORD(wptr);
fa2a1ce5 295
1da177e4 296 wptr++;
4fa94f83 297 mboxes >>= 1;
1da177e4 298 }
1da177e4
LT		 299}
300
8a659571
AV		 301static void
302qla81xx_idc_event(scsi_qla_host_t *vha, uint16_t aen, uint16_t descr)
303{
304 static char *event[] =
305 { "Complete", "Request Notification", "Time Extension" };
306 int rval;
307 struct device_reg_24xx __iomem *reg24 = &vha->hw->iobase->isp24;
9e5054ec 308 struct device_reg_82xx __iomem *reg82 = &vha->hw->iobase->isp82;
8a659571
AV		 309 uint16_t __iomem *wptr;
310 uint16_t cnt, timeout, mb[QLA_IDC_ACK_REGS];
311
312 /* Seed data -- mailbox1 -> mailbox7. */
9e5054ec
CD		 313 if (IS_QLA81XX(vha->hw) || IS_QLA83XX(vha->hw))
314 wptr = (uint16_t __iomem *)&reg24->mailbox1;
315 else if (IS_QLA8044(vha->hw))
316 wptr = (uint16_t __iomem *)&reg82->mailbox_out[1];
317 else
318 return;
319
8a659571
AV		 320 for (cnt = 0; cnt < QLA_IDC_ACK_REGS; cnt++, wptr++)
321 mb[cnt] = RD_REG_WORD(wptr);
322
7c3df132 323 ql_dbg(ql_dbg_async, vha, 0x5021,
6246b8a1 324 "Inter-Driver Communication %s -- "
7c3df132
SK		 325 "%04x %04x %04x %04x %04x %04x %04x.\n",
326 event[aen & 0xff], mb[0], mb[1], mb[2], mb[3],
327 mb[4], mb[5], mb[6]);
454073c9
SV		 328 switch (aen) {
329 /* Handle IDC Error completion case. */
330 case MBA_IDC_COMPLETE:
331 if (mb[1] >> 15) {
332 vha->hw->flags.idc_compl_status = 1;
9aaf2cea 333 if (vha->hw->notify_dcbx_comp && !vha->vp_idx)
454073c9
SV		 334 complete(&vha->hw->dcbx_comp);
335 }
336 break;
337
338 case MBA_IDC_NOTIFY:
339 /* Acknowledgement needed? [Notify && non-zero timeout]. */
340 timeout = (descr >> 8) & 0xf;
341 ql_dbg(ql_dbg_async, vha, 0x5022,
342 "%lu Inter-Driver Communication %s -- ACK timeout=%d.\n",
343 vha->host_no, event[aen & 0xff], timeout);
344
345 if (!timeout)
346 return;
347 rval = qla2x00_post_idc_ack_work(vha, mb);
348 if (rval != QLA_SUCCESS)
349 ql_log(ql_log_warn, vha, 0x5023,
350 "IDC failed to post ACK.\n");
351 break;
352 case MBA_IDC_TIME_EXT:
353 vha->hw->idc_extend_tmo = descr;
354 ql_dbg(ql_dbg_async, vha, 0x5087,
355 "%lu Inter-Driver Communication %s -- "
356 "Extend timeout by=%d.\n",
357 vha->host_no, event[aen & 0xff], vha->hw->idc_extend_tmo);
358 break;
bf5b8ad7 359 }
8a659571
AV		 360}
361
daae62a3 362#define LS_UNKNOWN 2
d0297c9a
JC		 363const char *
364qla2x00_get_link_speed_str(struct qla_hw_data *ha, uint16_t speed)
daae62a3 365{
f73cb695
CD		 366 static const char *const link_speeds[] = {
367 "1", "2", "?", "4", "8", "16", "32", "10"
d0297c9a 368 };
b0a1c5b5 369#define QLA_LAST_SPEED (ARRAY_SIZE(link_speeds) - 1)
daae62a3
CD		 370
371 if (IS_QLA2100(ha) || IS_QLA2200(ha))
d0297c9a
JC		 372 return link_speeds[0];
373 else if (speed == 0x13)
f73cb695
CD		 374 return link_speeds[QLA_LAST_SPEED];
375 else if (speed < QLA_LAST_SPEED)
d0297c9a
JC		 376 return link_speeds[speed];
377 else
378 return link_speeds[LS_UNKNOWN];
daae62a3
CD		 379}
380
fa492630 381static void
7d613ac6
SV		 382qla83xx_handle_8200_aen(scsi_qla_host_t *vha, uint16_t *mb)
383{
384 struct qla_hw_data *ha = vha->hw;
385
386 /*
387 * 8200 AEN Interpretation:
388 * mb[0] = AEN code
389 * mb[1] = AEN Reason code
390 * mb[2] = LSW of Peg-Halt Status-1 Register
391 * mb[6] = MSW of Peg-Halt Status-1 Register
392 * mb[3] = LSW of Peg-Halt Status-2 register
393 * mb[7] = MSW of Peg-Halt Status-2 register
394 * mb[4] = IDC Device-State Register value
395 * mb[5] = IDC Driver-Presence Register value
396 */
397 ql_dbg(ql_dbg_async, vha, 0x506b, "AEN Code: mb[0] = 0x%x AEN reason: "
398 "mb[1] = 0x%x PH-status1: mb[2] = 0x%x PH-status1: mb[6] = 0x%x.\n",
399 mb[0], mb[1], mb[2], mb[6]);
400 ql_dbg(ql_dbg_async, vha, 0x506c, "PH-status2: mb[3] = 0x%x "
401 "PH-status2: mb[7] = 0x%x Device-State: mb[4] = 0x%x "
402 "Drv-Presence: mb[5] = 0x%x.\n", mb[3], mb[7], mb[4], mb[5]);
403
404 if (mb[1] & (IDC_PEG_HALT_STATUS_CHANGE | IDC_NIC_FW_REPORTED_FAILURE |
405 IDC_HEARTBEAT_FAILURE)) {
406 ha->flags.nic_core_hung = 1;
407 ql_log(ql_log_warn, vha, 0x5060,
408 "83XX: F/W Error Reported: Check if reset required.\n");
409
410 if (mb[1] & IDC_PEG_HALT_STATUS_CHANGE) {
411 uint32_t protocol_engine_id, fw_err_code, err_level;
412
413 /*
414 * IDC_PEG_HALT_STATUS_CHANGE interpretation:
415 * - PEG-Halt Status-1 Register:
416 * (LSW = mb[2], MSW = mb[6])
417 * Bits 0-7 = protocol-engine ID
418 * Bits 8-28 = f/w error code
419 * Bits 29-31 = Error-level
420 * Error-level 0x1 = Non-Fatal error
421 * Error-level 0x2 = Recoverable Fatal error
422 * Error-level 0x4 = UnRecoverable Fatal error
423 * - PEG-Halt Status-2 Register:
424 * (LSW = mb[3], MSW = mb[7])
425 */
426 protocol_engine_id = (mb[2] & 0xff);
427 fw_err_code = (((mb[2] & 0xff00) >> 8) |
428 ((mb[6] & 0x1fff) << 8));
429 err_level = ((mb[6] & 0xe000) >> 13);
430 ql_log(ql_log_warn, vha, 0x5061, "PegHalt Status-1 "
431 "Register: protocol_engine_id=0x%x "
432 "fw_err_code=0x%x err_level=0x%x.\n",
433 protocol_engine_id, fw_err_code, err_level);
434 ql_log(ql_log_warn, vha, 0x5062, "PegHalt Status-2 "
435 "Register: 0x%x%x.\n", mb[7], mb[3]);
436 if (err_level == ERR_LEVEL_NON_FATAL) {
437 ql_log(ql_log_warn, vha, 0x5063,
0bf0efa1 438 "Not a fatal error, f/w has recovered itself.\n");
7d613ac6
SV		 439 } else if (err_level == ERR_LEVEL_RECOVERABLE_FATAL) {
440 ql_log(ql_log_fatal, vha, 0x5064,
441 "Recoverable Fatal error: Chip reset "
442 "required.\n");
443 qla83xx_schedule_work(vha,
444 QLA83XX_NIC_CORE_RESET);
445 } else if (err_level == ERR_LEVEL_UNRECOVERABLE_FATAL) {
446 ql_log(ql_log_fatal, vha, 0x5065,
447 "Unrecoverable Fatal error: Set FAILED "
448 "state, reboot required.\n");
449 qla83xx_schedule_work(vha,
450 QLA83XX_NIC_CORE_UNRECOVERABLE);
451 }
452 }
453
454 if (mb[1] & IDC_NIC_FW_REPORTED_FAILURE) {
455 uint16_t peg_fw_state, nw_interface_link_up;
456 uint16_t nw_interface_signal_detect, sfp_status;
457 uint16_t htbt_counter, htbt_monitor_enable;
b4a028a5 458 uint16_t sfp_additional_info, sfp_multirate;
7d613ac6
SV		 459 uint16_t sfp_tx_fault, link_speed, dcbx_status;
460
461 /*
462 * IDC_NIC_FW_REPORTED_FAILURE interpretation:
463 * - PEG-to-FC Status Register:
464 * (LSW = mb[2], MSW = mb[6])
465 * Bits 0-7 = Peg-Firmware state
466 * Bit 8 = N/W Interface Link-up
467 * Bit 9 = N/W Interface signal detected
468 * Bits 10-11 = SFP Status
469 * SFP Status 0x0 = SFP+ transceiver not expected
470 * SFP Status 0x1 = SFP+ transceiver not present
471 * SFP Status 0x2 = SFP+ transceiver invalid
472 * SFP Status 0x3 = SFP+ transceiver present and
473 * valid
474 * Bits 12-14 = Heartbeat Counter
475 * Bit 15 = Heartbeat Monitor Enable
476 * Bits 16-17 = SFP Additional Info
477 * SFP info 0x0 = Unregocnized transceiver for
478 * Ethernet
479 * SFP info 0x1 = SFP+ brand validation failed
480 * SFP info 0x2 = SFP+ speed validation failed
481 * SFP info 0x3 = SFP+ access error
482 * Bit 18 = SFP Multirate
483 * Bit 19 = SFP Tx Fault
484 * Bits 20-22 = Link Speed
485 * Bits 23-27 = Reserved
486 * Bits 28-30 = DCBX Status
487 * DCBX Status 0x0 = DCBX Disabled
488 * DCBX Status 0x1 = DCBX Enabled
489 * DCBX Status 0x2 = DCBX Exchange error
490 * Bit 31 = Reserved
491 */
492 peg_fw_state = (mb[2] & 0x00ff);
493 nw_interface_link_up = ((mb[2] & 0x0100) >> 8);
494 nw_interface_signal_detect = ((mb[2] & 0x0200) >> 9);
495 sfp_status = ((mb[2] & 0x0c00) >> 10);
496 htbt_counter = ((mb[2] & 0x7000) >> 12);
497 htbt_monitor_enable = ((mb[2] & 0x8000) >> 15);
b4a028a5 498 sfp_additional_info = (mb[6] & 0x0003);
7d613ac6
SV		 499 sfp_multirate = ((mb[6] & 0x0004) >> 2);
500 sfp_tx_fault = ((mb[6] & 0x0008) >> 3);
501 link_speed = ((mb[6] & 0x0070) >> 4);
502 dcbx_status = ((mb[6] & 0x7000) >> 12);
503
504 ql_log(ql_log_warn, vha, 0x5066,
505 "Peg-to-Fc Status Register:\n"
506 "peg_fw_state=0x%x, nw_interface_link_up=0x%x, "
507 "nw_interface_signal_detect=0x%x"
508 "\nsfp_statis=0x%x.\n ", peg_fw_state,
509 nw_interface_link_up, nw_interface_signal_detect,
510 sfp_status);
511 ql_log(ql_log_warn, vha, 0x5067,
512 "htbt_counter=0x%x, htbt_monitor_enable=0x%x, "
b4a028a5 513 "sfp_additional_info=0x%x, sfp_multirate=0x%x.\n ",
7d613ac6 514 htbt_counter, htbt_monitor_enable,
b4a028a5 515 sfp_additional_info, sfp_multirate);
7d613ac6
SV		 516 ql_log(ql_log_warn, vha, 0x5068,
517 "sfp_tx_fault=0x%x, link_state=0x%x, "
518 "dcbx_status=0x%x.\n", sfp_tx_fault, link_speed,
519 dcbx_status);
520
521 qla83xx_schedule_work(vha, QLA83XX_NIC_CORE_RESET);
522 }
523
524 if (mb[1] & IDC_HEARTBEAT_FAILURE) {
525 ql_log(ql_log_warn, vha, 0x5069,
526 "Heartbeat Failure encountered, chip reset "
527 "required.\n");
528
529 qla83xx_schedule_work(vha, QLA83XX_NIC_CORE_RESET);
530 }
531 }
532
533 if (mb[1] & IDC_DEVICE_STATE_CHANGE) {
534 ql_log(ql_log_info, vha, 0x506a,
535 "IDC Device-State changed = 0x%x.\n", mb[4]);
6c3943cd
SK		 536 if (ha->flags.nic_core_reset_owner)
537 return;
7d613ac6
SV		 538 qla83xx_schedule_work(vha, MBA_IDC_AEN);
539 }
540}
541
bb4cf5b7
CD		 542int
543qla2x00_is_a_vp_did(scsi_qla_host_t *vha, uint32_t rscn_entry)
544{
545 struct qla_hw_data *ha = vha->hw;
546 scsi_qla_host_t *vp;
547 uint32_t vp_did;
548 unsigned long flags;
549 int ret = 0;
550
551 if (!ha->num_vhosts)
552 return ret;
553
554 spin_lock_irqsave(&ha->vport_slock, flags);
555 list_for_each_entry(vp, &ha->vp_list, list) {
556 vp_did = vp->d_id.b24;
557 if (vp_did == rscn_entry) {
558 ret = 1;
559 break;
560 }
561 }
562 spin_unlock_irqrestore(&ha->vport_slock, flags);
563
564 return ret;
565}
566
726b8548 567fc_port_t *
17cac3a1
JC		 568qla2x00_find_fcport_by_loopid(scsi_qla_host_t *vha, uint16_t loop_id)
569{
726b8548
QT		 570 fc_port_t *f, *tf;
571
572 f = tf = NULL;
573 list_for_each_entry_safe(f, tf, &vha->vp_fcports, list)
574 if (f->loop_id == loop_id)
575 return f;
576 return NULL;
577}
17cac3a1 578
726b8548
QT		 579fc_port_t *
580qla2x00_find_fcport_by_wwpn(scsi_qla_host_t *vha, u8 *wwpn, u8 incl_deleted)
581{
582 fc_port_t *f, *tf;
583
584 f = tf = NULL;
585 list_for_each_entry_safe(f, tf, &vha->vp_fcports, list) {
586 if (memcmp(f->port_name, wwpn, WWN_SIZE) == 0) {
587 if (incl_deleted)
588 return f;
589 else if (f->deleted == 0)
590 return f;
591 }
592 }
593 return NULL;
594}
17cac3a1 595
726b8548
QT		 596fc_port_t *
597qla2x00_find_fcport_by_nportid(scsi_qla_host_t *vha, port_id_t *id,
598 u8 incl_deleted)
599{
600 fc_port_t *f, *tf;
601
602 f = tf = NULL;
603 list_for_each_entry_safe(f, tf, &vha->vp_fcports, list) {
604 if (f->d_id.b24 == id->b24) {
605 if (incl_deleted)
606 return f;
607 else if (f->deleted == 0)
608 return f;
609 }
610 }
17cac3a1
JC		 611 return NULL;
612}
613
1da177e4
LT		 614/**
615 * qla2x00_async_event() - Process aynchronous events.
2db6228d
BVA		 616 * @vha: SCSI driver HA context
617 * @rsp: response queue
9a853f71 618 * @mb: Mailbox registers (0 - 3)
1da177e4 619 */
2c3dfe3f 620void
73208dfd 621qla2x00_async_event(scsi_qla_host_t *vha, struct rsp_que *rsp, uint16_t *mb)
1da177e4 622{
1da177e4 623 uint16_t handle_cnt;
bdab23da 624 uint16_t cnt, mbx;
1da177e4 625 uint32_t handles[5];
e315cd28 626 struct qla_hw_data *ha = vha->hw;
3d71644c 627 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
bdab23da 628 struct device_reg_24xx __iomem *reg24 = &ha->iobase->isp24;
bc5c2aad 629 struct device_reg_82xx __iomem *reg82 = &ha->iobase->isp82;
52c82823 630 uint32_t rscn_entry, host_pid;
4d4df193 631 unsigned long flags;
ef86cb20 632 fc_port_t *fcport = NULL;
1da177e4 633
45235022
QT		 634 if (!vha->hw->flags.fw_started)
635 return;
636
1da177e4
LT		 637 /* Setup to process RIO completion. */
638 handle_cnt = 0;
6246b8a1 639 if (IS_CNA_CAPABLE(ha))
3a03eb79 640 goto skip_rio;
1da177e4
LT		 641 switch (mb[0]) {
642 case MBA_SCSI_COMPLETION:
9a853f71 643 handles[0] = le32_to_cpu((uint32_t)((mb[2] << 16) | mb[1]));
1da177e4
LT		 644 handle_cnt = 1;
645 break;
646 case MBA_CMPLT_1_16BIT:
9a853f71 647 handles[0] = mb[1];
1da177e4
LT		 648 handle_cnt = 1;
649 mb[0] = MBA_SCSI_COMPLETION;
650 break;
651 case MBA_CMPLT_2_16BIT:
9a853f71
AV		 652 handles[0] = mb[1];
653 handles[1] = mb[2];
1da177e4
LT		 654 handle_cnt = 2;
655 mb[0] = MBA_SCSI_COMPLETION;
656 break;
657 case MBA_CMPLT_3_16BIT:
9a853f71
AV		 658 handles[0] = mb[1];
659 handles[1] = mb[2];
660 handles[2] = mb[3];
1da177e4
LT		 661 handle_cnt = 3;
662 mb[0] = MBA_SCSI_COMPLETION;
663 break;
664 case MBA_CMPLT_4_16BIT:
9a853f71
AV		 665 handles[0] = mb[1];
666 handles[1] = mb[2];
667 handles[2] = mb[3];
1da177e4
LT		 668 handles[3] = (uint32_t)RD_MAILBOX_REG(ha, reg, 6);
669 handle_cnt = 4;
670 mb[0] = MBA_SCSI_COMPLETION;
671 break;
672 case MBA_CMPLT_5_16BIT:
9a853f71
AV		 673 handles[0] = mb[1];
674 handles[1] = mb[2];
675 handles[2] = mb[3];
1da177e4
LT		 676 handles[3] = (uint32_t)RD_MAILBOX_REG(ha, reg, 6);
677 handles[4] = (uint32_t)RD_MAILBOX_REG(ha, reg, 7);
678 handle_cnt = 5;
679 mb[0] = MBA_SCSI_COMPLETION;
680 break;
681 case MBA_CMPLT_2_32BIT:
9a853f71 682 handles[0] = le32_to_cpu((uint32_t)((mb[2] << 16) | mb[1]));
1da177e4
LT		 683 handles[1] = le32_to_cpu(
684 ((uint32_t)(RD_MAILBOX_REG(ha, reg, 7) << 16)) |
685 RD_MAILBOX_REG(ha, reg, 6));
686 handle_cnt = 2;
687 mb[0] = MBA_SCSI_COMPLETION;
688 break;
689 default:
690 break;
691 }
3a03eb79 692skip_rio:
1da177e4
LT		 693 switch (mb[0]) {
694 case MBA_SCSI_COMPLETION: /* Fast Post */
e315cd28 695 if (!vha->flags.online)
1da177e4
LT		 696 break;
697
698 for (cnt = 0; cnt < handle_cnt; cnt++)
73208dfd
AC		 699 qla2x00_process_completed_request(vha, rsp->req,
700 handles[cnt]);
1da177e4
LT		 701 break;
702
703 case MBA_RESET: /* Reset */
7c3df132
SK		 704 ql_dbg(ql_dbg_async, vha, 0x5002,
705 "Asynchronous RESET.\n");
1da177e4 706
e315cd28 707 set_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
1da177e4
LT		 708 break;
709
710 case MBA_SYSTEM_ERR: /* System Error */
ecc89f25
JC		 711 mbx = (IS_QLA81XX(ha) || IS_QLA83XX(ha) || IS_QLA27XX(ha) ||
712 IS_QLA28XX(ha)) ?
6246b8a1 713 RD_REG_WORD(&reg24->mailbox7) : 0;
7c3df132 714 ql_log(ql_log_warn, vha, 0x5003,
bdab23da
AV		 715 "ISP System Error - mbx1=%xh mbx2=%xh mbx3=%xh "
716 "mbx7=%xh.\n", mb[1], mb[2], mb[3], mbx);
2a3192a3
JC		 717 ha->fw_dump_mpi =
718 (IS_QLA27XX(ha) || IS_QLA28XX(ha)) &&
719 RD_REG_WORD(&reg24->mailbox7) & BIT_8;
e315cd28 720 ha->isp_ops->fw_dump(vha, 1);
ec7193e2 721 ha->flags.fw_init_done = 0;
4b60c827 722 QLA_FW_STOPPED(ha);
1da177e4 723
e428924c 724 if (IS_FWI2_CAPABLE(ha)) {
9a853f71 725 if (mb[1] == 0 && mb[2] == 0) {
7c3df132 726 ql_log(ql_log_fatal, vha, 0x5004,
9a853f71
AV		 727 "Unrecoverable Hardware Error: adapter "
728 "marked OFFLINE!\n");
e315cd28 729 vha->flags.online = 0;
6246b8a1 730 vha->device_flags |= DFLG_DEV_FAILED;
b1d46989 731 } else {
25985edc 732 /* Check to see if MPI timeout occurred */
f73cb695 733 if ((mbx & MBX_3) && (ha->port_no == 0))
b1d46989
MI		 734 set_bit(MPI_RESET_NEEDED,
735 &vha->dpc_flags);
736
e315cd28 737 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
b1d46989 738 }
9a853f71 739 } else if (mb[1] == 0) {
7c3df132 740 ql_log(ql_log_fatal, vha, 0x5005,
1da177e4
LT		 741 "Unrecoverable Hardware Error: adapter marked "
742 "OFFLINE!\n");
e315cd28 743 vha->flags.online = 0;
6246b8a1 744 vha->device_flags |= DFLG_DEV_FAILED;
1da177e4 745 } else
e315cd28 746 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
1da177e4
LT		 747 break;
748
749 case MBA_REQ_TRANSFER_ERR: /* Request Transfer Error */
7c3df132
SK		 750 ql_log(ql_log_warn, vha, 0x5006,
751 "ISP Request Transfer Error (%x).\n", mb[1]);
1da177e4 752
e315cd28 753 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
1da177e4
LT		 754 break;
755
756 case MBA_RSP_TRANSFER_ERR: /* Response Transfer Error */
7c3df132 757 ql_log(ql_log_warn, vha, 0x5007,
41233cd3 758 "ISP Response Transfer Error (%x).\n", mb[1]);
1da177e4 759
e315cd28 760 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
1da177e4
LT		 761 break;
762
763 case MBA_WAKEUP_THRES: /* Request Queue Wake-up */
7c3df132 764 ql_dbg(ql_dbg_async, vha, 0x5008,
41233cd3
JC		 765 "Asynchronous WAKEUP_THRES (%x).\n", mb[1]);
766 break;
1da177e4 767
41233cd3 768 case MBA_LOOP_INIT_ERR:
75d560e0 769 ql_log(ql_log_warn, vha, 0x5090,
41233cd3
JC		 770 "LOOP INIT ERROR (%x).\n", mb[1]);
771 ha->isp_ops->fw_dump(vha, 1);
772 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
2d70c103 773 break;
41233cd3 774
1da177e4 775 case MBA_LIP_OCCURRED: /* Loop Initialization Procedure */
ec7193e2 776 ha->flags.lip_ae = 1;
ec7193e2 777
cfb0919c 778 ql_dbg(ql_dbg_async, vha, 0x5009,
7c3df132 779 "LIP occurred (%x).\n", mb[1]);
1da177e4 780
e315cd28
AC		 781 if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
782 atomic_set(&vha->loop_state, LOOP_DOWN);
783 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
784 qla2x00_mark_all_devices_lost(vha, 1);
1da177e4
LT		 785 }
786
e315cd28
AC		 787 if (vha->vp_idx) {
788 atomic_set(&vha->vp_state, VP_FAILED);
789 fc_vport_set_state(vha->fc_vport, FC_VPORT_FAILED);
2c3dfe3f
SJ		 790 }
791
e315cd28
AC		 792 set_bit(REGISTER_FC4_NEEDED, &vha->dpc_flags);
793 set_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags);
1da177e4 794
e315cd28
AC		 795 vha->flags.management_server_logged_in = 0;
796 qla2x00_post_aen_work(vha, FCH_EVT_LIP, mb[1]);
1da177e4
LT		 797 break;
798
799 case MBA_LOOP_UP: /* Loop Up Event */
daae62a3 800 if (IS_QLA2100(ha) || IS_QLA2200(ha))
d8b45213 801 ha->link_data_rate = PORT_SPEED_1GB;
daae62a3 802 else
1da177e4 803 ha->link_data_rate = mb[1];
1da177e4 804
8e5a9484 805 ql_log(ql_log_info, vha, 0x500a,
daae62a3 806 "LOOP UP detected (%s Gbps).\n",
d0297c9a 807 qla2x00_get_link_speed_str(ha, ha->link_data_rate));
1da177e4 808
e315cd28
AC		 809 vha->flags.management_server_logged_in = 0;
810 qla2x00_post_aen_work(vha, FCH_EVT_LINKUP, ha->link_data_rate);
e4e3a2ce
QT		 811
812 if (AUTO_DETECT_SFP_SUPPORT(vha)) {
813 set_bit(DETECT_SFP_CHANGE, &vha->dpc_flags);
814 qla2xxx_wake_dpc(vha);
815 }
1da177e4
LT		 816 break;
817
818 case MBA_LOOP_DOWN: /* Loop Down Event */
9cd883f0 819 SAVE_TOPO(ha);
ec7193e2
QT		 820 ha->flags.lip_ae = 0;
821 ha->current_topology = 0;
822
6246b8a1
GM		 823 mbx = (IS_QLA81XX(ha) || IS_QLA8031(ha))
824 ? RD_REG_WORD(&reg24->mailbox4) : 0;
7ec0effd
AD		 825 mbx = (IS_P3P_TYPE(ha)) ? RD_REG_WORD(&reg82->mailbox_out[4])
826 : mbx;
8e5a9484 827 ql_log(ql_log_info, vha, 0x500b,
7c3df132
SK		 828 "LOOP DOWN detected (%x %x %x %x).\n",
829 mb[1], mb[2], mb[3], mbx);
1da177e4 830
e315cd28
AC		 831 if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
832 atomic_set(&vha->loop_state, LOOP_DOWN);
833 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
2486c627
HM		 834 /*
835 * In case of loop down, restore WWPN from
836 * NVRAM in case of FA-WWPN capable ISP
718abbdc 837 * Restore for Physical Port only
2486c627 838 */
718abbdc 839 if (!vha->vp_idx) {
dcbf8f80
SC		 840 if (ha->flags.fawwpn_enabled &&
841 (ha->current_topology == ISP_CFG_F)) {
718abbdc 842 void *wwpn = ha->init_cb->port_name;
bd432bb5 843
718abbdc
SC		 844 memcpy(vha->port_name, wwpn, WWN_SIZE);
845 fc_host_port_name(vha->host) =
846 wwn_to_u64(vha->port_name);
847 ql_dbg(ql_dbg_init + ql_dbg_verbose,
83548fe2 848 vha, 0x00d8, "LOOP DOWN detected,"
718abbdc
SC		 849 "restore WWPN %016llx\n",
850 wwn_to_u64(vha->port_name));
851 }
852
853 clear_bit(VP_CONFIG_OK, &vha->vp_flags);
2486c627
HM		 854 }
855
e315cd28
AC		 856 vha->device_flags |= DFLG_NO_CABLE;
857 qla2x00_mark_all_devices_lost(vha, 1);
1da177e4
LT		 858 }
859
e315cd28
AC		 860 if (vha->vp_idx) {
861 atomic_set(&vha->vp_state, VP_FAILED);
862 fc_vport_set_state(vha->fc_vport, FC_VPORT_FAILED);
2c3dfe3f
SJ		 863 }
864
e315cd28 865 vha->flags.management_server_logged_in = 0;
d8b45213 866 ha->link_data_rate = PORT_SPEED_UNKNOWN;
e315cd28 867 qla2x00_post_aen_work(vha, FCH_EVT_LINKDOWN, 0);
1da177e4
LT		 868 break;
869
870 case MBA_LIP_RESET: /* LIP reset occurred */
cfb0919c 871 ql_dbg(ql_dbg_async, vha, 0x500c,
cc3ef7bc 872 "LIP reset occurred (%x).\n", mb[1]);
1da177e4 873
e315cd28
AC		 874 if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
875 atomic_set(&vha->loop_state, LOOP_DOWN);
876 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
877 qla2x00_mark_all_devices_lost(vha, 1);
1da177e4
LT		 878 }
879
e315cd28
AC		 880 if (vha->vp_idx) {
881 atomic_set(&vha->vp_state, VP_FAILED);
882 fc_vport_set_state(vha->fc_vport, FC_VPORT_FAILED);
2c3dfe3f
SJ		 883 }
884
e315cd28 885 set_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
1da177e4
LT		 886
887 ha->operating_mode = LOOP;
e315cd28
AC		 888 vha->flags.management_server_logged_in = 0;
889 qla2x00_post_aen_work(vha, FCH_EVT_LIPRESET, mb[1]);
1da177e4
LT		 890 break;
891
3a03eb79 892 /* case MBA_DCBX_COMPLETE: */
1da177e4 893 case MBA_POINT_TO_POINT: /* Point-to-Point */
ec7193e2 894 ha->flags.lip_ae = 0;
ec7193e2 895
1da177e4
LT		 896 if (IS_QLA2100(ha))
897 break;
898
7ec0effd 899 if (IS_CNA_CAPABLE(ha)) {
7c3df132
SK		 900 ql_dbg(ql_dbg_async, vha, 0x500d,
901 "DCBX Completed -- %04x %04x %04x.\n",
902 mb[1], mb[2], mb[3]);
9aaf2cea 903 if (ha->notify_dcbx_comp && !vha->vp_idx)
23f2ebd1
SR		 904 complete(&ha->dcbx_comp);
905
906 } else
7c3df132
SK		 907 ql_dbg(ql_dbg_async, vha, 0x500e,
908 "Asynchronous P2P MODE received.\n");
1da177e4
LT		 909
910 /*
911 * Until there's a transition from loop down to loop up, treat
912 * this as loop down only.
913 */
e315cd28
AC		 914 if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
915 atomic_set(&vha->loop_state, LOOP_DOWN);
916 if (!atomic_read(&vha->loop_down_timer))
917 atomic_set(&vha->loop_down_timer,
1da177e4 918 LOOP_DOWN_TIME);
48acad09
QT		 919 if (!N2N_TOPO(ha))
920 qla2x00_mark_all_devices_lost(vha, 1);
1da177e4
LT		 921 }
922
e315cd28
AC		 923 if (vha->vp_idx) {
924 atomic_set(&vha->vp_state, VP_FAILED);
925 fc_vport_set_state(vha->fc_vport, FC_VPORT_FAILED);
2c3dfe3f
SJ		 926 }
927
e315cd28
AC		 928 if (!(test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags)))
929 set_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
930
931 set_bit(REGISTER_FC4_NEEDED, &vha->dpc_flags);
932 set_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags);
4346b149 933
e315cd28 934 vha->flags.management_server_logged_in = 0;
1da177e4
LT		 935 break;
936
937 case MBA_CHG_IN_CONNECTION: /* Change in connection mode */
938 if (IS_QLA2100(ha))
939 break;
940
cfb0919c 941 ql_dbg(ql_dbg_async, vha, 0x500f,
1da177e4
LT		 942 "Configuration change detected: value=%x.\n", mb[1]);
943
e315cd28
AC		 944 if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
945 atomic_set(&vha->loop_state, LOOP_DOWN);
946 if (!atomic_read(&vha->loop_down_timer))
947 atomic_set(&vha->loop_down_timer,
1da177e4 948 LOOP_DOWN_TIME);
e315cd28 949 qla2x00_mark_all_devices_lost(vha, 1);
1da177e4
LT		 950 }
951
e315cd28
AC		 952 if (vha->vp_idx) {
953 atomic_set(&vha->vp_state, VP_FAILED);
954 fc_vport_set_state(vha->fc_vport, FC_VPORT_FAILED);
2c3dfe3f
SJ		 955 }
956
e315cd28
AC		 957 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
958 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
1da177e4
LT		 959 break;
960
961 case MBA_PORT_UPDATE: /* Port database update */
55903b9d
SV		 962 /*
963 * Handle only global and vn-port update events
964 *
965 * Relevant inputs:
966 * mb[1] = N_Port handle of changed port
967 * OR 0xffff for global event
968 * mb[2] = New login state
969 * 7 = Port logged out
970 * mb[3] = LSB is vp_idx, 0xff = all vps
971 *
972 * Skip processing if:
973 * Event is global, vp_idx is NOT all vps,
974 * vp_idx does not match
975 * Event is not global, vp_idx does not match
976 */
12cec63e
AV		 977 if (IS_QLA2XXX_MIDTYPE(ha) &&
978 ((mb[1] == 0xffff && (mb[3] & 0xff) != 0xff) ||
979 (mb[1] != 0xffff)) && vha->vp_idx != (mb[3] & 0xff))
980 break;
73208dfd 981
17cac3a1 982 if (mb[2] == 0x7) {
7c3df132 983 ql_dbg(ql_dbg_async, vha, 0x5010,
17cac3a1
JC		 984 "Port %s %04x %04x %04x.\n",
985 mb[1] == 0xffff ? "unavailable" : "logout",
7c3df132 986 mb[1], mb[2], mb[3]);
17cac3a1
JC		 987
988 if (mb[1] == 0xffff)
989 goto global_port_update;
990
b98ae0d7
QT		 991 if (mb[1] == NPH_SNS_LID(ha)) {
992 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
993 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
994 break;
995 }
996
997 /* use handle_cnt for loop id/nport handle */
998 if (IS_FWI2_CAPABLE(ha))
999 handle_cnt = NPH_SNS;
1000 else
1001 handle_cnt = SIMPLE_NAME_SERVER;
1002 if (mb[1] == handle_cnt) {
1003 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
1004 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
1005 break;
1006 }
1007
17cac3a1
JC		 1008 /* Port logout */
1009 fcport = qla2x00_find_fcport_by_loopid(vha, mb[1]);
1010 if (!fcport)
1011 break;
1012 if (atomic_read(&fcport->state) != FCS_ONLINE)
1013 break;
1014 ql_dbg(ql_dbg_async, vha, 0x508a,
1015 "Marking port lost loopid=%04x portid=%06x.\n",
1016 fcport->loop_id, fcport->d_id.b24);
726b8548
QT		 1017 if (qla_ini_mode_enabled(vha)) {
1018 qla2x00_mark_device_lost(fcport->vha, fcport, 1, 1);
1019 fcport->logout_on_delete = 0;
d8630bb9 1020 qlt_schedule_sess_for_deletion(fcport);
726b8548 1021 }
17cac3a1
JC		 1022 break;
1023
1024global_port_update:
9764ff88
AV		 1025 if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
1026 atomic_set(&vha->loop_state, LOOP_DOWN);
1027 atomic_set(&vha->loop_down_timer,
1028 LOOP_DOWN_TIME);
1029 vha->device_flags |= DFLG_NO_CABLE;
1030 qla2x00_mark_all_devices_lost(vha, 1);
1031 }
1032
1033 if (vha->vp_idx) {
1034 atomic_set(&vha->vp_state, VP_FAILED);
1035 fc_vport_set_state(vha->fc_vport,
1036 FC_VPORT_FAILED);
faadc5e7 1037 qla2x00_mark_all_devices_lost(vha, 1);
9764ff88
AV		 1038 }
1039
1040 vha->flags.management_server_logged_in = 0;
1041 ha->link_data_rate = PORT_SPEED_UNKNOWN;
1042 break;
1043 }
1044
1da177e4 1045 /*
cc3ef7bc 1046 * If PORT UPDATE is global (received LIP_OCCURRED/LIP_RESET
1da177e4
LT		 1047 * event etc. earlier indicating loop is down) then process
1048 * it. Otherwise ignore it and Wait for RSCN to come in.
1049 */
e315cd28 1050 atomic_set(&vha->loop_down_timer, 0);
8e5a9484 1051 if (atomic_read(&vha->loop_state) != LOOP_DOWN &&
edd05de1 1052 !ha->flags.n2n_ae &&
8e5a9484 1053 atomic_read(&vha->loop_state) != LOOP_DEAD) {
7c3df132
SK		 1054 ql_dbg(ql_dbg_async, vha, 0x5011,
1055 "Asynchronous PORT UPDATE ignored %04x/%04x/%04x.\n",
1056 mb[1], mb[2], mb[3]);
2d70c103
NB		 1057
1058 qlt_async_event(mb[0], vha, mb);
1da177e4
LT		 1059 break;
1060 }
1061
7c3df132
SK		 1062 ql_dbg(ql_dbg_async, vha, 0x5012,
1063 "Port database changed %04x %04x %04x.\n",
1064 mb[1], mb[2], mb[3]);
1da177e4
LT		 1065
1066 /*
1067 * Mark all devices as missing so we will login again.
1068 */
e315cd28 1069 atomic_set(&vha->loop_state, LOOP_UP);
6944dccb 1070 vha->scan.scan_retry = 0;
1da177e4 1071
e315cd28
AC		 1072 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
1073 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
ded6411f 1074 set_bit(VP_CONFIG_OK, &vha->vp_flags);
2d70c103
NB		 1075
1076 qlt_async_event(mb[0], vha, mb);
1da177e4
LT		 1077 break;
1078
1079 case MBA_RSCN_UPDATE: /* State Change Registration */
3c397400 1080 /* Check if the Vport has issued a SCR */
e315cd28 1081 if (vha->vp_idx && test_bit(VP_SCR_NEEDED, &vha->vp_flags))
3c397400
SJ		 1082 break;
1083 /* Only handle SCNs for our Vport index. */
0d6e61bc 1084 if (ha->flags.npiv_supported && vha->vp_idx != (mb[3] & 0xff))
3c397400 1085 break;
0d6e61bc 1086
7c3df132
SK		 1087 ql_dbg(ql_dbg_async, vha, 0x5013,
1088 "RSCN database changed -- %04x %04x %04x.\n",
1089 mb[1], mb[2], mb[3]);
1da177e4 1090
59d72d87 1091 rscn_entry = ((mb[1] & 0xff) << 16) | mb[2];
e315cd28
AC		 1092 host_pid = (vha->d_id.b.domain << 16) | (vha->d_id.b.area << 8)
1093 | vha->d_id.b.al_pa;
1da177e4 1094 if (rscn_entry == host_pid) {
7c3df132
SK		 1095 ql_dbg(ql_dbg_async, vha, 0x5014,
1096 "Ignoring RSCN update to local host "
1097 "port ID (%06x).\n", host_pid);
1da177e4
LT		 1098 break;
1099 }
1100
59d72d87
RA		 1101 /* Ignore reserved bits from RSCN-payload. */
1102 rscn_entry = ((mb[1] & 0x3ff) << 16) | mb[2];
1da177e4 1103
bb4cf5b7
CD		 1104 /* Skip RSCNs for virtual ports on the same physical port */
1105 if (qla2x00_is_a_vp_did(vha, rscn_entry))
1106 break;
1107
e315cd28
AC		 1108 atomic_set(&vha->loop_down_timer, 0);
1109 vha->flags.management_server_logged_in = 0;
726b8548
QT		 1110 {
1111 struct event_arg ea;
1da177e4 1112
726b8548
QT		 1113 memset(&ea, 0, sizeof(ea));
1114 ea.event = FCME_RSCN;
1115 ea.id.b24 = rscn_entry;
41dc529a 1116 ea.id.b.rsvd_1 = rscn_entry >> 24;
726b8548 1117 qla2x00_fcport_event_handler(vha, &ea);
41dc529a 1118 qla2x00_post_aen_work(vha, FCH_EVT_RSCN, rscn_entry);
726b8548 1119 }
1da177e4 1120 break;
1da177e4
LT		 1121 /* case MBA_RIO_RESPONSE: */
1122 case MBA_ZIO_RESPONSE:
7c3df132
SK		 1123 ql_dbg(ql_dbg_async, vha, 0x5015,
1124 "[R|Z]IO update completion.\n");
1da177e4 1125
e428924c 1126 if (IS_FWI2_CAPABLE(ha))
2afa19a9 1127 qla24xx_process_response_queue(vha, rsp);
4fdfefe5 1128 else
73208dfd 1129 qla2x00_process_response_queue(rsp);
1da177e4 1130 break;
9a853f71
AV		 1131
1132 case MBA_DISCARD_RND_FRAME:
7c3df132
SK		 1133 ql_dbg(ql_dbg_async, vha, 0x5016,
1134 "Discard RND Frame -- %04x %04x %04x.\n",
1135 mb[1], mb[2], mb[3]);
9a853f71 1136 break;
45ebeb56
AV		 1137
1138 case MBA_TRACE_NOTIFICATION:
7c3df132
SK		 1139 ql_dbg(ql_dbg_async, vha, 0x5017,
1140 "Trace Notification -- %04x %04x.\n", mb[1], mb[2]);
45ebeb56 1141 break;
4d4df193
HK		 1142
1143 case MBA_ISP84XX_ALERT:
7c3df132
SK		 1144 ql_dbg(ql_dbg_async, vha, 0x5018,
1145 "ISP84XX Alert Notification -- %04x %04x %04x.\n",
1146 mb[1], mb[2], mb[3]);
4d4df193
HK		 1147
1148 spin_lock_irqsave(&ha->cs84xx->access_lock, flags);
1149 switch (mb[1]) {
1150 case A84_PANIC_RECOVERY:
7c3df132
SK		 1151 ql_log(ql_log_info, vha, 0x5019,
1152 "Alert 84XX: panic recovery %04x %04x.\n",
1153 mb[2], mb[3]);
4d4df193
HK		 1154 break;
1155 case A84_OP_LOGIN_COMPLETE:
1156 ha->cs84xx->op_fw_version = mb[3] << 16 | mb[2];
7c3df132
SK		 1157 ql_log(ql_log_info, vha, 0x501a,
1158 "Alert 84XX: firmware version %x.\n",
1159 ha->cs84xx->op_fw_version);
4d4df193
HK		 1160 break;
1161 case A84_DIAG_LOGIN_COMPLETE:
1162 ha->cs84xx->diag_fw_version = mb[3] << 16 | mb[2];
7c3df132
SK		 1163 ql_log(ql_log_info, vha, 0x501b,
1164 "Alert 84XX: diagnostic firmware version %x.\n",
1165 ha->cs84xx->diag_fw_version);
4d4df193
HK		 1166 break;
1167 case A84_GOLD_LOGIN_COMPLETE:
1168 ha->cs84xx->diag_fw_version = mb[3] << 16 | mb[2];
1169 ha->cs84xx->fw_update = 1;
7c3df132
SK		 1170 ql_log(ql_log_info, vha, 0x501c,
1171 "Alert 84XX: gold firmware version %x.\n",
1172 ha->cs84xx->gold_fw_version);
4d4df193
HK		 1173 break;
1174 default:
7c3df132
SK		 1175 ql_log(ql_log_warn, vha, 0x501d,
1176 "Alert 84xx: Invalid Alert %04x %04x %04x.\n",
4d4df193
HK		 1177 mb[1], mb[2], mb[3]);
1178 }
1179 spin_unlock_irqrestore(&ha->cs84xx->access_lock, flags);
1180 break;
3a03eb79 1181 case MBA_DCBX_START:
7c3df132
SK		 1182 ql_dbg(ql_dbg_async, vha, 0x501e,
1183 "DCBX Started -- %04x %04x %04x.\n",
1184 mb[1], mb[2], mb[3]);
3a03eb79
AV		 1185 break;
1186 case MBA_DCBX_PARAM_UPDATE:
7c3df132
SK		 1187 ql_dbg(ql_dbg_async, vha, 0x501f,
1188 "DCBX Parameters Updated -- %04x %04x %04x.\n",
1189 mb[1], mb[2], mb[3]);
3a03eb79
AV		 1190 break;
1191 case MBA_FCF_CONF_ERR:
7c3df132
SK		 1192 ql_dbg(ql_dbg_async, vha, 0x5020,
1193 "FCF Configuration Error -- %04x %04x %04x.\n",
1194 mb[1], mb[2], mb[3]);
3a03eb79 1195 break;
3a03eb79 1196 case MBA_IDC_NOTIFY:
7ec0effd 1197 if (IS_QLA8031(vha->hw) || IS_QLA8044(ha)) {
67b2a31f
CD		 1198 mb[4] = RD_REG_WORD(&reg24->mailbox4);
1199 if (((mb[2] & 0x7fff) == MBC_PORT_RESET ||
1200 (mb[2] & 0x7fff) == MBC_SET_PORT_CONFIG) &&
1201 (mb[4] & INTERNAL_LOOPBACK_MASK) != 0) {
8fcd6b8b 1202 set_bit(ISP_QUIESCE_NEEDED, &vha->dpc_flags);
67b2a31f
CD		 1203 /*
1204 * Extend loop down timer since port is active.
1205 */
1206 if (atomic_read(&vha->loop_state) == LOOP_DOWN)
1207 atomic_set(&vha->loop_down_timer,
1208 LOOP_DOWN_TIME);
8fcd6b8b
CD		 1209 qla2xxx_wake_dpc(vha);
1210 }
67b2a31f 1211 }
81881861 1212 /* fall through */
8fcd6b8b 1213 case MBA_IDC_COMPLETE:
9aaf2cea 1214 if (ha->notify_lb_portup_comp && !vha->vp_idx)
f356bef1
CD		 1215 complete(&ha->lb_portup_comp);
1216 /* Fallthru */
3a03eb79 1217 case MBA_IDC_TIME_EXT:
7ec0effd
AD		 1218 if (IS_QLA81XX(vha->hw) || IS_QLA8031(vha->hw) ||
1219 IS_QLA8044(ha))
7d613ac6
SV		 1220 qla81xx_idc_event(vha, mb[0], mb[1]);
1221 break;
1222
1223 case MBA_IDC_AEN:
1224 mb[4] = RD_REG_WORD(&reg24->mailbox4);
1225 mb[5] = RD_REG_WORD(&reg24->mailbox5);
1226 mb[6] = RD_REG_WORD(&reg24->mailbox6);
1227 mb[7] = RD_REG_WORD(&reg24->mailbox7);
1228 qla83xx_handle_8200_aen(vha, mb);
3a03eb79 1229 break;
7d613ac6 1230
b5a340dd
JC		 1231 case MBA_DPORT_DIAGNOSTICS:
1232 ql_dbg(ql_dbg_async, vha, 0x5052,
ef55e513 1233 "D-Port Diagnostics: %04x result=%s\n",
ec891462 1234 mb[0],
b5a340dd 1235 mb[1] == 0 ? "start" :
ef55e513
JC		 1236 mb[1] == 1 ? "done (pass)" :
1237 mb[1] == 2 ? "done (error)" : "other");
b5a340dd
JC		 1238 break;
1239
a29b3dd7
JC		 1240 case MBA_TEMPERATURE_ALERT:
1241 ql_dbg(ql_dbg_async, vha, 0x505e,
1242 "TEMPERATURE ALERT: %04x %04x %04x\n", mb[1], mb[2], mb[3]);
1243 if (mb[1] == 0x12)
1244 schedule_work(&ha->board_disable);
1245 break;
1246
92d4408e
SC		 1247 case MBA_TRANS_INSERT:
1248 ql_dbg(ql_dbg_async, vha, 0x5091,
1249 "Transceiver Insertion: %04x\n", mb[1]);
1250 break;
1251
6246b8a1
GM		 1252 default:
1253 ql_dbg(ql_dbg_async, vha, 0x5057,
1254 "Unknown AEN:%04x %04x %04x %04x\n",
1255 mb[0], mb[1], mb[2], mb[3]);
1da177e4 1256 }
2c3dfe3f 1257
2d70c103
NB		 1258 qlt_async_event(mb[0], vha, mb);
1259
e315cd28 1260 if (!vha->vp_idx && ha->num_vhosts)
73208dfd 1261 qla2x00_alert_all_vps(rsp, mb);
1da177e4
LT		 1262}
1263
1264/**
1265 * qla2x00_process_completed_request() - Process a Fast Post response.
2db6228d
BVA		 1266 * @vha: SCSI driver HA context
1267 * @req: request queue
1da177e4
LT		 1268 * @index: SRB index
1269 */
8ae6d9c7 1270void
73208dfd 1271qla2x00_process_completed_request(struct scsi_qla_host *vha,
8ae6d9c7 1272 struct req_que *req, uint32_t index)
1da177e4
LT		 1273{
1274 srb_t *sp;
e315cd28 1275 struct qla_hw_data *ha = vha->hw;
1da177e4
LT		 1276
1277 /* Validate handle. */
8d93f550 1278 if (index >= req->num_outstanding_cmds) {
7c3df132
SK		 1279 ql_log(ql_log_warn, vha, 0x3014,
1280 "Invalid SCSI command index (%x).\n", index);
1da177e4 1281
7ec0effd 1282 if (IS_P3P_TYPE(ha))
8f7daead
GM		 1283 set_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags);
1284 else
1285 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
1da177e4
LT		 1286 return;
1287 }
1288
e315cd28 1289 sp = req->outstanding_cmds[index];
1da177e4
LT		 1290 if (sp) {
1291 /* Free outstanding command slot. */
e315cd28 1292 req->outstanding_cmds[index] = NULL;
1da177e4 1293
1da177e4 1294 /* Save ISP completion status */
25ff6af1 1295 sp->done(sp, DID_OK << 16);
1da177e4 1296 } else {
7c3df132 1297 ql_log(ql_log_warn, vha, 0x3016, "Invalid SCSI SRB.\n");
1da177e4 1298
7ec0effd 1299 if (IS_P3P_TYPE(ha))
8f7daead
GM		 1300 set_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags);
1301 else
1302 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
1da177e4
LT		 1303 }
1304}
1305
8ae6d9c7 1306srb_t *
ac280b67
AV		 1307qla2x00_get_sp_from_handle(scsi_qla_host_t *vha, const char *func,
1308 struct req_que *req, void *iocb)
1309{
1310 struct qla_hw_data *ha = vha->hw;
1311 sts_entry_t *pkt = iocb;
1312 srb_t *sp = NULL;
1313 uint16_t index;
1314
1315 index = LSW(pkt->handle);
8d93f550 1316 if (index >= req->num_outstanding_cmds) {
7c3df132 1317 ql_log(ql_log_warn, vha, 0x5031,
726b8548
QT		 1318 "Invalid command index (%x) type %8ph.\n",
1319 index, iocb);
7ec0effd 1320 if (IS_P3P_TYPE(ha))
8f7daead
GM		 1321 set_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags);
1322 else
1323 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
ac280b67
AV		 1324 goto done;
1325 }
1326 sp = req->outstanding_cmds[index];
1327 if (!sp) {
7c3df132
SK		 1328 ql_log(ql_log_warn, vha, 0x5032,
1329 "Invalid completion handle (%x) -- timed-out.\n", index);
ac280b67
AV		 1330 return sp;
1331 }
1332 if (sp->handle != index) {
7c3df132
SK		 1333 ql_log(ql_log_warn, vha, 0x5033,
1334 "SRB handle (%x) mismatch %x.\n", sp->handle, index);
ac280b67
AV		 1335 return NULL;
1336 }
9a069e19 1337
ac280b67 1338 req->outstanding_cmds[index] = NULL;
9a069e19 1339
ac280b67
AV		 1340done:
1341 return sp;
1342}
1343
1344static void
1345qla2x00_mbx_iocb_entry(scsi_qla_host_t *vha, struct req_que *req,
1346 struct mbx_entry *mbx)
1347{
1348 const char func[] = "MBX-IOCB";
1349 const char *type;
ac280b67
AV		 1350 fc_port_t *fcport;
1351 srb_t *sp;
4916392b 1352 struct srb_iocb *lio;
99b0bec7 1353 uint16_t *data;
5ff1d584 1354 uint16_t status;
ac280b67
AV		 1355
1356 sp = qla2x00_get_sp_from_handle(vha, func, req, mbx);
1357 if (!sp)
1358 return;
1359
9ba56b95
GM		 1360 lio = &sp->u.iocb_cmd;
1361 type = sp->name;
ac280b67 1362 fcport = sp->fcport;
4916392b 1363 data = lio->u.logio.data;
ac280b67 1364
5ff1d584 1365 data[0] = MBS_COMMAND_ERROR;
4916392b 1366 data[1] = lio->u.logio.flags & SRB_LOGIN_RETRIED ?
5ff1d584 1367 QLA_LOGIO_LOGIN_RETRIED : 0;
ac280b67 1368 if (mbx->entry_status) {
7c3df132 1369 ql_dbg(ql_dbg_async, vha, 0x5043,
cfb0919c 1370 "Async-%s error entry - hdl=%x portid=%02x%02x%02x "
d3fa9e7d 1371 "entry-status=%x status=%x state-flag=%x "
cfb0919c
CD		 1372 "status-flags=%x.\n", type, sp->handle,
1373 fcport->d_id.b.domain, fcport->d_id.b.area,
d3fa9e7d
AV		 1374 fcport->d_id.b.al_pa, mbx->entry_status,
1375 le16_to_cpu(mbx->status), le16_to_cpu(mbx->state_flags),
7c3df132 1376 le16_to_cpu(mbx->status_flags));
d3fa9e7d 1377
cfb0919c 1378 ql_dump_buffer(ql_dbg_async + ql_dbg_buffer, vha, 0x5029,
f8f97b0c 1379 mbx, sizeof(*mbx));
ac280b67 1380
99b0bec7 1381 goto logio_done;
ac280b67
AV		 1382 }
1383
5ff1d584 1384 status = le16_to_cpu(mbx->status);
9ba56b95 1385 if (status == 0x30 && sp->type == SRB_LOGIN_CMD &&
5ff1d584
AV		 1386 le16_to_cpu(mbx->mb0) == MBS_COMMAND_COMPLETE)
1387 status = 0;
1388 if (!status && le16_to_cpu(mbx->mb0) == MBS_COMMAND_COMPLETE) {
7c3df132 1389 ql_dbg(ql_dbg_async, vha, 0x5045,
cfb0919c
CD		 1390 "Async-%s complete - hdl=%x portid=%02x%02x%02x mbx1=%x.\n",
1391 type, sp->handle, fcport->d_id.b.domain,
1392 fcport->d_id.b.area, fcport->d_id.b.al_pa,
1393 le16_to_cpu(mbx->mb1));
ac280b67
AV		 1394
1395 data[0] = MBS_COMMAND_COMPLETE;
9ba56b95 1396 if (sp->type == SRB_LOGIN_CMD) {
99b0bec7
AV		 1397 fcport->port_type = FCT_TARGET;
1398 if (le16_to_cpu(mbx->mb1) & BIT_0)
1399 fcport->port_type = FCT_INITIATOR;
6ac52608 1400 else if (le16_to_cpu(mbx->mb1) & BIT_1)
99b0bec7 1401 fcport->flags |= FCF_FCP2_DEVICE;
5ff1d584 1402 }
99b0bec7 1403 goto logio_done;
ac280b67
AV		 1404 }
1405
1406 data[0] = le16_to_cpu(mbx->mb0);
1407 switch (data[0]) {
1408 case MBS_PORT_ID_USED:
1409 data[1] = le16_to_cpu(mbx->mb1);
1410 break;
1411 case MBS_LOOP_ID_USED:
1412 break;
1413 default:
1414 data[0] = MBS_COMMAND_ERROR;
ac280b67
AV		 1415 break;
1416 }
1417
7c3df132 1418 ql_log(ql_log_warn, vha, 0x5046,
cfb0919c
CD		 1419 "Async-%s failed - hdl=%x portid=%02x%02x%02x status=%x "
1420 "mb0=%x mb1=%x mb2=%x mb6=%x mb7=%x.\n", type, sp->handle,
1421 fcport->d_id.b.domain, fcport->d_id.b.area, fcport->d_id.b.al_pa,
1422 status, le16_to_cpu(mbx->mb0), le16_to_cpu(mbx->mb1),
ac280b67 1423 le16_to_cpu(mbx->mb2), le16_to_cpu(mbx->mb6),
7c3df132 1424 le16_to_cpu(mbx->mb7));
ac280b67 1425
99b0bec7 1426logio_done:
25ff6af1 1427 sp->done(sp, 0);
ac280b67
AV		 1428}
1429
726b8548
QT		 1430static void
1431qla24xx_mbx_iocb_entry(scsi_qla_host_t *vha, struct req_que *req,
1432 struct mbx_24xx_entry *pkt)
1433{
1434 const char func[] = "MBX-IOCB2";
1435 srb_t *sp;
1436 struct srb_iocb *si;
1437 u16 sz, i;
1438 int res;
1439
1440 sp = qla2x00_get_sp_from_handle(vha, func, req, pkt);
1441 if (!sp)
1442 return;
1443
1444 si = &sp->u.iocb_cmd;
1445 sz = min(ARRAY_SIZE(pkt->mb), ARRAY_SIZE(sp->u.iocb_cmd.u.mbx.in_mb));
1446
1447 for (i = 0; i < sz; i++)
1448 si->u.mbx.in_mb[i] = le16_to_cpu(pkt->mb[i]);
1449
1450 res = (si->u.mbx.in_mb[0] & MBS_MASK);
1451
25ff6af1 1452 sp->done(sp, res);
726b8548
QT		 1453}
1454
1455static void
1456qla24xxx_nack_iocb_entry(scsi_qla_host_t *vha, struct req_que *req,
1457 struct nack_to_isp *pkt)
1458{
1459 const char func[] = "nack";
1460 srb_t *sp;
1461 int res = 0;
1462
1463 sp = qla2x00_get_sp_from_handle(vha, func, req, pkt);
1464 if (!sp)
1465 return;
1466
1467 if (pkt->u.isp2x.status != cpu_to_le16(NOTIFY_ACK_SUCCESS))
1468 res = QLA_FUNCTION_FAILED;
1469
25ff6af1 1470 sp->done(sp, res);
ac280b67
AV		 1471}
1472
9bc4f4fb
HZ		 1473static void
1474qla2x00_ct_entry(scsi_qla_host_t *vha, struct req_que *req,
1475 sts_entry_t *pkt, int iocb_type)
1476{
1477 const char func[] = "CT_IOCB";
1478 const char *type;
9bc4f4fb 1479 srb_t *sp;
75cc8cfc 1480 struct bsg_job *bsg_job;
01e0e15c 1481 struct fc_bsg_reply *bsg_reply;
9bc4f4fb 1482 uint16_t comp_status;
726b8548 1483 int res = 0;
9bc4f4fb
HZ		 1484
1485 sp = qla2x00_get_sp_from_handle(vha, func, req, pkt);
1486 if (!sp)
1487 return;
1488
726b8548
QT		 1489 switch (sp->type) {
1490 case SRB_CT_CMD:
1491 bsg_job = sp->u.bsg_job;
1492 bsg_reply = bsg_job->reply;
1493
1494 type = "ct pass-through";
1495
1496 comp_status = le16_to_cpu(pkt->comp_status);
1497
1498 /*
1499 * return FC_CTELS_STATUS_OK and leave the decoding of the ELS/CT
1500 * fc payload to the caller
1501 */
1502 bsg_reply->reply_data.ctels_reply.status = FC_CTELS_STATUS_OK;
1503 bsg_job->reply_len = sizeof(struct fc_bsg_reply);
1504
1505 if (comp_status != CS_COMPLETE) {
1506 if (comp_status == CS_DATA_UNDERRUN) {
1507 res = DID_OK << 16;
1508 bsg_reply->reply_payload_rcv_len =
1509 le16_to_cpu(((sts_entry_t *)pkt)->rsp_info_len);
1510
1511 ql_log(ql_log_warn, vha, 0x5048,
1512 "CT pass-through-%s error comp_status=0x%x total_byte=0x%x.\n",
1513 type, comp_status,
1514 bsg_reply->reply_payload_rcv_len);
1515 } else {
1516 ql_log(ql_log_warn, vha, 0x5049,
1517 "CT pass-through-%s error comp_status=0x%x.\n",
1518 type, comp_status);
1519 res = DID_ERROR << 16;
1520 bsg_reply->reply_payload_rcv_len = 0;
1521 }
1522 ql_dump_buffer(ql_dbg_async + ql_dbg_buffer, vha, 0x5035,
f8f97b0c 1523 pkt, sizeof(*pkt));
726b8548
QT		 1524 } else {
1525 res = DID_OK << 16;
1526 bsg_reply->reply_payload_rcv_len =
1527 bsg_job->reply_payload.payload_len;
1528 bsg_job->reply_len = 0;
1529 }
1530 break;
1531 case SRB_CT_PTHRU_CMD:
1532 /*
1533 * borrowing sts_entry_24xx.comp_status.
1534 * same location as ct_entry_24xx.comp_status
1535 */
1536 res = qla2x00_chk_ms_status(vha, (ms_iocb_entry_t *)pkt,
1537 (struct ct_sns_rsp *)sp->u.iocb_cmd.u.ctarg.rsp,
1538 sp->name);
1539 break;
9bc4f4fb
HZ		 1540 }
1541
25ff6af1 1542 sp->done(sp, res);
9bc4f4fb
HZ		 1543}
1544
9a069e19
GM		 1545static void
1546qla24xx_els_ct_entry(scsi_qla_host_t *vha, struct req_que *req,
1547 struct sts_entry_24xx *pkt, int iocb_type)
1548{
1549 const char func[] = "ELS_CT_IOCB";
1550 const char *type;
9a069e19 1551 srb_t *sp;
75cc8cfc 1552 struct bsg_job *bsg_job;
01e0e15c 1553 struct fc_bsg_reply *bsg_reply;
9a069e19
GM		 1554 uint16_t comp_status;
1555 uint32_t fw_status[3];
9ba56b95 1556 int res;
edd05de1 1557 struct srb_iocb *els;
9a069e19
GM		 1558
1559 sp = qla2x00_get_sp_from_handle(vha, func, req, pkt);
1560 if (!sp)
1561 return;
9a069e19
GM		 1562
1563 type = NULL;
9ba56b95 1564 switch (sp->type) {
9a069e19
GM		 1565 case SRB_ELS_CMD_RPT:
1566 case SRB_ELS_CMD_HST:
1567 type = "els";
1568 break;
1569 case SRB_CT_CMD:
1570 type = "ct pass-through";
1571 break;
6eb54715
HM		 1572 case SRB_ELS_DCMD:
1573 type = "Driver ELS logo";
edd05de1
DG		 1574 if (iocb_type != ELS_IOCB_TYPE) {
1575 ql_dbg(ql_dbg_user, vha, 0x5047,
1576 "Completing %s: (%p) type=%d.\n",
1577 type, sp, sp->type);
1578 sp->done(sp, 0);
1579 return;
1580 }
1581 break;
726b8548
QT		 1582 case SRB_CT_PTHRU_CMD:
1583 /* borrowing sts_entry_24xx.comp_status.
1584 same location as ct_entry_24xx.comp_status
1585 */
2d73ac61 1586 res = qla2x00_chk_ms_status(sp->vha, (ms_iocb_entry_t *)pkt,
726b8548
QT		 1587 (struct ct_sns_rsp *)sp->u.iocb_cmd.u.ctarg.rsp,
1588 sp->name);
25ff6af1 1589 sp->done(sp, res);
6eb54715 1590 return;
9a069e19 1591 default:
37fed3ee 1592 ql_dbg(ql_dbg_user, vha, 0x503e,
9ba56b95 1593 "Unrecognized SRB: (%p) type=%d.\n", sp, sp->type);
9a069e19
GM		 1594 return;
1595 }
1596
1597 comp_status = fw_status[0] = le16_to_cpu(pkt->comp_status);
1598 fw_status[1] = le16_to_cpu(((struct els_sts_entry_24xx*)pkt)->error_subcode_1);
1599 fw_status[2] = le16_to_cpu(((struct els_sts_entry_24xx*)pkt)->error_subcode_2);
1600
edd05de1
DG		 1601 if (iocb_type == ELS_IOCB_TYPE) {
1602 els = &sp->u.iocb_cmd;
1603 els->u.els_plogi.fw_status[0] = fw_status[0];
1604 els->u.els_plogi.fw_status[1] = fw_status[1];
1605 els->u.els_plogi.fw_status[2] = fw_status[2];
1606 els->u.els_plogi.comp_status = fw_status[0];
1607 if (comp_status == CS_COMPLETE) {
1608 res = DID_OK << 16;
1609 } else {
1610 if (comp_status == CS_DATA_UNDERRUN) {
1611 res = DID_OK << 16;
1612 els->u.els_plogi.len =
1613 le16_to_cpu(((struct els_sts_entry_24xx *)
1614 pkt)->total_byte_count);
1615 } else {
1616 els->u.els_plogi.len = 0;
1617 res = DID_ERROR << 16;
1618 }
1619 }
1620 ql_log(ql_log_info, vha, 0x503f,
1621 "ELS IOCB Done -%s error hdl=%x comp_status=0x%x error subcode 1=0x%x error subcode 2=0x%x total_byte=0x%x\n",
1622 type, sp->handle, comp_status, fw_status[1], fw_status[2],
1623 le16_to_cpu(((struct els_sts_entry_24xx *)
1624 pkt)->total_byte_count));
1625 goto els_ct_done;
1626 }
1627
9a069e19
GM		 1628 /* return FC_CTELS_STATUS_OK and leave the decoding of the ELS/CT
1629 * fc payload to the caller
1630 */
a1730595
DG		 1631 bsg_job = sp->u.bsg_job;
1632 bsg_reply = bsg_job->reply;
01e0e15c 1633 bsg_reply->reply_data.ctels_reply.status = FC_CTELS_STATUS_OK;
9a069e19
GM		 1634 bsg_job->reply_len = sizeof(struct fc_bsg_reply) + sizeof(fw_status);
1635
1636 if (comp_status != CS_COMPLETE) {
1637 if (comp_status == CS_DATA_UNDERRUN) {
9ba56b95 1638 res = DID_OK << 16;
01e0e15c 1639 bsg_reply->reply_payload_rcv_len =
9ba56b95 1640 le16_to_cpu(((struct els_sts_entry_24xx *)pkt)->total_byte_count);
9a069e19 1641
37fed3ee 1642 ql_dbg(ql_dbg_user, vha, 0x503f,
cfb0919c 1643 "ELS-CT pass-through-%s error hdl=%x comp_status-status=0x%x "
9a069e19 1644 "error subcode 1=0x%x error subcode 2=0x%x total_byte = 0x%x.\n",
cfb0919c 1645 type, sp->handle, comp_status, fw_status[1], fw_status[2],
7c3df132
SK		 1646 le16_to_cpu(((struct els_sts_entry_24xx *)
1647 pkt)->total_byte_count));
05231a3b 1648 } else {
37fed3ee 1649 ql_dbg(ql_dbg_user, vha, 0x5040,
cfb0919c 1650 "ELS-CT pass-through-%s error hdl=%x comp_status-status=0x%x "
9a069e19 1651 "error subcode 1=0x%x error subcode 2=0x%x.\n",
cfb0919c 1652 type, sp->handle, comp_status,
7c3df132
SK		 1653 le16_to_cpu(((struct els_sts_entry_24xx *)
1654 pkt)->error_subcode_1),
1655 le16_to_cpu(((struct els_sts_entry_24xx *)
1656 pkt)->error_subcode_2));
9ba56b95 1657 res = DID_ERROR << 16;
01e0e15c 1658 bsg_reply->reply_payload_rcv_len = 0;
9a069e19 1659 }
05231a3b
CH		 1660 memcpy(bsg_job->reply + sizeof(struct fc_bsg_reply),
1661 fw_status, sizeof(fw_status));
37fed3ee 1662 ql_dump_buffer(ql_dbg_user + ql_dbg_buffer, vha, 0x5056,
f8f97b0c 1663 pkt, sizeof(*pkt));
9a069e19
GM		 1664 }
1665 else {
9ba56b95 1666 res = DID_OK << 16;
01e0e15c 1667 bsg_reply->reply_payload_rcv_len = bsg_job->reply_payload.payload_len;
9a069e19
GM		 1668 bsg_job->reply_len = 0;
1669 }
edd05de1 1670els_ct_done:
9a069e19 1671
25ff6af1 1672 sp->done(sp, res);
9a069e19
GM		 1673}
1674
ac280b67
AV		 1675static void
1676qla24xx_logio_entry(scsi_qla_host_t *vha, struct req_que *req,
1677 struct logio_entry_24xx *logio)
1678{
1679 const char func[] = "LOGIO-IOCB";
1680 const char *type;
ac280b67
AV		 1681 fc_port_t *fcport;
1682 srb_t *sp;
4916392b 1683 struct srb_iocb *lio;
99b0bec7 1684 uint16_t *data;
ac280b67
AV		 1685 uint32_t iop[2];
1686
1687 sp = qla2x00_get_sp_from_handle(vha, func, req, logio);
1688 if (!sp)
1689 return;
1690
9ba56b95
GM		 1691 lio = &sp->u.iocb_cmd;
1692 type = sp->name;
ac280b67 1693 fcport = sp->fcport;
4916392b 1694 data = lio->u.logio.data;
ac280b67 1695
5ff1d584 1696 data[0] = MBS_COMMAND_ERROR;
4916392b 1697 data[1] = lio->u.logio.flags & SRB_LOGIN_RETRIED ?
5ff1d584 1698 QLA_LOGIO_LOGIN_RETRIED : 0;
ac280b67 1699 if (logio->entry_status) {
5e19ed90 1700 ql_log(ql_log_warn, fcport->vha, 0x5034,
5b33469a 1701 "Async-%s error entry - %8phC hdl=%x"
d3fa9e7d 1702 "portid=%02x%02x%02x entry-status=%x.\n",
5b33469a 1703 type, fcport->port_name, sp->handle, fcport->d_id.b.domain,
cfb0919c
CD		 1704 fcport->d_id.b.area, fcport->d_id.b.al_pa,
1705 logio->entry_status);
1706 ql_dump_buffer(ql_dbg_async + ql_dbg_buffer, vha, 0x504d,
f8f97b0c 1707 logio, sizeof(*logio));
ac280b67 1708
99b0bec7 1709 goto logio_done;
ac280b67
AV		 1710 }
1711
1712 if (le16_to_cpu(logio->comp_status) == CS_COMPLETE) {
5e19ed90 1713 ql_dbg(ql_dbg_async, fcport->vha, 0x5036,
5b33469a
QT		 1714 "Async-%s complete - %8phC hdl=%x portid=%02x%02x%02x "
1715 "iop0=%x.\n", type, fcport->port_name, sp->handle,
1716 fcport->d_id.b.domain,
cfb0919c 1717 fcport->d_id.b.area, fcport->d_id.b.al_pa,
7c3df132 1718 le32_to_cpu(logio->io_parameter[0]));
ac280b67 1719
ead03855 1720 vha->hw->exch_starvation = 0;
ac280b67 1721 data[0] = MBS_COMMAND_COMPLETE;
03aaa89f
DT		 1722
1723 if (sp->type == SRB_PRLI_CMD) {
1724 lio->u.logio.iop[0] =
1725 le32_to_cpu(logio->io_parameter[0]);
1726 lio->u.logio.iop[1] =
1727 le32_to_cpu(logio->io_parameter[1]);
1728 goto logio_done;
1729 }
1730
9ba56b95 1731 if (sp->type != SRB_LOGIN_CMD)
99b0bec7 1732 goto logio_done;
ac280b67
AV		 1733
1734 iop[0] = le32_to_cpu(logio->io_parameter[0]);
1735 if (iop[0] & BIT_4) {
1736 fcport->port_type = FCT_TARGET;
1737 if (iop[0] & BIT_8)
8474f3a0 1738 fcport->flags |= FCF_FCP2_DEVICE;
b0cd579c 1739 } else if (iop[0] & BIT_5)
ac280b67 1740 fcport->port_type = FCT_INITIATOR;
b0cd579c 1741
2d70c103
NB		 1742 if (iop[0] & BIT_7)
1743 fcport->flags |= FCF_CONF_COMP_SUPPORTED;
1744
ac280b67
AV		 1745 if (logio->io_parameter[7] || logio->io_parameter[8])
1746 fcport->supported_classes |= FC_COS_CLASS2;
1747 if (logio->io_parameter[9] || logio->io_parameter[10])
1748 fcport->supported_classes |= FC_COS_CLASS3;
1749
99b0bec7 1750 goto logio_done;
ac280b67
AV		 1751 }
1752
1753 iop[0] = le32_to_cpu(logio->io_parameter[0]);
1754 iop[1] = le32_to_cpu(logio->io_parameter[1]);
726b8548
QT		 1755 lio->u.logio.iop[0] = iop[0];
1756 lio->u.logio.iop[1] = iop[1];
ac280b67
AV		 1757 switch (iop[0]) {
1758 case LSC_SCODE_PORTID_USED:
1759 data[0] = MBS_PORT_ID_USED;
1760 data[1] = LSW(iop[1]);
1761 break;
1762 case LSC_SCODE_NPORT_USED:
1763 data[0] = MBS_LOOP_ID_USED;
1764 break;
5b33469a
QT		 1765 case LSC_SCODE_CMD_FAILED:
1766 if (iop[1] == 0x0606) {
1767 /*
1768 * PLOGI/PRLI Completed. We must have Recv PLOGI/PRLI,
1769 * Target side acked.
1770 */
1771 data[0] = MBS_COMMAND_COMPLETE;
1772 goto logio_done;
1773 }
1774 data[0] = MBS_COMMAND_ERROR;
1775 break;
ead03855
QT		 1776 case LSC_SCODE_NOXCB:
1777 vha->hw->exch_starvation++;
1778 if (vha->hw->exch_starvation > 5) {
83548fe2 1779 ql_log(ql_log_warn, vha, 0xd046,
ead03855
QT		 1780 "Exchange starvation. Resetting RISC\n");
1781
1782 vha->hw->exch_starvation = 0;
1783
1784 if (IS_P3P_TYPE(vha->hw))
1785 set_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags);
1786 else
1787 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
1788 qla2xxx_wake_dpc(vha);
1789 }
81881861 1790 /* fall through */
ac280b67
AV		 1791 default:
1792 data[0] = MBS_COMMAND_ERROR;
ac280b67
AV		 1793 break;
1794 }
1795
5e19ed90 1796 ql_dbg(ql_dbg_async, fcport->vha, 0x5037,
5b33469a
QT		 1797 "Async-%s failed - %8phC hdl=%x portid=%02x%02x%02x comp=%x "
1798 "iop0=%x iop1=%x.\n", type, fcport->port_name,
1799 sp->handle, fcport->d_id.b.domain,
d3fa9e7d 1800 fcport->d_id.b.area, fcport->d_id.b.al_pa,
ac280b67
AV		 1801 le16_to_cpu(logio->comp_status),
1802 le32_to_cpu(logio->io_parameter[0]),
7c3df132 1803 le32_to_cpu(logio->io_parameter[1]));
ac280b67 1804
99b0bec7 1805logio_done:
25ff6af1 1806 sp->done(sp, 0);
ac280b67
AV		 1807}
1808
3822263e 1809static void
faef62d1 1810qla24xx_tm_iocb_entry(scsi_qla_host_t *vha, struct req_que *req, void *tsk)
3822263e
MI		 1811{
1812 const char func[] = "TMF-IOCB";
1813 const char *type;
1814 fc_port_t *fcport;
1815 srb_t *sp;
1816 struct srb_iocb *iocb;
3822263e 1817 struct sts_entry_24xx *sts = (struct sts_entry_24xx *)tsk;
3822263e
MI		 1818
1819 sp = qla2x00_get_sp_from_handle(vha, func, req, tsk);
1820 if (!sp)
1821 return;
1822
9ba56b95
GM		 1823 iocb = &sp->u.iocb_cmd;
1824 type = sp->name;
3822263e 1825 fcport = sp->fcport;
faef62d1 1826 iocb->u.tmf.data = QLA_SUCCESS;
3822263e
MI		 1827
1828 if (sts->entry_status) {
5e19ed90 1829 ql_log(ql_log_warn, fcport->vha, 0x5038,
cfb0919c
CD		 1830 "Async-%s error - hdl=%x entry-status(%x).\n",
1831 type, sp->handle, sts->entry_status);
faef62d1 1832 iocb->u.tmf.data = QLA_FUNCTION_FAILED;
ad950360 1833 } else if (sts->comp_status != cpu_to_le16(CS_COMPLETE)) {
5e19ed90 1834 ql_log(ql_log_warn, fcport->vha, 0x5039,
cfb0919c
CD		 1835 "Async-%s error - hdl=%x completion status(%x).\n",
1836 type, sp->handle, sts->comp_status);
faef62d1
AB		 1837 iocb->u.tmf.data = QLA_FUNCTION_FAILED;
1838 } else if ((le16_to_cpu(sts->scsi_status) &
3822263e 1839 SS_RESPONSE_INFO_LEN_VALID)) {
faef62d1
AB		 1840 if (le32_to_cpu(sts->rsp_data_len) < 4) {
1841 ql_log(ql_log_warn, fcport->vha, 0x503b,
1842 "Async-%s error - hdl=%x not enough response(%d).\n",
1843 type, sp->handle, sts->rsp_data_len);
1844 } else if (sts->data[3]) {
1845 ql_log(ql_log_warn, fcport->vha, 0x503c,
1846 "Async-%s error - hdl=%x response(%x).\n",
1847 type, sp->handle, sts->data[3]);
8d2b21db 1848 iocb->u.tmf.data = QLA_FUNCTION_FAILED;
faef62d1 1849 }
3822263e
MI		 1850 }
1851
faef62d1 1852 if (iocb->u.tmf.data != QLA_SUCCESS)
f8f97b0c
JC		 1853 ql_dump_buffer(ql_dbg_async + ql_dbg_buffer, sp->vha, 0x5055,
1854 sts, sizeof(*sts));
3822263e 1855
25ff6af1 1856 sp->done(sp, 0);
3822263e
MI		 1857}
1858
60dd6e8e
DT		 1859static void qla24xx_nvme_iocb_entry(scsi_qla_host_t *vha, struct req_que *req,
1860 void *tsk, srb_t *sp)
7401bc18 1861{
7401bc18 1862 fc_port_t *fcport;
7401bc18
DG		 1863 struct srb_iocb *iocb;
1864 struct sts_entry_24xx *sts = (struct sts_entry_24xx *)tsk;
1865 uint16_t state_flags;
1866 struct nvmefc_fcp_req *fd;
4072e1dc
DT		 1867 uint16_t ret = QLA_SUCCESS;
1868 uint16_t comp_status = le16_to_cpu(sts->comp_status);
7401bc18
DG		 1869
1870 iocb = &sp->u.iocb_cmd;
1871 fcport = sp->fcport;
4072e1dc 1872 iocb->u.nvme.comp_status = comp_status;
7401bc18
DG		 1873 state_flags = le16_to_cpu(sts->state_flags);
1874 fd = iocb->u.nvme.desc;
7401bc18 1875
60dd6e8e 1876 if (unlikely(iocb->u.nvme.aen_op))
deeae7a6 1877 atomic_dec(&sp->vha->hw->nvme_active_aen_cnt);
7401bc18
DG		 1878
1879 /*
1880 * State flags: Bit 6 and 0.
1881 * If 0 is set, we don't care about 6.
1882 * both cases resp was dma'd to host buffer
1883 * if both are 0, that is good path case.
1884 * if six is set and 0 is clear, we need to
1885 * copy resp data from status iocb to resp buffer.
1886 */
1887 if (!(state_flags & (SF_FCP_RSP_DMA | SF_NVME_ERSP))) {
1888 iocb->u.nvme.rsp_pyld_len = 0;
1889 } else if ((state_flags & SF_FCP_RSP_DMA)) {
1890 iocb->u.nvme.rsp_pyld_len = le16_to_cpu(sts->nvme_rsp_pyld_len);
1891 } else if (state_flags & SF_NVME_ERSP) {
1892 uint32_t *inbuf, *outbuf;
1893 uint16_t iter;
1894
1895 inbuf = (uint32_t *)&sts->nvme_ersp_data;
1896 outbuf = (uint32_t *)fd->rspaddr;
1897 iocb->u.nvme.rsp_pyld_len = le16_to_cpu(sts->nvme_rsp_pyld_len);
1898 iter = iocb->u.nvme.rsp_pyld_len >> 2;
1899 for (; iter; iter--)
1900 *outbuf++ = swab32(*inbuf++);
1901 } else { /* unhandled case */
1902 ql_log(ql_log_warn, fcport->vha, 0x503a,
1903 "NVME-%s error. Unhandled state_flags of %x\n",
1904 sp->name, state_flags);
1905 }
1906
1907 fd->transferred_length = fd->payload_length -
1908 le32_to_cpu(sts->residual_len);
1909
4072e1dc
DT		 1910 if (unlikely(comp_status != CS_COMPLETE))
1911 ql_log(ql_log_warn, fcport->vha, 0x5060,
1912 "NVME-%s ERR Handling - hdl=%x status(%x) tr_len:%x resid=%x ox_id=%x\n",
1913 sp->name, sp->handle, comp_status,
1914 fd->transferred_length, le32_to_cpu(sts->residual_len),
1915 sts->ox_id);
1916
1917 /*
1918 * If transport error then Failure (HBA rejects request)
1919 * otherwise transport will handle.
1920 */
1921 switch (comp_status) {
60dd6e8e 1922 case CS_COMPLETE:
60dd6e8e 1923 break;
4072e1dc 1924
60dd6e8e
DT		 1925 case CS_RESET:
1926 case CS_PORT_UNAVAILABLE:
1927 case CS_PORT_LOGGED_OUT:
4072e1dc
DT		 1928 fcport->nvme_flag |= NVME_FLAG_RESETTING;
1929 /* fall through */
1930 case CS_ABORTED:
60dd6e8e 1931 case CS_PORT_BUSY:
60dd6e8e
DT		 1932 fd->transferred_length = 0;
1933 iocb->u.nvme.rsp_pyld_len = 0;
1934 ret = QLA_ABORTED;
1935 break;
4072e1dc
DT		 1936 case CS_DATA_UNDERRUN:
1937 break;
60dd6e8e 1938 default:
7401bc18 1939 ret = QLA_FUNCTION_FAILED;
60dd6e8e 1940 break;
7401bc18
DG		 1941 }
1942 sp->done(sp, ret);
1943}
1944
2853192e
QT		 1945static void qla_ctrlvp_completed(scsi_qla_host_t *vha, struct req_que *req,
1946 struct vp_ctrl_entry_24xx *vce)
1947{
1948 const char func[] = "CTRLVP-IOCB";
1949 srb_t *sp;
1950 int rval = QLA_SUCCESS;
1951
1952 sp = qla2x00_get_sp_from_handle(vha, func, req, vce);
1953 if (!sp)
1954 return;
1955
1956 if (vce->entry_status != 0) {
1957 ql_dbg(ql_dbg_vport, vha, 0x10c4,
1958 "%s: Failed to complete IOCB -- error status (%x)\n",
1959 sp->name, vce->entry_status);
1960 rval = QLA_FUNCTION_FAILED;
1961 } else if (vce->comp_status != cpu_to_le16(CS_COMPLETE)) {
1962 ql_dbg(ql_dbg_vport, vha, 0x10c5,
1963 "%s: Failed to complete IOCB -- completion status (%x) vpidx %x\n",
1964 sp->name, le16_to_cpu(vce->comp_status),
1965 le16_to_cpu(vce->vp_idx_failed));
1966 rval = QLA_FUNCTION_FAILED;
1967 } else {
1968 ql_dbg(ql_dbg_vport, vha, 0x10c6,
1969 "Done %s.\n", __func__);
1970 }
1971
1972 sp->rc = rval;
1973 sp->done(sp, rval);
1974}
1975
7b006b97
BVA		 1976/* Process a single response queue entry. */
1977static void qla2x00_process_response_entry(struct scsi_qla_host *vha,
1978 struct rsp_que *rsp,
1979 sts_entry_t *pkt)
1980{
1981 sts21_entry_t *sts21_entry;
1982 sts22_entry_t *sts22_entry;
1983 uint16_t handle_cnt;
1984 uint16_t cnt;
1985
1986 switch (pkt->entry_type) {
1987 case STATUS_TYPE:
1988 qla2x00_status_entry(vha, rsp, pkt);
1989 break;
1990 case STATUS_TYPE_21:
1991 sts21_entry = (sts21_entry_t *)pkt;
1992 handle_cnt = sts21_entry->handle_count;
1993 for (cnt = 0; cnt < handle_cnt; cnt++)
1994 qla2x00_process_completed_request(vha, rsp->req,
1995 sts21_entry->handle[cnt]);
1996 break;
1997 case STATUS_TYPE_22:
1998 sts22_entry = (sts22_entry_t *)pkt;
1999 handle_cnt = sts22_entry->handle_count;
2000 for (cnt = 0; cnt < handle_cnt; cnt++)
2001 qla2x00_process_completed_request(vha, rsp->req,
2002 sts22_entry->handle[cnt]);
2003 break;
2004 case STATUS_CONT_TYPE:
2005 qla2x00_status_cont_entry(rsp, (sts_cont_entry_t *)pkt);
2006 break;
2007 case MBX_IOCB_TYPE:
2008 qla2x00_mbx_iocb_entry(vha, rsp->req, (struct mbx_entry *)pkt);
2009 break;
2010 case CT_IOCB_TYPE:
2011 qla2x00_ct_entry(vha, rsp->req, pkt, CT_IOCB_TYPE);
2012 break;
2013 default:
2014 /* Type Not Supported. */
2015 ql_log(ql_log_warn, vha, 0x504a,
2016 "Received unknown response pkt type %x entry status=%x.\n",
2017 pkt->entry_type, pkt->entry_status);
2018 break;
2019 }
2020}
2021
1da177e4
LT		 2022/**
2023 * qla2x00_process_response_queue() - Process response queue entries.
2db6228d 2024 * @rsp: response queue
1da177e4
LT		 2025 */
2026void
73208dfd 2027qla2x00_process_response_queue(struct rsp_que *rsp)
1da177e4 2028{
73208dfd
AC		 2029 struct scsi_qla_host *vha;
2030 struct qla_hw_data *ha = rsp->hw;
3d71644c 2031 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1da177e4 2032 sts_entry_t *pkt;
73208dfd 2033
2afa19a9 2034 vha = pci_get_drvdata(ha->pdev);
1da177e4 2035
e315cd28 2036 if (!vha->flags.online)
1da177e4
LT		 2037 return;
2038
e315cd28
AC		 2039 while (rsp->ring_ptr->signature != RESPONSE_PROCESSED) {
2040 pkt = (sts_entry_t *)rsp->ring_ptr;
1da177e4 2041
e315cd28
AC		 2042 rsp->ring_index++;
2043 if (rsp->ring_index == rsp->length) {
2044 rsp->ring_index = 0;
2045 rsp->ring_ptr = rsp->ring;
1da177e4 2046 } else {
e315cd28 2047 rsp->ring_ptr++;
1da177e4
LT		 2048 }
2049
2050 if (pkt->entry_status != 0) {
73208dfd 2051 qla2x00_error_entry(vha, rsp, pkt);
1da177e4
LT		 2052 ((response_t *)pkt)->signature = RESPONSE_PROCESSED;
2053 wmb();
2054 continue;
2055 }
2056
7b006b97 2057 qla2x00_process_response_entry(vha, rsp, pkt);
1da177e4
LT		 2058 ((response_t *)pkt)->signature = RESPONSE_PROCESSED;
2059 wmb();
2060 }
2061
2062 /* Adjust ring index */
e315cd28 2063 WRT_REG_WORD(ISP_RSP_Q_OUT(ha, reg), rsp->ring_index);
1da177e4
LT		 2064}
2065
4733fcb1 2066static inline void
5544213b 2067qla2x00_handle_sense(srb_t *sp, uint8_t *sense_data, uint32_t par_sense_len,
9ba56b95 2068 uint32_t sense_len, struct rsp_que *rsp, int res)
4733fcb1 2069{
25ff6af1 2070 struct scsi_qla_host *vha = sp->vha;
9ba56b95
GM		 2071 struct scsi_cmnd *cp = GET_CMD_SP(sp);
2072 uint32_t track_sense_len;
4733fcb1
AV		 2073
2074 if (sense_len >= SCSI_SENSE_BUFFERSIZE)
2075 sense_len = SCSI_SENSE_BUFFERSIZE;
2076
9ba56b95
GM		 2077 SET_CMD_SENSE_LEN(sp, sense_len);
2078 SET_CMD_SENSE_PTR(sp, cp->sense_buffer);
2079 track_sense_len = sense_len;
2080
2081 if (sense_len > par_sense_len)
5544213b 2082 sense_len = par_sense_len;
4733fcb1
AV		 2083
2084 memcpy(cp->sense_buffer, sense_data, sense_len);
2085
9ba56b95
GM		 2086 SET_CMD_SENSE_PTR(sp, cp->sense_buffer + sense_len);
2087 track_sense_len -= sense_len;
2088 SET_CMD_SENSE_LEN(sp, track_sense_len);
2089
2090 if (track_sense_len != 0) {
2afa19a9 2091 rsp->status_srb = sp;
9ba56b95
GM		 2092 cp->result = res;
2093 }
4733fcb1 2094
cfb0919c
CD		 2095 if (sense_len) {
2096 ql_dbg(ql_dbg_io + ql_dbg_buffer, vha, 0x301c,
9cb78c16 2097 "Check condition Sense data, nexus%ld:%d:%llu cmd=%p.\n",
25ff6af1 2098 sp->vha->host_no, cp->device->id, cp->device->lun,
cfb0919c 2099 cp);
7c3df132
SK		 2100 ql_dump_buffer(ql_dbg_io + ql_dbg_buffer, vha, 0x302b,
2101 cp->sense_buffer, sense_len);
cfb0919c 2102 }
4733fcb1
AV		 2103}
2104
bad75002
AE		 2105struct scsi_dif_tuple {
2106 __be16 guard; /* Checksum */
d6a03581 2107 __be16 app_tag; /* APPL identifier */
bad75002
AE		 2108 __be32 ref_tag; /* Target LBA or indirect LBA */
2109};
2110
2111/*
2112 * Checks the guard or meta-data for the type of error
2113 * detected by the HBA. In case of errors, we set the
2114 * ASC/ASCQ fields in the sense buffer with ILLEGAL_REQUEST
2115 * to indicate to the kernel that the HBA detected error.
2116 */
8cb2049c 2117static inline int
bad75002
AE		 2118qla2x00_handle_dif_error(srb_t *sp, struct sts_entry_24xx *sts24)
2119{
25ff6af1 2120 struct scsi_qla_host *vha = sp->vha;
9ba56b95 2121 struct scsi_cmnd *cmd = GET_CMD_SP(sp);
8cb2049c
AE		 2122 uint8_t *ap = &sts24->data[12];
2123 uint8_t *ep = &sts24->data[20];
bad75002
AE		 2124 uint32_t e_ref_tag, a_ref_tag;
2125 uint16_t e_app_tag, a_app_tag;
2126 uint16_t e_guard, a_guard;
2127
8cb2049c
AE		 2128 /*
2129 * swab32 of the "data" field in the beginning of qla2x00_status_entry()
2130 * would make guard field appear at offset 2
2131 */
2132 a_guard = le16_to_cpu(*(uint16_t *)(ap + 2));
2133 a_app_tag = le16_to_cpu(*(uint16_t *)(ap + 0));
2134 a_ref_tag = le32_to_cpu(*(uint32_t *)(ap + 4));
2135 e_guard = le16_to_cpu(*(uint16_t *)(ep + 2));
2136 e_app_tag = le16_to_cpu(*(uint16_t *)(ep + 0));
2137 e_ref_tag = le32_to_cpu(*(uint32_t *)(ep + 4));
bad75002 2138
7c3df132
SK		 2139 ql_dbg(ql_dbg_io, vha, 0x3023,
2140 "iocb(s) %p Returned STATUS.\n", sts24);
bad75002 2141
7c3df132
SK		 2142 ql_dbg(ql_dbg_io, vha, 0x3024,
2143 "DIF ERROR in cmd 0x%x lba 0x%llx act ref"
bad75002 2144 " tag=0x%x, exp ref_tag=0x%x, act app tag=0x%x, exp app"
7c3df132 2145 " tag=0x%x, act guard=0x%x, exp guard=0x%x.\n",
bad75002 2146 cmd->cmnd[0], (u64)scsi_get_lba(cmd), a_ref_tag, e_ref_tag,
7c3df132 2147 a_app_tag, e_app_tag, a_guard, e_guard);
bad75002 2148
8cb2049c
AE		 2149 /*
2150 * Ignore sector if:
2151 * For type 3: ref & app tag is all 'f's
2152 * For type 0,1,2: app tag is all 'f's
2153 */
128b6f9f 2154 if ((a_app_tag == T10_PI_APP_ESCAPE) &&
8cb2049c 2155 ((scsi_get_prot_type(cmd) != SCSI_PROT_DIF_TYPE3) ||
128b6f9f 2156 (a_ref_tag == T10_PI_REF_ESCAPE))) {
8cb2049c
AE		 2157 uint32_t blocks_done, resid;
2158 sector_t lba_s = scsi_get_lba(cmd);
2159
2160 /* 2TB boundary case covered automatically with this */
2161 blocks_done = e_ref_tag - (uint32_t)lba_s + 1;
2162
2163 resid = scsi_bufflen(cmd) - (blocks_done *
2164 cmd->device->sector_size);
2165
2166 scsi_set_resid(cmd, resid);
2167 cmd->result = DID_OK << 16;
2168
2169 /* Update protection tag */
2170 if (scsi_prot_sg_count(cmd)) {
2171 uint32_t i, j = 0, k = 0, num_ent;
2172 struct scatterlist *sg;
27c0e83b 2173 struct t10_pi_tuple *spt;
8cb2049c
AE		 2174
2175 /* Patch the corresponding protection tags */
2176 scsi_for_each_prot_sg(cmd, sg,
2177 scsi_prot_sg_count(cmd), i) {
2178 num_ent = sg_dma_len(sg) / 8;
2179 if (k + num_ent < blocks_done) {
2180 k += num_ent;
2181 continue;
2182 }
2183 j = blocks_done - k - 1;
2184 k = blocks_done;
2185 break;
2186 }
2187
2188 if (k != blocks_done) {
cfb0919c 2189 ql_log(ql_log_warn, vha, 0x302f,
8ec9c7fb
RD		 2190 "unexpected tag values tag:lba=%x:%llx)\n",
2191 e_ref_tag, (unsigned long long)lba_s);
8cb2049c
AE		 2192 return 1;
2193 }
2194
2195 spt = page_address(sg_page(sg)) + sg->offset;
2196 spt += j;
2197
128b6f9f 2198 spt->app_tag = T10_PI_APP_ESCAPE;
8cb2049c 2199 if (scsi_get_prot_type(cmd) == SCSI_PROT_DIF_TYPE3)
128b6f9f 2200 spt->ref_tag = T10_PI_REF_ESCAPE;
8cb2049c
AE		 2201 }
2202
2203 return 0;
2204 }
2205
bad75002
AE		 2206 /* check guard */
2207 if (e_guard != a_guard) {
2208 scsi_build_sense_buffer(1, cmd->sense_buffer, ILLEGAL_REQUEST,
2209 0x10, 0x1);
2210 set_driver_byte(cmd, DRIVER_SENSE);
2211 set_host_byte(cmd, DID_ABORT);
584d7aad 2212 cmd->result |= SAM_STAT_CHECK_CONDITION;
8cb2049c 2213 return 1;
bad75002
AE		 2214 }
2215
e02587d7
AE		 2216 /* check ref tag */
2217 if (e_ref_tag != a_ref_tag) {
bad75002 2218 scsi_build_sense_buffer(1, cmd->sense_buffer, ILLEGAL_REQUEST,
e02587d7 2219 0x10, 0x3);
bad75002
AE		 2220 set_driver_byte(cmd, DRIVER_SENSE);
2221 set_host_byte(cmd, DID_ABORT);
584d7aad 2222 cmd->result |= SAM_STAT_CHECK_CONDITION;
8cb2049c 2223 return 1;
bad75002
AE		 2224 }
2225
e02587d7
AE		 2226 /* check appl tag */
2227 if (e_app_tag != a_app_tag) {
bad75002 2228 scsi_build_sense_buffer(1, cmd->sense_buffer, ILLEGAL_REQUEST,
e02587d7 2229 0x10, 0x2);
bad75002
AE		 2230 set_driver_byte(cmd, DRIVER_SENSE);
2231 set_host_byte(cmd, DID_ABORT);
584d7aad 2232 cmd->result |= SAM_STAT_CHECK_CONDITION;
8cb2049c 2233 return 1;
bad75002 2234 }
e02587d7 2235
8cb2049c 2236 return 1;
bad75002
AE		 2237}
2238
a9b6f722
SK		 2239static void
2240qla25xx_process_bidir_status_iocb(scsi_qla_host_t *vha, void *pkt,
2241 struct req_que *req, uint32_t index)
2242{
2243 struct qla_hw_data *ha = vha->hw;
2244 srb_t *sp;
2245 uint16_t comp_status;
2246 uint16_t scsi_status;
2247 uint16_t thread_id;
2248 uint32_t rval = EXT_STATUS_OK;
75cc8cfc 2249 struct bsg_job *bsg_job = NULL;
01e0e15c
JT		 2250 struct fc_bsg_request *bsg_request;
2251 struct fc_bsg_reply *bsg_reply;
a9b6f722
SK		 2252 sts_entry_t *sts;
2253 struct sts_entry_24xx *sts24;
bd432bb5 2254
a9b6f722
SK		 2255 sts = (sts_entry_t *) pkt;
2256 sts24 = (struct sts_entry_24xx *) pkt;
2257
2258 /* Validate handle. */
8d93f550 2259 if (index >= req->num_outstanding_cmds) {
a9b6f722
SK		 2260 ql_log(ql_log_warn, vha, 0x70af,
2261 "Invalid SCSI completion handle 0x%x.\n", index);
2262 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
2263 return;
2264 }
2265
2266 sp = req->outstanding_cmds[index];
01e0e15c 2267 if (!sp) {
a9b6f722
SK		 2268 ql_log(ql_log_warn, vha, 0x70b0,
2269 "Req:%d: Invalid ISP SCSI completion handle(0x%x)\n",
2270 req->id, index);
2271
2272 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
2273 return;
2274 }
2275
01e0e15c
JT		 2276 /* Free outstanding command slot. */
2277 req->outstanding_cmds[index] = NULL;
2278 bsg_job = sp->u.bsg_job;
2279 bsg_request = bsg_job->request;
2280 bsg_reply = bsg_job->reply;
2281
a9b6f722
SK		 2282 if (IS_FWI2_CAPABLE(ha)) {
2283 comp_status = le16_to_cpu(sts24->comp_status);
2284 scsi_status = le16_to_cpu(sts24->scsi_status) & SS_MASK;
2285 } else {
2286 comp_status = le16_to_cpu(sts->comp_status);
2287 scsi_status = le16_to_cpu(sts->scsi_status) & SS_MASK;
2288 }
2289
01e0e15c 2290 thread_id = bsg_request->rqst_data.h_vendor.vendor_cmd[1];
a9b6f722
SK		 2291 switch (comp_status) {
2292 case CS_COMPLETE:
2293 if (scsi_status == 0) {
01e0e15c 2294 bsg_reply->reply_payload_rcv_len =
a9b6f722 2295 bsg_job->reply_payload.payload_len;
fabbb8df 2296 vha->qla_stats.input_bytes +=
01e0e15c 2297 bsg_reply->reply_payload_rcv_len;
fabbb8df 2298 vha->qla_stats.input_requests++;
a9b6f722
SK		 2299 rval = EXT_STATUS_OK;
2300 }
2301 goto done;
2302
2303 case CS_DATA_OVERRUN:
2304 ql_dbg(ql_dbg_user, vha, 0x70b1,
5a68a1c2 2305 "Command completed with data overrun thread_id=%d\n",
a9b6f722
SK		 2306 thread_id);
2307 rval = EXT_STATUS_DATA_OVERRUN;
2308 break;
2309
2310 case CS_DATA_UNDERRUN:
2311 ql_dbg(ql_dbg_user, vha, 0x70b2,
5a68a1c2 2312 "Command completed with data underrun thread_id=%d\n",
a9b6f722
SK		 2313 thread_id);
2314 rval = EXT_STATUS_DATA_UNDERRUN;
2315 break;
2316 case CS_BIDIR_RD_OVERRUN:
2317 ql_dbg(ql_dbg_user, vha, 0x70b3,
2318 "Command completed with read data overrun thread_id=%d\n",
2319 thread_id);
2320 rval = EXT_STATUS_DATA_OVERRUN;
2321 break;
2322
2323 case CS_BIDIR_RD_WR_OVERRUN:
2324 ql_dbg(ql_dbg_user, vha, 0x70b4,
2325 "Command completed with read and write data overrun "
2326 "thread_id=%d\n", thread_id);
2327 rval = EXT_STATUS_DATA_OVERRUN;
2328 break;
2329
2330 case CS_BIDIR_RD_OVERRUN_WR_UNDERRUN:
2331 ql_dbg(ql_dbg_user, vha, 0x70b5,
2332 "Command completed with read data over and write data "
2333 "underrun thread_id=%d\n", thread_id);
2334 rval = EXT_STATUS_DATA_OVERRUN;
2335 break;
2336
2337 case CS_BIDIR_RD_UNDERRUN:
2338 ql_dbg(ql_dbg_user, vha, 0x70b6,
5a68a1c2 2339 "Command completed with read data underrun "
a9b6f722
SK		 2340 "thread_id=%d\n", thread_id);
2341 rval = EXT_STATUS_DATA_UNDERRUN;
2342 break;
2343
2344 case CS_BIDIR_RD_UNDERRUN_WR_OVERRUN:
2345 ql_dbg(ql_dbg_user, vha, 0x70b7,
2346 "Command completed with read data under and write data "
2347 "overrun thread_id=%d\n", thread_id);
2348 rval = EXT_STATUS_DATA_UNDERRUN;
2349 break;
2350
2351 case CS_BIDIR_RD_WR_UNDERRUN:
2352 ql_dbg(ql_dbg_user, vha, 0x70b8,
2353 "Command completed with read and write data underrun "
2354 "thread_id=%d\n", thread_id);
2355 rval = EXT_STATUS_DATA_UNDERRUN;
2356 break;
2357
2358 case CS_BIDIR_DMA:
2359 ql_dbg(ql_dbg_user, vha, 0x70b9,
2360 "Command completed with data DMA error thread_id=%d\n",
2361 thread_id);
2362 rval = EXT_STATUS_DMA_ERR;
2363 break;
2364
2365 case CS_TIMEOUT:
2366 ql_dbg(ql_dbg_user, vha, 0x70ba,
2367 "Command completed with timeout thread_id=%d\n",
2368 thread_id);
2369 rval = EXT_STATUS_TIMEOUT;
2370 break;
2371 default:
2372 ql_dbg(ql_dbg_user, vha, 0x70bb,
2373 "Command completed with completion status=0x%x "
2374 "thread_id=%d\n", comp_status, thread_id);
2375 rval = EXT_STATUS_ERR;
2376 break;
2377 }
01e0e15c 2378 bsg_reply->reply_payload_rcv_len = 0;
a9b6f722
SK		 2379
2380done:
2381 /* Return the vendor specific reply to API */
01e0e15c 2382 bsg_reply->reply_data.vendor_reply.vendor_rsp[0] = rval;
a9b6f722
SK		 2383 bsg_job->reply_len = sizeof(struct fc_bsg_reply);
2384 /* Always return DID_OK, bsg will send the vendor specific response
2385 * in this case only */
f7d5182c 2386 sp->done(sp, DID_OK << 16);
a9b6f722
SK		 2387
2388}
2389
1da177e4
LT		 2390/**
2391 * qla2x00_status_entry() - Process a Status IOCB entry.
2db6228d
BVA		 2392 * @vha: SCSI driver HA context
2393 * @rsp: response queue
1da177e4
LT		 2394 * @pkt: Entry pointer
2395 */
2396static void
73208dfd 2397qla2x00_status_entry(scsi_qla_host_t *vha, struct rsp_que *rsp, void *pkt)
1da177e4 2398{
1da177e4 2399 srb_t *sp;
1da177e4
LT		 2400 fc_port_t *fcport;
2401 struct scsi_cmnd *cp;
9a853f71
AV		 2402 sts_entry_t *sts;
2403 struct sts_entry_24xx *sts24;
1da177e4
LT		 2404 uint16_t comp_status;
2405 uint16_t scsi_status;
b7d2280c 2406 uint16_t ox_id;
1da177e4
LT		 2407 uint8_t lscsi_status;
2408 int32_t resid;
5544213b
AV		 2409 uint32_t sense_len, par_sense_len, rsp_info_len, resid_len,
2410 fw_resid_len;
9a853f71 2411 uint8_t *rsp_info, *sense_data;
e315cd28 2412 struct qla_hw_data *ha = vha->hw;
2afa19a9
AC		 2413 uint32_t handle;
2414 uint16_t que;
2415 struct req_que *req;
b7d2280c 2416 int logit = 1;
9ba56b95 2417 int res = 0;
a9b6f722 2418 uint16_t state_flags = 0;
e05fe292 2419 uint16_t retry_delay = 0;
9a853f71
AV		 2420
2421 sts = (sts_entry_t *) pkt;
2422 sts24 = (struct sts_entry_24xx *) pkt;
e428924c 2423 if (IS_FWI2_CAPABLE(ha)) {
9a853f71
AV		 2424 comp_status = le16_to_cpu(sts24->comp_status);
2425 scsi_status = le16_to_cpu(sts24->scsi_status) & SS_MASK;
a9b6f722 2426 state_flags = le16_to_cpu(sts24->state_flags);
9a853f71
AV		 2427 } else {
2428 comp_status = le16_to_cpu(sts->comp_status);
2429 scsi_status = le16_to_cpu(sts->scsi_status) & SS_MASK;
2430 }
2afa19a9
AC		 2431 handle = (uint32_t) LSW(sts->handle);
2432 que = MSW(sts->handle);
2433 req = ha->req_q_map[que];
a9083016 2434
36008cf1
CD		 2435 /* Check for invalid queue pointer */
2436 if (req == NULL ||
2437 que >= find_first_zero_bit(ha->req_qid_map, ha->max_req_queues)) {
2438 ql_dbg(ql_dbg_io, vha, 0x3059,
2439 "Invalid status handle (0x%x): Bad req pointer. req=%p, "
2440 "que=%u.\n", sts->handle, req, que);
2441 return;
2442 }
2443
1da177e4 2444 /* Validate handle. */
c7bc4cae 2445 if (handle < req->num_outstanding_cmds) {
2afa19a9 2446 sp = req->outstanding_cmds[handle];
c7bc4cae
CD		 2447 if (!sp) {
2448 ql_dbg(ql_dbg_io, vha, 0x3075,
2449 "%s(%ld): Already returned command for status handle (0x%x).\n",
2450 __func__, vha->host_no, sts->handle);
2451 return;
2452 }
2453 } else {
cfb0919c 2454 ql_dbg(ql_dbg_io, vha, 0x3017,
c7bc4cae
CD		 2455 "Invalid status handle, out of range (0x%x).\n",
2456 sts->handle);
1da177e4 2457
acd3ce88
CD		 2458 if (!test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags)) {
2459 if (IS_P3P_TYPE(ha))
2460 set_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags);
2461 else
2462 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
2463 qla2xxx_wake_dpc(vha);
2464 }
1da177e4
LT		 2465 return;
2466 }
a9b6f722 2467
c5419e26
QT		 2468 if (sp->cmd_type != TYPE_SRB) {
2469 req->outstanding_cmds[handle] = NULL;
2470 ql_dbg(ql_dbg_io, vha, 0x3015,
2471 "Unknown sp->cmd_type %x %p).\n",
2472 sp->cmd_type, sp);
2473 return;
2474 }
2475
7401bc18
DG		 2476 /* NVME completion. */
2477 if (sp->type == SRB_NVME_CMD) {
60dd6e8e
DT		 2478 req->outstanding_cmds[handle] = NULL;
2479 qla24xx_nvme_iocb_entry(vha, req, pkt, sp);
7401bc18
DG		 2480 return;
2481 }
2482
a9b6f722
SK		 2483 if (unlikely((state_flags & BIT_1) && (sp->type == SRB_BIDI_CMD))) {
2484 qla25xx_process_bidir_status_iocb(vha, pkt, req, handle);
2485 return;
2486 }
2487
faef62d1
AB		 2488 /* Task Management completion. */
2489 if (sp->type == SRB_TM_CMD) {
2490 qla24xx_tm_iocb_entry(vha, req, pkt);
2491 return;
2492 }
2493
a9b6f722
SK		 2494 /* Fast path completion. */
2495 if (comp_status == CS_COMPLETE && scsi_status == 0) {
2496 qla2x00_process_completed_request(vha, req, handle);
2497
2498 return;
2499 }
2500
2501 req->outstanding_cmds[handle] = NULL;
9ba56b95 2502 cp = GET_CMD_SP(sp);
1da177e4 2503 if (cp == NULL) {
cfb0919c 2504 ql_dbg(ql_dbg_io, vha, 0x3018,
7c3df132
SK		 2505 "Command already returned (0x%x/%p).\n",
2506 sts->handle, sp);
1da177e4
LT		 2507
2508 return;
2509 }
2510
8ae6d9c7 2511 lscsi_status = scsi_status & STATUS_MASK;
1da177e4 2512
bdf79621 2513 fcport = sp->fcport;
1da177e4 2514
b7d2280c 2515 ox_id = 0;
5544213b
AV		 2516 sense_len = par_sense_len = rsp_info_len = resid_len =
2517 fw_resid_len = 0;
e428924c 2518 if (IS_FWI2_CAPABLE(ha)) {
0f00a206
LC		 2519 if (scsi_status & SS_SENSE_LEN_VALID)
2520 sense_len = le32_to_cpu(sts24->sense_len);
2521 if (scsi_status & SS_RESPONSE_INFO_LEN_VALID)
2522 rsp_info_len = le32_to_cpu(sts24->rsp_data_len);
2523 if (scsi_status & (SS_RESIDUAL_UNDER | SS_RESIDUAL_OVER))
2524 resid_len = le32_to_cpu(sts24->rsp_residual_count);
2525 if (comp_status == CS_DATA_UNDERRUN)
2526 fw_resid_len = le32_to_cpu(sts24->residual_len);
9a853f71
AV		 2527 rsp_info = sts24->data;
2528 sense_data = sts24->data;
2529 host_to_fcp_swap(sts24->data, sizeof(sts24->data));
b7d2280c 2530 ox_id = le16_to_cpu(sts24->ox_id);
5544213b 2531 par_sense_len = sizeof(sts24->data);
e05fe292 2532 /* Valid values of the retry delay timer are 0x1-0xffef */
3cedc879
AG		 2533 if (sts24->retry_delay > 0 && sts24->retry_delay < 0xfff1) {
2534 retry_delay = sts24->retry_delay & 0x3fff;
2535 ql_dbg(ql_dbg_io, sp->vha, 0x3033,
2536 "%s: scope=%#x retry_delay=%#x\n", __func__,
2537 sts24->retry_delay >> 14, retry_delay);
2538 }
9a853f71 2539 } else {
0f00a206
LC		 2540 if (scsi_status & SS_SENSE_LEN_VALID)
2541 sense_len = le16_to_cpu(sts->req_sense_length);
2542 if (scsi_status & SS_RESPONSE_INFO_LEN_VALID)
2543 rsp_info_len = le16_to_cpu(sts->rsp_info_len);
9a853f71
AV		 2544 resid_len = le32_to_cpu(sts->residual_length);
2545 rsp_info = sts->rsp_info;
2546 sense_data = sts->req_sense_data;
5544213b 2547 par_sense_len = sizeof(sts->req_sense_data);
9a853f71
AV		 2548 }
2549
1da177e4
LT		 2550 /* Check for any FCP transport errors. */
2551 if (scsi_status & SS_RESPONSE_INFO_LEN_VALID) {
9a853f71 2552 /* Sense data lies beyond any FCP RESPONSE data. */
5544213b 2553 if (IS_FWI2_CAPABLE(ha)) {
9a853f71 2554 sense_data += rsp_info_len;
5544213b
AV		 2555 par_sense_len -= rsp_info_len;
2556 }
9a853f71 2557 if (rsp_info_len > 3 && rsp_info[3]) {
5e19ed90 2558 ql_dbg(ql_dbg_io, fcport->vha, 0x3019,
7c3df132
SK		 2559 "FCP I/O protocol failure (0x%x/0x%x).\n",
2560 rsp_info_len, rsp_info[3]);
1da177e4 2561
9ba56b95 2562 res = DID_BUS_BUSY << 16;
b7d2280c 2563 goto out;
1da177e4
LT		 2564 }
2565 }
2566
3e8ce320
AV		 2567 /* Check for overrun. */
2568 if (IS_FWI2_CAPABLE(ha) && comp_status == CS_COMPLETE &&
2569 scsi_status & SS_RESIDUAL_OVER)
2570 comp_status = CS_DATA_OVERRUN;
2571
e05fe292
CD		 2572 /*
2573 * Check retry_delay_timer value if we receive a busy or
2574 * queue full.
2575 */
2576 if (lscsi_status == SAM_STAT_TASK_SET_FULL ||
2577 lscsi_status == SAM_STAT_BUSY)
2578 qla2x00_set_retry_delay_timestamp(fcport, retry_delay);
2579
1da177e4
LT		 2580 /*
2581 * Based on Host and scsi status generate status code for Linux
2582 */
2583 switch (comp_status) {
2584 case CS_COMPLETE:
df7baa50 2585 case CS_QUEUE_FULL:
1da177e4 2586 if (scsi_status == 0) {
9ba56b95 2587 res = DID_OK << 16;
1da177e4
LT		 2588 break;
2589 }
2590 if (scsi_status & (SS_RESIDUAL_UNDER | SS_RESIDUAL_OVER)) {
9a853f71 2591 resid = resid_len;
385d70b4 2592 scsi_set_resid(cp, resid);
0da69df1
AV		 2593
2594 if (!lscsi_status &&
385d70b4 2595 ((unsigned)(scsi_bufflen(cp) - resid) <
0da69df1 2596 cp->underflow)) {
5e19ed90 2597 ql_dbg(ql_dbg_io, fcport->vha, 0x301a,
83548fe2 2598 "Mid-layer underflow detected (0x%x of 0x%x bytes).\n",
7c3df132 2599 resid, scsi_bufflen(cp));
0da69df1 2600
9ba56b95 2601 res = DID_ERROR << 16;
0da69df1
AV		 2602 break;
2603 }
1da177e4 2604 }
9ba56b95 2605 res = DID_OK << 16 | lscsi_status;
1da177e4 2606
df7baa50 2607 if (lscsi_status == SAM_STAT_TASK_SET_FULL) {
5e19ed90 2608 ql_dbg(ql_dbg_io, fcport->vha, 0x301b,
7c3df132 2609 "QUEUE FULL detected.\n");
df7baa50
AV		 2610 break;
2611 }
b7d2280c 2612 logit = 0;
1da177e4
LT		 2613 if (lscsi_status != SS_CHECK_CONDITION)
2614 break;
2615
b80ca4f7 2616 memset(cp->sense_buffer, 0, SCSI_SENSE_BUFFERSIZE);
1da177e4
LT		 2617 if (!(scsi_status & SS_SENSE_LEN_VALID))
2618 break;
2619
5544213b 2620 qla2x00_handle_sense(sp, sense_data, par_sense_len, sense_len,
9ba56b95 2621 rsp, res);
1da177e4
LT		 2622 break;
2623
2624 case CS_DATA_UNDERRUN:
ed17c71b 2625 /* Use F/W calculated residual length. */
0f00a206
LC		 2626 resid = IS_FWI2_CAPABLE(ha) ? fw_resid_len : resid_len;
2627 scsi_set_resid(cp, resid);
2628 if (scsi_status & SS_RESIDUAL_UNDER) {
2629 if (IS_FWI2_CAPABLE(ha) && fw_resid_len != resid_len) {
5e19ed90 2630 ql_dbg(ql_dbg_io, fcport->vha, 0x301d,
83548fe2 2631 "Dropped frame(s) detected (0x%x of 0x%x bytes).\n",
7c3df132 2632 resid, scsi_bufflen(cp));
0f00a206 2633
9ba56b95 2634 res = DID_ERROR << 16 | lscsi_status;
4e85e3d9 2635 goto check_scsi_status;
6acf8190 2636 }
ed17c71b 2637
0f00a206
LC		 2638 if (!lscsi_status &&
2639 ((unsigned)(scsi_bufflen(cp) - resid) <
2640 cp->underflow)) {
5e19ed90 2641 ql_dbg(ql_dbg_io, fcport->vha, 0x301e,
83548fe2 2642 "Mid-layer underflow detected (0x%x of 0x%x bytes).\n",
7c3df132 2643 resid, scsi_bufflen(cp));
e038a1be 2644
9ba56b95 2645 res = DID_ERROR << 16;
0f00a206
LC		 2646 break;
2647 }
4aee5766
GM		 2648 } else if (lscsi_status != SAM_STAT_TASK_SET_FULL &&
2649 lscsi_status != SAM_STAT_BUSY) {
2650 /*
2651 * scsi status of task set and busy are considered to be
2652 * task not completed.
2653 */
2654
5e19ed90 2655 ql_dbg(ql_dbg_io, fcport->vha, 0x301f,
83548fe2
QT		 2656 "Dropped frame(s) detected (0x%x of 0x%x bytes).\n",
2657 resid, scsi_bufflen(cp));
0f00a206 2658
9ba56b95 2659 res = DID_ERROR << 16 | lscsi_status;
0374f55e 2660 goto check_scsi_status;
4aee5766
GM		 2661 } else {
2662 ql_dbg(ql_dbg_io, fcport->vha, 0x3030,
2663 "scsi_status: 0x%x, lscsi_status: 0x%x\n",
2664 scsi_status, lscsi_status);
1da177e4
LT		 2665 }
2666
9ba56b95 2667 res = DID_OK << 16 | lscsi_status;
b7d2280c 2668 logit = 0;
0f00a206 2669
0374f55e 2670check_scsi_status:
1da177e4 2671 /*
fa2a1ce5 2672 * Check to see if SCSI Status is non zero. If so report SCSI
1da177e4
LT		 2673 * Status.
2674 */
2675 if (lscsi_status != 0) {
ffec28a3 2676 if (lscsi_status == SAM_STAT_TASK_SET_FULL) {
5e19ed90 2677 ql_dbg(ql_dbg_io, fcport->vha, 0x3020,
7c3df132 2678 "QUEUE FULL detected.\n");
b7d2280c 2679 logit = 1;
ffec28a3
AV		 2680 break;
2681 }
1da177e4
LT		 2682 if (lscsi_status != SS_CHECK_CONDITION)
2683 break;
2684
b80ca4f7 2685 memset(cp->sense_buffer, 0, SCSI_SENSE_BUFFERSIZE);
1da177e4
LT		 2686 if (!(scsi_status & SS_SENSE_LEN_VALID))
2687 break;
2688
5544213b 2689 qla2x00_handle_sense(sp, sense_data, par_sense_len,
9ba56b95 2690 sense_len, rsp, res);
1da177e4
LT		 2691 }
2692 break;
2693
1da177e4
LT		 2694 case CS_PORT_LOGGED_OUT:
2695 case CS_PORT_CONFIG_CHG:
2696 case CS_PORT_BUSY:
2697 case CS_INCOMPLETE:
2698 case CS_PORT_UNAVAILABLE:
b7d2280c 2699 case CS_TIMEOUT:
ff454b01
CD		 2700 case CS_RESET:
2701
056a4483
MC		 2702 /*
2703 * We are going to have the fc class block the rport
2704 * while we try to recover so instruct the mid layer
2705 * to requeue until the class decides how to handle this.
2706 */
9ba56b95 2707 res = DID_TRANSPORT_DISRUPTED << 16;
b7d2280c
AV		 2708
2709 if (comp_status == CS_TIMEOUT) {
2710 if (IS_FWI2_CAPABLE(ha))
2711 break;
2712 else if ((le16_to_cpu(sts->status_flags) &
2713 SF_LOGOUT_SENT) == 0)
2714 break;
2715 }
2716
726b8548
QT		 2717 if (atomic_read(&fcport->state) == FCS_ONLINE) {
2718 ql_dbg(ql_dbg_disc, fcport->vha, 0x3021,
2719 "Port to be marked lost on fcport=%02x%02x%02x, current "
2720 "port state= %s comp_status %x.\n", fcport->d_id.b.domain,
2721 fcport->d_id.b.area, fcport->d_id.b.al_pa,
2722 port_state_str[atomic_read(&fcport->state)],
2723 comp_status);
2724
e315cd28 2725 qla2x00_mark_device_lost(fcport->vha, fcport, 1, 1);
d8630bb9 2726 qlt_schedule_sess_for_deletion(fcport);
726b8548
QT		 2727 }
2728
1da177e4
LT		 2729 break;
2730
1da177e4 2731 case CS_ABORTED:
9ba56b95 2732 res = DID_RESET << 16;
1da177e4 2733 break;
bad75002
AE		 2734
2735 case CS_DIF_ERROR:
8cb2049c 2736 logit = qla2x00_handle_dif_error(sp, sts24);
fb6e4668 2737 res = cp->result;
bad75002 2738 break;
9e522cd8
AE		 2739
2740 case CS_TRANSPORT:
2741 res = DID_ERROR << 16;
2742
2743 if (!IS_PI_SPLIT_DET_CAPABLE(ha))
2744 break;
2745
2746 if (state_flags & BIT_4)
2747 scmd_printk(KERN_WARNING, cp,
2748 "Unsupported device '%s' found.\n",
2749 cp->device->vendor);
2750 break;
2751
50b81275
GM		 2752 case CS_DMA:
2753 ql_log(ql_log_info, fcport->vha, 0x3022,
2754 "CS_DMA error: 0x%x-0x%x (0x%x) nexus=%ld:%d:%llu portid=%06x oxid=0x%x cdb=%10phN len=0x%x rsp_info=0x%x resid=0x%x fw_resid=0x%x sp=%p cp=%p.\n",
2755 comp_status, scsi_status, res, vha->host_no,
2756 cp->device->id, cp->device->lun, fcport->d_id.b24,
2757 ox_id, cp->cmnd, scsi_bufflen(cp), rsp_info_len,
2758 resid_len, fw_resid_len, sp, cp);
2759 ql_dump_buffer(ql_dbg_tgt + ql_dbg_verbose, vha, 0xe0ee,
2760 pkt, sizeof(*sts24));
2761 res = DID_ERROR << 16;
2762 break;
1da177e4 2763 default:
9ba56b95 2764 res = DID_ERROR << 16;
1da177e4
LT		 2765 break;
2766 }
2767
b7d2280c
AV		 2768out:
2769 if (logit)
5e19ed90 2770 ql_dbg(ql_dbg_io, fcport->vha, 0x3022,
9cb78c16 2771 "FCP command status: 0x%x-0x%x (0x%x) nexus=%ld:%d:%llu "
7b833558 2772 "portid=%02x%02x%02x oxid=0x%x cdb=%10phN len=0x%x "
c7bc4cae 2773 "rsp_info=0x%x resid=0x%x fw_resid=0x%x sp=%p cp=%p.\n",
9ba56b95 2774 comp_status, scsi_status, res, vha->host_no,
cfb0919c
CD		 2775 cp->device->id, cp->device->lun, fcport->d_id.b.domain,
2776 fcport->d_id.b.area, fcport->d_id.b.al_pa, ox_id,
7b833558 2777 cp->cmnd, scsi_bufflen(cp), rsp_info_len,
c7bc4cae 2778 resid_len, fw_resid_len, sp, cp);
b7d2280c 2779
2afa19a9 2780 if (rsp->status_srb == NULL)
25ff6af1 2781 sp->done(sp, res);
1da177e4
LT		 2782}
2783
2784/**
2785 * qla2x00_status_cont_entry() - Process a Status Continuations entry.
2db6228d 2786 * @rsp: response queue
1da177e4
LT		 2787 * @pkt: Entry pointer
2788 *
2789 * Extended sense data.
2790 */
2791static void
2afa19a9 2792qla2x00_status_cont_entry(struct rsp_que *rsp, sts_cont_entry_t *pkt)
1da177e4 2793{
9ba56b95 2794 uint8_t sense_sz = 0;
2afa19a9 2795 struct qla_hw_data *ha = rsp->hw;
7c3df132 2796 struct scsi_qla_host *vha = pci_get_drvdata(ha->pdev);
9ba56b95 2797 srb_t *sp = rsp->status_srb;
1da177e4 2798 struct scsi_cmnd *cp;
9ba56b95
GM		 2799 uint32_t sense_len;
2800 uint8_t *sense_ptr;
1da177e4 2801
9ba56b95
GM		 2802 if (!sp || !GET_CMD_SENSE_LEN(sp))
2803 return;
1da177e4 2804
9ba56b95
GM		 2805 sense_len = GET_CMD_SENSE_LEN(sp);
2806 sense_ptr = GET_CMD_SENSE_PTR(sp);
1da177e4 2807
9ba56b95
GM		 2808 cp = GET_CMD_SP(sp);
2809 if (cp == NULL) {
2810 ql_log(ql_log_warn, vha, 0x3025,
2811 "cmd is NULL: already returned to OS (sp=%p).\n", sp);
1da177e4 2812
9ba56b95
GM		 2813 rsp->status_srb = NULL;
2814 return;
1da177e4 2815 }
1da177e4 2816
9ba56b95
GM		 2817 if (sense_len > sizeof(pkt->data))
2818 sense_sz = sizeof(pkt->data);
2819 else
2820 sense_sz = sense_len;
c4631191 2821
9ba56b95
GM		 2822 /* Move sense data. */
2823 if (IS_FWI2_CAPABLE(ha))
2824 host_to_fcp_swap(pkt->data, sizeof(pkt->data));
2825 memcpy(sense_ptr, pkt->data, sense_sz);
2826 ql_dump_buffer(ql_dbg_io + ql_dbg_buffer, vha, 0x302c,
2827 sense_ptr, sense_sz);
c4631191 2828
9ba56b95
GM		 2829 sense_len -= sense_sz;
2830 sense_ptr += sense_sz;
c4631191 2831
9ba56b95
GM		 2832 SET_CMD_SENSE_PTR(sp, sense_ptr);
2833 SET_CMD_SENSE_LEN(sp, sense_len);
2834
2835 /* Place command on done queue. */
2836 if (sense_len == 0) {
2837 rsp->status_srb = NULL;
25ff6af1 2838 sp->done(sp, cp->result);
c4631191 2839 }
c4631191
GM		 2840}
2841
1da177e4
LT		 2842/**
2843 * qla2x00_error_entry() - Process an error entry.
2db6228d
BVA		 2844 * @vha: SCSI driver HA context
2845 * @rsp: response queue
1da177e4 2846 * @pkt: Entry pointer
c5419e26 2847 * return : 1=allow further error analysis. 0=no additional error analysis.
1da177e4 2848 */
c5419e26 2849static int
73208dfd 2850qla2x00_error_entry(scsi_qla_host_t *vha, struct rsp_que *rsp, sts_entry_t *pkt)
1da177e4
LT		 2851{
2852 srb_t *sp;
e315cd28 2853 struct qla_hw_data *ha = vha->hw;
c4631191 2854 const char func[] = "ERROR-IOCB";
2afa19a9 2855 uint16_t que = MSW(pkt->handle);
a6fe35c0 2856 struct req_que *req = NULL;
9ba56b95 2857 int res = DID_ERROR << 16;
7c3df132 2858
9ba56b95 2859 ql_dbg(ql_dbg_async, vha, 0x502a,
82de802a
QT		 2860 "iocb type %xh with error status %xh, handle %xh, rspq id %d\n",
2861 pkt->entry_type, pkt->entry_status, pkt->handle, rsp->id);
9ba56b95 2862
a6fe35c0
AE		 2863 if (que >= ha->max_req_queues || !ha->req_q_map[que])
2864 goto fatal;
2865
2866 req = ha->req_q_map[que];
2867
9ba56b95
GM		 2868 if (pkt->entry_status & RF_BUSY)
2869 res = DID_BUS_BUSY << 16;
1da177e4 2870
c5419e26
QT		 2871 if ((pkt->handle & ~QLA_TGT_HANDLE_MASK) == QLA_TGT_SKIP_HANDLE)
2872 return 0;
4f060736 2873
c5419e26
QT		 2874 switch (pkt->entry_type) {
2875 case NOTIFY_ACK_TYPE:
2876 case STATUS_TYPE:
2877 case STATUS_CONT_TYPE:
2878 case LOGINOUT_PORT_IOCB_TYPE:
2879 case CT_IOCB_TYPE:
2880 case ELS_IOCB_TYPE:
2881 case ABORT_IOCB_TYPE:
2882 case MBX_IOCB_TYPE:
527b8ae3 2883 default:
c5419e26
QT		 2884 sp = qla2x00_get_sp_from_handle(vha, func, req, pkt);
2885 if (sp) {
2886 sp->done(sp, res);
2887 return 0;
2888 }
2889 break;
2890
2891 case ABTS_RESP_24XX:
2892 case CTIO_TYPE7:
2893 case CTIO_CRC2:
c5419e26 2894 return 1;
1da177e4 2895 }
a6fe35c0
AE		 2896fatal:
2897 ql_log(ql_log_warn, vha, 0x5030,
fd49a540 2898 "Error entry - invalid handle/queue (%04x).\n", que);
c5419e26 2899 return 0;
1da177e4
LT		 2900}
2901
9a853f71
AV		 2902/**
2903 * qla24xx_mbx_completion() - Process mailbox command completions.
2db6228d 2904 * @vha: SCSI driver HA context
9a853f71
AV		 2905 * @mb0: Mailbox0 register
2906 */
2907static void
e315cd28 2908qla24xx_mbx_completion(scsi_qla_host_t *vha, uint16_t mb0)
9a853f71
AV		 2909{
2910 uint16_t cnt;
4fa94f83 2911 uint32_t mboxes;
9a853f71 2912 uint16_t __iomem *wptr;
e315cd28 2913 struct qla_hw_data *ha = vha->hw;
9a853f71
AV		 2914 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
2915
4fa94f83 2916 /* Read all mbox registers? */
c02189e1
BVA		 2917 WARN_ON_ONCE(ha->mbx_count > 32);
2918 mboxes = (1ULL << ha->mbx_count) - 1;
4fa94f83 2919 if (!ha->mcp)
a720101d 2920 ql_dbg(ql_dbg_async, vha, 0x504e, "MBX pointer ERROR.\n");
4fa94f83
AV		 2921 else
2922 mboxes = ha->mcp->in_mb;
2923
9a853f71
AV		 2924 /* Load return mailbox registers. */
2925 ha->flags.mbox_int = 1;
2926 ha->mailbox_out[0] = mb0;
4fa94f83 2927 mboxes >>= 1;
9a853f71
AV		 2928 wptr = (uint16_t __iomem *)&reg->mailbox1;
2929
2930 for (cnt = 1; cnt < ha->mbx_count; cnt++) {
4fa94f83
AV		 2931 if (mboxes & BIT_0)
2932 ha->mailbox_out[cnt] = RD_REG_WORD(wptr);
2933
2934 mboxes >>= 1;
9a853f71
AV		 2935 wptr++;
2936 }
9a853f71
AV		 2937}
2938
4440e46d
AB		 2939static void
2940qla24xx_abort_iocb_entry(scsi_qla_host_t *vha, struct req_que *req,
2941 struct abort_entry_24xx *pkt)
2942{
2943 const char func[] = "ABT_IOCB";
2944 srb_t *sp;
2945 struct srb_iocb *abt;
2946
2947 sp = qla2x00_get_sp_from_handle(vha, func, req, pkt);
2948 if (!sp)
2949 return;
2950
2951 abt = &sp->u.iocb_cmd;
15f30a57 2952 abt->u.abt.comp_status = le16_to_cpu(pkt->nport_handle);
25ff6af1 2953 sp->done(sp, 0);
4440e46d
AB		 2954}
2955
0f7e51f6 2956void qla24xx_nvme_ls4_iocb(struct scsi_qla_host *vha,
2957 struct pt_ls4_request *pkt, struct req_que *req)
e84067d7
DG		 2958{
2959 srb_t *sp;
2960 const char func[] = "LS4_IOCB";
2961 uint16_t comp_status;
2962
2963 sp = qla2x00_get_sp_from_handle(vha, func, req, pkt);
2964 if (!sp)
2965 return;
2966
2967 comp_status = le16_to_cpu(pkt->status);
2968 sp->done(sp, comp_status);
2969}
2970
9a853f71
AV		 2971/**
2972 * qla24xx_process_response_queue() - Process response queue entries.
2db6228d
BVA		 2973 * @vha: SCSI driver HA context
2974 * @rsp: response queue
9a853f71 2975 */
2afa19a9
AC		 2976void qla24xx_process_response_queue(struct scsi_qla_host *vha,
2977 struct rsp_que *rsp)
9a853f71 2978{
9a853f71 2979 struct sts_entry_24xx *pkt;
a9083016 2980 struct qla_hw_data *ha = vha->hw;
9a853f71 2981
ec7193e2 2982 if (!ha->flags.fw_started)
9a853f71
AV		 2983 return;
2984
e326d22a
QT		 2985 if (rsp->qpair->cpuid != smp_processor_id())
2986 qla_cpu_update(rsp->qpair, smp_processor_id());
2987
e315cd28
AC		 2988 while (rsp->ring_ptr->signature != RESPONSE_PROCESSED) {
2989 pkt = (struct sts_entry_24xx *)rsp->ring_ptr;
9a853f71 2990
e315cd28
AC		 2991 rsp->ring_index++;
2992 if (rsp->ring_index == rsp->length) {
2993 rsp->ring_index = 0;
2994 rsp->ring_ptr = rsp->ring;
9a853f71 2995 } else {
e315cd28 2996 rsp->ring_ptr++;
9a853f71
AV		 2997 }
2998
2999 if (pkt->entry_status != 0) {
c5419e26 3000 if (qla2x00_error_entry(vha, rsp, (sts_entry_t *) pkt))
f83adb61 3001 goto process_err;
2d70c103 3002
9a853f71
AV		 3003 ((response_t *)pkt)->signature = RESPONSE_PROCESSED;
3004 wmb();
3005 continue;
3006 }
f83adb61 3007process_err:
9a853f71
AV		 3008
3009 switch (pkt->entry_type) {
3010 case STATUS_TYPE:
73208dfd 3011 qla2x00_status_entry(vha, rsp, pkt);
9a853f71
AV		 3012 break;
3013 case STATUS_CONT_TYPE:
2afa19a9 3014 qla2x00_status_cont_entry(rsp, (sts_cont_entry_t *)pkt);
9a853f71 3015 break;
2c3dfe3f 3016 case VP_RPT_ID_IOCB_TYPE:
e315cd28 3017 qla24xx_report_id_acquisition(vha,
2c3dfe3f
SJ		 3018 (struct vp_rpt_id_entry_24xx *)pkt);
3019 break;
ac280b67
AV		 3020 case LOGINOUT_PORT_IOCB_TYPE:
3021 qla24xx_logio_entry(vha, rsp->req,
3022 (struct logio_entry_24xx *)pkt);
3023 break;
f83adb61 3024 case CT_IOCB_TYPE:
9a069e19 3025 qla24xx_els_ct_entry(vha, rsp->req, pkt, CT_IOCB_TYPE);
9a069e19 3026 break;
f83adb61 3027 case ELS_IOCB_TYPE:
9a069e19
GM		 3028 qla24xx_els_ct_entry(vha, rsp->req, pkt, ELS_IOCB_TYPE);
3029 break;
2d70c103 3030 case ABTS_RECV_24XX:
ecc89f25
JC		 3031 if (IS_QLA83XX(ha) || IS_QLA27XX(ha) ||
3032 IS_QLA28XX(ha)) {
2f424b9b 3033 /* ensure that the ATIO queue is empty */
82de802a
QT		 3034 qlt_handle_abts_recv(vha, rsp,
3035 (response_t *)pkt);
2f424b9b
QT		 3036 break;
3037 } else {
2f424b9b
QT		 3038 qlt_24xx_process_atio_queue(vha, 1);
3039 }
81881861 3040 /* fall through */
2d70c103
NB		 3041 case ABTS_RESP_24XX:
3042 case CTIO_TYPE7:
f83adb61 3043 case CTIO_CRC2:
82de802a 3044 qlt_response_pkt_all_vps(vha, rsp, (response_t *)pkt);
2d70c103 3045 break;
e84067d7
DG		 3046 case PT_LS4_REQUEST:
3047 qla24xx_nvme_ls4_iocb(vha, (struct pt_ls4_request *)pkt,
3048 rsp->req);
3049 break;
726b8548
QT		 3050 case NOTIFY_ACK_TYPE:
3051 if (pkt->handle == QLA_TGT_SKIP_HANDLE)
82de802a
QT		 3052 qlt_response_pkt_all_vps(vha, rsp,
3053 (response_t *)pkt);
726b8548
QT		 3054 else
3055 qla24xxx_nack_iocb_entry(vha, rsp->req,
3056 (struct nack_to_isp *)pkt);
3057 break;
54883291
SK		 3058 case MARKER_TYPE:
3059 /* Do nothing in this case, this check is to prevent it
3060 * from falling into default case
3061 */
3062 break;
4440e46d
AB		 3063 case ABORT_IOCB_TYPE:
3064 qla24xx_abort_iocb_entry(vha, rsp->req,
3065 (struct abort_entry_24xx *)pkt);
3066 break;
726b8548
QT		 3067 case MBX_IOCB_TYPE:
3068 qla24xx_mbx_iocb_entry(vha, rsp->req,
3069 (struct mbx_24xx_entry *)pkt);
3070 break;
2853192e
QT		 3071 case VP_CTRL_IOCB_TYPE:
3072 qla_ctrlvp_completed(vha, rsp->req,
3073 (struct vp_ctrl_entry_24xx *)pkt);
3074 break;
9a853f71
AV		 3075 default:
3076 /* Type Not Supported. */
7c3df132
SK		 3077 ql_dbg(ql_dbg_async, vha, 0x5042,
3078 "Received unknown response pkt type %x "
9a853f71 3079 "entry status=%x.\n",
7c3df132 3080 pkt->entry_type, pkt->entry_status);
9a853f71
AV		 3081 break;
3082 }
3083 ((response_t *)pkt)->signature = RESPONSE_PROCESSED;
3084 wmb();
3085 }
3086
3087 /* Adjust ring index */
7ec0effd 3088 if (IS_P3P_TYPE(ha)) {
a9083016 3089 struct device_reg_82xx __iomem *reg = &ha->iobase->isp82;
bd432bb5 3090
a9083016 3091 WRT_REG_DWORD(&reg->rsp_q_out[0], rsp->ring_index);
726b8548 3092 } else {
a9083016 3093 WRT_REG_DWORD(rsp->rsp_q_out, rsp->ring_index);
726b8548 3094 }
9a853f71
AV		 3095}
3096
05236a05 3097static void
e315cd28 3098qla2xxx_check_risc_status(scsi_qla_host_t *vha)
05236a05
AV		 3099{
3100 int rval;
3101 uint32_t cnt;
e315cd28 3102 struct qla_hw_data *ha = vha->hw;
05236a05
AV		 3103 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
3104
f73cb695 3105 if (!IS_QLA25XX(ha) && !IS_QLA81XX(ha) && !IS_QLA83XX(ha) &&
ecc89f25 3106 !IS_QLA27XX(ha) && !IS_QLA28XX(ha))
05236a05
AV		 3107 return;
3108
3109 rval = QLA_SUCCESS;
3110 WRT_REG_DWORD(&reg->iobase_addr, 0x7C00);
3111 RD_REG_DWORD(&reg->iobase_addr);
3112 WRT_REG_DWORD(&reg->iobase_window, 0x0001);
3113 for (cnt = 10000; (RD_REG_DWORD(&reg->iobase_window) & BIT_0) == 0 &&
3114 rval == QLA_SUCCESS; cnt--) {
3115 if (cnt) {
3116 WRT_REG_DWORD(&reg->iobase_window, 0x0001);
3117 udelay(10);
3118 } else
3119 rval = QLA_FUNCTION_TIMEOUT;
3120 }
3121 if (rval == QLA_SUCCESS)
3122 goto next_test;
3123
b2ec76c5 3124 rval = QLA_SUCCESS;
05236a05
AV		 3125 WRT_REG_DWORD(&reg->iobase_window, 0x0003);
3126 for (cnt = 100; (RD_REG_DWORD(&reg->iobase_window) & BIT_0) == 0 &&
3127 rval == QLA_SUCCESS; cnt--) {
3128 if (cnt) {
3129 WRT_REG_DWORD(&reg->iobase_window, 0x0003);
3130 udelay(10);
3131 } else
3132 rval = QLA_FUNCTION_TIMEOUT;
3133 }
3134 if (rval != QLA_SUCCESS)
3135 goto done;
3136
3137next_test:
3138 if (RD_REG_DWORD(&reg->iobase_c8) & BIT_3)
7c3df132
SK		 3139 ql_log(ql_log_info, vha, 0x504c,
3140 "Additional code -- 0x55AA.\n");
05236a05
AV		 3141
3142done:
3143 WRT_REG_DWORD(&reg->iobase_window, 0x0000);
3144 RD_REG_DWORD(&reg->iobase_window);
3145}
3146
9a853f71 3147/**
6246b8a1 3148 * qla24xx_intr_handler() - Process interrupts for the ISP23xx and ISP24xx.
807eb907 3149 * @irq: interrupt number
9a853f71 3150 * @dev_id: SCSI driver HA context
9a853f71
AV		 3151 *
3152 * Called by system whenever the host adapter generates an interrupt.
3153 *
3154 * Returns handled flag.
3155 */
3156irqreturn_t
7d12e780 3157qla24xx_intr_handler(int irq, void *dev_id)
9a853f71 3158{
e315cd28
AC		 3159 scsi_qla_host_t *vha;
3160 struct qla_hw_data *ha;
9a853f71
AV		 3161 struct device_reg_24xx __iomem *reg;
3162 int status;
9a853f71
AV		 3163 unsigned long iter;
3164 uint32_t stat;
3165 uint32_t hccr;
7d613ac6 3166 uint16_t mb[8];
e315cd28 3167 struct rsp_que *rsp;
43fac4d9 3168 unsigned long flags;
1073daa4 3169 bool process_atio = false;
9a853f71 3170
e315cd28
AC		 3171 rsp = (struct rsp_que *) dev_id;
3172 if (!rsp) {
3256b435
CD		 3173 ql_log(ql_log_info, NULL, 0x5059,
3174 "%s: NULL response queue pointer.\n", __func__);
9a853f71
AV		 3175 return IRQ_NONE;
3176 }
3177
e315cd28 3178 ha = rsp->hw;
9a853f71
AV		 3179 reg = &ha->iobase->isp24;
3180 status = 0;
3181
85880801
AV		 3182 if (unlikely(pci_channel_offline(ha->pdev)))
3183 return IRQ_HANDLED;
3184
43fac4d9 3185 spin_lock_irqsave(&ha->hardware_lock, flags);
2afa19a9 3186 vha = pci_get_drvdata(ha->pdev);
9a853f71
AV		 3187 for (iter = 50; iter--; ) {
3188 stat = RD_REG_DWORD(&reg->host_status);
c821e0d5 3189 if (qla2x00_check_reg32_for_disconnect(vha, stat))
f3ddac19 3190 break;
9a853f71 3191 if (stat & HSRX_RISC_PAUSED) {
85880801 3192 if (unlikely(pci_channel_offline(ha->pdev)))
14e660e6
SJ		 3193 break;
3194
9a853f71
AV		 3195 hccr = RD_REG_DWORD(&reg->hccr);
3196
7c3df132
SK		 3197 ql_log(ql_log_warn, vha, 0x504b,
3198 "RISC paused -- HCCR=%x, Dumping firmware.\n",
3199 hccr);
05236a05 3200
e315cd28 3201 qla2xxx_check_risc_status(vha);
05236a05 3202
e315cd28
AC		 3203 ha->isp_ops->fw_dump(vha, 1);
3204 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
9a853f71
AV		 3205 break;
3206 } else if ((stat & HSRX_RISC_INT) == 0)
3207 break;
3208
3209 switch (stat & 0xff) {
fafbda9f
AE		 3210 case INTR_ROM_MB_SUCCESS:
3211 case INTR_ROM_MB_FAILED:
3212 case INTR_MB_SUCCESS:
3213 case INTR_MB_FAILED:
e315cd28 3214 qla24xx_mbx_completion(vha, MSW(stat));
9a853f71
AV		 3215 status |= MBX_INTERRUPT;
3216
3217 break;
fafbda9f 3218 case INTR_ASYNC_EVENT:
9a853f71
AV		 3219 mb[0] = MSW(stat);
3220 mb[1] = RD_REG_WORD(&reg->mailbox1);
3221 mb[2] = RD_REG_WORD(&reg->mailbox2);
3222 mb[3] = RD_REG_WORD(&reg->mailbox3);
73208dfd 3223 qla2x00_async_event(vha, rsp, mb);
9a853f71 3224 break;
fafbda9f
AE		 3225 case INTR_RSP_QUE_UPDATE:
3226 case INTR_RSP_QUE_UPDATE_83XX:
2afa19a9 3227 qla24xx_process_response_queue(vha, rsp);
9a853f71 3228 break;
c9558869 3229 case INTR_ATIO_QUE_UPDATE_27XX:
1073daa4
QT		 3230 case INTR_ATIO_QUE_UPDATE:
3231 process_atio = true;
2d70c103 3232 break;
1073daa4
QT		 3233 case INTR_ATIO_RSP_QUE_UPDATE:
3234 process_atio = true;
2d70c103
NB		 3235 qla24xx_process_response_queue(vha, rsp);
3236 break;
9a853f71 3237 default:
7c3df132
SK		 3238 ql_dbg(ql_dbg_async, vha, 0x504f,
3239 "Unrecognized interrupt type (%d).\n", stat * 0xff);
9a853f71
AV		 3240 break;
3241 }
3242 WRT_REG_DWORD(&reg->hccr, HCCRX_CLR_RISC_INT);
3243 RD_REG_DWORD_RELAXED(&reg->hccr);
cb860bbd
GM		 3244 if (unlikely(IS_QLA83XX(ha) && (ha->pdev->revision == 1)))
3245 ndelay(3500);
9a853f71 3246 }
36439832 3247 qla2x00_handle_mbx_completion(ha, status);
43fac4d9 3248 spin_unlock_irqrestore(&ha->hardware_lock, flags);
9a853f71 3249
1073daa4
QT		 3250 if (process_atio) {
3251 spin_lock_irqsave(&ha->tgt.atio_lock, flags);
3252 qlt_24xx_process_atio_queue(vha, 0);
3253 spin_unlock_irqrestore(&ha->tgt.atio_lock, flags);
3254 }
3255
9a853f71
AV		 3256 return IRQ_HANDLED;
3257}
3258
a8488abe
AV		 3259static irqreturn_t
3260qla24xx_msix_rsp_q(int irq, void *dev_id)
3261{
e315cd28
AC		 3262 struct qla_hw_data *ha;
3263 struct rsp_que *rsp;
a8488abe 3264 struct device_reg_24xx __iomem *reg;
2afa19a9 3265 struct scsi_qla_host *vha;
0f19bc68 3266 unsigned long flags;
a8488abe 3267
e315cd28
AC		 3268 rsp = (struct rsp_que *) dev_id;
3269 if (!rsp) {
3256b435
CD		 3270 ql_log(ql_log_info, NULL, 0x505a,
3271 "%s: NULL response queue pointer.\n", __func__);
e315cd28
AC		 3272 return IRQ_NONE;
3273 }
3274 ha = rsp->hw;
a8488abe
AV		 3275 reg = &ha->iobase->isp24;
3276
0f19bc68 3277 spin_lock_irqsave(&ha->hardware_lock, flags);
a8488abe 3278
a67093d4 3279 vha = pci_get_drvdata(ha->pdev);
2afa19a9 3280 qla24xx_process_response_queue(vha, rsp);
3155754a 3281 if (!ha->flags.disable_msix_handshake) {
eb94114b
AC		 3282 WRT_REG_DWORD(&reg->hccr, HCCRX_CLR_RISC_INT);
3283 RD_REG_DWORD_RELAXED(&reg->hccr);
3284 }
0f19bc68 3285 spin_unlock_irqrestore(&ha->hardware_lock, flags);
a8488abe
AV		 3286
3287 return IRQ_HANDLED;
3288}
3289
3290static irqreturn_t
3291qla24xx_msix_default(int irq, void *dev_id)
3292{
e315cd28
AC		 3293 scsi_qla_host_t *vha;
3294 struct qla_hw_data *ha;
3295 struct rsp_que *rsp;
a8488abe
AV		 3296 struct device_reg_24xx __iomem *reg;
3297 int status;
a8488abe
AV		 3298 uint32_t stat;
3299 uint32_t hccr;
7d613ac6 3300 uint16_t mb[8];
0f19bc68 3301 unsigned long flags;
1073daa4 3302 bool process_atio = false;
a8488abe 3303
e315cd28
AC		 3304 rsp = (struct rsp_que *) dev_id;
3305 if (!rsp) {
3256b435
CD		 3306 ql_log(ql_log_info, NULL, 0x505c,
3307 "%s: NULL response queue pointer.\n", __func__);
e315cd28
AC		 3308 return IRQ_NONE;
3309 }
3310 ha = rsp->hw;
a8488abe
AV		 3311 reg = &ha->iobase->isp24;
3312 status = 0;
3313
0f19bc68 3314 spin_lock_irqsave(&ha->hardware_lock, flags);
2afa19a9 3315 vha = pci_get_drvdata(ha->pdev);
87f27015 3316 do {
a8488abe 3317 stat = RD_REG_DWORD(&reg->host_status);
c821e0d5 3318 if (qla2x00_check_reg32_for_disconnect(vha, stat))
f3ddac19 3319 break;
a8488abe 3320 if (stat & HSRX_RISC_PAUSED) {
85880801 3321 if (unlikely(pci_channel_offline(ha->pdev)))
14e660e6
SJ		 3322 break;
3323
a8488abe
AV		 3324 hccr = RD_REG_DWORD(&reg->hccr);
3325
7c3df132
SK		 3326 ql_log(ql_log_info, vha, 0x5050,
3327 "RISC paused -- HCCR=%x, Dumping firmware.\n",
3328 hccr);
05236a05 3329
e315cd28 3330 qla2xxx_check_risc_status(vha);
05236a05 3331
e315cd28
AC		 3332 ha->isp_ops->fw_dump(vha, 1);
3333 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
a8488abe
AV		 3334 break;
3335 } else if ((stat & HSRX_RISC_INT) == 0)
3336 break;
3337
3338 switch (stat & 0xff) {
fafbda9f
AE		 3339 case INTR_ROM_MB_SUCCESS:
3340 case INTR_ROM_MB_FAILED:
3341 case INTR_MB_SUCCESS:
3342 case INTR_MB_FAILED:
e315cd28 3343 qla24xx_mbx_completion(vha, MSW(stat));
a8488abe
AV		 3344 status |= MBX_INTERRUPT;
3345
3346 break;
fafbda9f 3347 case INTR_ASYNC_EVENT:
a8488abe
AV		 3348 mb[0] = MSW(stat);
3349 mb[1] = RD_REG_WORD(&reg->mailbox1);
3350 mb[2] = RD_REG_WORD(&reg->mailbox2);
3351 mb[3] = RD_REG_WORD(&reg->mailbox3);
73208dfd 3352 qla2x00_async_event(vha, rsp, mb);
a8488abe 3353 break;
fafbda9f
AE		 3354 case INTR_RSP_QUE_UPDATE:
3355 case INTR_RSP_QUE_UPDATE_83XX:
2afa19a9 3356 qla24xx_process_response_queue(vha, rsp);
a8488abe 3357 break;
c9558869 3358 case INTR_ATIO_QUE_UPDATE_27XX:
1073daa4
QT		 3359 case INTR_ATIO_QUE_UPDATE:
3360 process_atio = true;
2d70c103 3361 break;
1073daa4
QT		 3362 case INTR_ATIO_RSP_QUE_UPDATE:
3363 process_atio = true;
2d70c103
NB		 3364 qla24xx_process_response_queue(vha, rsp);
3365 break;
a8488abe 3366 default:
7c3df132
SK		 3367 ql_dbg(ql_dbg_async, vha, 0x5051,
3368 "Unrecognized interrupt type (%d).\n", stat & 0xff);
a8488abe
AV		 3369 break;
3370 }
3371 WRT_REG_DWORD(&reg->hccr, HCCRX_CLR_RISC_INT);
87f27015 3372 } while (0);
36439832 3373 qla2x00_handle_mbx_completion(ha, status);
0f19bc68 3374 spin_unlock_irqrestore(&ha->hardware_lock, flags);
a8488abe 3375
1073daa4
QT		 3376 if (process_atio) {
3377 spin_lock_irqsave(&ha->tgt.atio_lock, flags);
3378 qlt_24xx_process_atio_queue(vha, 0);
3379 spin_unlock_irqrestore(&ha->tgt.atio_lock, flags);
3380 }
3381
a8488abe
AV		 3382 return IRQ_HANDLED;
3383}
3384
d7459527
MH		 3385irqreturn_t
3386qla2xxx_msix_rsp_q(int irq, void *dev_id)
3387{
3388 struct qla_hw_data *ha;
3389 struct qla_qpair *qpair;
3390 struct device_reg_24xx __iomem *reg;
3391 unsigned long flags;
3392
3393 qpair = dev_id;
3394 if (!qpair) {
3395 ql_log(ql_log_info, NULL, 0x505b,
3396 "%s: NULL response queue pointer.\n", __func__);
3397 return IRQ_NONE;
3398 }
3399 ha = qpair->hw;
3400
3401 /* Clear the interrupt, if enabled, for this response queue */
3402 if (unlikely(!ha->flags.disable_msix_handshake)) {
3403 reg = &ha->iobase->isp24;
3404 spin_lock_irqsave(&ha->hardware_lock, flags);
3405 WRT_REG_DWORD(&reg->hccr, HCCRX_CLR_RISC_INT);
3406 spin_unlock_irqrestore(&ha->hardware_lock, flags);
3407 }
3408
3409 queue_work(ha->wq, &qpair->q_work);
3410
3411 return IRQ_HANDLED;
3412}
3413
a8488abe
AV		 3414/* Interrupt handling helpers. */
3415
3416struct qla_init_msix_entry {
a8488abe 3417 const char *name;
476834c2 3418 irq_handler_t handler;
a8488abe
AV		 3419};
3420
44a8f954 3421static const struct qla_init_msix_entry msix_entries[] = {
e326d22a
QT		 3422 { "default", qla24xx_msix_default },
3423 { "rsp_q", qla24xx_msix_rsp_q },
3424 { "atio_q", qla83xx_msix_atio_q },
3425 { "qpair_multiq", qla2xxx_msix_rsp_q },
a8488abe
AV		 3426};
3427
44a8f954 3428static const struct qla_init_msix_entry qla82xx_msix_entries[] = {
a9083016
GM		 3429 { "qla2xxx (default)", qla82xx_msix_default },
3430 { "qla2xxx (rsp_q)", qla82xx_msix_rsp_q },
3431};
3432
a8488abe 3433static int
73208dfd 3434qla24xx_enable_msix(struct qla_hw_data *ha, struct rsp_que *rsp)
a8488abe
AV		 3435{
3436 int i, ret;
a8488abe 3437 struct qla_msix_entry *qentry;
7c3df132 3438 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev);
67f2db87 3439 int min_vecs = QLA_BASE_VECTORS;
17e5fc58
CH		 3440 struct irq_affinity desc = {
3441 .pre_vectors = QLA_BASE_VECTORS,
3442 };
3443
c9558869
HM		 3444 if (QLA_TGT_MODE_ENABLED() && (ql2xenablemsix != 0) &&
3445 IS_ATIO_MSIX_CAPABLE(ha)) {
17e5fc58 3446 desc.pre_vectors++;
67f2db87
MH		 3447 min_vecs++;
3448 }
17e5fc58 3449
f3e02695 3450 if (USER_CTRL_IRQ(ha) || !ha->mqiobase) {
09620eeb
QT		 3451 /* user wants to control IRQ setting for target mode */
3452 ret = pci_alloc_irq_vectors(ha->pdev, min_vecs,
3453 ha->msix_count, PCI_IRQ_MSIX);
3454 } else
3455 ret = pci_alloc_irq_vectors_affinity(ha->pdev, min_vecs,
3456 ha->msix_count, PCI_IRQ_MSIX | PCI_IRQ_AFFINITY,
3457 &desc);
73208dfd 3458
84e32a06
AG		 3459 if (ret < 0) {
3460 ql_log(ql_log_fatal, vha, 0x00c7,
3461 "MSI-X: Failed to enable support, "
3462 "giving up -- %d/%d.\n",
3463 ha->msix_count, ret);
3464 goto msix_out;
3465 } else if (ret < ha->msix_count) {
7c3df132
SK		 3466 ql_log(ql_log_warn, vha, 0x00c6,
3467 "MSI-X: Failed to enable support "
d7459527
MH		 3468 "with %d vectors, using %d vectors.\n",
3469 ha->msix_count, ret);
cb43285f 3470 ha->msix_count = ret;
d7459527 3471 /* Recalculate queue values */
c38d1baf 3472 if (ha->mqiobase && (ql2xmqsupport || ql2xnvmeenable)) {
d7459527
MH		 3473 ha->max_req_queues = ha->msix_count - 1;
3474
3475 /* ATIOQ needs 1 vector. That's 1 less QPair */
3476 if (QLA_TGT_MODE_ENABLED())
3477 ha->max_req_queues--;
3478
3479 ha->max_rsp_queues = ha->max_req_queues;
3480
3481 ha->max_qpairs = ha->max_req_queues - 1;
3482 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0190,
3483 "Adjusted Max no of queues pairs: %d.\n", ha->max_qpairs);
3484 }
73208dfd 3485 }
f0783d43 3486 vha->irq_offset = desc.pre_vectors;
6396bb22
KC		 3487 ha->msix_entries = kcalloc(ha->msix_count,
3488 sizeof(struct qla_msix_entry),
3489 GFP_KERNEL);
73208dfd 3490 if (!ha->msix_entries) {
7c3df132
SK		 3491 ql_log(ql_log_fatal, vha, 0x00c8,
3492 "Failed to allocate memory for ha->msix_entries.\n");
73208dfd 3493 ret = -ENOMEM;
a8488abe
AV		 3494 goto msix_out;
3495 }
3496 ha->flags.msix_enabled = 1;
3497
73208dfd
AC		 3498 for (i = 0; i < ha->msix_count; i++) {
3499 qentry = &ha->msix_entries[i];
4fa18345
MH		 3500 qentry->vector = pci_irq_vector(ha->pdev, i);
3501 qentry->entry = i;
a8488abe 3502 qentry->have_irq = 0;
d7459527 3503 qentry->in_use = 0;
4fa18345 3504 qentry->handle = NULL;
a8488abe
AV		 3505 }
3506
2afa19a9 3507 /* Enable MSI-X vectors for the base queue */
17e5fc58 3508 for (i = 0; i < QLA_BASE_VECTORS; i++) {
2afa19a9 3509 qentry = &ha->msix_entries[i];
4fa18345 3510 qentry->handle = rsp;
ef8d1d51 3511 rsp->msix = qentry;
d7459527 3512 scnprintf(qentry->name, sizeof(qentry->name),
e326d22a 3513 "qla2xxx%lu_%s", vha->host_no, msix_entries[i].name);
f324777e 3514 if (IS_P3P_TYPE(ha))
a9083016
GM		 3515 ret = request_irq(qentry->vector,
3516 qla82xx_msix_entries[i].handler,
3517 0, qla82xx_msix_entries[i].name, rsp);
f324777e 3518 else
a9083016
GM		 3519 ret = request_irq(qentry->vector,
3520 msix_entries[i].handler,
e326d22a 3521 0, qentry->name, rsp);
f324777e
CD		 3522 if (ret)
3523 goto msix_register_fail;
3524 qentry->have_irq = 1;
093df737 3525 qentry->in_use = 1;
f324777e
CD		 3526 }
3527
3528 /*
3529 * If target mode is enable, also request the vector for the ATIO
3530 * queue.
3531 */
c9558869
HM		 3532 if (QLA_TGT_MODE_ENABLED() && (ql2xenablemsix != 0) &&
3533 IS_ATIO_MSIX_CAPABLE(ha)) {
093df737 3534 qentry = &ha->msix_entries[QLA_ATIO_VECTOR];
ef8d1d51 3535 rsp->msix = qentry;
d7459527
MH		 3536 qentry->handle = rsp;
3537 scnprintf(qentry->name, sizeof(qentry->name),
e326d22a
QT		 3538 "qla2xxx%lu_%s", vha->host_no,
3539 msix_entries[QLA_ATIO_VECTOR].name);
093df737 3540 qentry->in_use = 1;
f324777e 3541 ret = request_irq(qentry->vector,
093df737 3542 msix_entries[QLA_ATIO_VECTOR].handler,
e326d22a 3543 0, qentry->name, rsp);
2afa19a9 3544 qentry->have_irq = 1;
73208dfd 3545 }
73208dfd 3546
f324777e
CD		 3547msix_register_fail:
3548 if (ret) {
3549 ql_log(ql_log_fatal, vha, 0x00cb,
3550 "MSI-X: unable to register handler -- %x/%d.\n",
3551 qentry->vector, ret);
4fa18345 3552 qla2x00_free_irqs(vha);
f324777e
CD		 3553 ha->mqenable = 0;
3554 goto msix_out;
3555 }
3556
73208dfd 3557 /* Enable MSI-X vector for response queue update for queue 0 */
ecc89f25 3558 if (IS_QLA83XX(ha) || IS_QLA27XX(ha) || IS_QLA28XX(ha)) {
6246b8a1 3559 if (ha->msixbase && ha->mqiobase &&
d7459527
MH		 3560 (ha->max_rsp_queues > 1 || ha->max_req_queues > 1 ||
3561 ql2xmqsupport))
6246b8a1
GM		 3562 ha->mqenable = 1;
3563 } else
d7459527
MH		 3564 if (ha->mqiobase &&
3565 (ha->max_rsp_queues > 1 || ha->max_req_queues > 1 ||
3566 ql2xmqsupport))
6246b8a1 3567 ha->mqenable = 1;
7c3df132
SK		 3568 ql_dbg(ql_dbg_multiq, vha, 0xc005,
3569 "mqiobase=%p, max_rsp_queues=%d, max_req_queues=%d.\n",
3570 ha->mqiobase, ha->max_rsp_queues, ha->max_req_queues);
3571 ql_dbg(ql_dbg_init, vha, 0x0055,
3572 "mqiobase=%p, max_rsp_queues=%d, max_req_queues=%d.\n",
3573 ha->mqiobase, ha->max_rsp_queues, ha->max_req_queues);
73208dfd 3574
a8488abe
AV		 3575msix_out:
3576 return ret;
3577}
3578
3579int
73208dfd 3580qla2x00_request_irqs(struct qla_hw_data *ha, struct rsp_que *rsp)
a8488abe 3581{
7fa3e239 3582 int ret = QLA_FUNCTION_FAILED;
f73cb695 3583 device_reg_t *reg = ha->iobase;
7c3df132 3584 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev);
a8488abe
AV		 3585
3586 /* If possible, enable MSI-X. */
e7240af5
HM		 3587 if (ql2xenablemsix == 0 || (!IS_QLA2432(ha) && !IS_QLA2532(ha) &&
3588 !IS_QLA8432(ha) && !IS_CNA_CAPABLE(ha) && !IS_QLA2031(ha) &&
ecc89f25 3589 !IS_QLAFX00(ha) && !IS_QLA27XX(ha) && !IS_QLA28XX(ha)))
6377a7ae
BH		 3590 goto skip_msi;
3591
e7240af5
HM		 3592 if (ql2xenablemsix == 2)
3593 goto skip_msix;
3594
6377a7ae
BH		 3595 if (ha->pdev->subsystem_vendor == PCI_VENDOR_ID_HP &&
3596 (ha->pdev->subsystem_device == 0x7040 ||
3597 ha->pdev->subsystem_device == 0x7041 ||
3598 ha->pdev->subsystem_device == 0x1705)) {
7c3df132
SK		 3599 ql_log(ql_log_warn, vha, 0x0034,
3600 "MSI-X: Unsupported ISP 2432 SSVID/SSDID (0x%X,0x%X).\n",
6377a7ae 3601 ha->pdev->subsystem_vendor,
7c3df132 3602 ha->pdev->subsystem_device);
6377a7ae
BH		 3603 goto skip_msi;
3604 }
a8488abe 3605
42cd4f5d 3606 if (IS_QLA2432(ha) && (ha->pdev->revision < QLA_MSIX_CHIP_REV_24XX)) {
7c3df132
SK		 3607 ql_log(ql_log_warn, vha, 0x0035,
3608 "MSI-X; Unsupported ISP2432 (0x%X, 0x%X).\n",
42cd4f5d 3609 ha->pdev->revision, QLA_MSIX_CHIP_REV_24XX);
a8488abe
AV		 3610 goto skip_msix;
3611 }
3612
73208dfd 3613 ret = qla24xx_enable_msix(ha, rsp);
a8488abe 3614 if (!ret) {
7c3df132
SK		 3615 ql_dbg(ql_dbg_init, vha, 0x0036,
3616 "MSI-X: Enabled (0x%X, 0x%X).\n",
3617 ha->chip_revision, ha->fw_attributes);
963b0fdd 3618 goto clear_risc_ints;
a8488abe 3619 }
7fa3e239 3620
a8488abe 3621skip_msix:
cbedb601 3622
7fa3e239
SC		 3623 ql_log(ql_log_info, vha, 0x0037,
3624 "Falling back-to MSI mode -%d.\n", ret);
3625
3a03eb79 3626 if (!IS_QLA24XX(ha) && !IS_QLA2532(ha) && !IS_QLA8432(ha) &&
f73cb695 3627 !IS_QLA8001(ha) && !IS_P3P_TYPE(ha) && !IS_QLAFX00(ha) &&
ecc89f25 3628 !IS_QLA27XX(ha) && !IS_QLA28XX(ha))
cbedb601
AV		 3629 goto skip_msi;
3630
4fa18345 3631 ret = pci_alloc_irq_vectors(ha->pdev, 1, 1, PCI_IRQ_MSI);
cbedb601 3632 if (!ret) {
7c3df132
SK		 3633 ql_dbg(ql_dbg_init, vha, 0x0038,
3634 "MSI: Enabled.\n");
cbedb601 3635 ha->flags.msi_enabled = 1;
a9083016 3636 } else
7c3df132 3637 ql_log(ql_log_warn, vha, 0x0039,
7fa3e239
SC		 3638 "Falling back-to INTa mode -- %d.\n", ret);
3639skip_msi:
a033b655
GM		 3640
3641 /* Skip INTx on ISP82xx. */
3642 if (!ha->flags.msi_enabled && IS_QLA82XX(ha))
3643 return QLA_FUNCTION_FAILED;
3644
fd34f556 3645 ret = request_irq(ha->pdev->irq, ha->isp_ops->intr_handler,
7992abfc
MH		 3646 ha->flags.msi_enabled ? 0 : IRQF_SHARED,
3647 QLA2XXX_DRIVER_NAME, rsp);
963b0fdd 3648 if (ret) {
7c3df132 3649 ql_log(ql_log_warn, vha, 0x003a,
a8488abe
AV		 3650 "Failed to reserve interrupt %d already in use.\n",
3651 ha->pdev->irq);
963b0fdd 3652 goto fail;
8ae6d9c7 3653 } else if (!ha->flags.msi_enabled) {
68d91cbd
SK		 3654 ql_dbg(ql_dbg_init, vha, 0x0125,
3655 "INTa mode: Enabled.\n");
8ae6d9c7
GM		 3656 ha->flags.mr_intr_valid = 1;
3657 }
7992abfc 3658
963b0fdd 3659clear_risc_ints:
4bb2efc4
JC		 3660 if (IS_FWI2_CAPABLE(ha) || IS_QLAFX00(ha))
3661 goto fail;
963b0fdd 3662
c6952483 3663 spin_lock_irq(&ha->hardware_lock);
4bb2efc4 3664 WRT_REG_WORD(&reg->isp.semaphore, 0);
c6952483 3665 spin_unlock_irq(&ha->hardware_lock);
a8488abe 3666
963b0fdd 3667fail:
a8488abe
AV		 3668 return ret;
3669}
3670
3671void
e315cd28 3672qla2x00_free_irqs(scsi_qla_host_t *vha)
a8488abe 3673{
e315cd28 3674 struct qla_hw_data *ha = vha->hw;
9a347ff4 3675 struct rsp_que *rsp;
4fa18345
MH		 3676 struct qla_msix_entry *qentry;
3677 int i;
9a347ff4
CD		 3678
3679 /*
3680 * We need to check that ha->rsp_q_map is valid in case we are called
3681 * from a probe failure context.
3682 */
3683 if (!ha->rsp_q_map || !ha->rsp_q_map[0])
27873de9 3684 goto free_irqs;
9a347ff4 3685 rsp = ha->rsp_q_map[0];
a8488abe 3686
4fa18345
MH		 3687 if (ha->flags.msix_enabled) {
3688 for (i = 0; i < ha->msix_count; i++) {
3689 qentry = &ha->msix_entries[i];
3690 if (qentry->have_irq) {
3691 irq_set_affinity_notifier(qentry->vector, NULL);
3692 free_irq(pci_irq_vector(ha->pdev, i), qentry->handle);
3693 }
3694 }
3695 kfree(ha->msix_entries);
3696 ha->msix_entries = NULL;
3697 ha->flags.msix_enabled = 0;
3698 ql_dbg(ql_dbg_init, vha, 0x0042,
3699 "Disabled MSI-X.\n");
3700 } else {
3701 free_irq(pci_irq_vector(ha->pdev, 0), rsp);
3702 }
e315cd28 3703
27873de9 3704free_irqs:
4fa18345 3705 pci_free_irq_vectors(ha->pdev);
a8488abe 3706}
73208dfd 3707
d7459527
MH		 3708int qla25xx_request_irq(struct qla_hw_data *ha, struct qla_qpair *qpair,
3709 struct qla_msix_entry *msix, int vector_type)
73208dfd 3710{
44a8f954 3711 const struct qla_init_msix_entry *intr = &msix_entries[vector_type];
7c3df132 3712 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev);
73208dfd
AC		 3713 int ret;
3714
d7459527
MH		 3715 scnprintf(msix->name, sizeof(msix->name),
3716 "qla2xxx%lu_qpair%d", vha->host_no, qpair->id);
3717 ret = request_irq(msix->vector, intr->handler, 0, msix->name, qpair);
73208dfd 3718 if (ret) {
7c3df132
SK		 3719 ql_log(ql_log_fatal, vha, 0x00e6,
3720 "MSI-X: Unable to register handler -- %x/%d.\n",
3721 msix->vector, ret);
73208dfd
AC		 3722 return ret;
3723 }
3724 msix->have_irq = 1;
d7459527 3725 msix->handle = qpair;
73208dfd
AC		 3726 return ret;
3727}
Linux 6.x block layer and io_uring tree(s)