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qla2xxx: Add ram area DDR for fwdump template entry T262.
[linux-2.6-block.git] / drivers / scsi / qla2xxx / qla_isr.c
CommitLineData
1da177e4 1/*
fa90c54f 2 * QLogic Fibre Channel HBA Driver
bd21eaf9 3 * Copyright (c) 2003-2014 QLogic Corporation
1da177e4 4 *
fa90c54f 5 * See LICENSE.qla2xxx for copyright and licensing details.
1da177e4
LT		 6 */
7#include "qla_def.h"
2d70c103 8#include "qla_target.h"
1da177e4 9
05236a05 10#include <linux/delay.h>
5a0e3ad6 11#include <linux/slab.h>
df7baa50 12#include <scsi/scsi_tcq.h>
9a069e19 13#include <scsi/scsi_bsg_fc.h>
bad75002 14#include <scsi/scsi_eh.h>
df7baa50 15
1da177e4 16static void qla2x00_mbx_completion(scsi_qla_host_t *, uint16_t);
73208dfd 17static void qla2x00_status_entry(scsi_qla_host_t *, struct rsp_que *, void *);
2afa19a9 18static void qla2x00_status_cont_entry(struct rsp_que *, sts_cont_entry_t *);
73208dfd
AC		 19static void qla2x00_error_entry(scsi_qla_host_t *, struct rsp_que *,
20 sts_entry_t *);
cdb898c5
QT		 21static void qla_irq_affinity_notify(struct irq_affinity_notify *,
22 const cpumask_t *);
23static void qla_irq_affinity_release(struct kref *);
24
9a853f71 25
1da177e4
LT		 26/**
27 * qla2100_intr_handler() - Process interrupts for the ISP2100 and ISP2200.
28 * @irq:
29 * @dev_id: SCSI driver HA context
1da177e4
LT		 30 *
31 * Called by system whenever the host adapter generates an interrupt.
32 *
33 * Returns handled flag.
34 */
35irqreturn_t
7d12e780 36qla2100_intr_handler(int irq, void *dev_id)
1da177e4 37{
e315cd28
AC		 38 scsi_qla_host_t *vha;
39 struct qla_hw_data *ha;
3d71644c 40 struct device_reg_2xxx __iomem *reg;
1da177e4 41 int status;
1da177e4 42 unsigned long iter;
14e660e6 43 uint16_t hccr;
9a853f71 44 uint16_t mb[4];
e315cd28 45 struct rsp_que *rsp;
43fac4d9 46 unsigned long flags;
1da177e4 47
e315cd28
AC		 48 rsp = (struct rsp_que *) dev_id;
49 if (!rsp) {
3256b435
CD		 50 ql_log(ql_log_info, NULL, 0x505d,
51 "%s: NULL response queue pointer.\n", __func__);
1da177e4
LT		 52 return (IRQ_NONE);
53 }
54
e315cd28 55 ha = rsp->hw;
3d71644c 56 reg = &ha->iobase->isp;
1da177e4
LT		 57 status = 0;
58
43fac4d9 59 spin_lock_irqsave(&ha->hardware_lock, flags);
2afa19a9 60 vha = pci_get_drvdata(ha->pdev);
1da177e4 61 for (iter = 50; iter--; ) {
14e660e6 62 hccr = RD_REG_WORD(&reg->hccr);
c821e0d5 63 if (qla2x00_check_reg16_for_disconnect(vha, hccr))
f3ddac19 64 break;
14e660e6
SJ		 65 if (hccr & HCCR_RISC_PAUSE) {
66 if (pci_channel_offline(ha->pdev))
67 break;
68
69 /*
70 * Issue a "HARD" reset in order for the RISC interrupt
a06a0f8e 71 * bit to be cleared. Schedule a big hammer to get
14e660e6
SJ		 72 * out of the RISC PAUSED state.
73 */
74 WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
75 RD_REG_WORD(&reg->hccr);
76
e315cd28
AC		 77 ha->isp_ops->fw_dump(vha, 1);
78 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
14e660e6
SJ		 79 break;
80 } else if ((RD_REG_WORD(&reg->istatus) & ISR_RISC_INT) == 0)
1da177e4
LT		 81 break;
82
83 if (RD_REG_WORD(&reg->semaphore) & BIT_0) {
84 WRT_REG_WORD(&reg->hccr, HCCR_CLR_RISC_INT);
85 RD_REG_WORD(&reg->hccr);
86
87 /* Get mailbox data. */
9a853f71
AV		 88 mb[0] = RD_MAILBOX_REG(ha, reg, 0);
89 if (mb[0] > 0x3fff && mb[0] < 0x8000) {
e315cd28 90 qla2x00_mbx_completion(vha, mb[0]);
1da177e4 91 status |= MBX_INTERRUPT;
9a853f71
AV		 92 } else if (mb[0] > 0x7fff && mb[0] < 0xc000) {
93 mb[1] = RD_MAILBOX_REG(ha, reg, 1);
94 mb[2] = RD_MAILBOX_REG(ha, reg, 2);
95 mb[3] = RD_MAILBOX_REG(ha, reg, 3);
73208dfd 96 qla2x00_async_event(vha, rsp, mb);
1da177e4
LT		 97 } else {
98 /*EMPTY*/
7c3df132
SK		 99 ql_dbg(ql_dbg_async, vha, 0x5025,
100 "Unrecognized interrupt type (%d).\n",
101 mb[0]);
1da177e4
LT		 102 }
103 /* Release mailbox registers. */
104 WRT_REG_WORD(&reg->semaphore, 0);
105 RD_REG_WORD(&reg->semaphore);
106 } else {
73208dfd 107 qla2x00_process_response_queue(rsp);
1da177e4
LT		 108
109 WRT_REG_WORD(&reg->hccr, HCCR_CLR_RISC_INT);
110 RD_REG_WORD(&reg->hccr);
111 }
112 }
36439832 113 qla2x00_handle_mbx_completion(ha, status);
43fac4d9 114 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1da177e4 115
1da177e4
LT		 116 return (IRQ_HANDLED);
117}
118
f3ddac19 119bool
c821e0d5 120qla2x00_check_reg32_for_disconnect(scsi_qla_host_t *vha, uint32_t reg)
f3ddac19
CD		 121{
122 /* Check for PCI disconnection */
a30c2a3b 123 if (reg == 0xffffffff && !pci_channel_offline(vha->hw->pdev)) {
beb9e315 124 if (!test_and_set_bit(PFLG_DISCONNECTED, &vha->pci_flags) &&
6b383979
JL		 125 !test_bit(PFLG_DRIVER_REMOVING, &vha->pci_flags) &&
126 !test_bit(PFLG_DRIVER_PROBING, &vha->pci_flags)) {
232792b6
JL		 127 /*
128 * Schedule this (only once) on the default system
129 * workqueue so that all the adapter workqueues and the
130 * DPC thread can be shutdown cleanly.
131 */
132 schedule_work(&vha->hw->board_disable);
133 }
f3ddac19
CD		 134 return true;
135 } else
136 return false;
137}
138
c821e0d5
JL		 139bool
140qla2x00_check_reg16_for_disconnect(scsi_qla_host_t *vha, uint16_t reg)
141{
142 return qla2x00_check_reg32_for_disconnect(vha, 0xffff0000 | reg);
143}
144
1da177e4
LT		 145/**
146 * qla2300_intr_handler() - Process interrupts for the ISP23xx and ISP63xx.
147 * @irq:
148 * @dev_id: SCSI driver HA context
1da177e4
LT		 149 *
150 * Called by system whenever the host adapter generates an interrupt.
151 *
152 * Returns handled flag.
153 */
154irqreturn_t
7d12e780 155qla2300_intr_handler(int irq, void *dev_id)
1da177e4 156{
e315cd28 157 scsi_qla_host_t *vha;
3d71644c 158 struct device_reg_2xxx __iomem *reg;
1da177e4 159 int status;
1da177e4
LT		 160 unsigned long iter;
161 uint32_t stat;
1da177e4 162 uint16_t hccr;
9a853f71 163 uint16_t mb[4];
e315cd28
AC		 164 struct rsp_que *rsp;
165 struct qla_hw_data *ha;
43fac4d9 166 unsigned long flags;
1da177e4 167
e315cd28
AC		 168 rsp = (struct rsp_que *) dev_id;
169 if (!rsp) {
3256b435
CD		 170 ql_log(ql_log_info, NULL, 0x5058,
171 "%s: NULL response queue pointer.\n", __func__);
1da177e4
LT		 172 return (IRQ_NONE);
173 }
174
e315cd28 175 ha = rsp->hw;
3d71644c 176 reg = &ha->iobase->isp;
1da177e4
LT		 177 status = 0;
178
43fac4d9 179 spin_lock_irqsave(&ha->hardware_lock, flags);
2afa19a9 180 vha = pci_get_drvdata(ha->pdev);
1da177e4
LT		 181 for (iter = 50; iter--; ) {
182 stat = RD_REG_DWORD(&reg->u.isp2300.host_status);
c821e0d5 183 if (qla2x00_check_reg32_for_disconnect(vha, stat))
f3ddac19 184 break;
1da177e4 185 if (stat & HSR_RISC_PAUSED) {
85880801 186 if (unlikely(pci_channel_offline(ha->pdev)))
14e660e6
SJ		 187 break;
188
1da177e4 189 hccr = RD_REG_WORD(&reg->hccr);
f3ddac19 190
1da177e4 191 if (hccr & (BIT_15 | BIT_13 | BIT_11 | BIT_8))
7c3df132
SK		 192 ql_log(ql_log_warn, vha, 0x5026,
193 "Parity error -- HCCR=%x, Dumping "
194 "firmware.\n", hccr);
1da177e4 195 else
7c3df132
SK		 196 ql_log(ql_log_warn, vha, 0x5027,
197 "RISC paused -- HCCR=%x, Dumping "
198 "firmware.\n", hccr);
1da177e4
LT		 199
200 /*
201 * Issue a "HARD" reset in order for the RISC
202 * interrupt bit to be cleared. Schedule a big
a06a0f8e 203 * hammer to get out of the RISC PAUSED state.
1da177e4
LT		 204 */
205 WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
206 RD_REG_WORD(&reg->hccr);
07f31805 207
e315cd28
AC		 208 ha->isp_ops->fw_dump(vha, 1);
209 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
1da177e4
LT		 210 break;
211 } else if ((stat & HSR_RISC_INT) == 0)
212 break;
213
1da177e4 214 switch (stat & 0xff) {
1da177e4
LT		 215 case 0x1:
216 case 0x2:
217 case 0x10:
218 case 0x11:
e315cd28 219 qla2x00_mbx_completion(vha, MSW(stat));
1da177e4
LT		 220 status |= MBX_INTERRUPT;
221
222 /* Release mailbox registers. */
223 WRT_REG_WORD(&reg->semaphore, 0);
224 break;
225 case 0x12:
9a853f71
AV		 226 mb[0] = MSW(stat);
227 mb[1] = RD_MAILBOX_REG(ha, reg, 1);
228 mb[2] = RD_MAILBOX_REG(ha, reg, 2);
229 mb[3] = RD_MAILBOX_REG(ha, reg, 3);
73208dfd 230 qla2x00_async_event(vha, rsp, mb);
9a853f71
AV		 231 break;
232 case 0x13:
73208dfd 233 qla2x00_process_response_queue(rsp);
1da177e4
LT		 234 break;
235 case 0x15:
9a853f71
AV		 236 mb[0] = MBA_CMPLT_1_16BIT;
237 mb[1] = MSW(stat);
73208dfd 238 qla2x00_async_event(vha, rsp, mb);
1da177e4
LT		 239 break;
240 case 0x16:
9a853f71
AV		 241 mb[0] = MBA_SCSI_COMPLETION;
242 mb[1] = MSW(stat);
243 mb[2] = RD_MAILBOX_REG(ha, reg, 2);
73208dfd 244 qla2x00_async_event(vha, rsp, mb);
1da177e4
LT		 245 break;
246 default:
7c3df132
SK		 247 ql_dbg(ql_dbg_async, vha, 0x5028,
248 "Unrecognized interrupt type (%d).\n", stat & 0xff);
1da177e4
LT		 249 break;
250 }
251 WRT_REG_WORD(&reg->hccr, HCCR_CLR_RISC_INT);
252 RD_REG_WORD_RELAXED(&reg->hccr);
253 }
36439832 254 qla2x00_handle_mbx_completion(ha, status);
43fac4d9 255 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1da177e4 256
1da177e4
LT		 257 return (IRQ_HANDLED);
258}
259
260/**
261 * qla2x00_mbx_completion() - Process mailbox command completions.
262 * @ha: SCSI driver HA context
263 * @mb0: Mailbox0 register
264 */
265static void
e315cd28 266qla2x00_mbx_completion(scsi_qla_host_t *vha, uint16_t mb0)
1da177e4
LT		 267{
268 uint16_t cnt;
4fa94f83 269 uint32_t mboxes;
1da177e4 270 uint16_t __iomem *wptr;
e315cd28 271 struct qla_hw_data *ha = vha->hw;
3d71644c 272 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1da177e4 273
4fa94f83
AV		 274 /* Read all mbox registers? */
275 mboxes = (1 << ha->mbx_count) - 1;
276 if (!ha->mcp)
a720101d 277 ql_dbg(ql_dbg_async, vha, 0x5001, "MBX pointer ERROR.\n");
4fa94f83
AV		 278 else
279 mboxes = ha->mcp->in_mb;
280
1da177e4
LT		 281 /* Load return mailbox registers. */
282 ha->flags.mbox_int = 1;
283 ha->mailbox_out[0] = mb0;
4fa94f83 284 mboxes >>= 1;
1da177e4
LT		 285 wptr = (uint16_t __iomem *)MAILBOX_REG(ha, reg, 1);
286
287 for (cnt = 1; cnt < ha->mbx_count; cnt++) {
fa2a1ce5 288 if (IS_QLA2200(ha) && cnt == 8)
1da177e4 289 wptr = (uint16_t __iomem *)MAILBOX_REG(ha, reg, 8);
4fa94f83 290 if ((cnt == 4 || cnt == 5) && (mboxes & BIT_0))
1da177e4 291 ha->mailbox_out[cnt] = qla2x00_debounce_register(wptr);
4fa94f83 292 else if (mboxes & BIT_0)
1da177e4 293 ha->mailbox_out[cnt] = RD_REG_WORD(wptr);
fa2a1ce5 294
1da177e4 295 wptr++;
4fa94f83 296 mboxes >>= 1;
1da177e4 297 }
1da177e4
LT		 298}
299
8a659571
AV		 300static void
301qla81xx_idc_event(scsi_qla_host_t *vha, uint16_t aen, uint16_t descr)
302{
303 static char *event[] =
304 { "Complete", "Request Notification", "Time Extension" };
305 int rval;
306 struct device_reg_24xx __iomem *reg24 = &vha->hw->iobase->isp24;
9e5054ec 307 struct device_reg_82xx __iomem *reg82 = &vha->hw->iobase->isp82;
8a659571
AV		 308 uint16_t __iomem *wptr;
309 uint16_t cnt, timeout, mb[QLA_IDC_ACK_REGS];
310
311 /* Seed data -- mailbox1 -> mailbox7. */
9e5054ec
CD		 312 if (IS_QLA81XX(vha->hw) || IS_QLA83XX(vha->hw))
313 wptr = (uint16_t __iomem *)&reg24->mailbox1;
314 else if (IS_QLA8044(vha->hw))
315 wptr = (uint16_t __iomem *)&reg82->mailbox_out[1];
316 else
317 return;
318
8a659571
AV		 319 for (cnt = 0; cnt < QLA_IDC_ACK_REGS; cnt++, wptr++)
320 mb[cnt] = RD_REG_WORD(wptr);
321
7c3df132 322 ql_dbg(ql_dbg_async, vha, 0x5021,
6246b8a1 323 "Inter-Driver Communication %s -- "
7c3df132
SK		 324 "%04x %04x %04x %04x %04x %04x %04x.\n",
325 event[aen & 0xff], mb[0], mb[1], mb[2], mb[3],
326 mb[4], mb[5], mb[6]);
454073c9
SV		 327 switch (aen) {
328 /* Handle IDC Error completion case. */
329 case MBA_IDC_COMPLETE:
330 if (mb[1] >> 15) {
331 vha->hw->flags.idc_compl_status = 1;
9aaf2cea 332 if (vha->hw->notify_dcbx_comp && !vha->vp_idx)
454073c9
SV		 333 complete(&vha->hw->dcbx_comp);
334 }
335 break;
336
337 case MBA_IDC_NOTIFY:
338 /* Acknowledgement needed? [Notify && non-zero timeout]. */
339 timeout = (descr >> 8) & 0xf;
340 ql_dbg(ql_dbg_async, vha, 0x5022,
341 "%lu Inter-Driver Communication %s -- ACK timeout=%d.\n",
342 vha->host_no, event[aen & 0xff], timeout);
343
344 if (!timeout)
345 return;
346 rval = qla2x00_post_idc_ack_work(vha, mb);
347 if (rval != QLA_SUCCESS)
348 ql_log(ql_log_warn, vha, 0x5023,
349 "IDC failed to post ACK.\n");
350 break;
351 case MBA_IDC_TIME_EXT:
352 vha->hw->idc_extend_tmo = descr;
353 ql_dbg(ql_dbg_async, vha, 0x5087,
354 "%lu Inter-Driver Communication %s -- "
355 "Extend timeout by=%d.\n",
356 vha->host_no, event[aen & 0xff], vha->hw->idc_extend_tmo);
357 break;
bf5b8ad7 358 }
8a659571
AV		 359}
360
daae62a3 361#define LS_UNKNOWN 2
d0297c9a
JC		 362const char *
363qla2x00_get_link_speed_str(struct qla_hw_data *ha, uint16_t speed)
daae62a3 364{
f73cb695
CD		 365 static const char *const link_speeds[] = {
366 "1", "2", "?", "4", "8", "16", "32", "10"
d0297c9a 367 };
f73cb695 368#define QLA_LAST_SPEED 7
daae62a3
CD		 369
370 if (IS_QLA2100(ha) || IS_QLA2200(ha))
d0297c9a
JC		 371 return link_speeds[0];
372 else if (speed == 0x13)
f73cb695
CD		 373 return link_speeds[QLA_LAST_SPEED];
374 else if (speed < QLA_LAST_SPEED)
d0297c9a
JC		 375 return link_speeds[speed];
376 else
377 return link_speeds[LS_UNKNOWN];
daae62a3
CD		 378}
379
fa492630 380static void
7d613ac6
SV		 381qla83xx_handle_8200_aen(scsi_qla_host_t *vha, uint16_t *mb)
382{
383 struct qla_hw_data *ha = vha->hw;
384
385 /*
386 * 8200 AEN Interpretation:
387 * mb[0] = AEN code
388 * mb[1] = AEN Reason code
389 * mb[2] = LSW of Peg-Halt Status-1 Register
390 * mb[6] = MSW of Peg-Halt Status-1 Register
391 * mb[3] = LSW of Peg-Halt Status-2 register
392 * mb[7] = MSW of Peg-Halt Status-2 register
393 * mb[4] = IDC Device-State Register value
394 * mb[5] = IDC Driver-Presence Register value
395 */
396 ql_dbg(ql_dbg_async, vha, 0x506b, "AEN Code: mb[0] = 0x%x AEN reason: "
397 "mb[1] = 0x%x PH-status1: mb[2] = 0x%x PH-status1: mb[6] = 0x%x.\n",
398 mb[0], mb[1], mb[2], mb[6]);
399 ql_dbg(ql_dbg_async, vha, 0x506c, "PH-status2: mb[3] = 0x%x "
400 "PH-status2: mb[7] = 0x%x Device-State: mb[4] = 0x%x "
401 "Drv-Presence: mb[5] = 0x%x.\n", mb[3], mb[7], mb[4], mb[5]);
402
403 if (mb[1] & (IDC_PEG_HALT_STATUS_CHANGE | IDC_NIC_FW_REPORTED_FAILURE |
404 IDC_HEARTBEAT_FAILURE)) {
405 ha->flags.nic_core_hung = 1;
406 ql_log(ql_log_warn, vha, 0x5060,
407 "83XX: F/W Error Reported: Check if reset required.\n");
408
409 if (mb[1] & IDC_PEG_HALT_STATUS_CHANGE) {
410 uint32_t protocol_engine_id, fw_err_code, err_level;
411
412 /*
413 * IDC_PEG_HALT_STATUS_CHANGE interpretation:
414 * - PEG-Halt Status-1 Register:
415 * (LSW = mb[2], MSW = mb[6])
416 * Bits 0-7 = protocol-engine ID
417 * Bits 8-28 = f/w error code
418 * Bits 29-31 = Error-level
419 * Error-level 0x1 = Non-Fatal error
420 * Error-level 0x2 = Recoverable Fatal error
421 * Error-level 0x4 = UnRecoverable Fatal error
422 * - PEG-Halt Status-2 Register:
423 * (LSW = mb[3], MSW = mb[7])
424 */
425 protocol_engine_id = (mb[2] & 0xff);
426 fw_err_code = (((mb[2] & 0xff00) >> 8) |
427 ((mb[6] & 0x1fff) << 8));
428 err_level = ((mb[6] & 0xe000) >> 13);
429 ql_log(ql_log_warn, vha, 0x5061, "PegHalt Status-1 "
430 "Register: protocol_engine_id=0x%x "
431 "fw_err_code=0x%x err_level=0x%x.\n",
432 protocol_engine_id, fw_err_code, err_level);
433 ql_log(ql_log_warn, vha, 0x5062, "PegHalt Status-2 "
434 "Register: 0x%x%x.\n", mb[7], mb[3]);
435 if (err_level == ERR_LEVEL_NON_FATAL) {
436 ql_log(ql_log_warn, vha, 0x5063,
437 "Not a fatal error, f/w has recovered "
438 "iteself.\n");
439 } else if (err_level == ERR_LEVEL_RECOVERABLE_FATAL) {
440 ql_log(ql_log_fatal, vha, 0x5064,
441 "Recoverable Fatal error: Chip reset "
442 "required.\n");
443 qla83xx_schedule_work(vha,
444 QLA83XX_NIC_CORE_RESET);
445 } else if (err_level == ERR_LEVEL_UNRECOVERABLE_FATAL) {
446 ql_log(ql_log_fatal, vha, 0x5065,
447 "Unrecoverable Fatal error: Set FAILED "
448 "state, reboot required.\n");
449 qla83xx_schedule_work(vha,
450 QLA83XX_NIC_CORE_UNRECOVERABLE);
451 }
452 }
453
454 if (mb[1] & IDC_NIC_FW_REPORTED_FAILURE) {
455 uint16_t peg_fw_state, nw_interface_link_up;
456 uint16_t nw_interface_signal_detect, sfp_status;
457 uint16_t htbt_counter, htbt_monitor_enable;
458 uint16_t sfp_additonal_info, sfp_multirate;
459 uint16_t sfp_tx_fault, link_speed, dcbx_status;
460
461 /*
462 * IDC_NIC_FW_REPORTED_FAILURE interpretation:
463 * - PEG-to-FC Status Register:
464 * (LSW = mb[2], MSW = mb[6])
465 * Bits 0-7 = Peg-Firmware state
466 * Bit 8 = N/W Interface Link-up
467 * Bit 9 = N/W Interface signal detected
468 * Bits 10-11 = SFP Status
469 * SFP Status 0x0 = SFP+ transceiver not expected
470 * SFP Status 0x1 = SFP+ transceiver not present
471 * SFP Status 0x2 = SFP+ transceiver invalid
472 * SFP Status 0x3 = SFP+ transceiver present and
473 * valid
474 * Bits 12-14 = Heartbeat Counter
475 * Bit 15 = Heartbeat Monitor Enable
476 * Bits 16-17 = SFP Additional Info
477 * SFP info 0x0 = Unregocnized transceiver for
478 * Ethernet
479 * SFP info 0x1 = SFP+ brand validation failed
480 * SFP info 0x2 = SFP+ speed validation failed
481 * SFP info 0x3 = SFP+ access error
482 * Bit 18 = SFP Multirate
483 * Bit 19 = SFP Tx Fault
484 * Bits 20-22 = Link Speed
485 * Bits 23-27 = Reserved
486 * Bits 28-30 = DCBX Status
487 * DCBX Status 0x0 = DCBX Disabled
488 * DCBX Status 0x1 = DCBX Enabled
489 * DCBX Status 0x2 = DCBX Exchange error
490 * Bit 31 = Reserved
491 */
492 peg_fw_state = (mb[2] & 0x00ff);
493 nw_interface_link_up = ((mb[2] & 0x0100) >> 8);
494 nw_interface_signal_detect = ((mb[2] & 0x0200) >> 9);
495 sfp_status = ((mb[2] & 0x0c00) >> 10);
496 htbt_counter = ((mb[2] & 0x7000) >> 12);
497 htbt_monitor_enable = ((mb[2] & 0x8000) >> 15);
498 sfp_additonal_info = (mb[6] & 0x0003);
499 sfp_multirate = ((mb[6] & 0x0004) >> 2);
500 sfp_tx_fault = ((mb[6] & 0x0008) >> 3);
501 link_speed = ((mb[6] & 0x0070) >> 4);
502 dcbx_status = ((mb[6] & 0x7000) >> 12);
503
504 ql_log(ql_log_warn, vha, 0x5066,
505 "Peg-to-Fc Status Register:\n"
506 "peg_fw_state=0x%x, nw_interface_link_up=0x%x, "
507 "nw_interface_signal_detect=0x%x"
508 "\nsfp_statis=0x%x.\n ", peg_fw_state,
509 nw_interface_link_up, nw_interface_signal_detect,
510 sfp_status);
511 ql_log(ql_log_warn, vha, 0x5067,
512 "htbt_counter=0x%x, htbt_monitor_enable=0x%x, "
513 "sfp_additonal_info=0x%x, sfp_multirate=0x%x.\n ",
514 htbt_counter, htbt_monitor_enable,
515 sfp_additonal_info, sfp_multirate);
516 ql_log(ql_log_warn, vha, 0x5068,
517 "sfp_tx_fault=0x%x, link_state=0x%x, "
518 "dcbx_status=0x%x.\n", sfp_tx_fault, link_speed,
519 dcbx_status);
520
521 qla83xx_schedule_work(vha, QLA83XX_NIC_CORE_RESET);
522 }
523
524 if (mb[1] & IDC_HEARTBEAT_FAILURE) {
525 ql_log(ql_log_warn, vha, 0x5069,
526 "Heartbeat Failure encountered, chip reset "
527 "required.\n");
528
529 qla83xx_schedule_work(vha, QLA83XX_NIC_CORE_RESET);
530 }
531 }
532
533 if (mb[1] & IDC_DEVICE_STATE_CHANGE) {
534 ql_log(ql_log_info, vha, 0x506a,
535 "IDC Device-State changed = 0x%x.\n", mb[4]);
6c3943cd
SK		 536 if (ha->flags.nic_core_reset_owner)
537 return;
7d613ac6
SV		 538 qla83xx_schedule_work(vha, MBA_IDC_AEN);
539 }
540}
541
bb4cf5b7
CD		 542int
543qla2x00_is_a_vp_did(scsi_qla_host_t *vha, uint32_t rscn_entry)
544{
545 struct qla_hw_data *ha = vha->hw;
546 scsi_qla_host_t *vp;
547 uint32_t vp_did;
548 unsigned long flags;
549 int ret = 0;
550
551 if (!ha->num_vhosts)
552 return ret;
553
554 spin_lock_irqsave(&ha->vport_slock, flags);
555 list_for_each_entry(vp, &ha->vp_list, list) {
556 vp_did = vp->d_id.b24;
557 if (vp_did == rscn_entry) {
558 ret = 1;
559 break;
560 }
561 }
562 spin_unlock_irqrestore(&ha->vport_slock, flags);
563
564 return ret;
565}
566
17cac3a1
JC		 567static inline fc_port_t *
568qla2x00_find_fcport_by_loopid(scsi_qla_host_t *vha, uint16_t loop_id)
569{
570 fc_port_t *fcport;
571
572 list_for_each_entry(fcport, &vha->vp_fcports, list)
573 if (fcport->loop_id == loop_id)
574 return fcport;
575 return NULL;
576}
577
1da177e4
LT		 578/**
579 * qla2x00_async_event() - Process aynchronous events.
580 * @ha: SCSI driver HA context
9a853f71 581 * @mb: Mailbox registers (0 - 3)
1da177e4 582 */
2c3dfe3f 583void
73208dfd 584qla2x00_async_event(scsi_qla_host_t *vha, struct rsp_que *rsp, uint16_t *mb)
1da177e4 585{
1da177e4 586 uint16_t handle_cnt;
bdab23da 587 uint16_t cnt, mbx;
1da177e4 588 uint32_t handles[5];
e315cd28 589 struct qla_hw_data *ha = vha->hw;
3d71644c 590 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
bdab23da 591 struct device_reg_24xx __iomem *reg24 = &ha->iobase->isp24;
bc5c2aad 592 struct device_reg_82xx __iomem *reg82 = &ha->iobase->isp82;
52c82823 593 uint32_t rscn_entry, host_pid;
4d4df193 594 unsigned long flags;
ef86cb20 595 fc_port_t *fcport = NULL;
1da177e4
LT		 596
597 /* Setup to process RIO completion. */
598 handle_cnt = 0;
6246b8a1 599 if (IS_CNA_CAPABLE(ha))
3a03eb79 600 goto skip_rio;
1da177e4
LT		 601 switch (mb[0]) {
602 case MBA_SCSI_COMPLETION:
9a853f71 603 handles[0] = le32_to_cpu((uint32_t)((mb[2] << 16) | mb[1]));
1da177e4
LT		 604 handle_cnt = 1;
605 break;
606 case MBA_CMPLT_1_16BIT:
9a853f71 607 handles[0] = mb[1];
1da177e4
LT		 608 handle_cnt = 1;
609 mb[0] = MBA_SCSI_COMPLETION;
610 break;
611 case MBA_CMPLT_2_16BIT:
9a853f71
AV		 612 handles[0] = mb[1];
613 handles[1] = mb[2];
1da177e4
LT		 614 handle_cnt = 2;
615 mb[0] = MBA_SCSI_COMPLETION;
616 break;
617 case MBA_CMPLT_3_16BIT:
9a853f71
AV		 618 handles[0] = mb[1];
619 handles[1] = mb[2];
620 handles[2] = mb[3];
1da177e4
LT		 621 handle_cnt = 3;
622 mb[0] = MBA_SCSI_COMPLETION;
623 break;
624 case MBA_CMPLT_4_16BIT:
9a853f71
AV		 625 handles[0] = mb[1];
626 handles[1] = mb[2];
627 handles[2] = mb[3];
1da177e4
LT		 628 handles[3] = (uint32_t)RD_MAILBOX_REG(ha, reg, 6);
629 handle_cnt = 4;
630 mb[0] = MBA_SCSI_COMPLETION;
631 break;
632 case MBA_CMPLT_5_16BIT:
9a853f71
AV		 633 handles[0] = mb[1];
634 handles[1] = mb[2];
635 handles[2] = mb[3];
1da177e4
LT		 636 handles[3] = (uint32_t)RD_MAILBOX_REG(ha, reg, 6);
637 handles[4] = (uint32_t)RD_MAILBOX_REG(ha, reg, 7);
638 handle_cnt = 5;
639 mb[0] = MBA_SCSI_COMPLETION;
640 break;
641 case MBA_CMPLT_2_32BIT:
9a853f71 642 handles[0] = le32_to_cpu((uint32_t)((mb[2] << 16) | mb[1]));
1da177e4
LT		 643 handles[1] = le32_to_cpu(
644 ((uint32_t)(RD_MAILBOX_REG(ha, reg, 7) << 16)) |
645 RD_MAILBOX_REG(ha, reg, 6));
646 handle_cnt = 2;
647 mb[0] = MBA_SCSI_COMPLETION;
648 break;
649 default:
650 break;
651 }
3a03eb79 652skip_rio:
1da177e4
LT		 653 switch (mb[0]) {
654 case MBA_SCSI_COMPLETION: /* Fast Post */
e315cd28 655 if (!vha->flags.online)
1da177e4
LT		 656 break;
657
658 for (cnt = 0; cnt < handle_cnt; cnt++)
73208dfd
AC		 659 qla2x00_process_completed_request(vha, rsp->req,
660 handles[cnt]);
1da177e4
LT		 661 break;
662
663 case MBA_RESET: /* Reset */
7c3df132
SK		 664 ql_dbg(ql_dbg_async, vha, 0x5002,
665 "Asynchronous RESET.\n");
1da177e4 666
e315cd28 667 set_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
1da177e4
LT		 668 break;
669
670 case MBA_SYSTEM_ERR: /* System Error */
f73cb695 671 mbx = (IS_QLA81XX(ha) || IS_QLA83XX(ha) || IS_QLA27XX(ha)) ?
6246b8a1 672 RD_REG_WORD(&reg24->mailbox7) : 0;
7c3df132 673 ql_log(ql_log_warn, vha, 0x5003,
bdab23da
AV		 674 "ISP System Error - mbx1=%xh mbx2=%xh mbx3=%xh "
675 "mbx7=%xh.\n", mb[1], mb[2], mb[3], mbx);
1da177e4 676
e315cd28 677 ha->isp_ops->fw_dump(vha, 1);
1da177e4 678
e428924c 679 if (IS_FWI2_CAPABLE(ha)) {
9a853f71 680 if (mb[1] == 0 && mb[2] == 0) {
7c3df132 681 ql_log(ql_log_fatal, vha, 0x5004,
9a853f71
AV		 682 "Unrecoverable Hardware Error: adapter "
683 "marked OFFLINE!\n");
e315cd28 684 vha->flags.online = 0;
6246b8a1 685 vha->device_flags |= DFLG_DEV_FAILED;
b1d46989 686 } else {
25985edc 687 /* Check to see if MPI timeout occurred */
f73cb695 688 if ((mbx & MBX_3) && (ha->port_no == 0))
b1d46989
MI		 689 set_bit(MPI_RESET_NEEDED,
690 &vha->dpc_flags);
691
e315cd28 692 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
b1d46989 693 }
9a853f71 694 } else if (mb[1] == 0) {
7c3df132 695 ql_log(ql_log_fatal, vha, 0x5005,
1da177e4
LT		 696 "Unrecoverable Hardware Error: adapter marked "
697 "OFFLINE!\n");
e315cd28 698 vha->flags.online = 0;
6246b8a1 699 vha->device_flags |= DFLG_DEV_FAILED;
1da177e4 700 } else
e315cd28 701 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
1da177e4
LT		 702 break;
703
704 case MBA_REQ_TRANSFER_ERR: /* Request Transfer Error */
7c3df132
SK		 705 ql_log(ql_log_warn, vha, 0x5006,
706 "ISP Request Transfer Error (%x).\n", mb[1]);
1da177e4 707
e315cd28 708 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
1da177e4
LT		 709 break;
710
711 case MBA_RSP_TRANSFER_ERR: /* Response Transfer Error */
7c3df132
SK		 712 ql_log(ql_log_warn, vha, 0x5007,
713 "ISP Response Transfer Error.\n");
1da177e4 714
e315cd28 715 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
1da177e4
LT		 716 break;
717
718 case MBA_WAKEUP_THRES: /* Request Queue Wake-up */
7c3df132
SK		 719 ql_dbg(ql_dbg_async, vha, 0x5008,
720 "Asynchronous WAKEUP_THRES.\n");
1da177e4 721
2d70c103 722 break;
1da177e4 723 case MBA_LIP_OCCURRED: /* Loop Initialization Procedure */
cfb0919c 724 ql_dbg(ql_dbg_async, vha, 0x5009,
7c3df132 725 "LIP occurred (%x).\n", mb[1]);
1da177e4 726
e315cd28
AC		 727 if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
728 atomic_set(&vha->loop_state, LOOP_DOWN);
729 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
730 qla2x00_mark_all_devices_lost(vha, 1);
1da177e4
LT		 731 }
732
e315cd28
AC		 733 if (vha->vp_idx) {
734 atomic_set(&vha->vp_state, VP_FAILED);
735 fc_vport_set_state(vha->fc_vport, FC_VPORT_FAILED);
2c3dfe3f
SJ		 736 }
737
e315cd28
AC		 738 set_bit(REGISTER_FC4_NEEDED, &vha->dpc_flags);
739 set_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags);
1da177e4 740
e315cd28
AC		 741 vha->flags.management_server_logged_in = 0;
742 qla2x00_post_aen_work(vha, FCH_EVT_LIP, mb[1]);
1da177e4
LT		 743 break;
744
745 case MBA_LOOP_UP: /* Loop Up Event */
daae62a3 746 if (IS_QLA2100(ha) || IS_QLA2200(ha))
d8b45213 747 ha->link_data_rate = PORT_SPEED_1GB;
daae62a3 748 else
1da177e4 749 ha->link_data_rate = mb[1];
1da177e4 750
8e5a9484 751 ql_log(ql_log_info, vha, 0x500a,
daae62a3 752 "LOOP UP detected (%s Gbps).\n",
d0297c9a 753 qla2x00_get_link_speed_str(ha, ha->link_data_rate));
1da177e4 754
e315cd28
AC		 755 vha->flags.management_server_logged_in = 0;
756 qla2x00_post_aen_work(vha, FCH_EVT_LINKUP, ha->link_data_rate);
1da177e4
LT		 757 break;
758
759 case MBA_LOOP_DOWN: /* Loop Down Event */
6246b8a1
GM		 760 mbx = (IS_QLA81XX(ha) || IS_QLA8031(ha))
761 ? RD_REG_WORD(&reg24->mailbox4) : 0;
7ec0effd
AD		 762 mbx = (IS_P3P_TYPE(ha)) ? RD_REG_WORD(&reg82->mailbox_out[4])
763 : mbx;
8e5a9484 764 ql_log(ql_log_info, vha, 0x500b,
7c3df132
SK		 765 "LOOP DOWN detected (%x %x %x %x).\n",
766 mb[1], mb[2], mb[3], mbx);
1da177e4 767
e315cd28
AC		 768 if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
769 atomic_set(&vha->loop_state, LOOP_DOWN);
770 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
2486c627
HM		 771 /*
772 * In case of loop down, restore WWPN from
773 * NVRAM in case of FA-WWPN capable ISP
718abbdc 774 * Restore for Physical Port only
2486c627 775 */
718abbdc
SC		 776 if (!vha->vp_idx) {
777 if (ha->flags.fawwpn_enabled) {
778 void *wwpn = ha->init_cb->port_name;
779 memcpy(vha->port_name, wwpn, WWN_SIZE);
780 fc_host_port_name(vha->host) =
781 wwn_to_u64(vha->port_name);
782 ql_dbg(ql_dbg_init + ql_dbg_verbose,
783 vha, 0x0144, "LOOP DOWN detected,"
784 "restore WWPN %016llx\n",
785 wwn_to_u64(vha->port_name));
786 }
787
788 clear_bit(VP_CONFIG_OK, &vha->vp_flags);
2486c627
HM		 789 }
790
e315cd28
AC		 791 vha->device_flags |= DFLG_NO_CABLE;
792 qla2x00_mark_all_devices_lost(vha, 1);
1da177e4
LT		 793 }
794
e315cd28
AC		 795 if (vha->vp_idx) {
796 atomic_set(&vha->vp_state, VP_FAILED);
797 fc_vport_set_state(vha->fc_vport, FC_VPORT_FAILED);
2c3dfe3f
SJ		 798 }
799
e315cd28 800 vha->flags.management_server_logged_in = 0;
d8b45213 801 ha->link_data_rate = PORT_SPEED_UNKNOWN;
e315cd28 802 qla2x00_post_aen_work(vha, FCH_EVT_LINKDOWN, 0);
1da177e4
LT		 803 break;
804
805 case MBA_LIP_RESET: /* LIP reset occurred */
cfb0919c 806 ql_dbg(ql_dbg_async, vha, 0x500c,
cc3ef7bc 807 "LIP reset occurred (%x).\n", mb[1]);
1da177e4 808
e315cd28
AC		 809 if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
810 atomic_set(&vha->loop_state, LOOP_DOWN);
811 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
812 qla2x00_mark_all_devices_lost(vha, 1);
1da177e4
LT		 813 }
814
e315cd28
AC		 815 if (vha->vp_idx) {
816 atomic_set(&vha->vp_state, VP_FAILED);
817 fc_vport_set_state(vha->fc_vport, FC_VPORT_FAILED);
2c3dfe3f
SJ		 818 }
819
e315cd28 820 set_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
1da177e4
LT		 821
822 ha->operating_mode = LOOP;
e315cd28
AC		 823 vha->flags.management_server_logged_in = 0;
824 qla2x00_post_aen_work(vha, FCH_EVT_LIPRESET, mb[1]);
1da177e4
LT		 825 break;
826
3a03eb79 827 /* case MBA_DCBX_COMPLETE: */
1da177e4
LT		 828 case MBA_POINT_TO_POINT: /* Point-to-Point */
829 if (IS_QLA2100(ha))
830 break;
831
7ec0effd 832 if (IS_CNA_CAPABLE(ha)) {
7c3df132
SK		 833 ql_dbg(ql_dbg_async, vha, 0x500d,
834 "DCBX Completed -- %04x %04x %04x.\n",
835 mb[1], mb[2], mb[3]);
9aaf2cea 836 if (ha->notify_dcbx_comp && !vha->vp_idx)
23f2ebd1
SR		 837 complete(&ha->dcbx_comp);
838
839 } else
7c3df132
SK		 840 ql_dbg(ql_dbg_async, vha, 0x500e,
841 "Asynchronous P2P MODE received.\n");
1da177e4
LT		 842
843 /*
844 * Until there's a transition from loop down to loop up, treat
845 * this as loop down only.
846 */
e315cd28
AC		 847 if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
848 atomic_set(&vha->loop_state, LOOP_DOWN);
849 if (!atomic_read(&vha->loop_down_timer))
850 atomic_set(&vha->loop_down_timer,
1da177e4 851 LOOP_DOWN_TIME);
e315cd28 852 qla2x00_mark_all_devices_lost(vha, 1);
1da177e4
LT		 853 }
854
e315cd28
AC		 855 if (vha->vp_idx) {
856 atomic_set(&vha->vp_state, VP_FAILED);
857 fc_vport_set_state(vha->fc_vport, FC_VPORT_FAILED);
2c3dfe3f
SJ		 858 }
859
e315cd28
AC		 860 if (!(test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags)))
861 set_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
862
863 set_bit(REGISTER_FC4_NEEDED, &vha->dpc_flags);
864 set_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags);
4346b149
AV		 865
866 ha->flags.gpsc_supported = 1;
e315cd28 867 vha->flags.management_server_logged_in = 0;
1da177e4
LT		 868 break;
869
870 case MBA_CHG_IN_CONNECTION: /* Change in connection mode */
871 if (IS_QLA2100(ha))
872 break;
873
cfb0919c 874 ql_dbg(ql_dbg_async, vha, 0x500f,
1da177e4
LT		 875 "Configuration change detected: value=%x.\n", mb[1]);
876
e315cd28
AC		 877 if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
878 atomic_set(&vha->loop_state, LOOP_DOWN);
879 if (!atomic_read(&vha->loop_down_timer))
880 atomic_set(&vha->loop_down_timer,
1da177e4 881 LOOP_DOWN_TIME);
e315cd28 882 qla2x00_mark_all_devices_lost(vha, 1);
1da177e4
LT		 883 }
884
e315cd28
AC		 885 if (vha->vp_idx) {
886 atomic_set(&vha->vp_state, VP_FAILED);
887 fc_vport_set_state(vha->fc_vport, FC_VPORT_FAILED);
2c3dfe3f
SJ		 888 }
889
e315cd28
AC		 890 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
891 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
1da177e4
LT		 892 break;
893
894 case MBA_PORT_UPDATE: /* Port database update */
55903b9d
SV		 895 /*
896 * Handle only global and vn-port update events
897 *
898 * Relevant inputs:
899 * mb[1] = N_Port handle of changed port
900 * OR 0xffff for global event
901 * mb[2] = New login state
902 * 7 = Port logged out
903 * mb[3] = LSB is vp_idx, 0xff = all vps
904 *
905 * Skip processing if:
906 * Event is global, vp_idx is NOT all vps,
907 * vp_idx does not match
908 * Event is not global, vp_idx does not match
909 */
12cec63e
AV		 910 if (IS_QLA2XXX_MIDTYPE(ha) &&
911 ((mb[1] == 0xffff && (mb[3] & 0xff) != 0xff) ||
912 (mb[1] != 0xffff)) && vha->vp_idx != (mb[3] & 0xff))
913 break;
73208dfd 914
17cac3a1 915 if (mb[2] == 0x7) {
7c3df132 916 ql_dbg(ql_dbg_async, vha, 0x5010,
17cac3a1
JC		 917 "Port %s %04x %04x %04x.\n",
918 mb[1] == 0xffff ? "unavailable" : "logout",
7c3df132 919 mb[1], mb[2], mb[3]);
17cac3a1
JC		 920
921 if (mb[1] == 0xffff)
922 goto global_port_update;
923
924 /* Port logout */
925 fcport = qla2x00_find_fcport_by_loopid(vha, mb[1]);
926 if (!fcport)
927 break;
928 if (atomic_read(&fcport->state) != FCS_ONLINE)
929 break;
930 ql_dbg(ql_dbg_async, vha, 0x508a,
931 "Marking port lost loopid=%04x portid=%06x.\n",
932 fcport->loop_id, fcport->d_id.b24);
933 qla2x00_mark_device_lost(fcport->vha, fcport, 1, 1);
934 break;
935
936global_port_update:
9764ff88
AV		 937 if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
938 atomic_set(&vha->loop_state, LOOP_DOWN);
939 atomic_set(&vha->loop_down_timer,
940 LOOP_DOWN_TIME);
941 vha->device_flags |= DFLG_NO_CABLE;
942 qla2x00_mark_all_devices_lost(vha, 1);
943 }
944
945 if (vha->vp_idx) {
946 atomic_set(&vha->vp_state, VP_FAILED);
947 fc_vport_set_state(vha->fc_vport,
948 FC_VPORT_FAILED);
faadc5e7 949 qla2x00_mark_all_devices_lost(vha, 1);
9764ff88
AV		 950 }
951
952 vha->flags.management_server_logged_in = 0;
953 ha->link_data_rate = PORT_SPEED_UNKNOWN;
954 break;
955 }
956
1da177e4 957 /*
cc3ef7bc 958 * If PORT UPDATE is global (received LIP_OCCURRED/LIP_RESET
1da177e4
LT		 959 * event etc. earlier indicating loop is down) then process
960 * it. Otherwise ignore it and Wait for RSCN to come in.
961 */
e315cd28 962 atomic_set(&vha->loop_down_timer, 0);
8e5a9484
CD		 963 if (atomic_read(&vha->loop_state) != LOOP_DOWN &&
964 atomic_read(&vha->loop_state) != LOOP_DEAD) {
7c3df132
SK		 965 ql_dbg(ql_dbg_async, vha, 0x5011,
966 "Asynchronous PORT UPDATE ignored %04x/%04x/%04x.\n",
967 mb[1], mb[2], mb[3]);
2d70c103
NB		 968
969 qlt_async_event(mb[0], vha, mb);
1da177e4
LT		 970 break;
971 }
972
7c3df132
SK		 973 ql_dbg(ql_dbg_async, vha, 0x5012,
974 "Port database changed %04x %04x %04x.\n",
975 mb[1], mb[2], mb[3]);
1da177e4
LT		 976
977 /*
978 * Mark all devices as missing so we will login again.
979 */
e315cd28 980 atomic_set(&vha->loop_state, LOOP_UP);
1da177e4 981
e315cd28 982 qla2x00_mark_all_devices_lost(vha, 1);
1da177e4 983
2d70c103
NB		 984 if (vha->vp_idx == 0 && !qla_ini_mode_enabled(vha))
985 set_bit(SCR_PENDING, &vha->dpc_flags);
986
e315cd28
AC		 987 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
988 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
ded6411f 989 set_bit(VP_CONFIG_OK, &vha->vp_flags);
2d70c103
NB		 990
991 qlt_async_event(mb[0], vha, mb);
1da177e4
LT		 992 break;
993
994 case MBA_RSCN_UPDATE: /* State Change Registration */
3c397400 995 /* Check if the Vport has issued a SCR */
e315cd28 996 if (vha->vp_idx && test_bit(VP_SCR_NEEDED, &vha->vp_flags))
3c397400
SJ		 997 break;
998 /* Only handle SCNs for our Vport index. */
0d6e61bc 999 if (ha->flags.npiv_supported && vha->vp_idx != (mb[3] & 0xff))
3c397400 1000 break;
0d6e61bc 1001
7c3df132
SK		 1002 ql_dbg(ql_dbg_async, vha, 0x5013,
1003 "RSCN database changed -- %04x %04x %04x.\n",
1004 mb[1], mb[2], mb[3]);
1da177e4 1005
59d72d87 1006 rscn_entry = ((mb[1] & 0xff) << 16) | mb[2];
e315cd28
AC		 1007 host_pid = (vha->d_id.b.domain << 16) | (vha->d_id.b.area << 8)
1008 | vha->d_id.b.al_pa;
1da177e4 1009 if (rscn_entry == host_pid) {
7c3df132
SK		 1010 ql_dbg(ql_dbg_async, vha, 0x5014,
1011 "Ignoring RSCN update to local host "
1012 "port ID (%06x).\n", host_pid);
1da177e4
LT		 1013 break;
1014 }
1015
59d72d87
RA		 1016 /* Ignore reserved bits from RSCN-payload. */
1017 rscn_entry = ((mb[1] & 0x3ff) << 16) | mb[2];
1da177e4 1018
bb4cf5b7
CD		 1019 /* Skip RSCNs for virtual ports on the same physical port */
1020 if (qla2x00_is_a_vp_did(vha, rscn_entry))
1021 break;
1022
ef86cb20
CD		 1023 /*
1024 * Search for the rport related to this RSCN entry and mark it
1025 * as lost.
1026 */
1027 list_for_each_entry(fcport, &vha->vp_fcports, list) {
1028 if (atomic_read(&fcport->state) != FCS_ONLINE)
1029 continue;
ef86cb20
CD		 1030 if (fcport->d_id.b24 == rscn_entry) {
1031 qla2x00_mark_device_lost(vha, fcport, 0, 0);
1032 break;
1033 }
1034 }
1035
e315cd28
AC		 1036 atomic_set(&vha->loop_down_timer, 0);
1037 vha->flags.management_server_logged_in = 0;
1da177e4 1038
e315cd28
AC		 1039 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
1040 set_bit(RSCN_UPDATE, &vha->dpc_flags);
1041 qla2x00_post_aen_work(vha, FCH_EVT_RSCN, rscn_entry);
1da177e4
LT		 1042 break;
1043
1044 /* case MBA_RIO_RESPONSE: */
1045 case MBA_ZIO_RESPONSE:
7c3df132
SK		 1046 ql_dbg(ql_dbg_async, vha, 0x5015,
1047 "[R|Z]IO update completion.\n");
1da177e4 1048
e428924c 1049 if (IS_FWI2_CAPABLE(ha))
2afa19a9 1050 qla24xx_process_response_queue(vha, rsp);
4fdfefe5 1051 else
73208dfd 1052 qla2x00_process_response_queue(rsp);
1da177e4 1053 break;
9a853f71
AV		 1054
1055 case MBA_DISCARD_RND_FRAME:
7c3df132
SK		 1056 ql_dbg(ql_dbg_async, vha, 0x5016,
1057 "Discard RND Frame -- %04x %04x %04x.\n",
1058 mb[1], mb[2], mb[3]);
9a853f71 1059 break;
45ebeb56
AV		 1060
1061 case MBA_TRACE_NOTIFICATION:
7c3df132
SK		 1062 ql_dbg(ql_dbg_async, vha, 0x5017,
1063 "Trace Notification -- %04x %04x.\n", mb[1], mb[2]);
45ebeb56 1064 break;
4d4df193
HK		 1065
1066 case MBA_ISP84XX_ALERT:
7c3df132
SK		 1067 ql_dbg(ql_dbg_async, vha, 0x5018,
1068 "ISP84XX Alert Notification -- %04x %04x %04x.\n",
1069 mb[1], mb[2], mb[3]);
4d4df193
HK		 1070
1071 spin_lock_irqsave(&ha->cs84xx->access_lock, flags);
1072 switch (mb[1]) {
1073 case A84_PANIC_RECOVERY:
7c3df132
SK		 1074 ql_log(ql_log_info, vha, 0x5019,
1075 "Alert 84XX: panic recovery %04x %04x.\n",
1076 mb[2], mb[3]);
4d4df193
HK		 1077 break;
1078 case A84_OP_LOGIN_COMPLETE:
1079 ha->cs84xx->op_fw_version = mb[3] << 16 | mb[2];
7c3df132
SK		 1080 ql_log(ql_log_info, vha, 0x501a,
1081 "Alert 84XX: firmware version %x.\n",
1082 ha->cs84xx->op_fw_version);
4d4df193
HK		 1083 break;
1084 case A84_DIAG_LOGIN_COMPLETE:
1085 ha->cs84xx->diag_fw_version = mb[3] << 16 | mb[2];
7c3df132
SK		 1086 ql_log(ql_log_info, vha, 0x501b,
1087 "Alert 84XX: diagnostic firmware version %x.\n",
1088 ha->cs84xx->diag_fw_version);
4d4df193
HK		 1089 break;
1090 case A84_GOLD_LOGIN_COMPLETE:
1091 ha->cs84xx->diag_fw_version = mb[3] << 16 | mb[2];
1092 ha->cs84xx->fw_update = 1;
7c3df132
SK		 1093 ql_log(ql_log_info, vha, 0x501c,
1094 "Alert 84XX: gold firmware version %x.\n",
1095 ha->cs84xx->gold_fw_version);
4d4df193
HK		 1096 break;
1097 default:
7c3df132
SK		 1098 ql_log(ql_log_warn, vha, 0x501d,
1099 "Alert 84xx: Invalid Alert %04x %04x %04x.\n",
4d4df193
HK		 1100 mb[1], mb[2], mb[3]);
1101 }
1102 spin_unlock_irqrestore(&ha->cs84xx->access_lock, flags);
1103 break;
3a03eb79 1104 case MBA_DCBX_START:
7c3df132
SK		 1105 ql_dbg(ql_dbg_async, vha, 0x501e,
1106 "DCBX Started -- %04x %04x %04x.\n",
1107 mb[1], mb[2], mb[3]);
3a03eb79
AV		 1108 break;
1109 case MBA_DCBX_PARAM_UPDATE:
7c3df132
SK		 1110 ql_dbg(ql_dbg_async, vha, 0x501f,
1111 "DCBX Parameters Updated -- %04x %04x %04x.\n",
1112 mb[1], mb[2], mb[3]);
3a03eb79
AV		 1113 break;
1114 case MBA_FCF_CONF_ERR:
7c3df132
SK		 1115 ql_dbg(ql_dbg_async, vha, 0x5020,
1116 "FCF Configuration Error -- %04x %04x %04x.\n",
1117 mb[1], mb[2], mb[3]);
3a03eb79 1118 break;
3a03eb79 1119 case MBA_IDC_NOTIFY:
7ec0effd 1120 if (IS_QLA8031(vha->hw) || IS_QLA8044(ha)) {
67b2a31f
CD		 1121 mb[4] = RD_REG_WORD(&reg24->mailbox4);
1122 if (((mb[2] & 0x7fff) == MBC_PORT_RESET ||
1123 (mb[2] & 0x7fff) == MBC_SET_PORT_CONFIG) &&
1124 (mb[4] & INTERNAL_LOOPBACK_MASK) != 0) {
8fcd6b8b 1125 set_bit(ISP_QUIESCE_NEEDED, &vha->dpc_flags);
67b2a31f
CD		 1126 /*
1127 * Extend loop down timer since port is active.
1128 */
1129 if (atomic_read(&vha->loop_state) == LOOP_DOWN)
1130 atomic_set(&vha->loop_down_timer,
1131 LOOP_DOWN_TIME);
8fcd6b8b
CD		 1132 qla2xxx_wake_dpc(vha);
1133 }
67b2a31f 1134 }
8fcd6b8b 1135 case MBA_IDC_COMPLETE:
9aaf2cea 1136 if (ha->notify_lb_portup_comp && !vha->vp_idx)
f356bef1
CD		 1137 complete(&ha->lb_portup_comp);
1138 /* Fallthru */
3a03eb79 1139 case MBA_IDC_TIME_EXT:
7ec0effd
AD		 1140 if (IS_QLA81XX(vha->hw) || IS_QLA8031(vha->hw) ||
1141 IS_QLA8044(ha))
7d613ac6
SV		 1142 qla81xx_idc_event(vha, mb[0], mb[1]);
1143 break;
1144
1145 case MBA_IDC_AEN:
1146 mb[4] = RD_REG_WORD(&reg24->mailbox4);
1147 mb[5] = RD_REG_WORD(&reg24->mailbox5);
1148 mb[6] = RD_REG_WORD(&reg24->mailbox6);
1149 mb[7] = RD_REG_WORD(&reg24->mailbox7);
1150 qla83xx_handle_8200_aen(vha, mb);
3a03eb79 1151 break;
7d613ac6 1152
b5a340dd
JC		 1153 case MBA_DPORT_DIAGNOSTICS:
1154 ql_dbg(ql_dbg_async, vha, 0x5052,
1155 "D-Port Diagnostics: %04x %04x=%s\n", mb[0], mb[1],
1156 mb[1] == 0 ? "start" :
1157 mb[1] == 1 ? "done (ok)" :
1158 mb[1] == 2 ? "done (error)" : "other");
1159 break;
1160
6246b8a1
GM		 1161 default:
1162 ql_dbg(ql_dbg_async, vha, 0x5057,
1163 "Unknown AEN:%04x %04x %04x %04x\n",
1164 mb[0], mb[1], mb[2], mb[3]);
1da177e4 1165 }
2c3dfe3f 1166
2d70c103
NB		 1167 qlt_async_event(mb[0], vha, mb);
1168
e315cd28 1169 if (!vha->vp_idx && ha->num_vhosts)
73208dfd 1170 qla2x00_alert_all_vps(rsp, mb);
1da177e4
LT		 1171}
1172
1173/**
1174 * qla2x00_process_completed_request() - Process a Fast Post response.
1175 * @ha: SCSI driver HA context
1176 * @index: SRB index
1177 */
8ae6d9c7 1178void
73208dfd 1179qla2x00_process_completed_request(struct scsi_qla_host *vha,
8ae6d9c7 1180 struct req_que *req, uint32_t index)
1da177e4
LT		 1181{
1182 srb_t *sp;
e315cd28 1183 struct qla_hw_data *ha = vha->hw;
1da177e4
LT		 1184
1185 /* Validate handle. */
8d93f550 1186 if (index >= req->num_outstanding_cmds) {
7c3df132
SK		 1187 ql_log(ql_log_warn, vha, 0x3014,
1188 "Invalid SCSI command index (%x).\n", index);
1da177e4 1189
7ec0effd 1190 if (IS_P3P_TYPE(ha))
8f7daead
GM		 1191 set_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags);
1192 else
1193 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
1da177e4
LT		 1194 return;
1195 }
1196
e315cd28 1197 sp = req->outstanding_cmds[index];
1da177e4
LT		 1198 if (sp) {
1199 /* Free outstanding command slot. */
e315cd28 1200 req->outstanding_cmds[index] = NULL;
1da177e4 1201
1da177e4 1202 /* Save ISP completion status */
9ba56b95 1203 sp->done(ha, sp, DID_OK << 16);
1da177e4 1204 } else {
7c3df132 1205 ql_log(ql_log_warn, vha, 0x3016, "Invalid SCSI SRB.\n");
1da177e4 1206
7ec0effd 1207 if (IS_P3P_TYPE(ha))
8f7daead
GM		 1208 set_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags);
1209 else
1210 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
1da177e4
LT		 1211 }
1212}
1213
8ae6d9c7 1214srb_t *
ac280b67
AV		 1215qla2x00_get_sp_from_handle(scsi_qla_host_t *vha, const char *func,
1216 struct req_que *req, void *iocb)
1217{
1218 struct qla_hw_data *ha = vha->hw;
1219 sts_entry_t *pkt = iocb;
1220 srb_t *sp = NULL;
1221 uint16_t index;
1222
1223 index = LSW(pkt->handle);
8d93f550 1224 if (index >= req->num_outstanding_cmds) {
7c3df132
SK		 1225 ql_log(ql_log_warn, vha, 0x5031,
1226 "Invalid command index (%x).\n", index);
7ec0effd 1227 if (IS_P3P_TYPE(ha))
8f7daead
GM		 1228 set_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags);
1229 else
1230 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
ac280b67
AV		 1231 goto done;
1232 }
1233 sp = req->outstanding_cmds[index];
1234 if (!sp) {
7c3df132
SK		 1235 ql_log(ql_log_warn, vha, 0x5032,
1236 "Invalid completion handle (%x) -- timed-out.\n", index);
ac280b67
AV		 1237 return sp;
1238 }
1239 if (sp->handle != index) {
7c3df132
SK		 1240 ql_log(ql_log_warn, vha, 0x5033,
1241 "SRB handle (%x) mismatch %x.\n", sp->handle, index);
ac280b67
AV		 1242 return NULL;
1243 }
9a069e19 1244
ac280b67 1245 req->outstanding_cmds[index] = NULL;
9a069e19 1246
ac280b67
AV		 1247done:
1248 return sp;
1249}
1250
1251static void
1252qla2x00_mbx_iocb_entry(scsi_qla_host_t *vha, struct req_que *req,
1253 struct mbx_entry *mbx)
1254{
1255 const char func[] = "MBX-IOCB";
1256 const char *type;
ac280b67
AV		 1257 fc_port_t *fcport;
1258 srb_t *sp;
4916392b 1259 struct srb_iocb *lio;
99b0bec7 1260 uint16_t *data;
5ff1d584 1261 uint16_t status;
ac280b67
AV		 1262
1263 sp = qla2x00_get_sp_from_handle(vha, func, req, mbx);
1264 if (!sp)
1265 return;
1266
9ba56b95
GM		 1267 lio = &sp->u.iocb_cmd;
1268 type = sp->name;
ac280b67 1269 fcport = sp->fcport;
4916392b 1270 data = lio->u.logio.data;
ac280b67 1271
5ff1d584 1272 data[0] = MBS_COMMAND_ERROR;
4916392b 1273 data[1] = lio->u.logio.flags & SRB_LOGIN_RETRIED ?
5ff1d584 1274 QLA_LOGIO_LOGIN_RETRIED : 0;
ac280b67 1275 if (mbx->entry_status) {
7c3df132 1276 ql_dbg(ql_dbg_async, vha, 0x5043,
cfb0919c 1277 "Async-%s error entry - hdl=%x portid=%02x%02x%02x "
d3fa9e7d 1278 "entry-status=%x status=%x state-flag=%x "
cfb0919c
CD		 1279 "status-flags=%x.\n", type, sp->handle,
1280 fcport->d_id.b.domain, fcport->d_id.b.area,
d3fa9e7d
AV		 1281 fcport->d_id.b.al_pa, mbx->entry_status,
1282 le16_to_cpu(mbx->status), le16_to_cpu(mbx->state_flags),
7c3df132 1283 le16_to_cpu(mbx->status_flags));
d3fa9e7d 1284
cfb0919c 1285 ql_dump_buffer(ql_dbg_async + ql_dbg_buffer, vha, 0x5029,
7c3df132 1286 (uint8_t *)mbx, sizeof(*mbx));
ac280b67 1287
99b0bec7 1288 goto logio_done;
ac280b67
AV		 1289 }
1290
5ff1d584 1291 status = le16_to_cpu(mbx->status);
9ba56b95 1292 if (status == 0x30 && sp->type == SRB_LOGIN_CMD &&
5ff1d584
AV		 1293 le16_to_cpu(mbx->mb0) == MBS_COMMAND_COMPLETE)
1294 status = 0;
1295 if (!status && le16_to_cpu(mbx->mb0) == MBS_COMMAND_COMPLETE) {
7c3df132 1296 ql_dbg(ql_dbg_async, vha, 0x5045,
cfb0919c
CD		 1297 "Async-%s complete - hdl=%x portid=%02x%02x%02x mbx1=%x.\n",
1298 type, sp->handle, fcport->d_id.b.domain,
1299 fcport->d_id.b.area, fcport->d_id.b.al_pa,
1300 le16_to_cpu(mbx->mb1));
ac280b67
AV		 1301
1302 data[0] = MBS_COMMAND_COMPLETE;
9ba56b95 1303 if (sp->type == SRB_LOGIN_CMD) {
99b0bec7
AV		 1304 fcport->port_type = FCT_TARGET;
1305 if (le16_to_cpu(mbx->mb1) & BIT_0)
1306 fcport->port_type = FCT_INITIATOR;
6ac52608 1307 else if (le16_to_cpu(mbx->mb1) & BIT_1)
99b0bec7 1308 fcport->flags |= FCF_FCP2_DEVICE;
5ff1d584 1309 }
99b0bec7 1310 goto logio_done;
ac280b67
AV		 1311 }
1312
1313 data[0] = le16_to_cpu(mbx->mb0);
1314 switch (data[0]) {
1315 case MBS_PORT_ID_USED:
1316 data[1] = le16_to_cpu(mbx->mb1);
1317 break;
1318 case MBS_LOOP_ID_USED:
1319 break;
1320 default:
1321 data[0] = MBS_COMMAND_ERROR;
ac280b67
AV		 1322 break;
1323 }
1324
7c3df132 1325 ql_log(ql_log_warn, vha, 0x5046,
cfb0919c
CD		 1326 "Async-%s failed - hdl=%x portid=%02x%02x%02x status=%x "
1327 "mb0=%x mb1=%x mb2=%x mb6=%x mb7=%x.\n", type, sp->handle,
1328 fcport->d_id.b.domain, fcport->d_id.b.area, fcport->d_id.b.al_pa,
1329 status, le16_to_cpu(mbx->mb0), le16_to_cpu(mbx->mb1),
ac280b67 1330 le16_to_cpu(mbx->mb2), le16_to_cpu(mbx->mb6),
7c3df132 1331 le16_to_cpu(mbx->mb7));
ac280b67 1332
99b0bec7 1333logio_done:
9ba56b95 1334 sp->done(vha, sp, 0);
ac280b67
AV		 1335}
1336
9bc4f4fb
HZ		 1337static void
1338qla2x00_ct_entry(scsi_qla_host_t *vha, struct req_que *req,
1339 sts_entry_t *pkt, int iocb_type)
1340{
1341 const char func[] = "CT_IOCB";
1342 const char *type;
9bc4f4fb 1343 srb_t *sp;
9bc4f4fb
HZ		 1344 struct fc_bsg_job *bsg_job;
1345 uint16_t comp_status;
9ba56b95 1346 int res;
9bc4f4fb
HZ		 1347
1348 sp = qla2x00_get_sp_from_handle(vha, func, req, pkt);
1349 if (!sp)
1350 return;
1351
9ba56b95 1352 bsg_job = sp->u.bsg_job;
9bc4f4fb 1353
9ba56b95 1354 type = "ct pass-through";
9bc4f4fb
HZ		 1355
1356 comp_status = le16_to_cpu(pkt->comp_status);
1357
1358 /* return FC_CTELS_STATUS_OK and leave the decoding of the ELS/CT
1359 * fc payload to the caller
1360 */
1361 bsg_job->reply->reply_data.ctels_reply.status = FC_CTELS_STATUS_OK;
1362 bsg_job->reply_len = sizeof(struct fc_bsg_reply);
1363
1364 if (comp_status != CS_COMPLETE) {
1365 if (comp_status == CS_DATA_UNDERRUN) {
9ba56b95 1366 res = DID_OK << 16;
9bc4f4fb
HZ		 1367 bsg_job->reply->reply_payload_rcv_len =
1368 le16_to_cpu(((sts_entry_t *)pkt)->rsp_info_len);
1369
7c3df132
SK		 1370 ql_log(ql_log_warn, vha, 0x5048,
1371 "CT pass-through-%s error "
9bc4f4fb 1372 "comp_status-status=0x%x total_byte = 0x%x.\n",
7c3df132
SK		 1373 type, comp_status,
1374 bsg_job->reply->reply_payload_rcv_len);
9bc4f4fb 1375 } else {
7c3df132
SK		 1376 ql_log(ql_log_warn, vha, 0x5049,
1377 "CT pass-through-%s error "
1378 "comp_status-status=0x%x.\n", type, comp_status);
9ba56b95 1379 res = DID_ERROR << 16;
9bc4f4fb
HZ		 1380 bsg_job->reply->reply_payload_rcv_len = 0;
1381 }
cfb0919c 1382 ql_dump_buffer(ql_dbg_async + ql_dbg_buffer, vha, 0x5035,
7c3df132 1383 (uint8_t *)pkt, sizeof(*pkt));
9bc4f4fb 1384 } else {
9ba56b95 1385 res = DID_OK << 16;
9bc4f4fb
HZ		 1386 bsg_job->reply->reply_payload_rcv_len =
1387 bsg_job->reply_payload.payload_len;
1388 bsg_job->reply_len = 0;
1389 }
1390
9ba56b95 1391 sp->done(vha, sp, res);
9bc4f4fb
HZ		 1392}
1393
9a069e19
GM		 1394static void
1395qla24xx_els_ct_entry(scsi_qla_host_t *vha, struct req_que *req,
1396 struct sts_entry_24xx *pkt, int iocb_type)
1397{
1398 const char func[] = "ELS_CT_IOCB";
1399 const char *type;
9a069e19 1400 srb_t *sp;
9a069e19
GM		 1401 struct fc_bsg_job *bsg_job;
1402 uint16_t comp_status;
1403 uint32_t fw_status[3];
1404 uint8_t* fw_sts_ptr;
9ba56b95 1405 int res;
9a069e19
GM		 1406
1407 sp = qla2x00_get_sp_from_handle(vha, func, req, pkt);
1408 if (!sp)
1409 return;
9ba56b95 1410 bsg_job = sp->u.bsg_job;
9a069e19
GM		 1411
1412 type = NULL;
9ba56b95 1413 switch (sp->type) {
9a069e19
GM		 1414 case SRB_ELS_CMD_RPT:
1415 case SRB_ELS_CMD_HST:
1416 type = "els";
1417 break;
1418 case SRB_CT_CMD:
1419 type = "ct pass-through";
1420 break;
6eb54715
HM		 1421 case SRB_ELS_DCMD:
1422 type = "Driver ELS logo";
1423 ql_dbg(ql_dbg_user, vha, 0x5047,
1424 "Completing %s: (%p) type=%d.\n", type, sp, sp->type);
1425 sp->done(vha, sp, 0);
1426 return;
9a069e19 1427 default:
37fed3ee 1428 ql_dbg(ql_dbg_user, vha, 0x503e,
9ba56b95 1429 "Unrecognized SRB: (%p) type=%d.\n", sp, sp->type);
9a069e19
GM		 1430 return;
1431 }
1432
1433 comp_status = fw_status[0] = le16_to_cpu(pkt->comp_status);
1434 fw_status[1] = le16_to_cpu(((struct els_sts_entry_24xx*)pkt)->error_subcode_1);
1435 fw_status[2] = le16_to_cpu(((struct els_sts_entry_24xx*)pkt)->error_subcode_2);
1436
1437 /* return FC_CTELS_STATUS_OK and leave the decoding of the ELS/CT
1438 * fc payload to the caller
1439 */
1440 bsg_job->reply->reply_data.ctels_reply.status = FC_CTELS_STATUS_OK;
1441 bsg_job->reply_len = sizeof(struct fc_bsg_reply) + sizeof(fw_status);
1442
1443 if (comp_status != CS_COMPLETE) {
1444 if (comp_status == CS_DATA_UNDERRUN) {
9ba56b95 1445 res = DID_OK << 16;
9a069e19 1446 bsg_job->reply->reply_payload_rcv_len =
9ba56b95 1447 le16_to_cpu(((struct els_sts_entry_24xx *)pkt)->total_byte_count);
9a069e19 1448
37fed3ee 1449 ql_dbg(ql_dbg_user, vha, 0x503f,
cfb0919c 1450 "ELS-CT pass-through-%s error hdl=%x comp_status-status=0x%x "
9a069e19 1451 "error subcode 1=0x%x error subcode 2=0x%x total_byte = 0x%x.\n",
cfb0919c 1452 type, sp->handle, comp_status, fw_status[1], fw_status[2],
7c3df132
SK		 1453 le16_to_cpu(((struct els_sts_entry_24xx *)
1454 pkt)->total_byte_count));
9a069e19
GM		 1455 fw_sts_ptr = ((uint8_t*)bsg_job->req->sense) + sizeof(struct fc_bsg_reply);
1456 memcpy( fw_sts_ptr, fw_status, sizeof(fw_status));
1457 }
1458 else {
37fed3ee 1459 ql_dbg(ql_dbg_user, vha, 0x5040,
cfb0919c 1460 "ELS-CT pass-through-%s error hdl=%x comp_status-status=0x%x "
9a069e19 1461 "error subcode 1=0x%x error subcode 2=0x%x.\n",
cfb0919c 1462 type, sp->handle, comp_status,
7c3df132
SK		 1463 le16_to_cpu(((struct els_sts_entry_24xx *)
1464 pkt)->error_subcode_1),
1465 le16_to_cpu(((struct els_sts_entry_24xx *)
1466 pkt)->error_subcode_2));
9ba56b95 1467 res = DID_ERROR << 16;
9a069e19
GM		 1468 bsg_job->reply->reply_payload_rcv_len = 0;
1469 fw_sts_ptr = ((uint8_t*)bsg_job->req->sense) + sizeof(struct fc_bsg_reply);
1470 memcpy( fw_sts_ptr, fw_status, sizeof(fw_status));
1471 }
37fed3ee 1472 ql_dump_buffer(ql_dbg_user + ql_dbg_buffer, vha, 0x5056,
7c3df132 1473 (uint8_t *)pkt, sizeof(*pkt));
9a069e19
GM		 1474 }
1475 else {
9ba56b95 1476 res = DID_OK << 16;
9a069e19
GM		 1477 bsg_job->reply->reply_payload_rcv_len = bsg_job->reply_payload.payload_len;
1478 bsg_job->reply_len = 0;
1479 }
1480
9ba56b95 1481 sp->done(vha, sp, res);
9a069e19
GM		 1482}
1483
ac280b67
AV		 1484static void
1485qla24xx_logio_entry(scsi_qla_host_t *vha, struct req_que *req,
1486 struct logio_entry_24xx *logio)
1487{
1488 const char func[] = "LOGIO-IOCB";
1489 const char *type;
ac280b67
AV		 1490 fc_port_t *fcport;
1491 srb_t *sp;
4916392b 1492 struct srb_iocb *lio;
99b0bec7 1493 uint16_t *data;
ac280b67
AV		 1494 uint32_t iop[2];
1495
1496 sp = qla2x00_get_sp_from_handle(vha, func, req, logio);
1497 if (!sp)
1498 return;
1499
9ba56b95
GM		 1500 lio = &sp->u.iocb_cmd;
1501 type = sp->name;
ac280b67 1502 fcport = sp->fcport;
4916392b 1503 data = lio->u.logio.data;
ac280b67 1504
5ff1d584 1505 data[0] = MBS_COMMAND_ERROR;
4916392b 1506 data[1] = lio->u.logio.flags & SRB_LOGIN_RETRIED ?
5ff1d584 1507 QLA_LOGIO_LOGIN_RETRIED : 0;
ac280b67 1508 if (logio->entry_status) {
5e19ed90 1509 ql_log(ql_log_warn, fcport->vha, 0x5034,
cfb0919c 1510 "Async-%s error entry - hdl=%x"
d3fa9e7d 1511 "portid=%02x%02x%02x entry-status=%x.\n",
cfb0919c
CD		 1512 type, sp->handle, fcport->d_id.b.domain,
1513 fcport->d_id.b.area, fcport->d_id.b.al_pa,
1514 logio->entry_status);
1515 ql_dump_buffer(ql_dbg_async + ql_dbg_buffer, vha, 0x504d,
7c3df132 1516 (uint8_t *)logio, sizeof(*logio));
ac280b67 1517
99b0bec7 1518 goto logio_done;
ac280b67
AV		 1519 }
1520
1521 if (le16_to_cpu(logio->comp_status) == CS_COMPLETE) {
5e19ed90 1522 ql_dbg(ql_dbg_async, fcport->vha, 0x5036,
cfb0919c
CD		 1523 "Async-%s complete - hdl=%x portid=%02x%02x%02x "
1524 "iop0=%x.\n", type, sp->handle, fcport->d_id.b.domain,
1525 fcport->d_id.b.area, fcport->d_id.b.al_pa,
7c3df132 1526 le32_to_cpu(logio->io_parameter[0]));
ac280b67
AV		 1527
1528 data[0] = MBS_COMMAND_COMPLETE;
9ba56b95 1529 if (sp->type != SRB_LOGIN_CMD)
99b0bec7 1530 goto logio_done;
ac280b67
AV		 1531
1532 iop[0] = le32_to_cpu(logio->io_parameter[0]);
1533 if (iop[0] & BIT_4) {
1534 fcport->port_type = FCT_TARGET;
1535 if (iop[0] & BIT_8)
8474f3a0 1536 fcport->flags |= FCF_FCP2_DEVICE;
b0cd579c 1537 } else if (iop[0] & BIT_5)
ac280b67 1538 fcport->port_type = FCT_INITIATOR;
b0cd579c 1539
2d70c103
NB		 1540 if (iop[0] & BIT_7)
1541 fcport->flags |= FCF_CONF_COMP_SUPPORTED;
1542
ac280b67
AV		 1543 if (logio->io_parameter[7] || logio->io_parameter[8])
1544 fcport->supported_classes |= FC_COS_CLASS2;
1545 if (logio->io_parameter[9] || logio->io_parameter[10])
1546 fcport->supported_classes |= FC_COS_CLASS3;
1547
99b0bec7 1548 goto logio_done;
ac280b67
AV		 1549 }
1550
1551 iop[0] = le32_to_cpu(logio->io_parameter[0]);
1552 iop[1] = le32_to_cpu(logio->io_parameter[1]);
1553 switch (iop[0]) {
1554 case LSC_SCODE_PORTID_USED:
1555 data[0] = MBS_PORT_ID_USED;
1556 data[1] = LSW(iop[1]);
1557 break;
1558 case LSC_SCODE_NPORT_USED:
1559 data[0] = MBS_LOOP_ID_USED;
1560 break;
ac280b67
AV		 1561 default:
1562 data[0] = MBS_COMMAND_ERROR;
ac280b67
AV		 1563 break;
1564 }
1565
5e19ed90 1566 ql_dbg(ql_dbg_async, fcport->vha, 0x5037,
cfb0919c
CD		 1567 "Async-%s failed - hdl=%x portid=%02x%02x%02x comp=%x "
1568 "iop0=%x iop1=%x.\n", type, sp->handle, fcport->d_id.b.domain,
d3fa9e7d 1569 fcport->d_id.b.area, fcport->d_id.b.al_pa,
ac280b67
AV		 1570 le16_to_cpu(logio->comp_status),
1571 le32_to_cpu(logio->io_parameter[0]),
7c3df132 1572 le32_to_cpu(logio->io_parameter[1]));
ac280b67 1573
99b0bec7 1574logio_done:
9ba56b95 1575 sp->done(vha, sp, 0);
ac280b67
AV		 1576}
1577
3822263e 1578static void
faef62d1 1579qla24xx_tm_iocb_entry(scsi_qla_host_t *vha, struct req_que *req, void *tsk)
3822263e
MI		 1580{
1581 const char func[] = "TMF-IOCB";
1582 const char *type;
1583 fc_port_t *fcport;
1584 srb_t *sp;
1585 struct srb_iocb *iocb;
3822263e 1586 struct sts_entry_24xx *sts = (struct sts_entry_24xx *)tsk;
3822263e
MI		 1587
1588 sp = qla2x00_get_sp_from_handle(vha, func, req, tsk);
1589 if (!sp)
1590 return;
1591
9ba56b95
GM		 1592 iocb = &sp->u.iocb_cmd;
1593 type = sp->name;
3822263e 1594 fcport = sp->fcport;
faef62d1 1595 iocb->u.tmf.data = QLA_SUCCESS;
3822263e
MI		 1596
1597 if (sts->entry_status) {
5e19ed90 1598 ql_log(ql_log_warn, fcport->vha, 0x5038,
cfb0919c
CD		 1599 "Async-%s error - hdl=%x entry-status(%x).\n",
1600 type, sp->handle, sts->entry_status);
faef62d1 1601 iocb->u.tmf.data = QLA_FUNCTION_FAILED;
ad950360 1602 } else if (sts->comp_status != cpu_to_le16(CS_COMPLETE)) {
5e19ed90 1603 ql_log(ql_log_warn, fcport->vha, 0x5039,
cfb0919c
CD		 1604 "Async-%s error - hdl=%x completion status(%x).\n",
1605 type, sp->handle, sts->comp_status);
faef62d1
AB		 1606 iocb->u.tmf.data = QLA_FUNCTION_FAILED;
1607 } else if ((le16_to_cpu(sts->scsi_status) &
3822263e 1608 SS_RESPONSE_INFO_LEN_VALID)) {
faef62d1
AB		 1609 if (le32_to_cpu(sts->rsp_data_len) < 4) {
1610 ql_log(ql_log_warn, fcport->vha, 0x503b,
1611 "Async-%s error - hdl=%x not enough response(%d).\n",
1612 type, sp->handle, sts->rsp_data_len);
1613 } else if (sts->data[3]) {
1614 ql_log(ql_log_warn, fcport->vha, 0x503c,
1615 "Async-%s error - hdl=%x response(%x).\n",
1616 type, sp->handle, sts->data[3]);
8d2b21db 1617 iocb->u.tmf.data = QLA_FUNCTION_FAILED;
faef62d1 1618 }
3822263e
MI		 1619 }
1620
faef62d1 1621 if (iocb->u.tmf.data != QLA_SUCCESS)
7c3df132
SK		 1622 ql_dump_buffer(ql_dbg_async + ql_dbg_buffer, vha, 0x5055,
1623 (uint8_t *)sts, sizeof(*sts));
3822263e 1624
9ba56b95 1625 sp->done(vha, sp, 0);
3822263e
MI		 1626}
1627
1da177e4
LT		 1628/**
1629 * qla2x00_process_response_queue() - Process response queue entries.
1630 * @ha: SCSI driver HA context
1631 */
1632void
73208dfd 1633qla2x00_process_response_queue(struct rsp_que *rsp)
1da177e4 1634{
73208dfd
AC		 1635 struct scsi_qla_host *vha;
1636 struct qla_hw_data *ha = rsp->hw;
3d71644c 1637 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1da177e4
LT		 1638 sts_entry_t *pkt;
1639 uint16_t handle_cnt;
1640 uint16_t cnt;
73208dfd 1641
2afa19a9 1642 vha = pci_get_drvdata(ha->pdev);
1da177e4 1643
e315cd28 1644 if (!vha->flags.online)
1da177e4
LT		 1645 return;
1646
e315cd28
AC		 1647 while (rsp->ring_ptr->signature != RESPONSE_PROCESSED) {
1648 pkt = (sts_entry_t *)rsp->ring_ptr;
1da177e4 1649
e315cd28
AC		 1650 rsp->ring_index++;
1651 if (rsp->ring_index == rsp->length) {
1652 rsp->ring_index = 0;
1653 rsp->ring_ptr = rsp->ring;
1da177e4 1654 } else {
e315cd28 1655 rsp->ring_ptr++;
1da177e4
LT		 1656 }
1657
1658 if (pkt->entry_status != 0) {
73208dfd 1659 qla2x00_error_entry(vha, rsp, pkt);
1da177e4
LT		 1660 ((response_t *)pkt)->signature = RESPONSE_PROCESSED;
1661 wmb();
1662 continue;
1663 }
1664
1665 switch (pkt->entry_type) {
1666 case STATUS_TYPE:
73208dfd 1667 qla2x00_status_entry(vha, rsp, pkt);
1da177e4
LT		 1668 break;
1669 case STATUS_TYPE_21:
1670 handle_cnt = ((sts21_entry_t *)pkt)->handle_count;
1671 for (cnt = 0; cnt < handle_cnt; cnt++) {
73208dfd 1672 qla2x00_process_completed_request(vha, rsp->req,
1da177e4
LT		 1673 ((sts21_entry_t *)pkt)->handle[cnt]);
1674 }
1675 break;
1676 case STATUS_TYPE_22:
1677 handle_cnt = ((sts22_entry_t *)pkt)->handle_count;
1678 for (cnt = 0; cnt < handle_cnt; cnt++) {
73208dfd 1679 qla2x00_process_completed_request(vha, rsp->req,
1da177e4
LT		 1680 ((sts22_entry_t *)pkt)->handle[cnt]);
1681 }
1682 break;
1683 case STATUS_CONT_TYPE:
2afa19a9 1684 qla2x00_status_cont_entry(rsp, (sts_cont_entry_t *)pkt);
1da177e4 1685 break;
ac280b67
AV		 1686 case MBX_IOCB_TYPE:
1687 qla2x00_mbx_iocb_entry(vha, rsp->req,
1688 (struct mbx_entry *)pkt);
3822263e 1689 break;
9bc4f4fb
HZ		 1690 case CT_IOCB_TYPE:
1691 qla2x00_ct_entry(vha, rsp->req, pkt, CT_IOCB_TYPE);
1692 break;
1da177e4
LT		 1693 default:
1694 /* Type Not Supported. */
7c3df132
SK		 1695 ql_log(ql_log_warn, vha, 0x504a,
1696 "Received unknown response pkt type %x "
1da177e4 1697 "entry status=%x.\n",
7c3df132 1698 pkt->entry_type, pkt->entry_status);
1da177e4
LT		 1699 break;
1700 }
1701 ((response_t *)pkt)->signature = RESPONSE_PROCESSED;
1702 wmb();
1703 }
1704
1705 /* Adjust ring index */
e315cd28 1706 WRT_REG_WORD(ISP_RSP_Q_OUT(ha, reg), rsp->ring_index);
1da177e4
LT		 1707}
1708
4733fcb1 1709static inline void
5544213b 1710qla2x00_handle_sense(srb_t *sp, uint8_t *sense_data, uint32_t par_sense_len,
9ba56b95 1711 uint32_t sense_len, struct rsp_que *rsp, int res)
4733fcb1 1712{
7c3df132 1713 struct scsi_qla_host *vha = sp->fcport->vha;
9ba56b95
GM		 1714 struct scsi_cmnd *cp = GET_CMD_SP(sp);
1715 uint32_t track_sense_len;
4733fcb1
AV		 1716
1717 if (sense_len >= SCSI_SENSE_BUFFERSIZE)
1718 sense_len = SCSI_SENSE_BUFFERSIZE;
1719
9ba56b95
GM		 1720 SET_CMD_SENSE_LEN(sp, sense_len);
1721 SET_CMD_SENSE_PTR(sp, cp->sense_buffer);
1722 track_sense_len = sense_len;
1723
1724 if (sense_len > par_sense_len)
5544213b 1725 sense_len = par_sense_len;
4733fcb1
AV		 1726
1727 memcpy(cp->sense_buffer, sense_data, sense_len);
1728
9ba56b95
GM		 1729 SET_CMD_SENSE_PTR(sp, cp->sense_buffer + sense_len);
1730 track_sense_len -= sense_len;
1731 SET_CMD_SENSE_LEN(sp, track_sense_len);
1732
1733 if (track_sense_len != 0) {
2afa19a9 1734 rsp->status_srb = sp;
9ba56b95
GM		 1735 cp->result = res;
1736 }
4733fcb1 1737
cfb0919c
CD		 1738 if (sense_len) {
1739 ql_dbg(ql_dbg_io + ql_dbg_buffer, vha, 0x301c,
9cb78c16 1740 "Check condition Sense data, nexus%ld:%d:%llu cmd=%p.\n",
cfb0919c
CD		 1741 sp->fcport->vha->host_no, cp->device->id, cp->device->lun,
1742 cp);
7c3df132
SK		 1743 ql_dump_buffer(ql_dbg_io + ql_dbg_buffer, vha, 0x302b,
1744 cp->sense_buffer, sense_len);
cfb0919c 1745 }
4733fcb1
AV		 1746}
1747
bad75002
AE		 1748struct scsi_dif_tuple {
1749 __be16 guard; /* Checksum */
d6a03581 1750 __be16 app_tag; /* APPL identifier */
bad75002
AE		 1751 __be32 ref_tag; /* Target LBA or indirect LBA */
1752};
1753
1754/*
1755 * Checks the guard or meta-data for the type of error
1756 * detected by the HBA. In case of errors, we set the
1757 * ASC/ASCQ fields in the sense buffer with ILLEGAL_REQUEST
1758 * to indicate to the kernel that the HBA detected error.
1759 */
8cb2049c 1760static inline int
bad75002
AE		 1761qla2x00_handle_dif_error(srb_t *sp, struct sts_entry_24xx *sts24)
1762{
7c3df132 1763 struct scsi_qla_host *vha = sp->fcport->vha;
9ba56b95 1764 struct scsi_cmnd *cmd = GET_CMD_SP(sp);
8cb2049c
AE		 1765 uint8_t *ap = &sts24->data[12];
1766 uint8_t *ep = &sts24->data[20];
bad75002
AE		 1767 uint32_t e_ref_tag, a_ref_tag;
1768 uint16_t e_app_tag, a_app_tag;
1769 uint16_t e_guard, a_guard;
1770
8cb2049c
AE		 1771 /*
1772 * swab32 of the "data" field in the beginning of qla2x00_status_entry()
1773 * would make guard field appear at offset 2
1774 */
1775 a_guard = le16_to_cpu(*(uint16_t *)(ap + 2));
1776 a_app_tag = le16_to_cpu(*(uint16_t *)(ap + 0));
1777 a_ref_tag = le32_to_cpu(*(uint32_t *)(ap + 4));
1778 e_guard = le16_to_cpu(*(uint16_t *)(ep + 2));
1779 e_app_tag = le16_to_cpu(*(uint16_t *)(ep + 0));
1780 e_ref_tag = le32_to_cpu(*(uint32_t *)(ep + 4));
bad75002 1781
7c3df132
SK		 1782 ql_dbg(ql_dbg_io, vha, 0x3023,
1783 "iocb(s) %p Returned STATUS.\n", sts24);
bad75002 1784
7c3df132
SK		 1785 ql_dbg(ql_dbg_io, vha, 0x3024,
1786 "DIF ERROR in cmd 0x%x lba 0x%llx act ref"
bad75002 1787 " tag=0x%x, exp ref_tag=0x%x, act app tag=0x%x, exp app"
7c3df132 1788 " tag=0x%x, act guard=0x%x, exp guard=0x%x.\n",
bad75002 1789 cmd->cmnd[0], (u64)scsi_get_lba(cmd), a_ref_tag, e_ref_tag,
7c3df132 1790 a_app_tag, e_app_tag, a_guard, e_guard);
bad75002 1791
8cb2049c
AE		 1792 /*
1793 * Ignore sector if:
1794 * For type 3: ref & app tag is all 'f's
1795 * For type 0,1,2: app tag is all 'f's
1796 */
1797 if ((a_app_tag == 0xffff) &&
1798 ((scsi_get_prot_type(cmd) != SCSI_PROT_DIF_TYPE3) ||
1799 (a_ref_tag == 0xffffffff))) {
1800 uint32_t blocks_done, resid;
1801 sector_t lba_s = scsi_get_lba(cmd);
1802
1803 /* 2TB boundary case covered automatically with this */
1804 blocks_done = e_ref_tag - (uint32_t)lba_s + 1;
1805
1806 resid = scsi_bufflen(cmd) - (blocks_done *
1807 cmd->device->sector_size);
1808
1809 scsi_set_resid(cmd, resid);
1810 cmd->result = DID_OK << 16;
1811
1812 /* Update protection tag */
1813 if (scsi_prot_sg_count(cmd)) {
1814 uint32_t i, j = 0, k = 0, num_ent;
1815 struct scatterlist *sg;
1816 struct sd_dif_tuple *spt;
1817
1818 /* Patch the corresponding protection tags */
1819 scsi_for_each_prot_sg(cmd, sg,
1820 scsi_prot_sg_count(cmd), i) {
1821 num_ent = sg_dma_len(sg) / 8;
1822 if (k + num_ent < blocks_done) {
1823 k += num_ent;
1824 continue;
1825 }
1826 j = blocks_done - k - 1;
1827 k = blocks_done;
1828 break;
1829 }
1830
1831 if (k != blocks_done) {
cfb0919c 1832 ql_log(ql_log_warn, vha, 0x302f,
8ec9c7fb
RD		 1833 "unexpected tag values tag:lba=%x:%llx)\n",
1834 e_ref_tag, (unsigned long long)lba_s);
8cb2049c
AE		 1835 return 1;
1836 }
1837
1838 spt = page_address(sg_page(sg)) + sg->offset;
1839 spt += j;
1840
1841 spt->app_tag = 0xffff;
1842 if (scsi_get_prot_type(cmd) == SCSI_PROT_DIF_TYPE3)
1843 spt->ref_tag = 0xffffffff;
1844 }
1845
1846 return 0;
1847 }
1848
bad75002
AE		 1849 /* check guard */
1850 if (e_guard != a_guard) {
1851 scsi_build_sense_buffer(1, cmd->sense_buffer, ILLEGAL_REQUEST,
1852 0x10, 0x1);
1853 set_driver_byte(cmd, DRIVER_SENSE);
1854 set_host_byte(cmd, DID_ABORT);
1855 cmd->result |= SAM_STAT_CHECK_CONDITION << 1;
8cb2049c 1856 return 1;
bad75002
AE		 1857 }
1858
e02587d7
AE		 1859 /* check ref tag */
1860 if (e_ref_tag != a_ref_tag) {
bad75002 1861 scsi_build_sense_buffer(1, cmd->sense_buffer, ILLEGAL_REQUEST,
e02587d7 1862 0x10, 0x3);
bad75002
AE		 1863 set_driver_byte(cmd, DRIVER_SENSE);
1864 set_host_byte(cmd, DID_ABORT);
1865 cmd->result |= SAM_STAT_CHECK_CONDITION << 1;
8cb2049c 1866 return 1;
bad75002
AE		 1867 }
1868
e02587d7
AE		 1869 /* check appl tag */
1870 if (e_app_tag != a_app_tag) {
bad75002 1871 scsi_build_sense_buffer(1, cmd->sense_buffer, ILLEGAL_REQUEST,
e02587d7 1872 0x10, 0x2);
bad75002
AE		 1873 set_driver_byte(cmd, DRIVER_SENSE);
1874 set_host_byte(cmd, DID_ABORT);
1875 cmd->result |= SAM_STAT_CHECK_CONDITION << 1;
8cb2049c 1876 return 1;
bad75002 1877 }
e02587d7 1878
8cb2049c 1879 return 1;
bad75002
AE		 1880}
1881
a9b6f722
SK		 1882static void
1883qla25xx_process_bidir_status_iocb(scsi_qla_host_t *vha, void *pkt,
1884 struct req_que *req, uint32_t index)
1885{
1886 struct qla_hw_data *ha = vha->hw;
1887 srb_t *sp;
1888 uint16_t comp_status;
1889 uint16_t scsi_status;
1890 uint16_t thread_id;
1891 uint32_t rval = EXT_STATUS_OK;
1892 struct fc_bsg_job *bsg_job = NULL;
1893 sts_entry_t *sts;
1894 struct sts_entry_24xx *sts24;
1895 sts = (sts_entry_t *) pkt;
1896 sts24 = (struct sts_entry_24xx *) pkt;
1897
1898 /* Validate handle. */
8d93f550 1899 if (index >= req->num_outstanding_cmds) {
a9b6f722
SK		 1900 ql_log(ql_log_warn, vha, 0x70af,
1901 "Invalid SCSI completion handle 0x%x.\n", index);
1902 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
1903 return;
1904 }
1905
1906 sp = req->outstanding_cmds[index];
1907 if (sp) {
1908 /* Free outstanding command slot. */
1909 req->outstanding_cmds[index] = NULL;
1910 bsg_job = sp->u.bsg_job;
1911 } else {
1912 ql_log(ql_log_warn, vha, 0x70b0,
1913 "Req:%d: Invalid ISP SCSI completion handle(0x%x)\n",
1914 req->id, index);
1915
1916 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
1917 return;
1918 }
1919
1920 if (IS_FWI2_CAPABLE(ha)) {
1921 comp_status = le16_to_cpu(sts24->comp_status);
1922 scsi_status = le16_to_cpu(sts24->scsi_status) & SS_MASK;
1923 } else {
1924 comp_status = le16_to_cpu(sts->comp_status);
1925 scsi_status = le16_to_cpu(sts->scsi_status) & SS_MASK;
1926 }
1927
1928 thread_id = bsg_job->request->rqst_data.h_vendor.vendor_cmd[1];
1929 switch (comp_status) {
1930 case CS_COMPLETE:
1931 if (scsi_status == 0) {
1932 bsg_job->reply->reply_payload_rcv_len =
1933 bsg_job->reply_payload.payload_len;
fabbb8df
JC		 1934 vha->qla_stats.input_bytes +=
1935 bsg_job->reply->reply_payload_rcv_len;
1936 vha->qla_stats.input_requests++;
a9b6f722
SK		 1937 rval = EXT_STATUS_OK;
1938 }
1939 goto done;
1940
1941 case CS_DATA_OVERRUN:
1942 ql_dbg(ql_dbg_user, vha, 0x70b1,
1943 "Command completed with date overrun thread_id=%d\n",
1944 thread_id);
1945 rval = EXT_STATUS_DATA_OVERRUN;
1946 break;
1947
1948 case CS_DATA_UNDERRUN:
1949 ql_dbg(ql_dbg_user, vha, 0x70b2,
1950 "Command completed with date underrun thread_id=%d\n",
1951 thread_id);
1952 rval = EXT_STATUS_DATA_UNDERRUN;
1953 break;
1954 case CS_BIDIR_RD_OVERRUN:
1955 ql_dbg(ql_dbg_user, vha, 0x70b3,
1956 "Command completed with read data overrun thread_id=%d\n",
1957 thread_id);
1958 rval = EXT_STATUS_DATA_OVERRUN;
1959 break;
1960
1961 case CS_BIDIR_RD_WR_OVERRUN:
1962 ql_dbg(ql_dbg_user, vha, 0x70b4,
1963 "Command completed with read and write data overrun "
1964 "thread_id=%d\n", thread_id);
1965 rval = EXT_STATUS_DATA_OVERRUN;
1966 break;
1967
1968 case CS_BIDIR_RD_OVERRUN_WR_UNDERRUN:
1969 ql_dbg(ql_dbg_user, vha, 0x70b5,
1970 "Command completed with read data over and write data "
1971 "underrun thread_id=%d\n", thread_id);
1972 rval = EXT_STATUS_DATA_OVERRUN;
1973 break;
1974
1975 case CS_BIDIR_RD_UNDERRUN:
1976 ql_dbg(ql_dbg_user, vha, 0x70b6,
1977 "Command completed with read data data underrun "
1978 "thread_id=%d\n", thread_id);
1979 rval = EXT_STATUS_DATA_UNDERRUN;
1980 break;
1981
1982 case CS_BIDIR_RD_UNDERRUN_WR_OVERRUN:
1983 ql_dbg(ql_dbg_user, vha, 0x70b7,
1984 "Command completed with read data under and write data "
1985 "overrun thread_id=%d\n", thread_id);
1986 rval = EXT_STATUS_DATA_UNDERRUN;
1987 break;
1988
1989 case CS_BIDIR_RD_WR_UNDERRUN:
1990 ql_dbg(ql_dbg_user, vha, 0x70b8,
1991 "Command completed with read and write data underrun "
1992 "thread_id=%d\n", thread_id);
1993 rval = EXT_STATUS_DATA_UNDERRUN;
1994 break;
1995
1996 case CS_BIDIR_DMA:
1997 ql_dbg(ql_dbg_user, vha, 0x70b9,
1998 "Command completed with data DMA error thread_id=%d\n",
1999 thread_id);
2000 rval = EXT_STATUS_DMA_ERR;
2001 break;
2002
2003 case CS_TIMEOUT:
2004 ql_dbg(ql_dbg_user, vha, 0x70ba,
2005 "Command completed with timeout thread_id=%d\n",
2006 thread_id);
2007 rval = EXT_STATUS_TIMEOUT;
2008 break;
2009 default:
2010 ql_dbg(ql_dbg_user, vha, 0x70bb,
2011 "Command completed with completion status=0x%x "
2012 "thread_id=%d\n", comp_status, thread_id);
2013 rval = EXT_STATUS_ERR;
2014 break;
2015 }
8d2b21db 2016 bsg_job->reply->reply_payload_rcv_len = 0;
a9b6f722
SK		 2017
2018done:
2019 /* Return the vendor specific reply to API */
2020 bsg_job->reply->reply_data.vendor_reply.vendor_rsp[0] = rval;
2021 bsg_job->reply_len = sizeof(struct fc_bsg_reply);
2022 /* Always return DID_OK, bsg will send the vendor specific response
2023 * in this case only */
2024 sp->done(vha, sp, (DID_OK << 6));
2025
2026}
2027
1da177e4
LT		 2028/**
2029 * qla2x00_status_entry() - Process a Status IOCB entry.
2030 * @ha: SCSI driver HA context
2031 * @pkt: Entry pointer
2032 */
2033static void
73208dfd 2034qla2x00_status_entry(scsi_qla_host_t *vha, struct rsp_que *rsp, void *pkt)
1da177e4 2035{
1da177e4 2036 srb_t *sp;
1da177e4
LT		 2037 fc_port_t *fcport;
2038 struct scsi_cmnd *cp;
9a853f71
AV		 2039 sts_entry_t *sts;
2040 struct sts_entry_24xx *sts24;
1da177e4
LT		 2041 uint16_t comp_status;
2042 uint16_t scsi_status;
b7d2280c 2043 uint16_t ox_id;
1da177e4
LT		 2044 uint8_t lscsi_status;
2045 int32_t resid;
5544213b
AV		 2046 uint32_t sense_len, par_sense_len, rsp_info_len, resid_len,
2047 fw_resid_len;
9a853f71 2048 uint8_t *rsp_info, *sense_data;
e315cd28 2049 struct qla_hw_data *ha = vha->hw;
2afa19a9
AC		 2050 uint32_t handle;
2051 uint16_t que;
2052 struct req_que *req;
b7d2280c 2053 int logit = 1;
9ba56b95 2054 int res = 0;
a9b6f722 2055 uint16_t state_flags = 0;
e05fe292 2056 uint16_t retry_delay = 0;
9a853f71
AV		 2057
2058 sts = (sts_entry_t *) pkt;
2059 sts24 = (struct sts_entry_24xx *) pkt;
e428924c 2060 if (IS_FWI2_CAPABLE(ha)) {
9a853f71
AV		 2061 comp_status = le16_to_cpu(sts24->comp_status);
2062 scsi_status = le16_to_cpu(sts24->scsi_status) & SS_MASK;
a9b6f722 2063 state_flags = le16_to_cpu(sts24->state_flags);
9a853f71
AV		 2064 } else {
2065 comp_status = le16_to_cpu(sts->comp_status);
2066 scsi_status = le16_to_cpu(sts->scsi_status) & SS_MASK;
2067 }
2afa19a9
AC		 2068 handle = (uint32_t) LSW(sts->handle);
2069 que = MSW(sts->handle);
2070 req = ha->req_q_map[que];
a9083016 2071
36008cf1
CD		 2072 /* Check for invalid queue pointer */
2073 if (req == NULL ||
2074 que >= find_first_zero_bit(ha->req_qid_map, ha->max_req_queues)) {
2075 ql_dbg(ql_dbg_io, vha, 0x3059,
2076 "Invalid status handle (0x%x): Bad req pointer. req=%p, "
2077 "que=%u.\n", sts->handle, req, que);
2078 return;
2079 }
2080
1da177e4 2081 /* Validate handle. */
c7bc4cae 2082 if (handle < req->num_outstanding_cmds) {
2afa19a9 2083 sp = req->outstanding_cmds[handle];
c7bc4cae
CD		 2084 if (!sp) {
2085 ql_dbg(ql_dbg_io, vha, 0x3075,
2086 "%s(%ld): Already returned command for status handle (0x%x).\n",
2087 __func__, vha->host_no, sts->handle);
2088 return;
2089 }
2090 } else {
cfb0919c 2091 ql_dbg(ql_dbg_io, vha, 0x3017,
c7bc4cae
CD		 2092 "Invalid status handle, out of range (0x%x).\n",
2093 sts->handle);
1da177e4 2094
acd3ce88
CD		 2095 if (!test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags)) {
2096 if (IS_P3P_TYPE(ha))
2097 set_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags);
2098 else
2099 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
2100 qla2xxx_wake_dpc(vha);
2101 }
1da177e4
LT		 2102 return;
2103 }
a9b6f722
SK		 2104
2105 if (unlikely((state_flags & BIT_1) && (sp->type == SRB_BIDI_CMD))) {
2106 qla25xx_process_bidir_status_iocb(vha, pkt, req, handle);
2107 return;
2108 }
2109
faef62d1
AB		 2110 /* Task Management completion. */
2111 if (sp->type == SRB_TM_CMD) {
2112 qla24xx_tm_iocb_entry(vha, req, pkt);
2113 return;
2114 }
2115
a9b6f722
SK		 2116 /* Fast path completion. */
2117 if (comp_status == CS_COMPLETE && scsi_status == 0) {
2118 qla2x00_process_completed_request(vha, req, handle);
2119
2120 return;
2121 }
2122
2123 req->outstanding_cmds[handle] = NULL;
9ba56b95 2124 cp = GET_CMD_SP(sp);
1da177e4 2125 if (cp == NULL) {
cfb0919c 2126 ql_dbg(ql_dbg_io, vha, 0x3018,
7c3df132
SK		 2127 "Command already returned (0x%x/%p).\n",
2128 sts->handle, sp);
1da177e4
LT		 2129
2130 return;
2131 }
2132
8ae6d9c7 2133 lscsi_status = scsi_status & STATUS_MASK;
1da177e4 2134
bdf79621 2135 fcport = sp->fcport;
1da177e4 2136
b7d2280c 2137 ox_id = 0;
5544213b
AV		 2138 sense_len = par_sense_len = rsp_info_len = resid_len =
2139 fw_resid_len = 0;
e428924c 2140 if (IS_FWI2_CAPABLE(ha)) {
0f00a206
LC		 2141 if (scsi_status & SS_SENSE_LEN_VALID)
2142 sense_len = le32_to_cpu(sts24->sense_len);
2143 if (scsi_status & SS_RESPONSE_INFO_LEN_VALID)
2144 rsp_info_len = le32_to_cpu(sts24->rsp_data_len);
2145 if (scsi_status & (SS_RESIDUAL_UNDER | SS_RESIDUAL_OVER))
2146 resid_len = le32_to_cpu(sts24->rsp_residual_count);
2147 if (comp_status == CS_DATA_UNDERRUN)
2148 fw_resid_len = le32_to_cpu(sts24->residual_len);
9a853f71
AV		 2149 rsp_info = sts24->data;
2150 sense_data = sts24->data;
2151 host_to_fcp_swap(sts24->data, sizeof(sts24->data));
b7d2280c 2152 ox_id = le16_to_cpu(sts24->ox_id);
5544213b 2153 par_sense_len = sizeof(sts24->data);
e05fe292
CD		 2154 /* Valid values of the retry delay timer are 0x1-0xffef */
2155 if (sts24->retry_delay > 0 && sts24->retry_delay < 0xfff1)
2156 retry_delay = sts24->retry_delay;
9a853f71 2157 } else {
0f00a206
LC		 2158 if (scsi_status & SS_SENSE_LEN_VALID)
2159 sense_len = le16_to_cpu(sts->req_sense_length);
2160 if (scsi_status & SS_RESPONSE_INFO_LEN_VALID)
2161 rsp_info_len = le16_to_cpu(sts->rsp_info_len);
9a853f71
AV		 2162 resid_len = le32_to_cpu(sts->residual_length);
2163 rsp_info = sts->rsp_info;
2164 sense_data = sts->req_sense_data;
5544213b 2165 par_sense_len = sizeof(sts->req_sense_data);
9a853f71
AV		 2166 }
2167
1da177e4
LT		 2168 /* Check for any FCP transport errors. */
2169 if (scsi_status & SS_RESPONSE_INFO_LEN_VALID) {
9a853f71 2170 /* Sense data lies beyond any FCP RESPONSE data. */
5544213b 2171 if (IS_FWI2_CAPABLE(ha)) {
9a853f71 2172 sense_data += rsp_info_len;
5544213b
AV		 2173 par_sense_len -= rsp_info_len;
2174 }
9a853f71 2175 if (rsp_info_len > 3 && rsp_info[3]) {
5e19ed90 2176 ql_dbg(ql_dbg_io, fcport->vha, 0x3019,
7c3df132
SK		 2177 "FCP I/O protocol failure (0x%x/0x%x).\n",
2178 rsp_info_len, rsp_info[3]);
1da177e4 2179
9ba56b95 2180 res = DID_BUS_BUSY << 16;
b7d2280c 2181 goto out;
1da177e4
LT		 2182 }
2183 }
2184
3e8ce320
AV		 2185 /* Check for overrun. */
2186 if (IS_FWI2_CAPABLE(ha) && comp_status == CS_COMPLETE &&
2187 scsi_status & SS_RESIDUAL_OVER)
2188 comp_status = CS_DATA_OVERRUN;
2189
e05fe292
CD		 2190 /*
2191 * Check retry_delay_timer value if we receive a busy or
2192 * queue full.
2193 */
2194 if (lscsi_status == SAM_STAT_TASK_SET_FULL ||
2195 lscsi_status == SAM_STAT_BUSY)
2196 qla2x00_set_retry_delay_timestamp(fcport, retry_delay);
2197
1da177e4
LT		 2198 /*
2199 * Based on Host and scsi status generate status code for Linux
2200 */
2201 switch (comp_status) {
2202 case CS_COMPLETE:
df7baa50 2203 case CS_QUEUE_FULL:
1da177e4 2204 if (scsi_status == 0) {
9ba56b95 2205 res = DID_OK << 16;
1da177e4
LT		 2206 break;
2207 }
2208 if (scsi_status & (SS_RESIDUAL_UNDER | SS_RESIDUAL_OVER)) {
9a853f71 2209 resid = resid_len;
385d70b4 2210 scsi_set_resid(cp, resid);
0da69df1
AV		 2211
2212 if (!lscsi_status &&
385d70b4 2213 ((unsigned)(scsi_bufflen(cp) - resid) <
0da69df1 2214 cp->underflow)) {
5e19ed90 2215 ql_dbg(ql_dbg_io, fcport->vha, 0x301a,
7c3df132 2216 "Mid-layer underflow "
b7d2280c 2217 "detected (0x%x of 0x%x bytes).\n",
7c3df132 2218 resid, scsi_bufflen(cp));
0da69df1 2219
9ba56b95 2220 res = DID_ERROR << 16;
0da69df1
AV		 2221 break;
2222 }
1da177e4 2223 }
9ba56b95 2224 res = DID_OK << 16 | lscsi_status;
1da177e4 2225
df7baa50 2226 if (lscsi_status == SAM_STAT_TASK_SET_FULL) {
5e19ed90 2227 ql_dbg(ql_dbg_io, fcport->vha, 0x301b,
7c3df132 2228 "QUEUE FULL detected.\n");
df7baa50
AV		 2229 break;
2230 }
b7d2280c 2231 logit = 0;
1da177e4
LT		 2232 if (lscsi_status != SS_CHECK_CONDITION)
2233 break;
2234
b80ca4f7 2235 memset(cp->sense_buffer, 0, SCSI_SENSE_BUFFERSIZE);
1da177e4
LT		 2236 if (!(scsi_status & SS_SENSE_LEN_VALID))
2237 break;
2238
5544213b 2239 qla2x00_handle_sense(sp, sense_data, par_sense_len, sense_len,
9ba56b95 2240 rsp, res);
1da177e4
LT		 2241 break;
2242
2243 case CS_DATA_UNDERRUN:
ed17c71b 2244 /* Use F/W calculated residual length. */
0f00a206
LC		 2245 resid = IS_FWI2_CAPABLE(ha) ? fw_resid_len : resid_len;
2246 scsi_set_resid(cp, resid);
2247 if (scsi_status & SS_RESIDUAL_UNDER) {
2248 if (IS_FWI2_CAPABLE(ha) && fw_resid_len != resid_len) {
5e19ed90 2249 ql_dbg(ql_dbg_io, fcport->vha, 0x301d,
7c3df132
SK		 2250 "Dropped frame(s) detected "
2251 "(0x%x of 0x%x bytes).\n",
2252 resid, scsi_bufflen(cp));
0f00a206 2253
9ba56b95 2254 res = DID_ERROR << 16 | lscsi_status;
4e85e3d9 2255 goto check_scsi_status;
6acf8190 2256 }
ed17c71b 2257
0f00a206
LC		 2258 if (!lscsi_status &&
2259 ((unsigned)(scsi_bufflen(cp) - resid) <
2260 cp->underflow)) {
5e19ed90 2261 ql_dbg(ql_dbg_io, fcport->vha, 0x301e,
7c3df132 2262 "Mid-layer underflow "
b7d2280c 2263 "detected (0x%x of 0x%x bytes).\n",
7c3df132 2264 resid, scsi_bufflen(cp));
e038a1be 2265
9ba56b95 2266 res = DID_ERROR << 16;
0f00a206
LC		 2267 break;
2268 }
4aee5766
GM		 2269 } else if (lscsi_status != SAM_STAT_TASK_SET_FULL &&
2270 lscsi_status != SAM_STAT_BUSY) {
2271 /*
2272 * scsi status of task set and busy are considered to be
2273 * task not completed.
2274 */
2275
5e19ed90 2276 ql_dbg(ql_dbg_io, fcport->vha, 0x301f,
7c3df132 2277 "Dropped frame(s) detected (0x%x "
4aee5766
GM		 2278 "of 0x%x bytes).\n", resid,
2279 scsi_bufflen(cp));
0f00a206 2280
9ba56b95 2281 res = DID_ERROR << 16 | lscsi_status;
0374f55e 2282 goto check_scsi_status;
4aee5766
GM		 2283 } else {
2284 ql_dbg(ql_dbg_io, fcport->vha, 0x3030,
2285 "scsi_status: 0x%x, lscsi_status: 0x%x\n",
2286 scsi_status, lscsi_status);
1da177e4
LT		 2287 }
2288
9ba56b95 2289 res = DID_OK << 16 | lscsi_status;
b7d2280c 2290 logit = 0;
0f00a206 2291
0374f55e 2292check_scsi_status:
1da177e4 2293 /*
fa2a1ce5 2294 * Check to see if SCSI Status is non zero. If so report SCSI
1da177e4
LT		 2295 * Status.
2296 */
2297 if (lscsi_status != 0) {
ffec28a3 2298 if (lscsi_status == SAM_STAT_TASK_SET_FULL) {
5e19ed90 2299 ql_dbg(ql_dbg_io, fcport->vha, 0x3020,
7c3df132 2300 "QUEUE FULL detected.\n");
b7d2280c 2301 logit = 1;
ffec28a3
AV		 2302 break;
2303 }
1da177e4
LT		 2304 if (lscsi_status != SS_CHECK_CONDITION)
2305 break;
2306
b80ca4f7 2307 memset(cp->sense_buffer, 0, SCSI_SENSE_BUFFERSIZE);
1da177e4
LT		 2308 if (!(scsi_status & SS_SENSE_LEN_VALID))
2309 break;
2310
5544213b 2311 qla2x00_handle_sense(sp, sense_data, par_sense_len,
9ba56b95 2312 sense_len, rsp, res);
1da177e4
LT		 2313 }
2314 break;
2315
1da177e4
LT		 2316 case CS_PORT_LOGGED_OUT:
2317 case CS_PORT_CONFIG_CHG:
2318 case CS_PORT_BUSY:
2319 case CS_INCOMPLETE:
2320 case CS_PORT_UNAVAILABLE:
b7d2280c 2321 case CS_TIMEOUT:
ff454b01
CD		 2322 case CS_RESET:
2323
056a4483
MC		 2324 /*
2325 * We are going to have the fc class block the rport
2326 * while we try to recover so instruct the mid layer
2327 * to requeue until the class decides how to handle this.
2328 */
9ba56b95 2329 res = DID_TRANSPORT_DISRUPTED << 16;
b7d2280c
AV		 2330
2331 if (comp_status == CS_TIMEOUT) {
2332 if (IS_FWI2_CAPABLE(ha))
2333 break;
2334 else if ((le16_to_cpu(sts->status_flags) &
2335 SF_LOGOUT_SENT) == 0)
2336 break;
2337 }
2338
5e19ed90 2339 ql_dbg(ql_dbg_io, fcport->vha, 0x3021,
0e948975
CD		 2340 "Port to be marked lost on fcport=%02x%02x%02x, current "
2341 "port state= %s.\n", fcport->d_id.b.domain,
2342 fcport->d_id.b.area, fcport->d_id.b.al_pa,
2343 port_state_str[atomic_read(&fcport->state)]);
b7d2280c 2344
a7a28504 2345 if (atomic_read(&fcport->state) == FCS_ONLINE)
e315cd28 2346 qla2x00_mark_device_lost(fcport->vha, fcport, 1, 1);
1da177e4
LT		 2347 break;
2348
1da177e4 2349 case CS_ABORTED:
9ba56b95 2350 res = DID_RESET << 16;
1da177e4 2351 break;
bad75002
AE		 2352
2353 case CS_DIF_ERROR:
8cb2049c 2354 logit = qla2x00_handle_dif_error(sp, sts24);
fb6e4668 2355 res = cp->result;
bad75002 2356 break;
9e522cd8
AE		 2357
2358 case CS_TRANSPORT:
2359 res = DID_ERROR << 16;
2360
2361 if (!IS_PI_SPLIT_DET_CAPABLE(ha))
2362 break;
2363
2364 if (state_flags & BIT_4)
2365 scmd_printk(KERN_WARNING, cp,
2366 "Unsupported device '%s' found.\n",
2367 cp->device->vendor);
2368 break;
2369
1da177e4 2370 default:
9ba56b95 2371 res = DID_ERROR << 16;
1da177e4
LT		 2372 break;
2373 }
2374
b7d2280c
AV		 2375out:
2376 if (logit)
5e19ed90 2377 ql_dbg(ql_dbg_io, fcport->vha, 0x3022,
9cb78c16 2378 "FCP command status: 0x%x-0x%x (0x%x) nexus=%ld:%d:%llu "
7b833558 2379 "portid=%02x%02x%02x oxid=0x%x cdb=%10phN len=0x%x "
c7bc4cae 2380 "rsp_info=0x%x resid=0x%x fw_resid=0x%x sp=%p cp=%p.\n",
9ba56b95 2381 comp_status, scsi_status, res, vha->host_no,
cfb0919c
CD		 2382 cp->device->id, cp->device->lun, fcport->d_id.b.domain,
2383 fcport->d_id.b.area, fcport->d_id.b.al_pa, ox_id,
7b833558 2384 cp->cmnd, scsi_bufflen(cp), rsp_info_len,
c7bc4cae 2385 resid_len, fw_resid_len, sp, cp);
b7d2280c 2386
2afa19a9 2387 if (rsp->status_srb == NULL)
9ba56b95 2388 sp->done(ha, sp, res);
1da177e4
LT		 2389}
2390
2391/**
2392 * qla2x00_status_cont_entry() - Process a Status Continuations entry.
2393 * @ha: SCSI driver HA context
2394 * @pkt: Entry pointer
2395 *
2396 * Extended sense data.
2397 */
2398static void
2afa19a9 2399qla2x00_status_cont_entry(struct rsp_que *rsp, sts_cont_entry_t *pkt)
1da177e4 2400{
9ba56b95 2401 uint8_t sense_sz = 0;
2afa19a9 2402 struct qla_hw_data *ha = rsp->hw;
7c3df132 2403 struct scsi_qla_host *vha = pci_get_drvdata(ha->pdev);
9ba56b95 2404 srb_t *sp = rsp->status_srb;
1da177e4 2405 struct scsi_cmnd *cp;
9ba56b95
GM		 2406 uint32_t sense_len;
2407 uint8_t *sense_ptr;
1da177e4 2408
9ba56b95
GM		 2409 if (!sp || !GET_CMD_SENSE_LEN(sp))
2410 return;
1da177e4 2411
9ba56b95
GM		 2412 sense_len = GET_CMD_SENSE_LEN(sp);
2413 sense_ptr = GET_CMD_SENSE_PTR(sp);
1da177e4 2414
9ba56b95
GM		 2415 cp = GET_CMD_SP(sp);
2416 if (cp == NULL) {
2417 ql_log(ql_log_warn, vha, 0x3025,
2418 "cmd is NULL: already returned to OS (sp=%p).\n", sp);
1da177e4 2419
9ba56b95
GM		 2420 rsp->status_srb = NULL;
2421 return;
1da177e4 2422 }
1da177e4 2423
9ba56b95
GM		 2424 if (sense_len > sizeof(pkt->data))
2425 sense_sz = sizeof(pkt->data);
2426 else
2427 sense_sz = sense_len;
c4631191 2428
9ba56b95
GM		 2429 /* Move sense data. */
2430 if (IS_FWI2_CAPABLE(ha))
2431 host_to_fcp_swap(pkt->data, sizeof(pkt->data));
2432 memcpy(sense_ptr, pkt->data, sense_sz);
2433 ql_dump_buffer(ql_dbg_io + ql_dbg_buffer, vha, 0x302c,
2434 sense_ptr, sense_sz);
c4631191 2435
9ba56b95
GM		 2436 sense_len -= sense_sz;
2437 sense_ptr += sense_sz;
c4631191 2438
9ba56b95
GM		 2439 SET_CMD_SENSE_PTR(sp, sense_ptr);
2440 SET_CMD_SENSE_LEN(sp, sense_len);
2441
2442 /* Place command on done queue. */
2443 if (sense_len == 0) {
2444 rsp->status_srb = NULL;
2445 sp->done(ha, sp, cp->result);
c4631191 2446 }
c4631191
GM		 2447}
2448
1da177e4
LT		 2449/**
2450 * qla2x00_error_entry() - Process an error entry.
2451 * @ha: SCSI driver HA context
2452 * @pkt: Entry pointer
2453 */
2454static void
73208dfd 2455qla2x00_error_entry(scsi_qla_host_t *vha, struct rsp_que *rsp, sts_entry_t *pkt)
1da177e4
LT		 2456{
2457 srb_t *sp;
e315cd28 2458 struct qla_hw_data *ha = vha->hw;
c4631191 2459 const char func[] = "ERROR-IOCB";
2afa19a9 2460 uint16_t que = MSW(pkt->handle);
a6fe35c0 2461 struct req_que *req = NULL;
9ba56b95 2462 int res = DID_ERROR << 16;
7c3df132 2463
9ba56b95
GM		 2464 ql_dbg(ql_dbg_async, vha, 0x502a,
2465 "type of error status in response: 0x%x\n", pkt->entry_status);
2466
a6fe35c0
AE		 2467 if (que >= ha->max_req_queues || !ha->req_q_map[que])
2468 goto fatal;
2469
2470 req = ha->req_q_map[que];
2471
9ba56b95
GM		 2472 if (pkt->entry_status & RF_BUSY)
2473 res = DID_BUS_BUSY << 16;
1da177e4 2474
c4631191 2475 sp = qla2x00_get_sp_from_handle(vha, func, req, pkt);
a6fe35c0 2476 if (sp) {
9ba56b95 2477 sp->done(ha, sp, res);
a6fe35c0 2478 return;
1da177e4 2479 }
a6fe35c0
AE		 2480fatal:
2481 ql_log(ql_log_warn, vha, 0x5030,
fd49a540 2482 "Error entry - invalid handle/queue (%04x).\n", que);
1da177e4
LT		 2483}
2484
9a853f71
AV		 2485/**
2486 * qla24xx_mbx_completion() - Process mailbox command completions.
2487 * @ha: SCSI driver HA context
2488 * @mb0: Mailbox0 register
2489 */
2490static void
e315cd28 2491qla24xx_mbx_completion(scsi_qla_host_t *vha, uint16_t mb0)
9a853f71
AV		 2492{
2493 uint16_t cnt;
4fa94f83 2494 uint32_t mboxes;
9a853f71 2495 uint16_t __iomem *wptr;
e315cd28 2496 struct qla_hw_data *ha = vha->hw;
9a853f71
AV		 2497 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
2498
4fa94f83
AV		 2499 /* Read all mbox registers? */
2500 mboxes = (1 << ha->mbx_count) - 1;
2501 if (!ha->mcp)
a720101d 2502 ql_dbg(ql_dbg_async, vha, 0x504e, "MBX pointer ERROR.\n");
4fa94f83
AV		 2503 else
2504 mboxes = ha->mcp->in_mb;
2505
9a853f71
AV		 2506 /* Load return mailbox registers. */
2507 ha->flags.mbox_int = 1;
2508 ha->mailbox_out[0] = mb0;
4fa94f83 2509 mboxes >>= 1;
9a853f71
AV		 2510 wptr = (uint16_t __iomem *)&reg->mailbox1;
2511
2512 for (cnt = 1; cnt < ha->mbx_count; cnt++) {
4fa94f83
AV		 2513 if (mboxes & BIT_0)
2514 ha->mailbox_out[cnt] = RD_REG_WORD(wptr);
2515
2516 mboxes >>= 1;
9a853f71
AV		 2517 wptr++;
2518 }
9a853f71
AV		 2519}
2520
4440e46d
AB		 2521static void
2522qla24xx_abort_iocb_entry(scsi_qla_host_t *vha, struct req_que *req,
2523 struct abort_entry_24xx *pkt)
2524{
2525 const char func[] = "ABT_IOCB";
2526 srb_t *sp;
2527 struct srb_iocb *abt;
2528
2529 sp = qla2x00_get_sp_from_handle(vha, func, req, pkt);
2530 if (!sp)
2531 return;
2532
2533 abt = &sp->u.iocb_cmd;
2534 abt->u.abt.comp_status = le32_to_cpu(pkt->nport_handle);
2535 sp->done(vha, sp, 0);
2536}
2537
9a853f71
AV		 2538/**
2539 * qla24xx_process_response_queue() - Process response queue entries.
2540 * @ha: SCSI driver HA context
2541 */
2afa19a9
AC		 2542void qla24xx_process_response_queue(struct scsi_qla_host *vha,
2543 struct rsp_que *rsp)
9a853f71 2544{
9a853f71 2545 struct sts_entry_24xx *pkt;
a9083016 2546 struct qla_hw_data *ha = vha->hw;
9a853f71 2547
e315cd28 2548 if (!vha->flags.online)
9a853f71
AV		 2549 return;
2550
262e2bfd 2551 if (rsp->msix && rsp->msix->cpuid != smp_processor_id()) {
cdb898c5
QT		 2552 /* if kernel does not notify qla of IRQ's CPU change,
2553 * then set it here.
2554 */
2555 rsp->msix->cpuid = smp_processor_id();
2556 ha->tgt.rspq_vector_cpuid = rsp->msix->cpuid;
2557 }
2558
e315cd28
AC		 2559 while (rsp->ring_ptr->signature != RESPONSE_PROCESSED) {
2560 pkt = (struct sts_entry_24xx *)rsp->ring_ptr;
9a853f71 2561
e315cd28
AC		 2562 rsp->ring_index++;
2563 if (rsp->ring_index == rsp->length) {
2564 rsp->ring_index = 0;
2565 rsp->ring_ptr = rsp->ring;
9a853f71 2566 } else {
e315cd28 2567 rsp->ring_ptr++;
9a853f71
AV		 2568 }
2569
2570 if (pkt->entry_status != 0) {
73208dfd 2571 qla2x00_error_entry(vha, rsp, (sts_entry_t *) pkt);
2d70c103 2572
f83adb61
QT		 2573 if (qlt_24xx_process_response_error(vha, pkt))
2574 goto process_err;
2d70c103 2575
9a853f71
AV		 2576 ((response_t *)pkt)->signature = RESPONSE_PROCESSED;
2577 wmb();
2578 continue;
2579 }
f83adb61 2580process_err:
9a853f71
AV		 2581
2582 switch (pkt->entry_type) {
2583 case STATUS_TYPE:
73208dfd 2584 qla2x00_status_entry(vha, rsp, pkt);
9a853f71
AV		 2585 break;
2586 case STATUS_CONT_TYPE:
2afa19a9 2587 qla2x00_status_cont_entry(rsp, (sts_cont_entry_t *)pkt);
9a853f71 2588 break;
2c3dfe3f 2589 case VP_RPT_ID_IOCB_TYPE:
e315cd28 2590 qla24xx_report_id_acquisition(vha,
2c3dfe3f
SJ		 2591 (struct vp_rpt_id_entry_24xx *)pkt);
2592 break;
ac280b67
AV		 2593 case LOGINOUT_PORT_IOCB_TYPE:
2594 qla24xx_logio_entry(vha, rsp->req,
2595 (struct logio_entry_24xx *)pkt);
2596 break;
f83adb61 2597 case CT_IOCB_TYPE:
9a069e19 2598 qla24xx_els_ct_entry(vha, rsp->req, pkt, CT_IOCB_TYPE);
9a069e19 2599 break;
f83adb61 2600 case ELS_IOCB_TYPE:
9a069e19
GM		 2601 qla24xx_els_ct_entry(vha, rsp->req, pkt, ELS_IOCB_TYPE);
2602 break;
2d70c103 2603 case ABTS_RECV_24XX:
2f424b9b
QT		 2604 if (IS_QLA83XX(ha) || IS_QLA27XX(ha)) {
2605 /* ensure that the ATIO queue is empty */
2606 qlt_handle_abts_recv(vha, (response_t *)pkt);
2607 break;
2608 } else {
2609 /* drop through */
2610 qlt_24xx_process_atio_queue(vha, 1);
2611 }
2d70c103
NB		 2612 case ABTS_RESP_24XX:
2613 case CTIO_TYPE7:
2614 case NOTIFY_ACK_TYPE:
f83adb61 2615 case CTIO_CRC2:
2d70c103
NB		 2616 qlt_response_pkt_all_vps(vha, (response_t *)pkt);
2617 break;
54883291
SK		 2618 case MARKER_TYPE:
2619 /* Do nothing in this case, this check is to prevent it
2620 * from falling into default case
2621 */
2622 break;
4440e46d
AB		 2623 case ABORT_IOCB_TYPE:
2624 qla24xx_abort_iocb_entry(vha, rsp->req,
2625 (struct abort_entry_24xx *)pkt);
2626 break;
9a853f71
AV		 2627 default:
2628 /* Type Not Supported. */
7c3df132
SK		 2629 ql_dbg(ql_dbg_async, vha, 0x5042,
2630 "Received unknown response pkt type %x "
9a853f71 2631 "entry status=%x.\n",
7c3df132 2632 pkt->entry_type, pkt->entry_status);
9a853f71
AV		 2633 break;
2634 }
2635 ((response_t *)pkt)->signature = RESPONSE_PROCESSED;
2636 wmb();
2637 }
2638
2639 /* Adjust ring index */
7ec0effd 2640 if (IS_P3P_TYPE(ha)) {
a9083016
GM		 2641 struct device_reg_82xx __iomem *reg = &ha->iobase->isp82;
2642 WRT_REG_DWORD(&reg->rsp_q_out[0], rsp->ring_index);
2643 } else
2644 WRT_REG_DWORD(rsp->rsp_q_out, rsp->ring_index);
9a853f71
AV		 2645}
2646
05236a05 2647static void
e315cd28 2648qla2xxx_check_risc_status(scsi_qla_host_t *vha)
05236a05
AV		 2649{
2650 int rval;
2651 uint32_t cnt;
e315cd28 2652 struct qla_hw_data *ha = vha->hw;
05236a05
AV		 2653 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
2654
f73cb695
CD		 2655 if (!IS_QLA25XX(ha) && !IS_QLA81XX(ha) && !IS_QLA83XX(ha) &&
2656 !IS_QLA27XX(ha))
05236a05
AV		 2657 return;
2658
2659 rval = QLA_SUCCESS;
2660 WRT_REG_DWORD(&reg->iobase_addr, 0x7C00);
2661 RD_REG_DWORD(&reg->iobase_addr);
2662 WRT_REG_DWORD(&reg->iobase_window, 0x0001);
2663 for (cnt = 10000; (RD_REG_DWORD(&reg->iobase_window) & BIT_0) == 0 &&
2664 rval == QLA_SUCCESS; cnt--) {
2665 if (cnt) {
2666 WRT_REG_DWORD(&reg->iobase_window, 0x0001);
2667 udelay(10);
2668 } else
2669 rval = QLA_FUNCTION_TIMEOUT;
2670 }
2671 if (rval == QLA_SUCCESS)
2672 goto next_test;
2673
b2ec76c5 2674 rval = QLA_SUCCESS;
05236a05
AV		 2675 WRT_REG_DWORD(&reg->iobase_window, 0x0003);
2676 for (cnt = 100; (RD_REG_DWORD(&reg->iobase_window) & BIT_0) == 0 &&
2677 rval == QLA_SUCCESS; cnt--) {
2678 if (cnt) {
2679 WRT_REG_DWORD(&reg->iobase_window, 0x0003);
2680 udelay(10);
2681 } else
2682 rval = QLA_FUNCTION_TIMEOUT;
2683 }
2684 if (rval != QLA_SUCCESS)
2685 goto done;
2686
2687next_test:
2688 if (RD_REG_DWORD(&reg->iobase_c8) & BIT_3)
7c3df132
SK		 2689 ql_log(ql_log_info, vha, 0x504c,
2690 "Additional code -- 0x55AA.\n");
05236a05
AV		 2691
2692done:
2693 WRT_REG_DWORD(&reg->iobase_window, 0x0000);
2694 RD_REG_DWORD(&reg->iobase_window);
2695}
2696
9a853f71 2697/**
6246b8a1 2698 * qla24xx_intr_handler() - Process interrupts for the ISP23xx and ISP24xx.
9a853f71
AV		 2699 * @irq:
2700 * @dev_id: SCSI driver HA context
9a853f71
AV		 2701 *
2702 * Called by system whenever the host adapter generates an interrupt.
2703 *
2704 * Returns handled flag.
2705 */
2706irqreturn_t
7d12e780 2707qla24xx_intr_handler(int irq, void *dev_id)
9a853f71 2708{
e315cd28
AC		 2709 scsi_qla_host_t *vha;
2710 struct qla_hw_data *ha;
9a853f71
AV		 2711 struct device_reg_24xx __iomem *reg;
2712 int status;
9a853f71
AV		 2713 unsigned long iter;
2714 uint32_t stat;
2715 uint32_t hccr;
7d613ac6 2716 uint16_t mb[8];
e315cd28 2717 struct rsp_que *rsp;
43fac4d9 2718 unsigned long flags;
9a853f71 2719
e315cd28
AC		 2720 rsp = (struct rsp_que *) dev_id;
2721 if (!rsp) {
3256b435
CD		 2722 ql_log(ql_log_info, NULL, 0x5059,
2723 "%s: NULL response queue pointer.\n", __func__);
9a853f71
AV		 2724 return IRQ_NONE;
2725 }
2726
e315cd28 2727 ha = rsp->hw;
9a853f71
AV		 2728 reg = &ha->iobase->isp24;
2729 status = 0;
2730
85880801
AV		 2731 if (unlikely(pci_channel_offline(ha->pdev)))
2732 return IRQ_HANDLED;
2733
43fac4d9 2734 spin_lock_irqsave(&ha->hardware_lock, flags);
2afa19a9 2735 vha = pci_get_drvdata(ha->pdev);
9a853f71
AV		 2736 for (iter = 50; iter--; ) {
2737 stat = RD_REG_DWORD(&reg->host_status);
c821e0d5 2738 if (qla2x00_check_reg32_for_disconnect(vha, stat))
f3ddac19 2739 break;
9a853f71 2740 if (stat & HSRX_RISC_PAUSED) {
85880801 2741 if (unlikely(pci_channel_offline(ha->pdev)))
14e660e6
SJ		 2742 break;
2743
9a853f71
AV		 2744 hccr = RD_REG_DWORD(&reg->hccr);
2745
7c3df132
SK		 2746 ql_log(ql_log_warn, vha, 0x504b,
2747 "RISC paused -- HCCR=%x, Dumping firmware.\n",
2748 hccr);
05236a05 2749
e315cd28 2750 qla2xxx_check_risc_status(vha);
05236a05 2751
e315cd28
AC		 2752 ha->isp_ops->fw_dump(vha, 1);
2753 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
9a853f71
AV		 2754 break;
2755 } else if ((stat & HSRX_RISC_INT) == 0)
2756 break;
2757
2758 switch (stat & 0xff) {
fafbda9f
AE		 2759 case INTR_ROM_MB_SUCCESS:
2760 case INTR_ROM_MB_FAILED:
2761 case INTR_MB_SUCCESS:
2762 case INTR_MB_FAILED:
e315cd28 2763 qla24xx_mbx_completion(vha, MSW(stat));
9a853f71
AV		 2764 status |= MBX_INTERRUPT;
2765
2766 break;
fafbda9f 2767 case INTR_ASYNC_EVENT:
9a853f71
AV		 2768 mb[0] = MSW(stat);
2769 mb[1] = RD_REG_WORD(&reg->mailbox1);
2770 mb[2] = RD_REG_WORD(&reg->mailbox2);
2771 mb[3] = RD_REG_WORD(&reg->mailbox3);
73208dfd 2772 qla2x00_async_event(vha, rsp, mb);
9a853f71 2773 break;
fafbda9f
AE		 2774 case INTR_RSP_QUE_UPDATE:
2775 case INTR_RSP_QUE_UPDATE_83XX:
2afa19a9 2776 qla24xx_process_response_queue(vha, rsp);
9a853f71 2777 break;
2f424b9b
QT		 2778 case INTR_ATIO_QUE_UPDATE:{
2779 unsigned long flags2;
2780 spin_lock_irqsave(&ha->tgt.atio_lock, flags2);
2781 qlt_24xx_process_atio_queue(vha, 1);
2782 spin_unlock_irqrestore(&ha->tgt.atio_lock, flags2);
2d70c103 2783 break;
2f424b9b
QT		 2784 }
2785 case INTR_ATIO_RSP_QUE_UPDATE: {
2786 unsigned long flags2;
2787 spin_lock_irqsave(&ha->tgt.atio_lock, flags2);
2788 qlt_24xx_process_atio_queue(vha, 1);
2789 spin_unlock_irqrestore(&ha->tgt.atio_lock, flags2);
2790
2d70c103
NB		 2791 qla24xx_process_response_queue(vha, rsp);
2792 break;
2f424b9b 2793 }
9a853f71 2794 default:
7c3df132
SK		 2795 ql_dbg(ql_dbg_async, vha, 0x504f,
2796 "Unrecognized interrupt type (%d).\n", stat * 0xff);
9a853f71
AV		 2797 break;
2798 }
2799 WRT_REG_DWORD(&reg->hccr, HCCRX_CLR_RISC_INT);
2800 RD_REG_DWORD_RELAXED(&reg->hccr);
cb860bbd
GM		 2801 if (unlikely(IS_QLA83XX(ha) && (ha->pdev->revision == 1)))
2802 ndelay(3500);
9a853f71 2803 }
36439832 2804 qla2x00_handle_mbx_completion(ha, status);
43fac4d9 2805 spin_unlock_irqrestore(&ha->hardware_lock, flags);
9a853f71 2806
9a853f71
AV		 2807 return IRQ_HANDLED;
2808}
2809
a8488abe
AV		 2810static irqreturn_t
2811qla24xx_msix_rsp_q(int irq, void *dev_id)
2812{
e315cd28
AC		 2813 struct qla_hw_data *ha;
2814 struct rsp_que *rsp;
a8488abe 2815 struct device_reg_24xx __iomem *reg;
2afa19a9 2816 struct scsi_qla_host *vha;
0f19bc68 2817 unsigned long flags;
f3ddac19 2818 uint32_t stat = 0;
a8488abe 2819
e315cd28
AC		 2820 rsp = (struct rsp_que *) dev_id;
2821 if (!rsp) {
3256b435
CD		 2822 ql_log(ql_log_info, NULL, 0x505a,
2823 "%s: NULL response queue pointer.\n", __func__);
e315cd28
AC		 2824 return IRQ_NONE;
2825 }
2826 ha = rsp->hw;
a8488abe
AV		 2827 reg = &ha->iobase->isp24;
2828
0f19bc68 2829 spin_lock_irqsave(&ha->hardware_lock, flags);
a8488abe 2830
a67093d4 2831 vha = pci_get_drvdata(ha->pdev);
f3ddac19
CD		 2832 /*
2833 * Use host_status register to check to PCI disconnection before we
2834 * we process the response queue.
2835 */
2836 stat = RD_REG_DWORD(&reg->host_status);
c821e0d5 2837 if (qla2x00_check_reg32_for_disconnect(vha, stat))
f3ddac19 2838 goto out;
2afa19a9 2839 qla24xx_process_response_queue(vha, rsp);
3155754a 2840 if (!ha->flags.disable_msix_handshake) {
eb94114b
AC		 2841 WRT_REG_DWORD(&reg->hccr, HCCRX_CLR_RISC_INT);
2842 RD_REG_DWORD_RELAXED(&reg->hccr);
2843 }
f3ddac19 2844out:
0f19bc68 2845 spin_unlock_irqrestore(&ha->hardware_lock, flags);
a8488abe
AV		 2846
2847 return IRQ_HANDLED;
2848}
2849
68ca949c
AC		 2850static irqreturn_t
2851qla25xx_msix_rsp_q(int irq, void *dev_id)
2852{
2853 struct qla_hw_data *ha;
f3ddac19 2854 scsi_qla_host_t *vha;
68ca949c 2855 struct rsp_que *rsp;
3155754a 2856 struct device_reg_24xx __iomem *reg;
0f19bc68 2857 unsigned long flags;
f3ddac19 2858 uint32_t hccr = 0;
68ca949c
AC		 2859
2860 rsp = (struct rsp_que *) dev_id;
2861 if (!rsp) {
3256b435
CD		 2862 ql_log(ql_log_info, NULL, 0x505b,
2863 "%s: NULL response queue pointer.\n", __func__);
68ca949c
AC		 2864 return IRQ_NONE;
2865 }
2866 ha = rsp->hw;
f3ddac19 2867 vha = pci_get_drvdata(ha->pdev);
68ca949c 2868
3155754a 2869 /* Clear the interrupt, if enabled, for this response queue */
d424754c 2870 if (!ha->flags.disable_msix_handshake) {
3155754a 2871 reg = &ha->iobase->isp24;
0f19bc68 2872 spin_lock_irqsave(&ha->hardware_lock, flags);
3155754a 2873 WRT_REG_DWORD(&reg->hccr, HCCRX_CLR_RISC_INT);
f3ddac19 2874 hccr = RD_REG_DWORD_RELAXED(&reg->hccr);
0f19bc68 2875 spin_unlock_irqrestore(&ha->hardware_lock, flags);
3155754a 2876 }
c821e0d5 2877 if (qla2x00_check_reg32_for_disconnect(vha, hccr))
f3ddac19 2878 goto out;
68ca949c
AC		 2879 queue_work_on((int) (rsp->id - 1), ha->wq, &rsp->q_work);
2880
f3ddac19 2881out:
68ca949c
AC		 2882 return IRQ_HANDLED;
2883}
2884
a8488abe
AV		 2885static irqreturn_t
2886qla24xx_msix_default(int irq, void *dev_id)
2887{
e315cd28
AC		 2888 scsi_qla_host_t *vha;
2889 struct qla_hw_data *ha;
2890 struct rsp_que *rsp;
a8488abe
AV		 2891 struct device_reg_24xx __iomem *reg;
2892 int status;
a8488abe
AV		 2893 uint32_t stat;
2894 uint32_t hccr;
7d613ac6 2895 uint16_t mb[8];
0f19bc68 2896 unsigned long flags;
a8488abe 2897
e315cd28
AC		 2898 rsp = (struct rsp_que *) dev_id;
2899 if (!rsp) {
3256b435
CD		 2900 ql_log(ql_log_info, NULL, 0x505c,
2901 "%s: NULL response queue pointer.\n", __func__);
e315cd28
AC		 2902 return IRQ_NONE;
2903 }
2904 ha = rsp->hw;
a8488abe
AV		 2905 reg = &ha->iobase->isp24;
2906 status = 0;
2907
0f19bc68 2908 spin_lock_irqsave(&ha->hardware_lock, flags);
2afa19a9 2909 vha = pci_get_drvdata(ha->pdev);
87f27015 2910 do {
a8488abe 2911 stat = RD_REG_DWORD(&reg->host_status);
c821e0d5 2912 if (qla2x00_check_reg32_for_disconnect(vha, stat))
f3ddac19 2913 break;
a8488abe 2914 if (stat & HSRX_RISC_PAUSED) {
85880801 2915 if (unlikely(pci_channel_offline(ha->pdev)))
14e660e6
SJ		 2916 break;
2917
a8488abe
AV		 2918 hccr = RD_REG_DWORD(&reg->hccr);
2919
7c3df132
SK		 2920 ql_log(ql_log_info, vha, 0x5050,
2921 "RISC paused -- HCCR=%x, Dumping firmware.\n",
2922 hccr);
05236a05 2923
e315cd28 2924 qla2xxx_check_risc_status(vha);
05236a05 2925
e315cd28
AC		 2926 ha->isp_ops->fw_dump(vha, 1);
2927 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
a8488abe
AV		 2928 break;
2929 } else if ((stat & HSRX_RISC_INT) == 0)
2930 break;
2931
2932 switch (stat & 0xff) {
fafbda9f
AE		 2933 case INTR_ROM_MB_SUCCESS:
2934 case INTR_ROM_MB_FAILED:
2935 case INTR_MB_SUCCESS:
2936 case INTR_MB_FAILED:
e315cd28 2937 qla24xx_mbx_completion(vha, MSW(stat));
a8488abe
AV		 2938 status |= MBX_INTERRUPT;
2939
2940 break;
fafbda9f 2941 case INTR_ASYNC_EVENT:
a8488abe
AV		 2942 mb[0] = MSW(stat);
2943 mb[1] = RD_REG_WORD(&reg->mailbox1);
2944 mb[2] = RD_REG_WORD(&reg->mailbox2);
2945 mb[3] = RD_REG_WORD(&reg->mailbox3);
73208dfd 2946 qla2x00_async_event(vha, rsp, mb);
a8488abe 2947 break;
fafbda9f
AE		 2948 case INTR_RSP_QUE_UPDATE:
2949 case INTR_RSP_QUE_UPDATE_83XX:
2afa19a9 2950 qla24xx_process_response_queue(vha, rsp);
a8488abe 2951 break;
2f424b9b
QT		 2952 case INTR_ATIO_QUE_UPDATE:{
2953 unsigned long flags2;
2954 spin_lock_irqsave(&ha->tgt.atio_lock, flags2);
2955 qlt_24xx_process_atio_queue(vha, 1);
2956 spin_unlock_irqrestore(&ha->tgt.atio_lock, flags2);
2d70c103 2957 break;
2f424b9b
QT		 2958 }
2959 case INTR_ATIO_RSP_QUE_UPDATE: {
2960 unsigned long flags2;
2961 spin_lock_irqsave(&ha->tgt.atio_lock, flags2);
2962 qlt_24xx_process_atio_queue(vha, 1);
2963 spin_unlock_irqrestore(&ha->tgt.atio_lock, flags2);
2964
2d70c103
NB		 2965 qla24xx_process_response_queue(vha, rsp);
2966 break;
2f424b9b 2967 }
a8488abe 2968 default:
7c3df132
SK		 2969 ql_dbg(ql_dbg_async, vha, 0x5051,
2970 "Unrecognized interrupt type (%d).\n", stat & 0xff);
a8488abe
AV		 2971 break;
2972 }
2973 WRT_REG_DWORD(&reg->hccr, HCCRX_CLR_RISC_INT);
87f27015 2974 } while (0);
36439832 2975 qla2x00_handle_mbx_completion(ha, status);
0f19bc68 2976 spin_unlock_irqrestore(&ha->hardware_lock, flags);
a8488abe 2977
a8488abe
AV		 2978 return IRQ_HANDLED;
2979}
2980
2981/* Interrupt handling helpers. */
2982
2983struct qla_init_msix_entry {
a8488abe 2984 const char *name;
476834c2 2985 irq_handler_t handler;
a8488abe
AV		 2986};
2987
68ca949c 2988static struct qla_init_msix_entry msix_entries[3] = {
2afa19a9
AC		 2989 { "qla2xxx (default)", qla24xx_msix_default },
2990 { "qla2xxx (rsp_q)", qla24xx_msix_rsp_q },
68ca949c 2991 { "qla2xxx (multiq)", qla25xx_msix_rsp_q },
a8488abe
AV		 2992};
2993
a9083016
GM		 2994static struct qla_init_msix_entry qla82xx_msix_entries[2] = {
2995 { "qla2xxx (default)", qla82xx_msix_default },
2996 { "qla2xxx (rsp_q)", qla82xx_msix_rsp_q },
2997};
2998
aa230bc5
AE		 2999static struct qla_init_msix_entry qla83xx_msix_entries[3] = {
3000 { "qla2xxx (default)", qla24xx_msix_default },
3001 { "qla2xxx (rsp_q)", qla24xx_msix_rsp_q },
3002 { "qla2xxx (atio_q)", qla83xx_msix_atio_q },
3003};
3004
a8488abe 3005static void
e315cd28 3006qla24xx_disable_msix(struct qla_hw_data *ha)
a8488abe
AV		 3007{
3008 int i;
3009 struct qla_msix_entry *qentry;
7c3df132 3010 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev);
a8488abe 3011
73208dfd
AC		 3012 for (i = 0; i < ha->msix_count; i++) {
3013 qentry = &ha->msix_entries[i];
cdb898c5
QT		 3014 if (qentry->have_irq) {
3015 /* un-register irq cpu affinity notification */
3016 irq_set_affinity_notifier(qentry->vector, NULL);
73208dfd 3017 free_irq(qentry->vector, qentry->rsp);
cdb898c5 3018 }
a8488abe
AV		 3019 }
3020 pci_disable_msix(ha->pdev);
73208dfd
AC		 3021 kfree(ha->msix_entries);
3022 ha->msix_entries = NULL;
3023 ha->flags.msix_enabled = 0;
7c3df132
SK		 3024 ql_dbg(ql_dbg_init, vha, 0x0042,
3025 "Disabled the MSI.\n");
a8488abe
AV		 3026}
3027
3028static int
73208dfd 3029qla24xx_enable_msix(struct qla_hw_data *ha, struct rsp_que *rsp)
a8488abe 3030{
ad038fa8 3031#define MIN_MSIX_COUNT 2
f324777e 3032#define ATIO_VECTOR 2
a8488abe 3033 int i, ret;
73208dfd 3034 struct msix_entry *entries;
a8488abe 3035 struct qla_msix_entry *qentry;
7c3df132 3036 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev);
73208dfd
AC		 3037
3038 entries = kzalloc(sizeof(struct msix_entry) * ha->msix_count,
a9083016 3039 GFP_KERNEL);
7c3df132
SK		 3040 if (!entries) {
3041 ql_log(ql_log_warn, vha, 0x00bc,
3042 "Failed to allocate memory for msix_entry.\n");
73208dfd 3043 return -ENOMEM;
7c3df132 3044 }
a8488abe 3045
73208dfd
AC		 3046 for (i = 0; i < ha->msix_count; i++)
3047 entries[i].entry = i;
a8488abe 3048
84e32a06
AG		 3049 ret = pci_enable_msix_range(ha->pdev,
3050 entries, MIN_MSIX_COUNT, ha->msix_count);
3051 if (ret < 0) {
3052 ql_log(ql_log_fatal, vha, 0x00c7,
3053 "MSI-X: Failed to enable support, "
3054 "giving up -- %d/%d.\n",
3055 ha->msix_count, ret);
3056 goto msix_out;
3057 } else if (ret < ha->msix_count) {
7c3df132
SK		 3058 ql_log(ql_log_warn, vha, 0x00c6,
3059 "MSI-X: Failed to enable support "
3060 "-- %d/%d\n Retry with %d vectors.\n",
3061 ha->msix_count, ret, ret);
cb43285f
QT		 3062 ha->msix_count = ret;
3063 ha->max_rsp_queues = ha->msix_count - 1;
73208dfd
AC		 3064 }
3065 ha->msix_entries = kzalloc(sizeof(struct qla_msix_entry) *
3066 ha->msix_count, GFP_KERNEL);
3067 if (!ha->msix_entries) {
7c3df132
SK		 3068 ql_log(ql_log_fatal, vha, 0x00c8,
3069 "Failed to allocate memory for ha->msix_entries.\n");
73208dfd 3070 ret = -ENOMEM;
a8488abe
AV		 3071 goto msix_out;
3072 }
3073 ha->flags.msix_enabled = 1;
3074
73208dfd
AC		 3075 for (i = 0; i < ha->msix_count; i++) {
3076 qentry = &ha->msix_entries[i];
3077 qentry->vector = entries[i].vector;
3078 qentry->entry = entries[i].entry;
a8488abe 3079 qentry->have_irq = 0;
73208dfd 3080 qentry->rsp = NULL;
cdb898c5
QT		 3081 qentry->irq_notify.notify = qla_irq_affinity_notify;
3082 qentry->irq_notify.release = qla_irq_affinity_release;
3083 qentry->cpuid = -1;
a8488abe
AV		 3084 }
3085
2afa19a9 3086 /* Enable MSI-X vectors for the base queue */
f324777e 3087 for (i = 0; i < 2; i++) {
2afa19a9 3088 qentry = &ha->msix_entries[i];
ef8d1d51
JT		 3089 qentry->rsp = rsp;
3090 rsp->msix = qentry;
f324777e 3091 if (IS_P3P_TYPE(ha))
a9083016
GM		 3092 ret = request_irq(qentry->vector,
3093 qla82xx_msix_entries[i].handler,
3094 0, qla82xx_msix_entries[i].name, rsp);
f324777e 3095 else
a9083016
GM		 3096 ret = request_irq(qentry->vector,
3097 msix_entries[i].handler,
3098 0, msix_entries[i].name, rsp);
f324777e
CD		 3099 if (ret)
3100 goto msix_register_fail;
3101 qentry->have_irq = 1;
cdb898c5
QT		 3102
3103 /* Register for CPU affinity notification. */
3104 irq_set_affinity_notifier(qentry->vector, &qentry->irq_notify);
3105
3106 /* Schedule work (ie. trigger a notification) to read cpu
3107 * mask for this specific irq.
3108 * kref_get is required because
3109 * irq_affinity_notify() will do
3110 * kref_put().
3111 */
3112 kref_get(&qentry->irq_notify.kref);
3113 schedule_work(&qentry->irq_notify.work);
f324777e
CD		 3114 }
3115
3116 /*
3117 * If target mode is enable, also request the vector for the ATIO
3118 * queue.
3119 */
3120 if (QLA_TGT_MODE_ENABLED() && IS_ATIO_MSIX_CAPABLE(ha)) {
3121 qentry = &ha->msix_entries[ATIO_VECTOR];
ef8d1d51
JT		 3122 qentry->rsp = rsp;
3123 rsp->msix = qentry;
f324777e
CD		 3124 ret = request_irq(qentry->vector,
3125 qla83xx_msix_entries[ATIO_VECTOR].handler,
3126 0, qla83xx_msix_entries[ATIO_VECTOR].name, rsp);
2afa19a9 3127 qentry->have_irq = 1;
73208dfd 3128 }
73208dfd 3129
f324777e
CD		 3130msix_register_fail:
3131 if (ret) {
3132 ql_log(ql_log_fatal, vha, 0x00cb,
3133 "MSI-X: unable to register handler -- %x/%d.\n",
3134 qentry->vector, ret);
3135 qla24xx_disable_msix(ha);
3136 ha->mqenable = 0;
3137 goto msix_out;
3138 }
3139
73208dfd 3140 /* Enable MSI-X vector for response queue update for queue 0 */
f73cb695 3141 if (IS_QLA83XX(ha) || IS_QLA27XX(ha)) {
6246b8a1
GM		 3142 if (ha->msixbase && ha->mqiobase &&
3143 (ha->max_rsp_queues > 1 || ha->max_req_queues > 1))
3144 ha->mqenable = 1;
3145 } else
3146 if (ha->mqiobase
3147 && (ha->max_rsp_queues > 1 || ha->max_req_queues > 1))
3148 ha->mqenable = 1;
7c3df132
SK		 3149 ql_dbg(ql_dbg_multiq, vha, 0xc005,
3150 "mqiobase=%p, max_rsp_queues=%d, max_req_queues=%d.\n",
3151 ha->mqiobase, ha->max_rsp_queues, ha->max_req_queues);
3152 ql_dbg(ql_dbg_init, vha, 0x0055,
3153 "mqiobase=%p, max_rsp_queues=%d, max_req_queues=%d.\n",
3154 ha->mqiobase, ha->max_rsp_queues, ha->max_req_queues);
73208dfd 3155
a8488abe 3156msix_out:
73208dfd 3157 kfree(entries);
a8488abe
AV		 3158 return ret;
3159}
3160
3161int
73208dfd 3162qla2x00_request_irqs(struct qla_hw_data *ha, struct rsp_que *rsp)
a8488abe 3163{
7fa3e239 3164 int ret = QLA_FUNCTION_FAILED;
f73cb695 3165 device_reg_t *reg = ha->iobase;
7c3df132 3166 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev);
a8488abe
AV		 3167
3168 /* If possible, enable MSI-X. */
6246b8a1 3169 if (!IS_QLA2432(ha) && !IS_QLA2532(ha) && !IS_QLA8432(ha) &&
f73cb695
CD		 3170 !IS_CNA_CAPABLE(ha) && !IS_QLA2031(ha) && !IS_QLAFX00(ha) &&
3171 !IS_QLA27XX(ha))
6377a7ae
BH		 3172 goto skip_msi;
3173
3174 if (ha->pdev->subsystem_vendor == PCI_VENDOR_ID_HP &&
3175 (ha->pdev->subsystem_device == 0x7040 ||
3176 ha->pdev->subsystem_device == 0x7041 ||
3177 ha->pdev->subsystem_device == 0x1705)) {
7c3df132
SK		 3178 ql_log(ql_log_warn, vha, 0x0034,
3179 "MSI-X: Unsupported ISP 2432 SSVID/SSDID (0x%X,0x%X).\n",
6377a7ae 3180 ha->pdev->subsystem_vendor,
7c3df132 3181 ha->pdev->subsystem_device);
6377a7ae
BH		 3182 goto skip_msi;
3183 }
a8488abe 3184
42cd4f5d 3185 if (IS_QLA2432(ha) && (ha->pdev->revision < QLA_MSIX_CHIP_REV_24XX)) {
7c3df132
SK		 3186 ql_log(ql_log_warn, vha, 0x0035,
3187 "MSI-X; Unsupported ISP2432 (0x%X, 0x%X).\n",
42cd4f5d 3188 ha->pdev->revision, QLA_MSIX_CHIP_REV_24XX);
a8488abe
AV		 3189 goto skip_msix;
3190 }
3191
73208dfd 3192 ret = qla24xx_enable_msix(ha, rsp);
a8488abe 3193 if (!ret) {
7c3df132
SK		 3194 ql_dbg(ql_dbg_init, vha, 0x0036,
3195 "MSI-X: Enabled (0x%X, 0x%X).\n",
3196 ha->chip_revision, ha->fw_attributes);
963b0fdd 3197 goto clear_risc_ints;
a8488abe 3198 }
7fa3e239 3199
a8488abe 3200skip_msix:
cbedb601 3201
7fa3e239
SC		 3202 ql_log(ql_log_info, vha, 0x0037,
3203 "Falling back-to MSI mode -%d.\n", ret);
3204
3a03eb79 3205 if (!IS_QLA24XX(ha) && !IS_QLA2532(ha) && !IS_QLA8432(ha) &&
f73cb695
CD		 3206 !IS_QLA8001(ha) && !IS_P3P_TYPE(ha) && !IS_QLAFX00(ha) &&
3207 !IS_QLA27XX(ha))
cbedb601
AV		 3208 goto skip_msi;
3209
3210 ret = pci_enable_msi(ha->pdev);
3211 if (!ret) {
7c3df132
SK		 3212 ql_dbg(ql_dbg_init, vha, 0x0038,
3213 "MSI: Enabled.\n");
cbedb601 3214 ha->flags.msi_enabled = 1;
a9083016 3215 } else
7c3df132 3216 ql_log(ql_log_warn, vha, 0x0039,
7fa3e239
SC		 3217 "Falling back-to INTa mode -- %d.\n", ret);
3218skip_msi:
a033b655
GM		 3219
3220 /* Skip INTx on ISP82xx. */
3221 if (!ha->flags.msi_enabled && IS_QLA82XX(ha))
3222 return QLA_FUNCTION_FAILED;
3223
fd34f556 3224 ret = request_irq(ha->pdev->irq, ha->isp_ops->intr_handler,
7992abfc
MH		 3225 ha->flags.msi_enabled ? 0 : IRQF_SHARED,
3226 QLA2XXX_DRIVER_NAME, rsp);
963b0fdd 3227 if (ret) {
7c3df132 3228 ql_log(ql_log_warn, vha, 0x003a,
a8488abe
AV		 3229 "Failed to reserve interrupt %d already in use.\n",
3230 ha->pdev->irq);
963b0fdd 3231 goto fail;
8ae6d9c7 3232 } else if (!ha->flags.msi_enabled) {
68d91cbd
SK		 3233 ql_dbg(ql_dbg_init, vha, 0x0125,
3234 "INTa mode: Enabled.\n");
8ae6d9c7
GM		 3235 ha->flags.mr_intr_valid = 1;
3236 }
7992abfc 3237
963b0fdd 3238clear_risc_ints:
4bb2efc4
JC		 3239 if (IS_FWI2_CAPABLE(ha) || IS_QLAFX00(ha))
3240 goto fail;
963b0fdd 3241
c6952483 3242 spin_lock_irq(&ha->hardware_lock);
4bb2efc4 3243 WRT_REG_WORD(&reg->isp.semaphore, 0);
c6952483 3244 spin_unlock_irq(&ha->hardware_lock);
a8488abe 3245
963b0fdd 3246fail:
a8488abe
AV		 3247 return ret;
3248}
3249
3250void
e315cd28 3251qla2x00_free_irqs(scsi_qla_host_t *vha)
a8488abe 3252{
e315cd28 3253 struct qla_hw_data *ha = vha->hw;
9a347ff4
CD		 3254 struct rsp_que *rsp;
3255
3256 /*
3257 * We need to check that ha->rsp_q_map is valid in case we are called
3258 * from a probe failure context.
3259 */
3260 if (!ha->rsp_q_map || !ha->rsp_q_map[0])
3261 return;
3262 rsp = ha->rsp_q_map[0];
a8488abe
AV		 3263
3264 if (ha->flags.msix_enabled)
3265 qla24xx_disable_msix(ha);
90a86fc0 3266 else if (ha->flags.msi_enabled) {
e315cd28 3267 free_irq(ha->pdev->irq, rsp);
cbedb601 3268 pci_disable_msi(ha->pdev);
90a86fc0
JC		 3269 } else
3270 free_irq(ha->pdev->irq, rsp);
a8488abe 3271}
e315cd28 3272
73208dfd
AC		 3273
3274int qla25xx_request_irq(struct rsp_que *rsp)
3275{
3276 struct qla_hw_data *ha = rsp->hw;
2afa19a9 3277 struct qla_init_msix_entry *intr = &msix_entries[2];
73208dfd 3278 struct qla_msix_entry *msix = rsp->msix;
7c3df132 3279 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev);
73208dfd
AC		 3280 int ret;
3281
3282 ret = request_irq(msix->vector, intr->handler, 0, intr->name, rsp);
3283 if (ret) {
7c3df132
SK		 3284 ql_log(ql_log_fatal, vha, 0x00e6,
3285 "MSI-X: Unable to register handler -- %x/%d.\n",
3286 msix->vector, ret);
73208dfd
AC		 3287 return ret;
3288 }
3289 msix->have_irq = 1;
3290 msix->rsp = rsp;
3291 return ret;
3292}
cdb898c5
QT		 3293
3294
3295/* irq_set_affinity/irqbalance will trigger notification of cpu mask update */
3296static void qla_irq_affinity_notify(struct irq_affinity_notify *notify,
3297 const cpumask_t *mask)
3298{
3299 struct qla_msix_entry *e =
3300 container_of(notify, struct qla_msix_entry, irq_notify);
3301 struct qla_hw_data *ha;
3302 struct scsi_qla_host *base_vha;
3303
3304 /* user is recommended to set mask to just 1 cpu */
3305 e->cpuid = cpumask_first(mask);
3306
3307 ha = e->rsp->hw;
3308 base_vha = pci_get_drvdata(ha->pdev);
3309
3310 ql_dbg(ql_dbg_init, base_vha, 0xffff,
3311 "%s: host %ld : vector %d cpu %d \n", __func__,
3312 base_vha->host_no, e->vector, e->cpuid);
3313
3314 if (e->have_irq) {
3315 if ((IS_QLA83XX(ha) || IS_QLA27XX(ha)) &&
3316 (e->entry == QLA83XX_RSPQ_MSIX_ENTRY_NUMBER)) {
3317 ha->tgt.rspq_vector_cpuid = e->cpuid;
3318 ql_dbg(ql_dbg_init, base_vha, 0xffff,
3319 "%s: host%ld: rspq vector %d cpu %d runtime change\n",
3320 __func__, base_vha->host_no, e->vector, e->cpuid);
3321 }
3322 }
3323}
3324
fb3269ba 3325static void qla_irq_affinity_release(struct kref *ref)
cdb898c5
QT		 3326{
3327 struct irq_affinity_notify *notify =
3328 container_of(ref, struct irq_affinity_notify, kref);
3329 struct qla_msix_entry *e =
3330 container_of(notify, struct qla_msix_entry, irq_notify);
3331 struct scsi_qla_host *base_vha = pci_get_drvdata(e->rsp->hw->pdev);
3332
3333 ql_dbg(ql_dbg_init, base_vha, 0xffff,
3334 "%s: host%ld: vector %d cpu %d \n", __func__,
3335 base_vha->host_no, e->vector, e->cpuid);
3336}
Linux 6.x block layer and io_uring tree(s)