Commit | Line | Data |
---|---|---|
1da177e4 | 1 | /* |
fa90c54f | 2 | * QLogic Fibre Channel HBA Driver |
bd21eaf9 | 3 | * Copyright (c) 2003-2014 QLogic Corporation |
1da177e4 | 4 | * |
fa90c54f | 5 | * See LICENSE.qla2xxx for copyright and licensing details. |
1da177e4 LT |
6 | */ |
7 | #include "qla_def.h" | |
2d70c103 | 8 | #include "qla_target.h" |
1da177e4 | 9 | |
05236a05 | 10 | #include <linux/delay.h> |
5a0e3ad6 | 11 | #include <linux/slab.h> |
e326d22a | 12 | #include <linux/cpu.h> |
09ce66ae | 13 | #include <linux/t10-pi.h> |
df7baa50 | 14 | #include <scsi/scsi_tcq.h> |
9a069e19 | 15 | #include <scsi/scsi_bsg_fc.h> |
bad75002 | 16 | #include <scsi/scsi_eh.h> |
d32041ec JT |
17 | #include <scsi/fc/fc_fs.h> |
18 | #include <linux/nvme-fc-driver.h> | |
df7baa50 | 19 | |
1da177e4 | 20 | static void qla2x00_mbx_completion(scsi_qla_host_t *, uint16_t); |
73208dfd | 21 | static void qla2x00_status_entry(scsi_qla_host_t *, struct rsp_que *, void *); |
2afa19a9 | 22 | static void qla2x00_status_cont_entry(struct rsp_que *, sts_cont_entry_t *); |
c5419e26 | 23 | static int qla2x00_error_entry(scsi_qla_host_t *, struct rsp_que *, |
73208dfd | 24 | sts_entry_t *); |
9a853f71 | 25 | |
1da177e4 LT |
26 | /** |
27 | * qla2100_intr_handler() - Process interrupts for the ISP2100 and ISP2200. | |
28 | * @irq: | |
29 | * @dev_id: SCSI driver HA context | |
1da177e4 LT |
30 | * |
31 | * Called by system whenever the host adapter generates an interrupt. | |
32 | * | |
33 | * Returns handled flag. | |
34 | */ | |
35 | irqreturn_t | |
7d12e780 | 36 | qla2100_intr_handler(int irq, void *dev_id) |
1da177e4 | 37 | { |
e315cd28 AC |
38 | scsi_qla_host_t *vha; |
39 | struct qla_hw_data *ha; | |
3d71644c | 40 | struct device_reg_2xxx __iomem *reg; |
1da177e4 | 41 | int status; |
1da177e4 | 42 | unsigned long iter; |
14e660e6 | 43 | uint16_t hccr; |
9a853f71 | 44 | uint16_t mb[4]; |
e315cd28 | 45 | struct rsp_que *rsp; |
43fac4d9 | 46 | unsigned long flags; |
1da177e4 | 47 | |
e315cd28 AC |
48 | rsp = (struct rsp_que *) dev_id; |
49 | if (!rsp) { | |
3256b435 CD |
50 | ql_log(ql_log_info, NULL, 0x505d, |
51 | "%s: NULL response queue pointer.\n", __func__); | |
1da177e4 LT |
52 | return (IRQ_NONE); |
53 | } | |
54 | ||
e315cd28 | 55 | ha = rsp->hw; |
3d71644c | 56 | reg = &ha->iobase->isp; |
1da177e4 LT |
57 | status = 0; |
58 | ||
43fac4d9 | 59 | spin_lock_irqsave(&ha->hardware_lock, flags); |
2afa19a9 | 60 | vha = pci_get_drvdata(ha->pdev); |
1da177e4 | 61 | for (iter = 50; iter--; ) { |
14e660e6 | 62 | hccr = RD_REG_WORD(®->hccr); |
c821e0d5 | 63 | if (qla2x00_check_reg16_for_disconnect(vha, hccr)) |
f3ddac19 | 64 | break; |
14e660e6 SJ |
65 | if (hccr & HCCR_RISC_PAUSE) { |
66 | if (pci_channel_offline(ha->pdev)) | |
67 | break; | |
68 | ||
69 | /* | |
70 | * Issue a "HARD" reset in order for the RISC interrupt | |
a06a0f8e | 71 | * bit to be cleared. Schedule a big hammer to get |
14e660e6 SJ |
72 | * out of the RISC PAUSED state. |
73 | */ | |
74 | WRT_REG_WORD(®->hccr, HCCR_RESET_RISC); | |
75 | RD_REG_WORD(®->hccr); | |
76 | ||
e315cd28 AC |
77 | ha->isp_ops->fw_dump(vha, 1); |
78 | set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); | |
14e660e6 SJ |
79 | break; |
80 | } else if ((RD_REG_WORD(®->istatus) & ISR_RISC_INT) == 0) | |
1da177e4 LT |
81 | break; |
82 | ||
83 | if (RD_REG_WORD(®->semaphore) & BIT_0) { | |
84 | WRT_REG_WORD(®->hccr, HCCR_CLR_RISC_INT); | |
85 | RD_REG_WORD(®->hccr); | |
86 | ||
87 | /* Get mailbox data. */ | |
9a853f71 AV |
88 | mb[0] = RD_MAILBOX_REG(ha, reg, 0); |
89 | if (mb[0] > 0x3fff && mb[0] < 0x8000) { | |
e315cd28 | 90 | qla2x00_mbx_completion(vha, mb[0]); |
1da177e4 | 91 | status |= MBX_INTERRUPT; |
9a853f71 AV |
92 | } else if (mb[0] > 0x7fff && mb[0] < 0xc000) { |
93 | mb[1] = RD_MAILBOX_REG(ha, reg, 1); | |
94 | mb[2] = RD_MAILBOX_REG(ha, reg, 2); | |
95 | mb[3] = RD_MAILBOX_REG(ha, reg, 3); | |
73208dfd | 96 | qla2x00_async_event(vha, rsp, mb); |
1da177e4 LT |
97 | } else { |
98 | /*EMPTY*/ | |
7c3df132 SK |
99 | ql_dbg(ql_dbg_async, vha, 0x5025, |
100 | "Unrecognized interrupt type (%d).\n", | |
101 | mb[0]); | |
1da177e4 LT |
102 | } |
103 | /* Release mailbox registers. */ | |
104 | WRT_REG_WORD(®->semaphore, 0); | |
105 | RD_REG_WORD(®->semaphore); | |
106 | } else { | |
73208dfd | 107 | qla2x00_process_response_queue(rsp); |
1da177e4 LT |
108 | |
109 | WRT_REG_WORD(®->hccr, HCCR_CLR_RISC_INT); | |
110 | RD_REG_WORD(®->hccr); | |
111 | } | |
112 | } | |
36439832 | 113 | qla2x00_handle_mbx_completion(ha, status); |
43fac4d9 | 114 | spin_unlock_irqrestore(&ha->hardware_lock, flags); |
1da177e4 | 115 | |
1da177e4 LT |
116 | return (IRQ_HANDLED); |
117 | } | |
118 | ||
f3ddac19 | 119 | bool |
c821e0d5 | 120 | qla2x00_check_reg32_for_disconnect(scsi_qla_host_t *vha, uint32_t reg) |
f3ddac19 CD |
121 | { |
122 | /* Check for PCI disconnection */ | |
a30c2a3b | 123 | if (reg == 0xffffffff && !pci_channel_offline(vha->hw->pdev)) { |
beb9e315 | 124 | if (!test_and_set_bit(PFLG_DISCONNECTED, &vha->pci_flags) && |
6b383979 JL |
125 | !test_bit(PFLG_DRIVER_REMOVING, &vha->pci_flags) && |
126 | !test_bit(PFLG_DRIVER_PROBING, &vha->pci_flags)) { | |
232792b6 JL |
127 | /* |
128 | * Schedule this (only once) on the default system | |
129 | * workqueue so that all the adapter workqueues and the | |
130 | * DPC thread can be shutdown cleanly. | |
131 | */ | |
132 | schedule_work(&vha->hw->board_disable); | |
133 | } | |
f3ddac19 CD |
134 | return true; |
135 | } else | |
136 | return false; | |
137 | } | |
138 | ||
c821e0d5 JL |
139 | bool |
140 | qla2x00_check_reg16_for_disconnect(scsi_qla_host_t *vha, uint16_t reg) | |
141 | { | |
142 | return qla2x00_check_reg32_for_disconnect(vha, 0xffff0000 | reg); | |
143 | } | |
144 | ||
1da177e4 LT |
145 | /** |
146 | * qla2300_intr_handler() - Process interrupts for the ISP23xx and ISP63xx. | |
147 | * @irq: | |
148 | * @dev_id: SCSI driver HA context | |
1da177e4 LT |
149 | * |
150 | * Called by system whenever the host adapter generates an interrupt. | |
151 | * | |
152 | * Returns handled flag. | |
153 | */ | |
154 | irqreturn_t | |
7d12e780 | 155 | qla2300_intr_handler(int irq, void *dev_id) |
1da177e4 | 156 | { |
e315cd28 | 157 | scsi_qla_host_t *vha; |
3d71644c | 158 | struct device_reg_2xxx __iomem *reg; |
1da177e4 | 159 | int status; |
1da177e4 LT |
160 | unsigned long iter; |
161 | uint32_t stat; | |
1da177e4 | 162 | uint16_t hccr; |
9a853f71 | 163 | uint16_t mb[4]; |
e315cd28 AC |
164 | struct rsp_que *rsp; |
165 | struct qla_hw_data *ha; | |
43fac4d9 | 166 | unsigned long flags; |
1da177e4 | 167 | |
e315cd28 AC |
168 | rsp = (struct rsp_que *) dev_id; |
169 | if (!rsp) { | |
3256b435 CD |
170 | ql_log(ql_log_info, NULL, 0x5058, |
171 | "%s: NULL response queue pointer.\n", __func__); | |
1da177e4 LT |
172 | return (IRQ_NONE); |
173 | } | |
174 | ||
e315cd28 | 175 | ha = rsp->hw; |
3d71644c | 176 | reg = &ha->iobase->isp; |
1da177e4 LT |
177 | status = 0; |
178 | ||
43fac4d9 | 179 | spin_lock_irqsave(&ha->hardware_lock, flags); |
2afa19a9 | 180 | vha = pci_get_drvdata(ha->pdev); |
1da177e4 LT |
181 | for (iter = 50; iter--; ) { |
182 | stat = RD_REG_DWORD(®->u.isp2300.host_status); | |
c821e0d5 | 183 | if (qla2x00_check_reg32_for_disconnect(vha, stat)) |
f3ddac19 | 184 | break; |
1da177e4 | 185 | if (stat & HSR_RISC_PAUSED) { |
85880801 | 186 | if (unlikely(pci_channel_offline(ha->pdev))) |
14e660e6 SJ |
187 | break; |
188 | ||
1da177e4 | 189 | hccr = RD_REG_WORD(®->hccr); |
f3ddac19 | 190 | |
1da177e4 | 191 | if (hccr & (BIT_15 | BIT_13 | BIT_11 | BIT_8)) |
7c3df132 SK |
192 | ql_log(ql_log_warn, vha, 0x5026, |
193 | "Parity error -- HCCR=%x, Dumping " | |
194 | "firmware.\n", hccr); | |
1da177e4 | 195 | else |
7c3df132 SK |
196 | ql_log(ql_log_warn, vha, 0x5027, |
197 | "RISC paused -- HCCR=%x, Dumping " | |
198 | "firmware.\n", hccr); | |
1da177e4 LT |
199 | |
200 | /* | |
201 | * Issue a "HARD" reset in order for the RISC | |
202 | * interrupt bit to be cleared. Schedule a big | |
a06a0f8e | 203 | * hammer to get out of the RISC PAUSED state. |
1da177e4 LT |
204 | */ |
205 | WRT_REG_WORD(®->hccr, HCCR_RESET_RISC); | |
206 | RD_REG_WORD(®->hccr); | |
07f31805 | 207 | |
e315cd28 AC |
208 | ha->isp_ops->fw_dump(vha, 1); |
209 | set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); | |
1da177e4 LT |
210 | break; |
211 | } else if ((stat & HSR_RISC_INT) == 0) | |
212 | break; | |
213 | ||
1da177e4 | 214 | switch (stat & 0xff) { |
1da177e4 LT |
215 | case 0x1: |
216 | case 0x2: | |
217 | case 0x10: | |
218 | case 0x11: | |
e315cd28 | 219 | qla2x00_mbx_completion(vha, MSW(stat)); |
1da177e4 LT |
220 | status |= MBX_INTERRUPT; |
221 | ||
222 | /* Release mailbox registers. */ | |
223 | WRT_REG_WORD(®->semaphore, 0); | |
224 | break; | |
225 | case 0x12: | |
9a853f71 AV |
226 | mb[0] = MSW(stat); |
227 | mb[1] = RD_MAILBOX_REG(ha, reg, 1); | |
228 | mb[2] = RD_MAILBOX_REG(ha, reg, 2); | |
229 | mb[3] = RD_MAILBOX_REG(ha, reg, 3); | |
73208dfd | 230 | qla2x00_async_event(vha, rsp, mb); |
9a853f71 AV |
231 | break; |
232 | case 0x13: | |
73208dfd | 233 | qla2x00_process_response_queue(rsp); |
1da177e4 LT |
234 | break; |
235 | case 0x15: | |
9a853f71 AV |
236 | mb[0] = MBA_CMPLT_1_16BIT; |
237 | mb[1] = MSW(stat); | |
73208dfd | 238 | qla2x00_async_event(vha, rsp, mb); |
1da177e4 LT |
239 | break; |
240 | case 0x16: | |
9a853f71 AV |
241 | mb[0] = MBA_SCSI_COMPLETION; |
242 | mb[1] = MSW(stat); | |
243 | mb[2] = RD_MAILBOX_REG(ha, reg, 2); | |
73208dfd | 244 | qla2x00_async_event(vha, rsp, mb); |
1da177e4 LT |
245 | break; |
246 | default: | |
7c3df132 SK |
247 | ql_dbg(ql_dbg_async, vha, 0x5028, |
248 | "Unrecognized interrupt type (%d).\n", stat & 0xff); | |
1da177e4 LT |
249 | break; |
250 | } | |
251 | WRT_REG_WORD(®->hccr, HCCR_CLR_RISC_INT); | |
252 | RD_REG_WORD_RELAXED(®->hccr); | |
253 | } | |
36439832 | 254 | qla2x00_handle_mbx_completion(ha, status); |
43fac4d9 | 255 | spin_unlock_irqrestore(&ha->hardware_lock, flags); |
1da177e4 | 256 | |
1da177e4 LT |
257 | return (IRQ_HANDLED); |
258 | } | |
259 | ||
260 | /** | |
261 | * qla2x00_mbx_completion() - Process mailbox command completions. | |
2db6228d | 262 | * @vha: SCSI driver HA context |
1da177e4 LT |
263 | * @mb0: Mailbox0 register |
264 | */ | |
265 | static void | |
e315cd28 | 266 | qla2x00_mbx_completion(scsi_qla_host_t *vha, uint16_t mb0) |
1da177e4 LT |
267 | { |
268 | uint16_t cnt; | |
4fa94f83 | 269 | uint32_t mboxes; |
1da177e4 | 270 | uint16_t __iomem *wptr; |
e315cd28 | 271 | struct qla_hw_data *ha = vha->hw; |
3d71644c | 272 | struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; |
1da177e4 | 273 | |
4fa94f83 | 274 | /* Read all mbox registers? */ |
c02189e1 BVA |
275 | WARN_ON_ONCE(ha->mbx_count > 32); |
276 | mboxes = (1ULL << ha->mbx_count) - 1; | |
4fa94f83 | 277 | if (!ha->mcp) |
a720101d | 278 | ql_dbg(ql_dbg_async, vha, 0x5001, "MBX pointer ERROR.\n"); |
4fa94f83 AV |
279 | else |
280 | mboxes = ha->mcp->in_mb; | |
281 | ||
1da177e4 LT |
282 | /* Load return mailbox registers. */ |
283 | ha->flags.mbox_int = 1; | |
284 | ha->mailbox_out[0] = mb0; | |
4fa94f83 | 285 | mboxes >>= 1; |
1da177e4 LT |
286 | wptr = (uint16_t __iomem *)MAILBOX_REG(ha, reg, 1); |
287 | ||
288 | for (cnt = 1; cnt < ha->mbx_count; cnt++) { | |
fa2a1ce5 | 289 | if (IS_QLA2200(ha) && cnt == 8) |
1da177e4 | 290 | wptr = (uint16_t __iomem *)MAILBOX_REG(ha, reg, 8); |
4fa94f83 | 291 | if ((cnt == 4 || cnt == 5) && (mboxes & BIT_0)) |
1da177e4 | 292 | ha->mailbox_out[cnt] = qla2x00_debounce_register(wptr); |
4fa94f83 | 293 | else if (mboxes & BIT_0) |
1da177e4 | 294 | ha->mailbox_out[cnt] = RD_REG_WORD(wptr); |
fa2a1ce5 | 295 | |
1da177e4 | 296 | wptr++; |
4fa94f83 | 297 | mboxes >>= 1; |
1da177e4 | 298 | } |
1da177e4 LT |
299 | } |
300 | ||
8a659571 AV |
301 | static void |
302 | qla81xx_idc_event(scsi_qla_host_t *vha, uint16_t aen, uint16_t descr) | |
303 | { | |
304 | static char *event[] = | |
305 | { "Complete", "Request Notification", "Time Extension" }; | |
306 | int rval; | |
307 | struct device_reg_24xx __iomem *reg24 = &vha->hw->iobase->isp24; | |
9e5054ec | 308 | struct device_reg_82xx __iomem *reg82 = &vha->hw->iobase->isp82; |
8a659571 AV |
309 | uint16_t __iomem *wptr; |
310 | uint16_t cnt, timeout, mb[QLA_IDC_ACK_REGS]; | |
311 | ||
312 | /* Seed data -- mailbox1 -> mailbox7. */ | |
9e5054ec CD |
313 | if (IS_QLA81XX(vha->hw) || IS_QLA83XX(vha->hw)) |
314 | wptr = (uint16_t __iomem *)®24->mailbox1; | |
315 | else if (IS_QLA8044(vha->hw)) | |
316 | wptr = (uint16_t __iomem *)®82->mailbox_out[1]; | |
317 | else | |
318 | return; | |
319 | ||
8a659571 AV |
320 | for (cnt = 0; cnt < QLA_IDC_ACK_REGS; cnt++, wptr++) |
321 | mb[cnt] = RD_REG_WORD(wptr); | |
322 | ||
7c3df132 | 323 | ql_dbg(ql_dbg_async, vha, 0x5021, |
6246b8a1 | 324 | "Inter-Driver Communication %s -- " |
7c3df132 SK |
325 | "%04x %04x %04x %04x %04x %04x %04x.\n", |
326 | event[aen & 0xff], mb[0], mb[1], mb[2], mb[3], | |
327 | mb[4], mb[5], mb[6]); | |
454073c9 SV |
328 | switch (aen) { |
329 | /* Handle IDC Error completion case. */ | |
330 | case MBA_IDC_COMPLETE: | |
331 | if (mb[1] >> 15) { | |
332 | vha->hw->flags.idc_compl_status = 1; | |
9aaf2cea | 333 | if (vha->hw->notify_dcbx_comp && !vha->vp_idx) |
454073c9 SV |
334 | complete(&vha->hw->dcbx_comp); |
335 | } | |
336 | break; | |
337 | ||
338 | case MBA_IDC_NOTIFY: | |
339 | /* Acknowledgement needed? [Notify && non-zero timeout]. */ | |
340 | timeout = (descr >> 8) & 0xf; | |
341 | ql_dbg(ql_dbg_async, vha, 0x5022, | |
342 | "%lu Inter-Driver Communication %s -- ACK timeout=%d.\n", | |
343 | vha->host_no, event[aen & 0xff], timeout); | |
344 | ||
345 | if (!timeout) | |
346 | return; | |
347 | rval = qla2x00_post_idc_ack_work(vha, mb); | |
348 | if (rval != QLA_SUCCESS) | |
349 | ql_log(ql_log_warn, vha, 0x5023, | |
350 | "IDC failed to post ACK.\n"); | |
351 | break; | |
352 | case MBA_IDC_TIME_EXT: | |
353 | vha->hw->idc_extend_tmo = descr; | |
354 | ql_dbg(ql_dbg_async, vha, 0x5087, | |
355 | "%lu Inter-Driver Communication %s -- " | |
356 | "Extend timeout by=%d.\n", | |
357 | vha->host_no, event[aen & 0xff], vha->hw->idc_extend_tmo); | |
358 | break; | |
bf5b8ad7 | 359 | } |
8a659571 AV |
360 | } |
361 | ||
daae62a3 | 362 | #define LS_UNKNOWN 2 |
d0297c9a JC |
363 | const char * |
364 | qla2x00_get_link_speed_str(struct qla_hw_data *ha, uint16_t speed) | |
daae62a3 | 365 | { |
f73cb695 CD |
366 | static const char *const link_speeds[] = { |
367 | "1", "2", "?", "4", "8", "16", "32", "10" | |
d0297c9a | 368 | }; |
f73cb695 | 369 | #define QLA_LAST_SPEED 7 |
daae62a3 CD |
370 | |
371 | if (IS_QLA2100(ha) || IS_QLA2200(ha)) | |
d0297c9a JC |
372 | return link_speeds[0]; |
373 | else if (speed == 0x13) | |
f73cb695 CD |
374 | return link_speeds[QLA_LAST_SPEED]; |
375 | else if (speed < QLA_LAST_SPEED) | |
d0297c9a JC |
376 | return link_speeds[speed]; |
377 | else | |
378 | return link_speeds[LS_UNKNOWN]; | |
daae62a3 CD |
379 | } |
380 | ||
fa492630 | 381 | static void |
7d613ac6 SV |
382 | qla83xx_handle_8200_aen(scsi_qla_host_t *vha, uint16_t *mb) |
383 | { | |
384 | struct qla_hw_data *ha = vha->hw; | |
385 | ||
386 | /* | |
387 | * 8200 AEN Interpretation: | |
388 | * mb[0] = AEN code | |
389 | * mb[1] = AEN Reason code | |
390 | * mb[2] = LSW of Peg-Halt Status-1 Register | |
391 | * mb[6] = MSW of Peg-Halt Status-1 Register | |
392 | * mb[3] = LSW of Peg-Halt Status-2 register | |
393 | * mb[7] = MSW of Peg-Halt Status-2 register | |
394 | * mb[4] = IDC Device-State Register value | |
395 | * mb[5] = IDC Driver-Presence Register value | |
396 | */ | |
397 | ql_dbg(ql_dbg_async, vha, 0x506b, "AEN Code: mb[0] = 0x%x AEN reason: " | |
398 | "mb[1] = 0x%x PH-status1: mb[2] = 0x%x PH-status1: mb[6] = 0x%x.\n", | |
399 | mb[0], mb[1], mb[2], mb[6]); | |
400 | ql_dbg(ql_dbg_async, vha, 0x506c, "PH-status2: mb[3] = 0x%x " | |
401 | "PH-status2: mb[7] = 0x%x Device-State: mb[4] = 0x%x " | |
402 | "Drv-Presence: mb[5] = 0x%x.\n", mb[3], mb[7], mb[4], mb[5]); | |
403 | ||
404 | if (mb[1] & (IDC_PEG_HALT_STATUS_CHANGE | IDC_NIC_FW_REPORTED_FAILURE | | |
405 | IDC_HEARTBEAT_FAILURE)) { | |
406 | ha->flags.nic_core_hung = 1; | |
407 | ql_log(ql_log_warn, vha, 0x5060, | |
408 | "83XX: F/W Error Reported: Check if reset required.\n"); | |
409 | ||
410 | if (mb[1] & IDC_PEG_HALT_STATUS_CHANGE) { | |
411 | uint32_t protocol_engine_id, fw_err_code, err_level; | |
412 | ||
413 | /* | |
414 | * IDC_PEG_HALT_STATUS_CHANGE interpretation: | |
415 | * - PEG-Halt Status-1 Register: | |
416 | * (LSW = mb[2], MSW = mb[6]) | |
417 | * Bits 0-7 = protocol-engine ID | |
418 | * Bits 8-28 = f/w error code | |
419 | * Bits 29-31 = Error-level | |
420 | * Error-level 0x1 = Non-Fatal error | |
421 | * Error-level 0x2 = Recoverable Fatal error | |
422 | * Error-level 0x4 = UnRecoverable Fatal error | |
423 | * - PEG-Halt Status-2 Register: | |
424 | * (LSW = mb[3], MSW = mb[7]) | |
425 | */ | |
426 | protocol_engine_id = (mb[2] & 0xff); | |
427 | fw_err_code = (((mb[2] & 0xff00) >> 8) | | |
428 | ((mb[6] & 0x1fff) << 8)); | |
429 | err_level = ((mb[6] & 0xe000) >> 13); | |
430 | ql_log(ql_log_warn, vha, 0x5061, "PegHalt Status-1 " | |
431 | "Register: protocol_engine_id=0x%x " | |
432 | "fw_err_code=0x%x err_level=0x%x.\n", | |
433 | protocol_engine_id, fw_err_code, err_level); | |
434 | ql_log(ql_log_warn, vha, 0x5062, "PegHalt Status-2 " | |
435 | "Register: 0x%x%x.\n", mb[7], mb[3]); | |
436 | if (err_level == ERR_LEVEL_NON_FATAL) { | |
437 | ql_log(ql_log_warn, vha, 0x5063, | |
0bf0efa1 | 438 | "Not a fatal error, f/w has recovered itself.\n"); |
7d613ac6 SV |
439 | } else if (err_level == ERR_LEVEL_RECOVERABLE_FATAL) { |
440 | ql_log(ql_log_fatal, vha, 0x5064, | |
441 | "Recoverable Fatal error: Chip reset " | |
442 | "required.\n"); | |
443 | qla83xx_schedule_work(vha, | |
444 | QLA83XX_NIC_CORE_RESET); | |
445 | } else if (err_level == ERR_LEVEL_UNRECOVERABLE_FATAL) { | |
446 | ql_log(ql_log_fatal, vha, 0x5065, | |
447 | "Unrecoverable Fatal error: Set FAILED " | |
448 | "state, reboot required.\n"); | |
449 | qla83xx_schedule_work(vha, | |
450 | QLA83XX_NIC_CORE_UNRECOVERABLE); | |
451 | } | |
452 | } | |
453 | ||
454 | if (mb[1] & IDC_NIC_FW_REPORTED_FAILURE) { | |
455 | uint16_t peg_fw_state, nw_interface_link_up; | |
456 | uint16_t nw_interface_signal_detect, sfp_status; | |
457 | uint16_t htbt_counter, htbt_monitor_enable; | |
b4a028a5 | 458 | uint16_t sfp_additional_info, sfp_multirate; |
7d613ac6 SV |
459 | uint16_t sfp_tx_fault, link_speed, dcbx_status; |
460 | ||
461 | /* | |
462 | * IDC_NIC_FW_REPORTED_FAILURE interpretation: | |
463 | * - PEG-to-FC Status Register: | |
464 | * (LSW = mb[2], MSW = mb[6]) | |
465 | * Bits 0-7 = Peg-Firmware state | |
466 | * Bit 8 = N/W Interface Link-up | |
467 | * Bit 9 = N/W Interface signal detected | |
468 | * Bits 10-11 = SFP Status | |
469 | * SFP Status 0x0 = SFP+ transceiver not expected | |
470 | * SFP Status 0x1 = SFP+ transceiver not present | |
471 | * SFP Status 0x2 = SFP+ transceiver invalid | |
472 | * SFP Status 0x3 = SFP+ transceiver present and | |
473 | * valid | |
474 | * Bits 12-14 = Heartbeat Counter | |
475 | * Bit 15 = Heartbeat Monitor Enable | |
476 | * Bits 16-17 = SFP Additional Info | |
477 | * SFP info 0x0 = Unregocnized transceiver for | |
478 | * Ethernet | |
479 | * SFP info 0x1 = SFP+ brand validation failed | |
480 | * SFP info 0x2 = SFP+ speed validation failed | |
481 | * SFP info 0x3 = SFP+ access error | |
482 | * Bit 18 = SFP Multirate | |
483 | * Bit 19 = SFP Tx Fault | |
484 | * Bits 20-22 = Link Speed | |
485 | * Bits 23-27 = Reserved | |
486 | * Bits 28-30 = DCBX Status | |
487 | * DCBX Status 0x0 = DCBX Disabled | |
488 | * DCBX Status 0x1 = DCBX Enabled | |
489 | * DCBX Status 0x2 = DCBX Exchange error | |
490 | * Bit 31 = Reserved | |
491 | */ | |
492 | peg_fw_state = (mb[2] & 0x00ff); | |
493 | nw_interface_link_up = ((mb[2] & 0x0100) >> 8); | |
494 | nw_interface_signal_detect = ((mb[2] & 0x0200) >> 9); | |
495 | sfp_status = ((mb[2] & 0x0c00) >> 10); | |
496 | htbt_counter = ((mb[2] & 0x7000) >> 12); | |
497 | htbt_monitor_enable = ((mb[2] & 0x8000) >> 15); | |
b4a028a5 | 498 | sfp_additional_info = (mb[6] & 0x0003); |
7d613ac6 SV |
499 | sfp_multirate = ((mb[6] & 0x0004) >> 2); |
500 | sfp_tx_fault = ((mb[6] & 0x0008) >> 3); | |
501 | link_speed = ((mb[6] & 0x0070) >> 4); | |
502 | dcbx_status = ((mb[6] & 0x7000) >> 12); | |
503 | ||
504 | ql_log(ql_log_warn, vha, 0x5066, | |
505 | "Peg-to-Fc Status Register:\n" | |
506 | "peg_fw_state=0x%x, nw_interface_link_up=0x%x, " | |
507 | "nw_interface_signal_detect=0x%x" | |
508 | "\nsfp_statis=0x%x.\n ", peg_fw_state, | |
509 | nw_interface_link_up, nw_interface_signal_detect, | |
510 | sfp_status); | |
511 | ql_log(ql_log_warn, vha, 0x5067, | |
512 | "htbt_counter=0x%x, htbt_monitor_enable=0x%x, " | |
b4a028a5 | 513 | "sfp_additional_info=0x%x, sfp_multirate=0x%x.\n ", |
7d613ac6 | 514 | htbt_counter, htbt_monitor_enable, |
b4a028a5 | 515 | sfp_additional_info, sfp_multirate); |
7d613ac6 SV |
516 | ql_log(ql_log_warn, vha, 0x5068, |
517 | "sfp_tx_fault=0x%x, link_state=0x%x, " | |
518 | "dcbx_status=0x%x.\n", sfp_tx_fault, link_speed, | |
519 | dcbx_status); | |
520 | ||
521 | qla83xx_schedule_work(vha, QLA83XX_NIC_CORE_RESET); | |
522 | } | |
523 | ||
524 | if (mb[1] & IDC_HEARTBEAT_FAILURE) { | |
525 | ql_log(ql_log_warn, vha, 0x5069, | |
526 | "Heartbeat Failure encountered, chip reset " | |
527 | "required.\n"); | |
528 | ||
529 | qla83xx_schedule_work(vha, QLA83XX_NIC_CORE_RESET); | |
530 | } | |
531 | } | |
532 | ||
533 | if (mb[1] & IDC_DEVICE_STATE_CHANGE) { | |
534 | ql_log(ql_log_info, vha, 0x506a, | |
535 | "IDC Device-State changed = 0x%x.\n", mb[4]); | |
6c3943cd SK |
536 | if (ha->flags.nic_core_reset_owner) |
537 | return; | |
7d613ac6 SV |
538 | qla83xx_schedule_work(vha, MBA_IDC_AEN); |
539 | } | |
540 | } | |
541 | ||
bb4cf5b7 CD |
542 | int |
543 | qla2x00_is_a_vp_did(scsi_qla_host_t *vha, uint32_t rscn_entry) | |
544 | { | |
545 | struct qla_hw_data *ha = vha->hw; | |
546 | scsi_qla_host_t *vp; | |
547 | uint32_t vp_did; | |
548 | unsigned long flags; | |
549 | int ret = 0; | |
550 | ||
551 | if (!ha->num_vhosts) | |
552 | return ret; | |
553 | ||
554 | spin_lock_irqsave(&ha->vport_slock, flags); | |
555 | list_for_each_entry(vp, &ha->vp_list, list) { | |
556 | vp_did = vp->d_id.b24; | |
557 | if (vp_did == rscn_entry) { | |
558 | ret = 1; | |
559 | break; | |
560 | } | |
561 | } | |
562 | spin_unlock_irqrestore(&ha->vport_slock, flags); | |
563 | ||
564 | return ret; | |
565 | } | |
566 | ||
726b8548 | 567 | fc_port_t * |
17cac3a1 JC |
568 | qla2x00_find_fcport_by_loopid(scsi_qla_host_t *vha, uint16_t loop_id) |
569 | { | |
726b8548 QT |
570 | fc_port_t *f, *tf; |
571 | ||
572 | f = tf = NULL; | |
573 | list_for_each_entry_safe(f, tf, &vha->vp_fcports, list) | |
574 | if (f->loop_id == loop_id) | |
575 | return f; | |
576 | return NULL; | |
577 | } | |
17cac3a1 | 578 | |
726b8548 QT |
579 | fc_port_t * |
580 | qla2x00_find_fcport_by_wwpn(scsi_qla_host_t *vha, u8 *wwpn, u8 incl_deleted) | |
581 | { | |
582 | fc_port_t *f, *tf; | |
583 | ||
584 | f = tf = NULL; | |
585 | list_for_each_entry_safe(f, tf, &vha->vp_fcports, list) { | |
586 | if (memcmp(f->port_name, wwpn, WWN_SIZE) == 0) { | |
587 | if (incl_deleted) | |
588 | return f; | |
589 | else if (f->deleted == 0) | |
590 | return f; | |
591 | } | |
592 | } | |
593 | return NULL; | |
594 | } | |
17cac3a1 | 595 | |
726b8548 QT |
596 | fc_port_t * |
597 | qla2x00_find_fcport_by_nportid(scsi_qla_host_t *vha, port_id_t *id, | |
598 | u8 incl_deleted) | |
599 | { | |
600 | fc_port_t *f, *tf; | |
601 | ||
602 | f = tf = NULL; | |
603 | list_for_each_entry_safe(f, tf, &vha->vp_fcports, list) { | |
604 | if (f->d_id.b24 == id->b24) { | |
605 | if (incl_deleted) | |
606 | return f; | |
607 | else if (f->deleted == 0) | |
608 | return f; | |
609 | } | |
610 | } | |
17cac3a1 JC |
611 | return NULL; |
612 | } | |
613 | ||
1da177e4 LT |
614 | /** |
615 | * qla2x00_async_event() - Process aynchronous events. | |
2db6228d BVA |
616 | * @vha: SCSI driver HA context |
617 | * @rsp: response queue | |
9a853f71 | 618 | * @mb: Mailbox registers (0 - 3) |
1da177e4 | 619 | */ |
2c3dfe3f | 620 | void |
73208dfd | 621 | qla2x00_async_event(scsi_qla_host_t *vha, struct rsp_que *rsp, uint16_t *mb) |
1da177e4 | 622 | { |
1da177e4 | 623 | uint16_t handle_cnt; |
bdab23da | 624 | uint16_t cnt, mbx; |
1da177e4 | 625 | uint32_t handles[5]; |
e315cd28 | 626 | struct qla_hw_data *ha = vha->hw; |
3d71644c | 627 | struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; |
bdab23da | 628 | struct device_reg_24xx __iomem *reg24 = &ha->iobase->isp24; |
bc5c2aad | 629 | struct device_reg_82xx __iomem *reg82 = &ha->iobase->isp82; |
52c82823 | 630 | uint32_t rscn_entry, host_pid; |
4d4df193 | 631 | unsigned long flags; |
ef86cb20 | 632 | fc_port_t *fcport = NULL; |
1da177e4 | 633 | |
45235022 QT |
634 | if (!vha->hw->flags.fw_started) |
635 | return; | |
636 | ||
1da177e4 LT |
637 | /* Setup to process RIO completion. */ |
638 | handle_cnt = 0; | |
6246b8a1 | 639 | if (IS_CNA_CAPABLE(ha)) |
3a03eb79 | 640 | goto skip_rio; |
1da177e4 LT |
641 | switch (mb[0]) { |
642 | case MBA_SCSI_COMPLETION: | |
9a853f71 | 643 | handles[0] = le32_to_cpu((uint32_t)((mb[2] << 16) | mb[1])); |
1da177e4 LT |
644 | handle_cnt = 1; |
645 | break; | |
646 | case MBA_CMPLT_1_16BIT: | |
9a853f71 | 647 | handles[0] = mb[1]; |
1da177e4 LT |
648 | handle_cnt = 1; |
649 | mb[0] = MBA_SCSI_COMPLETION; | |
650 | break; | |
651 | case MBA_CMPLT_2_16BIT: | |
9a853f71 AV |
652 | handles[0] = mb[1]; |
653 | handles[1] = mb[2]; | |
1da177e4 LT |
654 | handle_cnt = 2; |
655 | mb[0] = MBA_SCSI_COMPLETION; | |
656 | break; | |
657 | case MBA_CMPLT_3_16BIT: | |
9a853f71 AV |
658 | handles[0] = mb[1]; |
659 | handles[1] = mb[2]; | |
660 | handles[2] = mb[3]; | |
1da177e4 LT |
661 | handle_cnt = 3; |
662 | mb[0] = MBA_SCSI_COMPLETION; | |
663 | break; | |
664 | case MBA_CMPLT_4_16BIT: | |
9a853f71 AV |
665 | handles[0] = mb[1]; |
666 | handles[1] = mb[2]; | |
667 | handles[2] = mb[3]; | |
1da177e4 LT |
668 | handles[3] = (uint32_t)RD_MAILBOX_REG(ha, reg, 6); |
669 | handle_cnt = 4; | |
670 | mb[0] = MBA_SCSI_COMPLETION; | |
671 | break; | |
672 | case MBA_CMPLT_5_16BIT: | |
9a853f71 AV |
673 | handles[0] = mb[1]; |
674 | handles[1] = mb[2]; | |
675 | handles[2] = mb[3]; | |
1da177e4 LT |
676 | handles[3] = (uint32_t)RD_MAILBOX_REG(ha, reg, 6); |
677 | handles[4] = (uint32_t)RD_MAILBOX_REG(ha, reg, 7); | |
678 | handle_cnt = 5; | |
679 | mb[0] = MBA_SCSI_COMPLETION; | |
680 | break; | |
681 | case MBA_CMPLT_2_32BIT: | |
9a853f71 | 682 | handles[0] = le32_to_cpu((uint32_t)((mb[2] << 16) | mb[1])); |
1da177e4 LT |
683 | handles[1] = le32_to_cpu( |
684 | ((uint32_t)(RD_MAILBOX_REG(ha, reg, 7) << 16)) | | |
685 | RD_MAILBOX_REG(ha, reg, 6)); | |
686 | handle_cnt = 2; | |
687 | mb[0] = MBA_SCSI_COMPLETION; | |
688 | break; | |
689 | default: | |
690 | break; | |
691 | } | |
3a03eb79 | 692 | skip_rio: |
1da177e4 LT |
693 | switch (mb[0]) { |
694 | case MBA_SCSI_COMPLETION: /* Fast Post */ | |
e315cd28 | 695 | if (!vha->flags.online) |
1da177e4 LT |
696 | break; |
697 | ||
698 | for (cnt = 0; cnt < handle_cnt; cnt++) | |
73208dfd AC |
699 | qla2x00_process_completed_request(vha, rsp->req, |
700 | handles[cnt]); | |
1da177e4 LT |
701 | break; |
702 | ||
703 | case MBA_RESET: /* Reset */ | |
7c3df132 SK |
704 | ql_dbg(ql_dbg_async, vha, 0x5002, |
705 | "Asynchronous RESET.\n"); | |
1da177e4 | 706 | |
e315cd28 | 707 | set_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); |
1da177e4 LT |
708 | break; |
709 | ||
710 | case MBA_SYSTEM_ERR: /* System Error */ | |
f73cb695 | 711 | mbx = (IS_QLA81XX(ha) || IS_QLA83XX(ha) || IS_QLA27XX(ha)) ? |
6246b8a1 | 712 | RD_REG_WORD(®24->mailbox7) : 0; |
7c3df132 | 713 | ql_log(ql_log_warn, vha, 0x5003, |
bdab23da AV |
714 | "ISP System Error - mbx1=%xh mbx2=%xh mbx3=%xh " |
715 | "mbx7=%xh.\n", mb[1], mb[2], mb[3], mbx); | |
1da177e4 | 716 | |
e315cd28 | 717 | ha->isp_ops->fw_dump(vha, 1); |
ec7193e2 | 718 | ha->flags.fw_init_done = 0; |
4b60c827 | 719 | QLA_FW_STOPPED(ha); |
1da177e4 | 720 | |
e428924c | 721 | if (IS_FWI2_CAPABLE(ha)) { |
9a853f71 | 722 | if (mb[1] == 0 && mb[2] == 0) { |
7c3df132 | 723 | ql_log(ql_log_fatal, vha, 0x5004, |
9a853f71 AV |
724 | "Unrecoverable Hardware Error: adapter " |
725 | "marked OFFLINE!\n"); | |
e315cd28 | 726 | vha->flags.online = 0; |
6246b8a1 | 727 | vha->device_flags |= DFLG_DEV_FAILED; |
b1d46989 | 728 | } else { |
25985edc | 729 | /* Check to see if MPI timeout occurred */ |
f73cb695 | 730 | if ((mbx & MBX_3) && (ha->port_no == 0)) |
b1d46989 MI |
731 | set_bit(MPI_RESET_NEEDED, |
732 | &vha->dpc_flags); | |
733 | ||
e315cd28 | 734 | set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); |
b1d46989 | 735 | } |
9a853f71 | 736 | } else if (mb[1] == 0) { |
7c3df132 | 737 | ql_log(ql_log_fatal, vha, 0x5005, |
1da177e4 LT |
738 | "Unrecoverable Hardware Error: adapter marked " |
739 | "OFFLINE!\n"); | |
e315cd28 | 740 | vha->flags.online = 0; |
6246b8a1 | 741 | vha->device_flags |= DFLG_DEV_FAILED; |
1da177e4 | 742 | } else |
e315cd28 | 743 | set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); |
1da177e4 LT |
744 | break; |
745 | ||
746 | case MBA_REQ_TRANSFER_ERR: /* Request Transfer Error */ | |
7c3df132 SK |
747 | ql_log(ql_log_warn, vha, 0x5006, |
748 | "ISP Request Transfer Error (%x).\n", mb[1]); | |
1da177e4 | 749 | |
e315cd28 | 750 | set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); |
1da177e4 LT |
751 | break; |
752 | ||
753 | case MBA_RSP_TRANSFER_ERR: /* Response Transfer Error */ | |
7c3df132 | 754 | ql_log(ql_log_warn, vha, 0x5007, |
41233cd3 | 755 | "ISP Response Transfer Error (%x).\n", mb[1]); |
1da177e4 | 756 | |
e315cd28 | 757 | set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); |
1da177e4 LT |
758 | break; |
759 | ||
760 | case MBA_WAKEUP_THRES: /* Request Queue Wake-up */ | |
7c3df132 | 761 | ql_dbg(ql_dbg_async, vha, 0x5008, |
41233cd3 JC |
762 | "Asynchronous WAKEUP_THRES (%x).\n", mb[1]); |
763 | break; | |
1da177e4 | 764 | |
41233cd3 | 765 | case MBA_LOOP_INIT_ERR: |
75d560e0 | 766 | ql_log(ql_log_warn, vha, 0x5090, |
41233cd3 JC |
767 | "LOOP INIT ERROR (%x).\n", mb[1]); |
768 | ha->isp_ops->fw_dump(vha, 1); | |
769 | set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); | |
2d70c103 | 770 | break; |
41233cd3 | 771 | |
1da177e4 | 772 | case MBA_LIP_OCCURRED: /* Loop Initialization Procedure */ |
ec7193e2 | 773 | ha->flags.lip_ae = 1; |
ec7193e2 | 774 | |
cfb0919c | 775 | ql_dbg(ql_dbg_async, vha, 0x5009, |
7c3df132 | 776 | "LIP occurred (%x).\n", mb[1]); |
1da177e4 | 777 | |
e315cd28 AC |
778 | if (atomic_read(&vha->loop_state) != LOOP_DOWN) { |
779 | atomic_set(&vha->loop_state, LOOP_DOWN); | |
780 | atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME); | |
781 | qla2x00_mark_all_devices_lost(vha, 1); | |
1da177e4 LT |
782 | } |
783 | ||
e315cd28 AC |
784 | if (vha->vp_idx) { |
785 | atomic_set(&vha->vp_state, VP_FAILED); | |
786 | fc_vport_set_state(vha->fc_vport, FC_VPORT_FAILED); | |
2c3dfe3f SJ |
787 | } |
788 | ||
e315cd28 AC |
789 | set_bit(REGISTER_FC4_NEEDED, &vha->dpc_flags); |
790 | set_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags); | |
1da177e4 | 791 | |
e315cd28 AC |
792 | vha->flags.management_server_logged_in = 0; |
793 | qla2x00_post_aen_work(vha, FCH_EVT_LIP, mb[1]); | |
1da177e4 LT |
794 | break; |
795 | ||
796 | case MBA_LOOP_UP: /* Loop Up Event */ | |
daae62a3 | 797 | if (IS_QLA2100(ha) || IS_QLA2200(ha)) |
d8b45213 | 798 | ha->link_data_rate = PORT_SPEED_1GB; |
daae62a3 | 799 | else |
1da177e4 | 800 | ha->link_data_rate = mb[1]; |
1da177e4 | 801 | |
8e5a9484 | 802 | ql_log(ql_log_info, vha, 0x500a, |
daae62a3 | 803 | "LOOP UP detected (%s Gbps).\n", |
d0297c9a | 804 | qla2x00_get_link_speed_str(ha, ha->link_data_rate)); |
1da177e4 | 805 | |
e315cd28 AC |
806 | vha->flags.management_server_logged_in = 0; |
807 | qla2x00_post_aen_work(vha, FCH_EVT_LINKUP, ha->link_data_rate); | |
e4e3a2ce QT |
808 | |
809 | if (AUTO_DETECT_SFP_SUPPORT(vha)) { | |
810 | set_bit(DETECT_SFP_CHANGE, &vha->dpc_flags); | |
811 | qla2xxx_wake_dpc(vha); | |
812 | } | |
1da177e4 LT |
813 | break; |
814 | ||
815 | case MBA_LOOP_DOWN: /* Loop Down Event */ | |
9cd883f0 | 816 | SAVE_TOPO(ha); |
ec7193e2 QT |
817 | ha->flags.lip_ae = 0; |
818 | ha->current_topology = 0; | |
819 | ||
6246b8a1 GM |
820 | mbx = (IS_QLA81XX(ha) || IS_QLA8031(ha)) |
821 | ? RD_REG_WORD(®24->mailbox4) : 0; | |
7ec0effd AD |
822 | mbx = (IS_P3P_TYPE(ha)) ? RD_REG_WORD(®82->mailbox_out[4]) |
823 | : mbx; | |
8e5a9484 | 824 | ql_log(ql_log_info, vha, 0x500b, |
7c3df132 SK |
825 | "LOOP DOWN detected (%x %x %x %x).\n", |
826 | mb[1], mb[2], mb[3], mbx); | |
1da177e4 | 827 | |
e315cd28 AC |
828 | if (atomic_read(&vha->loop_state) != LOOP_DOWN) { |
829 | atomic_set(&vha->loop_state, LOOP_DOWN); | |
830 | atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME); | |
2486c627 HM |
831 | /* |
832 | * In case of loop down, restore WWPN from | |
833 | * NVRAM in case of FA-WWPN capable ISP | |
718abbdc | 834 | * Restore for Physical Port only |
2486c627 | 835 | */ |
718abbdc SC |
836 | if (!vha->vp_idx) { |
837 | if (ha->flags.fawwpn_enabled) { | |
838 | void *wwpn = ha->init_cb->port_name; | |
839 | memcpy(vha->port_name, wwpn, WWN_SIZE); | |
840 | fc_host_port_name(vha->host) = | |
841 | wwn_to_u64(vha->port_name); | |
842 | ql_dbg(ql_dbg_init + ql_dbg_verbose, | |
83548fe2 | 843 | vha, 0x00d8, "LOOP DOWN detected," |
718abbdc SC |
844 | "restore WWPN %016llx\n", |
845 | wwn_to_u64(vha->port_name)); | |
846 | } | |
847 | ||
848 | clear_bit(VP_CONFIG_OK, &vha->vp_flags); | |
2486c627 HM |
849 | } |
850 | ||
e315cd28 AC |
851 | vha->device_flags |= DFLG_NO_CABLE; |
852 | qla2x00_mark_all_devices_lost(vha, 1); | |
1da177e4 LT |
853 | } |
854 | ||
e315cd28 AC |
855 | if (vha->vp_idx) { |
856 | atomic_set(&vha->vp_state, VP_FAILED); | |
857 | fc_vport_set_state(vha->fc_vport, FC_VPORT_FAILED); | |
2c3dfe3f SJ |
858 | } |
859 | ||
e315cd28 | 860 | vha->flags.management_server_logged_in = 0; |
d8b45213 | 861 | ha->link_data_rate = PORT_SPEED_UNKNOWN; |
e315cd28 | 862 | qla2x00_post_aen_work(vha, FCH_EVT_LINKDOWN, 0); |
1da177e4 LT |
863 | break; |
864 | ||
865 | case MBA_LIP_RESET: /* LIP reset occurred */ | |
cfb0919c | 866 | ql_dbg(ql_dbg_async, vha, 0x500c, |
cc3ef7bc | 867 | "LIP reset occurred (%x).\n", mb[1]); |
1da177e4 | 868 | |
e315cd28 AC |
869 | if (atomic_read(&vha->loop_state) != LOOP_DOWN) { |
870 | atomic_set(&vha->loop_state, LOOP_DOWN); | |
871 | atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME); | |
872 | qla2x00_mark_all_devices_lost(vha, 1); | |
1da177e4 LT |
873 | } |
874 | ||
e315cd28 AC |
875 | if (vha->vp_idx) { |
876 | atomic_set(&vha->vp_state, VP_FAILED); | |
877 | fc_vport_set_state(vha->fc_vport, FC_VPORT_FAILED); | |
2c3dfe3f SJ |
878 | } |
879 | ||
e315cd28 | 880 | set_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); |
1da177e4 LT |
881 | |
882 | ha->operating_mode = LOOP; | |
e315cd28 AC |
883 | vha->flags.management_server_logged_in = 0; |
884 | qla2x00_post_aen_work(vha, FCH_EVT_LIPRESET, mb[1]); | |
1da177e4 LT |
885 | break; |
886 | ||
3a03eb79 | 887 | /* case MBA_DCBX_COMPLETE: */ |
1da177e4 | 888 | case MBA_POINT_TO_POINT: /* Point-to-Point */ |
ec7193e2 | 889 | ha->flags.lip_ae = 0; |
ec7193e2 | 890 | |
1da177e4 LT |
891 | if (IS_QLA2100(ha)) |
892 | break; | |
893 | ||
7ec0effd | 894 | if (IS_CNA_CAPABLE(ha)) { |
7c3df132 SK |
895 | ql_dbg(ql_dbg_async, vha, 0x500d, |
896 | "DCBX Completed -- %04x %04x %04x.\n", | |
897 | mb[1], mb[2], mb[3]); | |
9aaf2cea | 898 | if (ha->notify_dcbx_comp && !vha->vp_idx) |
23f2ebd1 SR |
899 | complete(&ha->dcbx_comp); |
900 | ||
901 | } else | |
7c3df132 SK |
902 | ql_dbg(ql_dbg_async, vha, 0x500e, |
903 | "Asynchronous P2P MODE received.\n"); | |
1da177e4 LT |
904 | |
905 | /* | |
906 | * Until there's a transition from loop down to loop up, treat | |
907 | * this as loop down only. | |
908 | */ | |
e315cd28 AC |
909 | if (atomic_read(&vha->loop_state) != LOOP_DOWN) { |
910 | atomic_set(&vha->loop_state, LOOP_DOWN); | |
911 | if (!atomic_read(&vha->loop_down_timer)) | |
912 | atomic_set(&vha->loop_down_timer, | |
1da177e4 | 913 | LOOP_DOWN_TIME); |
48acad09 QT |
914 | if (!N2N_TOPO(ha)) |
915 | qla2x00_mark_all_devices_lost(vha, 1); | |
1da177e4 LT |
916 | } |
917 | ||
e315cd28 AC |
918 | if (vha->vp_idx) { |
919 | atomic_set(&vha->vp_state, VP_FAILED); | |
920 | fc_vport_set_state(vha->fc_vport, FC_VPORT_FAILED); | |
2c3dfe3f SJ |
921 | } |
922 | ||
e315cd28 AC |
923 | if (!(test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags))) |
924 | set_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); | |
925 | ||
926 | set_bit(REGISTER_FC4_NEEDED, &vha->dpc_flags); | |
927 | set_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags); | |
4346b149 | 928 | |
e315cd28 | 929 | vha->flags.management_server_logged_in = 0; |
1da177e4 LT |
930 | break; |
931 | ||
932 | case MBA_CHG_IN_CONNECTION: /* Change in connection mode */ | |
933 | if (IS_QLA2100(ha)) | |
934 | break; | |
935 | ||
cfb0919c | 936 | ql_dbg(ql_dbg_async, vha, 0x500f, |
1da177e4 LT |
937 | "Configuration change detected: value=%x.\n", mb[1]); |
938 | ||
e315cd28 AC |
939 | if (atomic_read(&vha->loop_state) != LOOP_DOWN) { |
940 | atomic_set(&vha->loop_state, LOOP_DOWN); | |
941 | if (!atomic_read(&vha->loop_down_timer)) | |
942 | atomic_set(&vha->loop_down_timer, | |
1da177e4 | 943 | LOOP_DOWN_TIME); |
e315cd28 | 944 | qla2x00_mark_all_devices_lost(vha, 1); |
1da177e4 LT |
945 | } |
946 | ||
e315cd28 AC |
947 | if (vha->vp_idx) { |
948 | atomic_set(&vha->vp_state, VP_FAILED); | |
949 | fc_vport_set_state(vha->fc_vport, FC_VPORT_FAILED); | |
2c3dfe3f SJ |
950 | } |
951 | ||
e315cd28 AC |
952 | set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); |
953 | set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); | |
1da177e4 LT |
954 | break; |
955 | ||
956 | case MBA_PORT_UPDATE: /* Port database update */ | |
55903b9d SV |
957 | /* |
958 | * Handle only global and vn-port update events | |
959 | * | |
960 | * Relevant inputs: | |
961 | * mb[1] = N_Port handle of changed port | |
962 | * OR 0xffff for global event | |
963 | * mb[2] = New login state | |
964 | * 7 = Port logged out | |
965 | * mb[3] = LSB is vp_idx, 0xff = all vps | |
966 | * | |
967 | * Skip processing if: | |
968 | * Event is global, vp_idx is NOT all vps, | |
969 | * vp_idx does not match | |
970 | * Event is not global, vp_idx does not match | |
971 | */ | |
12cec63e AV |
972 | if (IS_QLA2XXX_MIDTYPE(ha) && |
973 | ((mb[1] == 0xffff && (mb[3] & 0xff) != 0xff) || | |
974 | (mb[1] != 0xffff)) && vha->vp_idx != (mb[3] & 0xff)) | |
975 | break; | |
73208dfd | 976 | |
17cac3a1 | 977 | if (mb[2] == 0x7) { |
7c3df132 | 978 | ql_dbg(ql_dbg_async, vha, 0x5010, |
17cac3a1 JC |
979 | "Port %s %04x %04x %04x.\n", |
980 | mb[1] == 0xffff ? "unavailable" : "logout", | |
7c3df132 | 981 | mb[1], mb[2], mb[3]); |
17cac3a1 JC |
982 | |
983 | if (mb[1] == 0xffff) | |
984 | goto global_port_update; | |
985 | ||
b98ae0d7 QT |
986 | if (mb[1] == NPH_SNS_LID(ha)) { |
987 | set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); | |
988 | set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); | |
989 | break; | |
990 | } | |
991 | ||
992 | /* use handle_cnt for loop id/nport handle */ | |
993 | if (IS_FWI2_CAPABLE(ha)) | |
994 | handle_cnt = NPH_SNS; | |
995 | else | |
996 | handle_cnt = SIMPLE_NAME_SERVER; | |
997 | if (mb[1] == handle_cnt) { | |
998 | set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); | |
999 | set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); | |
1000 | break; | |
1001 | } | |
1002 | ||
17cac3a1 JC |
1003 | /* Port logout */ |
1004 | fcport = qla2x00_find_fcport_by_loopid(vha, mb[1]); | |
1005 | if (!fcport) | |
1006 | break; | |
1007 | if (atomic_read(&fcport->state) != FCS_ONLINE) | |
1008 | break; | |
1009 | ql_dbg(ql_dbg_async, vha, 0x508a, | |
1010 | "Marking port lost loopid=%04x portid=%06x.\n", | |
1011 | fcport->loop_id, fcport->d_id.b24); | |
726b8548 QT |
1012 | if (qla_ini_mode_enabled(vha)) { |
1013 | qla2x00_mark_device_lost(fcport->vha, fcport, 1, 1); | |
1014 | fcport->logout_on_delete = 0; | |
d8630bb9 | 1015 | qlt_schedule_sess_for_deletion(fcport); |
726b8548 | 1016 | } |
17cac3a1 JC |
1017 | break; |
1018 | ||
1019 | global_port_update: | |
9764ff88 AV |
1020 | if (atomic_read(&vha->loop_state) != LOOP_DOWN) { |
1021 | atomic_set(&vha->loop_state, LOOP_DOWN); | |
1022 | atomic_set(&vha->loop_down_timer, | |
1023 | LOOP_DOWN_TIME); | |
1024 | vha->device_flags |= DFLG_NO_CABLE; | |
1025 | qla2x00_mark_all_devices_lost(vha, 1); | |
1026 | } | |
1027 | ||
1028 | if (vha->vp_idx) { | |
1029 | atomic_set(&vha->vp_state, VP_FAILED); | |
1030 | fc_vport_set_state(vha->fc_vport, | |
1031 | FC_VPORT_FAILED); | |
faadc5e7 | 1032 | qla2x00_mark_all_devices_lost(vha, 1); |
9764ff88 AV |
1033 | } |
1034 | ||
1035 | vha->flags.management_server_logged_in = 0; | |
1036 | ha->link_data_rate = PORT_SPEED_UNKNOWN; | |
1037 | break; | |
1038 | } | |
1039 | ||
1da177e4 | 1040 | /* |
cc3ef7bc | 1041 | * If PORT UPDATE is global (received LIP_OCCURRED/LIP_RESET |
1da177e4 LT |
1042 | * event etc. earlier indicating loop is down) then process |
1043 | * it. Otherwise ignore it and Wait for RSCN to come in. | |
1044 | */ | |
e315cd28 | 1045 | atomic_set(&vha->loop_down_timer, 0); |
8e5a9484 | 1046 | if (atomic_read(&vha->loop_state) != LOOP_DOWN && |
edd05de1 | 1047 | !ha->flags.n2n_ae && |
8e5a9484 | 1048 | atomic_read(&vha->loop_state) != LOOP_DEAD) { |
7c3df132 SK |
1049 | ql_dbg(ql_dbg_async, vha, 0x5011, |
1050 | "Asynchronous PORT UPDATE ignored %04x/%04x/%04x.\n", | |
1051 | mb[1], mb[2], mb[3]); | |
2d70c103 NB |
1052 | |
1053 | qlt_async_event(mb[0], vha, mb); | |
1da177e4 LT |
1054 | break; |
1055 | } | |
1056 | ||
7c3df132 SK |
1057 | ql_dbg(ql_dbg_async, vha, 0x5012, |
1058 | "Port database changed %04x %04x %04x.\n", | |
1059 | mb[1], mb[2], mb[3]); | |
1da177e4 LT |
1060 | |
1061 | /* | |
1062 | * Mark all devices as missing so we will login again. | |
1063 | */ | |
e315cd28 | 1064 | atomic_set(&vha->loop_state, LOOP_UP); |
6944dccb | 1065 | vha->scan.scan_retry = 0; |
1da177e4 | 1066 | |
e315cd28 AC |
1067 | set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); |
1068 | set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); | |
ded6411f | 1069 | set_bit(VP_CONFIG_OK, &vha->vp_flags); |
2d70c103 NB |
1070 | |
1071 | qlt_async_event(mb[0], vha, mb); | |
1da177e4 LT |
1072 | break; |
1073 | ||
1074 | case MBA_RSCN_UPDATE: /* State Change Registration */ | |
3c397400 | 1075 | /* Check if the Vport has issued a SCR */ |
e315cd28 | 1076 | if (vha->vp_idx && test_bit(VP_SCR_NEEDED, &vha->vp_flags)) |
3c397400 SJ |
1077 | break; |
1078 | /* Only handle SCNs for our Vport index. */ | |
0d6e61bc | 1079 | if (ha->flags.npiv_supported && vha->vp_idx != (mb[3] & 0xff)) |
3c397400 | 1080 | break; |
0d6e61bc | 1081 | |
7c3df132 SK |
1082 | ql_dbg(ql_dbg_async, vha, 0x5013, |
1083 | "RSCN database changed -- %04x %04x %04x.\n", | |
1084 | mb[1], mb[2], mb[3]); | |
1da177e4 | 1085 | |
59d72d87 | 1086 | rscn_entry = ((mb[1] & 0xff) << 16) | mb[2]; |
e315cd28 AC |
1087 | host_pid = (vha->d_id.b.domain << 16) | (vha->d_id.b.area << 8) |
1088 | | vha->d_id.b.al_pa; | |
1da177e4 | 1089 | if (rscn_entry == host_pid) { |
7c3df132 SK |
1090 | ql_dbg(ql_dbg_async, vha, 0x5014, |
1091 | "Ignoring RSCN update to local host " | |
1092 | "port ID (%06x).\n", host_pid); | |
1da177e4 LT |
1093 | break; |
1094 | } | |
1095 | ||
59d72d87 RA |
1096 | /* Ignore reserved bits from RSCN-payload. */ |
1097 | rscn_entry = ((mb[1] & 0x3ff) << 16) | mb[2]; | |
1da177e4 | 1098 | |
bb4cf5b7 CD |
1099 | /* Skip RSCNs for virtual ports on the same physical port */ |
1100 | if (qla2x00_is_a_vp_did(vha, rscn_entry)) | |
1101 | break; | |
1102 | ||
e315cd28 AC |
1103 | atomic_set(&vha->loop_down_timer, 0); |
1104 | vha->flags.management_server_logged_in = 0; | |
726b8548 QT |
1105 | { |
1106 | struct event_arg ea; | |
1da177e4 | 1107 | |
726b8548 QT |
1108 | memset(&ea, 0, sizeof(ea)); |
1109 | ea.event = FCME_RSCN; | |
1110 | ea.id.b24 = rscn_entry; | |
41dc529a | 1111 | ea.id.b.rsvd_1 = rscn_entry >> 24; |
726b8548 | 1112 | qla2x00_fcport_event_handler(vha, &ea); |
41dc529a | 1113 | qla2x00_post_aen_work(vha, FCH_EVT_RSCN, rscn_entry); |
726b8548 | 1114 | } |
1da177e4 | 1115 | break; |
1da177e4 LT |
1116 | /* case MBA_RIO_RESPONSE: */ |
1117 | case MBA_ZIO_RESPONSE: | |
7c3df132 SK |
1118 | ql_dbg(ql_dbg_async, vha, 0x5015, |
1119 | "[R|Z]IO update completion.\n"); | |
1da177e4 | 1120 | |
e428924c | 1121 | if (IS_FWI2_CAPABLE(ha)) |
2afa19a9 | 1122 | qla24xx_process_response_queue(vha, rsp); |
4fdfefe5 | 1123 | else |
73208dfd | 1124 | qla2x00_process_response_queue(rsp); |
1da177e4 | 1125 | break; |
9a853f71 AV |
1126 | |
1127 | case MBA_DISCARD_RND_FRAME: | |
7c3df132 SK |
1128 | ql_dbg(ql_dbg_async, vha, 0x5016, |
1129 | "Discard RND Frame -- %04x %04x %04x.\n", | |
1130 | mb[1], mb[2], mb[3]); | |
9a853f71 | 1131 | break; |
45ebeb56 AV |
1132 | |
1133 | case MBA_TRACE_NOTIFICATION: | |
7c3df132 SK |
1134 | ql_dbg(ql_dbg_async, vha, 0x5017, |
1135 | "Trace Notification -- %04x %04x.\n", mb[1], mb[2]); | |
45ebeb56 | 1136 | break; |
4d4df193 HK |
1137 | |
1138 | case MBA_ISP84XX_ALERT: | |
7c3df132 SK |
1139 | ql_dbg(ql_dbg_async, vha, 0x5018, |
1140 | "ISP84XX Alert Notification -- %04x %04x %04x.\n", | |
1141 | mb[1], mb[2], mb[3]); | |
4d4df193 HK |
1142 | |
1143 | spin_lock_irqsave(&ha->cs84xx->access_lock, flags); | |
1144 | switch (mb[1]) { | |
1145 | case A84_PANIC_RECOVERY: | |
7c3df132 SK |
1146 | ql_log(ql_log_info, vha, 0x5019, |
1147 | "Alert 84XX: panic recovery %04x %04x.\n", | |
1148 | mb[2], mb[3]); | |
4d4df193 HK |
1149 | break; |
1150 | case A84_OP_LOGIN_COMPLETE: | |
1151 | ha->cs84xx->op_fw_version = mb[3] << 16 | mb[2]; | |
7c3df132 SK |
1152 | ql_log(ql_log_info, vha, 0x501a, |
1153 | "Alert 84XX: firmware version %x.\n", | |
1154 | ha->cs84xx->op_fw_version); | |
4d4df193 HK |
1155 | break; |
1156 | case A84_DIAG_LOGIN_COMPLETE: | |
1157 | ha->cs84xx->diag_fw_version = mb[3] << 16 | mb[2]; | |
7c3df132 SK |
1158 | ql_log(ql_log_info, vha, 0x501b, |
1159 | "Alert 84XX: diagnostic firmware version %x.\n", | |
1160 | ha->cs84xx->diag_fw_version); | |
4d4df193 HK |
1161 | break; |
1162 | case A84_GOLD_LOGIN_COMPLETE: | |
1163 | ha->cs84xx->diag_fw_version = mb[3] << 16 | mb[2]; | |
1164 | ha->cs84xx->fw_update = 1; | |
7c3df132 SK |
1165 | ql_log(ql_log_info, vha, 0x501c, |
1166 | "Alert 84XX: gold firmware version %x.\n", | |
1167 | ha->cs84xx->gold_fw_version); | |
4d4df193 HK |
1168 | break; |
1169 | default: | |
7c3df132 SK |
1170 | ql_log(ql_log_warn, vha, 0x501d, |
1171 | "Alert 84xx: Invalid Alert %04x %04x %04x.\n", | |
4d4df193 HK |
1172 | mb[1], mb[2], mb[3]); |
1173 | } | |
1174 | spin_unlock_irqrestore(&ha->cs84xx->access_lock, flags); | |
1175 | break; | |
3a03eb79 | 1176 | case MBA_DCBX_START: |
7c3df132 SK |
1177 | ql_dbg(ql_dbg_async, vha, 0x501e, |
1178 | "DCBX Started -- %04x %04x %04x.\n", | |
1179 | mb[1], mb[2], mb[3]); | |
3a03eb79 AV |
1180 | break; |
1181 | case MBA_DCBX_PARAM_UPDATE: | |
7c3df132 SK |
1182 | ql_dbg(ql_dbg_async, vha, 0x501f, |
1183 | "DCBX Parameters Updated -- %04x %04x %04x.\n", | |
1184 | mb[1], mb[2], mb[3]); | |
3a03eb79 AV |
1185 | break; |
1186 | case MBA_FCF_CONF_ERR: | |
7c3df132 SK |
1187 | ql_dbg(ql_dbg_async, vha, 0x5020, |
1188 | "FCF Configuration Error -- %04x %04x %04x.\n", | |
1189 | mb[1], mb[2], mb[3]); | |
3a03eb79 | 1190 | break; |
3a03eb79 | 1191 | case MBA_IDC_NOTIFY: |
7ec0effd | 1192 | if (IS_QLA8031(vha->hw) || IS_QLA8044(ha)) { |
67b2a31f CD |
1193 | mb[4] = RD_REG_WORD(®24->mailbox4); |
1194 | if (((mb[2] & 0x7fff) == MBC_PORT_RESET || | |
1195 | (mb[2] & 0x7fff) == MBC_SET_PORT_CONFIG) && | |
1196 | (mb[4] & INTERNAL_LOOPBACK_MASK) != 0) { | |
8fcd6b8b | 1197 | set_bit(ISP_QUIESCE_NEEDED, &vha->dpc_flags); |
67b2a31f CD |
1198 | /* |
1199 | * Extend loop down timer since port is active. | |
1200 | */ | |
1201 | if (atomic_read(&vha->loop_state) == LOOP_DOWN) | |
1202 | atomic_set(&vha->loop_down_timer, | |
1203 | LOOP_DOWN_TIME); | |
8fcd6b8b CD |
1204 | qla2xxx_wake_dpc(vha); |
1205 | } | |
67b2a31f | 1206 | } |
81881861 | 1207 | /* fall through */ |
8fcd6b8b | 1208 | case MBA_IDC_COMPLETE: |
9aaf2cea | 1209 | if (ha->notify_lb_portup_comp && !vha->vp_idx) |
f356bef1 CD |
1210 | complete(&ha->lb_portup_comp); |
1211 | /* Fallthru */ | |
3a03eb79 | 1212 | case MBA_IDC_TIME_EXT: |
7ec0effd AD |
1213 | if (IS_QLA81XX(vha->hw) || IS_QLA8031(vha->hw) || |
1214 | IS_QLA8044(ha)) | |
7d613ac6 SV |
1215 | qla81xx_idc_event(vha, mb[0], mb[1]); |
1216 | break; | |
1217 | ||
1218 | case MBA_IDC_AEN: | |
1219 | mb[4] = RD_REG_WORD(®24->mailbox4); | |
1220 | mb[5] = RD_REG_WORD(®24->mailbox5); | |
1221 | mb[6] = RD_REG_WORD(®24->mailbox6); | |
1222 | mb[7] = RD_REG_WORD(®24->mailbox7); | |
1223 | qla83xx_handle_8200_aen(vha, mb); | |
3a03eb79 | 1224 | break; |
7d613ac6 | 1225 | |
b5a340dd JC |
1226 | case MBA_DPORT_DIAGNOSTICS: |
1227 | ql_dbg(ql_dbg_async, vha, 0x5052, | |
ef55e513 | 1228 | "D-Port Diagnostics: %04x result=%s\n", |
ec891462 | 1229 | mb[0], |
b5a340dd | 1230 | mb[1] == 0 ? "start" : |
ef55e513 JC |
1231 | mb[1] == 1 ? "done (pass)" : |
1232 | mb[1] == 2 ? "done (error)" : "other"); | |
b5a340dd JC |
1233 | break; |
1234 | ||
a29b3dd7 JC |
1235 | case MBA_TEMPERATURE_ALERT: |
1236 | ql_dbg(ql_dbg_async, vha, 0x505e, | |
1237 | "TEMPERATURE ALERT: %04x %04x %04x\n", mb[1], mb[2], mb[3]); | |
1238 | if (mb[1] == 0x12) | |
1239 | schedule_work(&ha->board_disable); | |
1240 | break; | |
1241 | ||
92d4408e SC |
1242 | case MBA_TRANS_INSERT: |
1243 | ql_dbg(ql_dbg_async, vha, 0x5091, | |
1244 | "Transceiver Insertion: %04x\n", mb[1]); | |
1245 | break; | |
1246 | ||
6246b8a1 GM |
1247 | default: |
1248 | ql_dbg(ql_dbg_async, vha, 0x5057, | |
1249 | "Unknown AEN:%04x %04x %04x %04x\n", | |
1250 | mb[0], mb[1], mb[2], mb[3]); | |
1da177e4 | 1251 | } |
2c3dfe3f | 1252 | |
2d70c103 NB |
1253 | qlt_async_event(mb[0], vha, mb); |
1254 | ||
e315cd28 | 1255 | if (!vha->vp_idx && ha->num_vhosts) |
73208dfd | 1256 | qla2x00_alert_all_vps(rsp, mb); |
1da177e4 LT |
1257 | } |
1258 | ||
1259 | /** | |
1260 | * qla2x00_process_completed_request() - Process a Fast Post response. | |
2db6228d BVA |
1261 | * @vha: SCSI driver HA context |
1262 | * @req: request queue | |
1da177e4 LT |
1263 | * @index: SRB index |
1264 | */ | |
8ae6d9c7 | 1265 | void |
73208dfd | 1266 | qla2x00_process_completed_request(struct scsi_qla_host *vha, |
8ae6d9c7 | 1267 | struct req_que *req, uint32_t index) |
1da177e4 LT |
1268 | { |
1269 | srb_t *sp; | |
e315cd28 | 1270 | struct qla_hw_data *ha = vha->hw; |
1da177e4 LT |
1271 | |
1272 | /* Validate handle. */ | |
8d93f550 | 1273 | if (index >= req->num_outstanding_cmds) { |
7c3df132 SK |
1274 | ql_log(ql_log_warn, vha, 0x3014, |
1275 | "Invalid SCSI command index (%x).\n", index); | |
1da177e4 | 1276 | |
7ec0effd | 1277 | if (IS_P3P_TYPE(ha)) |
8f7daead GM |
1278 | set_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags); |
1279 | else | |
1280 | set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); | |
1da177e4 LT |
1281 | return; |
1282 | } | |
1283 | ||
e315cd28 | 1284 | sp = req->outstanding_cmds[index]; |
1da177e4 LT |
1285 | if (sp) { |
1286 | /* Free outstanding command slot. */ | |
e315cd28 | 1287 | req->outstanding_cmds[index] = NULL; |
1da177e4 | 1288 | |
1da177e4 | 1289 | /* Save ISP completion status */ |
25ff6af1 | 1290 | sp->done(sp, DID_OK << 16); |
1da177e4 | 1291 | } else { |
7c3df132 | 1292 | ql_log(ql_log_warn, vha, 0x3016, "Invalid SCSI SRB.\n"); |
1da177e4 | 1293 | |
7ec0effd | 1294 | if (IS_P3P_TYPE(ha)) |
8f7daead GM |
1295 | set_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags); |
1296 | else | |
1297 | set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); | |
1da177e4 LT |
1298 | } |
1299 | } | |
1300 | ||
8ae6d9c7 | 1301 | srb_t * |
ac280b67 AV |
1302 | qla2x00_get_sp_from_handle(scsi_qla_host_t *vha, const char *func, |
1303 | struct req_que *req, void *iocb) | |
1304 | { | |
1305 | struct qla_hw_data *ha = vha->hw; | |
1306 | sts_entry_t *pkt = iocb; | |
1307 | srb_t *sp = NULL; | |
1308 | uint16_t index; | |
1309 | ||
1310 | index = LSW(pkt->handle); | |
8d93f550 | 1311 | if (index >= req->num_outstanding_cmds) { |
7c3df132 | 1312 | ql_log(ql_log_warn, vha, 0x5031, |
726b8548 QT |
1313 | "Invalid command index (%x) type %8ph.\n", |
1314 | index, iocb); | |
7ec0effd | 1315 | if (IS_P3P_TYPE(ha)) |
8f7daead GM |
1316 | set_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags); |
1317 | else | |
1318 | set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); | |
ac280b67 AV |
1319 | goto done; |
1320 | } | |
1321 | sp = req->outstanding_cmds[index]; | |
1322 | if (!sp) { | |
7c3df132 SK |
1323 | ql_log(ql_log_warn, vha, 0x5032, |
1324 | "Invalid completion handle (%x) -- timed-out.\n", index); | |
ac280b67 AV |
1325 | return sp; |
1326 | } | |
1327 | if (sp->handle != index) { | |
7c3df132 SK |
1328 | ql_log(ql_log_warn, vha, 0x5033, |
1329 | "SRB handle (%x) mismatch %x.\n", sp->handle, index); | |
ac280b67 AV |
1330 | return NULL; |
1331 | } | |
9a069e19 | 1332 | |
ac280b67 | 1333 | req->outstanding_cmds[index] = NULL; |
9a069e19 | 1334 | |
ac280b67 AV |
1335 | done: |
1336 | return sp; | |
1337 | } | |
1338 | ||
1339 | static void | |
1340 | qla2x00_mbx_iocb_entry(scsi_qla_host_t *vha, struct req_que *req, | |
1341 | struct mbx_entry *mbx) | |
1342 | { | |
1343 | const char func[] = "MBX-IOCB"; | |
1344 | const char *type; | |
ac280b67 AV |
1345 | fc_port_t *fcport; |
1346 | srb_t *sp; | |
4916392b | 1347 | struct srb_iocb *lio; |
99b0bec7 | 1348 | uint16_t *data; |
5ff1d584 | 1349 | uint16_t status; |
ac280b67 AV |
1350 | |
1351 | sp = qla2x00_get_sp_from_handle(vha, func, req, mbx); | |
1352 | if (!sp) | |
1353 | return; | |
1354 | ||
9ba56b95 GM |
1355 | lio = &sp->u.iocb_cmd; |
1356 | type = sp->name; | |
ac280b67 | 1357 | fcport = sp->fcport; |
4916392b | 1358 | data = lio->u.logio.data; |
ac280b67 | 1359 | |
5ff1d584 | 1360 | data[0] = MBS_COMMAND_ERROR; |
4916392b | 1361 | data[1] = lio->u.logio.flags & SRB_LOGIN_RETRIED ? |
5ff1d584 | 1362 | QLA_LOGIO_LOGIN_RETRIED : 0; |
ac280b67 | 1363 | if (mbx->entry_status) { |
7c3df132 | 1364 | ql_dbg(ql_dbg_async, vha, 0x5043, |
cfb0919c | 1365 | "Async-%s error entry - hdl=%x portid=%02x%02x%02x " |
d3fa9e7d | 1366 | "entry-status=%x status=%x state-flag=%x " |
cfb0919c CD |
1367 | "status-flags=%x.\n", type, sp->handle, |
1368 | fcport->d_id.b.domain, fcport->d_id.b.area, | |
d3fa9e7d AV |
1369 | fcport->d_id.b.al_pa, mbx->entry_status, |
1370 | le16_to_cpu(mbx->status), le16_to_cpu(mbx->state_flags), | |
7c3df132 | 1371 | le16_to_cpu(mbx->status_flags)); |
d3fa9e7d | 1372 | |
cfb0919c | 1373 | ql_dump_buffer(ql_dbg_async + ql_dbg_buffer, vha, 0x5029, |
7c3df132 | 1374 | (uint8_t *)mbx, sizeof(*mbx)); |
ac280b67 | 1375 | |
99b0bec7 | 1376 | goto logio_done; |
ac280b67 AV |
1377 | } |
1378 | ||
5ff1d584 | 1379 | status = le16_to_cpu(mbx->status); |
9ba56b95 | 1380 | if (status == 0x30 && sp->type == SRB_LOGIN_CMD && |
5ff1d584 AV |
1381 | le16_to_cpu(mbx->mb0) == MBS_COMMAND_COMPLETE) |
1382 | status = 0; | |
1383 | if (!status && le16_to_cpu(mbx->mb0) == MBS_COMMAND_COMPLETE) { | |
7c3df132 | 1384 | ql_dbg(ql_dbg_async, vha, 0x5045, |
cfb0919c CD |
1385 | "Async-%s complete - hdl=%x portid=%02x%02x%02x mbx1=%x.\n", |
1386 | type, sp->handle, fcport->d_id.b.domain, | |
1387 | fcport->d_id.b.area, fcport->d_id.b.al_pa, | |
1388 | le16_to_cpu(mbx->mb1)); | |
ac280b67 AV |
1389 | |
1390 | data[0] = MBS_COMMAND_COMPLETE; | |
9ba56b95 | 1391 | if (sp->type == SRB_LOGIN_CMD) { |
99b0bec7 AV |
1392 | fcport->port_type = FCT_TARGET; |
1393 | if (le16_to_cpu(mbx->mb1) & BIT_0) | |
1394 | fcport->port_type = FCT_INITIATOR; | |
6ac52608 | 1395 | else if (le16_to_cpu(mbx->mb1) & BIT_1) |
99b0bec7 | 1396 | fcport->flags |= FCF_FCP2_DEVICE; |
5ff1d584 | 1397 | } |
99b0bec7 | 1398 | goto logio_done; |
ac280b67 AV |
1399 | } |
1400 | ||
1401 | data[0] = le16_to_cpu(mbx->mb0); | |
1402 | switch (data[0]) { | |
1403 | case MBS_PORT_ID_USED: | |
1404 | data[1] = le16_to_cpu(mbx->mb1); | |
1405 | break; | |
1406 | case MBS_LOOP_ID_USED: | |
1407 | break; | |
1408 | default: | |
1409 | data[0] = MBS_COMMAND_ERROR; | |
ac280b67 AV |
1410 | break; |
1411 | } | |
1412 | ||
7c3df132 | 1413 | ql_log(ql_log_warn, vha, 0x5046, |
cfb0919c CD |
1414 | "Async-%s failed - hdl=%x portid=%02x%02x%02x status=%x " |
1415 | "mb0=%x mb1=%x mb2=%x mb6=%x mb7=%x.\n", type, sp->handle, | |
1416 | fcport->d_id.b.domain, fcport->d_id.b.area, fcport->d_id.b.al_pa, | |
1417 | status, le16_to_cpu(mbx->mb0), le16_to_cpu(mbx->mb1), | |
ac280b67 | 1418 | le16_to_cpu(mbx->mb2), le16_to_cpu(mbx->mb6), |
7c3df132 | 1419 | le16_to_cpu(mbx->mb7)); |
ac280b67 | 1420 | |
99b0bec7 | 1421 | logio_done: |
25ff6af1 | 1422 | sp->done(sp, 0); |
ac280b67 AV |
1423 | } |
1424 | ||
726b8548 QT |
1425 | static void |
1426 | qla24xx_mbx_iocb_entry(scsi_qla_host_t *vha, struct req_que *req, | |
1427 | struct mbx_24xx_entry *pkt) | |
1428 | { | |
1429 | const char func[] = "MBX-IOCB2"; | |
1430 | srb_t *sp; | |
1431 | struct srb_iocb *si; | |
1432 | u16 sz, i; | |
1433 | int res; | |
1434 | ||
1435 | sp = qla2x00_get_sp_from_handle(vha, func, req, pkt); | |
1436 | if (!sp) | |
1437 | return; | |
1438 | ||
1439 | si = &sp->u.iocb_cmd; | |
1440 | sz = min(ARRAY_SIZE(pkt->mb), ARRAY_SIZE(sp->u.iocb_cmd.u.mbx.in_mb)); | |
1441 | ||
1442 | for (i = 0; i < sz; i++) | |
1443 | si->u.mbx.in_mb[i] = le16_to_cpu(pkt->mb[i]); | |
1444 | ||
1445 | res = (si->u.mbx.in_mb[0] & MBS_MASK); | |
1446 | ||
25ff6af1 | 1447 | sp->done(sp, res); |
726b8548 QT |
1448 | } |
1449 | ||
1450 | static void | |
1451 | qla24xxx_nack_iocb_entry(scsi_qla_host_t *vha, struct req_que *req, | |
1452 | struct nack_to_isp *pkt) | |
1453 | { | |
1454 | const char func[] = "nack"; | |
1455 | srb_t *sp; | |
1456 | int res = 0; | |
1457 | ||
1458 | sp = qla2x00_get_sp_from_handle(vha, func, req, pkt); | |
1459 | if (!sp) | |
1460 | return; | |
1461 | ||
1462 | if (pkt->u.isp2x.status != cpu_to_le16(NOTIFY_ACK_SUCCESS)) | |
1463 | res = QLA_FUNCTION_FAILED; | |
1464 | ||
25ff6af1 | 1465 | sp->done(sp, res); |
ac280b67 AV |
1466 | } |
1467 | ||
9bc4f4fb HZ |
1468 | static void |
1469 | qla2x00_ct_entry(scsi_qla_host_t *vha, struct req_que *req, | |
1470 | sts_entry_t *pkt, int iocb_type) | |
1471 | { | |
1472 | const char func[] = "CT_IOCB"; | |
1473 | const char *type; | |
9bc4f4fb | 1474 | srb_t *sp; |
75cc8cfc | 1475 | struct bsg_job *bsg_job; |
01e0e15c | 1476 | struct fc_bsg_reply *bsg_reply; |
9bc4f4fb | 1477 | uint16_t comp_status; |
726b8548 | 1478 | int res = 0; |
9bc4f4fb HZ |
1479 | |
1480 | sp = qla2x00_get_sp_from_handle(vha, func, req, pkt); | |
1481 | if (!sp) | |
1482 | return; | |
1483 | ||
726b8548 QT |
1484 | switch (sp->type) { |
1485 | case SRB_CT_CMD: | |
1486 | bsg_job = sp->u.bsg_job; | |
1487 | bsg_reply = bsg_job->reply; | |
1488 | ||
1489 | type = "ct pass-through"; | |
1490 | ||
1491 | comp_status = le16_to_cpu(pkt->comp_status); | |
1492 | ||
1493 | /* | |
1494 | * return FC_CTELS_STATUS_OK and leave the decoding of the ELS/CT | |
1495 | * fc payload to the caller | |
1496 | */ | |
1497 | bsg_reply->reply_data.ctels_reply.status = FC_CTELS_STATUS_OK; | |
1498 | bsg_job->reply_len = sizeof(struct fc_bsg_reply); | |
1499 | ||
1500 | if (comp_status != CS_COMPLETE) { | |
1501 | if (comp_status == CS_DATA_UNDERRUN) { | |
1502 | res = DID_OK << 16; | |
1503 | bsg_reply->reply_payload_rcv_len = | |
1504 | le16_to_cpu(((sts_entry_t *)pkt)->rsp_info_len); | |
1505 | ||
1506 | ql_log(ql_log_warn, vha, 0x5048, | |
1507 | "CT pass-through-%s error comp_status=0x%x total_byte=0x%x.\n", | |
1508 | type, comp_status, | |
1509 | bsg_reply->reply_payload_rcv_len); | |
1510 | } else { | |
1511 | ql_log(ql_log_warn, vha, 0x5049, | |
1512 | "CT pass-through-%s error comp_status=0x%x.\n", | |
1513 | type, comp_status); | |
1514 | res = DID_ERROR << 16; | |
1515 | bsg_reply->reply_payload_rcv_len = 0; | |
1516 | } | |
1517 | ql_dump_buffer(ql_dbg_async + ql_dbg_buffer, vha, 0x5035, | |
1518 | (uint8_t *)pkt, sizeof(*pkt)); | |
1519 | } else { | |
1520 | res = DID_OK << 16; | |
1521 | bsg_reply->reply_payload_rcv_len = | |
1522 | bsg_job->reply_payload.payload_len; | |
1523 | bsg_job->reply_len = 0; | |
1524 | } | |
1525 | break; | |
1526 | case SRB_CT_PTHRU_CMD: | |
1527 | /* | |
1528 | * borrowing sts_entry_24xx.comp_status. | |
1529 | * same location as ct_entry_24xx.comp_status | |
1530 | */ | |
1531 | res = qla2x00_chk_ms_status(vha, (ms_iocb_entry_t *)pkt, | |
1532 | (struct ct_sns_rsp *)sp->u.iocb_cmd.u.ctarg.rsp, | |
1533 | sp->name); | |
1534 | break; | |
9bc4f4fb HZ |
1535 | } |
1536 | ||
25ff6af1 | 1537 | sp->done(sp, res); |
9bc4f4fb HZ |
1538 | } |
1539 | ||
9a069e19 GM |
1540 | static void |
1541 | qla24xx_els_ct_entry(scsi_qla_host_t *vha, struct req_que *req, | |
1542 | struct sts_entry_24xx *pkt, int iocb_type) | |
1543 | { | |
1544 | const char func[] = "ELS_CT_IOCB"; | |
1545 | const char *type; | |
9a069e19 | 1546 | srb_t *sp; |
75cc8cfc | 1547 | struct bsg_job *bsg_job; |
01e0e15c | 1548 | struct fc_bsg_reply *bsg_reply; |
9a069e19 GM |
1549 | uint16_t comp_status; |
1550 | uint32_t fw_status[3]; | |
9ba56b95 | 1551 | int res; |
edd05de1 | 1552 | struct srb_iocb *els; |
9a069e19 GM |
1553 | |
1554 | sp = qla2x00_get_sp_from_handle(vha, func, req, pkt); | |
1555 | if (!sp) | |
1556 | return; | |
9a069e19 GM |
1557 | |
1558 | type = NULL; | |
9ba56b95 | 1559 | switch (sp->type) { |
9a069e19 GM |
1560 | case SRB_ELS_CMD_RPT: |
1561 | case SRB_ELS_CMD_HST: | |
1562 | type = "els"; | |
1563 | break; | |
1564 | case SRB_CT_CMD: | |
1565 | type = "ct pass-through"; | |
1566 | break; | |
6eb54715 HM |
1567 | case SRB_ELS_DCMD: |
1568 | type = "Driver ELS logo"; | |
edd05de1 DG |
1569 | if (iocb_type != ELS_IOCB_TYPE) { |
1570 | ql_dbg(ql_dbg_user, vha, 0x5047, | |
1571 | "Completing %s: (%p) type=%d.\n", | |
1572 | type, sp, sp->type); | |
1573 | sp->done(sp, 0); | |
1574 | return; | |
1575 | } | |
1576 | break; | |
726b8548 QT |
1577 | case SRB_CT_PTHRU_CMD: |
1578 | /* borrowing sts_entry_24xx.comp_status. | |
1579 | same location as ct_entry_24xx.comp_status | |
1580 | */ | |
2d73ac61 | 1581 | res = qla2x00_chk_ms_status(sp->vha, (ms_iocb_entry_t *)pkt, |
726b8548 QT |
1582 | (struct ct_sns_rsp *)sp->u.iocb_cmd.u.ctarg.rsp, |
1583 | sp->name); | |
25ff6af1 | 1584 | sp->done(sp, res); |
6eb54715 | 1585 | return; |
9a069e19 | 1586 | default: |
37fed3ee | 1587 | ql_dbg(ql_dbg_user, vha, 0x503e, |
9ba56b95 | 1588 | "Unrecognized SRB: (%p) type=%d.\n", sp, sp->type); |
9a069e19 GM |
1589 | return; |
1590 | } | |
1591 | ||
1592 | comp_status = fw_status[0] = le16_to_cpu(pkt->comp_status); | |
1593 | fw_status[1] = le16_to_cpu(((struct els_sts_entry_24xx*)pkt)->error_subcode_1); | |
1594 | fw_status[2] = le16_to_cpu(((struct els_sts_entry_24xx*)pkt)->error_subcode_2); | |
1595 | ||
edd05de1 DG |
1596 | if (iocb_type == ELS_IOCB_TYPE) { |
1597 | els = &sp->u.iocb_cmd; | |
1598 | els->u.els_plogi.fw_status[0] = fw_status[0]; | |
1599 | els->u.els_plogi.fw_status[1] = fw_status[1]; | |
1600 | els->u.els_plogi.fw_status[2] = fw_status[2]; | |
1601 | els->u.els_plogi.comp_status = fw_status[0]; | |
1602 | if (comp_status == CS_COMPLETE) { | |
1603 | res = DID_OK << 16; | |
1604 | } else { | |
1605 | if (comp_status == CS_DATA_UNDERRUN) { | |
1606 | res = DID_OK << 16; | |
1607 | els->u.els_plogi.len = | |
1608 | le16_to_cpu(((struct els_sts_entry_24xx *) | |
1609 | pkt)->total_byte_count); | |
1610 | } else { | |
1611 | els->u.els_plogi.len = 0; | |
1612 | res = DID_ERROR << 16; | |
1613 | } | |
1614 | } | |
1615 | ql_log(ql_log_info, vha, 0x503f, | |
1616 | "ELS IOCB Done -%s error hdl=%x comp_status=0x%x error subcode 1=0x%x error subcode 2=0x%x total_byte=0x%x\n", | |
1617 | type, sp->handle, comp_status, fw_status[1], fw_status[2], | |
1618 | le16_to_cpu(((struct els_sts_entry_24xx *) | |
1619 | pkt)->total_byte_count)); | |
1620 | goto els_ct_done; | |
1621 | } | |
1622 | ||
9a069e19 GM |
1623 | /* return FC_CTELS_STATUS_OK and leave the decoding of the ELS/CT |
1624 | * fc payload to the caller | |
1625 | */ | |
a1730595 DG |
1626 | bsg_job = sp->u.bsg_job; |
1627 | bsg_reply = bsg_job->reply; | |
01e0e15c | 1628 | bsg_reply->reply_data.ctels_reply.status = FC_CTELS_STATUS_OK; |
9a069e19 GM |
1629 | bsg_job->reply_len = sizeof(struct fc_bsg_reply) + sizeof(fw_status); |
1630 | ||
1631 | if (comp_status != CS_COMPLETE) { | |
1632 | if (comp_status == CS_DATA_UNDERRUN) { | |
9ba56b95 | 1633 | res = DID_OK << 16; |
01e0e15c | 1634 | bsg_reply->reply_payload_rcv_len = |
9ba56b95 | 1635 | le16_to_cpu(((struct els_sts_entry_24xx *)pkt)->total_byte_count); |
9a069e19 | 1636 | |
37fed3ee | 1637 | ql_dbg(ql_dbg_user, vha, 0x503f, |
cfb0919c | 1638 | "ELS-CT pass-through-%s error hdl=%x comp_status-status=0x%x " |
9a069e19 | 1639 | "error subcode 1=0x%x error subcode 2=0x%x total_byte = 0x%x.\n", |
cfb0919c | 1640 | type, sp->handle, comp_status, fw_status[1], fw_status[2], |
7c3df132 SK |
1641 | le16_to_cpu(((struct els_sts_entry_24xx *) |
1642 | pkt)->total_byte_count)); | |
05231a3b | 1643 | } else { |
37fed3ee | 1644 | ql_dbg(ql_dbg_user, vha, 0x5040, |
cfb0919c | 1645 | "ELS-CT pass-through-%s error hdl=%x comp_status-status=0x%x " |
9a069e19 | 1646 | "error subcode 1=0x%x error subcode 2=0x%x.\n", |
cfb0919c | 1647 | type, sp->handle, comp_status, |
7c3df132 SK |
1648 | le16_to_cpu(((struct els_sts_entry_24xx *) |
1649 | pkt)->error_subcode_1), | |
1650 | le16_to_cpu(((struct els_sts_entry_24xx *) | |
1651 | pkt)->error_subcode_2)); | |
9ba56b95 | 1652 | res = DID_ERROR << 16; |
01e0e15c | 1653 | bsg_reply->reply_payload_rcv_len = 0; |
9a069e19 | 1654 | } |
05231a3b CH |
1655 | memcpy(bsg_job->reply + sizeof(struct fc_bsg_reply), |
1656 | fw_status, sizeof(fw_status)); | |
37fed3ee | 1657 | ql_dump_buffer(ql_dbg_user + ql_dbg_buffer, vha, 0x5056, |
7c3df132 | 1658 | (uint8_t *)pkt, sizeof(*pkt)); |
9a069e19 GM |
1659 | } |
1660 | else { | |
9ba56b95 | 1661 | res = DID_OK << 16; |
01e0e15c | 1662 | bsg_reply->reply_payload_rcv_len = bsg_job->reply_payload.payload_len; |
9a069e19 GM |
1663 | bsg_job->reply_len = 0; |
1664 | } | |
edd05de1 | 1665 | els_ct_done: |
9a069e19 | 1666 | |
25ff6af1 | 1667 | sp->done(sp, res); |
9a069e19 GM |
1668 | } |
1669 | ||
ac280b67 AV |
1670 | static void |
1671 | qla24xx_logio_entry(scsi_qla_host_t *vha, struct req_que *req, | |
1672 | struct logio_entry_24xx *logio) | |
1673 | { | |
1674 | const char func[] = "LOGIO-IOCB"; | |
1675 | const char *type; | |
ac280b67 AV |
1676 | fc_port_t *fcport; |
1677 | srb_t *sp; | |
4916392b | 1678 | struct srb_iocb *lio; |
99b0bec7 | 1679 | uint16_t *data; |
ac280b67 AV |
1680 | uint32_t iop[2]; |
1681 | ||
1682 | sp = qla2x00_get_sp_from_handle(vha, func, req, logio); | |
1683 | if (!sp) | |
1684 | return; | |
1685 | ||
9ba56b95 GM |
1686 | lio = &sp->u.iocb_cmd; |
1687 | type = sp->name; | |
ac280b67 | 1688 | fcport = sp->fcport; |
4916392b | 1689 | data = lio->u.logio.data; |
ac280b67 | 1690 | |
5ff1d584 | 1691 | data[0] = MBS_COMMAND_ERROR; |
4916392b | 1692 | data[1] = lio->u.logio.flags & SRB_LOGIN_RETRIED ? |
5ff1d584 | 1693 | QLA_LOGIO_LOGIN_RETRIED : 0; |
ac280b67 | 1694 | if (logio->entry_status) { |
5e19ed90 | 1695 | ql_log(ql_log_warn, fcport->vha, 0x5034, |
5b33469a | 1696 | "Async-%s error entry - %8phC hdl=%x" |
d3fa9e7d | 1697 | "portid=%02x%02x%02x entry-status=%x.\n", |
5b33469a | 1698 | type, fcport->port_name, sp->handle, fcport->d_id.b.domain, |
cfb0919c CD |
1699 | fcport->d_id.b.area, fcport->d_id.b.al_pa, |
1700 | logio->entry_status); | |
1701 | ql_dump_buffer(ql_dbg_async + ql_dbg_buffer, vha, 0x504d, | |
7c3df132 | 1702 | (uint8_t *)logio, sizeof(*logio)); |
ac280b67 | 1703 | |
99b0bec7 | 1704 | goto logio_done; |
ac280b67 AV |
1705 | } |
1706 | ||
1707 | if (le16_to_cpu(logio->comp_status) == CS_COMPLETE) { | |
5e19ed90 | 1708 | ql_dbg(ql_dbg_async, fcport->vha, 0x5036, |
5b33469a QT |
1709 | "Async-%s complete - %8phC hdl=%x portid=%02x%02x%02x " |
1710 | "iop0=%x.\n", type, fcport->port_name, sp->handle, | |
1711 | fcport->d_id.b.domain, | |
cfb0919c | 1712 | fcport->d_id.b.area, fcport->d_id.b.al_pa, |
7c3df132 | 1713 | le32_to_cpu(logio->io_parameter[0])); |
ac280b67 | 1714 | |
ead03855 | 1715 | vha->hw->exch_starvation = 0; |
ac280b67 | 1716 | data[0] = MBS_COMMAND_COMPLETE; |
9ba56b95 | 1717 | if (sp->type != SRB_LOGIN_CMD) |
99b0bec7 | 1718 | goto logio_done; |
ac280b67 AV |
1719 | |
1720 | iop[0] = le32_to_cpu(logio->io_parameter[0]); | |
1721 | if (iop[0] & BIT_4) { | |
1722 | fcport->port_type = FCT_TARGET; | |
1723 | if (iop[0] & BIT_8) | |
8474f3a0 | 1724 | fcport->flags |= FCF_FCP2_DEVICE; |
b0cd579c | 1725 | } else if (iop[0] & BIT_5) |
ac280b67 | 1726 | fcport->port_type = FCT_INITIATOR; |
b0cd579c | 1727 | |
2d70c103 NB |
1728 | if (iop[0] & BIT_7) |
1729 | fcport->flags |= FCF_CONF_COMP_SUPPORTED; | |
1730 | ||
ac280b67 AV |
1731 | if (logio->io_parameter[7] || logio->io_parameter[8]) |
1732 | fcport->supported_classes |= FC_COS_CLASS2; | |
1733 | if (logio->io_parameter[9] || logio->io_parameter[10]) | |
1734 | fcport->supported_classes |= FC_COS_CLASS3; | |
1735 | ||
99b0bec7 | 1736 | goto logio_done; |
ac280b67 AV |
1737 | } |
1738 | ||
1739 | iop[0] = le32_to_cpu(logio->io_parameter[0]); | |
1740 | iop[1] = le32_to_cpu(logio->io_parameter[1]); | |
726b8548 QT |
1741 | lio->u.logio.iop[0] = iop[0]; |
1742 | lio->u.logio.iop[1] = iop[1]; | |
ac280b67 AV |
1743 | switch (iop[0]) { |
1744 | case LSC_SCODE_PORTID_USED: | |
1745 | data[0] = MBS_PORT_ID_USED; | |
1746 | data[1] = LSW(iop[1]); | |
1747 | break; | |
1748 | case LSC_SCODE_NPORT_USED: | |
1749 | data[0] = MBS_LOOP_ID_USED; | |
1750 | break; | |
5b33469a QT |
1751 | case LSC_SCODE_CMD_FAILED: |
1752 | if (iop[1] == 0x0606) { | |
1753 | /* | |
1754 | * PLOGI/PRLI Completed. We must have Recv PLOGI/PRLI, | |
1755 | * Target side acked. | |
1756 | */ | |
1757 | data[0] = MBS_COMMAND_COMPLETE; | |
1758 | goto logio_done; | |
1759 | } | |
1760 | data[0] = MBS_COMMAND_ERROR; | |
1761 | break; | |
ead03855 QT |
1762 | case LSC_SCODE_NOXCB: |
1763 | vha->hw->exch_starvation++; | |
1764 | if (vha->hw->exch_starvation > 5) { | |
83548fe2 | 1765 | ql_log(ql_log_warn, vha, 0xd046, |
ead03855 QT |
1766 | "Exchange starvation. Resetting RISC\n"); |
1767 | ||
1768 | vha->hw->exch_starvation = 0; | |
1769 | ||
1770 | if (IS_P3P_TYPE(vha->hw)) | |
1771 | set_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags); | |
1772 | else | |
1773 | set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); | |
1774 | qla2xxx_wake_dpc(vha); | |
1775 | } | |
81881861 | 1776 | /* fall through */ |
ac280b67 AV |
1777 | default: |
1778 | data[0] = MBS_COMMAND_ERROR; | |
ac280b67 AV |
1779 | break; |
1780 | } | |
1781 | ||
5e19ed90 | 1782 | ql_dbg(ql_dbg_async, fcport->vha, 0x5037, |
5b33469a QT |
1783 | "Async-%s failed - %8phC hdl=%x portid=%02x%02x%02x comp=%x " |
1784 | "iop0=%x iop1=%x.\n", type, fcport->port_name, | |
1785 | sp->handle, fcport->d_id.b.domain, | |
d3fa9e7d | 1786 | fcport->d_id.b.area, fcport->d_id.b.al_pa, |
ac280b67 AV |
1787 | le16_to_cpu(logio->comp_status), |
1788 | le32_to_cpu(logio->io_parameter[0]), | |
7c3df132 | 1789 | le32_to_cpu(logio->io_parameter[1])); |
ac280b67 | 1790 | |
99b0bec7 | 1791 | logio_done: |
25ff6af1 | 1792 | sp->done(sp, 0); |
ac280b67 AV |
1793 | } |
1794 | ||
3822263e | 1795 | static void |
faef62d1 | 1796 | qla24xx_tm_iocb_entry(scsi_qla_host_t *vha, struct req_que *req, void *tsk) |
3822263e MI |
1797 | { |
1798 | const char func[] = "TMF-IOCB"; | |
1799 | const char *type; | |
1800 | fc_port_t *fcport; | |
1801 | srb_t *sp; | |
1802 | struct srb_iocb *iocb; | |
3822263e | 1803 | struct sts_entry_24xx *sts = (struct sts_entry_24xx *)tsk; |
3822263e MI |
1804 | |
1805 | sp = qla2x00_get_sp_from_handle(vha, func, req, tsk); | |
1806 | if (!sp) | |
1807 | return; | |
1808 | ||
9ba56b95 GM |
1809 | iocb = &sp->u.iocb_cmd; |
1810 | type = sp->name; | |
3822263e | 1811 | fcport = sp->fcport; |
faef62d1 | 1812 | iocb->u.tmf.data = QLA_SUCCESS; |
3822263e MI |
1813 | |
1814 | if (sts->entry_status) { | |
5e19ed90 | 1815 | ql_log(ql_log_warn, fcport->vha, 0x5038, |
cfb0919c CD |
1816 | "Async-%s error - hdl=%x entry-status(%x).\n", |
1817 | type, sp->handle, sts->entry_status); | |
faef62d1 | 1818 | iocb->u.tmf.data = QLA_FUNCTION_FAILED; |
ad950360 | 1819 | } else if (sts->comp_status != cpu_to_le16(CS_COMPLETE)) { |
5e19ed90 | 1820 | ql_log(ql_log_warn, fcport->vha, 0x5039, |
cfb0919c CD |
1821 | "Async-%s error - hdl=%x completion status(%x).\n", |
1822 | type, sp->handle, sts->comp_status); | |
faef62d1 AB |
1823 | iocb->u.tmf.data = QLA_FUNCTION_FAILED; |
1824 | } else if ((le16_to_cpu(sts->scsi_status) & | |
3822263e | 1825 | SS_RESPONSE_INFO_LEN_VALID)) { |
faef62d1 AB |
1826 | if (le32_to_cpu(sts->rsp_data_len) < 4) { |
1827 | ql_log(ql_log_warn, fcport->vha, 0x503b, | |
1828 | "Async-%s error - hdl=%x not enough response(%d).\n", | |
1829 | type, sp->handle, sts->rsp_data_len); | |
1830 | } else if (sts->data[3]) { | |
1831 | ql_log(ql_log_warn, fcport->vha, 0x503c, | |
1832 | "Async-%s error - hdl=%x response(%x).\n", | |
1833 | type, sp->handle, sts->data[3]); | |
8d2b21db | 1834 | iocb->u.tmf.data = QLA_FUNCTION_FAILED; |
faef62d1 | 1835 | } |
3822263e MI |
1836 | } |
1837 | ||
faef62d1 | 1838 | if (iocb->u.tmf.data != QLA_SUCCESS) |
7c3df132 SK |
1839 | ql_dump_buffer(ql_dbg_async + ql_dbg_buffer, vha, 0x5055, |
1840 | (uint8_t *)sts, sizeof(*sts)); | |
3822263e | 1841 | |
25ff6af1 | 1842 | sp->done(sp, 0); |
3822263e MI |
1843 | } |
1844 | ||
60dd6e8e DT |
1845 | static void qla24xx_nvme_iocb_entry(scsi_qla_host_t *vha, struct req_que *req, |
1846 | void *tsk, srb_t *sp) | |
7401bc18 | 1847 | { |
7401bc18 | 1848 | fc_port_t *fcport; |
7401bc18 DG |
1849 | struct srb_iocb *iocb; |
1850 | struct sts_entry_24xx *sts = (struct sts_entry_24xx *)tsk; | |
1851 | uint16_t state_flags; | |
1852 | struct nvmefc_fcp_req *fd; | |
4072e1dc DT |
1853 | uint16_t ret = QLA_SUCCESS; |
1854 | uint16_t comp_status = le16_to_cpu(sts->comp_status); | |
7401bc18 DG |
1855 | |
1856 | iocb = &sp->u.iocb_cmd; | |
1857 | fcport = sp->fcport; | |
4072e1dc | 1858 | iocb->u.nvme.comp_status = comp_status; |
7401bc18 DG |
1859 | state_flags = le16_to_cpu(sts->state_flags); |
1860 | fd = iocb->u.nvme.desc; | |
7401bc18 | 1861 | |
60dd6e8e | 1862 | if (unlikely(iocb->u.nvme.aen_op)) |
deeae7a6 | 1863 | atomic_dec(&sp->vha->hw->nvme_active_aen_cnt); |
7401bc18 DG |
1864 | |
1865 | /* | |
1866 | * State flags: Bit 6 and 0. | |
1867 | * If 0 is set, we don't care about 6. | |
1868 | * both cases resp was dma'd to host buffer | |
1869 | * if both are 0, that is good path case. | |
1870 | * if six is set and 0 is clear, we need to | |
1871 | * copy resp data from status iocb to resp buffer. | |
1872 | */ | |
1873 | if (!(state_flags & (SF_FCP_RSP_DMA | SF_NVME_ERSP))) { | |
1874 | iocb->u.nvme.rsp_pyld_len = 0; | |
1875 | } else if ((state_flags & SF_FCP_RSP_DMA)) { | |
1876 | iocb->u.nvme.rsp_pyld_len = le16_to_cpu(sts->nvme_rsp_pyld_len); | |
1877 | } else if (state_flags & SF_NVME_ERSP) { | |
1878 | uint32_t *inbuf, *outbuf; | |
1879 | uint16_t iter; | |
1880 | ||
1881 | inbuf = (uint32_t *)&sts->nvme_ersp_data; | |
1882 | outbuf = (uint32_t *)fd->rspaddr; | |
1883 | iocb->u.nvme.rsp_pyld_len = le16_to_cpu(sts->nvme_rsp_pyld_len); | |
1884 | iter = iocb->u.nvme.rsp_pyld_len >> 2; | |
1885 | for (; iter; iter--) | |
1886 | *outbuf++ = swab32(*inbuf++); | |
1887 | } else { /* unhandled case */ | |
1888 | ql_log(ql_log_warn, fcport->vha, 0x503a, | |
1889 | "NVME-%s error. Unhandled state_flags of %x\n", | |
1890 | sp->name, state_flags); | |
1891 | } | |
1892 | ||
1893 | fd->transferred_length = fd->payload_length - | |
1894 | le32_to_cpu(sts->residual_len); | |
1895 | ||
4072e1dc DT |
1896 | if (unlikely(comp_status != CS_COMPLETE)) |
1897 | ql_log(ql_log_warn, fcport->vha, 0x5060, | |
1898 | "NVME-%s ERR Handling - hdl=%x status(%x) tr_len:%x resid=%x ox_id=%x\n", | |
1899 | sp->name, sp->handle, comp_status, | |
1900 | fd->transferred_length, le32_to_cpu(sts->residual_len), | |
1901 | sts->ox_id); | |
1902 | ||
1903 | /* | |
1904 | * If transport error then Failure (HBA rejects request) | |
1905 | * otherwise transport will handle. | |
1906 | */ | |
1907 | switch (comp_status) { | |
60dd6e8e | 1908 | case CS_COMPLETE: |
60dd6e8e | 1909 | break; |
4072e1dc | 1910 | |
60dd6e8e DT |
1911 | case CS_RESET: |
1912 | case CS_PORT_UNAVAILABLE: | |
1913 | case CS_PORT_LOGGED_OUT: | |
4072e1dc DT |
1914 | fcport->nvme_flag |= NVME_FLAG_RESETTING; |
1915 | /* fall through */ | |
1916 | case CS_ABORTED: | |
60dd6e8e | 1917 | case CS_PORT_BUSY: |
60dd6e8e DT |
1918 | fd->transferred_length = 0; |
1919 | iocb->u.nvme.rsp_pyld_len = 0; | |
1920 | ret = QLA_ABORTED; | |
1921 | break; | |
4072e1dc DT |
1922 | case CS_DATA_UNDERRUN: |
1923 | break; | |
60dd6e8e | 1924 | default: |
7401bc18 | 1925 | ret = QLA_FUNCTION_FAILED; |
60dd6e8e | 1926 | break; |
7401bc18 DG |
1927 | } |
1928 | sp->done(sp, ret); | |
1929 | } | |
1930 | ||
2853192e QT |
1931 | static void qla_ctrlvp_completed(scsi_qla_host_t *vha, struct req_que *req, |
1932 | struct vp_ctrl_entry_24xx *vce) | |
1933 | { | |
1934 | const char func[] = "CTRLVP-IOCB"; | |
1935 | srb_t *sp; | |
1936 | int rval = QLA_SUCCESS; | |
1937 | ||
1938 | sp = qla2x00_get_sp_from_handle(vha, func, req, vce); | |
1939 | if (!sp) | |
1940 | return; | |
1941 | ||
1942 | if (vce->entry_status != 0) { | |
1943 | ql_dbg(ql_dbg_vport, vha, 0x10c4, | |
1944 | "%s: Failed to complete IOCB -- error status (%x)\n", | |
1945 | sp->name, vce->entry_status); | |
1946 | rval = QLA_FUNCTION_FAILED; | |
1947 | } else if (vce->comp_status != cpu_to_le16(CS_COMPLETE)) { | |
1948 | ql_dbg(ql_dbg_vport, vha, 0x10c5, | |
1949 | "%s: Failed to complete IOCB -- completion status (%x) vpidx %x\n", | |
1950 | sp->name, le16_to_cpu(vce->comp_status), | |
1951 | le16_to_cpu(vce->vp_idx_failed)); | |
1952 | rval = QLA_FUNCTION_FAILED; | |
1953 | } else { | |
1954 | ql_dbg(ql_dbg_vport, vha, 0x10c6, | |
1955 | "Done %s.\n", __func__); | |
1956 | } | |
1957 | ||
1958 | sp->rc = rval; | |
1959 | sp->done(sp, rval); | |
1960 | } | |
1961 | ||
1da177e4 LT |
1962 | /** |
1963 | * qla2x00_process_response_queue() - Process response queue entries. | |
2db6228d | 1964 | * @rsp: response queue |
1da177e4 LT |
1965 | */ |
1966 | void | |
73208dfd | 1967 | qla2x00_process_response_queue(struct rsp_que *rsp) |
1da177e4 | 1968 | { |
73208dfd AC |
1969 | struct scsi_qla_host *vha; |
1970 | struct qla_hw_data *ha = rsp->hw; | |
3d71644c | 1971 | struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; |
1da177e4 LT |
1972 | sts_entry_t *pkt; |
1973 | uint16_t handle_cnt; | |
1974 | uint16_t cnt; | |
73208dfd | 1975 | |
2afa19a9 | 1976 | vha = pci_get_drvdata(ha->pdev); |
1da177e4 | 1977 | |
e315cd28 | 1978 | if (!vha->flags.online) |
1da177e4 LT |
1979 | return; |
1980 | ||
e315cd28 AC |
1981 | while (rsp->ring_ptr->signature != RESPONSE_PROCESSED) { |
1982 | pkt = (sts_entry_t *)rsp->ring_ptr; | |
1da177e4 | 1983 | |
e315cd28 AC |
1984 | rsp->ring_index++; |
1985 | if (rsp->ring_index == rsp->length) { | |
1986 | rsp->ring_index = 0; | |
1987 | rsp->ring_ptr = rsp->ring; | |
1da177e4 | 1988 | } else { |
e315cd28 | 1989 | rsp->ring_ptr++; |
1da177e4 LT |
1990 | } |
1991 | ||
1992 | if (pkt->entry_status != 0) { | |
73208dfd | 1993 | qla2x00_error_entry(vha, rsp, pkt); |
1da177e4 LT |
1994 | ((response_t *)pkt)->signature = RESPONSE_PROCESSED; |
1995 | wmb(); | |
1996 | continue; | |
1997 | } | |
1998 | ||
1999 | switch (pkt->entry_type) { | |
2000 | case STATUS_TYPE: | |
73208dfd | 2001 | qla2x00_status_entry(vha, rsp, pkt); |
1da177e4 LT |
2002 | break; |
2003 | case STATUS_TYPE_21: | |
2004 | handle_cnt = ((sts21_entry_t *)pkt)->handle_count; | |
2005 | for (cnt = 0; cnt < handle_cnt; cnt++) { | |
73208dfd | 2006 | qla2x00_process_completed_request(vha, rsp->req, |
1da177e4 LT |
2007 | ((sts21_entry_t *)pkt)->handle[cnt]); |
2008 | } | |
2009 | break; | |
2010 | case STATUS_TYPE_22: | |
2011 | handle_cnt = ((sts22_entry_t *)pkt)->handle_count; | |
2012 | for (cnt = 0; cnt < handle_cnt; cnt++) { | |
73208dfd | 2013 | qla2x00_process_completed_request(vha, rsp->req, |
1da177e4 LT |
2014 | ((sts22_entry_t *)pkt)->handle[cnt]); |
2015 | } | |
2016 | break; | |
2017 | case STATUS_CONT_TYPE: | |
2afa19a9 | 2018 | qla2x00_status_cont_entry(rsp, (sts_cont_entry_t *)pkt); |
1da177e4 | 2019 | break; |
ac280b67 AV |
2020 | case MBX_IOCB_TYPE: |
2021 | qla2x00_mbx_iocb_entry(vha, rsp->req, | |
2022 | (struct mbx_entry *)pkt); | |
3822263e | 2023 | break; |
9bc4f4fb HZ |
2024 | case CT_IOCB_TYPE: |
2025 | qla2x00_ct_entry(vha, rsp->req, pkt, CT_IOCB_TYPE); | |
2026 | break; | |
1da177e4 LT |
2027 | default: |
2028 | /* Type Not Supported. */ | |
7c3df132 SK |
2029 | ql_log(ql_log_warn, vha, 0x504a, |
2030 | "Received unknown response pkt type %x " | |
1da177e4 | 2031 | "entry status=%x.\n", |
7c3df132 | 2032 | pkt->entry_type, pkt->entry_status); |
1da177e4 LT |
2033 | break; |
2034 | } | |
2035 | ((response_t *)pkt)->signature = RESPONSE_PROCESSED; | |
2036 | wmb(); | |
2037 | } | |
2038 | ||
2039 | /* Adjust ring index */ | |
e315cd28 | 2040 | WRT_REG_WORD(ISP_RSP_Q_OUT(ha, reg), rsp->ring_index); |
1da177e4 LT |
2041 | } |
2042 | ||
4733fcb1 | 2043 | static inline void |
5544213b | 2044 | qla2x00_handle_sense(srb_t *sp, uint8_t *sense_data, uint32_t par_sense_len, |
9ba56b95 | 2045 | uint32_t sense_len, struct rsp_que *rsp, int res) |
4733fcb1 | 2046 | { |
25ff6af1 | 2047 | struct scsi_qla_host *vha = sp->vha; |
9ba56b95 GM |
2048 | struct scsi_cmnd *cp = GET_CMD_SP(sp); |
2049 | uint32_t track_sense_len; | |
4733fcb1 AV |
2050 | |
2051 | if (sense_len >= SCSI_SENSE_BUFFERSIZE) | |
2052 | sense_len = SCSI_SENSE_BUFFERSIZE; | |
2053 | ||
9ba56b95 GM |
2054 | SET_CMD_SENSE_LEN(sp, sense_len); |
2055 | SET_CMD_SENSE_PTR(sp, cp->sense_buffer); | |
2056 | track_sense_len = sense_len; | |
2057 | ||
2058 | if (sense_len > par_sense_len) | |
5544213b | 2059 | sense_len = par_sense_len; |
4733fcb1 AV |
2060 | |
2061 | memcpy(cp->sense_buffer, sense_data, sense_len); | |
2062 | ||
9ba56b95 GM |
2063 | SET_CMD_SENSE_PTR(sp, cp->sense_buffer + sense_len); |
2064 | track_sense_len -= sense_len; | |
2065 | SET_CMD_SENSE_LEN(sp, track_sense_len); | |
2066 | ||
2067 | if (track_sense_len != 0) { | |
2afa19a9 | 2068 | rsp->status_srb = sp; |
9ba56b95 GM |
2069 | cp->result = res; |
2070 | } | |
4733fcb1 | 2071 | |
cfb0919c CD |
2072 | if (sense_len) { |
2073 | ql_dbg(ql_dbg_io + ql_dbg_buffer, vha, 0x301c, | |
9cb78c16 | 2074 | "Check condition Sense data, nexus%ld:%d:%llu cmd=%p.\n", |
25ff6af1 | 2075 | sp->vha->host_no, cp->device->id, cp->device->lun, |
cfb0919c | 2076 | cp); |
7c3df132 SK |
2077 | ql_dump_buffer(ql_dbg_io + ql_dbg_buffer, vha, 0x302b, |
2078 | cp->sense_buffer, sense_len); | |
cfb0919c | 2079 | } |
4733fcb1 AV |
2080 | } |
2081 | ||
bad75002 AE |
2082 | struct scsi_dif_tuple { |
2083 | __be16 guard; /* Checksum */ | |
d6a03581 | 2084 | __be16 app_tag; /* APPL identifier */ |
bad75002 AE |
2085 | __be32 ref_tag; /* Target LBA or indirect LBA */ |
2086 | }; | |
2087 | ||
2088 | /* | |
2089 | * Checks the guard or meta-data for the type of error | |
2090 | * detected by the HBA. In case of errors, we set the | |
2091 | * ASC/ASCQ fields in the sense buffer with ILLEGAL_REQUEST | |
2092 | * to indicate to the kernel that the HBA detected error. | |
2093 | */ | |
8cb2049c | 2094 | static inline int |
bad75002 AE |
2095 | qla2x00_handle_dif_error(srb_t *sp, struct sts_entry_24xx *sts24) |
2096 | { | |
25ff6af1 | 2097 | struct scsi_qla_host *vha = sp->vha; |
9ba56b95 | 2098 | struct scsi_cmnd *cmd = GET_CMD_SP(sp); |
8cb2049c AE |
2099 | uint8_t *ap = &sts24->data[12]; |
2100 | uint8_t *ep = &sts24->data[20]; | |
bad75002 AE |
2101 | uint32_t e_ref_tag, a_ref_tag; |
2102 | uint16_t e_app_tag, a_app_tag; | |
2103 | uint16_t e_guard, a_guard; | |
2104 | ||
8cb2049c AE |
2105 | /* |
2106 | * swab32 of the "data" field in the beginning of qla2x00_status_entry() | |
2107 | * would make guard field appear at offset 2 | |
2108 | */ | |
2109 | a_guard = le16_to_cpu(*(uint16_t *)(ap + 2)); | |
2110 | a_app_tag = le16_to_cpu(*(uint16_t *)(ap + 0)); | |
2111 | a_ref_tag = le32_to_cpu(*(uint32_t *)(ap + 4)); | |
2112 | e_guard = le16_to_cpu(*(uint16_t *)(ep + 2)); | |
2113 | e_app_tag = le16_to_cpu(*(uint16_t *)(ep + 0)); | |
2114 | e_ref_tag = le32_to_cpu(*(uint32_t *)(ep + 4)); | |
bad75002 | 2115 | |
7c3df132 SK |
2116 | ql_dbg(ql_dbg_io, vha, 0x3023, |
2117 | "iocb(s) %p Returned STATUS.\n", sts24); | |
bad75002 | 2118 | |
7c3df132 SK |
2119 | ql_dbg(ql_dbg_io, vha, 0x3024, |
2120 | "DIF ERROR in cmd 0x%x lba 0x%llx act ref" | |
bad75002 | 2121 | " tag=0x%x, exp ref_tag=0x%x, act app tag=0x%x, exp app" |
7c3df132 | 2122 | " tag=0x%x, act guard=0x%x, exp guard=0x%x.\n", |
bad75002 | 2123 | cmd->cmnd[0], (u64)scsi_get_lba(cmd), a_ref_tag, e_ref_tag, |
7c3df132 | 2124 | a_app_tag, e_app_tag, a_guard, e_guard); |
bad75002 | 2125 | |
8cb2049c AE |
2126 | /* |
2127 | * Ignore sector if: | |
2128 | * For type 3: ref & app tag is all 'f's | |
2129 | * For type 0,1,2: app tag is all 'f's | |
2130 | */ | |
128b6f9f | 2131 | if ((a_app_tag == T10_PI_APP_ESCAPE) && |
8cb2049c | 2132 | ((scsi_get_prot_type(cmd) != SCSI_PROT_DIF_TYPE3) || |
128b6f9f | 2133 | (a_ref_tag == T10_PI_REF_ESCAPE))) { |
8cb2049c AE |
2134 | uint32_t blocks_done, resid; |
2135 | sector_t lba_s = scsi_get_lba(cmd); | |
2136 | ||
2137 | /* 2TB boundary case covered automatically with this */ | |
2138 | blocks_done = e_ref_tag - (uint32_t)lba_s + 1; | |
2139 | ||
2140 | resid = scsi_bufflen(cmd) - (blocks_done * | |
2141 | cmd->device->sector_size); | |
2142 | ||
2143 | scsi_set_resid(cmd, resid); | |
2144 | cmd->result = DID_OK << 16; | |
2145 | ||
2146 | /* Update protection tag */ | |
2147 | if (scsi_prot_sg_count(cmd)) { | |
2148 | uint32_t i, j = 0, k = 0, num_ent; | |
2149 | struct scatterlist *sg; | |
27c0e83b | 2150 | struct t10_pi_tuple *spt; |
8cb2049c AE |
2151 | |
2152 | /* Patch the corresponding protection tags */ | |
2153 | scsi_for_each_prot_sg(cmd, sg, | |
2154 | scsi_prot_sg_count(cmd), i) { | |
2155 | num_ent = sg_dma_len(sg) / 8; | |
2156 | if (k + num_ent < blocks_done) { | |
2157 | k += num_ent; | |
2158 | continue; | |
2159 | } | |
2160 | j = blocks_done - k - 1; | |
2161 | k = blocks_done; | |
2162 | break; | |
2163 | } | |
2164 | ||
2165 | if (k != blocks_done) { | |
cfb0919c | 2166 | ql_log(ql_log_warn, vha, 0x302f, |
8ec9c7fb RD |
2167 | "unexpected tag values tag:lba=%x:%llx)\n", |
2168 | e_ref_tag, (unsigned long long)lba_s); | |
8cb2049c AE |
2169 | return 1; |
2170 | } | |
2171 | ||
2172 | spt = page_address(sg_page(sg)) + sg->offset; | |
2173 | spt += j; | |
2174 | ||
128b6f9f | 2175 | spt->app_tag = T10_PI_APP_ESCAPE; |
8cb2049c | 2176 | if (scsi_get_prot_type(cmd) == SCSI_PROT_DIF_TYPE3) |
128b6f9f | 2177 | spt->ref_tag = T10_PI_REF_ESCAPE; |
8cb2049c AE |
2178 | } |
2179 | ||
2180 | return 0; | |
2181 | } | |
2182 | ||
bad75002 AE |
2183 | /* check guard */ |
2184 | if (e_guard != a_guard) { | |
2185 | scsi_build_sense_buffer(1, cmd->sense_buffer, ILLEGAL_REQUEST, | |
2186 | 0x10, 0x1); | |
2187 | set_driver_byte(cmd, DRIVER_SENSE); | |
2188 | set_host_byte(cmd, DID_ABORT); | |
584d7aad | 2189 | cmd->result |= SAM_STAT_CHECK_CONDITION; |
8cb2049c | 2190 | return 1; |
bad75002 AE |
2191 | } |
2192 | ||
e02587d7 AE |
2193 | /* check ref tag */ |
2194 | if (e_ref_tag != a_ref_tag) { | |
bad75002 | 2195 | scsi_build_sense_buffer(1, cmd->sense_buffer, ILLEGAL_REQUEST, |
e02587d7 | 2196 | 0x10, 0x3); |
bad75002 AE |
2197 | set_driver_byte(cmd, DRIVER_SENSE); |
2198 | set_host_byte(cmd, DID_ABORT); | |
584d7aad | 2199 | cmd->result |= SAM_STAT_CHECK_CONDITION; |
8cb2049c | 2200 | return 1; |
bad75002 AE |
2201 | } |
2202 | ||
e02587d7 AE |
2203 | /* check appl tag */ |
2204 | if (e_app_tag != a_app_tag) { | |
bad75002 | 2205 | scsi_build_sense_buffer(1, cmd->sense_buffer, ILLEGAL_REQUEST, |
e02587d7 | 2206 | 0x10, 0x2); |
bad75002 AE |
2207 | set_driver_byte(cmd, DRIVER_SENSE); |
2208 | set_host_byte(cmd, DID_ABORT); | |
584d7aad | 2209 | cmd->result |= SAM_STAT_CHECK_CONDITION; |
8cb2049c | 2210 | return 1; |
bad75002 | 2211 | } |
e02587d7 | 2212 | |
8cb2049c | 2213 | return 1; |
bad75002 AE |
2214 | } |
2215 | ||
a9b6f722 SK |
2216 | static void |
2217 | qla25xx_process_bidir_status_iocb(scsi_qla_host_t *vha, void *pkt, | |
2218 | struct req_que *req, uint32_t index) | |
2219 | { | |
2220 | struct qla_hw_data *ha = vha->hw; | |
2221 | srb_t *sp; | |
2222 | uint16_t comp_status; | |
2223 | uint16_t scsi_status; | |
2224 | uint16_t thread_id; | |
2225 | uint32_t rval = EXT_STATUS_OK; | |
75cc8cfc | 2226 | struct bsg_job *bsg_job = NULL; |
01e0e15c JT |
2227 | struct fc_bsg_request *bsg_request; |
2228 | struct fc_bsg_reply *bsg_reply; | |
a9b6f722 SK |
2229 | sts_entry_t *sts; |
2230 | struct sts_entry_24xx *sts24; | |
2231 | sts = (sts_entry_t *) pkt; | |
2232 | sts24 = (struct sts_entry_24xx *) pkt; | |
2233 | ||
2234 | /* Validate handle. */ | |
8d93f550 | 2235 | if (index >= req->num_outstanding_cmds) { |
a9b6f722 SK |
2236 | ql_log(ql_log_warn, vha, 0x70af, |
2237 | "Invalid SCSI completion handle 0x%x.\n", index); | |
2238 | set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); | |
2239 | return; | |
2240 | } | |
2241 | ||
2242 | sp = req->outstanding_cmds[index]; | |
01e0e15c | 2243 | if (!sp) { |
a9b6f722 SK |
2244 | ql_log(ql_log_warn, vha, 0x70b0, |
2245 | "Req:%d: Invalid ISP SCSI completion handle(0x%x)\n", | |
2246 | req->id, index); | |
2247 | ||
2248 | set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); | |
2249 | return; | |
2250 | } | |
2251 | ||
01e0e15c JT |
2252 | /* Free outstanding command slot. */ |
2253 | req->outstanding_cmds[index] = NULL; | |
2254 | bsg_job = sp->u.bsg_job; | |
2255 | bsg_request = bsg_job->request; | |
2256 | bsg_reply = bsg_job->reply; | |
2257 | ||
a9b6f722 SK |
2258 | if (IS_FWI2_CAPABLE(ha)) { |
2259 | comp_status = le16_to_cpu(sts24->comp_status); | |
2260 | scsi_status = le16_to_cpu(sts24->scsi_status) & SS_MASK; | |
2261 | } else { | |
2262 | comp_status = le16_to_cpu(sts->comp_status); | |
2263 | scsi_status = le16_to_cpu(sts->scsi_status) & SS_MASK; | |
2264 | } | |
2265 | ||
01e0e15c | 2266 | thread_id = bsg_request->rqst_data.h_vendor.vendor_cmd[1]; |
a9b6f722 SK |
2267 | switch (comp_status) { |
2268 | case CS_COMPLETE: | |
2269 | if (scsi_status == 0) { | |
01e0e15c | 2270 | bsg_reply->reply_payload_rcv_len = |
a9b6f722 | 2271 | bsg_job->reply_payload.payload_len; |
fabbb8df | 2272 | vha->qla_stats.input_bytes += |
01e0e15c | 2273 | bsg_reply->reply_payload_rcv_len; |
fabbb8df | 2274 | vha->qla_stats.input_requests++; |
a9b6f722 SK |
2275 | rval = EXT_STATUS_OK; |
2276 | } | |
2277 | goto done; | |
2278 | ||
2279 | case CS_DATA_OVERRUN: | |
2280 | ql_dbg(ql_dbg_user, vha, 0x70b1, | |
5a68a1c2 | 2281 | "Command completed with data overrun thread_id=%d\n", |
a9b6f722 SK |
2282 | thread_id); |
2283 | rval = EXT_STATUS_DATA_OVERRUN; | |
2284 | break; | |
2285 | ||
2286 | case CS_DATA_UNDERRUN: | |
2287 | ql_dbg(ql_dbg_user, vha, 0x70b2, | |
5a68a1c2 | 2288 | "Command completed with data underrun thread_id=%d\n", |
a9b6f722 SK |
2289 | thread_id); |
2290 | rval = EXT_STATUS_DATA_UNDERRUN; | |
2291 | break; | |
2292 | case CS_BIDIR_RD_OVERRUN: | |
2293 | ql_dbg(ql_dbg_user, vha, 0x70b3, | |
2294 | "Command completed with read data overrun thread_id=%d\n", | |
2295 | thread_id); | |
2296 | rval = EXT_STATUS_DATA_OVERRUN; | |
2297 | break; | |
2298 | ||
2299 | case CS_BIDIR_RD_WR_OVERRUN: | |
2300 | ql_dbg(ql_dbg_user, vha, 0x70b4, | |
2301 | "Command completed with read and write data overrun " | |
2302 | "thread_id=%d\n", thread_id); | |
2303 | rval = EXT_STATUS_DATA_OVERRUN; | |
2304 | break; | |
2305 | ||
2306 | case CS_BIDIR_RD_OVERRUN_WR_UNDERRUN: | |
2307 | ql_dbg(ql_dbg_user, vha, 0x70b5, | |
2308 | "Command completed with read data over and write data " | |
2309 | "underrun thread_id=%d\n", thread_id); | |
2310 | rval = EXT_STATUS_DATA_OVERRUN; | |
2311 | break; | |
2312 | ||
2313 | case CS_BIDIR_RD_UNDERRUN: | |
2314 | ql_dbg(ql_dbg_user, vha, 0x70b6, | |
5a68a1c2 | 2315 | "Command completed with read data underrun " |
a9b6f722 SK |
2316 | "thread_id=%d\n", thread_id); |
2317 | rval = EXT_STATUS_DATA_UNDERRUN; | |
2318 | break; | |
2319 | ||
2320 | case CS_BIDIR_RD_UNDERRUN_WR_OVERRUN: | |
2321 | ql_dbg(ql_dbg_user, vha, 0x70b7, | |
2322 | "Command completed with read data under and write data " | |
2323 | "overrun thread_id=%d\n", thread_id); | |
2324 | rval = EXT_STATUS_DATA_UNDERRUN; | |
2325 | break; | |
2326 | ||
2327 | case CS_BIDIR_RD_WR_UNDERRUN: | |
2328 | ql_dbg(ql_dbg_user, vha, 0x70b8, | |
2329 | "Command completed with read and write data underrun " | |
2330 | "thread_id=%d\n", thread_id); | |
2331 | rval = EXT_STATUS_DATA_UNDERRUN; | |
2332 | break; | |
2333 | ||
2334 | case CS_BIDIR_DMA: | |
2335 | ql_dbg(ql_dbg_user, vha, 0x70b9, | |
2336 | "Command completed with data DMA error thread_id=%d\n", | |
2337 | thread_id); | |
2338 | rval = EXT_STATUS_DMA_ERR; | |
2339 | break; | |
2340 | ||
2341 | case CS_TIMEOUT: | |
2342 | ql_dbg(ql_dbg_user, vha, 0x70ba, | |
2343 | "Command completed with timeout thread_id=%d\n", | |
2344 | thread_id); | |
2345 | rval = EXT_STATUS_TIMEOUT; | |
2346 | break; | |
2347 | default: | |
2348 | ql_dbg(ql_dbg_user, vha, 0x70bb, | |
2349 | "Command completed with completion status=0x%x " | |
2350 | "thread_id=%d\n", comp_status, thread_id); | |
2351 | rval = EXT_STATUS_ERR; | |
2352 | break; | |
2353 | } | |
01e0e15c | 2354 | bsg_reply->reply_payload_rcv_len = 0; |
a9b6f722 SK |
2355 | |
2356 | done: | |
2357 | /* Return the vendor specific reply to API */ | |
01e0e15c | 2358 | bsg_reply->reply_data.vendor_reply.vendor_rsp[0] = rval; |
a9b6f722 SK |
2359 | bsg_job->reply_len = sizeof(struct fc_bsg_reply); |
2360 | /* Always return DID_OK, bsg will send the vendor specific response | |
2361 | * in this case only */ | |
f7d5182c | 2362 | sp->done(sp, DID_OK << 16); |
a9b6f722 SK |
2363 | |
2364 | } | |
2365 | ||
1da177e4 LT |
2366 | /** |
2367 | * qla2x00_status_entry() - Process a Status IOCB entry. | |
2db6228d BVA |
2368 | * @vha: SCSI driver HA context |
2369 | * @rsp: response queue | |
1da177e4 LT |
2370 | * @pkt: Entry pointer |
2371 | */ | |
2372 | static void | |
73208dfd | 2373 | qla2x00_status_entry(scsi_qla_host_t *vha, struct rsp_que *rsp, void *pkt) |
1da177e4 | 2374 | { |
1da177e4 | 2375 | srb_t *sp; |
1da177e4 LT |
2376 | fc_port_t *fcport; |
2377 | struct scsi_cmnd *cp; | |
9a853f71 AV |
2378 | sts_entry_t *sts; |
2379 | struct sts_entry_24xx *sts24; | |
1da177e4 LT |
2380 | uint16_t comp_status; |
2381 | uint16_t scsi_status; | |
b7d2280c | 2382 | uint16_t ox_id; |
1da177e4 LT |
2383 | uint8_t lscsi_status; |
2384 | int32_t resid; | |
5544213b AV |
2385 | uint32_t sense_len, par_sense_len, rsp_info_len, resid_len, |
2386 | fw_resid_len; | |
9a853f71 | 2387 | uint8_t *rsp_info, *sense_data; |
e315cd28 | 2388 | struct qla_hw_data *ha = vha->hw; |
2afa19a9 AC |
2389 | uint32_t handle; |
2390 | uint16_t que; | |
2391 | struct req_que *req; | |
b7d2280c | 2392 | int logit = 1; |
9ba56b95 | 2393 | int res = 0; |
a9b6f722 | 2394 | uint16_t state_flags = 0; |
e05fe292 | 2395 | uint16_t retry_delay = 0; |
9a853f71 AV |
2396 | |
2397 | sts = (sts_entry_t *) pkt; | |
2398 | sts24 = (struct sts_entry_24xx *) pkt; | |
e428924c | 2399 | if (IS_FWI2_CAPABLE(ha)) { |
9a853f71 AV |
2400 | comp_status = le16_to_cpu(sts24->comp_status); |
2401 | scsi_status = le16_to_cpu(sts24->scsi_status) & SS_MASK; | |
a9b6f722 | 2402 | state_flags = le16_to_cpu(sts24->state_flags); |
9a853f71 AV |
2403 | } else { |
2404 | comp_status = le16_to_cpu(sts->comp_status); | |
2405 | scsi_status = le16_to_cpu(sts->scsi_status) & SS_MASK; | |
2406 | } | |
2afa19a9 AC |
2407 | handle = (uint32_t) LSW(sts->handle); |
2408 | que = MSW(sts->handle); | |
2409 | req = ha->req_q_map[que]; | |
a9083016 | 2410 | |
36008cf1 CD |
2411 | /* Check for invalid queue pointer */ |
2412 | if (req == NULL || | |
2413 | que >= find_first_zero_bit(ha->req_qid_map, ha->max_req_queues)) { | |
2414 | ql_dbg(ql_dbg_io, vha, 0x3059, | |
2415 | "Invalid status handle (0x%x): Bad req pointer. req=%p, " | |
2416 | "que=%u.\n", sts->handle, req, que); | |
2417 | return; | |
2418 | } | |
2419 | ||
1da177e4 | 2420 | /* Validate handle. */ |
c7bc4cae | 2421 | if (handle < req->num_outstanding_cmds) { |
2afa19a9 | 2422 | sp = req->outstanding_cmds[handle]; |
c7bc4cae CD |
2423 | if (!sp) { |
2424 | ql_dbg(ql_dbg_io, vha, 0x3075, | |
2425 | "%s(%ld): Already returned command for status handle (0x%x).\n", | |
2426 | __func__, vha->host_no, sts->handle); | |
2427 | return; | |
2428 | } | |
2429 | } else { | |
cfb0919c | 2430 | ql_dbg(ql_dbg_io, vha, 0x3017, |
c7bc4cae CD |
2431 | "Invalid status handle, out of range (0x%x).\n", |
2432 | sts->handle); | |
1da177e4 | 2433 | |
acd3ce88 CD |
2434 | if (!test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags)) { |
2435 | if (IS_P3P_TYPE(ha)) | |
2436 | set_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags); | |
2437 | else | |
2438 | set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); | |
2439 | qla2xxx_wake_dpc(vha); | |
2440 | } | |
1da177e4 LT |
2441 | return; |
2442 | } | |
a9b6f722 | 2443 | |
c5419e26 QT |
2444 | if (sp->cmd_type != TYPE_SRB) { |
2445 | req->outstanding_cmds[handle] = NULL; | |
2446 | ql_dbg(ql_dbg_io, vha, 0x3015, | |
2447 | "Unknown sp->cmd_type %x %p).\n", | |
2448 | sp->cmd_type, sp); | |
2449 | return; | |
2450 | } | |
2451 | ||
7401bc18 DG |
2452 | /* NVME completion. */ |
2453 | if (sp->type == SRB_NVME_CMD) { | |
60dd6e8e DT |
2454 | req->outstanding_cmds[handle] = NULL; |
2455 | qla24xx_nvme_iocb_entry(vha, req, pkt, sp); | |
7401bc18 DG |
2456 | return; |
2457 | } | |
2458 | ||
a9b6f722 SK |
2459 | if (unlikely((state_flags & BIT_1) && (sp->type == SRB_BIDI_CMD))) { |
2460 | qla25xx_process_bidir_status_iocb(vha, pkt, req, handle); | |
2461 | return; | |
2462 | } | |
2463 | ||
faef62d1 AB |
2464 | /* Task Management completion. */ |
2465 | if (sp->type == SRB_TM_CMD) { | |
2466 | qla24xx_tm_iocb_entry(vha, req, pkt); | |
2467 | return; | |
2468 | } | |
2469 | ||
a9b6f722 SK |
2470 | /* Fast path completion. */ |
2471 | if (comp_status == CS_COMPLETE && scsi_status == 0) { | |
2472 | qla2x00_process_completed_request(vha, req, handle); | |
2473 | ||
2474 | return; | |
2475 | } | |
2476 | ||
2477 | req->outstanding_cmds[handle] = NULL; | |
9ba56b95 | 2478 | cp = GET_CMD_SP(sp); |
1da177e4 | 2479 | if (cp == NULL) { |
cfb0919c | 2480 | ql_dbg(ql_dbg_io, vha, 0x3018, |
7c3df132 SK |
2481 | "Command already returned (0x%x/%p).\n", |
2482 | sts->handle, sp); | |
1da177e4 LT |
2483 | |
2484 | return; | |
2485 | } | |
2486 | ||
8ae6d9c7 | 2487 | lscsi_status = scsi_status & STATUS_MASK; |
1da177e4 | 2488 | |
bdf79621 | 2489 | fcport = sp->fcport; |
1da177e4 | 2490 | |
b7d2280c | 2491 | ox_id = 0; |
5544213b AV |
2492 | sense_len = par_sense_len = rsp_info_len = resid_len = |
2493 | fw_resid_len = 0; | |
e428924c | 2494 | if (IS_FWI2_CAPABLE(ha)) { |
0f00a206 LC |
2495 | if (scsi_status & SS_SENSE_LEN_VALID) |
2496 | sense_len = le32_to_cpu(sts24->sense_len); | |
2497 | if (scsi_status & SS_RESPONSE_INFO_LEN_VALID) | |
2498 | rsp_info_len = le32_to_cpu(sts24->rsp_data_len); | |
2499 | if (scsi_status & (SS_RESIDUAL_UNDER | SS_RESIDUAL_OVER)) | |
2500 | resid_len = le32_to_cpu(sts24->rsp_residual_count); | |
2501 | if (comp_status == CS_DATA_UNDERRUN) | |
2502 | fw_resid_len = le32_to_cpu(sts24->residual_len); | |
9a853f71 AV |
2503 | rsp_info = sts24->data; |
2504 | sense_data = sts24->data; | |
2505 | host_to_fcp_swap(sts24->data, sizeof(sts24->data)); | |
b7d2280c | 2506 | ox_id = le16_to_cpu(sts24->ox_id); |
5544213b | 2507 | par_sense_len = sizeof(sts24->data); |
e05fe292 | 2508 | /* Valid values of the retry delay timer are 0x1-0xffef */ |
3cedc879 AG |
2509 | if (sts24->retry_delay > 0 && sts24->retry_delay < 0xfff1) { |
2510 | retry_delay = sts24->retry_delay & 0x3fff; | |
2511 | ql_dbg(ql_dbg_io, sp->vha, 0x3033, | |
2512 | "%s: scope=%#x retry_delay=%#x\n", __func__, | |
2513 | sts24->retry_delay >> 14, retry_delay); | |
2514 | } | |
9a853f71 | 2515 | } else { |
0f00a206 LC |
2516 | if (scsi_status & SS_SENSE_LEN_VALID) |
2517 | sense_len = le16_to_cpu(sts->req_sense_length); | |
2518 | if (scsi_status & SS_RESPONSE_INFO_LEN_VALID) | |
2519 | rsp_info_len = le16_to_cpu(sts->rsp_info_len); | |
9a853f71 AV |
2520 | resid_len = le32_to_cpu(sts->residual_length); |
2521 | rsp_info = sts->rsp_info; | |
2522 | sense_data = sts->req_sense_data; | |
5544213b | 2523 | par_sense_len = sizeof(sts->req_sense_data); |
9a853f71 AV |
2524 | } |
2525 | ||
1da177e4 LT |
2526 | /* Check for any FCP transport errors. */ |
2527 | if (scsi_status & SS_RESPONSE_INFO_LEN_VALID) { | |
9a853f71 | 2528 | /* Sense data lies beyond any FCP RESPONSE data. */ |
5544213b | 2529 | if (IS_FWI2_CAPABLE(ha)) { |
9a853f71 | 2530 | sense_data += rsp_info_len; |
5544213b AV |
2531 | par_sense_len -= rsp_info_len; |
2532 | } | |
9a853f71 | 2533 | if (rsp_info_len > 3 && rsp_info[3]) { |
5e19ed90 | 2534 | ql_dbg(ql_dbg_io, fcport->vha, 0x3019, |
7c3df132 SK |
2535 | "FCP I/O protocol failure (0x%x/0x%x).\n", |
2536 | rsp_info_len, rsp_info[3]); | |
1da177e4 | 2537 | |
9ba56b95 | 2538 | res = DID_BUS_BUSY << 16; |
b7d2280c | 2539 | goto out; |
1da177e4 LT |
2540 | } |
2541 | } | |
2542 | ||
3e8ce320 AV |
2543 | /* Check for overrun. */ |
2544 | if (IS_FWI2_CAPABLE(ha) && comp_status == CS_COMPLETE && | |
2545 | scsi_status & SS_RESIDUAL_OVER) | |
2546 | comp_status = CS_DATA_OVERRUN; | |
2547 | ||
e05fe292 CD |
2548 | /* |
2549 | * Check retry_delay_timer value if we receive a busy or | |
2550 | * queue full. | |
2551 | */ | |
2552 | if (lscsi_status == SAM_STAT_TASK_SET_FULL || | |
2553 | lscsi_status == SAM_STAT_BUSY) | |
2554 | qla2x00_set_retry_delay_timestamp(fcport, retry_delay); | |
2555 | ||
1da177e4 LT |
2556 | /* |
2557 | * Based on Host and scsi status generate status code for Linux | |
2558 | */ | |
2559 | switch (comp_status) { | |
2560 | case CS_COMPLETE: | |
df7baa50 | 2561 | case CS_QUEUE_FULL: |
1da177e4 | 2562 | if (scsi_status == 0) { |
9ba56b95 | 2563 | res = DID_OK << 16; |
1da177e4 LT |
2564 | break; |
2565 | } | |
2566 | if (scsi_status & (SS_RESIDUAL_UNDER | SS_RESIDUAL_OVER)) { | |
9a853f71 | 2567 | resid = resid_len; |
385d70b4 | 2568 | scsi_set_resid(cp, resid); |
0da69df1 AV |
2569 | |
2570 | if (!lscsi_status && | |
385d70b4 | 2571 | ((unsigned)(scsi_bufflen(cp) - resid) < |
0da69df1 | 2572 | cp->underflow)) { |
5e19ed90 | 2573 | ql_dbg(ql_dbg_io, fcport->vha, 0x301a, |
83548fe2 | 2574 | "Mid-layer underflow detected (0x%x of 0x%x bytes).\n", |
7c3df132 | 2575 | resid, scsi_bufflen(cp)); |
0da69df1 | 2576 | |
9ba56b95 | 2577 | res = DID_ERROR << 16; |
0da69df1 AV |
2578 | break; |
2579 | } | |
1da177e4 | 2580 | } |
9ba56b95 | 2581 | res = DID_OK << 16 | lscsi_status; |
1da177e4 | 2582 | |
df7baa50 | 2583 | if (lscsi_status == SAM_STAT_TASK_SET_FULL) { |
5e19ed90 | 2584 | ql_dbg(ql_dbg_io, fcport->vha, 0x301b, |
7c3df132 | 2585 | "QUEUE FULL detected.\n"); |
df7baa50 AV |
2586 | break; |
2587 | } | |
b7d2280c | 2588 | logit = 0; |
1da177e4 LT |
2589 | if (lscsi_status != SS_CHECK_CONDITION) |
2590 | break; | |
2591 | ||
b80ca4f7 | 2592 | memset(cp->sense_buffer, 0, SCSI_SENSE_BUFFERSIZE); |
1da177e4 LT |
2593 | if (!(scsi_status & SS_SENSE_LEN_VALID)) |
2594 | break; | |
2595 | ||
5544213b | 2596 | qla2x00_handle_sense(sp, sense_data, par_sense_len, sense_len, |
9ba56b95 | 2597 | rsp, res); |
1da177e4 LT |
2598 | break; |
2599 | ||
2600 | case CS_DATA_UNDERRUN: | |
ed17c71b | 2601 | /* Use F/W calculated residual length. */ |
0f00a206 LC |
2602 | resid = IS_FWI2_CAPABLE(ha) ? fw_resid_len : resid_len; |
2603 | scsi_set_resid(cp, resid); | |
2604 | if (scsi_status & SS_RESIDUAL_UNDER) { | |
2605 | if (IS_FWI2_CAPABLE(ha) && fw_resid_len != resid_len) { | |
5e19ed90 | 2606 | ql_dbg(ql_dbg_io, fcport->vha, 0x301d, |
83548fe2 | 2607 | "Dropped frame(s) detected (0x%x of 0x%x bytes).\n", |
7c3df132 | 2608 | resid, scsi_bufflen(cp)); |
0f00a206 | 2609 | |
9ba56b95 | 2610 | res = DID_ERROR << 16 | lscsi_status; |
4e85e3d9 | 2611 | goto check_scsi_status; |
6acf8190 | 2612 | } |
ed17c71b | 2613 | |
0f00a206 LC |
2614 | if (!lscsi_status && |
2615 | ((unsigned)(scsi_bufflen(cp) - resid) < | |
2616 | cp->underflow)) { | |
5e19ed90 | 2617 | ql_dbg(ql_dbg_io, fcport->vha, 0x301e, |
83548fe2 | 2618 | "Mid-layer underflow detected (0x%x of 0x%x bytes).\n", |
7c3df132 | 2619 | resid, scsi_bufflen(cp)); |
e038a1be | 2620 | |
9ba56b95 | 2621 | res = DID_ERROR << 16; |
0f00a206 LC |
2622 | break; |
2623 | } | |
4aee5766 GM |
2624 | } else if (lscsi_status != SAM_STAT_TASK_SET_FULL && |
2625 | lscsi_status != SAM_STAT_BUSY) { | |
2626 | /* | |
2627 | * scsi status of task set and busy are considered to be | |
2628 | * task not completed. | |
2629 | */ | |
2630 | ||
5e19ed90 | 2631 | ql_dbg(ql_dbg_io, fcport->vha, 0x301f, |
83548fe2 QT |
2632 | "Dropped frame(s) detected (0x%x of 0x%x bytes).\n", |
2633 | resid, scsi_bufflen(cp)); | |
0f00a206 | 2634 | |
9ba56b95 | 2635 | res = DID_ERROR << 16 | lscsi_status; |
0374f55e | 2636 | goto check_scsi_status; |
4aee5766 GM |
2637 | } else { |
2638 | ql_dbg(ql_dbg_io, fcport->vha, 0x3030, | |
2639 | "scsi_status: 0x%x, lscsi_status: 0x%x\n", | |
2640 | scsi_status, lscsi_status); | |
1da177e4 LT |
2641 | } |
2642 | ||
9ba56b95 | 2643 | res = DID_OK << 16 | lscsi_status; |
b7d2280c | 2644 | logit = 0; |
0f00a206 | 2645 | |
0374f55e | 2646 | check_scsi_status: |
1da177e4 | 2647 | /* |
fa2a1ce5 | 2648 | * Check to see if SCSI Status is non zero. If so report SCSI |
1da177e4 LT |
2649 | * Status. |
2650 | */ | |
2651 | if (lscsi_status != 0) { | |
ffec28a3 | 2652 | if (lscsi_status == SAM_STAT_TASK_SET_FULL) { |
5e19ed90 | 2653 | ql_dbg(ql_dbg_io, fcport->vha, 0x3020, |
7c3df132 | 2654 | "QUEUE FULL detected.\n"); |
b7d2280c | 2655 | logit = 1; |
ffec28a3 AV |
2656 | break; |
2657 | } | |
1da177e4 LT |
2658 | if (lscsi_status != SS_CHECK_CONDITION) |
2659 | break; | |
2660 | ||
b80ca4f7 | 2661 | memset(cp->sense_buffer, 0, SCSI_SENSE_BUFFERSIZE); |
1da177e4 LT |
2662 | if (!(scsi_status & SS_SENSE_LEN_VALID)) |
2663 | break; | |
2664 | ||
5544213b | 2665 | qla2x00_handle_sense(sp, sense_data, par_sense_len, |
9ba56b95 | 2666 | sense_len, rsp, res); |
1da177e4 LT |
2667 | } |
2668 | break; | |
2669 | ||
1da177e4 LT |
2670 | case CS_PORT_LOGGED_OUT: |
2671 | case CS_PORT_CONFIG_CHG: | |
2672 | case CS_PORT_BUSY: | |
2673 | case CS_INCOMPLETE: | |
2674 | case CS_PORT_UNAVAILABLE: | |
b7d2280c | 2675 | case CS_TIMEOUT: |
ff454b01 CD |
2676 | case CS_RESET: |
2677 | ||
056a4483 MC |
2678 | /* |
2679 | * We are going to have the fc class block the rport | |
2680 | * while we try to recover so instruct the mid layer | |
2681 | * to requeue until the class decides how to handle this. | |
2682 | */ | |
9ba56b95 | 2683 | res = DID_TRANSPORT_DISRUPTED << 16; |
b7d2280c AV |
2684 | |
2685 | if (comp_status == CS_TIMEOUT) { | |
2686 | if (IS_FWI2_CAPABLE(ha)) | |
2687 | break; | |
2688 | else if ((le16_to_cpu(sts->status_flags) & | |
2689 | SF_LOGOUT_SENT) == 0) | |
2690 | break; | |
2691 | } | |
2692 | ||
726b8548 QT |
2693 | if (atomic_read(&fcport->state) == FCS_ONLINE) { |
2694 | ql_dbg(ql_dbg_disc, fcport->vha, 0x3021, | |
2695 | "Port to be marked lost on fcport=%02x%02x%02x, current " | |
2696 | "port state= %s comp_status %x.\n", fcport->d_id.b.domain, | |
2697 | fcport->d_id.b.area, fcport->d_id.b.al_pa, | |
2698 | port_state_str[atomic_read(&fcport->state)], | |
2699 | comp_status); | |
2700 | ||
e315cd28 | 2701 | qla2x00_mark_device_lost(fcport->vha, fcport, 1, 1); |
d8630bb9 | 2702 | qlt_schedule_sess_for_deletion(fcport); |
726b8548 QT |
2703 | } |
2704 | ||
1da177e4 LT |
2705 | break; |
2706 | ||
1da177e4 | 2707 | case CS_ABORTED: |
9ba56b95 | 2708 | res = DID_RESET << 16; |
1da177e4 | 2709 | break; |
bad75002 AE |
2710 | |
2711 | case CS_DIF_ERROR: | |
8cb2049c | 2712 | logit = qla2x00_handle_dif_error(sp, sts24); |
fb6e4668 | 2713 | res = cp->result; |
bad75002 | 2714 | break; |
9e522cd8 AE |
2715 | |
2716 | case CS_TRANSPORT: | |
2717 | res = DID_ERROR << 16; | |
2718 | ||
2719 | if (!IS_PI_SPLIT_DET_CAPABLE(ha)) | |
2720 | break; | |
2721 | ||
2722 | if (state_flags & BIT_4) | |
2723 | scmd_printk(KERN_WARNING, cp, | |
2724 | "Unsupported device '%s' found.\n", | |
2725 | cp->device->vendor); | |
2726 | break; | |
2727 | ||
1da177e4 | 2728 | default: |
9ba56b95 | 2729 | res = DID_ERROR << 16; |
1da177e4 LT |
2730 | break; |
2731 | } | |
2732 | ||
b7d2280c AV |
2733 | out: |
2734 | if (logit) | |
5e19ed90 | 2735 | ql_dbg(ql_dbg_io, fcport->vha, 0x3022, |
9cb78c16 | 2736 | "FCP command status: 0x%x-0x%x (0x%x) nexus=%ld:%d:%llu " |
7b833558 | 2737 | "portid=%02x%02x%02x oxid=0x%x cdb=%10phN len=0x%x " |
c7bc4cae | 2738 | "rsp_info=0x%x resid=0x%x fw_resid=0x%x sp=%p cp=%p.\n", |
9ba56b95 | 2739 | comp_status, scsi_status, res, vha->host_no, |
cfb0919c CD |
2740 | cp->device->id, cp->device->lun, fcport->d_id.b.domain, |
2741 | fcport->d_id.b.area, fcport->d_id.b.al_pa, ox_id, | |
7b833558 | 2742 | cp->cmnd, scsi_bufflen(cp), rsp_info_len, |
c7bc4cae | 2743 | resid_len, fw_resid_len, sp, cp); |
b7d2280c | 2744 | |
2afa19a9 | 2745 | if (rsp->status_srb == NULL) |
25ff6af1 | 2746 | sp->done(sp, res); |
1da177e4 LT |
2747 | } |
2748 | ||
2749 | /** | |
2750 | * qla2x00_status_cont_entry() - Process a Status Continuations entry. | |
2db6228d | 2751 | * @rsp: response queue |
1da177e4 LT |
2752 | * @pkt: Entry pointer |
2753 | * | |
2754 | * Extended sense data. | |
2755 | */ | |
2756 | static void | |
2afa19a9 | 2757 | qla2x00_status_cont_entry(struct rsp_que *rsp, sts_cont_entry_t *pkt) |
1da177e4 | 2758 | { |
9ba56b95 | 2759 | uint8_t sense_sz = 0; |
2afa19a9 | 2760 | struct qla_hw_data *ha = rsp->hw; |
7c3df132 | 2761 | struct scsi_qla_host *vha = pci_get_drvdata(ha->pdev); |
9ba56b95 | 2762 | srb_t *sp = rsp->status_srb; |
1da177e4 | 2763 | struct scsi_cmnd *cp; |
9ba56b95 GM |
2764 | uint32_t sense_len; |
2765 | uint8_t *sense_ptr; | |
1da177e4 | 2766 | |
9ba56b95 GM |
2767 | if (!sp || !GET_CMD_SENSE_LEN(sp)) |
2768 | return; | |
1da177e4 | 2769 | |
9ba56b95 GM |
2770 | sense_len = GET_CMD_SENSE_LEN(sp); |
2771 | sense_ptr = GET_CMD_SENSE_PTR(sp); | |
1da177e4 | 2772 | |
9ba56b95 GM |
2773 | cp = GET_CMD_SP(sp); |
2774 | if (cp == NULL) { | |
2775 | ql_log(ql_log_warn, vha, 0x3025, | |
2776 | "cmd is NULL: already returned to OS (sp=%p).\n", sp); | |
1da177e4 | 2777 | |
9ba56b95 GM |
2778 | rsp->status_srb = NULL; |
2779 | return; | |
1da177e4 | 2780 | } |
1da177e4 | 2781 | |
9ba56b95 GM |
2782 | if (sense_len > sizeof(pkt->data)) |
2783 | sense_sz = sizeof(pkt->data); | |
2784 | else | |
2785 | sense_sz = sense_len; | |
c4631191 | 2786 | |
9ba56b95 GM |
2787 | /* Move sense data. */ |
2788 | if (IS_FWI2_CAPABLE(ha)) | |
2789 | host_to_fcp_swap(pkt->data, sizeof(pkt->data)); | |
2790 | memcpy(sense_ptr, pkt->data, sense_sz); | |
2791 | ql_dump_buffer(ql_dbg_io + ql_dbg_buffer, vha, 0x302c, | |
2792 | sense_ptr, sense_sz); | |
c4631191 | 2793 | |
9ba56b95 GM |
2794 | sense_len -= sense_sz; |
2795 | sense_ptr += sense_sz; | |
c4631191 | 2796 | |
9ba56b95 GM |
2797 | SET_CMD_SENSE_PTR(sp, sense_ptr); |
2798 | SET_CMD_SENSE_LEN(sp, sense_len); | |
2799 | ||
2800 | /* Place command on done queue. */ | |
2801 | if (sense_len == 0) { | |
2802 | rsp->status_srb = NULL; | |
25ff6af1 | 2803 | sp->done(sp, cp->result); |
c4631191 | 2804 | } |
c4631191 GM |
2805 | } |
2806 | ||
1da177e4 LT |
2807 | /** |
2808 | * qla2x00_error_entry() - Process an error entry. | |
2db6228d BVA |
2809 | * @vha: SCSI driver HA context |
2810 | * @rsp: response queue | |
1da177e4 | 2811 | * @pkt: Entry pointer |
c5419e26 | 2812 | * return : 1=allow further error analysis. 0=no additional error analysis. |
1da177e4 | 2813 | */ |
c5419e26 | 2814 | static int |
73208dfd | 2815 | qla2x00_error_entry(scsi_qla_host_t *vha, struct rsp_que *rsp, sts_entry_t *pkt) |
1da177e4 LT |
2816 | { |
2817 | srb_t *sp; | |
e315cd28 | 2818 | struct qla_hw_data *ha = vha->hw; |
c4631191 | 2819 | const char func[] = "ERROR-IOCB"; |
2afa19a9 | 2820 | uint16_t que = MSW(pkt->handle); |
a6fe35c0 | 2821 | struct req_que *req = NULL; |
9ba56b95 | 2822 | int res = DID_ERROR << 16; |
7c3df132 | 2823 | |
9ba56b95 | 2824 | ql_dbg(ql_dbg_async, vha, 0x502a, |
82de802a QT |
2825 | "iocb type %xh with error status %xh, handle %xh, rspq id %d\n", |
2826 | pkt->entry_type, pkt->entry_status, pkt->handle, rsp->id); | |
9ba56b95 | 2827 | |
a6fe35c0 AE |
2828 | if (que >= ha->max_req_queues || !ha->req_q_map[que]) |
2829 | goto fatal; | |
2830 | ||
2831 | req = ha->req_q_map[que]; | |
2832 | ||
9ba56b95 GM |
2833 | if (pkt->entry_status & RF_BUSY) |
2834 | res = DID_BUS_BUSY << 16; | |
1da177e4 | 2835 | |
c5419e26 QT |
2836 | if ((pkt->handle & ~QLA_TGT_HANDLE_MASK) == QLA_TGT_SKIP_HANDLE) |
2837 | return 0; | |
4f060736 | 2838 | |
c5419e26 QT |
2839 | switch (pkt->entry_type) { |
2840 | case NOTIFY_ACK_TYPE: | |
2841 | case STATUS_TYPE: | |
2842 | case STATUS_CONT_TYPE: | |
2843 | case LOGINOUT_PORT_IOCB_TYPE: | |
2844 | case CT_IOCB_TYPE: | |
2845 | case ELS_IOCB_TYPE: | |
2846 | case ABORT_IOCB_TYPE: | |
2847 | case MBX_IOCB_TYPE: | |
527b8ae3 | 2848 | default: |
c5419e26 QT |
2849 | sp = qla2x00_get_sp_from_handle(vha, func, req, pkt); |
2850 | if (sp) { | |
2851 | sp->done(sp, res); | |
2852 | return 0; | |
2853 | } | |
2854 | break; | |
2855 | ||
2856 | case ABTS_RESP_24XX: | |
2857 | case CTIO_TYPE7: | |
2858 | case CTIO_CRC2: | |
c5419e26 | 2859 | return 1; |
1da177e4 | 2860 | } |
a6fe35c0 AE |
2861 | fatal: |
2862 | ql_log(ql_log_warn, vha, 0x5030, | |
fd49a540 | 2863 | "Error entry - invalid handle/queue (%04x).\n", que); |
c5419e26 | 2864 | return 0; |
1da177e4 LT |
2865 | } |
2866 | ||
9a853f71 AV |
2867 | /** |
2868 | * qla24xx_mbx_completion() - Process mailbox command completions. | |
2db6228d | 2869 | * @vha: SCSI driver HA context |
9a853f71 AV |
2870 | * @mb0: Mailbox0 register |
2871 | */ | |
2872 | static void | |
e315cd28 | 2873 | qla24xx_mbx_completion(scsi_qla_host_t *vha, uint16_t mb0) |
9a853f71 AV |
2874 | { |
2875 | uint16_t cnt; | |
4fa94f83 | 2876 | uint32_t mboxes; |
9a853f71 | 2877 | uint16_t __iomem *wptr; |
e315cd28 | 2878 | struct qla_hw_data *ha = vha->hw; |
9a853f71 AV |
2879 | struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; |
2880 | ||
4fa94f83 | 2881 | /* Read all mbox registers? */ |
c02189e1 BVA |
2882 | WARN_ON_ONCE(ha->mbx_count > 32); |
2883 | mboxes = (1ULL << ha->mbx_count) - 1; | |
4fa94f83 | 2884 | if (!ha->mcp) |
a720101d | 2885 | ql_dbg(ql_dbg_async, vha, 0x504e, "MBX pointer ERROR.\n"); |
4fa94f83 AV |
2886 | else |
2887 | mboxes = ha->mcp->in_mb; | |
2888 | ||
9a853f71 AV |
2889 | /* Load return mailbox registers. */ |
2890 | ha->flags.mbox_int = 1; | |
2891 | ha->mailbox_out[0] = mb0; | |
4fa94f83 | 2892 | mboxes >>= 1; |
9a853f71 AV |
2893 | wptr = (uint16_t __iomem *)®->mailbox1; |
2894 | ||
2895 | for (cnt = 1; cnt < ha->mbx_count; cnt++) { | |
4fa94f83 AV |
2896 | if (mboxes & BIT_0) |
2897 | ha->mailbox_out[cnt] = RD_REG_WORD(wptr); | |
2898 | ||
2899 | mboxes >>= 1; | |
9a853f71 AV |
2900 | wptr++; |
2901 | } | |
9a853f71 AV |
2902 | } |
2903 | ||
4440e46d AB |
2904 | static void |
2905 | qla24xx_abort_iocb_entry(scsi_qla_host_t *vha, struct req_que *req, | |
2906 | struct abort_entry_24xx *pkt) | |
2907 | { | |
2908 | const char func[] = "ABT_IOCB"; | |
2909 | srb_t *sp; | |
2910 | struct srb_iocb *abt; | |
2911 | ||
2912 | sp = qla2x00_get_sp_from_handle(vha, func, req, pkt); | |
2913 | if (!sp) | |
2914 | return; | |
2915 | ||
2916 | abt = &sp->u.iocb_cmd; | |
15f30a57 | 2917 | abt->u.abt.comp_status = le16_to_cpu(pkt->nport_handle); |
25ff6af1 | 2918 | sp->done(sp, 0); |
4440e46d AB |
2919 | } |
2920 | ||
0f7e51f6 | 2921 | void qla24xx_nvme_ls4_iocb(struct scsi_qla_host *vha, |
2922 | struct pt_ls4_request *pkt, struct req_que *req) | |
e84067d7 DG |
2923 | { |
2924 | srb_t *sp; | |
2925 | const char func[] = "LS4_IOCB"; | |
2926 | uint16_t comp_status; | |
2927 | ||
2928 | sp = qla2x00_get_sp_from_handle(vha, func, req, pkt); | |
2929 | if (!sp) | |
2930 | return; | |
2931 | ||
2932 | comp_status = le16_to_cpu(pkt->status); | |
2933 | sp->done(sp, comp_status); | |
2934 | } | |
2935 | ||
9a853f71 AV |
2936 | /** |
2937 | * qla24xx_process_response_queue() - Process response queue entries. | |
2db6228d BVA |
2938 | * @vha: SCSI driver HA context |
2939 | * @rsp: response queue | |
9a853f71 | 2940 | */ |
2afa19a9 AC |
2941 | void qla24xx_process_response_queue(struct scsi_qla_host *vha, |
2942 | struct rsp_que *rsp) | |
9a853f71 | 2943 | { |
9a853f71 | 2944 | struct sts_entry_24xx *pkt; |
a9083016 | 2945 | struct qla_hw_data *ha = vha->hw; |
9a853f71 | 2946 | |
ec7193e2 | 2947 | if (!ha->flags.fw_started) |
9a853f71 AV |
2948 | return; |
2949 | ||
e326d22a QT |
2950 | if (rsp->qpair->cpuid != smp_processor_id()) |
2951 | qla_cpu_update(rsp->qpair, smp_processor_id()); | |
2952 | ||
e315cd28 AC |
2953 | while (rsp->ring_ptr->signature != RESPONSE_PROCESSED) { |
2954 | pkt = (struct sts_entry_24xx *)rsp->ring_ptr; | |
9a853f71 | 2955 | |
e315cd28 AC |
2956 | rsp->ring_index++; |
2957 | if (rsp->ring_index == rsp->length) { | |
2958 | rsp->ring_index = 0; | |
2959 | rsp->ring_ptr = rsp->ring; | |
9a853f71 | 2960 | } else { |
e315cd28 | 2961 | rsp->ring_ptr++; |
9a853f71 AV |
2962 | } |
2963 | ||
2964 | if (pkt->entry_status != 0) { | |
c5419e26 | 2965 | if (qla2x00_error_entry(vha, rsp, (sts_entry_t *) pkt)) |
f83adb61 | 2966 | goto process_err; |
2d70c103 | 2967 | |
9a853f71 AV |
2968 | ((response_t *)pkt)->signature = RESPONSE_PROCESSED; |
2969 | wmb(); | |
2970 | continue; | |
2971 | } | |
f83adb61 | 2972 | process_err: |
9a853f71 AV |
2973 | |
2974 | switch (pkt->entry_type) { | |
2975 | case STATUS_TYPE: | |
73208dfd | 2976 | qla2x00_status_entry(vha, rsp, pkt); |
9a853f71 AV |
2977 | break; |
2978 | case STATUS_CONT_TYPE: | |
2afa19a9 | 2979 | qla2x00_status_cont_entry(rsp, (sts_cont_entry_t *)pkt); |
9a853f71 | 2980 | break; |
2c3dfe3f | 2981 | case VP_RPT_ID_IOCB_TYPE: |
e315cd28 | 2982 | qla24xx_report_id_acquisition(vha, |
2c3dfe3f SJ |
2983 | (struct vp_rpt_id_entry_24xx *)pkt); |
2984 | break; | |
ac280b67 AV |
2985 | case LOGINOUT_PORT_IOCB_TYPE: |
2986 | qla24xx_logio_entry(vha, rsp->req, | |
2987 | (struct logio_entry_24xx *)pkt); | |
2988 | break; | |
f83adb61 | 2989 | case CT_IOCB_TYPE: |
9a069e19 | 2990 | qla24xx_els_ct_entry(vha, rsp->req, pkt, CT_IOCB_TYPE); |
9a069e19 | 2991 | break; |
f83adb61 | 2992 | case ELS_IOCB_TYPE: |
9a069e19 GM |
2993 | qla24xx_els_ct_entry(vha, rsp->req, pkt, ELS_IOCB_TYPE); |
2994 | break; | |
2d70c103 | 2995 | case ABTS_RECV_24XX: |
2f424b9b QT |
2996 | if (IS_QLA83XX(ha) || IS_QLA27XX(ha)) { |
2997 | /* ensure that the ATIO queue is empty */ | |
82de802a QT |
2998 | qlt_handle_abts_recv(vha, rsp, |
2999 | (response_t *)pkt); | |
2f424b9b QT |
3000 | break; |
3001 | } else { | |
2f424b9b QT |
3002 | qlt_24xx_process_atio_queue(vha, 1); |
3003 | } | |
81881861 | 3004 | /* fall through */ |
2d70c103 NB |
3005 | case ABTS_RESP_24XX: |
3006 | case CTIO_TYPE7: | |
f83adb61 | 3007 | case CTIO_CRC2: |
82de802a | 3008 | qlt_response_pkt_all_vps(vha, rsp, (response_t *)pkt); |
2d70c103 | 3009 | break; |
e84067d7 DG |
3010 | case PT_LS4_REQUEST: |
3011 | qla24xx_nvme_ls4_iocb(vha, (struct pt_ls4_request *)pkt, | |
3012 | rsp->req); | |
3013 | break; | |
726b8548 QT |
3014 | case NOTIFY_ACK_TYPE: |
3015 | if (pkt->handle == QLA_TGT_SKIP_HANDLE) | |
82de802a QT |
3016 | qlt_response_pkt_all_vps(vha, rsp, |
3017 | (response_t *)pkt); | |
726b8548 QT |
3018 | else |
3019 | qla24xxx_nack_iocb_entry(vha, rsp->req, | |
3020 | (struct nack_to_isp *)pkt); | |
3021 | break; | |
54883291 SK |
3022 | case MARKER_TYPE: |
3023 | /* Do nothing in this case, this check is to prevent it | |
3024 | * from falling into default case | |
3025 | */ | |
3026 | break; | |
4440e46d AB |
3027 | case ABORT_IOCB_TYPE: |
3028 | qla24xx_abort_iocb_entry(vha, rsp->req, | |
3029 | (struct abort_entry_24xx *)pkt); | |
3030 | break; | |
726b8548 QT |
3031 | case MBX_IOCB_TYPE: |
3032 | qla24xx_mbx_iocb_entry(vha, rsp->req, | |
3033 | (struct mbx_24xx_entry *)pkt); | |
3034 | break; | |
2853192e QT |
3035 | case VP_CTRL_IOCB_TYPE: |
3036 | qla_ctrlvp_completed(vha, rsp->req, | |
3037 | (struct vp_ctrl_entry_24xx *)pkt); | |
3038 | break; | |
9a853f71 AV |
3039 | default: |
3040 | /* Type Not Supported. */ | |
7c3df132 SK |
3041 | ql_dbg(ql_dbg_async, vha, 0x5042, |
3042 | "Received unknown response pkt type %x " | |
9a853f71 | 3043 | "entry status=%x.\n", |
7c3df132 | 3044 | pkt->entry_type, pkt->entry_status); |
9a853f71 AV |
3045 | break; |
3046 | } | |
3047 | ((response_t *)pkt)->signature = RESPONSE_PROCESSED; | |
3048 | wmb(); | |
3049 | } | |
3050 | ||
3051 | /* Adjust ring index */ | |
7ec0effd | 3052 | if (IS_P3P_TYPE(ha)) { |
a9083016 GM |
3053 | struct device_reg_82xx __iomem *reg = &ha->iobase->isp82; |
3054 | WRT_REG_DWORD(®->rsp_q_out[0], rsp->ring_index); | |
726b8548 | 3055 | } else { |
a9083016 | 3056 | WRT_REG_DWORD(rsp->rsp_q_out, rsp->ring_index); |
726b8548 | 3057 | } |
9a853f71 AV |
3058 | } |
3059 | ||
05236a05 | 3060 | static void |
e315cd28 | 3061 | qla2xxx_check_risc_status(scsi_qla_host_t *vha) |
05236a05 AV |
3062 | { |
3063 | int rval; | |
3064 | uint32_t cnt; | |
e315cd28 | 3065 | struct qla_hw_data *ha = vha->hw; |
05236a05 AV |
3066 | struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; |
3067 | ||
f73cb695 CD |
3068 | if (!IS_QLA25XX(ha) && !IS_QLA81XX(ha) && !IS_QLA83XX(ha) && |
3069 | !IS_QLA27XX(ha)) | |
05236a05 AV |
3070 | return; |
3071 | ||
3072 | rval = QLA_SUCCESS; | |
3073 | WRT_REG_DWORD(®->iobase_addr, 0x7C00); | |
3074 | RD_REG_DWORD(®->iobase_addr); | |
3075 | WRT_REG_DWORD(®->iobase_window, 0x0001); | |
3076 | for (cnt = 10000; (RD_REG_DWORD(®->iobase_window) & BIT_0) == 0 && | |
3077 | rval == QLA_SUCCESS; cnt--) { | |
3078 | if (cnt) { | |
3079 | WRT_REG_DWORD(®->iobase_window, 0x0001); | |
3080 | udelay(10); | |
3081 | } else | |
3082 | rval = QLA_FUNCTION_TIMEOUT; | |
3083 | } | |
3084 | if (rval == QLA_SUCCESS) | |
3085 | goto next_test; | |
3086 | ||
b2ec76c5 | 3087 | rval = QLA_SUCCESS; |
05236a05 AV |
3088 | WRT_REG_DWORD(®->iobase_window, 0x0003); |
3089 | for (cnt = 100; (RD_REG_DWORD(®->iobase_window) & BIT_0) == 0 && | |
3090 | rval == QLA_SUCCESS; cnt--) { | |
3091 | if (cnt) { | |
3092 | WRT_REG_DWORD(®->iobase_window, 0x0003); | |
3093 | udelay(10); | |
3094 | } else | |
3095 | rval = QLA_FUNCTION_TIMEOUT; | |
3096 | } | |
3097 | if (rval != QLA_SUCCESS) | |
3098 | goto done; | |
3099 | ||
3100 | next_test: | |
3101 | if (RD_REG_DWORD(®->iobase_c8) & BIT_3) | |
7c3df132 SK |
3102 | ql_log(ql_log_info, vha, 0x504c, |
3103 | "Additional code -- 0x55AA.\n"); | |
05236a05 AV |
3104 | |
3105 | done: | |
3106 | WRT_REG_DWORD(®->iobase_window, 0x0000); | |
3107 | RD_REG_DWORD(®->iobase_window); | |
3108 | } | |
3109 | ||
9a853f71 | 3110 | /** |
6246b8a1 | 3111 | * qla24xx_intr_handler() - Process interrupts for the ISP23xx and ISP24xx. |
9a853f71 AV |
3112 | * @irq: |
3113 | * @dev_id: SCSI driver HA context | |
9a853f71 AV |
3114 | * |
3115 | * Called by system whenever the host adapter generates an interrupt. | |
3116 | * | |
3117 | * Returns handled flag. | |
3118 | */ | |
3119 | irqreturn_t | |
7d12e780 | 3120 | qla24xx_intr_handler(int irq, void *dev_id) |
9a853f71 | 3121 | { |
e315cd28 AC |
3122 | scsi_qla_host_t *vha; |
3123 | struct qla_hw_data *ha; | |
9a853f71 AV |
3124 | struct device_reg_24xx __iomem *reg; |
3125 | int status; | |
9a853f71 AV |
3126 | unsigned long iter; |
3127 | uint32_t stat; | |
3128 | uint32_t hccr; | |
7d613ac6 | 3129 | uint16_t mb[8]; |
e315cd28 | 3130 | struct rsp_que *rsp; |
43fac4d9 | 3131 | unsigned long flags; |
1073daa4 | 3132 | bool process_atio = false; |
9a853f71 | 3133 | |
e315cd28 AC |
3134 | rsp = (struct rsp_que *) dev_id; |
3135 | if (!rsp) { | |
3256b435 CD |
3136 | ql_log(ql_log_info, NULL, 0x5059, |
3137 | "%s: NULL response queue pointer.\n", __func__); | |
9a853f71 AV |
3138 | return IRQ_NONE; |
3139 | } | |
3140 | ||
e315cd28 | 3141 | ha = rsp->hw; |
9a853f71 AV |
3142 | reg = &ha->iobase->isp24; |
3143 | status = 0; | |
3144 | ||
85880801 AV |
3145 | if (unlikely(pci_channel_offline(ha->pdev))) |
3146 | return IRQ_HANDLED; | |
3147 | ||
43fac4d9 | 3148 | spin_lock_irqsave(&ha->hardware_lock, flags); |
2afa19a9 | 3149 | vha = pci_get_drvdata(ha->pdev); |
9a853f71 AV |
3150 | for (iter = 50; iter--; ) { |
3151 | stat = RD_REG_DWORD(®->host_status); | |
c821e0d5 | 3152 | if (qla2x00_check_reg32_for_disconnect(vha, stat)) |
f3ddac19 | 3153 | break; |
9a853f71 | 3154 | if (stat & HSRX_RISC_PAUSED) { |
85880801 | 3155 | if (unlikely(pci_channel_offline(ha->pdev))) |
14e660e6 SJ |
3156 | break; |
3157 | ||
9a853f71 AV |
3158 | hccr = RD_REG_DWORD(®->hccr); |
3159 | ||
7c3df132 SK |
3160 | ql_log(ql_log_warn, vha, 0x504b, |
3161 | "RISC paused -- HCCR=%x, Dumping firmware.\n", | |
3162 | hccr); | |
05236a05 | 3163 | |
e315cd28 | 3164 | qla2xxx_check_risc_status(vha); |
05236a05 | 3165 | |
e315cd28 AC |
3166 | ha->isp_ops->fw_dump(vha, 1); |
3167 | set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); | |
9a853f71 AV |
3168 | break; |
3169 | } else if ((stat & HSRX_RISC_INT) == 0) | |
3170 | break; | |
3171 | ||
3172 | switch (stat & 0xff) { | |
fafbda9f AE |
3173 | case INTR_ROM_MB_SUCCESS: |
3174 | case INTR_ROM_MB_FAILED: | |
3175 | case INTR_MB_SUCCESS: | |
3176 | case INTR_MB_FAILED: | |
e315cd28 | 3177 | qla24xx_mbx_completion(vha, MSW(stat)); |
9a853f71 AV |
3178 | status |= MBX_INTERRUPT; |
3179 | ||
3180 | break; | |
fafbda9f | 3181 | case INTR_ASYNC_EVENT: |
9a853f71 AV |
3182 | mb[0] = MSW(stat); |
3183 | mb[1] = RD_REG_WORD(®->mailbox1); | |
3184 | mb[2] = RD_REG_WORD(®->mailbox2); | |
3185 | mb[3] = RD_REG_WORD(®->mailbox3); | |
73208dfd | 3186 | qla2x00_async_event(vha, rsp, mb); |
9a853f71 | 3187 | break; |
fafbda9f AE |
3188 | case INTR_RSP_QUE_UPDATE: |
3189 | case INTR_RSP_QUE_UPDATE_83XX: | |
2afa19a9 | 3190 | qla24xx_process_response_queue(vha, rsp); |
9a853f71 | 3191 | break; |
c9558869 | 3192 | case INTR_ATIO_QUE_UPDATE_27XX: |
1073daa4 QT |
3193 | case INTR_ATIO_QUE_UPDATE: |
3194 | process_atio = true; | |
2d70c103 | 3195 | break; |
1073daa4 QT |
3196 | case INTR_ATIO_RSP_QUE_UPDATE: |
3197 | process_atio = true; | |
2d70c103 NB |
3198 | qla24xx_process_response_queue(vha, rsp); |
3199 | break; | |
9a853f71 | 3200 | default: |
7c3df132 SK |
3201 | ql_dbg(ql_dbg_async, vha, 0x504f, |
3202 | "Unrecognized interrupt type (%d).\n", stat * 0xff); | |
9a853f71 AV |
3203 | break; |
3204 | } | |
3205 | WRT_REG_DWORD(®->hccr, HCCRX_CLR_RISC_INT); | |
3206 | RD_REG_DWORD_RELAXED(®->hccr); | |
cb860bbd GM |
3207 | if (unlikely(IS_QLA83XX(ha) && (ha->pdev->revision == 1))) |
3208 | ndelay(3500); | |
9a853f71 | 3209 | } |
36439832 | 3210 | qla2x00_handle_mbx_completion(ha, status); |
43fac4d9 | 3211 | spin_unlock_irqrestore(&ha->hardware_lock, flags); |
9a853f71 | 3212 | |
1073daa4 QT |
3213 | if (process_atio) { |
3214 | spin_lock_irqsave(&ha->tgt.atio_lock, flags); | |
3215 | qlt_24xx_process_atio_queue(vha, 0); | |
3216 | spin_unlock_irqrestore(&ha->tgt.atio_lock, flags); | |
3217 | } | |
3218 | ||
9a853f71 AV |
3219 | return IRQ_HANDLED; |
3220 | } | |
3221 | ||
a8488abe AV |
3222 | static irqreturn_t |
3223 | qla24xx_msix_rsp_q(int irq, void *dev_id) | |
3224 | { | |
e315cd28 AC |
3225 | struct qla_hw_data *ha; |
3226 | struct rsp_que *rsp; | |
a8488abe | 3227 | struct device_reg_24xx __iomem *reg; |
2afa19a9 | 3228 | struct scsi_qla_host *vha; |
0f19bc68 | 3229 | unsigned long flags; |
a8488abe | 3230 | |
e315cd28 AC |
3231 | rsp = (struct rsp_que *) dev_id; |
3232 | if (!rsp) { | |
3256b435 CD |
3233 | ql_log(ql_log_info, NULL, 0x505a, |
3234 | "%s: NULL response queue pointer.\n", __func__); | |
e315cd28 AC |
3235 | return IRQ_NONE; |
3236 | } | |
3237 | ha = rsp->hw; | |
a8488abe AV |
3238 | reg = &ha->iobase->isp24; |
3239 | ||
0f19bc68 | 3240 | spin_lock_irqsave(&ha->hardware_lock, flags); |
a8488abe | 3241 | |
a67093d4 | 3242 | vha = pci_get_drvdata(ha->pdev); |
2afa19a9 | 3243 | qla24xx_process_response_queue(vha, rsp); |
3155754a | 3244 | if (!ha->flags.disable_msix_handshake) { |
eb94114b AC |
3245 | WRT_REG_DWORD(®->hccr, HCCRX_CLR_RISC_INT); |
3246 | RD_REG_DWORD_RELAXED(®->hccr); | |
3247 | } | |
0f19bc68 | 3248 | spin_unlock_irqrestore(&ha->hardware_lock, flags); |
a8488abe AV |
3249 | |
3250 | return IRQ_HANDLED; | |
3251 | } | |
3252 | ||
3253 | static irqreturn_t | |
3254 | qla24xx_msix_default(int irq, void *dev_id) | |
3255 | { | |
e315cd28 AC |
3256 | scsi_qla_host_t *vha; |
3257 | struct qla_hw_data *ha; | |
3258 | struct rsp_que *rsp; | |
a8488abe AV |
3259 | struct device_reg_24xx __iomem *reg; |
3260 | int status; | |
a8488abe AV |
3261 | uint32_t stat; |
3262 | uint32_t hccr; | |
7d613ac6 | 3263 | uint16_t mb[8]; |
0f19bc68 | 3264 | unsigned long flags; |
1073daa4 | 3265 | bool process_atio = false; |
a8488abe | 3266 | |
e315cd28 AC |
3267 | rsp = (struct rsp_que *) dev_id; |
3268 | if (!rsp) { | |
3256b435 CD |
3269 | ql_log(ql_log_info, NULL, 0x505c, |
3270 | "%s: NULL response queue pointer.\n", __func__); | |
e315cd28 AC |
3271 | return IRQ_NONE; |
3272 | } | |
3273 | ha = rsp->hw; | |
a8488abe AV |
3274 | reg = &ha->iobase->isp24; |
3275 | status = 0; | |
3276 | ||
0f19bc68 | 3277 | spin_lock_irqsave(&ha->hardware_lock, flags); |
2afa19a9 | 3278 | vha = pci_get_drvdata(ha->pdev); |
87f27015 | 3279 | do { |
a8488abe | 3280 | stat = RD_REG_DWORD(®->host_status); |
c821e0d5 | 3281 | if (qla2x00_check_reg32_for_disconnect(vha, stat)) |
f3ddac19 | 3282 | break; |
a8488abe | 3283 | if (stat & HSRX_RISC_PAUSED) { |
85880801 | 3284 | if (unlikely(pci_channel_offline(ha->pdev))) |
14e660e6 SJ |
3285 | break; |
3286 | ||
a8488abe AV |
3287 | hccr = RD_REG_DWORD(®->hccr); |
3288 | ||
7c3df132 SK |
3289 | ql_log(ql_log_info, vha, 0x5050, |
3290 | "RISC paused -- HCCR=%x, Dumping firmware.\n", | |
3291 | hccr); | |
05236a05 | 3292 | |
e315cd28 | 3293 | qla2xxx_check_risc_status(vha); |
05236a05 | 3294 | |
e315cd28 AC |
3295 | ha->isp_ops->fw_dump(vha, 1); |
3296 | set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); | |
a8488abe AV |
3297 | break; |
3298 | } else if ((stat & HSRX_RISC_INT) == 0) | |
3299 | break; | |
3300 | ||
3301 | switch (stat & 0xff) { | |
fafbda9f AE |
3302 | case INTR_ROM_MB_SUCCESS: |
3303 | case INTR_ROM_MB_FAILED: | |
3304 | case INTR_MB_SUCCESS: | |
3305 | case INTR_MB_FAILED: | |
e315cd28 | 3306 | qla24xx_mbx_completion(vha, MSW(stat)); |
a8488abe AV |
3307 | status |= MBX_INTERRUPT; |
3308 | ||
3309 | break; | |
fafbda9f | 3310 | case INTR_ASYNC_EVENT: |
a8488abe AV |
3311 | mb[0] = MSW(stat); |
3312 | mb[1] = RD_REG_WORD(®->mailbox1); | |
3313 | mb[2] = RD_REG_WORD(®->mailbox2); | |
3314 | mb[3] = RD_REG_WORD(®->mailbox3); | |
73208dfd | 3315 | qla2x00_async_event(vha, rsp, mb); |
a8488abe | 3316 | break; |
fafbda9f AE |
3317 | case INTR_RSP_QUE_UPDATE: |
3318 | case INTR_RSP_QUE_UPDATE_83XX: | |
2afa19a9 | 3319 | qla24xx_process_response_queue(vha, rsp); |
a8488abe | 3320 | break; |
c9558869 | 3321 | case INTR_ATIO_QUE_UPDATE_27XX: |
1073daa4 QT |
3322 | case INTR_ATIO_QUE_UPDATE: |
3323 | process_atio = true; | |
2d70c103 | 3324 | break; |
1073daa4 QT |
3325 | case INTR_ATIO_RSP_QUE_UPDATE: |
3326 | process_atio = true; | |
2d70c103 NB |
3327 | qla24xx_process_response_queue(vha, rsp); |
3328 | break; | |
a8488abe | 3329 | default: |
7c3df132 SK |
3330 | ql_dbg(ql_dbg_async, vha, 0x5051, |
3331 | "Unrecognized interrupt type (%d).\n", stat & 0xff); | |
a8488abe AV |
3332 | break; |
3333 | } | |
3334 | WRT_REG_DWORD(®->hccr, HCCRX_CLR_RISC_INT); | |
87f27015 | 3335 | } while (0); |
36439832 | 3336 | qla2x00_handle_mbx_completion(ha, status); |
0f19bc68 | 3337 | spin_unlock_irqrestore(&ha->hardware_lock, flags); |
a8488abe | 3338 | |
1073daa4 QT |
3339 | if (process_atio) { |
3340 | spin_lock_irqsave(&ha->tgt.atio_lock, flags); | |
3341 | qlt_24xx_process_atio_queue(vha, 0); | |
3342 | spin_unlock_irqrestore(&ha->tgt.atio_lock, flags); | |
3343 | } | |
3344 | ||
a8488abe AV |
3345 | return IRQ_HANDLED; |
3346 | } | |
3347 | ||
d7459527 MH |
3348 | irqreturn_t |
3349 | qla2xxx_msix_rsp_q(int irq, void *dev_id) | |
3350 | { | |
3351 | struct qla_hw_data *ha; | |
3352 | struct qla_qpair *qpair; | |
3353 | struct device_reg_24xx __iomem *reg; | |
3354 | unsigned long flags; | |
3355 | ||
3356 | qpair = dev_id; | |
3357 | if (!qpair) { | |
3358 | ql_log(ql_log_info, NULL, 0x505b, | |
3359 | "%s: NULL response queue pointer.\n", __func__); | |
3360 | return IRQ_NONE; | |
3361 | } | |
3362 | ha = qpair->hw; | |
3363 | ||
3364 | /* Clear the interrupt, if enabled, for this response queue */ | |
3365 | if (unlikely(!ha->flags.disable_msix_handshake)) { | |
3366 | reg = &ha->iobase->isp24; | |
3367 | spin_lock_irqsave(&ha->hardware_lock, flags); | |
3368 | WRT_REG_DWORD(®->hccr, HCCRX_CLR_RISC_INT); | |
3369 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | |
3370 | } | |
3371 | ||
3372 | queue_work(ha->wq, &qpair->q_work); | |
3373 | ||
3374 | return IRQ_HANDLED; | |
3375 | } | |
3376 | ||
a8488abe AV |
3377 | /* Interrupt handling helpers. */ |
3378 | ||
3379 | struct qla_init_msix_entry { | |
a8488abe | 3380 | const char *name; |
476834c2 | 3381 | irq_handler_t handler; |
a8488abe AV |
3382 | }; |
3383 | ||
44a8f954 | 3384 | static const struct qla_init_msix_entry msix_entries[] = { |
e326d22a QT |
3385 | { "default", qla24xx_msix_default }, |
3386 | { "rsp_q", qla24xx_msix_rsp_q }, | |
3387 | { "atio_q", qla83xx_msix_atio_q }, | |
3388 | { "qpair_multiq", qla2xxx_msix_rsp_q }, | |
a8488abe AV |
3389 | }; |
3390 | ||
44a8f954 | 3391 | static const struct qla_init_msix_entry qla82xx_msix_entries[] = { |
a9083016 GM |
3392 | { "qla2xxx (default)", qla82xx_msix_default }, |
3393 | { "qla2xxx (rsp_q)", qla82xx_msix_rsp_q }, | |
3394 | }; | |
3395 | ||
a8488abe | 3396 | static int |
73208dfd | 3397 | qla24xx_enable_msix(struct qla_hw_data *ha, struct rsp_que *rsp) |
a8488abe AV |
3398 | { |
3399 | int i, ret; | |
a8488abe | 3400 | struct qla_msix_entry *qentry; |
7c3df132 | 3401 | scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); |
67f2db87 | 3402 | int min_vecs = QLA_BASE_VECTORS; |
17e5fc58 CH |
3403 | struct irq_affinity desc = { |
3404 | .pre_vectors = QLA_BASE_VECTORS, | |
3405 | }; | |
3406 | ||
c9558869 HM |
3407 | if (QLA_TGT_MODE_ENABLED() && (ql2xenablemsix != 0) && |
3408 | IS_ATIO_MSIX_CAPABLE(ha)) { | |
17e5fc58 | 3409 | desc.pre_vectors++; |
67f2db87 MH |
3410 | min_vecs++; |
3411 | } | |
17e5fc58 | 3412 | |
09620eeb QT |
3413 | if (USER_CTRL_IRQ(ha)) { |
3414 | /* user wants to control IRQ setting for target mode */ | |
3415 | ret = pci_alloc_irq_vectors(ha->pdev, min_vecs, | |
3416 | ha->msix_count, PCI_IRQ_MSIX); | |
3417 | } else | |
3418 | ret = pci_alloc_irq_vectors_affinity(ha->pdev, min_vecs, | |
3419 | ha->msix_count, PCI_IRQ_MSIX | PCI_IRQ_AFFINITY, | |
3420 | &desc); | |
73208dfd | 3421 | |
84e32a06 AG |
3422 | if (ret < 0) { |
3423 | ql_log(ql_log_fatal, vha, 0x00c7, | |
3424 | "MSI-X: Failed to enable support, " | |
3425 | "giving up -- %d/%d.\n", | |
3426 | ha->msix_count, ret); | |
3427 | goto msix_out; | |
3428 | } else if (ret < ha->msix_count) { | |
7c3df132 SK |
3429 | ql_log(ql_log_warn, vha, 0x00c6, |
3430 | "MSI-X: Failed to enable support " | |
d7459527 MH |
3431 | "with %d vectors, using %d vectors.\n", |
3432 | ha->msix_count, ret); | |
cb43285f | 3433 | ha->msix_count = ret; |
d7459527 | 3434 | /* Recalculate queue values */ |
c38d1baf | 3435 | if (ha->mqiobase && (ql2xmqsupport || ql2xnvmeenable)) { |
d7459527 MH |
3436 | ha->max_req_queues = ha->msix_count - 1; |
3437 | ||
3438 | /* ATIOQ needs 1 vector. That's 1 less QPair */ | |
3439 | if (QLA_TGT_MODE_ENABLED()) | |
3440 | ha->max_req_queues--; | |
3441 | ||
3442 | ha->max_rsp_queues = ha->max_req_queues; | |
3443 | ||
3444 | ha->max_qpairs = ha->max_req_queues - 1; | |
3445 | ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0190, | |
3446 | "Adjusted Max no of queues pairs: %d.\n", ha->max_qpairs); | |
3447 | } | |
73208dfd | 3448 | } |
6396bb22 KC |
3449 | ha->msix_entries = kcalloc(ha->msix_count, |
3450 | sizeof(struct qla_msix_entry), | |
3451 | GFP_KERNEL); | |
73208dfd | 3452 | if (!ha->msix_entries) { |
7c3df132 SK |
3453 | ql_log(ql_log_fatal, vha, 0x00c8, |
3454 | "Failed to allocate memory for ha->msix_entries.\n"); | |
73208dfd | 3455 | ret = -ENOMEM; |
a8488abe AV |
3456 | goto msix_out; |
3457 | } | |
3458 | ha->flags.msix_enabled = 1; | |
3459 | ||
73208dfd AC |
3460 | for (i = 0; i < ha->msix_count; i++) { |
3461 | qentry = &ha->msix_entries[i]; | |
4fa18345 MH |
3462 | qentry->vector = pci_irq_vector(ha->pdev, i); |
3463 | qentry->entry = i; | |
a8488abe | 3464 | qentry->have_irq = 0; |
d7459527 | 3465 | qentry->in_use = 0; |
4fa18345 | 3466 | qentry->handle = NULL; |
a8488abe AV |
3467 | } |
3468 | ||
2afa19a9 | 3469 | /* Enable MSI-X vectors for the base queue */ |
17e5fc58 | 3470 | for (i = 0; i < QLA_BASE_VECTORS; i++) { |
2afa19a9 | 3471 | qentry = &ha->msix_entries[i]; |
4fa18345 | 3472 | qentry->handle = rsp; |
ef8d1d51 | 3473 | rsp->msix = qentry; |
d7459527 | 3474 | scnprintf(qentry->name, sizeof(qentry->name), |
e326d22a | 3475 | "qla2xxx%lu_%s", vha->host_no, msix_entries[i].name); |
f324777e | 3476 | if (IS_P3P_TYPE(ha)) |
a9083016 GM |
3477 | ret = request_irq(qentry->vector, |
3478 | qla82xx_msix_entries[i].handler, | |
3479 | 0, qla82xx_msix_entries[i].name, rsp); | |
f324777e | 3480 | else |
a9083016 GM |
3481 | ret = request_irq(qentry->vector, |
3482 | msix_entries[i].handler, | |
e326d22a | 3483 | 0, qentry->name, rsp); |
f324777e CD |
3484 | if (ret) |
3485 | goto msix_register_fail; | |
3486 | qentry->have_irq = 1; | |
093df737 | 3487 | qentry->in_use = 1; |
f324777e CD |
3488 | } |
3489 | ||
3490 | /* | |
3491 | * If target mode is enable, also request the vector for the ATIO | |
3492 | * queue. | |
3493 | */ | |
c9558869 HM |
3494 | if (QLA_TGT_MODE_ENABLED() && (ql2xenablemsix != 0) && |
3495 | IS_ATIO_MSIX_CAPABLE(ha)) { | |
093df737 | 3496 | qentry = &ha->msix_entries[QLA_ATIO_VECTOR]; |
ef8d1d51 | 3497 | rsp->msix = qentry; |
d7459527 MH |
3498 | qentry->handle = rsp; |
3499 | scnprintf(qentry->name, sizeof(qentry->name), | |
e326d22a QT |
3500 | "qla2xxx%lu_%s", vha->host_no, |
3501 | msix_entries[QLA_ATIO_VECTOR].name); | |
093df737 | 3502 | qentry->in_use = 1; |
f324777e | 3503 | ret = request_irq(qentry->vector, |
093df737 | 3504 | msix_entries[QLA_ATIO_VECTOR].handler, |
e326d22a | 3505 | 0, qentry->name, rsp); |
2afa19a9 | 3506 | qentry->have_irq = 1; |
73208dfd | 3507 | } |
73208dfd | 3508 | |
f324777e CD |
3509 | msix_register_fail: |
3510 | if (ret) { | |
3511 | ql_log(ql_log_fatal, vha, 0x00cb, | |
3512 | "MSI-X: unable to register handler -- %x/%d.\n", | |
3513 | qentry->vector, ret); | |
4fa18345 | 3514 | qla2x00_free_irqs(vha); |
f324777e CD |
3515 | ha->mqenable = 0; |
3516 | goto msix_out; | |
3517 | } | |
3518 | ||
73208dfd | 3519 | /* Enable MSI-X vector for response queue update for queue 0 */ |
b7edfa23 | 3520 | if (IS_QLA83XX(ha) || IS_QLA27XX(ha)) { |
6246b8a1 | 3521 | if (ha->msixbase && ha->mqiobase && |
d7459527 MH |
3522 | (ha->max_rsp_queues > 1 || ha->max_req_queues > 1 || |
3523 | ql2xmqsupport)) | |
6246b8a1 GM |
3524 | ha->mqenable = 1; |
3525 | } else | |
d7459527 MH |
3526 | if (ha->mqiobase && |
3527 | (ha->max_rsp_queues > 1 || ha->max_req_queues > 1 || | |
3528 | ql2xmqsupport)) | |
6246b8a1 | 3529 | ha->mqenable = 1; |
7c3df132 SK |
3530 | ql_dbg(ql_dbg_multiq, vha, 0xc005, |
3531 | "mqiobase=%p, max_rsp_queues=%d, max_req_queues=%d.\n", | |
3532 | ha->mqiobase, ha->max_rsp_queues, ha->max_req_queues); | |
3533 | ql_dbg(ql_dbg_init, vha, 0x0055, | |
3534 | "mqiobase=%p, max_rsp_queues=%d, max_req_queues=%d.\n", | |
3535 | ha->mqiobase, ha->max_rsp_queues, ha->max_req_queues); | |
73208dfd | 3536 | |
a8488abe AV |
3537 | msix_out: |
3538 | return ret; | |
3539 | } | |
3540 | ||
3541 | int | |
73208dfd | 3542 | qla2x00_request_irqs(struct qla_hw_data *ha, struct rsp_que *rsp) |
a8488abe | 3543 | { |
7fa3e239 | 3544 | int ret = QLA_FUNCTION_FAILED; |
f73cb695 | 3545 | device_reg_t *reg = ha->iobase; |
7c3df132 | 3546 | scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); |
a8488abe AV |
3547 | |
3548 | /* If possible, enable MSI-X. */ | |
e7240af5 HM |
3549 | if (ql2xenablemsix == 0 || (!IS_QLA2432(ha) && !IS_QLA2532(ha) && |
3550 | !IS_QLA8432(ha) && !IS_CNA_CAPABLE(ha) && !IS_QLA2031(ha) && | |
3551 | !IS_QLAFX00(ha) && !IS_QLA27XX(ha))) | |
6377a7ae BH |
3552 | goto skip_msi; |
3553 | ||
e7240af5 HM |
3554 | if (ql2xenablemsix == 2) |
3555 | goto skip_msix; | |
3556 | ||
6377a7ae BH |
3557 | if (ha->pdev->subsystem_vendor == PCI_VENDOR_ID_HP && |
3558 | (ha->pdev->subsystem_device == 0x7040 || | |
3559 | ha->pdev->subsystem_device == 0x7041 || | |
3560 | ha->pdev->subsystem_device == 0x1705)) { | |
7c3df132 SK |
3561 | ql_log(ql_log_warn, vha, 0x0034, |
3562 | "MSI-X: Unsupported ISP 2432 SSVID/SSDID (0x%X,0x%X).\n", | |
6377a7ae | 3563 | ha->pdev->subsystem_vendor, |
7c3df132 | 3564 | ha->pdev->subsystem_device); |
6377a7ae BH |
3565 | goto skip_msi; |
3566 | } | |
a8488abe | 3567 | |
42cd4f5d | 3568 | if (IS_QLA2432(ha) && (ha->pdev->revision < QLA_MSIX_CHIP_REV_24XX)) { |
7c3df132 SK |
3569 | ql_log(ql_log_warn, vha, 0x0035, |
3570 | "MSI-X; Unsupported ISP2432 (0x%X, 0x%X).\n", | |
42cd4f5d | 3571 | ha->pdev->revision, QLA_MSIX_CHIP_REV_24XX); |
a8488abe AV |
3572 | goto skip_msix; |
3573 | } | |
3574 | ||
73208dfd | 3575 | ret = qla24xx_enable_msix(ha, rsp); |
a8488abe | 3576 | if (!ret) { |
7c3df132 SK |
3577 | ql_dbg(ql_dbg_init, vha, 0x0036, |
3578 | "MSI-X: Enabled (0x%X, 0x%X).\n", | |
3579 | ha->chip_revision, ha->fw_attributes); | |
963b0fdd | 3580 | goto clear_risc_ints; |
a8488abe | 3581 | } |
7fa3e239 | 3582 | |
a8488abe | 3583 | skip_msix: |
cbedb601 | 3584 | |
7fa3e239 SC |
3585 | ql_log(ql_log_info, vha, 0x0037, |
3586 | "Falling back-to MSI mode -%d.\n", ret); | |
3587 | ||
3a03eb79 | 3588 | if (!IS_QLA24XX(ha) && !IS_QLA2532(ha) && !IS_QLA8432(ha) && |
f73cb695 CD |
3589 | !IS_QLA8001(ha) && !IS_P3P_TYPE(ha) && !IS_QLAFX00(ha) && |
3590 | !IS_QLA27XX(ha)) | |
cbedb601 AV |
3591 | goto skip_msi; |
3592 | ||
4fa18345 | 3593 | ret = pci_alloc_irq_vectors(ha->pdev, 1, 1, PCI_IRQ_MSI); |
cbedb601 | 3594 | if (!ret) { |
7c3df132 SK |
3595 | ql_dbg(ql_dbg_init, vha, 0x0038, |
3596 | "MSI: Enabled.\n"); | |
cbedb601 | 3597 | ha->flags.msi_enabled = 1; |
a9083016 | 3598 | } else |
7c3df132 | 3599 | ql_log(ql_log_warn, vha, 0x0039, |
7fa3e239 SC |
3600 | "Falling back-to INTa mode -- %d.\n", ret); |
3601 | skip_msi: | |
a033b655 GM |
3602 | |
3603 | /* Skip INTx on ISP82xx. */ | |
3604 | if (!ha->flags.msi_enabled && IS_QLA82XX(ha)) | |
3605 | return QLA_FUNCTION_FAILED; | |
3606 | ||
fd34f556 | 3607 | ret = request_irq(ha->pdev->irq, ha->isp_ops->intr_handler, |
7992abfc MH |
3608 | ha->flags.msi_enabled ? 0 : IRQF_SHARED, |
3609 | QLA2XXX_DRIVER_NAME, rsp); | |
963b0fdd | 3610 | if (ret) { |
7c3df132 | 3611 | ql_log(ql_log_warn, vha, 0x003a, |
a8488abe AV |
3612 | "Failed to reserve interrupt %d already in use.\n", |
3613 | ha->pdev->irq); | |
963b0fdd | 3614 | goto fail; |
8ae6d9c7 | 3615 | } else if (!ha->flags.msi_enabled) { |
68d91cbd SK |
3616 | ql_dbg(ql_dbg_init, vha, 0x0125, |
3617 | "INTa mode: Enabled.\n"); | |
8ae6d9c7 GM |
3618 | ha->flags.mr_intr_valid = 1; |
3619 | } | |
7992abfc | 3620 | |
963b0fdd | 3621 | clear_risc_ints: |
4bb2efc4 JC |
3622 | if (IS_FWI2_CAPABLE(ha) || IS_QLAFX00(ha)) |
3623 | goto fail; | |
963b0fdd | 3624 | |
c6952483 | 3625 | spin_lock_irq(&ha->hardware_lock); |
4bb2efc4 | 3626 | WRT_REG_WORD(®->isp.semaphore, 0); |
c6952483 | 3627 | spin_unlock_irq(&ha->hardware_lock); |
a8488abe | 3628 | |
963b0fdd | 3629 | fail: |
a8488abe AV |
3630 | return ret; |
3631 | } | |
3632 | ||
3633 | void | |
e315cd28 | 3634 | qla2x00_free_irqs(scsi_qla_host_t *vha) |
a8488abe | 3635 | { |
e315cd28 | 3636 | struct qla_hw_data *ha = vha->hw; |
9a347ff4 | 3637 | struct rsp_que *rsp; |
4fa18345 MH |
3638 | struct qla_msix_entry *qentry; |
3639 | int i; | |
9a347ff4 CD |
3640 | |
3641 | /* | |
3642 | * We need to check that ha->rsp_q_map is valid in case we are called | |
3643 | * from a probe failure context. | |
3644 | */ | |
3645 | if (!ha->rsp_q_map || !ha->rsp_q_map[0]) | |
27873de9 | 3646 | goto free_irqs; |
9a347ff4 | 3647 | rsp = ha->rsp_q_map[0]; |
a8488abe | 3648 | |
4fa18345 MH |
3649 | if (ha->flags.msix_enabled) { |
3650 | for (i = 0; i < ha->msix_count; i++) { | |
3651 | qentry = &ha->msix_entries[i]; | |
3652 | if (qentry->have_irq) { | |
3653 | irq_set_affinity_notifier(qentry->vector, NULL); | |
3654 | free_irq(pci_irq_vector(ha->pdev, i), qentry->handle); | |
3655 | } | |
3656 | } | |
3657 | kfree(ha->msix_entries); | |
3658 | ha->msix_entries = NULL; | |
3659 | ha->flags.msix_enabled = 0; | |
3660 | ql_dbg(ql_dbg_init, vha, 0x0042, | |
3661 | "Disabled MSI-X.\n"); | |
3662 | } else { | |
3663 | free_irq(pci_irq_vector(ha->pdev, 0), rsp); | |
3664 | } | |
e315cd28 | 3665 | |
27873de9 | 3666 | free_irqs: |
4fa18345 | 3667 | pci_free_irq_vectors(ha->pdev); |
a8488abe | 3668 | } |
73208dfd | 3669 | |
d7459527 MH |
3670 | int qla25xx_request_irq(struct qla_hw_data *ha, struct qla_qpair *qpair, |
3671 | struct qla_msix_entry *msix, int vector_type) | |
73208dfd | 3672 | { |
44a8f954 | 3673 | const struct qla_init_msix_entry *intr = &msix_entries[vector_type]; |
7c3df132 | 3674 | scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); |
73208dfd AC |
3675 | int ret; |
3676 | ||
d7459527 MH |
3677 | scnprintf(msix->name, sizeof(msix->name), |
3678 | "qla2xxx%lu_qpair%d", vha->host_no, qpair->id); | |
3679 | ret = request_irq(msix->vector, intr->handler, 0, msix->name, qpair); | |
73208dfd | 3680 | if (ret) { |
7c3df132 SK |
3681 | ql_log(ql_log_fatal, vha, 0x00e6, |
3682 | "MSI-X: Unable to register handler -- %x/%d.\n", | |
3683 | msix->vector, ret); | |
73208dfd AC |
3684 | return ret; |
3685 | } | |
3686 | msix->have_irq = 1; | |
d7459527 | 3687 | msix->handle = qpair; |
73208dfd AC |
3688 | return ret; |
3689 | } |