Commit | Line | Data |
---|---|---|
1da177e4 | 1 | /* |
fa90c54f | 2 | * QLogic Fibre Channel HBA Driver |
01e58d8e | 3 | * Copyright (c) 2003-2008 QLogic Corporation |
1da177e4 | 4 | * |
fa90c54f | 5 | * See LICENSE.qla2xxx for copyright and licensing details. |
1da177e4 LT |
6 | */ |
7 | #include "qla_def.h" | |
73208dfd | 8 | #include "qla_gbl.h" |
1da177e4 LT |
9 | |
10 | #include <linux/delay.h> | |
0107109e | 11 | #include <linux/vmalloc.h> |
1da177e4 LT |
12 | |
13 | #include "qla_devtbl.h" | |
14 | ||
4e08df3f DM |
15 | #ifdef CONFIG_SPARC |
16 | #include <asm/prom.h> | |
4e08df3f DM |
17 | #endif |
18 | ||
1da177e4 LT |
19 | /* |
20 | * QLogic ISP2x00 Hardware Support Function Prototypes. | |
21 | */ | |
1da177e4 | 22 | static int qla2x00_isp_firmware(scsi_qla_host_t *); |
1da177e4 LT |
23 | static void qla2x00_resize_request_q(scsi_qla_host_t *); |
24 | static int qla2x00_setup_chip(scsi_qla_host_t *); | |
1da177e4 LT |
25 | static int qla2x00_init_rings(scsi_qla_host_t *); |
26 | static int qla2x00_fw_ready(scsi_qla_host_t *); | |
27 | static int qla2x00_configure_hba(scsi_qla_host_t *); | |
1da177e4 LT |
28 | static int qla2x00_configure_loop(scsi_qla_host_t *); |
29 | static int qla2x00_configure_local_loop(scsi_qla_host_t *); | |
1da177e4 LT |
30 | static int qla2x00_configure_fabric(scsi_qla_host_t *); |
31 | static int qla2x00_find_all_fabric_devs(scsi_qla_host_t *, struct list_head *); | |
32 | static int qla2x00_device_resync(scsi_qla_host_t *); | |
33 | static int qla2x00_fabric_dev_login(scsi_qla_host_t *, fc_port_t *, | |
34 | uint16_t *); | |
1da177e4 LT |
35 | |
36 | static int qla2x00_restart_isp(scsi_qla_host_t *); | |
1da177e4 | 37 | |
e315cd28 | 38 | static int qla2x00_find_new_loop_id(scsi_qla_host_t *, fc_port_t *); |
413975a0 | 39 | |
4d4df193 HK |
40 | static struct qla_chip_state_84xx *qla84xx_get_chip(struct scsi_qla_host *); |
41 | static int qla84xx_init_chip(scsi_qla_host_t *); | |
73208dfd | 42 | static int qla25xx_init_queues(struct qla_hw_data *); |
4d4df193 | 43 | |
1da177e4 LT |
44 | /****************************************************************************/ |
45 | /* QLogic ISP2x00 Hardware Support Functions. */ | |
46 | /****************************************************************************/ | |
47 | ||
48 | /* | |
49 | * qla2x00_initialize_adapter | |
50 | * Initialize board. | |
51 | * | |
52 | * Input: | |
53 | * ha = adapter block pointer. | |
54 | * | |
55 | * Returns: | |
56 | * 0 = success | |
57 | */ | |
58 | int | |
e315cd28 | 59 | qla2x00_initialize_adapter(scsi_qla_host_t *vha) |
1da177e4 LT |
60 | { |
61 | int rval; | |
e315cd28 | 62 | struct qla_hw_data *ha = vha->hw; |
73208dfd | 63 | struct req_que *req = ha->req_q_map[0]; |
1da177e4 | 64 | /* Clear adapter flags. */ |
e315cd28 AC |
65 | vha->flags.online = 0; |
66 | vha->flags.reset_active = 0; | |
67 | atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME); | |
68 | atomic_set(&vha->loop_state, LOOP_DOWN); | |
69 | vha->device_flags = DFLG_NO_CABLE; | |
70 | vha->dpc_flags = 0; | |
71 | vha->flags.management_server_logged_in = 0; | |
72 | vha->marker_needed = 0; | |
1da177e4 LT |
73 | ha->mbx_flags = 0; |
74 | ha->isp_abort_cnt = 0; | |
75 | ha->beacon_blink_led = 0; | |
e315cd28 | 76 | set_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags); |
1da177e4 | 77 | |
73208dfd AC |
78 | set_bit(0, ha->req_qid_map); |
79 | set_bit(0, ha->rsp_qid_map); | |
80 | ||
0107109e | 81 | qla_printk(KERN_INFO, ha, "Configuring PCI space...\n"); |
e315cd28 | 82 | rval = ha->isp_ops->pci_config(vha); |
1da177e4 | 83 | if (rval) { |
7c98a046 | 84 | DEBUG2(printk("scsi(%ld): Unable to configure PCI space.\n", |
e315cd28 | 85 | vha->host_no)); |
1da177e4 LT |
86 | return (rval); |
87 | } | |
88 | ||
e315cd28 | 89 | ha->isp_ops->reset_chip(vha); |
1da177e4 | 90 | |
e315cd28 | 91 | rval = qla2xxx_get_flash_info(vha); |
c00d8994 AV |
92 | if (rval) { |
93 | DEBUG2(printk("scsi(%ld): Unable to validate FLASH data.\n", | |
e315cd28 | 94 | vha->host_no)); |
c00d8994 AV |
95 | return (rval); |
96 | } | |
97 | ||
73208dfd | 98 | ha->isp_ops->get_flash_version(vha, req->ring); |
30c47662 | 99 | |
1da177e4 | 100 | qla_printk(KERN_INFO, ha, "Configure NVRAM parameters...\n"); |
0107109e | 101 | |
e315cd28 | 102 | ha->isp_ops->nvram_config(vha); |
1da177e4 | 103 | |
d4c760c2 AV |
104 | if (ha->flags.disable_serdes) { |
105 | /* Mask HBA via NVRAM settings? */ | |
106 | qla_printk(KERN_INFO, ha, "Masking HBA WWPN " | |
107 | "%02x%02x%02x%02x%02x%02x%02x%02x (via NVRAM).\n", | |
e315cd28 AC |
108 | vha->port_name[0], vha->port_name[1], |
109 | vha->port_name[2], vha->port_name[3], | |
110 | vha->port_name[4], vha->port_name[5], | |
111 | vha->port_name[6], vha->port_name[7]); | |
d4c760c2 AV |
112 | return QLA_FUNCTION_FAILED; |
113 | } | |
114 | ||
1da177e4 LT |
115 | qla_printk(KERN_INFO, ha, "Verifying loaded RISC code...\n"); |
116 | ||
e315cd28 AC |
117 | if (qla2x00_isp_firmware(vha) != QLA_SUCCESS) { |
118 | rval = ha->isp_ops->chip_diag(vha); | |
d19044c3 AV |
119 | if (rval) |
120 | return (rval); | |
e315cd28 | 121 | rval = qla2x00_setup_chip(vha); |
d19044c3 AV |
122 | if (rval) |
123 | return (rval); | |
1da177e4 | 124 | } |
4d4df193 | 125 | if (IS_QLA84XX(ha)) { |
e315cd28 | 126 | ha->cs84xx = qla84xx_get_chip(vha); |
4d4df193 HK |
127 | if (!ha->cs84xx) { |
128 | qla_printk(KERN_ERR, ha, | |
129 | "Unable to configure ISP84XX.\n"); | |
130 | return QLA_FUNCTION_FAILED; | |
131 | } | |
132 | } | |
e315cd28 | 133 | rval = qla2x00_init_rings(vha); |
1da177e4 LT |
134 | |
135 | return (rval); | |
136 | } | |
137 | ||
138 | /** | |
abbd8870 | 139 | * qla2100_pci_config() - Setup ISP21xx PCI configuration registers. |
1da177e4 LT |
140 | * @ha: HA context |
141 | * | |
142 | * Returns 0 on success. | |
143 | */ | |
abbd8870 | 144 | int |
e315cd28 | 145 | qla2100_pci_config(scsi_qla_host_t *vha) |
1da177e4 | 146 | { |
a157b101 | 147 | uint16_t w; |
abbd8870 | 148 | unsigned long flags; |
e315cd28 | 149 | struct qla_hw_data *ha = vha->hw; |
3d71644c | 150 | struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; |
1da177e4 | 151 | |
1da177e4 | 152 | pci_set_master(ha->pdev); |
af6177d8 | 153 | pci_try_set_mwi(ha->pdev); |
1da177e4 | 154 | |
1da177e4 | 155 | pci_read_config_word(ha->pdev, PCI_COMMAND, &w); |
a157b101 | 156 | w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); |
abbd8870 AV |
157 | pci_write_config_word(ha->pdev, PCI_COMMAND, w); |
158 | ||
737faece | 159 | pci_disable_rom(ha->pdev); |
1da177e4 LT |
160 | |
161 | /* Get PCI bus information. */ | |
162 | spin_lock_irqsave(&ha->hardware_lock, flags); | |
3d71644c | 163 | ha->pci_attr = RD_REG_WORD(®->ctrl_status); |
1da177e4 LT |
164 | spin_unlock_irqrestore(&ha->hardware_lock, flags); |
165 | ||
abbd8870 AV |
166 | return QLA_SUCCESS; |
167 | } | |
1da177e4 | 168 | |
abbd8870 AV |
169 | /** |
170 | * qla2300_pci_config() - Setup ISP23xx PCI configuration registers. | |
171 | * @ha: HA context | |
172 | * | |
173 | * Returns 0 on success. | |
174 | */ | |
175 | int | |
e315cd28 | 176 | qla2300_pci_config(scsi_qla_host_t *vha) |
abbd8870 | 177 | { |
a157b101 | 178 | uint16_t w; |
abbd8870 AV |
179 | unsigned long flags = 0; |
180 | uint32_t cnt; | |
e315cd28 | 181 | struct qla_hw_data *ha = vha->hw; |
3d71644c | 182 | struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; |
1da177e4 | 183 | |
abbd8870 | 184 | pci_set_master(ha->pdev); |
af6177d8 | 185 | pci_try_set_mwi(ha->pdev); |
1da177e4 | 186 | |
abbd8870 | 187 | pci_read_config_word(ha->pdev, PCI_COMMAND, &w); |
a157b101 | 188 | w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); |
1da177e4 | 189 | |
abbd8870 AV |
190 | if (IS_QLA2322(ha) || IS_QLA6322(ha)) |
191 | w &= ~PCI_COMMAND_INTX_DISABLE; | |
a157b101 | 192 | pci_write_config_word(ha->pdev, PCI_COMMAND, w); |
1da177e4 | 193 | |
abbd8870 AV |
194 | /* |
195 | * If this is a 2300 card and not 2312, reset the | |
196 | * COMMAND_INVALIDATE due to a bug in the 2300. Unfortunately, | |
197 | * the 2310 also reports itself as a 2300 so we need to get the | |
198 | * fb revision level -- a 6 indicates it really is a 2300 and | |
199 | * not a 2310. | |
200 | */ | |
201 | if (IS_QLA2300(ha)) { | |
202 | spin_lock_irqsave(&ha->hardware_lock, flags); | |
1da177e4 | 203 | |
abbd8870 | 204 | /* Pause RISC. */ |
3d71644c | 205 | WRT_REG_WORD(®->hccr, HCCR_PAUSE_RISC); |
abbd8870 | 206 | for (cnt = 0; cnt < 30000; cnt++) { |
3d71644c | 207 | if ((RD_REG_WORD(®->hccr) & HCCR_RISC_PAUSE) != 0) |
abbd8870 | 208 | break; |
1da177e4 | 209 | |
abbd8870 AV |
210 | udelay(10); |
211 | } | |
1da177e4 | 212 | |
abbd8870 | 213 | /* Select FPM registers. */ |
3d71644c AV |
214 | WRT_REG_WORD(®->ctrl_status, 0x20); |
215 | RD_REG_WORD(®->ctrl_status); | |
abbd8870 AV |
216 | |
217 | /* Get the fb rev level */ | |
3d71644c | 218 | ha->fb_rev = RD_FB_CMD_REG(ha, reg); |
abbd8870 AV |
219 | |
220 | if (ha->fb_rev == FPM_2300) | |
a157b101 | 221 | pci_clear_mwi(ha->pdev); |
abbd8870 AV |
222 | |
223 | /* Deselect FPM registers. */ | |
3d71644c AV |
224 | WRT_REG_WORD(®->ctrl_status, 0x0); |
225 | RD_REG_WORD(®->ctrl_status); | |
abbd8870 AV |
226 | |
227 | /* Release RISC module. */ | |
3d71644c | 228 | WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); |
abbd8870 | 229 | for (cnt = 0; cnt < 30000; cnt++) { |
3d71644c | 230 | if ((RD_REG_WORD(®->hccr) & HCCR_RISC_PAUSE) == 0) |
abbd8870 AV |
231 | break; |
232 | ||
233 | udelay(10); | |
1da177e4 | 234 | } |
1da177e4 | 235 | |
abbd8870 AV |
236 | spin_unlock_irqrestore(&ha->hardware_lock, flags); |
237 | } | |
1da177e4 | 238 | |
abbd8870 AV |
239 | pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80); |
240 | ||
737faece | 241 | pci_disable_rom(ha->pdev); |
1da177e4 | 242 | |
abbd8870 AV |
243 | /* Get PCI bus information. */ |
244 | spin_lock_irqsave(&ha->hardware_lock, flags); | |
3d71644c | 245 | ha->pci_attr = RD_REG_WORD(®->ctrl_status); |
abbd8870 AV |
246 | spin_unlock_irqrestore(&ha->hardware_lock, flags); |
247 | ||
248 | return QLA_SUCCESS; | |
1da177e4 LT |
249 | } |
250 | ||
0107109e AV |
251 | /** |
252 | * qla24xx_pci_config() - Setup ISP24xx PCI configuration registers. | |
253 | * @ha: HA context | |
254 | * | |
255 | * Returns 0 on success. | |
256 | */ | |
257 | int | |
e315cd28 | 258 | qla24xx_pci_config(scsi_qla_host_t *vha) |
0107109e | 259 | { |
a157b101 | 260 | uint16_t w; |
0107109e | 261 | unsigned long flags = 0; |
e315cd28 | 262 | struct qla_hw_data *ha = vha->hw; |
0107109e | 263 | struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; |
0107109e AV |
264 | |
265 | pci_set_master(ha->pdev); | |
af6177d8 | 266 | pci_try_set_mwi(ha->pdev); |
0107109e AV |
267 | |
268 | pci_read_config_word(ha->pdev, PCI_COMMAND, &w); | |
a157b101 | 269 | w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); |
0107109e AV |
270 | w &= ~PCI_COMMAND_INTX_DISABLE; |
271 | pci_write_config_word(ha->pdev, PCI_COMMAND, w); | |
272 | ||
273 | pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80); | |
274 | ||
275 | /* PCI-X -- adjust Maximum Memory Read Byte Count (2048). */ | |
f85ec187 AV |
276 | if (pci_find_capability(ha->pdev, PCI_CAP_ID_PCIX)) |
277 | pcix_set_mmrbc(ha->pdev, 2048); | |
0107109e AV |
278 | |
279 | /* PCIe -- adjust Maximum Read Request Size (2048). */ | |
f85ec187 AV |
280 | if (pci_find_capability(ha->pdev, PCI_CAP_ID_EXP)) |
281 | pcie_set_readrq(ha->pdev, 2048); | |
0107109e | 282 | |
737faece | 283 | pci_disable_rom(ha->pdev); |
0107109e | 284 | |
44c10138 | 285 | ha->chip_revision = ha->pdev->revision; |
a8488abe | 286 | |
0107109e AV |
287 | /* Get PCI bus information. */ |
288 | spin_lock_irqsave(&ha->hardware_lock, flags); | |
289 | ha->pci_attr = RD_REG_DWORD(®->ctrl_status); | |
290 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | |
291 | ||
292 | return QLA_SUCCESS; | |
293 | } | |
294 | ||
c3a2f0df AV |
295 | /** |
296 | * qla25xx_pci_config() - Setup ISP25xx PCI configuration registers. | |
297 | * @ha: HA context | |
298 | * | |
299 | * Returns 0 on success. | |
300 | */ | |
301 | int | |
e315cd28 | 302 | qla25xx_pci_config(scsi_qla_host_t *vha) |
c3a2f0df AV |
303 | { |
304 | uint16_t w; | |
e315cd28 | 305 | struct qla_hw_data *ha = vha->hw; |
c3a2f0df AV |
306 | |
307 | pci_set_master(ha->pdev); | |
308 | pci_try_set_mwi(ha->pdev); | |
309 | ||
310 | pci_read_config_word(ha->pdev, PCI_COMMAND, &w); | |
311 | w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR); | |
312 | w &= ~PCI_COMMAND_INTX_DISABLE; | |
313 | pci_write_config_word(ha->pdev, PCI_COMMAND, w); | |
314 | ||
315 | /* PCIe -- adjust Maximum Read Request Size (2048). */ | |
316 | if (pci_find_capability(ha->pdev, PCI_CAP_ID_EXP)) | |
317 | pcie_set_readrq(ha->pdev, 2048); | |
318 | ||
737faece | 319 | pci_disable_rom(ha->pdev); |
c3a2f0df AV |
320 | |
321 | ha->chip_revision = ha->pdev->revision; | |
322 | ||
323 | return QLA_SUCCESS; | |
324 | } | |
325 | ||
1da177e4 LT |
326 | /** |
327 | * qla2x00_isp_firmware() - Choose firmware image. | |
328 | * @ha: HA context | |
329 | * | |
330 | * Returns 0 on success. | |
331 | */ | |
332 | static int | |
e315cd28 | 333 | qla2x00_isp_firmware(scsi_qla_host_t *vha) |
1da177e4 LT |
334 | { |
335 | int rval; | |
42e421b1 AV |
336 | uint16_t loop_id, topo, sw_cap; |
337 | uint8_t domain, area, al_pa; | |
e315cd28 | 338 | struct qla_hw_data *ha = vha->hw; |
1da177e4 LT |
339 | |
340 | /* Assume loading risc code */ | |
fa2a1ce5 | 341 | rval = QLA_FUNCTION_FAILED; |
1da177e4 LT |
342 | |
343 | if (ha->flags.disable_risc_code_load) { | |
344 | DEBUG2(printk("scsi(%ld): RISC CODE NOT loaded\n", | |
e315cd28 | 345 | vha->host_no)); |
1da177e4 LT |
346 | qla_printk(KERN_INFO, ha, "RISC CODE NOT loaded\n"); |
347 | ||
348 | /* Verify checksum of loaded RISC code. */ | |
e315cd28 | 349 | rval = qla2x00_verify_checksum(vha, ha->fw_srisc_address); |
42e421b1 AV |
350 | if (rval == QLA_SUCCESS) { |
351 | /* And, verify we are not in ROM code. */ | |
e315cd28 | 352 | rval = qla2x00_get_adapter_id(vha, &loop_id, &al_pa, |
42e421b1 AV |
353 | &area, &domain, &topo, &sw_cap); |
354 | } | |
1da177e4 LT |
355 | } |
356 | ||
357 | if (rval) { | |
358 | DEBUG2_3(printk("scsi(%ld): **** Load RISC code ****\n", | |
e315cd28 | 359 | vha->host_no)); |
1da177e4 LT |
360 | } |
361 | ||
362 | return (rval); | |
363 | } | |
364 | ||
365 | /** | |
366 | * qla2x00_reset_chip() - Reset ISP chip. | |
367 | * @ha: HA context | |
368 | * | |
369 | * Returns 0 on success. | |
370 | */ | |
abbd8870 | 371 | void |
e315cd28 | 372 | qla2x00_reset_chip(scsi_qla_host_t *vha) |
1da177e4 LT |
373 | { |
374 | unsigned long flags = 0; | |
e315cd28 | 375 | struct qla_hw_data *ha = vha->hw; |
3d71644c | 376 | struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; |
1da177e4 | 377 | uint32_t cnt; |
1da177e4 LT |
378 | uint16_t cmd; |
379 | ||
fd34f556 | 380 | ha->isp_ops->disable_intrs(ha); |
1da177e4 LT |
381 | |
382 | spin_lock_irqsave(&ha->hardware_lock, flags); | |
383 | ||
384 | /* Turn off master enable */ | |
385 | cmd = 0; | |
386 | pci_read_config_word(ha->pdev, PCI_COMMAND, &cmd); | |
387 | cmd &= ~PCI_COMMAND_MASTER; | |
388 | pci_write_config_word(ha->pdev, PCI_COMMAND, cmd); | |
389 | ||
390 | if (!IS_QLA2100(ha)) { | |
391 | /* Pause RISC. */ | |
392 | WRT_REG_WORD(®->hccr, HCCR_PAUSE_RISC); | |
393 | if (IS_QLA2200(ha) || IS_QLA2300(ha)) { | |
394 | for (cnt = 0; cnt < 30000; cnt++) { | |
395 | if ((RD_REG_WORD(®->hccr) & | |
396 | HCCR_RISC_PAUSE) != 0) | |
397 | break; | |
398 | udelay(100); | |
399 | } | |
400 | } else { | |
401 | RD_REG_WORD(®->hccr); /* PCI Posting. */ | |
402 | udelay(10); | |
403 | } | |
404 | ||
405 | /* Select FPM registers. */ | |
406 | WRT_REG_WORD(®->ctrl_status, 0x20); | |
407 | RD_REG_WORD(®->ctrl_status); /* PCI Posting. */ | |
408 | ||
409 | /* FPM Soft Reset. */ | |
410 | WRT_REG_WORD(®->fpm_diag_config, 0x100); | |
411 | RD_REG_WORD(®->fpm_diag_config); /* PCI Posting. */ | |
412 | ||
413 | /* Toggle Fpm Reset. */ | |
414 | if (!IS_QLA2200(ha)) { | |
415 | WRT_REG_WORD(®->fpm_diag_config, 0x0); | |
416 | RD_REG_WORD(®->fpm_diag_config); /* PCI Posting. */ | |
417 | } | |
418 | ||
419 | /* Select frame buffer registers. */ | |
420 | WRT_REG_WORD(®->ctrl_status, 0x10); | |
421 | RD_REG_WORD(®->ctrl_status); /* PCI Posting. */ | |
422 | ||
423 | /* Reset frame buffer FIFOs. */ | |
424 | if (IS_QLA2200(ha)) { | |
425 | WRT_FB_CMD_REG(ha, reg, 0xa000); | |
426 | RD_FB_CMD_REG(ha, reg); /* PCI Posting. */ | |
427 | } else { | |
428 | WRT_FB_CMD_REG(ha, reg, 0x00fc); | |
429 | ||
430 | /* Read back fb_cmd until zero or 3 seconds max */ | |
431 | for (cnt = 0; cnt < 3000; cnt++) { | |
432 | if ((RD_FB_CMD_REG(ha, reg) & 0xff) == 0) | |
433 | break; | |
434 | udelay(100); | |
435 | } | |
436 | } | |
437 | ||
438 | /* Select RISC module registers. */ | |
439 | WRT_REG_WORD(®->ctrl_status, 0); | |
440 | RD_REG_WORD(®->ctrl_status); /* PCI Posting. */ | |
441 | ||
442 | /* Reset RISC processor. */ | |
443 | WRT_REG_WORD(®->hccr, HCCR_RESET_RISC); | |
444 | RD_REG_WORD(®->hccr); /* PCI Posting. */ | |
445 | ||
446 | /* Release RISC processor. */ | |
447 | WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); | |
448 | RD_REG_WORD(®->hccr); /* PCI Posting. */ | |
449 | } | |
450 | ||
451 | WRT_REG_WORD(®->hccr, HCCR_CLR_RISC_INT); | |
452 | WRT_REG_WORD(®->hccr, HCCR_CLR_HOST_INT); | |
453 | ||
454 | /* Reset ISP chip. */ | |
455 | WRT_REG_WORD(®->ctrl_status, CSR_ISP_SOFT_RESET); | |
456 | ||
457 | /* Wait for RISC to recover from reset. */ | |
458 | if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) { | |
459 | /* | |
460 | * It is necessary to for a delay here since the card doesn't | |
461 | * respond to PCI reads during a reset. On some architectures | |
462 | * this will result in an MCA. | |
463 | */ | |
464 | udelay(20); | |
465 | for (cnt = 30000; cnt; cnt--) { | |
466 | if ((RD_REG_WORD(®->ctrl_status) & | |
467 | CSR_ISP_SOFT_RESET) == 0) | |
468 | break; | |
469 | udelay(100); | |
470 | } | |
471 | } else | |
472 | udelay(10); | |
473 | ||
474 | /* Reset RISC processor. */ | |
475 | WRT_REG_WORD(®->hccr, HCCR_RESET_RISC); | |
476 | ||
477 | WRT_REG_WORD(®->semaphore, 0); | |
478 | ||
479 | /* Release RISC processor. */ | |
480 | WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); | |
481 | RD_REG_WORD(®->hccr); /* PCI Posting. */ | |
482 | ||
483 | if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) { | |
484 | for (cnt = 0; cnt < 30000; cnt++) { | |
ffb39f03 | 485 | if (RD_MAILBOX_REG(ha, reg, 0) != MBS_BUSY) |
1da177e4 | 486 | break; |
1da177e4 LT |
487 | |
488 | udelay(100); | |
489 | } | |
490 | } else | |
491 | udelay(100); | |
492 | ||
493 | /* Turn on master enable */ | |
494 | cmd |= PCI_COMMAND_MASTER; | |
495 | pci_write_config_word(ha->pdev, PCI_COMMAND, cmd); | |
496 | ||
497 | /* Disable RISC pause on FPM parity error. */ | |
498 | if (!IS_QLA2100(ha)) { | |
499 | WRT_REG_WORD(®->hccr, HCCR_DISABLE_PARITY_PAUSE); | |
500 | RD_REG_WORD(®->hccr); /* PCI Posting. */ | |
501 | } | |
502 | ||
503 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | |
504 | } | |
505 | ||
0107109e | 506 | /** |
88c26663 | 507 | * qla24xx_reset_risc() - Perform full reset of ISP24xx RISC. |
0107109e AV |
508 | * @ha: HA context |
509 | * | |
510 | * Returns 0 on success. | |
511 | */ | |
88c26663 | 512 | static inline void |
e315cd28 | 513 | qla24xx_reset_risc(scsi_qla_host_t *vha) |
0107109e | 514 | { |
cb8dacbf | 515 | int hw_evt = 0; |
0107109e | 516 | unsigned long flags = 0; |
e315cd28 | 517 | struct qla_hw_data *ha = vha->hw; |
0107109e AV |
518 | struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; |
519 | uint32_t cnt, d2; | |
335a1cc9 | 520 | uint16_t wd; |
0107109e | 521 | |
0107109e AV |
522 | spin_lock_irqsave(&ha->hardware_lock, flags); |
523 | ||
524 | /* Reset RISC. */ | |
525 | WRT_REG_DWORD(®->ctrl_status, CSRX_DMA_SHUTDOWN|MWB_4096_BYTES); | |
526 | for (cnt = 0; cnt < 30000; cnt++) { | |
527 | if ((RD_REG_DWORD(®->ctrl_status) & CSRX_DMA_ACTIVE) == 0) | |
528 | break; | |
529 | ||
530 | udelay(10); | |
531 | } | |
532 | ||
533 | WRT_REG_DWORD(®->ctrl_status, | |
534 | CSRX_ISP_SOFT_RESET|CSRX_DMA_SHUTDOWN|MWB_4096_BYTES); | |
335a1cc9 | 535 | pci_read_config_word(ha->pdev, PCI_COMMAND, &wd); |
88c26663 | 536 | |
335a1cc9 | 537 | udelay(100); |
88c26663 | 538 | /* Wait for firmware to complete NVRAM accesses. */ |
88c26663 AV |
539 | d2 = (uint32_t) RD_REG_WORD(®->mailbox0); |
540 | for (cnt = 10000 ; cnt && d2; cnt--) { | |
541 | udelay(5); | |
542 | d2 = (uint32_t) RD_REG_WORD(®->mailbox0); | |
543 | barrier(); | |
544 | } | |
cb8dacbf AV |
545 | if (cnt == 0) |
546 | hw_evt = 1; | |
88c26663 | 547 | |
335a1cc9 | 548 | /* Wait for soft-reset to complete. */ |
0107109e AV |
549 | d2 = RD_REG_DWORD(®->ctrl_status); |
550 | for (cnt = 6000000 ; cnt && (d2 & CSRX_ISP_SOFT_RESET); cnt--) { | |
551 | udelay(5); | |
552 | d2 = RD_REG_DWORD(®->ctrl_status); | |
553 | barrier(); | |
554 | } | |
555 | ||
556 | WRT_REG_DWORD(®->hccr, HCCRX_SET_RISC_RESET); | |
557 | RD_REG_DWORD(®->hccr); | |
558 | ||
559 | WRT_REG_DWORD(®->hccr, HCCRX_REL_RISC_PAUSE); | |
560 | RD_REG_DWORD(®->hccr); | |
561 | ||
562 | WRT_REG_DWORD(®->hccr, HCCRX_CLR_RISC_RESET); | |
563 | RD_REG_DWORD(®->hccr); | |
564 | ||
565 | d2 = (uint32_t) RD_REG_WORD(®->mailbox0); | |
566 | for (cnt = 6000000 ; cnt && d2; cnt--) { | |
567 | udelay(5); | |
568 | d2 = (uint32_t) RD_REG_WORD(®->mailbox0); | |
569 | barrier(); | |
570 | } | |
571 | ||
572 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | |
124f85e6 AV |
573 | |
574 | if (IS_NOPOLLING_TYPE(ha)) | |
575 | ha->isp_ops->enable_intrs(ha); | |
0107109e AV |
576 | } |
577 | ||
88c26663 AV |
578 | /** |
579 | * qla24xx_reset_chip() - Reset ISP24xx chip. | |
580 | * @ha: HA context | |
581 | * | |
582 | * Returns 0 on success. | |
583 | */ | |
584 | void | |
e315cd28 | 585 | qla24xx_reset_chip(scsi_qla_host_t *vha) |
88c26663 | 586 | { |
e315cd28 | 587 | struct qla_hw_data *ha = vha->hw; |
fd34f556 | 588 | ha->isp_ops->disable_intrs(ha); |
88c26663 AV |
589 | |
590 | /* Perform RISC reset. */ | |
e315cd28 | 591 | qla24xx_reset_risc(vha); |
88c26663 AV |
592 | } |
593 | ||
1da177e4 LT |
594 | /** |
595 | * qla2x00_chip_diag() - Test chip for proper operation. | |
596 | * @ha: HA context | |
597 | * | |
598 | * Returns 0 on success. | |
599 | */ | |
abbd8870 | 600 | int |
e315cd28 | 601 | qla2x00_chip_diag(scsi_qla_host_t *vha) |
1da177e4 LT |
602 | { |
603 | int rval; | |
e315cd28 | 604 | struct qla_hw_data *ha = vha->hw; |
3d71644c | 605 | struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; |
1da177e4 LT |
606 | unsigned long flags = 0; |
607 | uint16_t data; | |
608 | uint32_t cnt; | |
609 | uint16_t mb[5]; | |
73208dfd | 610 | struct req_que *req = ha->req_q_map[0]; |
1da177e4 LT |
611 | |
612 | /* Assume a failed state */ | |
613 | rval = QLA_FUNCTION_FAILED; | |
614 | ||
615 | DEBUG3(printk("scsi(%ld): Testing device at %lx.\n", | |
e315cd28 | 616 | vha->host_no, (u_long)®->flash_address)); |
1da177e4 LT |
617 | |
618 | spin_lock_irqsave(&ha->hardware_lock, flags); | |
619 | ||
620 | /* Reset ISP chip. */ | |
621 | WRT_REG_WORD(®->ctrl_status, CSR_ISP_SOFT_RESET); | |
622 | ||
623 | /* | |
624 | * We need to have a delay here since the card will not respond while | |
625 | * in reset causing an MCA on some architectures. | |
626 | */ | |
627 | udelay(20); | |
628 | data = qla2x00_debounce_register(®->ctrl_status); | |
629 | for (cnt = 6000000 ; cnt && (data & CSR_ISP_SOFT_RESET); cnt--) { | |
630 | udelay(5); | |
631 | data = RD_REG_WORD(®->ctrl_status); | |
632 | barrier(); | |
633 | } | |
634 | ||
635 | if (!cnt) | |
636 | goto chip_diag_failed; | |
637 | ||
638 | DEBUG3(printk("scsi(%ld): Reset register cleared by chip reset\n", | |
639 | ha->host_no)); | |
640 | ||
641 | /* Reset RISC processor. */ | |
642 | WRT_REG_WORD(®->hccr, HCCR_RESET_RISC); | |
643 | WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); | |
644 | ||
645 | /* Workaround for QLA2312 PCI parity error */ | |
646 | if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) { | |
647 | data = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 0)); | |
648 | for (cnt = 6000000; cnt && (data == MBS_BUSY); cnt--) { | |
649 | udelay(5); | |
650 | data = RD_MAILBOX_REG(ha, reg, 0); | |
fa2a1ce5 | 651 | barrier(); |
1da177e4 LT |
652 | } |
653 | } else | |
654 | udelay(10); | |
655 | ||
656 | if (!cnt) | |
657 | goto chip_diag_failed; | |
658 | ||
659 | /* Check product ID of chip */ | |
660 | DEBUG3(printk("scsi(%ld): Checking product ID of chip\n", ha->host_no)); | |
661 | ||
662 | mb[1] = RD_MAILBOX_REG(ha, reg, 1); | |
663 | mb[2] = RD_MAILBOX_REG(ha, reg, 2); | |
664 | mb[3] = RD_MAILBOX_REG(ha, reg, 3); | |
665 | mb[4] = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 4)); | |
666 | if (mb[1] != PROD_ID_1 || (mb[2] != PROD_ID_2 && mb[2] != PROD_ID_2a) || | |
667 | mb[3] != PROD_ID_3) { | |
668 | qla_printk(KERN_WARNING, ha, | |
669 | "Wrong product ID = 0x%x,0x%x,0x%x\n", mb[1], mb[2], mb[3]); | |
670 | ||
671 | goto chip_diag_failed; | |
672 | } | |
673 | ha->product_id[0] = mb[1]; | |
674 | ha->product_id[1] = mb[2]; | |
675 | ha->product_id[2] = mb[3]; | |
676 | ha->product_id[3] = mb[4]; | |
677 | ||
678 | /* Adjust fw RISC transfer size */ | |
73208dfd | 679 | if (req->length > 1024) |
1da177e4 LT |
680 | ha->fw_transfer_size = REQUEST_ENTRY_SIZE * 1024; |
681 | else | |
682 | ha->fw_transfer_size = REQUEST_ENTRY_SIZE * | |
73208dfd | 683 | req->length; |
1da177e4 LT |
684 | |
685 | if (IS_QLA2200(ha) && | |
686 | RD_MAILBOX_REG(ha, reg, 7) == QLA2200A_RISC_ROM_VER) { | |
687 | /* Limit firmware transfer size with a 2200A */ | |
688 | DEBUG3(printk("scsi(%ld): Found QLA2200A chip.\n", | |
e315cd28 | 689 | vha->host_no)); |
1da177e4 | 690 | |
ea5b6382 | 691 | ha->device_type |= DT_ISP2200A; |
1da177e4 LT |
692 | ha->fw_transfer_size = 128; |
693 | } | |
694 | ||
695 | /* Wrap Incoming Mailboxes Test. */ | |
696 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | |
697 | ||
e315cd28 AC |
698 | DEBUG3(printk("scsi(%ld): Checking mailboxes.\n", vha->host_no)); |
699 | rval = qla2x00_mbx_reg_test(vha); | |
1da177e4 LT |
700 | if (rval) { |
701 | DEBUG(printk("scsi(%ld): Failed mailbox send register test\n", | |
e315cd28 | 702 | vha->host_no)); |
1da177e4 LT |
703 | qla_printk(KERN_WARNING, ha, |
704 | "Failed mailbox send register test\n"); | |
705 | } | |
706 | else { | |
707 | /* Flag a successful rval */ | |
708 | rval = QLA_SUCCESS; | |
709 | } | |
710 | spin_lock_irqsave(&ha->hardware_lock, flags); | |
711 | ||
712 | chip_diag_failed: | |
713 | if (rval) | |
714 | DEBUG2_3(printk("scsi(%ld): Chip diagnostics **** FAILED " | |
e315cd28 | 715 | "****\n", vha->host_no)); |
1da177e4 LT |
716 | |
717 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | |
718 | ||
719 | return (rval); | |
720 | } | |
721 | ||
0107109e AV |
722 | /** |
723 | * qla24xx_chip_diag() - Test ISP24xx for proper operation. | |
724 | * @ha: HA context | |
725 | * | |
726 | * Returns 0 on success. | |
727 | */ | |
728 | int | |
e315cd28 | 729 | qla24xx_chip_diag(scsi_qla_host_t *vha) |
0107109e AV |
730 | { |
731 | int rval; | |
e315cd28 | 732 | struct qla_hw_data *ha = vha->hw; |
73208dfd | 733 | struct req_que *req = ha->req_q_map[0]; |
0107109e | 734 | |
88c26663 | 735 | /* Perform RISC reset. */ |
e315cd28 | 736 | qla24xx_reset_risc(vha); |
0107109e | 737 | |
73208dfd | 738 | ha->fw_transfer_size = REQUEST_ENTRY_SIZE * req->length; |
0107109e | 739 | |
e315cd28 | 740 | rval = qla2x00_mbx_reg_test(vha); |
0107109e AV |
741 | if (rval) { |
742 | DEBUG(printk("scsi(%ld): Failed mailbox send register test\n", | |
e315cd28 | 743 | vha->host_no)); |
0107109e AV |
744 | qla_printk(KERN_WARNING, ha, |
745 | "Failed mailbox send register test\n"); | |
746 | } else { | |
747 | /* Flag a successful rval */ | |
748 | rval = QLA_SUCCESS; | |
749 | } | |
750 | ||
751 | return rval; | |
752 | } | |
753 | ||
a7a167bf | 754 | void |
e315cd28 | 755 | qla2x00_alloc_fw_dump(scsi_qla_host_t *vha) |
0107109e | 756 | { |
a7a167bf AV |
757 | int rval; |
758 | uint32_t dump_size, fixed_size, mem_size, req_q_size, rsp_q_size, | |
73208dfd | 759 | eft_size, fce_size, mq_size; |
df613b96 AV |
760 | dma_addr_t tc_dma; |
761 | void *tc; | |
e315cd28 | 762 | struct qla_hw_data *ha = vha->hw; |
73208dfd AC |
763 | struct req_que *req = ha->req_q_map[0]; |
764 | struct rsp_que *rsp = ha->rsp_q_map[0]; | |
a7a167bf AV |
765 | |
766 | if (ha->fw_dump) { | |
767 | qla_printk(KERN_WARNING, ha, | |
768 | "Firmware dump previously allocated.\n"); | |
769 | return; | |
770 | } | |
d4e3e04d | 771 | |
0107109e | 772 | ha->fw_dumped = 0; |
73208dfd | 773 | fixed_size = mem_size = eft_size = fce_size = mq_size = 0; |
d4e3e04d | 774 | if (IS_QLA2100(ha) || IS_QLA2200(ha)) { |
a7a167bf | 775 | fixed_size = sizeof(struct qla2100_fw_dump); |
d4e3e04d | 776 | } else if (IS_QLA23XX(ha)) { |
a7a167bf AV |
777 | fixed_size = offsetof(struct qla2300_fw_dump, data_ram); |
778 | mem_size = (ha->fw_memory_size - 0x11000 + 1) * | |
779 | sizeof(uint16_t); | |
e428924c | 780 | } else if (IS_FWI2_CAPABLE(ha)) { |
3a03eb79 AV |
781 | if (IS_QLA81XX(ha)) |
782 | fixed_size = offsetof(struct qla81xx_fw_dump, ext_mem); | |
783 | else if (IS_QLA25XX(ha)) | |
784 | fixed_size = offsetof(struct qla25xx_fw_dump, ext_mem); | |
785 | else | |
786 | fixed_size = offsetof(struct qla24xx_fw_dump, ext_mem); | |
a7a167bf AV |
787 | mem_size = (ha->fw_memory_size - 0x100000 + 1) * |
788 | sizeof(uint32_t); | |
73208dfd AC |
789 | if (ha->mqenable) |
790 | mq_size = sizeof(struct qla2xxx_mq_chain); | |
a7a167bf | 791 | |
df613b96 | 792 | /* Allocate memory for Fibre Channel Event Buffer. */ |
3a03eb79 | 793 | if (!IS_QLA25XX(ha) && !IS_QLA81XX(ha)) |
436a7b11 | 794 | goto try_eft; |
df613b96 AV |
795 | |
796 | tc = dma_alloc_coherent(&ha->pdev->dev, FCE_SIZE, &tc_dma, | |
797 | GFP_KERNEL); | |
798 | if (!tc) { | |
799 | qla_printk(KERN_WARNING, ha, "Unable to allocate " | |
800 | "(%d KB) for FCE.\n", FCE_SIZE / 1024); | |
17d98630 | 801 | goto try_eft; |
df613b96 AV |
802 | } |
803 | ||
804 | memset(tc, 0, FCE_SIZE); | |
e315cd28 | 805 | rval = qla2x00_enable_fce_trace(vha, tc_dma, FCE_NUM_BUFFERS, |
df613b96 AV |
806 | ha->fce_mb, &ha->fce_bufs); |
807 | if (rval) { | |
808 | qla_printk(KERN_WARNING, ha, "Unable to initialize " | |
809 | "FCE (%d).\n", rval); | |
810 | dma_free_coherent(&ha->pdev->dev, FCE_SIZE, tc, | |
811 | tc_dma); | |
812 | ha->flags.fce_enabled = 0; | |
17d98630 | 813 | goto try_eft; |
df613b96 AV |
814 | } |
815 | ||
816 | qla_printk(KERN_INFO, ha, "Allocated (%d KB) for FCE...\n", | |
817 | FCE_SIZE / 1024); | |
818 | ||
7d9dade3 | 819 | fce_size = sizeof(struct qla2xxx_fce_chain) + FCE_SIZE; |
df613b96 AV |
820 | ha->flags.fce_enabled = 1; |
821 | ha->fce_dma = tc_dma; | |
822 | ha->fce = tc; | |
436a7b11 AV |
823 | try_eft: |
824 | /* Allocate memory for Extended Trace Buffer. */ | |
825 | tc = dma_alloc_coherent(&ha->pdev->dev, EFT_SIZE, &tc_dma, | |
826 | GFP_KERNEL); | |
827 | if (!tc) { | |
828 | qla_printk(KERN_WARNING, ha, "Unable to allocate " | |
829 | "(%d KB) for EFT.\n", EFT_SIZE / 1024); | |
830 | goto cont_alloc; | |
831 | } | |
832 | ||
833 | memset(tc, 0, EFT_SIZE); | |
e315cd28 | 834 | rval = qla2x00_enable_eft_trace(vha, tc_dma, EFT_NUM_BUFFERS); |
436a7b11 AV |
835 | if (rval) { |
836 | qla_printk(KERN_WARNING, ha, "Unable to initialize " | |
837 | "EFT (%d).\n", rval); | |
838 | dma_free_coherent(&ha->pdev->dev, EFT_SIZE, tc, | |
839 | tc_dma); | |
840 | goto cont_alloc; | |
841 | } | |
842 | ||
843 | qla_printk(KERN_INFO, ha, "Allocated (%d KB) for EFT...\n", | |
844 | EFT_SIZE / 1024); | |
845 | ||
846 | eft_size = EFT_SIZE; | |
847 | ha->eft_dma = tc_dma; | |
848 | ha->eft = tc; | |
d4e3e04d | 849 | } |
a7a167bf | 850 | cont_alloc: |
73208dfd AC |
851 | req_q_size = req->length * sizeof(request_t); |
852 | rsp_q_size = rsp->length * sizeof(response_t); | |
a7a167bf AV |
853 | |
854 | dump_size = offsetof(struct qla2xxx_fw_dump, isp); | |
855 | dump_size += fixed_size + mem_size + req_q_size + rsp_q_size + | |
bb99de67 AV |
856 | eft_size; |
857 | ha->chain_offset = dump_size; | |
858 | dump_size += mq_size + fce_size; | |
d4e3e04d AV |
859 | |
860 | ha->fw_dump = vmalloc(dump_size); | |
a7a167bf | 861 | if (!ha->fw_dump) { |
0107109e | 862 | qla_printk(KERN_WARNING, ha, "Unable to allocate (%d KB) for " |
d4e3e04d | 863 | "firmware dump!!!\n", dump_size / 1024); |
a7a167bf AV |
864 | |
865 | if (ha->eft) { | |
866 | dma_free_coherent(&ha->pdev->dev, eft_size, ha->eft, | |
867 | ha->eft_dma); | |
868 | ha->eft = NULL; | |
869 | ha->eft_dma = 0; | |
870 | } | |
871 | return; | |
872 | } | |
a7a167bf AV |
873 | qla_printk(KERN_INFO, ha, "Allocated (%d KB) for firmware dump...\n", |
874 | dump_size / 1024); | |
875 | ||
876 | ha->fw_dump_len = dump_size; | |
877 | ha->fw_dump->signature[0] = 'Q'; | |
878 | ha->fw_dump->signature[1] = 'L'; | |
879 | ha->fw_dump->signature[2] = 'G'; | |
880 | ha->fw_dump->signature[3] = 'C'; | |
881 | ha->fw_dump->version = __constant_htonl(1); | |
882 | ||
883 | ha->fw_dump->fixed_size = htonl(fixed_size); | |
884 | ha->fw_dump->mem_size = htonl(mem_size); | |
885 | ha->fw_dump->req_q_size = htonl(req_q_size); | |
886 | ha->fw_dump->rsp_q_size = htonl(rsp_q_size); | |
887 | ||
888 | ha->fw_dump->eft_size = htonl(eft_size); | |
889 | ha->fw_dump->eft_addr_l = htonl(LSD(ha->eft_dma)); | |
890 | ha->fw_dump->eft_addr_h = htonl(MSD(ha->eft_dma)); | |
891 | ||
892 | ha->fw_dump->header_size = | |
893 | htonl(offsetof(struct qla2xxx_fw_dump, isp)); | |
0107109e AV |
894 | } |
895 | ||
1da177e4 LT |
896 | /** |
897 | * qla2x00_resize_request_q() - Resize request queue given available ISP memory. | |
898 | * @ha: HA context | |
899 | * | |
900 | * Returns 0 on success. | |
901 | */ | |
902 | static void | |
e315cd28 | 903 | qla2x00_resize_request_q(scsi_qla_host_t *vha) |
1da177e4 LT |
904 | { |
905 | int rval; | |
906 | uint16_t fw_iocb_cnt = 0; | |
907 | uint16_t request_q_length = REQUEST_ENTRY_CNT_2XXX_EXT_MEM; | |
908 | dma_addr_t request_dma; | |
909 | request_t *request_ring; | |
e315cd28 | 910 | struct qla_hw_data *ha = vha->hw; |
73208dfd | 911 | struct req_que *req = ha->req_q_map[0]; |
1da177e4 LT |
912 | |
913 | /* Valid only on recent ISPs. */ | |
914 | if (IS_QLA2100(ha) || IS_QLA2200(ha)) | |
915 | return; | |
916 | ||
917 | /* Retrieve IOCB counts available to the firmware. */ | |
e315cd28 AC |
918 | rval = qla2x00_get_resource_cnts(vha, NULL, NULL, NULL, &fw_iocb_cnt, |
919 | &ha->max_npiv_vports); | |
1da177e4 LT |
920 | if (rval) |
921 | return; | |
922 | /* No point in continuing if current settings are sufficient. */ | |
923 | if (fw_iocb_cnt < 1024) | |
924 | return; | |
e315cd28 | 925 | if (req->length >= request_q_length) |
1da177e4 LT |
926 | return; |
927 | ||
928 | /* Attempt to claim larger area for request queue. */ | |
929 | request_ring = dma_alloc_coherent(&ha->pdev->dev, | |
930 | (request_q_length + 1) * sizeof(request_t), &request_dma, | |
931 | GFP_KERNEL); | |
932 | if (request_ring == NULL) | |
933 | return; | |
934 | ||
935 | /* Resize successful, report extensions. */ | |
936 | qla_printk(KERN_INFO, ha, "Extended memory detected (%d KB)...\n", | |
937 | (ha->fw_memory_size + 1) / 1024); | |
938 | qla_printk(KERN_INFO, ha, "Resizing request queue depth " | |
e315cd28 | 939 | "(%d -> %d)...\n", req->length, request_q_length); |
1da177e4 LT |
940 | |
941 | /* Clear old allocations. */ | |
942 | dma_free_coherent(&ha->pdev->dev, | |
e315cd28 AC |
943 | (req->length + 1) * sizeof(request_t), req->ring, |
944 | req->dma); | |
1da177e4 LT |
945 | |
946 | /* Begin using larger queue. */ | |
e315cd28 AC |
947 | req->length = request_q_length; |
948 | req->ring = request_ring; | |
949 | req->dma = request_dma; | |
1da177e4 LT |
950 | } |
951 | ||
952 | /** | |
953 | * qla2x00_setup_chip() - Load and start RISC firmware. | |
954 | * @ha: HA context | |
955 | * | |
956 | * Returns 0 on success. | |
957 | */ | |
958 | static int | |
e315cd28 | 959 | qla2x00_setup_chip(scsi_qla_host_t *vha) |
1da177e4 | 960 | { |
0107109e AV |
961 | int rval; |
962 | uint32_t srisc_address = 0; | |
e315cd28 | 963 | struct qla_hw_data *ha = vha->hw; |
3db0652e AV |
964 | struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; |
965 | unsigned long flags; | |
dda772e8 | 966 | uint16_t fw_major_version; |
3db0652e AV |
967 | |
968 | if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) { | |
969 | /* Disable SRAM, Instruction RAM and GP RAM parity. */ | |
970 | spin_lock_irqsave(&ha->hardware_lock, flags); | |
971 | WRT_REG_WORD(®->hccr, (HCCR_ENABLE_PARITY + 0x0)); | |
972 | RD_REG_WORD(®->hccr); | |
973 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | |
974 | } | |
1da177e4 LT |
975 | |
976 | /* Load firmware sequences */ | |
e315cd28 | 977 | rval = ha->isp_ops->load_risc(vha, &srisc_address); |
0107109e | 978 | if (rval == QLA_SUCCESS) { |
1da177e4 | 979 | DEBUG(printk("scsi(%ld): Verifying Checksum of loaded RISC " |
e315cd28 | 980 | "code.\n", vha->host_no)); |
1da177e4 | 981 | |
e315cd28 | 982 | rval = qla2x00_verify_checksum(vha, srisc_address); |
1da177e4 LT |
983 | if (rval == QLA_SUCCESS) { |
984 | /* Start firmware execution. */ | |
985 | DEBUG(printk("scsi(%ld): Checksum OK, start " | |
e315cd28 | 986 | "firmware.\n", vha->host_no)); |
1da177e4 | 987 | |
e315cd28 | 988 | rval = qla2x00_execute_fw(vha, srisc_address); |
1da177e4 | 989 | /* Retrieve firmware information. */ |
dda772e8 AV |
990 | if (rval == QLA_SUCCESS) { |
991 | fw_major_version = ha->fw_major_version; | |
e315cd28 | 992 | qla2x00_get_fw_version(vha, |
1da177e4 LT |
993 | &ha->fw_major_version, |
994 | &ha->fw_minor_version, | |
995 | &ha->fw_subminor_version, | |
3a03eb79 AV |
996 | &ha->fw_attributes, &ha->fw_memory_size, |
997 | ha->mpi_version, &ha->mpi_capabilities); | |
2c3dfe3f | 998 | ha->flags.npiv_supported = 0; |
e315cd28 | 999 | if (IS_QLA2XXX_MIDTYPE(ha) && |
946fb891 | 1000 | (ha->fw_attributes & BIT_2)) { |
2c3dfe3f | 1001 | ha->flags.npiv_supported = 1; |
4d0ea247 SJ |
1002 | if ((!ha->max_npiv_vports) || |
1003 | ((ha->max_npiv_vports + 1) % | |
eb66dc60 | 1004 | MIN_MULTI_ID_FABRIC)) |
4d0ea247 | 1005 | ha->max_npiv_vports = |
eb66dc60 | 1006 | MIN_MULTI_ID_FABRIC - 1; |
4d0ea247 | 1007 | } |
dda772e8 AV |
1008 | if (!fw_major_version) { |
1009 | qla2x00_resize_request_q(vha); | |
1010 | if (ql2xallocfwdump) | |
1011 | qla2x00_alloc_fw_dump(vha); | |
1012 | } | |
1da177e4 LT |
1013 | } |
1014 | } else { | |
1015 | DEBUG2(printk(KERN_INFO | |
1016 | "scsi(%ld): ISP Firmware failed checksum.\n", | |
e315cd28 | 1017 | vha->host_no)); |
1da177e4 LT |
1018 | } |
1019 | } | |
1020 | ||
3db0652e AV |
1021 | if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) { |
1022 | /* Enable proper parity. */ | |
1023 | spin_lock_irqsave(&ha->hardware_lock, flags); | |
1024 | if (IS_QLA2300(ha)) | |
1025 | /* SRAM parity */ | |
1026 | WRT_REG_WORD(®->hccr, HCCR_ENABLE_PARITY + 0x1); | |
1027 | else | |
1028 | /* SRAM, Instruction RAM and GP RAM parity */ | |
1029 | WRT_REG_WORD(®->hccr, HCCR_ENABLE_PARITY + 0x7); | |
1030 | RD_REG_WORD(®->hccr); | |
1031 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | |
1032 | } | |
1033 | ||
1da177e4 LT |
1034 | if (rval) { |
1035 | DEBUG2_3(printk("scsi(%ld): Setup chip **** FAILED ****.\n", | |
e315cd28 | 1036 | vha->host_no)); |
1da177e4 LT |
1037 | } |
1038 | ||
1039 | return (rval); | |
1040 | } | |
1041 | ||
1042 | /** | |
1043 | * qla2x00_init_response_q_entries() - Initializes response queue entries. | |
1044 | * @ha: HA context | |
1045 | * | |
1046 | * Beginning of request ring has initialization control block already built | |
1047 | * by nvram config routine. | |
1048 | * | |
1049 | * Returns 0 on success. | |
1050 | */ | |
73208dfd AC |
1051 | void |
1052 | qla2x00_init_response_q_entries(struct rsp_que *rsp) | |
1da177e4 LT |
1053 | { |
1054 | uint16_t cnt; | |
1055 | response_t *pkt; | |
1056 | ||
e315cd28 AC |
1057 | pkt = rsp->ring_ptr; |
1058 | for (cnt = 0; cnt < rsp->length; cnt++) { | |
1da177e4 LT |
1059 | pkt->signature = RESPONSE_PROCESSED; |
1060 | pkt++; | |
1061 | } | |
1062 | ||
1063 | } | |
1064 | ||
1065 | /** | |
1066 | * qla2x00_update_fw_options() - Read and process firmware options. | |
1067 | * @ha: HA context | |
1068 | * | |
1069 | * Returns 0 on success. | |
1070 | */ | |
abbd8870 | 1071 | void |
e315cd28 | 1072 | qla2x00_update_fw_options(scsi_qla_host_t *vha) |
1da177e4 LT |
1073 | { |
1074 | uint16_t swing, emphasis, tx_sens, rx_sens; | |
e315cd28 | 1075 | struct qla_hw_data *ha = vha->hw; |
1da177e4 LT |
1076 | |
1077 | memset(ha->fw_options, 0, sizeof(ha->fw_options)); | |
e315cd28 | 1078 | qla2x00_get_fw_options(vha, ha->fw_options); |
1da177e4 LT |
1079 | |
1080 | if (IS_QLA2100(ha) || IS_QLA2200(ha)) | |
1081 | return; | |
1082 | ||
1083 | /* Serial Link options. */ | |
1084 | DEBUG3(printk("scsi(%ld): Serial link options:\n", | |
e315cd28 | 1085 | vha->host_no)); |
1da177e4 LT |
1086 | DEBUG3(qla2x00_dump_buffer((uint8_t *)&ha->fw_seriallink_options, |
1087 | sizeof(ha->fw_seriallink_options))); | |
1088 | ||
1089 | ha->fw_options[1] &= ~FO1_SET_EMPHASIS_SWING; | |
1090 | if (ha->fw_seriallink_options[3] & BIT_2) { | |
1091 | ha->fw_options[1] |= FO1_SET_EMPHASIS_SWING; | |
1092 | ||
1093 | /* 1G settings */ | |
1094 | swing = ha->fw_seriallink_options[2] & (BIT_2 | BIT_1 | BIT_0); | |
1095 | emphasis = (ha->fw_seriallink_options[2] & | |
1096 | (BIT_4 | BIT_3)) >> 3; | |
1097 | tx_sens = ha->fw_seriallink_options[0] & | |
fa2a1ce5 | 1098 | (BIT_3 | BIT_2 | BIT_1 | BIT_0); |
1da177e4 LT |
1099 | rx_sens = (ha->fw_seriallink_options[0] & |
1100 | (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4; | |
1101 | ha->fw_options[10] = (emphasis << 14) | (swing << 8); | |
1102 | if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) { | |
1103 | if (rx_sens == 0x0) | |
1104 | rx_sens = 0x3; | |
1105 | ha->fw_options[10] |= (tx_sens << 4) | rx_sens; | |
1106 | } else if (IS_QLA2322(ha) || IS_QLA6322(ha)) | |
1107 | ha->fw_options[10] |= BIT_5 | | |
1108 | ((rx_sens & (BIT_1 | BIT_0)) << 2) | | |
1109 | (tx_sens & (BIT_1 | BIT_0)); | |
1110 | ||
1111 | /* 2G settings */ | |
1112 | swing = (ha->fw_seriallink_options[2] & | |
1113 | (BIT_7 | BIT_6 | BIT_5)) >> 5; | |
1114 | emphasis = ha->fw_seriallink_options[3] & (BIT_1 | BIT_0); | |
1115 | tx_sens = ha->fw_seriallink_options[1] & | |
fa2a1ce5 | 1116 | (BIT_3 | BIT_2 | BIT_1 | BIT_0); |
1da177e4 LT |
1117 | rx_sens = (ha->fw_seriallink_options[1] & |
1118 | (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4; | |
1119 | ha->fw_options[11] = (emphasis << 14) | (swing << 8); | |
1120 | if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) { | |
1121 | if (rx_sens == 0x0) | |
1122 | rx_sens = 0x3; | |
1123 | ha->fw_options[11] |= (tx_sens << 4) | rx_sens; | |
1124 | } else if (IS_QLA2322(ha) || IS_QLA6322(ha)) | |
1125 | ha->fw_options[11] |= BIT_5 | | |
1126 | ((rx_sens & (BIT_1 | BIT_0)) << 2) | | |
1127 | (tx_sens & (BIT_1 | BIT_0)); | |
1128 | } | |
1129 | ||
1130 | /* FCP2 options. */ | |
1131 | /* Return command IOCBs without waiting for an ABTS to complete. */ | |
1132 | ha->fw_options[3] |= BIT_13; | |
1133 | ||
1134 | /* LED scheme. */ | |
1135 | if (ha->flags.enable_led_scheme) | |
1136 | ha->fw_options[2] |= BIT_12; | |
1137 | ||
48c02fde | 1138 | /* Detect ISP6312. */ |
1139 | if (IS_QLA6312(ha)) | |
1140 | ha->fw_options[2] |= BIT_13; | |
1141 | ||
1da177e4 | 1142 | /* Update firmware options. */ |
e315cd28 | 1143 | qla2x00_set_fw_options(vha, ha->fw_options); |
1da177e4 LT |
1144 | } |
1145 | ||
0107109e | 1146 | void |
e315cd28 | 1147 | qla24xx_update_fw_options(scsi_qla_host_t *vha) |
0107109e AV |
1148 | { |
1149 | int rval; | |
e315cd28 | 1150 | struct qla_hw_data *ha = vha->hw; |
0107109e AV |
1151 | |
1152 | /* Update Serial Link options. */ | |
f94097ed | 1153 | if ((le16_to_cpu(ha->fw_seriallink_options24[0]) & BIT_0) == 0) |
0107109e AV |
1154 | return; |
1155 | ||
e315cd28 | 1156 | rval = qla2x00_set_serdes_params(vha, |
f94097ed | 1157 | le16_to_cpu(ha->fw_seriallink_options24[1]), |
1158 | le16_to_cpu(ha->fw_seriallink_options24[2]), | |
1159 | le16_to_cpu(ha->fw_seriallink_options24[3])); | |
0107109e AV |
1160 | if (rval != QLA_SUCCESS) { |
1161 | qla_printk(KERN_WARNING, ha, | |
1162 | "Unable to update Serial Link options (%x).\n", rval); | |
1163 | } | |
1164 | } | |
1165 | ||
abbd8870 | 1166 | void |
e315cd28 | 1167 | qla2x00_config_rings(struct scsi_qla_host *vha) |
abbd8870 | 1168 | { |
e315cd28 | 1169 | struct qla_hw_data *ha = vha->hw; |
3d71644c | 1170 | struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; |
73208dfd AC |
1171 | struct req_que *req = ha->req_q_map[0]; |
1172 | struct rsp_que *rsp = ha->rsp_q_map[0]; | |
abbd8870 AV |
1173 | |
1174 | /* Setup ring parameters in initialization control block. */ | |
1175 | ha->init_cb->request_q_outpointer = __constant_cpu_to_le16(0); | |
1176 | ha->init_cb->response_q_inpointer = __constant_cpu_to_le16(0); | |
e315cd28 AC |
1177 | ha->init_cb->request_q_length = cpu_to_le16(req->length); |
1178 | ha->init_cb->response_q_length = cpu_to_le16(rsp->length); | |
1179 | ha->init_cb->request_q_address[0] = cpu_to_le32(LSD(req->dma)); | |
1180 | ha->init_cb->request_q_address[1] = cpu_to_le32(MSD(req->dma)); | |
1181 | ha->init_cb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma)); | |
1182 | ha->init_cb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma)); | |
abbd8870 AV |
1183 | |
1184 | WRT_REG_WORD(ISP_REQ_Q_IN(ha, reg), 0); | |
1185 | WRT_REG_WORD(ISP_REQ_Q_OUT(ha, reg), 0); | |
1186 | WRT_REG_WORD(ISP_RSP_Q_IN(ha, reg), 0); | |
1187 | WRT_REG_WORD(ISP_RSP_Q_OUT(ha, reg), 0); | |
1188 | RD_REG_WORD(ISP_RSP_Q_OUT(ha, reg)); /* PCI Posting. */ | |
1189 | } | |
1190 | ||
0107109e | 1191 | void |
e315cd28 | 1192 | qla24xx_config_rings(struct scsi_qla_host *vha) |
0107109e | 1193 | { |
e315cd28 | 1194 | struct qla_hw_data *ha = vha->hw; |
73208dfd AC |
1195 | device_reg_t __iomem *reg = ISP_QUE_REG(ha, 0); |
1196 | struct device_reg_2xxx __iomem *ioreg = &ha->iobase->isp; | |
1197 | struct qla_msix_entry *msix; | |
0107109e | 1198 | struct init_cb_24xx *icb; |
73208dfd AC |
1199 | uint16_t rid = 0; |
1200 | struct req_que *req = ha->req_q_map[0]; | |
1201 | struct rsp_que *rsp = ha->rsp_q_map[0]; | |
0107109e | 1202 | |
73208dfd | 1203 | /* Setup ring parameters in initialization control block. */ |
0107109e AV |
1204 | icb = (struct init_cb_24xx *)ha->init_cb; |
1205 | icb->request_q_outpointer = __constant_cpu_to_le16(0); | |
1206 | icb->response_q_inpointer = __constant_cpu_to_le16(0); | |
e315cd28 AC |
1207 | icb->request_q_length = cpu_to_le16(req->length); |
1208 | icb->response_q_length = cpu_to_le16(rsp->length); | |
1209 | icb->request_q_address[0] = cpu_to_le32(LSD(req->dma)); | |
1210 | icb->request_q_address[1] = cpu_to_le32(MSD(req->dma)); | |
1211 | icb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma)); | |
1212 | icb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma)); | |
0107109e | 1213 | |
73208dfd AC |
1214 | if (ha->mqenable) { |
1215 | icb->qos = __constant_cpu_to_le16(QLA_DEFAULT_QUE_QOS); | |
1216 | icb->rid = __constant_cpu_to_le16(rid); | |
1217 | if (ha->flags.msix_enabled) { | |
1218 | msix = &ha->msix_entries[1]; | |
1219 | DEBUG2_17(printk(KERN_INFO | |
1220 | "Reistering vector 0x%x for base que\n", msix->entry)); | |
1221 | icb->msix = cpu_to_le16(msix->entry); | |
1222 | } | |
1223 | /* Use alternate PCI bus number */ | |
1224 | if (MSB(rid)) | |
1225 | icb->firmware_options_2 |= | |
1226 | __constant_cpu_to_le32(BIT_19); | |
1227 | /* Use alternate PCI devfn */ | |
1228 | if (LSB(rid)) | |
1229 | icb->firmware_options_2 |= | |
1230 | __constant_cpu_to_le32(BIT_18); | |
1231 | ||
618a7523 | 1232 | icb->firmware_options_2 &= __constant_cpu_to_le32(~BIT_22); |
73208dfd | 1233 | icb->firmware_options_2 |= __constant_cpu_to_le32(BIT_23); |
73208dfd AC |
1234 | |
1235 | WRT_REG_DWORD(®->isp25mq.req_q_in, 0); | |
1236 | WRT_REG_DWORD(®->isp25mq.req_q_out, 0); | |
1237 | WRT_REG_DWORD(®->isp25mq.rsp_q_in, 0); | |
1238 | WRT_REG_DWORD(®->isp25mq.rsp_q_out, 0); | |
1239 | } else { | |
1240 | WRT_REG_DWORD(®->isp24.req_q_in, 0); | |
1241 | WRT_REG_DWORD(®->isp24.req_q_out, 0); | |
1242 | WRT_REG_DWORD(®->isp24.rsp_q_in, 0); | |
1243 | WRT_REG_DWORD(®->isp24.rsp_q_out, 0); | |
1244 | } | |
1245 | /* PCI posting */ | |
1246 | RD_REG_DWORD(&ioreg->hccr); | |
0107109e AV |
1247 | } |
1248 | ||
1da177e4 LT |
1249 | /** |
1250 | * qla2x00_init_rings() - Initializes firmware. | |
1251 | * @ha: HA context | |
1252 | * | |
1253 | * Beginning of request ring has initialization control block already built | |
1254 | * by nvram config routine. | |
1255 | * | |
1256 | * Returns 0 on success. | |
1257 | */ | |
1258 | static int | |
e315cd28 | 1259 | qla2x00_init_rings(scsi_qla_host_t *vha) |
1da177e4 LT |
1260 | { |
1261 | int rval; | |
1262 | unsigned long flags = 0; | |
29bdccbe | 1263 | int cnt, que; |
e315cd28 | 1264 | struct qla_hw_data *ha = vha->hw; |
29bdccbe AC |
1265 | struct req_que *req; |
1266 | struct rsp_que *rsp; | |
1267 | struct scsi_qla_host *vp; | |
2c3dfe3f SJ |
1268 | struct mid_init_cb_24xx *mid_init_cb = |
1269 | (struct mid_init_cb_24xx *) ha->init_cb; | |
1da177e4 LT |
1270 | |
1271 | spin_lock_irqsave(&ha->hardware_lock, flags); | |
1272 | ||
1273 | /* Clear outstanding commands array. */ | |
29bdccbe AC |
1274 | for (que = 0; que < ha->max_queues; que++) { |
1275 | req = ha->req_q_map[que]; | |
1276 | if (!req) | |
1277 | continue; | |
1278 | for (cnt = 0; cnt < MAX_OUTSTANDING_COMMANDS; cnt++) | |
1279 | req->outstanding_cmds[cnt] = NULL; | |
1da177e4 | 1280 | |
29bdccbe | 1281 | req->current_outstanding_cmd = 0; |
1da177e4 | 1282 | |
29bdccbe AC |
1283 | /* Initialize firmware. */ |
1284 | req->ring_ptr = req->ring; | |
1285 | req->ring_index = 0; | |
1286 | req->cnt = req->length; | |
1287 | } | |
1da177e4 | 1288 | |
29bdccbe AC |
1289 | for (que = 0; que < ha->max_queues; que++) { |
1290 | rsp = ha->rsp_q_map[que]; | |
1291 | if (!rsp) | |
1292 | continue; | |
1293 | rsp->ring_ptr = rsp->ring; | |
1294 | rsp->ring_index = 0; | |
1da177e4 | 1295 | |
29bdccbe AC |
1296 | /* Initialize response queue entries */ |
1297 | qla2x00_init_response_q_entries(rsp); | |
1298 | } | |
1da177e4 | 1299 | |
29bdccbe AC |
1300 | /* Clear RSCN queue. */ |
1301 | list_for_each_entry(vp, &ha->vp_list, list) { | |
1302 | vp->rscn_in_ptr = 0; | |
1303 | vp->rscn_out_ptr = 0; | |
1304 | } | |
e315cd28 | 1305 | ha->isp_ops->config_rings(vha); |
1da177e4 LT |
1306 | |
1307 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | |
1308 | ||
1309 | /* Update any ISP specific firmware options before initialization. */ | |
e315cd28 | 1310 | ha->isp_ops->update_fw_options(vha); |
1da177e4 | 1311 | |
e315cd28 | 1312 | DEBUG(printk("scsi(%ld): Issue init firmware.\n", vha->host_no)); |
2c3dfe3f | 1313 | |
605aa2bc LC |
1314 | if (ha->flags.npiv_supported) { |
1315 | if (ha->operating_mode == LOOP) | |
1316 | ha->max_npiv_vports = MIN_MULTI_ID_FABRIC - 1; | |
c48339de | 1317 | mid_init_cb->count = cpu_to_le16(ha->max_npiv_vports); |
605aa2bc LC |
1318 | } |
1319 | ||
c48339de | 1320 | |
eb66dc60 | 1321 | mid_init_cb->options = __constant_cpu_to_le16(BIT_1); |
2c3dfe3f | 1322 | |
e315cd28 | 1323 | rval = qla2x00_init_firmware(vha, ha->init_cb_size); |
1da177e4 LT |
1324 | if (rval) { |
1325 | DEBUG2_3(printk("scsi(%ld): Init firmware **** FAILED ****.\n", | |
e315cd28 | 1326 | vha->host_no)); |
1da177e4 LT |
1327 | } else { |
1328 | DEBUG3(printk("scsi(%ld): Init firmware -- success.\n", | |
e315cd28 | 1329 | vha->host_no)); |
1da177e4 LT |
1330 | } |
1331 | ||
1332 | return (rval); | |
1333 | } | |
1334 | ||
1335 | /** | |
1336 | * qla2x00_fw_ready() - Waits for firmware ready. | |
1337 | * @ha: HA context | |
1338 | * | |
1339 | * Returns 0 on success. | |
1340 | */ | |
1341 | static int | |
e315cd28 | 1342 | qla2x00_fw_ready(scsi_qla_host_t *vha) |
1da177e4 LT |
1343 | { |
1344 | int rval; | |
4d4df193 | 1345 | unsigned long wtime, mtime, cs84xx_time; |
1da177e4 LT |
1346 | uint16_t min_wait; /* Minimum wait time if loop is down */ |
1347 | uint16_t wait_time; /* Wait time if loop is coming ready */ | |
4d4df193 | 1348 | uint16_t state[3]; |
e315cd28 | 1349 | struct qla_hw_data *ha = vha->hw; |
1da177e4 LT |
1350 | |
1351 | rval = QLA_SUCCESS; | |
1352 | ||
1353 | /* 20 seconds for loop down. */ | |
fa2a1ce5 | 1354 | min_wait = 20; |
1da177e4 LT |
1355 | |
1356 | /* | |
1357 | * Firmware should take at most one RATOV to login, plus 5 seconds for | |
1358 | * our own processing. | |
1359 | */ | |
1360 | if ((wait_time = (ha->retry_count*ha->login_timeout) + 5) < min_wait) { | |
1361 | wait_time = min_wait; | |
1362 | } | |
1363 | ||
1364 | /* Min wait time if loop down */ | |
1365 | mtime = jiffies + (min_wait * HZ); | |
1366 | ||
1367 | /* wait time before firmware ready */ | |
1368 | wtime = jiffies + (wait_time * HZ); | |
1369 | ||
1370 | /* Wait for ISP to finish LIP */ | |
e315cd28 | 1371 | if (!vha->flags.init_done) |
1da177e4 LT |
1372 | qla_printk(KERN_INFO, ha, "Waiting for LIP to complete...\n"); |
1373 | ||
1374 | DEBUG3(printk("scsi(%ld): Waiting for LIP to complete...\n", | |
e315cd28 | 1375 | vha->host_no)); |
1da177e4 LT |
1376 | |
1377 | do { | |
e315cd28 | 1378 | rval = qla2x00_get_firmware_state(vha, state); |
1da177e4 | 1379 | if (rval == QLA_SUCCESS) { |
4d4df193 | 1380 | if (state[0] < FSTATE_LOSS_OF_SYNC) { |
e315cd28 | 1381 | vha->device_flags &= ~DFLG_NO_CABLE; |
1da177e4 | 1382 | } |
4d4df193 HK |
1383 | if (IS_QLA84XX(ha) && state[0] != FSTATE_READY) { |
1384 | DEBUG16(printk("scsi(%ld): fw_state=%x " | |
e315cd28 | 1385 | "84xx=%x.\n", vha->host_no, state[0], |
4d4df193 HK |
1386 | state[2])); |
1387 | if ((state[2] & FSTATE_LOGGED_IN) && | |
1388 | (state[2] & FSTATE_WAITING_FOR_VERIFY)) { | |
1389 | DEBUG16(printk("scsi(%ld): Sending " | |
e315cd28 | 1390 | "verify iocb.\n", vha->host_no)); |
4d4df193 HK |
1391 | |
1392 | cs84xx_time = jiffies; | |
e315cd28 | 1393 | rval = qla84xx_init_chip(vha); |
4d4df193 HK |
1394 | if (rval != QLA_SUCCESS) |
1395 | break; | |
1396 | ||
1397 | /* Add time taken to initialize. */ | |
1398 | cs84xx_time = jiffies - cs84xx_time; | |
1399 | wtime += cs84xx_time; | |
1400 | mtime += cs84xx_time; | |
1401 | DEBUG16(printk("scsi(%ld): Increasing " | |
1402 | "wait time by %ld. New time %ld\n", | |
e315cd28 | 1403 | vha->host_no, cs84xx_time, wtime)); |
4d4df193 HK |
1404 | } |
1405 | } else if (state[0] == FSTATE_READY) { | |
1da177e4 | 1406 | DEBUG(printk("scsi(%ld): F/W Ready - OK \n", |
e315cd28 | 1407 | vha->host_no)); |
1da177e4 | 1408 | |
e315cd28 | 1409 | qla2x00_get_retry_cnt(vha, &ha->retry_count, |
1da177e4 LT |
1410 | &ha->login_timeout, &ha->r_a_tov); |
1411 | ||
1412 | rval = QLA_SUCCESS; | |
1413 | break; | |
1414 | } | |
1415 | ||
1416 | rval = QLA_FUNCTION_FAILED; | |
1417 | ||
e315cd28 | 1418 | if (atomic_read(&vha->loop_down_timer) && |
4d4df193 | 1419 | state[0] != FSTATE_READY) { |
1da177e4 | 1420 | /* Loop down. Timeout on min_wait for states |
fa2a1ce5 AV |
1421 | * other than Wait for Login. |
1422 | */ | |
1da177e4 LT |
1423 | if (time_after_eq(jiffies, mtime)) { |
1424 | qla_printk(KERN_INFO, ha, | |
1425 | "Cable is unplugged...\n"); | |
1426 | ||
e315cd28 | 1427 | vha->device_flags |= DFLG_NO_CABLE; |
1da177e4 LT |
1428 | break; |
1429 | } | |
1430 | } | |
1431 | } else { | |
1432 | /* Mailbox cmd failed. Timeout on min_wait. */ | |
1433 | if (time_after_eq(jiffies, mtime)) | |
1434 | break; | |
1435 | } | |
1436 | ||
1437 | if (time_after_eq(jiffies, wtime)) | |
1438 | break; | |
1439 | ||
1440 | /* Delay for a while */ | |
1441 | msleep(500); | |
1442 | ||
1443 | DEBUG3(printk("scsi(%ld): fw_state=%x curr time=%lx.\n", | |
e315cd28 | 1444 | vha->host_no, state[0], jiffies)); |
1da177e4 LT |
1445 | } while (1); |
1446 | ||
1447 | DEBUG(printk("scsi(%ld): fw_state=%x curr time=%lx.\n", | |
e315cd28 | 1448 | vha->host_no, state[0], jiffies)); |
1da177e4 LT |
1449 | |
1450 | if (rval) { | |
1451 | DEBUG2_3(printk("scsi(%ld): Firmware ready **** FAILED ****.\n", | |
e315cd28 | 1452 | vha->host_no)); |
1da177e4 LT |
1453 | } |
1454 | ||
1455 | return (rval); | |
1456 | } | |
1457 | ||
1458 | /* | |
1459 | * qla2x00_configure_hba | |
1460 | * Setup adapter context. | |
1461 | * | |
1462 | * Input: | |
1463 | * ha = adapter state pointer. | |
1464 | * | |
1465 | * Returns: | |
1466 | * 0 = success | |
1467 | * | |
1468 | * Context: | |
1469 | * Kernel context. | |
1470 | */ | |
1471 | static int | |
e315cd28 | 1472 | qla2x00_configure_hba(scsi_qla_host_t *vha) |
1da177e4 LT |
1473 | { |
1474 | int rval; | |
1475 | uint16_t loop_id; | |
1476 | uint16_t topo; | |
2c3dfe3f | 1477 | uint16_t sw_cap; |
1da177e4 LT |
1478 | uint8_t al_pa; |
1479 | uint8_t area; | |
1480 | uint8_t domain; | |
1481 | char connect_type[22]; | |
e315cd28 | 1482 | struct qla_hw_data *ha = vha->hw; |
1da177e4 LT |
1483 | |
1484 | /* Get host addresses. */ | |
e315cd28 | 1485 | rval = qla2x00_get_adapter_id(vha, |
2c3dfe3f | 1486 | &loop_id, &al_pa, &area, &domain, &topo, &sw_cap); |
1da177e4 | 1487 | if (rval != QLA_SUCCESS) { |
e315cd28 | 1488 | if (LOOP_TRANSITION(vha) || atomic_read(&ha->loop_down_timer) || |
33135aa2 RA |
1489 | (rval == QLA_COMMAND_ERROR && loop_id == 0x7)) { |
1490 | DEBUG2(printk("%s(%ld) Loop is in a transition state\n", | |
e315cd28 | 1491 | __func__, vha->host_no)); |
33135aa2 RA |
1492 | } else { |
1493 | qla_printk(KERN_WARNING, ha, | |
1494 | "ERROR -- Unable to get host loop ID.\n"); | |
e315cd28 | 1495 | set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); |
33135aa2 | 1496 | } |
1da177e4 LT |
1497 | return (rval); |
1498 | } | |
1499 | ||
1500 | if (topo == 4) { | |
1501 | qla_printk(KERN_INFO, ha, | |
1502 | "Cannot get topology - retrying.\n"); | |
1503 | return (QLA_FUNCTION_FAILED); | |
1504 | } | |
1505 | ||
e315cd28 | 1506 | vha->loop_id = loop_id; |
1da177e4 LT |
1507 | |
1508 | /* initialize */ | |
1509 | ha->min_external_loopid = SNS_FIRST_LOOP_ID; | |
1510 | ha->operating_mode = LOOP; | |
2c3dfe3f | 1511 | ha->switch_cap = 0; |
1da177e4 LT |
1512 | |
1513 | switch (topo) { | |
1514 | case 0: | |
1515 | DEBUG3(printk("scsi(%ld): HBA in NL topology.\n", | |
e315cd28 | 1516 | vha->host_no)); |
1da177e4 LT |
1517 | ha->current_topology = ISP_CFG_NL; |
1518 | strcpy(connect_type, "(Loop)"); | |
1519 | break; | |
1520 | ||
1521 | case 1: | |
1522 | DEBUG3(printk("scsi(%ld): HBA in FL topology.\n", | |
e315cd28 | 1523 | vha->host_no)); |
2c3dfe3f | 1524 | ha->switch_cap = sw_cap; |
1da177e4 LT |
1525 | ha->current_topology = ISP_CFG_FL; |
1526 | strcpy(connect_type, "(FL_Port)"); | |
1527 | break; | |
1528 | ||
1529 | case 2: | |
1530 | DEBUG3(printk("scsi(%ld): HBA in N P2P topology.\n", | |
e315cd28 | 1531 | vha->host_no)); |
1da177e4 LT |
1532 | ha->operating_mode = P2P; |
1533 | ha->current_topology = ISP_CFG_N; | |
1534 | strcpy(connect_type, "(N_Port-to-N_Port)"); | |
1535 | break; | |
1536 | ||
1537 | case 3: | |
1538 | DEBUG3(printk("scsi(%ld): HBA in F P2P topology.\n", | |
e315cd28 | 1539 | vha->host_no)); |
2c3dfe3f | 1540 | ha->switch_cap = sw_cap; |
1da177e4 LT |
1541 | ha->operating_mode = P2P; |
1542 | ha->current_topology = ISP_CFG_F; | |
1543 | strcpy(connect_type, "(F_Port)"); | |
1544 | break; | |
1545 | ||
1546 | default: | |
1547 | DEBUG3(printk("scsi(%ld): HBA in unknown topology %x. " | |
1548 | "Using NL.\n", | |
e315cd28 | 1549 | vha->host_no, topo)); |
1da177e4 LT |
1550 | ha->current_topology = ISP_CFG_NL; |
1551 | strcpy(connect_type, "(Loop)"); | |
1552 | break; | |
1553 | } | |
1554 | ||
1555 | /* Save Host port and loop ID. */ | |
1556 | /* byte order - Big Endian */ | |
e315cd28 AC |
1557 | vha->d_id.b.domain = domain; |
1558 | vha->d_id.b.area = area; | |
1559 | vha->d_id.b.al_pa = al_pa; | |
1da177e4 | 1560 | |
e315cd28 | 1561 | if (!vha->flags.init_done) |
1da177e4 LT |
1562 | qla_printk(KERN_INFO, ha, |
1563 | "Topology - %s, Host Loop address 0x%x\n", | |
e315cd28 | 1564 | connect_type, vha->loop_id); |
1da177e4 LT |
1565 | |
1566 | if (rval) { | |
e315cd28 | 1567 | DEBUG2_3(printk("scsi(%ld): FAILED.\n", vha->host_no)); |
1da177e4 | 1568 | } else { |
e315cd28 | 1569 | DEBUG3(printk("scsi(%ld): exiting normally.\n", vha->host_no)); |
1da177e4 LT |
1570 | } |
1571 | ||
1572 | return(rval); | |
1573 | } | |
1574 | ||
9bb9fcf2 | 1575 | static inline void |
e315cd28 AC |
1576 | qla2x00_set_model_info(scsi_qla_host_t *vha, uint8_t *model, size_t len, |
1577 | char *def) | |
9bb9fcf2 AV |
1578 | { |
1579 | char *st, *en; | |
1580 | uint16_t index; | |
e315cd28 | 1581 | struct qla_hw_data *ha = vha->hw; |
9bb9fcf2 AV |
1582 | |
1583 | if (memcmp(model, BINZERO, len) != 0) { | |
1584 | strncpy(ha->model_number, model, len); | |
1585 | st = en = ha->model_number; | |
1586 | en += len - 1; | |
1587 | while (en > st) { | |
1588 | if (*en != 0x20 && *en != 0x00) | |
1589 | break; | |
1590 | *en-- = '\0'; | |
1591 | } | |
1592 | ||
1593 | index = (ha->pdev->subsystem_device & 0xff); | |
1594 | if (ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC && | |
1595 | index < QLA_MODEL_NAMES) | |
1ee27146 JC |
1596 | strncpy(ha->model_desc, |
1597 | qla2x00_model_name[index * 2 + 1], | |
1598 | sizeof(ha->model_desc) - 1); | |
9bb9fcf2 AV |
1599 | } else { |
1600 | index = (ha->pdev->subsystem_device & 0xff); | |
1601 | if (ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC && | |
1602 | index < QLA_MODEL_NAMES) { | |
1603 | strcpy(ha->model_number, | |
1604 | qla2x00_model_name[index * 2]); | |
1ee27146 JC |
1605 | strncpy(ha->model_desc, |
1606 | qla2x00_model_name[index * 2 + 1], | |
1607 | sizeof(ha->model_desc) - 1); | |
9bb9fcf2 AV |
1608 | } else { |
1609 | strcpy(ha->model_number, def); | |
1610 | } | |
1611 | } | |
1ee27146 | 1612 | if (IS_FWI2_CAPABLE(ha)) |
e315cd28 | 1613 | qla2xxx_get_vpd_field(vha, "\x82", ha->model_desc, |
1ee27146 | 1614 | sizeof(ha->model_desc)); |
9bb9fcf2 AV |
1615 | } |
1616 | ||
4e08df3f DM |
1617 | /* On sparc systems, obtain port and node WWN from firmware |
1618 | * properties. | |
1619 | */ | |
e315cd28 | 1620 | static void qla2xxx_nvram_wwn_from_ofw(scsi_qla_host_t *vha, nvram_t *nv) |
4e08df3f DM |
1621 | { |
1622 | #ifdef CONFIG_SPARC | |
e315cd28 | 1623 | struct qla_hw_data *ha = vha->hw; |
4e08df3f | 1624 | struct pci_dev *pdev = ha->pdev; |
15576bc8 DM |
1625 | struct device_node *dp = pci_device_to_OF_node(pdev); |
1626 | const u8 *val; | |
4e08df3f DM |
1627 | int len; |
1628 | ||
1629 | val = of_get_property(dp, "port-wwn", &len); | |
1630 | if (val && len >= WWN_SIZE) | |
1631 | memcpy(nv->port_name, val, WWN_SIZE); | |
1632 | ||
1633 | val = of_get_property(dp, "node-wwn", &len); | |
1634 | if (val && len >= WWN_SIZE) | |
1635 | memcpy(nv->node_name, val, WWN_SIZE); | |
1636 | #endif | |
1637 | } | |
1638 | ||
1da177e4 LT |
1639 | /* |
1640 | * NVRAM configuration for ISP 2xxx | |
1641 | * | |
1642 | * Input: | |
1643 | * ha = adapter block pointer. | |
1644 | * | |
1645 | * Output: | |
1646 | * initialization control block in response_ring | |
1647 | * host adapters parameters in host adapter block | |
1648 | * | |
1649 | * Returns: | |
1650 | * 0 = success. | |
1651 | */ | |
abbd8870 | 1652 | int |
e315cd28 | 1653 | qla2x00_nvram_config(scsi_qla_host_t *vha) |
1da177e4 | 1654 | { |
4e08df3f | 1655 | int rval; |
0107109e AV |
1656 | uint8_t chksum = 0; |
1657 | uint16_t cnt; | |
1658 | uint8_t *dptr1, *dptr2; | |
e315cd28 | 1659 | struct qla_hw_data *ha = vha->hw; |
0107109e | 1660 | init_cb_t *icb = ha->init_cb; |
281afe19 SJ |
1661 | nvram_t *nv = ha->nvram; |
1662 | uint8_t *ptr = ha->nvram; | |
3d71644c | 1663 | struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; |
1da177e4 | 1664 | |
4e08df3f DM |
1665 | rval = QLA_SUCCESS; |
1666 | ||
1da177e4 | 1667 | /* Determine NVRAM starting address. */ |
0107109e | 1668 | ha->nvram_size = sizeof(nvram_t); |
1da177e4 LT |
1669 | ha->nvram_base = 0; |
1670 | if (!IS_QLA2100(ha) && !IS_QLA2200(ha) && !IS_QLA2300(ha)) | |
1671 | if ((RD_REG_WORD(®->ctrl_status) >> 14) == 1) | |
1672 | ha->nvram_base = 0x80; | |
1673 | ||
1674 | /* Get NVRAM data and calculate checksum. */ | |
e315cd28 | 1675 | ha->isp_ops->read_nvram(vha, ptr, ha->nvram_base, ha->nvram_size); |
0107109e AV |
1676 | for (cnt = 0, chksum = 0; cnt < ha->nvram_size; cnt++) |
1677 | chksum += *ptr++; | |
1da177e4 | 1678 | |
e315cd28 | 1679 | DEBUG5(printk("scsi(%ld): Contents of NVRAM\n", vha->host_no)); |
281afe19 | 1680 | DEBUG5(qla2x00_dump_buffer((uint8_t *)nv, ha->nvram_size)); |
1da177e4 LT |
1681 | |
1682 | /* Bad NVRAM data, set defaults parameters. */ | |
1683 | if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || | |
1684 | nv->id[2] != 'P' || nv->id[3] != ' ' || nv->nvram_version < 1) { | |
1685 | /* Reset NVRAM data. */ | |
1686 | qla_printk(KERN_WARNING, ha, "Inconsistent NVRAM detected: " | |
1687 | "checksum=0x%x id=%c version=0x%x.\n", chksum, nv->id[0], | |
1688 | nv->nvram_version); | |
4e08df3f DM |
1689 | qla_printk(KERN_WARNING, ha, "Falling back to functioning (yet " |
1690 | "invalid -- WWPN) defaults.\n"); | |
1691 | ||
1692 | /* | |
1693 | * Set default initialization control block. | |
1694 | */ | |
1695 | memset(nv, 0, ha->nvram_size); | |
1696 | nv->parameter_block_version = ICB_VERSION; | |
1697 | ||
1698 | if (IS_QLA23XX(ha)) { | |
1699 | nv->firmware_options[0] = BIT_2 | BIT_1; | |
1700 | nv->firmware_options[1] = BIT_7 | BIT_5; | |
1701 | nv->add_firmware_options[0] = BIT_5; | |
1702 | nv->add_firmware_options[1] = BIT_5 | BIT_4; | |
1703 | nv->frame_payload_size = __constant_cpu_to_le16(2048); | |
1704 | nv->special_options[1] = BIT_7; | |
1705 | } else if (IS_QLA2200(ha)) { | |
1706 | nv->firmware_options[0] = BIT_2 | BIT_1; | |
1707 | nv->firmware_options[1] = BIT_7 | BIT_5; | |
1708 | nv->add_firmware_options[0] = BIT_5; | |
1709 | nv->add_firmware_options[1] = BIT_5 | BIT_4; | |
1710 | nv->frame_payload_size = __constant_cpu_to_le16(1024); | |
1711 | } else if (IS_QLA2100(ha)) { | |
1712 | nv->firmware_options[0] = BIT_3 | BIT_1; | |
1713 | nv->firmware_options[1] = BIT_5; | |
1714 | nv->frame_payload_size = __constant_cpu_to_le16(1024); | |
1715 | } | |
1716 | ||
1717 | nv->max_iocb_allocation = __constant_cpu_to_le16(256); | |
1718 | nv->execution_throttle = __constant_cpu_to_le16(16); | |
1719 | nv->retry_count = 8; | |
1720 | nv->retry_delay = 1; | |
1721 | ||
1722 | nv->port_name[0] = 33; | |
1723 | nv->port_name[3] = 224; | |
1724 | nv->port_name[4] = 139; | |
1725 | ||
e315cd28 | 1726 | qla2xxx_nvram_wwn_from_ofw(vha, nv); |
4e08df3f DM |
1727 | |
1728 | nv->login_timeout = 4; | |
1729 | ||
1730 | /* | |
1731 | * Set default host adapter parameters | |
1732 | */ | |
1733 | nv->host_p[1] = BIT_2; | |
1734 | nv->reset_delay = 5; | |
1735 | nv->port_down_retry_count = 8; | |
1736 | nv->max_luns_per_target = __constant_cpu_to_le16(8); | |
1737 | nv->link_down_timeout = 60; | |
1738 | ||
1739 | rval = 1; | |
1da177e4 LT |
1740 | } |
1741 | ||
1742 | #if defined(CONFIG_IA64_GENERIC) || defined(CONFIG_IA64_SGI_SN2) | |
1743 | /* | |
1744 | * The SN2 does not provide BIOS emulation which means you can't change | |
1745 | * potentially bogus BIOS settings. Force the use of default settings | |
1746 | * for link rate and frame size. Hope that the rest of the settings | |
1747 | * are valid. | |
1748 | */ | |
1749 | if (ia64_platform_is("sn2")) { | |
1750 | nv->frame_payload_size = __constant_cpu_to_le16(2048); | |
1751 | if (IS_QLA23XX(ha)) | |
1752 | nv->special_options[1] = BIT_7; | |
1753 | } | |
1754 | #endif | |
1755 | ||
1756 | /* Reset Initialization control block */ | |
0107109e | 1757 | memset(icb, 0, ha->init_cb_size); |
1da177e4 LT |
1758 | |
1759 | /* | |
1760 | * Setup driver NVRAM options. | |
1761 | */ | |
1762 | nv->firmware_options[0] |= (BIT_6 | BIT_1); | |
1763 | nv->firmware_options[0] &= ~(BIT_5 | BIT_4); | |
1764 | nv->firmware_options[1] |= (BIT_5 | BIT_0); | |
1765 | nv->firmware_options[1] &= ~BIT_4; | |
1766 | ||
1767 | if (IS_QLA23XX(ha)) { | |
1768 | nv->firmware_options[0] |= BIT_2; | |
1769 | nv->firmware_options[0] &= ~BIT_3; | |
0107109e | 1770 | nv->add_firmware_options[1] |= BIT_5 | BIT_4; |
1da177e4 LT |
1771 | |
1772 | if (IS_QLA2300(ha)) { | |
1773 | if (ha->fb_rev == FPM_2310) { | |
1774 | strcpy(ha->model_number, "QLA2310"); | |
1775 | } else { | |
1776 | strcpy(ha->model_number, "QLA2300"); | |
1777 | } | |
1778 | } else { | |
e315cd28 | 1779 | qla2x00_set_model_info(vha, nv->model_number, |
9bb9fcf2 | 1780 | sizeof(nv->model_number), "QLA23xx"); |
1da177e4 LT |
1781 | } |
1782 | } else if (IS_QLA2200(ha)) { | |
1783 | nv->firmware_options[0] |= BIT_2; | |
1784 | /* | |
1785 | * 'Point-to-point preferred, else loop' is not a safe | |
1786 | * connection mode setting. | |
1787 | */ | |
1788 | if ((nv->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) == | |
1789 | (BIT_5 | BIT_4)) { | |
1790 | /* Force 'loop preferred, else point-to-point'. */ | |
1791 | nv->add_firmware_options[0] &= ~(BIT_6 | BIT_5 | BIT_4); | |
1792 | nv->add_firmware_options[0] |= BIT_5; | |
1793 | } | |
1794 | strcpy(ha->model_number, "QLA22xx"); | |
1795 | } else /*if (IS_QLA2100(ha))*/ { | |
1796 | strcpy(ha->model_number, "QLA2100"); | |
1797 | } | |
1798 | ||
1799 | /* | |
1800 | * Copy over NVRAM RISC parameter block to initialization control block. | |
1801 | */ | |
1802 | dptr1 = (uint8_t *)icb; | |
1803 | dptr2 = (uint8_t *)&nv->parameter_block_version; | |
1804 | cnt = (uint8_t *)&icb->request_q_outpointer - (uint8_t *)&icb->version; | |
1805 | while (cnt--) | |
1806 | *dptr1++ = *dptr2++; | |
1807 | ||
1808 | /* Copy 2nd half. */ | |
1809 | dptr1 = (uint8_t *)icb->add_firmware_options; | |
1810 | cnt = (uint8_t *)icb->reserved_3 - (uint8_t *)icb->add_firmware_options; | |
1811 | while (cnt--) | |
1812 | *dptr1++ = *dptr2++; | |
1813 | ||
5341e868 AV |
1814 | /* Use alternate WWN? */ |
1815 | if (nv->host_p[1] & BIT_7) { | |
1816 | memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE); | |
1817 | memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE); | |
1818 | } | |
1819 | ||
1da177e4 LT |
1820 | /* Prepare nodename */ |
1821 | if ((icb->firmware_options[1] & BIT_6) == 0) { | |
1822 | /* | |
1823 | * Firmware will apply the following mask if the nodename was | |
1824 | * not provided. | |
1825 | */ | |
1826 | memcpy(icb->node_name, icb->port_name, WWN_SIZE); | |
1827 | icb->node_name[0] &= 0xF0; | |
1828 | } | |
1829 | ||
1830 | /* | |
1831 | * Set host adapter parameters. | |
1832 | */ | |
0181944f | 1833 | if (nv->host_p[0] & BIT_7) |
11010fec | 1834 | ql2xextended_error_logging = 1; |
1da177e4 LT |
1835 | ha->flags.disable_risc_code_load = ((nv->host_p[0] & BIT_4) ? 1 : 0); |
1836 | /* Always load RISC code on non ISP2[12]00 chips. */ | |
1837 | if (!IS_QLA2100(ha) && !IS_QLA2200(ha)) | |
1838 | ha->flags.disable_risc_code_load = 0; | |
1839 | ha->flags.enable_lip_reset = ((nv->host_p[1] & BIT_1) ? 1 : 0); | |
1840 | ha->flags.enable_lip_full_login = ((nv->host_p[1] & BIT_2) ? 1 : 0); | |
1841 | ha->flags.enable_target_reset = ((nv->host_p[1] & BIT_3) ? 1 : 0); | |
06c22bd1 | 1842 | ha->flags.enable_led_scheme = (nv->special_options[1] & BIT_4) ? 1 : 0; |
d4c760c2 | 1843 | ha->flags.disable_serdes = 0; |
1da177e4 LT |
1844 | |
1845 | ha->operating_mode = | |
1846 | (icb->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) >> 4; | |
1847 | ||
1848 | memcpy(ha->fw_seriallink_options, nv->seriallink_options, | |
1849 | sizeof(ha->fw_seriallink_options)); | |
1850 | ||
1851 | /* save HBA serial number */ | |
1852 | ha->serial0 = icb->port_name[5]; | |
1853 | ha->serial1 = icb->port_name[6]; | |
1854 | ha->serial2 = icb->port_name[7]; | |
e315cd28 AC |
1855 | memcpy(vha->node_name, icb->node_name, WWN_SIZE); |
1856 | memcpy(vha->port_name, icb->port_name, WWN_SIZE); | |
1da177e4 LT |
1857 | |
1858 | icb->execution_throttle = __constant_cpu_to_le16(0xFFFF); | |
1859 | ||
1860 | ha->retry_count = nv->retry_count; | |
1861 | ||
1862 | /* Set minimum login_timeout to 4 seconds. */ | |
1863 | if (nv->login_timeout < ql2xlogintimeout) | |
1864 | nv->login_timeout = ql2xlogintimeout; | |
1865 | if (nv->login_timeout < 4) | |
1866 | nv->login_timeout = 4; | |
1867 | ha->login_timeout = nv->login_timeout; | |
1868 | icb->login_timeout = nv->login_timeout; | |
1869 | ||
00a537b8 AV |
1870 | /* Set minimum RATOV to 100 tenths of a second. */ |
1871 | ha->r_a_tov = 100; | |
1da177e4 | 1872 | |
1da177e4 LT |
1873 | ha->loop_reset_delay = nv->reset_delay; |
1874 | ||
1da177e4 LT |
1875 | /* Link Down Timeout = 0: |
1876 | * | |
1877 | * When Port Down timer expires we will start returning | |
1878 | * I/O's to OS with "DID_NO_CONNECT". | |
1879 | * | |
1880 | * Link Down Timeout != 0: | |
1881 | * | |
1882 | * The driver waits for the link to come up after link down | |
1883 | * before returning I/Os to OS with "DID_NO_CONNECT". | |
fa2a1ce5 | 1884 | */ |
1da177e4 LT |
1885 | if (nv->link_down_timeout == 0) { |
1886 | ha->loop_down_abort_time = | |
354d6b21 | 1887 | (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT); |
1da177e4 LT |
1888 | } else { |
1889 | ha->link_down_timeout = nv->link_down_timeout; | |
1890 | ha->loop_down_abort_time = | |
1891 | (LOOP_DOWN_TIME - ha->link_down_timeout); | |
fa2a1ce5 | 1892 | } |
1da177e4 | 1893 | |
1da177e4 LT |
1894 | /* |
1895 | * Need enough time to try and get the port back. | |
1896 | */ | |
1897 | ha->port_down_retry_count = nv->port_down_retry_count; | |
1898 | if (qlport_down_retry) | |
1899 | ha->port_down_retry_count = qlport_down_retry; | |
1900 | /* Set login_retry_count */ | |
1901 | ha->login_retry_count = nv->retry_count; | |
1902 | if (ha->port_down_retry_count == nv->port_down_retry_count && | |
1903 | ha->port_down_retry_count > 3) | |
1904 | ha->login_retry_count = ha->port_down_retry_count; | |
1905 | else if (ha->port_down_retry_count > (int)ha->login_retry_count) | |
1906 | ha->login_retry_count = ha->port_down_retry_count; | |
1907 | if (ql2xloginretrycount) | |
1908 | ha->login_retry_count = ql2xloginretrycount; | |
1909 | ||
1da177e4 LT |
1910 | icb->lun_enables = __constant_cpu_to_le16(0); |
1911 | icb->command_resource_count = 0; | |
1912 | icb->immediate_notify_resource_count = 0; | |
1913 | icb->timeout = __constant_cpu_to_le16(0); | |
1914 | ||
1915 | if (IS_QLA2100(ha) || IS_QLA2200(ha)) { | |
1916 | /* Enable RIO */ | |
1917 | icb->firmware_options[0] &= ~BIT_3; | |
1918 | icb->add_firmware_options[0] &= | |
1919 | ~(BIT_3 | BIT_2 | BIT_1 | BIT_0); | |
1920 | icb->add_firmware_options[0] |= BIT_2; | |
1921 | icb->response_accumulation_timer = 3; | |
1922 | icb->interrupt_delay_timer = 5; | |
1923 | ||
e315cd28 | 1924 | vha->flags.process_response_queue = 1; |
1da177e4 | 1925 | } else { |
4fdfefe5 | 1926 | /* Enable ZIO. */ |
e315cd28 | 1927 | if (!vha->flags.init_done) { |
4fdfefe5 AV |
1928 | ha->zio_mode = icb->add_firmware_options[0] & |
1929 | (BIT_3 | BIT_2 | BIT_1 | BIT_0); | |
1930 | ha->zio_timer = icb->interrupt_delay_timer ? | |
1931 | icb->interrupt_delay_timer: 2; | |
1932 | } | |
1da177e4 LT |
1933 | icb->add_firmware_options[0] &= |
1934 | ~(BIT_3 | BIT_2 | BIT_1 | BIT_0); | |
e315cd28 | 1935 | vha->flags.process_response_queue = 0; |
4fdfefe5 | 1936 | if (ha->zio_mode != QLA_ZIO_DISABLED) { |
4a59f71d | 1937 | ha->zio_mode = QLA_ZIO_MODE_6; |
1938 | ||
4fdfefe5 | 1939 | DEBUG2(printk("scsi(%ld): ZIO mode %d enabled; timer " |
e315cd28 | 1940 | "delay (%d us).\n", vha->host_no, ha->zio_mode, |
4fdfefe5 | 1941 | ha->zio_timer * 100)); |
1da177e4 | 1942 | qla_printk(KERN_INFO, ha, |
4fdfefe5 AV |
1943 | "ZIO mode %d enabled; timer delay (%d us).\n", |
1944 | ha->zio_mode, ha->zio_timer * 100); | |
1da177e4 | 1945 | |
4fdfefe5 AV |
1946 | icb->add_firmware_options[0] |= (uint8_t)ha->zio_mode; |
1947 | icb->interrupt_delay_timer = (uint8_t)ha->zio_timer; | |
e315cd28 | 1948 | vha->flags.process_response_queue = 1; |
1da177e4 LT |
1949 | } |
1950 | } | |
1951 | ||
4e08df3f DM |
1952 | if (rval) { |
1953 | DEBUG2_3(printk(KERN_WARNING | |
e315cd28 | 1954 | "scsi(%ld): NVRAM configuration failed!\n", vha->host_no)); |
4e08df3f DM |
1955 | } |
1956 | return (rval); | |
1da177e4 LT |
1957 | } |
1958 | ||
19a7b4ae JSEC |
1959 | static void |
1960 | qla2x00_rport_del(void *data) | |
1961 | { | |
1962 | fc_port_t *fcport = data; | |
d97994dc | 1963 | struct fc_rport *rport; |
d97994dc | 1964 | |
e315cd28 | 1965 | spin_lock_irq(fcport->vha->host->host_lock); |
d97994dc | 1966 | rport = fcport->drport; |
1967 | fcport->drport = NULL; | |
e315cd28 | 1968 | spin_unlock_irq(fcport->vha->host->host_lock); |
d97994dc | 1969 | if (rport) |
1970 | fc_remote_port_delete(rport); | |
19a7b4ae JSEC |
1971 | } |
1972 | ||
1da177e4 LT |
1973 | /** |
1974 | * qla2x00_alloc_fcport() - Allocate a generic fcport. | |
1975 | * @ha: HA context | |
1976 | * @flags: allocation flags | |
1977 | * | |
1978 | * Returns a pointer to the allocated fcport, or NULL, if none available. | |
1979 | */ | |
413975a0 | 1980 | static fc_port_t * |
e315cd28 | 1981 | qla2x00_alloc_fcport(scsi_qla_host_t *vha, gfp_t flags) |
1da177e4 LT |
1982 | { |
1983 | fc_port_t *fcport; | |
1984 | ||
bbfbbbc1 MK |
1985 | fcport = kzalloc(sizeof(fc_port_t), flags); |
1986 | if (!fcport) | |
1987 | return NULL; | |
1da177e4 LT |
1988 | |
1989 | /* Setup fcport template structure. */ | |
e315cd28 AC |
1990 | fcport->vha = vha; |
1991 | fcport->vp_idx = vha->vp_idx; | |
1da177e4 LT |
1992 | fcport->port_type = FCT_UNKNOWN; |
1993 | fcport->loop_id = FC_NO_LOOP_ID; | |
1da177e4 LT |
1994 | atomic_set(&fcport->state, FCS_UNCONFIGURED); |
1995 | fcport->flags = FCF_RLC_SUPPORT; | |
ad3e0eda | 1996 | fcport->supported_classes = FC_COS_UNSPECIFIED; |
1da177e4 | 1997 | |
bbfbbbc1 | 1998 | return fcport; |
1da177e4 LT |
1999 | } |
2000 | ||
2001 | /* | |
2002 | * qla2x00_configure_loop | |
2003 | * Updates Fibre Channel Device Database with what is actually on loop. | |
2004 | * | |
2005 | * Input: | |
2006 | * ha = adapter block pointer. | |
2007 | * | |
2008 | * Returns: | |
2009 | * 0 = success. | |
2010 | * 1 = error. | |
2011 | * 2 = database was full and device was not configured. | |
2012 | */ | |
2013 | static int | |
e315cd28 | 2014 | qla2x00_configure_loop(scsi_qla_host_t *vha) |
1da177e4 LT |
2015 | { |
2016 | int rval; | |
2017 | unsigned long flags, save_flags; | |
e315cd28 | 2018 | struct qla_hw_data *ha = vha->hw; |
1da177e4 LT |
2019 | rval = QLA_SUCCESS; |
2020 | ||
2021 | /* Get Initiator ID */ | |
e315cd28 AC |
2022 | if (test_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags)) { |
2023 | rval = qla2x00_configure_hba(vha); | |
1da177e4 LT |
2024 | if (rval != QLA_SUCCESS) { |
2025 | DEBUG(printk("scsi(%ld): Unable to configure HBA.\n", | |
e315cd28 | 2026 | vha->host_no)); |
1da177e4 LT |
2027 | return (rval); |
2028 | } | |
2029 | } | |
2030 | ||
e315cd28 | 2031 | save_flags = flags = vha->dpc_flags; |
1da177e4 | 2032 | DEBUG(printk("scsi(%ld): Configure loop -- dpc flags =0x%lx\n", |
e315cd28 | 2033 | vha->host_no, flags)); |
1da177e4 LT |
2034 | |
2035 | /* | |
2036 | * If we have both an RSCN and PORT UPDATE pending then handle them | |
2037 | * both at the same time. | |
2038 | */ | |
e315cd28 AC |
2039 | clear_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); |
2040 | clear_bit(RSCN_UPDATE, &vha->dpc_flags); | |
1da177e4 LT |
2041 | |
2042 | /* Determine what we need to do */ | |
2043 | if (ha->current_topology == ISP_CFG_FL && | |
2044 | (test_bit(LOCAL_LOOP_UPDATE, &flags))) { | |
2045 | ||
e315cd28 | 2046 | vha->flags.rscn_queue_overflow = 1; |
1da177e4 LT |
2047 | set_bit(RSCN_UPDATE, &flags); |
2048 | ||
2049 | } else if (ha->current_topology == ISP_CFG_F && | |
2050 | (test_bit(LOCAL_LOOP_UPDATE, &flags))) { | |
2051 | ||
e315cd28 | 2052 | vha->flags.rscn_queue_overflow = 1; |
1da177e4 LT |
2053 | set_bit(RSCN_UPDATE, &flags); |
2054 | clear_bit(LOCAL_LOOP_UPDATE, &flags); | |
21333b48 AV |
2055 | |
2056 | } else if (ha->current_topology == ISP_CFG_N) { | |
2057 | clear_bit(RSCN_UPDATE, &flags); | |
1da177e4 | 2058 | |
e315cd28 | 2059 | } else if (!vha->flags.online || |
1da177e4 LT |
2060 | (test_bit(ABORT_ISP_ACTIVE, &flags))) { |
2061 | ||
e315cd28 | 2062 | vha->flags.rscn_queue_overflow = 1; |
1da177e4 LT |
2063 | set_bit(RSCN_UPDATE, &flags); |
2064 | set_bit(LOCAL_LOOP_UPDATE, &flags); | |
2065 | } | |
2066 | ||
2067 | if (test_bit(LOCAL_LOOP_UPDATE, &flags)) { | |
e315cd28 | 2068 | if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) |
1da177e4 | 2069 | rval = QLA_FUNCTION_FAILED; |
e315cd28 AC |
2070 | else |
2071 | rval = qla2x00_configure_local_loop(vha); | |
1da177e4 LT |
2072 | } |
2073 | ||
2074 | if (rval == QLA_SUCCESS && test_bit(RSCN_UPDATE, &flags)) { | |
e315cd28 | 2075 | if (LOOP_TRANSITION(vha)) |
1da177e4 | 2076 | rval = QLA_FUNCTION_FAILED; |
e315cd28 AC |
2077 | else |
2078 | rval = qla2x00_configure_fabric(vha); | |
1da177e4 LT |
2079 | } |
2080 | ||
2081 | if (rval == QLA_SUCCESS) { | |
e315cd28 AC |
2082 | if (atomic_read(&vha->loop_down_timer) || |
2083 | test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) { | |
1da177e4 LT |
2084 | rval = QLA_FUNCTION_FAILED; |
2085 | } else { | |
e315cd28 | 2086 | atomic_set(&vha->loop_state, LOOP_READY); |
1da177e4 | 2087 | |
e315cd28 | 2088 | DEBUG(printk("scsi(%ld): LOOP READY\n", vha->host_no)); |
1da177e4 LT |
2089 | } |
2090 | } | |
2091 | ||
2092 | if (rval) { | |
2093 | DEBUG2_3(printk("%s(%ld): *** FAILED ***\n", | |
e315cd28 | 2094 | __func__, vha->host_no)); |
1da177e4 LT |
2095 | } else { |
2096 | DEBUG3(printk("%s: exiting normally\n", __func__)); | |
2097 | } | |
2098 | ||
cc3ef7bc | 2099 | /* Restore state if a resync event occurred during processing */ |
e315cd28 | 2100 | if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) { |
1da177e4 | 2101 | if (test_bit(LOCAL_LOOP_UPDATE, &save_flags)) |
e315cd28 | 2102 | set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); |
73208dfd | 2103 | if (test_bit(RSCN_UPDATE, &save_flags)) |
e315cd28 | 2104 | set_bit(RSCN_UPDATE, &vha->dpc_flags); |
1da177e4 LT |
2105 | } |
2106 | ||
2107 | return (rval); | |
2108 | } | |
2109 | ||
2110 | ||
2111 | ||
2112 | /* | |
2113 | * qla2x00_configure_local_loop | |
2114 | * Updates Fibre Channel Device Database with local loop devices. | |
2115 | * | |
2116 | * Input: | |
2117 | * ha = adapter block pointer. | |
2118 | * | |
2119 | * Returns: | |
2120 | * 0 = success. | |
2121 | */ | |
2122 | static int | |
e315cd28 | 2123 | qla2x00_configure_local_loop(scsi_qla_host_t *vha) |
1da177e4 LT |
2124 | { |
2125 | int rval, rval2; | |
2126 | int found_devs; | |
2127 | int found; | |
2128 | fc_port_t *fcport, *new_fcport; | |
2129 | ||
2130 | uint16_t index; | |
2131 | uint16_t entries; | |
2132 | char *id_iter; | |
2133 | uint16_t loop_id; | |
2134 | uint8_t domain, area, al_pa; | |
e315cd28 | 2135 | struct qla_hw_data *ha = vha->hw; |
1da177e4 LT |
2136 | |
2137 | found_devs = 0; | |
2138 | new_fcport = NULL; | |
2139 | entries = MAX_FIBRE_DEVICES; | |
2140 | ||
e315cd28 AC |
2141 | DEBUG3(printk("scsi(%ld): Getting FCAL position map\n", vha->host_no)); |
2142 | DEBUG3(qla2x00_get_fcal_position_map(vha, NULL)); | |
1da177e4 LT |
2143 | |
2144 | /* Get list of logged in devices. */ | |
2145 | memset(ha->gid_list, 0, GID_LIST_SIZE); | |
e315cd28 | 2146 | rval = qla2x00_get_id_list(vha, ha->gid_list, ha->gid_list_dma, |
1da177e4 LT |
2147 | &entries); |
2148 | if (rval != QLA_SUCCESS) | |
2149 | goto cleanup_allocation; | |
2150 | ||
2151 | DEBUG3(printk("scsi(%ld): Entries in ID list (%d)\n", | |
2152 | ha->host_no, entries)); | |
2153 | DEBUG3(qla2x00_dump_buffer((uint8_t *)ha->gid_list, | |
2154 | entries * sizeof(struct gid_list_info))); | |
2155 | ||
2156 | /* Allocate temporary fcport for any new fcports discovered. */ | |
e315cd28 | 2157 | new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); |
1da177e4 LT |
2158 | if (new_fcport == NULL) { |
2159 | rval = QLA_MEMORY_ALLOC_FAILED; | |
2160 | goto cleanup_allocation; | |
2161 | } | |
2162 | new_fcport->flags &= ~FCF_FABRIC_DEVICE; | |
2163 | ||
2164 | /* | |
2165 | * Mark local devices that were present with FCF_DEVICE_LOST for now. | |
2166 | */ | |
e315cd28 | 2167 | list_for_each_entry(fcport, &vha->vp_fcports, list) { |
1da177e4 LT |
2168 | if (atomic_read(&fcport->state) == FCS_ONLINE && |
2169 | fcport->port_type != FCT_BROADCAST && | |
2170 | (fcport->flags & FCF_FABRIC_DEVICE) == 0) { | |
2171 | ||
2172 | DEBUG(printk("scsi(%ld): Marking port lost, " | |
2173 | "loop_id=0x%04x\n", | |
e315cd28 | 2174 | vha->host_no, fcport->loop_id)); |
1da177e4 LT |
2175 | |
2176 | atomic_set(&fcport->state, FCS_DEVICE_LOST); | |
2177 | fcport->flags &= ~FCF_FARP_DONE; | |
2178 | } | |
2179 | } | |
2180 | ||
2181 | /* Add devices to port list. */ | |
2182 | id_iter = (char *)ha->gid_list; | |
2183 | for (index = 0; index < entries; index++) { | |
2184 | domain = ((struct gid_list_info *)id_iter)->domain; | |
2185 | area = ((struct gid_list_info *)id_iter)->area; | |
2186 | al_pa = ((struct gid_list_info *)id_iter)->al_pa; | |
abbd8870 | 2187 | if (IS_QLA2100(ha) || IS_QLA2200(ha)) |
1da177e4 LT |
2188 | loop_id = (uint16_t) |
2189 | ((struct gid_list_info *)id_iter)->loop_id_2100; | |
abbd8870 | 2190 | else |
1da177e4 LT |
2191 | loop_id = le16_to_cpu( |
2192 | ((struct gid_list_info *)id_iter)->loop_id); | |
abbd8870 | 2193 | id_iter += ha->gid_list_info_size; |
1da177e4 LT |
2194 | |
2195 | /* Bypass reserved domain fields. */ | |
2196 | if ((domain & 0xf0) == 0xf0) | |
2197 | continue; | |
2198 | ||
2199 | /* Bypass if not same domain and area of adapter. */ | |
f7d289f6 | 2200 | if (area && domain && |
e315cd28 | 2201 | (area != vha->d_id.b.area || domain != vha->d_id.b.domain)) |
1da177e4 LT |
2202 | continue; |
2203 | ||
2204 | /* Bypass invalid local loop ID. */ | |
2205 | if (loop_id > LAST_LOCAL_LOOP_ID) | |
2206 | continue; | |
2207 | ||
2208 | /* Fill in member data. */ | |
2209 | new_fcport->d_id.b.domain = domain; | |
2210 | new_fcport->d_id.b.area = area; | |
2211 | new_fcport->d_id.b.al_pa = al_pa; | |
2212 | new_fcport->loop_id = loop_id; | |
e315cd28 AC |
2213 | new_fcport->vp_idx = vha->vp_idx; |
2214 | rval2 = qla2x00_get_port_database(vha, new_fcport, 0); | |
1da177e4 LT |
2215 | if (rval2 != QLA_SUCCESS) { |
2216 | DEBUG2(printk("scsi(%ld): Failed to retrieve fcport " | |
2217 | "information -- get_port_database=%x, " | |
2218 | "loop_id=0x%04x\n", | |
e315cd28 | 2219 | vha->host_no, rval2, new_fcport->loop_id)); |
c9d02acf | 2220 | DEBUG2(printk("scsi(%ld): Scheduling resync...\n", |
e315cd28 AC |
2221 | vha->host_no)); |
2222 | set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); | |
1da177e4 LT |
2223 | continue; |
2224 | } | |
2225 | ||
2226 | /* Check for matching device in port list. */ | |
2227 | found = 0; | |
2228 | fcport = NULL; | |
e315cd28 | 2229 | list_for_each_entry(fcport, &vha->vp_fcports, list) { |
1da177e4 LT |
2230 | if (memcmp(new_fcport->port_name, fcport->port_name, |
2231 | WWN_SIZE)) | |
2232 | continue; | |
2233 | ||
2234 | fcport->flags &= ~(FCF_FABRIC_DEVICE | | |
2235 | FCF_PERSISTENT_BOUND); | |
2236 | fcport->loop_id = new_fcport->loop_id; | |
2237 | fcport->port_type = new_fcport->port_type; | |
2238 | fcport->d_id.b24 = new_fcport->d_id.b24; | |
2239 | memcpy(fcport->node_name, new_fcport->node_name, | |
2240 | WWN_SIZE); | |
2241 | ||
2242 | found++; | |
2243 | break; | |
2244 | } | |
2245 | ||
2246 | if (!found) { | |
2247 | /* New device, add to fcports list. */ | |
2248 | new_fcport->flags &= ~FCF_PERSISTENT_BOUND; | |
e315cd28 AC |
2249 | if (vha->vp_idx) { |
2250 | new_fcport->vha = vha; | |
2251 | new_fcport->vp_idx = vha->vp_idx; | |
2c3dfe3f | 2252 | } |
e315cd28 | 2253 | list_add_tail(&new_fcport->list, &vha->vp_fcports); |
1da177e4 LT |
2254 | |
2255 | /* Allocate a new replacement fcport. */ | |
2256 | fcport = new_fcport; | |
e315cd28 | 2257 | new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); |
1da177e4 LT |
2258 | if (new_fcport == NULL) { |
2259 | rval = QLA_MEMORY_ALLOC_FAILED; | |
2260 | goto cleanup_allocation; | |
2261 | } | |
2262 | new_fcport->flags &= ~FCF_FABRIC_DEVICE; | |
2263 | } | |
2264 | ||
d8b45213 | 2265 | /* Base iIDMA settings on HBA port speed. */ |
a3cbdfad | 2266 | fcport->fp_speed = ha->link_data_rate; |
d8b45213 | 2267 | |
e315cd28 | 2268 | qla2x00_update_fcport(vha, fcport); |
1da177e4 LT |
2269 | |
2270 | found_devs++; | |
2271 | } | |
2272 | ||
2273 | cleanup_allocation: | |
c9475cb0 | 2274 | kfree(new_fcport); |
1da177e4 LT |
2275 | |
2276 | if (rval != QLA_SUCCESS) { | |
2277 | DEBUG2(printk("scsi(%ld): Configure local loop error exit: " | |
e315cd28 | 2278 | "rval=%x\n", vha->host_no, rval)); |
1da177e4 LT |
2279 | } |
2280 | ||
2281 | if (found_devs) { | |
e315cd28 AC |
2282 | vha->device_flags |= DFLG_LOCAL_DEVICES; |
2283 | vha->device_flags &= ~DFLG_RETRY_LOCAL_DEVICES; | |
1da177e4 LT |
2284 | } |
2285 | ||
2286 | return (rval); | |
2287 | } | |
2288 | ||
d8b45213 | 2289 | static void |
e315cd28 | 2290 | qla2x00_iidma_fcport(scsi_qla_host_t *vha, fc_port_t *fcport) |
d8b45213 AV |
2291 | { |
2292 | #define LS_UNKNOWN 2 | |
a3cbdfad | 2293 | static char *link_speeds[5] = { "1", "2", "?", "4", "8" }; |
d8b45213 | 2294 | int rval; |
a3cbdfad | 2295 | uint16_t mb[6]; |
e315cd28 | 2296 | struct qla_hw_data *ha = vha->hw; |
d8b45213 | 2297 | |
c76f2c01 | 2298 | if (!IS_IIDMA_CAPABLE(ha)) |
d8b45213 AV |
2299 | return; |
2300 | ||
39bd9622 AV |
2301 | if (fcport->fp_speed == PORT_SPEED_UNKNOWN || |
2302 | fcport->fp_speed > ha->link_data_rate) | |
d8b45213 AV |
2303 | return; |
2304 | ||
e315cd28 | 2305 | rval = qla2x00_set_idma_speed(vha, fcport->loop_id, fcport->fp_speed, |
a3cbdfad | 2306 | mb); |
d8b45213 AV |
2307 | if (rval != QLA_SUCCESS) { |
2308 | DEBUG2(printk("scsi(%ld): Unable to adjust iIDMA " | |
2309 | "%02x%02x%02x%02x%02x%02x%02x%02x -- %04x %x %04x %04x.\n", | |
e315cd28 | 2310 | vha->host_no, fcport->port_name[0], fcport->port_name[1], |
d8b45213 AV |
2311 | fcport->port_name[2], fcport->port_name[3], |
2312 | fcport->port_name[4], fcport->port_name[5], | |
2313 | fcport->port_name[6], fcport->port_name[7], rval, | |
a3cbdfad | 2314 | fcport->fp_speed, mb[0], mb[1])); |
d8b45213 AV |
2315 | } else { |
2316 | DEBUG2(qla_printk(KERN_INFO, ha, | |
2317 | "iIDMA adjusted to %s GB/s on " | |
2318 | "%02x%02x%02x%02x%02x%02x%02x%02x.\n", | |
a3cbdfad | 2319 | link_speeds[fcport->fp_speed], fcport->port_name[0], |
d8b45213 AV |
2320 | fcport->port_name[1], fcport->port_name[2], |
2321 | fcport->port_name[3], fcport->port_name[4], | |
2322 | fcport->port_name[5], fcport->port_name[6], | |
2323 | fcport->port_name[7])); | |
2324 | } | |
2325 | } | |
2326 | ||
23be331d | 2327 | static void |
e315cd28 | 2328 | qla2x00_reg_remote_port(scsi_qla_host_t *vha, fc_port_t *fcport) |
8482e118 | 2329 | { |
2330 | struct fc_rport_identifiers rport_ids; | |
bdf79621 | 2331 | struct fc_rport *rport; |
e315cd28 | 2332 | struct qla_hw_data *ha = vha->hw; |
8482e118 | 2333 | |
d97994dc | 2334 | if (fcport->drport) |
2335 | qla2x00_rport_del(fcport); | |
8482e118 | 2336 | |
f8b02a85 AV |
2337 | rport_ids.node_name = wwn_to_u64(fcport->node_name); |
2338 | rport_ids.port_name = wwn_to_u64(fcport->port_name); | |
8482e118 | 2339 | rport_ids.port_id = fcport->d_id.b.domain << 16 | |
2340 | fcport->d_id.b.area << 8 | fcport->d_id.b.al_pa; | |
77d74143 | 2341 | rport_ids.roles = FC_RPORT_ROLE_UNKNOWN; |
e315cd28 | 2342 | fcport->rport = rport = fc_remote_port_add(vha->host, 0, &rport_ids); |
77d74143 AV |
2343 | if (!rport) { |
2344 | qla_printk(KERN_WARNING, ha, | |
2345 | "Unable to allocate fc remote port!\n"); | |
2346 | return; | |
2347 | } | |
e315cd28 | 2348 | spin_lock_irq(fcport->vha->host->host_lock); |
19a7b4ae | 2349 | *((fc_port_t **)rport->dd_data) = fcport; |
e315cd28 | 2350 | spin_unlock_irq(fcport->vha->host->host_lock); |
d97994dc | 2351 | |
ad3e0eda | 2352 | rport->supported_classes = fcport->supported_classes; |
77d74143 | 2353 | |
8482e118 | 2354 | rport_ids.roles = FC_RPORT_ROLE_UNKNOWN; |
2355 | if (fcport->port_type == FCT_INITIATOR) | |
2356 | rport_ids.roles |= FC_RPORT_ROLE_FCP_INITIATOR; | |
2357 | if (fcport->port_type == FCT_TARGET) | |
2358 | rport_ids.roles |= FC_RPORT_ROLE_FCP_TARGET; | |
77d74143 | 2359 | fc_remote_port_rolechg(rport, rport_ids.roles); |
1da177e4 LT |
2360 | } |
2361 | ||
23be331d AB |
2362 | /* |
2363 | * qla2x00_update_fcport | |
2364 | * Updates device on list. | |
2365 | * | |
2366 | * Input: | |
2367 | * ha = adapter block pointer. | |
2368 | * fcport = port structure pointer. | |
2369 | * | |
2370 | * Return: | |
2371 | * 0 - Success | |
2372 | * BIT_0 - error | |
2373 | * | |
2374 | * Context: | |
2375 | * Kernel context. | |
2376 | */ | |
2377 | void | |
e315cd28 | 2378 | qla2x00_update_fcport(scsi_qla_host_t *vha, fc_port_t *fcport) |
23be331d | 2379 | { |
e315cd28 | 2380 | struct qla_hw_data *ha = vha->hw; |
2c3dfe3f | 2381 | |
e315cd28 | 2382 | fcport->vha = vha; |
23be331d | 2383 | fcport->login_retry = 0; |
e315cd28 | 2384 | fcport->port_login_retry_count = ha->port_down_retry_count * |
23be331d | 2385 | PORT_RETRY_TIME; |
e315cd28 | 2386 | atomic_set(&fcport->port_down_timer, ha->port_down_retry_count * |
23be331d AB |
2387 | PORT_RETRY_TIME); |
2388 | fcport->flags &= ~FCF_LOGIN_NEEDED; | |
2389 | ||
e315cd28 | 2390 | qla2x00_iidma_fcport(vha, fcport); |
23be331d AB |
2391 | |
2392 | atomic_set(&fcport->state, FCS_ONLINE); | |
2393 | ||
e315cd28 | 2394 | qla2x00_reg_remote_port(vha, fcport); |
23be331d AB |
2395 | } |
2396 | ||
1da177e4 LT |
2397 | /* |
2398 | * qla2x00_configure_fabric | |
2399 | * Setup SNS devices with loop ID's. | |
2400 | * | |
2401 | * Input: | |
2402 | * ha = adapter block pointer. | |
2403 | * | |
2404 | * Returns: | |
2405 | * 0 = success. | |
2406 | * BIT_0 = error | |
2407 | */ | |
2408 | static int | |
e315cd28 | 2409 | qla2x00_configure_fabric(scsi_qla_host_t *vha) |
1da177e4 LT |
2410 | { |
2411 | int rval, rval2; | |
2412 | fc_port_t *fcport, *fcptemp; | |
2413 | uint16_t next_loopid; | |
2414 | uint16_t mb[MAILBOX_REGISTER_COUNT]; | |
0107109e | 2415 | uint16_t loop_id; |
1da177e4 | 2416 | LIST_HEAD(new_fcports); |
e315cd28 AC |
2417 | struct qla_hw_data *ha = vha->hw; |
2418 | struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); | |
1da177e4 LT |
2419 | |
2420 | /* If FL port exists, then SNS is present */ | |
e428924c | 2421 | if (IS_FWI2_CAPABLE(ha)) |
0107109e AV |
2422 | loop_id = NPH_F_PORT; |
2423 | else | |
2424 | loop_id = SNS_FL_PORT; | |
e315cd28 | 2425 | rval = qla2x00_get_port_name(vha, loop_id, vha->fabric_node_name, 1); |
1da177e4 LT |
2426 | if (rval != QLA_SUCCESS) { |
2427 | DEBUG2(printk("scsi(%ld): MBC_GET_PORT_NAME Failed, No FL " | |
e315cd28 | 2428 | "Port\n", vha->host_no)); |
1da177e4 | 2429 | |
e315cd28 | 2430 | vha->device_flags &= ~SWITCH_FOUND; |
1da177e4 LT |
2431 | return (QLA_SUCCESS); |
2432 | } | |
e315cd28 | 2433 | vha->device_flags |= SWITCH_FOUND; |
1da177e4 LT |
2434 | |
2435 | /* Mark devices that need re-synchronization. */ | |
e315cd28 | 2436 | rval2 = qla2x00_device_resync(vha); |
1da177e4 LT |
2437 | if (rval2 == QLA_RSCNS_HANDLED) { |
2438 | /* No point doing the scan, just continue. */ | |
2439 | return (QLA_SUCCESS); | |
2440 | } | |
2441 | do { | |
cca5335c AV |
2442 | /* FDMI support. */ |
2443 | if (ql2xfdmienable && | |
e315cd28 AC |
2444 | test_and_clear_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags)) |
2445 | qla2x00_fdmi_register(vha); | |
cca5335c | 2446 | |
1da177e4 | 2447 | /* Ensure we are logged into the SNS. */ |
e428924c | 2448 | if (IS_FWI2_CAPABLE(ha)) |
0107109e AV |
2449 | loop_id = NPH_SNS; |
2450 | else | |
2451 | loop_id = SIMPLE_NAME_SERVER; | |
e315cd28 | 2452 | ha->isp_ops->fabric_login(vha, loop_id, 0xff, 0xff, |
abbd8870 | 2453 | 0xfc, mb, BIT_1 | BIT_0); |
1da177e4 LT |
2454 | if (mb[0] != MBS_COMMAND_COMPLETE) { |
2455 | DEBUG2(qla_printk(KERN_INFO, ha, | |
2456 | "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x " | |
0107109e | 2457 | "mb[2]=%x mb[6]=%x mb[7]=%x\n", loop_id, |
1da177e4 LT |
2458 | mb[0], mb[1], mb[2], mb[6], mb[7])); |
2459 | return (QLA_SUCCESS); | |
2460 | } | |
2461 | ||
e315cd28 AC |
2462 | if (test_and_clear_bit(REGISTER_FC4_NEEDED, &vha->dpc_flags)) { |
2463 | if (qla2x00_rft_id(vha)) { | |
1da177e4 LT |
2464 | /* EMPTY */ |
2465 | DEBUG2(printk("scsi(%ld): Register FC-4 " | |
e315cd28 | 2466 | "TYPE failed.\n", vha->host_no)); |
1da177e4 | 2467 | } |
e315cd28 | 2468 | if (qla2x00_rff_id(vha)) { |
1da177e4 LT |
2469 | /* EMPTY */ |
2470 | DEBUG2(printk("scsi(%ld): Register FC-4 " | |
e315cd28 | 2471 | "Features failed.\n", vha->host_no)); |
1da177e4 | 2472 | } |
e315cd28 | 2473 | if (qla2x00_rnn_id(vha)) { |
1da177e4 LT |
2474 | /* EMPTY */ |
2475 | DEBUG2(printk("scsi(%ld): Register Node Name " | |
e315cd28 AC |
2476 | "failed.\n", vha->host_no)); |
2477 | } else if (qla2x00_rsnn_nn(vha)) { | |
1da177e4 LT |
2478 | /* EMPTY */ |
2479 | DEBUG2(printk("scsi(%ld): Register Symbolic " | |
e315cd28 | 2480 | "Node Name failed.\n", vha->host_no)); |
1da177e4 LT |
2481 | } |
2482 | } | |
2483 | ||
e315cd28 | 2484 | rval = qla2x00_find_all_fabric_devs(vha, &new_fcports); |
1da177e4 LT |
2485 | if (rval != QLA_SUCCESS) |
2486 | break; | |
2487 | ||
2488 | /* | |
2489 | * Logout all previous fabric devices marked lost, except | |
2490 | * tape devices. | |
2491 | */ | |
e315cd28 AC |
2492 | list_for_each_entry(fcport, &vha->vp_fcports, list) { |
2493 | if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) | |
1da177e4 LT |
2494 | break; |
2495 | ||
2496 | if ((fcport->flags & FCF_FABRIC_DEVICE) == 0) | |
2497 | continue; | |
2498 | ||
2499 | if (atomic_read(&fcport->state) == FCS_DEVICE_LOST) { | |
e315cd28 | 2500 | qla2x00_mark_device_lost(vha, fcport, |
d97994dc | 2501 | ql2xplogiabsentdevice, 0); |
1da177e4 LT |
2502 | if (fcport->loop_id != FC_NO_LOOP_ID && |
2503 | (fcport->flags & FCF_TAPE_PRESENT) == 0 && | |
2504 | fcport->port_type != FCT_INITIATOR && | |
2505 | fcport->port_type != FCT_BROADCAST) { | |
e315cd28 | 2506 | ha->isp_ops->fabric_logout(vha, |
1c7c6357 AV |
2507 | fcport->loop_id, |
2508 | fcport->d_id.b.domain, | |
2509 | fcport->d_id.b.area, | |
2510 | fcport->d_id.b.al_pa); | |
1da177e4 LT |
2511 | fcport->loop_id = FC_NO_LOOP_ID; |
2512 | } | |
2513 | } | |
2514 | } | |
2515 | ||
2516 | /* Starting free loop ID. */ | |
e315cd28 | 2517 | next_loopid = ha->min_external_loopid; |
1da177e4 LT |
2518 | |
2519 | /* | |
2520 | * Scan through our port list and login entries that need to be | |
2521 | * logged in. | |
2522 | */ | |
e315cd28 AC |
2523 | list_for_each_entry(fcport, &vha->vp_fcports, list) { |
2524 | if (atomic_read(&vha->loop_down_timer) || | |
2525 | test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) | |
1da177e4 LT |
2526 | break; |
2527 | ||
2528 | if ((fcport->flags & FCF_FABRIC_DEVICE) == 0 || | |
2529 | (fcport->flags & FCF_LOGIN_NEEDED) == 0) | |
2530 | continue; | |
2531 | ||
2532 | if (fcport->loop_id == FC_NO_LOOP_ID) { | |
2533 | fcport->loop_id = next_loopid; | |
d4486fd6 | 2534 | rval = qla2x00_find_new_loop_id( |
e315cd28 | 2535 | base_vha, fcport); |
1da177e4 LT |
2536 | if (rval != QLA_SUCCESS) { |
2537 | /* Ran out of IDs to use */ | |
2538 | break; | |
2539 | } | |
2540 | } | |
1da177e4 | 2541 | /* Login and update database */ |
e315cd28 | 2542 | qla2x00_fabric_dev_login(vha, fcport, &next_loopid); |
1da177e4 LT |
2543 | } |
2544 | ||
2545 | /* Exit if out of loop IDs. */ | |
2546 | if (rval != QLA_SUCCESS) { | |
2547 | break; | |
2548 | } | |
2549 | ||
2550 | /* | |
2551 | * Login and add the new devices to our port list. | |
2552 | */ | |
2553 | list_for_each_entry_safe(fcport, fcptemp, &new_fcports, list) { | |
e315cd28 AC |
2554 | if (atomic_read(&vha->loop_down_timer) || |
2555 | test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) | |
1da177e4 LT |
2556 | break; |
2557 | ||
2558 | /* Find a new loop ID to use. */ | |
2559 | fcport->loop_id = next_loopid; | |
e315cd28 | 2560 | rval = qla2x00_find_new_loop_id(base_vha, fcport); |
1da177e4 LT |
2561 | if (rval != QLA_SUCCESS) { |
2562 | /* Ran out of IDs to use */ | |
2563 | break; | |
2564 | } | |
2565 | ||
bdf79621 | 2566 | /* Login and update database */ |
e315cd28 AC |
2567 | qla2x00_fabric_dev_login(vha, fcport, &next_loopid); |
2568 | ||
2569 | if (vha->vp_idx) { | |
2570 | fcport->vha = vha; | |
2571 | fcport->vp_idx = vha->vp_idx; | |
2572 | } | |
2573 | list_move_tail(&fcport->list, &vha->vp_fcports); | |
1da177e4 LT |
2574 | } |
2575 | } while (0); | |
2576 | ||
2577 | /* Free all new device structures not processed. */ | |
2578 | list_for_each_entry_safe(fcport, fcptemp, &new_fcports, list) { | |
2579 | list_del(&fcport->list); | |
2580 | kfree(fcport); | |
2581 | } | |
2582 | ||
2583 | if (rval) { | |
2584 | DEBUG2(printk("scsi(%ld): Configure fabric error exit: " | |
e315cd28 | 2585 | "rval=%d\n", vha->host_no, rval)); |
1da177e4 LT |
2586 | } |
2587 | ||
2588 | return (rval); | |
2589 | } | |
2590 | ||
2591 | ||
2592 | /* | |
2593 | * qla2x00_find_all_fabric_devs | |
2594 | * | |
2595 | * Input: | |
2596 | * ha = adapter block pointer. | |
2597 | * dev = database device entry pointer. | |
2598 | * | |
2599 | * Returns: | |
2600 | * 0 = success. | |
2601 | * | |
2602 | * Context: | |
2603 | * Kernel context. | |
2604 | */ | |
2605 | static int | |
e315cd28 AC |
2606 | qla2x00_find_all_fabric_devs(scsi_qla_host_t *vha, |
2607 | struct list_head *new_fcports) | |
1da177e4 LT |
2608 | { |
2609 | int rval; | |
2610 | uint16_t loop_id; | |
2611 | fc_port_t *fcport, *new_fcport, *fcptemp; | |
2612 | int found; | |
2613 | ||
2614 | sw_info_t *swl; | |
2615 | int swl_idx; | |
2616 | int first_dev, last_dev; | |
2617 | port_id_t wrap, nxt_d_id; | |
e315cd28 AC |
2618 | struct qla_hw_data *ha = vha->hw; |
2619 | struct scsi_qla_host *vp, *base_vha = pci_get_drvdata(ha->pdev); | |
ee546b6e | 2620 | struct scsi_qla_host *tvp; |
1da177e4 LT |
2621 | |
2622 | rval = QLA_SUCCESS; | |
2623 | ||
2624 | /* Try GID_PT to get device list, else GAN. */ | |
4b89258c | 2625 | swl = kcalloc(MAX_FIBRE_DEVICES, sizeof(sw_info_t), GFP_KERNEL); |
bbfbbbc1 | 2626 | if (!swl) { |
1da177e4 LT |
2627 | /*EMPTY*/ |
2628 | DEBUG2(printk("scsi(%ld): GID_PT allocations failed, fallback " | |
e315cd28 | 2629 | "on GA_NXT\n", vha->host_no)); |
1da177e4 | 2630 | } else { |
e315cd28 | 2631 | if (qla2x00_gid_pt(vha, swl) != QLA_SUCCESS) { |
1da177e4 LT |
2632 | kfree(swl); |
2633 | swl = NULL; | |
e315cd28 | 2634 | } else if (qla2x00_gpn_id(vha, swl) != QLA_SUCCESS) { |
1da177e4 LT |
2635 | kfree(swl); |
2636 | swl = NULL; | |
e315cd28 | 2637 | } else if (qla2x00_gnn_id(vha, swl) != QLA_SUCCESS) { |
1da177e4 LT |
2638 | kfree(swl); |
2639 | swl = NULL; | |
e5896bd5 | 2640 | } else if (ql2xiidmaenable && |
e315cd28 AC |
2641 | qla2x00_gfpn_id(vha, swl) == QLA_SUCCESS) { |
2642 | qla2x00_gpsc(vha, swl); | |
1da177e4 LT |
2643 | } |
2644 | } | |
2645 | swl_idx = 0; | |
2646 | ||
2647 | /* Allocate temporary fcport for any new fcports discovered. */ | |
e315cd28 | 2648 | new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); |
1da177e4 | 2649 | if (new_fcport == NULL) { |
c9475cb0 | 2650 | kfree(swl); |
1da177e4 LT |
2651 | return (QLA_MEMORY_ALLOC_FAILED); |
2652 | } | |
2653 | new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED); | |
1da177e4 LT |
2654 | /* Set start port ID scan at adapter ID. */ |
2655 | first_dev = 1; | |
2656 | last_dev = 0; | |
2657 | ||
2658 | /* Starting free loop ID. */ | |
e315cd28 AC |
2659 | loop_id = ha->min_external_loopid; |
2660 | for (; loop_id <= ha->max_loop_id; loop_id++) { | |
2661 | if (qla2x00_is_reserved_id(vha, loop_id)) | |
1da177e4 LT |
2662 | continue; |
2663 | ||
e315cd28 | 2664 | if (atomic_read(&vha->loop_down_timer) || LOOP_TRANSITION(vha)) |
1da177e4 LT |
2665 | break; |
2666 | ||
2667 | if (swl != NULL) { | |
2668 | if (last_dev) { | |
2669 | wrap.b24 = new_fcport->d_id.b24; | |
2670 | } else { | |
2671 | new_fcport->d_id.b24 = swl[swl_idx].d_id.b24; | |
2672 | memcpy(new_fcport->node_name, | |
2673 | swl[swl_idx].node_name, WWN_SIZE); | |
2674 | memcpy(new_fcport->port_name, | |
2675 | swl[swl_idx].port_name, WWN_SIZE); | |
d8b45213 AV |
2676 | memcpy(new_fcport->fabric_port_name, |
2677 | swl[swl_idx].fabric_port_name, WWN_SIZE); | |
2678 | new_fcport->fp_speed = swl[swl_idx].fp_speed; | |
1da177e4 LT |
2679 | |
2680 | if (swl[swl_idx].d_id.b.rsvd_1 != 0) { | |
2681 | last_dev = 1; | |
2682 | } | |
2683 | swl_idx++; | |
2684 | } | |
2685 | } else { | |
2686 | /* Send GA_NXT to the switch */ | |
e315cd28 | 2687 | rval = qla2x00_ga_nxt(vha, new_fcport); |
1da177e4 LT |
2688 | if (rval != QLA_SUCCESS) { |
2689 | qla_printk(KERN_WARNING, ha, | |
2690 | "SNS scan failed -- assuming zero-entry " | |
2691 | "result...\n"); | |
2692 | list_for_each_entry_safe(fcport, fcptemp, | |
2693 | new_fcports, list) { | |
2694 | list_del(&fcport->list); | |
2695 | kfree(fcport); | |
2696 | } | |
2697 | rval = QLA_SUCCESS; | |
2698 | break; | |
2699 | } | |
2700 | } | |
2701 | ||
2702 | /* If wrap on switch device list, exit. */ | |
2703 | if (first_dev) { | |
2704 | wrap.b24 = new_fcport->d_id.b24; | |
2705 | first_dev = 0; | |
2706 | } else if (new_fcport->d_id.b24 == wrap.b24) { | |
2707 | DEBUG2(printk("scsi(%ld): device wrap (%02x%02x%02x)\n", | |
e315cd28 | 2708 | vha->host_no, new_fcport->d_id.b.domain, |
1da177e4 LT |
2709 | new_fcport->d_id.b.area, new_fcport->d_id.b.al_pa)); |
2710 | break; | |
2711 | } | |
2712 | ||
2c3dfe3f | 2713 | /* Bypass if same physical adapter. */ |
e315cd28 | 2714 | if (new_fcport->d_id.b24 == base_vha->d_id.b24) |
1da177e4 LT |
2715 | continue; |
2716 | ||
2c3dfe3f | 2717 | /* Bypass virtual ports of the same host. */ |
e315cd28 AC |
2718 | found = 0; |
2719 | if (ha->num_vhosts) { | |
ee546b6e | 2720 | list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) { |
e315cd28 AC |
2721 | if (new_fcport->d_id.b24 == vp->d_id.b24) { |
2722 | found = 1; | |
2c3dfe3f | 2723 | break; |
e315cd28 | 2724 | } |
2c3dfe3f | 2725 | } |
e315cd28 | 2726 | if (found) |
2c3dfe3f SJ |
2727 | continue; |
2728 | } | |
2729 | ||
f7d289f6 AV |
2730 | /* Bypass if same domain and area of adapter. */ |
2731 | if (((new_fcport->d_id.b24 & 0xffff00) == | |
e315cd28 | 2732 | (vha->d_id.b24 & 0xffff00)) && ha->current_topology == |
f7d289f6 AV |
2733 | ISP_CFG_FL) |
2734 | continue; | |
2735 | ||
1da177e4 LT |
2736 | /* Bypass reserved domain fields. */ |
2737 | if ((new_fcport->d_id.b.domain & 0xf0) == 0xf0) | |
2738 | continue; | |
2739 | ||
2740 | /* Locate matching device in database. */ | |
2741 | found = 0; | |
e315cd28 | 2742 | list_for_each_entry(fcport, &vha->vp_fcports, list) { |
1da177e4 LT |
2743 | if (memcmp(new_fcport->port_name, fcport->port_name, |
2744 | WWN_SIZE)) | |
2745 | continue; | |
2746 | ||
2747 | found++; | |
2748 | ||
d8b45213 AV |
2749 | /* Update port state. */ |
2750 | memcpy(fcport->fabric_port_name, | |
2751 | new_fcport->fabric_port_name, WWN_SIZE); | |
2752 | fcport->fp_speed = new_fcport->fp_speed; | |
2753 | ||
1da177e4 LT |
2754 | /* |
2755 | * If address the same and state FCS_ONLINE, nothing | |
2756 | * changed. | |
2757 | */ | |
2758 | if (fcport->d_id.b24 == new_fcport->d_id.b24 && | |
2759 | atomic_read(&fcport->state) == FCS_ONLINE) { | |
2760 | break; | |
2761 | } | |
2762 | ||
2763 | /* | |
2764 | * If device was not a fabric device before. | |
2765 | */ | |
2766 | if ((fcport->flags & FCF_FABRIC_DEVICE) == 0) { | |
2767 | fcport->d_id.b24 = new_fcport->d_id.b24; | |
2768 | fcport->loop_id = FC_NO_LOOP_ID; | |
2769 | fcport->flags |= (FCF_FABRIC_DEVICE | | |
2770 | FCF_LOGIN_NEEDED); | |
2771 | fcport->flags &= ~FCF_PERSISTENT_BOUND; | |
2772 | break; | |
2773 | } | |
2774 | ||
2775 | /* | |
2776 | * Port ID changed or device was marked to be updated; | |
2777 | * Log it out if still logged in and mark it for | |
2778 | * relogin later. | |
2779 | */ | |
2780 | fcport->d_id.b24 = new_fcport->d_id.b24; | |
2781 | fcport->flags |= FCF_LOGIN_NEEDED; | |
2782 | if (fcport->loop_id != FC_NO_LOOP_ID && | |
2783 | (fcport->flags & FCF_TAPE_PRESENT) == 0 && | |
2784 | fcport->port_type != FCT_INITIATOR && | |
2785 | fcport->port_type != FCT_BROADCAST) { | |
e315cd28 | 2786 | ha->isp_ops->fabric_logout(vha, fcport->loop_id, |
1c7c6357 AV |
2787 | fcport->d_id.b.domain, fcport->d_id.b.area, |
2788 | fcport->d_id.b.al_pa); | |
1da177e4 LT |
2789 | fcport->loop_id = FC_NO_LOOP_ID; |
2790 | } | |
2791 | ||
2792 | break; | |
2793 | } | |
2794 | ||
2795 | if (found) | |
2796 | continue; | |
1da177e4 LT |
2797 | /* If device was not in our fcports list, then add it. */ |
2798 | list_add_tail(&new_fcport->list, new_fcports); | |
2799 | ||
2800 | /* Allocate a new replacement fcport. */ | |
2801 | nxt_d_id.b24 = new_fcport->d_id.b24; | |
e315cd28 | 2802 | new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL); |
1da177e4 | 2803 | if (new_fcport == NULL) { |
c9475cb0 | 2804 | kfree(swl); |
1da177e4 LT |
2805 | return (QLA_MEMORY_ALLOC_FAILED); |
2806 | } | |
2807 | new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED); | |
2808 | new_fcport->d_id.b24 = nxt_d_id.b24; | |
2809 | } | |
2810 | ||
c9475cb0 JJ |
2811 | kfree(swl); |
2812 | kfree(new_fcport); | |
1da177e4 LT |
2813 | |
2814 | if (!list_empty(new_fcports)) | |
e315cd28 | 2815 | vha->device_flags |= DFLG_FABRIC_DEVICES; |
1da177e4 LT |
2816 | |
2817 | return (rval); | |
2818 | } | |
2819 | ||
2820 | /* | |
2821 | * qla2x00_find_new_loop_id | |
2822 | * Scan through our port list and find a new usable loop ID. | |
2823 | * | |
2824 | * Input: | |
2825 | * ha: adapter state pointer. | |
2826 | * dev: port structure pointer. | |
2827 | * | |
2828 | * Returns: | |
2829 | * qla2x00 local function return status code. | |
2830 | * | |
2831 | * Context: | |
2832 | * Kernel context. | |
2833 | */ | |
413975a0 | 2834 | static int |
e315cd28 | 2835 | qla2x00_find_new_loop_id(scsi_qla_host_t *vha, fc_port_t *dev) |
1da177e4 LT |
2836 | { |
2837 | int rval; | |
2838 | int found; | |
2839 | fc_port_t *fcport; | |
2840 | uint16_t first_loop_id; | |
e315cd28 AC |
2841 | struct qla_hw_data *ha = vha->hw; |
2842 | struct scsi_qla_host *vp; | |
ee546b6e | 2843 | struct scsi_qla_host *tvp; |
1da177e4 LT |
2844 | |
2845 | rval = QLA_SUCCESS; | |
2846 | ||
2847 | /* Save starting loop ID. */ | |
2848 | first_loop_id = dev->loop_id; | |
2849 | ||
2850 | for (;;) { | |
2851 | /* Skip loop ID if already used by adapter. */ | |
e315cd28 | 2852 | if (dev->loop_id == vha->loop_id) |
1da177e4 | 2853 | dev->loop_id++; |
1da177e4 LT |
2854 | |
2855 | /* Skip reserved loop IDs. */ | |
e315cd28 | 2856 | while (qla2x00_is_reserved_id(vha, dev->loop_id)) |
1da177e4 | 2857 | dev->loop_id++; |
1da177e4 LT |
2858 | |
2859 | /* Reset loop ID if passed the end. */ | |
e315cd28 | 2860 | if (dev->loop_id > ha->max_loop_id) { |
1da177e4 LT |
2861 | /* first loop ID. */ |
2862 | dev->loop_id = ha->min_external_loopid; | |
2863 | } | |
2864 | ||
2865 | /* Check for loop ID being already in use. */ | |
2866 | found = 0; | |
2867 | fcport = NULL; | |
ee546b6e | 2868 | list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) { |
e315cd28 AC |
2869 | list_for_each_entry(fcport, &vp->vp_fcports, list) { |
2870 | if (fcport->loop_id == dev->loop_id && | |
2871 | fcport != dev) { | |
2872 | /* ID possibly in use */ | |
2873 | found++; | |
2874 | break; | |
2875 | } | |
1da177e4 | 2876 | } |
e315cd28 AC |
2877 | if (found) |
2878 | break; | |
1da177e4 LT |
2879 | } |
2880 | ||
2881 | /* If not in use then it is free to use. */ | |
2882 | if (!found) { | |
2883 | break; | |
2884 | } | |
2885 | ||
2886 | /* ID in use. Try next value. */ | |
2887 | dev->loop_id++; | |
2888 | ||
2889 | /* If wrap around. No free ID to use. */ | |
2890 | if (dev->loop_id == first_loop_id) { | |
2891 | dev->loop_id = FC_NO_LOOP_ID; | |
2892 | rval = QLA_FUNCTION_FAILED; | |
2893 | break; | |
2894 | } | |
2895 | } | |
2896 | ||
2897 | return (rval); | |
2898 | } | |
2899 | ||
2900 | /* | |
2901 | * qla2x00_device_resync | |
2902 | * Marks devices in the database that needs resynchronization. | |
2903 | * | |
2904 | * Input: | |
2905 | * ha = adapter block pointer. | |
2906 | * | |
2907 | * Context: | |
2908 | * Kernel context. | |
2909 | */ | |
2910 | static int | |
e315cd28 | 2911 | qla2x00_device_resync(scsi_qla_host_t *vha) |
1da177e4 LT |
2912 | { |
2913 | int rval; | |
1da177e4 LT |
2914 | uint32_t mask; |
2915 | fc_port_t *fcport; | |
2916 | uint32_t rscn_entry; | |
2917 | uint8_t rscn_out_iter; | |
2918 | uint8_t format; | |
2919 | port_id_t d_id; | |
2920 | ||
2921 | rval = QLA_RSCNS_HANDLED; | |
2922 | ||
e315cd28 AC |
2923 | while (vha->rscn_out_ptr != vha->rscn_in_ptr || |
2924 | vha->flags.rscn_queue_overflow) { | |
1da177e4 | 2925 | |
e315cd28 | 2926 | rscn_entry = vha->rscn_queue[vha->rscn_out_ptr]; |
1da177e4 LT |
2927 | format = MSB(MSW(rscn_entry)); |
2928 | d_id.b.domain = LSB(MSW(rscn_entry)); | |
2929 | d_id.b.area = MSB(LSW(rscn_entry)); | |
2930 | d_id.b.al_pa = LSB(LSW(rscn_entry)); | |
2931 | ||
2932 | DEBUG(printk("scsi(%ld): RSCN queue entry[%d] = " | |
2933 | "[%02x/%02x%02x%02x].\n", | |
e315cd28 | 2934 | vha->host_no, vha->rscn_out_ptr, format, d_id.b.domain, |
1da177e4 LT |
2935 | d_id.b.area, d_id.b.al_pa)); |
2936 | ||
e315cd28 AC |
2937 | vha->rscn_out_ptr++; |
2938 | if (vha->rscn_out_ptr == MAX_RSCN_COUNT) | |
2939 | vha->rscn_out_ptr = 0; | |
1da177e4 LT |
2940 | |
2941 | /* Skip duplicate entries. */ | |
e315cd28 AC |
2942 | for (rscn_out_iter = vha->rscn_out_ptr; |
2943 | !vha->flags.rscn_queue_overflow && | |
2944 | rscn_out_iter != vha->rscn_in_ptr; | |
1da177e4 LT |
2945 | rscn_out_iter = (rscn_out_iter == |
2946 | (MAX_RSCN_COUNT - 1)) ? 0: rscn_out_iter + 1) { | |
2947 | ||
e315cd28 | 2948 | if (rscn_entry != vha->rscn_queue[rscn_out_iter]) |
1da177e4 LT |
2949 | break; |
2950 | ||
2951 | DEBUG(printk("scsi(%ld): Skipping duplicate RSCN queue " | |
e315cd28 | 2952 | "entry found at [%d].\n", vha->host_no, |
1da177e4 LT |
2953 | rscn_out_iter)); |
2954 | ||
e315cd28 | 2955 | vha->rscn_out_ptr = rscn_out_iter; |
1da177e4 LT |
2956 | } |
2957 | ||
2958 | /* Queue overflow, set switch default case. */ | |
e315cd28 | 2959 | if (vha->flags.rscn_queue_overflow) { |
1da177e4 | 2960 | DEBUG(printk("scsi(%ld): device_resync: rscn " |
e315cd28 | 2961 | "overflow.\n", vha->host_no)); |
1da177e4 LT |
2962 | |
2963 | format = 3; | |
e315cd28 | 2964 | vha->flags.rscn_queue_overflow = 0; |
1da177e4 LT |
2965 | } |
2966 | ||
2967 | switch (format) { | |
2968 | case 0: | |
1da177e4 LT |
2969 | mask = 0xffffff; |
2970 | break; | |
2971 | case 1: | |
2972 | mask = 0xffff00; | |
2973 | break; | |
2974 | case 2: | |
2975 | mask = 0xff0000; | |
2976 | break; | |
2977 | default: | |
2978 | mask = 0x0; | |
2979 | d_id.b24 = 0; | |
e315cd28 | 2980 | vha->rscn_out_ptr = vha->rscn_in_ptr; |
1da177e4 LT |
2981 | break; |
2982 | } | |
2983 | ||
2984 | rval = QLA_SUCCESS; | |
2985 | ||
e315cd28 | 2986 | list_for_each_entry(fcport, &vha->vp_fcports, list) { |
1da177e4 LT |
2987 | if ((fcport->flags & FCF_FABRIC_DEVICE) == 0 || |
2988 | (fcport->d_id.b24 & mask) != d_id.b24 || | |
2989 | fcport->port_type == FCT_BROADCAST) | |
2990 | continue; | |
2991 | ||
2992 | if (atomic_read(&fcport->state) == FCS_ONLINE) { | |
2993 | if (format != 3 || | |
2994 | fcport->port_type != FCT_INITIATOR) { | |
e315cd28 | 2995 | qla2x00_mark_device_lost(vha, fcport, |
d97994dc | 2996 | 0, 0); |
1da177e4 LT |
2997 | } |
2998 | } | |
2999 | fcport->flags &= ~FCF_FARP_DONE; | |
3000 | } | |
3001 | } | |
3002 | return (rval); | |
3003 | } | |
3004 | ||
3005 | /* | |
3006 | * qla2x00_fabric_dev_login | |
3007 | * Login fabric target device and update FC port database. | |
3008 | * | |
3009 | * Input: | |
3010 | * ha: adapter state pointer. | |
3011 | * fcport: port structure list pointer. | |
3012 | * next_loopid: contains value of a new loop ID that can be used | |
3013 | * by the next login attempt. | |
3014 | * | |
3015 | * Returns: | |
3016 | * qla2x00 local function return status code. | |
3017 | * | |
3018 | * Context: | |
3019 | * Kernel context. | |
3020 | */ | |
3021 | static int | |
e315cd28 | 3022 | qla2x00_fabric_dev_login(scsi_qla_host_t *vha, fc_port_t *fcport, |
1da177e4 LT |
3023 | uint16_t *next_loopid) |
3024 | { | |
3025 | int rval; | |
3026 | int retry; | |
0107109e | 3027 | uint8_t opts; |
e315cd28 | 3028 | struct qla_hw_data *ha = vha->hw; |
1da177e4 LT |
3029 | |
3030 | rval = QLA_SUCCESS; | |
3031 | retry = 0; | |
3032 | ||
e315cd28 | 3033 | rval = qla2x00_fabric_login(vha, fcport, next_loopid); |
1da177e4 | 3034 | if (rval == QLA_SUCCESS) { |
0107109e AV |
3035 | /* Send an ADISC to tape devices.*/ |
3036 | opts = 0; | |
3037 | if (fcport->flags & FCF_TAPE_PRESENT) | |
3038 | opts |= BIT_1; | |
e315cd28 | 3039 | rval = qla2x00_get_port_database(vha, fcport, opts); |
1da177e4 | 3040 | if (rval != QLA_SUCCESS) { |
e315cd28 | 3041 | ha->isp_ops->fabric_logout(vha, fcport->loop_id, |
1c7c6357 AV |
3042 | fcport->d_id.b.domain, fcport->d_id.b.area, |
3043 | fcport->d_id.b.al_pa); | |
e315cd28 | 3044 | qla2x00_mark_device_lost(vha, fcport, 1, 0); |
1da177e4 | 3045 | } else { |
e315cd28 | 3046 | qla2x00_update_fcport(vha, fcport); |
1da177e4 LT |
3047 | } |
3048 | } | |
3049 | ||
3050 | return (rval); | |
3051 | } | |
3052 | ||
3053 | /* | |
3054 | * qla2x00_fabric_login | |
3055 | * Issue fabric login command. | |
3056 | * | |
3057 | * Input: | |
3058 | * ha = adapter block pointer. | |
3059 | * device = pointer to FC device type structure. | |
3060 | * | |
3061 | * Returns: | |
3062 | * 0 - Login successfully | |
3063 | * 1 - Login failed | |
3064 | * 2 - Initiator device | |
3065 | * 3 - Fatal error | |
3066 | */ | |
3067 | int | |
e315cd28 | 3068 | qla2x00_fabric_login(scsi_qla_host_t *vha, fc_port_t *fcport, |
1da177e4 LT |
3069 | uint16_t *next_loopid) |
3070 | { | |
3071 | int rval; | |
3072 | int retry; | |
3073 | uint16_t tmp_loopid; | |
3074 | uint16_t mb[MAILBOX_REGISTER_COUNT]; | |
e315cd28 | 3075 | struct qla_hw_data *ha = vha->hw; |
1da177e4 LT |
3076 | |
3077 | retry = 0; | |
3078 | tmp_loopid = 0; | |
3079 | ||
3080 | for (;;) { | |
3081 | DEBUG(printk("scsi(%ld): Trying Fabric Login w/loop id 0x%04x " | |
3082 | "for port %02x%02x%02x.\n", | |
e315cd28 | 3083 | vha->host_no, fcport->loop_id, fcport->d_id.b.domain, |
1da177e4 LT |
3084 | fcport->d_id.b.area, fcport->d_id.b.al_pa)); |
3085 | ||
3086 | /* Login fcport on switch. */ | |
e315cd28 | 3087 | ha->isp_ops->fabric_login(vha, fcport->loop_id, |
1da177e4 LT |
3088 | fcport->d_id.b.domain, fcport->d_id.b.area, |
3089 | fcport->d_id.b.al_pa, mb, BIT_0); | |
3090 | if (mb[0] == MBS_PORT_ID_USED) { | |
3091 | /* | |
3092 | * Device has another loop ID. The firmware team | |
0107109e AV |
3093 | * recommends the driver perform an implicit login with |
3094 | * the specified ID again. The ID we just used is save | |
3095 | * here so we return with an ID that can be tried by | |
3096 | * the next login. | |
1da177e4 LT |
3097 | */ |
3098 | retry++; | |
3099 | tmp_loopid = fcport->loop_id; | |
3100 | fcport->loop_id = mb[1]; | |
3101 | ||
3102 | DEBUG(printk("Fabric Login: port in use - next " | |
3103 | "loop id=0x%04x, port Id=%02x%02x%02x.\n", | |
3104 | fcport->loop_id, fcport->d_id.b.domain, | |
3105 | fcport->d_id.b.area, fcport->d_id.b.al_pa)); | |
3106 | ||
3107 | } else if (mb[0] == MBS_COMMAND_COMPLETE) { | |
3108 | /* | |
3109 | * Login succeeded. | |
3110 | */ | |
3111 | if (retry) { | |
3112 | /* A retry occurred before. */ | |
3113 | *next_loopid = tmp_loopid; | |
3114 | } else { | |
3115 | /* | |
3116 | * No retry occurred before. Just increment the | |
3117 | * ID value for next login. | |
3118 | */ | |
3119 | *next_loopid = (fcport->loop_id + 1); | |
3120 | } | |
3121 | ||
3122 | if (mb[1] & BIT_0) { | |
3123 | fcport->port_type = FCT_INITIATOR; | |
3124 | } else { | |
3125 | fcport->port_type = FCT_TARGET; | |
3126 | if (mb[1] & BIT_1) { | |
3127 | fcport->flags |= FCF_TAPE_PRESENT; | |
3128 | } | |
3129 | } | |
3130 | ||
ad3e0eda AV |
3131 | if (mb[10] & BIT_0) |
3132 | fcport->supported_classes |= FC_COS_CLASS2; | |
3133 | if (mb[10] & BIT_1) | |
3134 | fcport->supported_classes |= FC_COS_CLASS3; | |
3135 | ||
1da177e4 LT |
3136 | rval = QLA_SUCCESS; |
3137 | break; | |
3138 | } else if (mb[0] == MBS_LOOP_ID_USED) { | |
3139 | /* | |
3140 | * Loop ID already used, try next loop ID. | |
3141 | */ | |
3142 | fcport->loop_id++; | |
e315cd28 | 3143 | rval = qla2x00_find_new_loop_id(vha, fcport); |
1da177e4 LT |
3144 | if (rval != QLA_SUCCESS) { |
3145 | /* Ran out of loop IDs to use */ | |
3146 | break; | |
3147 | } | |
3148 | } else if (mb[0] == MBS_COMMAND_ERROR) { | |
3149 | /* | |
3150 | * Firmware possibly timed out during login. If NO | |
3151 | * retries are left to do then the device is declared | |
3152 | * dead. | |
3153 | */ | |
3154 | *next_loopid = fcport->loop_id; | |
e315cd28 | 3155 | ha->isp_ops->fabric_logout(vha, fcport->loop_id, |
1c7c6357 AV |
3156 | fcport->d_id.b.domain, fcport->d_id.b.area, |
3157 | fcport->d_id.b.al_pa); | |
e315cd28 | 3158 | qla2x00_mark_device_lost(vha, fcport, 1, 0); |
1da177e4 LT |
3159 | |
3160 | rval = 1; | |
3161 | break; | |
3162 | } else { | |
3163 | /* | |
3164 | * unrecoverable / not handled error | |
3165 | */ | |
3166 | DEBUG2(printk("%s(%ld): failed=%x port_id=%02x%02x%02x " | |
fa2a1ce5 | 3167 | "loop_id=%x jiffies=%lx.\n", |
e315cd28 | 3168 | __func__, vha->host_no, mb[0], |
1da177e4 LT |
3169 | fcport->d_id.b.domain, fcport->d_id.b.area, |
3170 | fcport->d_id.b.al_pa, fcport->loop_id, jiffies)); | |
3171 | ||
3172 | *next_loopid = fcport->loop_id; | |
e315cd28 | 3173 | ha->isp_ops->fabric_logout(vha, fcport->loop_id, |
1c7c6357 AV |
3174 | fcport->d_id.b.domain, fcport->d_id.b.area, |
3175 | fcport->d_id.b.al_pa); | |
1da177e4 | 3176 | fcport->loop_id = FC_NO_LOOP_ID; |
0eedfcf0 | 3177 | fcport->login_retry = 0; |
1da177e4 LT |
3178 | |
3179 | rval = 3; | |
3180 | break; | |
3181 | } | |
3182 | } | |
3183 | ||
3184 | return (rval); | |
3185 | } | |
3186 | ||
3187 | /* | |
3188 | * qla2x00_local_device_login | |
3189 | * Issue local device login command. | |
3190 | * | |
3191 | * Input: | |
3192 | * ha = adapter block pointer. | |
3193 | * loop_id = loop id of device to login to. | |
3194 | * | |
3195 | * Returns (Where's the #define!!!!): | |
3196 | * 0 - Login successfully | |
3197 | * 1 - Login failed | |
3198 | * 3 - Fatal error | |
3199 | */ | |
3200 | int | |
e315cd28 | 3201 | qla2x00_local_device_login(scsi_qla_host_t *vha, fc_port_t *fcport) |
1da177e4 LT |
3202 | { |
3203 | int rval; | |
3204 | uint16_t mb[MAILBOX_REGISTER_COUNT]; | |
3205 | ||
3206 | memset(mb, 0, sizeof(mb)); | |
e315cd28 | 3207 | rval = qla2x00_login_local_device(vha, fcport, mb, BIT_0); |
1da177e4 LT |
3208 | if (rval == QLA_SUCCESS) { |
3209 | /* Interrogate mailbox registers for any errors */ | |
3210 | if (mb[0] == MBS_COMMAND_ERROR) | |
3211 | rval = 1; | |
3212 | else if (mb[0] == MBS_COMMAND_PARAMETER_ERROR) | |
3213 | /* device not in PCB table */ | |
3214 | rval = 3; | |
3215 | } | |
3216 | ||
3217 | return (rval); | |
3218 | } | |
3219 | ||
3220 | /* | |
3221 | * qla2x00_loop_resync | |
3222 | * Resync with fibre channel devices. | |
3223 | * | |
3224 | * Input: | |
3225 | * ha = adapter block pointer. | |
3226 | * | |
3227 | * Returns: | |
3228 | * 0 = success | |
3229 | */ | |
3230 | int | |
e315cd28 | 3231 | qla2x00_loop_resync(scsi_qla_host_t *vha) |
1da177e4 | 3232 | { |
73208dfd | 3233 | int rval = QLA_SUCCESS; |
1da177e4 | 3234 | uint32_t wait_time; |
73208dfd | 3235 | struct qla_hw_data *ha = vha->hw; |
29bdccbe AC |
3236 | struct req_que *req = ha->req_q_map[vha->req_ques[0]]; |
3237 | struct rsp_que *rsp = req->rsp; | |
1da177e4 | 3238 | |
e315cd28 AC |
3239 | atomic_set(&vha->loop_state, LOOP_UPDATE); |
3240 | clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); | |
3241 | if (vha->flags.online) { | |
3242 | if (!(rval = qla2x00_fw_ready(vha))) { | |
1da177e4 LT |
3243 | /* Wait at most MAX_TARGET RSCNs for a stable link. */ |
3244 | wait_time = 256; | |
3245 | do { | |
e315cd28 | 3246 | atomic_set(&vha->loop_state, LOOP_UPDATE); |
1da177e4 | 3247 | |
0107109e | 3248 | /* Issue a marker after FW becomes ready. */ |
73208dfd AC |
3249 | qla2x00_marker(vha, req, rsp, 0, 0, |
3250 | MK_SYNC_ALL); | |
e315cd28 | 3251 | vha->marker_needed = 0; |
1da177e4 LT |
3252 | |
3253 | /* Remap devices on Loop. */ | |
e315cd28 | 3254 | clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); |
1da177e4 | 3255 | |
e315cd28 | 3256 | qla2x00_configure_loop(vha); |
1da177e4 | 3257 | wait_time--; |
e315cd28 AC |
3258 | } while (!atomic_read(&vha->loop_down_timer) && |
3259 | !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags)) | |
3260 | && wait_time && (test_bit(LOOP_RESYNC_NEEDED, | |
3261 | &vha->dpc_flags))); | |
1da177e4 | 3262 | } |
1da177e4 LT |
3263 | } |
3264 | ||
e315cd28 | 3265 | if (test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags)) |
1da177e4 | 3266 | return (QLA_FUNCTION_FAILED); |
1da177e4 | 3267 | |
e315cd28 | 3268 | if (rval) |
1da177e4 | 3269 | DEBUG2_3(printk("%s(): **** FAILED ****\n", __func__)); |
1da177e4 LT |
3270 | |
3271 | return (rval); | |
3272 | } | |
3273 | ||
d97994dc | 3274 | void |
e315cd28 | 3275 | qla2x00_update_fcports(scsi_qla_host_t *vha) |
d97994dc | 3276 | { |
3277 | fc_port_t *fcport; | |
3278 | ||
3279 | /* Go with deferred removal of rport references. */ | |
e315cd28 AC |
3280 | list_for_each_entry(fcport, &vha->vp_fcports, list) |
3281 | if (fcport && fcport->drport && | |
c9c5ced9 | 3282 | atomic_read(&fcport->state) != FCS_UNCONFIGURED) |
d97994dc | 3283 | qla2x00_rport_del(fcport); |
3284 | } | |
3285 | ||
1da177e4 LT |
3286 | /* |
3287 | * qla2x00_abort_isp | |
3288 | * Resets ISP and aborts all outstanding commands. | |
3289 | * | |
3290 | * Input: | |
3291 | * ha = adapter block pointer. | |
3292 | * | |
3293 | * Returns: | |
3294 | * 0 = success | |
3295 | */ | |
3296 | int | |
e315cd28 | 3297 | qla2x00_abort_isp(scsi_qla_host_t *vha) |
1da177e4 | 3298 | { |
476e8978 | 3299 | int rval; |
1da177e4 | 3300 | uint8_t status = 0; |
e315cd28 AC |
3301 | struct qla_hw_data *ha = vha->hw; |
3302 | struct scsi_qla_host *vp; | |
ee546b6e | 3303 | struct scsi_qla_host *tvp; |
73208dfd | 3304 | struct req_que *req = ha->req_q_map[0]; |
1da177e4 | 3305 | |
e315cd28 AC |
3306 | if (vha->flags.online) { |
3307 | vha->flags.online = 0; | |
3308 | clear_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); | |
e5f5f6f7 | 3309 | ha->qla_stats.total_isp_aborts++; |
1da177e4 LT |
3310 | |
3311 | qla_printk(KERN_INFO, ha, | |
3312 | "Performing ISP error recovery - ha= %p.\n", ha); | |
e315cd28 AC |
3313 | ha->isp_ops->reset_chip(vha); |
3314 | ||
3315 | atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME); | |
3316 | if (atomic_read(&vha->loop_state) != LOOP_DOWN) { | |
3317 | atomic_set(&vha->loop_state, LOOP_DOWN); | |
3318 | qla2x00_mark_all_devices_lost(vha, 0); | |
ee546b6e | 3319 | list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) |
e315cd28 | 3320 | qla2x00_mark_all_devices_lost(vp, 0); |
1da177e4 | 3321 | } else { |
e315cd28 AC |
3322 | if (!atomic_read(&vha->loop_down_timer)) |
3323 | atomic_set(&vha->loop_down_timer, | |
1da177e4 LT |
3324 | LOOP_DOWN_TIME); |
3325 | } | |
3326 | ||
1da177e4 | 3327 | /* Requeue all commands in outstanding command list. */ |
e315cd28 | 3328 | qla2x00_abort_all_cmds(vha, DID_RESET << 16); |
1da177e4 | 3329 | |
73208dfd | 3330 | ha->isp_ops->get_flash_version(vha, req->ring); |
30c47662 | 3331 | |
e315cd28 | 3332 | ha->isp_ops->nvram_config(vha); |
1da177e4 | 3333 | |
e315cd28 AC |
3334 | if (!qla2x00_restart_isp(vha)) { |
3335 | clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); | |
1da177e4 | 3336 | |
e315cd28 | 3337 | if (!atomic_read(&vha->loop_down_timer)) { |
1da177e4 LT |
3338 | /* |
3339 | * Issue marker command only when we are going | |
3340 | * to start the I/O . | |
3341 | */ | |
e315cd28 | 3342 | vha->marker_needed = 1; |
1da177e4 LT |
3343 | } |
3344 | ||
e315cd28 | 3345 | vha->flags.online = 1; |
1da177e4 | 3346 | |
fd34f556 | 3347 | ha->isp_ops->enable_intrs(ha); |
1da177e4 | 3348 | |
fa2a1ce5 | 3349 | ha->isp_abort_cnt = 0; |
e315cd28 | 3350 | clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags); |
476e8978 | 3351 | |
df613b96 AV |
3352 | if (ha->fce) { |
3353 | ha->flags.fce_enabled = 1; | |
3354 | memset(ha->fce, 0, | |
3355 | fce_calc_size(ha->fce_bufs)); | |
e315cd28 | 3356 | rval = qla2x00_enable_fce_trace(vha, |
df613b96 AV |
3357 | ha->fce_dma, ha->fce_bufs, ha->fce_mb, |
3358 | &ha->fce_bufs); | |
3359 | if (rval) { | |
3360 | qla_printk(KERN_WARNING, ha, | |
3361 | "Unable to reinitialize FCE " | |
3362 | "(%d).\n", rval); | |
3363 | ha->flags.fce_enabled = 0; | |
3364 | } | |
3365 | } | |
436a7b11 AV |
3366 | |
3367 | if (ha->eft) { | |
3368 | memset(ha->eft, 0, EFT_SIZE); | |
e315cd28 | 3369 | rval = qla2x00_enable_eft_trace(vha, |
436a7b11 AV |
3370 | ha->eft_dma, EFT_NUM_BUFFERS); |
3371 | if (rval) { | |
3372 | qla_printk(KERN_WARNING, ha, | |
3373 | "Unable to reinitialize EFT " | |
3374 | "(%d).\n", rval); | |
3375 | } | |
3376 | } | |
1da177e4 | 3377 | } else { /* failed the ISP abort */ |
e315cd28 AC |
3378 | vha->flags.online = 1; |
3379 | if (test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) { | |
1da177e4 LT |
3380 | if (ha->isp_abort_cnt == 0) { |
3381 | qla_printk(KERN_WARNING, ha, | |
3382 | "ISP error recovery failed - " | |
3383 | "board disabled\n"); | |
fa2a1ce5 | 3384 | /* |
1da177e4 LT |
3385 | * The next call disables the board |
3386 | * completely. | |
3387 | */ | |
e315cd28 AC |
3388 | ha->isp_ops->reset_adapter(vha); |
3389 | vha->flags.online = 0; | |
1da177e4 | 3390 | clear_bit(ISP_ABORT_RETRY, |
e315cd28 | 3391 | &vha->dpc_flags); |
1da177e4 LT |
3392 | status = 0; |
3393 | } else { /* schedule another ISP abort */ | |
3394 | ha->isp_abort_cnt--; | |
3395 | DEBUG(printk("qla%ld: ISP abort - " | |
0107109e | 3396 | "retry remaining %d\n", |
e315cd28 | 3397 | vha->host_no, ha->isp_abort_cnt)); |
1da177e4 LT |
3398 | status = 1; |
3399 | } | |
3400 | } else { | |
3401 | ha->isp_abort_cnt = MAX_RETRIES_OF_ISP_ABORT; | |
3402 | DEBUG(printk("qla2x00(%ld): ISP error recovery " | |
3403 | "- retrying (%d) more times\n", | |
e315cd28 AC |
3404 | vha->host_no, ha->isp_abort_cnt)); |
3405 | set_bit(ISP_ABORT_RETRY, &vha->dpc_flags); | |
1da177e4 LT |
3406 | status = 1; |
3407 | } | |
3408 | } | |
fa2a1ce5 | 3409 | |
1da177e4 LT |
3410 | } |
3411 | ||
e315cd28 AC |
3412 | if (!status) { |
3413 | DEBUG(printk(KERN_INFO | |
3414 | "qla2x00_abort_isp(%ld): succeeded.\n", | |
3415 | vha->host_no)); | |
ee546b6e | 3416 | list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) { |
e315cd28 AC |
3417 | if (vp->vp_idx) |
3418 | qla2x00_vp_abort_isp(vp); | |
3419 | } | |
3420 | } else { | |
1da177e4 LT |
3421 | qla_printk(KERN_INFO, ha, |
3422 | "qla2x00_abort_isp: **** FAILED ****\n"); | |
1da177e4 LT |
3423 | } |
3424 | ||
3425 | return(status); | |
3426 | } | |
3427 | ||
3428 | /* | |
3429 | * qla2x00_restart_isp | |
3430 | * restarts the ISP after a reset | |
3431 | * | |
3432 | * Input: | |
3433 | * ha = adapter block pointer. | |
3434 | * | |
3435 | * Returns: | |
3436 | * 0 = success | |
3437 | */ | |
3438 | static int | |
e315cd28 | 3439 | qla2x00_restart_isp(scsi_qla_host_t *vha) |
1da177e4 | 3440 | { |
c6b2fca8 | 3441 | int status = 0; |
1da177e4 | 3442 | uint32_t wait_time; |
e315cd28 | 3443 | struct qla_hw_data *ha = vha->hw; |
73208dfd AC |
3444 | struct req_que *req = ha->req_q_map[0]; |
3445 | struct rsp_que *rsp = ha->rsp_q_map[0]; | |
1da177e4 LT |
3446 | |
3447 | /* If firmware needs to be loaded */ | |
e315cd28 AC |
3448 | if (qla2x00_isp_firmware(vha)) { |
3449 | vha->flags.online = 0; | |
3450 | status = ha->isp_ops->chip_diag(vha); | |
3451 | if (!status) | |
3452 | status = qla2x00_setup_chip(vha); | |
1da177e4 LT |
3453 | } |
3454 | ||
e315cd28 AC |
3455 | if (!status && !(status = qla2x00_init_rings(vha))) { |
3456 | clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); | |
73208dfd AC |
3457 | /* Initialize the queues in use */ |
3458 | qla25xx_init_queues(ha); | |
3459 | ||
e315cd28 AC |
3460 | status = qla2x00_fw_ready(vha); |
3461 | if (!status) { | |
1da177e4 | 3462 | DEBUG(printk("%s(): Start configure loop, " |
744f11fd | 3463 | "status = %d\n", __func__, status)); |
0107109e AV |
3464 | |
3465 | /* Issue a marker after FW becomes ready. */ | |
73208dfd | 3466 | qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL); |
0107109e | 3467 | |
e315cd28 | 3468 | vha->flags.online = 1; |
1da177e4 LT |
3469 | /* Wait at most MAX_TARGET RSCNs for a stable link. */ |
3470 | wait_time = 256; | |
3471 | do { | |
e315cd28 AC |
3472 | clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); |
3473 | qla2x00_configure_loop(vha); | |
1da177e4 | 3474 | wait_time--; |
e315cd28 AC |
3475 | } while (!atomic_read(&vha->loop_down_timer) && |
3476 | !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags)) | |
3477 | && wait_time && (test_bit(LOOP_RESYNC_NEEDED, | |
3478 | &vha->dpc_flags))); | |
1da177e4 LT |
3479 | } |
3480 | ||
3481 | /* if no cable then assume it's good */ | |
e315cd28 | 3482 | if ((vha->device_flags & DFLG_NO_CABLE)) |
1da177e4 LT |
3483 | status = 0; |
3484 | ||
3485 | DEBUG(printk("%s(): Configure loop done, status = 0x%x\n", | |
3486 | __func__, | |
744f11fd | 3487 | status)); |
1da177e4 LT |
3488 | } |
3489 | return (status); | |
3490 | } | |
3491 | ||
73208dfd AC |
3492 | static int |
3493 | qla25xx_init_queues(struct qla_hw_data *ha) | |
3494 | { | |
3495 | struct rsp_que *rsp = NULL; | |
3496 | struct req_que *req = NULL; | |
3497 | struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); | |
3498 | int ret = -1; | |
3499 | int i; | |
3500 | ||
3501 | for (i = 1; i < ha->max_queues; i++) { | |
3502 | rsp = ha->rsp_q_map[i]; | |
3503 | if (rsp) { | |
3504 | rsp->options &= ~BIT_0; | |
618a7523 | 3505 | ret = qla25xx_init_rsp_que(base_vha, rsp); |
73208dfd AC |
3506 | if (ret != QLA_SUCCESS) |
3507 | DEBUG2_17(printk(KERN_WARNING | |
3508 | "%s Rsp que:%d init failed\n", __func__, | |
3509 | rsp->id)); | |
3510 | else | |
3511 | DEBUG2_17(printk(KERN_INFO | |
3512 | "%s Rsp que:%d inited\n", __func__, | |
3513 | rsp->id)); | |
3514 | } | |
3515 | req = ha->req_q_map[i]; | |
3516 | if (req) { | |
29bdccbe | 3517 | /* Clear outstanding commands array. */ |
73208dfd | 3518 | req->options &= ~BIT_0; |
618a7523 | 3519 | ret = qla25xx_init_req_que(base_vha, req); |
73208dfd AC |
3520 | if (ret != QLA_SUCCESS) |
3521 | DEBUG2_17(printk(KERN_WARNING | |
3522 | "%s Req que:%d init failed\n", __func__, | |
3523 | req->id)); | |
3524 | else | |
3525 | DEBUG2_17(printk(KERN_WARNING | |
29bdccbe | 3526 | "%s Req que:%d inited\n", __func__, |
73208dfd AC |
3527 | req->id)); |
3528 | } | |
3529 | } | |
3530 | return ret; | |
3531 | } | |
3532 | ||
1da177e4 LT |
3533 | /* |
3534 | * qla2x00_reset_adapter | |
3535 | * Reset adapter. | |
3536 | * | |
3537 | * Input: | |
3538 | * ha = adapter block pointer. | |
3539 | */ | |
abbd8870 | 3540 | void |
e315cd28 | 3541 | qla2x00_reset_adapter(scsi_qla_host_t *vha) |
1da177e4 LT |
3542 | { |
3543 | unsigned long flags = 0; | |
e315cd28 | 3544 | struct qla_hw_data *ha = vha->hw; |
3d71644c | 3545 | struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; |
1da177e4 | 3546 | |
e315cd28 | 3547 | vha->flags.online = 0; |
fd34f556 | 3548 | ha->isp_ops->disable_intrs(ha); |
1da177e4 | 3549 | |
1da177e4 LT |
3550 | spin_lock_irqsave(&ha->hardware_lock, flags); |
3551 | WRT_REG_WORD(®->hccr, HCCR_RESET_RISC); | |
3552 | RD_REG_WORD(®->hccr); /* PCI Posting. */ | |
3553 | WRT_REG_WORD(®->hccr, HCCR_RELEASE_RISC); | |
3554 | RD_REG_WORD(®->hccr); /* PCI Posting. */ | |
3555 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | |
3556 | } | |
0107109e AV |
3557 | |
3558 | void | |
e315cd28 | 3559 | qla24xx_reset_adapter(scsi_qla_host_t *vha) |
0107109e AV |
3560 | { |
3561 | unsigned long flags = 0; | |
e315cd28 | 3562 | struct qla_hw_data *ha = vha->hw; |
0107109e AV |
3563 | struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; |
3564 | ||
e315cd28 | 3565 | vha->flags.online = 0; |
fd34f556 | 3566 | ha->isp_ops->disable_intrs(ha); |
0107109e AV |
3567 | |
3568 | spin_lock_irqsave(&ha->hardware_lock, flags); | |
3569 | WRT_REG_DWORD(®->hccr, HCCRX_SET_RISC_RESET); | |
3570 | RD_REG_DWORD(®->hccr); | |
3571 | WRT_REG_DWORD(®->hccr, HCCRX_REL_RISC_PAUSE); | |
3572 | RD_REG_DWORD(®->hccr); | |
3573 | spin_unlock_irqrestore(&ha->hardware_lock, flags); | |
09ff36d3 AV |
3574 | |
3575 | if (IS_NOPOLLING_TYPE(ha)) | |
3576 | ha->isp_ops->enable_intrs(ha); | |
0107109e AV |
3577 | } |
3578 | ||
4e08df3f DM |
3579 | /* On sparc systems, obtain port and node WWN from firmware |
3580 | * properties. | |
3581 | */ | |
e315cd28 AC |
3582 | static void qla24xx_nvram_wwn_from_ofw(scsi_qla_host_t *vha, |
3583 | struct nvram_24xx *nv) | |
4e08df3f DM |
3584 | { |
3585 | #ifdef CONFIG_SPARC | |
e315cd28 | 3586 | struct qla_hw_data *ha = vha->hw; |
4e08df3f | 3587 | struct pci_dev *pdev = ha->pdev; |
15576bc8 DM |
3588 | struct device_node *dp = pci_device_to_OF_node(pdev); |
3589 | const u8 *val; | |
4e08df3f DM |
3590 | int len; |
3591 | ||
3592 | val = of_get_property(dp, "port-wwn", &len); | |
3593 | if (val && len >= WWN_SIZE) | |
3594 | memcpy(nv->port_name, val, WWN_SIZE); | |
3595 | ||
3596 | val = of_get_property(dp, "node-wwn", &len); | |
3597 | if (val && len >= WWN_SIZE) | |
3598 | memcpy(nv->node_name, val, WWN_SIZE); | |
3599 | #endif | |
3600 | } | |
3601 | ||
0107109e | 3602 | int |
e315cd28 | 3603 | qla24xx_nvram_config(scsi_qla_host_t *vha) |
0107109e | 3604 | { |
4e08df3f | 3605 | int rval; |
0107109e AV |
3606 | struct init_cb_24xx *icb; |
3607 | struct nvram_24xx *nv; | |
3608 | uint32_t *dptr; | |
3609 | uint8_t *dptr1, *dptr2; | |
3610 | uint32_t chksum; | |
3611 | uint16_t cnt; | |
e315cd28 | 3612 | struct qla_hw_data *ha = vha->hw; |
0107109e | 3613 | |
4e08df3f | 3614 | rval = QLA_SUCCESS; |
0107109e | 3615 | icb = (struct init_cb_24xx *)ha->init_cb; |
281afe19 | 3616 | nv = ha->nvram; |
0107109e AV |
3617 | |
3618 | /* Determine NVRAM starting address. */ | |
3619 | ha->nvram_size = sizeof(struct nvram_24xx); | |
3620 | ha->nvram_base = FA_NVRAM_FUNC0_ADDR; | |
6f641790 | 3621 | ha->vpd_size = FA_NVRAM_VPD_SIZE; |
3622 | ha->vpd_base = FA_NVRAM_VPD0_ADDR; | |
3623 | if (PCI_FUNC(ha->pdev->devfn)) { | |
0107109e | 3624 | ha->nvram_base = FA_NVRAM_FUNC1_ADDR; |
6f641790 | 3625 | ha->vpd_base = FA_NVRAM_VPD1_ADDR; |
3626 | } | |
0107109e | 3627 | |
281afe19 SJ |
3628 | /* Get VPD data into cache */ |
3629 | ha->vpd = ha->nvram + VPD_OFFSET; | |
e315cd28 | 3630 | ha->isp_ops->read_nvram(vha, (uint8_t *)ha->vpd, |
281afe19 SJ |
3631 | ha->nvram_base - FA_NVRAM_FUNC0_ADDR, FA_NVRAM_VPD_SIZE * 4); |
3632 | ||
3633 | /* Get NVRAM data into cache and calculate checksum. */ | |
0107109e | 3634 | dptr = (uint32_t *)nv; |
e315cd28 | 3635 | ha->isp_ops->read_nvram(vha, (uint8_t *)dptr, ha->nvram_base, |
0107109e AV |
3636 | ha->nvram_size); |
3637 | for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++) | |
3638 | chksum += le32_to_cpu(*dptr++); | |
3639 | ||
3640 | DEBUG5(printk("scsi(%ld): Contents of NVRAM\n", ha->host_no)); | |
281afe19 | 3641 | DEBUG5(qla2x00_dump_buffer((uint8_t *)nv, ha->nvram_size)); |
0107109e AV |
3642 | |
3643 | /* Bad NVRAM data, set defaults parameters. */ | |
3644 | if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P' | |
3645 | || nv->id[3] != ' ' || | |
3646 | nv->nvram_version < __constant_cpu_to_le16(ICB_VERSION)) { | |
3647 | /* Reset NVRAM data. */ | |
3648 | qla_printk(KERN_WARNING, ha, "Inconsistent NVRAM detected: " | |
3649 | "checksum=0x%x id=%c version=0x%x.\n", chksum, nv->id[0], | |
3650 | le16_to_cpu(nv->nvram_version)); | |
4e08df3f DM |
3651 | qla_printk(KERN_WARNING, ha, "Falling back to functioning (yet " |
3652 | "invalid -- WWPN) defaults.\n"); | |
3653 | ||
3654 | /* | |
3655 | * Set default initialization control block. | |
3656 | */ | |
3657 | memset(nv, 0, ha->nvram_size); | |
3658 | nv->nvram_version = __constant_cpu_to_le16(ICB_VERSION); | |
3659 | nv->version = __constant_cpu_to_le16(ICB_VERSION); | |
3660 | nv->frame_payload_size = __constant_cpu_to_le16(2048); | |
3661 | nv->execution_throttle = __constant_cpu_to_le16(0xFFFF); | |
3662 | nv->exchange_count = __constant_cpu_to_le16(0); | |
3663 | nv->hard_address = __constant_cpu_to_le16(124); | |
3664 | nv->port_name[0] = 0x21; | |
3665 | nv->port_name[1] = 0x00 + PCI_FUNC(ha->pdev->devfn); | |
3666 | nv->port_name[2] = 0x00; | |
3667 | nv->port_name[3] = 0xe0; | |
3668 | nv->port_name[4] = 0x8b; | |
3669 | nv->port_name[5] = 0x1c; | |
3670 | nv->port_name[6] = 0x55; | |
3671 | nv->port_name[7] = 0x86; | |
3672 | nv->node_name[0] = 0x20; | |
3673 | nv->node_name[1] = 0x00; | |
3674 | nv->node_name[2] = 0x00; | |
3675 | nv->node_name[3] = 0xe0; | |
3676 | nv->node_name[4] = 0x8b; | |
3677 | nv->node_name[5] = 0x1c; | |
3678 | nv->node_name[6] = 0x55; | |
3679 | nv->node_name[7] = 0x86; | |
e315cd28 | 3680 | qla24xx_nvram_wwn_from_ofw(vha, nv); |
4e08df3f DM |
3681 | nv->login_retry_count = __constant_cpu_to_le16(8); |
3682 | nv->interrupt_delay_timer = __constant_cpu_to_le16(0); | |
3683 | nv->login_timeout = __constant_cpu_to_le16(0); | |
3684 | nv->firmware_options_1 = | |
3685 | __constant_cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1); | |
3686 | nv->firmware_options_2 = __constant_cpu_to_le32(2 << 4); | |
3687 | nv->firmware_options_2 |= __constant_cpu_to_le32(BIT_12); | |
3688 | nv->firmware_options_3 = __constant_cpu_to_le32(2 << 13); | |
3689 | nv->host_p = __constant_cpu_to_le32(BIT_11|BIT_10); | |
3690 | nv->efi_parameters = __constant_cpu_to_le32(0); | |
3691 | nv->reset_delay = 5; | |
3692 | nv->max_luns_per_target = __constant_cpu_to_le16(128); | |
3693 | nv->port_down_retry_count = __constant_cpu_to_le16(30); | |
3694 | nv->link_down_timeout = __constant_cpu_to_le16(30); | |
3695 | ||
3696 | rval = 1; | |
0107109e AV |
3697 | } |
3698 | ||
3699 | /* Reset Initialization control block */ | |
e315cd28 | 3700 | memset(icb, 0, ha->init_cb_size); |
0107109e AV |
3701 | |
3702 | /* Copy 1st segment. */ | |
3703 | dptr1 = (uint8_t *)icb; | |
3704 | dptr2 = (uint8_t *)&nv->version; | |
3705 | cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version; | |
3706 | while (cnt--) | |
3707 | *dptr1++ = *dptr2++; | |
3708 | ||
3709 | icb->login_retry_count = nv->login_retry_count; | |
3ea66e28 | 3710 | icb->link_down_on_nos = nv->link_down_on_nos; |
0107109e AV |
3711 | |
3712 | /* Copy 2nd segment. */ | |
3713 | dptr1 = (uint8_t *)&icb->interrupt_delay_timer; | |
3714 | dptr2 = (uint8_t *)&nv->interrupt_delay_timer; | |
3715 | cnt = (uint8_t *)&icb->reserved_3 - | |
3716 | (uint8_t *)&icb->interrupt_delay_timer; | |
3717 | while (cnt--) | |
3718 | *dptr1++ = *dptr2++; | |
3719 | ||
3720 | /* | |
3721 | * Setup driver NVRAM options. | |
3722 | */ | |
e315cd28 | 3723 | qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name), |
9bb9fcf2 | 3724 | "QLA2462"); |
0107109e | 3725 | |
5341e868 AV |
3726 | /* Use alternate WWN? */ |
3727 | if (nv->host_p & __constant_cpu_to_le32(BIT_15)) { | |
3728 | memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE); | |
3729 | memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE); | |
3730 | } | |
3731 | ||
0107109e | 3732 | /* Prepare nodename */ |
fd0e7e4d | 3733 | if ((icb->firmware_options_1 & __constant_cpu_to_le32(BIT_14)) == 0) { |
0107109e AV |
3734 | /* |
3735 | * Firmware will apply the following mask if the nodename was | |
3736 | * not provided. | |
3737 | */ | |
3738 | memcpy(icb->node_name, icb->port_name, WWN_SIZE); | |
3739 | icb->node_name[0] &= 0xF0; | |
3740 | } | |
3741 | ||
3742 | /* Set host adapter parameters. */ | |
3743 | ha->flags.disable_risc_code_load = 0; | |
0c8c39af AV |
3744 | ha->flags.enable_lip_reset = 0; |
3745 | ha->flags.enable_lip_full_login = | |
3746 | le32_to_cpu(nv->host_p) & BIT_10 ? 1: 0; | |
3747 | ha->flags.enable_target_reset = | |
3748 | le32_to_cpu(nv->host_p) & BIT_11 ? 1: 0; | |
0107109e | 3749 | ha->flags.enable_led_scheme = 0; |
d4c760c2 | 3750 | ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1: 0; |
0107109e | 3751 | |
fd0e7e4d AV |
3752 | ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) & |
3753 | (BIT_6 | BIT_5 | BIT_4)) >> 4; | |
0107109e AV |
3754 | |
3755 | memcpy(ha->fw_seriallink_options24, nv->seriallink_options, | |
3756 | sizeof(ha->fw_seriallink_options24)); | |
3757 | ||
3758 | /* save HBA serial number */ | |
3759 | ha->serial0 = icb->port_name[5]; | |
3760 | ha->serial1 = icb->port_name[6]; | |
3761 | ha->serial2 = icb->port_name[7]; | |
e315cd28 AC |
3762 | memcpy(vha->node_name, icb->node_name, WWN_SIZE); |
3763 | memcpy(vha->port_name, icb->port_name, WWN_SIZE); | |
0107109e | 3764 | |
bc8fb3cb | 3765 | icb->execution_throttle = __constant_cpu_to_le16(0xFFFF); |
3766 | ||
0107109e AV |
3767 | ha->retry_count = le16_to_cpu(nv->login_retry_count); |
3768 | ||
3769 | /* Set minimum login_timeout to 4 seconds. */ | |
3770 | if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout) | |
3771 | nv->login_timeout = cpu_to_le16(ql2xlogintimeout); | |
3772 | if (le16_to_cpu(nv->login_timeout) < 4) | |
3773 | nv->login_timeout = __constant_cpu_to_le16(4); | |
3774 | ha->login_timeout = le16_to_cpu(nv->login_timeout); | |
c6852c4c | 3775 | icb->login_timeout = nv->login_timeout; |
0107109e | 3776 | |
00a537b8 AV |
3777 | /* Set minimum RATOV to 100 tenths of a second. */ |
3778 | ha->r_a_tov = 100; | |
0107109e AV |
3779 | |
3780 | ha->loop_reset_delay = nv->reset_delay; | |
3781 | ||
3782 | /* Link Down Timeout = 0: | |
3783 | * | |
3784 | * When Port Down timer expires we will start returning | |
3785 | * I/O's to OS with "DID_NO_CONNECT". | |
3786 | * | |
3787 | * Link Down Timeout != 0: | |
3788 | * | |
3789 | * The driver waits for the link to come up after link down | |
3790 | * before returning I/Os to OS with "DID_NO_CONNECT". | |
3791 | */ | |
3792 | if (le16_to_cpu(nv->link_down_timeout) == 0) { | |
3793 | ha->loop_down_abort_time = | |
3794 | (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT); | |
3795 | } else { | |
3796 | ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout); | |
3797 | ha->loop_down_abort_time = | |
3798 | (LOOP_DOWN_TIME - ha->link_down_timeout); | |
3799 | } | |
3800 | ||
3801 | /* Need enough time to try and get the port back. */ | |
3802 | ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count); | |
3803 | if (qlport_down_retry) | |
3804 | ha->port_down_retry_count = qlport_down_retry; | |
3805 | ||
3806 | /* Set login_retry_count */ | |
3807 | ha->login_retry_count = le16_to_cpu(nv->login_retry_count); | |
3808 | if (ha->port_down_retry_count == | |
3809 | le16_to_cpu(nv->port_down_retry_count) && | |
3810 | ha->port_down_retry_count > 3) | |
3811 | ha->login_retry_count = ha->port_down_retry_count; | |
3812 | else if (ha->port_down_retry_count > (int)ha->login_retry_count) | |
3813 | ha->login_retry_count = ha->port_down_retry_count; | |
3814 | if (ql2xloginretrycount) | |
3815 | ha->login_retry_count = ql2xloginretrycount; | |
3816 | ||
4fdfefe5 | 3817 | /* Enable ZIO. */ |
e315cd28 | 3818 | if (!vha->flags.init_done) { |
4fdfefe5 AV |
3819 | ha->zio_mode = le32_to_cpu(icb->firmware_options_2) & |
3820 | (BIT_3 | BIT_2 | BIT_1 | BIT_0); | |
3821 | ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ? | |
3822 | le16_to_cpu(icb->interrupt_delay_timer): 2; | |
3823 | } | |
3824 | icb->firmware_options_2 &= __constant_cpu_to_le32( | |
3825 | ~(BIT_3 | BIT_2 | BIT_1 | BIT_0)); | |
e315cd28 | 3826 | vha->flags.process_response_queue = 0; |
4fdfefe5 | 3827 | if (ha->zio_mode != QLA_ZIO_DISABLED) { |
4a59f71d | 3828 | ha->zio_mode = QLA_ZIO_MODE_6; |
3829 | ||
4fdfefe5 | 3830 | DEBUG2(printk("scsi(%ld): ZIO mode %d enabled; timer delay " |
e315cd28 | 3831 | "(%d us).\n", vha->host_no, ha->zio_mode, |
4fdfefe5 AV |
3832 | ha->zio_timer * 100)); |
3833 | qla_printk(KERN_INFO, ha, | |
3834 | "ZIO mode %d enabled; timer delay (%d us).\n", | |
3835 | ha->zio_mode, ha->zio_timer * 100); | |
3836 | ||
3837 | icb->firmware_options_2 |= cpu_to_le32( | |
3838 | (uint32_t)ha->zio_mode); | |
3839 | icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer); | |
e315cd28 | 3840 | vha->flags.process_response_queue = 1; |
4fdfefe5 AV |
3841 | } |
3842 | ||
4e08df3f DM |
3843 | if (rval) { |
3844 | DEBUG2_3(printk(KERN_WARNING | |
e315cd28 | 3845 | "scsi(%ld): NVRAM configuration failed!\n", vha->host_no)); |
4e08df3f DM |
3846 | } |
3847 | return (rval); | |
0107109e AV |
3848 | } |
3849 | ||
413975a0 | 3850 | static int |
e315cd28 | 3851 | qla24xx_load_risc_flash(scsi_qla_host_t *vha, uint32_t *srisc_addr) |
d1c61909 | 3852 | { |
73208dfd | 3853 | int rval = QLA_SUCCESS; |
d1c61909 AV |
3854 | int segments, fragment; |
3855 | uint32_t faddr; | |
3856 | uint32_t *dcode, dlen; | |
3857 | uint32_t risc_addr; | |
3858 | uint32_t risc_size; | |
3859 | uint32_t i; | |
e315cd28 | 3860 | struct qla_hw_data *ha = vha->hw; |
73208dfd | 3861 | struct req_que *req = ha->req_q_map[0]; |
eaac30be AV |
3862 | |
3863 | qla_printk(KERN_INFO, ha, | |
3864 | "FW: Loading from flash (%x)...\n", ha->flt_region_fw); | |
3865 | ||
d1c61909 AV |
3866 | rval = QLA_SUCCESS; |
3867 | ||
3868 | segments = FA_RISC_CODE_SEGMENTS; | |
c00d8994 | 3869 | faddr = ha->flt_region_fw; |
73208dfd | 3870 | dcode = (uint32_t *)req->ring; |
d1c61909 AV |
3871 | *srisc_addr = 0; |
3872 | ||
3873 | /* Validate firmware image by checking version. */ | |
e315cd28 | 3874 | qla24xx_read_flash_data(vha, dcode, faddr + 4, 4); |
d1c61909 AV |
3875 | for (i = 0; i < 4; i++) |
3876 | dcode[i] = be32_to_cpu(dcode[i]); | |
3877 | if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff && | |
3878 | dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) || | |
3879 | (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 && | |
3880 | dcode[3] == 0)) { | |
3881 | qla_printk(KERN_WARNING, ha, | |
3882 | "Unable to verify integrity of flash firmware image!\n"); | |
3883 | qla_printk(KERN_WARNING, ha, | |
3884 | "Firmware data: %08x %08x %08x %08x!\n", dcode[0], | |
3885 | dcode[1], dcode[2], dcode[3]); | |
3886 | ||
3887 | return QLA_FUNCTION_FAILED; | |
3888 | } | |
3889 | ||
3890 | while (segments && rval == QLA_SUCCESS) { | |
3891 | /* Read segment's load information. */ | |
e315cd28 | 3892 | qla24xx_read_flash_data(vha, dcode, faddr, 4); |
d1c61909 AV |
3893 | |
3894 | risc_addr = be32_to_cpu(dcode[2]); | |
3895 | *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr; | |
3896 | risc_size = be32_to_cpu(dcode[3]); | |
3897 | ||
3898 | fragment = 0; | |
3899 | while (risc_size > 0 && rval == QLA_SUCCESS) { | |
3900 | dlen = (uint32_t)(ha->fw_transfer_size >> 2); | |
3901 | if (dlen > risc_size) | |
3902 | dlen = risc_size; | |
3903 | ||
3904 | DEBUG7(printk("scsi(%ld): Loading risc segment@ risc " | |
3905 | "addr %x, number of dwords 0x%x, offset 0x%x.\n", | |
e315cd28 | 3906 | vha->host_no, risc_addr, dlen, faddr)); |
d1c61909 | 3907 | |
e315cd28 | 3908 | qla24xx_read_flash_data(vha, dcode, faddr, dlen); |
d1c61909 AV |
3909 | for (i = 0; i < dlen; i++) |
3910 | dcode[i] = swab32(dcode[i]); | |
3911 | ||
73208dfd | 3912 | rval = qla2x00_load_ram(vha, req->dma, risc_addr, |
d1c61909 AV |
3913 | dlen); |
3914 | if (rval) { | |
3915 | DEBUG(printk("scsi(%ld):[ERROR] Failed to load " | |
e315cd28 | 3916 | "segment %d of firmware\n", vha->host_no, |
d1c61909 AV |
3917 | fragment)); |
3918 | qla_printk(KERN_WARNING, ha, | |
3919 | "[ERROR] Failed to load segment %d of " | |
3920 | "firmware\n", fragment); | |
3921 | break; | |
3922 | } | |
3923 | ||
3924 | faddr += dlen; | |
3925 | risc_addr += dlen; | |
3926 | risc_size -= dlen; | |
3927 | fragment++; | |
3928 | } | |
3929 | ||
3930 | /* Next segment. */ | |
3931 | segments--; | |
3932 | } | |
3933 | ||
3934 | return rval; | |
3935 | } | |
3936 | ||
d1c61909 AV |
3937 | #define QLA_FW_URL "ftp://ftp.qlogic.com/outgoing/linux/firmware/" |
3938 | ||
0107109e | 3939 | int |
e315cd28 | 3940 | qla2x00_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr) |
5433383e AV |
3941 | { |
3942 | int rval; | |
3943 | int i, fragment; | |
3944 | uint16_t *wcode, *fwcode; | |
3945 | uint32_t risc_addr, risc_size, fwclen, wlen, *seg; | |
3946 | struct fw_blob *blob; | |
e315cd28 | 3947 | struct qla_hw_data *ha = vha->hw; |
73208dfd | 3948 | struct req_que *req = ha->req_q_map[0]; |
5433383e AV |
3949 | |
3950 | /* Load firmware blob. */ | |
e315cd28 | 3951 | blob = qla2x00_request_firmware(vha); |
5433383e AV |
3952 | if (!blob) { |
3953 | qla_printk(KERN_ERR, ha, "Firmware image unavailable.\n"); | |
d1c61909 AV |
3954 | qla_printk(KERN_ERR, ha, "Firmware images can be retrieved " |
3955 | "from: " QLA_FW_URL ".\n"); | |
5433383e AV |
3956 | return QLA_FUNCTION_FAILED; |
3957 | } | |
3958 | ||
3959 | rval = QLA_SUCCESS; | |
3960 | ||
73208dfd | 3961 | wcode = (uint16_t *)req->ring; |
5433383e AV |
3962 | *srisc_addr = 0; |
3963 | fwcode = (uint16_t *)blob->fw->data; | |
3964 | fwclen = 0; | |
3965 | ||
3966 | /* Validate firmware image by checking version. */ | |
3967 | if (blob->fw->size < 8 * sizeof(uint16_t)) { | |
3968 | qla_printk(KERN_WARNING, ha, | |
3969 | "Unable to verify integrity of firmware image (%Zd)!\n", | |
3970 | blob->fw->size); | |
3971 | goto fail_fw_integrity; | |
3972 | } | |
3973 | for (i = 0; i < 4; i++) | |
3974 | wcode[i] = be16_to_cpu(fwcode[i + 4]); | |
3975 | if ((wcode[0] == 0xffff && wcode[1] == 0xffff && wcode[2] == 0xffff && | |
3976 | wcode[3] == 0xffff) || (wcode[0] == 0 && wcode[1] == 0 && | |
3977 | wcode[2] == 0 && wcode[3] == 0)) { | |
3978 | qla_printk(KERN_WARNING, ha, | |
3979 | "Unable to verify integrity of firmware image!\n"); | |
3980 | qla_printk(KERN_WARNING, ha, | |
3981 | "Firmware data: %04x %04x %04x %04x!\n", wcode[0], | |
3982 | wcode[1], wcode[2], wcode[3]); | |
3983 | goto fail_fw_integrity; | |
3984 | } | |
3985 | ||
3986 | seg = blob->segs; | |
3987 | while (*seg && rval == QLA_SUCCESS) { | |
3988 | risc_addr = *seg; | |
3989 | *srisc_addr = *srisc_addr == 0 ? *seg : *srisc_addr; | |
3990 | risc_size = be16_to_cpu(fwcode[3]); | |
3991 | ||
3992 | /* Validate firmware image size. */ | |
3993 | fwclen += risc_size * sizeof(uint16_t); | |
3994 | if (blob->fw->size < fwclen) { | |
3995 | qla_printk(KERN_WARNING, ha, | |
3996 | "Unable to verify integrity of firmware image " | |
3997 | "(%Zd)!\n", blob->fw->size); | |
3998 | goto fail_fw_integrity; | |
3999 | } | |
4000 | ||
4001 | fragment = 0; | |
4002 | while (risc_size > 0 && rval == QLA_SUCCESS) { | |
4003 | wlen = (uint16_t)(ha->fw_transfer_size >> 1); | |
4004 | if (wlen > risc_size) | |
4005 | wlen = risc_size; | |
4006 | ||
4007 | DEBUG7(printk("scsi(%ld): Loading risc segment@ risc " | |
e315cd28 | 4008 | "addr %x, number of words 0x%x.\n", vha->host_no, |
5433383e AV |
4009 | risc_addr, wlen)); |
4010 | ||
4011 | for (i = 0; i < wlen; i++) | |
4012 | wcode[i] = swab16(fwcode[i]); | |
4013 | ||
73208dfd | 4014 | rval = qla2x00_load_ram(vha, req->dma, risc_addr, |
5433383e AV |
4015 | wlen); |
4016 | if (rval) { | |
4017 | DEBUG(printk("scsi(%ld):[ERROR] Failed to load " | |
e315cd28 | 4018 | "segment %d of firmware\n", vha->host_no, |
5433383e AV |
4019 | fragment)); |
4020 | qla_printk(KERN_WARNING, ha, | |
4021 | "[ERROR] Failed to load segment %d of " | |
4022 | "firmware\n", fragment); | |
4023 | break; | |
4024 | } | |
4025 | ||
4026 | fwcode += wlen; | |
4027 | risc_addr += wlen; | |
4028 | risc_size -= wlen; | |
4029 | fragment++; | |
4030 | } | |
4031 | ||
4032 | /* Next segment. */ | |
4033 | seg++; | |
4034 | } | |
4035 | return rval; | |
4036 | ||
4037 | fail_fw_integrity: | |
4038 | return QLA_FUNCTION_FAILED; | |
4039 | } | |
4040 | ||
eaac30be AV |
4041 | static int |
4042 | qla24xx_load_risc_blob(scsi_qla_host_t *vha, uint32_t *srisc_addr) | |
0107109e AV |
4043 | { |
4044 | int rval; | |
4045 | int segments, fragment; | |
4046 | uint32_t *dcode, dlen; | |
4047 | uint32_t risc_addr; | |
4048 | uint32_t risc_size; | |
4049 | uint32_t i; | |
5433383e | 4050 | struct fw_blob *blob; |
0107109e | 4051 | uint32_t *fwcode, fwclen; |
e315cd28 | 4052 | struct qla_hw_data *ha = vha->hw; |
73208dfd | 4053 | struct req_que *req = ha->req_q_map[0]; |
0107109e | 4054 | |
5433383e | 4055 | /* Load firmware blob. */ |
e315cd28 | 4056 | blob = qla2x00_request_firmware(vha); |
5433383e AV |
4057 | if (!blob) { |
4058 | qla_printk(KERN_ERR, ha, "Firmware image unavailable.\n"); | |
d1c61909 AV |
4059 | qla_printk(KERN_ERR, ha, "Firmware images can be retrieved " |
4060 | "from: " QLA_FW_URL ".\n"); | |
4061 | ||
eaac30be | 4062 | return QLA_FUNCTION_FAILED; |
0107109e AV |
4063 | } |
4064 | ||
eaac30be AV |
4065 | qla_printk(KERN_INFO, ha, |
4066 | "FW: Loading via request-firmware...\n"); | |
4067 | ||
0107109e AV |
4068 | rval = QLA_SUCCESS; |
4069 | ||
4070 | segments = FA_RISC_CODE_SEGMENTS; | |
73208dfd | 4071 | dcode = (uint32_t *)req->ring; |
0107109e | 4072 | *srisc_addr = 0; |
5433383e | 4073 | fwcode = (uint32_t *)blob->fw->data; |
0107109e AV |
4074 | fwclen = 0; |
4075 | ||
4076 | /* Validate firmware image by checking version. */ | |
5433383e | 4077 | if (blob->fw->size < 8 * sizeof(uint32_t)) { |
0107109e | 4078 | qla_printk(KERN_WARNING, ha, |
5433383e AV |
4079 | "Unable to verify integrity of firmware image (%Zd)!\n", |
4080 | blob->fw->size); | |
0107109e AV |
4081 | goto fail_fw_integrity; |
4082 | } | |
4083 | for (i = 0; i < 4; i++) | |
4084 | dcode[i] = be32_to_cpu(fwcode[i + 4]); | |
4085 | if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff && | |
4086 | dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) || | |
4087 | (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 && | |
4088 | dcode[3] == 0)) { | |
4089 | qla_printk(KERN_WARNING, ha, | |
5433383e | 4090 | "Unable to verify integrity of firmware image!\n"); |
0107109e AV |
4091 | qla_printk(KERN_WARNING, ha, |
4092 | "Firmware data: %08x %08x %08x %08x!\n", dcode[0], | |
4093 | dcode[1], dcode[2], dcode[3]); | |
4094 | goto fail_fw_integrity; | |
4095 | } | |
4096 | ||
4097 | while (segments && rval == QLA_SUCCESS) { | |
4098 | risc_addr = be32_to_cpu(fwcode[2]); | |
4099 | *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr; | |
4100 | risc_size = be32_to_cpu(fwcode[3]); | |
4101 | ||
4102 | /* Validate firmware image size. */ | |
4103 | fwclen += risc_size * sizeof(uint32_t); | |
5433383e | 4104 | if (blob->fw->size < fwclen) { |
0107109e | 4105 | qla_printk(KERN_WARNING, ha, |
5433383e AV |
4106 | "Unable to verify integrity of firmware image " |
4107 | "(%Zd)!\n", blob->fw->size); | |
4108 | ||
0107109e AV |
4109 | goto fail_fw_integrity; |
4110 | } | |
4111 | ||
4112 | fragment = 0; | |
4113 | while (risc_size > 0 && rval == QLA_SUCCESS) { | |
4114 | dlen = (uint32_t)(ha->fw_transfer_size >> 2); | |
4115 | if (dlen > risc_size) | |
4116 | dlen = risc_size; | |
4117 | ||
4118 | DEBUG7(printk("scsi(%ld): Loading risc segment@ risc " | |
e315cd28 | 4119 | "addr %x, number of dwords 0x%x.\n", vha->host_no, |
0107109e AV |
4120 | risc_addr, dlen)); |
4121 | ||
4122 | for (i = 0; i < dlen; i++) | |
4123 | dcode[i] = swab32(fwcode[i]); | |
4124 | ||
73208dfd | 4125 | rval = qla2x00_load_ram(vha, req->dma, risc_addr, |
590f98e5 | 4126 | dlen); |
0107109e AV |
4127 | if (rval) { |
4128 | DEBUG(printk("scsi(%ld):[ERROR] Failed to load " | |
e315cd28 | 4129 | "segment %d of firmware\n", vha->host_no, |
0107109e AV |
4130 | fragment)); |
4131 | qla_printk(KERN_WARNING, ha, | |
4132 | "[ERROR] Failed to load segment %d of " | |
4133 | "firmware\n", fragment); | |
4134 | break; | |
4135 | } | |
4136 | ||
4137 | fwcode += dlen; | |
4138 | risc_addr += dlen; | |
4139 | risc_size -= dlen; | |
4140 | fragment++; | |
4141 | } | |
4142 | ||
4143 | /* Next segment. */ | |
4144 | segments--; | |
4145 | } | |
0107109e AV |
4146 | return rval; |
4147 | ||
4148 | fail_fw_integrity: | |
0107109e | 4149 | return QLA_FUNCTION_FAILED; |
0107109e | 4150 | } |
18c6c127 | 4151 | |
eaac30be AV |
4152 | int |
4153 | qla24xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr) | |
4154 | { | |
4155 | int rval; | |
4156 | ||
4157 | /* | |
4158 | * FW Load priority: | |
4159 | * 1) Firmware via request-firmware interface (.bin file). | |
4160 | * 2) Firmware residing in flash. | |
4161 | */ | |
4162 | rval = qla24xx_load_risc_blob(vha, srisc_addr); | |
4163 | if (rval == QLA_SUCCESS) | |
4164 | return rval; | |
4165 | ||
4166 | return qla24xx_load_risc_flash(vha, srisc_addr); | |
4167 | } | |
4168 | ||
4169 | int | |
4170 | qla81xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr) | |
4171 | { | |
4172 | int rval; | |
4173 | ||
4174 | /* | |
4175 | * FW Load priority: | |
4176 | * 1) Firmware residing in flash. | |
4177 | * 2) Firmware via request-firmware interface (.bin file). | |
4178 | */ | |
4179 | rval = qla24xx_load_risc_flash(vha, srisc_addr); | |
4180 | if (rval == QLA_SUCCESS) | |
4181 | return rval; | |
4182 | ||
4183 | return qla24xx_load_risc_blob(vha, srisc_addr); | |
4184 | } | |
4185 | ||
18c6c127 | 4186 | void |
e315cd28 | 4187 | qla2x00_try_to_stop_firmware(scsi_qla_host_t *vha) |
18c6c127 AV |
4188 | { |
4189 | int ret, retries; | |
e315cd28 | 4190 | struct qla_hw_data *ha = vha->hw; |
18c6c127 | 4191 | |
e428924c | 4192 | if (!IS_FWI2_CAPABLE(ha)) |
18c6c127 | 4193 | return; |
75edf81d AV |
4194 | if (!ha->fw_major_version) |
4195 | return; | |
18c6c127 | 4196 | |
e315cd28 | 4197 | ret = qla2x00_stop_firmware(vha); |
7c7f1f29 AV |
4198 | for (retries = 5; ret != QLA_SUCCESS && ret != QLA_FUNCTION_TIMEOUT && |
4199 | retries ; retries--) { | |
e315cd28 AC |
4200 | ha->isp_ops->reset_chip(vha); |
4201 | if (ha->isp_ops->chip_diag(vha) != QLA_SUCCESS) | |
18c6c127 | 4202 | continue; |
e315cd28 | 4203 | if (qla2x00_setup_chip(vha) != QLA_SUCCESS) |
18c6c127 AV |
4204 | continue; |
4205 | qla_printk(KERN_INFO, ha, | |
4206 | "Attempting retry of stop-firmware command...\n"); | |
e315cd28 | 4207 | ret = qla2x00_stop_firmware(vha); |
18c6c127 AV |
4208 | } |
4209 | } | |
2c3dfe3f SJ |
4210 | |
4211 | int | |
e315cd28 | 4212 | qla24xx_configure_vhba(scsi_qla_host_t *vha) |
2c3dfe3f SJ |
4213 | { |
4214 | int rval = QLA_SUCCESS; | |
4215 | uint16_t mb[MAILBOX_REGISTER_COUNT]; | |
e315cd28 AC |
4216 | struct qla_hw_data *ha = vha->hw; |
4217 | struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); | |
29bdccbe AC |
4218 | struct req_que *req = ha->req_q_map[vha->req_ques[0]]; |
4219 | struct rsp_que *rsp = req->rsp; | |
2c3dfe3f | 4220 | |
e315cd28 | 4221 | if (!vha->vp_idx) |
2c3dfe3f SJ |
4222 | return -EINVAL; |
4223 | ||
e315cd28 | 4224 | rval = qla2x00_fw_ready(base_vha); |
2c3dfe3f | 4225 | if (rval == QLA_SUCCESS) { |
e315cd28 | 4226 | clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags); |
73208dfd | 4227 | qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL); |
2c3dfe3f SJ |
4228 | } |
4229 | ||
e315cd28 | 4230 | vha->flags.management_server_logged_in = 0; |
2c3dfe3f SJ |
4231 | |
4232 | /* Login to SNS first */ | |
e315cd28 | 4233 | ha->isp_ops->fabric_login(vha, NPH_SNS, 0xff, 0xff, 0xfc, mb, BIT_1); |
2c3dfe3f SJ |
4234 | if (mb[0] != MBS_COMMAND_COMPLETE) { |
4235 | DEBUG15(qla_printk(KERN_INFO, ha, | |
4236 | "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x " | |
4237 | "mb[2]=%x mb[6]=%x mb[7]=%x\n", NPH_SNS, | |
4238 | mb[0], mb[1], mb[2], mb[6], mb[7])); | |
4239 | return (QLA_FUNCTION_FAILED); | |
4240 | } | |
4241 | ||
e315cd28 AC |
4242 | atomic_set(&vha->loop_down_timer, 0); |
4243 | atomic_set(&vha->loop_state, LOOP_UP); | |
4244 | set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags); | |
4245 | set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags); | |
4246 | rval = qla2x00_loop_resync(base_vha); | |
2c3dfe3f SJ |
4247 | |
4248 | return rval; | |
4249 | } | |
4d4df193 HK |
4250 | |
4251 | /* 84XX Support **************************************************************/ | |
4252 | ||
4253 | static LIST_HEAD(qla_cs84xx_list); | |
4254 | static DEFINE_MUTEX(qla_cs84xx_mutex); | |
4255 | ||
4256 | static struct qla_chip_state_84xx * | |
e315cd28 | 4257 | qla84xx_get_chip(struct scsi_qla_host *vha) |
4d4df193 HK |
4258 | { |
4259 | struct qla_chip_state_84xx *cs84xx; | |
e315cd28 | 4260 | struct qla_hw_data *ha = vha->hw; |
4d4df193 HK |
4261 | |
4262 | mutex_lock(&qla_cs84xx_mutex); | |
4263 | ||
4264 | /* Find any shared 84xx chip. */ | |
4265 | list_for_each_entry(cs84xx, &qla_cs84xx_list, list) { | |
4266 | if (cs84xx->bus == ha->pdev->bus) { | |
4267 | kref_get(&cs84xx->kref); | |
4268 | goto done; | |
4269 | } | |
4270 | } | |
4271 | ||
4272 | cs84xx = kzalloc(sizeof(*cs84xx), GFP_KERNEL); | |
4273 | if (!cs84xx) | |
4274 | goto done; | |
4275 | ||
4276 | kref_init(&cs84xx->kref); | |
4277 | spin_lock_init(&cs84xx->access_lock); | |
4278 | mutex_init(&cs84xx->fw_update_mutex); | |
4279 | cs84xx->bus = ha->pdev->bus; | |
4280 | ||
4281 | list_add_tail(&cs84xx->list, &qla_cs84xx_list); | |
4282 | done: | |
4283 | mutex_unlock(&qla_cs84xx_mutex); | |
4284 | return cs84xx; | |
4285 | } | |
4286 | ||
4287 | static void | |
4288 | __qla84xx_chip_release(struct kref *kref) | |
4289 | { | |
4290 | struct qla_chip_state_84xx *cs84xx = | |
4291 | container_of(kref, struct qla_chip_state_84xx, kref); | |
4292 | ||
4293 | mutex_lock(&qla_cs84xx_mutex); | |
4294 | list_del(&cs84xx->list); | |
4295 | mutex_unlock(&qla_cs84xx_mutex); | |
4296 | kfree(cs84xx); | |
4297 | } | |
4298 | ||
4299 | void | |
e315cd28 | 4300 | qla84xx_put_chip(struct scsi_qla_host *vha) |
4d4df193 | 4301 | { |
e315cd28 | 4302 | struct qla_hw_data *ha = vha->hw; |
4d4df193 HK |
4303 | if (ha->cs84xx) |
4304 | kref_put(&ha->cs84xx->kref, __qla84xx_chip_release); | |
4305 | } | |
4306 | ||
4307 | static int | |
e315cd28 | 4308 | qla84xx_init_chip(scsi_qla_host_t *vha) |
4d4df193 HK |
4309 | { |
4310 | int rval; | |
4311 | uint16_t status[2]; | |
e315cd28 | 4312 | struct qla_hw_data *ha = vha->hw; |
4d4df193 HK |
4313 | |
4314 | mutex_lock(&ha->cs84xx->fw_update_mutex); | |
4315 | ||
e315cd28 | 4316 | rval = qla84xx_verify_chip(vha, status); |
4d4df193 HK |
4317 | |
4318 | mutex_unlock(&ha->cs84xx->fw_update_mutex); | |
4319 | ||
4320 | return rval != QLA_SUCCESS || status[0] ? QLA_FUNCTION_FAILED: | |
4321 | QLA_SUCCESS; | |
4322 | } | |
3a03eb79 AV |
4323 | |
4324 | /* 81XX Support **************************************************************/ | |
4325 | ||
4326 | int | |
4327 | qla81xx_nvram_config(scsi_qla_host_t *vha) | |
4328 | { | |
4329 | int rval; | |
4330 | struct init_cb_81xx *icb; | |
4331 | struct nvram_81xx *nv; | |
4332 | uint32_t *dptr; | |
4333 | uint8_t *dptr1, *dptr2; | |
4334 | uint32_t chksum; | |
4335 | uint16_t cnt; | |
4336 | struct qla_hw_data *ha = vha->hw; | |
4337 | ||
4338 | rval = QLA_SUCCESS; | |
4339 | icb = (struct init_cb_81xx *)ha->init_cb; | |
4340 | nv = ha->nvram; | |
4341 | ||
4342 | /* Determine NVRAM starting address. */ | |
4343 | ha->nvram_size = sizeof(struct nvram_81xx); | |
4344 | ha->nvram_base = FA_NVRAM_FUNC0_ADDR; | |
4345 | ha->vpd_size = FA_NVRAM_VPD_SIZE; | |
4346 | ha->vpd_base = FA_NVRAM_VPD0_ADDR; | |
4347 | if (PCI_FUNC(ha->pdev->devfn) & 1) { | |
4348 | ha->nvram_base = FA_NVRAM_FUNC1_ADDR; | |
4349 | ha->vpd_base = FA_NVRAM_VPD1_ADDR; | |
4350 | } | |
4351 | ||
4352 | /* Get VPD data into cache */ | |
4353 | ha->vpd = ha->nvram + VPD_OFFSET; | |
4354 | ha->isp_ops->read_nvram(vha, (uint8_t *)ha->vpd, | |
4355 | ha->nvram_base - FA_NVRAM_FUNC0_ADDR, FA_NVRAM_VPD_SIZE * 4); | |
4356 | ||
4357 | /* Get NVRAM data into cache and calculate checksum. */ | |
4358 | dptr = (uint32_t *)nv; | |
4359 | ha->isp_ops->read_nvram(vha, (uint8_t *)dptr, ha->nvram_base, | |
4360 | ha->nvram_size); | |
4361 | for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++) | |
4362 | chksum += le32_to_cpu(*dptr++); | |
4363 | ||
4364 | DEBUG5(printk("scsi(%ld): Contents of NVRAM\n", ha->host_no)); | |
4365 | DEBUG5(qla2x00_dump_buffer((uint8_t *)nv, ha->nvram_size)); | |
4366 | ||
4367 | /* Bad NVRAM data, set defaults parameters. */ | |
4368 | if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P' | |
4369 | || nv->id[3] != ' ' || | |
4370 | nv->nvram_version < __constant_cpu_to_le16(ICB_VERSION)) { | |
4371 | /* Reset NVRAM data. */ | |
4372 | qla_printk(KERN_WARNING, ha, "Inconsistent NVRAM detected: " | |
4373 | "checksum=0x%x id=%c version=0x%x.\n", chksum, nv->id[0], | |
4374 | le16_to_cpu(nv->nvram_version)); | |
4375 | qla_printk(KERN_WARNING, ha, "Falling back to functioning (yet " | |
4376 | "invalid -- WWPN) defaults.\n"); | |
4377 | ||
4378 | /* | |
4379 | * Set default initialization control block. | |
4380 | */ | |
4381 | memset(nv, 0, ha->nvram_size); | |
4382 | nv->nvram_version = __constant_cpu_to_le16(ICB_VERSION); | |
4383 | nv->version = __constant_cpu_to_le16(ICB_VERSION); | |
4384 | nv->frame_payload_size = __constant_cpu_to_le16(2048); | |
4385 | nv->execution_throttle = __constant_cpu_to_le16(0xFFFF); | |
4386 | nv->exchange_count = __constant_cpu_to_le16(0); | |
4387 | nv->port_name[0] = 0x21; | |
4388 | nv->port_name[1] = 0x00 + PCI_FUNC(ha->pdev->devfn); | |
4389 | nv->port_name[2] = 0x00; | |
4390 | nv->port_name[3] = 0xe0; | |
4391 | nv->port_name[4] = 0x8b; | |
4392 | nv->port_name[5] = 0x1c; | |
4393 | nv->port_name[6] = 0x55; | |
4394 | nv->port_name[7] = 0x86; | |
4395 | nv->node_name[0] = 0x20; | |
4396 | nv->node_name[1] = 0x00; | |
4397 | nv->node_name[2] = 0x00; | |
4398 | nv->node_name[3] = 0xe0; | |
4399 | nv->node_name[4] = 0x8b; | |
4400 | nv->node_name[5] = 0x1c; | |
4401 | nv->node_name[6] = 0x55; | |
4402 | nv->node_name[7] = 0x86; | |
4403 | nv->login_retry_count = __constant_cpu_to_le16(8); | |
4404 | nv->interrupt_delay_timer = __constant_cpu_to_le16(0); | |
4405 | nv->login_timeout = __constant_cpu_to_le16(0); | |
4406 | nv->firmware_options_1 = | |
4407 | __constant_cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1); | |
4408 | nv->firmware_options_2 = __constant_cpu_to_le32(2 << 4); | |
4409 | nv->firmware_options_2 |= __constant_cpu_to_le32(BIT_12); | |
4410 | nv->firmware_options_3 = __constant_cpu_to_le32(2 << 13); | |
4411 | nv->host_p = __constant_cpu_to_le32(BIT_11|BIT_10); | |
4412 | nv->efi_parameters = __constant_cpu_to_le32(0); | |
4413 | nv->reset_delay = 5; | |
4414 | nv->max_luns_per_target = __constant_cpu_to_le16(128); | |
4415 | nv->port_down_retry_count = __constant_cpu_to_le16(30); | |
4416 | nv->link_down_timeout = __constant_cpu_to_le16(30); | |
4417 | nv->enode_mac[0] = 0x01; | |
4418 | nv->enode_mac[1] = 0x02; | |
4419 | nv->enode_mac[2] = 0x03; | |
4420 | nv->enode_mac[3] = 0x04; | |
4421 | nv->enode_mac[4] = 0x05; | |
4422 | nv->enode_mac[5] = 0x06 + PCI_FUNC(ha->pdev->devfn); | |
4423 | ||
4424 | rval = 1; | |
4425 | } | |
4426 | ||
4427 | /* Reset Initialization control block */ | |
4428 | memset(icb, 0, sizeof(struct init_cb_81xx)); | |
4429 | ||
4430 | /* Copy 1st segment. */ | |
4431 | dptr1 = (uint8_t *)icb; | |
4432 | dptr2 = (uint8_t *)&nv->version; | |
4433 | cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version; | |
4434 | while (cnt--) | |
4435 | *dptr1++ = *dptr2++; | |
4436 | ||
4437 | icb->login_retry_count = nv->login_retry_count; | |
4438 | ||
4439 | /* Copy 2nd segment. */ | |
4440 | dptr1 = (uint8_t *)&icb->interrupt_delay_timer; | |
4441 | dptr2 = (uint8_t *)&nv->interrupt_delay_timer; | |
4442 | cnt = (uint8_t *)&icb->reserved_5 - | |
4443 | (uint8_t *)&icb->interrupt_delay_timer; | |
4444 | while (cnt--) | |
4445 | *dptr1++ = *dptr2++; | |
4446 | ||
4447 | memcpy(icb->enode_mac, nv->enode_mac, sizeof(icb->enode_mac)); | |
4448 | /* Some boards (with valid NVRAMs) still have NULL enode_mac!! */ | |
4449 | if (!memcmp(icb->enode_mac, "\0\0\0\0\0\0", sizeof(icb->enode_mac))) { | |
4450 | icb->enode_mac[0] = 0x01; | |
4451 | icb->enode_mac[1] = 0x02; | |
4452 | icb->enode_mac[2] = 0x03; | |
4453 | icb->enode_mac[3] = 0x04; | |
4454 | icb->enode_mac[4] = 0x05; | |
4455 | icb->enode_mac[5] = 0x06 + PCI_FUNC(ha->pdev->devfn); | |
4456 | } | |
4457 | ||
4458 | /* | |
4459 | * Setup driver NVRAM options. | |
4460 | */ | |
4461 | qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name), | |
4462 | "QLE81XX"); | |
4463 | ||
4464 | /* Use alternate WWN? */ | |
4465 | if (nv->host_p & __constant_cpu_to_le32(BIT_15)) { | |
4466 | memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE); | |
4467 | memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE); | |
4468 | } | |
4469 | ||
4470 | /* Prepare nodename */ | |
4471 | if ((icb->firmware_options_1 & __constant_cpu_to_le32(BIT_14)) == 0) { | |
4472 | /* | |
4473 | * Firmware will apply the following mask if the nodename was | |
4474 | * not provided. | |
4475 | */ | |
4476 | memcpy(icb->node_name, icb->port_name, WWN_SIZE); | |
4477 | icb->node_name[0] &= 0xF0; | |
4478 | } | |
4479 | ||
4480 | /* Set host adapter parameters. */ | |
4481 | ha->flags.disable_risc_code_load = 0; | |
4482 | ha->flags.enable_lip_reset = 0; | |
4483 | ha->flags.enable_lip_full_login = | |
4484 | le32_to_cpu(nv->host_p) & BIT_10 ? 1: 0; | |
4485 | ha->flags.enable_target_reset = | |
4486 | le32_to_cpu(nv->host_p) & BIT_11 ? 1: 0; | |
4487 | ha->flags.enable_led_scheme = 0; | |
4488 | ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1: 0; | |
4489 | ||
4490 | ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) & | |
4491 | (BIT_6 | BIT_5 | BIT_4)) >> 4; | |
4492 | ||
4493 | /* save HBA serial number */ | |
4494 | ha->serial0 = icb->port_name[5]; | |
4495 | ha->serial1 = icb->port_name[6]; | |
4496 | ha->serial2 = icb->port_name[7]; | |
4497 | memcpy(vha->node_name, icb->node_name, WWN_SIZE); | |
4498 | memcpy(vha->port_name, icb->port_name, WWN_SIZE); | |
4499 | ||
4500 | icb->execution_throttle = __constant_cpu_to_le16(0xFFFF); | |
4501 | ||
4502 | ha->retry_count = le16_to_cpu(nv->login_retry_count); | |
4503 | ||
4504 | /* Set minimum login_timeout to 4 seconds. */ | |
4505 | if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout) | |
4506 | nv->login_timeout = cpu_to_le16(ql2xlogintimeout); | |
4507 | if (le16_to_cpu(nv->login_timeout) < 4) | |
4508 | nv->login_timeout = __constant_cpu_to_le16(4); | |
4509 | ha->login_timeout = le16_to_cpu(nv->login_timeout); | |
4510 | icb->login_timeout = nv->login_timeout; | |
4511 | ||
4512 | /* Set minimum RATOV to 100 tenths of a second. */ | |
4513 | ha->r_a_tov = 100; | |
4514 | ||
4515 | ha->loop_reset_delay = nv->reset_delay; | |
4516 | ||
4517 | /* Link Down Timeout = 0: | |
4518 | * | |
4519 | * When Port Down timer expires we will start returning | |
4520 | * I/O's to OS with "DID_NO_CONNECT". | |
4521 | * | |
4522 | * Link Down Timeout != 0: | |
4523 | * | |
4524 | * The driver waits for the link to come up after link down | |
4525 | * before returning I/Os to OS with "DID_NO_CONNECT". | |
4526 | */ | |
4527 | if (le16_to_cpu(nv->link_down_timeout) == 0) { | |
4528 | ha->loop_down_abort_time = | |
4529 | (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT); | |
4530 | } else { | |
4531 | ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout); | |
4532 | ha->loop_down_abort_time = | |
4533 | (LOOP_DOWN_TIME - ha->link_down_timeout); | |
4534 | } | |
4535 | ||
4536 | /* Need enough time to try and get the port back. */ | |
4537 | ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count); | |
4538 | if (qlport_down_retry) | |
4539 | ha->port_down_retry_count = qlport_down_retry; | |
4540 | ||
4541 | /* Set login_retry_count */ | |
4542 | ha->login_retry_count = le16_to_cpu(nv->login_retry_count); | |
4543 | if (ha->port_down_retry_count == | |
4544 | le16_to_cpu(nv->port_down_retry_count) && | |
4545 | ha->port_down_retry_count > 3) | |
4546 | ha->login_retry_count = ha->port_down_retry_count; | |
4547 | else if (ha->port_down_retry_count > (int)ha->login_retry_count) | |
4548 | ha->login_retry_count = ha->port_down_retry_count; | |
4549 | if (ql2xloginretrycount) | |
4550 | ha->login_retry_count = ql2xloginretrycount; | |
4551 | ||
4552 | /* Enable ZIO. */ | |
4553 | if (!vha->flags.init_done) { | |
4554 | ha->zio_mode = le32_to_cpu(icb->firmware_options_2) & | |
4555 | (BIT_3 | BIT_2 | BIT_1 | BIT_0); | |
4556 | ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ? | |
4557 | le16_to_cpu(icb->interrupt_delay_timer): 2; | |
4558 | } | |
4559 | icb->firmware_options_2 &= __constant_cpu_to_le32( | |
4560 | ~(BIT_3 | BIT_2 | BIT_1 | BIT_0)); | |
4561 | vha->flags.process_response_queue = 0; | |
4562 | if (ha->zio_mode != QLA_ZIO_DISABLED) { | |
4563 | ha->zio_mode = QLA_ZIO_MODE_6; | |
4564 | ||
4565 | DEBUG2(printk("scsi(%ld): ZIO mode %d enabled; timer delay " | |
4566 | "(%d us).\n", vha->host_no, ha->zio_mode, | |
4567 | ha->zio_timer * 100)); | |
4568 | qla_printk(KERN_INFO, ha, | |
4569 | "ZIO mode %d enabled; timer delay (%d us).\n", | |
4570 | ha->zio_mode, ha->zio_timer * 100); | |
4571 | ||
4572 | icb->firmware_options_2 |= cpu_to_le32( | |
4573 | (uint32_t)ha->zio_mode); | |
4574 | icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer); | |
4575 | vha->flags.process_response_queue = 1; | |
4576 | } | |
4577 | ||
4578 | if (rval) { | |
4579 | DEBUG2_3(printk(KERN_WARNING | |
4580 | "scsi(%ld): NVRAM configuration failed!\n", vha->host_no)); | |
4581 | } | |
4582 | return (rval); | |
4583 | } | |
4584 | ||
4585 | void | |
4586 | qla81xx_update_fw_options(scsi_qla_host_t *ha) | |
4587 | { | |
4588 | } |