projects / linux-2.6-block.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
scsi: qla2xxx: Remove ASYNC GIDPN switch command
[linux-2.6-block.git] / drivers / scsi / qla2xxx / qla_init.c
CommitLineData
1da177e4 1/*
fa90c54f 2 * QLogic Fibre Channel HBA Driver
bd21eaf9 3 * Copyright (c) 2003-2014 QLogic Corporation
1da177e4 4 *
fa90c54f 5 * See LICENSE.qla2xxx for copyright and licensing details.
1da177e4
LT		 6 */
7#include "qla_def.h"
73208dfd 8#include "qla_gbl.h"
1da177e4
LT		 9
10#include <linux/delay.h>
5a0e3ad6 11#include <linux/slab.h>
0107109e 12#include <linux/vmalloc.h>
1da177e4
LT		 13
14#include "qla_devtbl.h"
15
4e08df3f
DM		 16#ifdef CONFIG_SPARC
17#include <asm/prom.h>
4e08df3f
DM		 18#endif
19
2d70c103
NB		 20#include <target/target_core_base.h>
21#include "qla_target.h"
22
1da177e4
LT		 23/*
24* QLogic ISP2x00 Hardware Support Function Prototypes.
25*/
1da177e4 26static int qla2x00_isp_firmware(scsi_qla_host_t *);
1da177e4 27static int qla2x00_setup_chip(scsi_qla_host_t *);
1da177e4
LT		 28static int qla2x00_fw_ready(scsi_qla_host_t *);
29static int qla2x00_configure_hba(scsi_qla_host_t *);
1da177e4
LT		 30static int qla2x00_configure_loop(scsi_qla_host_t *);
31static int qla2x00_configure_local_loop(scsi_qla_host_t *);
1da177e4 32static int qla2x00_configure_fabric(scsi_qla_host_t *);
726b8548 33static int qla2x00_find_all_fabric_devs(scsi_qla_host_t *);
1da177e4 34static int qla2x00_restart_isp(scsi_qla_host_t *);
1da177e4 35
4d4df193
HK		 36static struct qla_chip_state_84xx *qla84xx_get_chip(struct scsi_qla_host *);
37static int qla84xx_init_chip(scsi_qla_host_t *);
73208dfd 38static int qla25xx_init_queues(struct qla_hw_data *);
a5d42f4c 39static int qla24xx_post_prli_work(struct scsi_qla_host*, fc_port_t *);
726b8548
QT		 40static void qla24xx_handle_plogi_done_event(struct scsi_qla_host *,
41 struct event_arg *);
a5d42f4c
DG		 42static void qla24xx_handle_prli_done_event(struct scsi_qla_host *,
43 struct event_arg *);
a4239945 44static void __qla24xx_handle_gpdb_event(scsi_qla_host_t *, struct event_arg *);
4d4df193 45
ac280b67
AV		 46/* SRB Extensions ---------------------------------------------------------- */
47
9ba56b95 48void
8e5f4ba0 49qla2x00_sp_timeout(struct timer_list *t)
ac280b67 50{
8e5f4ba0 51 srb_t *sp = from_timer(sp, t, u.iocb_cmd.timer);
4916392b 52 struct srb_iocb *iocb;
ac280b67
AV		 53 struct req_que *req;
54 unsigned long flags;
55
f6145e86
QT		 56 spin_lock_irqsave(sp->qpair->qp_lock_ptr, flags);
57 req = sp->qpair->req;
ac280b67 58 req->outstanding_cmds[sp->handle] = NULL;
9ba56b95 59 iocb = &sp->u.iocb_cmd;
f6145e86 60 spin_unlock_irqrestore(sp->qpair->qp_lock_ptr, flags);
4916392b 61 iocb->timeout(sp);
ac280b67
AV		 62}
63
9ba56b95 64void
25ff6af1 65qla2x00_sp_free(void *ptr)
ac280b67 66{
25ff6af1 67 srb_t *sp = ptr;
9ba56b95 68 struct srb_iocb *iocb = &sp->u.iocb_cmd;
ac280b67 69
4d97cc53 70 del_timer(&iocb->timer);
25ff6af1 71 qla2x00_rel_sp(sp);
ac280b67
AV		 72}
73
ac280b67
AV		 74/* Asynchronous Login/Logout Routines -------------------------------------- */
75
a9b6f722 76unsigned long
5b91490e
AV		 77qla2x00_get_async_timeout(struct scsi_qla_host *vha)
78{
79 unsigned long tmo;
80 struct qla_hw_data *ha = vha->hw;
81
82 /* Firmware should use switch negotiated r_a_tov for timeout. */
83 tmo = ha->r_a_tov / 10 * 2;
8ae6d9c7
GM		 84 if (IS_QLAFX00(ha)) {
85 tmo = FX00_DEF_RATOV * 2;
86 } else if (!IS_FWI2_CAPABLE(ha)) {
5b91490e
AV		 87 /*
88 * Except for earlier ISPs where the timeout is seeded from the
89 * initialization control block.
90 */
91 tmo = ha->login_timeout;
92 }
93 return tmo;
94}
ac280b67 95
726b8548 96void
9ba56b95 97qla2x00_async_iocb_timeout(void *data)
ac280b67 98{
25ff6af1 99 srb_t *sp = data;
ac280b67 100 fc_port_t *fcport = sp->fcport;
726b8548 101 struct srb_iocb *lio = &sp->u.iocb_cmd;
f6145e86
QT		 102 int rc, h;
103 unsigned long flags;
ac280b67 104
5c25d451
QT		 105 if (fcport) {
106 ql_dbg(ql_dbg_disc, fcport->vha, 0x2071,
107 "Async-%s timeout - hdl=%x portid=%06x %8phC.\n",
108 sp->name, sp->handle, fcport->d_id.b24, fcport->port_name);
109
6d674927 110 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
5c25d451
QT		 111 } else {
112 pr_info("Async-%s timeout - hdl=%x.\n",
113 sp->name, sp->handle);
114 }
726b8548
QT		 115
116 switch (sp->type) {
117 case SRB_LOGIN_CMD:
f6145e86
QT		 118 rc = qla24xx_async_abort_cmd(sp, false);
119 if (rc) {
120 /* Retry as needed. */
121 lio->u.logio.data[0] = MBS_COMMAND_ERROR;
122 lio->u.logio.data[1] =
123 lio->u.logio.flags & SRB_LOGIN_RETRIED ?
124 QLA_LOGIO_LOGIN_RETRIED : 0;
125 spin_lock_irqsave(sp->qpair->qp_lock_ptr, flags);
126 for (h = 1; h < sp->qpair->req->num_outstanding_cmds;
127 h++) {
128 if (sp->qpair->req->outstanding_cmds[h] ==
129 sp) {
130 sp->qpair->req->outstanding_cmds[h] =
131 NULL;
132 break;
133 }
134 }
135 spin_unlock_irqrestore(sp->qpair->qp_lock_ptr, flags);
136 sp->done(sp, QLA_FUNCTION_TIMEOUT);
137 }
726b8548
QT		 138 break;
139 case SRB_LOGOUT_CMD:
726b8548
QT		 140 case SRB_CT_PTHRU_CMD:
141 case SRB_MB_IOCB:
142 case SRB_NACK_PLOGI:
143 case SRB_NACK_PRLI:
144 case SRB_NACK_LOGO:
2853192e 145 case SRB_CTRL_VP:
f6145e86
QT		 146 rc = qla24xx_async_abort_cmd(sp, false);
147 if (rc) {
148 spin_lock_irqsave(sp->qpair->qp_lock_ptr, flags);
149 for (h = 1; h < sp->qpair->req->num_outstanding_cmds;
150 h++) {
151 if (sp->qpair->req->outstanding_cmds[h] ==
152 sp) {
153 sp->qpair->req->outstanding_cmds[h] =
154 NULL;
155 break;
156 }
157 }
158 spin_unlock_irqrestore(sp->qpair->qp_lock_ptr, flags);
159 sp->done(sp, QLA_FUNCTION_TIMEOUT);
160 }
726b8548 161 break;
6ac52608 162 }
ac280b67
AV		 163}
164
99b0bec7 165static void
25ff6af1 166qla2x00_async_login_sp_done(void *ptr, int res)
99b0bec7 167{
25ff6af1
JC		 168 srb_t *sp = ptr;
169 struct scsi_qla_host *vha = sp->vha;
9ba56b95 170 struct srb_iocb *lio = &sp->u.iocb_cmd;
726b8548 171 struct event_arg ea;
9ba56b95 172
83548fe2 173 ql_dbg(ql_dbg_disc, vha, 0x20dd,
25ff6af1 174 "%s %8phC res %d \n", __func__, sp->fcport->port_name, res);
726b8548 175
6d674927
QT		 176 sp->fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
177
726b8548
QT		 178 if (!test_bit(UNLOADING, &vha->dpc_flags)) {
179 memset(&ea, 0, sizeof(ea));
180 ea.event = FCME_PLOGI_DONE;
181 ea.fcport = sp->fcport;
182 ea.data[0] = lio->u.logio.data[0];
183 ea.data[1] = lio->u.logio.data[1];
184 ea.iop[0] = lio->u.logio.iop[0];
185 ea.iop[1] = lio->u.logio.iop[1];
186 ea.sp = sp;
187 qla2x00_fcport_event_handler(vha, &ea);
188 }
9ba56b95 189
25ff6af1 190 sp->free(sp);
99b0bec7
AV		 191}
192
48acad09
QT		 193static inline bool
194fcport_is_smaller(fc_port_t *fcport)
195{
196 if (wwn_to_u64(fcport->port_name) <
197 wwn_to_u64(fcport->vha->port_name))
198 return true;
199 else
200 return false;
201}
202
203static inline bool
204fcport_is_bigger(fc_port_t *fcport)
205{
206 return !fcport_is_smaller(fcport);
207}
208
ac280b67
AV		 209int
210qla2x00_async_login(struct scsi_qla_host *vha, fc_port_t *fcport,
211 uint16_t *data)
212{
ac280b67 213 srb_t *sp;
4916392b 214 struct srb_iocb *lio;
726b8548
QT		 215 int rval = QLA_FUNCTION_FAILED;
216
217 if (!vha->flags.online)
218 goto done;
219
9ba56b95 220 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
ac280b67
AV		 221 if (!sp)
222 goto done;
223
726b8548
QT		 224 fcport->flags |= FCF_ASYNC_SENT;
225 fcport->logout_completed = 0;
226
a4239945 227 fcport->disc_state = DSC_LOGIN_PEND;
9ba56b95
GM		 228 sp->type = SRB_LOGIN_CMD;
229 sp->name = "login";
a4239945
QT		 230 sp->gen1 = fcport->rscn_gen;
231 sp->gen2 = fcport->login_gen;
9ba56b95
GM		 232
233 lio = &sp->u.iocb_cmd;
3822263e 234 lio->timeout = qla2x00_async_iocb_timeout;
e74e7d95
BH		 235 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2);
236
9ba56b95 237 sp->done = qla2x00_async_login_sp_done;
48acad09
QT		 238 if (N2N_TOPO(fcport->vha->hw) && fcport_is_bigger(fcport)) {
239 lio->u.logio.flags |= SRB_LOGIN_PRLI_ONLY;
240 } else {
241 lio->u.logio.flags |= SRB_LOGIN_COND_PLOGI;
a5d42f4c 242
48acad09
QT		 243 if (fcport->fc4f_nvme)
244 lio->u.logio.flags |= SRB_LOGIN_SKIP_PRLI;
245
48acad09 246 }
a5d42f4c 247
ac280b67 248 rval = qla2x00_start_sp(sp);
080c9517 249 if (rval != QLA_SUCCESS) {
080c9517
CD		 250 fcport->flags |= FCF_LOGIN_NEEDED;
251 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
ac280b67 252 goto done_free_sp;
080c9517 253 }
ac280b67 254
7c3df132 255 ql_dbg(ql_dbg_disc, vha, 0x2072,
726b8548
QT		 256 "Async-login - %8phC hdl=%x, loopid=%x portid=%02x%02x%02x "
257 "retries=%d.\n", fcport->port_name, sp->handle, fcport->loop_id,
cfb0919c
CD		 258 fcport->d_id.b.domain, fcport->d_id.b.area, fcport->d_id.b.al_pa,
259 fcport->login_retry);
ac280b67
AV		 260 return rval;
261
262done_free_sp:
25ff6af1 263 sp->free(sp);
726b8548 264 fcport->flags &= ~FCF_ASYNC_SENT;
3dbec59b 265done:
fa83e658 266 fcport->flags &= ~FCF_ASYNC_ACTIVE;
ac280b67
AV		 267 return rval;
268}
269
99b0bec7 270static void
25ff6af1 271qla2x00_async_logout_sp_done(void *ptr, int res)
99b0bec7 272{
25ff6af1 273 srb_t *sp = ptr;
9ba56b95 274
6d674927 275 sp->fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
eaf75d18
QT		 276 sp->fcport->login_gen++;
277 qlt_logo_completion_handler(sp->fcport, res);
25ff6af1 278 sp->free(sp);
99b0bec7
AV		 279}
280
ac280b67
AV		 281int
282qla2x00_async_logout(struct scsi_qla_host *vha, fc_port_t *fcport)
283{
ac280b67 284 srb_t *sp;
4916392b 285 struct srb_iocb *lio;
3dbec59b
QT		 286 int rval = QLA_FUNCTION_FAILED;
287
288 if (!vha->flags.online || (fcport->flags & FCF_ASYNC_SENT))
289 return rval;
ac280b67 290
726b8548 291 fcport->flags |= FCF_ASYNC_SENT;
9ba56b95 292 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
ac280b67
AV		 293 if (!sp)
294 goto done;
295
9ba56b95
GM		 296 sp->type = SRB_LOGOUT_CMD;
297 sp->name = "logout";
9ba56b95
GM		 298
299 lio = &sp->u.iocb_cmd;
3822263e 300 lio->timeout = qla2x00_async_iocb_timeout;
e74e7d95
BH		 301 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2);
302
9ba56b95 303 sp->done = qla2x00_async_logout_sp_done;
ac280b67
AV		 304 rval = qla2x00_start_sp(sp);
305 if (rval != QLA_SUCCESS)
306 goto done_free_sp;
307
7c3df132 308 ql_dbg(ql_dbg_disc, vha, 0x2070,
726b8548 309 "Async-logout - hdl=%x loop-id=%x portid=%02x%02x%02x %8phC.\n",
cfb0919c 310 sp->handle, fcport->loop_id, fcport->d_id.b.domain,
726b8548
QT		 311 fcport->d_id.b.area, fcport->d_id.b.al_pa,
312 fcport->port_name);
ac280b67
AV		 313 return rval;
314
315done_free_sp:
25ff6af1 316 sp->free(sp);
ac280b67 317done:
fa83e658 318 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
ac280b67
AV		 319 return rval;
320}
11aea16a
QT		 321
322void
323qla2x00_async_prlo_done(struct scsi_qla_host *vha, fc_port_t *fcport,
324 uint16_t *data)
325{
fa83e658 326 fcport->flags &= ~FCF_ASYNC_ACTIVE;
11aea16a
QT		 327 /* Don't re-login in target mode */
328 if (!fcport->tgt_session)
329 qla2x00_mark_device_lost(vha, fcport, 1, 0);
330 qlt_logo_completion_handler(fcport, data[0]);
331}
332
333static void
334qla2x00_async_prlo_sp_done(void *s, int res)
335{
336 srb_t *sp = (srb_t *)s;
337 struct srb_iocb *lio = &sp->u.iocb_cmd;
338 struct scsi_qla_host *vha = sp->vha;
339
fa83e658 340 sp->fcport->flags &= ~FCF_ASYNC_ACTIVE;
11aea16a
QT		 341 if (!test_bit(UNLOADING, &vha->dpc_flags))
342 qla2x00_post_async_prlo_done_work(sp->fcport->vha, sp->fcport,
343 lio->u.logio.data);
344 sp->free(sp);
345}
346
347int
348qla2x00_async_prlo(struct scsi_qla_host *vha, fc_port_t *fcport)
349{
350 srb_t *sp;
351 struct srb_iocb *lio;
352 int rval;
353
354 rval = QLA_FUNCTION_FAILED;
355 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
356 if (!sp)
357 goto done;
358
359 sp->type = SRB_PRLO_CMD;
360 sp->name = "prlo";
11aea16a
QT		 361
362 lio = &sp->u.iocb_cmd;
363 lio->timeout = qla2x00_async_iocb_timeout;
e74e7d95
BH		 364 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2);
365
11aea16a
QT		 366 sp->done = qla2x00_async_prlo_sp_done;
367 rval = qla2x00_start_sp(sp);
368 if (rval != QLA_SUCCESS)
369 goto done_free_sp;
370
371 ql_dbg(ql_dbg_disc, vha, 0x2070,
372 "Async-prlo - hdl=%x loop-id=%x portid=%02x%02x%02x.\n",
373 sp->handle, fcport->loop_id, fcport->d_id.b.domain,
374 fcport->d_id.b.area, fcport->d_id.b.al_pa);
375 return rval;
376
377done_free_sp:
378 sp->free(sp);
379done:
fa83e658 380 fcport->flags &= ~FCF_ASYNC_ACTIVE;
11aea16a
QT		 381 return rval;
382}
383
f13515ac
QT		 384static
385void qla24xx_handle_adisc_event(scsi_qla_host_t *vha, struct event_arg *ea)
386{
0616e965
QT		 387 struct fc_port *fcport = ea->fcport;
388
389 ql_dbg(ql_dbg_disc, vha, 0x20d2,
390 "%s %8phC DS %d LS %d rc %d login %d|%d rscn %d|%d lid %d\n",
391 __func__, fcport->port_name, fcport->disc_state,
392 fcport->fw_login_state, ea->rc, fcport->login_gen, ea->sp->gen2,
393 fcport->rscn_gen, ea->sp->gen1, fcport->loop_id);
394
395 if (ea->data[0] != MBS_COMMAND_COMPLETE) {
a4239945
QT		 396 ql_dbg(ql_dbg_disc, vha, 0x2066,
397 "%s %8phC: adisc fail: post delete\n",
398 __func__, ea->fcport->port_name);
2d3fdbeb
QT		 399 /* deleted = 0 & logout_on_delete = force fw cleanup */
400 fcport->deleted = 0;
401 fcport->logout_on_delete = 1;
94cff6e1 402 qlt_schedule_sess_for_deletion(ea->fcport);
a4239945
QT		 403 return;
404 }
a4239945
QT		 405
406 if (ea->fcport->disc_state == DSC_DELETE_PEND)
407 return;
408
409 if (ea->sp->gen2 != ea->fcport->login_gen) {
410 /* target side must have changed it. */
411 ql_dbg(ql_dbg_disc, vha, 0x20d3,
0616e965
QT		 412 "%s %8phC generation changed\n",
413 __func__, ea->fcport->port_name);
a4239945
QT		 414 return;
415 } else if (ea->sp->gen1 != ea->fcport->rscn_gen) {
d4f7a16a 416 qla_rscn_replay(fcport);
a4239945
QT		 417 return;
418 }
419
420 __qla24xx_handle_gpdb_event(vha, ea);
f13515ac 421}
ac280b67 422
8777e431
QT		 423int qla_post_els_plogi_work(struct scsi_qla_host *vha, fc_port_t *fcport)
424{
425 struct qla_work_evt *e;
426
427 e = qla2x00_alloc_work(vha, QLA_EVT_ELS_PLOGI);
428 if (!e)
429 return QLA_FUNCTION_FAILED;
430
431 e->u.fcport.fcport = fcport;
432 fcport->flags |= FCF_ASYNC_ACTIVE;
433 return qla2x00_post_work(vha, e);
434}
435
5ff1d584 436static void
25ff6af1 437qla2x00_async_adisc_sp_done(void *ptr, int res)
5ff1d584 438{
25ff6af1
JC		 439 srb_t *sp = ptr;
440 struct scsi_qla_host *vha = sp->vha;
f13515ac 441 struct event_arg ea;
0616e965 442 struct srb_iocb *lio = &sp->u.iocb_cmd;
f13515ac
QT		 443
444 ql_dbg(ql_dbg_disc, vha, 0x2066,
445 "Async done-%s res %x %8phC\n",
446 sp->name, res, sp->fcport->port_name);
447
15b6c3c9 448 sp->fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
fa83e658 449
f13515ac
QT		 450 memset(&ea, 0, sizeof(ea));
451 ea.event = FCME_ADISC_DONE;
452 ea.rc = res;
0616e965
QT		 453 ea.data[0] = lio->u.logio.data[0];
454 ea.data[1] = lio->u.logio.data[1];
455 ea.iop[0] = lio->u.logio.iop[0];
456 ea.iop[1] = lio->u.logio.iop[1];
f13515ac
QT		 457 ea.fcport = sp->fcport;
458 ea.sp = sp;
459
460 qla2x00_fcport_event_handler(vha, &ea);
9ba56b95 461
25ff6af1 462 sp->free(sp);
5ff1d584
AV		 463}
464
465int
466qla2x00_async_adisc(struct scsi_qla_host *vha, fc_port_t *fcport,
467 uint16_t *data)
468{
5ff1d584 469 srb_t *sp;
4916392b 470 struct srb_iocb *lio;
5ff1d584
AV		 471 int rval;
472
473 rval = QLA_FUNCTION_FAILED;
726b8548 474 fcport->flags |= FCF_ASYNC_SENT;
9ba56b95 475 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
5ff1d584
AV		 476 if (!sp)
477 goto done;
478
9ba56b95
GM		 479 sp->type = SRB_ADISC_CMD;
480 sp->name = "adisc";
9ba56b95
GM		 481
482 lio = &sp->u.iocb_cmd;
3822263e 483 lio->timeout = qla2x00_async_iocb_timeout;
8777e431
QT		 484 sp->gen1 = fcport->rscn_gen;
485 sp->gen2 = fcport->login_gen;
e74e7d95
BH		 486 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2);
487
9ba56b95 488 sp->done = qla2x00_async_adisc_sp_done;
5ff1d584 489 if (data[1] & QLA_LOGIO_LOGIN_RETRIED)
4916392b 490 lio->u.logio.flags |= SRB_LOGIN_RETRIED;
5ff1d584
AV		 491 rval = qla2x00_start_sp(sp);
492 if (rval != QLA_SUCCESS)
493 goto done_free_sp;
494
7c3df132 495 ql_dbg(ql_dbg_disc, vha, 0x206f,
f13515ac
QT		 496 "Async-adisc - hdl=%x loopid=%x portid=%06x %8phC.\n",
497 sp->handle, fcport->loop_id, fcport->d_id.b24, fcport->port_name);
5ff1d584
AV		 498 return rval;
499
500done_free_sp:
25ff6af1 501 sp->free(sp);
5ff1d584 502done:
fa83e658 503 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
f13515ac 504 qla2x00_post_async_adisc_work(vha, fcport, data);
726b8548
QT		 505 return rval;
506}
507
508static void qla24xx_handle_gnl_done_event(scsi_qla_host_t *vha,
509 struct event_arg *ea)
510{
511 fc_port_t *fcport, *conflict_fcport;
512 struct get_name_list_extended *e;
513 u16 i, n, found = 0, loop_id;
514 port_id_t id;
515 u64 wwn;
a4239945
QT		 516 u16 data[2];
517 u8 current_login_state;
726b8548
QT		 518
519 fcport = ea->fcport;
f352eeb7
QT		 520 ql_dbg(ql_dbg_disc, vha, 0xffff,
521 "%s %8phC DS %d LS rc %d %d login %d|%d rscn %d|%d lid %d\n",
522 __func__, fcport->port_name, fcport->disc_state,
523 fcport->fw_login_state, ea->rc,
524 fcport->login_gen, fcport->last_login_gen,
525 fcport->rscn_gen, fcport->last_rscn_gen, vha->loop_id);
726b8548 526
a4239945
QT		 527 if (fcport->disc_state == DSC_DELETE_PEND)
528 return;
529
726b8548
QT		 530 if (ea->rc) { /* rval */
531 if (fcport->login_retry == 0) {
83548fe2
QT		 532 ql_dbg(ql_dbg_disc, vha, 0x20de,
533 "GNL failed Port login retry %8phN, retry cnt=%d.\n",
534 fcport->port_name, fcport->login_retry);
726b8548
QT		 535 }
536 return;
537 }
538
539 if (fcport->last_rscn_gen != fcport->rscn_gen) {
d4f7a16a 540 qla_rscn_replay(fcport);
726b8548
QT		 541 return;
542 } else if (fcport->last_login_gen != fcport->login_gen) {
83548fe2 543 ql_dbg(ql_dbg_disc, vha, 0x20e0,
f352eeb7
QT		 544 "%s %8phC login gen changed\n",
545 __func__, fcport->port_name);
726b8548
QT		 546 return;
547 }
548
549 n = ea->data[0] / sizeof(struct get_name_list_extended);
550
83548fe2 551 ql_dbg(ql_dbg_disc, vha, 0x20e1,
726b8548
QT		 552 "%s %d %8phC n %d %02x%02x%02x lid %d \n",
553 __func__, __LINE__, fcport->port_name, n,
554 fcport->d_id.b.domain, fcport->d_id.b.area,
555 fcport->d_id.b.al_pa, fcport->loop_id);
556
557 for (i = 0; i < n; i++) {
558 e = &vha->gnl.l[i];
559 wwn = wwn_to_u64(e->port_name);
48acad09
QT		 560 id.b.domain = e->port_id[2];
561 id.b.area = e->port_id[1];
562 id.b.al_pa = e->port_id[0];
563 id.b.rsvd_1 = 0;
726b8548
QT		 564
565 if (memcmp((u8 *)&wwn, fcport->port_name, WWN_SIZE))
566 continue;
567
48acad09
QT		 568 if (IS_SW_RESV_ADDR(id))
569 continue;
570
726b8548 571 found = 1;
726b8548
QT		 572
573 loop_id = le16_to_cpu(e->nport_handle);
574 loop_id = (loop_id & 0x7fff);
8777e431
QT		 575 if (fcport->fc4f_nvme)
576 current_login_state = e->current_login_state >> 4;
577 else
578 current_login_state = e->current_login_state & 0xf;
579
726b8548 580
83548fe2 581 ql_dbg(ql_dbg_disc, vha, 0x20e2,
8777e431 582 "%s found %8phC CLS [%x|%x] nvme %d ID[%02x%02x%02x|%02x%02x%02x] lid[%d|%d]\n",
83548fe2
QT		 583 __func__, fcport->port_name,
584 e->current_login_state, fcport->fw_login_state,
8777e431 585 fcport->fc4f_nvme, id.b.domain, id.b.area, id.b.al_pa,
83548fe2
QT		 586 fcport->d_id.b.domain, fcport->d_id.b.area,
587 fcport->d_id.b.al_pa, loop_id, fcport->loop_id);
726b8548 588
48acad09
QT		 589 switch (fcport->disc_state) {
590 case DSC_DELETE_PEND:
591 case DSC_DELETED:
592 break;
593 default:
8777e431
QT		 594 if ((id.b24 != fcport->d_id.b24 &&
595 fcport->d_id.b24) ||
596 (fcport->loop_id != FC_NO_LOOP_ID &&
597 fcport->loop_id != loop_id)) {
598 ql_dbg(ql_dbg_disc, vha, 0x20e3,
599 "%s %d %8phC post del sess\n",
600 __func__, __LINE__, fcport->port_name);
48acad09
QT		 601 qlt_schedule_sess_for_deletion(fcport);
602 return;
603 }
604 break;
726b8548
QT		 605 }
606
607 fcport->loop_id = loop_id;
608
609 wwn = wwn_to_u64(fcport->port_name);
610 qlt_find_sess_invalidate_other(vha, wwn,
611 id, loop_id, &conflict_fcport);
612
613 if (conflict_fcport) {
614 /*
615 * Another share fcport share the same loop_id &
616 * nport id. Conflict fcport needs to finish
617 * cleanup before this fcport can proceed to login.
618 */
619 conflict_fcport->conflict = fcport;
620 fcport->login_pause = 1;
621 }
622
48acad09
QT		 623 switch (vha->hw->current_topology) {
624 default:
625 switch (current_login_state) {
626 case DSC_LS_PRLI_COMP:
627 ql_dbg(ql_dbg_disc + ql_dbg_verbose,
628 vha, 0x20e4, "%s %d %8phC post gpdb\n",
629 __func__, __LINE__, fcport->port_name);
a4239945 630
48acad09
QT		 631 if ((e->prli_svc_param_word_3[0] & BIT_4) == 0)
632 fcport->port_type = FCT_INITIATOR;
633 else
634 fcport->port_type = FCT_TARGET;
635 data[0] = data[1] = 0;
636 qla2x00_post_async_adisc_work(vha, fcport,
637 data);
638 break;
639 case DSC_LS_PORT_UNAVAIL:
640 default:
641 if (fcport->loop_id != FC_NO_LOOP_ID)
642 qla2x00_clear_loop_id(fcport);
a4239945 643
48acad09 644 fcport->loop_id = loop_id;
726b8548 645 fcport->fw_login_state = DSC_LS_PORT_UNAVAIL;
48acad09
QT		 646 qla24xx_fcport_handle_login(vha, fcport);
647 break;
726b8548 648 }
726b8548 649 break;
48acad09 650 case ISP_CFG_N:
8777e431
QT		 651 fcport->fw_login_state = current_login_state;
652 fcport->d_id = id;
48acad09
QT		 653 switch (current_login_state) {
654 case DSC_LS_PRLI_COMP:
655 if ((e->prli_svc_param_word_3[0] & BIT_4) == 0)
656 fcport->port_type = FCT_INITIATOR;
657 else
658 fcport->port_type = FCT_TARGET;
659
660 data[0] = data[1] = 0;
661 qla2x00_post_async_adisc_work(vha, fcport,
662 data);
663 break;
664 case DSC_LS_PLOGI_COMP:
665 if (fcport_is_bigger(fcport)) {
666 /* local adapter is smaller */
667 if (fcport->loop_id != FC_NO_LOOP_ID)
668 qla2x00_clear_loop_id(fcport);
669
670 fcport->loop_id = loop_id;
671 qla24xx_fcport_handle_login(vha,
672 fcport);
673 break;
674 }
675 /* drop through */
676 default:
677 if (fcport_is_smaller(fcport)) {
678 /* local adapter is bigger */
679 if (fcport->loop_id != FC_NO_LOOP_ID)
680 qla2x00_clear_loop_id(fcport);
681
682 fcport->loop_id = loop_id;
683 qla24xx_fcport_handle_login(vha,
684 fcport);
685 }
686 break;
687 }
688 break;
689 } /* switch (ha->current_topology) */
726b8548
QT		 690 }
691
692 if (!found) {
48acad09
QT		 693 switch (vha->hw->current_topology) {
694 case ISP_CFG_F:
695 case ISP_CFG_FL:
696 for (i = 0; i < n; i++) {
697 e = &vha->gnl.l[i];
698 id.b.domain = e->port_id[0];
699 id.b.area = e->port_id[1];
700 id.b.al_pa = e->port_id[2];
701 id.b.rsvd_1 = 0;
702 loop_id = le16_to_cpu(e->nport_handle);
703
704 if (fcport->d_id.b24 == id.b24) {
705 conflict_fcport =
706 qla2x00_find_fcport_by_wwpn(vha,
707 e->port_name, 0);
72f02ba6
LT		 708 if (conflict_fcport) {
709 ql_dbg(ql_dbg_disc + ql_dbg_verbose,
710 vha, 0x20e5,
711 "%s %d %8phC post del sess\n",
712 __func__, __LINE__,
713 conflict_fcport->port_name);
714 qlt_schedule_sess_for_deletion
715 (conflict_fcport);
716 }
36eb8ff6 717 }
48acad09
QT		 718 /*
719 * FW already picked this loop id for
720 * another fcport
721 */
722 if (fcport->loop_id == loop_id)
723 fcport->loop_id = FC_NO_LOOP_ID;
726b8548 724 }
48acad09
QT		 725 qla24xx_fcport_handle_login(vha, fcport);
726 break;
727 case ISP_CFG_N:
8777e431
QT		 728 fcport->disc_state = DSC_DELETED;
729 if (time_after_eq(jiffies, fcport->dm_login_expire)) {
730 if (fcport->n2n_link_reset_cnt < 2) {
731 fcport->n2n_link_reset_cnt++;
732 /*
733 * remote port is not sending PLOGI.
734 * Reset link to kick start his state
735 * machine
736 */
737 set_bit(N2N_LINK_RESET,
738 &vha->dpc_flags);
739 } else {
740 if (fcport->n2n_chip_reset < 1) {
741 ql_log(ql_log_info, vha, 0x705d,
742 "Chip reset to bring laser down");
743 set_bit(ISP_ABORT_NEEDED,
744 &vha->dpc_flags);
745 fcport->n2n_chip_reset++;
746 } else {
747 ql_log(ql_log_info, vha, 0x705d,
748 "Remote port %8ph is not coming back\n",
749 fcport->port_name);
750 fcport->scan_state = 0;
751 }
752 }
753 qla2xxx_wake_dpc(vha);
754 } else {
755 /*
756 * report port suppose to do PLOGI. Give him
757 * more time. FW will catch it.
758 */
759 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
760 }
48acad09
QT		 761 break;
762 default:
763 break;
726b8548 764 }
726b8548
QT		 765 }
766} /* gnl_event */
767
768static void
25ff6af1 769qla24xx_async_gnl_sp_done(void *s, int res)
726b8548 770{
25ff6af1
JC		 771 struct srb *sp = s;
772 struct scsi_qla_host *vha = sp->vha;
726b8548
QT		 773 unsigned long flags;
774 struct fc_port *fcport = NULL, *tf;
775 u16 i, n = 0, loop_id;
776 struct event_arg ea;
777 struct get_name_list_extended *e;
778 u64 wwn;
779 struct list_head h;
a4239945 780 bool found = false;
726b8548 781
83548fe2 782 ql_dbg(ql_dbg_disc, vha, 0x20e7,
726b8548
QT		 783 "Async done-%s res %x mb[1]=%x mb[2]=%x \n",
784 sp->name, res, sp->u.iocb_cmd.u.mbx.in_mb[1],
785 sp->u.iocb_cmd.u.mbx.in_mb[2]);
786
0aca7784 787 sp->fcport->flags &= ~(FCF_ASYNC_SENT|FCF_ASYNC_ACTIVE);
726b8548
QT		 788 memset(&ea, 0, sizeof(ea));
789 ea.sp = sp;
790 ea.rc = res;
791 ea.event = FCME_GNL_DONE;
792
793 if (sp->u.iocb_cmd.u.mbx.in_mb[1] >=
794 sizeof(struct get_name_list_extended)) {
795 n = sp->u.iocb_cmd.u.mbx.in_mb[1] /
796 sizeof(struct get_name_list_extended);
797 ea.data[0] = sp->u.iocb_cmd.u.mbx.in_mb[1]; /* amnt xfered */
798 }
799
800 for (i = 0; i < n; i++) {
801 e = &vha->gnl.l[i];
802 loop_id = le16_to_cpu(e->nport_handle);
803 /* mask out reserve bit */
804 loop_id = (loop_id & 0x7fff);
805 set_bit(loop_id, vha->hw->loop_id_map);
806 wwn = wwn_to_u64(e->port_name);
807
83548fe2 808 ql_dbg(ql_dbg_disc + ql_dbg_verbose, vha, 0x20e8,
726b8548
QT		 809 "%s %8phC %02x:%02x:%02x state %d/%d lid %x \n",
810 __func__, (void *)&wwn, e->port_id[2], e->port_id[1],
811 e->port_id[0], e->current_login_state, e->last_login_state,
812 (loop_id & 0x7fff));
813 }
814
0aca7784 815 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
726b8548
QT		 816
817 INIT_LIST_HEAD(&h);
818 fcport = tf = NULL;
819 if (!list_empty(&vha->gnl.fcports))
820 list_splice_init(&vha->gnl.fcports, &h);
0aca7784 821 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
726b8548
QT		 822
823 list_for_each_entry_safe(fcport, tf, &h, gnl_entry) {
824 list_del_init(&fcport->gnl_entry);
0aca7784 825 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
6d674927 826 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
0aca7784 827 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
726b8548
QT		 828 ea.fcport = fcport;
829
830 qla2x00_fcport_event_handler(vha, &ea);
831 }
832
a4239945
QT		 833 /* create new fcport if fw has knowledge of new sessions */
834 for (i = 0; i < n; i++) {
835 port_id_t id;
836 u64 wwnn;
837
838 e = &vha->gnl.l[i];
839 wwn = wwn_to_u64(e->port_name);
840
841 found = false;
842 list_for_each_entry_safe(fcport, tf, &vha->vp_fcports, list) {
843 if (!memcmp((u8 *)&wwn, fcport->port_name,
844 WWN_SIZE)) {
845 found = true;
846 break;
847 }
848 }
849
cf055fb0 850 id.b.domain = e->port_id[2];
a4239945 851 id.b.area = e->port_id[1];
cf055fb0 852 id.b.al_pa = e->port_id[0];
a4239945
QT		 853 id.b.rsvd_1 = 0;
854
855 if (!found && wwn && !IS_SW_RESV_ADDR(id)) {
856 ql_dbg(ql_dbg_disc, vha, 0x2065,
cf055fb0
QT		 857 "%s %d %8phC %06x post new sess\n",
858 __func__, __LINE__, (u8 *)&wwn, id.b24);
a4239945
QT		 859 wwnn = wwn_to_u64(e->node_name);
860 qla24xx_post_newsess_work(vha, &id, (u8 *)&wwn,
861 (u8 *)&wwnn, NULL, FC4_TYPE_UNKNOWN);
862 }
863 }
864
0aca7784
QT		 865 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
866 vha->gnl.sent = 0;
726b8548
QT		 867 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
868
25ff6af1 869 sp->free(sp);
726b8548
QT		 870}
871
872int qla24xx_async_gnl(struct scsi_qla_host *vha, fc_port_t *fcport)
873{
874 srb_t *sp;
875 struct srb_iocb *mbx;
876 int rval = QLA_FUNCTION_FAILED;
877 unsigned long flags;
878 u16 *mb;
879
3dbec59b
QT		 880 if (!vha->flags.online || (fcport->flags & FCF_ASYNC_SENT))
881 return rval;
726b8548 882
83548fe2 883 ql_dbg(ql_dbg_disc, vha, 0x20d9,
726b8548
QT		 884 "Async-gnlist WWPN %8phC \n", fcport->port_name);
885
0aca7784
QT		 886 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
887 fcport->flags |= FCF_ASYNC_SENT;
726b8548
QT		 888 fcport->disc_state = DSC_GNL;
889 fcport->last_rscn_gen = fcport->rscn_gen;
890 fcport->last_login_gen = fcport->login_gen;
891
892 list_add_tail(&fcport->gnl_entry, &vha->gnl.fcports);
0aca7784
QT		 893 if (vha->gnl.sent) {
894 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
895 return QLA_SUCCESS;
896 }
897 vha->gnl.sent = 1;
898 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
726b8548
QT		 899
900 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
901 if (!sp)
902 goto done;
3dbec59b 903
726b8548
QT		 904 sp->type = SRB_MB_IOCB;
905 sp->name = "gnlist";
906 sp->gen1 = fcport->rscn_gen;
907 sp->gen2 = fcport->login_gen;
908
e74e7d95
BH		 909 mbx = &sp->u.iocb_cmd;
910 mbx->timeout = qla2x00_async_iocb_timeout;
726b8548
QT		 911 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha)+2);
912
913 mb = sp->u.iocb_cmd.u.mbx.out_mb;
914 mb[0] = MBC_PORT_NODE_NAME_LIST;
915 mb[1] = BIT_2 | BIT_3;
916 mb[2] = MSW(vha->gnl.ldma);
917 mb[3] = LSW(vha->gnl.ldma);
918 mb[6] = MSW(MSD(vha->gnl.ldma));
919 mb[7] = LSW(MSD(vha->gnl.ldma));
920 mb[8] = vha->gnl.size;
921 mb[9] = vha->vp_idx;
922
726b8548
QT		 923 sp->done = qla24xx_async_gnl_sp_done;
924
925 rval = qla2x00_start_sp(sp);
926 if (rval != QLA_SUCCESS)
927 goto done_free_sp;
928
83548fe2
QT		 929 ql_dbg(ql_dbg_disc, vha, 0x20da,
930 "Async-%s - OUT WWPN %8phC hndl %x\n",
931 sp->name, fcport->port_name, sp->handle);
726b8548
QT		 932
933 return rval;
934
935done_free_sp:
25ff6af1 936 sp->free(sp);
726b8548 937 fcport->flags &= ~FCF_ASYNC_SENT;
3dbec59b 938done:
726b8548
QT		 939 return rval;
940}
941
942int qla24xx_post_gnl_work(struct scsi_qla_host *vha, fc_port_t *fcport)
943{
944 struct qla_work_evt *e;
945
946 e = qla2x00_alloc_work(vha, QLA_EVT_GNL);
947 if (!e)
948 return QLA_FUNCTION_FAILED;
949
950 e->u.fcport.fcport = fcport;
6d674927 951 fcport->flags |= FCF_ASYNC_ACTIVE;
726b8548
QT		 952 return qla2x00_post_work(vha, e);
953}
954
955static
25ff6af1 956void qla24xx_async_gpdb_sp_done(void *s, int res)
726b8548 957{
25ff6af1
JC		 958 struct srb *sp = s;
959 struct scsi_qla_host *vha = sp->vha;
726b8548 960 struct qla_hw_data *ha = vha->hw;
726b8548
QT		 961 fc_port_t *fcport = sp->fcport;
962 u16 *mb = sp->u.iocb_cmd.u.mbx.in_mb;
726b8548
QT		 963 struct event_arg ea;
964
83548fe2 965 ql_dbg(ql_dbg_disc, vha, 0x20db,
726b8548
QT		 966 "Async done-%s res %x, WWPN %8phC mb[1]=%x mb[2]=%x \n",
967 sp->name, res, fcport->port_name, mb[1], mb[2]);
968
6d674927 969 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
726b8548 970
726b8548
QT		 971 memset(&ea, 0, sizeof(ea));
972 ea.event = FCME_GPDB_DONE;
726b8548
QT		 973 ea.fcport = fcport;
974 ea.sp = sp;
975
976 qla2x00_fcport_event_handler(vha, &ea);
977
978 dma_pool_free(ha->s_dma_pool, sp->u.iocb_cmd.u.mbx.in,
979 sp->u.iocb_cmd.u.mbx.in_dma);
980
25ff6af1 981 sp->free(sp);
726b8548
QT		 982}
983
a5d42f4c
DG		 984static int qla24xx_post_prli_work(struct scsi_qla_host *vha, fc_port_t *fcport)
985{
986 struct qla_work_evt *e;
987
988 e = qla2x00_alloc_work(vha, QLA_EVT_PRLI);
989 if (!e)
990 return QLA_FUNCTION_FAILED;
991
992 e->u.fcport.fcport = fcport;
993
994 return qla2x00_post_work(vha, e);
995}
996
997static void
998qla2x00_async_prli_sp_done(void *ptr, int res)
999{
1000 srb_t *sp = ptr;
1001 struct scsi_qla_host *vha = sp->vha;
1002 struct srb_iocb *lio = &sp->u.iocb_cmd;
1003 struct event_arg ea;
1004
1005 ql_dbg(ql_dbg_disc, vha, 0x2129,
1006 "%s %8phC res %d \n", __func__,
1007 sp->fcport->port_name, res);
1008
1009 sp->fcport->flags &= ~FCF_ASYNC_SENT;
1010
1011 if (!test_bit(UNLOADING, &vha->dpc_flags)) {
1012 memset(&ea, 0, sizeof(ea));
1013 ea.event = FCME_PRLI_DONE;
1014 ea.fcport = sp->fcport;
1015 ea.data[0] = lio->u.logio.data[0];
1016 ea.data[1] = lio->u.logio.data[1];
1017 ea.iop[0] = lio->u.logio.iop[0];
1018 ea.iop[1] = lio->u.logio.iop[1];
1019 ea.sp = sp;
1020
1021 qla2x00_fcport_event_handler(vha, &ea);
1022 }
1023
1024 sp->free(sp);
1025}
1026
1027int
1028qla24xx_async_prli(struct scsi_qla_host *vha, fc_port_t *fcport)
1029{
1030 srb_t *sp;
1031 struct srb_iocb *lio;
1032 int rval = QLA_FUNCTION_FAILED;
1033
1034 if (!vha->flags.online)
1035 return rval;
1036
1037 if (fcport->fw_login_state == DSC_LS_PLOGI_PEND ||
a5d42f4c
DG		 1038 fcport->fw_login_state == DSC_LS_PRLI_PEND)
1039 return rval;
1040
1041 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
1042 if (!sp)
1043 return rval;
1044
1045 fcport->flags |= FCF_ASYNC_SENT;
1046 fcport->logout_completed = 0;
1047
1048 sp->type = SRB_PRLI_CMD;
1049 sp->name = "prli";
a5d42f4c
DG		 1050
1051 lio = &sp->u.iocb_cmd;
1052 lio->timeout = qla2x00_async_iocb_timeout;
e74e7d95
BH		 1053 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2);
1054
a5d42f4c
DG		 1055 sp->done = qla2x00_async_prli_sp_done;
1056 lio->u.logio.flags = 0;
1057
1058 if (fcport->fc4f_nvme)
1059 lio->u.logio.flags |= SRB_LOGIN_NVME_PRLI;
1060
1061 rval = qla2x00_start_sp(sp);
1062 if (rval != QLA_SUCCESS) {
a5d42f4c
DG		 1063 fcport->flags |= FCF_LOGIN_NEEDED;
1064 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
1065 goto done_free_sp;
1066 }
1067
1068 ql_dbg(ql_dbg_disc, vha, 0x211b,
8777e431
QT		 1069 "Async-prli - %8phC hdl=%x, loopid=%x portid=%06x retries=%d %s.\n",
1070 fcport->port_name, sp->handle, fcport->loop_id, fcport->d_id.b24,
1071 fcport->login_retry, fcport->fc4f_nvme ? "nvme" : "fc");
a5d42f4c
DG		 1072
1073 return rval;
1074
1075done_free_sp:
1076 sp->free(sp);
1077 fcport->flags &= ~FCF_ASYNC_SENT;
1078 return rval;
1079}
1080
a07fc0a4 1081int qla24xx_post_gpdb_work(struct scsi_qla_host *vha, fc_port_t *fcport, u8 opt)
726b8548
QT		 1082{
1083 struct qla_work_evt *e;
1084
1085 e = qla2x00_alloc_work(vha, QLA_EVT_GPDB);
1086 if (!e)
1087 return QLA_FUNCTION_FAILED;
1088
1089 e->u.fcport.fcport = fcport;
1090 e->u.fcport.opt = opt;
6d674927 1091 fcport->flags |= FCF_ASYNC_ACTIVE;
726b8548
QT		 1092 return qla2x00_post_work(vha, e);
1093}
1094
1095int qla24xx_async_gpdb(struct scsi_qla_host *vha, fc_port_t *fcport, u8 opt)
1096{
1097 srb_t *sp;
1098 struct srb_iocb *mbx;
1099 int rval = QLA_FUNCTION_FAILED;
1100 u16 *mb;
1101 dma_addr_t pd_dma;
1102 struct port_database_24xx *pd;
1103 struct qla_hw_data *ha = vha->hw;
1104
3dbec59b
QT		 1105 if (!vha->flags.online || (fcport->flags & FCF_ASYNC_SENT))
1106 return rval;
726b8548 1107
726b8548
QT		 1108 fcport->disc_state = DSC_GPDB;
1109
1110 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
1111 if (!sp)
1112 goto done;
1113
3dbec59b 1114 fcport->flags |= FCF_ASYNC_SENT;
e0824e69
JC		 1115 sp->type = SRB_MB_IOCB;
1116 sp->name = "gpdb";
1117 sp->gen1 = fcport->rscn_gen;
1118 sp->gen2 = fcport->login_gen;
e74e7d95
BH		 1119
1120 mbx = &sp->u.iocb_cmd;
1121 mbx->timeout = qla2x00_async_iocb_timeout;
e0824e69
JC		 1122 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2);
1123
08eb7f45 1124 pd = dma_pool_zalloc(ha->s_dma_pool, GFP_KERNEL, &pd_dma);
726b8548 1125 if (pd == NULL) {
83548fe2
QT		 1126 ql_log(ql_log_warn, vha, 0xd043,
1127 "Failed to allocate port database structure.\n");
726b8548
QT		 1128 goto done_free_sp;
1129 }
726b8548 1130
726b8548
QT		 1131 mb = sp->u.iocb_cmd.u.mbx.out_mb;
1132 mb[0] = MBC_GET_PORT_DATABASE;
1133 mb[1] = fcport->loop_id;
1134 mb[2] = MSW(pd_dma);
1135 mb[3] = LSW(pd_dma);
1136 mb[6] = MSW(MSD(pd_dma));
1137 mb[7] = LSW(MSD(pd_dma));
1138 mb[9] = vha->vp_idx;
1139 mb[10] = opt;
1140
726b8548
QT		 1141 mbx->u.mbx.in = (void *)pd;
1142 mbx->u.mbx.in_dma = pd_dma;
1143
1144 sp->done = qla24xx_async_gpdb_sp_done;
1145
1146 rval = qla2x00_start_sp(sp);
1147 if (rval != QLA_SUCCESS)
1148 goto done_free_sp;
1149
83548fe2
QT		 1150 ql_dbg(ql_dbg_disc, vha, 0x20dc,
1151 "Async-%s %8phC hndl %x opt %x\n",
1152 sp->name, fcport->port_name, sp->handle, opt);
726b8548
QT		 1153
1154 return rval;
1155
1156done_free_sp:
1157 if (pd)
1158 dma_pool_free(ha->s_dma_pool, pd, pd_dma);
1159
25ff6af1 1160 sp->free(sp);
726b8548 1161 fcport->flags &= ~FCF_ASYNC_SENT;
3dbec59b 1162done:
726b8548 1163 qla24xx_post_gpdb_work(vha, fcport, opt);
5ff1d584
AV		 1164 return rval;
1165}
1166
726b8548 1167static
a4239945 1168void __qla24xx_handle_gpdb_event(scsi_qla_host_t *vha, struct event_arg *ea)
726b8548 1169{
726b8548
QT		 1170 unsigned long flags;
1171
726b8548 1172 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
f13515ac 1173 ea->fcport->login_gen++;
726b8548
QT		 1174 ea->fcport->deleted = 0;
1175 ea->fcport->logout_on_delete = 1;
1176
1177 if (!ea->fcport->login_succ && !IS_SW_RESV_ADDR(ea->fcport->d_id)) {
1178 vha->fcport_count++;
1179 ea->fcport->login_succ = 1;
1180
0aca7784 1181 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
cd4ed6b4 1182 qla24xx_sched_upd_fcport(ea->fcport);
0aca7784 1183 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
414d9ff3
QT		 1184 } else if (ea->fcport->login_succ) {
1185 /*
1186 * We have an existing session. A late RSCN delivery
1187 * must have triggered the session to be re-validate.
a4239945 1188 * Session is still valid.
414d9ff3 1189 */
5ef696aa
QT		 1190 ql_dbg(ql_dbg_disc, vha, 0x20d6,
1191 "%s %d %8phC session revalidate success\n",
a4239945 1192 __func__, __LINE__, ea->fcport->port_name);
8a7eac2f 1193 ea->fcport->disc_state = DSC_LOGIN_COMPLETE;
726b8548
QT		 1194 }
1195 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
a4239945
QT		 1196}
1197
1198static
1199void qla24xx_handle_gpdb_event(scsi_qla_host_t *vha, struct event_arg *ea)
1200{
a4239945
QT		 1201 fc_port_t *fcport = ea->fcport;
1202 struct port_database_24xx *pd;
1203 struct srb *sp = ea->sp;
2b5b9647 1204 uint8_t ls;
a4239945
QT		 1205
1206 pd = (struct port_database_24xx *)sp->u.iocb_cmd.u.mbx.in;
1207
1208 fcport->flags &= ~FCF_ASYNC_SENT;
1209
1210 ql_dbg(ql_dbg_disc, vha, 0x20d2,
8777e431
QT		 1211 "%s %8phC DS %d LS %d nvme %x rc %d\n", __func__, fcport->port_name,
1212 fcport->disc_state, pd->current_login_state, fcport->fc4f_nvme,
1213 ea->rc);
a4239945
QT		 1214
1215 if (fcport->disc_state == DSC_DELETE_PEND)
1216 return;
726b8548 1217
2b5b9647
DT		 1218 if (fcport->fc4f_nvme)
1219 ls = pd->current_login_state >> 4;
1220 else
1221 ls = pd->current_login_state & 0xf;
1222
d4f7a16a
HM		 1223 if (ea->sp->gen2 != fcport->login_gen) {
1224 /* target side must have changed it. */
1225
1226 ql_dbg(ql_dbg_disc, vha, 0x20d3,
1227 "%s %8phC generation changed\n",
1228 __func__, fcport->port_name);
1229 return;
1230 } else if (ea->sp->gen1 != fcport->rscn_gen) {
1231 qla_rscn_replay(fcport);
1232 return;
1233 }
1234
2b5b9647 1235 switch (ls) {
a4239945
QT		 1236 case PDS_PRLI_COMPLETE:
1237 __qla24xx_parse_gpdb(vha, fcport, pd);
1238 break;
1239 case PDS_PLOGI_PENDING:
1240 case PDS_PLOGI_COMPLETE:
1241 case PDS_PRLI_PENDING:
1242 case PDS_PRLI2_PENDING:
8fde6977
QT		 1243 /* Set discovery state back to GNL to Relogin attempt */
1244 if (qla_dual_mode_enabled(vha) ||
1245 qla_ini_mode_enabled(vha)) {
1246 fcport->disc_state = DSC_GNL;
1247 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
1248 }
a4239945
QT		 1249 return;
1250 case PDS_LOGO_PENDING:
1251 case PDS_PORT_UNAVAILABLE:
1252 default:
1253 ql_dbg(ql_dbg_disc, vha, 0x20d5, "%s %d %8phC post del sess\n",
1254 __func__, __LINE__, fcport->port_name);
d8630bb9 1255 qlt_schedule_sess_for_deletion(fcport);
a4239945
QT		 1256 return;
1257 }
1258 __qla24xx_handle_gpdb_event(vha, ea);
1259} /* gpdb event */
9cd883f0
QT		 1260
1261static void qla_chk_n2n_b4_login(struct scsi_qla_host *vha, fc_port_t *fcport)
1262{
1263 u8 login = 0;
040036bb 1264 int rc;
9cd883f0
QT		 1265
1266 if (qla_tgt_mode_enabled(vha))
1267 return;
1268
1269 if (qla_dual_mode_enabled(vha)) {
1270 if (N2N_TOPO(vha->hw)) {
1271 u64 mywwn, wwn;
1272
1273 mywwn = wwn_to_u64(vha->port_name);
1274 wwn = wwn_to_u64(fcport->port_name);
1275 if (mywwn > wwn)
1276 login = 1;
1277 else if ((fcport->fw_login_state == DSC_LS_PLOGI_COMP)
1278 && time_after_eq(jiffies,
1279 fcport->plogi_nack_done_deadline))
1280 login = 1;
1281 } else {
1282 login = 1;
1283 }
1284 } else {
1285 /* initiator mode */
1286 login = 1;
1287 }
1288
0754d5e0
QT		 1289 if (login && fcport->login_retry) {
1290 fcport->login_retry--;
040036bb
QT		 1291 if (fcport->loop_id == FC_NO_LOOP_ID) {
1292 fcport->fw_login_state = DSC_LS_PORT_UNAVAIL;
1293 rc = qla2x00_find_new_loop_id(vha, fcport);
1294 if (rc) {
1295 ql_dbg(ql_dbg_disc, vha, 0x20e6,
1296 "%s %d %8phC post del sess - out of loopid\n",
1297 __func__, __LINE__, fcport->port_name);
1298 fcport->scan_state = 0;
94cff6e1 1299 qlt_schedule_sess_for_deletion(fcport);
040036bb
QT		 1300 return;
1301 }
1302 }
9cd883f0
QT		 1303 ql_dbg(ql_dbg_disc, vha, 0x20bf,
1304 "%s %d %8phC post login\n",
1305 __func__, __LINE__, fcport->port_name);
9cd883f0
QT		 1306 qla2x00_post_async_login_work(vha, fcport, NULL);
1307 }
1308}
1309
726b8548
QT		 1310int qla24xx_fcport_handle_login(struct scsi_qla_host *vha, fc_port_t *fcport)
1311{
f13515ac 1312 u16 data[2];
a4239945 1313 u64 wwn;
cd4ed6b4 1314 u16 sec;
726b8548 1315
0754d5e0
QT		 1316 ql_dbg(ql_dbg_disc + ql_dbg_verbose, vha, 0x20d8,
1317 "%s %8phC DS %d LS %d P %d fl %x confl %p rscn %d|%d login %d lid %d scan %d\n",
726b8548
QT		 1318 __func__, fcport->port_name, fcport->disc_state,
1319 fcport->fw_login_state, fcport->login_pause, fcport->flags,
1320 fcport->conflict, fcport->last_rscn_gen, fcport->rscn_gen,
0754d5e0 1321 fcport->login_gen, fcport->loop_id, fcport->scan_state);
726b8548 1322
a4239945
QT		 1323 if (fcport->scan_state != QLA_FCPORT_FOUND)
1324 return 0;
726b8548 1325
07ea4b60
HR		 1326 if ((fcport->loop_id != FC_NO_LOOP_ID) &&
1327 ((fcport->fw_login_state == DSC_LS_PLOGI_PEND) ||
1328 (fcport->fw_login_state == DSC_LS_PRLI_PEND)))
726b8548
QT		 1329 return 0;
1330
5b33469a 1331 if (fcport->fw_login_state == DSC_LS_PLOGI_COMP) {
9cd883f0
QT		 1332 if (time_before_eq(jiffies, fcport->plogi_nack_done_deadline)) {
1333 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
5b33469a 1334 return 0;
9cd883f0 1335 }
5b33469a
QT		 1336 }
1337
726b8548
QT		 1338 /* for pure Target Mode. Login will not be initiated */
1339 if (vha->host->active_mode == MODE_TARGET)
1340 return 0;
1341
1342 if (fcport->flags & FCF_ASYNC_SENT) {
1343 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
1344 return 0;
1345 }
1346
1347 switch (fcport->disc_state) {
1348 case DSC_DELETED:
a4239945 1349 wwn = wwn_to_u64(fcport->node_name);
8777e431
QT		 1350 switch (vha->hw->current_topology) {
1351 case ISP_CFG_N:
1352 if (fcport_is_smaller(fcport)) {
1353 /* this adapter is bigger */
1354 if (fcport->login_retry) {
1355 if (fcport->loop_id == FC_NO_LOOP_ID) {
1356 qla2x00_find_new_loop_id(vha,
1357 fcport);
1358 fcport->fw_login_state =
1359 DSC_LS_PORT_UNAVAIL;
1360 }
1361 fcport->login_retry--;
1362 qla_post_els_plogi_work(vha, fcport);
1363 } else {
1364 ql_log(ql_log_info, vha, 0x705d,
1365 "Unable to reach remote port %8phC",
1366 fcport->port_name);
1367 }
1368 } else {
1369 qla24xx_post_gnl_work(vha, fcport);
1370 }
1371 break;
1372 default:
1373 if (wwn == 0) {
1374 ql_dbg(ql_dbg_disc, vha, 0xffff,
1375 "%s %d %8phC post GNNID\n",
1376 __func__, __LINE__, fcport->port_name);
1377 qla24xx_post_gnnid_work(vha, fcport);
1378 } else if (fcport->loop_id == FC_NO_LOOP_ID) {
1379 ql_dbg(ql_dbg_disc, vha, 0x20bd,
1380 "%s %d %8phC post gnl\n",
1381 __func__, __LINE__, fcport->port_name);
1382 qla24xx_post_gnl_work(vha, fcport);
1383 } else {
1384 qla_chk_n2n_b4_login(vha, fcport);
1385 }
1386 break;
726b8548
QT		 1387 }
1388 break;
1389
1390 case DSC_GNL:
8777e431
QT		 1391 switch (vha->hw->current_topology) {
1392 case ISP_CFG_N:
1393 if ((fcport->current_login_state & 0xf) == 0x6) {
1394 ql_dbg(ql_dbg_disc, vha, 0x2118,
1395 "%s %d %8phC post GPDB work\n",
1396 __func__, __LINE__, fcport->port_name);
1397 fcport->chip_reset =
1398 vha->hw->base_qpair->chip_reset;
1399 qla24xx_post_gpdb_work(vha, fcport, 0);
1400 } else {
1401 ql_dbg(ql_dbg_disc, vha, 0x2118,
1402 "%s %d %8phC post NVMe PRLI\n",
1403 __func__, __LINE__, fcport->port_name);
1404 qla24xx_post_prli_work(vha, fcport);
1405 }
1406 break;
1407 default:
1408 if (fcport->login_pause) {
1409 fcport->last_rscn_gen = fcport->rscn_gen;
1410 fcport->last_login_gen = fcport->login_gen;
1411 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
1412 break;
1413 }
1414 qla_chk_n2n_b4_login(vha, fcport);
726b8548
QT		 1415 break;
1416 }
726b8548
QT		 1417 break;
1418
1419 case DSC_LOGIN_FAILED:
9cd883f0
QT		 1420 if (N2N_TOPO(vha->hw))
1421 qla_chk_n2n_b4_login(vha, fcport);
1422 else
d4f7a16a 1423 qlt_schedule_sess_for_deletion(fcport);
726b8548
QT		 1424 break;
1425
1426 case DSC_LOGIN_COMPLETE:
1427 /* recheck login state */
f13515ac
QT		 1428 data[0] = data[1] = 0;
1429 qla2x00_post_async_adisc_work(vha, fcport, data);
726b8548
QT		 1430 break;
1431
1cbc0efc
DT		 1432 case DSC_LOGIN_PEND:
1433 if (fcport->fw_login_state == DSC_LS_PLOGI_COMP)
1434 qla24xx_post_prli_work(vha, fcport);
1435 break;
1436
cd4ed6b4
QT		 1437 case DSC_UPD_FCPORT:
1438 sec = jiffies_to_msecs(jiffies -
1439 fcport->jiffies_at_registration)/1000;
1440 if (fcport->sec_since_registration < sec && sec &&
1441 !(sec % 60)) {
1442 fcport->sec_since_registration = sec;
1443 ql_dbg(ql_dbg_disc, fcport->vha, 0xffff,
1444 "%s %8phC - Slow Rport registration(%d Sec)\n",
1445 __func__, fcport->port_name, sec);
1446 }
1447
1448 if (fcport->next_disc_state != DSC_DELETE_PEND)
1449 fcport->next_disc_state = DSC_ADISC;
1450 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
1451 break;
1452
726b8548
QT		 1453 default:
1454 break;
1455 }
1456
1457 return 0;
1458}
1459
1460static
1461void qla24xx_handle_rscn_event(fc_port_t *fcport, struct event_arg *ea)
1462{
1463 fcport->rscn_gen++;
1464
83548fe2
QT		 1465 ql_dbg(ql_dbg_disc, fcport->vha, 0x210c,
1466 "%s %8phC DS %d LS %d\n",
1467 __func__, fcport->port_name, fcport->disc_state,
1468 fcport->fw_login_state);
726b8548
QT		 1469
1470 if (fcport->flags & FCF_ASYNC_SENT)
1471 return;
1472
1473 switch (fcport->disc_state) {
1474 case DSC_DELETED:
1475 case DSC_LOGIN_COMPLETE:
5ef696aa 1476 qla24xx_post_gpnid_work(fcport->vha, &ea->id);
726b8548 1477 break;
726b8548
QT		 1478 default:
1479 break;
1480 }
1481}
1482
1483int qla24xx_post_newsess_work(struct scsi_qla_host *vha, port_id_t *id,
a4239945 1484 u8 *port_name, u8 *node_name, void *pla, u8 fc4_type)
726b8548
QT		 1485{
1486 struct qla_work_evt *e;
1487 e = qla2x00_alloc_work(vha, QLA_EVT_NEW_SESS);
1488 if (!e)
1489 return QLA_FUNCTION_FAILED;
1490
1491 e->u.new_sess.id = *id;
1492 e->u.new_sess.pla = pla;
a4239945 1493 e->u.new_sess.fc4_type = fc4_type;
726b8548 1494 memcpy(e->u.new_sess.port_name, port_name, WWN_SIZE);
a4239945
QT		 1495 if (node_name)
1496 memcpy(e->u.new_sess.node_name, node_name, WWN_SIZE);
726b8548
QT		 1497
1498 return qla2x00_post_work(vha, e);
1499}
1500
726b8548
QT		 1501static
1502void qla24xx_handle_relogin_event(scsi_qla_host_t *vha,
1503 struct event_arg *ea)
1504{
1505 fc_port_t *fcport = ea->fcport;
1506
83548fe2
QT		 1507 ql_dbg(ql_dbg_disc, vha, 0x2102,
1508 "%s %8phC DS %d LS %d P %d del %d cnfl %p rscn %d|%d login %d|%d fl %x\n",
1509 __func__, fcport->port_name, fcport->disc_state,
1510 fcport->fw_login_state, fcport->login_pause,
1511 fcport->deleted, fcport->conflict,
1512 fcport->last_rscn_gen, fcport->rscn_gen,
1513 fcport->last_login_gen, fcport->login_gen,
1514 fcport->flags);
726b8548
QT		 1515
1516 if ((fcport->fw_login_state == DSC_LS_PLOGI_PEND) ||
726b8548
QT		 1517 (fcport->fw_login_state == DSC_LS_PRLI_PEND))
1518 return;
1519
5b33469a 1520 if (fcport->fw_login_state == DSC_LS_PLOGI_COMP) {
9cd883f0
QT		 1521 if (time_before_eq(jiffies, fcport->plogi_nack_done_deadline)) {
1522 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
5b33469a 1523 return;
9cd883f0 1524 }
5b33469a
QT		 1525 }
1526
726b8548 1527 if (fcport->last_rscn_gen != fcport->rscn_gen) {
83548fe2 1528 ql_dbg(ql_dbg_disc, vha, 0x20e9, "%s %d %8phC post gidpn\n",
726b8548
QT		 1529 __func__, __LINE__, fcport->port_name);
1530
726b8548
QT		 1531 return;
1532 }
1533
1534 qla24xx_fcport_handle_login(vha, fcport);
1535}
1536
8777e431
QT		 1537
1538void qla_handle_els_plogi_done(scsi_qla_host_t *vha, struct event_arg *ea)
1539{
1540 ql_dbg(ql_dbg_disc, vha, 0x2118,
1541 "%s %d %8phC post PRLI\n",
1542 __func__, __LINE__, ea->fcport->port_name);
1543 qla24xx_post_prli_work(vha, ea->fcport);
1544}
1545
41dc529a 1546void qla2x00_fcport_event_handler(scsi_qla_host_t *vha, struct event_arg *ea)
726b8548 1547{
f352eeb7 1548 fc_port_t *f, *tf;
41dc529a 1549 uint32_t id = 0, mask, rid;
bee8b846 1550 fc_port_t *fcport;
726b8548
QT		 1551
1552 switch (ea->event) {
1553 case FCME_RELOGIN:
1554 if (test_bit(UNLOADING, &vha->dpc_flags))
1555 return;
5ff1d584 1556
726b8548
QT		 1557 qla24xx_handle_relogin_event(vha, ea);
1558 break;
1559 case FCME_RSCN:
1560 if (test_bit(UNLOADING, &vha->dpc_flags))
1561 return;
41dc529a
QT		 1562 switch (ea->id.b.rsvd_1) {
1563 case RSCN_PORT_ADDR:
d4f7a16a
HM		 1564#define BIGSCAN 1
1565#if defined BIGSCAN & BIGSCAN > 0
1566 {
1567 unsigned long flags;
bee8b846
QT		 1568 fcport = qla2x00_find_fcport_by_nportid
1569 (vha, &ea->id, 1);
cd4ed6b4 1570 if (fcport) {
cb873ba4 1571 fcport->scan_needed = 1;
cd4ed6b4
QT		 1572 fcport->rscn_gen++;
1573 }
bee8b846 1574
f352eeb7
QT		 1575 spin_lock_irqsave(&vha->work_lock, flags);
1576 if (vha->scan.scan_flags == 0) {
1577 ql_dbg(ql_dbg_disc, vha, 0xffff,
1578 "%s: schedule\n", __func__);
1579 vha->scan.scan_flags |= SF_QUEUED;
1580 schedule_delayed_work(&vha->scan.scan_work, 5);
41dc529a 1581 }
f352eeb7 1582 spin_unlock_irqrestore(&vha->work_lock, flags);
d4f7a16a
HM		 1583 }
1584#else
1585 {
1586 int rc;
1587 fcport = qla2x00_find_fcport_by_nportid(vha, &ea->id, 1);
1588 if (!fcport) {
1589 /* cable moved */
1590 rc = qla24xx_post_gpnid_work(vha, &ea->id);
1591 if (rc) {
1592 ql_log(ql_log_warn, vha, 0xd044,
1593 "RSCN GPNID work failed %06x\n",
1594 ea->id.b24);
1595 }
1596 } else {
1597 ea->fcport = fcport;
1598 fcport->scan_needed = 1;
1599 qla24xx_handle_rscn_event(fcport, ea);
1600 }
1601 }
1602#endif
41dc529a
QT		 1603 break;
1604 case RSCN_AREA_ADDR:
1605 case RSCN_DOM_ADDR:
1606 if (ea->id.b.rsvd_1 == RSCN_AREA_ADDR) {
1607 mask = 0xffff00;
83548fe2
QT		 1608 ql_dbg(ql_dbg_async, vha, 0x5044,
1609 "RSCN: Area 0x%06x was affected\n",
1610 ea->id.b24);
41dc529a
QT		 1611 } else {
1612 mask = 0xff0000;
83548fe2
QT		 1613 ql_dbg(ql_dbg_async, vha, 0x507a,
1614 "RSCN: Domain 0x%06x was affected\n",
1615 ea->id.b24);
41dc529a 1616 }
726b8548 1617
41dc529a
QT		 1618 rid = ea->id.b24 & mask;
1619 list_for_each_entry_safe(f, tf, &vha->vp_fcports,
1620 list) {
1621 id = f->d_id.b24 & mask;
1622 if (rid == id) {
1623 ea->fcport = f;
1624 qla24xx_handle_rscn_event(f, ea);
1625 }
726b8548 1626 }
41dc529a
QT		 1627 break;
1628 case RSCN_FAB_ADDR:
1629 default:
83548fe2
QT		 1630 ql_log(ql_log_warn, vha, 0xd045,
1631 "RSCN: Fabric was affected. Addr format %d\n",
1632 ea->id.b.rsvd_1);
41dc529a
QT		 1633 qla2x00_mark_all_devices_lost(vha, 1);
1634 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
1635 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
726b8548
QT		 1636 }
1637 break;
726b8548
QT		 1638 case FCME_GNL_DONE:
1639 qla24xx_handle_gnl_done_event(vha, ea);
1640 break;
1641 case FCME_GPSC_DONE:
a4239945 1642 qla24xx_handle_gpsc_event(vha, ea);
726b8548
QT		 1643 break;
1644 case FCME_PLOGI_DONE: /* Initiator side sent LLIOCB */
1645 qla24xx_handle_plogi_done_event(vha, ea);
1646 break;
a5d42f4c
DG		 1647 case FCME_PRLI_DONE:
1648 qla24xx_handle_prli_done_event(vha, ea);
1649 break;
726b8548
QT		 1650 case FCME_GPDB_DONE:
1651 qla24xx_handle_gpdb_event(vha, ea);
1652 break;
1653 case FCME_GPNID_DONE:
1654 qla24xx_handle_gpnid_event(vha, ea);
1655 break;
d3bae931
DG		 1656 case FCME_GFFID_DONE:
1657 qla24xx_handle_gffid_event(vha, ea);
1658 break;
f13515ac
QT		 1659 case FCME_ADISC_DONE:
1660 qla24xx_handle_adisc_event(vha, ea);
1661 break;
a4239945
QT		 1662 case FCME_GNNID_DONE:
1663 qla24xx_handle_gnnid_event(vha, ea);
1664 break;
1665 case FCME_GFPNID_DONE:
1666 qla24xx_handle_gfpnid_event(vha, ea);
1667 break;
8777e431
QT		 1668 case FCME_ELS_PLOGI_DONE:
1669 qla_handle_els_plogi_done(vha, ea);
1670 break;
726b8548
QT		 1671 default:
1672 BUG_ON(1);
1673 break;
1674 }
5ff1d584
AV		 1675}
1676
d4f7a16a
HM		 1677/*
1678 * RSCN(s) came in for this fcport, but the RSCN(s) was not able
1679 * to be consumed by the fcport
1680 */
1681void qla_rscn_replay(fc_port_t *fcport)
1682{
1683 struct event_arg ea;
1684
1685 switch (fcport->disc_state) {
1686 case DSC_DELETE_PEND:
1687 return;
1688 default:
1689 break;
1690 }
1691
1692 if (fcport->scan_needed) {
1693 memset(&ea, 0, sizeof(ea));
1694 ea.event = FCME_RSCN;
1695 ea.id = fcport->d_id;
1696 ea.id.b.rsvd_1 = RSCN_PORT_ADDR;
1697#if defined BIGSCAN & BIGSCAN > 0
1698 qla2x00_fcport_event_handler(fcport->vha, &ea);
1699#else
1700 qla24xx_post_gpnid_work(fcport->vha, &ea.id);
1701#endif
1702 } else {
1703 qla24xx_post_gnl_work(fcport->vha, fcport);
1704 }
1705}
1706
3822263e 1707static void
faef62d1 1708qla2x00_tmf_iocb_timeout(void *data)
3822263e 1709{
25ff6af1 1710 srb_t *sp = data;
faef62d1 1711 struct srb_iocb *tmf = &sp->u.iocb_cmd;
3822263e 1712
faef62d1
AB		 1713 tmf->u.tmf.comp_status = CS_TIMEOUT;
1714 complete(&tmf->u.tmf.comp);
1715}
9ba56b95 1716
faef62d1 1717static void
25ff6af1 1718qla2x00_tmf_sp_done(void *ptr, int res)
faef62d1 1719{
25ff6af1 1720 srb_t *sp = ptr;
faef62d1 1721 struct srb_iocb *tmf = &sp->u.iocb_cmd;
25ff6af1 1722
faef62d1 1723 complete(&tmf->u.tmf.comp);
3822263e
MI		 1724}
1725
1726int
faef62d1 1727qla2x00_async_tm_cmd(fc_port_t *fcport, uint32_t flags, uint32_t lun,
3822263e
MI		 1728 uint32_t tag)
1729{
1730 struct scsi_qla_host *vha = fcport->vha;
faef62d1 1731 struct srb_iocb *tm_iocb;
3822263e 1732 srb_t *sp;
faef62d1 1733 int rval = QLA_FUNCTION_FAILED;
3822263e 1734
9ba56b95 1735 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
3822263e
MI		 1736 if (!sp)
1737 goto done;
1738
faef62d1 1739 tm_iocb = &sp->u.iocb_cmd;
9ba56b95
GM		 1740 sp->type = SRB_TM_CMD;
1741 sp->name = "tmf";
e74e7d95
BH		 1742
1743 tm_iocb->timeout = qla2x00_tmf_iocb_timeout;
1744 init_completion(&tm_iocb->u.tmf.comp);
faef62d1 1745 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha));
e74e7d95 1746
faef62d1
AB		 1747 tm_iocb->u.tmf.flags = flags;
1748 tm_iocb->u.tmf.lun = lun;
1749 tm_iocb->u.tmf.data = tag;
1750 sp->done = qla2x00_tmf_sp_done;
3822263e
MI		 1751
1752 rval = qla2x00_start_sp(sp);
1753 if (rval != QLA_SUCCESS)
1754 goto done_free_sp;
1755
7c3df132 1756 ql_dbg(ql_dbg_taskm, vha, 0x802f,
cfb0919c
CD		 1757 "Async-tmf hdl=%x loop-id=%x portid=%02x%02x%02x.\n",
1758 sp->handle, fcport->loop_id, fcport->d_id.b.domain,
1759 fcport->d_id.b.area, fcport->d_id.b.al_pa);
faef62d1
AB		 1760
1761 wait_for_completion(&tm_iocb->u.tmf.comp);
1762
b4146c49 1763 rval = tm_iocb->u.tmf.data;
faef62d1 1764
b4146c49
AG		 1765 if (rval != QLA_SUCCESS) {
1766 ql_log(ql_log_warn, vha, 0x8030,
faef62d1
AB		 1767 "TM IOCB failed (%x).\n", rval);
1768 }
1769
1770 if (!test_bit(UNLOADING, &vha->dpc_flags) && !IS_QLAFX00(vha->hw)) {
1771 flags = tm_iocb->u.tmf.flags;
1772 lun = (uint16_t)tm_iocb->u.tmf.lun;
1773
1774 /* Issue Marker IOCB */
1775 qla2x00_marker(vha, vha->hw->req_q_map[0],
1776 vha->hw->rsp_q_map[0], sp->fcport->loop_id, lun,
1777 flags == TCF_LUN_RESET ? MK_SYNC_ID_LUN : MK_SYNC_ID);
1778 }
3822263e
MI		 1779
1780done_free_sp:
25ff6af1 1781 sp->free(sp);
6d674927 1782 sp->fcport->flags &= ~FCF_ASYNC_SENT;
3822263e
MI		 1783done:
1784 return rval;
1785}
1786
4440e46d
AB		 1787static void
1788qla24xx_abort_iocb_timeout(void *data)
1789{
25ff6af1 1790 srb_t *sp = data;
4440e46d
AB		 1791 struct srb_iocb *abt = &sp->u.iocb_cmd;
1792
1793 abt->u.abt.comp_status = CS_TIMEOUT;
f6145e86 1794 sp->done(sp, QLA_FUNCTION_TIMEOUT);
4440e46d
AB		 1795}
1796
1797static void
25ff6af1 1798qla24xx_abort_sp_done(void *ptr, int res)
4440e46d 1799{
25ff6af1 1800 srb_t *sp = ptr;
4440e46d
AB		 1801 struct srb_iocb *abt = &sp->u.iocb_cmd;
1802
f6145e86
QT		 1803 if (del_timer(&sp->u.iocb_cmd.timer)) {
1804 if (sp->flags & SRB_WAKEUP_ON_COMP)
1805 complete(&abt->u.abt.comp);
1806 else
1807 sp->free(sp);
1808 }
4440e46d
AB		 1809}
1810
15f30a57 1811int
f6145e86 1812qla24xx_async_abort_cmd(srb_t *cmd_sp, bool wait)
4440e46d 1813{
25ff6af1 1814 scsi_qla_host_t *vha = cmd_sp->vha;
4440e46d
AB		 1815 struct srb_iocb *abt_iocb;
1816 srb_t *sp;
1817 int rval = QLA_FUNCTION_FAILED;
1818
6a629468
QT		 1819 sp = qla2xxx_get_qpair_sp(cmd_sp->vha, cmd_sp->qpair, cmd_sp->fcport,
1820 GFP_KERNEL);
4440e46d
AB		 1821 if (!sp)
1822 goto done;
1823
1824 abt_iocb = &sp->u.iocb_cmd;
1825 sp->type = SRB_ABT_CMD;
1826 sp->name = "abort";
49cecca7 1827 sp->qpair = cmd_sp->qpair;
f6145e86
QT		 1828 if (wait)
1829 sp->flags = SRB_WAKEUP_ON_COMP;
e74e7d95
BH		 1830
1831 abt_iocb->timeout = qla24xx_abort_iocb_timeout;
1832 init_completion(&abt_iocb->u.abt.comp);
4440e46d 1833 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha));
e74e7d95 1834
4440e46d 1835 abt_iocb->u.abt.cmd_hndl = cmd_sp->handle;
49cecca7 1836 abt_iocb->u.abt.req_que_no = cpu_to_le16(cmd_sp->qpair->req->id);
b027a5ac 1837
4440e46d 1838 sp->done = qla24xx_abort_sp_done;
4440e46d
AB		 1839
1840 rval = qla2x00_start_sp(sp);
1841 if (rval != QLA_SUCCESS)
1842 goto done_free_sp;
1843
1844 ql_dbg(ql_dbg_async, vha, 0x507c,
49cecca7
QT		 1845 "Abort command issued - hdl=%x, type=%x\n",
1846 cmd_sp->handle, cmd_sp->type);
4440e46d 1847
f6145e86
QT		 1848 if (wait) {
1849 wait_for_completion(&abt_iocb->u.abt.comp);
1850 rval = abt_iocb->u.abt.comp_status == CS_COMPLETE ?
1851 QLA_SUCCESS : QLA_FUNCTION_FAILED;
1852 }
4440e46d
AB		 1853
1854done_free_sp:
25ff6af1 1855 sp->free(sp);
4440e46d
AB		 1856done:
1857 return rval;
1858}
1859
1860int
1861qla24xx_async_abort_command(srb_t *sp)
1862{
1863 unsigned long flags = 0;
1864
1865 uint32_t handle;
1866 fc_port_t *fcport = sp->fcport;
1867 struct scsi_qla_host *vha = fcport->vha;
1868 struct qla_hw_data *ha = vha->hw;
1869 struct req_que *req = vha->req;
1870
b027a5ac
DT		 1871 if (vha->flags.qpairs_available && sp->qpair)
1872 req = sp->qpair->req;
1873
4440e46d
AB		 1874 spin_lock_irqsave(&ha->hardware_lock, flags);
1875 for (handle = 1; handle < req->num_outstanding_cmds; handle++) {
1876 if (req->outstanding_cmds[handle] == sp)
1877 break;
1878 }
1879 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1880 if (handle == req->num_outstanding_cmds) {
1881 /* Command not found. */
1882 return QLA_FUNCTION_FAILED;
1883 }
1884 if (sp->type == SRB_FXIOCB_DCMD)
1885 return qlafx00_fx_disc(vha, &vha->hw->mr.fcport,
1886 FXDISC_ABORT_IOCTL);
1887
f6145e86 1888 return qla24xx_async_abort_cmd(sp, true);
4440e46d
AB		 1889}
1890
a5d42f4c
DG		 1891static void
1892qla24xx_handle_prli_done_event(struct scsi_qla_host *vha, struct event_arg *ea)
1893{
1894 switch (ea->data[0]) {
1895 case MBS_COMMAND_COMPLETE:
1896 ql_dbg(ql_dbg_disc, vha, 0x2118,
1897 "%s %d %8phC post gpdb\n",
1898 __func__, __LINE__, ea->fcport->port_name);
1899
1900 ea->fcport->chip_reset = vha->hw->base_qpair->chip_reset;
1901 ea->fcport->logout_on_delete = 1;
1902 qla24xx_post_gpdb_work(vha, ea->fcport, 0);
1903 break;
1904 default:
1cbc0efc
DT		 1905 if ((ea->iop[0] == LSC_SCODE_ELS_REJECT) &&
1906 (ea->iop[1] == 0x50000)) { /* reson 5=busy expl:0x0 */
1907 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
1908 ea->fcport->fw_login_state = DSC_LS_PLOGI_COMP;
1909 break;
1910 }
1911
edd05de1
DG		 1912 if (ea->fcport->n2n_flag) {
1913 ql_dbg(ql_dbg_disc, vha, 0x2118,
1914 "%s %d %8phC post fc4 prli\n",
1915 __func__, __LINE__, ea->fcport->port_name);
1916 ea->fcport->fc4f_nvme = 0;
1917 ea->fcport->n2n_flag = 0;
1918 qla24xx_post_prli_work(vha, ea->fcport);
1919 }
a5d42f4c
DG		 1920 ql_dbg(ql_dbg_disc, vha, 0x2119,
1921 "%s %d %8phC unhandle event of %x\n",
1922 __func__, __LINE__, ea->fcport->port_name, ea->data[0]);
1923 break;
1924 }
1925}
1926
726b8548
QT		 1927static void
1928qla24xx_handle_plogi_done_event(struct scsi_qla_host *vha, struct event_arg *ea)
ac280b67 1929{
726b8548 1930 port_id_t cid; /* conflict Nport id */
a084fd68
QT		 1931 u16 lid;
1932 struct fc_port *conflict_fcport;
82abdcaf 1933 unsigned long flags;
a4239945
QT		 1934 struct fc_port *fcport = ea->fcport;
1935
f352eeb7
QT		 1936 ql_dbg(ql_dbg_disc, vha, 0xffff,
1937 "%s %8phC DS %d LS %d rc %d login %d|%d rscn %d|%d data %x|%x iop %x|%x\n",
1938 __func__, fcport->port_name, fcport->disc_state,
1939 fcport->fw_login_state, ea->rc, ea->sp->gen2, fcport->login_gen,
1940 ea->sp->gen2, fcport->rscn_gen|ea->sp->gen1,
1941 ea->data[0], ea->data[1], ea->iop[0], ea->iop[1]);
1942
a4239945
QT		 1943 if ((fcport->fw_login_state == DSC_LS_PLOGI_PEND) ||
1944 (fcport->fw_login_state == DSC_LS_PRLI_PEND)) {
1945 ql_dbg(ql_dbg_disc, vha, 0x20ea,
1946 "%s %d %8phC Remote is trying to login\n",
1947 __func__, __LINE__, fcport->port_name);
1948 return;
1949 }
1950
1951 if (fcport->disc_state == DSC_DELETE_PEND)
1952 return;
1953
1954 if (ea->sp->gen2 != fcport->login_gen) {
1955 /* target side must have changed it. */
1956 ql_dbg(ql_dbg_disc, vha, 0x20d3,
f352eeb7
QT		 1957 "%s %8phC generation changed\n",
1958 __func__, fcport->port_name);
1959 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
a4239945
QT		 1960 return;
1961 } else if (ea->sp->gen1 != fcport->rscn_gen) {
d4f7a16a 1962 qla_rscn_replay(fcport);
a4239945
QT		 1963 return;
1964 }
ac280b67 1965
726b8548 1966 switch (ea->data[0]) {
ac280b67 1967 case MBS_COMMAND_COMPLETE:
a4f92a32
AV		 1968 /*
1969 * Driver must validate login state - If PRLI not complete,
1970 * force a relogin attempt via implicit LOGO, PLOGI, and PRLI
1971 * requests.
1972 */
a5d42f4c
DG		 1973 if (ea->fcport->fc4f_nvme) {
1974 ql_dbg(ql_dbg_disc, vha, 0x2117,
1975 "%s %d %8phC post prli\n",
1976 __func__, __LINE__, ea->fcport->port_name);
1977 qla24xx_post_prli_work(vha, ea->fcport);
1978 } else {
1979 ql_dbg(ql_dbg_disc, vha, 0x20ea,
a084fd68
QT		 1980 "%s %d %8phC LoopID 0x%x in use with %06x. post gnl\n",
1981 __func__, __LINE__, ea->fcport->port_name,
1982 ea->fcport->loop_id, ea->fcport->d_id.b24);
1983
1984 set_bit(ea->fcport->loop_id, vha->hw->loop_id_map);
82abdcaf 1985 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
a5d42f4c
DG		 1986 ea->fcport->chip_reset = vha->hw->base_qpair->chip_reset;
1987 ea->fcport->logout_on_delete = 1;
3515832c 1988 ea->fcport->send_els_logo = 0;
82abdcaf
QT		 1989 ea->fcport->fw_login_state = DSC_LS_PRLI_COMP;
1990 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
1991
a5d42f4c
DG		 1992 qla24xx_post_gpdb_work(vha, ea->fcport, 0);
1993 }
ac280b67
AV		 1994 break;
1995 case MBS_COMMAND_ERROR:
83548fe2 1996 ql_dbg(ql_dbg_disc, vha, 0x20eb, "%s %d %8phC cmd error %x\n",
726b8548
QT		 1997 __func__, __LINE__, ea->fcport->port_name, ea->data[1]);
1998
1999 ea->fcport->flags &= ~FCF_ASYNC_SENT;
2000 ea->fcport->disc_state = DSC_LOGIN_FAILED;
2001 if (ea->data[1] & QLA_LOGIO_LOGIN_RETRIED)
ac280b67
AV		 2002 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
2003 else
726b8548 2004 qla2x00_mark_device_lost(vha, ea->fcport, 1, 0);
ac280b67
AV		 2005 break;
2006 case MBS_LOOP_ID_USED:
726b8548
QT		 2007 /* data[1] = IO PARAM 1 = nport ID */
2008 cid.b.domain = (ea->iop[1] >> 16) & 0xff;
2009 cid.b.area = (ea->iop[1] >> 8) & 0xff;
2010 cid.b.al_pa = ea->iop[1] & 0xff;
2011 cid.b.rsvd_1 = 0;
2012
83548fe2
QT		 2013 ql_dbg(ql_dbg_disc, vha, 0x20ec,
2014 "%s %d %8phC LoopID 0x%x in use post gnl\n",
2015 __func__, __LINE__, ea->fcport->port_name,
2016 ea->fcport->loop_id);
726b8548
QT		 2017
2018 if (IS_SW_RESV_ADDR(cid)) {
2019 set_bit(ea->fcport->loop_id, vha->hw->loop_id_map);
2020 ea->fcport->loop_id = FC_NO_LOOP_ID;
2021 } else {
2022 qla2x00_clear_loop_id(ea->fcport);
ac280b67 2023 }
726b8548
QT		 2024 qla24xx_post_gnl_work(vha, ea->fcport);
2025 break;
2026 case MBS_PORT_ID_USED:
83548fe2
QT		 2027 ql_dbg(ql_dbg_disc, vha, 0x20ed,
2028 "%s %d %8phC NPortId %02x%02x%02x inuse post gidpn\n",
2029 __func__, __LINE__, ea->fcport->port_name,
2030 ea->fcport->d_id.b.domain, ea->fcport->d_id.b.area,
2031 ea->fcport->d_id.b.al_pa);
726b8548 2032
a084fd68
QT		 2033 lid = ea->iop[1] & 0xffff;
2034 qlt_find_sess_invalidate_other(vha,
2035 wwn_to_u64(ea->fcport->port_name),
2036 ea->fcport->d_id, lid, &conflict_fcport);
2037
2038 if (conflict_fcport) {
2039 /*
2040 * Another fcport share the same loop_id/nport id.
2041 * Conflict fcport needs to finish cleanup before this
2042 * fcport can proceed to login.
2043 */
2044 conflict_fcport->conflict = ea->fcport;
2045 ea->fcport->login_pause = 1;
2046
2047 ql_dbg(ql_dbg_disc, vha, 0x20ed,
2048 "%s %d %8phC NPortId %06x inuse with loopid 0x%x. post gidpn\n",
2049 __func__, __LINE__, ea->fcport->port_name,
2050 ea->fcport->d_id.b24, lid);
a084fd68
QT		 2051 } else {
2052 ql_dbg(ql_dbg_disc, vha, 0x20ed,
2053 "%s %d %8phC NPortId %06x inuse with loopid 0x%x. sched delete\n",
2054 __func__, __LINE__, ea->fcport->port_name,
2055 ea->fcport->d_id.b24, lid);
2056
2057 qla2x00_clear_loop_id(ea->fcport);
2058 set_bit(lid, vha->hw->loop_id_map);
2059 ea->fcport->loop_id = lid;
2060 ea->fcport->keep_nport_handle = 0;
94cff6e1 2061 qlt_schedule_sess_for_deletion(ea->fcport);
a084fd68 2062 }
ac280b67
AV		 2063 break;
2064 }
4916392b 2065 return;
ac280b67
AV		 2066}
2067
4916392b 2068void
ac280b67
AV		 2069qla2x00_async_logout_done(struct scsi_qla_host *vha, fc_port_t *fcport,
2070 uint16_t *data)
2071{
a6ca8878 2072 qlt_logo_completion_handler(fcport, data[0]);
726b8548 2073 fcport->login_gen++;
fa83e658 2074 fcport->flags &= ~FCF_ASYNC_ACTIVE;
4916392b 2075 return;
ac280b67
AV		 2076}
2077
4916392b 2078void
5ff1d584
AV		 2079qla2x00_async_adisc_done(struct scsi_qla_host *vha, fc_port_t *fcport,
2080 uint16_t *data)
2081{
fa83e658 2082 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
5ff1d584
AV		 2083 if (data[0] == MBS_COMMAND_COMPLETE) {
2084 qla2x00_update_fcport(vha, fcport);
2085
4916392b 2086 return;
5ff1d584
AV		 2087 }
2088
2089 /* Retry login. */
5ff1d584
AV		 2090 if (data[1] & QLA_LOGIO_LOGIN_RETRIED)
2091 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
2092 else
80d79440 2093 qla2x00_mark_device_lost(vha, fcport, 1, 0);
5ff1d584 2094
4916392b 2095 return;
5ff1d584
AV		 2096}
2097
1da177e4
LT		 2098/****************************************************************************/
2099/* QLogic ISP2x00 Hardware Support Functions. */
2100/****************************************************************************/
2101
fa492630 2102static int
7d613ac6
SV		 2103qla83xx_nic_core_fw_load(scsi_qla_host_t *vha)
2104{
2105 int rval = QLA_SUCCESS;
2106 struct qla_hw_data *ha = vha->hw;
2107 uint32_t idc_major_ver, idc_minor_ver;
711aa7f7 2108 uint16_t config[4];
7d613ac6
SV		 2109
2110 qla83xx_idc_lock(vha, 0);
2111
2112 /* SV: TODO: Assign initialization timeout from
2113 * flash-info / other param
2114 */
2115 ha->fcoe_dev_init_timeout = QLA83XX_IDC_INITIALIZATION_TIMEOUT;
2116 ha->fcoe_reset_timeout = QLA83XX_IDC_RESET_ACK_TIMEOUT;
2117
2118 /* Set our fcoe function presence */
2119 if (__qla83xx_set_drv_presence(vha) != QLA_SUCCESS) {
2120 ql_dbg(ql_dbg_p3p, vha, 0xb077,
2121 "Error while setting DRV-Presence.\n");
2122 rval = QLA_FUNCTION_FAILED;
2123 goto exit;
2124 }
2125
2126 /* Decide the reset ownership */
2127 qla83xx_reset_ownership(vha);
2128
2129 /*
2130 * On first protocol driver load:
2131 * Init-Owner: Set IDC-Major-Version and Clear IDC-Lock-Recovery
2132 * register.
2133 * Others: Check compatibility with current IDC Major version.
2134 */
2135 qla83xx_rd_reg(vha, QLA83XX_IDC_MAJOR_VERSION, &idc_major_ver);
2136 if (ha->flags.nic_core_reset_owner) {
2137 /* Set IDC Major version */
2138 idc_major_ver = QLA83XX_SUPP_IDC_MAJOR_VERSION;
2139 qla83xx_wr_reg(vha, QLA83XX_IDC_MAJOR_VERSION, idc_major_ver);
2140
2141 /* Clearing IDC-Lock-Recovery register */
2142 qla83xx_wr_reg(vha, QLA83XX_IDC_LOCK_RECOVERY, 0);
2143 } else if (idc_major_ver != QLA83XX_SUPP_IDC_MAJOR_VERSION) {
2144 /*
2145 * Clear further IDC participation if we are not compatible with
2146 * the current IDC Major Version.
2147 */
2148 ql_log(ql_log_warn, vha, 0xb07d,
2149 "Failing load, idc_major_ver=%d, expected_major_ver=%d.\n",
2150 idc_major_ver, QLA83XX_SUPP_IDC_MAJOR_VERSION);
2151 __qla83xx_clear_drv_presence(vha);
2152 rval = QLA_FUNCTION_FAILED;
2153 goto exit;
2154 }
2155 /* Each function sets its supported Minor version. */
2156 qla83xx_rd_reg(vha, QLA83XX_IDC_MINOR_VERSION, &idc_minor_ver);
2157 idc_minor_ver |= (QLA83XX_SUPP_IDC_MINOR_VERSION << (ha->portnum * 2));
2158 qla83xx_wr_reg(vha, QLA83XX_IDC_MINOR_VERSION, idc_minor_ver);
2159
711aa7f7
SK		 2160 if (ha->flags.nic_core_reset_owner) {
2161 memset(config, 0, sizeof(config));
2162 if (!qla81xx_get_port_config(vha, config))
2163 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE,
2164 QLA8XXX_DEV_READY);
2165 }
2166
7d613ac6
SV		 2167 rval = qla83xx_idc_state_handler(vha);
2168
2169exit:
2170 qla83xx_idc_unlock(vha, 0);
2171
2172 return rval;
2173}
2174
1da177e4
LT		 2175/*
2176* qla2x00_initialize_adapter
2177* Initialize board.
2178*
2179* Input:
2180* ha = adapter block pointer.
2181*
2182* Returns:
2183* 0 = success
2184*/
2185int
e315cd28 2186qla2x00_initialize_adapter(scsi_qla_host_t *vha)
1da177e4
LT		 2187{
2188 int rval;
e315cd28 2189 struct qla_hw_data *ha = vha->hw;
73208dfd 2190 struct req_que *req = ha->req_q_map[0];
2533cf67 2191
fc90adaf
JC		 2192 memset(&vha->qla_stats, 0, sizeof(vha->qla_stats));
2193 memset(&vha->fc_host_stat, 0, sizeof(vha->fc_host_stat));
2194
1da177e4 2195 /* Clear adapter flags. */
e315cd28 2196 vha->flags.online = 0;
2533cf67 2197 ha->flags.chip_reset_done = 0;
e315cd28 2198 vha->flags.reset_active = 0;
85880801
AV		 2199 ha->flags.pci_channel_io_perm_failure = 0;
2200 ha->flags.eeh_busy = 0;
fabbb8df 2201 vha->qla_stats.jiffies_at_last_reset = get_jiffies_64();
e315cd28
AC		 2202 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
2203 atomic_set(&vha->loop_state, LOOP_DOWN);
2204 vha->device_flags = DFLG_NO_CABLE;
2205 vha->dpc_flags = 0;
2206 vha->flags.management_server_logged_in = 0;
2207 vha->marker_needed = 0;
1da177e4
LT		 2208 ha->isp_abort_cnt = 0;
2209 ha->beacon_blink_led = 0;
2210
73208dfd
AC		 2211 set_bit(0, ha->req_qid_map);
2212 set_bit(0, ha->rsp_qid_map);
2213
cfb0919c 2214 ql_dbg(ql_dbg_init, vha, 0x0040,
7c3df132 2215 "Configuring PCI space...\n");
e315cd28 2216 rval = ha->isp_ops->pci_config(vha);
1da177e4 2217 if (rval) {
7c3df132
SK		 2218 ql_log(ql_log_warn, vha, 0x0044,
2219 "Unable to configure PCI space.\n");
1da177e4
LT		 2220 return (rval);
2221 }
2222
e315cd28 2223 ha->isp_ops->reset_chip(vha);
1da177e4 2224
e315cd28 2225 rval = qla2xxx_get_flash_info(vha);
c00d8994 2226 if (rval) {
7c3df132
SK		 2227 ql_log(ql_log_fatal, vha, 0x004f,
2228 "Unable to validate FLASH data.\n");
7ec0effd
AD		 2229 return rval;
2230 }
2231
2232 if (IS_QLA8044(ha)) {
2233 qla8044_read_reset_template(vha);
2234
2235 /* NOTE: If ql2xdontresethba==1, set IDC_CTRL DONTRESET_BIT0.
2236 * If DONRESET_BIT0 is set, drivers should not set dev_state
2237 * to NEED_RESET. But if NEED_RESET is set, drivers should
2238 * should honor the reset. */
2239 if (ql2xdontresethba == 1)
2240 qla8044_set_idc_dontreset(vha);
c00d8994
AV		 2241 }
2242
73208dfd 2243 ha->isp_ops->get_flash_version(vha, req->ring);
cfb0919c 2244 ql_dbg(ql_dbg_init, vha, 0x0061,
7c3df132 2245 "Configure NVRAM parameters...\n");
0107109e 2246
e315cd28 2247 ha->isp_ops->nvram_config(vha);
1da177e4 2248
d4c760c2
AV		 2249 if (ha->flags.disable_serdes) {
2250 /* Mask HBA via NVRAM settings? */
7c3df132 2251 ql_log(ql_log_info, vha, 0x0077,
7b833558 2252 "Masking HBA WWPN %8phN (via NVRAM).\n", vha->port_name);
d4c760c2
AV		 2253 return QLA_FUNCTION_FAILED;
2254 }
2255
cfb0919c 2256 ql_dbg(ql_dbg_init, vha, 0x0078,
7c3df132 2257 "Verifying loaded RISC code...\n");
1da177e4 2258
e315cd28
AC		 2259 if (qla2x00_isp_firmware(vha) != QLA_SUCCESS) {
2260 rval = ha->isp_ops->chip_diag(vha);
d19044c3
AV		 2261 if (rval)
2262 return (rval);
e315cd28 2263 rval = qla2x00_setup_chip(vha);
d19044c3
AV		 2264 if (rval)
2265 return (rval);
1da177e4 2266 }
a9083016 2267
4d4df193 2268 if (IS_QLA84XX(ha)) {
e315cd28 2269 ha->cs84xx = qla84xx_get_chip(vha);
4d4df193 2270 if (!ha->cs84xx) {
7c3df132 2271 ql_log(ql_log_warn, vha, 0x00d0,
4d4df193
HK		 2272 "Unable to configure ISP84XX.\n");
2273 return QLA_FUNCTION_FAILED;
2274 }
2275 }
2d70c103 2276
ead03855 2277 if (qla_ini_mode_enabled(vha) || qla_dual_mode_enabled(vha))
2d70c103
NB		 2278 rval = qla2x00_init_rings(vha);
2279
2533cf67 2280 ha->flags.chip_reset_done = 1;
1da177e4 2281
9a069e19 2282 if (rval == QLA_SUCCESS && IS_QLA84XX(ha)) {
6c452a45 2283 /* Issue verify 84xx FW IOCB to complete 84xx initialization */
9a069e19
GM		 2284 rval = qla84xx_init_chip(vha);
2285 if (rval != QLA_SUCCESS) {
7c3df132
SK		 2286 ql_log(ql_log_warn, vha, 0x00d4,
2287 "Unable to initialize ISP84XX.\n");
8d2b21db 2288 qla84xx_put_chip(vha);
9a069e19
GM		 2289 }
2290 }
2291
7d613ac6
SV		 2292 /* Load the NIC Core f/w if we are the first protocol driver. */
2293 if (IS_QLA8031(ha)) {
2294 rval = qla83xx_nic_core_fw_load(vha);
2295 if (rval)
2296 ql_log(ql_log_warn, vha, 0x0124,
2297 "Error in initializing NIC Core f/w.\n");
2298 }
2299
2f0f3f4f
MI		 2300 if (IS_QLA24XX_TYPE(ha) || IS_QLA25XX(ha))
2301 qla24xx_read_fcp_prio_cfg(vha);
09ff701a 2302
c46e65c7
JC		 2303 if (IS_P3P_TYPE(ha))
2304 qla82xx_set_driver_version(vha, QLA2XXX_VERSION);
2305 else
2306 qla25xx_set_driver_version(vha, QLA2XXX_VERSION);
2307
1da177e4
LT		 2308 return (rval);
2309}
2310
2311/**
abbd8870 2312 * qla2100_pci_config() - Setup ISP21xx PCI configuration registers.
2db6228d 2313 * @vha: HA context
1da177e4
LT		 2314 *
2315 * Returns 0 on success.
2316 */
abbd8870 2317int
e315cd28 2318qla2100_pci_config(scsi_qla_host_t *vha)
1da177e4 2319{
a157b101 2320 uint16_t w;
abbd8870 2321 unsigned long flags;
e315cd28 2322 struct qla_hw_data *ha = vha->hw;
3d71644c 2323 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1da177e4 2324
1da177e4 2325 pci_set_master(ha->pdev);
af6177d8 2326 pci_try_set_mwi(ha->pdev);
1da177e4 2327
1da177e4 2328 pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
a157b101 2329 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
abbd8870
AV		 2330 pci_write_config_word(ha->pdev, PCI_COMMAND, w);
2331
737faece 2332 pci_disable_rom(ha->pdev);
1da177e4
LT		 2333
2334 /* Get PCI bus information. */
2335 spin_lock_irqsave(&ha->hardware_lock, flags);
3d71644c 2336 ha->pci_attr = RD_REG_WORD(&reg->ctrl_status);
1da177e4
LT		 2337 spin_unlock_irqrestore(&ha->hardware_lock, flags);
2338
abbd8870
AV		 2339 return QLA_SUCCESS;
2340}
1da177e4 2341
abbd8870
AV		 2342/**
2343 * qla2300_pci_config() - Setup ISP23xx PCI configuration registers.
2db6228d 2344 * @vha: HA context
abbd8870
AV		 2345 *
2346 * Returns 0 on success.
2347 */
2348int
e315cd28 2349qla2300_pci_config(scsi_qla_host_t *vha)
abbd8870 2350{
a157b101 2351 uint16_t w;
abbd8870
AV		 2352 unsigned long flags = 0;
2353 uint32_t cnt;
e315cd28 2354 struct qla_hw_data *ha = vha->hw;
3d71644c 2355 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1da177e4 2356
abbd8870 2357 pci_set_master(ha->pdev);
af6177d8 2358 pci_try_set_mwi(ha->pdev);
1da177e4 2359
abbd8870 2360 pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
a157b101 2361 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
1da177e4 2362
abbd8870
AV		 2363 if (IS_QLA2322(ha) || IS_QLA6322(ha))
2364 w &= ~PCI_COMMAND_INTX_DISABLE;
a157b101 2365 pci_write_config_word(ha->pdev, PCI_COMMAND, w);
1da177e4 2366
abbd8870
AV		 2367 /*
2368 * If this is a 2300 card and not 2312, reset the
2369 * COMMAND_INVALIDATE due to a bug in the 2300. Unfortunately,
2370 * the 2310 also reports itself as a 2300 so we need to get the
2371 * fb revision level -- a 6 indicates it really is a 2300 and
2372 * not a 2310.
2373 */
2374 if (IS_QLA2300(ha)) {
2375 spin_lock_irqsave(&ha->hardware_lock, flags);
1da177e4 2376
abbd8870 2377 /* Pause RISC. */
3d71644c 2378 WRT_REG_WORD(&reg->hccr, HCCR_PAUSE_RISC);
abbd8870 2379 for (cnt = 0; cnt < 30000; cnt++) {
3d71644c 2380 if ((RD_REG_WORD(&reg->hccr) & HCCR_RISC_PAUSE) != 0)
abbd8870 2381 break;
1da177e4 2382
abbd8870
AV		 2383 udelay(10);
2384 }
1da177e4 2385
abbd8870 2386 /* Select FPM registers. */
3d71644c
AV		 2387 WRT_REG_WORD(&reg->ctrl_status, 0x20);
2388 RD_REG_WORD(&reg->ctrl_status);
abbd8870
AV		 2389
2390 /* Get the fb rev level */
3d71644c 2391 ha->fb_rev = RD_FB_CMD_REG(ha, reg);
abbd8870
AV		 2392
2393 if (ha->fb_rev == FPM_2300)
a157b101 2394 pci_clear_mwi(ha->pdev);
abbd8870
AV		 2395
2396 /* Deselect FPM registers. */
3d71644c
AV		 2397 WRT_REG_WORD(&reg->ctrl_status, 0x0);
2398 RD_REG_WORD(&reg->ctrl_status);
abbd8870
AV		 2399
2400 /* Release RISC module. */
3d71644c 2401 WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
abbd8870 2402 for (cnt = 0; cnt < 30000; cnt++) {
3d71644c 2403 if ((RD_REG_WORD(&reg->hccr) & HCCR_RISC_PAUSE) == 0)
abbd8870
AV		 2404 break;
2405
2406 udelay(10);
1da177e4 2407 }
1da177e4 2408
abbd8870
AV		 2409 spin_unlock_irqrestore(&ha->hardware_lock, flags);
2410 }
1da177e4 2411
abbd8870
AV		 2412 pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80);
2413
737faece 2414 pci_disable_rom(ha->pdev);
1da177e4 2415
abbd8870
AV		 2416 /* Get PCI bus information. */
2417 spin_lock_irqsave(&ha->hardware_lock, flags);
3d71644c 2418 ha->pci_attr = RD_REG_WORD(&reg->ctrl_status);
abbd8870
AV		 2419 spin_unlock_irqrestore(&ha->hardware_lock, flags);
2420
2421 return QLA_SUCCESS;
1da177e4
LT		 2422}
2423
0107109e
AV		 2424/**
2425 * qla24xx_pci_config() - Setup ISP24xx PCI configuration registers.
2db6228d 2426 * @vha: HA context
0107109e
AV		 2427 *
2428 * Returns 0 on success.
2429 */
2430int
e315cd28 2431qla24xx_pci_config(scsi_qla_host_t *vha)
0107109e 2432{
a157b101 2433 uint16_t w;
0107109e 2434 unsigned long flags = 0;
e315cd28 2435 struct qla_hw_data *ha = vha->hw;
0107109e 2436 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
0107109e
AV		 2437
2438 pci_set_master(ha->pdev);
af6177d8 2439 pci_try_set_mwi(ha->pdev);
0107109e
AV		 2440
2441 pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
a157b101 2442 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
0107109e
AV		 2443 w &= ~PCI_COMMAND_INTX_DISABLE;
2444 pci_write_config_word(ha->pdev, PCI_COMMAND, w);
2445
2446 pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80);
2447
2448 /* PCI-X -- adjust Maximum Memory Read Byte Count (2048). */
f85ec187
AV		 2449 if (pci_find_capability(ha->pdev, PCI_CAP_ID_PCIX))
2450 pcix_set_mmrbc(ha->pdev, 2048);
0107109e
AV		 2451
2452 /* PCIe -- adjust Maximum Read Request Size (2048). */
e67f1321 2453 if (pci_is_pcie(ha->pdev))
5ffd3a52 2454 pcie_set_readrq(ha->pdev, 4096);
0107109e 2455
737faece 2456 pci_disable_rom(ha->pdev);
0107109e 2457
44c10138 2458 ha->chip_revision = ha->pdev->revision;
a8488abe 2459
0107109e
AV		 2460 /* Get PCI bus information. */
2461 spin_lock_irqsave(&ha->hardware_lock, flags);
2462 ha->pci_attr = RD_REG_DWORD(&reg->ctrl_status);
2463 spin_unlock_irqrestore(&ha->hardware_lock, flags);
2464
2465 return QLA_SUCCESS;
2466}
2467
c3a2f0df
AV		 2468/**
2469 * qla25xx_pci_config() - Setup ISP25xx PCI configuration registers.
2db6228d 2470 * @vha: HA context
c3a2f0df
AV		 2471 *
2472 * Returns 0 on success.
2473 */
2474int
e315cd28 2475qla25xx_pci_config(scsi_qla_host_t *vha)
c3a2f0df
AV		 2476{
2477 uint16_t w;
e315cd28 2478 struct qla_hw_data *ha = vha->hw;
c3a2f0df
AV		 2479
2480 pci_set_master(ha->pdev);
2481 pci_try_set_mwi(ha->pdev);
2482
2483 pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
2484 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
2485 w &= ~PCI_COMMAND_INTX_DISABLE;
2486 pci_write_config_word(ha->pdev, PCI_COMMAND, w);
2487
2488 /* PCIe -- adjust Maximum Read Request Size (2048). */
e67f1321 2489 if (pci_is_pcie(ha->pdev))
5ffd3a52 2490 pcie_set_readrq(ha->pdev, 4096);
c3a2f0df 2491
737faece 2492 pci_disable_rom(ha->pdev);
c3a2f0df
AV		 2493
2494 ha->chip_revision = ha->pdev->revision;
2495
2496 return QLA_SUCCESS;
2497}
2498
1da177e4
LT		 2499/**
2500 * qla2x00_isp_firmware() - Choose firmware image.
2db6228d 2501 * @vha: HA context
1da177e4
LT		 2502 *
2503 * Returns 0 on success.
2504 */
2505static int
e315cd28 2506qla2x00_isp_firmware(scsi_qla_host_t *vha)
1da177e4
LT		 2507{
2508 int rval;
42e421b1
AV		 2509 uint16_t loop_id, topo, sw_cap;
2510 uint8_t domain, area, al_pa;
e315cd28 2511 struct qla_hw_data *ha = vha->hw;
1da177e4
LT		 2512
2513 /* Assume loading risc code */
fa2a1ce5 2514 rval = QLA_FUNCTION_FAILED;
1da177e4
LT		 2515
2516 if (ha->flags.disable_risc_code_load) {
7c3df132 2517 ql_log(ql_log_info, vha, 0x0079, "RISC CODE NOT loaded.\n");
1da177e4
LT		 2518
2519 /* Verify checksum of loaded RISC code. */
e315cd28 2520 rval = qla2x00_verify_checksum(vha, ha->fw_srisc_address);
42e421b1
AV		 2521 if (rval == QLA_SUCCESS) {
2522 /* And, verify we are not in ROM code. */
e315cd28 2523 rval = qla2x00_get_adapter_id(vha, &loop_id, &al_pa,
42e421b1
AV		 2524 &area, &domain, &topo, &sw_cap);
2525 }
1da177e4
LT		 2526 }
2527
7c3df132
SK		 2528 if (rval)
2529 ql_dbg(ql_dbg_init, vha, 0x007a,
2530 "**** Load RISC code ****.\n");
1da177e4
LT		 2531
2532 return (rval);
2533}
2534
2535/**
2536 * qla2x00_reset_chip() - Reset ISP chip.
2db6228d 2537 * @vha: HA context
1da177e4
LT		 2538 *
2539 * Returns 0 on success.
2540 */
abbd8870 2541void
e315cd28 2542qla2x00_reset_chip(scsi_qla_host_t *vha)
1da177e4
LT		 2543{
2544 unsigned long flags = 0;
e315cd28 2545 struct qla_hw_data *ha = vha->hw;
3d71644c 2546 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1da177e4 2547 uint32_t cnt;
1da177e4
LT		 2548 uint16_t cmd;
2549
85880801
AV		 2550 if (unlikely(pci_channel_offline(ha->pdev)))
2551 return;
2552
fd34f556 2553 ha->isp_ops->disable_intrs(ha);
1da177e4
LT		 2554
2555 spin_lock_irqsave(&ha->hardware_lock, flags);
2556
2557 /* Turn off master enable */
2558 cmd = 0;
2559 pci_read_config_word(ha->pdev, PCI_COMMAND, &cmd);
2560 cmd &= ~PCI_COMMAND_MASTER;
2561 pci_write_config_word(ha->pdev, PCI_COMMAND, cmd);
2562
2563 if (!IS_QLA2100(ha)) {
2564 /* Pause RISC. */
2565 WRT_REG_WORD(&reg->hccr, HCCR_PAUSE_RISC);
2566 if (IS_QLA2200(ha) || IS_QLA2300(ha)) {
2567 for (cnt = 0; cnt < 30000; cnt++) {
2568 if ((RD_REG_WORD(&reg->hccr) &
2569 HCCR_RISC_PAUSE) != 0)
2570 break;
2571 udelay(100);
2572 }
2573 } else {
2574 RD_REG_WORD(&reg->hccr); /* PCI Posting. */
2575 udelay(10);
2576 }
2577
2578 /* Select FPM registers. */
2579 WRT_REG_WORD(&reg->ctrl_status, 0x20);
2580 RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
2581
2582 /* FPM Soft Reset. */
2583 WRT_REG_WORD(&reg->fpm_diag_config, 0x100);
2584 RD_REG_WORD(&reg->fpm_diag_config); /* PCI Posting. */
2585
2586 /* Toggle Fpm Reset. */
2587 if (!IS_QLA2200(ha)) {
2588 WRT_REG_WORD(&reg->fpm_diag_config, 0x0);
2589 RD_REG_WORD(&reg->fpm_diag_config); /* PCI Posting. */
2590 }
2591
2592 /* Select frame buffer registers. */
2593 WRT_REG_WORD(&reg->ctrl_status, 0x10);
2594 RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
2595
2596 /* Reset frame buffer FIFOs. */
2597 if (IS_QLA2200(ha)) {
2598 WRT_FB_CMD_REG(ha, reg, 0xa000);
2599 RD_FB_CMD_REG(ha, reg); /* PCI Posting. */
2600 } else {
2601 WRT_FB_CMD_REG(ha, reg, 0x00fc);
2602
2603 /* Read back fb_cmd until zero or 3 seconds max */
2604 for (cnt = 0; cnt < 3000; cnt++) {
2605 if ((RD_FB_CMD_REG(ha, reg) & 0xff) == 0)
2606 break;
2607 udelay(100);
2608 }
2609 }
2610
2611 /* Select RISC module registers. */
2612 WRT_REG_WORD(&reg->ctrl_status, 0);
2613 RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
2614
2615 /* Reset RISC processor. */
2616 WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
2617 RD_REG_WORD(&reg->hccr); /* PCI Posting. */
2618
2619 /* Release RISC processor. */
2620 WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
2621 RD_REG_WORD(&reg->hccr); /* PCI Posting. */
2622 }
2623
2624 WRT_REG_WORD(&reg->hccr, HCCR_CLR_RISC_INT);
2625 WRT_REG_WORD(&reg->hccr, HCCR_CLR_HOST_INT);
2626
2627 /* Reset ISP chip. */
2628 WRT_REG_WORD(&reg->ctrl_status, CSR_ISP_SOFT_RESET);
2629
2630 /* Wait for RISC to recover from reset. */
2631 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
2632 /*
2633 * It is necessary to for a delay here since the card doesn't
2634 * respond to PCI reads during a reset. On some architectures
2635 * this will result in an MCA.
2636 */
2637 udelay(20);
2638 for (cnt = 30000; cnt; cnt--) {
2639 if ((RD_REG_WORD(&reg->ctrl_status) &
2640 CSR_ISP_SOFT_RESET) == 0)
2641 break;
2642 udelay(100);
2643 }
2644 } else
2645 udelay(10);
2646
2647 /* Reset RISC processor. */
2648 WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
2649
2650 WRT_REG_WORD(&reg->semaphore, 0);
2651
2652 /* Release RISC processor. */
2653 WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
2654 RD_REG_WORD(&reg->hccr); /* PCI Posting. */
2655
2656 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
2657 for (cnt = 0; cnt < 30000; cnt++) {
ffb39f03 2658 if (RD_MAILBOX_REG(ha, reg, 0) != MBS_BUSY)
1da177e4 2659 break;
1da177e4
LT		 2660
2661 udelay(100);
2662 }
2663 } else
2664 udelay(100);
2665
2666 /* Turn on master enable */
2667 cmd |= PCI_COMMAND_MASTER;
2668 pci_write_config_word(ha->pdev, PCI_COMMAND, cmd);
2669
2670 /* Disable RISC pause on FPM parity error. */
2671 if (!IS_QLA2100(ha)) {
2672 WRT_REG_WORD(&reg->hccr, HCCR_DISABLE_PARITY_PAUSE);
2673 RD_REG_WORD(&reg->hccr); /* PCI Posting. */
2674 }
2675
2676 spin_unlock_irqrestore(&ha->hardware_lock, flags);
2677}
2678
b1d46989
MI		 2679/**
2680 * qla81xx_reset_mpi() - Reset's MPI FW via Write MPI Register MBC.
2db6228d 2681 * @vha: HA context
b1d46989
MI		 2682 *
2683 * Returns 0 on success.
2684 */
fa492630 2685static int
b1d46989
MI		 2686qla81xx_reset_mpi(scsi_qla_host_t *vha)
2687{
2688 uint16_t mb[4] = {0x1010, 0, 1, 0};
2689
6246b8a1
GM		 2690 if (!IS_QLA81XX(vha->hw))
2691 return QLA_SUCCESS;
2692
b1d46989
MI		 2693 return qla81xx_write_mpi_register(vha, mb);
2694}
2695
0107109e 2696/**
88c26663 2697 * qla24xx_reset_risc() - Perform full reset of ISP24xx RISC.
2db6228d 2698 * @vha: HA context
0107109e
AV		 2699 *
2700 * Returns 0 on success.
2701 */
d14e72fb 2702static inline int
e315cd28 2703qla24xx_reset_risc(scsi_qla_host_t *vha)
0107109e
AV		 2704{
2705 unsigned long flags = 0;
e315cd28 2706 struct qla_hw_data *ha = vha->hw;
0107109e 2707 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
52c82823 2708 uint32_t cnt;
335a1cc9 2709 uint16_t wd;
b1d46989 2710 static int abts_cnt; /* ISP abort retry counts */
d14e72fb 2711 int rval = QLA_SUCCESS;
0107109e 2712
0107109e
AV		 2713 spin_lock_irqsave(&ha->hardware_lock, flags);
2714
2715 /* Reset RISC. */
2716 WRT_REG_DWORD(&reg->ctrl_status, CSRX_DMA_SHUTDOWN|MWB_4096_BYTES);
2717 for (cnt = 0; cnt < 30000; cnt++) {
2718 if ((RD_REG_DWORD(&reg->ctrl_status) & CSRX_DMA_ACTIVE) == 0)
2719 break;
2720
2721 udelay(10);
2722 }
2723
d14e72fb
HM		 2724 if (!(RD_REG_DWORD(&reg->ctrl_status) & CSRX_DMA_ACTIVE))
2725 set_bit(DMA_SHUTDOWN_CMPL, &ha->fw_dump_cap_flags);
2726
2727 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x017e,
2728 "HCCR: 0x%x, Control Status %x, DMA active status:0x%x\n",
2729 RD_REG_DWORD(&reg->hccr),
2730 RD_REG_DWORD(&reg->ctrl_status),
2731 (RD_REG_DWORD(&reg->ctrl_status) & CSRX_DMA_ACTIVE));
2732
0107109e
AV		 2733 WRT_REG_DWORD(&reg->ctrl_status,
2734 CSRX_ISP_SOFT_RESET|CSRX_DMA_SHUTDOWN|MWB_4096_BYTES);
335a1cc9 2735 pci_read_config_word(ha->pdev, PCI_COMMAND, &wd);
88c26663 2736
335a1cc9 2737 udelay(100);
d14e72fb 2738
88c26663 2739 /* Wait for firmware to complete NVRAM accesses. */
52c82823 2740 RD_REG_WORD(&reg->mailbox0);
d14e72fb
HM		 2741 for (cnt = 10000; RD_REG_WORD(&reg->mailbox0) != 0 &&
2742 rval == QLA_SUCCESS; cnt--) {
88c26663 2743 barrier();
d14e72fb
HM		 2744 if (cnt)
2745 udelay(5);
2746 else
2747 rval = QLA_FUNCTION_TIMEOUT;
88c26663
AV		 2748 }
2749
d14e72fb
HM		 2750 if (rval == QLA_SUCCESS)
2751 set_bit(ISP_MBX_RDY, &ha->fw_dump_cap_flags);
2752
2753 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x017f,
2754 "HCCR: 0x%x, MailBox0 Status 0x%x\n",
2755 RD_REG_DWORD(&reg->hccr),
2756 RD_REG_DWORD(&reg->mailbox0));
2757
335a1cc9 2758 /* Wait for soft-reset to complete. */
52c82823 2759 RD_REG_DWORD(&reg->ctrl_status);
200ffb15 2760 for (cnt = 0; cnt < 60; cnt++) {
0107109e 2761 barrier();
d14e72fb
HM		 2762 if ((RD_REG_DWORD(&reg->ctrl_status) &
2763 CSRX_ISP_SOFT_RESET) == 0)
2764 break;
2765
2766 udelay(5);
0107109e 2767 }
d14e72fb
HM		 2768 if (!(RD_REG_DWORD(&reg->ctrl_status) & CSRX_ISP_SOFT_RESET))
2769 set_bit(ISP_SOFT_RESET_CMPL, &ha->fw_dump_cap_flags);
2770
2771 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x015d,
2772 "HCCR: 0x%x, Soft Reset status: 0x%x\n",
2773 RD_REG_DWORD(&reg->hccr),
2774 RD_REG_DWORD(&reg->ctrl_status));
0107109e 2775
b1d46989
MI		 2776 /* If required, do an MPI FW reset now */
2777 if (test_and_clear_bit(MPI_RESET_NEEDED, &vha->dpc_flags)) {
2778 if (qla81xx_reset_mpi(vha) != QLA_SUCCESS) {
2779 if (++abts_cnt < 5) {
2780 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
2781 set_bit(MPI_RESET_NEEDED, &vha->dpc_flags);
2782 } else {
2783 /*
2784 * We exhausted the ISP abort retries. We have to
2785 * set the board offline.
2786 */
2787 abts_cnt = 0;
2788 vha->flags.online = 0;
2789 }
2790 }
2791 }
2792
0107109e
AV		 2793 WRT_REG_DWORD(&reg->hccr, HCCRX_SET_RISC_RESET);
2794 RD_REG_DWORD(&reg->hccr);
2795
2796 WRT_REG_DWORD(&reg->hccr, HCCRX_REL_RISC_PAUSE);
2797 RD_REG_DWORD(&reg->hccr);
2798
2799 WRT_REG_DWORD(&reg->hccr, HCCRX_CLR_RISC_RESET);
2800 RD_REG_DWORD(&reg->hccr);
2801
52c82823 2802 RD_REG_WORD(&reg->mailbox0);
200ffb15 2803 for (cnt = 60; RD_REG_WORD(&reg->mailbox0) != 0 &&
d14e72fb 2804 rval == QLA_SUCCESS; cnt--) {
0107109e 2805 barrier();
d14e72fb
HM		 2806 if (cnt)
2807 udelay(5);
2808 else
2809 rval = QLA_FUNCTION_TIMEOUT;
0107109e 2810 }
d14e72fb
HM		 2811 if (rval == QLA_SUCCESS)
2812 set_bit(RISC_RDY_AFT_RESET, &ha->fw_dump_cap_flags);
2813
2814 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x015e,
2815 "Host Risc 0x%x, mailbox0 0x%x\n",
2816 RD_REG_DWORD(&reg->hccr),
2817 RD_REG_WORD(&reg->mailbox0));
0107109e
AV		 2818
2819 spin_unlock_irqrestore(&ha->hardware_lock, flags);
124f85e6 2820
d14e72fb
HM		 2821 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x015f,
2822 "Driver in %s mode\n",
2823 IS_NOPOLLING_TYPE(ha) ? "Interrupt" : "Polling");
2824
124f85e6
AV		 2825 if (IS_NOPOLLING_TYPE(ha))
2826 ha->isp_ops->enable_intrs(ha);
d14e72fb
HM		 2827
2828 return rval;
0107109e
AV		 2829}
2830
4ea2c9c7
JC		 2831static void
2832qla25xx_read_risc_sema_reg(scsi_qla_host_t *vha, uint32_t *data)
2833{
2834 struct device_reg_24xx __iomem *reg = &vha->hw->iobase->isp24;
2835
2836 WRT_REG_DWORD(&reg->iobase_addr, RISC_REGISTER_BASE_OFFSET);
2837 *data = RD_REG_DWORD(&reg->iobase_window + RISC_REGISTER_WINDOW_OFFET);
2838
2839}
2840
2841static void
2842qla25xx_write_risc_sema_reg(scsi_qla_host_t *vha, uint32_t data)
2843{
2844 struct device_reg_24xx __iomem *reg = &vha->hw->iobase->isp24;
2845
2846 WRT_REG_DWORD(&reg->iobase_addr, RISC_REGISTER_BASE_OFFSET);
2847 WRT_REG_DWORD(&reg->iobase_window + RISC_REGISTER_WINDOW_OFFET, data);
2848}
2849
2850static void
2851qla25xx_manipulate_risc_semaphore(scsi_qla_host_t *vha)
2852{
4ea2c9c7
JC		 2853 uint32_t wd32 = 0;
2854 uint delta_msec = 100;
2855 uint elapsed_msec = 0;
2856 uint timeout_msec;
2857 ulong n;
2858
cc790764
JC		 2859 if (vha->hw->pdev->subsystem_device != 0x0175 &&
2860 vha->hw->pdev->subsystem_device != 0x0240)
4ea2c9c7
JC		 2861 return;
2862
8dd7e3a5
JC		 2863 WRT_REG_DWORD(&vha->hw->iobase->isp24.hccr, HCCRX_SET_RISC_PAUSE);
2864 udelay(100);
2865
4ea2c9c7
JC		 2866attempt:
2867 timeout_msec = TIMEOUT_SEMAPHORE;
2868 n = timeout_msec / delta_msec;
2869 while (n--) {
2870 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_SET);
2871 qla25xx_read_risc_sema_reg(vha, &wd32);
2872 if (wd32 & RISC_SEMAPHORE)
2873 break;
2874 msleep(delta_msec);
2875 elapsed_msec += delta_msec;
2876 if (elapsed_msec > TIMEOUT_TOTAL_ELAPSED)
2877 goto force;
2878 }
2879
2880 if (!(wd32 & RISC_SEMAPHORE))
2881 goto force;
2882
2883 if (!(wd32 & RISC_SEMAPHORE_FORCE))
2884 goto acquired;
2885
2886 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_CLR);
2887 timeout_msec = TIMEOUT_SEMAPHORE_FORCE;
2888 n = timeout_msec / delta_msec;
2889 while (n--) {
2890 qla25xx_read_risc_sema_reg(vha, &wd32);
2891 if (!(wd32 & RISC_SEMAPHORE_FORCE))
2892 break;
2893 msleep(delta_msec);
2894 elapsed_msec += delta_msec;
2895 if (elapsed_msec > TIMEOUT_TOTAL_ELAPSED)
2896 goto force;
2897 }
2898
2899 if (wd32 & RISC_SEMAPHORE_FORCE)
2900 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_FORCE_CLR);
2901
2902 goto attempt;
2903
2904force:
2905 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_FORCE_SET);
2906
2907acquired:
2908 return;
2909}
2910
88c26663
AV		 2911/**
2912 * qla24xx_reset_chip() - Reset ISP24xx chip.
2db6228d 2913 * @vha: HA context
88c26663
AV		 2914 *
2915 * Returns 0 on success.
2916 */
2917void
e315cd28 2918qla24xx_reset_chip(scsi_qla_host_t *vha)
88c26663 2919{
e315cd28 2920 struct qla_hw_data *ha = vha->hw;
85880801
AV		 2921
2922 if (pci_channel_offline(ha->pdev) &&
2923 ha->flags.pci_channel_io_perm_failure) {
2924 return;
2925 }
2926
fd34f556 2927 ha->isp_ops->disable_intrs(ha);
88c26663 2928
4ea2c9c7
JC		 2929 qla25xx_manipulate_risc_semaphore(vha);
2930
88c26663 2931 /* Perform RISC reset. */
e315cd28 2932 qla24xx_reset_risc(vha);
88c26663
AV		 2933}
2934
1da177e4
LT		 2935/**
2936 * qla2x00_chip_diag() - Test chip for proper operation.
2db6228d 2937 * @vha: HA context
1da177e4
LT		 2938 *
2939 * Returns 0 on success.
2940 */
abbd8870 2941int
e315cd28 2942qla2x00_chip_diag(scsi_qla_host_t *vha)
1da177e4
LT		 2943{
2944 int rval;
e315cd28 2945 struct qla_hw_data *ha = vha->hw;
3d71644c 2946 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1da177e4
LT		 2947 unsigned long flags = 0;
2948 uint16_t data;
2949 uint32_t cnt;
2950 uint16_t mb[5];
73208dfd 2951 struct req_que *req = ha->req_q_map[0];
1da177e4
LT		 2952
2953 /* Assume a failed state */
2954 rval = QLA_FUNCTION_FAILED;
2955
da4704d9
BVA		 2956 ql_dbg(ql_dbg_init, vha, 0x007b, "Testing device at %p.\n",
2957 &reg->flash_address);
1da177e4
LT		 2958
2959 spin_lock_irqsave(&ha->hardware_lock, flags);
2960
2961 /* Reset ISP chip. */
2962 WRT_REG_WORD(&reg->ctrl_status, CSR_ISP_SOFT_RESET);
2963
2964 /*
2965 * We need to have a delay here since the card will not respond while
2966 * in reset causing an MCA on some architectures.
2967 */
2968 udelay(20);
2969 data = qla2x00_debounce_register(&reg->ctrl_status);
2970 for (cnt = 6000000 ; cnt && (data & CSR_ISP_SOFT_RESET); cnt--) {
2971 udelay(5);
2972 data = RD_REG_WORD(&reg->ctrl_status);
2973 barrier();
2974 }
2975
2976 if (!cnt)
2977 goto chip_diag_failed;
2978
7c3df132
SK		 2979 ql_dbg(ql_dbg_init, vha, 0x007c,
2980 "Reset register cleared by chip reset.\n");
1da177e4
LT		 2981
2982 /* Reset RISC processor. */
2983 WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
2984 WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
2985
2986 /* Workaround for QLA2312 PCI parity error */
2987 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
2988 data = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 0));
2989 for (cnt = 6000000; cnt && (data == MBS_BUSY); cnt--) {
2990 udelay(5);
2991 data = RD_MAILBOX_REG(ha, reg, 0);
fa2a1ce5 2992 barrier();
1da177e4
LT		 2993 }
2994 } else
2995 udelay(10);
2996
2997 if (!cnt)
2998 goto chip_diag_failed;
2999
3000 /* Check product ID of chip */
5a68a1c2 3001 ql_dbg(ql_dbg_init, vha, 0x007d, "Checking product ID of chip.\n");
1da177e4
LT		 3002
3003 mb[1] = RD_MAILBOX_REG(ha, reg, 1);
3004 mb[2] = RD_MAILBOX_REG(ha, reg, 2);
3005 mb[3] = RD_MAILBOX_REG(ha, reg, 3);
3006 mb[4] = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 4));
3007 if (mb[1] != PROD_ID_1 || (mb[2] != PROD_ID_2 && mb[2] != PROD_ID_2a) ||
3008 mb[3] != PROD_ID_3) {
7c3df132
SK		 3009 ql_log(ql_log_warn, vha, 0x0062,
3010 "Wrong product ID = 0x%x,0x%x,0x%x.\n",
3011 mb[1], mb[2], mb[3]);
1da177e4
LT		 3012
3013 goto chip_diag_failed;
3014 }
3015 ha->product_id[0] = mb[1];
3016 ha->product_id[1] = mb[2];
3017 ha->product_id[2] = mb[3];
3018 ha->product_id[3] = mb[4];
3019
3020 /* Adjust fw RISC transfer size */
73208dfd 3021 if (req->length > 1024)
1da177e4
LT		 3022 ha->fw_transfer_size = REQUEST_ENTRY_SIZE * 1024;
3023 else
3024 ha->fw_transfer_size = REQUEST_ENTRY_SIZE *
73208dfd 3025 req->length;
1da177e4
LT		 3026
3027 if (IS_QLA2200(ha) &&
3028 RD_MAILBOX_REG(ha, reg, 7) == QLA2200A_RISC_ROM_VER) {
3029 /* Limit firmware transfer size with a 2200A */
7c3df132 3030 ql_dbg(ql_dbg_init, vha, 0x007e, "Found QLA2200A Chip.\n");
1da177e4 3031
ea5b6382 3032 ha->device_type |= DT_ISP2200A;
1da177e4
LT		 3033 ha->fw_transfer_size = 128;
3034 }
3035
3036 /* Wrap Incoming Mailboxes Test. */
3037 spin_unlock_irqrestore(&ha->hardware_lock, flags);
3038
7c3df132 3039 ql_dbg(ql_dbg_init, vha, 0x007f, "Checking mailboxes.\n");
e315cd28 3040 rval = qla2x00_mbx_reg_test(vha);
7c3df132
SK		 3041 if (rval)
3042 ql_log(ql_log_warn, vha, 0x0080,
3043 "Failed mailbox send register test.\n");
3044 else
1da177e4
LT		 3045 /* Flag a successful rval */
3046 rval = QLA_SUCCESS;
1da177e4
LT		 3047 spin_lock_irqsave(&ha->hardware_lock, flags);
3048
3049chip_diag_failed:
3050 if (rval)
7c3df132
SK		 3051 ql_log(ql_log_info, vha, 0x0081,
3052 "Chip diagnostics **** FAILED ****.\n");
1da177e4
LT		 3053
3054 spin_unlock_irqrestore(&ha->hardware_lock, flags);
3055
3056 return (rval);
3057}
3058
0107109e
AV		 3059/**
3060 * qla24xx_chip_diag() - Test ISP24xx for proper operation.
2db6228d 3061 * @vha: HA context
0107109e
AV		 3062 *
3063 * Returns 0 on success.
3064 */
3065int
e315cd28 3066qla24xx_chip_diag(scsi_qla_host_t *vha)
0107109e
AV		 3067{
3068 int rval;
e315cd28 3069 struct qla_hw_data *ha = vha->hw;
73208dfd 3070 struct req_que *req = ha->req_q_map[0];
0107109e 3071
7ec0effd 3072 if (IS_P3P_TYPE(ha))
a9083016
GM		 3073 return QLA_SUCCESS;
3074
73208dfd 3075 ha->fw_transfer_size = REQUEST_ENTRY_SIZE * req->length;
0107109e 3076
e315cd28 3077 rval = qla2x00_mbx_reg_test(vha);
0107109e 3078 if (rval) {
7c3df132
SK		 3079 ql_log(ql_log_warn, vha, 0x0082,
3080 "Failed mailbox send register test.\n");
0107109e
AV		 3081 } else {
3082 /* Flag a successful rval */
3083 rval = QLA_SUCCESS;
3084 }
3085
3086 return rval;
3087}
3088
ad0a0b01
QT		 3089static void
3090qla2x00_alloc_offload_mem(scsi_qla_host_t *vha)
0107109e 3091{
a7a167bf 3092 int rval;
df613b96
AV		 3093 dma_addr_t tc_dma;
3094 void *tc;
e315cd28 3095 struct qla_hw_data *ha = vha->hw;
a7a167bf 3096
ad0a0b01 3097 if (ha->eft) {
7c3df132 3098 ql_dbg(ql_dbg_init, vha, 0x00bd,
ad0a0b01
QT		 3099 "%s: Offload Mem is already allocated.\n",
3100 __func__);
a7a167bf
AV		 3101 return;
3102 }
d4e3e04d 3103
ad0a0b01 3104 if (IS_FWI2_CAPABLE(ha)) {
df613b96 3105 /* Allocate memory for Fibre Channel Event Buffer. */
f73cb695
CD		 3106 if (!IS_QLA25XX(ha) && !IS_QLA81XX(ha) && !IS_QLA83XX(ha) &&
3107 !IS_QLA27XX(ha))
436a7b11 3108 goto try_eft;
df613b96 3109
f73cb695
CD		 3110 if (ha->fce)
3111 dma_free_coherent(&ha->pdev->dev,
3112 FCE_SIZE, ha->fce, ha->fce_dma);
3113
3114 /* Allocate memory for Fibre Channel Event Buffer. */
0ea85b50
JP		 3115 tc = dma_zalloc_coherent(&ha->pdev->dev, FCE_SIZE, &tc_dma,
3116 GFP_KERNEL);
df613b96 3117 if (!tc) {
7c3df132
SK		 3118 ql_log(ql_log_warn, vha, 0x00be,
3119 "Unable to allocate (%d KB) for FCE.\n",
3120 FCE_SIZE / 1024);
17d98630 3121 goto try_eft;
df613b96
AV		 3122 }
3123
e315cd28 3124 rval = qla2x00_enable_fce_trace(vha, tc_dma, FCE_NUM_BUFFERS,
df613b96
AV		 3125 ha->fce_mb, &ha->fce_bufs);
3126 if (rval) {
7c3df132
SK		 3127 ql_log(ql_log_warn, vha, 0x00bf,
3128 "Unable to initialize FCE (%d).\n", rval);
df613b96
AV		 3129 dma_free_coherent(&ha->pdev->dev, FCE_SIZE, tc,
3130 tc_dma);
3131 ha->flags.fce_enabled = 0;
17d98630 3132 goto try_eft;
df613b96 3133 }
cfb0919c 3134 ql_dbg(ql_dbg_init, vha, 0x00c0,
7c3df132 3135 "Allocate (%d KB) for FCE...\n", FCE_SIZE / 1024);
df613b96 3136
df613b96
AV		 3137 ha->flags.fce_enabled = 1;
3138 ha->fce_dma = tc_dma;
3139 ha->fce = tc;
f73cb695 3140
436a7b11 3141try_eft:
f73cb695
CD		 3142 if (ha->eft)
3143 dma_free_coherent(&ha->pdev->dev,
3144 EFT_SIZE, ha->eft, ha->eft_dma);
3145
436a7b11 3146 /* Allocate memory for Extended Trace Buffer. */
0ea85b50
JP		 3147 tc = dma_zalloc_coherent(&ha->pdev->dev, EFT_SIZE, &tc_dma,
3148 GFP_KERNEL);
436a7b11 3149 if (!tc) {
7c3df132
SK		 3150 ql_log(ql_log_warn, vha, 0x00c1,
3151 "Unable to allocate (%d KB) for EFT.\n",
3152 EFT_SIZE / 1024);
ad0a0b01 3153 goto eft_err;
436a7b11
AV		 3154 }
3155
e315cd28 3156 rval = qla2x00_enable_eft_trace(vha, tc_dma, EFT_NUM_BUFFERS);
436a7b11 3157 if (rval) {
7c3df132
SK		 3158 ql_log(ql_log_warn, vha, 0x00c2,
3159 "Unable to initialize EFT (%d).\n", rval);
436a7b11
AV		 3160 dma_free_coherent(&ha->pdev->dev, EFT_SIZE, tc,
3161 tc_dma);
ad0a0b01 3162 goto eft_err;
436a7b11 3163 }
cfb0919c 3164 ql_dbg(ql_dbg_init, vha, 0x00c3,
7c3df132 3165 "Allocated (%d KB) EFT ...\n", EFT_SIZE / 1024);
436a7b11 3166
436a7b11
AV		 3167 ha->eft_dma = tc_dma;
3168 ha->eft = tc;
d4e3e04d 3169 }
f73cb695 3170
ad0a0b01
QT		 3171eft_err:
3172 return;
3173}
3174
3175void
3176qla2x00_alloc_fw_dump(scsi_qla_host_t *vha)
3177{
3178 uint32_t dump_size, fixed_size, mem_size, req_q_size, rsp_q_size,
3179 eft_size, fce_size, mq_size;
3180 struct qla_hw_data *ha = vha->hw;
3181 struct req_que *req = ha->req_q_map[0];
3182 struct rsp_que *rsp = ha->rsp_q_map[0];
3183 struct qla2xxx_fw_dump *fw_dump;
3184
3185 dump_size = fixed_size = mem_size = eft_size = fce_size = mq_size = 0;
3186 req_q_size = rsp_q_size = 0;
3187
3188 if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
3189 fixed_size = sizeof(struct qla2100_fw_dump);
3190 } else if (IS_QLA23XX(ha)) {
3191 fixed_size = offsetof(struct qla2300_fw_dump, data_ram);
3192 mem_size = (ha->fw_memory_size - 0x11000 + 1) *
3193 sizeof(uint16_t);
3194 } else if (IS_FWI2_CAPABLE(ha)) {
3195 if (IS_QLA83XX(ha) || IS_QLA27XX(ha))
3196 fixed_size = offsetof(struct qla83xx_fw_dump, ext_mem);
3197 else if (IS_QLA81XX(ha))
3198 fixed_size = offsetof(struct qla81xx_fw_dump, ext_mem);
3199 else if (IS_QLA25XX(ha))
3200 fixed_size = offsetof(struct qla25xx_fw_dump, ext_mem);
3201 else
3202 fixed_size = offsetof(struct qla24xx_fw_dump, ext_mem);
3203
3204 mem_size = (ha->fw_memory_size - 0x100000 + 1) *
3205 sizeof(uint32_t);
3206 if (ha->mqenable) {
3207 if (!IS_QLA83XX(ha) && !IS_QLA27XX(ha))
3208 mq_size = sizeof(struct qla2xxx_mq_chain);
3209 /*
3210 * Allocate maximum buffer size for all queues.
3211 * Resizing must be done at end-of-dump processing.
3212 */
3213 mq_size += ha->max_req_queues *
3214 (req->length * sizeof(request_t));
3215 mq_size += ha->max_rsp_queues *
3216 (rsp->length * sizeof(response_t));
3217 }
3218 if (ha->tgt.atio_ring)
3219 mq_size += ha->tgt.atio_q_length * sizeof(request_t);
3220 /* Allocate memory for Fibre Channel Event Buffer. */
3221 if (!IS_QLA25XX(ha) && !IS_QLA81XX(ha) && !IS_QLA83XX(ha) &&
3222 !IS_QLA27XX(ha))
3223 goto try_eft;
3224
3225 fce_size = sizeof(struct qla2xxx_fce_chain) + FCE_SIZE;
3226try_eft:
3227 ql_dbg(ql_dbg_init, vha, 0x00c3,
3228 "Allocated (%d KB) EFT ...\n", EFT_SIZE / 1024);
3229 eft_size = EFT_SIZE;
3230 }
3231
f73cb695
CD		 3232 if (IS_QLA27XX(ha)) {
3233 if (!ha->fw_dump_template) {
3234 ql_log(ql_log_warn, vha, 0x00ba,
3235 "Failed missing fwdump template\n");
3236 return;
3237 }
3238 dump_size = qla27xx_fwdt_calculate_dump_size(vha);
3239 ql_dbg(ql_dbg_init, vha, 0x00fa,
3240 "-> allocating fwdump (%x bytes)...\n", dump_size);
3241 goto allocate;
3242 }
3243
73208dfd
AC		 3244 req_q_size = req->length * sizeof(request_t);
3245 rsp_q_size = rsp->length * sizeof(response_t);
a7a167bf 3246 dump_size = offsetof(struct qla2xxx_fw_dump, isp);
2afa19a9 3247 dump_size += fixed_size + mem_size + req_q_size + rsp_q_size + eft_size;
bb99de67
AV		 3248 ha->chain_offset = dump_size;
3249 dump_size += mq_size + fce_size;
d4e3e04d 3250
b945e777
QT		 3251 if (ha->exchoffld_buf)
3252 dump_size += sizeof(struct qla2xxx_offld_chain) +
3253 ha->exchoffld_size;
3254 if (ha->exlogin_buf)
3255 dump_size += sizeof(struct qla2xxx_offld_chain) +
3256 ha->exlogin_size;
3257
f73cb695 3258allocate:
ad0a0b01
QT		 3259 if (!ha->fw_dump_len || dump_size != ha->fw_dump_len) {
3260 fw_dump = vmalloc(dump_size);
3261 if (!fw_dump) {
3262 ql_log(ql_log_warn, vha, 0x00c4,
3263 "Unable to allocate (%d KB) for firmware dump.\n",
3264 dump_size / 1024);
3265 } else {
3266 if (ha->fw_dump)
3267 vfree(ha->fw_dump);
3268 ha->fw_dump = fw_dump;
3269
3270 ha->fw_dump_len = dump_size;
3271 ql_dbg(ql_dbg_init, vha, 0x00c5,
3272 "Allocated (%d KB) for firmware dump.\n",
3273 dump_size / 1024);
3274
3275 if (IS_QLA27XX(ha))
3276 return;
3277
3278 ha->fw_dump->signature[0] = 'Q';
3279 ha->fw_dump->signature[1] = 'L';
3280 ha->fw_dump->signature[2] = 'G';
3281 ha->fw_dump->signature[3] = 'C';
3282 ha->fw_dump->version = htonl(1);
3283
3284 ha->fw_dump->fixed_size = htonl(fixed_size);
3285 ha->fw_dump->mem_size = htonl(mem_size);
3286 ha->fw_dump->req_q_size = htonl(req_q_size);
3287 ha->fw_dump->rsp_q_size = htonl(rsp_q_size);
3288
3289 ha->fw_dump->eft_size = htonl(eft_size);
3290 ha->fw_dump->eft_addr_l = htonl(LSD(ha->eft_dma));
3291 ha->fw_dump->eft_addr_h = htonl(MSD(ha->eft_dma));
3292
3293 ha->fw_dump->header_size =
3294 htonl(offsetof(struct qla2xxx_fw_dump, isp));
a7a167bf 3295 }
a7a167bf 3296 }
0107109e
AV		 3297}
3298
18e7555a
AV		 3299static int
3300qla81xx_mpi_sync(scsi_qla_host_t *vha)
3301{
3302#define MPS_MASK 0xe0
3303 int rval;
3304 uint16_t dc;
3305 uint32_t dw;
18e7555a
AV		 3306
3307 if (!IS_QLA81XX(vha->hw))
3308 return QLA_SUCCESS;
3309
3310 rval = qla2x00_write_ram_word(vha, 0x7c00, 1);
3311 if (rval != QLA_SUCCESS) {
7c3df132
SK		 3312 ql_log(ql_log_warn, vha, 0x0105,
3313 "Unable to acquire semaphore.\n");
18e7555a
AV		 3314 goto done;
3315 }
3316
3317 pci_read_config_word(vha->hw->pdev, 0x54, &dc);
3318 rval = qla2x00_read_ram_word(vha, 0x7a15, &dw);
3319 if (rval != QLA_SUCCESS) {
7c3df132 3320 ql_log(ql_log_warn, vha, 0x0067, "Unable to read sync.\n");
18e7555a
AV		 3321 goto done_release;
3322 }
3323
3324 dc &= MPS_MASK;
3325 if (dc == (dw & MPS_MASK))
3326 goto done_release;
3327
3328 dw &= ~MPS_MASK;
3329 dw |= dc;
3330 rval = qla2x00_write_ram_word(vha, 0x7a15, dw);
3331 if (rval != QLA_SUCCESS) {
7c3df132 3332 ql_log(ql_log_warn, vha, 0x0114, "Unable to gain sync.\n");
18e7555a
AV		 3333 }
3334
3335done_release:
3336 rval = qla2x00_write_ram_word(vha, 0x7c00, 0);
3337 if (rval != QLA_SUCCESS) {
7c3df132
SK		 3338 ql_log(ql_log_warn, vha, 0x006d,
3339 "Unable to release semaphore.\n");
18e7555a
AV		 3340 }
3341
3342done:
3343 return rval;
3344}
3345
8d93f550
CD		 3346int
3347qla2x00_alloc_outstanding_cmds(struct qla_hw_data *ha, struct req_que *req)
3348{
3349 /* Don't try to reallocate the array */
3350 if (req->outstanding_cmds)
3351 return QLA_SUCCESS;
3352
d7459527 3353 if (!IS_FWI2_CAPABLE(ha))
8d93f550
CD		 3354 req->num_outstanding_cmds = DEFAULT_OUTSTANDING_COMMANDS;
3355 else {
03e8c680
QT		 3356 if (ha->cur_fw_xcb_count <= ha->cur_fw_iocb_count)
3357 req->num_outstanding_cmds = ha->cur_fw_xcb_count;
8d93f550 3358 else
03e8c680 3359 req->num_outstanding_cmds = ha->cur_fw_iocb_count;
8d93f550
CD		 3360 }
3361
6396bb22
KC		 3362 req->outstanding_cmds = kcalloc(req->num_outstanding_cmds,
3363 sizeof(srb_t *),
3364 GFP_KERNEL);
8d93f550
CD		 3365
3366 if (!req->outstanding_cmds) {
3367 /*
3368 * Try to allocate a minimal size just so we can get through
3369 * initialization.
3370 */
3371 req->num_outstanding_cmds = MIN_OUTSTANDING_COMMANDS;
6396bb22
KC		 3372 req->outstanding_cmds = kcalloc(req->num_outstanding_cmds,
3373 sizeof(srb_t *),
3374 GFP_KERNEL);
8d93f550
CD		 3375
3376 if (!req->outstanding_cmds) {
3377 ql_log(ql_log_fatal, NULL, 0x0126,
3378 "Failed to allocate memory for "
3379 "outstanding_cmds for req_que %p.\n", req);
3380 req->num_outstanding_cmds = 0;
3381 return QLA_FUNCTION_FAILED;
3382 }
3383 }
3384
3385 return QLA_SUCCESS;
3386}
3387
e4e3a2ce
QT		 3388#define PRINT_FIELD(_field, _flag, _str) { \
3389 if (a0->_field & _flag) {\
3390 if (p) {\
3391 strcat(ptr, "|");\
3392 ptr++;\
3393 leftover--;\
3394 } \
3395 len = snprintf(ptr, leftover, "%s", _str); \
3396 p = 1;\
3397 leftover -= len;\
3398 ptr += len; \
3399 } \
3400}
3401
3402static void qla2xxx_print_sfp_info(struct scsi_qla_host *vha)
3403{
3404#define STR_LEN 64
3405 struct sff_8247_a0 *a0 = (struct sff_8247_a0 *)vha->hw->sfp_data;
3406 u8 str[STR_LEN], *ptr, p;
3407 int leftover, len;
3408
3409 memset(str, 0, STR_LEN);
3410 snprintf(str, SFF_VEN_NAME_LEN+1, a0->vendor_name);
3411 ql_dbg(ql_dbg_init, vha, 0x015a,
3412 "SFP MFG Name: %s\n", str);
3413
3414 memset(str, 0, STR_LEN);
3415 snprintf(str, SFF_PART_NAME_LEN+1, a0->vendor_pn);
3416 ql_dbg(ql_dbg_init, vha, 0x015c,
3417 "SFP Part Name: %s\n", str);
3418
3419 /* media */
3420 memset(str, 0, STR_LEN);
3421 ptr = str;
3422 leftover = STR_LEN;
3423 p = len = 0;
3424 PRINT_FIELD(fc_med_cc9, FC_MED_TW, "Twin AX");
3425 PRINT_FIELD(fc_med_cc9, FC_MED_TP, "Twisted Pair");
3426 PRINT_FIELD(fc_med_cc9, FC_MED_MI, "Min Coax");
3427 PRINT_FIELD(fc_med_cc9, FC_MED_TV, "Video Coax");
3428 PRINT_FIELD(fc_med_cc9, FC_MED_M6, "MultiMode 62.5um");
3429 PRINT_FIELD(fc_med_cc9, FC_MED_M5, "MultiMode 50um");
3430 PRINT_FIELD(fc_med_cc9, FC_MED_SM, "SingleMode");
3431 ql_dbg(ql_dbg_init, vha, 0x0160,
3432 "SFP Media: %s\n", str);
3433
3434 /* link length */
3435 memset(str, 0, STR_LEN);
3436 ptr = str;
3437 leftover = STR_LEN;
3438 p = len = 0;
3439 PRINT_FIELD(fc_ll_cc7, FC_LL_VL, "Very Long");
3440 PRINT_FIELD(fc_ll_cc7, FC_LL_S, "Short");
3441 PRINT_FIELD(fc_ll_cc7, FC_LL_I, "Intermediate");
3442 PRINT_FIELD(fc_ll_cc7, FC_LL_L, "Long");
3443 PRINT_FIELD(fc_ll_cc7, FC_LL_M, "Medium");
3444 ql_dbg(ql_dbg_init, vha, 0x0196,
3445 "SFP Link Length: %s\n", str);
3446
3447 memset(str, 0, STR_LEN);
3448 ptr = str;
3449 leftover = STR_LEN;
3450 p = len = 0;
3451 PRINT_FIELD(fc_ll_cc7, FC_LL_SA, "Short Wave (SA)");
3452 PRINT_FIELD(fc_ll_cc7, FC_LL_LC, "Long Wave(LC)");
3453 PRINT_FIELD(fc_tec_cc8, FC_TEC_SN, "Short Wave (SN)");
3454 PRINT_FIELD(fc_tec_cc8, FC_TEC_SL, "Short Wave (SL)");
3455 PRINT_FIELD(fc_tec_cc8, FC_TEC_LL, "Long Wave (LL)");
3456 ql_dbg(ql_dbg_init, vha, 0x016e,
3457 "SFP FC Link Tech: %s\n", str);
3458
3459 if (a0->length_km)
3460 ql_dbg(ql_dbg_init, vha, 0x016f,
3461 "SFP Distant: %d km\n", a0->length_km);
3462 if (a0->length_100m)
3463 ql_dbg(ql_dbg_init, vha, 0x0170,
3464 "SFP Distant: %d m\n", a0->length_100m*100);
3465 if (a0->length_50um_10m)
3466 ql_dbg(ql_dbg_init, vha, 0x0189,
3467 "SFP Distant (WL=50um): %d m\n", a0->length_50um_10m * 10);
3468 if (a0->length_62um_10m)
3469 ql_dbg(ql_dbg_init, vha, 0x018a,
3470 "SFP Distant (WL=62.5um): %d m\n", a0->length_62um_10m * 10);
3471 if (a0->length_om4_10m)
3472 ql_dbg(ql_dbg_init, vha, 0x0194,
3473 "SFP Distant (OM4): %d m\n", a0->length_om4_10m * 10);
3474 if (a0->length_om3_10m)
3475 ql_dbg(ql_dbg_init, vha, 0x0195,
3476 "SFP Distant (OM3): %d m\n", a0->length_om3_10m * 10);
3477}
3478
3479
3480/*
3481 * Return Code:
3482 * QLA_SUCCESS: no action
3483 * QLA_INTERFACE_ERROR: SFP is not there.
3484 * QLA_FUNCTION_FAILED: detected New SFP
3485 */
3486int
3487qla24xx_detect_sfp(scsi_qla_host_t *vha)
3488{
3489 int rc = QLA_SUCCESS;
3490 struct sff_8247_a0 *a;
3491 struct qla_hw_data *ha = vha->hw;
3492
3493 if (!AUTO_DETECT_SFP_SUPPORT(vha))
3494 goto out;
3495
3496 rc = qla2x00_read_sfp_dev(vha, NULL, 0);
3497 if (rc)
3498 goto out;
3499
3500 a = (struct sff_8247_a0 *)vha->hw->sfp_data;
3501 qla2xxx_print_sfp_info(vha);
3502
3503 if (a->fc_ll_cc7 & FC_LL_VL || a->fc_ll_cc7 & FC_LL_L) {
3504 /* long range */
3505 ha->flags.detected_lr_sfp = 1;
3506
3507 if (a->length_km > 5 || a->length_100m > 50)
3508 ha->long_range_distance = LR_DISTANCE_10K;
3509 else
3510 ha->long_range_distance = LR_DISTANCE_5K;
3511
3512 if (ha->flags.detected_lr_sfp != ha->flags.using_lr_setting)
3513 ql_dbg(ql_dbg_async, vha, 0x507b,
3514 "Detected Long Range SFP.\n");
3515 } else {
3516 /* short range */
3517 ha->flags.detected_lr_sfp = 0;
3518 if (ha->flags.using_lr_setting)
3519 ql_dbg(ql_dbg_async, vha, 0x5084,
3520 "Detected Short Range SFP.\n");
3521 }
3522
3523 if (!vha->flags.init_done)
3524 rc = QLA_SUCCESS;
3525out:
3526 return rc;
3527}
3528
1da177e4
LT		 3529/**
3530 * qla2x00_setup_chip() - Load and start RISC firmware.
2db6228d 3531 * @vha: HA context
1da177e4
LT		 3532 *
3533 * Returns 0 on success.
3534 */
3535static int
e315cd28 3536qla2x00_setup_chip(scsi_qla_host_t *vha)
1da177e4 3537{
0107109e
AV		 3538 int rval;
3539 uint32_t srisc_address = 0;
e315cd28 3540 struct qla_hw_data *ha = vha->hw;
3db0652e
AV		 3541 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
3542 unsigned long flags;
dda772e8 3543 uint16_t fw_major_version;
3db0652e 3544
7ec0effd 3545 if (IS_P3P_TYPE(ha)) {
a9083016 3546 rval = ha->isp_ops->load_risc(vha, &srisc_address);
14e303d9
AV		 3547 if (rval == QLA_SUCCESS) {
3548 qla2x00_stop_firmware(vha);
a9083016 3549 goto enable_82xx_npiv;
14e303d9 3550 } else
b963752f 3551 goto failed;
a9083016
GM		 3552 }
3553
3db0652e
AV		 3554 if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) {
3555 /* Disable SRAM, Instruction RAM and GP RAM parity. */
3556 spin_lock_irqsave(&ha->hardware_lock, flags);
3557 WRT_REG_WORD(&reg->hccr, (HCCR_ENABLE_PARITY + 0x0));
3558 RD_REG_WORD(&reg->hccr);
3559 spin_unlock_irqrestore(&ha->hardware_lock, flags);
3560 }
1da177e4 3561
18e7555a
AV		 3562 qla81xx_mpi_sync(vha);
3563
1da177e4 3564 /* Load firmware sequences */
e315cd28 3565 rval = ha->isp_ops->load_risc(vha, &srisc_address);
0107109e 3566 if (rval == QLA_SUCCESS) {
7c3df132
SK		 3567 ql_dbg(ql_dbg_init, vha, 0x00c9,
3568 "Verifying Checksum of loaded RISC code.\n");
1da177e4 3569
e315cd28 3570 rval = qla2x00_verify_checksum(vha, srisc_address);
1da177e4
LT		 3571 if (rval == QLA_SUCCESS) {
3572 /* Start firmware execution. */
7c3df132
SK		 3573 ql_dbg(ql_dbg_init, vha, 0x00ca,
3574 "Starting firmware.\n");
1da177e4 3575
b0d6cabd
HM		 3576 if (ql2xexlogins)
3577 ha->flags.exlogins_enabled = 1;
3578
99e1b683 3579 if (qla_is_exch_offld_enabled(vha))
2f56a7f1
HM		 3580 ha->flags.exchoffld_enabled = 1;
3581
e315cd28 3582 rval = qla2x00_execute_fw(vha, srisc_address);
1da177e4 3583 /* Retrieve firmware information. */
dda772e8 3584 if (rval == QLA_SUCCESS) {
e4e3a2ce
QT		 3585 qla24xx_detect_sfp(vha);
3586
8b4673ba
QT		 3587 if ((IS_QLA83XX(ha) || IS_QLA27XX(ha)) &&
3588 (ha->zio_mode == QLA_ZIO_MODE_6))
3589 qla27xx_set_zio_threshold(vha,
3590 ha->last_zio_threshold);
3591
b0d6cabd
HM		 3592 rval = qla2x00_set_exlogins_buffer(vha);
3593 if (rval != QLA_SUCCESS)
3594 goto failed;
3595
2f56a7f1
HM		 3596 rval = qla2x00_set_exchoffld_buffer(vha);
3597 if (rval != QLA_SUCCESS)
3598 goto failed;
3599
a9083016 3600enable_82xx_npiv:
dda772e8 3601 fw_major_version = ha->fw_major_version;
7ec0effd 3602 if (IS_P3P_TYPE(ha))
3173167f 3603 qla82xx_check_md_needed(vha);
6246b8a1
GM		 3604 else
3605 rval = qla2x00_get_fw_version(vha);
ca9e9c3e
AV		 3606 if (rval != QLA_SUCCESS)
3607 goto failed;
2c3dfe3f 3608 ha->flags.npiv_supported = 0;
e315cd28 3609 if (IS_QLA2XXX_MIDTYPE(ha) &&
946fb891 3610 (ha->fw_attributes & BIT_2)) {
2c3dfe3f 3611 ha->flags.npiv_supported = 1;
4d0ea247
SJ		 3612 if ((!ha->max_npiv_vports) ||
3613 ((ha->max_npiv_vports + 1) %
eb66dc60 3614 MIN_MULTI_ID_FABRIC))
4d0ea247 3615 ha->max_npiv_vports =
eb66dc60 3616 MIN_MULTI_ID_FABRIC - 1;
4d0ea247 3617 }
03e8c680 3618 qla2x00_get_resource_cnts(vha);
d743de66 3619
8d93f550
CD		 3620 /*
3621 * Allocate the array of outstanding commands
3622 * now that we know the firmware resources.
3623 */
3624 rval = qla2x00_alloc_outstanding_cmds(ha,
3625 vha->req);
3626 if (rval != QLA_SUCCESS)
3627 goto failed;
3628
ad0a0b01
QT		 3629 if (!fw_major_version && !(IS_P3P_TYPE(ha)))
3630 qla2x00_alloc_offload_mem(vha);
3631
3632 if (ql2xallocfwdump && !(IS_P3P_TYPE(ha)))
08de2844 3633 qla2x00_alloc_fw_dump(vha);
ad0a0b01 3634
3b6e5b9d
CD		 3635 } else {
3636 goto failed;
1da177e4
LT		 3637 }
3638 } else {
7c3df132
SK		 3639 ql_log(ql_log_fatal, vha, 0x00cd,
3640 "ISP Firmware failed checksum.\n");
3641 goto failed;
1da177e4 3642 }
c74d88a4
AV		 3643 } else
3644 goto failed;
1da177e4 3645
3db0652e
AV		 3646 if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) {
3647 /* Enable proper parity. */
3648 spin_lock_irqsave(&ha->hardware_lock, flags);
3649 if (IS_QLA2300(ha))
3650 /* SRAM parity */
3651 WRT_REG_WORD(&reg->hccr, HCCR_ENABLE_PARITY + 0x1);
3652 else
3653 /* SRAM, Instruction RAM and GP RAM parity */
3654 WRT_REG_WORD(&reg->hccr, HCCR_ENABLE_PARITY + 0x7);
3655 RD_REG_WORD(&reg->hccr);
3656 spin_unlock_irqrestore(&ha->hardware_lock, flags);
3657 }
3658
f3982d89
CD		 3659 if (IS_QLA27XX(ha))
3660 ha->flags.fac_supported = 1;
3661 else if (rval == QLA_SUCCESS && IS_FAC_REQUIRED(ha)) {
1d2874de
JC		 3662 uint32_t size;
3663
3664 rval = qla81xx_fac_get_sector_size(vha, &size);
3665 if (rval == QLA_SUCCESS) {
3666 ha->flags.fac_supported = 1;
3667 ha->fdt_block_size = size << 2;
3668 } else {
7c3df132 3669 ql_log(ql_log_warn, vha, 0x00ce,
1d2874de
JC		 3670 "Unsupported FAC firmware (%d.%02d.%02d).\n",
3671 ha->fw_major_version, ha->fw_minor_version,
3672 ha->fw_subminor_version);
1ca60e3b 3673
f73cb695 3674 if (IS_QLA83XX(ha) || IS_QLA27XX(ha)) {
6246b8a1
GM		 3675 ha->flags.fac_supported = 0;
3676 rval = QLA_SUCCESS;
3677 }
1d2874de
JC		 3678 }
3679 }
ca9e9c3e 3680failed:
1da177e4 3681 if (rval) {
7c3df132
SK		 3682 ql_log(ql_log_fatal, vha, 0x00cf,
3683 "Setup chip ****FAILED****.\n");
1da177e4
LT		 3684 }
3685
3686 return (rval);
3687}
3688
3689/**
3690 * qla2x00_init_response_q_entries() - Initializes response queue entries.
2db6228d 3691 * @rsp: response queue
1da177e4
LT		 3692 *
3693 * Beginning of request ring has initialization control block already built
3694 * by nvram config routine.
3695 *
3696 * Returns 0 on success.
3697 */
73208dfd
AC		 3698void
3699qla2x00_init_response_q_entries(struct rsp_que *rsp)
1da177e4
LT		 3700{
3701 uint16_t cnt;
3702 response_t *pkt;
3703
2afa19a9
AC		 3704 rsp->ring_ptr = rsp->ring;
3705 rsp->ring_index = 0;
3706 rsp->status_srb = NULL;
e315cd28
AC		 3707 pkt = rsp->ring_ptr;
3708 for (cnt = 0; cnt < rsp->length; cnt++) {
1da177e4
LT		 3709 pkt->signature = RESPONSE_PROCESSED;
3710 pkt++;
3711 }
1da177e4
LT		 3712}
3713
3714/**
3715 * qla2x00_update_fw_options() - Read and process firmware options.
2db6228d 3716 * @vha: HA context
1da177e4
LT		 3717 *
3718 * Returns 0 on success.
3719 */
abbd8870 3720void
e315cd28 3721qla2x00_update_fw_options(scsi_qla_host_t *vha)
1da177e4
LT		 3722{
3723 uint16_t swing, emphasis, tx_sens, rx_sens;
e315cd28 3724 struct qla_hw_data *ha = vha->hw;
1da177e4
LT		 3725
3726 memset(ha->fw_options, 0, sizeof(ha->fw_options));
e315cd28 3727 qla2x00_get_fw_options(vha, ha->fw_options);
1da177e4
LT		 3728
3729 if (IS_QLA2100(ha) || IS_QLA2200(ha))
3730 return;
3731
3732 /* Serial Link options. */
7c3df132
SK		 3733 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x0115,
3734 "Serial link options.\n");
3735 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0109,
3736 (uint8_t *)&ha->fw_seriallink_options,
3737 sizeof(ha->fw_seriallink_options));
1da177e4
LT		 3738
3739 ha->fw_options[1] &= ~FO1_SET_EMPHASIS_SWING;
3740 if (ha->fw_seriallink_options[3] & BIT_2) {
3741 ha->fw_options[1] |= FO1_SET_EMPHASIS_SWING;
3742
3743 /* 1G settings */
3744 swing = ha->fw_seriallink_options[2] & (BIT_2 | BIT_1 | BIT_0);
3745 emphasis = (ha->fw_seriallink_options[2] &
3746 (BIT_4 | BIT_3)) >> 3;
3747 tx_sens = ha->fw_seriallink_options[0] &
fa2a1ce5 3748 (BIT_3 | BIT_2 | BIT_1 | BIT_0);
1da177e4
LT		 3749 rx_sens = (ha->fw_seriallink_options[0] &
3750 (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4;
3751 ha->fw_options[10] = (emphasis << 14) | (swing << 8);
3752 if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
3753 if (rx_sens == 0x0)
3754 rx_sens = 0x3;
3755 ha->fw_options[10] |= (tx_sens << 4) | rx_sens;
3756 } else if (IS_QLA2322(ha) || IS_QLA6322(ha))
3757 ha->fw_options[10] |= BIT_5 |
3758 ((rx_sens & (BIT_1 | BIT_0)) << 2) |
3759 (tx_sens & (BIT_1 | BIT_0));
3760
3761 /* 2G settings */
3762 swing = (ha->fw_seriallink_options[2] &
3763 (BIT_7 | BIT_6 | BIT_5)) >> 5;
3764 emphasis = ha->fw_seriallink_options[3] & (BIT_1 | BIT_0);
3765 tx_sens = ha->fw_seriallink_options[1] &
fa2a1ce5 3766 (BIT_3 | BIT_2 | BIT_1 | BIT_0);
1da177e4
LT		 3767 rx_sens = (ha->fw_seriallink_options[1] &
3768 (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4;
3769 ha->fw_options[11] = (emphasis << 14) | (swing << 8);
3770 if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
3771 if (rx_sens == 0x0)
3772 rx_sens = 0x3;
3773 ha->fw_options[11] |= (tx_sens << 4) | rx_sens;
3774 } else if (IS_QLA2322(ha) || IS_QLA6322(ha))
3775 ha->fw_options[11] |= BIT_5 |
3776 ((rx_sens & (BIT_1 | BIT_0)) << 2) |
3777 (tx_sens & (BIT_1 | BIT_0));
3778 }
3779
3780 /* FCP2 options. */
3781 /* Return command IOCBs without waiting for an ABTS to complete. */
3782 ha->fw_options[3] |= BIT_13;
3783
3784 /* LED scheme. */
3785 if (ha->flags.enable_led_scheme)
3786 ha->fw_options[2] |= BIT_12;
3787
48c02fde 3788 /* Detect ISP6312. */
3789 if (IS_QLA6312(ha))
3790 ha->fw_options[2] |= BIT_13;
3791
088d09d4
GM		 3792 /* Set Retry FLOGI in case of P2P connection */
3793 if (ha->operating_mode == P2P) {
3794 ha->fw_options[2] |= BIT_3;
3795 ql_dbg(ql_dbg_disc, vha, 0x2100,
3796 "(%s): Setting FLOGI retry BIT in fw_options[2]: 0x%x\n",
3797 __func__, ha->fw_options[2]);
3798 }
3799
1da177e4 3800 /* Update firmware options. */
e315cd28 3801 qla2x00_set_fw_options(vha, ha->fw_options);
1da177e4
LT		 3802}
3803
0107109e 3804void
e315cd28 3805qla24xx_update_fw_options(scsi_qla_host_t *vha)
0107109e
AV		 3806{
3807 int rval;
e315cd28 3808 struct qla_hw_data *ha = vha->hw;
0107109e 3809
7ec0effd 3810 if (IS_P3P_TYPE(ha))
a9083016
GM		 3811 return;
3812
f198cafa
HM		 3813 /* Hold status IOCBs until ABTS response received. */
3814 if (ql2xfwholdabts)
3815 ha->fw_options[3] |= BIT_12;
3816
088d09d4
GM		 3817 /* Set Retry FLOGI in case of P2P connection */
3818 if (ha->operating_mode == P2P) {
3819 ha->fw_options[2] |= BIT_3;
3820 ql_dbg(ql_dbg_disc, vha, 0x2101,
3821 "(%s): Setting FLOGI retry BIT in fw_options[2]: 0x%x\n",
3822 __func__, ha->fw_options[2]);
3823 }
3824
41dc529a 3825 /* Move PUREX, ABTS RX & RIDA to ATIOQ */
3c4810ff
QT		 3826 if (ql2xmvasynctoatio &&
3827 (IS_QLA83XX(ha) || IS_QLA27XX(ha))) {
41dc529a
QT		 3828 if (qla_tgt_mode_enabled(vha) ||
3829 qla_dual_mode_enabled(vha))
3830 ha->fw_options[2] |= BIT_11;
3831 else
3832 ha->fw_options[2] &= ~BIT_11;
3833 }
3834
f7e761f5
QT		 3835 if (IS_QLA25XX(ha) || IS_QLA83XX(ha) || IS_QLA27XX(ha)) {
3836 /*
3837 * Tell FW to track each exchange to prevent
3838 * driver from using stale exchange.
3839 */
3840 if (qla_tgt_mode_enabled(vha) ||
3841 qla_dual_mode_enabled(vha))
3842 ha->fw_options[2] |= BIT_4;
3843 else
3844 ha->fw_options[2] &= ~BIT_4;
9ecf0b0d
QT		 3845
3846 /* Reserve 1/2 of emergency exchanges for ELS.*/
3847 if (qla2xuseresexchforels)
3848 ha->fw_options[2] |= BIT_8;
3849 else
3850 ha->fw_options[2] &= ~BIT_8;
f7e761f5
QT		 3851 }
3852
83548fe2
QT		 3853 ql_dbg(ql_dbg_init, vha, 0x00e8,
3854 "%s, add FW options 1-3 = 0x%04x 0x%04x 0x%04x mode %x\n",
3855 __func__, ha->fw_options[1], ha->fw_options[2],
3856 ha->fw_options[3], vha->host->active_mode);
3c4810ff
QT		 3857
3858 if (ha->fw_options[1] || ha->fw_options[2] || ha->fw_options[3])
3859 qla2x00_set_fw_options(vha, ha->fw_options);
41dc529a 3860
0107109e 3861 /* Update Serial Link options. */
f94097ed 3862 if ((le16_to_cpu(ha->fw_seriallink_options24[0]) & BIT_0) == 0)
0107109e
AV		 3863 return;
3864
e315cd28 3865 rval = qla2x00_set_serdes_params(vha,
f94097ed 3866 le16_to_cpu(ha->fw_seriallink_options24[1]),
3867 le16_to_cpu(ha->fw_seriallink_options24[2]),
3868 le16_to_cpu(ha->fw_seriallink_options24[3]));
0107109e 3869 if (rval != QLA_SUCCESS) {
7c3df132 3870 ql_log(ql_log_warn, vha, 0x0104,
0107109e
AV		 3871 "Unable to update Serial Link options (%x).\n", rval);
3872 }
3873}
3874
abbd8870 3875void
e315cd28 3876qla2x00_config_rings(struct scsi_qla_host *vha)
abbd8870 3877{
e315cd28 3878 struct qla_hw_data *ha = vha->hw;
3d71644c 3879 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
73208dfd
AC		 3880 struct req_que *req = ha->req_q_map[0];
3881 struct rsp_que *rsp = ha->rsp_q_map[0];
abbd8870
AV		 3882
3883 /* Setup ring parameters in initialization control block. */
ad950360
BVA		 3884 ha->init_cb->request_q_outpointer = cpu_to_le16(0);
3885 ha->init_cb->response_q_inpointer = cpu_to_le16(0);
e315cd28
AC		 3886 ha->init_cb->request_q_length = cpu_to_le16(req->length);
3887 ha->init_cb->response_q_length = cpu_to_le16(rsp->length);
3888 ha->init_cb->request_q_address[0] = cpu_to_le32(LSD(req->dma));
3889 ha->init_cb->request_q_address[1] = cpu_to_le32(MSD(req->dma));
3890 ha->init_cb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma));
3891 ha->init_cb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma));
abbd8870
AV		 3892
3893 WRT_REG_WORD(ISP_REQ_Q_IN(ha, reg), 0);
3894 WRT_REG_WORD(ISP_REQ_Q_OUT(ha, reg), 0);
3895 WRT_REG_WORD(ISP_RSP_Q_IN(ha, reg), 0);
3896 WRT_REG_WORD(ISP_RSP_Q_OUT(ha, reg), 0);
3897 RD_REG_WORD(ISP_RSP_Q_OUT(ha, reg)); /* PCI Posting. */
3898}
3899
0107109e 3900void
e315cd28 3901qla24xx_config_rings(struct scsi_qla_host *vha)
0107109e 3902{
e315cd28 3903 struct qla_hw_data *ha = vha->hw;
118e2ef9 3904 device_reg_t *reg = ISP_QUE_REG(ha, 0);
73208dfd
AC		 3905 struct device_reg_2xxx __iomem *ioreg = &ha->iobase->isp;
3906 struct qla_msix_entry *msix;
0107109e 3907 struct init_cb_24xx *icb;
73208dfd
AC		 3908 uint16_t rid = 0;
3909 struct req_que *req = ha->req_q_map[0];
3910 struct rsp_que *rsp = ha->rsp_q_map[0];
0107109e 3911
6246b8a1 3912 /* Setup ring parameters in initialization control block. */
0107109e 3913 icb = (struct init_cb_24xx *)ha->init_cb;
ad950360
BVA		 3914 icb->request_q_outpointer = cpu_to_le16(0);
3915 icb->response_q_inpointer = cpu_to_le16(0);
e315cd28
AC		 3916 icb->request_q_length = cpu_to_le16(req->length);
3917 icb->response_q_length = cpu_to_le16(rsp->length);
3918 icb->request_q_address[0] = cpu_to_le32(LSD(req->dma));
3919 icb->request_q_address[1] = cpu_to_le32(MSD(req->dma));
3920 icb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma));
3921 icb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma));
0107109e 3922
2d70c103 3923 /* Setup ATIO queue dma pointers for target mode */
ad950360 3924 icb->atio_q_inpointer = cpu_to_le16(0);
2d70c103
NB		 3925 icb->atio_q_length = cpu_to_le16(ha->tgt.atio_q_length);
3926 icb->atio_q_address[0] = cpu_to_le32(LSD(ha->tgt.atio_dma));
3927 icb->atio_q_address[1] = cpu_to_le32(MSD(ha->tgt.atio_dma));
3928
7c6300e3 3929 if (IS_SHADOW_REG_CAPABLE(ha))
ad950360 3930 icb->firmware_options_2 |= cpu_to_le32(BIT_30|BIT_29);
7c6300e3 3931
f73cb695 3932 if (ha->mqenable || IS_QLA83XX(ha) || IS_QLA27XX(ha)) {
ad950360
BVA		 3933 icb->qos = cpu_to_le16(QLA_DEFAULT_QUE_QOS);
3934 icb->rid = cpu_to_le16(rid);
73208dfd
AC		 3935 if (ha->flags.msix_enabled) {
3936 msix = &ha->msix_entries[1];
83548fe2 3937 ql_dbg(ql_dbg_init, vha, 0x0019,
7c3df132
SK		 3938 "Registering vector 0x%x for base que.\n",
3939 msix->entry);
73208dfd
AC		 3940 icb->msix = cpu_to_le16(msix->entry);
3941 }
3942 /* Use alternate PCI bus number */
3943 if (MSB(rid))
ad950360 3944 icb->firmware_options_2 |= cpu_to_le32(BIT_19);
73208dfd
AC		 3945 /* Use alternate PCI devfn */
3946 if (LSB(rid))
ad950360 3947 icb->firmware_options_2 |= cpu_to_le32(BIT_18);
73208dfd 3948
3155754a 3949 /* Use Disable MSIX Handshake mode for capable adapters */
6246b8a1
GM		 3950 if ((ha->fw_attributes & BIT_6) && (IS_MSIX_NACK_CAPABLE(ha)) &&
3951 (ha->flags.msix_enabled)) {
ad950360 3952 icb->firmware_options_2 &= cpu_to_le32(~BIT_22);
3155754a 3953 ha->flags.disable_msix_handshake = 1;
7c3df132
SK		 3954 ql_dbg(ql_dbg_init, vha, 0x00fe,
3955 "MSIX Handshake Disable Mode turned on.\n");
3155754a 3956 } else {
ad950360 3957 icb->firmware_options_2 |= cpu_to_le32(BIT_22);
3155754a 3958 }
ad950360 3959 icb->firmware_options_2 |= cpu_to_le32(BIT_23);
73208dfd
AC		 3960
3961 WRT_REG_DWORD(&reg->isp25mq.req_q_in, 0);
3962 WRT_REG_DWORD(&reg->isp25mq.req_q_out, 0);
3963 WRT_REG_DWORD(&reg->isp25mq.rsp_q_in, 0);
3964 WRT_REG_DWORD(&reg->isp25mq.rsp_q_out, 0);
3965 } else {
3966 WRT_REG_DWORD(&reg->isp24.req_q_in, 0);
3967 WRT_REG_DWORD(&reg->isp24.req_q_out, 0);
3968 WRT_REG_DWORD(&reg->isp24.rsp_q_in, 0);
3969 WRT_REG_DWORD(&reg->isp24.rsp_q_out, 0);
3970 }
aa230bc5 3971 qlt_24xx_config_rings(vha);
2d70c103 3972
73208dfd
AC		 3973 /* PCI posting */
3974 RD_REG_DWORD(&ioreg->hccr);
0107109e
AV		 3975}
3976
1da177e4
LT		 3977/**
3978 * qla2x00_init_rings() - Initializes firmware.
2db6228d 3979 * @vha: HA context
1da177e4
LT		 3980 *
3981 * Beginning of request ring has initialization control block already built
3982 * by nvram config routine.
3983 *
3984 * Returns 0 on success.
3985 */
8ae6d9c7 3986int
e315cd28 3987qla2x00_init_rings(scsi_qla_host_t *vha)
1da177e4
LT		 3988{
3989 int rval;
3990 unsigned long flags = 0;
29bdccbe 3991 int cnt, que;
e315cd28 3992 struct qla_hw_data *ha = vha->hw;
29bdccbe
AC		 3993 struct req_que *req;
3994 struct rsp_que *rsp;
2c3dfe3f
SJ		 3995 struct mid_init_cb_24xx *mid_init_cb =
3996 (struct mid_init_cb_24xx *) ha->init_cb;
1da177e4
LT		 3997
3998 spin_lock_irqsave(&ha->hardware_lock, flags);
3999
4000 /* Clear outstanding commands array. */
2afa19a9 4001 for (que = 0; que < ha->max_req_queues; que++) {
29bdccbe 4002 req = ha->req_q_map[que];
cb43285f 4003 if (!req || !test_bit(que, ha->req_qid_map))
29bdccbe 4004 continue;
7c6300e3
JC		 4005 req->out_ptr = (void *)(req->ring + req->length);
4006 *req->out_ptr = 0;
8d93f550 4007 for (cnt = 1; cnt < req->num_outstanding_cmds; cnt++)
29bdccbe 4008 req->outstanding_cmds[cnt] = NULL;
1da177e4 4009
2afa19a9 4010 req->current_outstanding_cmd = 1;
1da177e4 4011
29bdccbe
AC		 4012 /* Initialize firmware. */
4013 req->ring_ptr = req->ring;
4014 req->ring_index = 0;
4015 req->cnt = req->length;
4016 }
1da177e4 4017
2afa19a9 4018 for (que = 0; que < ha->max_rsp_queues; que++) {
29bdccbe 4019 rsp = ha->rsp_q_map[que];
cb43285f 4020 if (!rsp || !test_bit(que, ha->rsp_qid_map))
29bdccbe 4021 continue;
7c6300e3
JC		 4022 rsp->in_ptr = (void *)(rsp->ring + rsp->length);
4023 *rsp->in_ptr = 0;
29bdccbe 4024 /* Initialize response queue entries */
8ae6d9c7
GM		 4025 if (IS_QLAFX00(ha))
4026 qlafx00_init_response_q_entries(rsp);
4027 else
4028 qla2x00_init_response_q_entries(rsp);
29bdccbe 4029 }
1da177e4 4030
2d70c103
NB		 4031 ha->tgt.atio_ring_ptr = ha->tgt.atio_ring;
4032 ha->tgt.atio_ring_index = 0;
4033 /* Initialize ATIO queue entries */
4034 qlt_init_atio_q_entries(vha);
4035
e315cd28 4036 ha->isp_ops->config_rings(vha);
1da177e4
LT		 4037
4038 spin_unlock_irqrestore(&ha->hardware_lock, flags);
4039
8ae6d9c7
GM		 4040 ql_dbg(ql_dbg_init, vha, 0x00d1, "Issue init firmware.\n");
4041
4042 if (IS_QLAFX00(ha)) {
4043 rval = qlafx00_init_firmware(vha, ha->init_cb_size);
4044 goto next_check;
4045 }
4046
1da177e4 4047 /* Update any ISP specific firmware options before initialization. */
e315cd28 4048 ha->isp_ops->update_fw_options(vha);
1da177e4 4049
605aa2bc 4050 if (ha->flags.npiv_supported) {
45980cc2 4051 if (ha->operating_mode == LOOP && !IS_CNA_CAPABLE(ha))
605aa2bc 4052 ha->max_npiv_vports = MIN_MULTI_ID_FABRIC - 1;
c48339de 4053 mid_init_cb->count = cpu_to_le16(ha->max_npiv_vports);
605aa2bc
LC		 4054 }
4055
24a08138 4056 if (IS_FWI2_CAPABLE(ha)) {
ad950360 4057 mid_init_cb->options = cpu_to_le16(BIT_1);
24a08138 4058 mid_init_cb->init_cb.execution_throttle =
03e8c680 4059 cpu_to_le16(ha->cur_fw_xcb_count);
40f3862b
JC		 4060 ha->flags.dport_enabled =
4061 (mid_init_cb->init_cb.firmware_options_1 & BIT_7) != 0;
4062 ql_dbg(ql_dbg_init, vha, 0x0191, "DPORT Support: %s.\n",
4063 (ha->flags.dport_enabled) ? "enabled" : "disabled");
4064 /* FA-WWPN Status */
2486c627 4065 ha->flags.fawwpn_enabled =
40f3862b 4066 (mid_init_cb->init_cb.firmware_options_1 & BIT_6) != 0;
83548fe2 4067 ql_dbg(ql_dbg_init, vha, 0x00bc, "FA-WWPN Support: %s.\n",
2486c627 4068 (ha->flags.fawwpn_enabled) ? "enabled" : "disabled");
24a08138 4069 }
2c3dfe3f 4070
e315cd28 4071 rval = qla2x00_init_firmware(vha, ha->init_cb_size);
8ae6d9c7 4072next_check:
1da177e4 4073 if (rval) {
7c3df132
SK		 4074 ql_log(ql_log_fatal, vha, 0x00d2,
4075 "Init Firmware **** FAILED ****.\n");
1da177e4 4076 } else {
7c3df132
SK		 4077 ql_dbg(ql_dbg_init, vha, 0x00d3,
4078 "Init Firmware -- success.\n");
4b60c827 4079 QLA_FW_STARTED(ha);
1da177e4
LT		 4080 }
4081
4082 return (rval);
4083}
4084
4085/**
4086 * qla2x00_fw_ready() - Waits for firmware ready.
2db6228d 4087 * @vha: HA context
1da177e4
LT		 4088 *
4089 * Returns 0 on success.
4090 */
4091static int
e315cd28 4092qla2x00_fw_ready(scsi_qla_host_t *vha)
1da177e4
LT		 4093{
4094 int rval;
4d4df193 4095 unsigned long wtime, mtime, cs84xx_time;
1da177e4
LT		 4096 uint16_t min_wait; /* Minimum wait time if loop is down */
4097 uint16_t wait_time; /* Wait time if loop is coming ready */
b5a340dd 4098 uint16_t state[6];
e315cd28 4099 struct qla_hw_data *ha = vha->hw;
1da177e4 4100
8ae6d9c7
GM		 4101 if (IS_QLAFX00(vha->hw))
4102 return qlafx00_fw_ready(vha);
4103
1da177e4
LT		 4104 rval = QLA_SUCCESS;
4105
33461491
CD		 4106 /* Time to wait for loop down */
4107 if (IS_P3P_TYPE(ha))
4108 min_wait = 30;
4109 else
4110 min_wait = 20;
1da177e4
LT		 4111
4112 /*
4113 * Firmware should take at most one RATOV to login, plus 5 seconds for
4114 * our own processing.
4115 */
4116 if ((wait_time = (ha->retry_count*ha->login_timeout) + 5) < min_wait) {
4117 wait_time = min_wait;
4118 }
4119
4120 /* Min wait time if loop down */
4121 mtime = jiffies + (min_wait * HZ);
4122
4123 /* wait time before firmware ready */
4124 wtime = jiffies + (wait_time * HZ);
4125
4126 /* Wait for ISP to finish LIP */
e315cd28 4127 if (!vha->flags.init_done)
7c3df132
SK		 4128 ql_log(ql_log_info, vha, 0x801e,
4129 "Waiting for LIP to complete.\n");
1da177e4
LT		 4130
4131 do {
5b939038 4132 memset(state, -1, sizeof(state));
e315cd28 4133 rval = qla2x00_get_firmware_state(vha, state);
1da177e4 4134 if (rval == QLA_SUCCESS) {
4d4df193 4135 if (state[0] < FSTATE_LOSS_OF_SYNC) {
e315cd28 4136 vha->device_flags &= ~DFLG_NO_CABLE;
1da177e4 4137 }
4d4df193 4138 if (IS_QLA84XX(ha) && state[0] != FSTATE_READY) {
7c3df132
SK		 4139 ql_dbg(ql_dbg_taskm, vha, 0x801f,
4140 "fw_state=%x 84xx=%x.\n", state[0],
4141 state[2]);
4d4df193
HK		 4142 if ((state[2] & FSTATE_LOGGED_IN) &&
4143 (state[2] & FSTATE_WAITING_FOR_VERIFY)) {
7c3df132
SK		 4144 ql_dbg(ql_dbg_taskm, vha, 0x8028,
4145 "Sending verify iocb.\n");
4d4df193
HK		 4146
4147 cs84xx_time = jiffies;
e315cd28 4148 rval = qla84xx_init_chip(vha);
7c3df132
SK		 4149 if (rval != QLA_SUCCESS) {
4150 ql_log(ql_log_warn,
cfb0919c 4151 vha, 0x8007,
7c3df132 4152 "Init chip failed.\n");
4d4df193 4153 break;
7c3df132 4154 }
4d4df193
HK		 4155
4156 /* Add time taken to initialize. */
4157 cs84xx_time = jiffies - cs84xx_time;
4158 wtime += cs84xx_time;
4159 mtime += cs84xx_time;
cfb0919c 4160 ql_dbg(ql_dbg_taskm, vha, 0x8008,
7c3df132
SK		 4161 "Increasing wait time by %ld. "
4162 "New time %ld.\n", cs84xx_time,
4163 wtime);
4d4df193
HK		 4164 }
4165 } else if (state[0] == FSTATE_READY) {
7c3df132
SK		 4166 ql_dbg(ql_dbg_taskm, vha, 0x8037,
4167 "F/W Ready - OK.\n");
1da177e4 4168
e315cd28 4169 qla2x00_get_retry_cnt(vha, &ha->retry_count,
1da177e4
LT		 4170 &ha->login_timeout, &ha->r_a_tov);
4171
4172 rval = QLA_SUCCESS;
4173 break;
4174 }
4175
4176 rval = QLA_FUNCTION_FAILED;
4177
e315cd28 4178 if (atomic_read(&vha->loop_down_timer) &&
4d4df193 4179 state[0] != FSTATE_READY) {
1da177e4 4180 /* Loop down. Timeout on min_wait for states
fa2a1ce5
AV		 4181 * other than Wait for Login.
4182 */
1da177e4 4183 if (time_after_eq(jiffies, mtime)) {
7c3df132 4184 ql_log(ql_log_info, vha, 0x8038,
1da177e4
LT		 4185 "Cable is unplugged...\n");
4186
e315cd28 4187 vha->device_flags |= DFLG_NO_CABLE;
1da177e4
LT		 4188 break;
4189 }
4190 }
4191 } else {
4192 /* Mailbox cmd failed. Timeout on min_wait. */
cdbb0a4f 4193 if (time_after_eq(jiffies, mtime) ||
7190575f 4194 ha->flags.isp82xx_fw_hung)
1da177e4
LT		 4195 break;
4196 }
4197
4198 if (time_after_eq(jiffies, wtime))
4199 break;
4200
4201 /* Delay for a while */
4202 msleep(500);
1da177e4
LT		 4203 } while (1);
4204
7c3df132 4205 ql_dbg(ql_dbg_taskm, vha, 0x803a,
b5a340dd
JC		 4206 "fw_state=%x (%x, %x, %x, %x %x) curr time=%lx.\n", state[0],
4207 state[1], state[2], state[3], state[4], state[5], jiffies);
1da177e4 4208
cfb0919c 4209 if (rval && !(vha->device_flags & DFLG_NO_CABLE)) {
7c3df132
SK		 4210 ql_log(ql_log_warn, vha, 0x803b,
4211 "Firmware ready **** FAILED ****.\n");
1da177e4
LT		 4212 }
4213
4214 return (rval);
4215}
4216
4217/*
4218* qla2x00_configure_hba
4219* Setup adapter context.
4220*
4221* Input:
4222* ha = adapter state pointer.
4223*
4224* Returns:
4225* 0 = success
4226*
4227* Context:
4228* Kernel context.
4229*/
4230static int
e315cd28 4231qla2x00_configure_hba(scsi_qla_host_t *vha)
1da177e4
LT		 4232{
4233 int rval;
4234 uint16_t loop_id;
4235 uint16_t topo;
2c3dfe3f 4236 uint16_t sw_cap;
1da177e4
LT		 4237 uint8_t al_pa;
4238 uint8_t area;
4239 uint8_t domain;
4240 char connect_type[22];
e315cd28 4241 struct qla_hw_data *ha = vha->hw;
61e1b269 4242 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
482c9dc7 4243 port_id_t id;
9d1aa4e1 4244 unsigned long flags;
1da177e4
LT		 4245
4246 /* Get host addresses. */
e315cd28 4247 rval = qla2x00_get_adapter_id(vha,
2c3dfe3f 4248 &loop_id, &al_pa, &area, &domain, &topo, &sw_cap);
1da177e4 4249 if (rval != QLA_SUCCESS) {
e315cd28 4250 if (LOOP_TRANSITION(vha) || atomic_read(&ha->loop_down_timer) ||
6246b8a1 4251 IS_CNA_CAPABLE(ha) ||
33135aa2 4252 (rval == QLA_COMMAND_ERROR && loop_id == 0x7)) {
7c3df132
SK		 4253 ql_dbg(ql_dbg_disc, vha, 0x2008,
4254 "Loop is in a transition state.\n");
33135aa2 4255 } else {
7c3df132
SK		 4256 ql_log(ql_log_warn, vha, 0x2009,
4257 "Unable to get host loop ID.\n");
61e1b269
JC		 4258 if (IS_FWI2_CAPABLE(ha) && (vha == base_vha) &&
4259 (rval == QLA_COMMAND_ERROR && loop_id == 0x1b)) {
4260 ql_log(ql_log_warn, vha, 0x1151,
4261 "Doing link init.\n");
4262 if (qla24xx_link_initialize(vha) == QLA_SUCCESS)
4263 return rval;
4264 }
e315cd28 4265 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
33135aa2 4266 }
1da177e4
LT		 4267 return (rval);
4268 }
4269
4270 if (topo == 4) {
7c3df132
SK		 4271 ql_log(ql_log_info, vha, 0x200a,
4272 "Cannot get topology - retrying.\n");
1da177e4
LT		 4273 return (QLA_FUNCTION_FAILED);
4274 }
4275
e315cd28 4276 vha->loop_id = loop_id;
1da177e4
LT		 4277
4278 /* initialize */
4279 ha->min_external_loopid = SNS_FIRST_LOOP_ID;
4280 ha->operating_mode = LOOP;
2c3dfe3f 4281 ha->switch_cap = 0;
1da177e4
LT		 4282
4283 switch (topo) {
4284 case 0:
7c3df132 4285 ql_dbg(ql_dbg_disc, vha, 0x200b, "HBA in NL topology.\n");
1da177e4
LT		 4286 ha->current_topology = ISP_CFG_NL;
4287 strcpy(connect_type, "(Loop)");
4288 break;
4289
4290 case 1:
7c3df132 4291 ql_dbg(ql_dbg_disc, vha, 0x200c, "HBA in FL topology.\n");
2c3dfe3f 4292 ha->switch_cap = sw_cap;
1da177e4
LT		 4293 ha->current_topology = ISP_CFG_FL;
4294 strcpy(connect_type, "(FL_Port)");
4295 break;
4296
4297 case 2:
7c3df132 4298 ql_dbg(ql_dbg_disc, vha, 0x200d, "HBA in N P2P topology.\n");
1da177e4
LT		 4299 ha->operating_mode = P2P;
4300 ha->current_topology = ISP_CFG_N;
4301 strcpy(connect_type, "(N_Port-to-N_Port)");
4302 break;
4303
4304 case 3:
7c3df132 4305 ql_dbg(ql_dbg_disc, vha, 0x200e, "HBA in F P2P topology.\n");
2c3dfe3f 4306 ha->switch_cap = sw_cap;
1da177e4
LT		 4307 ha->operating_mode = P2P;
4308 ha->current_topology = ISP_CFG_F;
4309 strcpy(connect_type, "(F_Port)");
4310 break;
4311
4312 default:
7c3df132
SK		 4313 ql_dbg(ql_dbg_disc, vha, 0x200f,
4314 "HBA in unknown topology %x, using NL.\n", topo);
1da177e4
LT		 4315 ha->current_topology = ISP_CFG_NL;
4316 strcpy(connect_type, "(Loop)");
4317 break;
4318 }
4319
4320 /* Save Host port and loop ID. */
4321 /* byte order - Big Endian */
482c9dc7
QT		 4322 id.b.domain = domain;
4323 id.b.area = area;
4324 id.b.al_pa = al_pa;
4325 id.b.rsvd_1 = 0;
9d1aa4e1 4326 spin_lock_irqsave(&ha->hardware_lock, flags);
8777e431
QT		 4327 if (!(topo == 2 && ha->flags.n2n_bigger))
4328 qlt_update_host_map(vha, id);
9d1aa4e1 4329 spin_unlock_irqrestore(&ha->hardware_lock, flags);
2d70c103 4330
e315cd28 4331 if (!vha->flags.init_done)
7c3df132
SK		 4332 ql_log(ql_log_info, vha, 0x2010,
4333 "Topology - %s, Host Loop address 0x%x.\n",
e315cd28 4334 connect_type, vha->loop_id);
1da177e4 4335
1da177e4
LT		 4336 return(rval);
4337}
4338
a9083016 4339inline void
e315cd28
AC		 4340qla2x00_set_model_info(scsi_qla_host_t *vha, uint8_t *model, size_t len,
4341 char *def)
9bb9fcf2
AV		 4342{
4343 char *st, *en;
4344 uint16_t index;
e315cd28 4345 struct qla_hw_data *ha = vha->hw;
ab671149 4346 int use_tbl = !IS_QLA24XX_TYPE(ha) && !IS_QLA25XX(ha) &&
6246b8a1 4347 !IS_CNA_CAPABLE(ha) && !IS_QLA2031(ha);
9bb9fcf2
AV		 4348
4349 if (memcmp(model, BINZERO, len) != 0) {
4350 strncpy(ha->model_number, model, len);
4351 st = en = ha->model_number;
4352 en += len - 1;
4353 while (en > st) {
4354 if (*en != 0x20 && *en != 0x00)
4355 break;
4356 *en-- = '\0';
4357 }
4358
4359 index = (ha->pdev->subsystem_device & 0xff);
7d0dba17
AV		 4360 if (use_tbl &&
4361 ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC &&
9bb9fcf2 4362 index < QLA_MODEL_NAMES)
1ee27146
JC		 4363 strncpy(ha->model_desc,
4364 qla2x00_model_name[index * 2 + 1],
4365 sizeof(ha->model_desc) - 1);
9bb9fcf2
AV		 4366 } else {
4367 index = (ha->pdev->subsystem_device & 0xff);
7d0dba17
AV		 4368 if (use_tbl &&
4369 ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC &&
9bb9fcf2
AV		 4370 index < QLA_MODEL_NAMES) {
4371 strcpy(ha->model_number,
4372 qla2x00_model_name[index * 2]);
1ee27146
JC		 4373 strncpy(ha->model_desc,
4374 qla2x00_model_name[index * 2 + 1],
4375 sizeof(ha->model_desc) - 1);
9bb9fcf2
AV		 4376 } else {
4377 strcpy(ha->model_number, def);
4378 }
4379 }
1ee27146 4380 if (IS_FWI2_CAPABLE(ha))
e315cd28 4381 qla2xxx_get_vpd_field(vha, "\x82", ha->model_desc,
1ee27146 4382 sizeof(ha->model_desc));
9bb9fcf2
AV		 4383}
4384
4e08df3f
DM		 4385/* On sparc systems, obtain port and node WWN from firmware
4386 * properties.
4387 */
e315cd28 4388static void qla2xxx_nvram_wwn_from_ofw(scsi_qla_host_t *vha, nvram_t *nv)
4e08df3f
DM		 4389{
4390#ifdef CONFIG_SPARC
e315cd28 4391 struct qla_hw_data *ha = vha->hw;
4e08df3f 4392 struct pci_dev *pdev = ha->pdev;
15576bc8
DM		 4393 struct device_node *dp = pci_device_to_OF_node(pdev);
4394 const u8 *val;
4e08df3f
DM		 4395 int len;
4396
4397 val = of_get_property(dp, "port-wwn", &len);
4398 if (val && len >= WWN_SIZE)
4399 memcpy(nv->port_name, val, WWN_SIZE);
4400
4401 val = of_get_property(dp, "node-wwn", &len);
4402 if (val && len >= WWN_SIZE)
4403 memcpy(nv->node_name, val, WWN_SIZE);
4404#endif
4405}
4406
1da177e4
LT		 4407/*
4408* NVRAM configuration for ISP 2xxx
4409*
4410* Input:
4411* ha = adapter block pointer.
4412*
4413* Output:
4414* initialization control block in response_ring
4415* host adapters parameters in host adapter block
4416*
4417* Returns:
4418* 0 = success.
4419*/
abbd8870 4420int
e315cd28 4421qla2x00_nvram_config(scsi_qla_host_t *vha)
1da177e4 4422{
4e08df3f 4423 int rval;
0107109e
AV		 4424 uint8_t chksum = 0;
4425 uint16_t cnt;
4426 uint8_t *dptr1, *dptr2;
e315cd28 4427 struct qla_hw_data *ha = vha->hw;
0107109e 4428 init_cb_t *icb = ha->init_cb;
281afe19
SJ		 4429 nvram_t *nv = ha->nvram;
4430 uint8_t *ptr = ha->nvram;
3d71644c 4431 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1da177e4 4432
4e08df3f
DM		 4433 rval = QLA_SUCCESS;
4434
1da177e4 4435 /* Determine NVRAM starting address. */
0107109e 4436 ha->nvram_size = sizeof(nvram_t);
1da177e4
LT		 4437 ha->nvram_base = 0;
4438 if (!IS_QLA2100(ha) && !IS_QLA2200(ha) && !IS_QLA2300(ha))
4439 if ((RD_REG_WORD(&reg->ctrl_status) >> 14) == 1)
4440 ha->nvram_base = 0x80;
4441
4442 /* Get NVRAM data and calculate checksum. */
e315cd28 4443 ha->isp_ops->read_nvram(vha, ptr, ha->nvram_base, ha->nvram_size);
0107109e
AV		 4444 for (cnt = 0, chksum = 0; cnt < ha->nvram_size; cnt++)
4445 chksum += *ptr++;
1da177e4 4446
7c3df132
SK		 4447 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x010f,
4448 "Contents of NVRAM.\n");
4449 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0110,
4450 (uint8_t *)nv, ha->nvram_size);
1da177e4
LT		 4451
4452 /* Bad NVRAM data, set defaults parameters. */
4453 if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' ||
4454 nv->id[2] != 'P' || nv->id[3] != ' ' || nv->nvram_version < 1) {
4455 /* Reset NVRAM data. */
7c3df132 4456 ql_log(ql_log_warn, vha, 0x0064,
9e336520 4457 "Inconsistent NVRAM "
7c3df132
SK		 4458 "detected: checksum=0x%x id=%c version=0x%x.\n",
4459 chksum, nv->id[0], nv->nvram_version);
4460 ql_log(ql_log_warn, vha, 0x0065,
4461 "Falling back to "
4462 "functioning (yet invalid -- WWPN) defaults.\n");
4e08df3f
DM		 4463
4464 /*
4465 * Set default initialization control block.
4466 */
4467 memset(nv, 0, ha->nvram_size);
4468 nv->parameter_block_version = ICB_VERSION;
4469
4470 if (IS_QLA23XX(ha)) {
4471 nv->firmware_options[0] = BIT_2 | BIT_1;
4472 nv->firmware_options[1] = BIT_7 | BIT_5;
4473 nv->add_firmware_options[0] = BIT_5;
4474 nv->add_firmware_options[1] = BIT_5 | BIT_4;
98aee70d 4475 nv->frame_payload_size = 2048;
4e08df3f
DM		 4476 nv->special_options[1] = BIT_7;
4477 } else if (IS_QLA2200(ha)) {
4478 nv->firmware_options[0] = BIT_2 | BIT_1;
4479 nv->firmware_options[1] = BIT_7 | BIT_5;
4480 nv->add_firmware_options[0] = BIT_5;
4481 nv->add_firmware_options[1] = BIT_5 | BIT_4;
98aee70d 4482 nv->frame_payload_size = 1024;
4e08df3f
DM		 4483 } else if (IS_QLA2100(ha)) {
4484 nv->firmware_options[0] = BIT_3 | BIT_1;
4485 nv->firmware_options[1] = BIT_5;
98aee70d 4486 nv->frame_payload_size = 1024;
4e08df3f
DM		 4487 }
4488
ad950360
BVA		 4489 nv->max_iocb_allocation = cpu_to_le16(256);
4490 nv->execution_throttle = cpu_to_le16(16);
4e08df3f
DM		 4491 nv->retry_count = 8;
4492 nv->retry_delay = 1;
4493
4494 nv->port_name[0] = 33;
4495 nv->port_name[3] = 224;
4496 nv->port_name[4] = 139;
4497
e315cd28 4498 qla2xxx_nvram_wwn_from_ofw(vha, nv);
4e08df3f
DM		 4499
4500 nv->login_timeout = 4;
4501
4502 /*
4503 * Set default host adapter parameters
4504 */
4505 nv->host_p[1] = BIT_2;
4506 nv->reset_delay = 5;
4507 nv->port_down_retry_count = 8;
ad950360 4508 nv->max_luns_per_target = cpu_to_le16(8);
4e08df3f
DM		 4509 nv->link_down_timeout = 60;
4510
4511 rval = 1;
1da177e4
LT		 4512 }
4513
4514#if defined(CONFIG_IA64_GENERIC) || defined(CONFIG_IA64_SGI_SN2)
4515 /*
4516 * The SN2 does not provide BIOS emulation which means you can't change
4517 * potentially bogus BIOS settings. Force the use of default settings
4518 * for link rate and frame size. Hope that the rest of the settings
4519 * are valid.
4520 */
4521 if (ia64_platform_is("sn2")) {
98aee70d 4522 nv->frame_payload_size = 2048;
1da177e4
LT		 4523 if (IS_QLA23XX(ha))
4524 nv->special_options[1] = BIT_7;
4525 }
4526#endif
4527
4528 /* Reset Initialization control block */
0107109e 4529 memset(icb, 0, ha->init_cb_size);
1da177e4
LT		 4530
4531 /*
4532 * Setup driver NVRAM options.
4533 */
4534 nv->firmware_options[0] |= (BIT_6 | BIT_1);
4535 nv->firmware_options[0] &= ~(BIT_5 | BIT_4);
4536 nv->firmware_options[1] |= (BIT_5 | BIT_0);
4537 nv->firmware_options[1] &= ~BIT_4;
4538
4539 if (IS_QLA23XX(ha)) {
4540 nv->firmware_options[0] |= BIT_2;
4541 nv->firmware_options[0] &= ~BIT_3;
2d70c103 4542 nv->special_options[0] &= ~BIT_6;
0107109e 4543 nv->add_firmware_options[1] |= BIT_5 | BIT_4;
1da177e4
LT		 4544
4545 if (IS_QLA2300(ha)) {
4546 if (ha->fb_rev == FPM_2310) {
4547 strcpy(ha->model_number, "QLA2310");
4548 } else {
4549 strcpy(ha->model_number, "QLA2300");
4550 }
4551 } else {
e315cd28 4552 qla2x00_set_model_info(vha, nv->model_number,
9bb9fcf2 4553 sizeof(nv->model_number), "QLA23xx");
1da177e4
LT		 4554 }
4555 } else if (IS_QLA2200(ha)) {
4556 nv->firmware_options[0] |= BIT_2;
4557 /*
4558 * 'Point-to-point preferred, else loop' is not a safe
4559 * connection mode setting.
4560 */
4561 if ((nv->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) ==
4562 (BIT_5 | BIT_4)) {
4563 /* Force 'loop preferred, else point-to-point'. */
4564 nv->add_firmware_options[0] &= ~(BIT_6 | BIT_5 | BIT_4);
4565 nv->add_firmware_options[0] |= BIT_5;
4566 }
4567 strcpy(ha->model_number, "QLA22xx");
4568 } else /*if (IS_QLA2100(ha))*/ {
4569 strcpy(ha->model_number, "QLA2100");
4570 }
4571
4572 /*
4573 * Copy over NVRAM RISC parameter block to initialization control block.
4574 */
4575 dptr1 = (uint8_t *)icb;
4576 dptr2 = (uint8_t *)&nv->parameter_block_version;
4577 cnt = (uint8_t *)&icb->request_q_outpointer - (uint8_t *)&icb->version;
4578 while (cnt--)
4579 *dptr1++ = *dptr2++;
4580
4581 /* Copy 2nd half. */
4582 dptr1 = (uint8_t *)icb->add_firmware_options;
4583 cnt = (uint8_t *)icb->reserved_3 - (uint8_t *)icb->add_firmware_options;
4584 while (cnt--)
4585 *dptr1++ = *dptr2++;
0eaaca4c 4586 ha->frame_payload_size = le16_to_cpu(icb->frame_payload_size);
5341e868
AV		 4587 /* Use alternate WWN? */
4588 if (nv->host_p[1] & BIT_7) {
4589 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
4590 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
4591 }
4592
1da177e4
LT		 4593 /* Prepare nodename */
4594 if ((icb->firmware_options[1] & BIT_6) == 0) {
4595 /*
4596 * Firmware will apply the following mask if the nodename was
4597 * not provided.
4598 */
4599 memcpy(icb->node_name, icb->port_name, WWN_SIZE);
4600 icb->node_name[0] &= 0xF0;
4601 }
4602
4603 /*
4604 * Set host adapter parameters.
4605 */
3ce8866c
SK		 4606
4607 /*
4608 * BIT_7 in the host-parameters section allows for modification to
4609 * internal driver logging.
4610 */
0181944f 4611 if (nv->host_p[0] & BIT_7)
cfb0919c 4612 ql2xextended_error_logging = QL_DBG_DEFAULT1_MASK;
1da177e4
LT		 4613 ha->flags.disable_risc_code_load = ((nv->host_p[0] & BIT_4) ? 1 : 0);
4614 /* Always load RISC code on non ISP2[12]00 chips. */
4615 if (!IS_QLA2100(ha) && !IS_QLA2200(ha))
4616 ha->flags.disable_risc_code_load = 0;
4617 ha->flags.enable_lip_reset = ((nv->host_p[1] & BIT_1) ? 1 : 0);
4618 ha->flags.enable_lip_full_login = ((nv->host_p[1] & BIT_2) ? 1 : 0);
4619 ha->flags.enable_target_reset = ((nv->host_p[1] & BIT_3) ? 1 : 0);
06c22bd1 4620 ha->flags.enable_led_scheme = (nv->special_options[1] & BIT_4) ? 1 : 0;
d4c760c2 4621 ha->flags.disable_serdes = 0;
1da177e4
LT		 4622
4623 ha->operating_mode =
4624 (icb->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) >> 4;
4625
4626 memcpy(ha->fw_seriallink_options, nv->seriallink_options,
4627 sizeof(ha->fw_seriallink_options));
4628
4629 /* save HBA serial number */
4630 ha->serial0 = icb->port_name[5];
4631 ha->serial1 = icb->port_name[6];
4632 ha->serial2 = icb->port_name[7];
e315cd28
AC		 4633 memcpy(vha->node_name, icb->node_name, WWN_SIZE);
4634 memcpy(vha->port_name, icb->port_name, WWN_SIZE);
1da177e4 4635
ad950360 4636 icb->execution_throttle = cpu_to_le16(0xFFFF);
1da177e4
LT		 4637
4638 ha->retry_count = nv->retry_count;
4639
4640 /* Set minimum login_timeout to 4 seconds. */
5b91490e 4641 if (nv->login_timeout != ql2xlogintimeout)
1da177e4
LT		 4642 nv->login_timeout = ql2xlogintimeout;
4643 if (nv->login_timeout < 4)
4644 nv->login_timeout = 4;
4645 ha->login_timeout = nv->login_timeout;
1da177e4 4646
00a537b8
AV		 4647 /* Set minimum RATOV to 100 tenths of a second. */
4648 ha->r_a_tov = 100;
1da177e4 4649
1da177e4
LT		 4650 ha->loop_reset_delay = nv->reset_delay;
4651
1da177e4
LT		 4652 /* Link Down Timeout = 0:
4653 *
4654 * When Port Down timer expires we will start returning
4655 * I/O's to OS with "DID_NO_CONNECT".
4656 *
4657 * Link Down Timeout != 0:
4658 *
4659 * The driver waits for the link to come up after link down
4660 * before returning I/Os to OS with "DID_NO_CONNECT".
fa2a1ce5 4661 */
1da177e4
LT		 4662 if (nv->link_down_timeout == 0) {
4663 ha->loop_down_abort_time =
354d6b21 4664 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
1da177e4
LT		 4665 } else {
4666 ha->link_down_timeout = nv->link_down_timeout;
4667 ha->loop_down_abort_time =
4668 (LOOP_DOWN_TIME - ha->link_down_timeout);
fa2a1ce5 4669 }
1da177e4 4670
1da177e4
LT		 4671 /*
4672 * Need enough time to try and get the port back.
4673 */
4674 ha->port_down_retry_count = nv->port_down_retry_count;
4675 if (qlport_down_retry)
4676 ha->port_down_retry_count = qlport_down_retry;
4677 /* Set login_retry_count */
4678 ha->login_retry_count = nv->retry_count;
4679 if (ha->port_down_retry_count == nv->port_down_retry_count &&
4680 ha->port_down_retry_count > 3)
4681 ha->login_retry_count = ha->port_down_retry_count;
4682 else if (ha->port_down_retry_count > (int)ha->login_retry_count)
4683 ha->login_retry_count = ha->port_down_retry_count;
4684 if (ql2xloginretrycount)
4685 ha->login_retry_count = ql2xloginretrycount;
4686
ad950360 4687 icb->lun_enables = cpu_to_le16(0);
1da177e4
LT		 4688 icb->command_resource_count = 0;
4689 icb->immediate_notify_resource_count = 0;
ad950360 4690 icb->timeout = cpu_to_le16(0);
1da177e4
LT		 4691
4692 if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
4693 /* Enable RIO */
4694 icb->firmware_options[0] &= ~BIT_3;
4695 icb->add_firmware_options[0] &=
4696 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0);
4697 icb->add_firmware_options[0] |= BIT_2;
4698 icb->response_accumulation_timer = 3;
4699 icb->interrupt_delay_timer = 5;
4700
e315cd28 4701 vha->flags.process_response_queue = 1;
1da177e4 4702 } else {
4fdfefe5 4703 /* Enable ZIO. */
e315cd28 4704 if (!vha->flags.init_done) {
4fdfefe5
AV		 4705 ha->zio_mode = icb->add_firmware_options[0] &
4706 (BIT_3 | BIT_2 | BIT_1 | BIT_0);
4707 ha->zio_timer = icb->interrupt_delay_timer ?
4708 icb->interrupt_delay_timer: 2;
4709 }
1da177e4
LT		 4710 icb->add_firmware_options[0] &=
4711 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0);
e315cd28 4712 vha->flags.process_response_queue = 0;
4fdfefe5 4713 if (ha->zio_mode != QLA_ZIO_DISABLED) {
4a59f71d 4714 ha->zio_mode = QLA_ZIO_MODE_6;
4715
7c3df132 4716 ql_log(ql_log_info, vha, 0x0068,
4fdfefe5
AV		 4717 "ZIO mode %d enabled; timer delay (%d us).\n",
4718 ha->zio_mode, ha->zio_timer * 100);
1da177e4 4719
4fdfefe5
AV		 4720 icb->add_firmware_options[0] |= (uint8_t)ha->zio_mode;
4721 icb->interrupt_delay_timer = (uint8_t)ha->zio_timer;
e315cd28 4722 vha->flags.process_response_queue = 1;
1da177e4
LT		 4723 }
4724 }
4725
4e08df3f 4726 if (rval) {
7c3df132
SK		 4727 ql_log(ql_log_warn, vha, 0x0069,
4728 "NVRAM configuration failed.\n");
4e08df3f
DM		 4729 }
4730 return (rval);
1da177e4
LT		 4731}
4732
19a7b4ae
JSEC		 4733static void
4734qla2x00_rport_del(void *data)
4735{
4736 fc_port_t *fcport = data;
d97994dc 4737 struct fc_rport *rport;
044d78e1 4738 unsigned long flags;
d97994dc 4739
044d78e1 4740 spin_lock_irqsave(fcport->vha->host->host_lock, flags);
ac280b67 4741 rport = fcport->drport ? fcport->drport: fcport->rport;
d97994dc 4742 fcport->drport = NULL;
044d78e1 4743 spin_unlock_irqrestore(fcport->vha->host->host_lock, flags);
726b8548 4744 if (rport) {
83548fe2
QT		 4745 ql_dbg(ql_dbg_disc, fcport->vha, 0x210b,
4746 "%s %8phN. rport %p roles %x\n",
4747 __func__, fcport->port_name, rport,
4748 rport->roles);
726b8548 4749
d97994dc 4750 fc_remote_port_delete(rport);
726b8548 4751 }
19a7b4ae
JSEC		 4752}
4753
1da177e4
LT		 4754/**
4755 * qla2x00_alloc_fcport() - Allocate a generic fcport.
2db6228d 4756 * @vha: HA context
1da177e4
LT		 4757 * @flags: allocation flags
4758 *
4759 * Returns a pointer to the allocated fcport, or NULL, if none available.
4760 */
9a069e19 4761fc_port_t *
e315cd28 4762qla2x00_alloc_fcport(scsi_qla_host_t *vha, gfp_t flags)
1da177e4
LT		 4763{
4764 fc_port_t *fcport;
4765
bbfbbbc1
MK		 4766 fcport = kzalloc(sizeof(fc_port_t), flags);
4767 if (!fcport)
4768 return NULL;
1da177e4
LT		 4769
4770 /* Setup fcport template structure. */
e315cd28 4771 fcport->vha = vha;
1da177e4
LT		 4772 fcport->port_type = FCT_UNKNOWN;
4773 fcport->loop_id = FC_NO_LOOP_ID;
ec426e10 4774 qla2x00_set_fcport_state(fcport, FCS_UNCONFIGURED);
ad3e0eda 4775 fcport->supported_classes = FC_COS_UNSPECIFIED;
1da177e4 4776
726b8548
QT		 4777 fcport->ct_desc.ct_sns = dma_alloc_coherent(&vha->hw->pdev->dev,
4778 sizeof(struct ct_sns_pkt), &fcport->ct_desc.ct_sns_dma,
6cb3216a 4779 flags);
726b8548
QT		 4780 fcport->disc_state = DSC_DELETED;
4781 fcport->fw_login_state = DSC_LS_PORT_UNAVAIL;
4782 fcport->deleted = QLA_SESS_DELETED;
4783 fcport->login_retry = vha->hw->login_retry_count;
726b8548
QT		 4784 fcport->logout_on_delete = 1;
4785
4786 if (!fcport->ct_desc.ct_sns) {
83548fe2 4787 ql_log(ql_log_warn, vha, 0xd049,
726b8548
QT		 4788 "Failed to allocate ct_sns request.\n");
4789 kfree(fcport);
4790 fcport = NULL;
4791 }
4792 INIT_WORK(&fcport->del_work, qla24xx_delete_sess_fn);
cd4ed6b4 4793 INIT_WORK(&fcport->reg_work, qla_register_fcport_fn);
726b8548
QT		 4794 INIT_LIST_HEAD(&fcport->gnl_entry);
4795 INIT_LIST_HEAD(&fcport->list);
4796
bbfbbbc1 4797 return fcport;
1da177e4
LT		 4798}
4799
726b8548
QT		 4800void
4801qla2x00_free_fcport(fc_port_t *fcport)
4802{
4803 if (fcport->ct_desc.ct_sns) {
4804 dma_free_coherent(&fcport->vha->hw->pdev->dev,
4805 sizeof(struct ct_sns_pkt), fcport->ct_desc.ct_sns,
4806 fcport->ct_desc.ct_sns_dma);
4807
4808 fcport->ct_desc.ct_sns = NULL;
4809 }
4810 kfree(fcport);
4811}
4812
1da177e4
LT		 4813/*
4814 * qla2x00_configure_loop
4815 * Updates Fibre Channel Device Database with what is actually on loop.
4816 *
4817 * Input:
4818 * ha = adapter block pointer.
4819 *
4820 * Returns:
4821 * 0 = success.
4822 * 1 = error.
4823 * 2 = database was full and device was not configured.
4824 */
4825static int
e315cd28 4826qla2x00_configure_loop(scsi_qla_host_t *vha)
1da177e4
LT		 4827{
4828 int rval;
4829 unsigned long flags, save_flags;
e315cd28 4830 struct qla_hw_data *ha = vha->hw;
1da177e4
LT		 4831 rval = QLA_SUCCESS;
4832
4833 /* Get Initiator ID */
e315cd28
AC		 4834 if (test_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags)) {
4835 rval = qla2x00_configure_hba(vha);
1da177e4 4836 if (rval != QLA_SUCCESS) {
7c3df132
SK		 4837 ql_dbg(ql_dbg_disc, vha, 0x2013,
4838 "Unable to configure HBA.\n");
1da177e4
LT		 4839 return (rval);
4840 }
4841 }
4842
e315cd28 4843 save_flags = flags = vha->dpc_flags;
7c3df132
SK		 4844 ql_dbg(ql_dbg_disc, vha, 0x2014,
4845 "Configure loop -- dpc flags = 0x%lx.\n", flags);
1da177e4
LT		 4846
4847 /*
4848 * If we have both an RSCN and PORT UPDATE pending then handle them
4849 * both at the same time.
4850 */
e315cd28
AC		 4851 clear_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
4852 clear_bit(RSCN_UPDATE, &vha->dpc_flags);
1da177e4 4853
3064ff39
MH		 4854 qla2x00_get_data_rate(vha);
4855
1da177e4
LT		 4856 /* Determine what we need to do */
4857 if (ha->current_topology == ISP_CFG_FL &&
4858 (test_bit(LOCAL_LOOP_UPDATE, &flags))) {
4859
1da177e4
LT		 4860 set_bit(RSCN_UPDATE, &flags);
4861
4862 } else if (ha->current_topology == ISP_CFG_F &&
4863 (test_bit(LOCAL_LOOP_UPDATE, &flags))) {
4864
1da177e4
LT		 4865 set_bit(RSCN_UPDATE, &flags);
4866 clear_bit(LOCAL_LOOP_UPDATE, &flags);
21333b48
AV		 4867
4868 } else if (ha->current_topology == ISP_CFG_N) {
4869 clear_bit(RSCN_UPDATE, &flags);
48acad09
QT		 4870 if (qla_tgt_mode_enabled(vha)) {
4871 /* allow the other side to start the login */
9cd883f0
QT		 4872 clear_bit(LOCAL_LOOP_UPDATE, &flags);
4873 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
9cd883f0 4874 }
41dc529a
QT		 4875 } else if (ha->current_topology == ISP_CFG_NL) {
4876 clear_bit(RSCN_UPDATE, &flags);
4877 set_bit(LOCAL_LOOP_UPDATE, &flags);
e315cd28 4878 } else if (!vha->flags.online ||
1da177e4 4879 (test_bit(ABORT_ISP_ACTIVE, &flags))) {
1da177e4
LT		 4880 set_bit(RSCN_UPDATE, &flags);
4881 set_bit(LOCAL_LOOP_UPDATE, &flags);
4882 }
4883
4884 if (test_bit(LOCAL_LOOP_UPDATE, &flags)) {
7c3df132
SK		 4885 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) {
4886 ql_dbg(ql_dbg_disc, vha, 0x2015,
4887 "Loop resync needed, failing.\n");
1da177e4 4888 rval = QLA_FUNCTION_FAILED;
642ef983 4889 } else
e315cd28 4890 rval = qla2x00_configure_local_loop(vha);
1da177e4
LT		 4891 }
4892
4893 if (rval == QLA_SUCCESS && test_bit(RSCN_UPDATE, &flags)) {
7c3df132 4894 if (LOOP_TRANSITION(vha)) {
83548fe2 4895 ql_dbg(ql_dbg_disc, vha, 0x2099,
7c3df132 4896 "Needs RSCN update and loop transition.\n");
1da177e4 4897 rval = QLA_FUNCTION_FAILED;
7c3df132 4898 }
e315cd28
AC		 4899 else
4900 rval = qla2x00_configure_fabric(vha);
1da177e4
LT		 4901 }
4902
4903 if (rval == QLA_SUCCESS) {
e315cd28
AC		 4904 if (atomic_read(&vha->loop_down_timer) ||
4905 test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) {
1da177e4
LT		 4906 rval = QLA_FUNCTION_FAILED;
4907 } else {
e315cd28 4908 atomic_set(&vha->loop_state, LOOP_READY);
7c3df132
SK		 4909 ql_dbg(ql_dbg_disc, vha, 0x2069,
4910 "LOOP READY.\n");
ec7193e2 4911 ha->flags.fw_init_done = 1;
3bb67df5
DKU		 4912
4913 /*
4914 * Process any ATIO queue entries that came in
4915 * while we weren't online.
4916 */
ead03855
QT		 4917 if (qla_tgt_mode_enabled(vha) ||
4918 qla_dual_mode_enabled(vha)) {
1073daa4
QT		 4919 spin_lock_irqsave(&ha->tgt.atio_lock, flags);
4920 qlt_24xx_process_atio_queue(vha, 0);
4921 spin_unlock_irqrestore(&ha->tgt.atio_lock,
4922 flags);
3bb67df5 4923 }
1da177e4
LT		 4924 }
4925 }
4926
4927 if (rval) {
7c3df132
SK		 4928 ql_dbg(ql_dbg_disc, vha, 0x206a,
4929 "%s *** FAILED ***.\n", __func__);
1da177e4 4930 } else {
7c3df132
SK		 4931 ql_dbg(ql_dbg_disc, vha, 0x206b,
4932 "%s: exiting normally.\n", __func__);
1da177e4
LT		 4933 }
4934
cc3ef7bc 4935 /* Restore state if a resync event occurred during processing */
e315cd28 4936 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) {
1da177e4 4937 if (test_bit(LOCAL_LOOP_UPDATE, &save_flags))
e315cd28 4938 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
f4658b6c 4939 if (test_bit(RSCN_UPDATE, &save_flags)) {
e315cd28 4940 set_bit(RSCN_UPDATE, &vha->dpc_flags);
f4658b6c 4941 }
1da177e4
LT		 4942 }
4943
4944 return (rval);
4945}
4946
1da177e4
LT		 4947/*
4948 * qla2x00_configure_local_loop
4949 * Updates Fibre Channel Device Database with local loop devices.
4950 *
4951 * Input:
4952 * ha = adapter block pointer.
4953 *
4954 * Returns:
4955 * 0 = success.
4956 */
4957static int
e315cd28 4958qla2x00_configure_local_loop(scsi_qla_host_t *vha)
1da177e4
LT		 4959{
4960 int rval, rval2;
4961 int found_devs;
4962 int found;
4963 fc_port_t *fcport, *new_fcport;
4964
4965 uint16_t index;
4966 uint16_t entries;
4967 char *id_iter;
4968 uint16_t loop_id;
4969 uint8_t domain, area, al_pa;
e315cd28 4970 struct qla_hw_data *ha = vha->hw;
41dc529a 4971 unsigned long flags;
1da177e4 4972
8777e431
QT		 4973 /* Inititae N2N login. */
4974 if (test_and_clear_bit(N2N_LOGIN_NEEDED, &vha->dpc_flags)) {
4975 /* borrowing */
4976 u32 *bp, i, sz;
4977
4978 memset(ha->init_cb, 0, ha->init_cb_size);
4979 sz = min_t(int, sizeof(struct els_plogi_payload),
4980 ha->init_cb_size);
4981 rval = qla24xx_get_port_login_templ(vha, ha->init_cb_dma,
4982 (void *)ha->init_cb, sz);
4983 if (rval == QLA_SUCCESS) {
4984 bp = (uint32_t *)ha->init_cb;
4985 for (i = 0; i < sz/4 ; i++, bp++)
4986 *bp = cpu_to_be32(*bp);
4987
4988 memcpy(&ha->plogi_els_payld.data, (void *)ha->init_cb,
4989 sizeof(ha->plogi_els_payld.data));
4990 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
4991 } else {
4992 ql_dbg(ql_dbg_init, vha, 0x00d1,
4993 "PLOGI ELS param read fail.\n");
4994 }
4995 return QLA_SUCCESS;
4996 }
4997
1da177e4
LT		 4998 found_devs = 0;
4999 new_fcport = NULL;
642ef983 5000 entries = MAX_FIBRE_DEVICES_LOOP;
1da177e4 5001
1da177e4 5002 /* Get list of logged in devices. */
642ef983 5003 memset(ha->gid_list, 0, qla2x00_gid_list_size(ha));
e315cd28 5004 rval = qla2x00_get_id_list(vha, ha->gid_list, ha->gid_list_dma,
1da177e4
LT		 5005 &entries);
5006 if (rval != QLA_SUCCESS)
5007 goto cleanup_allocation;
5008
83548fe2 5009 ql_dbg(ql_dbg_disc, vha, 0x2011,
7c3df132
SK		 5010 "Entries in ID list (%d).\n", entries);
5011 ql_dump_buffer(ql_dbg_disc + ql_dbg_buffer, vha, 0x2075,
5012 (uint8_t *)ha->gid_list,
5013 entries * sizeof(struct gid_list_info));
1da177e4 5014
9cd883f0
QT		 5015 list_for_each_entry(fcport, &vha->vp_fcports, list) {
5016 fcport->scan_state = QLA_FCPORT_SCAN;
5017 }
5018
1da177e4 5019 /* Allocate temporary fcport for any new fcports discovered. */
e315cd28 5020 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
1da177e4 5021 if (new_fcport == NULL) {
83548fe2 5022 ql_log(ql_log_warn, vha, 0x2012,
7c3df132 5023 "Memory allocation failed for fcport.\n");
1da177e4
LT		 5024 rval = QLA_MEMORY_ALLOC_FAILED;
5025 goto cleanup_allocation;
5026 }
5027 new_fcport->flags &= ~FCF_FABRIC_DEVICE;
5028
1da177e4
LT		 5029 /* Add devices to port list. */
5030 id_iter = (char *)ha->gid_list;
5031 for (index = 0; index < entries; index++) {
5032 domain = ((struct gid_list_info *)id_iter)->domain;
5033 area = ((struct gid_list_info *)id_iter)->area;
5034 al_pa = ((struct gid_list_info *)id_iter)->al_pa;
abbd8870 5035 if (IS_QLA2100(ha) || IS_QLA2200(ha))
1da177e4
LT		 5036 loop_id = (uint16_t)
5037 ((struct gid_list_info *)id_iter)->loop_id_2100;
abbd8870 5038 else
1da177e4
LT		 5039 loop_id = le16_to_cpu(
5040 ((struct gid_list_info *)id_iter)->loop_id);
abbd8870 5041 id_iter += ha->gid_list_info_size;
1da177e4
LT		 5042
5043 /* Bypass reserved domain fields. */
5044 if ((domain & 0xf0) == 0xf0)
5045 continue;
5046
5047 /* Bypass if not same domain and area of adapter. */
f7d289f6 5048 if (area && domain &&
e315cd28 5049 (area != vha->d_id.b.area || domain != vha->d_id.b.domain))
1da177e4
LT		 5050 continue;
5051
5052 /* Bypass invalid local loop ID. */
5053 if (loop_id > LAST_LOCAL_LOOP_ID)
5054 continue;
5055
41dc529a 5056 memset(new_fcport->port_name, 0, WWN_SIZE);
370d550e 5057
1da177e4
LT		 5058 /* Fill in member data. */
5059 new_fcport->d_id.b.domain = domain;
5060 new_fcport->d_id.b.area = area;
5061 new_fcport->d_id.b.al_pa = al_pa;
5062 new_fcport->loop_id = loop_id;
9cd883f0 5063 new_fcport->scan_state = QLA_FCPORT_FOUND;
41dc529a 5064
e315cd28 5065 rval2 = qla2x00_get_port_database(vha, new_fcport, 0);
1da177e4 5066 if (rval2 != QLA_SUCCESS) {
83548fe2 5067 ql_dbg(ql_dbg_disc, vha, 0x2097,
7c3df132
SK		 5068 "Failed to retrieve fcport information "
5069 "-- get_port_database=%x, loop_id=0x%04x.\n",
5070 rval2, new_fcport->loop_id);
edd05de1
DG		 5071 /* Skip retry if N2N */
5072 if (ha->current_topology != ISP_CFG_N) {
5073 ql_dbg(ql_dbg_disc, vha, 0x2105,
5074 "Scheduling resync.\n");
5075 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
5076 continue;
5077 }
1da177e4
LT		 5078 }
5079
41dc529a 5080 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
1da177e4
LT		 5081 /* Check for matching device in port list. */
5082 found = 0;
5083 fcport = NULL;
e315cd28 5084 list_for_each_entry(fcport, &vha->vp_fcports, list) {
1da177e4
LT		 5085 if (memcmp(new_fcport->port_name, fcport->port_name,
5086 WWN_SIZE))
5087 continue;
5088
ddb9b126 5089 fcport->flags &= ~FCF_FABRIC_DEVICE;
1da177e4
LT		 5090 fcport->loop_id = new_fcport->loop_id;
5091 fcport->port_type = new_fcport->port_type;
5092 fcport->d_id.b24 = new_fcport->d_id.b24;
5093 memcpy(fcport->node_name, new_fcport->node_name,
5094 WWN_SIZE);
9cd883f0 5095 fcport->scan_state = QLA_FCPORT_FOUND;
1da177e4
LT		 5096 found++;
5097 break;
5098 }
5099
5100 if (!found) {
5101 /* New device, add to fcports list. */
e315cd28 5102 list_add_tail(&new_fcport->list, &vha->vp_fcports);
1da177e4
LT		 5103
5104 /* Allocate a new replacement fcport. */
5105 fcport = new_fcport;
41dc529a
QT		 5106
5107 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
5108
e315cd28 5109 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
41dc529a 5110
1da177e4 5111 if (new_fcport == NULL) {
83548fe2 5112 ql_log(ql_log_warn, vha, 0xd031,
7c3df132 5113 "Failed to allocate memory for fcport.\n");
1da177e4
LT		 5114 rval = QLA_MEMORY_ALLOC_FAILED;
5115 goto cleanup_allocation;
5116 }
41dc529a 5117 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
1da177e4
LT		 5118 new_fcport->flags &= ~FCF_FABRIC_DEVICE;
5119 }
5120
41dc529a
QT		 5121 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
5122
d8b45213 5123 /* Base iIDMA settings on HBA port speed. */
a3cbdfad 5124 fcport->fp_speed = ha->link_data_rate;
d8b45213 5125
1da177e4
LT		 5126 found_devs++;
5127 }
5128
9cd883f0
QT		 5129 list_for_each_entry(fcport, &vha->vp_fcports, list) {
5130 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
5131 break;
5132
5133 if (fcport->scan_state == QLA_FCPORT_SCAN) {
5134 if ((qla_dual_mode_enabled(vha) ||
5135 qla_ini_mode_enabled(vha)) &&
5136 atomic_read(&fcport->state) == FCS_ONLINE) {
5137 qla2x00_mark_device_lost(vha, fcport,
5138 ql2xplogiabsentdevice, 0);
5139 if (fcport->loop_id != FC_NO_LOOP_ID &&
5140 (fcport->flags & FCF_FCP2_DEVICE) == 0 &&
5141 fcport->port_type != FCT_INITIATOR &&
5142 fcport->port_type != FCT_BROADCAST) {
5143 ql_dbg(ql_dbg_disc, vha, 0x20f0,
5144 "%s %d %8phC post del sess\n",
5145 __func__, __LINE__,
5146 fcport->port_name);
5147
d8630bb9 5148 qlt_schedule_sess_for_deletion(fcport);
9cd883f0
QT		 5149 continue;
5150 }
5151 }
5152 }
5153
5154 if (fcport->scan_state == QLA_FCPORT_FOUND)
5155 qla24xx_fcport_handle_login(vha, fcport);
5156 }
5157
1da177e4 5158cleanup_allocation:
c9475cb0 5159 kfree(new_fcport);
1da177e4
LT		 5160
5161 if (rval != QLA_SUCCESS) {
83548fe2 5162 ql_dbg(ql_dbg_disc, vha, 0x2098,
7c3df132 5163 "Configure local loop error exit: rval=%x.\n", rval);
1da177e4
LT		 5164 }
5165
1da177e4
LT		 5166 return (rval);
5167}
5168
d8b45213 5169static void
e315cd28 5170qla2x00_iidma_fcport(scsi_qla_host_t *vha, fc_port_t *fcport)
d8b45213 5171{
d8b45213 5172 int rval;
93f2bd67 5173 uint16_t mb[MAILBOX_REGISTER_COUNT];
e315cd28 5174 struct qla_hw_data *ha = vha->hw;
d8b45213 5175
c76f2c01 5176 if (!IS_IIDMA_CAPABLE(ha))
d8b45213
AV		 5177 return;
5178
c9afb9a2
GM		 5179 if (atomic_read(&fcport->state) != FCS_ONLINE)
5180 return;
5181
39bd9622 5182 if (fcport->fp_speed == PORT_SPEED_UNKNOWN ||
413c2f33
HM		 5183 fcport->fp_speed > ha->link_data_rate ||
5184 !ha->flags.gpsc_supported)
d8b45213
AV		 5185 return;
5186
e315cd28 5187 rval = qla2x00_set_idma_speed(vha, fcport->loop_id, fcport->fp_speed,
a3cbdfad 5188 mb);
d8b45213 5189 if (rval != QLA_SUCCESS) {
7c3df132 5190 ql_dbg(ql_dbg_disc, vha, 0x2004,
7b833558
OK		 5191 "Unable to adjust iIDMA %8phN -- %04x %x %04x %04x.\n",
5192 fcport->port_name, rval, fcport->fp_speed, mb[0], mb[1]);
d8b45213 5193 } else {
7c3df132 5194 ql_dbg(ql_dbg_disc, vha, 0x2005,
33b28357 5195 "iIDMA adjusted to %s GB/s (%X) on %8phN.\n",
d0297c9a 5196 qla2x00_get_link_speed_str(ha, fcport->fp_speed),
33b28357 5197 fcport->fp_speed, fcport->port_name);
d8b45213
AV		 5198 }
5199}
5200
cc28e0ac
QT		 5201void qla_do_iidma_work(struct scsi_qla_host *vha, fc_port_t *fcport)
5202{
5203 qla2x00_iidma_fcport(vha, fcport);
5204 qla24xx_update_fcport_fcp_prio(vha, fcport);
5205}
5206
5207int qla_post_iidma_work(struct scsi_qla_host *vha, fc_port_t *fcport)
5208{
5209 struct qla_work_evt *e;
5210
5211 e = qla2x00_alloc_work(vha, QLA_EVT_IIDMA);
5212 if (!e)
5213 return QLA_FUNCTION_FAILED;
5214
5215 e->u.fcport.fcport = fcport;
5216 return qla2x00_post_work(vha, e);
5217}
5218
726b8548 5219/* qla2x00_reg_remote_port is reserved for Initiator Mode only.*/
23be331d 5220static void
e315cd28 5221qla2x00_reg_remote_port(scsi_qla_host_t *vha, fc_port_t *fcport)
8482e118 5222{
5223 struct fc_rport_identifiers rport_ids;
bdf79621 5224 struct fc_rport *rport;
044d78e1 5225 unsigned long flags;
8482e118 5226
b63d8b89
QT		 5227 if (atomic_read(&fcport->state) == FCS_ONLINE)
5228 return;
5229
f8b02a85
AV		 5230 rport_ids.node_name = wwn_to_u64(fcport->node_name);
5231 rport_ids.port_name = wwn_to_u64(fcport->port_name);
8482e118 5232 rport_ids.port_id = fcport->d_id.b.domain << 16 |
5233 fcport->d_id.b.area << 8 | fcport->d_id.b.al_pa;
77d74143 5234 rport_ids.roles = FC_RPORT_ROLE_UNKNOWN;
e315cd28 5235 fcport->rport = rport = fc_remote_port_add(vha->host, 0, &rport_ids);
77d74143 5236 if (!rport) {
7c3df132
SK		 5237 ql_log(ql_log_warn, vha, 0x2006,
5238 "Unable to allocate fc remote port.\n");
77d74143
AV		 5239 return;
5240 }
2d70c103 5241
044d78e1 5242 spin_lock_irqsave(fcport->vha->host->host_lock, flags);
19a7b4ae 5243 *((fc_port_t **)rport->dd_data) = fcport;
044d78e1 5244 spin_unlock_irqrestore(fcport->vha->host->host_lock, flags);
d97994dc 5245
ad3e0eda 5246 rport->supported_classes = fcport->supported_classes;
77d74143 5247
8482e118 5248 rport_ids.roles = FC_RPORT_ROLE_UNKNOWN;
5249 if (fcport->port_type == FCT_INITIATOR)
5250 rport_ids.roles |= FC_RPORT_ROLE_FCP_INITIATOR;
5251 if (fcport->port_type == FCT_TARGET)
5252 rport_ids.roles |= FC_RPORT_ROLE_FCP_TARGET;
726b8548 5253
83548fe2
QT		 5254 ql_dbg(ql_dbg_disc, vha, 0x20ee,
5255 "%s %8phN. rport %p is %s mode\n",
5256 __func__, fcport->port_name, rport,
5257 (fcport->port_type == FCT_TARGET) ? "tgt" : "ini");
726b8548 5258
77d74143 5259 fc_remote_port_rolechg(rport, rport_ids.roles);
1da177e4
LT		 5260}
5261
23be331d
AB		 5262/*
5263 * qla2x00_update_fcport
5264 * Updates device on list.
5265 *
5266 * Input:
5267 * ha = adapter block pointer.
5268 * fcport = port structure pointer.
5269 *
5270 * Return:
5271 * 0 - Success
5272 * BIT_0 - error
5273 *
5274 * Context:
5275 * Kernel context.
5276 */
5277void
e315cd28 5278qla2x00_update_fcport(scsi_qla_host_t *vha, fc_port_t *fcport)
23be331d 5279{
726b8548
QT		 5280 if (IS_SW_RESV_ADDR(fcport->d_id))
5281 return;
5282
cd4ed6b4
QT		 5283 ql_dbg(ql_dbg_disc, vha, 0x20ef, "%s %8phC\n",
5284 __func__, fcport->port_name);
5285
5286 fcport->disc_state = DSC_UPD_FCPORT;
5287 fcport->login_retry = vha->hw->login_retry_count;
b63d8b89 5288 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT);
b63d8b89
QT		 5289 fcport->deleted = 0;
5290 fcport->logout_on_delete = 1;
5291 fcport->login_retry = vha->hw->login_retry_count;
8777e431 5292 fcport->n2n_chip_reset = fcport->n2n_link_reset_cnt = 0;
23be331d 5293
dbe18018
DT		 5294 qla2x00_iidma_fcport(vha, fcport);
5295
8777e431
QT		 5296 switch (vha->hw->current_topology) {
5297 case ISP_CFG_N:
5298 case ISP_CFG_NL:
5299 fcport->keep_nport_handle = 1;
5300 break;
5301 default:
5302 break;
5303 }
5304
e84067d7
DG		 5305 if (fcport->fc4f_nvme) {
5306 qla_nvme_register_remote(vha, fcport);
b63d8b89
QT		 5307 fcport->disc_state = DSC_LOGIN_COMPLETE;
5308 qla2x00_set_fcport_state(fcport, FCS_ONLINE);
e84067d7
DG		 5309 return;
5310 }
5311
21090cbe 5312 qla24xx_update_fcport_fcp_prio(vha, fcport);
d20ed91b 5313
726b8548
QT		 5314 switch (vha->host->active_mode) {
5315 case MODE_INITIATOR:
d20ed91b 5316 qla2x00_reg_remote_port(vha, fcport);
726b8548
QT		 5317 break;
5318 case MODE_TARGET:
5319 if (!vha->vha_tgt.qla_tgt->tgt_stop &&
5320 !vha->vha_tgt.qla_tgt->tgt_stopped)
5321 qlt_fc_port_added(vha, fcport);
5322 break;
5323 case MODE_DUAL:
d20ed91b 5324 qla2x00_reg_remote_port(vha, fcport);
726b8548
QT		 5325 if (!vha->vha_tgt.qla_tgt->tgt_stop &&
5326 !vha->vha_tgt.qla_tgt->tgt_stopped)
5327 qlt_fc_port_added(vha, fcport);
5328 break;
5329 default:
5330 break;
d20ed91b 5331 }
cc28e0ac
QT		 5332
5333 if (IS_IIDMA_CAPABLE(vha->hw) && vha->hw->flags.gpsc_supported) {
5334 if (fcport->id_changed) {
5335 fcport->id_changed = 0;
5336 ql_dbg(ql_dbg_disc, vha, 0x20d7,
5337 "%s %d %8phC post gfpnid fcp_cnt %d\n",
5338 __func__, __LINE__, fcport->port_name,
5339 vha->fcport_count);
5340 qla24xx_post_gfpnid_work(vha, fcport);
5341 } else {
5342 ql_dbg(ql_dbg_disc, vha, 0x20d7,
5343 "%s %d %8phC post gpsc fcp_cnt %d\n",
5344 __func__, __LINE__, fcport->port_name,
5345 vha->fcport_count);
5346 qla24xx_post_gpsc_work(vha, fcport);
5347 }
5348 }
b63d8b89 5349 qla2x00_set_fcport_state(fcport, FCS_ONLINE);
cd4ed6b4
QT		 5350
5351 fcport->disc_state = DSC_LOGIN_COMPLETE;
5352}
5353
5354void qla_register_fcport_fn(struct work_struct *work)
5355{
5356 fc_port_t *fcport = container_of(work, struct fc_port, reg_work);
5357 u32 rscn_gen = fcport->rscn_gen;
5358 u16 data[2];
5359
5360 if (IS_SW_RESV_ADDR(fcport->d_id))
5361 return;
5362
5363 qla2x00_update_fcport(fcport->vha, fcport);
5364
5365 if (rscn_gen != fcport->rscn_gen) {
5366 /* RSCN(s) came in while registration */
5367 switch (fcport->next_disc_state) {
5368 case DSC_DELETE_PEND:
5369 qlt_schedule_sess_for_deletion(fcport);
5370 break;
5371 case DSC_ADISC:
5372 data[0] = data[1] = 0;
5373 qla2x00_post_async_adisc_work(fcport->vha, fcport,
5374 data);
5375 break;
5376 default:
5377 break;
5378 }
5379 }
23be331d
AB		 5380}
5381
1da177e4
LT		 5382/*
5383 * qla2x00_configure_fabric
5384 * Setup SNS devices with loop ID's.
5385 *
5386 * Input:
5387 * ha = adapter block pointer.
5388 *
5389 * Returns:
5390 * 0 = success.
5391 * BIT_0 = error
5392 */
5393static int
e315cd28 5394qla2x00_configure_fabric(scsi_qla_host_t *vha)
1da177e4 5395{
b3b02e6e 5396 int rval;
726b8548 5397 fc_port_t *fcport;
1da177e4 5398 uint16_t mb[MAILBOX_REGISTER_COUNT];
0107109e 5399 uint16_t loop_id;
1da177e4 5400 LIST_HEAD(new_fcports);
e315cd28 5401 struct qla_hw_data *ha = vha->hw;
df673274 5402 int discovery_gen;
1da177e4
LT		 5403
5404 /* If FL port exists, then SNS is present */
e428924c 5405 if (IS_FWI2_CAPABLE(ha))
0107109e
AV		 5406 loop_id = NPH_F_PORT;
5407 else
5408 loop_id = SNS_FL_PORT;
e315cd28 5409 rval = qla2x00_get_port_name(vha, loop_id, vha->fabric_node_name, 1);
1da177e4 5410 if (rval != QLA_SUCCESS) {
83548fe2 5411 ql_dbg(ql_dbg_disc, vha, 0x20a0,
7c3df132 5412 "MBX_GET_PORT_NAME failed, No FL Port.\n");
1da177e4 5413
e315cd28 5414 vha->device_flags &= ~SWITCH_FOUND;
1da177e4
LT		 5415 return (QLA_SUCCESS);
5416 }
e315cd28 5417 vha->device_flags |= SWITCH_FOUND;
1da177e4 5418
41dc529a
QT		 5419
5420 if (qla_tgt_mode_enabled(vha) || qla_dual_mode_enabled(vha)) {
5421 rval = qla2x00_send_change_request(vha, 0x3, 0);
5422 if (rval != QLA_SUCCESS)
5423 ql_log(ql_log_warn, vha, 0x121,
5424 "Failed to enable receiving of RSCN requests: 0x%x.\n",
5425 rval);
5426 }
5427
5428
1da177e4 5429 do {
726b8548
QT		 5430 qla2x00_mgmt_svr_login(vha);
5431
cca5335c
AV		 5432 /* FDMI support. */
5433 if (ql2xfdmienable &&
e315cd28
AC		 5434 test_and_clear_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags))
5435 qla2x00_fdmi_register(vha);
cca5335c 5436
1da177e4 5437 /* Ensure we are logged into the SNS. */
a14c7711 5438 loop_id = NPH_SNS_LID(ha);
0b91d116
CD		 5439 rval = ha->isp_ops->fabric_login(vha, loop_id, 0xff, 0xff,
5440 0xfc, mb, BIT_1|BIT_0);
a14c7711
JC		 5441 if (rval != QLA_SUCCESS || mb[0] != MBS_COMMAND_COMPLETE) {
5442 ql_dbg(ql_dbg_disc, vha, 0x20a1,
5443 "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x mb[2]=%x mb[6]=%x mb[7]=%x (%x).\n",
5444 loop_id, mb[0], mb[1], mb[2], mb[6], mb[7], rval);
0b91d116 5445 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
e452ceb6 5446 return rval;
0b91d116 5447 }
e315cd28
AC		 5448 if (test_and_clear_bit(REGISTER_FC4_NEEDED, &vha->dpc_flags)) {
5449 if (qla2x00_rft_id(vha)) {
1da177e4 5450 /* EMPTY */
83548fe2 5451 ql_dbg(ql_dbg_disc, vha, 0x20a2,
7c3df132 5452 "Register FC-4 TYPE failed.\n");
b98ae0d7
QT		 5453 if (test_bit(LOOP_RESYNC_NEEDED,
5454 &vha->dpc_flags))
5455 break;
1da177e4 5456 }
d3bae931 5457 if (qla2x00_rff_id(vha, FC4_TYPE_FCP_SCSI)) {
1da177e4 5458 /* EMPTY */
83548fe2 5459 ql_dbg(ql_dbg_disc, vha, 0x209a,
7c3df132 5460 "Register FC-4 Features failed.\n");
b98ae0d7
QT		 5461 if (test_bit(LOOP_RESYNC_NEEDED,
5462 &vha->dpc_flags))
5463 break;
1da177e4 5464 }
d3bae931
DG		 5465 if (vha->flags.nvme_enabled) {
5466 if (qla2x00_rff_id(vha, FC_TYPE_NVME)) {
5467 ql_dbg(ql_dbg_disc, vha, 0x2049,
5468 "Register NVME FC Type Features failed.\n");
5469 }
5470 }
e315cd28 5471 if (qla2x00_rnn_id(vha)) {
1da177e4 5472 /* EMPTY */
83548fe2 5473 ql_dbg(ql_dbg_disc, vha, 0x2104,
7c3df132 5474 "Register Node Name failed.\n");
b98ae0d7
QT		 5475 if (test_bit(LOOP_RESYNC_NEEDED,
5476 &vha->dpc_flags))
5477 break;
e315cd28 5478 } else if (qla2x00_rsnn_nn(vha)) {
1da177e4 5479 /* EMPTY */
83548fe2 5480 ql_dbg(ql_dbg_disc, vha, 0x209b,
0bf0efa1 5481 "Register Symbolic Node Name failed.\n");
b98ae0d7
QT		 5482 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
5483 break;
1da177e4
LT		 5484 }
5485 }
5486
827210ba 5487
df673274
AP		 5488 /* Mark the time right before querying FW for connected ports.
5489 * This process is long, asynchronous and by the time it's done,
5490 * collected information might not be accurate anymore. E.g.
5491 * disconnected port might have re-connected and a brand new
5492 * session has been created. In this case session's generation
5493 * will be newer than discovery_gen. */
5494 qlt_do_generation_tick(vha, &discovery_gen);
5495
a4239945 5496 if (USE_ASYNC_SCAN(ha)) {
33b28357
QT		 5497 rval = qla24xx_async_gpnft(vha, FC4_TYPE_FCP_SCSI,
5498 NULL);
a4239945
QT		 5499 if (rval)
5500 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
5501 } else {
f352eeb7
QT		 5502 list_for_each_entry(fcport, &vha->vp_fcports, list)
5503 fcport->scan_state = QLA_FCPORT_SCAN;
5504
a4239945
QT		 5505 rval = qla2x00_find_all_fabric_devs(vha);
5506 }
1da177e4
LT		 5507 if (rval != QLA_SUCCESS)
5508 break;
1da177e4
LT		 5509 } while (0);
5510
e84067d7
DG		 5511 if (!vha->nvme_local_port && vha->flags.nvme_enabled)
5512 qla_nvme_register_hba(vha);
5513
726b8548 5514 if (rval)
7c3df132
SK		 5515 ql_dbg(ql_dbg_disc, vha, 0x2068,
5516 "Configure fabric error exit rval=%d.\n", rval);
1da177e4
LT		 5517
5518 return (rval);
5519}
5520
1da177e4
LT		 5521/*
5522 * qla2x00_find_all_fabric_devs
5523 *
5524 * Input:
5525 * ha = adapter block pointer.
5526 * dev = database device entry pointer.
5527 *
5528 * Returns:
5529 * 0 = success.
5530 *
5531 * Context:
5532 * Kernel context.
5533 */
5534static int
726b8548 5535qla2x00_find_all_fabric_devs(scsi_qla_host_t *vha)
1da177e4
LT		 5536{
5537 int rval;
5538 uint16_t loop_id;
726b8548 5539 fc_port_t *fcport, *new_fcport;
1da177e4
LT		 5540 int found;
5541
5542 sw_info_t *swl;
5543 int swl_idx;
5544 int first_dev, last_dev;
1516ef44 5545 port_id_t wrap = {}, nxt_d_id;
e315cd28 5546 struct qla_hw_data *ha = vha->hw;
bb4cf5b7 5547 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
726b8548 5548 unsigned long flags;
1da177e4
LT		 5549
5550 rval = QLA_SUCCESS;
5551
5552 /* Try GID_PT to get device list, else GAN. */
7a67735b 5553 if (!ha->swl)
642ef983 5554 ha->swl = kcalloc(ha->max_fibre_devices, sizeof(sw_info_t),
7a67735b
AV		 5555 GFP_KERNEL);
5556 swl = ha->swl;
bbfbbbc1 5557 if (!swl) {
1da177e4 5558 /*EMPTY*/
83548fe2 5559 ql_dbg(ql_dbg_disc, vha, 0x209c,
7c3df132 5560 "GID_PT allocations failed, fallback on GA_NXT.\n");
1da177e4 5561 } else {
642ef983 5562 memset(swl, 0, ha->max_fibre_devices * sizeof(sw_info_t));
e315cd28 5563 if (qla2x00_gid_pt(vha, swl) != QLA_SUCCESS) {
1da177e4 5564 swl = NULL;
b98ae0d7
QT		 5565 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
5566 return rval;
e315cd28 5567 } else if (qla2x00_gpn_id(vha, swl) != QLA_SUCCESS) {
1da177e4 5568 swl = NULL;
b98ae0d7
QT		 5569 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
5570 return rval;
e315cd28 5571 } else if (qla2x00_gnn_id(vha, swl) != QLA_SUCCESS) {
1da177e4 5572 swl = NULL;
b98ae0d7
QT		 5573 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
5574 return rval;
726b8548
QT		 5575 } else if (qla2x00_gfpn_id(vha, swl) != QLA_SUCCESS) {
5576 swl = NULL;
b98ae0d7
QT		 5577 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
5578 return rval;
1da177e4 5579 }
e8c72ba5
CD		 5580
5581 /* If other queries succeeded probe for FC-4 type */
b98ae0d7 5582 if (swl) {
e8c72ba5 5583 qla2x00_gff_id(vha, swl);
b98ae0d7
QT		 5584 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
5585 return rval;
5586 }
1da177e4
LT		 5587 }
5588 swl_idx = 0;
5589
5590 /* Allocate temporary fcport for any new fcports discovered. */
e315cd28 5591 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
1da177e4 5592 if (new_fcport == NULL) {
83548fe2 5593 ql_log(ql_log_warn, vha, 0x209d,
7c3df132 5594 "Failed to allocate memory for fcport.\n");
1da177e4
LT		 5595 return (QLA_MEMORY_ALLOC_FAILED);
5596 }
5597 new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED);
1da177e4
LT		 5598 /* Set start port ID scan at adapter ID. */
5599 first_dev = 1;
5600 last_dev = 0;
5601
5602 /* Starting free loop ID. */
e315cd28
AC		 5603 loop_id = ha->min_external_loopid;
5604 for (; loop_id <= ha->max_loop_id; loop_id++) {
5605 if (qla2x00_is_reserved_id(vha, loop_id))
1da177e4
LT		 5606 continue;
5607
3a6478df
GM		 5608 if (ha->current_topology == ISP_CFG_FL &&
5609 (atomic_read(&vha->loop_down_timer) ||
5610 LOOP_TRANSITION(vha))) {
bb2d52b2
AV		 5611 atomic_set(&vha->loop_down_timer, 0);
5612 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
5613 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
1da177e4 5614 break;
bb2d52b2 5615 }
1da177e4
LT		 5616
5617 if (swl != NULL) {
5618 if (last_dev) {
5619 wrap.b24 = new_fcport->d_id.b24;
5620 } else {
5621 new_fcport->d_id.b24 = swl[swl_idx].d_id.b24;
5622 memcpy(new_fcport->node_name,
5623 swl[swl_idx].node_name, WWN_SIZE);
5624 memcpy(new_fcport->port_name,
5625 swl[swl_idx].port_name, WWN_SIZE);
d8b45213
AV		 5626 memcpy(new_fcport->fabric_port_name,
5627 swl[swl_idx].fabric_port_name, WWN_SIZE);
5628 new_fcport->fp_speed = swl[swl_idx].fp_speed;
e8c72ba5 5629 new_fcport->fc4_type = swl[swl_idx].fc4_type;
1da177e4 5630
a5d42f4c 5631 new_fcport->nvme_flag = 0;
1a28faa0 5632 new_fcport->fc4f_nvme = 0;
a5d42f4c
DG		 5633 if (vha->flags.nvme_enabled &&
5634 swl[swl_idx].fc4f_nvme) {
5635 new_fcport->fc4f_nvme =
5636 swl[swl_idx].fc4f_nvme;
5637 ql_log(ql_log_info, vha, 0x2131,
5638 "FOUND: NVME port %8phC as FC Type 28h\n",
5639 new_fcport->port_name);
5640 }
5641
1da177e4
LT		 5642 if (swl[swl_idx].d_id.b.rsvd_1 != 0) {
5643 last_dev = 1;
5644 }
5645 swl_idx++;
5646 }
5647 } else {
5648 /* Send GA_NXT to the switch */
e315cd28 5649 rval = qla2x00_ga_nxt(vha, new_fcport);
1da177e4 5650 if (rval != QLA_SUCCESS) {
83548fe2 5651 ql_log(ql_log_warn, vha, 0x209e,
7c3df132
SK		 5652 "SNS scan failed -- assuming "
5653 "zero-entry result.\n");
1da177e4
LT		 5654 rval = QLA_SUCCESS;
5655 break;
5656 }
5657 }
5658
5659 /* If wrap on switch device list, exit. */
5660 if (first_dev) {
5661 wrap.b24 = new_fcport->d_id.b24;
5662 first_dev = 0;
5663 } else if (new_fcport->d_id.b24 == wrap.b24) {
83548fe2 5664 ql_dbg(ql_dbg_disc, vha, 0x209f,
7c3df132
SK		 5665 "Device wrap (%02x%02x%02x).\n",
5666 new_fcport->d_id.b.domain,
5667 new_fcport->d_id.b.area,
5668 new_fcport->d_id.b.al_pa);
1da177e4
LT		 5669 break;
5670 }
5671
2c3dfe3f 5672 /* Bypass if same physical adapter. */
e315cd28 5673 if (new_fcport->d_id.b24 == base_vha->d_id.b24)
1da177e4
LT		 5674 continue;
5675
2c3dfe3f 5676 /* Bypass virtual ports of the same host. */
bb4cf5b7
CD		 5677 if (qla2x00_is_a_vp_did(vha, new_fcport->d_id.b24))
5678 continue;
2c3dfe3f 5679
f7d289f6
AV		 5680 /* Bypass if same domain and area of adapter. */
5681 if (((new_fcport->d_id.b24 & 0xffff00) ==
e315cd28 5682 (vha->d_id.b24 & 0xffff00)) && ha->current_topology ==
f7d289f6
AV		 5683 ISP_CFG_FL)
5684 continue;
5685
1da177e4
LT		 5686 /* Bypass reserved domain fields. */
5687 if ((new_fcport->d_id.b.domain & 0xf0) == 0xf0)
5688 continue;
5689
e8c72ba5 5690 /* Bypass ports whose FCP-4 type is not FCP_SCSI */
4da26e16
CD		 5691 if (ql2xgffidenable &&
5692 (new_fcport->fc4_type != FC4_TYPE_FCP_SCSI &&
5693 new_fcport->fc4_type != FC4_TYPE_UNKNOWN))
e8c72ba5
CD		 5694 continue;
5695
726b8548
QT		 5696 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
5697
1da177e4
LT		 5698 /* Locate matching device in database. */
5699 found = 0;
e315cd28 5700 list_for_each_entry(fcport, &vha->vp_fcports, list) {
1da177e4
LT		 5701 if (memcmp(new_fcport->port_name, fcport->port_name,
5702 WWN_SIZE))
5703 continue;
5704
827210ba 5705 fcport->scan_state = QLA_FCPORT_FOUND;
b3b02e6e 5706
1da177e4
LT		 5707 found++;
5708
d8b45213
AV		 5709 /* Update port state. */
5710 memcpy(fcport->fabric_port_name,
5711 new_fcport->fabric_port_name, WWN_SIZE);
5712 fcport->fp_speed = new_fcport->fp_speed;
5713
1da177e4 5714 /*
b2032fd5
RD		 5715 * If address the same and state FCS_ONLINE
5716 * (or in target mode), nothing changed.
1da177e4
LT		 5717 */
5718 if (fcport->d_id.b24 == new_fcport->d_id.b24 &&
b2032fd5 5719 (atomic_read(&fcport->state) == FCS_ONLINE ||
726b8548 5720 (vha->host->active_mode == MODE_TARGET))) {
1da177e4
LT		 5721 break;
5722 }
5723
5724 /*
5725 * If device was not a fabric device before.
5726 */
5727 if ((fcport->flags & FCF_FABRIC_DEVICE) == 0) {
5728 fcport->d_id.b24 = new_fcport->d_id.b24;
5f16b331 5729 qla2x00_clear_loop_id(fcport);
1da177e4
LT		 5730 fcport->flags |= (FCF_FABRIC_DEVICE |
5731 FCF_LOGIN_NEEDED);
1da177e4
LT		 5732 break;
5733 }
5734
5735 /*
5736 * Port ID changed or device was marked to be updated;
5737 * Log it out if still logged in and mark it for
5738 * relogin later.
5739 */
726b8548 5740 if (qla_tgt_mode_enabled(base_vha)) {
b2032fd5
RD		 5741 ql_dbg(ql_dbg_tgt_mgt, vha, 0xf080,
5742 "port changed FC ID, %8phC"
5743 " old %x:%x:%x (loop_id 0x%04x)-> new %x:%x:%x\n",
5744 fcport->port_name,
5745 fcport->d_id.b.domain,
5746 fcport->d_id.b.area,
5747 fcport->d_id.b.al_pa,
5748 fcport->loop_id,
5749 new_fcport->d_id.b.domain,
5750 new_fcport->d_id.b.area,
5751 new_fcport->d_id.b.al_pa);
5752 fcport->d_id.b24 = new_fcport->d_id.b24;
5753 break;
5754 }
5755
1da177e4
LT		 5756 fcport->d_id.b24 = new_fcport->d_id.b24;
5757 fcport->flags |= FCF_LOGIN_NEEDED;
1da177e4
LT		 5758 break;
5759 }
5760
9dd9686b
DT		 5761 if (fcport->fc4f_nvme) {
5762 if (fcport->disc_state == DSC_DELETE_PEND) {
5763 fcport->disc_state = DSC_GNL;
5764 vha->fcport_count--;
5765 fcport->login_succ = 0;
5766 }
5767 }
5768
726b8548
QT		 5769 if (found) {
5770 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
1da177e4 5771 continue;
726b8548 5772 }
1da177e4 5773 /* If device was not in our fcports list, then add it. */
b2032fd5 5774 new_fcport->scan_state = QLA_FCPORT_FOUND;
726b8548
QT		 5775 list_add_tail(&new_fcport->list, &vha->vp_fcports);
5776
5777 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
5778
1da177e4
LT		 5779
5780 /* Allocate a new replacement fcport. */
5781 nxt_d_id.b24 = new_fcport->d_id.b24;
e315cd28 5782 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
1da177e4 5783 if (new_fcport == NULL) {
83548fe2 5784 ql_log(ql_log_warn, vha, 0xd032,
7c3df132 5785 "Memory allocation failed for fcport.\n");
1da177e4
LT		 5786 return (QLA_MEMORY_ALLOC_FAILED);
5787 }
5788 new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED);
5789 new_fcport->d_id.b24 = nxt_d_id.b24;
5790 }
5791
726b8548
QT		 5792 qla2x00_free_fcport(new_fcport);
5793
5794 /*
5795 * Logout all previous fabric dev marked lost, except FCP2 devices.
5796 */
5797 list_for_each_entry(fcport, &vha->vp_fcports, list) {
5798 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
5799 break;
5800
5801 if ((fcport->flags & FCF_FABRIC_DEVICE) == 0 ||
5802 (fcport->flags & FCF_LOGIN_NEEDED) == 0)
5803 continue;
5804
5805 if (fcport->scan_state == QLA_FCPORT_SCAN) {
5806 if ((qla_dual_mode_enabled(vha) ||
5807 qla_ini_mode_enabled(vha)) &&
5808 atomic_read(&fcport->state) == FCS_ONLINE) {
5809 qla2x00_mark_device_lost(vha, fcport,
5810 ql2xplogiabsentdevice, 0);
5811 if (fcport->loop_id != FC_NO_LOOP_ID &&
5812 (fcport->flags & FCF_FCP2_DEVICE) == 0 &&
5813 fcport->port_type != FCT_INITIATOR &&
5814 fcport->port_type != FCT_BROADCAST) {
83548fe2 5815 ql_dbg(ql_dbg_disc, vha, 0x20f0,
726b8548
QT		 5816 "%s %d %8phC post del sess\n",
5817 __func__, __LINE__,
5818 fcport->port_name);
d8630bb9 5819 qlt_schedule_sess_for_deletion(fcport);
726b8548
QT		 5820 continue;
5821 }
5822 }
5823 }
1da177e4 5824
726b8548
QT		 5825 if (fcport->scan_state == QLA_FCPORT_FOUND)
5826 qla24xx_fcport_handle_login(vha, fcport);
5827 }
1da177e4
LT		 5828 return (rval);
5829}
5830
5831/*
5832 * qla2x00_find_new_loop_id
5833 * Scan through our port list and find a new usable loop ID.
5834 *
5835 * Input:
5836 * ha: adapter state pointer.
5837 * dev: port structure pointer.
5838 *
5839 * Returns:
5840 * qla2x00 local function return status code.
5841 *
5842 * Context:
5843 * Kernel context.
5844 */
03bcfb57 5845int
e315cd28 5846qla2x00_find_new_loop_id(scsi_qla_host_t *vha, fc_port_t *dev)
1da177e4
LT		 5847{
5848 int rval;
e315cd28 5849 struct qla_hw_data *ha = vha->hw;
feafb7b1 5850 unsigned long flags = 0;
1da177e4
LT		 5851
5852 rval = QLA_SUCCESS;
5853
5f16b331 5854 spin_lock_irqsave(&ha->vport_slock, flags);
1da177e4 5855
5f16b331
CD		 5856 dev->loop_id = find_first_zero_bit(ha->loop_id_map,
5857 LOOPID_MAP_SIZE);
5858 if (dev->loop_id >= LOOPID_MAP_SIZE ||
5859 qla2x00_is_reserved_id(vha, dev->loop_id)) {
5860 dev->loop_id = FC_NO_LOOP_ID;
5861 rval = QLA_FUNCTION_FAILED;
5862 } else
5863 set_bit(dev->loop_id, ha->loop_id_map);
1da177e4 5864
5f16b331 5865 spin_unlock_irqrestore(&ha->vport_slock, flags);
1da177e4 5866
5f16b331
CD		 5867 if (rval == QLA_SUCCESS)
5868 ql_dbg(ql_dbg_disc, dev->vha, 0x2086,
5869 "Assigning new loopid=%x, portid=%x.\n",
5870 dev->loop_id, dev->d_id.b24);
5871 else
5872 ql_log(ql_log_warn, dev->vha, 0x2087,
5873 "No loop_id's available, portid=%x.\n",
5874 dev->d_id.b24);
1da177e4
LT		 5875
5876 return (rval);
5877}
5878
1da177e4 5879
f6602f3b
QT		 5880/* FW does not set aside Loop id for MGMT Server/FFFFFAh */
5881int
5882qla2x00_reserve_mgmt_server_loop_id(scsi_qla_host_t *vha)
5883{
5884 int loop_id = FC_NO_LOOP_ID;
5885 int lid = NPH_MGMT_SERVER - vha->vp_idx;
5886 unsigned long flags;
5887 struct qla_hw_data *ha = vha->hw;
5888
5889 if (vha->vp_idx == 0) {
5890 set_bit(NPH_MGMT_SERVER, ha->loop_id_map);
5891 return NPH_MGMT_SERVER;
5892 }
5893
5894 /* pick id from high and work down to low */
5895 spin_lock_irqsave(&ha->vport_slock, flags);
5896 for (; lid > 0; lid--) {
5897 if (!test_bit(lid, vha->hw->loop_id_map)) {
5898 set_bit(lid, vha->hw->loop_id_map);
5899 loop_id = lid;
5900 break;
5901 }
5902 }
5903 spin_unlock_irqrestore(&ha->vport_slock, flags);
5904
5905 return loop_id;
5906}
5907
1da177e4
LT		 5908/*
5909 * qla2x00_fabric_login
5910 * Issue fabric login command.
5911 *
5912 * Input:
5913 * ha = adapter block pointer.
5914 * device = pointer to FC device type structure.
5915 *
5916 * Returns:
5917 * 0 - Login successfully
5918 * 1 - Login failed
5919 * 2 - Initiator device
5920 * 3 - Fatal error
5921 */
5922int
e315cd28 5923qla2x00_fabric_login(scsi_qla_host_t *vha, fc_port_t *fcport,
1da177e4
LT		 5924 uint16_t *next_loopid)
5925{
5926 int rval;
5927 int retry;
5928 uint16_t tmp_loopid;
5929 uint16_t mb[MAILBOX_REGISTER_COUNT];
e315cd28 5930 struct qla_hw_data *ha = vha->hw;
1da177e4
LT		 5931
5932 retry = 0;
5933 tmp_loopid = 0;
5934
5935 for (;;) {
7c3df132
SK		 5936 ql_dbg(ql_dbg_disc, vha, 0x2000,
5937 "Trying Fabric Login w/loop id 0x%04x for port "
5938 "%02x%02x%02x.\n",
5939 fcport->loop_id, fcport->d_id.b.domain,
5940 fcport->d_id.b.area, fcport->d_id.b.al_pa);
1da177e4
LT		 5941
5942 /* Login fcport on switch. */
0b91d116 5943 rval = ha->isp_ops->fabric_login(vha, fcport->loop_id,
1da177e4
LT		 5944 fcport->d_id.b.domain, fcport->d_id.b.area,
5945 fcport->d_id.b.al_pa, mb, BIT_0);
0b91d116
CD		 5946 if (rval != QLA_SUCCESS) {
5947 return rval;
5948 }
1da177e4
LT		 5949 if (mb[0] == MBS_PORT_ID_USED) {
5950 /*
5951 * Device has another loop ID. The firmware team
0107109e
AV		 5952 * recommends the driver perform an implicit login with
5953 * the specified ID again. The ID we just used is save
5954 * here so we return with an ID that can be tried by
5955 * the next login.
1da177e4
LT		 5956 */
5957 retry++;
5958 tmp_loopid = fcport->loop_id;
5959 fcport->loop_id = mb[1];
5960
7c3df132
SK		 5961 ql_dbg(ql_dbg_disc, vha, 0x2001,
5962 "Fabric Login: port in use - next loop "
5963 "id=0x%04x, port id= %02x%02x%02x.\n",
1da177e4 5964 fcport->loop_id, fcport->d_id.b.domain,
7c3df132 5965 fcport->d_id.b.area, fcport->d_id.b.al_pa);
1da177e4
LT		 5966
5967 } else if (mb[0] == MBS_COMMAND_COMPLETE) {
5968 /*
5969 * Login succeeded.
5970 */
5971 if (retry) {
5972 /* A retry occurred before. */
5973 *next_loopid = tmp_loopid;
5974 } else {
5975 /*
5976 * No retry occurred before. Just increment the
5977 * ID value for next login.
5978 */
5979 *next_loopid = (fcport->loop_id + 1);
5980 }
5981
5982 if (mb[1] & BIT_0) {
5983 fcport->port_type = FCT_INITIATOR;
5984 } else {
5985 fcport->port_type = FCT_TARGET;
5986 if (mb[1] & BIT_1) {
8474f3a0 5987 fcport->flags |= FCF_FCP2_DEVICE;
1da177e4
LT		 5988 }
5989 }
5990
ad3e0eda
AV		 5991 if (mb[10] & BIT_0)
5992 fcport->supported_classes |= FC_COS_CLASS2;
5993 if (mb[10] & BIT_1)
5994 fcport->supported_classes |= FC_COS_CLASS3;
5995
2d70c103
NB		 5996 if (IS_FWI2_CAPABLE(ha)) {
5997 if (mb[10] & BIT_7)
5998 fcport->flags |=
5999 FCF_CONF_COMP_SUPPORTED;
6000 }
6001
1da177e4
LT		 6002 rval = QLA_SUCCESS;
6003 break;
6004 } else if (mb[0] == MBS_LOOP_ID_USED) {
6005 /*
6006 * Loop ID already used, try next loop ID.
6007 */
6008 fcport->loop_id++;
e315cd28 6009 rval = qla2x00_find_new_loop_id(vha, fcport);
1da177e4
LT		 6010 if (rval != QLA_SUCCESS) {
6011 /* Ran out of loop IDs to use */
6012 break;
6013 }
6014 } else if (mb[0] == MBS_COMMAND_ERROR) {
6015 /*
6016 * Firmware possibly timed out during login. If NO
6017 * retries are left to do then the device is declared
6018 * dead.
6019 */
6020 *next_loopid = fcport->loop_id;
e315cd28 6021 ha->isp_ops->fabric_logout(vha, fcport->loop_id,
1c7c6357
AV		 6022 fcport->d_id.b.domain, fcport->d_id.b.area,
6023 fcport->d_id.b.al_pa);
e315cd28 6024 qla2x00_mark_device_lost(vha, fcport, 1, 0);
1da177e4
LT		 6025
6026 rval = 1;
6027 break;
6028 } else {
6029 /*
6030 * unrecoverable / not handled error
6031 */
7c3df132
SK		 6032 ql_dbg(ql_dbg_disc, vha, 0x2002,
6033 "Failed=%x port_id=%02x%02x%02x loop_id=%x "
6034 "jiffies=%lx.\n", mb[0], fcport->d_id.b.domain,
6035 fcport->d_id.b.area, fcport->d_id.b.al_pa,
6036 fcport->loop_id, jiffies);
1da177e4
LT		 6037
6038 *next_loopid = fcport->loop_id;
e315cd28 6039 ha->isp_ops->fabric_logout(vha, fcport->loop_id,
1c7c6357
AV		 6040 fcport->d_id.b.domain, fcport->d_id.b.area,
6041 fcport->d_id.b.al_pa);
5f16b331 6042 qla2x00_clear_loop_id(fcport);
0eedfcf0 6043 fcport->login_retry = 0;
1da177e4
LT		 6044
6045 rval = 3;
6046 break;
6047 }
6048 }
6049
6050 return (rval);
6051}
6052
6053/*
6054 * qla2x00_local_device_login
6055 * Issue local device login command.
6056 *
6057 * Input:
6058 * ha = adapter block pointer.
6059 * loop_id = loop id of device to login to.
6060 *
6061 * Returns (Where's the #define!!!!):
6062 * 0 - Login successfully
6063 * 1 - Login failed
6064 * 3 - Fatal error
6065 */
6066int
e315cd28 6067qla2x00_local_device_login(scsi_qla_host_t *vha, fc_port_t *fcport)
1da177e4
LT		 6068{
6069 int rval;
6070 uint16_t mb[MAILBOX_REGISTER_COUNT];
6071
6072 memset(mb, 0, sizeof(mb));
e315cd28 6073 rval = qla2x00_login_local_device(vha, fcport, mb, BIT_0);
1da177e4
LT		 6074 if (rval == QLA_SUCCESS) {
6075 /* Interrogate mailbox registers for any errors */
6076 if (mb[0] == MBS_COMMAND_ERROR)
6077 rval = 1;
6078 else if (mb[0] == MBS_COMMAND_PARAMETER_ERROR)
6079 /* device not in PCB table */
6080 rval = 3;
6081 }
6082
6083 return (rval);
6084}
6085
6086/*
6087 * qla2x00_loop_resync
6088 * Resync with fibre channel devices.
6089 *
6090 * Input:
6091 * ha = adapter block pointer.
6092 *
6093 * Returns:
6094 * 0 = success
6095 */
6096int
e315cd28 6097qla2x00_loop_resync(scsi_qla_host_t *vha)
1da177e4 6098{
73208dfd 6099 int rval = QLA_SUCCESS;
1da177e4 6100 uint32_t wait_time;
67c2e93a
AC		 6101 struct req_que *req;
6102 struct rsp_que *rsp;
6103
d7459527 6104 req = vha->req;
67c2e93a 6105 rsp = req->rsp;
1da177e4 6106
e315cd28
AC		 6107 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
6108 if (vha->flags.online) {
6109 if (!(rval = qla2x00_fw_ready(vha))) {
1da177e4
LT		 6110 /* Wait at most MAX_TARGET RSCNs for a stable link. */
6111 wait_time = 256;
6112 do {
8ae6d9c7
GM		 6113 if (!IS_QLAFX00(vha->hw)) {
6114 /*
6115 * Issue a marker after FW becomes
6116 * ready.
6117 */
6118 qla2x00_marker(vha, req, rsp, 0, 0,
6119 MK_SYNC_ALL);
6120 vha->marker_needed = 0;
6121 }
1da177e4
LT		 6122
6123 /* Remap devices on Loop. */
e315cd28 6124 clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
1da177e4 6125
8ae6d9c7
GM		 6126 if (IS_QLAFX00(vha->hw))
6127 qlafx00_configure_devices(vha);
6128 else
6129 qla2x00_configure_loop(vha);
6130
1da177e4 6131 wait_time--;
e315cd28
AC		 6132 } while (!atomic_read(&vha->loop_down_timer) &&
6133 !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags))
6134 && wait_time && (test_bit(LOOP_RESYNC_NEEDED,
6135 &vha->dpc_flags)));
1da177e4 6136 }
1da177e4
LT		 6137 }
6138
e315cd28 6139 if (test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags))
1da177e4 6140 return (QLA_FUNCTION_FAILED);
1da177e4 6141
e315cd28 6142 if (rval)
7c3df132
SK		 6143 ql_dbg(ql_dbg_disc, vha, 0x206c,
6144 "%s *** FAILED ***.\n", __func__);
1da177e4
LT		 6145
6146 return (rval);
6147}
6148
579d12b5
SK		 6149/*
6150* qla2x00_perform_loop_resync
6151* Description: This function will set the appropriate flags and call
6152* qla2x00_loop_resync. If successful loop will be resynced
6153* Arguments : scsi_qla_host_t pointer
6154* returm : Success or Failure
6155*/
6156
6157int qla2x00_perform_loop_resync(scsi_qla_host_t *ha)
6158{
6159 int32_t rval = 0;
6160
6161 if (!test_and_set_bit(LOOP_RESYNC_ACTIVE, &ha->dpc_flags)) {
6162 /*Configure the flags so that resync happens properly*/
6163 atomic_set(&ha->loop_down_timer, 0);
6164 if (!(ha->device_flags & DFLG_NO_CABLE)) {
6165 atomic_set(&ha->loop_state, LOOP_UP);
6166 set_bit(LOCAL_LOOP_UPDATE, &ha->dpc_flags);
6167 set_bit(REGISTER_FC4_NEEDED, &ha->dpc_flags);
6168 set_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags);
6169
6170 rval = qla2x00_loop_resync(ha);
6171 } else
6172 atomic_set(&ha->loop_state, LOOP_DEAD);
6173
6174 clear_bit(LOOP_RESYNC_ACTIVE, &ha->dpc_flags);
6175 }
6176
6177 return rval;
6178}
6179
d97994dc 6180void
67becc00 6181qla2x00_update_fcports(scsi_qla_host_t *base_vha)
d97994dc 6182{
6183 fc_port_t *fcport;
feafb7b1
AE		 6184 struct scsi_qla_host *vha;
6185 struct qla_hw_data *ha = base_vha->hw;
6186 unsigned long flags;
d97994dc 6187
feafb7b1 6188 spin_lock_irqsave(&ha->vport_slock, flags);
d97994dc 6189 /* Go with deferred removal of rport references. */
feafb7b1
AE		 6190 list_for_each_entry(vha, &base_vha->hw->vp_list, list) {
6191 atomic_inc(&vha->vref_count);
6192 list_for_each_entry(fcport, &vha->vp_fcports, list) {
8ae598d0 6193 if (fcport->drport &&
feafb7b1
AE		 6194 atomic_read(&fcport->state) != FCS_UNCONFIGURED) {
6195 spin_unlock_irqrestore(&ha->vport_slock, flags);
67becc00 6196 qla2x00_rport_del(fcport);
df673274 6197
feafb7b1
AE		 6198 spin_lock_irqsave(&ha->vport_slock, flags);
6199 }
6200 }
6201 atomic_dec(&vha->vref_count);
c4a9b538 6202 wake_up(&vha->vref_waitq);
feafb7b1
AE		 6203 }
6204 spin_unlock_irqrestore(&ha->vport_slock, flags);
d97994dc 6205}
6206
7d613ac6
SV		 6207/* Assumes idc_lock always held on entry */
6208void
6209qla83xx_reset_ownership(scsi_qla_host_t *vha)
6210{
6211 struct qla_hw_data *ha = vha->hw;
6212 uint32_t drv_presence, drv_presence_mask;
6213 uint32_t dev_part_info1, dev_part_info2, class_type;
6214 uint32_t class_type_mask = 0x3;
6215 uint16_t fcoe_other_function = 0xffff, i;
6216
7ec0effd
AD		 6217 if (IS_QLA8044(ha)) {
6218 drv_presence = qla8044_rd_direct(vha,
6219 QLA8044_CRB_DRV_ACTIVE_INDEX);
6220 dev_part_info1 = qla8044_rd_direct(vha,
6221 QLA8044_CRB_DEV_PART_INFO_INDEX);
6222 dev_part_info2 = qla8044_rd_direct(vha,
6223 QLA8044_CRB_DEV_PART_INFO2);
6224 } else {
6225 qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
6226 qla83xx_rd_reg(vha, QLA83XX_DEV_PARTINFO1, &dev_part_info1);
6227 qla83xx_rd_reg(vha, QLA83XX_DEV_PARTINFO2, &dev_part_info2);
6228 }
7d613ac6
SV		 6229 for (i = 0; i < 8; i++) {
6230 class_type = ((dev_part_info1 >> (i * 4)) & class_type_mask);
6231 if ((class_type == QLA83XX_CLASS_TYPE_FCOE) &&
6232 (i != ha->portnum)) {
6233 fcoe_other_function = i;
6234 break;
6235 }
6236 }
6237 if (fcoe_other_function == 0xffff) {
6238 for (i = 0; i < 8; i++) {
6239 class_type = ((dev_part_info2 >> (i * 4)) &
6240 class_type_mask);
6241 if ((class_type == QLA83XX_CLASS_TYPE_FCOE) &&
6242 ((i + 8) != ha->portnum)) {
6243 fcoe_other_function = i + 8;
6244 break;
6245 }
6246 }
6247 }
6248 /*
6249 * Prepare drv-presence mask based on fcoe functions present.
6250 * However consider only valid physical fcoe function numbers (0-15).
6251 */
6252 drv_presence_mask = ~((1 << (ha->portnum)) |
6253 ((fcoe_other_function == 0xffff) ?
6254 0 : (1 << (fcoe_other_function))));
6255
6256 /* We are the reset owner iff:
6257 * - No other protocol drivers present.
6258 * - This is the lowest among fcoe functions. */
6259 if (!(drv_presence & drv_presence_mask) &&
6260 (ha->portnum < fcoe_other_function)) {
6261 ql_dbg(ql_dbg_p3p, vha, 0xb07f,
6262 "This host is Reset owner.\n");
6263 ha->flags.nic_core_reset_owner = 1;
6264 }
6265}
6266
fa492630 6267static int
7d613ac6
SV		 6268__qla83xx_set_drv_ack(scsi_qla_host_t *vha)
6269{
6270 int rval = QLA_SUCCESS;
6271 struct qla_hw_data *ha = vha->hw;
6272 uint32_t drv_ack;
6273
6274 rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRIVER_ACK, &drv_ack);
6275 if (rval == QLA_SUCCESS) {
6276 drv_ack |= (1 << ha->portnum);
6277 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRIVER_ACK, drv_ack);
6278 }
6279
6280 return rval;
6281}
6282
fa492630 6283static int
7d613ac6
SV		 6284__qla83xx_clear_drv_ack(scsi_qla_host_t *vha)
6285{
6286 int rval = QLA_SUCCESS;
6287 struct qla_hw_data *ha = vha->hw;
6288 uint32_t drv_ack;
6289
6290 rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRIVER_ACK, &drv_ack);
6291 if (rval == QLA_SUCCESS) {
6292 drv_ack &= ~(1 << ha->portnum);
6293 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRIVER_ACK, drv_ack);
6294 }
6295
6296 return rval;
6297}
6298
fa492630 6299static const char *
7d613ac6
SV		 6300qla83xx_dev_state_to_string(uint32_t dev_state)
6301{
6302 switch (dev_state) {
6303 case QLA8XXX_DEV_COLD:
6304 return "COLD/RE-INIT";
6305 case QLA8XXX_DEV_INITIALIZING:
6306 return "INITIALIZING";
6307 case QLA8XXX_DEV_READY:
6308 return "READY";
6309 case QLA8XXX_DEV_NEED_RESET:
6310 return "NEED RESET";
6311 case QLA8XXX_DEV_NEED_QUIESCENT:
6312 return "NEED QUIESCENT";
6313 case QLA8XXX_DEV_FAILED:
6314 return "FAILED";
6315 case QLA8XXX_DEV_QUIESCENT:
6316 return "QUIESCENT";
6317 default:
6318 return "Unknown";
6319 }
6320}
6321
6322/* Assumes idc-lock always held on entry */
6323void
6324qla83xx_idc_audit(scsi_qla_host_t *vha, int audit_type)
6325{
6326 struct qla_hw_data *ha = vha->hw;
6327 uint32_t idc_audit_reg = 0, duration_secs = 0;
6328
6329 switch (audit_type) {
6330 case IDC_AUDIT_TIMESTAMP:
6331 ha->idc_audit_ts = (jiffies_to_msecs(jiffies) / 1000);
6332 idc_audit_reg = (ha->portnum) |
6333 (IDC_AUDIT_TIMESTAMP << 7) | (ha->idc_audit_ts << 8);
6334 qla83xx_wr_reg(vha, QLA83XX_IDC_AUDIT, idc_audit_reg);
6335 break;
6336
6337 case IDC_AUDIT_COMPLETION:
6338 duration_secs = ((jiffies_to_msecs(jiffies) -
6339 jiffies_to_msecs(ha->idc_audit_ts)) / 1000);
6340 idc_audit_reg = (ha->portnum) |
6341 (IDC_AUDIT_COMPLETION << 7) | (duration_secs << 8);
6342 qla83xx_wr_reg(vha, QLA83XX_IDC_AUDIT, idc_audit_reg);
6343 break;
6344
6345 default:
6346 ql_log(ql_log_warn, vha, 0xb078,
6347 "Invalid audit type specified.\n");
6348 break;
6349 }
6350}
6351
6352/* Assumes idc_lock always held on entry */
fa492630 6353static int
7d613ac6
SV		 6354qla83xx_initiating_reset(scsi_qla_host_t *vha)
6355{
6356 struct qla_hw_data *ha = vha->hw;
6357 uint32_t idc_control, dev_state;
6358
6359 __qla83xx_get_idc_control(vha, &idc_control);
6360 if ((idc_control & QLA83XX_IDC_RESET_DISABLED)) {
6361 ql_log(ql_log_info, vha, 0xb080,
6362 "NIC Core reset has been disabled. idc-control=0x%x\n",
6363 idc_control);
6364 return QLA_FUNCTION_FAILED;
6365 }
6366
6367 /* Set NEED-RESET iff in READY state and we are the reset-owner */
6368 qla83xx_rd_reg(vha, QLA83XX_IDC_DEV_STATE, &dev_state);
6369 if (ha->flags.nic_core_reset_owner && dev_state == QLA8XXX_DEV_READY) {
6370 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE,
6371 QLA8XXX_DEV_NEED_RESET);
6372 ql_log(ql_log_info, vha, 0xb056, "HW State: NEED RESET.\n");
6373 qla83xx_idc_audit(vha, IDC_AUDIT_TIMESTAMP);
6374 } else {
6375 const char *state = qla83xx_dev_state_to_string(dev_state);
6376 ql_log(ql_log_info, vha, 0xb057, "HW State: %s.\n", state);
6377
6378 /* SV: XXX: Is timeout required here? */
6379 /* Wait for IDC state change READY -> NEED_RESET */
6380 while (dev_state == QLA8XXX_DEV_READY) {
6381 qla83xx_idc_unlock(vha, 0);
6382 msleep(200);
6383 qla83xx_idc_lock(vha, 0);
6384 qla83xx_rd_reg(vha, QLA83XX_IDC_DEV_STATE, &dev_state);
6385 }
6386 }
6387
6388 /* Send IDC ack by writing to drv-ack register */
6389 __qla83xx_set_drv_ack(vha);
6390
6391 return QLA_SUCCESS;
6392}
6393
6394int
6395__qla83xx_set_idc_control(scsi_qla_host_t *vha, uint32_t idc_control)
6396{
6397 return qla83xx_wr_reg(vha, QLA83XX_IDC_CONTROL, idc_control);
6398}
6399
7d613ac6
SV		 6400int
6401__qla83xx_get_idc_control(scsi_qla_host_t *vha, uint32_t *idc_control)
6402{
6403 return qla83xx_rd_reg(vha, QLA83XX_IDC_CONTROL, idc_control);
6404}
6405
fa492630 6406static int
7d613ac6
SV		 6407qla83xx_check_driver_presence(scsi_qla_host_t *vha)
6408{
6409 uint32_t drv_presence = 0;
6410 struct qla_hw_data *ha = vha->hw;
6411
6412 qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
6413 if (drv_presence & (1 << ha->portnum))
6414 return QLA_SUCCESS;
6415 else
6416 return QLA_TEST_FAILED;
6417}
6418
6419int
6420qla83xx_nic_core_reset(scsi_qla_host_t *vha)
6421{
6422 int rval = QLA_SUCCESS;
6423 struct qla_hw_data *ha = vha->hw;
6424
6425 ql_dbg(ql_dbg_p3p, vha, 0xb058,
6426 "Entered %s().\n", __func__);
6427
6428 if (vha->device_flags & DFLG_DEV_FAILED) {
6429 ql_log(ql_log_warn, vha, 0xb059,
6430 "Device in unrecoverable FAILED state.\n");
6431 return QLA_FUNCTION_FAILED;
6432 }
6433
6434 qla83xx_idc_lock(vha, 0);
6435
6436 if (qla83xx_check_driver_presence(vha) != QLA_SUCCESS) {
6437 ql_log(ql_log_warn, vha, 0xb05a,
6438 "Function=0x%x has been removed from IDC participation.\n",
6439 ha->portnum);
6440 rval = QLA_FUNCTION_FAILED;
6441 goto exit;
6442 }
6443
6444 qla83xx_reset_ownership(vha);
6445
6446 rval = qla83xx_initiating_reset(vha);
6447
6448 /*
6449 * Perform reset if we are the reset-owner,
6450 * else wait till IDC state changes to READY/FAILED.
6451 */
6452 if (rval == QLA_SUCCESS) {
6453 rval = qla83xx_idc_state_handler(vha);
6454
6455 if (rval == QLA_SUCCESS)
6456 ha->flags.nic_core_hung = 0;
6457 __qla83xx_clear_drv_ack(vha);
6458 }
6459
6460exit:
6461 qla83xx_idc_unlock(vha, 0);
6462
6463 ql_dbg(ql_dbg_p3p, vha, 0xb05b, "Exiting %s.\n", __func__);
6464
6465 return rval;
6466}
6467
81178772
SK		 6468int
6469qla2xxx_mctp_dump(scsi_qla_host_t *vha)
6470{
6471 struct qla_hw_data *ha = vha->hw;
6472 int rval = QLA_FUNCTION_FAILED;
6473
6474 if (!IS_MCTP_CAPABLE(ha)) {
6475 /* This message can be removed from the final version */
6476 ql_log(ql_log_info, vha, 0x506d,
6477 "This board is not MCTP capable\n");
6478 return rval;
6479 }
6480
6481 if (!ha->mctp_dump) {
6482 ha->mctp_dump = dma_alloc_coherent(&ha->pdev->dev,
6483 MCTP_DUMP_SIZE, &ha->mctp_dump_dma, GFP_KERNEL);
6484
6485 if (!ha->mctp_dump) {
6486 ql_log(ql_log_warn, vha, 0x506e,
6487 "Failed to allocate memory for mctp dump\n");
6488 return rval;
6489 }
6490 }
6491
6492#define MCTP_DUMP_STR_ADDR 0x00000000
6493 rval = qla2x00_dump_mctp_data(vha, ha->mctp_dump_dma,
6494 MCTP_DUMP_STR_ADDR, MCTP_DUMP_SIZE/4);
6495 if (rval != QLA_SUCCESS) {
6496 ql_log(ql_log_warn, vha, 0x506f,
6497 "Failed to capture mctp dump\n");
6498 } else {
6499 ql_log(ql_log_info, vha, 0x5070,
6500 "Mctp dump capture for host (%ld/%p).\n",
6501 vha->host_no, ha->mctp_dump);
6502 ha->mctp_dumped = 1;
6503 }
6504
409ee0fe 6505 if (!ha->flags.nic_core_reset_hdlr_active && !ha->portnum) {
81178772
SK		 6506 ha->flags.nic_core_reset_hdlr_active = 1;
6507 rval = qla83xx_restart_nic_firmware(vha);
6508 if (rval)
6509 /* NIC Core reset failed. */
6510 ql_log(ql_log_warn, vha, 0x5071,
6511 "Failed to restart nic firmware\n");
6512 else
6513 ql_dbg(ql_dbg_p3p, vha, 0xb084,
6514 "Restarted NIC firmware successfully.\n");
6515 ha->flags.nic_core_reset_hdlr_active = 0;
6516 }
6517
6518 return rval;
6519
6520}
6521
579d12b5 6522/*
8fcd6b8b 6523* qla2x00_quiesce_io
579d12b5
SK		 6524* Description: This function will block the new I/Os
6525* Its not aborting any I/Os as context
6526* is not destroyed during quiescence
6527* Arguments: scsi_qla_host_t
6528* return : void
6529*/
6530void
8fcd6b8b 6531qla2x00_quiesce_io(scsi_qla_host_t *vha)
579d12b5
SK		 6532{
6533 struct qla_hw_data *ha = vha->hw;
6534 struct scsi_qla_host *vp;
6535
8fcd6b8b
CD		 6536 ql_dbg(ql_dbg_dpc, vha, 0x401d,
6537 "Quiescing I/O - ha=%p.\n", ha);
579d12b5
SK		 6538
6539 atomic_set(&ha->loop_down_timer, LOOP_DOWN_TIME);
6540 if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
6541 atomic_set(&vha->loop_state, LOOP_DOWN);
6542 qla2x00_mark_all_devices_lost(vha, 0);
6543 list_for_each_entry(vp, &ha->vp_list, list)
8fcd6b8b 6544 qla2x00_mark_all_devices_lost(vp, 0);
579d12b5
SK		 6545 } else {
6546 if (!atomic_read(&vha->loop_down_timer))
6547 atomic_set(&vha->loop_down_timer,
6548 LOOP_DOWN_TIME);
6549 }
6550 /* Wait for pending cmds to complete */
6551 qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST);
6552}
6553
a9083016
GM		 6554void
6555qla2x00_abort_isp_cleanup(scsi_qla_host_t *vha)
6556{
6557 struct qla_hw_data *ha = vha->hw;
579d12b5 6558 struct scsi_qla_host *vp;
feafb7b1 6559 unsigned long flags;
6aef87be 6560 fc_port_t *fcport;
7c3f8fd1 6561 u16 i;
a9083016 6562
e46ef004
SK		 6563 /* For ISP82XX, driver waits for completion of the commands.
6564 * online flag should be set.
6565 */
7ec0effd 6566 if (!(IS_P3P_TYPE(ha)))
e46ef004 6567 vha->flags.online = 0;
a9083016
GM		 6568 ha->flags.chip_reset_done = 0;
6569 clear_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
2be21fa2 6570 vha->qla_stats.total_isp_aborts++;
a9083016 6571
7c3df132
SK		 6572 ql_log(ql_log_info, vha, 0x00af,
6573 "Performing ISP error recovery - ha=%p.\n", ha);
a9083016 6574
b2000805 6575 ha->flags.purge_mbox = 1;
e46ef004
SK		 6576 /* For ISP82XX, reset_chip is just disabling interrupts.
6577 * Driver waits for the completion of the commands.
6578 * the interrupts need to be enabled.
6579 */
7ec0effd 6580 if (!(IS_P3P_TYPE(ha)))
a9083016
GM		 6581 ha->isp_ops->reset_chip(vha);
6582
9cd883f0
QT		 6583 SAVE_TOPO(ha);
6584 ha->flags.rida_fmt2 = 0;
ec7193e2
QT		 6585 ha->flags.n2n_ae = 0;
6586 ha->flags.lip_ae = 0;
6587 ha->current_topology = 0;
6588 ha->flags.fw_started = 0;
6589 ha->flags.fw_init_done = 0;
b2000805
QT		 6590 ha->chip_reset++;
6591 ha->base_qpair->chip_reset = ha->chip_reset;
7c3f8fd1
QT		 6592 for (i = 0; i < ha->max_qpairs; i++) {
6593 if (ha->queue_pair_map[i])
6594 ha->queue_pair_map[i]->chip_reset =
6595 ha->base_qpair->chip_reset;
6596 }
726b8548 6597
b2000805
QT		 6598 /* purge MBox commands */
6599 if (atomic_read(&ha->num_pend_mbx_stage3)) {
6600 clear_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags);
6601 complete(&ha->mbx_intr_comp);
6602 }
6603
6604 i = 0;
6605 while (atomic_read(&ha->num_pend_mbx_stage3) ||
6606 atomic_read(&ha->num_pend_mbx_stage2) ||
6607 atomic_read(&ha->num_pend_mbx_stage1)) {
6608 msleep(20);
6609 i++;
6610 if (i > 50)
6611 break;
6612 }
6613 ha->flags.purge_mbox = 0;
6614
a9083016
GM		 6615 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
6616 if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
6617 atomic_set(&vha->loop_state, LOOP_DOWN);
6618 qla2x00_mark_all_devices_lost(vha, 0);
feafb7b1
AE		 6619
6620 spin_lock_irqsave(&ha->vport_slock, flags);
579d12b5 6621 list_for_each_entry(vp, &ha->vp_list, list) {
feafb7b1
AE		 6622 atomic_inc(&vp->vref_count);
6623 spin_unlock_irqrestore(&ha->vport_slock, flags);
6624
a9083016 6625 qla2x00_mark_all_devices_lost(vp, 0);
feafb7b1
AE		 6626
6627 spin_lock_irqsave(&ha->vport_slock, flags);
6628 atomic_dec(&vp->vref_count);
6629 }
6630 spin_unlock_irqrestore(&ha->vport_slock, flags);
a9083016
GM		 6631 } else {
6632 if (!atomic_read(&vha->loop_down_timer))
6633 atomic_set(&vha->loop_down_timer,
6634 LOOP_DOWN_TIME);
6635 }
6636
6aef87be
AV		 6637 /* Clear all async request states across all VPs. */
6638 list_for_each_entry(fcport, &vha->vp_fcports, list)
6639 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT);
6640 spin_lock_irqsave(&ha->vport_slock, flags);
6641 list_for_each_entry(vp, &ha->vp_list, list) {
6642 atomic_inc(&vp->vref_count);
6643 spin_unlock_irqrestore(&ha->vport_slock, flags);
6644
6645 list_for_each_entry(fcport, &vp->vp_fcports, list)
6646 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT);
6647
6648 spin_lock_irqsave(&ha->vport_slock, flags);
6649 atomic_dec(&vp->vref_count);
6650 }
6651 spin_unlock_irqrestore(&ha->vport_slock, flags);
6652
bddd2d65
LC		 6653 if (!ha->flags.eeh_busy) {
6654 /* Make sure for ISP 82XX IO DMA is complete */
7ec0effd 6655 if (IS_P3P_TYPE(ha)) {
7190575f 6656 qla82xx_chip_reset_cleanup(vha);
7c3df132
SK		 6657 ql_log(ql_log_info, vha, 0x00b4,
6658 "Done chip reset cleanup.\n");
a9083016 6659
e46ef004
SK		 6660 /* Done waiting for pending commands.
6661 * Reset the online flag.
6662 */
6663 vha->flags.online = 0;
4d78c973 6664 }
a9083016 6665
bddd2d65
LC		 6666 /* Requeue all commands in outstanding command list. */
6667 qla2x00_abort_all_cmds(vha, DID_RESET << 16);
6668 }
b6a029e1
AE		 6669 /* memory barrier */
6670 wmb();
a9083016
GM		 6671}
6672
1da177e4
LT		 6673/*
6674* qla2x00_abort_isp
6675* Resets ISP and aborts all outstanding commands.
6676*
6677* Input:
6678* ha = adapter block pointer.
6679*
6680* Returns:
6681* 0 = success
6682*/
6683int
e315cd28 6684qla2x00_abort_isp(scsi_qla_host_t *vha)
1da177e4 6685{
476e8978 6686 int rval;
1da177e4 6687 uint8_t status = 0;
e315cd28
AC		 6688 struct qla_hw_data *ha = vha->hw;
6689 struct scsi_qla_host *vp;
73208dfd 6690 struct req_que *req = ha->req_q_map[0];
feafb7b1 6691 unsigned long flags;
1da177e4 6692
e315cd28 6693 if (vha->flags.online) {
a9083016 6694 qla2x00_abort_isp_cleanup(vha);
1da177e4 6695
a6171297
SV		 6696 if (IS_QLA8031(ha)) {
6697 ql_dbg(ql_dbg_p3p, vha, 0xb05c,
6698 "Clearing fcoe driver presence.\n");
6699 if (qla83xx_clear_drv_presence(vha) != QLA_SUCCESS)
6700 ql_dbg(ql_dbg_p3p, vha, 0xb073,
6701 "Error while clearing DRV-Presence.\n");
6702 }
6703
85880801
AV		 6704 if (unlikely(pci_channel_offline(ha->pdev) &&
6705 ha->flags.pci_channel_io_perm_failure)) {
6706 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
6707 status = 0;
6708 return status;
6709 }
6710
73208dfd 6711 ha->isp_ops->get_flash_version(vha, req->ring);
30c47662 6712
e315cd28 6713 ha->isp_ops->nvram_config(vha);
1da177e4 6714
e315cd28
AC		 6715 if (!qla2x00_restart_isp(vha)) {
6716 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
1da177e4 6717
e315cd28 6718 if (!atomic_read(&vha->loop_down_timer)) {
1da177e4
LT		 6719 /*
6720 * Issue marker command only when we are going
6721 * to start the I/O .
6722 */
e315cd28 6723 vha->marker_needed = 1;
1da177e4
LT		 6724 }
6725
e315cd28 6726 vha->flags.online = 1;
1da177e4 6727
fd34f556 6728 ha->isp_ops->enable_intrs(ha);
1da177e4 6729
fa2a1ce5 6730 ha->isp_abort_cnt = 0;
e315cd28 6731 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
476e8978 6732
6246b8a1
GM		 6733 if (IS_QLA81XX(ha) || IS_QLA8031(ha))
6734 qla2x00_get_fw_version(vha);
df613b96
AV		 6735 if (ha->fce) {
6736 ha->flags.fce_enabled = 1;
6737 memset(ha->fce, 0,
6738 fce_calc_size(ha->fce_bufs));
e315cd28 6739 rval = qla2x00_enable_fce_trace(vha,
df613b96
AV		 6740 ha->fce_dma, ha->fce_bufs, ha->fce_mb,
6741 &ha->fce_bufs);
6742 if (rval) {
7c3df132 6743 ql_log(ql_log_warn, vha, 0x8033,
df613b96
AV		 6744 "Unable to reinitialize FCE "
6745 "(%d).\n", rval);
6746 ha->flags.fce_enabled = 0;
6747 }
6748 }
436a7b11
AV		 6749
6750 if (ha->eft) {
6751 memset(ha->eft, 0, EFT_SIZE);
e315cd28 6752 rval = qla2x00_enable_eft_trace(vha,
436a7b11
AV		 6753 ha->eft_dma, EFT_NUM_BUFFERS);
6754 if (rval) {
7c3df132 6755 ql_log(ql_log_warn, vha, 0x8034,
436a7b11
AV		 6756 "Unable to reinitialize EFT "
6757 "(%d).\n", rval);
6758 }
6759 }
1da177e4 6760 } else { /* failed the ISP abort */
e315cd28
AC		 6761 vha->flags.online = 1;
6762 if (test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) {
1da177e4 6763 if (ha->isp_abort_cnt == 0) {
7c3df132
SK		 6764 ql_log(ql_log_fatal, vha, 0x8035,
6765 "ISP error recover failed - "
6766 "board disabled.\n");
fa2a1ce5 6767 /*
1da177e4
LT		 6768 * The next call disables the board
6769 * completely.
6770 */
e315cd28
AC		 6771 ha->isp_ops->reset_adapter(vha);
6772 vha->flags.online = 0;
1da177e4 6773 clear_bit(ISP_ABORT_RETRY,
e315cd28 6774 &vha->dpc_flags);
1da177e4
LT		 6775 status = 0;
6776 } else { /* schedule another ISP abort */
6777 ha->isp_abort_cnt--;
7c3df132
SK		 6778 ql_dbg(ql_dbg_taskm, vha, 0x8020,
6779 "ISP abort - retry remaining %d.\n",
6780 ha->isp_abort_cnt);
1da177e4
LT		 6781 status = 1;
6782 }
6783 } else {
6784 ha->isp_abort_cnt = MAX_RETRIES_OF_ISP_ABORT;
7c3df132
SK		 6785 ql_dbg(ql_dbg_taskm, vha, 0x8021,
6786 "ISP error recovery - retrying (%d) "
6787 "more times.\n", ha->isp_abort_cnt);
e315cd28 6788 set_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
1da177e4
LT		 6789 status = 1;
6790 }
6791 }
fa2a1ce5 6792
1da177e4
LT		 6793 }
6794
e315cd28 6795 if (!status) {
7c3df132 6796 ql_dbg(ql_dbg_taskm, vha, 0x8022, "%s succeeded.\n", __func__);
1608cc4a 6797 qla2x00_configure_hba(vha);
feafb7b1
AE		 6798 spin_lock_irqsave(&ha->vport_slock, flags);
6799 list_for_each_entry(vp, &ha->vp_list, list) {
6800 if (vp->vp_idx) {
6801 atomic_inc(&vp->vref_count);
6802 spin_unlock_irqrestore(&ha->vport_slock, flags);
6803
e315cd28 6804 qla2x00_vp_abort_isp(vp);
feafb7b1
AE		 6805
6806 spin_lock_irqsave(&ha->vport_slock, flags);
6807 atomic_dec(&vp->vref_count);
6808 }
e315cd28 6809 }
feafb7b1
AE		 6810 spin_unlock_irqrestore(&ha->vport_slock, flags);
6811
7d613ac6
SV		 6812 if (IS_QLA8031(ha)) {
6813 ql_dbg(ql_dbg_p3p, vha, 0xb05d,
6814 "Setting back fcoe driver presence.\n");
6815 if (qla83xx_set_drv_presence(vha) != QLA_SUCCESS)
6816 ql_dbg(ql_dbg_p3p, vha, 0xb074,
6817 "Error while setting DRV-Presence.\n");
6818 }
e315cd28 6819 } else {
d8424f68
JP		 6820 ql_log(ql_log_warn, vha, 0x8023, "%s **** FAILED ****.\n",
6821 __func__);
1da177e4
LT		 6822 }
6823
6824 return(status);
6825}
6826
6827/*
6828* qla2x00_restart_isp
6829* restarts the ISP after a reset
6830*
6831* Input:
6832* ha = adapter block pointer.
6833*
6834* Returns:
6835* 0 = success
6836*/
6837static int
e315cd28 6838qla2x00_restart_isp(scsi_qla_host_t *vha)
1da177e4 6839{
c6b2fca8 6840 int status = 0;
e315cd28 6841 struct qla_hw_data *ha = vha->hw;
73208dfd
AC		 6842 struct req_que *req = ha->req_q_map[0];
6843 struct rsp_que *rsp = ha->rsp_q_map[0];
1da177e4
LT		 6844
6845 /* If firmware needs to be loaded */
e315cd28
AC		 6846 if (qla2x00_isp_firmware(vha)) {
6847 vha->flags.online = 0;
6848 status = ha->isp_ops->chip_diag(vha);
6849 if (!status)
6850 status = qla2x00_setup_chip(vha);
1da177e4
LT		 6851 }
6852
e315cd28
AC		 6853 if (!status && !(status = qla2x00_init_rings(vha))) {
6854 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
2533cf67 6855 ha->flags.chip_reset_done = 1;
7108b76e 6856
73208dfd
AC		 6857 /* Initialize the queues in use */
6858 qla25xx_init_queues(ha);
6859
e315cd28
AC		 6860 status = qla2x00_fw_ready(vha);
6861 if (!status) {
0107109e 6862 /* Issue a marker after FW becomes ready. */
73208dfd 6863 qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL);
7108b76e 6864 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
1da177e4
LT		 6865 }
6866
6867 /* if no cable then assume it's good */
e315cd28 6868 if ((vha->device_flags & DFLG_NO_CABLE))
1da177e4 6869 status = 0;
1da177e4
LT		 6870 }
6871 return (status);
6872}
6873
73208dfd
AC		 6874static int
6875qla25xx_init_queues(struct qla_hw_data *ha)
6876{
6877 struct rsp_que *rsp = NULL;
6878 struct req_que *req = NULL;
6879 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
6880 int ret = -1;
6881 int i;
6882
2afa19a9 6883 for (i = 1; i < ha->max_rsp_queues; i++) {
73208dfd 6884 rsp = ha->rsp_q_map[i];
cb43285f 6885 if (rsp && test_bit(i, ha->rsp_qid_map)) {
73208dfd 6886 rsp->options &= ~BIT_0;
618a7523 6887 ret = qla25xx_init_rsp_que(base_vha, rsp);
73208dfd 6888 if (ret != QLA_SUCCESS)
7c3df132
SK		 6889 ql_dbg(ql_dbg_init, base_vha, 0x00ff,
6890 "%s Rsp que: %d init failed.\n",
6891 __func__, rsp->id);
73208dfd 6892 else
7c3df132
SK		 6893 ql_dbg(ql_dbg_init, base_vha, 0x0100,
6894 "%s Rsp que: %d inited.\n",
6895 __func__, rsp->id);
73208dfd 6896 }
2afa19a9
AC		 6897 }
6898 for (i = 1; i < ha->max_req_queues; i++) {
73208dfd 6899 req = ha->req_q_map[i];
cb43285f
QT		 6900 if (req && test_bit(i, ha->req_qid_map)) {
6901 /* Clear outstanding commands array. */
73208dfd 6902 req->options &= ~BIT_0;
618a7523 6903 ret = qla25xx_init_req_que(base_vha, req);
73208dfd 6904 if (ret != QLA_SUCCESS)
7c3df132
SK		 6905 ql_dbg(ql_dbg_init, base_vha, 0x0101,
6906 "%s Req que: %d init failed.\n",
6907 __func__, req->id);
73208dfd 6908 else
7c3df132
SK		 6909 ql_dbg(ql_dbg_init, base_vha, 0x0102,
6910 "%s Req que: %d inited.\n",
6911 __func__, req->id);
73208dfd
AC		 6912 }
6913 }
6914 return ret;
6915}
6916
1da177e4
LT		 6917/*
6918* qla2x00_reset_adapter
6919* Reset adapter.
6920*
6921* Input:
6922* ha = adapter block pointer.
6923*/
abbd8870 6924void
e315cd28 6925qla2x00_reset_adapter(scsi_qla_host_t *vha)
1da177e4
LT		 6926{
6927 unsigned long flags = 0;
e315cd28 6928 struct qla_hw_data *ha = vha->hw;
3d71644c 6929 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1da177e4 6930
e315cd28 6931 vha->flags.online = 0;
fd34f556 6932 ha->isp_ops->disable_intrs(ha);
1da177e4 6933
1da177e4
LT		 6934 spin_lock_irqsave(&ha->hardware_lock, flags);
6935 WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
6936 RD_REG_WORD(&reg->hccr); /* PCI Posting. */
6937 WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
6938 RD_REG_WORD(&reg->hccr); /* PCI Posting. */
6939 spin_unlock_irqrestore(&ha->hardware_lock, flags);
6940}
0107109e
AV		 6941
6942void
e315cd28 6943qla24xx_reset_adapter(scsi_qla_host_t *vha)
0107109e
AV		 6944{
6945 unsigned long flags = 0;
e315cd28 6946 struct qla_hw_data *ha = vha->hw;
0107109e
AV		 6947 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
6948
7ec0effd 6949 if (IS_P3P_TYPE(ha))
a9083016
GM		 6950 return;
6951
e315cd28 6952 vha->flags.online = 0;
fd34f556 6953 ha->isp_ops->disable_intrs(ha);
0107109e
AV		 6954
6955 spin_lock_irqsave(&ha->hardware_lock, flags);
6956 WRT_REG_DWORD(&reg->hccr, HCCRX_SET_RISC_RESET);
6957 RD_REG_DWORD(&reg->hccr);
6958 WRT_REG_DWORD(&reg->hccr, HCCRX_REL_RISC_PAUSE);
6959 RD_REG_DWORD(&reg->hccr);
6960 spin_unlock_irqrestore(&ha->hardware_lock, flags);
09ff36d3
AV		 6961
6962 if (IS_NOPOLLING_TYPE(ha))
6963 ha->isp_ops->enable_intrs(ha);
0107109e
AV		 6964}
6965
4e08df3f
DM		 6966/* On sparc systems, obtain port and node WWN from firmware
6967 * properties.
6968 */
e315cd28
AC		 6969static void qla24xx_nvram_wwn_from_ofw(scsi_qla_host_t *vha,
6970 struct nvram_24xx *nv)
4e08df3f
DM		 6971{
6972#ifdef CONFIG_SPARC
e315cd28 6973 struct qla_hw_data *ha = vha->hw;
4e08df3f 6974 struct pci_dev *pdev = ha->pdev;
15576bc8
DM		 6975 struct device_node *dp = pci_device_to_OF_node(pdev);
6976 const u8 *val;
4e08df3f
DM		 6977 int len;
6978
6979 val = of_get_property(dp, "port-wwn", &len);
6980 if (val && len >= WWN_SIZE)
6981 memcpy(nv->port_name, val, WWN_SIZE);
6982
6983 val = of_get_property(dp, "node-wwn", &len);
6984 if (val && len >= WWN_SIZE)
6985 memcpy(nv->node_name, val, WWN_SIZE);
6986#endif
6987}
6988
0107109e 6989int
e315cd28 6990qla24xx_nvram_config(scsi_qla_host_t *vha)
0107109e 6991{
4e08df3f 6992 int rval;
0107109e
AV		 6993 struct init_cb_24xx *icb;
6994 struct nvram_24xx *nv;
6995 uint32_t *dptr;
6996 uint8_t *dptr1, *dptr2;
6997 uint32_t chksum;
6998 uint16_t cnt;
e315cd28 6999 struct qla_hw_data *ha = vha->hw;
0107109e 7000
4e08df3f 7001 rval = QLA_SUCCESS;
0107109e 7002 icb = (struct init_cb_24xx *)ha->init_cb;
281afe19 7003 nv = ha->nvram;
0107109e
AV		 7004
7005 /* Determine NVRAM starting address. */
f73cb695 7006 if (ha->port_no == 0) {
e5b68a61
AC		 7007 ha->nvram_base = FA_NVRAM_FUNC0_ADDR;
7008 ha->vpd_base = FA_NVRAM_VPD0_ADDR;
7009 } else {
0107109e 7010 ha->nvram_base = FA_NVRAM_FUNC1_ADDR;
6f641790 7011 ha->vpd_base = FA_NVRAM_VPD1_ADDR;
7012 }
f73cb695 7013
e5b68a61
AC		 7014 ha->nvram_size = sizeof(struct nvram_24xx);
7015 ha->vpd_size = FA_NVRAM_VPD_SIZE;
0107109e 7016
281afe19
SJ		 7017 /* Get VPD data into cache */
7018 ha->vpd = ha->nvram + VPD_OFFSET;
e315cd28 7019 ha->isp_ops->read_nvram(vha, (uint8_t *)ha->vpd,
281afe19
SJ		 7020 ha->nvram_base - FA_NVRAM_FUNC0_ADDR, FA_NVRAM_VPD_SIZE * 4);
7021
7022 /* Get NVRAM data into cache and calculate checksum. */
0107109e 7023 dptr = (uint32_t *)nv;
e315cd28 7024 ha->isp_ops->read_nvram(vha, (uint8_t *)dptr, ha->nvram_base,
0107109e 7025 ha->nvram_size);
da08ef5c
JC		 7026 for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++, dptr++)
7027 chksum += le32_to_cpu(*dptr);
0107109e 7028
7c3df132
SK		 7029 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x006a,
7030 "Contents of NVRAM\n");
7031 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x010d,
7032 (uint8_t *)nv, ha->nvram_size);
0107109e
AV		 7033
7034 /* Bad NVRAM data, set defaults parameters. */
7035 if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P'
7036 || nv->id[3] != ' ' ||
ad950360 7037 nv->nvram_version < cpu_to_le16(ICB_VERSION)) {
0107109e 7038 /* Reset NVRAM data. */
7c3df132 7039 ql_log(ql_log_warn, vha, 0x006b,
9e336520 7040 "Inconsistent NVRAM detected: checksum=0x%x id=%c "
7c3df132
SK		 7041 "version=0x%x.\n", chksum, nv->id[0], nv->nvram_version);
7042 ql_log(ql_log_warn, vha, 0x006c,
7043 "Falling back to functioning (yet invalid -- WWPN) "
7044 "defaults.\n");
4e08df3f
DM		 7045
7046 /*
7047 * Set default initialization control block.
7048 */
7049 memset(nv, 0, ha->nvram_size);
ad950360
BVA		 7050 nv->nvram_version = cpu_to_le16(ICB_VERSION);
7051 nv->version = cpu_to_le16(ICB_VERSION);
98aee70d 7052 nv->frame_payload_size = 2048;
ad950360
BVA		 7053 nv->execution_throttle = cpu_to_le16(0xFFFF);
7054 nv->exchange_count = cpu_to_le16(0);
7055 nv->hard_address = cpu_to_le16(124);
4e08df3f 7056 nv->port_name[0] = 0x21;
f73cb695 7057 nv->port_name[1] = 0x00 + ha->port_no + 1;
4e08df3f
DM		 7058 nv->port_name[2] = 0x00;
7059 nv->port_name[3] = 0xe0;
7060 nv->port_name[4] = 0x8b;
7061 nv->port_name[5] = 0x1c;
7062 nv->port_name[6] = 0x55;
7063 nv->port_name[7] = 0x86;
7064 nv->node_name[0] = 0x20;
7065 nv->node_name[1] = 0x00;
7066 nv->node_name[2] = 0x00;
7067 nv->node_name[3] = 0xe0;
7068 nv->node_name[4] = 0x8b;
7069 nv->node_name[5] = 0x1c;
7070 nv->node_name[6] = 0x55;
7071 nv->node_name[7] = 0x86;
e315cd28 7072 qla24xx_nvram_wwn_from_ofw(vha, nv);
ad950360
BVA		 7073 nv->login_retry_count = cpu_to_le16(8);
7074 nv->interrupt_delay_timer = cpu_to_le16(0);
7075 nv->login_timeout = cpu_to_le16(0);
4e08df3f 7076 nv->firmware_options_1 =
ad950360
BVA		 7077 cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1);
7078 nv->firmware_options_2 = cpu_to_le32(2 << 4);
7079 nv->firmware_options_2 |= cpu_to_le32(BIT_12);
7080 nv->firmware_options_3 = cpu_to_le32(2 << 13);
7081 nv->host_p = cpu_to_le32(BIT_11|BIT_10);
7082 nv->efi_parameters = cpu_to_le32(0);
4e08df3f 7083 nv->reset_delay = 5;
ad950360
BVA		 7084 nv->max_luns_per_target = cpu_to_le16(128);
7085 nv->port_down_retry_count = cpu_to_le16(30);
7086 nv->link_down_timeout = cpu_to_le16(30);
4e08df3f
DM		 7087
7088 rval = 1;
0107109e
AV		 7089 }
7090
726b8548 7091 if (qla_tgt_mode_enabled(vha)) {
2d70c103 7092 /* Don't enable full login after initial LIP */
ad950360 7093 nv->firmware_options_1 &= cpu_to_le32(~BIT_13);
2d70c103 7094 /* Don't enable LIP full login for initiator */
ad950360 7095 nv->host_p &= cpu_to_le32(~BIT_10);
2d70c103
NB		 7096 }
7097
7098 qlt_24xx_config_nvram_stage1(vha, nv);
7099
0107109e 7100 /* Reset Initialization control block */
e315cd28 7101 memset(icb, 0, ha->init_cb_size);
0107109e
AV		 7102
7103 /* Copy 1st segment. */
7104 dptr1 = (uint8_t *)icb;
7105 dptr2 = (uint8_t *)&nv->version;
7106 cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version;
7107 while (cnt--)
7108 *dptr1++ = *dptr2++;
7109
7110 icb->login_retry_count = nv->login_retry_count;
3ea66e28 7111 icb->link_down_on_nos = nv->link_down_on_nos;
0107109e
AV		 7112
7113 /* Copy 2nd segment. */
7114 dptr1 = (uint8_t *)&icb->interrupt_delay_timer;
7115 dptr2 = (uint8_t *)&nv->interrupt_delay_timer;
7116 cnt = (uint8_t *)&icb->reserved_3 -
7117 (uint8_t *)&icb->interrupt_delay_timer;
7118 while (cnt--)
7119 *dptr1++ = *dptr2++;
0eaaca4c 7120 ha->frame_payload_size = le16_to_cpu(icb->frame_payload_size);
0107109e
AV		 7121 /*
7122 * Setup driver NVRAM options.
7123 */
e315cd28 7124 qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name),
9bb9fcf2 7125 "QLA2462");
0107109e 7126
2d70c103
NB		 7127 qlt_24xx_config_nvram_stage2(vha, icb);
7128
ad950360 7129 if (nv->host_p & cpu_to_le32(BIT_15)) {
2d70c103 7130 /* Use alternate WWN? */
5341e868
AV		 7131 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
7132 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
7133 }
7134
0107109e 7135 /* Prepare nodename */
ad950360 7136 if ((icb->firmware_options_1 & cpu_to_le32(BIT_14)) == 0) {
0107109e
AV		 7137 /*
7138 * Firmware will apply the following mask if the nodename was
7139 * not provided.
7140 */
7141 memcpy(icb->node_name, icb->port_name, WWN_SIZE);
7142 icb->node_name[0] &= 0xF0;
7143 }
7144
7145 /* Set host adapter parameters. */
7146 ha->flags.disable_risc_code_load = 0;
0c8c39af
AV		 7147 ha->flags.enable_lip_reset = 0;
7148 ha->flags.enable_lip_full_login =
7149 le32_to_cpu(nv->host_p) & BIT_10 ? 1: 0;
7150 ha->flags.enable_target_reset =
7151 le32_to_cpu(nv->host_p) & BIT_11 ? 1: 0;
0107109e 7152 ha->flags.enable_led_scheme = 0;
d4c760c2 7153 ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1: 0;
0107109e 7154
fd0e7e4d
AV		 7155 ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) &
7156 (BIT_6 | BIT_5 | BIT_4)) >> 4;
0107109e
AV		 7157
7158 memcpy(ha->fw_seriallink_options24, nv->seriallink_options,
7159 sizeof(ha->fw_seriallink_options24));
7160
7161 /* save HBA serial number */
7162 ha->serial0 = icb->port_name[5];
7163 ha->serial1 = icb->port_name[6];
7164 ha->serial2 = icb->port_name[7];
e315cd28
AC		 7165 memcpy(vha->node_name, icb->node_name, WWN_SIZE);
7166 memcpy(vha->port_name, icb->port_name, WWN_SIZE);
0107109e 7167
ad950360 7168 icb->execution_throttle = cpu_to_le16(0xFFFF);
bc8fb3cb 7169
0107109e
AV		 7170 ha->retry_count = le16_to_cpu(nv->login_retry_count);
7171
7172 /* Set minimum login_timeout to 4 seconds. */
7173 if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout)
7174 nv->login_timeout = cpu_to_le16(ql2xlogintimeout);
7175 if (le16_to_cpu(nv->login_timeout) < 4)
ad950360 7176 nv->login_timeout = cpu_to_le16(4);
0107109e 7177 ha->login_timeout = le16_to_cpu(nv->login_timeout);
0107109e 7178
00a537b8
AV		 7179 /* Set minimum RATOV to 100 tenths of a second. */
7180 ha->r_a_tov = 100;
0107109e
AV		 7181
7182 ha->loop_reset_delay = nv->reset_delay;
7183
7184 /* Link Down Timeout = 0:
7185 *
7186 * When Port Down timer expires we will start returning
7187 * I/O's to OS with "DID_NO_CONNECT".
7188 *
7189 * Link Down Timeout != 0:
7190 *
7191 * The driver waits for the link to come up after link down
7192 * before returning I/Os to OS with "DID_NO_CONNECT".
7193 */
7194 if (le16_to_cpu(nv->link_down_timeout) == 0) {
7195 ha->loop_down_abort_time =
7196 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
7197 } else {
7198 ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout);
7199 ha->loop_down_abort_time =
7200 (LOOP_DOWN_TIME - ha->link_down_timeout);
7201 }
7202
7203 /* Need enough time to try and get the port back. */
7204 ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count);
7205 if (qlport_down_retry)
7206 ha->port_down_retry_count = qlport_down_retry;
7207
7208 /* Set login_retry_count */
7209 ha->login_retry_count = le16_to_cpu(nv->login_retry_count);
7210 if (ha->port_down_retry_count ==
7211 le16_to_cpu(nv->port_down_retry_count) &&
7212 ha->port_down_retry_count > 3)
7213 ha->login_retry_count = ha->port_down_retry_count;
7214 else if (ha->port_down_retry_count > (int)ha->login_retry_count)
7215 ha->login_retry_count = ha->port_down_retry_count;
7216 if (ql2xloginretrycount)
7217 ha->login_retry_count = ql2xloginretrycount;
7218
8777e431
QT		 7219 /* N2N: driver will initiate Login instead of FW */
7220 icb->firmware_options_3 |= BIT_8;
7221
4fdfefe5 7222 /* Enable ZIO. */
e315cd28 7223 if (!vha->flags.init_done) {
4fdfefe5
AV		 7224 ha->zio_mode = le32_to_cpu(icb->firmware_options_2) &
7225 (BIT_3 | BIT_2 | BIT_1 | BIT_0);
7226 ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ?
7227 le16_to_cpu(icb->interrupt_delay_timer): 2;
7228 }
ad950360 7229 icb->firmware_options_2 &= cpu_to_le32(
4fdfefe5 7230 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0));
4fdfefe5 7231 if (ha->zio_mode != QLA_ZIO_DISABLED) {
4a59f71d 7232 ha->zio_mode = QLA_ZIO_MODE_6;
7233
7c3df132 7234 ql_log(ql_log_info, vha, 0x006f,
4fdfefe5
AV		 7235 "ZIO mode %d enabled; timer delay (%d us).\n",
7236 ha->zio_mode, ha->zio_timer * 100);
7237
7238 icb->firmware_options_2 |= cpu_to_le32(
7239 (uint32_t)ha->zio_mode);
7240 icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer);
4fdfefe5
AV		 7241 }
7242
4e08df3f 7243 if (rval) {
7c3df132
SK		 7244 ql_log(ql_log_warn, vha, 0x0070,
7245 "NVRAM configuration failed.\n");
4e08df3f
DM		 7246 }
7247 return (rval);
0107109e
AV		 7248}
7249
4243c115
SC		 7250uint8_t qla27xx_find_valid_image(struct scsi_qla_host *vha)
7251{
7252 struct qla27xx_image_status pri_image_status, sec_image_status;
7253 uint8_t valid_pri_image, valid_sec_image;
7254 uint32_t *wptr;
7255 uint32_t cnt, chksum, size;
7256 struct qla_hw_data *ha = vha->hw;
7257
7258 valid_pri_image = valid_sec_image = 1;
7259 ha->active_image = 0;
7260 size = sizeof(struct qla27xx_image_status) / sizeof(uint32_t);
7261
7262 if (!ha->flt_region_img_status_pri) {
7263 valid_pri_image = 0;
7264 goto check_sec_image;
7265 }
7266
7267 qla24xx_read_flash_data(vha, (uint32_t *)(&pri_image_status),
7268 ha->flt_region_img_status_pri, size);
7269
7270 if (pri_image_status.signature != QLA27XX_IMG_STATUS_SIGN) {
7271 ql_dbg(ql_dbg_init, vha, 0x018b,
7272 "Primary image signature (0x%x) not valid\n",
7273 pri_image_status.signature);
7274 valid_pri_image = 0;
7275 goto check_sec_image;
7276 }
7277
7278 wptr = (uint32_t *)(&pri_image_status);
7279 cnt = size;
7280
da08ef5c
JC		 7281 for (chksum = 0; cnt--; wptr++)
7282 chksum += le32_to_cpu(*wptr);
41dc529a 7283
4243c115
SC		 7284 if (chksum) {
7285 ql_dbg(ql_dbg_init, vha, 0x018c,
7286 "Checksum validation failed for primary image (0x%x)\n",
7287 chksum);
7288 valid_pri_image = 0;
7289 }
7290
7291check_sec_image:
7292 if (!ha->flt_region_img_status_sec) {
7293 valid_sec_image = 0;
7294 goto check_valid_image;
7295 }
7296
7297 qla24xx_read_flash_data(vha, (uint32_t *)(&sec_image_status),
7298 ha->flt_region_img_status_sec, size);
7299
7300 if (sec_image_status.signature != QLA27XX_IMG_STATUS_SIGN) {
7301 ql_dbg(ql_dbg_init, vha, 0x018d,
7302 "Secondary image signature(0x%x) not valid\n",
7303 sec_image_status.signature);
7304 valid_sec_image = 0;
7305 goto check_valid_image;
7306 }
7307
7308 wptr = (uint32_t *)(&sec_image_status);
7309 cnt = size;
da08ef5c
JC		 7310 for (chksum = 0; cnt--; wptr++)
7311 chksum += le32_to_cpu(*wptr);
4243c115
SC		 7312 if (chksum) {
7313 ql_dbg(ql_dbg_init, vha, 0x018e,
7314 "Checksum validation failed for secondary image (0x%x)\n",
7315 chksum);
7316 valid_sec_image = 0;
7317 }
7318
7319check_valid_image:
7320 if (valid_pri_image && (pri_image_status.image_status_mask & 0x1))
7321 ha->active_image = QLA27XX_PRIMARY_IMAGE;
7322 if (valid_sec_image && (sec_image_status.image_status_mask & 0x1)) {
7323 if (!ha->active_image ||
7324 pri_image_status.generation_number <
7325 sec_image_status.generation_number)
7326 ha->active_image = QLA27XX_SECONDARY_IMAGE;
7327 }
7328
22ebde16 7329 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x018f, "%s image\n",
4243c115
SC		 7330 ha->active_image == 0 ? "default bootld and fw" :
7331 ha->active_image == 1 ? "primary" :
7332 ha->active_image == 2 ? "secondary" :
7333 "Invalid");
7334
7335 return ha->active_image;
7336}
7337
413975a0 7338static int
cbc8eb67
AV		 7339qla24xx_load_risc_flash(scsi_qla_host_t *vha, uint32_t *srisc_addr,
7340 uint32_t faddr)
d1c61909 7341{
73208dfd 7342 int rval = QLA_SUCCESS;
d1c61909 7343 int segments, fragment;
d1c61909
AV		 7344 uint32_t *dcode, dlen;
7345 uint32_t risc_addr;
7346 uint32_t risc_size;
7347 uint32_t i;
e315cd28 7348 struct qla_hw_data *ha = vha->hw;
73208dfd 7349 struct req_que *req = ha->req_q_map[0];
eaac30be 7350
7c3df132 7351 ql_dbg(ql_dbg_init, vha, 0x008b,
cfb0919c 7352 "FW: Loading firmware from flash (%x).\n", faddr);
eaac30be 7353
d1c61909
AV		 7354 rval = QLA_SUCCESS;
7355
7356 segments = FA_RISC_CODE_SEGMENTS;
73208dfd 7357 dcode = (uint32_t *)req->ring;
d1c61909
AV		 7358 *srisc_addr = 0;
7359
4243c115
SC		 7360 if (IS_QLA27XX(ha) &&
7361 qla27xx_find_valid_image(vha) == QLA27XX_SECONDARY_IMAGE)
7362 faddr = ha->flt_region_fw_sec;
7363
d1c61909 7364 /* Validate firmware image by checking version. */
e315cd28 7365 qla24xx_read_flash_data(vha, dcode, faddr + 4, 4);
d1c61909
AV		 7366 for (i = 0; i < 4; i++)
7367 dcode[i] = be32_to_cpu(dcode[i]);
7368 if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff &&
7369 dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) ||
7370 (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 &&
7371 dcode[3] == 0)) {
7c3df132
SK		 7372 ql_log(ql_log_fatal, vha, 0x008c,
7373 "Unable to verify the integrity of flash firmware "
7374 "image.\n");
7375 ql_log(ql_log_fatal, vha, 0x008d,
7376 "Firmware data: %08x %08x %08x %08x.\n",
7377 dcode[0], dcode[1], dcode[2], dcode[3]);
d1c61909
AV		 7378
7379 return QLA_FUNCTION_FAILED;
7380 }
7381
7382 while (segments && rval == QLA_SUCCESS) {
7383 /* Read segment's load information. */
e315cd28 7384 qla24xx_read_flash_data(vha, dcode, faddr, 4);
d1c61909
AV		 7385
7386 risc_addr = be32_to_cpu(dcode[2]);
7387 *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr;
7388 risc_size = be32_to_cpu(dcode[3]);
7389
7390 fragment = 0;
7391 while (risc_size > 0 && rval == QLA_SUCCESS) {
7392 dlen = (uint32_t)(ha->fw_transfer_size >> 2);
7393 if (dlen > risc_size)
7394 dlen = risc_size;
7395
7c3df132
SK		 7396 ql_dbg(ql_dbg_init, vha, 0x008e,
7397 "Loading risc segment@ risc addr %x "
7398 "number of dwords 0x%x offset 0x%x.\n",
7399 risc_addr, dlen, faddr);
d1c61909 7400
e315cd28 7401 qla24xx_read_flash_data(vha, dcode, faddr, dlen);
d1c61909
AV		 7402 for (i = 0; i < dlen; i++)
7403 dcode[i] = swab32(dcode[i]);
7404
73208dfd 7405 rval = qla2x00_load_ram(vha, req->dma, risc_addr,
d1c61909
AV		 7406 dlen);
7407 if (rval) {
7c3df132
SK		 7408 ql_log(ql_log_fatal, vha, 0x008f,
7409 "Failed to load segment %d of firmware.\n",
7410 fragment);
f261f7af 7411 return QLA_FUNCTION_FAILED;
d1c61909
AV		 7412 }
7413
7414 faddr += dlen;
7415 risc_addr += dlen;
7416 risc_size -= dlen;
7417 fragment++;
7418 }
7419
7420 /* Next segment. */
7421 segments--;
7422 }
7423
f73cb695
CD		 7424 if (!IS_QLA27XX(ha))
7425 return rval;
7426
7427 if (ha->fw_dump_template)
7428 vfree(ha->fw_dump_template);
7429 ha->fw_dump_template = NULL;
7430 ha->fw_dump_template_len = 0;
7431
7432 ql_dbg(ql_dbg_init, vha, 0x0161,
7433 "Loading fwdump template from %x\n", faddr);
7434 qla24xx_read_flash_data(vha, dcode, faddr, 7);
7435 risc_size = be32_to_cpu(dcode[2]);
7436 ql_dbg(ql_dbg_init, vha, 0x0162,
7437 "-> array size %x dwords\n", risc_size);
7438 if (risc_size == 0 || risc_size == ~0)
7439 goto default_template;
7440
7441 dlen = (risc_size - 8) * sizeof(*dcode);
7442 ql_dbg(ql_dbg_init, vha, 0x0163,
7443 "-> template allocating %x bytes...\n", dlen);
7444 ha->fw_dump_template = vmalloc(dlen);
7445 if (!ha->fw_dump_template) {
7446 ql_log(ql_log_warn, vha, 0x0164,
7447 "Failed fwdump template allocate %x bytes.\n", risc_size);
7448 goto default_template;
7449 }
7450
7451 faddr += 7;
7452 risc_size -= 8;
7453 dcode = ha->fw_dump_template;
7454 qla24xx_read_flash_data(vha, dcode, faddr, risc_size);
7455 for (i = 0; i < risc_size; i++)
7456 dcode[i] = le32_to_cpu(dcode[i]);
7457
7458 if (!qla27xx_fwdt_template_valid(dcode)) {
7459 ql_log(ql_log_warn, vha, 0x0165,
7460 "Failed fwdump template validate\n");
7461 goto default_template;
7462 }
7463
7464 dlen = qla27xx_fwdt_template_size(dcode);
7465 ql_dbg(ql_dbg_init, vha, 0x0166,
7466 "-> template size %x bytes\n", dlen);
7467 if (dlen > risc_size * sizeof(*dcode)) {
7468 ql_log(ql_log_warn, vha, 0x0167,
4fae52b5 7469 "Failed fwdump template exceeds array by %zx bytes\n",
383a298b 7470 (size_t)(dlen - risc_size * sizeof(*dcode)));
f73cb695
CD		 7471 goto default_template;
7472 }
7473 ha->fw_dump_template_len = dlen;
7474 return rval;
7475
7476default_template:
7477 ql_log(ql_log_warn, vha, 0x0168, "Using default fwdump template\n");
7478 if (ha->fw_dump_template)
7479 vfree(ha->fw_dump_template);
7480 ha->fw_dump_template = NULL;
7481 ha->fw_dump_template_len = 0;
7482
7483 dlen = qla27xx_fwdt_template_default_size();
7484 ql_dbg(ql_dbg_init, vha, 0x0169,
7485 "-> template allocating %x bytes...\n", dlen);
7486 ha->fw_dump_template = vmalloc(dlen);
7487 if (!ha->fw_dump_template) {
7488 ql_log(ql_log_warn, vha, 0x016a,
7489 "Failed fwdump template allocate %x bytes.\n", risc_size);
7490 goto failed_template;
7491 }
7492
7493 dcode = ha->fw_dump_template;
7494 risc_size = dlen / sizeof(*dcode);
7495 memcpy(dcode, qla27xx_fwdt_template_default(), dlen);
7496 for (i = 0; i < risc_size; i++)
7497 dcode[i] = be32_to_cpu(dcode[i]);
7498
7499 if (!qla27xx_fwdt_template_valid(ha->fw_dump_template)) {
7500 ql_log(ql_log_warn, vha, 0x016b,
7501 "Failed fwdump template validate\n");
7502 goto failed_template;
7503 }
7504
7505 dlen = qla27xx_fwdt_template_size(ha->fw_dump_template);
7506 ql_dbg(ql_dbg_init, vha, 0x016c,
7507 "-> template size %x bytes\n", dlen);
7508 ha->fw_dump_template_len = dlen;
7509 return rval;
7510
7511failed_template:
7512 ql_log(ql_log_warn, vha, 0x016d, "Failed default fwdump template\n");
7513 if (ha->fw_dump_template)
7514 vfree(ha->fw_dump_template);
7515 ha->fw_dump_template = NULL;
7516 ha->fw_dump_template_len = 0;
d1c61909
AV		 7517 return rval;
7518}
7519
e9454a88 7520#define QLA_FW_URL "http://ldriver.qlogic.com/firmware/"
d1c61909 7521
0107109e 7522int
e315cd28 7523qla2x00_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
5433383e
AV		 7524{
7525 int rval;
7526 int i, fragment;
7527 uint16_t *wcode, *fwcode;
7528 uint32_t risc_addr, risc_size, fwclen, wlen, *seg;
7529 struct fw_blob *blob;
e315cd28 7530 struct qla_hw_data *ha = vha->hw;
73208dfd 7531 struct req_que *req = ha->req_q_map[0];
5433383e
AV		 7532
7533 /* Load firmware blob. */
e315cd28 7534 blob = qla2x00_request_firmware(vha);
5433383e 7535 if (!blob) {
7c3df132 7536 ql_log(ql_log_info, vha, 0x0083,
94bcf830 7537 "Firmware image unavailable.\n");
7c3df132
SK		 7538 ql_log(ql_log_info, vha, 0x0084,
7539 "Firmware images can be retrieved from: "QLA_FW_URL ".\n");
5433383e
AV		 7540 return QLA_FUNCTION_FAILED;
7541 }
7542
7543 rval = QLA_SUCCESS;
7544
73208dfd 7545 wcode = (uint16_t *)req->ring;
5433383e
AV		 7546 *srisc_addr = 0;
7547 fwcode = (uint16_t *)blob->fw->data;
7548 fwclen = 0;
7549
7550 /* Validate firmware image by checking version. */
7551 if (blob->fw->size < 8 * sizeof(uint16_t)) {
7c3df132 7552 ql_log(ql_log_fatal, vha, 0x0085,
5b5e0928 7553 "Unable to verify integrity of firmware image (%zd).\n",
5433383e
AV		 7554 blob->fw->size);
7555 goto fail_fw_integrity;
7556 }
7557 for (i = 0; i < 4; i++)
7558 wcode[i] = be16_to_cpu(fwcode[i + 4]);
7559 if ((wcode[0] == 0xffff && wcode[1] == 0xffff && wcode[2] == 0xffff &&
7560 wcode[3] == 0xffff) || (wcode[0] == 0 && wcode[1] == 0 &&
7561 wcode[2] == 0 && wcode[3] == 0)) {
7c3df132
SK		 7562 ql_log(ql_log_fatal, vha, 0x0086,
7563 "Unable to verify integrity of firmware image.\n");
7564 ql_log(ql_log_fatal, vha, 0x0087,
7565 "Firmware data: %04x %04x %04x %04x.\n",
7566 wcode[0], wcode[1], wcode[2], wcode[3]);
5433383e
AV		 7567 goto fail_fw_integrity;
7568 }
7569
7570 seg = blob->segs;
7571 while (*seg && rval == QLA_SUCCESS) {
7572 risc_addr = *seg;
7573 *srisc_addr = *srisc_addr == 0 ? *seg : *srisc_addr;
7574 risc_size = be16_to_cpu(fwcode[3]);
7575
7576 /* Validate firmware image size. */
7577 fwclen += risc_size * sizeof(uint16_t);
7578 if (blob->fw->size < fwclen) {
7c3df132 7579 ql_log(ql_log_fatal, vha, 0x0088,
5433383e 7580 "Unable to verify integrity of firmware image "
5b5e0928 7581 "(%zd).\n", blob->fw->size);
5433383e
AV		 7582 goto fail_fw_integrity;
7583 }
7584
7585 fragment = 0;
7586 while (risc_size > 0 && rval == QLA_SUCCESS) {
7587 wlen = (uint16_t)(ha->fw_transfer_size >> 1);
7588 if (wlen > risc_size)
7589 wlen = risc_size;
7c3df132
SK		 7590 ql_dbg(ql_dbg_init, vha, 0x0089,
7591 "Loading risc segment@ risc addr %x number of "
7592 "words 0x%x.\n", risc_addr, wlen);
5433383e
AV		 7593
7594 for (i = 0; i < wlen; i++)
7595 wcode[i] = swab16(fwcode[i]);
7596
73208dfd 7597 rval = qla2x00_load_ram(vha, req->dma, risc_addr,
5433383e
AV		 7598 wlen);
7599 if (rval) {
7c3df132
SK		 7600 ql_log(ql_log_fatal, vha, 0x008a,
7601 "Failed to load segment %d of firmware.\n",
7602 fragment);
5433383e
AV		 7603 break;
7604 }
7605
7606 fwcode += wlen;
7607 risc_addr += wlen;
7608 risc_size -= wlen;
7609 fragment++;
7610 }
7611
7612 /* Next segment. */
7613 seg++;
7614 }
7615 return rval;
7616
7617fail_fw_integrity:
7618 return QLA_FUNCTION_FAILED;
7619}
7620
eaac30be
AV		 7621static int
7622qla24xx_load_risc_blob(scsi_qla_host_t *vha, uint32_t *srisc_addr)
0107109e
AV		 7623{
7624 int rval;
7625 int segments, fragment;
7626 uint32_t *dcode, dlen;
7627 uint32_t risc_addr;
7628 uint32_t risc_size;
7629 uint32_t i;
5433383e 7630 struct fw_blob *blob;
f73cb695
CD		 7631 const uint32_t *fwcode;
7632 uint32_t fwclen;
e315cd28 7633 struct qla_hw_data *ha = vha->hw;
73208dfd 7634 struct req_que *req = ha->req_q_map[0];
0107109e 7635
5433383e 7636 /* Load firmware blob. */
e315cd28 7637 blob = qla2x00_request_firmware(vha);
5433383e 7638 if (!blob) {
7c3df132 7639 ql_log(ql_log_warn, vha, 0x0090,
94bcf830 7640 "Firmware image unavailable.\n");
7c3df132
SK		 7641 ql_log(ql_log_warn, vha, 0x0091,
7642 "Firmware images can be retrieved from: "
7643 QLA_FW_URL ".\n");
d1c61909 7644
eaac30be 7645 return QLA_FUNCTION_FAILED;
0107109e
AV		 7646 }
7647
cfb0919c
CD		 7648 ql_dbg(ql_dbg_init, vha, 0x0092,
7649 "FW: Loading via request-firmware.\n");
eaac30be 7650
0107109e
AV		 7651 rval = QLA_SUCCESS;
7652
7653 segments = FA_RISC_CODE_SEGMENTS;
73208dfd 7654 dcode = (uint32_t *)req->ring;
0107109e 7655 *srisc_addr = 0;
5433383e 7656 fwcode = (uint32_t *)blob->fw->data;
0107109e
AV		 7657 fwclen = 0;
7658
7659 /* Validate firmware image by checking version. */
5433383e 7660 if (blob->fw->size < 8 * sizeof(uint32_t)) {
7c3df132 7661 ql_log(ql_log_fatal, vha, 0x0093,
5b5e0928 7662 "Unable to verify integrity of firmware image (%zd).\n",
5433383e 7663 blob->fw->size);
f73cb695 7664 return QLA_FUNCTION_FAILED;
0107109e
AV		 7665 }
7666 for (i = 0; i < 4; i++)
7667 dcode[i] = be32_to_cpu(fwcode[i + 4]);
7668 if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff &&
7669 dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) ||
7670 (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 &&
7671 dcode[3] == 0)) {
7c3df132 7672 ql_log(ql_log_fatal, vha, 0x0094,
5b5e0928 7673 "Unable to verify integrity of firmware image (%zd).\n",
7c3df132
SK		 7674 blob->fw->size);
7675 ql_log(ql_log_fatal, vha, 0x0095,
7676 "Firmware data: %08x %08x %08x %08x.\n",
7677 dcode[0], dcode[1], dcode[2], dcode[3]);
f73cb695 7678 return QLA_FUNCTION_FAILED;
0107109e
AV		 7679 }
7680
7681 while (segments && rval == QLA_SUCCESS) {
7682 risc_addr = be32_to_cpu(fwcode[2]);
7683 *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr;
7684 risc_size = be32_to_cpu(fwcode[3]);
7685
7686 /* Validate firmware image size. */
7687 fwclen += risc_size * sizeof(uint32_t);
5433383e 7688 if (blob->fw->size < fwclen) {
7c3df132 7689 ql_log(ql_log_fatal, vha, 0x0096,
5433383e 7690 "Unable to verify integrity of firmware image "
5b5e0928 7691 "(%zd).\n", blob->fw->size);
f73cb695 7692 return QLA_FUNCTION_FAILED;
0107109e
AV		 7693 }
7694
7695 fragment = 0;
7696 while (risc_size > 0 && rval == QLA_SUCCESS) {
7697 dlen = (uint32_t)(ha->fw_transfer_size >> 2);
7698 if (dlen > risc_size)
7699 dlen = risc_size;
7700
7c3df132
SK		 7701 ql_dbg(ql_dbg_init, vha, 0x0097,
7702 "Loading risc segment@ risc addr %x "
7703 "number of dwords 0x%x.\n", risc_addr, dlen);
0107109e
AV		 7704
7705 for (i = 0; i < dlen; i++)
7706 dcode[i] = swab32(fwcode[i]);
7707
73208dfd 7708 rval = qla2x00_load_ram(vha, req->dma, risc_addr,
590f98e5 7709 dlen);
0107109e 7710 if (rval) {
7c3df132
SK		 7711 ql_log(ql_log_fatal, vha, 0x0098,
7712 "Failed to load segment %d of firmware.\n",
7713 fragment);
f261f7af 7714 return QLA_FUNCTION_FAILED;
0107109e
AV		 7715 }
7716
7717 fwcode += dlen;
7718 risc_addr += dlen;
7719 risc_size -= dlen;
7720 fragment++;
7721 }
7722
7723 /* Next segment. */
7724 segments--;
7725 }
f73cb695
CD		 7726
7727 if (!IS_QLA27XX(ha))
7728 return rval;
7729
7730 if (ha->fw_dump_template)
7731 vfree(ha->fw_dump_template);
7732 ha->fw_dump_template = NULL;
7733 ha->fw_dump_template_len = 0;
7734
7735 ql_dbg(ql_dbg_init, vha, 0x171,
97ea702b
CD		 7736 "Loading fwdump template from %x\n",
7737 (uint32_t)((void *)fwcode - (void *)blob->fw->data));
f73cb695
CD		 7738 risc_size = be32_to_cpu(fwcode[2]);
7739 ql_dbg(ql_dbg_init, vha, 0x172,
7740 "-> array size %x dwords\n", risc_size);
7741 if (risc_size == 0 || risc_size == ~0)
7742 goto default_template;
7743
7744 dlen = (risc_size - 8) * sizeof(*fwcode);
7745 ql_dbg(ql_dbg_init, vha, 0x0173,
7746 "-> template allocating %x bytes...\n", dlen);
7747 ha->fw_dump_template = vmalloc(dlen);
7748 if (!ha->fw_dump_template) {
7749 ql_log(ql_log_warn, vha, 0x0174,
7750 "Failed fwdump template allocate %x bytes.\n", risc_size);
7751 goto default_template;
7752 }
7753
7754 fwcode += 7;
7755 risc_size -= 8;
7756 dcode = ha->fw_dump_template;
7757 for (i = 0; i < risc_size; i++)
7758 dcode[i] = le32_to_cpu(fwcode[i]);
7759
7760 if (!qla27xx_fwdt_template_valid(dcode)) {
7761 ql_log(ql_log_warn, vha, 0x0175,
7762 "Failed fwdump template validate\n");
7763 goto default_template;
7764 }
7765
7766 dlen = qla27xx_fwdt_template_size(dcode);
7767 ql_dbg(ql_dbg_init, vha, 0x0176,
7768 "-> template size %x bytes\n", dlen);
7769 if (dlen > risc_size * sizeof(*fwcode)) {
7770 ql_log(ql_log_warn, vha, 0x0177,
4fae52b5 7771 "Failed fwdump template exceeds array by %zx bytes\n",
383a298b 7772 (size_t)(dlen - risc_size * sizeof(*fwcode)));
f73cb695
CD		 7773 goto default_template;
7774 }
7775 ha->fw_dump_template_len = dlen;
0107109e
AV		 7776 return rval;
7777
f73cb695
CD		 7778default_template:
7779 ql_log(ql_log_warn, vha, 0x0178, "Using default fwdump template\n");
7780 if (ha->fw_dump_template)
7781 vfree(ha->fw_dump_template);
7782 ha->fw_dump_template = NULL;
7783 ha->fw_dump_template_len = 0;
7784
7785 dlen = qla27xx_fwdt_template_default_size();
7786 ql_dbg(ql_dbg_init, vha, 0x0179,
7787 "-> template allocating %x bytes...\n", dlen);
7788 ha->fw_dump_template = vmalloc(dlen);
7789 if (!ha->fw_dump_template) {
7790 ql_log(ql_log_warn, vha, 0x017a,
7791 "Failed fwdump template allocate %x bytes.\n", risc_size);
7792 goto failed_template;
7793 }
7794
7795 dcode = ha->fw_dump_template;
7796 risc_size = dlen / sizeof(*fwcode);
7797 fwcode = qla27xx_fwdt_template_default();
7798 for (i = 0; i < risc_size; i++)
7799 dcode[i] = be32_to_cpu(fwcode[i]);
7800
7801 if (!qla27xx_fwdt_template_valid(ha->fw_dump_template)) {
7802 ql_log(ql_log_warn, vha, 0x017b,
7803 "Failed fwdump template validate\n");
7804 goto failed_template;
7805 }
7806
7807 dlen = qla27xx_fwdt_template_size(ha->fw_dump_template);
7808 ql_dbg(ql_dbg_init, vha, 0x017c,
7809 "-> template size %x bytes\n", dlen);
7810 ha->fw_dump_template_len = dlen;
7811 return rval;
7812
7813failed_template:
7814 ql_log(ql_log_warn, vha, 0x017d, "Failed default fwdump template\n");
7815 if (ha->fw_dump_template)
7816 vfree(ha->fw_dump_template);
7817 ha->fw_dump_template = NULL;
7818 ha->fw_dump_template_len = 0;
7819 return rval;
0107109e 7820}
18c6c127 7821
eaac30be
AV		 7822int
7823qla24xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
7824{
7825 int rval;
7826
e337d907
AV		 7827 if (ql2xfwloadbin == 1)
7828 return qla81xx_load_risc(vha, srisc_addr);
7829
eaac30be
AV		 7830 /*
7831 * FW Load priority:
7832 * 1) Firmware via request-firmware interface (.bin file).
7833 * 2) Firmware residing in flash.
7834 */
7835 rval = qla24xx_load_risc_blob(vha, srisc_addr);
7836 if (rval == QLA_SUCCESS)
7837 return rval;
7838
cbc8eb67
AV		 7839 return qla24xx_load_risc_flash(vha, srisc_addr,
7840 vha->hw->flt_region_fw);
eaac30be
AV		 7841}
7842
7843int
7844qla81xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
7845{
7846 int rval;
cbc8eb67 7847 struct qla_hw_data *ha = vha->hw;
eaac30be 7848
e337d907 7849 if (ql2xfwloadbin == 2)
cbc8eb67 7850 goto try_blob_fw;
e337d907 7851
eaac30be
AV		 7852 /*
7853 * FW Load priority:
7854 * 1) Firmware residing in flash.
7855 * 2) Firmware via request-firmware interface (.bin file).
cbc8eb67 7856 * 3) Golden-Firmware residing in flash -- limited operation.
eaac30be 7857 */
cbc8eb67 7858 rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_fw);
eaac30be
AV		 7859 if (rval == QLA_SUCCESS)
7860 return rval;
7861
cbc8eb67
AV		 7862try_blob_fw:
7863 rval = qla24xx_load_risc_blob(vha, srisc_addr);
7864 if (rval == QLA_SUCCESS || !ha->flt_region_gold_fw)
7865 return rval;
7866
7c3df132
SK		 7867 ql_log(ql_log_info, vha, 0x0099,
7868 "Attempting to fallback to golden firmware.\n");
cbc8eb67
AV		 7869 rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_gold_fw);
7870 if (rval != QLA_SUCCESS)
7871 return rval;
7872
7c3df132 7873 ql_log(ql_log_info, vha, 0x009a, "Update operational firmware.\n");
cbc8eb67 7874 ha->flags.running_gold_fw = 1;
cbc8eb67 7875 return rval;
eaac30be
AV		 7876}
7877
18c6c127 7878void
e315cd28 7879qla2x00_try_to_stop_firmware(scsi_qla_host_t *vha)
18c6c127
AV		 7880{
7881 int ret, retries;
e315cd28 7882 struct qla_hw_data *ha = vha->hw;
18c6c127 7883
85880801
AV		 7884 if (ha->flags.pci_channel_io_perm_failure)
7885 return;
e428924c 7886 if (!IS_FWI2_CAPABLE(ha))
18c6c127 7887 return;
75edf81d
AV		 7888 if (!ha->fw_major_version)
7889 return;
ec7193e2
QT		 7890 if (!ha->flags.fw_started)
7891 return;
18c6c127 7892
e315cd28 7893 ret = qla2x00_stop_firmware(vha);
7c7f1f29 7894 for (retries = 5; ret != QLA_SUCCESS && ret != QLA_FUNCTION_TIMEOUT &&
b469a7cb 7895 ret != QLA_INVALID_COMMAND && retries ; retries--) {
e315cd28
AC		 7896 ha->isp_ops->reset_chip(vha);
7897 if (ha->isp_ops->chip_diag(vha) != QLA_SUCCESS)
18c6c127 7898 continue;
e315cd28 7899 if (qla2x00_setup_chip(vha) != QLA_SUCCESS)
18c6c127 7900 continue;
7c3df132
SK		 7901 ql_log(ql_log_info, vha, 0x8015,
7902 "Attempting retry of stop-firmware command.\n");
e315cd28 7903 ret = qla2x00_stop_firmware(vha);
18c6c127 7904 }
ec7193e2 7905
4b60c827 7906 QLA_FW_STOPPED(ha);
ec7193e2 7907 ha->flags.fw_init_done = 0;
18c6c127 7908}
2c3dfe3f
SJ		 7909
7910int
e315cd28 7911qla24xx_configure_vhba(scsi_qla_host_t *vha)
2c3dfe3f
SJ		 7912{
7913 int rval = QLA_SUCCESS;
0b91d116 7914 int rval2;
2c3dfe3f 7915 uint16_t mb[MAILBOX_REGISTER_COUNT];
e315cd28
AC		 7916 struct qla_hw_data *ha = vha->hw;
7917 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
67c2e93a
AC		 7918 struct req_que *req;
7919 struct rsp_que *rsp;
2c3dfe3f 7920
e315cd28 7921 if (!vha->vp_idx)
2c3dfe3f
SJ		 7922 return -EINVAL;
7923
e315cd28 7924 rval = qla2x00_fw_ready(base_vha);
d7459527
MH		 7925 if (vha->qpair)
7926 req = vha->qpair->req;
67c2e93a 7927 else
d7459527 7928 req = ha->req_q_map[0];
67c2e93a
AC		 7929 rsp = req->rsp;
7930
2c3dfe3f 7931 if (rval == QLA_SUCCESS) {
e315cd28 7932 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
73208dfd 7933 qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL);
2c3dfe3f
SJ		 7934 }
7935
e315cd28 7936 vha->flags.management_server_logged_in = 0;
2c3dfe3f
SJ		 7937
7938 /* Login to SNS first */
0b91d116
CD		 7939 rval2 = ha->isp_ops->fabric_login(vha, NPH_SNS, 0xff, 0xff, 0xfc, mb,
7940 BIT_1);
7941 if (rval2 != QLA_SUCCESS || mb[0] != MBS_COMMAND_COMPLETE) {
7942 if (rval2 == QLA_MEMORY_ALLOC_FAILED)
7943 ql_dbg(ql_dbg_init, vha, 0x0120,
7944 "Failed SNS login: loop_id=%x, rval2=%d\n",
7945 NPH_SNS, rval2);
7946 else
7947 ql_dbg(ql_dbg_init, vha, 0x0103,
7948 "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x "
7949 "mb[2]=%x mb[6]=%x mb[7]=%x.\n",
7950 NPH_SNS, mb[0], mb[1], mb[2], mb[6], mb[7]);
2c3dfe3f
SJ		 7951 return (QLA_FUNCTION_FAILED);
7952 }
7953
e315cd28
AC		 7954 atomic_set(&vha->loop_down_timer, 0);
7955 atomic_set(&vha->loop_state, LOOP_UP);
7956 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
7957 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
7958 rval = qla2x00_loop_resync(base_vha);
2c3dfe3f
SJ		 7959
7960 return rval;
7961}
4d4df193
HK		 7962
7963/* 84XX Support **************************************************************/
7964
7965static LIST_HEAD(qla_cs84xx_list);
7966static DEFINE_MUTEX(qla_cs84xx_mutex);
7967
7968static struct qla_chip_state_84xx *
e315cd28 7969qla84xx_get_chip(struct scsi_qla_host *vha)
4d4df193
HK		 7970{
7971 struct qla_chip_state_84xx *cs84xx;
e315cd28 7972 struct qla_hw_data *ha = vha->hw;
4d4df193
HK		 7973
7974 mutex_lock(&qla_cs84xx_mutex);
7975
7976 /* Find any shared 84xx chip. */
7977 list_for_each_entry(cs84xx, &qla_cs84xx_list, list) {
7978 if (cs84xx->bus == ha->pdev->bus) {
7979 kref_get(&cs84xx->kref);
7980 goto done;
7981 }
7982 }
7983
7984 cs84xx = kzalloc(sizeof(*cs84xx), GFP_KERNEL);
7985 if (!cs84xx)
7986 goto done;
7987
7988 kref_init(&cs84xx->kref);
7989 spin_lock_init(&cs84xx->access_lock);
7990 mutex_init(&cs84xx->fw_update_mutex);
7991 cs84xx->bus = ha->pdev->bus;
7992
7993 list_add_tail(&cs84xx->list, &qla_cs84xx_list);
7994done:
7995 mutex_unlock(&qla_cs84xx_mutex);
7996 return cs84xx;
7997}
7998
7999static void
8000__qla84xx_chip_release(struct kref *kref)
8001{
8002 struct qla_chip_state_84xx *cs84xx =
8003 container_of(kref, struct qla_chip_state_84xx, kref);
8004
8005 mutex_lock(&qla_cs84xx_mutex);
8006 list_del(&cs84xx->list);
8007 mutex_unlock(&qla_cs84xx_mutex);
8008 kfree(cs84xx);
8009}
8010
8011void
e315cd28 8012qla84xx_put_chip(struct scsi_qla_host *vha)
4d4df193 8013{
e315cd28 8014 struct qla_hw_data *ha = vha->hw;
4d4df193
HK		 8015 if (ha->cs84xx)
8016 kref_put(&ha->cs84xx->kref, __qla84xx_chip_release);
8017}
8018
8019static int
e315cd28 8020qla84xx_init_chip(scsi_qla_host_t *vha)
4d4df193
HK		 8021{
8022 int rval;
8023 uint16_t status[2];
e315cd28 8024 struct qla_hw_data *ha = vha->hw;
4d4df193
HK		 8025
8026 mutex_lock(&ha->cs84xx->fw_update_mutex);
8027
e315cd28 8028 rval = qla84xx_verify_chip(vha, status);
4d4df193
HK		 8029
8030 mutex_unlock(&ha->cs84xx->fw_update_mutex);
8031
8032 return rval != QLA_SUCCESS || status[0] ? QLA_FUNCTION_FAILED:
8033 QLA_SUCCESS;
8034}
3a03eb79
AV		 8035
8036/* 81XX Support **************************************************************/
8037
8038int
8039qla81xx_nvram_config(scsi_qla_host_t *vha)
8040{
8041 int rval;
8042 struct init_cb_81xx *icb;
8043 struct nvram_81xx *nv;
8044 uint32_t *dptr;
8045 uint8_t *dptr1, *dptr2;
8046 uint32_t chksum;
8047 uint16_t cnt;
8048 struct qla_hw_data *ha = vha->hw;
8049
8050 rval = QLA_SUCCESS;
8051 icb = (struct init_cb_81xx *)ha->init_cb;
8052 nv = ha->nvram;
8053
8054 /* Determine NVRAM starting address. */
8055 ha->nvram_size = sizeof(struct nvram_81xx);
3a03eb79 8056 ha->vpd_size = FA_NVRAM_VPD_SIZE;
7ec0effd
AD		 8057 if (IS_P3P_TYPE(ha) || IS_QLA8031(ha))
8058 ha->vpd_size = FA_VPD_SIZE_82XX;
3a03eb79
AV		 8059
8060 /* Get VPD data into cache */
8061 ha->vpd = ha->nvram + VPD_OFFSET;
3d79038f
AV		 8062 ha->isp_ops->read_optrom(vha, ha->vpd, ha->flt_region_vpd << 2,
8063 ha->vpd_size);
3a03eb79
AV		 8064
8065 /* Get NVRAM data into cache and calculate checksum. */
3d79038f 8066 ha->isp_ops->read_optrom(vha, ha->nvram, ha->flt_region_nvram << 2,
3a03eb79 8067 ha->nvram_size);
3d79038f 8068 dptr = (uint32_t *)nv;
da08ef5c
JC		 8069 for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++, dptr++)
8070 chksum += le32_to_cpu(*dptr);
3a03eb79 8071
7c3df132
SK		 8072 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x0111,
8073 "Contents of NVRAM:\n");
8074 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0112,
8075 (uint8_t *)nv, ha->nvram_size);
3a03eb79
AV		 8076
8077 /* Bad NVRAM data, set defaults parameters. */
8078 if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P'
8079 || nv->id[3] != ' ' ||
ad950360 8080 nv->nvram_version < cpu_to_le16(ICB_VERSION)) {
3a03eb79 8081 /* Reset NVRAM data. */
7c3df132 8082 ql_log(ql_log_info, vha, 0x0073,
9e336520 8083 "Inconsistent NVRAM detected: checksum=0x%x id=%c "
7c3df132 8084 "version=0x%x.\n", chksum, nv->id[0],
3a03eb79 8085 le16_to_cpu(nv->nvram_version));
7c3df132
SK		 8086 ql_log(ql_log_info, vha, 0x0074,
8087 "Falling back to functioning (yet invalid -- WWPN) "
8088 "defaults.\n");
3a03eb79
AV		 8089
8090 /*
8091 * Set default initialization control block.
8092 */
8093 memset(nv, 0, ha->nvram_size);
ad950360
BVA		 8094 nv->nvram_version = cpu_to_le16(ICB_VERSION);
8095 nv->version = cpu_to_le16(ICB_VERSION);
98aee70d 8096 nv->frame_payload_size = 2048;
ad950360
BVA		 8097 nv->execution_throttle = cpu_to_le16(0xFFFF);
8098 nv->exchange_count = cpu_to_le16(0);
3a03eb79 8099 nv->port_name[0] = 0x21;
f73cb695 8100 nv->port_name[1] = 0x00 + ha->port_no + 1;
3a03eb79
AV		 8101 nv->port_name[2] = 0x00;
8102 nv->port_name[3] = 0xe0;
8103 nv->port_name[4] = 0x8b;
8104 nv->port_name[5] = 0x1c;
8105 nv->port_name[6] = 0x55;
8106 nv->port_name[7] = 0x86;
8107 nv->node_name[0] = 0x20;
8108 nv->node_name[1] = 0x00;
8109 nv->node_name[2] = 0x00;
8110 nv->node_name[3] = 0xe0;
8111 nv->node_name[4] = 0x8b;
8112 nv->node_name[5] = 0x1c;
8113 nv->node_name[6] = 0x55;
8114 nv->node_name[7] = 0x86;
ad950360
BVA		 8115 nv->login_retry_count = cpu_to_le16(8);
8116 nv->interrupt_delay_timer = cpu_to_le16(0);
8117 nv->login_timeout = cpu_to_le16(0);
3a03eb79 8118 nv->firmware_options_1 =
ad950360
BVA		 8119 cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1);
8120 nv->firmware_options_2 = cpu_to_le32(2 << 4);
8121 nv->firmware_options_2 |= cpu_to_le32(BIT_12);
8122 nv->firmware_options_3 = cpu_to_le32(2 << 13);
8123 nv->host_p = cpu_to_le32(BIT_11|BIT_10);
8124 nv->efi_parameters = cpu_to_le32(0);
3a03eb79 8125 nv->reset_delay = 5;
ad950360
BVA		 8126 nv->max_luns_per_target = cpu_to_le16(128);
8127 nv->port_down_retry_count = cpu_to_le16(30);
8128 nv->link_down_timeout = cpu_to_le16(180);
eeebcc92 8129 nv->enode_mac[0] = 0x00;
6246b8a1
GM		 8130 nv->enode_mac[1] = 0xC0;
8131 nv->enode_mac[2] = 0xDD;
3a03eb79
AV		 8132 nv->enode_mac[3] = 0x04;
8133 nv->enode_mac[4] = 0x05;
f73cb695 8134 nv->enode_mac[5] = 0x06 + ha->port_no + 1;
3a03eb79
AV		 8135
8136 rval = 1;
8137 }
8138
9e522cd8
AE		 8139 if (IS_T10_PI_CAPABLE(ha))
8140 nv->frame_payload_size &= ~7;
8141
aa230bc5
AE		 8142 qlt_81xx_config_nvram_stage1(vha, nv);
8143
3a03eb79 8144 /* Reset Initialization control block */
773120e4 8145 memset(icb, 0, ha->init_cb_size);
3a03eb79
AV		 8146
8147 /* Copy 1st segment. */
8148 dptr1 = (uint8_t *)icb;
8149 dptr2 = (uint8_t *)&nv->version;
8150 cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version;
8151 while (cnt--)
8152 *dptr1++ = *dptr2++;
8153
8154 icb->login_retry_count = nv->login_retry_count;
8155
8156 /* Copy 2nd segment. */
8157 dptr1 = (uint8_t *)&icb->interrupt_delay_timer;
8158 dptr2 = (uint8_t *)&nv->interrupt_delay_timer;
8159 cnt = (uint8_t *)&icb->reserved_5 -
8160 (uint8_t *)&icb->interrupt_delay_timer;
8161 while (cnt--)
8162 *dptr1++ = *dptr2++;
8163
8164 memcpy(icb->enode_mac, nv->enode_mac, sizeof(icb->enode_mac));
8165 /* Some boards (with valid NVRAMs) still have NULL enode_mac!! */
8166 if (!memcmp(icb->enode_mac, "\0\0\0\0\0\0", sizeof(icb->enode_mac))) {
69e5f1ea
AV		 8167 icb->enode_mac[0] = 0x00;
8168 icb->enode_mac[1] = 0xC0;
8169 icb->enode_mac[2] = 0xDD;
3a03eb79
AV		 8170 icb->enode_mac[3] = 0x04;
8171 icb->enode_mac[4] = 0x05;
f73cb695 8172 icb->enode_mac[5] = 0x06 + ha->port_no + 1;
3a03eb79
AV		 8173 }
8174
b64b0e8f
AV		 8175 /* Use extended-initialization control block. */
8176 memcpy(ha->ex_init_cb, &nv->ex_version, sizeof(*ha->ex_init_cb));
0eaaca4c 8177 ha->frame_payload_size = le16_to_cpu(icb->frame_payload_size);
3a03eb79
AV		 8178 /*
8179 * Setup driver NVRAM options.
8180 */
8181 qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name),
a9083016 8182 "QLE8XXX");
3a03eb79 8183
aa230bc5
AE		 8184 qlt_81xx_config_nvram_stage2(vha, icb);
8185
3a03eb79 8186 /* Use alternate WWN? */
ad950360 8187 if (nv->host_p & cpu_to_le32(BIT_15)) {
3a03eb79
AV		 8188 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
8189 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
8190 }
8191
8192 /* Prepare nodename */
ad950360 8193 if ((icb->firmware_options_1 & cpu_to_le32(BIT_14)) == 0) {
3a03eb79
AV		 8194 /*
8195 * Firmware will apply the following mask if the nodename was
8196 * not provided.
8197 */
8198 memcpy(icb->node_name, icb->port_name, WWN_SIZE);
8199 icb->node_name[0] &= 0xF0;
8200 }
8201
8202 /* Set host adapter parameters. */
8203 ha->flags.disable_risc_code_load = 0;
8204 ha->flags.enable_lip_reset = 0;
8205 ha->flags.enable_lip_full_login =
8206 le32_to_cpu(nv->host_p) & BIT_10 ? 1: 0;
8207 ha->flags.enable_target_reset =
8208 le32_to_cpu(nv->host_p) & BIT_11 ? 1: 0;
8209 ha->flags.enable_led_scheme = 0;
8210 ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1: 0;
8211
8212 ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) &
8213 (BIT_6 | BIT_5 | BIT_4)) >> 4;
8214
8215 /* save HBA serial number */
8216 ha->serial0 = icb->port_name[5];
8217 ha->serial1 = icb->port_name[6];
8218 ha->serial2 = icb->port_name[7];
8219 memcpy(vha->node_name, icb->node_name, WWN_SIZE);
8220 memcpy(vha->port_name, icb->port_name, WWN_SIZE);
8221
ad950360 8222 icb->execution_throttle = cpu_to_le16(0xFFFF);
3a03eb79
AV		 8223
8224 ha->retry_count = le16_to_cpu(nv->login_retry_count);
8225
8226 /* Set minimum login_timeout to 4 seconds. */
8227 if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout)
8228 nv->login_timeout = cpu_to_le16(ql2xlogintimeout);
8229 if (le16_to_cpu(nv->login_timeout) < 4)
ad950360 8230 nv->login_timeout = cpu_to_le16(4);
3a03eb79 8231 ha->login_timeout = le16_to_cpu(nv->login_timeout);
3a03eb79
AV		 8232
8233 /* Set minimum RATOV to 100 tenths of a second. */
8234 ha->r_a_tov = 100;
8235
8236 ha->loop_reset_delay = nv->reset_delay;
8237
8238 /* Link Down Timeout = 0:
8239 *
7ec0effd 8240 * When Port Down timer expires we will start returning
3a03eb79
AV		 8241 * I/O's to OS with "DID_NO_CONNECT".
8242 *
8243 * Link Down Timeout != 0:
8244 *
8245 * The driver waits for the link to come up after link down
8246 * before returning I/Os to OS with "DID_NO_CONNECT".
8247 */
8248 if (le16_to_cpu(nv->link_down_timeout) == 0) {
8249 ha->loop_down_abort_time =
8250 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
8251 } else {
8252 ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout);
8253 ha->loop_down_abort_time =
8254 (LOOP_DOWN_TIME - ha->link_down_timeout);
8255 }
8256
8257 /* Need enough time to try and get the port back. */
8258 ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count);
8259 if (qlport_down_retry)
8260 ha->port_down_retry_count = qlport_down_retry;
8261
8262 /* Set login_retry_count */
8263 ha->login_retry_count = le16_to_cpu(nv->login_retry_count);
8264 if (ha->port_down_retry_count ==
8265 le16_to_cpu(nv->port_down_retry_count) &&
8266 ha->port_down_retry_count > 3)
8267 ha->login_retry_count = ha->port_down_retry_count;
8268 else if (ha->port_down_retry_count > (int)ha->login_retry_count)
8269 ha->login_retry_count = ha->port_down_retry_count;
8270 if (ql2xloginretrycount)
8271 ha->login_retry_count = ql2xloginretrycount;
8272
6246b8a1 8273 /* if not running MSI-X we need handshaking on interrupts */
f73cb695 8274 if (!vha->hw->flags.msix_enabled && (IS_QLA83XX(ha) || IS_QLA27XX(ha)))
ad950360 8275 icb->firmware_options_2 |= cpu_to_le32(BIT_22);
6246b8a1 8276
3a03eb79
AV		 8277 /* Enable ZIO. */
8278 if (!vha->flags.init_done) {
8279 ha->zio_mode = le32_to_cpu(icb->firmware_options_2) &
8280 (BIT_3 | BIT_2 | BIT_1 | BIT_0);
8281 ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ?
8282 le16_to_cpu(icb->interrupt_delay_timer): 2;
8283 }
ad950360 8284 icb->firmware_options_2 &= cpu_to_le32(
3a03eb79
AV		 8285 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0));
8286 vha->flags.process_response_queue = 0;
8287 if (ha->zio_mode != QLA_ZIO_DISABLED) {
8288 ha->zio_mode = QLA_ZIO_MODE_6;
8289
7c3df132 8290 ql_log(ql_log_info, vha, 0x0075,
3a03eb79 8291 "ZIO mode %d enabled; timer delay (%d us).\n",
7c3df132
SK		 8292 ha->zio_mode,
8293 ha->zio_timer * 100);
3a03eb79
AV		 8294
8295 icb->firmware_options_2 |= cpu_to_le32(
8296 (uint32_t)ha->zio_mode);
8297 icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer);
8298 vha->flags.process_response_queue = 1;
8299 }
8300
41dc529a 8301 /* enable RIDA Format2 */
48acad09 8302 icb->firmware_options_3 |= BIT_0;
41dc529a 8303
8777e431
QT		 8304 /* N2N: driver will initiate Login instead of FW */
8305 icb->firmware_options_3 |= BIT_8;
41dc529a 8306
edd05de1
DG		 8307 if (IS_QLA27XX(ha)) {
8308 icb->firmware_options_3 |= BIT_8;
8309 ql_dbg(ql_log_info, vha, 0x0075,
8310 "Enabling direct connection.\n");
8311 }
8312
3a03eb79 8313 if (rval) {
7c3df132
SK		 8314 ql_log(ql_log_warn, vha, 0x0076,
8315 "NVRAM configuration failed.\n");
3a03eb79
AV		 8316 }
8317 return (rval);
8318}
8319
a9083016
GM		 8320int
8321qla82xx_restart_isp(scsi_qla_host_t *vha)
8322{
8323 int status, rval;
a9083016
GM		 8324 struct qla_hw_data *ha = vha->hw;
8325 struct req_que *req = ha->req_q_map[0];
8326 struct rsp_que *rsp = ha->rsp_q_map[0];
8327 struct scsi_qla_host *vp;
feafb7b1 8328 unsigned long flags;
a9083016
GM		 8329
8330 status = qla2x00_init_rings(vha);
8331 if (!status) {
8332 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
8333 ha->flags.chip_reset_done = 1;
8334
8335 status = qla2x00_fw_ready(vha);
8336 if (!status) {
a9083016
GM		 8337 /* Issue a marker after FW becomes ready. */
8338 qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL);
a9083016 8339 vha->flags.online = 1;
7108b76e 8340 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
a9083016
GM		 8341 }
8342
8343 /* if no cable then assume it's good */
8344 if ((vha->device_flags & DFLG_NO_CABLE))
8345 status = 0;
a9083016
GM		 8346 }
8347
8348 if (!status) {
8349 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
8350
8351 if (!atomic_read(&vha->loop_down_timer)) {
8352 /*
8353 * Issue marker command only when we are going
8354 * to start the I/O .
8355 */
8356 vha->marker_needed = 1;
8357 }
8358
a9083016
GM		 8359 ha->isp_ops->enable_intrs(ha);
8360
8361 ha->isp_abort_cnt = 0;
8362 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
8363
53296788 8364 /* Update the firmware version */
3173167f 8365 status = qla82xx_check_md_needed(vha);
53296788 8366
a9083016
GM		 8367 if (ha->fce) {
8368 ha->flags.fce_enabled = 1;
8369 memset(ha->fce, 0,
8370 fce_calc_size(ha->fce_bufs));
8371 rval = qla2x00_enable_fce_trace(vha,
8372 ha->fce_dma, ha->fce_bufs, ha->fce_mb,
8373 &ha->fce_bufs);
8374 if (rval) {
cfb0919c 8375 ql_log(ql_log_warn, vha, 0x8001,
7c3df132
SK		 8376 "Unable to reinitialize FCE (%d).\n",
8377 rval);
a9083016
GM		 8378 ha->flags.fce_enabled = 0;
8379 }
8380 }
8381
8382 if (ha->eft) {
8383 memset(ha->eft, 0, EFT_SIZE);
8384 rval = qla2x00_enable_eft_trace(vha,
8385 ha->eft_dma, EFT_NUM_BUFFERS);
8386 if (rval) {
cfb0919c 8387 ql_log(ql_log_warn, vha, 0x8010,
7c3df132
SK		 8388 "Unable to reinitialize EFT (%d).\n",
8389 rval);
a9083016
GM		 8390 }
8391 }
a9083016
GM		 8392 }
8393
8394 if (!status) {
cfb0919c 8395 ql_dbg(ql_dbg_taskm, vha, 0x8011,
7c3df132 8396 "qla82xx_restart_isp succeeded.\n");
feafb7b1
AE		 8397
8398 spin_lock_irqsave(&ha->vport_slock, flags);
8399 list_for_each_entry(vp, &ha->vp_list, list) {
8400 if (vp->vp_idx) {
8401 atomic_inc(&vp->vref_count);
8402 spin_unlock_irqrestore(&ha->vport_slock, flags);
8403
a9083016 8404 qla2x00_vp_abort_isp(vp);
feafb7b1
AE		 8405
8406 spin_lock_irqsave(&ha->vport_slock, flags);
8407 atomic_dec(&vp->vref_count);
8408 }
a9083016 8409 }
feafb7b1
AE		 8410 spin_unlock_irqrestore(&ha->vport_slock, flags);
8411
a9083016 8412 } else {
cfb0919c 8413 ql_log(ql_log_warn, vha, 0x8016,
7c3df132 8414 "qla82xx_restart_isp **** FAILED ****.\n");
a9083016
GM		 8415 }
8416
8417 return status;
8418}
8419
3a03eb79 8420void
ae97c91e 8421qla81xx_update_fw_options(scsi_qla_host_t *vha)
3a03eb79 8422{
ae97c91e
AV		 8423 struct qla_hw_data *ha = vha->hw;
8424
f198cafa
HM		 8425 /* Hold status IOCBs until ABTS response received. */
8426 if (ql2xfwholdabts)
8427 ha->fw_options[3] |= BIT_12;
8428
088d09d4
GM		 8429 /* Set Retry FLOGI in case of P2P connection */
8430 if (ha->operating_mode == P2P) {
8431 ha->fw_options[2] |= BIT_3;
8432 ql_dbg(ql_dbg_disc, vha, 0x2103,
8433 "(%s): Setting FLOGI retry BIT in fw_options[2]: 0x%x\n",
8434 __func__, ha->fw_options[2]);
8435 }
8436
41dc529a
QT		 8437 /* Move PUREX, ABTS RX & RIDA to ATIOQ */
8438 if (ql2xmvasynctoatio) {
8439 if (qla_tgt_mode_enabled(vha) ||
8440 qla_dual_mode_enabled(vha))
8441 ha->fw_options[2] |= BIT_11;
8442 else
8443 ha->fw_options[2] &= ~BIT_11;
8444 }
8445
f7e761f5 8446 if (qla_tgt_mode_enabled(vha) ||
2da52737
QT		 8447 qla_dual_mode_enabled(vha)) {
8448 /* FW auto send SCSI status during */
8449 ha->fw_options[1] |= BIT_8;
8450 ha->fw_options[10] |= (u16)SAM_STAT_BUSY << 8;
8451
8452 /* FW perform Exchange validation */
f7e761f5 8453 ha->fw_options[2] |= BIT_4;
2da52737
QT		 8454 } else {
8455 ha->fw_options[1] &= ~BIT_8;
8456 ha->fw_options[10] &= 0x00ff;
8457
f7e761f5 8458 ha->fw_options[2] &= ~BIT_4;
2da52737 8459 }
f7e761f5 8460
41dc529a
QT		 8461 if (ql2xetsenable) {
8462 /* Enable ETS Burst. */
8463 memset(ha->fw_options, 0, sizeof(ha->fw_options));
8464 ha->fw_options[2] |= BIT_9;
8465 }
8466
83548fe2
QT		 8467 ql_dbg(ql_dbg_init, vha, 0x00e9,
8468 "%s, add FW options 1-3 = 0x%04x 0x%04x 0x%04x mode %x\n",
8469 __func__, ha->fw_options[1], ha->fw_options[2],
8470 ha->fw_options[3], vha->host->active_mode);
ae97c91e 8471
ae97c91e 8472 qla2x00_set_fw_options(vha, ha->fw_options);
3a03eb79 8473}
09ff701a
SR		 8474
8475/*
8476 * qla24xx_get_fcp_prio
8477 * Gets the fcp cmd priority value for the logged in port.
8478 * Looks for a match of the port descriptors within
8479 * each of the fcp prio config entries. If a match is found,
8480 * the tag (priority) value is returned.
8481 *
8482 * Input:
21090cbe 8483 * vha = scsi host structure pointer.
09ff701a
SR		 8484 * fcport = port structure pointer.
8485 *
8486 * Return:
6c452a45 8487 * non-zero (if found)
f28a0a96 8488 * -1 (if not found)
09ff701a
SR		 8489 *
8490 * Context:
8491 * Kernel context
8492 */
f28a0a96 8493static int
09ff701a
SR		 8494qla24xx_get_fcp_prio(scsi_qla_host_t *vha, fc_port_t *fcport)
8495{
8496 int i, entries;
8497 uint8_t pid_match, wwn_match;
f28a0a96 8498 int priority;
09ff701a
SR		 8499 uint32_t pid1, pid2;
8500 uint64_t wwn1, wwn2;
8501 struct qla_fcp_prio_entry *pri_entry;
8502 struct qla_hw_data *ha = vha->hw;
8503
8504 if (!ha->fcp_prio_cfg || !ha->flags.fcp_prio_enabled)
f28a0a96 8505 return -1;
09ff701a 8506
f28a0a96 8507 priority = -1;
09ff701a
SR		 8508 entries = ha->fcp_prio_cfg->num_entries;
8509 pri_entry = &ha->fcp_prio_cfg->entry[0];
8510
8511 for (i = 0; i < entries; i++) {
8512 pid_match = wwn_match = 0;
8513
8514 if (!(pri_entry->flags & FCP_PRIO_ENTRY_VALID)) {
8515 pri_entry++;
8516 continue;
8517 }
8518
8519 /* check source pid for a match */
8520 if (pri_entry->flags & FCP_PRIO_ENTRY_SPID_VALID) {
8521 pid1 = pri_entry->src_pid & INVALID_PORT_ID;
8522 pid2 = vha->d_id.b24 & INVALID_PORT_ID;
8523 if (pid1 == INVALID_PORT_ID)
8524 pid_match++;
8525 else if (pid1 == pid2)
8526 pid_match++;
8527 }
8528
8529 /* check destination pid for a match */
8530 if (pri_entry->flags & FCP_PRIO_ENTRY_DPID_VALID) {
8531 pid1 = pri_entry->dst_pid & INVALID_PORT_ID;
8532 pid2 = fcport->d_id.b24 & INVALID_PORT_ID;
8533 if (pid1 == INVALID_PORT_ID)
8534 pid_match++;
8535 else if (pid1 == pid2)
8536 pid_match++;
8537 }
8538
8539 /* check source WWN for a match */
8540 if (pri_entry->flags & FCP_PRIO_ENTRY_SWWN_VALID) {
8541 wwn1 = wwn_to_u64(vha->port_name);
8542 wwn2 = wwn_to_u64(pri_entry->src_wwpn);
8543 if (wwn2 == (uint64_t)-1)
8544 wwn_match++;
8545 else if (wwn1 == wwn2)
8546 wwn_match++;
8547 }
8548
8549 /* check destination WWN for a match */
8550 if (pri_entry->flags & FCP_PRIO_ENTRY_DWWN_VALID) {
8551 wwn1 = wwn_to_u64(fcport->port_name);
8552 wwn2 = wwn_to_u64(pri_entry->dst_wwpn);
8553 if (wwn2 == (uint64_t)-1)
8554 wwn_match++;
8555 else if (wwn1 == wwn2)
8556 wwn_match++;
8557 }
8558
8559 if (pid_match == 2 || wwn_match == 2) {
8560 /* Found a matching entry */
8561 if (pri_entry->flags & FCP_PRIO_ENTRY_TAG_VALID)
8562 priority = pri_entry->tag;
8563 break;
8564 }
8565
8566 pri_entry++;
8567 }
8568
8569 return priority;
8570}
8571
8572/*
8573 * qla24xx_update_fcport_fcp_prio
8574 * Activates fcp priority for the logged in fc port
8575 *
8576 * Input:
21090cbe 8577 * vha = scsi host structure pointer.
09ff701a
SR		 8578 * fcp = port structure pointer.
8579 *
8580 * Return:
8581 * QLA_SUCCESS or QLA_FUNCTION_FAILED
8582 *
8583 * Context:
8584 * Kernel context.
8585 */
8586int
21090cbe 8587qla24xx_update_fcport_fcp_prio(scsi_qla_host_t *vha, fc_port_t *fcport)
09ff701a
SR		 8588{
8589 int ret;
f28a0a96 8590 int priority;
09ff701a
SR		 8591 uint16_t mb[5];
8592
21090cbe
MI		 8593 if (fcport->port_type != FCT_TARGET ||
8594 fcport->loop_id == FC_NO_LOOP_ID)
09ff701a
SR		 8595 return QLA_FUNCTION_FAILED;
8596
21090cbe 8597 priority = qla24xx_get_fcp_prio(vha, fcport);
f28a0a96
AV		 8598 if (priority < 0)
8599 return QLA_FUNCTION_FAILED;
8600
7ec0effd 8601 if (IS_P3P_TYPE(vha->hw)) {
a00f6296
SK		 8602 fcport->fcp_prio = priority & 0xf;
8603 return QLA_SUCCESS;
8604 }
8605
21090cbe 8606 ret = qla24xx_set_fcp_prio(vha, fcport->loop_id, priority, mb);
cfb0919c
CD		 8607 if (ret == QLA_SUCCESS) {
8608 if (fcport->fcp_prio != priority)
8609 ql_dbg(ql_dbg_user, vha, 0x709e,
8610 "Updated FCP_CMND priority - value=%d loop_id=%d "
8611 "port_id=%02x%02x%02x.\n", priority,
8612 fcport->loop_id, fcport->d_id.b.domain,
8613 fcport->d_id.b.area, fcport->d_id.b.al_pa);
a00f6296 8614 fcport->fcp_prio = priority & 0xf;
cfb0919c 8615 } else
7c3df132 8616 ql_dbg(ql_dbg_user, vha, 0x704f,
cfb0919c
CD		 8617 "Unable to update FCP_CMND priority - ret=0x%x for "
8618 "loop_id=%d port_id=%02x%02x%02x.\n", ret, fcport->loop_id,
8619 fcport->d_id.b.domain, fcport->d_id.b.area,
8620 fcport->d_id.b.al_pa);
09ff701a
SR		 8621 return ret;
8622}
8623
8624/*
8625 * qla24xx_update_all_fcp_prio
8626 * Activates fcp priority for all the logged in ports
8627 *
8628 * Input:
8629 * ha = adapter block pointer.
8630 *
8631 * Return:
8632 * QLA_SUCCESS or QLA_FUNCTION_FAILED
8633 *
8634 * Context:
8635 * Kernel context.
8636 */
8637int
8638qla24xx_update_all_fcp_prio(scsi_qla_host_t *vha)
8639{
8640 int ret;
8641 fc_port_t *fcport;
8642
8643 ret = QLA_FUNCTION_FAILED;
8644 /* We need to set priority for all logged in ports */
8645 list_for_each_entry(fcport, &vha->vp_fcports, list)
8646 ret = qla24xx_update_fcport_fcp_prio(vha, fcport);
8647
8648 return ret;
8649}
d7459527 8650
82de802a
QT		 8651struct qla_qpair *qla2xxx_create_qpair(struct scsi_qla_host *vha, int qos,
8652 int vp_idx, bool startqp)
d7459527
MH		 8653{
8654 int rsp_id = 0;
8655 int req_id = 0;
8656 int i;
8657 struct qla_hw_data *ha = vha->hw;
8658 uint16_t qpair_id = 0;
8659 struct qla_qpair *qpair = NULL;
8660 struct qla_msix_entry *msix;
8661
8662 if (!(ha->fw_attributes & BIT_6) || !ha->flags.msix_enabled) {
8663 ql_log(ql_log_warn, vha, 0x00181,
8664 "FW/Driver is not multi-queue capable.\n");
8665 return NULL;
8666 }
8667
c38d1baf 8668 if (ql2xmqsupport || ql2xnvmeenable) {
d7459527
MH		 8669 qpair = kzalloc(sizeof(struct qla_qpair), GFP_KERNEL);
8670 if (qpair == NULL) {
8671 ql_log(ql_log_warn, vha, 0x0182,
8672 "Failed to allocate memory for queue pair.\n");
8673 return NULL;
8674 }
8675 memset(qpair, 0, sizeof(struct qla_qpair));
8676
8677 qpair->hw = vha->hw;
25ff6af1 8678 qpair->vha = vha;
82de802a
QT		 8679 qpair->qp_lock_ptr = &qpair->qp_lock;
8680 spin_lock_init(&qpair->qp_lock);
af7bb382 8681 qpair->use_shadow_reg = IS_SHADOW_REG_CAPABLE(ha) ? 1 : 0;
d7459527
MH		 8682
8683 /* Assign available que pair id */
8684 mutex_lock(&ha->mq_lock);
8685 qpair_id = find_first_zero_bit(ha->qpair_qid_map, ha->max_qpairs);
b95b9452 8686 if (ha->num_qpairs >= ha->max_qpairs) {
d7459527
MH		 8687 mutex_unlock(&ha->mq_lock);
8688 ql_log(ql_log_warn, vha, 0x0183,
8689 "No resources to create additional q pair.\n");
8690 goto fail_qid_map;
8691 }
b95b9452 8692 ha->num_qpairs++;
d7459527
MH		 8693 set_bit(qpair_id, ha->qpair_qid_map);
8694 ha->queue_pair_map[qpair_id] = qpair;
8695 qpair->id = qpair_id;
8696 qpair->vp_idx = vp_idx;
e6373f33 8697 qpair->fw_started = ha->flags.fw_started;
e326d22a 8698 INIT_LIST_HEAD(&qpair->hints_list);
7c3f8fd1
QT		 8699 qpair->chip_reset = ha->base_qpair->chip_reset;
8700 qpair->enable_class_2 = ha->base_qpair->enable_class_2;
8701 qpair->enable_explicit_conf =
8702 ha->base_qpair->enable_explicit_conf;
d7459527
MH		 8703
8704 for (i = 0; i < ha->msix_count; i++) {
093df737 8705 msix = &ha->msix_entries[i];
d7459527
MH		 8706 if (msix->in_use)
8707 continue;
8708 qpair->msix = msix;
83548fe2 8709 ql_dbg(ql_dbg_multiq, vha, 0xc00f,
d7459527
MH		 8710 "Vector %x selected for qpair\n", msix->vector);
8711 break;
8712 }
8713 if (!qpair->msix) {
8714 ql_log(ql_log_warn, vha, 0x0184,
8715 "Out of MSI-X vectors!.\n");
8716 goto fail_msix;
8717 }
8718
8719 qpair->msix->in_use = 1;
8720 list_add_tail(&qpair->qp_list_elem, &vha->qp_list);
8abfa9e2
QT		 8721 qpair->pdev = ha->pdev;
8722 if (IS_QLA27XX(ha) || IS_QLA83XX(ha))
8723 qpair->reqq_start_iocbs = qla_83xx_start_iocbs;
d7459527
MH		 8724
8725 mutex_unlock(&ha->mq_lock);
8726
8727 /* Create response queue first */
82de802a 8728 rsp_id = qla25xx_create_rsp_que(ha, 0, 0, 0, qpair, startqp);
d7459527
MH		 8729 if (!rsp_id) {
8730 ql_log(ql_log_warn, vha, 0x0185,
8731 "Failed to create response queue.\n");
8732 goto fail_rsp;
8733 }
8734
8735 qpair->rsp = ha->rsp_q_map[rsp_id];
8736
8737 /* Create request queue */
82de802a
QT		 8738 req_id = qla25xx_create_req_que(ha, 0, vp_idx, 0, rsp_id, qos,
8739 startqp);
d7459527
MH		 8740 if (!req_id) {
8741 ql_log(ql_log_warn, vha, 0x0186,
8742 "Failed to create request queue.\n");
8743 goto fail_req;
8744 }
8745
8746 qpair->req = ha->req_q_map[req_id];
8747 qpair->rsp->req = qpair->req;
82de802a 8748 qpair->rsp->qpair = qpair;
e326d22a
QT		 8749 /* init qpair to this cpu. Will adjust at run time. */
8750 qla_cpu_update(qpair, smp_processor_id());
d7459527
MH		 8751
8752 if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif) {
8753 if (ha->fw_attributes & BIT_4)
8754 qpair->difdix_supported = 1;
8755 }
8756
8757 qpair->srb_mempool = mempool_create_slab_pool(SRB_MIN_REQ, srb_cachep);
8758 if (!qpair->srb_mempool) {
83548fe2 8759 ql_log(ql_log_warn, vha, 0xd036,
d7459527
MH		 8760 "Failed to create srb mempool for qpair %d\n",
8761 qpair->id);
8762 goto fail_mempool;
8763 }
8764
8765 /* Mark as online */
8766 qpair->online = 1;
8767
8768 if (!vha->flags.qpairs_available)
8769 vha->flags.qpairs_available = 1;
8770
8771 ql_dbg(ql_dbg_multiq, vha, 0xc00d,
8772 "Request/Response queue pair created, id %d\n",
8773 qpair->id);
8774 ql_dbg(ql_dbg_init, vha, 0x0187,
8775 "Request/Response queue pair created, id %d\n",
8776 qpair->id);
8777 }
8778 return qpair;
8779
8780fail_mempool:
8781fail_req:
8782 qla25xx_delete_rsp_que(vha, qpair->rsp);
8783fail_rsp:
8784 mutex_lock(&ha->mq_lock);
8785 qpair->msix->in_use = 0;
8786 list_del(&qpair->qp_list_elem);
8787 if (list_empty(&vha->qp_list))
8788 vha->flags.qpairs_available = 0;
8789fail_msix:
8790 ha->queue_pair_map[qpair_id] = NULL;
8791 clear_bit(qpair_id, ha->qpair_qid_map);
b95b9452 8792 ha->num_qpairs--;
d7459527
MH		 8793 mutex_unlock(&ha->mq_lock);
8794fail_qid_map:
8795 kfree(qpair);
8796 return NULL;
8797}
8798
8799int qla2xxx_delete_qpair(struct scsi_qla_host *vha, struct qla_qpair *qpair)
8800{
d65237c7 8801 int ret = QLA_FUNCTION_FAILED;
d7459527
MH		 8802 struct qla_hw_data *ha = qpair->hw;
8803
8804 qpair->delete_in_progress = 1;
8805 while (atomic_read(&qpair->ref_count))
8806 msleep(500);
8807
8808 ret = qla25xx_delete_req_que(vha, qpair->req);
8809 if (ret != QLA_SUCCESS)
8810 goto fail;
7867b98d 8811
d7459527
MH		 8812 ret = qla25xx_delete_rsp_que(vha, qpair->rsp);
8813 if (ret != QLA_SUCCESS)
8814 goto fail;
8815
8816 mutex_lock(&ha->mq_lock);
8817 ha->queue_pair_map[qpair->id] = NULL;
8818 clear_bit(qpair->id, ha->qpair_qid_map);
b95b9452 8819 ha->num_qpairs--;
d7459527 8820 list_del(&qpair->qp_list_elem);
d65237c7 8821 if (list_empty(&vha->qp_list)) {
d7459527 8822 vha->flags.qpairs_available = 0;
d65237c7
SC		 8823 vha->flags.qpairs_req_created = 0;
8824 vha->flags.qpairs_rsp_created = 0;
8825 }
d7459527
MH		 8826 mempool_destroy(qpair->srb_mempool);
8827 kfree(qpair);
8828 mutex_unlock(&ha->mq_lock);
8829
8830 return QLA_SUCCESS;
8831fail:
8832 return ret;
8833}
Linux 6.x block layer and io_uring tree(s)