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scsi: qla2xxx: Move rport registration out of internal work_list
[linux-2.6-block.git] / drivers / scsi / qla2xxx / qla_init.c
CommitLineData
1da177e4 1/*
fa90c54f 2 * QLogic Fibre Channel HBA Driver
bd21eaf9 3 * Copyright (c) 2003-2014 QLogic Corporation
1da177e4 4 *
fa90c54f 5 * See LICENSE.qla2xxx for copyright and licensing details.
1da177e4
LT		 6 */
7#include "qla_def.h"
73208dfd 8#include "qla_gbl.h"
1da177e4
LT		 9
10#include <linux/delay.h>
5a0e3ad6 11#include <linux/slab.h>
0107109e 12#include <linux/vmalloc.h>
1da177e4
LT		 13
14#include "qla_devtbl.h"
15
4e08df3f
DM		 16#ifdef CONFIG_SPARC
17#include <asm/prom.h>
4e08df3f
DM		 18#endif
19
2d70c103
NB		 20#include <target/target_core_base.h>
21#include "qla_target.h"
22
1da177e4
LT		 23/*
24* QLogic ISP2x00 Hardware Support Function Prototypes.
25*/
1da177e4 26static int qla2x00_isp_firmware(scsi_qla_host_t *);
1da177e4 27static int qla2x00_setup_chip(scsi_qla_host_t *);
1da177e4
LT		 28static int qla2x00_fw_ready(scsi_qla_host_t *);
29static int qla2x00_configure_hba(scsi_qla_host_t *);
1da177e4
LT		 30static int qla2x00_configure_loop(scsi_qla_host_t *);
31static int qla2x00_configure_local_loop(scsi_qla_host_t *);
1da177e4 32static int qla2x00_configure_fabric(scsi_qla_host_t *);
726b8548 33static int qla2x00_find_all_fabric_devs(scsi_qla_host_t *);
1da177e4 34static int qla2x00_restart_isp(scsi_qla_host_t *);
1da177e4 35
4d4df193
HK		 36static struct qla_chip_state_84xx *qla84xx_get_chip(struct scsi_qla_host *);
37static int qla84xx_init_chip(scsi_qla_host_t *);
73208dfd 38static int qla25xx_init_queues(struct qla_hw_data *);
a5d42f4c 39static int qla24xx_post_prli_work(struct scsi_qla_host*, fc_port_t *);
726b8548
QT		 40static void qla24xx_handle_plogi_done_event(struct scsi_qla_host *,
41 struct event_arg *);
a5d42f4c
DG		 42static void qla24xx_handle_prli_done_event(struct scsi_qla_host *,
43 struct event_arg *);
a4239945 44static void __qla24xx_handle_gpdb_event(scsi_qla_host_t *, struct event_arg *);
4d4df193 45
ac280b67
AV		 46/* SRB Extensions ---------------------------------------------------------- */
47
9ba56b95 48void
8e5f4ba0 49qla2x00_sp_timeout(struct timer_list *t)
ac280b67 50{
8e5f4ba0 51 srb_t *sp = from_timer(sp, t, u.iocb_cmd.timer);
4916392b 52 struct srb_iocb *iocb;
ac280b67
AV		 53 struct req_que *req;
54 unsigned long flags;
55
f6145e86
QT		 56 spin_lock_irqsave(sp->qpair->qp_lock_ptr, flags);
57 req = sp->qpair->req;
ac280b67 58 req->outstanding_cmds[sp->handle] = NULL;
9ba56b95 59 iocb = &sp->u.iocb_cmd;
f6145e86 60 spin_unlock_irqrestore(sp->qpair->qp_lock_ptr, flags);
4916392b 61 iocb->timeout(sp);
ac280b67
AV		 62}
63
9ba56b95 64void
25ff6af1 65qla2x00_sp_free(void *ptr)
ac280b67 66{
25ff6af1 67 srb_t *sp = ptr;
9ba56b95 68 struct srb_iocb *iocb = &sp->u.iocb_cmd;
ac280b67 69
4d97cc53 70 del_timer(&iocb->timer);
25ff6af1 71 qla2x00_rel_sp(sp);
ac280b67
AV		 72}
73
ac280b67
AV		 74/* Asynchronous Login/Logout Routines -------------------------------------- */
75
a9b6f722 76unsigned long
5b91490e
AV		 77qla2x00_get_async_timeout(struct scsi_qla_host *vha)
78{
79 unsigned long tmo;
80 struct qla_hw_data *ha = vha->hw;
81
82 /* Firmware should use switch negotiated r_a_tov for timeout. */
83 tmo = ha->r_a_tov / 10 * 2;
8ae6d9c7
GM		 84 if (IS_QLAFX00(ha)) {
85 tmo = FX00_DEF_RATOV * 2;
86 } else if (!IS_FWI2_CAPABLE(ha)) {
5b91490e
AV		 87 /*
88 * Except for earlier ISPs where the timeout is seeded from the
89 * initialization control block.
90 */
91 tmo = ha->login_timeout;
92 }
93 return tmo;
94}
ac280b67 95
726b8548 96void
9ba56b95 97qla2x00_async_iocb_timeout(void *data)
ac280b67 98{
25ff6af1 99 srb_t *sp = data;
ac280b67 100 fc_port_t *fcport = sp->fcport;
726b8548 101 struct srb_iocb *lio = &sp->u.iocb_cmd;
f6145e86
QT		 102 int rc, h;
103 unsigned long flags;
ac280b67 104
5c25d451
QT		 105 if (fcport) {
106 ql_dbg(ql_dbg_disc, fcport->vha, 0x2071,
107 "Async-%s timeout - hdl=%x portid=%06x %8phC.\n",
108 sp->name, sp->handle, fcport->d_id.b24, fcport->port_name);
109
6d674927 110 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
5c25d451
QT		 111 } else {
112 pr_info("Async-%s timeout - hdl=%x.\n",
113 sp->name, sp->handle);
114 }
726b8548
QT		 115
116 switch (sp->type) {
117 case SRB_LOGIN_CMD:
f6145e86
QT		 118 rc = qla24xx_async_abort_cmd(sp, false);
119 if (rc) {
120 /* Retry as needed. */
121 lio->u.logio.data[0] = MBS_COMMAND_ERROR;
122 lio->u.logio.data[1] =
123 lio->u.logio.flags & SRB_LOGIN_RETRIED ?
124 QLA_LOGIO_LOGIN_RETRIED : 0;
125 spin_lock_irqsave(sp->qpair->qp_lock_ptr, flags);
126 for (h = 1; h < sp->qpair->req->num_outstanding_cmds;
127 h++) {
128 if (sp->qpair->req->outstanding_cmds[h] ==
129 sp) {
130 sp->qpair->req->outstanding_cmds[h] =
131 NULL;
132 break;
133 }
134 }
135 spin_unlock_irqrestore(sp->qpair->qp_lock_ptr, flags);
136 sp->done(sp, QLA_FUNCTION_TIMEOUT);
137 }
726b8548
QT		 138 break;
139 case SRB_LOGOUT_CMD:
726b8548
QT		 140 case SRB_CT_PTHRU_CMD:
141 case SRB_MB_IOCB:
142 case SRB_NACK_PLOGI:
143 case SRB_NACK_PRLI:
144 case SRB_NACK_LOGO:
2853192e 145 case SRB_CTRL_VP:
f6145e86
QT		 146 rc = qla24xx_async_abort_cmd(sp, false);
147 if (rc) {
148 spin_lock_irqsave(sp->qpair->qp_lock_ptr, flags);
149 for (h = 1; h < sp->qpair->req->num_outstanding_cmds;
150 h++) {
151 if (sp->qpair->req->outstanding_cmds[h] ==
152 sp) {
153 sp->qpair->req->outstanding_cmds[h] =
154 NULL;
155 break;
156 }
157 }
158 spin_unlock_irqrestore(sp->qpair->qp_lock_ptr, flags);
159 sp->done(sp, QLA_FUNCTION_TIMEOUT);
160 }
726b8548 161 break;
6ac52608 162 }
ac280b67
AV		 163}
164
99b0bec7 165static void
25ff6af1 166qla2x00_async_login_sp_done(void *ptr, int res)
99b0bec7 167{
25ff6af1
JC		 168 srb_t *sp = ptr;
169 struct scsi_qla_host *vha = sp->vha;
9ba56b95 170 struct srb_iocb *lio = &sp->u.iocb_cmd;
726b8548 171 struct event_arg ea;
9ba56b95 172
83548fe2 173 ql_dbg(ql_dbg_disc, vha, 0x20dd,
25ff6af1 174 "%s %8phC res %d \n", __func__, sp->fcport->port_name, res);
726b8548 175
6d674927
QT		 176 sp->fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
177
726b8548
QT		 178 if (!test_bit(UNLOADING, &vha->dpc_flags)) {
179 memset(&ea, 0, sizeof(ea));
180 ea.event = FCME_PLOGI_DONE;
181 ea.fcport = sp->fcport;
182 ea.data[0] = lio->u.logio.data[0];
183 ea.data[1] = lio->u.logio.data[1];
184 ea.iop[0] = lio->u.logio.iop[0];
185 ea.iop[1] = lio->u.logio.iop[1];
186 ea.sp = sp;
187 qla2x00_fcport_event_handler(vha, &ea);
188 }
9ba56b95 189
25ff6af1 190 sp->free(sp);
99b0bec7
AV		 191}
192
48acad09
QT		 193static inline bool
194fcport_is_smaller(fc_port_t *fcport)
195{
196 if (wwn_to_u64(fcport->port_name) <
197 wwn_to_u64(fcport->vha->port_name))
198 return true;
199 else
200 return false;
201}
202
203static inline bool
204fcport_is_bigger(fc_port_t *fcport)
205{
206 return !fcport_is_smaller(fcport);
207}
208
ac280b67
AV		 209int
210qla2x00_async_login(struct scsi_qla_host *vha, fc_port_t *fcport,
211 uint16_t *data)
212{
ac280b67 213 srb_t *sp;
4916392b 214 struct srb_iocb *lio;
726b8548
QT		 215 int rval = QLA_FUNCTION_FAILED;
216
217 if (!vha->flags.online)
218 goto done;
219
9ba56b95 220 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
ac280b67
AV		 221 if (!sp)
222 goto done;
223
726b8548
QT		 224 fcport->flags |= FCF_ASYNC_SENT;
225 fcport->logout_completed = 0;
226
a4239945 227 fcport->disc_state = DSC_LOGIN_PEND;
9ba56b95
GM		 228 sp->type = SRB_LOGIN_CMD;
229 sp->name = "login";
a4239945
QT		 230 sp->gen1 = fcport->rscn_gen;
231 sp->gen2 = fcport->login_gen;
9ba56b95
GM		 232
233 lio = &sp->u.iocb_cmd;
3822263e 234 lio->timeout = qla2x00_async_iocb_timeout;
e74e7d95
BH		 235 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2);
236
9ba56b95 237 sp->done = qla2x00_async_login_sp_done;
48acad09
QT		 238 if (N2N_TOPO(fcport->vha->hw) && fcport_is_bigger(fcport)) {
239 lio->u.logio.flags |= SRB_LOGIN_PRLI_ONLY;
240 } else {
241 lio->u.logio.flags |= SRB_LOGIN_COND_PLOGI;
a5d42f4c 242
48acad09
QT		 243 if (fcport->fc4f_nvme)
244 lio->u.logio.flags |= SRB_LOGIN_SKIP_PRLI;
245
48acad09 246 }
a5d42f4c 247
ac280b67 248 rval = qla2x00_start_sp(sp);
080c9517 249 if (rval != QLA_SUCCESS) {
080c9517
CD		 250 fcport->flags |= FCF_LOGIN_NEEDED;
251 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
ac280b67 252 goto done_free_sp;
080c9517 253 }
ac280b67 254
7c3df132 255 ql_dbg(ql_dbg_disc, vha, 0x2072,
726b8548
QT		 256 "Async-login - %8phC hdl=%x, loopid=%x portid=%02x%02x%02x "
257 "retries=%d.\n", fcport->port_name, sp->handle, fcport->loop_id,
cfb0919c
CD		 258 fcport->d_id.b.domain, fcport->d_id.b.area, fcport->d_id.b.al_pa,
259 fcport->login_retry);
ac280b67
AV		 260 return rval;
261
262done_free_sp:
25ff6af1 263 sp->free(sp);
726b8548 264 fcport->flags &= ~FCF_ASYNC_SENT;
3dbec59b 265done:
fa83e658 266 fcport->flags &= ~FCF_ASYNC_ACTIVE;
ac280b67
AV		 267 return rval;
268}
269
99b0bec7 270static void
25ff6af1 271qla2x00_async_logout_sp_done(void *ptr, int res)
99b0bec7 272{
25ff6af1 273 srb_t *sp = ptr;
9ba56b95 274
6d674927 275 sp->fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
eaf75d18
QT		 276 sp->fcport->login_gen++;
277 qlt_logo_completion_handler(sp->fcport, res);
25ff6af1 278 sp->free(sp);
99b0bec7
AV		 279}
280
ac280b67
AV		 281int
282qla2x00_async_logout(struct scsi_qla_host *vha, fc_port_t *fcport)
283{
ac280b67 284 srb_t *sp;
4916392b 285 struct srb_iocb *lio;
3dbec59b
QT		 286 int rval = QLA_FUNCTION_FAILED;
287
288 if (!vha->flags.online || (fcport->flags & FCF_ASYNC_SENT))
289 return rval;
ac280b67 290
726b8548 291 fcport->flags |= FCF_ASYNC_SENT;
9ba56b95 292 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
ac280b67
AV		 293 if (!sp)
294 goto done;
295
9ba56b95
GM		 296 sp->type = SRB_LOGOUT_CMD;
297 sp->name = "logout";
9ba56b95
GM		 298
299 lio = &sp->u.iocb_cmd;
3822263e 300 lio->timeout = qla2x00_async_iocb_timeout;
e74e7d95
BH		 301 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2);
302
9ba56b95 303 sp->done = qla2x00_async_logout_sp_done;
ac280b67
AV		 304 rval = qla2x00_start_sp(sp);
305 if (rval != QLA_SUCCESS)
306 goto done_free_sp;
307
7c3df132 308 ql_dbg(ql_dbg_disc, vha, 0x2070,
726b8548 309 "Async-logout - hdl=%x loop-id=%x portid=%02x%02x%02x %8phC.\n",
cfb0919c 310 sp->handle, fcport->loop_id, fcport->d_id.b.domain,
726b8548
QT		 311 fcport->d_id.b.area, fcport->d_id.b.al_pa,
312 fcport->port_name);
ac280b67
AV		 313 return rval;
314
315done_free_sp:
25ff6af1 316 sp->free(sp);
ac280b67 317done:
fa83e658 318 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
ac280b67
AV		 319 return rval;
320}
11aea16a
QT		 321
322void
323qla2x00_async_prlo_done(struct scsi_qla_host *vha, fc_port_t *fcport,
324 uint16_t *data)
325{
fa83e658 326 fcport->flags &= ~FCF_ASYNC_ACTIVE;
11aea16a
QT		 327 /* Don't re-login in target mode */
328 if (!fcport->tgt_session)
329 qla2x00_mark_device_lost(vha, fcport, 1, 0);
330 qlt_logo_completion_handler(fcport, data[0]);
331}
332
333static void
334qla2x00_async_prlo_sp_done(void *s, int res)
335{
336 srb_t *sp = (srb_t *)s;
337 struct srb_iocb *lio = &sp->u.iocb_cmd;
338 struct scsi_qla_host *vha = sp->vha;
339
fa83e658 340 sp->fcport->flags &= ~FCF_ASYNC_ACTIVE;
11aea16a
QT		 341 if (!test_bit(UNLOADING, &vha->dpc_flags))
342 qla2x00_post_async_prlo_done_work(sp->fcport->vha, sp->fcport,
343 lio->u.logio.data);
344 sp->free(sp);
345}
346
347int
348qla2x00_async_prlo(struct scsi_qla_host *vha, fc_port_t *fcport)
349{
350 srb_t *sp;
351 struct srb_iocb *lio;
352 int rval;
353
354 rval = QLA_FUNCTION_FAILED;
355 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
356 if (!sp)
357 goto done;
358
359 sp->type = SRB_PRLO_CMD;
360 sp->name = "prlo";
11aea16a
QT		 361
362 lio = &sp->u.iocb_cmd;
363 lio->timeout = qla2x00_async_iocb_timeout;
e74e7d95
BH		 364 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2);
365
11aea16a
QT		 366 sp->done = qla2x00_async_prlo_sp_done;
367 rval = qla2x00_start_sp(sp);
368 if (rval != QLA_SUCCESS)
369 goto done_free_sp;
370
371 ql_dbg(ql_dbg_disc, vha, 0x2070,
372 "Async-prlo - hdl=%x loop-id=%x portid=%02x%02x%02x.\n",
373 sp->handle, fcport->loop_id, fcport->d_id.b.domain,
374 fcport->d_id.b.area, fcport->d_id.b.al_pa);
375 return rval;
376
377done_free_sp:
378 sp->free(sp);
379done:
fa83e658 380 fcport->flags &= ~FCF_ASYNC_ACTIVE;
11aea16a
QT		 381 return rval;
382}
383
f13515ac
QT		 384static
385void qla24xx_handle_adisc_event(scsi_qla_host_t *vha, struct event_arg *ea)
386{
0616e965
QT		 387 struct fc_port *fcport = ea->fcport;
388
389 ql_dbg(ql_dbg_disc, vha, 0x20d2,
390 "%s %8phC DS %d LS %d rc %d login %d|%d rscn %d|%d lid %d\n",
391 __func__, fcport->port_name, fcport->disc_state,
392 fcport->fw_login_state, ea->rc, fcport->login_gen, ea->sp->gen2,
393 fcport->rscn_gen, ea->sp->gen1, fcport->loop_id);
394
395 if (ea->data[0] != MBS_COMMAND_COMPLETE) {
a4239945
QT		 396 ql_dbg(ql_dbg_disc, vha, 0x2066,
397 "%s %8phC: adisc fail: post delete\n",
398 __func__, ea->fcport->port_name);
94cff6e1 399 qlt_schedule_sess_for_deletion(ea->fcport);
a4239945
QT		 400 return;
401 }
a4239945
QT		 402
403 if (ea->fcport->disc_state == DSC_DELETE_PEND)
404 return;
405
406 if (ea->sp->gen2 != ea->fcport->login_gen) {
407 /* target side must have changed it. */
408 ql_dbg(ql_dbg_disc, vha, 0x20d3,
0616e965
QT		 409 "%s %8phC generation changed\n",
410 __func__, ea->fcport->port_name);
a4239945
QT		 411 return;
412 } else if (ea->sp->gen1 != ea->fcport->rscn_gen) {
413 ql_dbg(ql_dbg_disc, vha, 0x20d4, "%s %d %8phC post gidpn\n",
414 __func__, __LINE__, ea->fcport->port_name);
415 qla24xx_post_gidpn_work(vha, ea->fcport);
416 return;
417 }
418
419 __qla24xx_handle_gpdb_event(vha, ea);
f13515ac 420}
ac280b67 421
8777e431
QT		 422int qla_post_els_plogi_work(struct scsi_qla_host *vha, fc_port_t *fcport)
423{
424 struct qla_work_evt *e;
425
426 e = qla2x00_alloc_work(vha, QLA_EVT_ELS_PLOGI);
427 if (!e)
428 return QLA_FUNCTION_FAILED;
429
430 e->u.fcport.fcport = fcport;
431 fcport->flags |= FCF_ASYNC_ACTIVE;
432 return qla2x00_post_work(vha, e);
433}
434
5ff1d584 435static void
25ff6af1 436qla2x00_async_adisc_sp_done(void *ptr, int res)
5ff1d584 437{
25ff6af1
JC		 438 srb_t *sp = ptr;
439 struct scsi_qla_host *vha = sp->vha;
f13515ac 440 struct event_arg ea;
0616e965 441 struct srb_iocb *lio = &sp->u.iocb_cmd;
f13515ac
QT		 442
443 ql_dbg(ql_dbg_disc, vha, 0x2066,
444 "Async done-%s res %x %8phC\n",
445 sp->name, res, sp->fcport->port_name);
446
15b6c3c9 447 sp->fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
fa83e658 448
f13515ac
QT		 449 memset(&ea, 0, sizeof(ea));
450 ea.event = FCME_ADISC_DONE;
451 ea.rc = res;
0616e965
QT		 452 ea.data[0] = lio->u.logio.data[0];
453 ea.data[1] = lio->u.logio.data[1];
454 ea.iop[0] = lio->u.logio.iop[0];
455 ea.iop[1] = lio->u.logio.iop[1];
f13515ac
QT		 456 ea.fcport = sp->fcport;
457 ea.sp = sp;
458
459 qla2x00_fcport_event_handler(vha, &ea);
9ba56b95 460
25ff6af1 461 sp->free(sp);
5ff1d584
AV		 462}
463
464int
465qla2x00_async_adisc(struct scsi_qla_host *vha, fc_port_t *fcport,
466 uint16_t *data)
467{
5ff1d584 468 srb_t *sp;
4916392b 469 struct srb_iocb *lio;
5ff1d584
AV		 470 int rval;
471
472 rval = QLA_FUNCTION_FAILED;
726b8548 473 fcport->flags |= FCF_ASYNC_SENT;
9ba56b95 474 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
5ff1d584
AV		 475 if (!sp)
476 goto done;
477
9ba56b95
GM		 478 sp->type = SRB_ADISC_CMD;
479 sp->name = "adisc";
9ba56b95
GM		 480
481 lio = &sp->u.iocb_cmd;
3822263e 482 lio->timeout = qla2x00_async_iocb_timeout;
8777e431
QT		 483 sp->gen1 = fcport->rscn_gen;
484 sp->gen2 = fcport->login_gen;
e74e7d95
BH		 485 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2);
486
9ba56b95 487 sp->done = qla2x00_async_adisc_sp_done;
5ff1d584 488 if (data[1] & QLA_LOGIO_LOGIN_RETRIED)
4916392b 489 lio->u.logio.flags |= SRB_LOGIN_RETRIED;
5ff1d584
AV		 490 rval = qla2x00_start_sp(sp);
491 if (rval != QLA_SUCCESS)
492 goto done_free_sp;
493
7c3df132 494 ql_dbg(ql_dbg_disc, vha, 0x206f,
f13515ac
QT		 495 "Async-adisc - hdl=%x loopid=%x portid=%06x %8phC.\n",
496 sp->handle, fcport->loop_id, fcport->d_id.b24, fcport->port_name);
5ff1d584
AV		 497 return rval;
498
499done_free_sp:
25ff6af1 500 sp->free(sp);
5ff1d584 501done:
fa83e658 502 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
f13515ac 503 qla2x00_post_async_adisc_work(vha, fcport, data);
726b8548
QT		 504 return rval;
505}
506
507static void qla24xx_handle_gnl_done_event(scsi_qla_host_t *vha,
508 struct event_arg *ea)
509{
510 fc_port_t *fcport, *conflict_fcport;
511 struct get_name_list_extended *e;
512 u16 i, n, found = 0, loop_id;
513 port_id_t id;
514 u64 wwn;
a4239945
QT		 515 u16 data[2];
516 u8 current_login_state;
726b8548
QT		 517
518 fcport = ea->fcport;
f352eeb7
QT		 519 ql_dbg(ql_dbg_disc, vha, 0xffff,
520 "%s %8phC DS %d LS rc %d %d login %d|%d rscn %d|%d lid %d\n",
521 __func__, fcport->port_name, fcport->disc_state,
522 fcport->fw_login_state, ea->rc,
523 fcport->login_gen, fcport->last_login_gen,
524 fcport->rscn_gen, fcport->last_rscn_gen, vha->loop_id);
726b8548 525
a4239945
QT		 526 if (fcport->disc_state == DSC_DELETE_PEND)
527 return;
528
726b8548
QT		 529 if (ea->rc) { /* rval */
530 if (fcport->login_retry == 0) {
83548fe2
QT		 531 ql_dbg(ql_dbg_disc, vha, 0x20de,
532 "GNL failed Port login retry %8phN, retry cnt=%d.\n",
533 fcport->port_name, fcport->login_retry);
726b8548
QT		 534 }
535 return;
536 }
537
538 if (fcport->last_rscn_gen != fcport->rscn_gen) {
83548fe2 539 ql_dbg(ql_dbg_disc, vha, 0x20df,
726b8548
QT		 540 "%s %8phC rscn gen changed rscn %d|%d \n",
541 __func__, fcport->port_name,
542 fcport->last_rscn_gen, fcport->rscn_gen);
543 qla24xx_post_gidpn_work(vha, fcport);
544 return;
545 } else if (fcport->last_login_gen != fcport->login_gen) {
83548fe2 546 ql_dbg(ql_dbg_disc, vha, 0x20e0,
f352eeb7
QT		 547 "%s %8phC login gen changed\n",
548 __func__, fcport->port_name);
726b8548
QT		 549 return;
550 }
551
552 n = ea->data[0] / sizeof(struct get_name_list_extended);
553
83548fe2 554 ql_dbg(ql_dbg_disc, vha, 0x20e1,
726b8548
QT		 555 "%s %d %8phC n %d %02x%02x%02x lid %d \n",
556 __func__, __LINE__, fcport->port_name, n,
557 fcport->d_id.b.domain, fcport->d_id.b.area,
558 fcport->d_id.b.al_pa, fcport->loop_id);
559
560 for (i = 0; i < n; i++) {
561 e = &vha->gnl.l[i];
562 wwn = wwn_to_u64(e->port_name);
48acad09
QT		 563 id.b.domain = e->port_id[2];
564 id.b.area = e->port_id[1];
565 id.b.al_pa = e->port_id[0];
566 id.b.rsvd_1 = 0;
726b8548
QT		 567
568 if (memcmp((u8 *)&wwn, fcport->port_name, WWN_SIZE))
569 continue;
570
48acad09
QT		 571 if (IS_SW_RESV_ADDR(id))
572 continue;
573
726b8548 574 found = 1;
726b8548
QT		 575
576 loop_id = le16_to_cpu(e->nport_handle);
577 loop_id = (loop_id & 0x7fff);
8777e431
QT		 578 if (fcport->fc4f_nvme)
579 current_login_state = e->current_login_state >> 4;
580 else
581 current_login_state = e->current_login_state & 0xf;
582
726b8548 583
83548fe2 584 ql_dbg(ql_dbg_disc, vha, 0x20e2,
8777e431 585 "%s found %8phC CLS [%x|%x] nvme %d ID[%02x%02x%02x|%02x%02x%02x] lid[%d|%d]\n",
83548fe2
QT		 586 __func__, fcport->port_name,
587 e->current_login_state, fcport->fw_login_state,
8777e431 588 fcport->fc4f_nvme, id.b.domain, id.b.area, id.b.al_pa,
83548fe2
QT		 589 fcport->d_id.b.domain, fcport->d_id.b.area,
590 fcport->d_id.b.al_pa, loop_id, fcport->loop_id);
726b8548 591
48acad09
QT		 592 switch (fcport->disc_state) {
593 case DSC_DELETE_PEND:
594 case DSC_DELETED:
595 break;
596 default:
8777e431
QT		 597 if ((id.b24 != fcport->d_id.b24 &&
598 fcport->d_id.b24) ||
599 (fcport->loop_id != FC_NO_LOOP_ID &&
600 fcport->loop_id != loop_id)) {
601 ql_dbg(ql_dbg_disc, vha, 0x20e3,
602 "%s %d %8phC post del sess\n",
603 __func__, __LINE__, fcport->port_name);
48acad09
QT		 604 qlt_schedule_sess_for_deletion(fcport);
605 return;
606 }
607 break;
726b8548
QT		 608 }
609
610 fcport->loop_id = loop_id;
611
612 wwn = wwn_to_u64(fcport->port_name);
613 qlt_find_sess_invalidate_other(vha, wwn,
614 id, loop_id, &conflict_fcport);
615
616 if (conflict_fcport) {
617 /*
618 * Another share fcport share the same loop_id &
619 * nport id. Conflict fcport needs to finish
620 * cleanup before this fcport can proceed to login.
621 */
622 conflict_fcport->conflict = fcport;
623 fcport->login_pause = 1;
624 }
625
48acad09
QT		 626 switch (vha->hw->current_topology) {
627 default:
628 switch (current_login_state) {
629 case DSC_LS_PRLI_COMP:
630 ql_dbg(ql_dbg_disc + ql_dbg_verbose,
631 vha, 0x20e4, "%s %d %8phC post gpdb\n",
632 __func__, __LINE__, fcport->port_name);
a4239945 633
48acad09
QT		 634 if ((e->prli_svc_param_word_3[0] & BIT_4) == 0)
635 fcport->port_type = FCT_INITIATOR;
636 else
637 fcport->port_type = FCT_TARGET;
638 data[0] = data[1] = 0;
639 qla2x00_post_async_adisc_work(vha, fcport,
640 data);
641 break;
642 case DSC_LS_PORT_UNAVAIL:
643 default:
644 if (fcport->loop_id != FC_NO_LOOP_ID)
645 qla2x00_clear_loop_id(fcport);
a4239945 646
48acad09 647 fcport->loop_id = loop_id;
726b8548 648 fcport->fw_login_state = DSC_LS_PORT_UNAVAIL;
48acad09
QT		 649 qla24xx_fcport_handle_login(vha, fcport);
650 break;
726b8548 651 }
726b8548 652 break;
48acad09 653 case ISP_CFG_N:
8777e431
QT		 654 fcport->fw_login_state = current_login_state;
655 fcport->d_id = id;
48acad09
QT		 656 switch (current_login_state) {
657 case DSC_LS_PRLI_COMP:
658 if ((e->prli_svc_param_word_3[0] & BIT_4) == 0)
659 fcport->port_type = FCT_INITIATOR;
660 else
661 fcport->port_type = FCT_TARGET;
662
663 data[0] = data[1] = 0;
664 qla2x00_post_async_adisc_work(vha, fcport,
665 data);
666 break;
667 case DSC_LS_PLOGI_COMP:
668 if (fcport_is_bigger(fcport)) {
669 /* local adapter is smaller */
670 if (fcport->loop_id != FC_NO_LOOP_ID)
671 qla2x00_clear_loop_id(fcport);
672
673 fcport->loop_id = loop_id;
674 qla24xx_fcport_handle_login(vha,
675 fcport);
676 break;
677 }
678 /* drop through */
679 default:
680 if (fcport_is_smaller(fcport)) {
681 /* local adapter is bigger */
682 if (fcport->loop_id != FC_NO_LOOP_ID)
683 qla2x00_clear_loop_id(fcport);
684
685 fcport->loop_id = loop_id;
686 qla24xx_fcport_handle_login(vha,
687 fcport);
688 }
689 break;
690 }
691 break;
692 } /* switch (ha->current_topology) */
726b8548
QT		 693 }
694
695 if (!found) {
48acad09
QT		 696 switch (vha->hw->current_topology) {
697 case ISP_CFG_F:
698 case ISP_CFG_FL:
699 for (i = 0; i < n; i++) {
700 e = &vha->gnl.l[i];
701 id.b.domain = e->port_id[0];
702 id.b.area = e->port_id[1];
703 id.b.al_pa = e->port_id[2];
704 id.b.rsvd_1 = 0;
705 loop_id = le16_to_cpu(e->nport_handle);
706
707 if (fcport->d_id.b24 == id.b24) {
708 conflict_fcport =
709 qla2x00_find_fcport_by_wwpn(vha,
710 e->port_name, 0);
72f02ba6
LT		 711 if (conflict_fcport) {
712 ql_dbg(ql_dbg_disc + ql_dbg_verbose,
713 vha, 0x20e5,
714 "%s %d %8phC post del sess\n",
715 __func__, __LINE__,
716 conflict_fcport->port_name);
717 qlt_schedule_sess_for_deletion
718 (conflict_fcport);
719 }
36eb8ff6 720 }
48acad09
QT		 721 /*
722 * FW already picked this loop id for
723 * another fcport
724 */
725 if (fcport->loop_id == loop_id)
726 fcport->loop_id = FC_NO_LOOP_ID;
726b8548 727 }
48acad09
QT		 728 qla24xx_fcport_handle_login(vha, fcport);
729 break;
730 case ISP_CFG_N:
8777e431
QT		 731 fcport->disc_state = DSC_DELETED;
732 if (time_after_eq(jiffies, fcport->dm_login_expire)) {
733 if (fcport->n2n_link_reset_cnt < 2) {
734 fcport->n2n_link_reset_cnt++;
735 /*
736 * remote port is not sending PLOGI.
737 * Reset link to kick start his state
738 * machine
739 */
740 set_bit(N2N_LINK_RESET,
741 &vha->dpc_flags);
742 } else {
743 if (fcport->n2n_chip_reset < 1) {
744 ql_log(ql_log_info, vha, 0x705d,
745 "Chip reset to bring laser down");
746 set_bit(ISP_ABORT_NEEDED,
747 &vha->dpc_flags);
748 fcport->n2n_chip_reset++;
749 } else {
750 ql_log(ql_log_info, vha, 0x705d,
751 "Remote port %8ph is not coming back\n",
752 fcport->port_name);
753 fcport->scan_state = 0;
754 }
755 }
756 qla2xxx_wake_dpc(vha);
757 } else {
758 /*
759 * report port suppose to do PLOGI. Give him
760 * more time. FW will catch it.
761 */
762 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
763 }
48acad09
QT		 764 break;
765 default:
766 break;
726b8548 767 }
726b8548
QT		 768 }
769} /* gnl_event */
770
771static void
25ff6af1 772qla24xx_async_gnl_sp_done(void *s, int res)
726b8548 773{
25ff6af1
JC		 774 struct srb *sp = s;
775 struct scsi_qla_host *vha = sp->vha;
726b8548
QT		 776 unsigned long flags;
777 struct fc_port *fcport = NULL, *tf;
778 u16 i, n = 0, loop_id;
779 struct event_arg ea;
780 struct get_name_list_extended *e;
781 u64 wwn;
782 struct list_head h;
a4239945 783 bool found = false;
726b8548 784
83548fe2 785 ql_dbg(ql_dbg_disc, vha, 0x20e7,
726b8548
QT		 786 "Async done-%s res %x mb[1]=%x mb[2]=%x \n",
787 sp->name, res, sp->u.iocb_cmd.u.mbx.in_mb[1],
788 sp->u.iocb_cmd.u.mbx.in_mb[2]);
789
790 memset(&ea, 0, sizeof(ea));
791 ea.sp = sp;
792 ea.rc = res;
793 ea.event = FCME_GNL_DONE;
794
795 if (sp->u.iocb_cmd.u.mbx.in_mb[1] >=
796 sizeof(struct get_name_list_extended)) {
797 n = sp->u.iocb_cmd.u.mbx.in_mb[1] /
798 sizeof(struct get_name_list_extended);
799 ea.data[0] = sp->u.iocb_cmd.u.mbx.in_mb[1]; /* amnt xfered */
800 }
801
802 for (i = 0; i < n; i++) {
803 e = &vha->gnl.l[i];
804 loop_id = le16_to_cpu(e->nport_handle);
805 /* mask out reserve bit */
806 loop_id = (loop_id & 0x7fff);
807 set_bit(loop_id, vha->hw->loop_id_map);
808 wwn = wwn_to_u64(e->port_name);
809
83548fe2 810 ql_dbg(ql_dbg_disc + ql_dbg_verbose, vha, 0x20e8,
726b8548
QT		 811 "%s %8phC %02x:%02x:%02x state %d/%d lid %x \n",
812 __func__, (void *)&wwn, e->port_id[2], e->port_id[1],
813 e->port_id[0], e->current_login_state, e->last_login_state,
814 (loop_id & 0x7fff));
815 }
816
1c6cacf4 817 spin_lock_irqsave(&vha->gnl.fcports_lock, flags);
726b8548
QT		 818
819 INIT_LIST_HEAD(&h);
820 fcport = tf = NULL;
821 if (!list_empty(&vha->gnl.fcports))
822 list_splice_init(&vha->gnl.fcports, &h);
823
824 list_for_each_entry_safe(fcport, tf, &h, gnl_entry) {
825 list_del_init(&fcport->gnl_entry);
1c6cacf4 826 spin_lock(&vha->hw->tgt.sess_lock);
6d674927 827 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
1c6cacf4 828 spin_unlock(&vha->hw->tgt.sess_lock);
726b8548
QT		 829 ea.fcport = fcport;
830
831 qla2x00_fcport_event_handler(vha, &ea);
832 }
1c6cacf4 833 spin_unlock_irqrestore(&vha->gnl.fcports_lock, flags);
726b8548 834
1c6cacf4 835 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
a4239945
QT		 836 /* create new fcport if fw has knowledge of new sessions */
837 for (i = 0; i < n; i++) {
838 port_id_t id;
839 u64 wwnn;
840
841 e = &vha->gnl.l[i];
842 wwn = wwn_to_u64(e->port_name);
843
844 found = false;
845 list_for_each_entry_safe(fcport, tf, &vha->vp_fcports, list) {
846 if (!memcmp((u8 *)&wwn, fcport->port_name,
847 WWN_SIZE)) {
848 found = true;
849 break;
850 }
851 }
852
cf055fb0 853 id.b.domain = e->port_id[2];
a4239945 854 id.b.area = e->port_id[1];
cf055fb0 855 id.b.al_pa = e->port_id[0];
a4239945
QT		 856 id.b.rsvd_1 = 0;
857
858 if (!found && wwn && !IS_SW_RESV_ADDR(id)) {
859 ql_dbg(ql_dbg_disc, vha, 0x2065,
cf055fb0
QT		 860 "%s %d %8phC %06x post new sess\n",
861 __func__, __LINE__, (u8 *)&wwn, id.b24);
a4239945
QT		 862 wwnn = wwn_to_u64(e->node_name);
863 qla24xx_post_newsess_work(vha, &id, (u8 *)&wwn,
864 (u8 *)&wwnn, NULL, FC4_TYPE_UNKNOWN);
865 }
866 }
867
726b8548
QT		 868 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
869
25ff6af1 870 sp->free(sp);
726b8548
QT		 871}
872
873int qla24xx_async_gnl(struct scsi_qla_host *vha, fc_port_t *fcport)
874{
875 srb_t *sp;
876 struct srb_iocb *mbx;
877 int rval = QLA_FUNCTION_FAILED;
878 unsigned long flags;
879 u16 *mb;
880
3dbec59b
QT		 881 if (!vha->flags.online || (fcport->flags & FCF_ASYNC_SENT))
882 return rval;
726b8548 883
83548fe2 884 ql_dbg(ql_dbg_disc, vha, 0x20d9,
726b8548
QT		 885 "Async-gnlist WWPN %8phC \n", fcport->port_name);
886
1c6cacf4
HR		 887 spin_lock_irqsave(&vha->gnl.fcports_lock, flags);
888 if (!list_empty(&fcport->gnl_entry)) {
889 spin_unlock_irqrestore(&vha->gnl.fcports_lock, flags);
890 rval = QLA_SUCCESS;
891 goto done;
892 }
893
894 spin_lock(&vha->hw->tgt.sess_lock);
726b8548
QT		 895 fcport->disc_state = DSC_GNL;
896 fcport->last_rscn_gen = fcport->rscn_gen;
897 fcport->last_login_gen = fcport->login_gen;
1c6cacf4 898 spin_unlock(&vha->hw->tgt.sess_lock);
726b8548
QT		 899
900 list_add_tail(&fcport->gnl_entry, &vha->gnl.fcports);
1c6cacf4 901 spin_unlock_irqrestore(&vha->gnl.fcports_lock, flags);
726b8548
QT		 902
903 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
904 if (!sp)
905 goto done;
3dbec59b
QT		 906
907 fcport->flags |= FCF_ASYNC_SENT;
726b8548
QT		 908 sp->type = SRB_MB_IOCB;
909 sp->name = "gnlist";
910 sp->gen1 = fcport->rscn_gen;
911 sp->gen2 = fcport->login_gen;
912
e74e7d95
BH		 913 mbx = &sp->u.iocb_cmd;
914 mbx->timeout = qla2x00_async_iocb_timeout;
726b8548
QT		 915 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha)+2);
916
917 mb = sp->u.iocb_cmd.u.mbx.out_mb;
918 mb[0] = MBC_PORT_NODE_NAME_LIST;
919 mb[1] = BIT_2 | BIT_3;
920 mb[2] = MSW(vha->gnl.ldma);
921 mb[3] = LSW(vha->gnl.ldma);
922 mb[6] = MSW(MSD(vha->gnl.ldma));
923 mb[7] = LSW(MSD(vha->gnl.ldma));
924 mb[8] = vha->gnl.size;
925 mb[9] = vha->vp_idx;
926
726b8548
QT		 927 sp->done = qla24xx_async_gnl_sp_done;
928
929 rval = qla2x00_start_sp(sp);
930 if (rval != QLA_SUCCESS)
931 goto done_free_sp;
932
83548fe2
QT		 933 ql_dbg(ql_dbg_disc, vha, 0x20da,
934 "Async-%s - OUT WWPN %8phC hndl %x\n",
935 sp->name, fcport->port_name, sp->handle);
726b8548
QT		 936
937 return rval;
938
939done_free_sp:
25ff6af1 940 sp->free(sp);
726b8548 941 fcport->flags &= ~FCF_ASYNC_SENT;
3dbec59b 942done:
726b8548
QT		 943 return rval;
944}
945
946int qla24xx_post_gnl_work(struct scsi_qla_host *vha, fc_port_t *fcport)
947{
948 struct qla_work_evt *e;
949
950 e = qla2x00_alloc_work(vha, QLA_EVT_GNL);
951 if (!e)
952 return QLA_FUNCTION_FAILED;
953
954 e->u.fcport.fcport = fcport;
6d674927 955 fcport->flags |= FCF_ASYNC_ACTIVE;
726b8548
QT		 956 return qla2x00_post_work(vha, e);
957}
958
959static
25ff6af1 960void qla24xx_async_gpdb_sp_done(void *s, int res)
726b8548 961{
25ff6af1
JC		 962 struct srb *sp = s;
963 struct scsi_qla_host *vha = sp->vha;
726b8548 964 struct qla_hw_data *ha = vha->hw;
726b8548
QT		 965 fc_port_t *fcport = sp->fcport;
966 u16 *mb = sp->u.iocb_cmd.u.mbx.in_mb;
726b8548
QT		 967 struct event_arg ea;
968
83548fe2 969 ql_dbg(ql_dbg_disc, vha, 0x20db,
726b8548
QT		 970 "Async done-%s res %x, WWPN %8phC mb[1]=%x mb[2]=%x \n",
971 sp->name, res, fcport->port_name, mb[1], mb[2]);
972
6d674927 973 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
726b8548 974
726b8548
QT		 975 memset(&ea, 0, sizeof(ea));
976 ea.event = FCME_GPDB_DONE;
726b8548
QT		 977 ea.fcport = fcport;
978 ea.sp = sp;
979
980 qla2x00_fcport_event_handler(vha, &ea);
981
982 dma_pool_free(ha->s_dma_pool, sp->u.iocb_cmd.u.mbx.in,
983 sp->u.iocb_cmd.u.mbx.in_dma);
984
25ff6af1 985 sp->free(sp);
726b8548
QT		 986}
987
a5d42f4c
DG		 988static int qla24xx_post_prli_work(struct scsi_qla_host *vha, fc_port_t *fcport)
989{
990 struct qla_work_evt *e;
991
992 e = qla2x00_alloc_work(vha, QLA_EVT_PRLI);
993 if (!e)
994 return QLA_FUNCTION_FAILED;
995
996 e->u.fcport.fcport = fcport;
997
998 return qla2x00_post_work(vha, e);
999}
1000
1001static void
1002qla2x00_async_prli_sp_done(void *ptr, int res)
1003{
1004 srb_t *sp = ptr;
1005 struct scsi_qla_host *vha = sp->vha;
1006 struct srb_iocb *lio = &sp->u.iocb_cmd;
1007 struct event_arg ea;
1008
1009 ql_dbg(ql_dbg_disc, vha, 0x2129,
1010 "%s %8phC res %d \n", __func__,
1011 sp->fcport->port_name, res);
1012
1013 sp->fcport->flags &= ~FCF_ASYNC_SENT;
1014
1015 if (!test_bit(UNLOADING, &vha->dpc_flags)) {
1016 memset(&ea, 0, sizeof(ea));
1017 ea.event = FCME_PRLI_DONE;
1018 ea.fcport = sp->fcport;
1019 ea.data[0] = lio->u.logio.data[0];
1020 ea.data[1] = lio->u.logio.data[1];
1021 ea.iop[0] = lio->u.logio.iop[0];
1022 ea.iop[1] = lio->u.logio.iop[1];
1023 ea.sp = sp;
1024
1025 qla2x00_fcport_event_handler(vha, &ea);
1026 }
1027
1028 sp->free(sp);
1029}
1030
1031int
1032qla24xx_async_prli(struct scsi_qla_host *vha, fc_port_t *fcport)
1033{
1034 srb_t *sp;
1035 struct srb_iocb *lio;
1036 int rval = QLA_FUNCTION_FAILED;
1037
1038 if (!vha->flags.online)
1039 return rval;
1040
1041 if (fcport->fw_login_state == DSC_LS_PLOGI_PEND ||
a5d42f4c
DG		 1042 fcport->fw_login_state == DSC_LS_PRLI_PEND)
1043 return rval;
1044
1045 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
1046 if (!sp)
1047 return rval;
1048
1049 fcport->flags |= FCF_ASYNC_SENT;
1050 fcport->logout_completed = 0;
1051
1052 sp->type = SRB_PRLI_CMD;
1053 sp->name = "prli";
a5d42f4c
DG		 1054
1055 lio = &sp->u.iocb_cmd;
1056 lio->timeout = qla2x00_async_iocb_timeout;
e74e7d95
BH		 1057 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2);
1058
a5d42f4c
DG		 1059 sp->done = qla2x00_async_prli_sp_done;
1060 lio->u.logio.flags = 0;
1061
1062 if (fcport->fc4f_nvme)
1063 lio->u.logio.flags |= SRB_LOGIN_NVME_PRLI;
1064
1065 rval = qla2x00_start_sp(sp);
1066 if (rval != QLA_SUCCESS) {
a5d42f4c
DG		 1067 fcport->flags |= FCF_LOGIN_NEEDED;
1068 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
1069 goto done_free_sp;
1070 }
1071
1072 ql_dbg(ql_dbg_disc, vha, 0x211b,
8777e431
QT		 1073 "Async-prli - %8phC hdl=%x, loopid=%x portid=%06x retries=%d %s.\n",
1074 fcport->port_name, sp->handle, fcport->loop_id, fcport->d_id.b24,
1075 fcport->login_retry, fcport->fc4f_nvme ? "nvme" : "fc");
a5d42f4c
DG		 1076
1077 return rval;
1078
1079done_free_sp:
1080 sp->free(sp);
1081 fcport->flags &= ~FCF_ASYNC_SENT;
1082 return rval;
1083}
1084
a07fc0a4 1085int qla24xx_post_gpdb_work(struct scsi_qla_host *vha, fc_port_t *fcport, u8 opt)
726b8548
QT		 1086{
1087 struct qla_work_evt *e;
1088
1089 e = qla2x00_alloc_work(vha, QLA_EVT_GPDB);
1090 if (!e)
1091 return QLA_FUNCTION_FAILED;
1092
1093 e->u.fcport.fcport = fcport;
1094 e->u.fcport.opt = opt;
6d674927 1095 fcport->flags |= FCF_ASYNC_ACTIVE;
726b8548
QT		 1096 return qla2x00_post_work(vha, e);
1097}
1098
1099int qla24xx_async_gpdb(struct scsi_qla_host *vha, fc_port_t *fcport, u8 opt)
1100{
1101 srb_t *sp;
1102 struct srb_iocb *mbx;
1103 int rval = QLA_FUNCTION_FAILED;
1104 u16 *mb;
1105 dma_addr_t pd_dma;
1106 struct port_database_24xx *pd;
1107 struct qla_hw_data *ha = vha->hw;
1108
3dbec59b
QT		 1109 if (!vha->flags.online || (fcport->flags & FCF_ASYNC_SENT))
1110 return rval;
726b8548 1111
726b8548
QT		 1112 fcport->disc_state = DSC_GPDB;
1113
1114 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
1115 if (!sp)
1116 goto done;
1117
3dbec59b 1118 fcport->flags |= FCF_ASYNC_SENT;
e0824e69
JC		 1119 sp->type = SRB_MB_IOCB;
1120 sp->name = "gpdb";
1121 sp->gen1 = fcport->rscn_gen;
1122 sp->gen2 = fcport->login_gen;
e74e7d95
BH		 1123
1124 mbx = &sp->u.iocb_cmd;
1125 mbx->timeout = qla2x00_async_iocb_timeout;
e0824e69
JC		 1126 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2);
1127
08eb7f45 1128 pd = dma_pool_zalloc(ha->s_dma_pool, GFP_KERNEL, &pd_dma);
726b8548 1129 if (pd == NULL) {
83548fe2
QT		 1130 ql_log(ql_log_warn, vha, 0xd043,
1131 "Failed to allocate port database structure.\n");
726b8548
QT		 1132 goto done_free_sp;
1133 }
726b8548 1134
726b8548
QT		 1135 mb = sp->u.iocb_cmd.u.mbx.out_mb;
1136 mb[0] = MBC_GET_PORT_DATABASE;
1137 mb[1] = fcport->loop_id;
1138 mb[2] = MSW(pd_dma);
1139 mb[3] = LSW(pd_dma);
1140 mb[6] = MSW(MSD(pd_dma));
1141 mb[7] = LSW(MSD(pd_dma));
1142 mb[9] = vha->vp_idx;
1143 mb[10] = opt;
1144
726b8548
QT		 1145 mbx->u.mbx.in = (void *)pd;
1146 mbx->u.mbx.in_dma = pd_dma;
1147
1148 sp->done = qla24xx_async_gpdb_sp_done;
1149
1150 rval = qla2x00_start_sp(sp);
1151 if (rval != QLA_SUCCESS)
1152 goto done_free_sp;
1153
83548fe2
QT		 1154 ql_dbg(ql_dbg_disc, vha, 0x20dc,
1155 "Async-%s %8phC hndl %x opt %x\n",
1156 sp->name, fcport->port_name, sp->handle, opt);
726b8548
QT		 1157
1158 return rval;
1159
1160done_free_sp:
1161 if (pd)
1162 dma_pool_free(ha->s_dma_pool, pd, pd_dma);
1163
25ff6af1 1164 sp->free(sp);
726b8548 1165 fcport->flags &= ~FCF_ASYNC_SENT;
3dbec59b 1166done:
726b8548 1167 qla24xx_post_gpdb_work(vha, fcport, opt);
5ff1d584
AV		 1168 return rval;
1169}
1170
726b8548 1171static
a4239945 1172void __qla24xx_handle_gpdb_event(scsi_qla_host_t *vha, struct event_arg *ea)
726b8548 1173{
726b8548
QT		 1174 unsigned long flags;
1175
726b8548 1176 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
f13515ac 1177 ea->fcport->login_gen++;
726b8548
QT		 1178 ea->fcport->deleted = 0;
1179 ea->fcport->logout_on_delete = 1;
1180
1181 if (!ea->fcport->login_succ && !IS_SW_RESV_ADDR(ea->fcport->d_id)) {
1182 vha->fcport_count++;
1183 ea->fcport->login_succ = 1;
1184
cd4ed6b4 1185 qla24xx_sched_upd_fcport(ea->fcport);
414d9ff3
QT		 1186 } else if (ea->fcport->login_succ) {
1187 /*
1188 * We have an existing session. A late RSCN delivery
1189 * must have triggered the session to be re-validate.
a4239945 1190 * Session is still valid.
414d9ff3 1191 */
5ef696aa
QT		 1192 ql_dbg(ql_dbg_disc, vha, 0x20d6,
1193 "%s %d %8phC session revalidate success\n",
a4239945 1194 __func__, __LINE__, ea->fcport->port_name);
8a7eac2f 1195 ea->fcport->disc_state = DSC_LOGIN_COMPLETE;
726b8548
QT		 1196 }
1197 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
a4239945
QT		 1198}
1199
1200static
1201void qla24xx_handle_gpdb_event(scsi_qla_host_t *vha, struct event_arg *ea)
1202{
a4239945
QT		 1203 fc_port_t *fcport = ea->fcport;
1204 struct port_database_24xx *pd;
1205 struct srb *sp = ea->sp;
2b5b9647 1206 uint8_t ls;
a4239945
QT		 1207
1208 pd = (struct port_database_24xx *)sp->u.iocb_cmd.u.mbx.in;
1209
1210 fcport->flags &= ~FCF_ASYNC_SENT;
1211
1212 ql_dbg(ql_dbg_disc, vha, 0x20d2,
8777e431
QT		 1213 "%s %8phC DS %d LS %d nvme %x rc %d\n", __func__, fcport->port_name,
1214 fcport->disc_state, pd->current_login_state, fcport->fc4f_nvme,
1215 ea->rc);
a4239945
QT		 1216
1217 if (fcport->disc_state == DSC_DELETE_PEND)
1218 return;
726b8548 1219
2b5b9647
DT		 1220 if (fcport->fc4f_nvme)
1221 ls = pd->current_login_state >> 4;
1222 else
1223 ls = pd->current_login_state & 0xf;
1224
1225 switch (ls) {
a4239945
QT		 1226 case PDS_PRLI_COMPLETE:
1227 __qla24xx_parse_gpdb(vha, fcport, pd);
1228 break;
1229 case PDS_PLOGI_PENDING:
1230 case PDS_PLOGI_COMPLETE:
1231 case PDS_PRLI_PENDING:
1232 case PDS_PRLI2_PENDING:
8fde6977
QT		 1233 /* Set discovery state back to GNL to Relogin attempt */
1234 if (qla_dual_mode_enabled(vha) ||
1235 qla_ini_mode_enabled(vha)) {
1236 fcport->disc_state = DSC_GNL;
1237 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
1238 }
a4239945
QT		 1239 return;
1240 case PDS_LOGO_PENDING:
1241 case PDS_PORT_UNAVAILABLE:
1242 default:
1243 ql_dbg(ql_dbg_disc, vha, 0x20d5, "%s %d %8phC post del sess\n",
1244 __func__, __LINE__, fcport->port_name);
d8630bb9 1245 qlt_schedule_sess_for_deletion(fcport);
a4239945
QT		 1246 return;
1247 }
1248 __qla24xx_handle_gpdb_event(vha, ea);
1249} /* gpdb event */
9cd883f0
QT		 1250
1251static void qla_chk_n2n_b4_login(struct scsi_qla_host *vha, fc_port_t *fcport)
1252{
1253 u8 login = 0;
040036bb 1254 int rc;
9cd883f0
QT		 1255
1256 if (qla_tgt_mode_enabled(vha))
1257 return;
1258
1259 if (qla_dual_mode_enabled(vha)) {
1260 if (N2N_TOPO(vha->hw)) {
1261 u64 mywwn, wwn;
1262
1263 mywwn = wwn_to_u64(vha->port_name);
1264 wwn = wwn_to_u64(fcport->port_name);
1265 if (mywwn > wwn)
1266 login = 1;
1267 else if ((fcport->fw_login_state == DSC_LS_PLOGI_COMP)
1268 && time_after_eq(jiffies,
1269 fcport->plogi_nack_done_deadline))
1270 login = 1;
1271 } else {
1272 login = 1;
1273 }
1274 } else {
1275 /* initiator mode */
1276 login = 1;
1277 }
1278
1279 if (login) {
040036bb
QT		 1280 if (fcport->loop_id == FC_NO_LOOP_ID) {
1281 fcport->fw_login_state = DSC_LS_PORT_UNAVAIL;
1282 rc = qla2x00_find_new_loop_id(vha, fcport);
1283 if (rc) {
1284 ql_dbg(ql_dbg_disc, vha, 0x20e6,
1285 "%s %d %8phC post del sess - out of loopid\n",
1286 __func__, __LINE__, fcport->port_name);
1287 fcport->scan_state = 0;
94cff6e1 1288 qlt_schedule_sess_for_deletion(fcport);
040036bb
QT		 1289 return;
1290 }
1291 }
9cd883f0
QT		 1292 ql_dbg(ql_dbg_disc, vha, 0x20bf,
1293 "%s %d %8phC post login\n",
1294 __func__, __LINE__, fcport->port_name);
9cd883f0
QT		 1295 qla2x00_post_async_login_work(vha, fcport, NULL);
1296 }
1297}
1298
726b8548
QT		 1299int qla24xx_fcport_handle_login(struct scsi_qla_host *vha, fc_port_t *fcport)
1300{
f13515ac 1301 u16 data[2];
a4239945 1302 u64 wwn;
cd4ed6b4 1303 u16 sec;
726b8548 1304
83548fe2 1305 ql_dbg(ql_dbg_disc, vha, 0x20d8,
f352eeb7 1306 "%s %8phC DS %d LS %d P %d fl %x confl %p rscn %d|%d login %d retry %d lid %d scan %d\n",
726b8548
QT		 1307 __func__, fcport->port_name, fcport->disc_state,
1308 fcport->fw_login_state, fcport->login_pause, fcport->flags,
1309 fcport->conflict, fcport->last_rscn_gen, fcport->rscn_gen,
f352eeb7 1310 fcport->login_gen, fcport->login_retry,
a4239945 1311 fcport->loop_id, fcport->scan_state);
726b8548 1312
a4239945
QT		 1313 if (fcport->scan_state != QLA_FCPORT_FOUND)
1314 return 0;
726b8548 1315
07ea4b60
HR		 1316 if ((fcport->loop_id != FC_NO_LOOP_ID) &&
1317 ((fcport->fw_login_state == DSC_LS_PLOGI_PEND) ||
1318 (fcport->fw_login_state == DSC_LS_PRLI_PEND)))
726b8548
QT		 1319 return 0;
1320
5b33469a 1321 if (fcport->fw_login_state == DSC_LS_PLOGI_COMP) {
9cd883f0
QT		 1322 if (time_before_eq(jiffies, fcport->plogi_nack_done_deadline)) {
1323 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
5b33469a 1324 return 0;
9cd883f0 1325 }
5b33469a
QT		 1326 }
1327
726b8548
QT		 1328 /* for pure Target Mode. Login will not be initiated */
1329 if (vha->host->active_mode == MODE_TARGET)
1330 return 0;
1331
1332 if (fcport->flags & FCF_ASYNC_SENT) {
1333 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
1334 return 0;
1335 }
1336
1337 switch (fcport->disc_state) {
1338 case DSC_DELETED:
a4239945 1339 wwn = wwn_to_u64(fcport->node_name);
8777e431
QT		 1340 switch (vha->hw->current_topology) {
1341 case ISP_CFG_N:
1342 if (fcport_is_smaller(fcport)) {
1343 /* this adapter is bigger */
1344 if (fcport->login_retry) {
1345 if (fcport->loop_id == FC_NO_LOOP_ID) {
1346 qla2x00_find_new_loop_id(vha,
1347 fcport);
1348 fcport->fw_login_state =
1349 DSC_LS_PORT_UNAVAIL;
1350 }
1351 fcport->login_retry--;
1352 qla_post_els_plogi_work(vha, fcport);
1353 } else {
1354 ql_log(ql_log_info, vha, 0x705d,
1355 "Unable to reach remote port %8phC",
1356 fcport->port_name);
1357 }
1358 } else {
1359 qla24xx_post_gnl_work(vha, fcport);
1360 }
1361 break;
1362 default:
1363 if (wwn == 0) {
1364 ql_dbg(ql_dbg_disc, vha, 0xffff,
1365 "%s %d %8phC post GNNID\n",
1366 __func__, __LINE__, fcport->port_name);
1367 qla24xx_post_gnnid_work(vha, fcport);
1368 } else if (fcport->loop_id == FC_NO_LOOP_ID) {
1369 ql_dbg(ql_dbg_disc, vha, 0x20bd,
1370 "%s %d %8phC post gnl\n",
1371 __func__, __LINE__, fcport->port_name);
1372 qla24xx_post_gnl_work(vha, fcport);
1373 } else {
1374 qla_chk_n2n_b4_login(vha, fcport);
1375 }
1376 break;
726b8548
QT		 1377 }
1378 break;
1379
1380 case DSC_GNL:
8777e431
QT		 1381 switch (vha->hw->current_topology) {
1382 case ISP_CFG_N:
1383 if ((fcport->current_login_state & 0xf) == 0x6) {
1384 ql_dbg(ql_dbg_disc, vha, 0x2118,
1385 "%s %d %8phC post GPDB work\n",
1386 __func__, __LINE__, fcport->port_name);
1387 fcport->chip_reset =
1388 vha->hw->base_qpair->chip_reset;
1389 qla24xx_post_gpdb_work(vha, fcport, 0);
1390 } else {
1391 ql_dbg(ql_dbg_disc, vha, 0x2118,
1392 "%s %d %8phC post NVMe PRLI\n",
1393 __func__, __LINE__, fcport->port_name);
1394 qla24xx_post_prli_work(vha, fcport);
1395 }
1396 break;
1397 default:
1398 if (fcport->login_pause) {
1399 fcport->last_rscn_gen = fcport->rscn_gen;
1400 fcport->last_login_gen = fcport->login_gen;
1401 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
1402 break;
1403 }
1404 qla_chk_n2n_b4_login(vha, fcport);
726b8548
QT		 1405 break;
1406 }
726b8548
QT		 1407 break;
1408
1409 case DSC_LOGIN_FAILED:
23dd98a6 1410 fcport->login_retry--;
83548fe2
QT		 1411 ql_dbg(ql_dbg_disc, vha, 0x20d0,
1412 "%s %d %8phC post gidpn\n",
1413 __func__, __LINE__, fcport->port_name);
9cd883f0
QT		 1414 if (N2N_TOPO(vha->hw))
1415 qla_chk_n2n_b4_login(vha, fcport);
1416 else
1417 qla24xx_post_gidpn_work(vha, fcport);
726b8548
QT		 1418 break;
1419
1420 case DSC_LOGIN_COMPLETE:
1421 /* recheck login state */
83548fe2 1422 ql_dbg(ql_dbg_disc, vha, 0x20d1,
f13515ac 1423 "%s %d %8phC post adisc\n",
83548fe2 1424 __func__, __LINE__, fcport->port_name);
23dd98a6 1425 fcport->login_retry--;
f13515ac
QT		 1426 data[0] = data[1] = 0;
1427 qla2x00_post_async_adisc_work(vha, fcport, data);
726b8548
QT		 1428 break;
1429
1cbc0efc
DT		 1430 case DSC_LOGIN_PEND:
1431 if (fcport->fw_login_state == DSC_LS_PLOGI_COMP)
1432 qla24xx_post_prli_work(vha, fcport);
1433 break;
1434
cd4ed6b4
QT		 1435 case DSC_UPD_FCPORT:
1436 sec = jiffies_to_msecs(jiffies -
1437 fcport->jiffies_at_registration)/1000;
1438 if (fcport->sec_since_registration < sec && sec &&
1439 !(sec % 60)) {
1440 fcport->sec_since_registration = sec;
1441 ql_dbg(ql_dbg_disc, fcport->vha, 0xffff,
1442 "%s %8phC - Slow Rport registration(%d Sec)\n",
1443 __func__, fcport->port_name, sec);
1444 }
1445
1446 if (fcport->next_disc_state != DSC_DELETE_PEND)
1447 fcport->next_disc_state = DSC_ADISC;
1448 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
1449 break;
1450
726b8548
QT		 1451 default:
1452 break;
1453 }
1454
1455 return 0;
1456}
1457
1458static
1459void qla24xx_handle_rscn_event(fc_port_t *fcport, struct event_arg *ea)
1460{
1461 fcport->rscn_gen++;
1462
83548fe2
QT		 1463 ql_dbg(ql_dbg_disc, fcport->vha, 0x210c,
1464 "%s %8phC DS %d LS %d\n",
1465 __func__, fcport->port_name, fcport->disc_state,
1466 fcport->fw_login_state);
726b8548
QT		 1467
1468 if (fcport->flags & FCF_ASYNC_SENT)
1469 return;
1470
1471 switch (fcport->disc_state) {
1472 case DSC_DELETED:
1473 case DSC_LOGIN_COMPLETE:
5ef696aa 1474 qla24xx_post_gpnid_work(fcport->vha, &ea->id);
726b8548 1475 break;
726b8548
QT		 1476 default:
1477 break;
1478 }
1479}
1480
1481int qla24xx_post_newsess_work(struct scsi_qla_host *vha, port_id_t *id,
a4239945 1482 u8 *port_name, u8 *node_name, void *pla, u8 fc4_type)
726b8548
QT		 1483{
1484 struct qla_work_evt *e;
1485 e = qla2x00_alloc_work(vha, QLA_EVT_NEW_SESS);
1486 if (!e)
1487 return QLA_FUNCTION_FAILED;
1488
1489 e->u.new_sess.id = *id;
1490 e->u.new_sess.pla = pla;
a4239945 1491 e->u.new_sess.fc4_type = fc4_type;
726b8548 1492 memcpy(e->u.new_sess.port_name, port_name, WWN_SIZE);
a4239945
QT		 1493 if (node_name)
1494 memcpy(e->u.new_sess.node_name, node_name, WWN_SIZE);
726b8548
QT		 1495
1496 return qla2x00_post_work(vha, e);
1497}
1498
726b8548
QT		 1499static
1500void qla24xx_handle_relogin_event(scsi_qla_host_t *vha,
1501 struct event_arg *ea)
1502{
1503 fc_port_t *fcport = ea->fcport;
1504
83548fe2
QT		 1505 ql_dbg(ql_dbg_disc, vha, 0x2102,
1506 "%s %8phC DS %d LS %d P %d del %d cnfl %p rscn %d|%d login %d|%d fl %x\n",
1507 __func__, fcport->port_name, fcport->disc_state,
1508 fcport->fw_login_state, fcport->login_pause,
1509 fcport->deleted, fcport->conflict,
1510 fcport->last_rscn_gen, fcport->rscn_gen,
1511 fcport->last_login_gen, fcport->login_gen,
1512 fcport->flags);
726b8548
QT		 1513
1514 if ((fcport->fw_login_state == DSC_LS_PLOGI_PEND) ||
726b8548
QT		 1515 (fcport->fw_login_state == DSC_LS_PRLI_PEND))
1516 return;
1517
5b33469a 1518 if (fcport->fw_login_state == DSC_LS_PLOGI_COMP) {
9cd883f0
QT		 1519 if (time_before_eq(jiffies, fcport->plogi_nack_done_deadline)) {
1520 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
5b33469a 1521 return;
9cd883f0 1522 }
5b33469a
QT		 1523 }
1524
726b8548 1525 if (fcport->last_rscn_gen != fcport->rscn_gen) {
83548fe2 1526 ql_dbg(ql_dbg_disc, vha, 0x20e9, "%s %d %8phC post gidpn\n",
726b8548
QT		 1527 __func__, __LINE__, fcport->port_name);
1528
5d3300a9 1529 qla24xx_post_gidpn_work(vha, fcport);
726b8548
QT		 1530 return;
1531 }
1532
1533 qla24xx_fcport_handle_login(vha, fcport);
1534}
1535
8777e431
QT		 1536
1537void qla_handle_els_plogi_done(scsi_qla_host_t *vha, struct event_arg *ea)
1538{
1539 ql_dbg(ql_dbg_disc, vha, 0x2118,
1540 "%s %d %8phC post PRLI\n",
1541 __func__, __LINE__, ea->fcport->port_name);
1542 qla24xx_post_prli_work(vha, ea->fcport);
1543}
1544
41dc529a 1545void qla2x00_fcport_event_handler(scsi_qla_host_t *vha, struct event_arg *ea)
726b8548 1546{
f352eeb7 1547 fc_port_t *f, *tf;
41dc529a 1548 uint32_t id = 0, mask, rid;
f352eeb7 1549 unsigned long flags;
bee8b846 1550 fc_port_t *fcport;
726b8548
QT		 1551
1552 switch (ea->event) {
1553 case FCME_RELOGIN:
1554 if (test_bit(UNLOADING, &vha->dpc_flags))
1555 return;
5ff1d584 1556
726b8548
QT		 1557 qla24xx_handle_relogin_event(vha, ea);
1558 break;
1559 case FCME_RSCN:
1560 if (test_bit(UNLOADING, &vha->dpc_flags))
1561 return;
41dc529a
QT		 1562 switch (ea->id.b.rsvd_1) {
1563 case RSCN_PORT_ADDR:
bee8b846
QT		 1564 fcport = qla2x00_find_fcport_by_nportid
1565 (vha, &ea->id, 1);
cd4ed6b4 1566 if (fcport) {
cb873ba4 1567 fcport->scan_needed = 1;
cd4ed6b4
QT		 1568 fcport->rscn_gen++;
1569 }
bee8b846 1570
f352eeb7
QT		 1571 spin_lock_irqsave(&vha->work_lock, flags);
1572 if (vha->scan.scan_flags == 0) {
1573 ql_dbg(ql_dbg_disc, vha, 0xffff,
1574 "%s: schedule\n", __func__);
1575 vha->scan.scan_flags |= SF_QUEUED;
1576 schedule_delayed_work(&vha->scan.scan_work, 5);
41dc529a 1577 }
f352eeb7
QT		 1578 spin_unlock_irqrestore(&vha->work_lock, flags);
1579
41dc529a
QT		 1580 break;
1581 case RSCN_AREA_ADDR:
1582 case RSCN_DOM_ADDR:
1583 if (ea->id.b.rsvd_1 == RSCN_AREA_ADDR) {
1584 mask = 0xffff00;
83548fe2
QT		 1585 ql_dbg(ql_dbg_async, vha, 0x5044,
1586 "RSCN: Area 0x%06x was affected\n",
1587 ea->id.b24);
41dc529a
QT		 1588 } else {
1589 mask = 0xff0000;
83548fe2
QT		 1590 ql_dbg(ql_dbg_async, vha, 0x507a,
1591 "RSCN: Domain 0x%06x was affected\n",
1592 ea->id.b24);
41dc529a 1593 }
726b8548 1594
41dc529a
QT		 1595 rid = ea->id.b24 & mask;
1596 list_for_each_entry_safe(f, tf, &vha->vp_fcports,
1597 list) {
1598 id = f->d_id.b24 & mask;
1599 if (rid == id) {
1600 ea->fcport = f;
1601 qla24xx_handle_rscn_event(f, ea);
1602 }
726b8548 1603 }
41dc529a
QT		 1604 break;
1605 case RSCN_FAB_ADDR:
1606 default:
83548fe2
QT		 1607 ql_log(ql_log_warn, vha, 0xd045,
1608 "RSCN: Fabric was affected. Addr format %d\n",
1609 ea->id.b.rsvd_1);
41dc529a
QT		 1610 qla2x00_mark_all_devices_lost(vha, 1);
1611 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
1612 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
726b8548
QT		 1613 }
1614 break;
1615 case FCME_GIDPN_DONE:
1616 qla24xx_handle_gidpn_event(vha, ea);
1617 break;
1618 case FCME_GNL_DONE:
1619 qla24xx_handle_gnl_done_event(vha, ea);
1620 break;
1621 case FCME_GPSC_DONE:
a4239945 1622 qla24xx_handle_gpsc_event(vha, ea);
726b8548
QT		 1623 break;
1624 case FCME_PLOGI_DONE: /* Initiator side sent LLIOCB */
1625 qla24xx_handle_plogi_done_event(vha, ea);
1626 break;
a5d42f4c
DG		 1627 case FCME_PRLI_DONE:
1628 qla24xx_handle_prli_done_event(vha, ea);
1629 break;
726b8548
QT		 1630 case FCME_GPDB_DONE:
1631 qla24xx_handle_gpdb_event(vha, ea);
1632 break;
1633 case FCME_GPNID_DONE:
1634 qla24xx_handle_gpnid_event(vha, ea);
1635 break;
d3bae931
DG		 1636 case FCME_GFFID_DONE:
1637 qla24xx_handle_gffid_event(vha, ea);
1638 break;
f13515ac
QT		 1639 case FCME_ADISC_DONE:
1640 qla24xx_handle_adisc_event(vha, ea);
1641 break;
a4239945
QT		 1642 case FCME_GNNID_DONE:
1643 qla24xx_handle_gnnid_event(vha, ea);
1644 break;
1645 case FCME_GFPNID_DONE:
1646 qla24xx_handle_gfpnid_event(vha, ea);
1647 break;
8777e431
QT		 1648 case FCME_ELS_PLOGI_DONE:
1649 qla_handle_els_plogi_done(vha, ea);
1650 break;
726b8548
QT		 1651 default:
1652 BUG_ON(1);
1653 break;
1654 }
5ff1d584
AV		 1655}
1656
3822263e 1657static void
faef62d1 1658qla2x00_tmf_iocb_timeout(void *data)
3822263e 1659{
25ff6af1 1660 srb_t *sp = data;
faef62d1 1661 struct srb_iocb *tmf = &sp->u.iocb_cmd;
3822263e 1662
faef62d1
AB		 1663 tmf->u.tmf.comp_status = CS_TIMEOUT;
1664 complete(&tmf->u.tmf.comp);
1665}
9ba56b95 1666
faef62d1 1667static void
25ff6af1 1668qla2x00_tmf_sp_done(void *ptr, int res)
faef62d1 1669{
25ff6af1 1670 srb_t *sp = ptr;
faef62d1 1671 struct srb_iocb *tmf = &sp->u.iocb_cmd;
25ff6af1 1672
faef62d1 1673 complete(&tmf->u.tmf.comp);
3822263e
MI		 1674}
1675
1676int
faef62d1 1677qla2x00_async_tm_cmd(fc_port_t *fcport, uint32_t flags, uint32_t lun,
3822263e
MI		 1678 uint32_t tag)
1679{
1680 struct scsi_qla_host *vha = fcport->vha;
faef62d1 1681 struct srb_iocb *tm_iocb;
3822263e 1682 srb_t *sp;
faef62d1 1683 int rval = QLA_FUNCTION_FAILED;
3822263e 1684
9ba56b95 1685 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
3822263e
MI		 1686 if (!sp)
1687 goto done;
1688
faef62d1 1689 tm_iocb = &sp->u.iocb_cmd;
9ba56b95
GM		 1690 sp->type = SRB_TM_CMD;
1691 sp->name = "tmf";
e74e7d95
BH		 1692
1693 tm_iocb->timeout = qla2x00_tmf_iocb_timeout;
1694 init_completion(&tm_iocb->u.tmf.comp);
faef62d1 1695 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha));
e74e7d95 1696
faef62d1
AB		 1697 tm_iocb->u.tmf.flags = flags;
1698 tm_iocb->u.tmf.lun = lun;
1699 tm_iocb->u.tmf.data = tag;
1700 sp->done = qla2x00_tmf_sp_done;
3822263e
MI		 1701
1702 rval = qla2x00_start_sp(sp);
1703 if (rval != QLA_SUCCESS)
1704 goto done_free_sp;
1705
7c3df132 1706 ql_dbg(ql_dbg_taskm, vha, 0x802f,
cfb0919c
CD		 1707 "Async-tmf hdl=%x loop-id=%x portid=%02x%02x%02x.\n",
1708 sp->handle, fcport->loop_id, fcport->d_id.b.domain,
1709 fcport->d_id.b.area, fcport->d_id.b.al_pa);
faef62d1
AB		 1710
1711 wait_for_completion(&tm_iocb->u.tmf.comp);
1712
b4146c49 1713 rval = tm_iocb->u.tmf.data;
faef62d1 1714
b4146c49
AG		 1715 if (rval != QLA_SUCCESS) {
1716 ql_log(ql_log_warn, vha, 0x8030,
faef62d1
AB		 1717 "TM IOCB failed (%x).\n", rval);
1718 }
1719
1720 if (!test_bit(UNLOADING, &vha->dpc_flags) && !IS_QLAFX00(vha->hw)) {
1721 flags = tm_iocb->u.tmf.flags;
1722 lun = (uint16_t)tm_iocb->u.tmf.lun;
1723
1724 /* Issue Marker IOCB */
1725 qla2x00_marker(vha, vha->hw->req_q_map[0],
1726 vha->hw->rsp_q_map[0], sp->fcport->loop_id, lun,
1727 flags == TCF_LUN_RESET ? MK_SYNC_ID_LUN : MK_SYNC_ID);
1728 }
3822263e
MI		 1729
1730done_free_sp:
25ff6af1 1731 sp->free(sp);
6d674927 1732 sp->fcport->flags &= ~FCF_ASYNC_SENT;
3822263e
MI		 1733done:
1734 return rval;
1735}
1736
4440e46d
AB		 1737static void
1738qla24xx_abort_iocb_timeout(void *data)
1739{
25ff6af1 1740 srb_t *sp = data;
4440e46d
AB		 1741 struct srb_iocb *abt = &sp->u.iocb_cmd;
1742
1743 abt->u.abt.comp_status = CS_TIMEOUT;
f6145e86 1744 sp->done(sp, QLA_FUNCTION_TIMEOUT);
4440e46d
AB		 1745}
1746
1747static void
25ff6af1 1748qla24xx_abort_sp_done(void *ptr, int res)
4440e46d 1749{
25ff6af1 1750 srb_t *sp = ptr;
4440e46d
AB		 1751 struct srb_iocb *abt = &sp->u.iocb_cmd;
1752
f6145e86
QT		 1753 if (del_timer(&sp->u.iocb_cmd.timer)) {
1754 if (sp->flags & SRB_WAKEUP_ON_COMP)
1755 complete(&abt->u.abt.comp);
1756 else
1757 sp->free(sp);
1758 }
4440e46d
AB		 1759}
1760
15f30a57 1761int
f6145e86 1762qla24xx_async_abort_cmd(srb_t *cmd_sp, bool wait)
4440e46d 1763{
25ff6af1 1764 scsi_qla_host_t *vha = cmd_sp->vha;
4440e46d
AB		 1765 struct srb_iocb *abt_iocb;
1766 srb_t *sp;
1767 int rval = QLA_FUNCTION_FAILED;
1768
49cecca7 1769 sp = qla2xxx_get_qpair_sp(cmd_sp->qpair, cmd_sp->fcport, GFP_KERNEL);
4440e46d
AB		 1770 if (!sp)
1771 goto done;
1772
1773 abt_iocb = &sp->u.iocb_cmd;
1774 sp->type = SRB_ABT_CMD;
1775 sp->name = "abort";
49cecca7 1776 sp->qpair = cmd_sp->qpair;
f6145e86
QT		 1777 if (wait)
1778 sp->flags = SRB_WAKEUP_ON_COMP;
e74e7d95
BH		 1779
1780 abt_iocb->timeout = qla24xx_abort_iocb_timeout;
1781 init_completion(&abt_iocb->u.abt.comp);
4440e46d 1782 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha));
e74e7d95 1783
4440e46d 1784 abt_iocb->u.abt.cmd_hndl = cmd_sp->handle;
49cecca7 1785 abt_iocb->u.abt.req_que_no = cpu_to_le16(cmd_sp->qpair->req->id);
b027a5ac 1786
4440e46d 1787 sp->done = qla24xx_abort_sp_done;
4440e46d
AB		 1788
1789 rval = qla2x00_start_sp(sp);
1790 if (rval != QLA_SUCCESS)
1791 goto done_free_sp;
1792
1793 ql_dbg(ql_dbg_async, vha, 0x507c,
49cecca7
QT		 1794 "Abort command issued - hdl=%x, type=%x\n",
1795 cmd_sp->handle, cmd_sp->type);
4440e46d 1796
f6145e86
QT		 1797 if (wait) {
1798 wait_for_completion(&abt_iocb->u.abt.comp);
1799 rval = abt_iocb->u.abt.comp_status == CS_COMPLETE ?
1800 QLA_SUCCESS : QLA_FUNCTION_FAILED;
1801 }
4440e46d
AB		 1802
1803done_free_sp:
25ff6af1 1804 sp->free(sp);
4440e46d
AB		 1805done:
1806 return rval;
1807}
1808
1809int
1810qla24xx_async_abort_command(srb_t *sp)
1811{
1812 unsigned long flags = 0;
1813
1814 uint32_t handle;
1815 fc_port_t *fcport = sp->fcport;
1816 struct scsi_qla_host *vha = fcport->vha;
1817 struct qla_hw_data *ha = vha->hw;
1818 struct req_que *req = vha->req;
1819
b027a5ac
DT		 1820 if (vha->flags.qpairs_available && sp->qpair)
1821 req = sp->qpair->req;
1822
4440e46d
AB		 1823 spin_lock_irqsave(&ha->hardware_lock, flags);
1824 for (handle = 1; handle < req->num_outstanding_cmds; handle++) {
1825 if (req->outstanding_cmds[handle] == sp)
1826 break;
1827 }
1828 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1829 if (handle == req->num_outstanding_cmds) {
1830 /* Command not found. */
1831 return QLA_FUNCTION_FAILED;
1832 }
1833 if (sp->type == SRB_FXIOCB_DCMD)
1834 return qlafx00_fx_disc(vha, &vha->hw->mr.fcport,
1835 FXDISC_ABORT_IOCTL);
1836
f6145e86 1837 return qla24xx_async_abort_cmd(sp, true);
4440e46d
AB		 1838}
1839
a5d42f4c
DG		 1840static void
1841qla24xx_handle_prli_done_event(struct scsi_qla_host *vha, struct event_arg *ea)
1842{
1843 switch (ea->data[0]) {
1844 case MBS_COMMAND_COMPLETE:
1845 ql_dbg(ql_dbg_disc, vha, 0x2118,
1846 "%s %d %8phC post gpdb\n",
1847 __func__, __LINE__, ea->fcport->port_name);
1848
1849 ea->fcport->chip_reset = vha->hw->base_qpair->chip_reset;
1850 ea->fcport->logout_on_delete = 1;
1851 qla24xx_post_gpdb_work(vha, ea->fcport, 0);
1852 break;
1853 default:
1cbc0efc
DT		 1854 if ((ea->iop[0] == LSC_SCODE_ELS_REJECT) &&
1855 (ea->iop[1] == 0x50000)) { /* reson 5=busy expl:0x0 */
1856 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
1857 ea->fcport->fw_login_state = DSC_LS_PLOGI_COMP;
1858 break;
1859 }
1860
edd05de1
DG		 1861 if (ea->fcport->n2n_flag) {
1862 ql_dbg(ql_dbg_disc, vha, 0x2118,
1863 "%s %d %8phC post fc4 prli\n",
1864 __func__, __LINE__, ea->fcport->port_name);
1865 ea->fcport->fc4f_nvme = 0;
1866 ea->fcport->n2n_flag = 0;
1867 qla24xx_post_prli_work(vha, ea->fcport);
1868 }
a5d42f4c
DG		 1869 ql_dbg(ql_dbg_disc, vha, 0x2119,
1870 "%s %d %8phC unhandle event of %x\n",
1871 __func__, __LINE__, ea->fcport->port_name, ea->data[0]);
1872 break;
1873 }
1874}
1875
726b8548
QT		 1876static void
1877qla24xx_handle_plogi_done_event(struct scsi_qla_host *vha, struct event_arg *ea)
ac280b67 1878{
726b8548 1879 port_id_t cid; /* conflict Nport id */
a084fd68
QT		 1880 u16 lid;
1881 struct fc_port *conflict_fcport;
82abdcaf 1882 unsigned long flags;
a4239945
QT		 1883 struct fc_port *fcport = ea->fcport;
1884
f352eeb7
QT		 1885 ql_dbg(ql_dbg_disc, vha, 0xffff,
1886 "%s %8phC DS %d LS %d rc %d login %d|%d rscn %d|%d data %x|%x iop %x|%x\n",
1887 __func__, fcport->port_name, fcport->disc_state,
1888 fcport->fw_login_state, ea->rc, ea->sp->gen2, fcport->login_gen,
1889 ea->sp->gen2, fcport->rscn_gen|ea->sp->gen1,
1890 ea->data[0], ea->data[1], ea->iop[0], ea->iop[1]);
1891
a4239945
QT		 1892 if ((fcport->fw_login_state == DSC_LS_PLOGI_PEND) ||
1893 (fcport->fw_login_state == DSC_LS_PRLI_PEND)) {
1894 ql_dbg(ql_dbg_disc, vha, 0x20ea,
1895 "%s %d %8phC Remote is trying to login\n",
1896 __func__, __LINE__, fcport->port_name);
1897 return;
1898 }
1899
1900 if (fcport->disc_state == DSC_DELETE_PEND)
1901 return;
1902
1903 if (ea->sp->gen2 != fcport->login_gen) {
1904 /* target side must have changed it. */
1905 ql_dbg(ql_dbg_disc, vha, 0x20d3,
f352eeb7
QT		 1906 "%s %8phC generation changed\n",
1907 __func__, fcport->port_name);
1908 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
a4239945
QT		 1909 return;
1910 } else if (ea->sp->gen1 != fcport->rscn_gen) {
1911 ql_dbg(ql_dbg_disc, vha, 0x20d4, "%s %d %8phC post gidpn\n",
1912 __func__, __LINE__, fcport->port_name);
1913 qla24xx_post_gidpn_work(vha, fcport);
1914 return;
1915 }
ac280b67 1916
726b8548 1917 switch (ea->data[0]) {
ac280b67 1918 case MBS_COMMAND_COMPLETE:
a4f92a32
AV		 1919 /*
1920 * Driver must validate login state - If PRLI not complete,
1921 * force a relogin attempt via implicit LOGO, PLOGI, and PRLI
1922 * requests.
1923 */
a5d42f4c
DG		 1924 if (ea->fcport->fc4f_nvme) {
1925 ql_dbg(ql_dbg_disc, vha, 0x2117,
1926 "%s %d %8phC post prli\n",
1927 __func__, __LINE__, ea->fcport->port_name);
1928 qla24xx_post_prli_work(vha, ea->fcport);
1929 } else {
1930 ql_dbg(ql_dbg_disc, vha, 0x20ea,
a084fd68
QT		 1931 "%s %d %8phC LoopID 0x%x in use with %06x. post gnl\n",
1932 __func__, __LINE__, ea->fcport->port_name,
1933 ea->fcport->loop_id, ea->fcport->d_id.b24);
1934
1935 set_bit(ea->fcport->loop_id, vha->hw->loop_id_map);
82abdcaf 1936 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
a5d42f4c
DG		 1937 ea->fcport->chip_reset = vha->hw->base_qpair->chip_reset;
1938 ea->fcport->logout_on_delete = 1;
3515832c 1939 ea->fcport->send_els_logo = 0;
82abdcaf
QT		 1940 ea->fcport->fw_login_state = DSC_LS_PRLI_COMP;
1941 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
1942
a5d42f4c
DG		 1943 qla24xx_post_gpdb_work(vha, ea->fcport, 0);
1944 }
ac280b67
AV		 1945 break;
1946 case MBS_COMMAND_ERROR:
83548fe2 1947 ql_dbg(ql_dbg_disc, vha, 0x20eb, "%s %d %8phC cmd error %x\n",
726b8548
QT		 1948 __func__, __LINE__, ea->fcport->port_name, ea->data[1]);
1949
1950 ea->fcport->flags &= ~FCF_ASYNC_SENT;
1951 ea->fcport->disc_state = DSC_LOGIN_FAILED;
1952 if (ea->data[1] & QLA_LOGIO_LOGIN_RETRIED)
ac280b67
AV		 1953 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
1954 else
726b8548 1955 qla2x00_mark_device_lost(vha, ea->fcport, 1, 0);
ac280b67
AV		 1956 break;
1957 case MBS_LOOP_ID_USED:
726b8548
QT		 1958 /* data[1] = IO PARAM 1 = nport ID */
1959 cid.b.domain = (ea->iop[1] >> 16) & 0xff;
1960 cid.b.area = (ea->iop[1] >> 8) & 0xff;
1961 cid.b.al_pa = ea->iop[1] & 0xff;
1962 cid.b.rsvd_1 = 0;
1963
83548fe2
QT		 1964 ql_dbg(ql_dbg_disc, vha, 0x20ec,
1965 "%s %d %8phC LoopID 0x%x in use post gnl\n",
1966 __func__, __LINE__, ea->fcport->port_name,
1967 ea->fcport->loop_id);
726b8548
QT		 1968
1969 if (IS_SW_RESV_ADDR(cid)) {
1970 set_bit(ea->fcport->loop_id, vha->hw->loop_id_map);
1971 ea->fcport->loop_id = FC_NO_LOOP_ID;
1972 } else {
1973 qla2x00_clear_loop_id(ea->fcport);
ac280b67 1974 }
726b8548
QT		 1975 qla24xx_post_gnl_work(vha, ea->fcport);
1976 break;
1977 case MBS_PORT_ID_USED:
83548fe2
QT		 1978 ql_dbg(ql_dbg_disc, vha, 0x20ed,
1979 "%s %d %8phC NPortId %02x%02x%02x inuse post gidpn\n",
1980 __func__, __LINE__, ea->fcport->port_name,
1981 ea->fcport->d_id.b.domain, ea->fcport->d_id.b.area,
1982 ea->fcport->d_id.b.al_pa);
726b8548 1983
a084fd68
QT		 1984 lid = ea->iop[1] & 0xffff;
1985 qlt_find_sess_invalidate_other(vha,
1986 wwn_to_u64(ea->fcport->port_name),
1987 ea->fcport->d_id, lid, &conflict_fcport);
1988
1989 if (conflict_fcport) {
1990 /*
1991 * Another fcport share the same loop_id/nport id.
1992 * Conflict fcport needs to finish cleanup before this
1993 * fcport can proceed to login.
1994 */
1995 conflict_fcport->conflict = ea->fcport;
1996 ea->fcport->login_pause = 1;
1997
1998 ql_dbg(ql_dbg_disc, vha, 0x20ed,
1999 "%s %d %8phC NPortId %06x inuse with loopid 0x%x. post gidpn\n",
2000 __func__, __LINE__, ea->fcport->port_name,
2001 ea->fcport->d_id.b24, lid);
2002 qla2x00_clear_loop_id(ea->fcport);
2003 qla24xx_post_gidpn_work(vha, ea->fcport);
2004 } else {
2005 ql_dbg(ql_dbg_disc, vha, 0x20ed,
2006 "%s %d %8phC NPortId %06x inuse with loopid 0x%x. sched delete\n",
2007 __func__, __LINE__, ea->fcport->port_name,
2008 ea->fcport->d_id.b24, lid);
2009
2010 qla2x00_clear_loop_id(ea->fcport);
2011 set_bit(lid, vha->hw->loop_id_map);
2012 ea->fcport->loop_id = lid;
2013 ea->fcport->keep_nport_handle = 0;
94cff6e1 2014 qlt_schedule_sess_for_deletion(ea->fcport);
a084fd68 2015 }
ac280b67
AV		 2016 break;
2017 }
4916392b 2018 return;
ac280b67
AV		 2019}
2020
4916392b 2021void
ac280b67
AV		 2022qla2x00_async_logout_done(struct scsi_qla_host *vha, fc_port_t *fcport,
2023 uint16_t *data)
2024{
a6ca8878 2025 qlt_logo_completion_handler(fcport, data[0]);
726b8548 2026 fcport->login_gen++;
fa83e658 2027 fcport->flags &= ~FCF_ASYNC_ACTIVE;
4916392b 2028 return;
ac280b67
AV		 2029}
2030
4916392b 2031void
5ff1d584
AV		 2032qla2x00_async_adisc_done(struct scsi_qla_host *vha, fc_port_t *fcport,
2033 uint16_t *data)
2034{
fa83e658 2035 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
5ff1d584
AV		 2036 if (data[0] == MBS_COMMAND_COMPLETE) {
2037 qla2x00_update_fcport(vha, fcport);
2038
4916392b 2039 return;
5ff1d584
AV		 2040 }
2041
2042 /* Retry login. */
5ff1d584
AV		 2043 if (data[1] & QLA_LOGIO_LOGIN_RETRIED)
2044 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
2045 else
80d79440 2046 qla2x00_mark_device_lost(vha, fcport, 1, 0);
5ff1d584 2047
4916392b 2048 return;
5ff1d584
AV		 2049}
2050
1da177e4
LT		 2051/****************************************************************************/
2052/* QLogic ISP2x00 Hardware Support Functions. */
2053/****************************************************************************/
2054
fa492630 2055static int
7d613ac6
SV		 2056qla83xx_nic_core_fw_load(scsi_qla_host_t *vha)
2057{
2058 int rval = QLA_SUCCESS;
2059 struct qla_hw_data *ha = vha->hw;
2060 uint32_t idc_major_ver, idc_minor_ver;
711aa7f7 2061 uint16_t config[4];
7d613ac6
SV		 2062
2063 qla83xx_idc_lock(vha, 0);
2064
2065 /* SV: TODO: Assign initialization timeout from
2066 * flash-info / other param
2067 */
2068 ha->fcoe_dev_init_timeout = QLA83XX_IDC_INITIALIZATION_TIMEOUT;
2069 ha->fcoe_reset_timeout = QLA83XX_IDC_RESET_ACK_TIMEOUT;
2070
2071 /* Set our fcoe function presence */
2072 if (__qla83xx_set_drv_presence(vha) != QLA_SUCCESS) {
2073 ql_dbg(ql_dbg_p3p, vha, 0xb077,
2074 "Error while setting DRV-Presence.\n");
2075 rval = QLA_FUNCTION_FAILED;
2076 goto exit;
2077 }
2078
2079 /* Decide the reset ownership */
2080 qla83xx_reset_ownership(vha);
2081
2082 /*
2083 * On first protocol driver load:
2084 * Init-Owner: Set IDC-Major-Version and Clear IDC-Lock-Recovery
2085 * register.
2086 * Others: Check compatibility with current IDC Major version.
2087 */
2088 qla83xx_rd_reg(vha, QLA83XX_IDC_MAJOR_VERSION, &idc_major_ver);
2089 if (ha->flags.nic_core_reset_owner) {
2090 /* Set IDC Major version */
2091 idc_major_ver = QLA83XX_SUPP_IDC_MAJOR_VERSION;
2092 qla83xx_wr_reg(vha, QLA83XX_IDC_MAJOR_VERSION, idc_major_ver);
2093
2094 /* Clearing IDC-Lock-Recovery register */
2095 qla83xx_wr_reg(vha, QLA83XX_IDC_LOCK_RECOVERY, 0);
2096 } else if (idc_major_ver != QLA83XX_SUPP_IDC_MAJOR_VERSION) {
2097 /*
2098 * Clear further IDC participation if we are not compatible with
2099 * the current IDC Major Version.
2100 */
2101 ql_log(ql_log_warn, vha, 0xb07d,
2102 "Failing load, idc_major_ver=%d, expected_major_ver=%d.\n",
2103 idc_major_ver, QLA83XX_SUPP_IDC_MAJOR_VERSION);
2104 __qla83xx_clear_drv_presence(vha);
2105 rval = QLA_FUNCTION_FAILED;
2106 goto exit;
2107 }
2108 /* Each function sets its supported Minor version. */
2109 qla83xx_rd_reg(vha, QLA83XX_IDC_MINOR_VERSION, &idc_minor_ver);
2110 idc_minor_ver |= (QLA83XX_SUPP_IDC_MINOR_VERSION << (ha->portnum * 2));
2111 qla83xx_wr_reg(vha, QLA83XX_IDC_MINOR_VERSION, idc_minor_ver);
2112
711aa7f7
SK		 2113 if (ha->flags.nic_core_reset_owner) {
2114 memset(config, 0, sizeof(config));
2115 if (!qla81xx_get_port_config(vha, config))
2116 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE,
2117 QLA8XXX_DEV_READY);
2118 }
2119
7d613ac6
SV		 2120 rval = qla83xx_idc_state_handler(vha);
2121
2122exit:
2123 qla83xx_idc_unlock(vha, 0);
2124
2125 return rval;
2126}
2127
1da177e4
LT		 2128/*
2129* qla2x00_initialize_adapter
2130* Initialize board.
2131*
2132* Input:
2133* ha = adapter block pointer.
2134*
2135* Returns:
2136* 0 = success
2137*/
2138int
e315cd28 2139qla2x00_initialize_adapter(scsi_qla_host_t *vha)
1da177e4
LT		 2140{
2141 int rval;
e315cd28 2142 struct qla_hw_data *ha = vha->hw;
73208dfd 2143 struct req_que *req = ha->req_q_map[0];
2533cf67 2144
fc90adaf
JC		 2145 memset(&vha->qla_stats, 0, sizeof(vha->qla_stats));
2146 memset(&vha->fc_host_stat, 0, sizeof(vha->fc_host_stat));
2147
1da177e4 2148 /* Clear adapter flags. */
e315cd28 2149 vha->flags.online = 0;
2533cf67 2150 ha->flags.chip_reset_done = 0;
e315cd28 2151 vha->flags.reset_active = 0;
85880801
AV		 2152 ha->flags.pci_channel_io_perm_failure = 0;
2153 ha->flags.eeh_busy = 0;
fabbb8df 2154 vha->qla_stats.jiffies_at_last_reset = get_jiffies_64();
e315cd28
AC		 2155 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
2156 atomic_set(&vha->loop_state, LOOP_DOWN);
2157 vha->device_flags = DFLG_NO_CABLE;
2158 vha->dpc_flags = 0;
2159 vha->flags.management_server_logged_in = 0;
2160 vha->marker_needed = 0;
1da177e4
LT		 2161 ha->isp_abort_cnt = 0;
2162 ha->beacon_blink_led = 0;
2163
73208dfd
AC		 2164 set_bit(0, ha->req_qid_map);
2165 set_bit(0, ha->rsp_qid_map);
2166
cfb0919c 2167 ql_dbg(ql_dbg_init, vha, 0x0040,
7c3df132 2168 "Configuring PCI space...\n");
e315cd28 2169 rval = ha->isp_ops->pci_config(vha);
1da177e4 2170 if (rval) {
7c3df132
SK		 2171 ql_log(ql_log_warn, vha, 0x0044,
2172 "Unable to configure PCI space.\n");
1da177e4
LT		 2173 return (rval);
2174 }
2175
e315cd28 2176 ha->isp_ops->reset_chip(vha);
1da177e4 2177
e315cd28 2178 rval = qla2xxx_get_flash_info(vha);
c00d8994 2179 if (rval) {
7c3df132
SK		 2180 ql_log(ql_log_fatal, vha, 0x004f,
2181 "Unable to validate FLASH data.\n");
7ec0effd
AD		 2182 return rval;
2183 }
2184
2185 if (IS_QLA8044(ha)) {
2186 qla8044_read_reset_template(vha);
2187
2188 /* NOTE: If ql2xdontresethba==1, set IDC_CTRL DONTRESET_BIT0.
2189 * If DONRESET_BIT0 is set, drivers should not set dev_state
2190 * to NEED_RESET. But if NEED_RESET is set, drivers should
2191 * should honor the reset. */
2192 if (ql2xdontresethba == 1)
2193 qla8044_set_idc_dontreset(vha);
c00d8994
AV		 2194 }
2195
73208dfd 2196 ha->isp_ops->get_flash_version(vha, req->ring);
cfb0919c 2197 ql_dbg(ql_dbg_init, vha, 0x0061,
7c3df132 2198 "Configure NVRAM parameters...\n");
0107109e 2199
e315cd28 2200 ha->isp_ops->nvram_config(vha);
1da177e4 2201
d4c760c2
AV		 2202 if (ha->flags.disable_serdes) {
2203 /* Mask HBA via NVRAM settings? */
7c3df132 2204 ql_log(ql_log_info, vha, 0x0077,
7b833558 2205 "Masking HBA WWPN %8phN (via NVRAM).\n", vha->port_name);
d4c760c2
AV		 2206 return QLA_FUNCTION_FAILED;
2207 }
2208
cfb0919c 2209 ql_dbg(ql_dbg_init, vha, 0x0078,
7c3df132 2210 "Verifying loaded RISC code...\n");
1da177e4 2211
e315cd28
AC		 2212 if (qla2x00_isp_firmware(vha) != QLA_SUCCESS) {
2213 rval = ha->isp_ops->chip_diag(vha);
d19044c3
AV		 2214 if (rval)
2215 return (rval);
e315cd28 2216 rval = qla2x00_setup_chip(vha);
d19044c3
AV		 2217 if (rval)
2218 return (rval);
1da177e4 2219 }
a9083016 2220
4d4df193 2221 if (IS_QLA84XX(ha)) {
e315cd28 2222 ha->cs84xx = qla84xx_get_chip(vha);
4d4df193 2223 if (!ha->cs84xx) {
7c3df132 2224 ql_log(ql_log_warn, vha, 0x00d0,
4d4df193
HK		 2225 "Unable to configure ISP84XX.\n");
2226 return QLA_FUNCTION_FAILED;
2227 }
2228 }
2d70c103 2229
ead03855 2230 if (qla_ini_mode_enabled(vha) || qla_dual_mode_enabled(vha))
2d70c103
NB		 2231 rval = qla2x00_init_rings(vha);
2232
2533cf67 2233 ha->flags.chip_reset_done = 1;
1da177e4 2234
9a069e19 2235 if (rval == QLA_SUCCESS && IS_QLA84XX(ha)) {
6c452a45 2236 /* Issue verify 84xx FW IOCB to complete 84xx initialization */
9a069e19
GM		 2237 rval = qla84xx_init_chip(vha);
2238 if (rval != QLA_SUCCESS) {
7c3df132
SK		 2239 ql_log(ql_log_warn, vha, 0x00d4,
2240 "Unable to initialize ISP84XX.\n");
8d2b21db 2241 qla84xx_put_chip(vha);
9a069e19
GM		 2242 }
2243 }
2244
7d613ac6
SV		 2245 /* Load the NIC Core f/w if we are the first protocol driver. */
2246 if (IS_QLA8031(ha)) {
2247 rval = qla83xx_nic_core_fw_load(vha);
2248 if (rval)
2249 ql_log(ql_log_warn, vha, 0x0124,
2250 "Error in initializing NIC Core f/w.\n");
2251 }
2252
2f0f3f4f
MI		 2253 if (IS_QLA24XX_TYPE(ha) || IS_QLA25XX(ha))
2254 qla24xx_read_fcp_prio_cfg(vha);
09ff701a 2255
c46e65c7
JC		 2256 if (IS_P3P_TYPE(ha))
2257 qla82xx_set_driver_version(vha, QLA2XXX_VERSION);
2258 else
2259 qla25xx_set_driver_version(vha, QLA2XXX_VERSION);
2260
1da177e4
LT		 2261 return (rval);
2262}
2263
2264/**
abbd8870 2265 * qla2100_pci_config() - Setup ISP21xx PCI configuration registers.
2db6228d 2266 * @vha: HA context
1da177e4
LT		 2267 *
2268 * Returns 0 on success.
2269 */
abbd8870 2270int
e315cd28 2271qla2100_pci_config(scsi_qla_host_t *vha)
1da177e4 2272{
a157b101 2273 uint16_t w;
abbd8870 2274 unsigned long flags;
e315cd28 2275 struct qla_hw_data *ha = vha->hw;
3d71644c 2276 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1da177e4 2277
1da177e4 2278 pci_set_master(ha->pdev);
af6177d8 2279 pci_try_set_mwi(ha->pdev);
1da177e4 2280
1da177e4 2281 pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
a157b101 2282 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
abbd8870
AV		 2283 pci_write_config_word(ha->pdev, PCI_COMMAND, w);
2284
737faece 2285 pci_disable_rom(ha->pdev);
1da177e4
LT		 2286
2287 /* Get PCI bus information. */
2288 spin_lock_irqsave(&ha->hardware_lock, flags);
3d71644c 2289 ha->pci_attr = RD_REG_WORD(&reg->ctrl_status);
1da177e4
LT		 2290 spin_unlock_irqrestore(&ha->hardware_lock, flags);
2291
abbd8870
AV		 2292 return QLA_SUCCESS;
2293}
1da177e4 2294
abbd8870
AV		 2295/**
2296 * qla2300_pci_config() - Setup ISP23xx PCI configuration registers.
2db6228d 2297 * @vha: HA context
abbd8870
AV		 2298 *
2299 * Returns 0 on success.
2300 */
2301int
e315cd28 2302qla2300_pci_config(scsi_qla_host_t *vha)
abbd8870 2303{
a157b101 2304 uint16_t w;
abbd8870
AV		 2305 unsigned long flags = 0;
2306 uint32_t cnt;
e315cd28 2307 struct qla_hw_data *ha = vha->hw;
3d71644c 2308 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1da177e4 2309
abbd8870 2310 pci_set_master(ha->pdev);
af6177d8 2311 pci_try_set_mwi(ha->pdev);
1da177e4 2312
abbd8870 2313 pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
a157b101 2314 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
1da177e4 2315
abbd8870
AV		 2316 if (IS_QLA2322(ha) || IS_QLA6322(ha))
2317 w &= ~PCI_COMMAND_INTX_DISABLE;
a157b101 2318 pci_write_config_word(ha->pdev, PCI_COMMAND, w);
1da177e4 2319
abbd8870
AV		 2320 /*
2321 * If this is a 2300 card and not 2312, reset the
2322 * COMMAND_INVALIDATE due to a bug in the 2300. Unfortunately,
2323 * the 2310 also reports itself as a 2300 so we need to get the
2324 * fb revision level -- a 6 indicates it really is a 2300 and
2325 * not a 2310.
2326 */
2327 if (IS_QLA2300(ha)) {
2328 spin_lock_irqsave(&ha->hardware_lock, flags);
1da177e4 2329
abbd8870 2330 /* Pause RISC. */
3d71644c 2331 WRT_REG_WORD(&reg->hccr, HCCR_PAUSE_RISC);
abbd8870 2332 for (cnt = 0; cnt < 30000; cnt++) {
3d71644c 2333 if ((RD_REG_WORD(&reg->hccr) & HCCR_RISC_PAUSE) != 0)
abbd8870 2334 break;
1da177e4 2335
abbd8870
AV		 2336 udelay(10);
2337 }
1da177e4 2338
abbd8870 2339 /* Select FPM registers. */
3d71644c
AV		 2340 WRT_REG_WORD(&reg->ctrl_status, 0x20);
2341 RD_REG_WORD(&reg->ctrl_status);
abbd8870
AV		 2342
2343 /* Get the fb rev level */
3d71644c 2344 ha->fb_rev = RD_FB_CMD_REG(ha, reg);
abbd8870
AV		 2345
2346 if (ha->fb_rev == FPM_2300)
a157b101 2347 pci_clear_mwi(ha->pdev);
abbd8870
AV		 2348
2349 /* Deselect FPM registers. */
3d71644c
AV		 2350 WRT_REG_WORD(&reg->ctrl_status, 0x0);
2351 RD_REG_WORD(&reg->ctrl_status);
abbd8870
AV		 2352
2353 /* Release RISC module. */
3d71644c 2354 WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
abbd8870 2355 for (cnt = 0; cnt < 30000; cnt++) {
3d71644c 2356 if ((RD_REG_WORD(&reg->hccr) & HCCR_RISC_PAUSE) == 0)
abbd8870
AV		 2357 break;
2358
2359 udelay(10);
1da177e4 2360 }
1da177e4 2361
abbd8870
AV		 2362 spin_unlock_irqrestore(&ha->hardware_lock, flags);
2363 }
1da177e4 2364
abbd8870
AV		 2365 pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80);
2366
737faece 2367 pci_disable_rom(ha->pdev);
1da177e4 2368
abbd8870
AV		 2369 /* Get PCI bus information. */
2370 spin_lock_irqsave(&ha->hardware_lock, flags);
3d71644c 2371 ha->pci_attr = RD_REG_WORD(&reg->ctrl_status);
abbd8870
AV		 2372 spin_unlock_irqrestore(&ha->hardware_lock, flags);
2373
2374 return QLA_SUCCESS;
1da177e4
LT		 2375}
2376
0107109e
AV		 2377/**
2378 * qla24xx_pci_config() - Setup ISP24xx PCI configuration registers.
2db6228d 2379 * @vha: HA context
0107109e
AV		 2380 *
2381 * Returns 0 on success.
2382 */
2383int
e315cd28 2384qla24xx_pci_config(scsi_qla_host_t *vha)
0107109e 2385{
a157b101 2386 uint16_t w;
0107109e 2387 unsigned long flags = 0;
e315cd28 2388 struct qla_hw_data *ha = vha->hw;
0107109e 2389 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
0107109e
AV		 2390
2391 pci_set_master(ha->pdev);
af6177d8 2392 pci_try_set_mwi(ha->pdev);
0107109e
AV		 2393
2394 pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
a157b101 2395 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
0107109e
AV		 2396 w &= ~PCI_COMMAND_INTX_DISABLE;
2397 pci_write_config_word(ha->pdev, PCI_COMMAND, w);
2398
2399 pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80);
2400
2401 /* PCI-X -- adjust Maximum Memory Read Byte Count (2048). */
f85ec187
AV		 2402 if (pci_find_capability(ha->pdev, PCI_CAP_ID_PCIX))
2403 pcix_set_mmrbc(ha->pdev, 2048);
0107109e
AV		 2404
2405 /* PCIe -- adjust Maximum Read Request Size (2048). */
e67f1321 2406 if (pci_is_pcie(ha->pdev))
5ffd3a52 2407 pcie_set_readrq(ha->pdev, 4096);
0107109e 2408
737faece 2409 pci_disable_rom(ha->pdev);
0107109e 2410
44c10138 2411 ha->chip_revision = ha->pdev->revision;
a8488abe 2412
0107109e
AV		 2413 /* Get PCI bus information. */
2414 spin_lock_irqsave(&ha->hardware_lock, flags);
2415 ha->pci_attr = RD_REG_DWORD(&reg->ctrl_status);
2416 spin_unlock_irqrestore(&ha->hardware_lock, flags);
2417
2418 return QLA_SUCCESS;
2419}
2420
c3a2f0df
AV		 2421/**
2422 * qla25xx_pci_config() - Setup ISP25xx PCI configuration registers.
2db6228d 2423 * @vha: HA context
c3a2f0df
AV		 2424 *
2425 * Returns 0 on success.
2426 */
2427int
e315cd28 2428qla25xx_pci_config(scsi_qla_host_t *vha)
c3a2f0df
AV		 2429{
2430 uint16_t w;
e315cd28 2431 struct qla_hw_data *ha = vha->hw;
c3a2f0df
AV		 2432
2433 pci_set_master(ha->pdev);
2434 pci_try_set_mwi(ha->pdev);
2435
2436 pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
2437 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
2438 w &= ~PCI_COMMAND_INTX_DISABLE;
2439 pci_write_config_word(ha->pdev, PCI_COMMAND, w);
2440
2441 /* PCIe -- adjust Maximum Read Request Size (2048). */
e67f1321 2442 if (pci_is_pcie(ha->pdev))
5ffd3a52 2443 pcie_set_readrq(ha->pdev, 4096);
c3a2f0df 2444
737faece 2445 pci_disable_rom(ha->pdev);
c3a2f0df
AV		 2446
2447 ha->chip_revision = ha->pdev->revision;
2448
2449 return QLA_SUCCESS;
2450}
2451
1da177e4
LT		 2452/**
2453 * qla2x00_isp_firmware() - Choose firmware image.
2db6228d 2454 * @vha: HA context
1da177e4
LT		 2455 *
2456 * Returns 0 on success.
2457 */
2458static int
e315cd28 2459qla2x00_isp_firmware(scsi_qla_host_t *vha)
1da177e4
LT		 2460{
2461 int rval;
42e421b1
AV		 2462 uint16_t loop_id, topo, sw_cap;
2463 uint8_t domain, area, al_pa;
e315cd28 2464 struct qla_hw_data *ha = vha->hw;
1da177e4
LT		 2465
2466 /* Assume loading risc code */
fa2a1ce5 2467 rval = QLA_FUNCTION_FAILED;
1da177e4
LT		 2468
2469 if (ha->flags.disable_risc_code_load) {
7c3df132 2470 ql_log(ql_log_info, vha, 0x0079, "RISC CODE NOT loaded.\n");
1da177e4
LT		 2471
2472 /* Verify checksum of loaded RISC code. */
e315cd28 2473 rval = qla2x00_verify_checksum(vha, ha->fw_srisc_address);
42e421b1
AV		 2474 if (rval == QLA_SUCCESS) {
2475 /* And, verify we are not in ROM code. */
e315cd28 2476 rval = qla2x00_get_adapter_id(vha, &loop_id, &al_pa,
42e421b1
AV		 2477 &area, &domain, &topo, &sw_cap);
2478 }
1da177e4
LT		 2479 }
2480
7c3df132
SK		 2481 if (rval)
2482 ql_dbg(ql_dbg_init, vha, 0x007a,
2483 "**** Load RISC code ****.\n");
1da177e4
LT		 2484
2485 return (rval);
2486}
2487
2488/**
2489 * qla2x00_reset_chip() - Reset ISP chip.
2db6228d 2490 * @vha: HA context
1da177e4
LT		 2491 *
2492 * Returns 0 on success.
2493 */
abbd8870 2494void
e315cd28 2495qla2x00_reset_chip(scsi_qla_host_t *vha)
1da177e4
LT		 2496{
2497 unsigned long flags = 0;
e315cd28 2498 struct qla_hw_data *ha = vha->hw;
3d71644c 2499 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1da177e4 2500 uint32_t cnt;
1da177e4
LT		 2501 uint16_t cmd;
2502
85880801
AV		 2503 if (unlikely(pci_channel_offline(ha->pdev)))
2504 return;
2505
fd34f556 2506 ha->isp_ops->disable_intrs(ha);
1da177e4
LT		 2507
2508 spin_lock_irqsave(&ha->hardware_lock, flags);
2509
2510 /* Turn off master enable */
2511 cmd = 0;
2512 pci_read_config_word(ha->pdev, PCI_COMMAND, &cmd);
2513 cmd &= ~PCI_COMMAND_MASTER;
2514 pci_write_config_word(ha->pdev, PCI_COMMAND, cmd);
2515
2516 if (!IS_QLA2100(ha)) {
2517 /* Pause RISC. */
2518 WRT_REG_WORD(&reg->hccr, HCCR_PAUSE_RISC);
2519 if (IS_QLA2200(ha) || IS_QLA2300(ha)) {
2520 for (cnt = 0; cnt < 30000; cnt++) {
2521 if ((RD_REG_WORD(&reg->hccr) &
2522 HCCR_RISC_PAUSE) != 0)
2523 break;
2524 udelay(100);
2525 }
2526 } else {
2527 RD_REG_WORD(&reg->hccr); /* PCI Posting. */
2528 udelay(10);
2529 }
2530
2531 /* Select FPM registers. */
2532 WRT_REG_WORD(&reg->ctrl_status, 0x20);
2533 RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
2534
2535 /* FPM Soft Reset. */
2536 WRT_REG_WORD(&reg->fpm_diag_config, 0x100);
2537 RD_REG_WORD(&reg->fpm_diag_config); /* PCI Posting. */
2538
2539 /* Toggle Fpm Reset. */
2540 if (!IS_QLA2200(ha)) {
2541 WRT_REG_WORD(&reg->fpm_diag_config, 0x0);
2542 RD_REG_WORD(&reg->fpm_diag_config); /* PCI Posting. */
2543 }
2544
2545 /* Select frame buffer registers. */
2546 WRT_REG_WORD(&reg->ctrl_status, 0x10);
2547 RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
2548
2549 /* Reset frame buffer FIFOs. */
2550 if (IS_QLA2200(ha)) {
2551 WRT_FB_CMD_REG(ha, reg, 0xa000);
2552 RD_FB_CMD_REG(ha, reg); /* PCI Posting. */
2553 } else {
2554 WRT_FB_CMD_REG(ha, reg, 0x00fc);
2555
2556 /* Read back fb_cmd until zero or 3 seconds max */
2557 for (cnt = 0; cnt < 3000; cnt++) {
2558 if ((RD_FB_CMD_REG(ha, reg) & 0xff) == 0)
2559 break;
2560 udelay(100);
2561 }
2562 }
2563
2564 /* Select RISC module registers. */
2565 WRT_REG_WORD(&reg->ctrl_status, 0);
2566 RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
2567
2568 /* Reset RISC processor. */
2569 WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
2570 RD_REG_WORD(&reg->hccr); /* PCI Posting. */
2571
2572 /* Release RISC processor. */
2573 WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
2574 RD_REG_WORD(&reg->hccr); /* PCI Posting. */
2575 }
2576
2577 WRT_REG_WORD(&reg->hccr, HCCR_CLR_RISC_INT);
2578 WRT_REG_WORD(&reg->hccr, HCCR_CLR_HOST_INT);
2579
2580 /* Reset ISP chip. */
2581 WRT_REG_WORD(&reg->ctrl_status, CSR_ISP_SOFT_RESET);
2582
2583 /* Wait for RISC to recover from reset. */
2584 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
2585 /*
2586 * It is necessary to for a delay here since the card doesn't
2587 * respond to PCI reads during a reset. On some architectures
2588 * this will result in an MCA.
2589 */
2590 udelay(20);
2591 for (cnt = 30000; cnt; cnt--) {
2592 if ((RD_REG_WORD(&reg->ctrl_status) &
2593 CSR_ISP_SOFT_RESET) == 0)
2594 break;
2595 udelay(100);
2596 }
2597 } else
2598 udelay(10);
2599
2600 /* Reset RISC processor. */
2601 WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
2602
2603 WRT_REG_WORD(&reg->semaphore, 0);
2604
2605 /* Release RISC processor. */
2606 WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
2607 RD_REG_WORD(&reg->hccr); /* PCI Posting. */
2608
2609 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
2610 for (cnt = 0; cnt < 30000; cnt++) {
ffb39f03 2611 if (RD_MAILBOX_REG(ha, reg, 0) != MBS_BUSY)
1da177e4 2612 break;
1da177e4
LT		 2613
2614 udelay(100);
2615 }
2616 } else
2617 udelay(100);
2618
2619 /* Turn on master enable */
2620 cmd |= PCI_COMMAND_MASTER;
2621 pci_write_config_word(ha->pdev, PCI_COMMAND, cmd);
2622
2623 /* Disable RISC pause on FPM parity error. */
2624 if (!IS_QLA2100(ha)) {
2625 WRT_REG_WORD(&reg->hccr, HCCR_DISABLE_PARITY_PAUSE);
2626 RD_REG_WORD(&reg->hccr); /* PCI Posting. */
2627 }
2628
2629 spin_unlock_irqrestore(&ha->hardware_lock, flags);
2630}
2631
b1d46989
MI		 2632/**
2633 * qla81xx_reset_mpi() - Reset's MPI FW via Write MPI Register MBC.
2db6228d 2634 * @vha: HA context
b1d46989
MI		 2635 *
2636 * Returns 0 on success.
2637 */
fa492630 2638static int
b1d46989
MI		 2639qla81xx_reset_mpi(scsi_qla_host_t *vha)
2640{
2641 uint16_t mb[4] = {0x1010, 0, 1, 0};
2642
6246b8a1
GM		 2643 if (!IS_QLA81XX(vha->hw))
2644 return QLA_SUCCESS;
2645
b1d46989
MI		 2646 return qla81xx_write_mpi_register(vha, mb);
2647}
2648
0107109e 2649/**
88c26663 2650 * qla24xx_reset_risc() - Perform full reset of ISP24xx RISC.
2db6228d 2651 * @vha: HA context
0107109e
AV		 2652 *
2653 * Returns 0 on success.
2654 */
d14e72fb 2655static inline int
e315cd28 2656qla24xx_reset_risc(scsi_qla_host_t *vha)
0107109e
AV		 2657{
2658 unsigned long flags = 0;
e315cd28 2659 struct qla_hw_data *ha = vha->hw;
0107109e 2660 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
52c82823 2661 uint32_t cnt;
335a1cc9 2662 uint16_t wd;
b1d46989 2663 static int abts_cnt; /* ISP abort retry counts */
d14e72fb 2664 int rval = QLA_SUCCESS;
0107109e 2665
0107109e
AV		 2666 spin_lock_irqsave(&ha->hardware_lock, flags);
2667
2668 /* Reset RISC. */
2669 WRT_REG_DWORD(&reg->ctrl_status, CSRX_DMA_SHUTDOWN|MWB_4096_BYTES);
2670 for (cnt = 0; cnt < 30000; cnt++) {
2671 if ((RD_REG_DWORD(&reg->ctrl_status) & CSRX_DMA_ACTIVE) == 0)
2672 break;
2673
2674 udelay(10);
2675 }
2676
d14e72fb
HM		 2677 if (!(RD_REG_DWORD(&reg->ctrl_status) & CSRX_DMA_ACTIVE))
2678 set_bit(DMA_SHUTDOWN_CMPL, &ha->fw_dump_cap_flags);
2679
2680 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x017e,
2681 "HCCR: 0x%x, Control Status %x, DMA active status:0x%x\n",
2682 RD_REG_DWORD(&reg->hccr),
2683 RD_REG_DWORD(&reg->ctrl_status),
2684 (RD_REG_DWORD(&reg->ctrl_status) & CSRX_DMA_ACTIVE));
2685
0107109e
AV		 2686 WRT_REG_DWORD(&reg->ctrl_status,
2687 CSRX_ISP_SOFT_RESET|CSRX_DMA_SHUTDOWN|MWB_4096_BYTES);
335a1cc9 2688 pci_read_config_word(ha->pdev, PCI_COMMAND, &wd);
88c26663 2689
335a1cc9 2690 udelay(100);
d14e72fb 2691
88c26663 2692 /* Wait for firmware to complete NVRAM accesses. */
52c82823 2693 RD_REG_WORD(&reg->mailbox0);
d14e72fb
HM		 2694 for (cnt = 10000; RD_REG_WORD(&reg->mailbox0) != 0 &&
2695 rval == QLA_SUCCESS; cnt--) {
88c26663 2696 barrier();
d14e72fb
HM		 2697 if (cnt)
2698 udelay(5);
2699 else
2700 rval = QLA_FUNCTION_TIMEOUT;
88c26663
AV		 2701 }
2702
d14e72fb
HM		 2703 if (rval == QLA_SUCCESS)
2704 set_bit(ISP_MBX_RDY, &ha->fw_dump_cap_flags);
2705
2706 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x017f,
2707 "HCCR: 0x%x, MailBox0 Status 0x%x\n",
2708 RD_REG_DWORD(&reg->hccr),
2709 RD_REG_DWORD(&reg->mailbox0));
2710
335a1cc9 2711 /* Wait for soft-reset to complete. */
52c82823 2712 RD_REG_DWORD(&reg->ctrl_status);
200ffb15 2713 for (cnt = 0; cnt < 60; cnt++) {
0107109e 2714 barrier();
d14e72fb
HM		 2715 if ((RD_REG_DWORD(&reg->ctrl_status) &
2716 CSRX_ISP_SOFT_RESET) == 0)
2717 break;
2718
2719 udelay(5);
0107109e 2720 }
d14e72fb
HM		 2721 if (!(RD_REG_DWORD(&reg->ctrl_status) & CSRX_ISP_SOFT_RESET))
2722 set_bit(ISP_SOFT_RESET_CMPL, &ha->fw_dump_cap_flags);
2723
2724 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x015d,
2725 "HCCR: 0x%x, Soft Reset status: 0x%x\n",
2726 RD_REG_DWORD(&reg->hccr),
2727 RD_REG_DWORD(&reg->ctrl_status));
0107109e 2728
b1d46989
MI		 2729 /* If required, do an MPI FW reset now */
2730 if (test_and_clear_bit(MPI_RESET_NEEDED, &vha->dpc_flags)) {
2731 if (qla81xx_reset_mpi(vha) != QLA_SUCCESS) {
2732 if (++abts_cnt < 5) {
2733 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
2734 set_bit(MPI_RESET_NEEDED, &vha->dpc_flags);
2735 } else {
2736 /*
2737 * We exhausted the ISP abort retries. We have to
2738 * set the board offline.
2739 */
2740 abts_cnt = 0;
2741 vha->flags.online = 0;
2742 }
2743 }
2744 }
2745
0107109e
AV		 2746 WRT_REG_DWORD(&reg->hccr, HCCRX_SET_RISC_RESET);
2747 RD_REG_DWORD(&reg->hccr);
2748
2749 WRT_REG_DWORD(&reg->hccr, HCCRX_REL_RISC_PAUSE);
2750 RD_REG_DWORD(&reg->hccr);
2751
2752 WRT_REG_DWORD(&reg->hccr, HCCRX_CLR_RISC_RESET);
2753 RD_REG_DWORD(&reg->hccr);
2754
52c82823 2755 RD_REG_WORD(&reg->mailbox0);
200ffb15 2756 for (cnt = 60; RD_REG_WORD(&reg->mailbox0) != 0 &&
d14e72fb 2757 rval == QLA_SUCCESS; cnt--) {
0107109e 2758 barrier();
d14e72fb
HM		 2759 if (cnt)
2760 udelay(5);
2761 else
2762 rval = QLA_FUNCTION_TIMEOUT;
0107109e 2763 }
d14e72fb
HM		 2764 if (rval == QLA_SUCCESS)
2765 set_bit(RISC_RDY_AFT_RESET, &ha->fw_dump_cap_flags);
2766
2767 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x015e,
2768 "Host Risc 0x%x, mailbox0 0x%x\n",
2769 RD_REG_DWORD(&reg->hccr),
2770 RD_REG_WORD(&reg->mailbox0));
0107109e
AV		 2771
2772 spin_unlock_irqrestore(&ha->hardware_lock, flags);
124f85e6 2773
d14e72fb
HM		 2774 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x015f,
2775 "Driver in %s mode\n",
2776 IS_NOPOLLING_TYPE(ha) ? "Interrupt" : "Polling");
2777
124f85e6
AV		 2778 if (IS_NOPOLLING_TYPE(ha))
2779 ha->isp_ops->enable_intrs(ha);
d14e72fb
HM		 2780
2781 return rval;
0107109e
AV		 2782}
2783
4ea2c9c7
JC		 2784static void
2785qla25xx_read_risc_sema_reg(scsi_qla_host_t *vha, uint32_t *data)
2786{
2787 struct device_reg_24xx __iomem *reg = &vha->hw->iobase->isp24;
2788
2789 WRT_REG_DWORD(&reg->iobase_addr, RISC_REGISTER_BASE_OFFSET);
2790 *data = RD_REG_DWORD(&reg->iobase_window + RISC_REGISTER_WINDOW_OFFET);
2791
2792}
2793
2794static void
2795qla25xx_write_risc_sema_reg(scsi_qla_host_t *vha, uint32_t data)
2796{
2797 struct device_reg_24xx __iomem *reg = &vha->hw->iobase->isp24;
2798
2799 WRT_REG_DWORD(&reg->iobase_addr, RISC_REGISTER_BASE_OFFSET);
2800 WRT_REG_DWORD(&reg->iobase_window + RISC_REGISTER_WINDOW_OFFET, data);
2801}
2802
2803static void
2804qla25xx_manipulate_risc_semaphore(scsi_qla_host_t *vha)
2805{
4ea2c9c7
JC		 2806 uint32_t wd32 = 0;
2807 uint delta_msec = 100;
2808 uint elapsed_msec = 0;
2809 uint timeout_msec;
2810 ulong n;
2811
cc790764
JC		 2812 if (vha->hw->pdev->subsystem_device != 0x0175 &&
2813 vha->hw->pdev->subsystem_device != 0x0240)
4ea2c9c7
JC		 2814 return;
2815
8dd7e3a5
JC		 2816 WRT_REG_DWORD(&vha->hw->iobase->isp24.hccr, HCCRX_SET_RISC_PAUSE);
2817 udelay(100);
2818
4ea2c9c7
JC		 2819attempt:
2820 timeout_msec = TIMEOUT_SEMAPHORE;
2821 n = timeout_msec / delta_msec;
2822 while (n--) {
2823 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_SET);
2824 qla25xx_read_risc_sema_reg(vha, &wd32);
2825 if (wd32 & RISC_SEMAPHORE)
2826 break;
2827 msleep(delta_msec);
2828 elapsed_msec += delta_msec;
2829 if (elapsed_msec > TIMEOUT_TOTAL_ELAPSED)
2830 goto force;
2831 }
2832
2833 if (!(wd32 & RISC_SEMAPHORE))
2834 goto force;
2835
2836 if (!(wd32 & RISC_SEMAPHORE_FORCE))
2837 goto acquired;
2838
2839 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_CLR);
2840 timeout_msec = TIMEOUT_SEMAPHORE_FORCE;
2841 n = timeout_msec / delta_msec;
2842 while (n--) {
2843 qla25xx_read_risc_sema_reg(vha, &wd32);
2844 if (!(wd32 & RISC_SEMAPHORE_FORCE))
2845 break;
2846 msleep(delta_msec);
2847 elapsed_msec += delta_msec;
2848 if (elapsed_msec > TIMEOUT_TOTAL_ELAPSED)
2849 goto force;
2850 }
2851
2852 if (wd32 & RISC_SEMAPHORE_FORCE)
2853 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_FORCE_CLR);
2854
2855 goto attempt;
2856
2857force:
2858 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_FORCE_SET);
2859
2860acquired:
2861 return;
2862}
2863
88c26663
AV		 2864/**
2865 * qla24xx_reset_chip() - Reset ISP24xx chip.
2db6228d 2866 * @vha: HA context
88c26663
AV		 2867 *
2868 * Returns 0 on success.
2869 */
2870void
e315cd28 2871qla24xx_reset_chip(scsi_qla_host_t *vha)
88c26663 2872{
e315cd28 2873 struct qla_hw_data *ha = vha->hw;
85880801
AV		 2874
2875 if (pci_channel_offline(ha->pdev) &&
2876 ha->flags.pci_channel_io_perm_failure) {
2877 return;
2878 }
2879
fd34f556 2880 ha->isp_ops->disable_intrs(ha);
88c26663 2881
4ea2c9c7
JC		 2882 qla25xx_manipulate_risc_semaphore(vha);
2883
88c26663 2884 /* Perform RISC reset. */
e315cd28 2885 qla24xx_reset_risc(vha);
88c26663
AV		 2886}
2887
1da177e4
LT		 2888/**
2889 * qla2x00_chip_diag() - Test chip for proper operation.
2db6228d 2890 * @vha: HA context
1da177e4
LT		 2891 *
2892 * Returns 0 on success.
2893 */
abbd8870 2894int
e315cd28 2895qla2x00_chip_diag(scsi_qla_host_t *vha)
1da177e4
LT		 2896{
2897 int rval;
e315cd28 2898 struct qla_hw_data *ha = vha->hw;
3d71644c 2899 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1da177e4
LT		 2900 unsigned long flags = 0;
2901 uint16_t data;
2902 uint32_t cnt;
2903 uint16_t mb[5];
73208dfd 2904 struct req_que *req = ha->req_q_map[0];
1da177e4
LT		 2905
2906 /* Assume a failed state */
2907 rval = QLA_FUNCTION_FAILED;
2908
da4704d9
BVA		 2909 ql_dbg(ql_dbg_init, vha, 0x007b, "Testing device at %p.\n",
2910 &reg->flash_address);
1da177e4
LT		 2911
2912 spin_lock_irqsave(&ha->hardware_lock, flags);
2913
2914 /* Reset ISP chip. */
2915 WRT_REG_WORD(&reg->ctrl_status, CSR_ISP_SOFT_RESET);
2916
2917 /*
2918 * We need to have a delay here since the card will not respond while
2919 * in reset causing an MCA on some architectures.
2920 */
2921 udelay(20);
2922 data = qla2x00_debounce_register(&reg->ctrl_status);
2923 for (cnt = 6000000 ; cnt && (data & CSR_ISP_SOFT_RESET); cnt--) {
2924 udelay(5);
2925 data = RD_REG_WORD(&reg->ctrl_status);
2926 barrier();
2927 }
2928
2929 if (!cnt)
2930 goto chip_diag_failed;
2931
7c3df132
SK		 2932 ql_dbg(ql_dbg_init, vha, 0x007c,
2933 "Reset register cleared by chip reset.\n");
1da177e4
LT		 2934
2935 /* Reset RISC processor. */
2936 WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
2937 WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
2938
2939 /* Workaround for QLA2312 PCI parity error */
2940 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
2941 data = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 0));
2942 for (cnt = 6000000; cnt && (data == MBS_BUSY); cnt--) {
2943 udelay(5);
2944 data = RD_MAILBOX_REG(ha, reg, 0);
fa2a1ce5 2945 barrier();
1da177e4
LT		 2946 }
2947 } else
2948 udelay(10);
2949
2950 if (!cnt)
2951 goto chip_diag_failed;
2952
2953 /* Check product ID of chip */
5a68a1c2 2954 ql_dbg(ql_dbg_init, vha, 0x007d, "Checking product ID of chip.\n");
1da177e4
LT		 2955
2956 mb[1] = RD_MAILBOX_REG(ha, reg, 1);
2957 mb[2] = RD_MAILBOX_REG(ha, reg, 2);
2958 mb[3] = RD_MAILBOX_REG(ha, reg, 3);
2959 mb[4] = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 4));
2960 if (mb[1] != PROD_ID_1 || (mb[2] != PROD_ID_2 && mb[2] != PROD_ID_2a) ||
2961 mb[3] != PROD_ID_3) {
7c3df132
SK		 2962 ql_log(ql_log_warn, vha, 0x0062,
2963 "Wrong product ID = 0x%x,0x%x,0x%x.\n",
2964 mb[1], mb[2], mb[3]);
1da177e4
LT		 2965
2966 goto chip_diag_failed;
2967 }
2968 ha->product_id[0] = mb[1];
2969 ha->product_id[1] = mb[2];
2970 ha->product_id[2] = mb[3];
2971 ha->product_id[3] = mb[4];
2972
2973 /* Adjust fw RISC transfer size */
73208dfd 2974 if (req->length > 1024)
1da177e4
LT		 2975 ha->fw_transfer_size = REQUEST_ENTRY_SIZE * 1024;
2976 else
2977 ha->fw_transfer_size = REQUEST_ENTRY_SIZE *
73208dfd 2978 req->length;
1da177e4
LT		 2979
2980 if (IS_QLA2200(ha) &&
2981 RD_MAILBOX_REG(ha, reg, 7) == QLA2200A_RISC_ROM_VER) {
2982 /* Limit firmware transfer size with a 2200A */
7c3df132 2983 ql_dbg(ql_dbg_init, vha, 0x007e, "Found QLA2200A Chip.\n");
1da177e4 2984
ea5b6382 2985 ha->device_type |= DT_ISP2200A;
1da177e4
LT		 2986 ha->fw_transfer_size = 128;
2987 }
2988
2989 /* Wrap Incoming Mailboxes Test. */
2990 spin_unlock_irqrestore(&ha->hardware_lock, flags);
2991
7c3df132 2992 ql_dbg(ql_dbg_init, vha, 0x007f, "Checking mailboxes.\n");
e315cd28 2993 rval = qla2x00_mbx_reg_test(vha);
7c3df132
SK		 2994 if (rval)
2995 ql_log(ql_log_warn, vha, 0x0080,
2996 "Failed mailbox send register test.\n");
2997 else
1da177e4
LT		 2998 /* Flag a successful rval */
2999 rval = QLA_SUCCESS;
1da177e4
LT		 3000 spin_lock_irqsave(&ha->hardware_lock, flags);
3001
3002chip_diag_failed:
3003 if (rval)
7c3df132
SK		 3004 ql_log(ql_log_info, vha, 0x0081,
3005 "Chip diagnostics **** FAILED ****.\n");
1da177e4
LT		 3006
3007 spin_unlock_irqrestore(&ha->hardware_lock, flags);
3008
3009 return (rval);
3010}
3011
0107109e
AV		 3012/**
3013 * qla24xx_chip_diag() - Test ISP24xx for proper operation.
2db6228d 3014 * @vha: HA context
0107109e
AV		 3015 *
3016 * Returns 0 on success.
3017 */
3018int
e315cd28 3019qla24xx_chip_diag(scsi_qla_host_t *vha)
0107109e
AV		 3020{
3021 int rval;
e315cd28 3022 struct qla_hw_data *ha = vha->hw;
73208dfd 3023 struct req_que *req = ha->req_q_map[0];
0107109e 3024
7ec0effd 3025 if (IS_P3P_TYPE(ha))
a9083016
GM		 3026 return QLA_SUCCESS;
3027
73208dfd 3028 ha->fw_transfer_size = REQUEST_ENTRY_SIZE * req->length;
0107109e 3029
e315cd28 3030 rval = qla2x00_mbx_reg_test(vha);
0107109e 3031 if (rval) {
7c3df132
SK		 3032 ql_log(ql_log_warn, vha, 0x0082,
3033 "Failed mailbox send register test.\n");
0107109e
AV		 3034 } else {
3035 /* Flag a successful rval */
3036 rval = QLA_SUCCESS;
3037 }
3038
3039 return rval;
3040}
3041
ad0a0b01
QT		 3042static void
3043qla2x00_alloc_offload_mem(scsi_qla_host_t *vha)
0107109e 3044{
a7a167bf 3045 int rval;
df613b96
AV		 3046 dma_addr_t tc_dma;
3047 void *tc;
e315cd28 3048 struct qla_hw_data *ha = vha->hw;
a7a167bf 3049
ad0a0b01 3050 if (ha->eft) {
7c3df132 3051 ql_dbg(ql_dbg_init, vha, 0x00bd,
ad0a0b01
QT		 3052 "%s: Offload Mem is already allocated.\n",
3053 __func__);
a7a167bf
AV		 3054 return;
3055 }
d4e3e04d 3056
ad0a0b01 3057 if (IS_FWI2_CAPABLE(ha)) {
df613b96 3058 /* Allocate memory for Fibre Channel Event Buffer. */
f73cb695
CD		 3059 if (!IS_QLA25XX(ha) && !IS_QLA81XX(ha) && !IS_QLA83XX(ha) &&
3060 !IS_QLA27XX(ha))
436a7b11 3061 goto try_eft;
df613b96 3062
f73cb695
CD		 3063 if (ha->fce)
3064 dma_free_coherent(&ha->pdev->dev,
3065 FCE_SIZE, ha->fce, ha->fce_dma);
3066
3067 /* Allocate memory for Fibre Channel Event Buffer. */
0ea85b50
JP		 3068 tc = dma_zalloc_coherent(&ha->pdev->dev, FCE_SIZE, &tc_dma,
3069 GFP_KERNEL);
df613b96 3070 if (!tc) {
7c3df132
SK		 3071 ql_log(ql_log_warn, vha, 0x00be,
3072 "Unable to allocate (%d KB) for FCE.\n",
3073 FCE_SIZE / 1024);
17d98630 3074 goto try_eft;
df613b96
AV		 3075 }
3076
e315cd28 3077 rval = qla2x00_enable_fce_trace(vha, tc_dma, FCE_NUM_BUFFERS,
df613b96
AV		 3078 ha->fce_mb, &ha->fce_bufs);
3079 if (rval) {
7c3df132
SK		 3080 ql_log(ql_log_warn, vha, 0x00bf,
3081 "Unable to initialize FCE (%d).\n", rval);
df613b96
AV		 3082 dma_free_coherent(&ha->pdev->dev, FCE_SIZE, tc,
3083 tc_dma);
3084 ha->flags.fce_enabled = 0;
17d98630 3085 goto try_eft;
df613b96 3086 }
cfb0919c 3087 ql_dbg(ql_dbg_init, vha, 0x00c0,
7c3df132 3088 "Allocate (%d KB) for FCE...\n", FCE_SIZE / 1024);
df613b96 3089
df613b96
AV		 3090 ha->flags.fce_enabled = 1;
3091 ha->fce_dma = tc_dma;
3092 ha->fce = tc;
f73cb695 3093
436a7b11 3094try_eft:
f73cb695
CD		 3095 if (ha->eft)
3096 dma_free_coherent(&ha->pdev->dev,
3097 EFT_SIZE, ha->eft, ha->eft_dma);
3098
436a7b11 3099 /* Allocate memory for Extended Trace Buffer. */
0ea85b50
JP		 3100 tc = dma_zalloc_coherent(&ha->pdev->dev, EFT_SIZE, &tc_dma,
3101 GFP_KERNEL);
436a7b11 3102 if (!tc) {
7c3df132
SK		 3103 ql_log(ql_log_warn, vha, 0x00c1,
3104 "Unable to allocate (%d KB) for EFT.\n",
3105 EFT_SIZE / 1024);
ad0a0b01 3106 goto eft_err;
436a7b11
AV		 3107 }
3108
e315cd28 3109 rval = qla2x00_enable_eft_trace(vha, tc_dma, EFT_NUM_BUFFERS);
436a7b11 3110 if (rval) {
7c3df132
SK		 3111 ql_log(ql_log_warn, vha, 0x00c2,
3112 "Unable to initialize EFT (%d).\n", rval);
436a7b11
AV		 3113 dma_free_coherent(&ha->pdev->dev, EFT_SIZE, tc,
3114 tc_dma);
ad0a0b01 3115 goto eft_err;
436a7b11 3116 }
cfb0919c 3117 ql_dbg(ql_dbg_init, vha, 0x00c3,
7c3df132 3118 "Allocated (%d KB) EFT ...\n", EFT_SIZE / 1024);
436a7b11 3119
436a7b11
AV		 3120 ha->eft_dma = tc_dma;
3121 ha->eft = tc;
d4e3e04d 3122 }
f73cb695 3123
ad0a0b01
QT		 3124eft_err:
3125 return;
3126}
3127
3128void
3129qla2x00_alloc_fw_dump(scsi_qla_host_t *vha)
3130{
3131 uint32_t dump_size, fixed_size, mem_size, req_q_size, rsp_q_size,
3132 eft_size, fce_size, mq_size;
3133 struct qla_hw_data *ha = vha->hw;
3134 struct req_que *req = ha->req_q_map[0];
3135 struct rsp_que *rsp = ha->rsp_q_map[0];
3136 struct qla2xxx_fw_dump *fw_dump;
3137
3138 dump_size = fixed_size = mem_size = eft_size = fce_size = mq_size = 0;
3139 req_q_size = rsp_q_size = 0;
3140
3141 if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
3142 fixed_size = sizeof(struct qla2100_fw_dump);
3143 } else if (IS_QLA23XX(ha)) {
3144 fixed_size = offsetof(struct qla2300_fw_dump, data_ram);
3145 mem_size = (ha->fw_memory_size - 0x11000 + 1) *
3146 sizeof(uint16_t);
3147 } else if (IS_FWI2_CAPABLE(ha)) {
3148 if (IS_QLA83XX(ha) || IS_QLA27XX(ha))
3149 fixed_size = offsetof(struct qla83xx_fw_dump, ext_mem);
3150 else if (IS_QLA81XX(ha))
3151 fixed_size = offsetof(struct qla81xx_fw_dump, ext_mem);
3152 else if (IS_QLA25XX(ha))
3153 fixed_size = offsetof(struct qla25xx_fw_dump, ext_mem);
3154 else
3155 fixed_size = offsetof(struct qla24xx_fw_dump, ext_mem);
3156
3157 mem_size = (ha->fw_memory_size - 0x100000 + 1) *
3158 sizeof(uint32_t);
3159 if (ha->mqenable) {
3160 if (!IS_QLA83XX(ha) && !IS_QLA27XX(ha))
3161 mq_size = sizeof(struct qla2xxx_mq_chain);
3162 /*
3163 * Allocate maximum buffer size for all queues.
3164 * Resizing must be done at end-of-dump processing.
3165 */
3166 mq_size += ha->max_req_queues *
3167 (req->length * sizeof(request_t));
3168 mq_size += ha->max_rsp_queues *
3169 (rsp->length * sizeof(response_t));
3170 }
3171 if (ha->tgt.atio_ring)
3172 mq_size += ha->tgt.atio_q_length * sizeof(request_t);
3173 /* Allocate memory for Fibre Channel Event Buffer. */
3174 if (!IS_QLA25XX(ha) && !IS_QLA81XX(ha) && !IS_QLA83XX(ha) &&
3175 !IS_QLA27XX(ha))
3176 goto try_eft;
3177
3178 fce_size = sizeof(struct qla2xxx_fce_chain) + FCE_SIZE;
3179try_eft:
3180 ql_dbg(ql_dbg_init, vha, 0x00c3,
3181 "Allocated (%d KB) EFT ...\n", EFT_SIZE / 1024);
3182 eft_size = EFT_SIZE;
3183 }
3184
f73cb695
CD		 3185 if (IS_QLA27XX(ha)) {
3186 if (!ha->fw_dump_template) {
3187 ql_log(ql_log_warn, vha, 0x00ba,
3188 "Failed missing fwdump template\n");
3189 return;
3190 }
3191 dump_size = qla27xx_fwdt_calculate_dump_size(vha);
3192 ql_dbg(ql_dbg_init, vha, 0x00fa,
3193 "-> allocating fwdump (%x bytes)...\n", dump_size);
3194 goto allocate;
3195 }
3196
73208dfd
AC		 3197 req_q_size = req->length * sizeof(request_t);
3198 rsp_q_size = rsp->length * sizeof(response_t);
a7a167bf 3199 dump_size = offsetof(struct qla2xxx_fw_dump, isp);
2afa19a9 3200 dump_size += fixed_size + mem_size + req_q_size + rsp_q_size + eft_size;
bb99de67
AV		 3201 ha->chain_offset = dump_size;
3202 dump_size += mq_size + fce_size;
d4e3e04d 3203
b945e777
QT		 3204 if (ha->exchoffld_buf)
3205 dump_size += sizeof(struct qla2xxx_offld_chain) +
3206 ha->exchoffld_size;
3207 if (ha->exlogin_buf)
3208 dump_size += sizeof(struct qla2xxx_offld_chain) +
3209 ha->exlogin_size;
3210
f73cb695 3211allocate:
ad0a0b01
QT		 3212 if (!ha->fw_dump_len || dump_size != ha->fw_dump_len) {
3213 fw_dump = vmalloc(dump_size);
3214 if (!fw_dump) {
3215 ql_log(ql_log_warn, vha, 0x00c4,
3216 "Unable to allocate (%d KB) for firmware dump.\n",
3217 dump_size / 1024);
3218 } else {
3219 if (ha->fw_dump)
3220 vfree(ha->fw_dump);
3221 ha->fw_dump = fw_dump;
3222
3223 ha->fw_dump_len = dump_size;
3224 ql_dbg(ql_dbg_init, vha, 0x00c5,
3225 "Allocated (%d KB) for firmware dump.\n",
3226 dump_size / 1024);
3227
3228 if (IS_QLA27XX(ha))
3229 return;
3230
3231 ha->fw_dump->signature[0] = 'Q';
3232 ha->fw_dump->signature[1] = 'L';
3233 ha->fw_dump->signature[2] = 'G';
3234 ha->fw_dump->signature[3] = 'C';
3235 ha->fw_dump->version = htonl(1);
3236
3237 ha->fw_dump->fixed_size = htonl(fixed_size);
3238 ha->fw_dump->mem_size = htonl(mem_size);
3239 ha->fw_dump->req_q_size = htonl(req_q_size);
3240 ha->fw_dump->rsp_q_size = htonl(rsp_q_size);
3241
3242 ha->fw_dump->eft_size = htonl(eft_size);
3243 ha->fw_dump->eft_addr_l = htonl(LSD(ha->eft_dma));
3244 ha->fw_dump->eft_addr_h = htonl(MSD(ha->eft_dma));
3245
3246 ha->fw_dump->header_size =
3247 htonl(offsetof(struct qla2xxx_fw_dump, isp));
a7a167bf 3248 }
a7a167bf 3249 }
0107109e
AV		 3250}
3251
18e7555a
AV		 3252static int
3253qla81xx_mpi_sync(scsi_qla_host_t *vha)
3254{
3255#define MPS_MASK 0xe0
3256 int rval;
3257 uint16_t dc;
3258 uint32_t dw;
18e7555a
AV		 3259
3260 if (!IS_QLA81XX(vha->hw))
3261 return QLA_SUCCESS;
3262
3263 rval = qla2x00_write_ram_word(vha, 0x7c00, 1);
3264 if (rval != QLA_SUCCESS) {
7c3df132
SK		 3265 ql_log(ql_log_warn, vha, 0x0105,
3266 "Unable to acquire semaphore.\n");
18e7555a
AV		 3267 goto done;
3268 }
3269
3270 pci_read_config_word(vha->hw->pdev, 0x54, &dc);
3271 rval = qla2x00_read_ram_word(vha, 0x7a15, &dw);
3272 if (rval != QLA_SUCCESS) {
7c3df132 3273 ql_log(ql_log_warn, vha, 0x0067, "Unable to read sync.\n");
18e7555a
AV		 3274 goto done_release;
3275 }
3276
3277 dc &= MPS_MASK;
3278 if (dc == (dw & MPS_MASK))
3279 goto done_release;
3280
3281 dw &= ~MPS_MASK;
3282 dw |= dc;
3283 rval = qla2x00_write_ram_word(vha, 0x7a15, dw);
3284 if (rval != QLA_SUCCESS) {
7c3df132 3285 ql_log(ql_log_warn, vha, 0x0114, "Unable to gain sync.\n");
18e7555a
AV		 3286 }
3287
3288done_release:
3289 rval = qla2x00_write_ram_word(vha, 0x7c00, 0);
3290 if (rval != QLA_SUCCESS) {
7c3df132
SK		 3291 ql_log(ql_log_warn, vha, 0x006d,
3292 "Unable to release semaphore.\n");
18e7555a
AV		 3293 }
3294
3295done:
3296 return rval;
3297}
3298
8d93f550
CD		 3299int
3300qla2x00_alloc_outstanding_cmds(struct qla_hw_data *ha, struct req_que *req)
3301{
3302 /* Don't try to reallocate the array */
3303 if (req->outstanding_cmds)
3304 return QLA_SUCCESS;
3305
d7459527 3306 if (!IS_FWI2_CAPABLE(ha))
8d93f550
CD		 3307 req->num_outstanding_cmds = DEFAULT_OUTSTANDING_COMMANDS;
3308 else {
03e8c680
QT		 3309 if (ha->cur_fw_xcb_count <= ha->cur_fw_iocb_count)
3310 req->num_outstanding_cmds = ha->cur_fw_xcb_count;
8d93f550 3311 else
03e8c680 3312 req->num_outstanding_cmds = ha->cur_fw_iocb_count;
8d93f550
CD		 3313 }
3314
6396bb22
KC		 3315 req->outstanding_cmds = kcalloc(req->num_outstanding_cmds,
3316 sizeof(srb_t *),
3317 GFP_KERNEL);
8d93f550
CD		 3318
3319 if (!req->outstanding_cmds) {
3320 /*
3321 * Try to allocate a minimal size just so we can get through
3322 * initialization.
3323 */
3324 req->num_outstanding_cmds = MIN_OUTSTANDING_COMMANDS;
6396bb22
KC		 3325 req->outstanding_cmds = kcalloc(req->num_outstanding_cmds,
3326 sizeof(srb_t *),
3327 GFP_KERNEL);
8d93f550
CD		 3328
3329 if (!req->outstanding_cmds) {
3330 ql_log(ql_log_fatal, NULL, 0x0126,
3331 "Failed to allocate memory for "
3332 "outstanding_cmds for req_que %p.\n", req);
3333 req->num_outstanding_cmds = 0;
3334 return QLA_FUNCTION_FAILED;
3335 }
3336 }
3337
3338 return QLA_SUCCESS;
3339}
3340
e4e3a2ce
QT		 3341#define PRINT_FIELD(_field, _flag, _str) { \
3342 if (a0->_field & _flag) {\
3343 if (p) {\
3344 strcat(ptr, "|");\
3345 ptr++;\
3346 leftover--;\
3347 } \
3348 len = snprintf(ptr, leftover, "%s", _str); \
3349 p = 1;\
3350 leftover -= len;\
3351 ptr += len; \
3352 } \
3353}
3354
3355static void qla2xxx_print_sfp_info(struct scsi_qla_host *vha)
3356{
3357#define STR_LEN 64
3358 struct sff_8247_a0 *a0 = (struct sff_8247_a0 *)vha->hw->sfp_data;
3359 u8 str[STR_LEN], *ptr, p;
3360 int leftover, len;
3361
3362 memset(str, 0, STR_LEN);
3363 snprintf(str, SFF_VEN_NAME_LEN+1, a0->vendor_name);
3364 ql_dbg(ql_dbg_init, vha, 0x015a,
3365 "SFP MFG Name: %s\n", str);
3366
3367 memset(str, 0, STR_LEN);
3368 snprintf(str, SFF_PART_NAME_LEN+1, a0->vendor_pn);
3369 ql_dbg(ql_dbg_init, vha, 0x015c,
3370 "SFP Part Name: %s\n", str);
3371
3372 /* media */
3373 memset(str, 0, STR_LEN);
3374 ptr = str;
3375 leftover = STR_LEN;
3376 p = len = 0;
3377 PRINT_FIELD(fc_med_cc9, FC_MED_TW, "Twin AX");
3378 PRINT_FIELD(fc_med_cc9, FC_MED_TP, "Twisted Pair");
3379 PRINT_FIELD(fc_med_cc9, FC_MED_MI, "Min Coax");
3380 PRINT_FIELD(fc_med_cc9, FC_MED_TV, "Video Coax");
3381 PRINT_FIELD(fc_med_cc9, FC_MED_M6, "MultiMode 62.5um");
3382 PRINT_FIELD(fc_med_cc9, FC_MED_M5, "MultiMode 50um");
3383 PRINT_FIELD(fc_med_cc9, FC_MED_SM, "SingleMode");
3384 ql_dbg(ql_dbg_init, vha, 0x0160,
3385 "SFP Media: %s\n", str);
3386
3387 /* link length */
3388 memset(str, 0, STR_LEN);
3389 ptr = str;
3390 leftover = STR_LEN;
3391 p = len = 0;
3392 PRINT_FIELD(fc_ll_cc7, FC_LL_VL, "Very Long");
3393 PRINT_FIELD(fc_ll_cc7, FC_LL_S, "Short");
3394 PRINT_FIELD(fc_ll_cc7, FC_LL_I, "Intermediate");
3395 PRINT_FIELD(fc_ll_cc7, FC_LL_L, "Long");
3396 PRINT_FIELD(fc_ll_cc7, FC_LL_M, "Medium");
3397 ql_dbg(ql_dbg_init, vha, 0x0196,
3398 "SFP Link Length: %s\n", str);
3399
3400 memset(str, 0, STR_LEN);
3401 ptr = str;
3402 leftover = STR_LEN;
3403 p = len = 0;
3404 PRINT_FIELD(fc_ll_cc7, FC_LL_SA, "Short Wave (SA)");
3405 PRINT_FIELD(fc_ll_cc7, FC_LL_LC, "Long Wave(LC)");
3406 PRINT_FIELD(fc_tec_cc8, FC_TEC_SN, "Short Wave (SN)");
3407 PRINT_FIELD(fc_tec_cc8, FC_TEC_SL, "Short Wave (SL)");
3408 PRINT_FIELD(fc_tec_cc8, FC_TEC_LL, "Long Wave (LL)");
3409 ql_dbg(ql_dbg_init, vha, 0x016e,
3410 "SFP FC Link Tech: %s\n", str);
3411
3412 if (a0->length_km)
3413 ql_dbg(ql_dbg_init, vha, 0x016f,
3414 "SFP Distant: %d km\n", a0->length_km);
3415 if (a0->length_100m)
3416 ql_dbg(ql_dbg_init, vha, 0x0170,
3417 "SFP Distant: %d m\n", a0->length_100m*100);
3418 if (a0->length_50um_10m)
3419 ql_dbg(ql_dbg_init, vha, 0x0189,
3420 "SFP Distant (WL=50um): %d m\n", a0->length_50um_10m * 10);
3421 if (a0->length_62um_10m)
3422 ql_dbg(ql_dbg_init, vha, 0x018a,
3423 "SFP Distant (WL=62.5um): %d m\n", a0->length_62um_10m * 10);
3424 if (a0->length_om4_10m)
3425 ql_dbg(ql_dbg_init, vha, 0x0194,
3426 "SFP Distant (OM4): %d m\n", a0->length_om4_10m * 10);
3427 if (a0->length_om3_10m)
3428 ql_dbg(ql_dbg_init, vha, 0x0195,
3429 "SFP Distant (OM3): %d m\n", a0->length_om3_10m * 10);
3430}
3431
3432
3433/*
3434 * Return Code:
3435 * QLA_SUCCESS: no action
3436 * QLA_INTERFACE_ERROR: SFP is not there.
3437 * QLA_FUNCTION_FAILED: detected New SFP
3438 */
3439int
3440qla24xx_detect_sfp(scsi_qla_host_t *vha)
3441{
3442 int rc = QLA_SUCCESS;
3443 struct sff_8247_a0 *a;
3444 struct qla_hw_data *ha = vha->hw;
3445
3446 if (!AUTO_DETECT_SFP_SUPPORT(vha))
3447 goto out;
3448
3449 rc = qla2x00_read_sfp_dev(vha, NULL, 0);
3450 if (rc)
3451 goto out;
3452
3453 a = (struct sff_8247_a0 *)vha->hw->sfp_data;
3454 qla2xxx_print_sfp_info(vha);
3455
3456 if (a->fc_ll_cc7 & FC_LL_VL || a->fc_ll_cc7 & FC_LL_L) {
3457 /* long range */
3458 ha->flags.detected_lr_sfp = 1;
3459
3460 if (a->length_km > 5 || a->length_100m > 50)
3461 ha->long_range_distance = LR_DISTANCE_10K;
3462 else
3463 ha->long_range_distance = LR_DISTANCE_5K;
3464
3465 if (ha->flags.detected_lr_sfp != ha->flags.using_lr_setting)
3466 ql_dbg(ql_dbg_async, vha, 0x507b,
3467 "Detected Long Range SFP.\n");
3468 } else {
3469 /* short range */
3470 ha->flags.detected_lr_sfp = 0;
3471 if (ha->flags.using_lr_setting)
3472 ql_dbg(ql_dbg_async, vha, 0x5084,
3473 "Detected Short Range SFP.\n");
3474 }
3475
3476 if (!vha->flags.init_done)
3477 rc = QLA_SUCCESS;
3478out:
3479 return rc;
3480}
3481
1da177e4
LT		 3482/**
3483 * qla2x00_setup_chip() - Load and start RISC firmware.
2db6228d 3484 * @vha: HA context
1da177e4
LT		 3485 *
3486 * Returns 0 on success.
3487 */
3488static int
e315cd28 3489qla2x00_setup_chip(scsi_qla_host_t *vha)
1da177e4 3490{
0107109e
AV		 3491 int rval;
3492 uint32_t srisc_address = 0;
e315cd28 3493 struct qla_hw_data *ha = vha->hw;
3db0652e
AV		 3494 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
3495 unsigned long flags;
dda772e8 3496 uint16_t fw_major_version;
3db0652e 3497
7ec0effd 3498 if (IS_P3P_TYPE(ha)) {
a9083016 3499 rval = ha->isp_ops->load_risc(vha, &srisc_address);
14e303d9
AV		 3500 if (rval == QLA_SUCCESS) {
3501 qla2x00_stop_firmware(vha);
a9083016 3502 goto enable_82xx_npiv;
14e303d9 3503 } else
b963752f 3504 goto failed;
a9083016
GM		 3505 }
3506
3db0652e
AV		 3507 if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) {
3508 /* Disable SRAM, Instruction RAM and GP RAM parity. */
3509 spin_lock_irqsave(&ha->hardware_lock, flags);
3510 WRT_REG_WORD(&reg->hccr, (HCCR_ENABLE_PARITY + 0x0));
3511 RD_REG_WORD(&reg->hccr);
3512 spin_unlock_irqrestore(&ha->hardware_lock, flags);
3513 }
1da177e4 3514
18e7555a
AV		 3515 qla81xx_mpi_sync(vha);
3516
1da177e4 3517 /* Load firmware sequences */
e315cd28 3518 rval = ha->isp_ops->load_risc(vha, &srisc_address);
0107109e 3519 if (rval == QLA_SUCCESS) {
7c3df132
SK		 3520 ql_dbg(ql_dbg_init, vha, 0x00c9,
3521 "Verifying Checksum of loaded RISC code.\n");
1da177e4 3522
e315cd28 3523 rval = qla2x00_verify_checksum(vha, srisc_address);
1da177e4
LT		 3524 if (rval == QLA_SUCCESS) {
3525 /* Start firmware execution. */
7c3df132
SK		 3526 ql_dbg(ql_dbg_init, vha, 0x00ca,
3527 "Starting firmware.\n");
1da177e4 3528
b0d6cabd
HM		 3529 if (ql2xexlogins)
3530 ha->flags.exlogins_enabled = 1;
3531
99e1b683 3532 if (qla_is_exch_offld_enabled(vha))
2f56a7f1
HM		 3533 ha->flags.exchoffld_enabled = 1;
3534
e315cd28 3535 rval = qla2x00_execute_fw(vha, srisc_address);
1da177e4 3536 /* Retrieve firmware information. */
dda772e8 3537 if (rval == QLA_SUCCESS) {
e4e3a2ce
QT		 3538 qla24xx_detect_sfp(vha);
3539
b0d6cabd
HM		 3540 rval = qla2x00_set_exlogins_buffer(vha);
3541 if (rval != QLA_SUCCESS)
3542 goto failed;
3543
2f56a7f1
HM		 3544 rval = qla2x00_set_exchoffld_buffer(vha);
3545 if (rval != QLA_SUCCESS)
3546 goto failed;
3547
a9083016 3548enable_82xx_npiv:
dda772e8 3549 fw_major_version = ha->fw_major_version;
7ec0effd 3550 if (IS_P3P_TYPE(ha))
3173167f 3551 qla82xx_check_md_needed(vha);
6246b8a1
GM		 3552 else
3553 rval = qla2x00_get_fw_version(vha);
ca9e9c3e
AV		 3554 if (rval != QLA_SUCCESS)
3555 goto failed;
2c3dfe3f 3556 ha->flags.npiv_supported = 0;
e315cd28 3557 if (IS_QLA2XXX_MIDTYPE(ha) &&
946fb891 3558 (ha->fw_attributes & BIT_2)) {
2c3dfe3f 3559 ha->flags.npiv_supported = 1;
4d0ea247
SJ		 3560 if ((!ha->max_npiv_vports) ||
3561 ((ha->max_npiv_vports + 1) %
eb66dc60 3562 MIN_MULTI_ID_FABRIC))
4d0ea247 3563 ha->max_npiv_vports =
eb66dc60 3564 MIN_MULTI_ID_FABRIC - 1;
4d0ea247 3565 }
03e8c680 3566 qla2x00_get_resource_cnts(vha);
d743de66 3567
8d93f550
CD		 3568 /*
3569 * Allocate the array of outstanding commands
3570 * now that we know the firmware resources.
3571 */
3572 rval = qla2x00_alloc_outstanding_cmds(ha,
3573 vha->req);
3574 if (rval != QLA_SUCCESS)
3575 goto failed;
3576
ad0a0b01
QT		 3577 if (!fw_major_version && !(IS_P3P_TYPE(ha)))
3578 qla2x00_alloc_offload_mem(vha);
3579
3580 if (ql2xallocfwdump && !(IS_P3P_TYPE(ha)))
08de2844 3581 qla2x00_alloc_fw_dump(vha);
ad0a0b01 3582
3b6e5b9d
CD		 3583 } else {
3584 goto failed;
1da177e4
LT		 3585 }
3586 } else {
7c3df132
SK		 3587 ql_log(ql_log_fatal, vha, 0x00cd,
3588 "ISP Firmware failed checksum.\n");
3589 goto failed;
1da177e4 3590 }
c74d88a4
AV		 3591 } else
3592 goto failed;
1da177e4 3593
3db0652e
AV		 3594 if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) {
3595 /* Enable proper parity. */
3596 spin_lock_irqsave(&ha->hardware_lock, flags);
3597 if (IS_QLA2300(ha))
3598 /* SRAM parity */
3599 WRT_REG_WORD(&reg->hccr, HCCR_ENABLE_PARITY + 0x1);
3600 else
3601 /* SRAM, Instruction RAM and GP RAM parity */
3602 WRT_REG_WORD(&reg->hccr, HCCR_ENABLE_PARITY + 0x7);
3603 RD_REG_WORD(&reg->hccr);
3604 spin_unlock_irqrestore(&ha->hardware_lock, flags);
3605 }
3606
f3982d89
CD		 3607 if (IS_QLA27XX(ha))
3608 ha->flags.fac_supported = 1;
3609 else if (rval == QLA_SUCCESS && IS_FAC_REQUIRED(ha)) {
1d2874de
JC		 3610 uint32_t size;
3611
3612 rval = qla81xx_fac_get_sector_size(vha, &size);
3613 if (rval == QLA_SUCCESS) {
3614 ha->flags.fac_supported = 1;
3615 ha->fdt_block_size = size << 2;
3616 } else {
7c3df132 3617 ql_log(ql_log_warn, vha, 0x00ce,
1d2874de
JC		 3618 "Unsupported FAC firmware (%d.%02d.%02d).\n",
3619 ha->fw_major_version, ha->fw_minor_version,
3620 ha->fw_subminor_version);
1ca60e3b 3621
f73cb695 3622 if (IS_QLA83XX(ha) || IS_QLA27XX(ha)) {
6246b8a1
GM		 3623 ha->flags.fac_supported = 0;
3624 rval = QLA_SUCCESS;
3625 }
1d2874de
JC		 3626 }
3627 }
ca9e9c3e 3628failed:
1da177e4 3629 if (rval) {
7c3df132
SK		 3630 ql_log(ql_log_fatal, vha, 0x00cf,
3631 "Setup chip ****FAILED****.\n");
1da177e4
LT		 3632 }
3633
3634 return (rval);
3635}
3636
3637/**
3638 * qla2x00_init_response_q_entries() - Initializes response queue entries.
2db6228d 3639 * @rsp: response queue
1da177e4
LT		 3640 *
3641 * Beginning of request ring has initialization control block already built
3642 * by nvram config routine.
3643 *
3644 * Returns 0 on success.
3645 */
73208dfd
AC		 3646void
3647qla2x00_init_response_q_entries(struct rsp_que *rsp)
1da177e4
LT		 3648{
3649 uint16_t cnt;
3650 response_t *pkt;
3651
2afa19a9
AC		 3652 rsp->ring_ptr = rsp->ring;
3653 rsp->ring_index = 0;
3654 rsp->status_srb = NULL;
e315cd28
AC		 3655 pkt = rsp->ring_ptr;
3656 for (cnt = 0; cnt < rsp->length; cnt++) {
1da177e4
LT		 3657 pkt->signature = RESPONSE_PROCESSED;
3658 pkt++;
3659 }
1da177e4
LT		 3660}
3661
3662/**
3663 * qla2x00_update_fw_options() - Read and process firmware options.
2db6228d 3664 * @vha: HA context
1da177e4
LT		 3665 *
3666 * Returns 0 on success.
3667 */
abbd8870 3668void
e315cd28 3669qla2x00_update_fw_options(scsi_qla_host_t *vha)
1da177e4
LT		 3670{
3671 uint16_t swing, emphasis, tx_sens, rx_sens;
e315cd28 3672 struct qla_hw_data *ha = vha->hw;
1da177e4
LT		 3673
3674 memset(ha->fw_options, 0, sizeof(ha->fw_options));
e315cd28 3675 qla2x00_get_fw_options(vha, ha->fw_options);
1da177e4
LT		 3676
3677 if (IS_QLA2100(ha) || IS_QLA2200(ha))
3678 return;
3679
3680 /* Serial Link options. */
7c3df132
SK		 3681 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x0115,
3682 "Serial link options.\n");
3683 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0109,
3684 (uint8_t *)&ha->fw_seriallink_options,
3685 sizeof(ha->fw_seriallink_options));
1da177e4
LT		 3686
3687 ha->fw_options[1] &= ~FO1_SET_EMPHASIS_SWING;
3688 if (ha->fw_seriallink_options[3] & BIT_2) {
3689 ha->fw_options[1] |= FO1_SET_EMPHASIS_SWING;
3690
3691 /* 1G settings */
3692 swing = ha->fw_seriallink_options[2] & (BIT_2 | BIT_1 | BIT_0);
3693 emphasis = (ha->fw_seriallink_options[2] &
3694 (BIT_4 | BIT_3)) >> 3;
3695 tx_sens = ha->fw_seriallink_options[0] &
fa2a1ce5 3696 (BIT_3 | BIT_2 | BIT_1 | BIT_0);
1da177e4
LT		 3697 rx_sens = (ha->fw_seriallink_options[0] &
3698 (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4;
3699 ha->fw_options[10] = (emphasis << 14) | (swing << 8);
3700 if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
3701 if (rx_sens == 0x0)
3702 rx_sens = 0x3;
3703 ha->fw_options[10] |= (tx_sens << 4) | rx_sens;
3704 } else if (IS_QLA2322(ha) || IS_QLA6322(ha))
3705 ha->fw_options[10] |= BIT_5 |
3706 ((rx_sens & (BIT_1 | BIT_0)) << 2) |
3707 (tx_sens & (BIT_1 | BIT_0));
3708
3709 /* 2G settings */
3710 swing = (ha->fw_seriallink_options[2] &
3711 (BIT_7 | BIT_6 | BIT_5)) >> 5;
3712 emphasis = ha->fw_seriallink_options[3] & (BIT_1 | BIT_0);
3713 tx_sens = ha->fw_seriallink_options[1] &
fa2a1ce5 3714 (BIT_3 | BIT_2 | BIT_1 | BIT_0);
1da177e4
LT		 3715 rx_sens = (ha->fw_seriallink_options[1] &
3716 (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4;
3717 ha->fw_options[11] = (emphasis << 14) | (swing << 8);
3718 if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
3719 if (rx_sens == 0x0)
3720 rx_sens = 0x3;
3721 ha->fw_options[11] |= (tx_sens << 4) | rx_sens;
3722 } else if (IS_QLA2322(ha) || IS_QLA6322(ha))
3723 ha->fw_options[11] |= BIT_5 |
3724 ((rx_sens & (BIT_1 | BIT_0)) << 2) |
3725 (tx_sens & (BIT_1 | BIT_0));
3726 }
3727
3728 /* FCP2 options. */
3729 /* Return command IOCBs without waiting for an ABTS to complete. */
3730 ha->fw_options[3] |= BIT_13;
3731
3732 /* LED scheme. */
3733 if (ha->flags.enable_led_scheme)
3734 ha->fw_options[2] |= BIT_12;
3735
48c02fde 3736 /* Detect ISP6312. */
3737 if (IS_QLA6312(ha))
3738 ha->fw_options[2] |= BIT_13;
3739
088d09d4
GM		 3740 /* Set Retry FLOGI in case of P2P connection */
3741 if (ha->operating_mode == P2P) {
3742 ha->fw_options[2] |= BIT_3;
3743 ql_dbg(ql_dbg_disc, vha, 0x2100,
3744 "(%s): Setting FLOGI retry BIT in fw_options[2]: 0x%x\n",
3745 __func__, ha->fw_options[2]);
3746 }
3747
1da177e4 3748 /* Update firmware options. */
e315cd28 3749 qla2x00_set_fw_options(vha, ha->fw_options);
1da177e4
LT		 3750}
3751
0107109e 3752void
e315cd28 3753qla24xx_update_fw_options(scsi_qla_host_t *vha)
0107109e
AV		 3754{
3755 int rval;
e315cd28 3756 struct qla_hw_data *ha = vha->hw;
0107109e 3757
7ec0effd 3758 if (IS_P3P_TYPE(ha))
a9083016
GM		 3759 return;
3760
f198cafa
HM		 3761 /* Hold status IOCBs until ABTS response received. */
3762 if (ql2xfwholdabts)
3763 ha->fw_options[3] |= BIT_12;
3764
088d09d4
GM		 3765 /* Set Retry FLOGI in case of P2P connection */
3766 if (ha->operating_mode == P2P) {
3767 ha->fw_options[2] |= BIT_3;
3768 ql_dbg(ql_dbg_disc, vha, 0x2101,
3769 "(%s): Setting FLOGI retry BIT in fw_options[2]: 0x%x\n",
3770 __func__, ha->fw_options[2]);
3771 }
3772
41dc529a 3773 /* Move PUREX, ABTS RX & RIDA to ATIOQ */
3c4810ff
QT		 3774 if (ql2xmvasynctoatio &&
3775 (IS_QLA83XX(ha) || IS_QLA27XX(ha))) {
41dc529a
QT		 3776 if (qla_tgt_mode_enabled(vha) ||
3777 qla_dual_mode_enabled(vha))
3778 ha->fw_options[2] |= BIT_11;
3779 else
3780 ha->fw_options[2] &= ~BIT_11;
3781 }
3782
f7e761f5
QT		 3783 if (IS_QLA25XX(ha) || IS_QLA83XX(ha) || IS_QLA27XX(ha)) {
3784 /*
3785 * Tell FW to track each exchange to prevent
3786 * driver from using stale exchange.
3787 */
3788 if (qla_tgt_mode_enabled(vha) ||
3789 qla_dual_mode_enabled(vha))
3790 ha->fw_options[2] |= BIT_4;
3791 else
3792 ha->fw_options[2] &= ~BIT_4;
9ecf0b0d
QT		 3793
3794 /* Reserve 1/2 of emergency exchanges for ELS.*/
3795 if (qla2xuseresexchforels)
3796 ha->fw_options[2] |= BIT_8;
3797 else
3798 ha->fw_options[2] &= ~BIT_8;
f7e761f5
QT		 3799 }
3800
83548fe2
QT		 3801 ql_dbg(ql_dbg_init, vha, 0x00e8,
3802 "%s, add FW options 1-3 = 0x%04x 0x%04x 0x%04x mode %x\n",
3803 __func__, ha->fw_options[1], ha->fw_options[2],
3804 ha->fw_options[3], vha->host->active_mode);
3c4810ff
QT		 3805
3806 if (ha->fw_options[1] || ha->fw_options[2] || ha->fw_options[3])
3807 qla2x00_set_fw_options(vha, ha->fw_options);
41dc529a 3808
0107109e 3809 /* Update Serial Link options. */
f94097ed 3810 if ((le16_to_cpu(ha->fw_seriallink_options24[0]) & BIT_0) == 0)
0107109e
AV		 3811 return;
3812
e315cd28 3813 rval = qla2x00_set_serdes_params(vha,
f94097ed 3814 le16_to_cpu(ha->fw_seriallink_options24[1]),
3815 le16_to_cpu(ha->fw_seriallink_options24[2]),
3816 le16_to_cpu(ha->fw_seriallink_options24[3]));
0107109e 3817 if (rval != QLA_SUCCESS) {
7c3df132 3818 ql_log(ql_log_warn, vha, 0x0104,
0107109e
AV		 3819 "Unable to update Serial Link options (%x).\n", rval);
3820 }
3821}
3822
abbd8870 3823void
e315cd28 3824qla2x00_config_rings(struct scsi_qla_host *vha)
abbd8870 3825{
e315cd28 3826 struct qla_hw_data *ha = vha->hw;
3d71644c 3827 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
73208dfd
AC		 3828 struct req_que *req = ha->req_q_map[0];
3829 struct rsp_que *rsp = ha->rsp_q_map[0];
abbd8870
AV		 3830
3831 /* Setup ring parameters in initialization control block. */
ad950360
BVA		 3832 ha->init_cb->request_q_outpointer = cpu_to_le16(0);
3833 ha->init_cb->response_q_inpointer = cpu_to_le16(0);
e315cd28
AC		 3834 ha->init_cb->request_q_length = cpu_to_le16(req->length);
3835 ha->init_cb->response_q_length = cpu_to_le16(rsp->length);
3836 ha->init_cb->request_q_address[0] = cpu_to_le32(LSD(req->dma));
3837 ha->init_cb->request_q_address[1] = cpu_to_le32(MSD(req->dma));
3838 ha->init_cb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma));
3839 ha->init_cb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma));
abbd8870
AV		 3840
3841 WRT_REG_WORD(ISP_REQ_Q_IN(ha, reg), 0);
3842 WRT_REG_WORD(ISP_REQ_Q_OUT(ha, reg), 0);
3843 WRT_REG_WORD(ISP_RSP_Q_IN(ha, reg), 0);
3844 WRT_REG_WORD(ISP_RSP_Q_OUT(ha, reg), 0);
3845 RD_REG_WORD(ISP_RSP_Q_OUT(ha, reg)); /* PCI Posting. */
3846}
3847
0107109e 3848void
e315cd28 3849qla24xx_config_rings(struct scsi_qla_host *vha)
0107109e 3850{
e315cd28 3851 struct qla_hw_data *ha = vha->hw;
118e2ef9 3852 device_reg_t *reg = ISP_QUE_REG(ha, 0);
73208dfd
AC		 3853 struct device_reg_2xxx __iomem *ioreg = &ha->iobase->isp;
3854 struct qla_msix_entry *msix;
0107109e 3855 struct init_cb_24xx *icb;
73208dfd
AC		 3856 uint16_t rid = 0;
3857 struct req_que *req = ha->req_q_map[0];
3858 struct rsp_que *rsp = ha->rsp_q_map[0];
0107109e 3859
6246b8a1 3860 /* Setup ring parameters in initialization control block. */
0107109e 3861 icb = (struct init_cb_24xx *)ha->init_cb;
ad950360
BVA		 3862 icb->request_q_outpointer = cpu_to_le16(0);
3863 icb->response_q_inpointer = cpu_to_le16(0);
e315cd28
AC		 3864 icb->request_q_length = cpu_to_le16(req->length);
3865 icb->response_q_length = cpu_to_le16(rsp->length);
3866 icb->request_q_address[0] = cpu_to_le32(LSD(req->dma));
3867 icb->request_q_address[1] = cpu_to_le32(MSD(req->dma));
3868 icb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma));
3869 icb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma));
0107109e 3870
2d70c103 3871 /* Setup ATIO queue dma pointers for target mode */
ad950360 3872 icb->atio_q_inpointer = cpu_to_le16(0);
2d70c103
NB		 3873 icb->atio_q_length = cpu_to_le16(ha->tgt.atio_q_length);
3874 icb->atio_q_address[0] = cpu_to_le32(LSD(ha->tgt.atio_dma));
3875 icb->atio_q_address[1] = cpu_to_le32(MSD(ha->tgt.atio_dma));
3876
7c6300e3 3877 if (IS_SHADOW_REG_CAPABLE(ha))
ad950360 3878 icb->firmware_options_2 |= cpu_to_le32(BIT_30|BIT_29);
7c6300e3 3879
f73cb695 3880 if (ha->mqenable || IS_QLA83XX(ha) || IS_QLA27XX(ha)) {
ad950360
BVA		 3881 icb->qos = cpu_to_le16(QLA_DEFAULT_QUE_QOS);
3882 icb->rid = cpu_to_le16(rid);
73208dfd
AC		 3883 if (ha->flags.msix_enabled) {
3884 msix = &ha->msix_entries[1];
83548fe2 3885 ql_dbg(ql_dbg_init, vha, 0x0019,
7c3df132
SK		 3886 "Registering vector 0x%x for base que.\n",
3887 msix->entry);
73208dfd
AC		 3888 icb->msix = cpu_to_le16(msix->entry);
3889 }
3890 /* Use alternate PCI bus number */
3891 if (MSB(rid))
ad950360 3892 icb->firmware_options_2 |= cpu_to_le32(BIT_19);
73208dfd
AC		 3893 /* Use alternate PCI devfn */
3894 if (LSB(rid))
ad950360 3895 icb->firmware_options_2 |= cpu_to_le32(BIT_18);
73208dfd 3896
3155754a 3897 /* Use Disable MSIX Handshake mode for capable adapters */
6246b8a1
GM		 3898 if ((ha->fw_attributes & BIT_6) && (IS_MSIX_NACK_CAPABLE(ha)) &&
3899 (ha->flags.msix_enabled)) {
ad950360 3900 icb->firmware_options_2 &= cpu_to_le32(~BIT_22);
3155754a 3901 ha->flags.disable_msix_handshake = 1;
7c3df132
SK		 3902 ql_dbg(ql_dbg_init, vha, 0x00fe,
3903 "MSIX Handshake Disable Mode turned on.\n");
3155754a 3904 } else {
ad950360 3905 icb->firmware_options_2 |= cpu_to_le32(BIT_22);
3155754a 3906 }
ad950360 3907 icb->firmware_options_2 |= cpu_to_le32(BIT_23);
73208dfd
AC		 3908
3909 WRT_REG_DWORD(&reg->isp25mq.req_q_in, 0);
3910 WRT_REG_DWORD(&reg->isp25mq.req_q_out, 0);
3911 WRT_REG_DWORD(&reg->isp25mq.rsp_q_in, 0);
3912 WRT_REG_DWORD(&reg->isp25mq.rsp_q_out, 0);
3913 } else {
3914 WRT_REG_DWORD(&reg->isp24.req_q_in, 0);
3915 WRT_REG_DWORD(&reg->isp24.req_q_out, 0);
3916 WRT_REG_DWORD(&reg->isp24.rsp_q_in, 0);
3917 WRT_REG_DWORD(&reg->isp24.rsp_q_out, 0);
3918 }
aa230bc5 3919 qlt_24xx_config_rings(vha);
2d70c103 3920
73208dfd
AC		 3921 /* PCI posting */
3922 RD_REG_DWORD(&ioreg->hccr);
0107109e
AV		 3923}
3924
1da177e4
LT		 3925/**
3926 * qla2x00_init_rings() - Initializes firmware.
2db6228d 3927 * @vha: HA context
1da177e4
LT		 3928 *
3929 * Beginning of request ring has initialization control block already built
3930 * by nvram config routine.
3931 *
3932 * Returns 0 on success.
3933 */
8ae6d9c7 3934int
e315cd28 3935qla2x00_init_rings(scsi_qla_host_t *vha)
1da177e4
LT		 3936{
3937 int rval;
3938 unsigned long flags = 0;
29bdccbe 3939 int cnt, que;
e315cd28 3940 struct qla_hw_data *ha = vha->hw;
29bdccbe
AC		 3941 struct req_que *req;
3942 struct rsp_que *rsp;
2c3dfe3f
SJ		 3943 struct mid_init_cb_24xx *mid_init_cb =
3944 (struct mid_init_cb_24xx *) ha->init_cb;
1da177e4
LT		 3945
3946 spin_lock_irqsave(&ha->hardware_lock, flags);
3947
3948 /* Clear outstanding commands array. */
2afa19a9 3949 for (que = 0; que < ha->max_req_queues; que++) {
29bdccbe 3950 req = ha->req_q_map[que];
cb43285f 3951 if (!req || !test_bit(que, ha->req_qid_map))
29bdccbe 3952 continue;
7c6300e3
JC		 3953 req->out_ptr = (void *)(req->ring + req->length);
3954 *req->out_ptr = 0;
8d93f550 3955 for (cnt = 1; cnt < req->num_outstanding_cmds; cnt++)
29bdccbe 3956 req->outstanding_cmds[cnt] = NULL;
1da177e4 3957
2afa19a9 3958 req->current_outstanding_cmd = 1;
1da177e4 3959
29bdccbe
AC		 3960 /* Initialize firmware. */
3961 req->ring_ptr = req->ring;
3962 req->ring_index = 0;
3963 req->cnt = req->length;
3964 }
1da177e4 3965
2afa19a9 3966 for (que = 0; que < ha->max_rsp_queues; que++) {
29bdccbe 3967 rsp = ha->rsp_q_map[que];
cb43285f 3968 if (!rsp || !test_bit(que, ha->rsp_qid_map))
29bdccbe 3969 continue;
7c6300e3
JC		 3970 rsp->in_ptr = (void *)(rsp->ring + rsp->length);
3971 *rsp->in_ptr = 0;
29bdccbe 3972 /* Initialize response queue entries */
8ae6d9c7
GM		 3973 if (IS_QLAFX00(ha))
3974 qlafx00_init_response_q_entries(rsp);
3975 else
3976 qla2x00_init_response_q_entries(rsp);
29bdccbe 3977 }
1da177e4 3978
2d70c103
NB		 3979 ha->tgt.atio_ring_ptr = ha->tgt.atio_ring;
3980 ha->tgt.atio_ring_index = 0;
3981 /* Initialize ATIO queue entries */
3982 qlt_init_atio_q_entries(vha);
3983
e315cd28 3984 ha->isp_ops->config_rings(vha);
1da177e4
LT		 3985
3986 spin_unlock_irqrestore(&ha->hardware_lock, flags);
3987
8ae6d9c7
GM		 3988 ql_dbg(ql_dbg_init, vha, 0x00d1, "Issue init firmware.\n");
3989
3990 if (IS_QLAFX00(ha)) {
3991 rval = qlafx00_init_firmware(vha, ha->init_cb_size);
3992 goto next_check;
3993 }
3994
1da177e4 3995 /* Update any ISP specific firmware options before initialization. */
e315cd28 3996 ha->isp_ops->update_fw_options(vha);
1da177e4 3997
605aa2bc 3998 if (ha->flags.npiv_supported) {
45980cc2 3999 if (ha->operating_mode == LOOP && !IS_CNA_CAPABLE(ha))
605aa2bc 4000 ha->max_npiv_vports = MIN_MULTI_ID_FABRIC - 1;
c48339de 4001 mid_init_cb->count = cpu_to_le16(ha->max_npiv_vports);
605aa2bc
LC		 4002 }
4003
24a08138 4004 if (IS_FWI2_CAPABLE(ha)) {
ad950360 4005 mid_init_cb->options = cpu_to_le16(BIT_1);
24a08138 4006 mid_init_cb->init_cb.execution_throttle =
03e8c680 4007 cpu_to_le16(ha->cur_fw_xcb_count);
40f3862b
JC		 4008 ha->flags.dport_enabled =
4009 (mid_init_cb->init_cb.firmware_options_1 & BIT_7) != 0;
4010 ql_dbg(ql_dbg_init, vha, 0x0191, "DPORT Support: %s.\n",
4011 (ha->flags.dport_enabled) ? "enabled" : "disabled");
4012 /* FA-WWPN Status */
2486c627 4013 ha->flags.fawwpn_enabled =
40f3862b 4014 (mid_init_cb->init_cb.firmware_options_1 & BIT_6) != 0;
83548fe2 4015 ql_dbg(ql_dbg_init, vha, 0x00bc, "FA-WWPN Support: %s.\n",
2486c627 4016 (ha->flags.fawwpn_enabled) ? "enabled" : "disabled");
24a08138 4017 }
2c3dfe3f 4018
e315cd28 4019 rval = qla2x00_init_firmware(vha, ha->init_cb_size);
8ae6d9c7 4020next_check:
1da177e4 4021 if (rval) {
7c3df132
SK		 4022 ql_log(ql_log_fatal, vha, 0x00d2,
4023 "Init Firmware **** FAILED ****.\n");
1da177e4 4024 } else {
7c3df132
SK		 4025 ql_dbg(ql_dbg_init, vha, 0x00d3,
4026 "Init Firmware -- success.\n");
4b60c827 4027 QLA_FW_STARTED(ha);
1da177e4
LT		 4028 }
4029
4030 return (rval);
4031}
4032
4033/**
4034 * qla2x00_fw_ready() - Waits for firmware ready.
2db6228d 4035 * @vha: HA context
1da177e4
LT		 4036 *
4037 * Returns 0 on success.
4038 */
4039static int
e315cd28 4040qla2x00_fw_ready(scsi_qla_host_t *vha)
1da177e4
LT		 4041{
4042 int rval;
4d4df193 4043 unsigned long wtime, mtime, cs84xx_time;
1da177e4
LT		 4044 uint16_t min_wait; /* Minimum wait time if loop is down */
4045 uint16_t wait_time; /* Wait time if loop is coming ready */
b5a340dd 4046 uint16_t state[6];
e315cd28 4047 struct qla_hw_data *ha = vha->hw;
1da177e4 4048
8ae6d9c7
GM		 4049 if (IS_QLAFX00(vha->hw))
4050 return qlafx00_fw_ready(vha);
4051
1da177e4
LT		 4052 rval = QLA_SUCCESS;
4053
33461491
CD		 4054 /* Time to wait for loop down */
4055 if (IS_P3P_TYPE(ha))
4056 min_wait = 30;
4057 else
4058 min_wait = 20;
1da177e4
LT		 4059
4060 /*
4061 * Firmware should take at most one RATOV to login, plus 5 seconds for
4062 * our own processing.
4063 */
4064 if ((wait_time = (ha->retry_count*ha->login_timeout) + 5) < min_wait) {
4065 wait_time = min_wait;
4066 }
4067
4068 /* Min wait time if loop down */
4069 mtime = jiffies + (min_wait * HZ);
4070
4071 /* wait time before firmware ready */
4072 wtime = jiffies + (wait_time * HZ);
4073
4074 /* Wait for ISP to finish LIP */
e315cd28 4075 if (!vha->flags.init_done)
7c3df132
SK		 4076 ql_log(ql_log_info, vha, 0x801e,
4077 "Waiting for LIP to complete.\n");
1da177e4
LT		 4078
4079 do {
5b939038 4080 memset(state, -1, sizeof(state));
e315cd28 4081 rval = qla2x00_get_firmware_state(vha, state);
1da177e4 4082 if (rval == QLA_SUCCESS) {
4d4df193 4083 if (state[0] < FSTATE_LOSS_OF_SYNC) {
e315cd28 4084 vha->device_flags &= ~DFLG_NO_CABLE;
1da177e4 4085 }
4d4df193 4086 if (IS_QLA84XX(ha) && state[0] != FSTATE_READY) {
7c3df132
SK		 4087 ql_dbg(ql_dbg_taskm, vha, 0x801f,
4088 "fw_state=%x 84xx=%x.\n", state[0],
4089 state[2]);
4d4df193
HK		 4090 if ((state[2] & FSTATE_LOGGED_IN) &&
4091 (state[2] & FSTATE_WAITING_FOR_VERIFY)) {
7c3df132
SK		 4092 ql_dbg(ql_dbg_taskm, vha, 0x8028,
4093 "Sending verify iocb.\n");
4d4df193
HK		 4094
4095 cs84xx_time = jiffies;
e315cd28 4096 rval = qla84xx_init_chip(vha);
7c3df132
SK		 4097 if (rval != QLA_SUCCESS) {
4098 ql_log(ql_log_warn,
cfb0919c 4099 vha, 0x8007,
7c3df132 4100 "Init chip failed.\n");
4d4df193 4101 break;
7c3df132 4102 }
4d4df193
HK		 4103
4104 /* Add time taken to initialize. */
4105 cs84xx_time = jiffies - cs84xx_time;
4106 wtime += cs84xx_time;
4107 mtime += cs84xx_time;
cfb0919c 4108 ql_dbg(ql_dbg_taskm, vha, 0x8008,
7c3df132
SK		 4109 "Increasing wait time by %ld. "
4110 "New time %ld.\n", cs84xx_time,
4111 wtime);
4d4df193
HK		 4112 }
4113 } else if (state[0] == FSTATE_READY) {
7c3df132
SK		 4114 ql_dbg(ql_dbg_taskm, vha, 0x8037,
4115 "F/W Ready - OK.\n");
1da177e4 4116
e315cd28 4117 qla2x00_get_retry_cnt(vha, &ha->retry_count,
1da177e4
LT		 4118 &ha->login_timeout, &ha->r_a_tov);
4119
4120 rval = QLA_SUCCESS;
4121 break;
4122 }
4123
4124 rval = QLA_FUNCTION_FAILED;
4125
e315cd28 4126 if (atomic_read(&vha->loop_down_timer) &&
4d4df193 4127 state[0] != FSTATE_READY) {
1da177e4 4128 /* Loop down. Timeout on min_wait for states
fa2a1ce5
AV		 4129 * other than Wait for Login.
4130 */
1da177e4 4131 if (time_after_eq(jiffies, mtime)) {
7c3df132 4132 ql_log(ql_log_info, vha, 0x8038,
1da177e4
LT		 4133 "Cable is unplugged...\n");
4134
e315cd28 4135 vha->device_flags |= DFLG_NO_CABLE;
1da177e4
LT		 4136 break;
4137 }
4138 }
4139 } else {
4140 /* Mailbox cmd failed. Timeout on min_wait. */
cdbb0a4f 4141 if (time_after_eq(jiffies, mtime) ||
7190575f 4142 ha->flags.isp82xx_fw_hung)
1da177e4
LT		 4143 break;
4144 }
4145
4146 if (time_after_eq(jiffies, wtime))
4147 break;
4148
4149 /* Delay for a while */
4150 msleep(500);
1da177e4
LT		 4151 } while (1);
4152
7c3df132 4153 ql_dbg(ql_dbg_taskm, vha, 0x803a,
b5a340dd
JC		 4154 "fw_state=%x (%x, %x, %x, %x %x) curr time=%lx.\n", state[0],
4155 state[1], state[2], state[3], state[4], state[5], jiffies);
1da177e4 4156
cfb0919c 4157 if (rval && !(vha->device_flags & DFLG_NO_CABLE)) {
7c3df132
SK		 4158 ql_log(ql_log_warn, vha, 0x803b,
4159 "Firmware ready **** FAILED ****.\n");
1da177e4
LT		 4160 }
4161
4162 return (rval);
4163}
4164
4165/*
4166* qla2x00_configure_hba
4167* Setup adapter context.
4168*
4169* Input:
4170* ha = adapter state pointer.
4171*
4172* Returns:
4173* 0 = success
4174*
4175* Context:
4176* Kernel context.
4177*/
4178static int
e315cd28 4179qla2x00_configure_hba(scsi_qla_host_t *vha)
1da177e4
LT		 4180{
4181 int rval;
4182 uint16_t loop_id;
4183 uint16_t topo;
2c3dfe3f 4184 uint16_t sw_cap;
1da177e4
LT		 4185 uint8_t al_pa;
4186 uint8_t area;
4187 uint8_t domain;
4188 char connect_type[22];
e315cd28 4189 struct qla_hw_data *ha = vha->hw;
61e1b269 4190 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
482c9dc7 4191 port_id_t id;
9d1aa4e1 4192 unsigned long flags;
1da177e4
LT		 4193
4194 /* Get host addresses. */
e315cd28 4195 rval = qla2x00_get_adapter_id(vha,
2c3dfe3f 4196 &loop_id, &al_pa, &area, &domain, &topo, &sw_cap);
1da177e4 4197 if (rval != QLA_SUCCESS) {
e315cd28 4198 if (LOOP_TRANSITION(vha) || atomic_read(&ha->loop_down_timer) ||
6246b8a1 4199 IS_CNA_CAPABLE(ha) ||
33135aa2 4200 (rval == QLA_COMMAND_ERROR && loop_id == 0x7)) {
7c3df132
SK		 4201 ql_dbg(ql_dbg_disc, vha, 0x2008,
4202 "Loop is in a transition state.\n");
33135aa2 4203 } else {
7c3df132
SK		 4204 ql_log(ql_log_warn, vha, 0x2009,
4205 "Unable to get host loop ID.\n");
61e1b269
JC		 4206 if (IS_FWI2_CAPABLE(ha) && (vha == base_vha) &&
4207 (rval == QLA_COMMAND_ERROR && loop_id == 0x1b)) {
4208 ql_log(ql_log_warn, vha, 0x1151,
4209 "Doing link init.\n");
4210 if (qla24xx_link_initialize(vha) == QLA_SUCCESS)
4211 return rval;
4212 }
e315cd28 4213 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
33135aa2 4214 }
1da177e4
LT		 4215 return (rval);
4216 }
4217
4218 if (topo == 4) {
7c3df132
SK		 4219 ql_log(ql_log_info, vha, 0x200a,
4220 "Cannot get topology - retrying.\n");
1da177e4
LT		 4221 return (QLA_FUNCTION_FAILED);
4222 }
4223
e315cd28 4224 vha->loop_id = loop_id;
1da177e4
LT		 4225
4226 /* initialize */
4227 ha->min_external_loopid = SNS_FIRST_LOOP_ID;
4228 ha->operating_mode = LOOP;
2c3dfe3f 4229 ha->switch_cap = 0;
1da177e4
LT		 4230
4231 switch (topo) {
4232 case 0:
7c3df132 4233 ql_dbg(ql_dbg_disc, vha, 0x200b, "HBA in NL topology.\n");
1da177e4
LT		 4234 ha->current_topology = ISP_CFG_NL;
4235 strcpy(connect_type, "(Loop)");
4236 break;
4237
4238 case 1:
7c3df132 4239 ql_dbg(ql_dbg_disc, vha, 0x200c, "HBA in FL topology.\n");
2c3dfe3f 4240 ha->switch_cap = sw_cap;
1da177e4
LT		 4241 ha->current_topology = ISP_CFG_FL;
4242 strcpy(connect_type, "(FL_Port)");
4243 break;
4244
4245 case 2:
7c3df132 4246 ql_dbg(ql_dbg_disc, vha, 0x200d, "HBA in N P2P topology.\n");
1da177e4
LT		 4247 ha->operating_mode = P2P;
4248 ha->current_topology = ISP_CFG_N;
4249 strcpy(connect_type, "(N_Port-to-N_Port)");
4250 break;
4251
4252 case 3:
7c3df132 4253 ql_dbg(ql_dbg_disc, vha, 0x200e, "HBA in F P2P topology.\n");
2c3dfe3f 4254 ha->switch_cap = sw_cap;
1da177e4
LT		 4255 ha->operating_mode = P2P;
4256 ha->current_topology = ISP_CFG_F;
4257 strcpy(connect_type, "(F_Port)");
4258 break;
4259
4260 default:
7c3df132
SK		 4261 ql_dbg(ql_dbg_disc, vha, 0x200f,
4262 "HBA in unknown topology %x, using NL.\n", topo);
1da177e4
LT		 4263 ha->current_topology = ISP_CFG_NL;
4264 strcpy(connect_type, "(Loop)");
4265 break;
4266 }
4267
4268 /* Save Host port and loop ID. */
4269 /* byte order - Big Endian */
482c9dc7
QT		 4270 id.b.domain = domain;
4271 id.b.area = area;
4272 id.b.al_pa = al_pa;
4273 id.b.rsvd_1 = 0;
9d1aa4e1 4274 spin_lock_irqsave(&ha->hardware_lock, flags);
8777e431
QT		 4275 if (!(topo == 2 && ha->flags.n2n_bigger))
4276 qlt_update_host_map(vha, id);
9d1aa4e1 4277 spin_unlock_irqrestore(&ha->hardware_lock, flags);
2d70c103 4278
e315cd28 4279 if (!vha->flags.init_done)
7c3df132
SK		 4280 ql_log(ql_log_info, vha, 0x2010,
4281 "Topology - %s, Host Loop address 0x%x.\n",
e315cd28 4282 connect_type, vha->loop_id);
1da177e4 4283
1da177e4
LT		 4284 return(rval);
4285}
4286
a9083016 4287inline void
e315cd28
AC		 4288qla2x00_set_model_info(scsi_qla_host_t *vha, uint8_t *model, size_t len,
4289 char *def)
9bb9fcf2
AV		 4290{
4291 char *st, *en;
4292 uint16_t index;
e315cd28 4293 struct qla_hw_data *ha = vha->hw;
ab671149 4294 int use_tbl = !IS_QLA24XX_TYPE(ha) && !IS_QLA25XX(ha) &&
6246b8a1 4295 !IS_CNA_CAPABLE(ha) && !IS_QLA2031(ha);
9bb9fcf2
AV		 4296
4297 if (memcmp(model, BINZERO, len) != 0) {
4298 strncpy(ha->model_number, model, len);
4299 st = en = ha->model_number;
4300 en += len - 1;
4301 while (en > st) {
4302 if (*en != 0x20 && *en != 0x00)
4303 break;
4304 *en-- = '\0';
4305 }
4306
4307 index = (ha->pdev->subsystem_device & 0xff);
7d0dba17
AV		 4308 if (use_tbl &&
4309 ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC &&
9bb9fcf2 4310 index < QLA_MODEL_NAMES)
1ee27146
JC		 4311 strncpy(ha->model_desc,
4312 qla2x00_model_name[index * 2 + 1],
4313 sizeof(ha->model_desc) - 1);
9bb9fcf2
AV		 4314 } else {
4315 index = (ha->pdev->subsystem_device & 0xff);
7d0dba17
AV		 4316 if (use_tbl &&
4317 ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC &&
9bb9fcf2
AV		 4318 index < QLA_MODEL_NAMES) {
4319 strcpy(ha->model_number,
4320 qla2x00_model_name[index * 2]);
1ee27146
JC		 4321 strncpy(ha->model_desc,
4322 qla2x00_model_name[index * 2 + 1],
4323 sizeof(ha->model_desc) - 1);
9bb9fcf2
AV		 4324 } else {
4325 strcpy(ha->model_number, def);
4326 }
4327 }
1ee27146 4328 if (IS_FWI2_CAPABLE(ha))
e315cd28 4329 qla2xxx_get_vpd_field(vha, "\x82", ha->model_desc,
1ee27146 4330 sizeof(ha->model_desc));
9bb9fcf2
AV		 4331}
4332
4e08df3f
DM		 4333/* On sparc systems, obtain port and node WWN from firmware
4334 * properties.
4335 */
e315cd28 4336static void qla2xxx_nvram_wwn_from_ofw(scsi_qla_host_t *vha, nvram_t *nv)
4e08df3f
DM		 4337{
4338#ifdef CONFIG_SPARC
e315cd28 4339 struct qla_hw_data *ha = vha->hw;
4e08df3f 4340 struct pci_dev *pdev = ha->pdev;
15576bc8
DM		 4341 struct device_node *dp = pci_device_to_OF_node(pdev);
4342 const u8 *val;
4e08df3f
DM		 4343 int len;
4344
4345 val = of_get_property(dp, "port-wwn", &len);
4346 if (val && len >= WWN_SIZE)
4347 memcpy(nv->port_name, val, WWN_SIZE);
4348
4349 val = of_get_property(dp, "node-wwn", &len);
4350 if (val && len >= WWN_SIZE)
4351 memcpy(nv->node_name, val, WWN_SIZE);
4352#endif
4353}
4354
1da177e4
LT		 4355/*
4356* NVRAM configuration for ISP 2xxx
4357*
4358* Input:
4359* ha = adapter block pointer.
4360*
4361* Output:
4362* initialization control block in response_ring
4363* host adapters parameters in host adapter block
4364*
4365* Returns:
4366* 0 = success.
4367*/
abbd8870 4368int
e315cd28 4369qla2x00_nvram_config(scsi_qla_host_t *vha)
1da177e4 4370{
4e08df3f 4371 int rval;
0107109e
AV		 4372 uint8_t chksum = 0;
4373 uint16_t cnt;
4374 uint8_t *dptr1, *dptr2;
e315cd28 4375 struct qla_hw_data *ha = vha->hw;
0107109e 4376 init_cb_t *icb = ha->init_cb;
281afe19
SJ		 4377 nvram_t *nv = ha->nvram;
4378 uint8_t *ptr = ha->nvram;
3d71644c 4379 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1da177e4 4380
4e08df3f
DM		 4381 rval = QLA_SUCCESS;
4382
1da177e4 4383 /* Determine NVRAM starting address. */
0107109e 4384 ha->nvram_size = sizeof(nvram_t);
1da177e4
LT		 4385 ha->nvram_base = 0;
4386 if (!IS_QLA2100(ha) && !IS_QLA2200(ha) && !IS_QLA2300(ha))
4387 if ((RD_REG_WORD(&reg->ctrl_status) >> 14) == 1)
4388 ha->nvram_base = 0x80;
4389
4390 /* Get NVRAM data and calculate checksum. */
e315cd28 4391 ha->isp_ops->read_nvram(vha, ptr, ha->nvram_base, ha->nvram_size);
0107109e
AV		 4392 for (cnt = 0, chksum = 0; cnt < ha->nvram_size; cnt++)
4393 chksum += *ptr++;
1da177e4 4394
7c3df132
SK		 4395 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x010f,
4396 "Contents of NVRAM.\n");
4397 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0110,
4398 (uint8_t *)nv, ha->nvram_size);
1da177e4
LT		 4399
4400 /* Bad NVRAM data, set defaults parameters. */
4401 if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' ||
4402 nv->id[2] != 'P' || nv->id[3] != ' ' || nv->nvram_version < 1) {
4403 /* Reset NVRAM data. */
7c3df132 4404 ql_log(ql_log_warn, vha, 0x0064,
9e336520 4405 "Inconsistent NVRAM "
7c3df132
SK		 4406 "detected: checksum=0x%x id=%c version=0x%x.\n",
4407 chksum, nv->id[0], nv->nvram_version);
4408 ql_log(ql_log_warn, vha, 0x0065,
4409 "Falling back to "
4410 "functioning (yet invalid -- WWPN) defaults.\n");
4e08df3f
DM		 4411
4412 /*
4413 * Set default initialization control block.
4414 */
4415 memset(nv, 0, ha->nvram_size);
4416 nv->parameter_block_version = ICB_VERSION;
4417
4418 if (IS_QLA23XX(ha)) {
4419 nv->firmware_options[0] = BIT_2 | BIT_1;
4420 nv->firmware_options[1] = BIT_7 | BIT_5;
4421 nv->add_firmware_options[0] = BIT_5;
4422 nv->add_firmware_options[1] = BIT_5 | BIT_4;
98aee70d 4423 nv->frame_payload_size = 2048;
4e08df3f
DM		 4424 nv->special_options[1] = BIT_7;
4425 } else if (IS_QLA2200(ha)) {
4426 nv->firmware_options[0] = BIT_2 | BIT_1;
4427 nv->firmware_options[1] = BIT_7 | BIT_5;
4428 nv->add_firmware_options[0] = BIT_5;
4429 nv->add_firmware_options[1] = BIT_5 | BIT_4;
98aee70d 4430 nv->frame_payload_size = 1024;
4e08df3f
DM		 4431 } else if (IS_QLA2100(ha)) {
4432 nv->firmware_options[0] = BIT_3 | BIT_1;
4433 nv->firmware_options[1] = BIT_5;
98aee70d 4434 nv->frame_payload_size = 1024;
4e08df3f
DM		 4435 }
4436
ad950360
BVA		 4437 nv->max_iocb_allocation = cpu_to_le16(256);
4438 nv->execution_throttle = cpu_to_le16(16);
4e08df3f
DM		 4439 nv->retry_count = 8;
4440 nv->retry_delay = 1;
4441
4442 nv->port_name[0] = 33;
4443 nv->port_name[3] = 224;
4444 nv->port_name[4] = 139;
4445
e315cd28 4446 qla2xxx_nvram_wwn_from_ofw(vha, nv);
4e08df3f
DM		 4447
4448 nv->login_timeout = 4;
4449
4450 /*
4451 * Set default host adapter parameters
4452 */
4453 nv->host_p[1] = BIT_2;
4454 nv->reset_delay = 5;
4455 nv->port_down_retry_count = 8;
ad950360 4456 nv->max_luns_per_target = cpu_to_le16(8);
4e08df3f
DM		 4457 nv->link_down_timeout = 60;
4458
4459 rval = 1;
1da177e4
LT		 4460 }
4461
4462#if defined(CONFIG_IA64_GENERIC) || defined(CONFIG_IA64_SGI_SN2)
4463 /*
4464 * The SN2 does not provide BIOS emulation which means you can't change
4465 * potentially bogus BIOS settings. Force the use of default settings
4466 * for link rate and frame size. Hope that the rest of the settings
4467 * are valid.
4468 */
4469 if (ia64_platform_is("sn2")) {
98aee70d 4470 nv->frame_payload_size = 2048;
1da177e4
LT		 4471 if (IS_QLA23XX(ha))
4472 nv->special_options[1] = BIT_7;
4473 }
4474#endif
4475
4476 /* Reset Initialization control block */
0107109e 4477 memset(icb, 0, ha->init_cb_size);
1da177e4
LT		 4478
4479 /*
4480 * Setup driver NVRAM options.
4481 */
4482 nv->firmware_options[0] |= (BIT_6 | BIT_1);
4483 nv->firmware_options[0] &= ~(BIT_5 | BIT_4);
4484 nv->firmware_options[1] |= (BIT_5 | BIT_0);
4485 nv->firmware_options[1] &= ~BIT_4;
4486
4487 if (IS_QLA23XX(ha)) {
4488 nv->firmware_options[0] |= BIT_2;
4489 nv->firmware_options[0] &= ~BIT_3;
2d70c103 4490 nv->special_options[0] &= ~BIT_6;
0107109e 4491 nv->add_firmware_options[1] |= BIT_5 | BIT_4;
1da177e4
LT		 4492
4493 if (IS_QLA2300(ha)) {
4494 if (ha->fb_rev == FPM_2310) {
4495 strcpy(ha->model_number, "QLA2310");
4496 } else {
4497 strcpy(ha->model_number, "QLA2300");
4498 }
4499 } else {
e315cd28 4500 qla2x00_set_model_info(vha, nv->model_number,
9bb9fcf2 4501 sizeof(nv->model_number), "QLA23xx");
1da177e4
LT		 4502 }
4503 } else if (IS_QLA2200(ha)) {
4504 nv->firmware_options[0] |= BIT_2;
4505 /*
4506 * 'Point-to-point preferred, else loop' is not a safe
4507 * connection mode setting.
4508 */
4509 if ((nv->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) ==
4510 (BIT_5 | BIT_4)) {
4511 /* Force 'loop preferred, else point-to-point'. */
4512 nv->add_firmware_options[0] &= ~(BIT_6 | BIT_5 | BIT_4);
4513 nv->add_firmware_options[0] |= BIT_5;
4514 }
4515 strcpy(ha->model_number, "QLA22xx");
4516 } else /*if (IS_QLA2100(ha))*/ {
4517 strcpy(ha->model_number, "QLA2100");
4518 }
4519
4520 /*
4521 * Copy over NVRAM RISC parameter block to initialization control block.
4522 */
4523 dptr1 = (uint8_t *)icb;
4524 dptr2 = (uint8_t *)&nv->parameter_block_version;
4525 cnt = (uint8_t *)&icb->request_q_outpointer - (uint8_t *)&icb->version;
4526 while (cnt--)
4527 *dptr1++ = *dptr2++;
4528
4529 /* Copy 2nd half. */
4530 dptr1 = (uint8_t *)icb->add_firmware_options;
4531 cnt = (uint8_t *)icb->reserved_3 - (uint8_t *)icb->add_firmware_options;
4532 while (cnt--)
4533 *dptr1++ = *dptr2++;
0eaaca4c 4534 ha->frame_payload_size = le16_to_cpu(icb->frame_payload_size);
5341e868
AV		 4535 /* Use alternate WWN? */
4536 if (nv->host_p[1] & BIT_7) {
4537 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
4538 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
4539 }
4540
1da177e4
LT		 4541 /* Prepare nodename */
4542 if ((icb->firmware_options[1] & BIT_6) == 0) {
4543 /*
4544 * Firmware will apply the following mask if the nodename was
4545 * not provided.
4546 */
4547 memcpy(icb->node_name, icb->port_name, WWN_SIZE);
4548 icb->node_name[0] &= 0xF0;
4549 }
4550
4551 /*
4552 * Set host adapter parameters.
4553 */
3ce8866c
SK		 4554
4555 /*
4556 * BIT_7 in the host-parameters section allows for modification to
4557 * internal driver logging.
4558 */
0181944f 4559 if (nv->host_p[0] & BIT_7)
cfb0919c 4560 ql2xextended_error_logging = QL_DBG_DEFAULT1_MASK;
1da177e4
LT		 4561 ha->flags.disable_risc_code_load = ((nv->host_p[0] & BIT_4) ? 1 : 0);
4562 /* Always load RISC code on non ISP2[12]00 chips. */
4563 if (!IS_QLA2100(ha) && !IS_QLA2200(ha))
4564 ha->flags.disable_risc_code_load = 0;
4565 ha->flags.enable_lip_reset = ((nv->host_p[1] & BIT_1) ? 1 : 0);
4566 ha->flags.enable_lip_full_login = ((nv->host_p[1] & BIT_2) ? 1 : 0);
4567 ha->flags.enable_target_reset = ((nv->host_p[1] & BIT_3) ? 1 : 0);
06c22bd1 4568 ha->flags.enable_led_scheme = (nv->special_options[1] & BIT_4) ? 1 : 0;
d4c760c2 4569 ha->flags.disable_serdes = 0;
1da177e4
LT		 4570
4571 ha->operating_mode =
4572 (icb->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) >> 4;
4573
4574 memcpy(ha->fw_seriallink_options, nv->seriallink_options,
4575 sizeof(ha->fw_seriallink_options));
4576
4577 /* save HBA serial number */
4578 ha->serial0 = icb->port_name[5];
4579 ha->serial1 = icb->port_name[6];
4580 ha->serial2 = icb->port_name[7];
e315cd28
AC		 4581 memcpy(vha->node_name, icb->node_name, WWN_SIZE);
4582 memcpy(vha->port_name, icb->port_name, WWN_SIZE);
1da177e4 4583
ad950360 4584 icb->execution_throttle = cpu_to_le16(0xFFFF);
1da177e4
LT		 4585
4586 ha->retry_count = nv->retry_count;
4587
4588 /* Set minimum login_timeout to 4 seconds. */
5b91490e 4589 if (nv->login_timeout != ql2xlogintimeout)
1da177e4
LT		 4590 nv->login_timeout = ql2xlogintimeout;
4591 if (nv->login_timeout < 4)
4592 nv->login_timeout = 4;
4593 ha->login_timeout = nv->login_timeout;
1da177e4 4594
00a537b8
AV		 4595 /* Set minimum RATOV to 100 tenths of a second. */
4596 ha->r_a_tov = 100;
1da177e4 4597
1da177e4
LT		 4598 ha->loop_reset_delay = nv->reset_delay;
4599
1da177e4
LT		 4600 /* Link Down Timeout = 0:
4601 *
4602 * When Port Down timer expires we will start returning
4603 * I/O's to OS with "DID_NO_CONNECT".
4604 *
4605 * Link Down Timeout != 0:
4606 *
4607 * The driver waits for the link to come up after link down
4608 * before returning I/Os to OS with "DID_NO_CONNECT".
fa2a1ce5 4609 */
1da177e4
LT		 4610 if (nv->link_down_timeout == 0) {
4611 ha->loop_down_abort_time =
354d6b21 4612 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
1da177e4
LT		 4613 } else {
4614 ha->link_down_timeout = nv->link_down_timeout;
4615 ha->loop_down_abort_time =
4616 (LOOP_DOWN_TIME - ha->link_down_timeout);
fa2a1ce5 4617 }
1da177e4 4618
1da177e4
LT		 4619 /*
4620 * Need enough time to try and get the port back.
4621 */
4622 ha->port_down_retry_count = nv->port_down_retry_count;
4623 if (qlport_down_retry)
4624 ha->port_down_retry_count = qlport_down_retry;
4625 /* Set login_retry_count */
4626 ha->login_retry_count = nv->retry_count;
4627 if (ha->port_down_retry_count == nv->port_down_retry_count &&
4628 ha->port_down_retry_count > 3)
4629 ha->login_retry_count = ha->port_down_retry_count;
4630 else if (ha->port_down_retry_count > (int)ha->login_retry_count)
4631 ha->login_retry_count = ha->port_down_retry_count;
4632 if (ql2xloginretrycount)
4633 ha->login_retry_count = ql2xloginretrycount;
4634
ad950360 4635 icb->lun_enables = cpu_to_le16(0);
1da177e4
LT		 4636 icb->command_resource_count = 0;
4637 icb->immediate_notify_resource_count = 0;
ad950360 4638 icb->timeout = cpu_to_le16(0);
1da177e4
LT		 4639
4640 if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
4641 /* Enable RIO */
4642 icb->firmware_options[0] &= ~BIT_3;
4643 icb->add_firmware_options[0] &=
4644 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0);
4645 icb->add_firmware_options[0] |= BIT_2;
4646 icb->response_accumulation_timer = 3;
4647 icb->interrupt_delay_timer = 5;
4648
e315cd28 4649 vha->flags.process_response_queue = 1;
1da177e4 4650 } else {
4fdfefe5 4651 /* Enable ZIO. */
e315cd28 4652 if (!vha->flags.init_done) {
4fdfefe5
AV		 4653 ha->zio_mode = icb->add_firmware_options[0] &
4654 (BIT_3 | BIT_2 | BIT_1 | BIT_0);
4655 ha->zio_timer = icb->interrupt_delay_timer ?
4656 icb->interrupt_delay_timer: 2;
4657 }
1da177e4
LT		 4658 icb->add_firmware_options[0] &=
4659 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0);
e315cd28 4660 vha->flags.process_response_queue = 0;
4fdfefe5 4661 if (ha->zio_mode != QLA_ZIO_DISABLED) {
4a59f71d 4662 ha->zio_mode = QLA_ZIO_MODE_6;
4663
7c3df132 4664 ql_log(ql_log_info, vha, 0x0068,
4fdfefe5
AV		 4665 "ZIO mode %d enabled; timer delay (%d us).\n",
4666 ha->zio_mode, ha->zio_timer * 100);
1da177e4 4667
4fdfefe5
AV		 4668 icb->add_firmware_options[0] |= (uint8_t)ha->zio_mode;
4669 icb->interrupt_delay_timer = (uint8_t)ha->zio_timer;
e315cd28 4670 vha->flags.process_response_queue = 1;
1da177e4
LT		 4671 }
4672 }
4673
4e08df3f 4674 if (rval) {
7c3df132
SK		 4675 ql_log(ql_log_warn, vha, 0x0069,
4676 "NVRAM configuration failed.\n");
4e08df3f
DM		 4677 }
4678 return (rval);
1da177e4
LT		 4679}
4680
19a7b4ae
JSEC		 4681static void
4682qla2x00_rport_del(void *data)
4683{
4684 fc_port_t *fcport = data;
d97994dc 4685 struct fc_rport *rport;
044d78e1 4686 unsigned long flags;
d97994dc 4687
044d78e1 4688 spin_lock_irqsave(fcport->vha->host->host_lock, flags);
ac280b67 4689 rport = fcport->drport ? fcport->drport: fcport->rport;
d97994dc 4690 fcport->drport = NULL;
044d78e1 4691 spin_unlock_irqrestore(fcport->vha->host->host_lock, flags);
726b8548 4692 if (rport) {
83548fe2
QT		 4693 ql_dbg(ql_dbg_disc, fcport->vha, 0x210b,
4694 "%s %8phN. rport %p roles %x\n",
4695 __func__, fcport->port_name, rport,
4696 rport->roles);
726b8548 4697
d97994dc 4698 fc_remote_port_delete(rport);
726b8548 4699 }
19a7b4ae
JSEC		 4700}
4701
1da177e4
LT		 4702/**
4703 * qla2x00_alloc_fcport() - Allocate a generic fcport.
2db6228d 4704 * @vha: HA context
1da177e4
LT		 4705 * @flags: allocation flags
4706 *
4707 * Returns a pointer to the allocated fcport, or NULL, if none available.
4708 */
9a069e19 4709fc_port_t *
e315cd28 4710qla2x00_alloc_fcport(scsi_qla_host_t *vha, gfp_t flags)
1da177e4
LT		 4711{
4712 fc_port_t *fcport;
4713
bbfbbbc1
MK		 4714 fcport = kzalloc(sizeof(fc_port_t), flags);
4715 if (!fcport)
4716 return NULL;
1da177e4
LT		 4717
4718 /* Setup fcport template structure. */
e315cd28 4719 fcport->vha = vha;
1da177e4
LT		 4720 fcport->port_type = FCT_UNKNOWN;
4721 fcport->loop_id = FC_NO_LOOP_ID;
ec426e10 4722 qla2x00_set_fcport_state(fcport, FCS_UNCONFIGURED);
ad3e0eda 4723 fcport->supported_classes = FC_COS_UNSPECIFIED;
1da177e4 4724
726b8548
QT		 4725 fcport->ct_desc.ct_sns = dma_alloc_coherent(&vha->hw->pdev->dev,
4726 sizeof(struct ct_sns_pkt), &fcport->ct_desc.ct_sns_dma,
6cb3216a 4727 flags);
726b8548
QT		 4728 fcport->disc_state = DSC_DELETED;
4729 fcport->fw_login_state = DSC_LS_PORT_UNAVAIL;
4730 fcport->deleted = QLA_SESS_DELETED;
4731 fcport->login_retry = vha->hw->login_retry_count;
726b8548
QT		 4732 fcport->logout_on_delete = 1;
4733
4734 if (!fcport->ct_desc.ct_sns) {
83548fe2 4735 ql_log(ql_log_warn, vha, 0xd049,
726b8548
QT		 4736 "Failed to allocate ct_sns request.\n");
4737 kfree(fcport);
4738 fcport = NULL;
4739 }
4740 INIT_WORK(&fcport->del_work, qla24xx_delete_sess_fn);
cd4ed6b4 4741 INIT_WORK(&fcport->reg_work, qla_register_fcport_fn);
726b8548
QT		 4742 INIT_LIST_HEAD(&fcport->gnl_entry);
4743 INIT_LIST_HEAD(&fcport->list);
4744
bbfbbbc1 4745 return fcport;
1da177e4
LT		 4746}
4747
726b8548
QT		 4748void
4749qla2x00_free_fcport(fc_port_t *fcport)
4750{
4751 if (fcport->ct_desc.ct_sns) {
4752 dma_free_coherent(&fcport->vha->hw->pdev->dev,
4753 sizeof(struct ct_sns_pkt), fcport->ct_desc.ct_sns,
4754 fcport->ct_desc.ct_sns_dma);
4755
4756 fcport->ct_desc.ct_sns = NULL;
4757 }
4758 kfree(fcport);
4759}
4760
1da177e4
LT		 4761/*
4762 * qla2x00_configure_loop
4763 * Updates Fibre Channel Device Database with what is actually on loop.
4764 *
4765 * Input:
4766 * ha = adapter block pointer.
4767 *
4768 * Returns:
4769 * 0 = success.
4770 * 1 = error.
4771 * 2 = database was full and device was not configured.
4772 */
4773static int
e315cd28 4774qla2x00_configure_loop(scsi_qla_host_t *vha)
1da177e4
LT		 4775{
4776 int rval;
4777 unsigned long flags, save_flags;
e315cd28 4778 struct qla_hw_data *ha = vha->hw;
1da177e4
LT		 4779 rval = QLA_SUCCESS;
4780
4781 /* Get Initiator ID */
e315cd28
AC		 4782 if (test_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags)) {
4783 rval = qla2x00_configure_hba(vha);
1da177e4 4784 if (rval != QLA_SUCCESS) {
7c3df132
SK		 4785 ql_dbg(ql_dbg_disc, vha, 0x2013,
4786 "Unable to configure HBA.\n");
1da177e4
LT		 4787 return (rval);
4788 }
4789 }
4790
e315cd28 4791 save_flags = flags = vha->dpc_flags;
7c3df132
SK		 4792 ql_dbg(ql_dbg_disc, vha, 0x2014,
4793 "Configure loop -- dpc flags = 0x%lx.\n", flags);
1da177e4
LT		 4794
4795 /*
4796 * If we have both an RSCN and PORT UPDATE pending then handle them
4797 * both at the same time.
4798 */
e315cd28
AC		 4799 clear_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
4800 clear_bit(RSCN_UPDATE, &vha->dpc_flags);
1da177e4 4801
3064ff39
MH		 4802 qla2x00_get_data_rate(vha);
4803
1da177e4
LT		 4804 /* Determine what we need to do */
4805 if (ha->current_topology == ISP_CFG_FL &&
4806 (test_bit(LOCAL_LOOP_UPDATE, &flags))) {
4807
1da177e4
LT		 4808 set_bit(RSCN_UPDATE, &flags);
4809
4810 } else if (ha->current_topology == ISP_CFG_F &&
4811 (test_bit(LOCAL_LOOP_UPDATE, &flags))) {
4812
1da177e4
LT		 4813 set_bit(RSCN_UPDATE, &flags);
4814 clear_bit(LOCAL_LOOP_UPDATE, &flags);
21333b48
AV		 4815
4816 } else if (ha->current_topology == ISP_CFG_N) {
4817 clear_bit(RSCN_UPDATE, &flags);
48acad09
QT		 4818 if (qla_tgt_mode_enabled(vha)) {
4819 /* allow the other side to start the login */
9cd883f0
QT		 4820 clear_bit(LOCAL_LOOP_UPDATE, &flags);
4821 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
9cd883f0 4822 }
41dc529a
QT		 4823 } else if (ha->current_topology == ISP_CFG_NL) {
4824 clear_bit(RSCN_UPDATE, &flags);
4825 set_bit(LOCAL_LOOP_UPDATE, &flags);
e315cd28 4826 } else if (!vha->flags.online ||
1da177e4 4827 (test_bit(ABORT_ISP_ACTIVE, &flags))) {
1da177e4
LT		 4828 set_bit(RSCN_UPDATE, &flags);
4829 set_bit(LOCAL_LOOP_UPDATE, &flags);
4830 }
4831
4832 if (test_bit(LOCAL_LOOP_UPDATE, &flags)) {
7c3df132
SK		 4833 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) {
4834 ql_dbg(ql_dbg_disc, vha, 0x2015,
4835 "Loop resync needed, failing.\n");
1da177e4 4836 rval = QLA_FUNCTION_FAILED;
642ef983 4837 } else
e315cd28 4838 rval = qla2x00_configure_local_loop(vha);
1da177e4
LT		 4839 }
4840
4841 if (rval == QLA_SUCCESS && test_bit(RSCN_UPDATE, &flags)) {
7c3df132 4842 if (LOOP_TRANSITION(vha)) {
83548fe2 4843 ql_dbg(ql_dbg_disc, vha, 0x2099,
7c3df132 4844 "Needs RSCN update and loop transition.\n");
1da177e4 4845 rval = QLA_FUNCTION_FAILED;
7c3df132 4846 }
e315cd28
AC		 4847 else
4848 rval = qla2x00_configure_fabric(vha);
1da177e4
LT		 4849 }
4850
4851 if (rval == QLA_SUCCESS) {
e315cd28
AC		 4852 if (atomic_read(&vha->loop_down_timer) ||
4853 test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) {
1da177e4
LT		 4854 rval = QLA_FUNCTION_FAILED;
4855 } else {
e315cd28 4856 atomic_set(&vha->loop_state, LOOP_READY);
7c3df132
SK		 4857 ql_dbg(ql_dbg_disc, vha, 0x2069,
4858 "LOOP READY.\n");
ec7193e2 4859 ha->flags.fw_init_done = 1;
3bb67df5
DKU		 4860
4861 /*
4862 * Process any ATIO queue entries that came in
4863 * while we weren't online.
4864 */
ead03855
QT		 4865 if (qla_tgt_mode_enabled(vha) ||
4866 qla_dual_mode_enabled(vha)) {
3bb67df5
DKU		 4867 if (IS_QLA27XX(ha) || IS_QLA83XX(ha)) {
4868 spin_lock_irqsave(&ha->tgt.atio_lock,
4869 flags);
4870 qlt_24xx_process_atio_queue(vha, 0);
4871 spin_unlock_irqrestore(
4872 &ha->tgt.atio_lock, flags);
4873 } else {
4874 spin_lock_irqsave(&ha->hardware_lock,
4875 flags);
4876 qlt_24xx_process_atio_queue(vha, 1);
4877 spin_unlock_irqrestore(
4878 &ha->hardware_lock, flags);
4879 }
4880 }
1da177e4
LT		 4881 }
4882 }
4883
4884 if (rval) {
7c3df132
SK		 4885 ql_dbg(ql_dbg_disc, vha, 0x206a,
4886 "%s *** FAILED ***.\n", __func__);
1da177e4 4887 } else {
7c3df132
SK		 4888 ql_dbg(ql_dbg_disc, vha, 0x206b,
4889 "%s: exiting normally.\n", __func__);
1da177e4
LT		 4890 }
4891
cc3ef7bc 4892 /* Restore state if a resync event occurred during processing */
e315cd28 4893 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) {
1da177e4 4894 if (test_bit(LOCAL_LOOP_UPDATE, &save_flags))
e315cd28 4895 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
f4658b6c 4896 if (test_bit(RSCN_UPDATE, &save_flags)) {
e315cd28 4897 set_bit(RSCN_UPDATE, &vha->dpc_flags);
f4658b6c 4898 }
1da177e4
LT		 4899 }
4900
4901 return (rval);
4902}
4903
1da177e4
LT		 4904/*
4905 * qla2x00_configure_local_loop
4906 * Updates Fibre Channel Device Database with local loop devices.
4907 *
4908 * Input:
4909 * ha = adapter block pointer.
4910 *
4911 * Returns:
4912 * 0 = success.
4913 */
4914static int
e315cd28 4915qla2x00_configure_local_loop(scsi_qla_host_t *vha)
1da177e4
LT		 4916{
4917 int rval, rval2;
4918 int found_devs;
4919 int found;
4920 fc_port_t *fcport, *new_fcport;
4921
4922 uint16_t index;
4923 uint16_t entries;
4924 char *id_iter;
4925 uint16_t loop_id;
4926 uint8_t domain, area, al_pa;
e315cd28 4927 struct qla_hw_data *ha = vha->hw;
41dc529a 4928 unsigned long flags;
1da177e4 4929
8777e431
QT		 4930 /* Inititae N2N login. */
4931 if (test_and_clear_bit(N2N_LOGIN_NEEDED, &vha->dpc_flags)) {
4932 /* borrowing */
4933 u32 *bp, i, sz;
4934
4935 memset(ha->init_cb, 0, ha->init_cb_size);
4936 sz = min_t(int, sizeof(struct els_plogi_payload),
4937 ha->init_cb_size);
4938 rval = qla24xx_get_port_login_templ(vha, ha->init_cb_dma,
4939 (void *)ha->init_cb, sz);
4940 if (rval == QLA_SUCCESS) {
4941 bp = (uint32_t *)ha->init_cb;
4942 for (i = 0; i < sz/4 ; i++, bp++)
4943 *bp = cpu_to_be32(*bp);
4944
4945 memcpy(&ha->plogi_els_payld.data, (void *)ha->init_cb,
4946 sizeof(ha->plogi_els_payld.data));
4947 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
4948 } else {
4949 ql_dbg(ql_dbg_init, vha, 0x00d1,
4950 "PLOGI ELS param read fail.\n");
4951 }
4952 return QLA_SUCCESS;
4953 }
4954
1da177e4
LT		 4955 found_devs = 0;
4956 new_fcport = NULL;
642ef983 4957 entries = MAX_FIBRE_DEVICES_LOOP;
1da177e4 4958
1da177e4 4959 /* Get list of logged in devices. */
642ef983 4960 memset(ha->gid_list, 0, qla2x00_gid_list_size(ha));
e315cd28 4961 rval = qla2x00_get_id_list(vha, ha->gid_list, ha->gid_list_dma,
1da177e4
LT		 4962 &entries);
4963 if (rval != QLA_SUCCESS)
4964 goto cleanup_allocation;
4965
83548fe2 4966 ql_dbg(ql_dbg_disc, vha, 0x2011,
7c3df132
SK		 4967 "Entries in ID list (%d).\n", entries);
4968 ql_dump_buffer(ql_dbg_disc + ql_dbg_buffer, vha, 0x2075,
4969 (uint8_t *)ha->gid_list,
4970 entries * sizeof(struct gid_list_info));
1da177e4 4971
9cd883f0
QT		 4972 list_for_each_entry(fcport, &vha->vp_fcports, list) {
4973 fcport->scan_state = QLA_FCPORT_SCAN;
4974 }
4975
1da177e4 4976 /* Allocate temporary fcport for any new fcports discovered. */
e315cd28 4977 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
1da177e4 4978 if (new_fcport == NULL) {
83548fe2 4979 ql_log(ql_log_warn, vha, 0x2012,
7c3df132 4980 "Memory allocation failed for fcport.\n");
1da177e4
LT		 4981 rval = QLA_MEMORY_ALLOC_FAILED;
4982 goto cleanup_allocation;
4983 }
4984 new_fcport->flags &= ~FCF_FABRIC_DEVICE;
4985
1da177e4
LT		 4986 /* Add devices to port list. */
4987 id_iter = (char *)ha->gid_list;
4988 for (index = 0; index < entries; index++) {
4989 domain = ((struct gid_list_info *)id_iter)->domain;
4990 area = ((struct gid_list_info *)id_iter)->area;
4991 al_pa = ((struct gid_list_info *)id_iter)->al_pa;
abbd8870 4992 if (IS_QLA2100(ha) || IS_QLA2200(ha))
1da177e4
LT		 4993 loop_id = (uint16_t)
4994 ((struct gid_list_info *)id_iter)->loop_id_2100;
abbd8870 4995 else
1da177e4
LT		 4996 loop_id = le16_to_cpu(
4997 ((struct gid_list_info *)id_iter)->loop_id);
abbd8870 4998 id_iter += ha->gid_list_info_size;
1da177e4
LT		 4999
5000 /* Bypass reserved domain fields. */
5001 if ((domain & 0xf0) == 0xf0)
5002 continue;
5003
5004 /* Bypass if not same domain and area of adapter. */
f7d289f6 5005 if (area && domain &&
e315cd28 5006 (area != vha->d_id.b.area || domain != vha->d_id.b.domain))
1da177e4
LT		 5007 continue;
5008
5009 /* Bypass invalid local loop ID. */
5010 if (loop_id > LAST_LOCAL_LOOP_ID)
5011 continue;
5012
41dc529a 5013 memset(new_fcport->port_name, 0, WWN_SIZE);
370d550e 5014
1da177e4
LT		 5015 /* Fill in member data. */
5016 new_fcport->d_id.b.domain = domain;
5017 new_fcport->d_id.b.area = area;
5018 new_fcport->d_id.b.al_pa = al_pa;
5019 new_fcport->loop_id = loop_id;
9cd883f0 5020 new_fcport->scan_state = QLA_FCPORT_FOUND;
41dc529a 5021
e315cd28 5022 rval2 = qla2x00_get_port_database(vha, new_fcport, 0);
1da177e4 5023 if (rval2 != QLA_SUCCESS) {
83548fe2 5024 ql_dbg(ql_dbg_disc, vha, 0x2097,
7c3df132
SK		 5025 "Failed to retrieve fcport information "
5026 "-- get_port_database=%x, loop_id=0x%04x.\n",
5027 rval2, new_fcport->loop_id);
edd05de1
DG		 5028 /* Skip retry if N2N */
5029 if (ha->current_topology != ISP_CFG_N) {
5030 ql_dbg(ql_dbg_disc, vha, 0x2105,
5031 "Scheduling resync.\n");
5032 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
5033 continue;
5034 }
1da177e4
LT		 5035 }
5036
41dc529a 5037 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
1da177e4
LT		 5038 /* Check for matching device in port list. */
5039 found = 0;
5040 fcport = NULL;
e315cd28 5041 list_for_each_entry(fcport, &vha->vp_fcports, list) {
1da177e4
LT		 5042 if (memcmp(new_fcport->port_name, fcport->port_name,
5043 WWN_SIZE))
5044 continue;
5045
ddb9b126 5046 fcport->flags &= ~FCF_FABRIC_DEVICE;
1da177e4
LT		 5047 fcport->loop_id = new_fcport->loop_id;
5048 fcport->port_type = new_fcport->port_type;
5049 fcport->d_id.b24 = new_fcport->d_id.b24;
5050 memcpy(fcport->node_name, new_fcport->node_name,
5051 WWN_SIZE);
9cd883f0 5052 fcport->scan_state = QLA_FCPORT_FOUND;
1da177e4
LT		 5053 found++;
5054 break;
5055 }
5056
5057 if (!found) {
5058 /* New device, add to fcports list. */
e315cd28 5059 list_add_tail(&new_fcport->list, &vha->vp_fcports);
1da177e4
LT		 5060
5061 /* Allocate a new replacement fcport. */
5062 fcport = new_fcport;
41dc529a
QT		 5063
5064 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
5065
e315cd28 5066 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
41dc529a 5067
1da177e4 5068 if (new_fcport == NULL) {
83548fe2 5069 ql_log(ql_log_warn, vha, 0xd031,
7c3df132 5070 "Failed to allocate memory for fcport.\n");
1da177e4
LT		 5071 rval = QLA_MEMORY_ALLOC_FAILED;
5072 goto cleanup_allocation;
5073 }
41dc529a 5074 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
1da177e4
LT		 5075 new_fcport->flags &= ~FCF_FABRIC_DEVICE;
5076 }
5077
41dc529a
QT		 5078 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
5079
d8b45213 5080 /* Base iIDMA settings on HBA port speed. */
a3cbdfad 5081 fcport->fp_speed = ha->link_data_rate;
d8b45213 5082
1da177e4
LT		 5083 found_devs++;
5084 }
5085
9cd883f0
QT		 5086 list_for_each_entry(fcport, &vha->vp_fcports, list) {
5087 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
5088 break;
5089
5090 if (fcport->scan_state == QLA_FCPORT_SCAN) {
5091 if ((qla_dual_mode_enabled(vha) ||
5092 qla_ini_mode_enabled(vha)) &&
5093 atomic_read(&fcport->state) == FCS_ONLINE) {
5094 qla2x00_mark_device_lost(vha, fcport,
5095 ql2xplogiabsentdevice, 0);
5096 if (fcport->loop_id != FC_NO_LOOP_ID &&
5097 (fcport->flags & FCF_FCP2_DEVICE) == 0 &&
5098 fcport->port_type != FCT_INITIATOR &&
5099 fcport->port_type != FCT_BROADCAST) {
5100 ql_dbg(ql_dbg_disc, vha, 0x20f0,
5101 "%s %d %8phC post del sess\n",
5102 __func__, __LINE__,
5103 fcport->port_name);
5104
d8630bb9 5105 qlt_schedule_sess_for_deletion(fcport);
9cd883f0
QT		 5106 continue;
5107 }
5108 }
5109 }
5110
5111 if (fcport->scan_state == QLA_FCPORT_FOUND)
5112 qla24xx_fcport_handle_login(vha, fcport);
5113 }
5114
1da177e4 5115cleanup_allocation:
c9475cb0 5116 kfree(new_fcport);
1da177e4
LT		 5117
5118 if (rval != QLA_SUCCESS) {
83548fe2 5119 ql_dbg(ql_dbg_disc, vha, 0x2098,
7c3df132 5120 "Configure local loop error exit: rval=%x.\n", rval);
1da177e4
LT		 5121 }
5122
1da177e4
LT		 5123 return (rval);
5124}
5125
d8b45213 5126static void
e315cd28 5127qla2x00_iidma_fcport(scsi_qla_host_t *vha, fc_port_t *fcport)
d8b45213 5128{
d8b45213 5129 int rval;
93f2bd67 5130 uint16_t mb[MAILBOX_REGISTER_COUNT];
e315cd28 5131 struct qla_hw_data *ha = vha->hw;
d8b45213 5132
c76f2c01 5133 if (!IS_IIDMA_CAPABLE(ha))
d8b45213
AV		 5134 return;
5135
c9afb9a2
GM		 5136 if (atomic_read(&fcport->state) != FCS_ONLINE)
5137 return;
5138
39bd9622 5139 if (fcport->fp_speed == PORT_SPEED_UNKNOWN ||
413c2f33
HM		 5140 fcport->fp_speed > ha->link_data_rate ||
5141 !ha->flags.gpsc_supported)
d8b45213
AV		 5142 return;
5143
e315cd28 5144 rval = qla2x00_set_idma_speed(vha, fcport->loop_id, fcport->fp_speed,
a3cbdfad 5145 mb);
d8b45213 5146 if (rval != QLA_SUCCESS) {
7c3df132 5147 ql_dbg(ql_dbg_disc, vha, 0x2004,
7b833558
OK		 5148 "Unable to adjust iIDMA %8phN -- %04x %x %04x %04x.\n",
5149 fcport->port_name, rval, fcport->fp_speed, mb[0], mb[1]);
d8b45213 5150 } else {
7c3df132 5151 ql_dbg(ql_dbg_disc, vha, 0x2005,
33b28357 5152 "iIDMA adjusted to %s GB/s (%X) on %8phN.\n",
d0297c9a 5153 qla2x00_get_link_speed_str(ha, fcport->fp_speed),
33b28357 5154 fcport->fp_speed, fcport->port_name);
d8b45213
AV		 5155 }
5156}
5157
cc28e0ac
QT		 5158void qla_do_iidma_work(struct scsi_qla_host *vha, fc_port_t *fcport)
5159{
5160 qla2x00_iidma_fcport(vha, fcport);
5161 qla24xx_update_fcport_fcp_prio(vha, fcport);
5162}
5163
5164int qla_post_iidma_work(struct scsi_qla_host *vha, fc_port_t *fcport)
5165{
5166 struct qla_work_evt *e;
5167
5168 e = qla2x00_alloc_work(vha, QLA_EVT_IIDMA);
5169 if (!e)
5170 return QLA_FUNCTION_FAILED;
5171
5172 e->u.fcport.fcport = fcport;
5173 return qla2x00_post_work(vha, e);
5174}
5175
726b8548 5176/* qla2x00_reg_remote_port is reserved for Initiator Mode only.*/
23be331d 5177static void
e315cd28 5178qla2x00_reg_remote_port(scsi_qla_host_t *vha, fc_port_t *fcport)
8482e118 5179{
5180 struct fc_rport_identifiers rport_ids;
bdf79621 5181 struct fc_rport *rport;
044d78e1 5182 unsigned long flags;
8482e118 5183
b63d8b89
QT		 5184 if (atomic_read(&fcport->state) == FCS_ONLINE)
5185 return;
5186
f8b02a85
AV		 5187 rport_ids.node_name = wwn_to_u64(fcport->node_name);
5188 rport_ids.port_name = wwn_to_u64(fcport->port_name);
8482e118 5189 rport_ids.port_id = fcport->d_id.b.domain << 16 |
5190 fcport->d_id.b.area << 8 | fcport->d_id.b.al_pa;
77d74143 5191 rport_ids.roles = FC_RPORT_ROLE_UNKNOWN;
e315cd28 5192 fcport->rport = rport = fc_remote_port_add(vha->host, 0, &rport_ids);
77d74143 5193 if (!rport) {
7c3df132
SK		 5194 ql_log(ql_log_warn, vha, 0x2006,
5195 "Unable to allocate fc remote port.\n");
77d74143
AV		 5196 return;
5197 }
2d70c103 5198
044d78e1 5199 spin_lock_irqsave(fcport->vha->host->host_lock, flags);
19a7b4ae 5200 *((fc_port_t **)rport->dd_data) = fcport;
044d78e1 5201 spin_unlock_irqrestore(fcport->vha->host->host_lock, flags);
d97994dc 5202
ad3e0eda 5203 rport->supported_classes = fcport->supported_classes;
77d74143 5204
8482e118 5205 rport_ids.roles = FC_RPORT_ROLE_UNKNOWN;
5206 if (fcport->port_type == FCT_INITIATOR)
5207 rport_ids.roles |= FC_RPORT_ROLE_FCP_INITIATOR;
5208 if (fcport->port_type == FCT_TARGET)
5209 rport_ids.roles |= FC_RPORT_ROLE_FCP_TARGET;
726b8548 5210
83548fe2
QT		 5211 ql_dbg(ql_dbg_disc, vha, 0x20ee,
5212 "%s %8phN. rport %p is %s mode\n",
5213 __func__, fcport->port_name, rport,
5214 (fcport->port_type == FCT_TARGET) ? "tgt" : "ini");
726b8548 5215
77d74143 5216 fc_remote_port_rolechg(rport, rport_ids.roles);
1da177e4
LT		 5217}
5218
23be331d
AB		 5219/*
5220 * qla2x00_update_fcport
5221 * Updates device on list.
5222 *
5223 * Input:
5224 * ha = adapter block pointer.
5225 * fcport = port structure pointer.
5226 *
5227 * Return:
5228 * 0 - Success
5229 * BIT_0 - error
5230 *
5231 * Context:
5232 * Kernel context.
5233 */
5234void
e315cd28 5235qla2x00_update_fcport(scsi_qla_host_t *vha, fc_port_t *fcport)
23be331d 5236{
726b8548
QT		 5237 if (IS_SW_RESV_ADDR(fcport->d_id))
5238 return;
5239
cd4ed6b4
QT		 5240 ql_dbg(ql_dbg_disc, vha, 0x20ef, "%s %8phC\n",
5241 __func__, fcport->port_name);
5242
5243 fcport->disc_state = DSC_UPD_FCPORT;
5244 fcport->login_retry = vha->hw->login_retry_count;
b63d8b89 5245 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT);
b63d8b89
QT		 5246 fcport->deleted = 0;
5247 fcport->logout_on_delete = 1;
5248 fcport->login_retry = vha->hw->login_retry_count;
8777e431 5249 fcport->n2n_chip_reset = fcport->n2n_link_reset_cnt = 0;
23be331d 5250
dbe18018
DT		 5251 qla2x00_iidma_fcport(vha, fcport);
5252
8777e431
QT		 5253 switch (vha->hw->current_topology) {
5254 case ISP_CFG_N:
5255 case ISP_CFG_NL:
5256 fcport->keep_nport_handle = 1;
5257 break;
5258 default:
5259 break;
5260 }
5261
e84067d7
DG		 5262 if (fcport->fc4f_nvme) {
5263 qla_nvme_register_remote(vha, fcport);
b63d8b89
QT		 5264 fcport->disc_state = DSC_LOGIN_COMPLETE;
5265 qla2x00_set_fcport_state(fcport, FCS_ONLINE);
e84067d7
DG		 5266 return;
5267 }
5268
21090cbe 5269 qla24xx_update_fcport_fcp_prio(vha, fcport);
d20ed91b 5270
726b8548
QT		 5271 switch (vha->host->active_mode) {
5272 case MODE_INITIATOR:
d20ed91b 5273 qla2x00_reg_remote_port(vha, fcport);
726b8548
QT		 5274 break;
5275 case MODE_TARGET:
5276 if (!vha->vha_tgt.qla_tgt->tgt_stop &&
5277 !vha->vha_tgt.qla_tgt->tgt_stopped)
5278 qlt_fc_port_added(vha, fcport);
5279 break;
5280 case MODE_DUAL:
d20ed91b 5281 qla2x00_reg_remote_port(vha, fcport);
726b8548
QT		 5282 if (!vha->vha_tgt.qla_tgt->tgt_stop &&
5283 !vha->vha_tgt.qla_tgt->tgt_stopped)
5284 qlt_fc_port_added(vha, fcport);
5285 break;
5286 default:
5287 break;
d20ed91b 5288 }
cc28e0ac
QT		 5289
5290 if (IS_IIDMA_CAPABLE(vha->hw) && vha->hw->flags.gpsc_supported) {
5291 if (fcport->id_changed) {
5292 fcport->id_changed = 0;
5293 ql_dbg(ql_dbg_disc, vha, 0x20d7,
5294 "%s %d %8phC post gfpnid fcp_cnt %d\n",
5295 __func__, __LINE__, fcport->port_name,
5296 vha->fcport_count);
5297 qla24xx_post_gfpnid_work(vha, fcport);
5298 } else {
5299 ql_dbg(ql_dbg_disc, vha, 0x20d7,
5300 "%s %d %8phC post gpsc fcp_cnt %d\n",
5301 __func__, __LINE__, fcport->port_name,
5302 vha->fcport_count);
5303 qla24xx_post_gpsc_work(vha, fcport);
5304 }
5305 }
b63d8b89 5306 qla2x00_set_fcport_state(fcport, FCS_ONLINE);
cd4ed6b4
QT		 5307
5308 fcport->disc_state = DSC_LOGIN_COMPLETE;
5309}
5310
5311void qla_register_fcport_fn(struct work_struct *work)
5312{
5313 fc_port_t *fcport = container_of(work, struct fc_port, reg_work);
5314 u32 rscn_gen = fcport->rscn_gen;
5315 u16 data[2];
5316
5317 if (IS_SW_RESV_ADDR(fcport->d_id))
5318 return;
5319
5320 qla2x00_update_fcport(fcport->vha, fcport);
5321
5322 if (rscn_gen != fcport->rscn_gen) {
5323 /* RSCN(s) came in while registration */
5324 switch (fcport->next_disc_state) {
5325 case DSC_DELETE_PEND:
5326 qlt_schedule_sess_for_deletion(fcport);
5327 break;
5328 case DSC_ADISC:
5329 data[0] = data[1] = 0;
5330 qla2x00_post_async_adisc_work(fcport->vha, fcport,
5331 data);
5332 break;
5333 default:
5334 break;
5335 }
5336 }
23be331d
AB		 5337}
5338
1da177e4
LT		 5339/*
5340 * qla2x00_configure_fabric
5341 * Setup SNS devices with loop ID's.
5342 *
5343 * Input:
5344 * ha = adapter block pointer.
5345 *
5346 * Returns:
5347 * 0 = success.
5348 * BIT_0 = error
5349 */
5350static int
e315cd28 5351qla2x00_configure_fabric(scsi_qla_host_t *vha)
1da177e4 5352{
b3b02e6e 5353 int rval;
726b8548 5354 fc_port_t *fcport;
1da177e4 5355 uint16_t mb[MAILBOX_REGISTER_COUNT];
0107109e 5356 uint16_t loop_id;
1da177e4 5357 LIST_HEAD(new_fcports);
e315cd28 5358 struct qla_hw_data *ha = vha->hw;
df673274 5359 int discovery_gen;
1da177e4
LT		 5360
5361 /* If FL port exists, then SNS is present */
e428924c 5362 if (IS_FWI2_CAPABLE(ha))
0107109e
AV		 5363 loop_id = NPH_F_PORT;
5364 else
5365 loop_id = SNS_FL_PORT;
e315cd28 5366 rval = qla2x00_get_port_name(vha, loop_id, vha->fabric_node_name, 1);
1da177e4 5367 if (rval != QLA_SUCCESS) {
83548fe2 5368 ql_dbg(ql_dbg_disc, vha, 0x20a0,
7c3df132 5369 "MBX_GET_PORT_NAME failed, No FL Port.\n");
1da177e4 5370
e315cd28 5371 vha->device_flags &= ~SWITCH_FOUND;
1da177e4
LT		 5372 return (QLA_SUCCESS);
5373 }
e315cd28 5374 vha->device_flags |= SWITCH_FOUND;
1da177e4 5375
41dc529a
QT		 5376
5377 if (qla_tgt_mode_enabled(vha) || qla_dual_mode_enabled(vha)) {
5378 rval = qla2x00_send_change_request(vha, 0x3, 0);
5379 if (rval != QLA_SUCCESS)
5380 ql_log(ql_log_warn, vha, 0x121,
5381 "Failed to enable receiving of RSCN requests: 0x%x.\n",
5382 rval);
5383 }
5384
5385
1da177e4 5386 do {
726b8548
QT		 5387 qla2x00_mgmt_svr_login(vha);
5388
cca5335c
AV		 5389 /* FDMI support. */
5390 if (ql2xfdmienable &&
e315cd28
AC		 5391 test_and_clear_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags))
5392 qla2x00_fdmi_register(vha);
cca5335c 5393
1da177e4 5394 /* Ensure we are logged into the SNS. */
a14c7711 5395 loop_id = NPH_SNS_LID(ha);
0b91d116
CD		 5396 rval = ha->isp_ops->fabric_login(vha, loop_id, 0xff, 0xff,
5397 0xfc, mb, BIT_1|BIT_0);
a14c7711
JC		 5398 if (rval != QLA_SUCCESS || mb[0] != MBS_COMMAND_COMPLETE) {
5399 ql_dbg(ql_dbg_disc, vha, 0x20a1,
5400 "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x mb[2]=%x mb[6]=%x mb[7]=%x (%x).\n",
5401 loop_id, mb[0], mb[1], mb[2], mb[6], mb[7], rval);
0b91d116 5402 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
e452ceb6 5403 return rval;
0b91d116 5404 }
e315cd28
AC		 5405 if (test_and_clear_bit(REGISTER_FC4_NEEDED, &vha->dpc_flags)) {
5406 if (qla2x00_rft_id(vha)) {
1da177e4 5407 /* EMPTY */
83548fe2 5408 ql_dbg(ql_dbg_disc, vha, 0x20a2,
7c3df132 5409 "Register FC-4 TYPE failed.\n");
b98ae0d7
QT		 5410 if (test_bit(LOOP_RESYNC_NEEDED,
5411 &vha->dpc_flags))
5412 break;
1da177e4 5413 }
d3bae931 5414 if (qla2x00_rff_id(vha, FC4_TYPE_FCP_SCSI)) {
1da177e4 5415 /* EMPTY */
83548fe2 5416 ql_dbg(ql_dbg_disc, vha, 0x209a,
7c3df132 5417 "Register FC-4 Features failed.\n");
b98ae0d7
QT		 5418 if (test_bit(LOOP_RESYNC_NEEDED,
5419 &vha->dpc_flags))
5420 break;
1da177e4 5421 }
d3bae931
DG		 5422 if (vha->flags.nvme_enabled) {
5423 if (qla2x00_rff_id(vha, FC_TYPE_NVME)) {
5424 ql_dbg(ql_dbg_disc, vha, 0x2049,
5425 "Register NVME FC Type Features failed.\n");
5426 }
5427 }
e315cd28 5428 if (qla2x00_rnn_id(vha)) {
1da177e4 5429 /* EMPTY */
83548fe2 5430 ql_dbg(ql_dbg_disc, vha, 0x2104,
7c3df132 5431 "Register Node Name failed.\n");
b98ae0d7
QT		 5432 if (test_bit(LOOP_RESYNC_NEEDED,
5433 &vha->dpc_flags))
5434 break;
e315cd28 5435 } else if (qla2x00_rsnn_nn(vha)) {
1da177e4 5436 /* EMPTY */
83548fe2 5437 ql_dbg(ql_dbg_disc, vha, 0x209b,
0bf0efa1 5438 "Register Symbolic Node Name failed.\n");
b98ae0d7
QT		 5439 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
5440 break;
1da177e4
LT		 5441 }
5442 }
5443
827210ba 5444
df673274
AP		 5445 /* Mark the time right before querying FW for connected ports.
5446 * This process is long, asynchronous and by the time it's done,
5447 * collected information might not be accurate anymore. E.g.
5448 * disconnected port might have re-connected and a brand new
5449 * session has been created. In this case session's generation
5450 * will be newer than discovery_gen. */
5451 qlt_do_generation_tick(vha, &discovery_gen);
5452
a4239945 5453 if (USE_ASYNC_SCAN(ha)) {
33b28357
QT		 5454 rval = qla24xx_async_gpnft(vha, FC4_TYPE_FCP_SCSI,
5455 NULL);
a4239945
QT		 5456 if (rval)
5457 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
5458 } else {
f352eeb7
QT		 5459 list_for_each_entry(fcport, &vha->vp_fcports, list)
5460 fcport->scan_state = QLA_FCPORT_SCAN;
5461
a4239945
QT		 5462 rval = qla2x00_find_all_fabric_devs(vha);
5463 }
1da177e4
LT		 5464 if (rval != QLA_SUCCESS)
5465 break;
1da177e4
LT		 5466 } while (0);
5467
e84067d7
DG		 5468 if (!vha->nvme_local_port && vha->flags.nvme_enabled)
5469 qla_nvme_register_hba(vha);
5470
726b8548 5471 if (rval)
7c3df132
SK		 5472 ql_dbg(ql_dbg_disc, vha, 0x2068,
5473 "Configure fabric error exit rval=%d.\n", rval);
1da177e4
LT		 5474
5475 return (rval);
5476}
5477
1da177e4
LT		 5478/*
5479 * qla2x00_find_all_fabric_devs
5480 *
5481 * Input:
5482 * ha = adapter block pointer.
5483 * dev = database device entry pointer.
5484 *
5485 * Returns:
5486 * 0 = success.
5487 *
5488 * Context:
5489 * Kernel context.
5490 */
5491static int
726b8548 5492qla2x00_find_all_fabric_devs(scsi_qla_host_t *vha)
1da177e4
LT		 5493{
5494 int rval;
5495 uint16_t loop_id;
726b8548 5496 fc_port_t *fcport, *new_fcport;
1da177e4
LT		 5497 int found;
5498
5499 sw_info_t *swl;
5500 int swl_idx;
5501 int first_dev, last_dev;
1516ef44 5502 port_id_t wrap = {}, nxt_d_id;
e315cd28 5503 struct qla_hw_data *ha = vha->hw;
bb4cf5b7 5504 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
726b8548 5505 unsigned long flags;
1da177e4
LT		 5506
5507 rval = QLA_SUCCESS;
5508
5509 /* Try GID_PT to get device list, else GAN. */
7a67735b 5510 if (!ha->swl)
642ef983 5511 ha->swl = kcalloc(ha->max_fibre_devices, sizeof(sw_info_t),
7a67735b
AV		 5512 GFP_KERNEL);
5513 swl = ha->swl;
bbfbbbc1 5514 if (!swl) {
1da177e4 5515 /*EMPTY*/
83548fe2 5516 ql_dbg(ql_dbg_disc, vha, 0x209c,
7c3df132 5517 "GID_PT allocations failed, fallback on GA_NXT.\n");
1da177e4 5518 } else {
642ef983 5519 memset(swl, 0, ha->max_fibre_devices * sizeof(sw_info_t));
e315cd28 5520 if (qla2x00_gid_pt(vha, swl) != QLA_SUCCESS) {
1da177e4 5521 swl = NULL;
b98ae0d7
QT		 5522 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
5523 return rval;
e315cd28 5524 } else if (qla2x00_gpn_id(vha, swl) != QLA_SUCCESS) {
1da177e4 5525 swl = NULL;
b98ae0d7
QT		 5526 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
5527 return rval;
e315cd28 5528 } else if (qla2x00_gnn_id(vha, swl) != QLA_SUCCESS) {
1da177e4 5529 swl = NULL;
b98ae0d7
QT		 5530 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
5531 return rval;
726b8548
QT		 5532 } else if (qla2x00_gfpn_id(vha, swl) != QLA_SUCCESS) {
5533 swl = NULL;
b98ae0d7
QT		 5534 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
5535 return rval;
1da177e4 5536 }
e8c72ba5
CD		 5537
5538 /* If other queries succeeded probe for FC-4 type */
b98ae0d7 5539 if (swl) {
e8c72ba5 5540 qla2x00_gff_id(vha, swl);
b98ae0d7
QT		 5541 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
5542 return rval;
5543 }
1da177e4
LT		 5544 }
5545 swl_idx = 0;
5546
5547 /* Allocate temporary fcport for any new fcports discovered. */
e315cd28 5548 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
1da177e4 5549 if (new_fcport == NULL) {
83548fe2 5550 ql_log(ql_log_warn, vha, 0x209d,
7c3df132 5551 "Failed to allocate memory for fcport.\n");
1da177e4
LT		 5552 return (QLA_MEMORY_ALLOC_FAILED);
5553 }
5554 new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED);
1da177e4
LT		 5555 /* Set start port ID scan at adapter ID. */
5556 first_dev = 1;
5557 last_dev = 0;
5558
5559 /* Starting free loop ID. */
e315cd28
AC		 5560 loop_id = ha->min_external_loopid;
5561 for (; loop_id <= ha->max_loop_id; loop_id++) {
5562 if (qla2x00_is_reserved_id(vha, loop_id))
1da177e4
LT		 5563 continue;
5564
3a6478df
GM		 5565 if (ha->current_topology == ISP_CFG_FL &&
5566 (atomic_read(&vha->loop_down_timer) ||
5567 LOOP_TRANSITION(vha))) {
bb2d52b2
AV		 5568 atomic_set(&vha->loop_down_timer, 0);
5569 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
5570 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
1da177e4 5571 break;
bb2d52b2 5572 }
1da177e4
LT		 5573
5574 if (swl != NULL) {
5575 if (last_dev) {
5576 wrap.b24 = new_fcport->d_id.b24;
5577 } else {
5578 new_fcport->d_id.b24 = swl[swl_idx].d_id.b24;
5579 memcpy(new_fcport->node_name,
5580 swl[swl_idx].node_name, WWN_SIZE);
5581 memcpy(new_fcport->port_name,
5582 swl[swl_idx].port_name, WWN_SIZE);
d8b45213
AV		 5583 memcpy(new_fcport->fabric_port_name,
5584 swl[swl_idx].fabric_port_name, WWN_SIZE);
5585 new_fcport->fp_speed = swl[swl_idx].fp_speed;
e8c72ba5 5586 new_fcport->fc4_type = swl[swl_idx].fc4_type;
1da177e4 5587
a5d42f4c 5588 new_fcport->nvme_flag = 0;
1a28faa0 5589 new_fcport->fc4f_nvme = 0;
a5d42f4c
DG		 5590 if (vha->flags.nvme_enabled &&
5591 swl[swl_idx].fc4f_nvme) {
5592 new_fcport->fc4f_nvme =
5593 swl[swl_idx].fc4f_nvme;
5594 ql_log(ql_log_info, vha, 0x2131,
5595 "FOUND: NVME port %8phC as FC Type 28h\n",
5596 new_fcport->port_name);
5597 }
5598
1da177e4
LT		 5599 if (swl[swl_idx].d_id.b.rsvd_1 != 0) {
5600 last_dev = 1;
5601 }
5602 swl_idx++;
5603 }
5604 } else {
5605 /* Send GA_NXT to the switch */
e315cd28 5606 rval = qla2x00_ga_nxt(vha, new_fcport);
1da177e4 5607 if (rval != QLA_SUCCESS) {
83548fe2 5608 ql_log(ql_log_warn, vha, 0x209e,
7c3df132
SK		 5609 "SNS scan failed -- assuming "
5610 "zero-entry result.\n");
1da177e4
LT		 5611 rval = QLA_SUCCESS;
5612 break;
5613 }
5614 }
5615
5616 /* If wrap on switch device list, exit. */
5617 if (first_dev) {
5618 wrap.b24 = new_fcport->d_id.b24;
5619 first_dev = 0;
5620 } else if (new_fcport->d_id.b24 == wrap.b24) {
83548fe2 5621 ql_dbg(ql_dbg_disc, vha, 0x209f,
7c3df132
SK		 5622 "Device wrap (%02x%02x%02x).\n",
5623 new_fcport->d_id.b.domain,
5624 new_fcport->d_id.b.area,
5625 new_fcport->d_id.b.al_pa);
1da177e4
LT		 5626 break;
5627 }
5628
2c3dfe3f 5629 /* Bypass if same physical adapter. */
e315cd28 5630 if (new_fcport->d_id.b24 == base_vha->d_id.b24)
1da177e4
LT		 5631 continue;
5632
2c3dfe3f 5633 /* Bypass virtual ports of the same host. */
bb4cf5b7
CD		 5634 if (qla2x00_is_a_vp_did(vha, new_fcport->d_id.b24))
5635 continue;
2c3dfe3f 5636
f7d289f6
AV		 5637 /* Bypass if same domain and area of adapter. */
5638 if (((new_fcport->d_id.b24 & 0xffff00) ==
e315cd28 5639 (vha->d_id.b24 & 0xffff00)) && ha->current_topology ==
f7d289f6
AV		 5640 ISP_CFG_FL)
5641 continue;
5642
1da177e4
LT		 5643 /* Bypass reserved domain fields. */
5644 if ((new_fcport->d_id.b.domain & 0xf0) == 0xf0)
5645 continue;
5646
e8c72ba5 5647 /* Bypass ports whose FCP-4 type is not FCP_SCSI */
4da26e16
CD		 5648 if (ql2xgffidenable &&
5649 (new_fcport->fc4_type != FC4_TYPE_FCP_SCSI &&
5650 new_fcport->fc4_type != FC4_TYPE_UNKNOWN))
e8c72ba5
CD		 5651 continue;
5652
726b8548
QT		 5653 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
5654
1da177e4
LT		 5655 /* Locate matching device in database. */
5656 found = 0;
e315cd28 5657 list_for_each_entry(fcport, &vha->vp_fcports, list) {
1da177e4
LT		 5658 if (memcmp(new_fcport->port_name, fcport->port_name,
5659 WWN_SIZE))
5660 continue;
5661
827210ba 5662 fcport->scan_state = QLA_FCPORT_FOUND;
b3b02e6e 5663
1da177e4
LT		 5664 found++;
5665
d8b45213
AV		 5666 /* Update port state. */
5667 memcpy(fcport->fabric_port_name,
5668 new_fcport->fabric_port_name, WWN_SIZE);
5669 fcport->fp_speed = new_fcport->fp_speed;
5670
1da177e4 5671 /*
b2032fd5
RD		 5672 * If address the same and state FCS_ONLINE
5673 * (or in target mode), nothing changed.
1da177e4
LT		 5674 */
5675 if (fcport->d_id.b24 == new_fcport->d_id.b24 &&
b2032fd5 5676 (atomic_read(&fcport->state) == FCS_ONLINE ||
726b8548 5677 (vha->host->active_mode == MODE_TARGET))) {
1da177e4
LT		 5678 break;
5679 }
5680
5681 /*
5682 * If device was not a fabric device before.
5683 */
5684 if ((fcport->flags & FCF_FABRIC_DEVICE) == 0) {
5685 fcport->d_id.b24 = new_fcport->d_id.b24;
5f16b331 5686 qla2x00_clear_loop_id(fcport);
1da177e4
LT		 5687 fcport->flags |= (FCF_FABRIC_DEVICE |
5688 FCF_LOGIN_NEEDED);
1da177e4
LT		 5689 break;
5690 }
5691
5692 /*
5693 * Port ID changed or device was marked to be updated;
5694 * Log it out if still logged in and mark it for
5695 * relogin later.
5696 */
726b8548 5697 if (qla_tgt_mode_enabled(base_vha)) {
b2032fd5
RD		 5698 ql_dbg(ql_dbg_tgt_mgt, vha, 0xf080,
5699 "port changed FC ID, %8phC"
5700 " old %x:%x:%x (loop_id 0x%04x)-> new %x:%x:%x\n",
5701 fcport->port_name,
5702 fcport->d_id.b.domain,
5703 fcport->d_id.b.area,
5704 fcport->d_id.b.al_pa,
5705 fcport->loop_id,
5706 new_fcport->d_id.b.domain,
5707 new_fcport->d_id.b.area,
5708 new_fcport->d_id.b.al_pa);
5709 fcport->d_id.b24 = new_fcport->d_id.b24;
5710 break;
5711 }
5712
1da177e4
LT		 5713 fcport->d_id.b24 = new_fcport->d_id.b24;
5714 fcport->flags |= FCF_LOGIN_NEEDED;
1da177e4
LT		 5715 break;
5716 }
5717
9dd9686b
DT		 5718 if (fcport->fc4f_nvme) {
5719 if (fcport->disc_state == DSC_DELETE_PEND) {
5720 fcport->disc_state = DSC_GNL;
5721 vha->fcport_count--;
5722 fcport->login_succ = 0;
5723 }
5724 }
5725
726b8548
QT		 5726 if (found) {
5727 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
1da177e4 5728 continue;
726b8548 5729 }
1da177e4 5730 /* If device was not in our fcports list, then add it. */
b2032fd5 5731 new_fcport->scan_state = QLA_FCPORT_FOUND;
726b8548
QT		 5732 list_add_tail(&new_fcport->list, &vha->vp_fcports);
5733
5734 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
5735
1da177e4
LT		 5736
5737 /* Allocate a new replacement fcport. */
5738 nxt_d_id.b24 = new_fcport->d_id.b24;
e315cd28 5739 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
1da177e4 5740 if (new_fcport == NULL) {
83548fe2 5741 ql_log(ql_log_warn, vha, 0xd032,
7c3df132 5742 "Memory allocation failed for fcport.\n");
1da177e4
LT		 5743 return (QLA_MEMORY_ALLOC_FAILED);
5744 }
5745 new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED);
5746 new_fcport->d_id.b24 = nxt_d_id.b24;
5747 }
5748
726b8548
QT		 5749 qla2x00_free_fcport(new_fcport);
5750
5751 /*
5752 * Logout all previous fabric dev marked lost, except FCP2 devices.
5753 */
5754 list_for_each_entry(fcport, &vha->vp_fcports, list) {
5755 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
5756 break;
5757
5758 if ((fcport->flags & FCF_FABRIC_DEVICE) == 0 ||
5759 (fcport->flags & FCF_LOGIN_NEEDED) == 0)
5760 continue;
5761
5762 if (fcport->scan_state == QLA_FCPORT_SCAN) {
5763 if ((qla_dual_mode_enabled(vha) ||
5764 qla_ini_mode_enabled(vha)) &&
5765 atomic_read(&fcport->state) == FCS_ONLINE) {
5766 qla2x00_mark_device_lost(vha, fcport,
5767 ql2xplogiabsentdevice, 0);
5768 if (fcport->loop_id != FC_NO_LOOP_ID &&
5769 (fcport->flags & FCF_FCP2_DEVICE) == 0 &&
5770 fcport->port_type != FCT_INITIATOR &&
5771 fcport->port_type != FCT_BROADCAST) {
83548fe2 5772 ql_dbg(ql_dbg_disc, vha, 0x20f0,
726b8548
QT		 5773 "%s %d %8phC post del sess\n",
5774 __func__, __LINE__,
5775 fcport->port_name);
d8630bb9 5776 qlt_schedule_sess_for_deletion(fcport);
726b8548
QT		 5777 continue;
5778 }
5779 }
5780 }
1da177e4 5781
726b8548
QT		 5782 if (fcport->scan_state == QLA_FCPORT_FOUND)
5783 qla24xx_fcport_handle_login(vha, fcport);
5784 }
1da177e4
LT		 5785 return (rval);
5786}
5787
5788/*
5789 * qla2x00_find_new_loop_id
5790 * Scan through our port list and find a new usable loop ID.
5791 *
5792 * Input:
5793 * ha: adapter state pointer.
5794 * dev: port structure pointer.
5795 *
5796 * Returns:
5797 * qla2x00 local function return status code.
5798 *
5799 * Context:
5800 * Kernel context.
5801 */
03bcfb57 5802int
e315cd28 5803qla2x00_find_new_loop_id(scsi_qla_host_t *vha, fc_port_t *dev)
1da177e4
LT		 5804{
5805 int rval;
e315cd28 5806 struct qla_hw_data *ha = vha->hw;
feafb7b1 5807 unsigned long flags = 0;
1da177e4
LT		 5808
5809 rval = QLA_SUCCESS;
5810
5f16b331 5811 spin_lock_irqsave(&ha->vport_slock, flags);
1da177e4 5812
5f16b331
CD		 5813 dev->loop_id = find_first_zero_bit(ha->loop_id_map,
5814 LOOPID_MAP_SIZE);
5815 if (dev->loop_id >= LOOPID_MAP_SIZE ||
5816 qla2x00_is_reserved_id(vha, dev->loop_id)) {
5817 dev->loop_id = FC_NO_LOOP_ID;
5818 rval = QLA_FUNCTION_FAILED;
5819 } else
5820 set_bit(dev->loop_id, ha->loop_id_map);
1da177e4 5821
5f16b331 5822 spin_unlock_irqrestore(&ha->vport_slock, flags);
1da177e4 5823
5f16b331
CD		 5824 if (rval == QLA_SUCCESS)
5825 ql_dbg(ql_dbg_disc, dev->vha, 0x2086,
5826 "Assigning new loopid=%x, portid=%x.\n",
5827 dev->loop_id, dev->d_id.b24);
5828 else
5829 ql_log(ql_log_warn, dev->vha, 0x2087,
5830 "No loop_id's available, portid=%x.\n",
5831 dev->d_id.b24);
1da177e4
LT		 5832
5833 return (rval);
5834}
5835
1da177e4 5836
f6602f3b
QT		 5837/* FW does not set aside Loop id for MGMT Server/FFFFFAh */
5838int
5839qla2x00_reserve_mgmt_server_loop_id(scsi_qla_host_t *vha)
5840{
5841 int loop_id = FC_NO_LOOP_ID;
5842 int lid = NPH_MGMT_SERVER - vha->vp_idx;
5843 unsigned long flags;
5844 struct qla_hw_data *ha = vha->hw;
5845
5846 if (vha->vp_idx == 0) {
5847 set_bit(NPH_MGMT_SERVER, ha->loop_id_map);
5848 return NPH_MGMT_SERVER;
5849 }
5850
5851 /* pick id from high and work down to low */
5852 spin_lock_irqsave(&ha->vport_slock, flags);
5853 for (; lid > 0; lid--) {
5854 if (!test_bit(lid, vha->hw->loop_id_map)) {
5855 set_bit(lid, vha->hw->loop_id_map);
5856 loop_id = lid;
5857 break;
5858 }
5859 }
5860 spin_unlock_irqrestore(&ha->vport_slock, flags);
5861
5862 return loop_id;
5863}
5864
1da177e4
LT		 5865/*
5866 * qla2x00_fabric_login
5867 * Issue fabric login command.
5868 *
5869 * Input:
5870 * ha = adapter block pointer.
5871 * device = pointer to FC device type structure.
5872 *
5873 * Returns:
5874 * 0 - Login successfully
5875 * 1 - Login failed
5876 * 2 - Initiator device
5877 * 3 - Fatal error
5878 */
5879int
e315cd28 5880qla2x00_fabric_login(scsi_qla_host_t *vha, fc_port_t *fcport,
1da177e4
LT		 5881 uint16_t *next_loopid)
5882{
5883 int rval;
5884 int retry;
5885 uint16_t tmp_loopid;
5886 uint16_t mb[MAILBOX_REGISTER_COUNT];
e315cd28 5887 struct qla_hw_data *ha = vha->hw;
1da177e4
LT		 5888
5889 retry = 0;
5890 tmp_loopid = 0;
5891
5892 for (;;) {
7c3df132
SK		 5893 ql_dbg(ql_dbg_disc, vha, 0x2000,
5894 "Trying Fabric Login w/loop id 0x%04x for port "
5895 "%02x%02x%02x.\n",
5896 fcport->loop_id, fcport->d_id.b.domain,
5897 fcport->d_id.b.area, fcport->d_id.b.al_pa);
1da177e4
LT		 5898
5899 /* Login fcport on switch. */
0b91d116 5900 rval = ha->isp_ops->fabric_login(vha, fcport->loop_id,
1da177e4
LT		 5901 fcport->d_id.b.domain, fcport->d_id.b.area,
5902 fcport->d_id.b.al_pa, mb, BIT_0);
0b91d116
CD		 5903 if (rval != QLA_SUCCESS) {
5904 return rval;
5905 }
1da177e4
LT		 5906 if (mb[0] == MBS_PORT_ID_USED) {
5907 /*
5908 * Device has another loop ID. The firmware team
0107109e
AV		 5909 * recommends the driver perform an implicit login with
5910 * the specified ID again. The ID we just used is save
5911 * here so we return with an ID that can be tried by
5912 * the next login.
1da177e4
LT		 5913 */
5914 retry++;
5915 tmp_loopid = fcport->loop_id;
5916 fcport->loop_id = mb[1];
5917
7c3df132
SK		 5918 ql_dbg(ql_dbg_disc, vha, 0x2001,
5919 "Fabric Login: port in use - next loop "
5920 "id=0x%04x, port id= %02x%02x%02x.\n",
1da177e4 5921 fcport->loop_id, fcport->d_id.b.domain,
7c3df132 5922 fcport->d_id.b.area, fcport->d_id.b.al_pa);
1da177e4
LT		 5923
5924 } else if (mb[0] == MBS_COMMAND_COMPLETE) {
5925 /*
5926 * Login succeeded.
5927 */
5928 if (retry) {
5929 /* A retry occurred before. */
5930 *next_loopid = tmp_loopid;
5931 } else {
5932 /*
5933 * No retry occurred before. Just increment the
5934 * ID value for next login.
5935 */
5936 *next_loopid = (fcport->loop_id + 1);
5937 }
5938
5939 if (mb[1] & BIT_0) {
5940 fcport->port_type = FCT_INITIATOR;
5941 } else {
5942 fcport->port_type = FCT_TARGET;
5943 if (mb[1] & BIT_1) {
8474f3a0 5944 fcport->flags |= FCF_FCP2_DEVICE;
1da177e4
LT		 5945 }
5946 }
5947
ad3e0eda
AV		 5948 if (mb[10] & BIT_0)
5949 fcport->supported_classes |= FC_COS_CLASS2;
5950 if (mb[10] & BIT_1)
5951 fcport->supported_classes |= FC_COS_CLASS3;
5952
2d70c103
NB		 5953 if (IS_FWI2_CAPABLE(ha)) {
5954 if (mb[10] & BIT_7)
5955 fcport->flags |=
5956 FCF_CONF_COMP_SUPPORTED;
5957 }
5958
1da177e4
LT		 5959 rval = QLA_SUCCESS;
5960 break;
5961 } else if (mb[0] == MBS_LOOP_ID_USED) {
5962 /*
5963 * Loop ID already used, try next loop ID.
5964 */
5965 fcport->loop_id++;
e315cd28 5966 rval = qla2x00_find_new_loop_id(vha, fcport);
1da177e4
LT		 5967 if (rval != QLA_SUCCESS) {
5968 /* Ran out of loop IDs to use */
5969 break;
5970 }
5971 } else if (mb[0] == MBS_COMMAND_ERROR) {
5972 /*
5973 * Firmware possibly timed out during login. If NO
5974 * retries are left to do then the device is declared
5975 * dead.
5976 */
5977 *next_loopid = fcport->loop_id;
e315cd28 5978 ha->isp_ops->fabric_logout(vha, fcport->loop_id,
1c7c6357
AV		 5979 fcport->d_id.b.domain, fcport->d_id.b.area,
5980 fcport->d_id.b.al_pa);
e315cd28 5981 qla2x00_mark_device_lost(vha, fcport, 1, 0);
1da177e4
LT		 5982
5983 rval = 1;
5984 break;
5985 } else {
5986 /*
5987 * unrecoverable / not handled error
5988 */
7c3df132
SK		 5989 ql_dbg(ql_dbg_disc, vha, 0x2002,
5990 "Failed=%x port_id=%02x%02x%02x loop_id=%x "
5991 "jiffies=%lx.\n", mb[0], fcport->d_id.b.domain,
5992 fcport->d_id.b.area, fcport->d_id.b.al_pa,
5993 fcport->loop_id, jiffies);
1da177e4
LT		 5994
5995 *next_loopid = fcport->loop_id;
e315cd28 5996 ha->isp_ops->fabric_logout(vha, fcport->loop_id,
1c7c6357
AV		 5997 fcport->d_id.b.domain, fcport->d_id.b.area,
5998 fcport->d_id.b.al_pa);
5f16b331 5999 qla2x00_clear_loop_id(fcport);
0eedfcf0 6000 fcport->login_retry = 0;
1da177e4
LT		 6001
6002 rval = 3;
6003 break;
6004 }
6005 }
6006
6007 return (rval);
6008}
6009
6010/*
6011 * qla2x00_local_device_login
6012 * Issue local device login command.
6013 *
6014 * Input:
6015 * ha = adapter block pointer.
6016 * loop_id = loop id of device to login to.
6017 *
6018 * Returns (Where's the #define!!!!):
6019 * 0 - Login successfully
6020 * 1 - Login failed
6021 * 3 - Fatal error
6022 */
6023int
e315cd28 6024qla2x00_local_device_login(scsi_qla_host_t *vha, fc_port_t *fcport)
1da177e4
LT		 6025{
6026 int rval;
6027 uint16_t mb[MAILBOX_REGISTER_COUNT];
6028
6029 memset(mb, 0, sizeof(mb));
e315cd28 6030 rval = qla2x00_login_local_device(vha, fcport, mb, BIT_0);
1da177e4
LT		 6031 if (rval == QLA_SUCCESS) {
6032 /* Interrogate mailbox registers for any errors */
6033 if (mb[0] == MBS_COMMAND_ERROR)
6034 rval = 1;
6035 else if (mb[0] == MBS_COMMAND_PARAMETER_ERROR)
6036 /* device not in PCB table */
6037 rval = 3;
6038 }
6039
6040 return (rval);
6041}
6042
6043/*
6044 * qla2x00_loop_resync
6045 * Resync with fibre channel devices.
6046 *
6047 * Input:
6048 * ha = adapter block pointer.
6049 *
6050 * Returns:
6051 * 0 = success
6052 */
6053int
e315cd28 6054qla2x00_loop_resync(scsi_qla_host_t *vha)
1da177e4 6055{
73208dfd 6056 int rval = QLA_SUCCESS;
1da177e4 6057 uint32_t wait_time;
67c2e93a
AC		 6058 struct req_que *req;
6059 struct rsp_que *rsp;
6060
d7459527 6061 req = vha->req;
67c2e93a 6062 rsp = req->rsp;
1da177e4 6063
e315cd28
AC		 6064 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
6065 if (vha->flags.online) {
6066 if (!(rval = qla2x00_fw_ready(vha))) {
1da177e4
LT		 6067 /* Wait at most MAX_TARGET RSCNs for a stable link. */
6068 wait_time = 256;
6069 do {
8ae6d9c7
GM		 6070 if (!IS_QLAFX00(vha->hw)) {
6071 /*
6072 * Issue a marker after FW becomes
6073 * ready.
6074 */
6075 qla2x00_marker(vha, req, rsp, 0, 0,
6076 MK_SYNC_ALL);
6077 vha->marker_needed = 0;
6078 }
1da177e4
LT		 6079
6080 /* Remap devices on Loop. */
e315cd28 6081 clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
1da177e4 6082
8ae6d9c7
GM		 6083 if (IS_QLAFX00(vha->hw))
6084 qlafx00_configure_devices(vha);
6085 else
6086 qla2x00_configure_loop(vha);
6087
1da177e4 6088 wait_time--;
e315cd28
AC		 6089 } while (!atomic_read(&vha->loop_down_timer) &&
6090 !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags))
6091 && wait_time && (test_bit(LOOP_RESYNC_NEEDED,
6092 &vha->dpc_flags)));
1da177e4 6093 }
1da177e4
LT		 6094 }
6095
e315cd28 6096 if (test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags))
1da177e4 6097 return (QLA_FUNCTION_FAILED);
1da177e4 6098
e315cd28 6099 if (rval)
7c3df132
SK		 6100 ql_dbg(ql_dbg_disc, vha, 0x206c,
6101 "%s *** FAILED ***.\n", __func__);
1da177e4
LT		 6102
6103 return (rval);
6104}
6105
579d12b5
SK		 6106/*
6107* qla2x00_perform_loop_resync
6108* Description: This function will set the appropriate flags and call
6109* qla2x00_loop_resync. If successful loop will be resynced
6110* Arguments : scsi_qla_host_t pointer
6111* returm : Success or Failure
6112*/
6113
6114int qla2x00_perform_loop_resync(scsi_qla_host_t *ha)
6115{
6116 int32_t rval = 0;
6117
6118 if (!test_and_set_bit(LOOP_RESYNC_ACTIVE, &ha->dpc_flags)) {
6119 /*Configure the flags so that resync happens properly*/
6120 atomic_set(&ha->loop_down_timer, 0);
6121 if (!(ha->device_flags & DFLG_NO_CABLE)) {
6122 atomic_set(&ha->loop_state, LOOP_UP);
6123 set_bit(LOCAL_LOOP_UPDATE, &ha->dpc_flags);
6124 set_bit(REGISTER_FC4_NEEDED, &ha->dpc_flags);
6125 set_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags);
6126
6127 rval = qla2x00_loop_resync(ha);
6128 } else
6129 atomic_set(&ha->loop_state, LOOP_DEAD);
6130
6131 clear_bit(LOOP_RESYNC_ACTIVE, &ha->dpc_flags);
6132 }
6133
6134 return rval;
6135}
6136
d97994dc 6137void
67becc00 6138qla2x00_update_fcports(scsi_qla_host_t *base_vha)
d97994dc 6139{
6140 fc_port_t *fcport;
feafb7b1
AE		 6141 struct scsi_qla_host *vha;
6142 struct qla_hw_data *ha = base_vha->hw;
6143 unsigned long flags;
d97994dc 6144
feafb7b1 6145 spin_lock_irqsave(&ha->vport_slock, flags);
d97994dc 6146 /* Go with deferred removal of rport references. */
feafb7b1
AE		 6147 list_for_each_entry(vha, &base_vha->hw->vp_list, list) {
6148 atomic_inc(&vha->vref_count);
6149 list_for_each_entry(fcport, &vha->vp_fcports, list) {
8ae598d0 6150 if (fcport->drport &&
feafb7b1
AE		 6151 atomic_read(&fcport->state) != FCS_UNCONFIGURED) {
6152 spin_unlock_irqrestore(&ha->vport_slock, flags);
67becc00 6153 qla2x00_rport_del(fcport);
df673274 6154
feafb7b1
AE		 6155 spin_lock_irqsave(&ha->vport_slock, flags);
6156 }
6157 }
6158 atomic_dec(&vha->vref_count);
c4a9b538 6159 wake_up(&vha->vref_waitq);
feafb7b1
AE		 6160 }
6161 spin_unlock_irqrestore(&ha->vport_slock, flags);
d97994dc 6162}
6163
7d613ac6
SV		 6164/* Assumes idc_lock always held on entry */
6165void
6166qla83xx_reset_ownership(scsi_qla_host_t *vha)
6167{
6168 struct qla_hw_data *ha = vha->hw;
6169 uint32_t drv_presence, drv_presence_mask;
6170 uint32_t dev_part_info1, dev_part_info2, class_type;
6171 uint32_t class_type_mask = 0x3;
6172 uint16_t fcoe_other_function = 0xffff, i;
6173
7ec0effd
AD		 6174 if (IS_QLA8044(ha)) {
6175 drv_presence = qla8044_rd_direct(vha,
6176 QLA8044_CRB_DRV_ACTIVE_INDEX);
6177 dev_part_info1 = qla8044_rd_direct(vha,
6178 QLA8044_CRB_DEV_PART_INFO_INDEX);
6179 dev_part_info2 = qla8044_rd_direct(vha,
6180 QLA8044_CRB_DEV_PART_INFO2);
6181 } else {
6182 qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
6183 qla83xx_rd_reg(vha, QLA83XX_DEV_PARTINFO1, &dev_part_info1);
6184 qla83xx_rd_reg(vha, QLA83XX_DEV_PARTINFO2, &dev_part_info2);
6185 }
7d613ac6
SV		 6186 for (i = 0; i < 8; i++) {
6187 class_type = ((dev_part_info1 >> (i * 4)) & class_type_mask);
6188 if ((class_type == QLA83XX_CLASS_TYPE_FCOE) &&
6189 (i != ha->portnum)) {
6190 fcoe_other_function = i;
6191 break;
6192 }
6193 }
6194 if (fcoe_other_function == 0xffff) {
6195 for (i = 0; i < 8; i++) {
6196 class_type = ((dev_part_info2 >> (i * 4)) &
6197 class_type_mask);
6198 if ((class_type == QLA83XX_CLASS_TYPE_FCOE) &&
6199 ((i + 8) != ha->portnum)) {
6200 fcoe_other_function = i + 8;
6201 break;
6202 }
6203 }
6204 }
6205 /*
6206 * Prepare drv-presence mask based on fcoe functions present.
6207 * However consider only valid physical fcoe function numbers (0-15).
6208 */
6209 drv_presence_mask = ~((1 << (ha->portnum)) |
6210 ((fcoe_other_function == 0xffff) ?
6211 0 : (1 << (fcoe_other_function))));
6212
6213 /* We are the reset owner iff:
6214 * - No other protocol drivers present.
6215 * - This is the lowest among fcoe functions. */
6216 if (!(drv_presence & drv_presence_mask) &&
6217 (ha->portnum < fcoe_other_function)) {
6218 ql_dbg(ql_dbg_p3p, vha, 0xb07f,
6219 "This host is Reset owner.\n");
6220 ha->flags.nic_core_reset_owner = 1;
6221 }
6222}
6223
fa492630 6224static int
7d613ac6
SV		 6225__qla83xx_set_drv_ack(scsi_qla_host_t *vha)
6226{
6227 int rval = QLA_SUCCESS;
6228 struct qla_hw_data *ha = vha->hw;
6229 uint32_t drv_ack;
6230
6231 rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRIVER_ACK, &drv_ack);
6232 if (rval == QLA_SUCCESS) {
6233 drv_ack |= (1 << ha->portnum);
6234 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRIVER_ACK, drv_ack);
6235 }
6236
6237 return rval;
6238}
6239
fa492630 6240static int
7d613ac6
SV		 6241__qla83xx_clear_drv_ack(scsi_qla_host_t *vha)
6242{
6243 int rval = QLA_SUCCESS;
6244 struct qla_hw_data *ha = vha->hw;
6245 uint32_t drv_ack;
6246
6247 rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRIVER_ACK, &drv_ack);
6248 if (rval == QLA_SUCCESS) {
6249 drv_ack &= ~(1 << ha->portnum);
6250 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRIVER_ACK, drv_ack);
6251 }
6252
6253 return rval;
6254}
6255
fa492630 6256static const char *
7d613ac6
SV		 6257qla83xx_dev_state_to_string(uint32_t dev_state)
6258{
6259 switch (dev_state) {
6260 case QLA8XXX_DEV_COLD:
6261 return "COLD/RE-INIT";
6262 case QLA8XXX_DEV_INITIALIZING:
6263 return "INITIALIZING";
6264 case QLA8XXX_DEV_READY:
6265 return "READY";
6266 case QLA8XXX_DEV_NEED_RESET:
6267 return "NEED RESET";
6268 case QLA8XXX_DEV_NEED_QUIESCENT:
6269 return "NEED QUIESCENT";
6270 case QLA8XXX_DEV_FAILED:
6271 return "FAILED";
6272 case QLA8XXX_DEV_QUIESCENT:
6273 return "QUIESCENT";
6274 default:
6275 return "Unknown";
6276 }
6277}
6278
6279/* Assumes idc-lock always held on entry */
6280void
6281qla83xx_idc_audit(scsi_qla_host_t *vha, int audit_type)
6282{
6283 struct qla_hw_data *ha = vha->hw;
6284 uint32_t idc_audit_reg = 0, duration_secs = 0;
6285
6286 switch (audit_type) {
6287 case IDC_AUDIT_TIMESTAMP:
6288 ha->idc_audit_ts = (jiffies_to_msecs(jiffies) / 1000);
6289 idc_audit_reg = (ha->portnum) |
6290 (IDC_AUDIT_TIMESTAMP << 7) | (ha->idc_audit_ts << 8);
6291 qla83xx_wr_reg(vha, QLA83XX_IDC_AUDIT, idc_audit_reg);
6292 break;
6293
6294 case IDC_AUDIT_COMPLETION:
6295 duration_secs = ((jiffies_to_msecs(jiffies) -
6296 jiffies_to_msecs(ha->idc_audit_ts)) / 1000);
6297 idc_audit_reg = (ha->portnum) |
6298 (IDC_AUDIT_COMPLETION << 7) | (duration_secs << 8);
6299 qla83xx_wr_reg(vha, QLA83XX_IDC_AUDIT, idc_audit_reg);
6300 break;
6301
6302 default:
6303 ql_log(ql_log_warn, vha, 0xb078,
6304 "Invalid audit type specified.\n");
6305 break;
6306 }
6307}
6308
6309/* Assumes idc_lock always held on entry */
fa492630 6310static int
7d613ac6
SV		 6311qla83xx_initiating_reset(scsi_qla_host_t *vha)
6312{
6313 struct qla_hw_data *ha = vha->hw;
6314 uint32_t idc_control, dev_state;
6315
6316 __qla83xx_get_idc_control(vha, &idc_control);
6317 if ((idc_control & QLA83XX_IDC_RESET_DISABLED)) {
6318 ql_log(ql_log_info, vha, 0xb080,
6319 "NIC Core reset has been disabled. idc-control=0x%x\n",
6320 idc_control);
6321 return QLA_FUNCTION_FAILED;
6322 }
6323
6324 /* Set NEED-RESET iff in READY state and we are the reset-owner */
6325 qla83xx_rd_reg(vha, QLA83XX_IDC_DEV_STATE, &dev_state);
6326 if (ha->flags.nic_core_reset_owner && dev_state == QLA8XXX_DEV_READY) {
6327 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE,
6328 QLA8XXX_DEV_NEED_RESET);
6329 ql_log(ql_log_info, vha, 0xb056, "HW State: NEED RESET.\n");
6330 qla83xx_idc_audit(vha, IDC_AUDIT_TIMESTAMP);
6331 } else {
6332 const char *state = qla83xx_dev_state_to_string(dev_state);
6333 ql_log(ql_log_info, vha, 0xb057, "HW State: %s.\n", state);
6334
6335 /* SV: XXX: Is timeout required here? */
6336 /* Wait for IDC state change READY -> NEED_RESET */
6337 while (dev_state == QLA8XXX_DEV_READY) {
6338 qla83xx_idc_unlock(vha, 0);
6339 msleep(200);
6340 qla83xx_idc_lock(vha, 0);
6341 qla83xx_rd_reg(vha, QLA83XX_IDC_DEV_STATE, &dev_state);
6342 }
6343 }
6344
6345 /* Send IDC ack by writing to drv-ack register */
6346 __qla83xx_set_drv_ack(vha);
6347
6348 return QLA_SUCCESS;
6349}
6350
6351int
6352__qla83xx_set_idc_control(scsi_qla_host_t *vha, uint32_t idc_control)
6353{
6354 return qla83xx_wr_reg(vha, QLA83XX_IDC_CONTROL, idc_control);
6355}
6356
7d613ac6
SV		 6357int
6358__qla83xx_get_idc_control(scsi_qla_host_t *vha, uint32_t *idc_control)
6359{
6360 return qla83xx_rd_reg(vha, QLA83XX_IDC_CONTROL, idc_control);
6361}
6362
fa492630 6363static int
7d613ac6
SV		 6364qla83xx_check_driver_presence(scsi_qla_host_t *vha)
6365{
6366 uint32_t drv_presence = 0;
6367 struct qla_hw_data *ha = vha->hw;
6368
6369 qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
6370 if (drv_presence & (1 << ha->portnum))
6371 return QLA_SUCCESS;
6372 else
6373 return QLA_TEST_FAILED;
6374}
6375
6376int
6377qla83xx_nic_core_reset(scsi_qla_host_t *vha)
6378{
6379 int rval = QLA_SUCCESS;
6380 struct qla_hw_data *ha = vha->hw;
6381
6382 ql_dbg(ql_dbg_p3p, vha, 0xb058,
6383 "Entered %s().\n", __func__);
6384
6385 if (vha->device_flags & DFLG_DEV_FAILED) {
6386 ql_log(ql_log_warn, vha, 0xb059,
6387 "Device in unrecoverable FAILED state.\n");
6388 return QLA_FUNCTION_FAILED;
6389 }
6390
6391 qla83xx_idc_lock(vha, 0);
6392
6393 if (qla83xx_check_driver_presence(vha) != QLA_SUCCESS) {
6394 ql_log(ql_log_warn, vha, 0xb05a,
6395 "Function=0x%x has been removed from IDC participation.\n",
6396 ha->portnum);
6397 rval = QLA_FUNCTION_FAILED;
6398 goto exit;
6399 }
6400
6401 qla83xx_reset_ownership(vha);
6402
6403 rval = qla83xx_initiating_reset(vha);
6404
6405 /*
6406 * Perform reset if we are the reset-owner,
6407 * else wait till IDC state changes to READY/FAILED.
6408 */
6409 if (rval == QLA_SUCCESS) {
6410 rval = qla83xx_idc_state_handler(vha);
6411
6412 if (rval == QLA_SUCCESS)
6413 ha->flags.nic_core_hung = 0;
6414 __qla83xx_clear_drv_ack(vha);
6415 }
6416
6417exit:
6418 qla83xx_idc_unlock(vha, 0);
6419
6420 ql_dbg(ql_dbg_p3p, vha, 0xb05b, "Exiting %s.\n", __func__);
6421
6422 return rval;
6423}
6424
81178772
SK		 6425int
6426qla2xxx_mctp_dump(scsi_qla_host_t *vha)
6427{
6428 struct qla_hw_data *ha = vha->hw;
6429 int rval = QLA_FUNCTION_FAILED;
6430
6431 if (!IS_MCTP_CAPABLE(ha)) {
6432 /* This message can be removed from the final version */
6433 ql_log(ql_log_info, vha, 0x506d,
6434 "This board is not MCTP capable\n");
6435 return rval;
6436 }
6437
6438 if (!ha->mctp_dump) {
6439 ha->mctp_dump = dma_alloc_coherent(&ha->pdev->dev,
6440 MCTP_DUMP_SIZE, &ha->mctp_dump_dma, GFP_KERNEL);
6441
6442 if (!ha->mctp_dump) {
6443 ql_log(ql_log_warn, vha, 0x506e,
6444 "Failed to allocate memory for mctp dump\n");
6445 return rval;
6446 }
6447 }
6448
6449#define MCTP_DUMP_STR_ADDR 0x00000000
6450 rval = qla2x00_dump_mctp_data(vha, ha->mctp_dump_dma,
6451 MCTP_DUMP_STR_ADDR, MCTP_DUMP_SIZE/4);
6452 if (rval != QLA_SUCCESS) {
6453 ql_log(ql_log_warn, vha, 0x506f,
6454 "Failed to capture mctp dump\n");
6455 } else {
6456 ql_log(ql_log_info, vha, 0x5070,
6457 "Mctp dump capture for host (%ld/%p).\n",
6458 vha->host_no, ha->mctp_dump);
6459 ha->mctp_dumped = 1;
6460 }
6461
409ee0fe 6462 if (!ha->flags.nic_core_reset_hdlr_active && !ha->portnum) {
81178772
SK		 6463 ha->flags.nic_core_reset_hdlr_active = 1;
6464 rval = qla83xx_restart_nic_firmware(vha);
6465 if (rval)
6466 /* NIC Core reset failed. */
6467 ql_log(ql_log_warn, vha, 0x5071,
6468 "Failed to restart nic firmware\n");
6469 else
6470 ql_dbg(ql_dbg_p3p, vha, 0xb084,
6471 "Restarted NIC firmware successfully.\n");
6472 ha->flags.nic_core_reset_hdlr_active = 0;
6473 }
6474
6475 return rval;
6476
6477}
6478
579d12b5 6479/*
8fcd6b8b 6480* qla2x00_quiesce_io
579d12b5
SK		 6481* Description: This function will block the new I/Os
6482* Its not aborting any I/Os as context
6483* is not destroyed during quiescence
6484* Arguments: scsi_qla_host_t
6485* return : void
6486*/
6487void
8fcd6b8b 6488qla2x00_quiesce_io(scsi_qla_host_t *vha)
579d12b5
SK		 6489{
6490 struct qla_hw_data *ha = vha->hw;
6491 struct scsi_qla_host *vp;
6492
8fcd6b8b
CD		 6493 ql_dbg(ql_dbg_dpc, vha, 0x401d,
6494 "Quiescing I/O - ha=%p.\n", ha);
579d12b5
SK		 6495
6496 atomic_set(&ha->loop_down_timer, LOOP_DOWN_TIME);
6497 if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
6498 atomic_set(&vha->loop_state, LOOP_DOWN);
6499 qla2x00_mark_all_devices_lost(vha, 0);
6500 list_for_each_entry(vp, &ha->vp_list, list)
8fcd6b8b 6501 qla2x00_mark_all_devices_lost(vp, 0);
579d12b5
SK		 6502 } else {
6503 if (!atomic_read(&vha->loop_down_timer))
6504 atomic_set(&vha->loop_down_timer,
6505 LOOP_DOWN_TIME);
6506 }
6507 /* Wait for pending cmds to complete */
6508 qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST);
6509}
6510
a9083016
GM		 6511void
6512qla2x00_abort_isp_cleanup(scsi_qla_host_t *vha)
6513{
6514 struct qla_hw_data *ha = vha->hw;
579d12b5 6515 struct scsi_qla_host *vp;
feafb7b1 6516 unsigned long flags;
6aef87be 6517 fc_port_t *fcport;
7c3f8fd1 6518 u16 i;
a9083016 6519
e46ef004
SK		 6520 /* For ISP82XX, driver waits for completion of the commands.
6521 * online flag should be set.
6522 */
7ec0effd 6523 if (!(IS_P3P_TYPE(ha)))
e46ef004 6524 vha->flags.online = 0;
a9083016
GM		 6525 ha->flags.chip_reset_done = 0;
6526 clear_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
2be21fa2 6527 vha->qla_stats.total_isp_aborts++;
a9083016 6528
7c3df132
SK		 6529 ql_log(ql_log_info, vha, 0x00af,
6530 "Performing ISP error recovery - ha=%p.\n", ha);
a9083016 6531
b2000805 6532 ha->flags.purge_mbox = 1;
e46ef004
SK		 6533 /* For ISP82XX, reset_chip is just disabling interrupts.
6534 * Driver waits for the completion of the commands.
6535 * the interrupts need to be enabled.
6536 */
7ec0effd 6537 if (!(IS_P3P_TYPE(ha)))
a9083016
GM		 6538 ha->isp_ops->reset_chip(vha);
6539
9cd883f0
QT		 6540 SAVE_TOPO(ha);
6541 ha->flags.rida_fmt2 = 0;
ec7193e2
QT		 6542 ha->flags.n2n_ae = 0;
6543 ha->flags.lip_ae = 0;
6544 ha->current_topology = 0;
6545 ha->flags.fw_started = 0;
6546 ha->flags.fw_init_done = 0;
b2000805
QT		 6547 ha->chip_reset++;
6548 ha->base_qpair->chip_reset = ha->chip_reset;
7c3f8fd1
QT		 6549 for (i = 0; i < ha->max_qpairs; i++) {
6550 if (ha->queue_pair_map[i])
6551 ha->queue_pair_map[i]->chip_reset =
6552 ha->base_qpair->chip_reset;
6553 }
726b8548 6554
b2000805
QT		 6555 /* purge MBox commands */
6556 if (atomic_read(&ha->num_pend_mbx_stage3)) {
6557 clear_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags);
6558 complete(&ha->mbx_intr_comp);
6559 }
6560
6561 i = 0;
6562 while (atomic_read(&ha->num_pend_mbx_stage3) ||
6563 atomic_read(&ha->num_pend_mbx_stage2) ||
6564 atomic_read(&ha->num_pend_mbx_stage1)) {
6565 msleep(20);
6566 i++;
6567 if (i > 50)
6568 break;
6569 }
6570 ha->flags.purge_mbox = 0;
6571
a9083016
GM		 6572 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
6573 if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
6574 atomic_set(&vha->loop_state, LOOP_DOWN);
6575 qla2x00_mark_all_devices_lost(vha, 0);
feafb7b1
AE		 6576
6577 spin_lock_irqsave(&ha->vport_slock, flags);
579d12b5 6578 list_for_each_entry(vp, &ha->vp_list, list) {
feafb7b1
AE		 6579 atomic_inc(&vp->vref_count);
6580 spin_unlock_irqrestore(&ha->vport_slock, flags);
6581
a9083016 6582 qla2x00_mark_all_devices_lost(vp, 0);
feafb7b1
AE		 6583
6584 spin_lock_irqsave(&ha->vport_slock, flags);
6585 atomic_dec(&vp->vref_count);
6586 }
6587 spin_unlock_irqrestore(&ha->vport_slock, flags);
a9083016
GM		 6588 } else {
6589 if (!atomic_read(&vha->loop_down_timer))
6590 atomic_set(&vha->loop_down_timer,
6591 LOOP_DOWN_TIME);
6592 }
6593
6aef87be
AV		 6594 /* Clear all async request states across all VPs. */
6595 list_for_each_entry(fcport, &vha->vp_fcports, list)
6596 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT);
6597 spin_lock_irqsave(&ha->vport_slock, flags);
6598 list_for_each_entry(vp, &ha->vp_list, list) {
6599 atomic_inc(&vp->vref_count);
6600 spin_unlock_irqrestore(&ha->vport_slock, flags);
6601
6602 list_for_each_entry(fcport, &vp->vp_fcports, list)
6603 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT);
6604
6605 spin_lock_irqsave(&ha->vport_slock, flags);
6606 atomic_dec(&vp->vref_count);
6607 }
6608 spin_unlock_irqrestore(&ha->vport_slock, flags);
6609
bddd2d65
LC		 6610 if (!ha->flags.eeh_busy) {
6611 /* Make sure for ISP 82XX IO DMA is complete */
7ec0effd 6612 if (IS_P3P_TYPE(ha)) {
7190575f 6613 qla82xx_chip_reset_cleanup(vha);
7c3df132
SK		 6614 ql_log(ql_log_info, vha, 0x00b4,
6615 "Done chip reset cleanup.\n");
a9083016 6616
e46ef004
SK		 6617 /* Done waiting for pending commands.
6618 * Reset the online flag.
6619 */
6620 vha->flags.online = 0;
4d78c973 6621 }
a9083016 6622
bddd2d65
LC		 6623 /* Requeue all commands in outstanding command list. */
6624 qla2x00_abort_all_cmds(vha, DID_RESET << 16);
6625 }
b6a029e1
AE		 6626 /* memory barrier */
6627 wmb();
a9083016
GM		 6628}
6629
1da177e4
LT		 6630/*
6631* qla2x00_abort_isp
6632* Resets ISP and aborts all outstanding commands.
6633*
6634* Input:
6635* ha = adapter block pointer.
6636*
6637* Returns:
6638* 0 = success
6639*/
6640int
e315cd28 6641qla2x00_abort_isp(scsi_qla_host_t *vha)
1da177e4 6642{
476e8978 6643 int rval;
1da177e4 6644 uint8_t status = 0;
e315cd28
AC		 6645 struct qla_hw_data *ha = vha->hw;
6646 struct scsi_qla_host *vp;
73208dfd 6647 struct req_que *req = ha->req_q_map[0];
feafb7b1 6648 unsigned long flags;
1da177e4 6649
e315cd28 6650 if (vha->flags.online) {
a9083016 6651 qla2x00_abort_isp_cleanup(vha);
1da177e4 6652
a6171297
SV		 6653 if (IS_QLA8031(ha)) {
6654 ql_dbg(ql_dbg_p3p, vha, 0xb05c,
6655 "Clearing fcoe driver presence.\n");
6656 if (qla83xx_clear_drv_presence(vha) != QLA_SUCCESS)
6657 ql_dbg(ql_dbg_p3p, vha, 0xb073,
6658 "Error while clearing DRV-Presence.\n");
6659 }
6660
85880801
AV		 6661 if (unlikely(pci_channel_offline(ha->pdev) &&
6662 ha->flags.pci_channel_io_perm_failure)) {
6663 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
6664 status = 0;
6665 return status;
6666 }
6667
73208dfd 6668 ha->isp_ops->get_flash_version(vha, req->ring);
30c47662 6669
e315cd28 6670 ha->isp_ops->nvram_config(vha);
1da177e4 6671
e315cd28
AC		 6672 if (!qla2x00_restart_isp(vha)) {
6673 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
1da177e4 6674
e315cd28 6675 if (!atomic_read(&vha->loop_down_timer)) {
1da177e4
LT		 6676 /*
6677 * Issue marker command only when we are going
6678 * to start the I/O .
6679 */
e315cd28 6680 vha->marker_needed = 1;
1da177e4
LT		 6681 }
6682
e315cd28 6683 vha->flags.online = 1;
1da177e4 6684
fd34f556 6685 ha->isp_ops->enable_intrs(ha);
1da177e4 6686
fa2a1ce5 6687 ha->isp_abort_cnt = 0;
e315cd28 6688 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
476e8978 6689
6246b8a1
GM		 6690 if (IS_QLA81XX(ha) || IS_QLA8031(ha))
6691 qla2x00_get_fw_version(vha);
df613b96
AV		 6692 if (ha->fce) {
6693 ha->flags.fce_enabled = 1;
6694 memset(ha->fce, 0,
6695 fce_calc_size(ha->fce_bufs));
e315cd28 6696 rval = qla2x00_enable_fce_trace(vha,
df613b96
AV		 6697 ha->fce_dma, ha->fce_bufs, ha->fce_mb,
6698 &ha->fce_bufs);
6699 if (rval) {
7c3df132 6700 ql_log(ql_log_warn, vha, 0x8033,
df613b96
AV		 6701 "Unable to reinitialize FCE "
6702 "(%d).\n", rval);
6703 ha->flags.fce_enabled = 0;
6704 }
6705 }
436a7b11
AV		 6706
6707 if (ha->eft) {
6708 memset(ha->eft, 0, EFT_SIZE);
e315cd28 6709 rval = qla2x00_enable_eft_trace(vha,
436a7b11
AV		 6710 ha->eft_dma, EFT_NUM_BUFFERS);
6711 if (rval) {
7c3df132 6712 ql_log(ql_log_warn, vha, 0x8034,
436a7b11
AV		 6713 "Unable to reinitialize EFT "
6714 "(%d).\n", rval);
6715 }
6716 }
1da177e4 6717 } else { /* failed the ISP abort */
e315cd28
AC		 6718 vha->flags.online = 1;
6719 if (test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) {
1da177e4 6720 if (ha->isp_abort_cnt == 0) {
7c3df132
SK		 6721 ql_log(ql_log_fatal, vha, 0x8035,
6722 "ISP error recover failed - "
6723 "board disabled.\n");
fa2a1ce5 6724 /*
1da177e4
LT		 6725 * The next call disables the board
6726 * completely.
6727 */
e315cd28
AC		 6728 ha->isp_ops->reset_adapter(vha);
6729 vha->flags.online = 0;
1da177e4 6730 clear_bit(ISP_ABORT_RETRY,
e315cd28 6731 &vha->dpc_flags);
1da177e4
LT		 6732 status = 0;
6733 } else { /* schedule another ISP abort */
6734 ha->isp_abort_cnt--;
7c3df132
SK		 6735 ql_dbg(ql_dbg_taskm, vha, 0x8020,
6736 "ISP abort - retry remaining %d.\n",
6737 ha->isp_abort_cnt);
1da177e4
LT		 6738 status = 1;
6739 }
6740 } else {
6741 ha->isp_abort_cnt = MAX_RETRIES_OF_ISP_ABORT;
7c3df132
SK		 6742 ql_dbg(ql_dbg_taskm, vha, 0x8021,
6743 "ISP error recovery - retrying (%d) "
6744 "more times.\n", ha->isp_abort_cnt);
e315cd28 6745 set_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
1da177e4
LT		 6746 status = 1;
6747 }
6748 }
fa2a1ce5 6749
1da177e4
LT		 6750 }
6751
e315cd28 6752 if (!status) {
7c3df132 6753 ql_dbg(ql_dbg_taskm, vha, 0x8022, "%s succeeded.\n", __func__);
1608cc4a 6754 qla2x00_configure_hba(vha);
feafb7b1
AE		 6755 spin_lock_irqsave(&ha->vport_slock, flags);
6756 list_for_each_entry(vp, &ha->vp_list, list) {
6757 if (vp->vp_idx) {
6758 atomic_inc(&vp->vref_count);
6759 spin_unlock_irqrestore(&ha->vport_slock, flags);
6760
e315cd28 6761 qla2x00_vp_abort_isp(vp);
feafb7b1
AE		 6762
6763 spin_lock_irqsave(&ha->vport_slock, flags);
6764 atomic_dec(&vp->vref_count);
6765 }
e315cd28 6766 }
feafb7b1
AE		 6767 spin_unlock_irqrestore(&ha->vport_slock, flags);
6768
7d613ac6
SV		 6769 if (IS_QLA8031(ha)) {
6770 ql_dbg(ql_dbg_p3p, vha, 0xb05d,
6771 "Setting back fcoe driver presence.\n");
6772 if (qla83xx_set_drv_presence(vha) != QLA_SUCCESS)
6773 ql_dbg(ql_dbg_p3p, vha, 0xb074,
6774 "Error while setting DRV-Presence.\n");
6775 }
e315cd28 6776 } else {
d8424f68
JP		 6777 ql_log(ql_log_warn, vha, 0x8023, "%s **** FAILED ****.\n",
6778 __func__);
1da177e4
LT		 6779 }
6780
6781 return(status);
6782}
6783
6784/*
6785* qla2x00_restart_isp
6786* restarts the ISP after a reset
6787*
6788* Input:
6789* ha = adapter block pointer.
6790*
6791* Returns:
6792* 0 = success
6793*/
6794static int
e315cd28 6795qla2x00_restart_isp(scsi_qla_host_t *vha)
1da177e4 6796{
c6b2fca8 6797 int status = 0;
e315cd28 6798 struct qla_hw_data *ha = vha->hw;
73208dfd
AC		 6799 struct req_que *req = ha->req_q_map[0];
6800 struct rsp_que *rsp = ha->rsp_q_map[0];
1da177e4
LT		 6801
6802 /* If firmware needs to be loaded */
e315cd28
AC		 6803 if (qla2x00_isp_firmware(vha)) {
6804 vha->flags.online = 0;
6805 status = ha->isp_ops->chip_diag(vha);
6806 if (!status)
6807 status = qla2x00_setup_chip(vha);
1da177e4
LT		 6808 }
6809
e315cd28
AC		 6810 if (!status && !(status = qla2x00_init_rings(vha))) {
6811 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
2533cf67 6812 ha->flags.chip_reset_done = 1;
7108b76e 6813
73208dfd
AC		 6814 /* Initialize the queues in use */
6815 qla25xx_init_queues(ha);
6816
e315cd28
AC		 6817 status = qla2x00_fw_ready(vha);
6818 if (!status) {
0107109e 6819 /* Issue a marker after FW becomes ready. */
73208dfd 6820 qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL);
7108b76e 6821 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
1da177e4
LT		 6822 }
6823
6824 /* if no cable then assume it's good */
e315cd28 6825 if ((vha->device_flags & DFLG_NO_CABLE))
1da177e4 6826 status = 0;
1da177e4
LT		 6827 }
6828 return (status);
6829}
6830
73208dfd
AC		 6831static int
6832qla25xx_init_queues(struct qla_hw_data *ha)
6833{
6834 struct rsp_que *rsp = NULL;
6835 struct req_que *req = NULL;
6836 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
6837 int ret = -1;
6838 int i;
6839
2afa19a9 6840 for (i = 1; i < ha->max_rsp_queues; i++) {
73208dfd 6841 rsp = ha->rsp_q_map[i];
cb43285f 6842 if (rsp && test_bit(i, ha->rsp_qid_map)) {
73208dfd 6843 rsp->options &= ~BIT_0;
618a7523 6844 ret = qla25xx_init_rsp_que(base_vha, rsp);
73208dfd 6845 if (ret != QLA_SUCCESS)
7c3df132
SK		 6846 ql_dbg(ql_dbg_init, base_vha, 0x00ff,
6847 "%s Rsp que: %d init failed.\n",
6848 __func__, rsp->id);
73208dfd 6849 else
7c3df132
SK		 6850 ql_dbg(ql_dbg_init, base_vha, 0x0100,
6851 "%s Rsp que: %d inited.\n",
6852 __func__, rsp->id);
73208dfd 6853 }
2afa19a9
AC		 6854 }
6855 for (i = 1; i < ha->max_req_queues; i++) {
73208dfd 6856 req = ha->req_q_map[i];
cb43285f
QT		 6857 if (req && test_bit(i, ha->req_qid_map)) {
6858 /* Clear outstanding commands array. */
73208dfd 6859 req->options &= ~BIT_0;
618a7523 6860 ret = qla25xx_init_req_que(base_vha, req);
73208dfd 6861 if (ret != QLA_SUCCESS)
7c3df132
SK		 6862 ql_dbg(ql_dbg_init, base_vha, 0x0101,
6863 "%s Req que: %d init failed.\n",
6864 __func__, req->id);
73208dfd 6865 else
7c3df132
SK		 6866 ql_dbg(ql_dbg_init, base_vha, 0x0102,
6867 "%s Req que: %d inited.\n",
6868 __func__, req->id);
73208dfd
AC		 6869 }
6870 }
6871 return ret;
6872}
6873
1da177e4
LT		 6874/*
6875* qla2x00_reset_adapter
6876* Reset adapter.
6877*
6878* Input:
6879* ha = adapter block pointer.
6880*/
abbd8870 6881void
e315cd28 6882qla2x00_reset_adapter(scsi_qla_host_t *vha)
1da177e4
LT		 6883{
6884 unsigned long flags = 0;
e315cd28 6885 struct qla_hw_data *ha = vha->hw;
3d71644c 6886 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1da177e4 6887
e315cd28 6888 vha->flags.online = 0;
fd34f556 6889 ha->isp_ops->disable_intrs(ha);
1da177e4 6890
1da177e4
LT		 6891 spin_lock_irqsave(&ha->hardware_lock, flags);
6892 WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
6893 RD_REG_WORD(&reg->hccr); /* PCI Posting. */
6894 WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
6895 RD_REG_WORD(&reg->hccr); /* PCI Posting. */
6896 spin_unlock_irqrestore(&ha->hardware_lock, flags);
6897}
0107109e
AV		 6898
6899void
e315cd28 6900qla24xx_reset_adapter(scsi_qla_host_t *vha)
0107109e
AV		 6901{
6902 unsigned long flags = 0;
e315cd28 6903 struct qla_hw_data *ha = vha->hw;
0107109e
AV		 6904 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
6905
7ec0effd 6906 if (IS_P3P_TYPE(ha))
a9083016
GM		 6907 return;
6908
e315cd28 6909 vha->flags.online = 0;
fd34f556 6910 ha->isp_ops->disable_intrs(ha);
0107109e
AV		 6911
6912 spin_lock_irqsave(&ha->hardware_lock, flags);
6913 WRT_REG_DWORD(&reg->hccr, HCCRX_SET_RISC_RESET);
6914 RD_REG_DWORD(&reg->hccr);
6915 WRT_REG_DWORD(&reg->hccr, HCCRX_REL_RISC_PAUSE);
6916 RD_REG_DWORD(&reg->hccr);
6917 spin_unlock_irqrestore(&ha->hardware_lock, flags);
09ff36d3
AV		 6918
6919 if (IS_NOPOLLING_TYPE(ha))
6920 ha->isp_ops->enable_intrs(ha);
0107109e
AV		 6921}
6922
4e08df3f
DM		 6923/* On sparc systems, obtain port and node WWN from firmware
6924 * properties.
6925 */
e315cd28
AC		 6926static void qla24xx_nvram_wwn_from_ofw(scsi_qla_host_t *vha,
6927 struct nvram_24xx *nv)
4e08df3f
DM		 6928{
6929#ifdef CONFIG_SPARC
e315cd28 6930 struct qla_hw_data *ha = vha->hw;
4e08df3f 6931 struct pci_dev *pdev = ha->pdev;
15576bc8
DM		 6932 struct device_node *dp = pci_device_to_OF_node(pdev);
6933 const u8 *val;
4e08df3f
DM		 6934 int len;
6935
6936 val = of_get_property(dp, "port-wwn", &len);
6937 if (val && len >= WWN_SIZE)
6938 memcpy(nv->port_name, val, WWN_SIZE);
6939
6940 val = of_get_property(dp, "node-wwn", &len);
6941 if (val && len >= WWN_SIZE)
6942 memcpy(nv->node_name, val, WWN_SIZE);
6943#endif
6944}
6945
0107109e 6946int
e315cd28 6947qla24xx_nvram_config(scsi_qla_host_t *vha)
0107109e 6948{
4e08df3f 6949 int rval;
0107109e
AV		 6950 struct init_cb_24xx *icb;
6951 struct nvram_24xx *nv;
6952 uint32_t *dptr;
6953 uint8_t *dptr1, *dptr2;
6954 uint32_t chksum;
6955 uint16_t cnt;
e315cd28 6956 struct qla_hw_data *ha = vha->hw;
0107109e 6957
4e08df3f 6958 rval = QLA_SUCCESS;
0107109e 6959 icb = (struct init_cb_24xx *)ha->init_cb;
281afe19 6960 nv = ha->nvram;
0107109e
AV		 6961
6962 /* Determine NVRAM starting address. */
f73cb695 6963 if (ha->port_no == 0) {
e5b68a61
AC		 6964 ha->nvram_base = FA_NVRAM_FUNC0_ADDR;
6965 ha->vpd_base = FA_NVRAM_VPD0_ADDR;
6966 } else {
0107109e 6967 ha->nvram_base = FA_NVRAM_FUNC1_ADDR;
6f641790 6968 ha->vpd_base = FA_NVRAM_VPD1_ADDR;
6969 }
f73cb695 6970
e5b68a61
AC		 6971 ha->nvram_size = sizeof(struct nvram_24xx);
6972 ha->vpd_size = FA_NVRAM_VPD_SIZE;
0107109e 6973
281afe19
SJ		 6974 /* Get VPD data into cache */
6975 ha->vpd = ha->nvram + VPD_OFFSET;
e315cd28 6976 ha->isp_ops->read_nvram(vha, (uint8_t *)ha->vpd,
281afe19
SJ		 6977 ha->nvram_base - FA_NVRAM_FUNC0_ADDR, FA_NVRAM_VPD_SIZE * 4);
6978
6979 /* Get NVRAM data into cache and calculate checksum. */
0107109e 6980 dptr = (uint32_t *)nv;
e315cd28 6981 ha->isp_ops->read_nvram(vha, (uint8_t *)dptr, ha->nvram_base,
0107109e 6982 ha->nvram_size);
da08ef5c
JC		 6983 for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++, dptr++)
6984 chksum += le32_to_cpu(*dptr);
0107109e 6985
7c3df132
SK		 6986 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x006a,
6987 "Contents of NVRAM\n");
6988 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x010d,
6989 (uint8_t *)nv, ha->nvram_size);
0107109e
AV		 6990
6991 /* Bad NVRAM data, set defaults parameters. */
6992 if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P'
6993 || nv->id[3] != ' ' ||
ad950360 6994 nv->nvram_version < cpu_to_le16(ICB_VERSION)) {
0107109e 6995 /* Reset NVRAM data. */
7c3df132 6996 ql_log(ql_log_warn, vha, 0x006b,
9e336520 6997 "Inconsistent NVRAM detected: checksum=0x%x id=%c "
7c3df132
SK		 6998 "version=0x%x.\n", chksum, nv->id[0], nv->nvram_version);
6999 ql_log(ql_log_warn, vha, 0x006c,
7000 "Falling back to functioning (yet invalid -- WWPN) "
7001 "defaults.\n");
4e08df3f
DM		 7002
7003 /*
7004 * Set default initialization control block.
7005 */
7006 memset(nv, 0, ha->nvram_size);
ad950360
BVA		 7007 nv->nvram_version = cpu_to_le16(ICB_VERSION);
7008 nv->version = cpu_to_le16(ICB_VERSION);
98aee70d 7009 nv->frame_payload_size = 2048;
ad950360
BVA		 7010 nv->execution_throttle = cpu_to_le16(0xFFFF);
7011 nv->exchange_count = cpu_to_le16(0);
7012 nv->hard_address = cpu_to_le16(124);
4e08df3f 7013 nv->port_name[0] = 0x21;
f73cb695 7014 nv->port_name[1] = 0x00 + ha->port_no + 1;
4e08df3f
DM		 7015 nv->port_name[2] = 0x00;
7016 nv->port_name[3] = 0xe0;
7017 nv->port_name[4] = 0x8b;
7018 nv->port_name[5] = 0x1c;
7019 nv->port_name[6] = 0x55;
7020 nv->port_name[7] = 0x86;
7021 nv->node_name[0] = 0x20;
7022 nv->node_name[1] = 0x00;
7023 nv->node_name[2] = 0x00;
7024 nv->node_name[3] = 0xe0;
7025 nv->node_name[4] = 0x8b;
7026 nv->node_name[5] = 0x1c;
7027 nv->node_name[6] = 0x55;
7028 nv->node_name[7] = 0x86;
e315cd28 7029 qla24xx_nvram_wwn_from_ofw(vha, nv);
ad950360
BVA		 7030 nv->login_retry_count = cpu_to_le16(8);
7031 nv->interrupt_delay_timer = cpu_to_le16(0);
7032 nv->login_timeout = cpu_to_le16(0);
4e08df3f 7033 nv->firmware_options_1 =
ad950360
BVA		 7034 cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1);
7035 nv->firmware_options_2 = cpu_to_le32(2 << 4);
7036 nv->firmware_options_2 |= cpu_to_le32(BIT_12);
7037 nv->firmware_options_3 = cpu_to_le32(2 << 13);
7038 nv->host_p = cpu_to_le32(BIT_11|BIT_10);
7039 nv->efi_parameters = cpu_to_le32(0);
4e08df3f 7040 nv->reset_delay = 5;
ad950360
BVA		 7041 nv->max_luns_per_target = cpu_to_le16(128);
7042 nv->port_down_retry_count = cpu_to_le16(30);
7043 nv->link_down_timeout = cpu_to_le16(30);
4e08df3f
DM		 7044
7045 rval = 1;
0107109e
AV		 7046 }
7047
726b8548 7048 if (qla_tgt_mode_enabled(vha)) {
2d70c103 7049 /* Don't enable full login after initial LIP */
ad950360 7050 nv->firmware_options_1 &= cpu_to_le32(~BIT_13);
2d70c103 7051 /* Don't enable LIP full login for initiator */
ad950360 7052 nv->host_p &= cpu_to_le32(~BIT_10);
2d70c103
NB		 7053 }
7054
7055 qlt_24xx_config_nvram_stage1(vha, nv);
7056
0107109e 7057 /* Reset Initialization control block */
e315cd28 7058 memset(icb, 0, ha->init_cb_size);
0107109e
AV		 7059
7060 /* Copy 1st segment. */
7061 dptr1 = (uint8_t *)icb;
7062 dptr2 = (uint8_t *)&nv->version;
7063 cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version;
7064 while (cnt--)
7065 *dptr1++ = *dptr2++;
7066
7067 icb->login_retry_count = nv->login_retry_count;
3ea66e28 7068 icb->link_down_on_nos = nv->link_down_on_nos;
0107109e
AV		 7069
7070 /* Copy 2nd segment. */
7071 dptr1 = (uint8_t *)&icb->interrupt_delay_timer;
7072 dptr2 = (uint8_t *)&nv->interrupt_delay_timer;
7073 cnt = (uint8_t *)&icb->reserved_3 -
7074 (uint8_t *)&icb->interrupt_delay_timer;
7075 while (cnt--)
7076 *dptr1++ = *dptr2++;
0eaaca4c 7077 ha->frame_payload_size = le16_to_cpu(icb->frame_payload_size);
0107109e
AV		 7078 /*
7079 * Setup driver NVRAM options.
7080 */
e315cd28 7081 qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name),
9bb9fcf2 7082 "QLA2462");
0107109e 7083
2d70c103
NB		 7084 qlt_24xx_config_nvram_stage2(vha, icb);
7085
ad950360 7086 if (nv->host_p & cpu_to_le32(BIT_15)) {
2d70c103 7087 /* Use alternate WWN? */
5341e868
AV		 7088 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
7089 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
7090 }
7091
0107109e 7092 /* Prepare nodename */
ad950360 7093 if ((icb->firmware_options_1 & cpu_to_le32(BIT_14)) == 0) {
0107109e
AV		 7094 /*
7095 * Firmware will apply the following mask if the nodename was
7096 * not provided.
7097 */
7098 memcpy(icb->node_name, icb->port_name, WWN_SIZE);
7099 icb->node_name[0] &= 0xF0;
7100 }
7101
7102 /* Set host adapter parameters. */
7103 ha->flags.disable_risc_code_load = 0;
0c8c39af
AV		 7104 ha->flags.enable_lip_reset = 0;
7105 ha->flags.enable_lip_full_login =
7106 le32_to_cpu(nv->host_p) & BIT_10 ? 1: 0;
7107 ha->flags.enable_target_reset =
7108 le32_to_cpu(nv->host_p) & BIT_11 ? 1: 0;
0107109e 7109 ha->flags.enable_led_scheme = 0;
d4c760c2 7110 ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1: 0;
0107109e 7111
fd0e7e4d
AV		 7112 ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) &
7113 (BIT_6 | BIT_5 | BIT_4)) >> 4;
0107109e
AV		 7114
7115 memcpy(ha->fw_seriallink_options24, nv->seriallink_options,
7116 sizeof(ha->fw_seriallink_options24));
7117
7118 /* save HBA serial number */
7119 ha->serial0 = icb->port_name[5];
7120 ha->serial1 = icb->port_name[6];
7121 ha->serial2 = icb->port_name[7];
e315cd28
AC		 7122 memcpy(vha->node_name, icb->node_name, WWN_SIZE);
7123 memcpy(vha->port_name, icb->port_name, WWN_SIZE);
0107109e 7124
ad950360 7125 icb->execution_throttle = cpu_to_le16(0xFFFF);
bc8fb3cb 7126
0107109e
AV		 7127 ha->retry_count = le16_to_cpu(nv->login_retry_count);
7128
7129 /* Set minimum login_timeout to 4 seconds. */
7130 if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout)
7131 nv->login_timeout = cpu_to_le16(ql2xlogintimeout);
7132 if (le16_to_cpu(nv->login_timeout) < 4)
ad950360 7133 nv->login_timeout = cpu_to_le16(4);
0107109e 7134 ha->login_timeout = le16_to_cpu(nv->login_timeout);
0107109e 7135
00a537b8
AV		 7136 /* Set minimum RATOV to 100 tenths of a second. */
7137 ha->r_a_tov = 100;
0107109e
AV		 7138
7139 ha->loop_reset_delay = nv->reset_delay;
7140
7141 /* Link Down Timeout = 0:
7142 *
7143 * When Port Down timer expires we will start returning
7144 * I/O's to OS with "DID_NO_CONNECT".
7145 *
7146 * Link Down Timeout != 0:
7147 *
7148 * The driver waits for the link to come up after link down
7149 * before returning I/Os to OS with "DID_NO_CONNECT".
7150 */
7151 if (le16_to_cpu(nv->link_down_timeout) == 0) {
7152 ha->loop_down_abort_time =
7153 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
7154 } else {
7155 ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout);
7156 ha->loop_down_abort_time =
7157 (LOOP_DOWN_TIME - ha->link_down_timeout);
7158 }
7159
7160 /* Need enough time to try and get the port back. */
7161 ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count);
7162 if (qlport_down_retry)
7163 ha->port_down_retry_count = qlport_down_retry;
7164
7165 /* Set login_retry_count */
7166 ha->login_retry_count = le16_to_cpu(nv->login_retry_count);
7167 if (ha->port_down_retry_count ==
7168 le16_to_cpu(nv->port_down_retry_count) &&
7169 ha->port_down_retry_count > 3)
7170 ha->login_retry_count = ha->port_down_retry_count;
7171 else if (ha->port_down_retry_count > (int)ha->login_retry_count)
7172 ha->login_retry_count = ha->port_down_retry_count;
7173 if (ql2xloginretrycount)
7174 ha->login_retry_count = ql2xloginretrycount;
7175
8777e431
QT		 7176 /* N2N: driver will initiate Login instead of FW */
7177 icb->firmware_options_3 |= BIT_8;
7178
4fdfefe5 7179 /* Enable ZIO. */
e315cd28 7180 if (!vha->flags.init_done) {
4fdfefe5
AV		 7181 ha->zio_mode = le32_to_cpu(icb->firmware_options_2) &
7182 (BIT_3 | BIT_2 | BIT_1 | BIT_0);
7183 ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ?
7184 le16_to_cpu(icb->interrupt_delay_timer): 2;
7185 }
ad950360 7186 icb->firmware_options_2 &= cpu_to_le32(
4fdfefe5 7187 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0));
4fdfefe5 7188 if (ha->zio_mode != QLA_ZIO_DISABLED) {
4a59f71d 7189 ha->zio_mode = QLA_ZIO_MODE_6;
7190
7c3df132 7191 ql_log(ql_log_info, vha, 0x006f,
4fdfefe5
AV		 7192 "ZIO mode %d enabled; timer delay (%d us).\n",
7193 ha->zio_mode, ha->zio_timer * 100);
7194
7195 icb->firmware_options_2 |= cpu_to_le32(
7196 (uint32_t)ha->zio_mode);
7197 icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer);
4fdfefe5
AV		 7198 }
7199
4e08df3f 7200 if (rval) {
7c3df132
SK		 7201 ql_log(ql_log_warn, vha, 0x0070,
7202 "NVRAM configuration failed.\n");
4e08df3f
DM		 7203 }
7204 return (rval);
0107109e
AV		 7205}
7206
4243c115
SC		 7207uint8_t qla27xx_find_valid_image(struct scsi_qla_host *vha)
7208{
7209 struct qla27xx_image_status pri_image_status, sec_image_status;
7210 uint8_t valid_pri_image, valid_sec_image;
7211 uint32_t *wptr;
7212 uint32_t cnt, chksum, size;
7213 struct qla_hw_data *ha = vha->hw;
7214
7215 valid_pri_image = valid_sec_image = 1;
7216 ha->active_image = 0;
7217 size = sizeof(struct qla27xx_image_status) / sizeof(uint32_t);
7218
7219 if (!ha->flt_region_img_status_pri) {
7220 valid_pri_image = 0;
7221 goto check_sec_image;
7222 }
7223
7224 qla24xx_read_flash_data(vha, (uint32_t *)(&pri_image_status),
7225 ha->flt_region_img_status_pri, size);
7226
7227 if (pri_image_status.signature != QLA27XX_IMG_STATUS_SIGN) {
7228 ql_dbg(ql_dbg_init, vha, 0x018b,
7229 "Primary image signature (0x%x) not valid\n",
7230 pri_image_status.signature);
7231 valid_pri_image = 0;
7232 goto check_sec_image;
7233 }
7234
7235 wptr = (uint32_t *)(&pri_image_status);
7236 cnt = size;
7237
da08ef5c
JC		 7238 for (chksum = 0; cnt--; wptr++)
7239 chksum += le32_to_cpu(*wptr);
41dc529a 7240
4243c115
SC		 7241 if (chksum) {
7242 ql_dbg(ql_dbg_init, vha, 0x018c,
7243 "Checksum validation failed for primary image (0x%x)\n",
7244 chksum);
7245 valid_pri_image = 0;
7246 }
7247
7248check_sec_image:
7249 if (!ha->flt_region_img_status_sec) {
7250 valid_sec_image = 0;
7251 goto check_valid_image;
7252 }
7253
7254 qla24xx_read_flash_data(vha, (uint32_t *)(&sec_image_status),
7255 ha->flt_region_img_status_sec, size);
7256
7257 if (sec_image_status.signature != QLA27XX_IMG_STATUS_SIGN) {
7258 ql_dbg(ql_dbg_init, vha, 0x018d,
7259 "Secondary image signature(0x%x) not valid\n",
7260 sec_image_status.signature);
7261 valid_sec_image = 0;
7262 goto check_valid_image;
7263 }
7264
7265 wptr = (uint32_t *)(&sec_image_status);
7266 cnt = size;
da08ef5c
JC		 7267 for (chksum = 0; cnt--; wptr++)
7268 chksum += le32_to_cpu(*wptr);
4243c115
SC		 7269 if (chksum) {
7270 ql_dbg(ql_dbg_init, vha, 0x018e,
7271 "Checksum validation failed for secondary image (0x%x)\n",
7272 chksum);
7273 valid_sec_image = 0;
7274 }
7275
7276check_valid_image:
7277 if (valid_pri_image && (pri_image_status.image_status_mask & 0x1))
7278 ha->active_image = QLA27XX_PRIMARY_IMAGE;
7279 if (valid_sec_image && (sec_image_status.image_status_mask & 0x1)) {
7280 if (!ha->active_image ||
7281 pri_image_status.generation_number <
7282 sec_image_status.generation_number)
7283 ha->active_image = QLA27XX_SECONDARY_IMAGE;
7284 }
7285
22ebde16 7286 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x018f, "%s image\n",
4243c115
SC		 7287 ha->active_image == 0 ? "default bootld and fw" :
7288 ha->active_image == 1 ? "primary" :
7289 ha->active_image == 2 ? "secondary" :
7290 "Invalid");
7291
7292 return ha->active_image;
7293}
7294
413975a0 7295static int
cbc8eb67
AV		 7296qla24xx_load_risc_flash(scsi_qla_host_t *vha, uint32_t *srisc_addr,
7297 uint32_t faddr)
d1c61909 7298{
73208dfd 7299 int rval = QLA_SUCCESS;
d1c61909 7300 int segments, fragment;
d1c61909
AV		 7301 uint32_t *dcode, dlen;
7302 uint32_t risc_addr;
7303 uint32_t risc_size;
7304 uint32_t i;
e315cd28 7305 struct qla_hw_data *ha = vha->hw;
73208dfd 7306 struct req_que *req = ha->req_q_map[0];
eaac30be 7307
7c3df132 7308 ql_dbg(ql_dbg_init, vha, 0x008b,
cfb0919c 7309 "FW: Loading firmware from flash (%x).\n", faddr);
eaac30be 7310
d1c61909
AV		 7311 rval = QLA_SUCCESS;
7312
7313 segments = FA_RISC_CODE_SEGMENTS;
73208dfd 7314 dcode = (uint32_t *)req->ring;
d1c61909
AV		 7315 *srisc_addr = 0;
7316
4243c115
SC		 7317 if (IS_QLA27XX(ha) &&
7318 qla27xx_find_valid_image(vha) == QLA27XX_SECONDARY_IMAGE)
7319 faddr = ha->flt_region_fw_sec;
7320
d1c61909 7321 /* Validate firmware image by checking version. */
e315cd28 7322 qla24xx_read_flash_data(vha, dcode, faddr + 4, 4);
d1c61909
AV		 7323 for (i = 0; i < 4; i++)
7324 dcode[i] = be32_to_cpu(dcode[i]);
7325 if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff &&
7326 dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) ||
7327 (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 &&
7328 dcode[3] == 0)) {
7c3df132
SK		 7329 ql_log(ql_log_fatal, vha, 0x008c,
7330 "Unable to verify the integrity of flash firmware "
7331 "image.\n");
7332 ql_log(ql_log_fatal, vha, 0x008d,
7333 "Firmware data: %08x %08x %08x %08x.\n",
7334 dcode[0], dcode[1], dcode[2], dcode[3]);
d1c61909
AV		 7335
7336 return QLA_FUNCTION_FAILED;
7337 }
7338
7339 while (segments && rval == QLA_SUCCESS) {
7340 /* Read segment's load information. */
e315cd28 7341 qla24xx_read_flash_data(vha, dcode, faddr, 4);
d1c61909
AV		 7342
7343 risc_addr = be32_to_cpu(dcode[2]);
7344 *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr;
7345 risc_size = be32_to_cpu(dcode[3]);
7346
7347 fragment = 0;
7348 while (risc_size > 0 && rval == QLA_SUCCESS) {
7349 dlen = (uint32_t)(ha->fw_transfer_size >> 2);
7350 if (dlen > risc_size)
7351 dlen = risc_size;
7352
7c3df132
SK		 7353 ql_dbg(ql_dbg_init, vha, 0x008e,
7354 "Loading risc segment@ risc addr %x "
7355 "number of dwords 0x%x offset 0x%x.\n",
7356 risc_addr, dlen, faddr);
d1c61909 7357
e315cd28 7358 qla24xx_read_flash_data(vha, dcode, faddr, dlen);
d1c61909
AV		 7359 for (i = 0; i < dlen; i++)
7360 dcode[i] = swab32(dcode[i]);
7361
73208dfd 7362 rval = qla2x00_load_ram(vha, req->dma, risc_addr,
d1c61909
AV		 7363 dlen);
7364 if (rval) {
7c3df132
SK		 7365 ql_log(ql_log_fatal, vha, 0x008f,
7366 "Failed to load segment %d of firmware.\n",
7367 fragment);
f261f7af 7368 return QLA_FUNCTION_FAILED;
d1c61909
AV		 7369 }
7370
7371 faddr += dlen;
7372 risc_addr += dlen;
7373 risc_size -= dlen;
7374 fragment++;
7375 }
7376
7377 /* Next segment. */
7378 segments--;
7379 }
7380
f73cb695
CD		 7381 if (!IS_QLA27XX(ha))
7382 return rval;
7383
7384 if (ha->fw_dump_template)
7385 vfree(ha->fw_dump_template);
7386 ha->fw_dump_template = NULL;
7387 ha->fw_dump_template_len = 0;
7388
7389 ql_dbg(ql_dbg_init, vha, 0x0161,
7390 "Loading fwdump template from %x\n", faddr);
7391 qla24xx_read_flash_data(vha, dcode, faddr, 7);
7392 risc_size = be32_to_cpu(dcode[2]);
7393 ql_dbg(ql_dbg_init, vha, 0x0162,
7394 "-> array size %x dwords\n", risc_size);
7395 if (risc_size == 0 || risc_size == ~0)
7396 goto default_template;
7397
7398 dlen = (risc_size - 8) * sizeof(*dcode);
7399 ql_dbg(ql_dbg_init, vha, 0x0163,
7400 "-> template allocating %x bytes...\n", dlen);
7401 ha->fw_dump_template = vmalloc(dlen);
7402 if (!ha->fw_dump_template) {
7403 ql_log(ql_log_warn, vha, 0x0164,
7404 "Failed fwdump template allocate %x bytes.\n", risc_size);
7405 goto default_template;
7406 }
7407
7408 faddr += 7;
7409 risc_size -= 8;
7410 dcode = ha->fw_dump_template;
7411 qla24xx_read_flash_data(vha, dcode, faddr, risc_size);
7412 for (i = 0; i < risc_size; i++)
7413 dcode[i] = le32_to_cpu(dcode[i]);
7414
7415 if (!qla27xx_fwdt_template_valid(dcode)) {
7416 ql_log(ql_log_warn, vha, 0x0165,
7417 "Failed fwdump template validate\n");
7418 goto default_template;
7419 }
7420
7421 dlen = qla27xx_fwdt_template_size(dcode);
7422 ql_dbg(ql_dbg_init, vha, 0x0166,
7423 "-> template size %x bytes\n", dlen);
7424 if (dlen > risc_size * sizeof(*dcode)) {
7425 ql_log(ql_log_warn, vha, 0x0167,
4fae52b5 7426 "Failed fwdump template exceeds array by %zx bytes\n",
383a298b 7427 (size_t)(dlen - risc_size * sizeof(*dcode)));
f73cb695
CD		 7428 goto default_template;
7429 }
7430 ha->fw_dump_template_len = dlen;
7431 return rval;
7432
7433default_template:
7434 ql_log(ql_log_warn, vha, 0x0168, "Using default fwdump template\n");
7435 if (ha->fw_dump_template)
7436 vfree(ha->fw_dump_template);
7437 ha->fw_dump_template = NULL;
7438 ha->fw_dump_template_len = 0;
7439
7440 dlen = qla27xx_fwdt_template_default_size();
7441 ql_dbg(ql_dbg_init, vha, 0x0169,
7442 "-> template allocating %x bytes...\n", dlen);
7443 ha->fw_dump_template = vmalloc(dlen);
7444 if (!ha->fw_dump_template) {
7445 ql_log(ql_log_warn, vha, 0x016a,
7446 "Failed fwdump template allocate %x bytes.\n", risc_size);
7447 goto failed_template;
7448 }
7449
7450 dcode = ha->fw_dump_template;
7451 risc_size = dlen / sizeof(*dcode);
7452 memcpy(dcode, qla27xx_fwdt_template_default(), dlen);
7453 for (i = 0; i < risc_size; i++)
7454 dcode[i] = be32_to_cpu(dcode[i]);
7455
7456 if (!qla27xx_fwdt_template_valid(ha->fw_dump_template)) {
7457 ql_log(ql_log_warn, vha, 0x016b,
7458 "Failed fwdump template validate\n");
7459 goto failed_template;
7460 }
7461
7462 dlen = qla27xx_fwdt_template_size(ha->fw_dump_template);
7463 ql_dbg(ql_dbg_init, vha, 0x016c,
7464 "-> template size %x bytes\n", dlen);
7465 ha->fw_dump_template_len = dlen;
7466 return rval;
7467
7468failed_template:
7469 ql_log(ql_log_warn, vha, 0x016d, "Failed default fwdump template\n");
7470 if (ha->fw_dump_template)
7471 vfree(ha->fw_dump_template);
7472 ha->fw_dump_template = NULL;
7473 ha->fw_dump_template_len = 0;
d1c61909
AV		 7474 return rval;
7475}
7476
e9454a88 7477#define QLA_FW_URL "http://ldriver.qlogic.com/firmware/"
d1c61909 7478
0107109e 7479int
e315cd28 7480qla2x00_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
5433383e
AV		 7481{
7482 int rval;
7483 int i, fragment;
7484 uint16_t *wcode, *fwcode;
7485 uint32_t risc_addr, risc_size, fwclen, wlen, *seg;
7486 struct fw_blob *blob;
e315cd28 7487 struct qla_hw_data *ha = vha->hw;
73208dfd 7488 struct req_que *req = ha->req_q_map[0];
5433383e
AV		 7489
7490 /* Load firmware blob. */
e315cd28 7491 blob = qla2x00_request_firmware(vha);
5433383e 7492 if (!blob) {
7c3df132 7493 ql_log(ql_log_info, vha, 0x0083,
94bcf830 7494 "Firmware image unavailable.\n");
7c3df132
SK		 7495 ql_log(ql_log_info, vha, 0x0084,
7496 "Firmware images can be retrieved from: "QLA_FW_URL ".\n");
5433383e
AV		 7497 return QLA_FUNCTION_FAILED;
7498 }
7499
7500 rval = QLA_SUCCESS;
7501
73208dfd 7502 wcode = (uint16_t *)req->ring;
5433383e
AV		 7503 *srisc_addr = 0;
7504 fwcode = (uint16_t *)blob->fw->data;
7505 fwclen = 0;
7506
7507 /* Validate firmware image by checking version. */
7508 if (blob->fw->size < 8 * sizeof(uint16_t)) {
7c3df132 7509 ql_log(ql_log_fatal, vha, 0x0085,
5b5e0928 7510 "Unable to verify integrity of firmware image (%zd).\n",
5433383e
AV		 7511 blob->fw->size);
7512 goto fail_fw_integrity;
7513 }
7514 for (i = 0; i < 4; i++)
7515 wcode[i] = be16_to_cpu(fwcode[i + 4]);
7516 if ((wcode[0] == 0xffff && wcode[1] == 0xffff && wcode[2] == 0xffff &&
7517 wcode[3] == 0xffff) || (wcode[0] == 0 && wcode[1] == 0 &&
7518 wcode[2] == 0 && wcode[3] == 0)) {
7c3df132
SK		 7519 ql_log(ql_log_fatal, vha, 0x0086,
7520 "Unable to verify integrity of firmware image.\n");
7521 ql_log(ql_log_fatal, vha, 0x0087,
7522 "Firmware data: %04x %04x %04x %04x.\n",
7523 wcode[0], wcode[1], wcode[2], wcode[3]);
5433383e
AV		 7524 goto fail_fw_integrity;
7525 }
7526
7527 seg = blob->segs;
7528 while (*seg && rval == QLA_SUCCESS) {
7529 risc_addr = *seg;
7530 *srisc_addr = *srisc_addr == 0 ? *seg : *srisc_addr;
7531 risc_size = be16_to_cpu(fwcode[3]);
7532
7533 /* Validate firmware image size. */
7534 fwclen += risc_size * sizeof(uint16_t);
7535 if (blob->fw->size < fwclen) {
7c3df132 7536 ql_log(ql_log_fatal, vha, 0x0088,
5433383e 7537 "Unable to verify integrity of firmware image "
5b5e0928 7538 "(%zd).\n", blob->fw->size);
5433383e
AV		 7539 goto fail_fw_integrity;
7540 }
7541
7542 fragment = 0;
7543 while (risc_size > 0 && rval == QLA_SUCCESS) {
7544 wlen = (uint16_t)(ha->fw_transfer_size >> 1);
7545 if (wlen > risc_size)
7546 wlen = risc_size;
7c3df132
SK		 7547 ql_dbg(ql_dbg_init, vha, 0x0089,
7548 "Loading risc segment@ risc addr %x number of "
7549 "words 0x%x.\n", risc_addr, wlen);
5433383e
AV		 7550
7551 for (i = 0; i < wlen; i++)
7552 wcode[i] = swab16(fwcode[i]);
7553
73208dfd 7554 rval = qla2x00_load_ram(vha, req->dma, risc_addr,
5433383e
AV		 7555 wlen);
7556 if (rval) {
7c3df132
SK		 7557 ql_log(ql_log_fatal, vha, 0x008a,
7558 "Failed to load segment %d of firmware.\n",
7559 fragment);
5433383e
AV		 7560 break;
7561 }
7562
7563 fwcode += wlen;
7564 risc_addr += wlen;
7565 risc_size -= wlen;
7566 fragment++;
7567 }
7568
7569 /* Next segment. */
7570 seg++;
7571 }
7572 return rval;
7573
7574fail_fw_integrity:
7575 return QLA_FUNCTION_FAILED;
7576}
7577
eaac30be
AV		 7578static int
7579qla24xx_load_risc_blob(scsi_qla_host_t *vha, uint32_t *srisc_addr)
0107109e
AV		 7580{
7581 int rval;
7582 int segments, fragment;
7583 uint32_t *dcode, dlen;
7584 uint32_t risc_addr;
7585 uint32_t risc_size;
7586 uint32_t i;
5433383e 7587 struct fw_blob *blob;
f73cb695
CD		 7588 const uint32_t *fwcode;
7589 uint32_t fwclen;
e315cd28 7590 struct qla_hw_data *ha = vha->hw;
73208dfd 7591 struct req_que *req = ha->req_q_map[0];
0107109e 7592
5433383e 7593 /* Load firmware blob. */
e315cd28 7594 blob = qla2x00_request_firmware(vha);
5433383e 7595 if (!blob) {
7c3df132 7596 ql_log(ql_log_warn, vha, 0x0090,
94bcf830 7597 "Firmware image unavailable.\n");
7c3df132
SK		 7598 ql_log(ql_log_warn, vha, 0x0091,
7599 "Firmware images can be retrieved from: "
7600 QLA_FW_URL ".\n");
d1c61909 7601
eaac30be 7602 return QLA_FUNCTION_FAILED;
0107109e
AV		 7603 }
7604
cfb0919c
CD		 7605 ql_dbg(ql_dbg_init, vha, 0x0092,
7606 "FW: Loading via request-firmware.\n");
eaac30be 7607
0107109e
AV		 7608 rval = QLA_SUCCESS;
7609
7610 segments = FA_RISC_CODE_SEGMENTS;
73208dfd 7611 dcode = (uint32_t *)req->ring;
0107109e 7612 *srisc_addr = 0;
5433383e 7613 fwcode = (uint32_t *)blob->fw->data;
0107109e
AV		 7614 fwclen = 0;
7615
7616 /* Validate firmware image by checking version. */
5433383e 7617 if (blob->fw->size < 8 * sizeof(uint32_t)) {
7c3df132 7618 ql_log(ql_log_fatal, vha, 0x0093,
5b5e0928 7619 "Unable to verify integrity of firmware image (%zd).\n",
5433383e 7620 blob->fw->size);
f73cb695 7621 return QLA_FUNCTION_FAILED;
0107109e
AV		 7622 }
7623 for (i = 0; i < 4; i++)
7624 dcode[i] = be32_to_cpu(fwcode[i + 4]);
7625 if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff &&
7626 dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) ||
7627 (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 &&
7628 dcode[3] == 0)) {
7c3df132 7629 ql_log(ql_log_fatal, vha, 0x0094,
5b5e0928 7630 "Unable to verify integrity of firmware image (%zd).\n",
7c3df132
SK		 7631 blob->fw->size);
7632 ql_log(ql_log_fatal, vha, 0x0095,
7633 "Firmware data: %08x %08x %08x %08x.\n",
7634 dcode[0], dcode[1], dcode[2], dcode[3]);
f73cb695 7635 return QLA_FUNCTION_FAILED;
0107109e
AV		 7636 }
7637
7638 while (segments && rval == QLA_SUCCESS) {
7639 risc_addr = be32_to_cpu(fwcode[2]);
7640 *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr;
7641 risc_size = be32_to_cpu(fwcode[3]);
7642
7643 /* Validate firmware image size. */
7644 fwclen += risc_size * sizeof(uint32_t);
5433383e 7645 if (blob->fw->size < fwclen) {
7c3df132 7646 ql_log(ql_log_fatal, vha, 0x0096,
5433383e 7647 "Unable to verify integrity of firmware image "
5b5e0928 7648 "(%zd).\n", blob->fw->size);
f73cb695 7649 return QLA_FUNCTION_FAILED;
0107109e
AV		 7650 }
7651
7652 fragment = 0;
7653 while (risc_size > 0 && rval == QLA_SUCCESS) {
7654 dlen = (uint32_t)(ha->fw_transfer_size >> 2);
7655 if (dlen > risc_size)
7656 dlen = risc_size;
7657
7c3df132
SK		 7658 ql_dbg(ql_dbg_init, vha, 0x0097,
7659 "Loading risc segment@ risc addr %x "
7660 "number of dwords 0x%x.\n", risc_addr, dlen);
0107109e
AV		 7661
7662 for (i = 0; i < dlen; i++)
7663 dcode[i] = swab32(fwcode[i]);
7664
73208dfd 7665 rval = qla2x00_load_ram(vha, req->dma, risc_addr,
590f98e5 7666 dlen);
0107109e 7667 if (rval) {
7c3df132
SK		 7668 ql_log(ql_log_fatal, vha, 0x0098,
7669 "Failed to load segment %d of firmware.\n",
7670 fragment);
f261f7af 7671 return QLA_FUNCTION_FAILED;
0107109e
AV		 7672 }
7673
7674 fwcode += dlen;
7675 risc_addr += dlen;
7676 risc_size -= dlen;
7677 fragment++;
7678 }
7679
7680 /* Next segment. */
7681 segments--;
7682 }
f73cb695
CD		 7683
7684 if (!IS_QLA27XX(ha))
7685 return rval;
7686
7687 if (ha->fw_dump_template)
7688 vfree(ha->fw_dump_template);
7689 ha->fw_dump_template = NULL;
7690 ha->fw_dump_template_len = 0;
7691
7692 ql_dbg(ql_dbg_init, vha, 0x171,
97ea702b
CD		 7693 "Loading fwdump template from %x\n",
7694 (uint32_t)((void *)fwcode - (void *)blob->fw->data));
f73cb695
CD		 7695 risc_size = be32_to_cpu(fwcode[2]);
7696 ql_dbg(ql_dbg_init, vha, 0x172,
7697 "-> array size %x dwords\n", risc_size);
7698 if (risc_size == 0 || risc_size == ~0)
7699 goto default_template;
7700
7701 dlen = (risc_size - 8) * sizeof(*fwcode);
7702 ql_dbg(ql_dbg_init, vha, 0x0173,
7703 "-> template allocating %x bytes...\n", dlen);
7704 ha->fw_dump_template = vmalloc(dlen);
7705 if (!ha->fw_dump_template) {
7706 ql_log(ql_log_warn, vha, 0x0174,
7707 "Failed fwdump template allocate %x bytes.\n", risc_size);
7708 goto default_template;
7709 }
7710
7711 fwcode += 7;
7712 risc_size -= 8;
7713 dcode = ha->fw_dump_template;
7714 for (i = 0; i < risc_size; i++)
7715 dcode[i] = le32_to_cpu(fwcode[i]);
7716
7717 if (!qla27xx_fwdt_template_valid(dcode)) {
7718 ql_log(ql_log_warn, vha, 0x0175,
7719 "Failed fwdump template validate\n");
7720 goto default_template;
7721 }
7722
7723 dlen = qla27xx_fwdt_template_size(dcode);
7724 ql_dbg(ql_dbg_init, vha, 0x0176,
7725 "-> template size %x bytes\n", dlen);
7726 if (dlen > risc_size * sizeof(*fwcode)) {
7727 ql_log(ql_log_warn, vha, 0x0177,
4fae52b5 7728 "Failed fwdump template exceeds array by %zx bytes\n",
383a298b 7729 (size_t)(dlen - risc_size * sizeof(*fwcode)));
f73cb695
CD		 7730 goto default_template;
7731 }
7732 ha->fw_dump_template_len = dlen;
0107109e
AV		 7733 return rval;
7734
f73cb695
CD		 7735default_template:
7736 ql_log(ql_log_warn, vha, 0x0178, "Using default fwdump template\n");
7737 if (ha->fw_dump_template)
7738 vfree(ha->fw_dump_template);
7739 ha->fw_dump_template = NULL;
7740 ha->fw_dump_template_len = 0;
7741
7742 dlen = qla27xx_fwdt_template_default_size();
7743 ql_dbg(ql_dbg_init, vha, 0x0179,
7744 "-> template allocating %x bytes...\n", dlen);
7745 ha->fw_dump_template = vmalloc(dlen);
7746 if (!ha->fw_dump_template) {
7747 ql_log(ql_log_warn, vha, 0x017a,
7748 "Failed fwdump template allocate %x bytes.\n", risc_size);
7749 goto failed_template;
7750 }
7751
7752 dcode = ha->fw_dump_template;
7753 risc_size = dlen / sizeof(*fwcode);
7754 fwcode = qla27xx_fwdt_template_default();
7755 for (i = 0; i < risc_size; i++)
7756 dcode[i] = be32_to_cpu(fwcode[i]);
7757
7758 if (!qla27xx_fwdt_template_valid(ha->fw_dump_template)) {
7759 ql_log(ql_log_warn, vha, 0x017b,
7760 "Failed fwdump template validate\n");
7761 goto failed_template;
7762 }
7763
7764 dlen = qla27xx_fwdt_template_size(ha->fw_dump_template);
7765 ql_dbg(ql_dbg_init, vha, 0x017c,
7766 "-> template size %x bytes\n", dlen);
7767 ha->fw_dump_template_len = dlen;
7768 return rval;
7769
7770failed_template:
7771 ql_log(ql_log_warn, vha, 0x017d, "Failed default fwdump template\n");
7772 if (ha->fw_dump_template)
7773 vfree(ha->fw_dump_template);
7774 ha->fw_dump_template = NULL;
7775 ha->fw_dump_template_len = 0;
7776 return rval;
0107109e 7777}
18c6c127 7778
eaac30be
AV		 7779int
7780qla24xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
7781{
7782 int rval;
7783
e337d907
AV		 7784 if (ql2xfwloadbin == 1)
7785 return qla81xx_load_risc(vha, srisc_addr);
7786
eaac30be
AV		 7787 /*
7788 * FW Load priority:
7789 * 1) Firmware via request-firmware interface (.bin file).
7790 * 2) Firmware residing in flash.
7791 */
7792 rval = qla24xx_load_risc_blob(vha, srisc_addr);
7793 if (rval == QLA_SUCCESS)
7794 return rval;
7795
cbc8eb67
AV		 7796 return qla24xx_load_risc_flash(vha, srisc_addr,
7797 vha->hw->flt_region_fw);
eaac30be
AV		 7798}
7799
7800int
7801qla81xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
7802{
7803 int rval;
cbc8eb67 7804 struct qla_hw_data *ha = vha->hw;
eaac30be 7805
e337d907 7806 if (ql2xfwloadbin == 2)
cbc8eb67 7807 goto try_blob_fw;
e337d907 7808
eaac30be
AV		 7809 /*
7810 * FW Load priority:
7811 * 1) Firmware residing in flash.
7812 * 2) Firmware via request-firmware interface (.bin file).
cbc8eb67 7813 * 3) Golden-Firmware residing in flash -- limited operation.
eaac30be 7814 */
cbc8eb67 7815 rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_fw);
eaac30be
AV		 7816 if (rval == QLA_SUCCESS)
7817 return rval;
7818
cbc8eb67
AV		 7819try_blob_fw:
7820 rval = qla24xx_load_risc_blob(vha, srisc_addr);
7821 if (rval == QLA_SUCCESS || !ha->flt_region_gold_fw)
7822 return rval;
7823
7c3df132
SK		 7824 ql_log(ql_log_info, vha, 0x0099,
7825 "Attempting to fallback to golden firmware.\n");
cbc8eb67
AV		 7826 rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_gold_fw);
7827 if (rval != QLA_SUCCESS)
7828 return rval;
7829
7c3df132 7830 ql_log(ql_log_info, vha, 0x009a, "Update operational firmware.\n");
cbc8eb67 7831 ha->flags.running_gold_fw = 1;
cbc8eb67 7832 return rval;
eaac30be
AV		 7833}
7834
18c6c127 7835void
e315cd28 7836qla2x00_try_to_stop_firmware(scsi_qla_host_t *vha)
18c6c127
AV		 7837{
7838 int ret, retries;
e315cd28 7839 struct qla_hw_data *ha = vha->hw;
18c6c127 7840
85880801
AV		 7841 if (ha->flags.pci_channel_io_perm_failure)
7842 return;
e428924c 7843 if (!IS_FWI2_CAPABLE(ha))
18c6c127 7844 return;
75edf81d
AV		 7845 if (!ha->fw_major_version)
7846 return;
ec7193e2
QT		 7847 if (!ha->flags.fw_started)
7848 return;
18c6c127 7849
e315cd28 7850 ret = qla2x00_stop_firmware(vha);
7c7f1f29 7851 for (retries = 5; ret != QLA_SUCCESS && ret != QLA_FUNCTION_TIMEOUT &&
b469a7cb 7852 ret != QLA_INVALID_COMMAND && retries ; retries--) {
e315cd28
AC		 7853 ha->isp_ops->reset_chip(vha);
7854 if (ha->isp_ops->chip_diag(vha) != QLA_SUCCESS)
18c6c127 7855 continue;
e315cd28 7856 if (qla2x00_setup_chip(vha) != QLA_SUCCESS)
18c6c127 7857 continue;
7c3df132
SK		 7858 ql_log(ql_log_info, vha, 0x8015,
7859 "Attempting retry of stop-firmware command.\n");
e315cd28 7860 ret = qla2x00_stop_firmware(vha);
18c6c127 7861 }
ec7193e2 7862
4b60c827 7863 QLA_FW_STOPPED(ha);
ec7193e2 7864 ha->flags.fw_init_done = 0;
18c6c127 7865}
2c3dfe3f
SJ		 7866
7867int
e315cd28 7868qla24xx_configure_vhba(scsi_qla_host_t *vha)
2c3dfe3f
SJ		 7869{
7870 int rval = QLA_SUCCESS;
0b91d116 7871 int rval2;
2c3dfe3f 7872 uint16_t mb[MAILBOX_REGISTER_COUNT];
e315cd28
AC		 7873 struct qla_hw_data *ha = vha->hw;
7874 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
67c2e93a
AC		 7875 struct req_que *req;
7876 struct rsp_que *rsp;
2c3dfe3f 7877
e315cd28 7878 if (!vha->vp_idx)
2c3dfe3f
SJ		 7879 return -EINVAL;
7880
e315cd28 7881 rval = qla2x00_fw_ready(base_vha);
d7459527
MH		 7882 if (vha->qpair)
7883 req = vha->qpair->req;
67c2e93a 7884 else
d7459527 7885 req = ha->req_q_map[0];
67c2e93a
AC		 7886 rsp = req->rsp;
7887
2c3dfe3f 7888 if (rval == QLA_SUCCESS) {
e315cd28 7889 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
73208dfd 7890 qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL);
2c3dfe3f
SJ		 7891 }
7892
e315cd28 7893 vha->flags.management_server_logged_in = 0;
2c3dfe3f
SJ		 7894
7895 /* Login to SNS first */
0b91d116
CD		 7896 rval2 = ha->isp_ops->fabric_login(vha, NPH_SNS, 0xff, 0xff, 0xfc, mb,
7897 BIT_1);
7898 if (rval2 != QLA_SUCCESS || mb[0] != MBS_COMMAND_COMPLETE) {
7899 if (rval2 == QLA_MEMORY_ALLOC_FAILED)
7900 ql_dbg(ql_dbg_init, vha, 0x0120,
7901 "Failed SNS login: loop_id=%x, rval2=%d\n",
7902 NPH_SNS, rval2);
7903 else
7904 ql_dbg(ql_dbg_init, vha, 0x0103,
7905 "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x "
7906 "mb[2]=%x mb[6]=%x mb[7]=%x.\n",
7907 NPH_SNS, mb[0], mb[1], mb[2], mb[6], mb[7]);
2c3dfe3f
SJ		 7908 return (QLA_FUNCTION_FAILED);
7909 }
7910
e315cd28
AC		 7911 atomic_set(&vha->loop_down_timer, 0);
7912 atomic_set(&vha->loop_state, LOOP_UP);
7913 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
7914 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
7915 rval = qla2x00_loop_resync(base_vha);
2c3dfe3f
SJ		 7916
7917 return rval;
7918}
4d4df193
HK		 7919
7920/* 84XX Support **************************************************************/
7921
7922static LIST_HEAD(qla_cs84xx_list);
7923static DEFINE_MUTEX(qla_cs84xx_mutex);
7924
7925static struct qla_chip_state_84xx *
e315cd28 7926qla84xx_get_chip(struct scsi_qla_host *vha)
4d4df193
HK		 7927{
7928 struct qla_chip_state_84xx *cs84xx;
e315cd28 7929 struct qla_hw_data *ha = vha->hw;
4d4df193
HK		 7930
7931 mutex_lock(&qla_cs84xx_mutex);
7932
7933 /* Find any shared 84xx chip. */
7934 list_for_each_entry(cs84xx, &qla_cs84xx_list, list) {
7935 if (cs84xx->bus == ha->pdev->bus) {
7936 kref_get(&cs84xx->kref);
7937 goto done;
7938 }
7939 }
7940
7941 cs84xx = kzalloc(sizeof(*cs84xx), GFP_KERNEL);
7942 if (!cs84xx)
7943 goto done;
7944
7945 kref_init(&cs84xx->kref);
7946 spin_lock_init(&cs84xx->access_lock);
7947 mutex_init(&cs84xx->fw_update_mutex);
7948 cs84xx->bus = ha->pdev->bus;
7949
7950 list_add_tail(&cs84xx->list, &qla_cs84xx_list);
7951done:
7952 mutex_unlock(&qla_cs84xx_mutex);
7953 return cs84xx;
7954}
7955
7956static void
7957__qla84xx_chip_release(struct kref *kref)
7958{
7959 struct qla_chip_state_84xx *cs84xx =
7960 container_of(kref, struct qla_chip_state_84xx, kref);
7961
7962 mutex_lock(&qla_cs84xx_mutex);
7963 list_del(&cs84xx->list);
7964 mutex_unlock(&qla_cs84xx_mutex);
7965 kfree(cs84xx);
7966}
7967
7968void
e315cd28 7969qla84xx_put_chip(struct scsi_qla_host *vha)
4d4df193 7970{
e315cd28 7971 struct qla_hw_data *ha = vha->hw;
4d4df193
HK		 7972 if (ha->cs84xx)
7973 kref_put(&ha->cs84xx->kref, __qla84xx_chip_release);
7974}
7975
7976static int
e315cd28 7977qla84xx_init_chip(scsi_qla_host_t *vha)
4d4df193
HK		 7978{
7979 int rval;
7980 uint16_t status[2];
e315cd28 7981 struct qla_hw_data *ha = vha->hw;
4d4df193
HK		 7982
7983 mutex_lock(&ha->cs84xx->fw_update_mutex);
7984
e315cd28 7985 rval = qla84xx_verify_chip(vha, status);
4d4df193
HK		 7986
7987 mutex_unlock(&ha->cs84xx->fw_update_mutex);
7988
7989 return rval != QLA_SUCCESS || status[0] ? QLA_FUNCTION_FAILED:
7990 QLA_SUCCESS;
7991}
3a03eb79
AV		 7992
7993/* 81XX Support **************************************************************/
7994
7995int
7996qla81xx_nvram_config(scsi_qla_host_t *vha)
7997{
7998 int rval;
7999 struct init_cb_81xx *icb;
8000 struct nvram_81xx *nv;
8001 uint32_t *dptr;
8002 uint8_t *dptr1, *dptr2;
8003 uint32_t chksum;
8004 uint16_t cnt;
8005 struct qla_hw_data *ha = vha->hw;
8006
8007 rval = QLA_SUCCESS;
8008 icb = (struct init_cb_81xx *)ha->init_cb;
8009 nv = ha->nvram;
8010
8011 /* Determine NVRAM starting address. */
8012 ha->nvram_size = sizeof(struct nvram_81xx);
3a03eb79 8013 ha->vpd_size = FA_NVRAM_VPD_SIZE;
7ec0effd
AD		 8014 if (IS_P3P_TYPE(ha) || IS_QLA8031(ha))
8015 ha->vpd_size = FA_VPD_SIZE_82XX;
3a03eb79
AV		 8016
8017 /* Get VPD data into cache */
8018 ha->vpd = ha->nvram + VPD_OFFSET;
3d79038f
AV		 8019 ha->isp_ops->read_optrom(vha, ha->vpd, ha->flt_region_vpd << 2,
8020 ha->vpd_size);
3a03eb79
AV		 8021
8022 /* Get NVRAM data into cache and calculate checksum. */
3d79038f 8023 ha->isp_ops->read_optrom(vha, ha->nvram, ha->flt_region_nvram << 2,
3a03eb79 8024 ha->nvram_size);
3d79038f 8025 dptr = (uint32_t *)nv;
da08ef5c
JC		 8026 for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++, dptr++)
8027 chksum += le32_to_cpu(*dptr);
3a03eb79 8028
7c3df132
SK		 8029 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x0111,
8030 "Contents of NVRAM:\n");
8031 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0112,
8032 (uint8_t *)nv, ha->nvram_size);
3a03eb79
AV		 8033
8034 /* Bad NVRAM data, set defaults parameters. */
8035 if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P'
8036 || nv->id[3] != ' ' ||
ad950360 8037 nv->nvram_version < cpu_to_le16(ICB_VERSION)) {
3a03eb79 8038 /* Reset NVRAM data. */
7c3df132 8039 ql_log(ql_log_info, vha, 0x0073,
9e336520 8040 "Inconsistent NVRAM detected: checksum=0x%x id=%c "
7c3df132 8041 "version=0x%x.\n", chksum, nv->id[0],
3a03eb79 8042 le16_to_cpu(nv->nvram_version));
7c3df132
SK		 8043 ql_log(ql_log_info, vha, 0x0074,
8044 "Falling back to functioning (yet invalid -- WWPN) "
8045 "defaults.\n");
3a03eb79
AV		 8046
8047 /*
8048 * Set default initialization control block.
8049 */
8050 memset(nv, 0, ha->nvram_size);
ad950360
BVA		 8051 nv->nvram_version = cpu_to_le16(ICB_VERSION);
8052 nv->version = cpu_to_le16(ICB_VERSION);
98aee70d 8053 nv->frame_payload_size = 2048;
ad950360
BVA		 8054 nv->execution_throttle = cpu_to_le16(0xFFFF);
8055 nv->exchange_count = cpu_to_le16(0);
3a03eb79 8056 nv->port_name[0] = 0x21;
f73cb695 8057 nv->port_name[1] = 0x00 + ha->port_no + 1;
3a03eb79
AV		 8058 nv->port_name[2] = 0x00;
8059 nv->port_name[3] = 0xe0;
8060 nv->port_name[4] = 0x8b;
8061 nv->port_name[5] = 0x1c;
8062 nv->port_name[6] = 0x55;
8063 nv->port_name[7] = 0x86;
8064 nv->node_name[0] = 0x20;
8065 nv->node_name[1] = 0x00;
8066 nv->node_name[2] = 0x00;
8067 nv->node_name[3] = 0xe0;
8068 nv->node_name[4] = 0x8b;
8069 nv->node_name[5] = 0x1c;
8070 nv->node_name[6] = 0x55;
8071 nv->node_name[7] = 0x86;
ad950360
BVA		 8072 nv->login_retry_count = cpu_to_le16(8);
8073 nv->interrupt_delay_timer = cpu_to_le16(0);
8074 nv->login_timeout = cpu_to_le16(0);
3a03eb79 8075 nv->firmware_options_1 =
ad950360
BVA		 8076 cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1);
8077 nv->firmware_options_2 = cpu_to_le32(2 << 4);
8078 nv->firmware_options_2 |= cpu_to_le32(BIT_12);
8079 nv->firmware_options_3 = cpu_to_le32(2 << 13);
8080 nv->host_p = cpu_to_le32(BIT_11|BIT_10);
8081 nv->efi_parameters = cpu_to_le32(0);
3a03eb79 8082 nv->reset_delay = 5;
ad950360
BVA		 8083 nv->max_luns_per_target = cpu_to_le16(128);
8084 nv->port_down_retry_count = cpu_to_le16(30);
8085 nv->link_down_timeout = cpu_to_le16(180);
eeebcc92 8086 nv->enode_mac[0] = 0x00;
6246b8a1
GM		 8087 nv->enode_mac[1] = 0xC0;
8088 nv->enode_mac[2] = 0xDD;
3a03eb79
AV		 8089 nv->enode_mac[3] = 0x04;
8090 nv->enode_mac[4] = 0x05;
f73cb695 8091 nv->enode_mac[5] = 0x06 + ha->port_no + 1;
3a03eb79
AV		 8092
8093 rval = 1;
8094 }
8095
9e522cd8
AE		 8096 if (IS_T10_PI_CAPABLE(ha))
8097 nv->frame_payload_size &= ~7;
8098
aa230bc5
AE		 8099 qlt_81xx_config_nvram_stage1(vha, nv);
8100
3a03eb79 8101 /* Reset Initialization control block */
773120e4 8102 memset(icb, 0, ha->init_cb_size);
3a03eb79
AV		 8103
8104 /* Copy 1st segment. */
8105 dptr1 = (uint8_t *)icb;
8106 dptr2 = (uint8_t *)&nv->version;
8107 cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version;
8108 while (cnt--)
8109 *dptr1++ = *dptr2++;
8110
8111 icb->login_retry_count = nv->login_retry_count;
8112
8113 /* Copy 2nd segment. */
8114 dptr1 = (uint8_t *)&icb->interrupt_delay_timer;
8115 dptr2 = (uint8_t *)&nv->interrupt_delay_timer;
8116 cnt = (uint8_t *)&icb->reserved_5 -
8117 (uint8_t *)&icb->interrupt_delay_timer;
8118 while (cnt--)
8119 *dptr1++ = *dptr2++;
8120
8121 memcpy(icb->enode_mac, nv->enode_mac, sizeof(icb->enode_mac));
8122 /* Some boards (with valid NVRAMs) still have NULL enode_mac!! */
8123 if (!memcmp(icb->enode_mac, "\0\0\0\0\0\0", sizeof(icb->enode_mac))) {
69e5f1ea
AV		 8124 icb->enode_mac[0] = 0x00;
8125 icb->enode_mac[1] = 0xC0;
8126 icb->enode_mac[2] = 0xDD;
3a03eb79
AV		 8127 icb->enode_mac[3] = 0x04;
8128 icb->enode_mac[4] = 0x05;
f73cb695 8129 icb->enode_mac[5] = 0x06 + ha->port_no + 1;
3a03eb79
AV		 8130 }
8131
b64b0e8f
AV		 8132 /* Use extended-initialization control block. */
8133 memcpy(ha->ex_init_cb, &nv->ex_version, sizeof(*ha->ex_init_cb));
0eaaca4c 8134 ha->frame_payload_size = le16_to_cpu(icb->frame_payload_size);
3a03eb79
AV		 8135 /*
8136 * Setup driver NVRAM options.
8137 */
8138 qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name),
a9083016 8139 "QLE8XXX");
3a03eb79 8140
aa230bc5
AE		 8141 qlt_81xx_config_nvram_stage2(vha, icb);
8142
3a03eb79 8143 /* Use alternate WWN? */
ad950360 8144 if (nv->host_p & cpu_to_le32(BIT_15)) {
3a03eb79
AV		 8145 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
8146 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
8147 }
8148
8149 /* Prepare nodename */
ad950360 8150 if ((icb->firmware_options_1 & cpu_to_le32(BIT_14)) == 0) {
3a03eb79
AV		 8151 /*
8152 * Firmware will apply the following mask if the nodename was
8153 * not provided.
8154 */
8155 memcpy(icb->node_name, icb->port_name, WWN_SIZE);
8156 icb->node_name[0] &= 0xF0;
8157 }
8158
8159 /* Set host adapter parameters. */
8160 ha->flags.disable_risc_code_load = 0;
8161 ha->flags.enable_lip_reset = 0;
8162 ha->flags.enable_lip_full_login =
8163 le32_to_cpu(nv->host_p) & BIT_10 ? 1: 0;
8164 ha->flags.enable_target_reset =
8165 le32_to_cpu(nv->host_p) & BIT_11 ? 1: 0;
8166 ha->flags.enable_led_scheme = 0;
8167 ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1: 0;
8168
8169 ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) &
8170 (BIT_6 | BIT_5 | BIT_4)) >> 4;
8171
8172 /* save HBA serial number */
8173 ha->serial0 = icb->port_name[5];
8174 ha->serial1 = icb->port_name[6];
8175 ha->serial2 = icb->port_name[7];
8176 memcpy(vha->node_name, icb->node_name, WWN_SIZE);
8177 memcpy(vha->port_name, icb->port_name, WWN_SIZE);
8178
ad950360 8179 icb->execution_throttle = cpu_to_le16(0xFFFF);
3a03eb79
AV		 8180
8181 ha->retry_count = le16_to_cpu(nv->login_retry_count);
8182
8183 /* Set minimum login_timeout to 4 seconds. */
8184 if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout)
8185 nv->login_timeout = cpu_to_le16(ql2xlogintimeout);
8186 if (le16_to_cpu(nv->login_timeout) < 4)
ad950360 8187 nv->login_timeout = cpu_to_le16(4);
3a03eb79 8188 ha->login_timeout = le16_to_cpu(nv->login_timeout);
3a03eb79
AV		 8189
8190 /* Set minimum RATOV to 100 tenths of a second. */
8191 ha->r_a_tov = 100;
8192
8193 ha->loop_reset_delay = nv->reset_delay;
8194
8195 /* Link Down Timeout = 0:
8196 *
7ec0effd 8197 * When Port Down timer expires we will start returning
3a03eb79
AV		 8198 * I/O's to OS with "DID_NO_CONNECT".
8199 *
8200 * Link Down Timeout != 0:
8201 *
8202 * The driver waits for the link to come up after link down
8203 * before returning I/Os to OS with "DID_NO_CONNECT".
8204 */
8205 if (le16_to_cpu(nv->link_down_timeout) == 0) {
8206 ha->loop_down_abort_time =
8207 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
8208 } else {
8209 ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout);
8210 ha->loop_down_abort_time =
8211 (LOOP_DOWN_TIME - ha->link_down_timeout);
8212 }
8213
8214 /* Need enough time to try and get the port back. */
8215 ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count);
8216 if (qlport_down_retry)
8217 ha->port_down_retry_count = qlport_down_retry;
8218
8219 /* Set login_retry_count */
8220 ha->login_retry_count = le16_to_cpu(nv->login_retry_count);
8221 if (ha->port_down_retry_count ==
8222 le16_to_cpu(nv->port_down_retry_count) &&
8223 ha->port_down_retry_count > 3)
8224 ha->login_retry_count = ha->port_down_retry_count;
8225 else if (ha->port_down_retry_count > (int)ha->login_retry_count)
8226 ha->login_retry_count = ha->port_down_retry_count;
8227 if (ql2xloginretrycount)
8228 ha->login_retry_count = ql2xloginretrycount;
8229
6246b8a1 8230 /* if not running MSI-X we need handshaking on interrupts */
f73cb695 8231 if (!vha->hw->flags.msix_enabled && (IS_QLA83XX(ha) || IS_QLA27XX(ha)))
ad950360 8232 icb->firmware_options_2 |= cpu_to_le32(BIT_22);
6246b8a1 8233
3a03eb79
AV		 8234 /* Enable ZIO. */
8235 if (!vha->flags.init_done) {
8236 ha->zio_mode = le32_to_cpu(icb->firmware_options_2) &
8237 (BIT_3 | BIT_2 | BIT_1 | BIT_0);
8238 ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ?
8239 le16_to_cpu(icb->interrupt_delay_timer): 2;
8240 }
ad950360 8241 icb->firmware_options_2 &= cpu_to_le32(
3a03eb79
AV		 8242 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0));
8243 vha->flags.process_response_queue = 0;
8244 if (ha->zio_mode != QLA_ZIO_DISABLED) {
8245 ha->zio_mode = QLA_ZIO_MODE_6;
8246
7c3df132 8247 ql_log(ql_log_info, vha, 0x0075,
3a03eb79 8248 "ZIO mode %d enabled; timer delay (%d us).\n",
7c3df132
SK		 8249 ha->zio_mode,
8250 ha->zio_timer * 100);
3a03eb79
AV		 8251
8252 icb->firmware_options_2 |= cpu_to_le32(
8253 (uint32_t)ha->zio_mode);
8254 icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer);
8255 vha->flags.process_response_queue = 1;
8256 }
8257
41dc529a 8258 /* enable RIDA Format2 */
48acad09 8259 icb->firmware_options_3 |= BIT_0;
41dc529a 8260
8777e431
QT		 8261 /* N2N: driver will initiate Login instead of FW */
8262 icb->firmware_options_3 |= BIT_8;
41dc529a 8263
edd05de1
DG		 8264 if (IS_QLA27XX(ha)) {
8265 icb->firmware_options_3 |= BIT_8;
8266 ql_dbg(ql_log_info, vha, 0x0075,
8267 "Enabling direct connection.\n");
8268 }
8269
3a03eb79 8270 if (rval) {
7c3df132
SK		 8271 ql_log(ql_log_warn, vha, 0x0076,
8272 "NVRAM configuration failed.\n");
3a03eb79
AV		 8273 }
8274 return (rval);
8275}
8276
a9083016
GM		 8277int
8278qla82xx_restart_isp(scsi_qla_host_t *vha)
8279{
8280 int status, rval;
a9083016
GM		 8281 struct qla_hw_data *ha = vha->hw;
8282 struct req_que *req = ha->req_q_map[0];
8283 struct rsp_que *rsp = ha->rsp_q_map[0];
8284 struct scsi_qla_host *vp;
feafb7b1 8285 unsigned long flags;
a9083016
GM		 8286
8287 status = qla2x00_init_rings(vha);
8288 if (!status) {
8289 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
8290 ha->flags.chip_reset_done = 1;
8291
8292 status = qla2x00_fw_ready(vha);
8293 if (!status) {
a9083016
GM		 8294 /* Issue a marker after FW becomes ready. */
8295 qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL);
a9083016 8296 vha->flags.online = 1;
7108b76e 8297 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
a9083016
GM		 8298 }
8299
8300 /* if no cable then assume it's good */
8301 if ((vha->device_flags & DFLG_NO_CABLE))
8302 status = 0;
a9083016
GM		 8303 }
8304
8305 if (!status) {
8306 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
8307
8308 if (!atomic_read(&vha->loop_down_timer)) {
8309 /*
8310 * Issue marker command only when we are going
8311 * to start the I/O .
8312 */
8313 vha->marker_needed = 1;
8314 }
8315
a9083016
GM		 8316 ha->isp_ops->enable_intrs(ha);
8317
8318 ha->isp_abort_cnt = 0;
8319 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
8320
53296788 8321 /* Update the firmware version */
3173167f 8322 status = qla82xx_check_md_needed(vha);
53296788 8323
a9083016
GM		 8324 if (ha->fce) {
8325 ha->flags.fce_enabled = 1;
8326 memset(ha->fce, 0,
8327 fce_calc_size(ha->fce_bufs));
8328 rval = qla2x00_enable_fce_trace(vha,
8329 ha->fce_dma, ha->fce_bufs, ha->fce_mb,
8330 &ha->fce_bufs);
8331 if (rval) {
cfb0919c 8332 ql_log(ql_log_warn, vha, 0x8001,
7c3df132
SK		 8333 "Unable to reinitialize FCE (%d).\n",
8334 rval);
a9083016
GM		 8335 ha->flags.fce_enabled = 0;
8336 }
8337 }
8338
8339 if (ha->eft) {
8340 memset(ha->eft, 0, EFT_SIZE);
8341 rval = qla2x00_enable_eft_trace(vha,
8342 ha->eft_dma, EFT_NUM_BUFFERS);
8343 if (rval) {
cfb0919c 8344 ql_log(ql_log_warn, vha, 0x8010,
7c3df132
SK		 8345 "Unable to reinitialize EFT (%d).\n",
8346 rval);
a9083016
GM		 8347 }
8348 }
a9083016
GM		 8349 }
8350
8351 if (!status) {
cfb0919c 8352 ql_dbg(ql_dbg_taskm, vha, 0x8011,
7c3df132 8353 "qla82xx_restart_isp succeeded.\n");
feafb7b1
AE		 8354
8355 spin_lock_irqsave(&ha->vport_slock, flags);
8356 list_for_each_entry(vp, &ha->vp_list, list) {
8357 if (vp->vp_idx) {
8358 atomic_inc(&vp->vref_count);
8359 spin_unlock_irqrestore(&ha->vport_slock, flags);
8360
a9083016 8361 qla2x00_vp_abort_isp(vp);
feafb7b1
AE		 8362
8363 spin_lock_irqsave(&ha->vport_slock, flags);
8364 atomic_dec(&vp->vref_count);
8365 }
a9083016 8366 }
feafb7b1
AE		 8367 spin_unlock_irqrestore(&ha->vport_slock, flags);
8368
a9083016 8369 } else {
cfb0919c 8370 ql_log(ql_log_warn, vha, 0x8016,
7c3df132 8371 "qla82xx_restart_isp **** FAILED ****.\n");
a9083016
GM		 8372 }
8373
8374 return status;
8375}
8376
3a03eb79 8377void
ae97c91e 8378qla81xx_update_fw_options(scsi_qla_host_t *vha)
3a03eb79 8379{
ae97c91e
AV		 8380 struct qla_hw_data *ha = vha->hw;
8381
f198cafa
HM		 8382 /* Hold status IOCBs until ABTS response received. */
8383 if (ql2xfwholdabts)
8384 ha->fw_options[3] |= BIT_12;
8385
088d09d4
GM		 8386 /* Set Retry FLOGI in case of P2P connection */
8387 if (ha->operating_mode == P2P) {
8388 ha->fw_options[2] |= BIT_3;
8389 ql_dbg(ql_dbg_disc, vha, 0x2103,
8390 "(%s): Setting FLOGI retry BIT in fw_options[2]: 0x%x\n",
8391 __func__, ha->fw_options[2]);
8392 }
8393
41dc529a
QT		 8394 /* Move PUREX, ABTS RX & RIDA to ATIOQ */
8395 if (ql2xmvasynctoatio) {
8396 if (qla_tgt_mode_enabled(vha) ||
8397 qla_dual_mode_enabled(vha))
8398 ha->fw_options[2] |= BIT_11;
8399 else
8400 ha->fw_options[2] &= ~BIT_11;
8401 }
8402
f7e761f5 8403 if (qla_tgt_mode_enabled(vha) ||
2da52737
QT		 8404 qla_dual_mode_enabled(vha)) {
8405 /* FW auto send SCSI status during */
8406 ha->fw_options[1] |= BIT_8;
8407 ha->fw_options[10] |= (u16)SAM_STAT_BUSY << 8;
8408
8409 /* FW perform Exchange validation */
f7e761f5 8410 ha->fw_options[2] |= BIT_4;
2da52737
QT		 8411 } else {
8412 ha->fw_options[1] &= ~BIT_8;
8413 ha->fw_options[10] &= 0x00ff;
8414
f7e761f5 8415 ha->fw_options[2] &= ~BIT_4;
2da52737 8416 }
f7e761f5 8417
41dc529a
QT		 8418 if (ql2xetsenable) {
8419 /* Enable ETS Burst. */
8420 memset(ha->fw_options, 0, sizeof(ha->fw_options));
8421 ha->fw_options[2] |= BIT_9;
8422 }
8423
83548fe2
QT		 8424 ql_dbg(ql_dbg_init, vha, 0x00e9,
8425 "%s, add FW options 1-3 = 0x%04x 0x%04x 0x%04x mode %x\n",
8426 __func__, ha->fw_options[1], ha->fw_options[2],
8427 ha->fw_options[3], vha->host->active_mode);
ae97c91e 8428
ae97c91e 8429 qla2x00_set_fw_options(vha, ha->fw_options);
3a03eb79 8430}
09ff701a
SR		 8431
8432/*
8433 * qla24xx_get_fcp_prio
8434 * Gets the fcp cmd priority value for the logged in port.
8435 * Looks for a match of the port descriptors within
8436 * each of the fcp prio config entries. If a match is found,
8437 * the tag (priority) value is returned.
8438 *
8439 * Input:
21090cbe 8440 * vha = scsi host structure pointer.
09ff701a
SR		 8441 * fcport = port structure pointer.
8442 *
8443 * Return:
6c452a45 8444 * non-zero (if found)
f28a0a96 8445 * -1 (if not found)
09ff701a
SR		 8446 *
8447 * Context:
8448 * Kernel context
8449 */
f28a0a96 8450static int
09ff701a
SR		 8451qla24xx_get_fcp_prio(scsi_qla_host_t *vha, fc_port_t *fcport)
8452{
8453 int i, entries;
8454 uint8_t pid_match, wwn_match;
f28a0a96 8455 int priority;
09ff701a
SR		 8456 uint32_t pid1, pid2;
8457 uint64_t wwn1, wwn2;
8458 struct qla_fcp_prio_entry *pri_entry;
8459 struct qla_hw_data *ha = vha->hw;
8460
8461 if (!ha->fcp_prio_cfg || !ha->flags.fcp_prio_enabled)
f28a0a96 8462 return -1;
09ff701a 8463
f28a0a96 8464 priority = -1;
09ff701a
SR		 8465 entries = ha->fcp_prio_cfg->num_entries;
8466 pri_entry = &ha->fcp_prio_cfg->entry[0];
8467
8468 for (i = 0; i < entries; i++) {
8469 pid_match = wwn_match = 0;
8470
8471 if (!(pri_entry->flags & FCP_PRIO_ENTRY_VALID)) {
8472 pri_entry++;
8473 continue;
8474 }
8475
8476 /* check source pid for a match */
8477 if (pri_entry->flags & FCP_PRIO_ENTRY_SPID_VALID) {
8478 pid1 = pri_entry->src_pid & INVALID_PORT_ID;
8479 pid2 = vha->d_id.b24 & INVALID_PORT_ID;
8480 if (pid1 == INVALID_PORT_ID)
8481 pid_match++;
8482 else if (pid1 == pid2)
8483 pid_match++;
8484 }
8485
8486 /* check destination pid for a match */
8487 if (pri_entry->flags & FCP_PRIO_ENTRY_DPID_VALID) {
8488 pid1 = pri_entry->dst_pid & INVALID_PORT_ID;
8489 pid2 = fcport->d_id.b24 & INVALID_PORT_ID;
8490 if (pid1 == INVALID_PORT_ID)
8491 pid_match++;
8492 else if (pid1 == pid2)
8493 pid_match++;
8494 }
8495
8496 /* check source WWN for a match */
8497 if (pri_entry->flags & FCP_PRIO_ENTRY_SWWN_VALID) {
8498 wwn1 = wwn_to_u64(vha->port_name);
8499 wwn2 = wwn_to_u64(pri_entry->src_wwpn);
8500 if (wwn2 == (uint64_t)-1)
8501 wwn_match++;
8502 else if (wwn1 == wwn2)
8503 wwn_match++;
8504 }
8505
8506 /* check destination WWN for a match */
8507 if (pri_entry->flags & FCP_PRIO_ENTRY_DWWN_VALID) {
8508 wwn1 = wwn_to_u64(fcport->port_name);
8509 wwn2 = wwn_to_u64(pri_entry->dst_wwpn);
8510 if (wwn2 == (uint64_t)-1)
8511 wwn_match++;
8512 else if (wwn1 == wwn2)
8513 wwn_match++;
8514 }
8515
8516 if (pid_match == 2 || wwn_match == 2) {
8517 /* Found a matching entry */
8518 if (pri_entry->flags & FCP_PRIO_ENTRY_TAG_VALID)
8519 priority = pri_entry->tag;
8520 break;
8521 }
8522
8523 pri_entry++;
8524 }
8525
8526 return priority;
8527}
8528
8529/*
8530 * qla24xx_update_fcport_fcp_prio
8531 * Activates fcp priority for the logged in fc port
8532 *
8533 * Input:
21090cbe 8534 * vha = scsi host structure pointer.
09ff701a
SR		 8535 * fcp = port structure pointer.
8536 *
8537 * Return:
8538 * QLA_SUCCESS or QLA_FUNCTION_FAILED
8539 *
8540 * Context:
8541 * Kernel context.
8542 */
8543int
21090cbe 8544qla24xx_update_fcport_fcp_prio(scsi_qla_host_t *vha, fc_port_t *fcport)
09ff701a
SR		 8545{
8546 int ret;
f28a0a96 8547 int priority;
09ff701a
SR		 8548 uint16_t mb[5];
8549
21090cbe
MI		 8550 if (fcport->port_type != FCT_TARGET ||
8551 fcport->loop_id == FC_NO_LOOP_ID)
09ff701a
SR		 8552 return QLA_FUNCTION_FAILED;
8553
21090cbe 8554 priority = qla24xx_get_fcp_prio(vha, fcport);
f28a0a96
AV		 8555 if (priority < 0)
8556 return QLA_FUNCTION_FAILED;
8557
7ec0effd 8558 if (IS_P3P_TYPE(vha->hw)) {
a00f6296
SK		 8559 fcport->fcp_prio = priority & 0xf;
8560 return QLA_SUCCESS;
8561 }
8562
21090cbe 8563 ret = qla24xx_set_fcp_prio(vha, fcport->loop_id, priority, mb);
cfb0919c
CD		 8564 if (ret == QLA_SUCCESS) {
8565 if (fcport->fcp_prio != priority)
8566 ql_dbg(ql_dbg_user, vha, 0x709e,
8567 "Updated FCP_CMND priority - value=%d loop_id=%d "
8568 "port_id=%02x%02x%02x.\n", priority,
8569 fcport->loop_id, fcport->d_id.b.domain,
8570 fcport->d_id.b.area, fcport->d_id.b.al_pa);
a00f6296 8571 fcport->fcp_prio = priority & 0xf;
cfb0919c 8572 } else
7c3df132 8573 ql_dbg(ql_dbg_user, vha, 0x704f,
cfb0919c
CD		 8574 "Unable to update FCP_CMND priority - ret=0x%x for "
8575 "loop_id=%d port_id=%02x%02x%02x.\n", ret, fcport->loop_id,
8576 fcport->d_id.b.domain, fcport->d_id.b.area,
8577 fcport->d_id.b.al_pa);
09ff701a
SR		 8578 return ret;
8579}
8580
8581/*
8582 * qla24xx_update_all_fcp_prio
8583 * Activates fcp priority for all the logged in ports
8584 *
8585 * Input:
8586 * ha = adapter block pointer.
8587 *
8588 * Return:
8589 * QLA_SUCCESS or QLA_FUNCTION_FAILED
8590 *
8591 * Context:
8592 * Kernel context.
8593 */
8594int
8595qla24xx_update_all_fcp_prio(scsi_qla_host_t *vha)
8596{
8597 int ret;
8598 fc_port_t *fcport;
8599
8600 ret = QLA_FUNCTION_FAILED;
8601 /* We need to set priority for all logged in ports */
8602 list_for_each_entry(fcport, &vha->vp_fcports, list)
8603 ret = qla24xx_update_fcport_fcp_prio(vha, fcport);
8604
8605 return ret;
8606}
d7459527 8607
82de802a
QT		 8608struct qla_qpair *qla2xxx_create_qpair(struct scsi_qla_host *vha, int qos,
8609 int vp_idx, bool startqp)
d7459527
MH		 8610{
8611 int rsp_id = 0;
8612 int req_id = 0;
8613 int i;
8614 struct qla_hw_data *ha = vha->hw;
8615 uint16_t qpair_id = 0;
8616 struct qla_qpair *qpair = NULL;
8617 struct qla_msix_entry *msix;
8618
8619 if (!(ha->fw_attributes & BIT_6) || !ha->flags.msix_enabled) {
8620 ql_log(ql_log_warn, vha, 0x00181,
8621 "FW/Driver is not multi-queue capable.\n");
8622 return NULL;
8623 }
8624
c38d1baf 8625 if (ql2xmqsupport || ql2xnvmeenable) {
d7459527
MH		 8626 qpair = kzalloc(sizeof(struct qla_qpair), GFP_KERNEL);
8627 if (qpair == NULL) {
8628 ql_log(ql_log_warn, vha, 0x0182,
8629 "Failed to allocate memory for queue pair.\n");
8630 return NULL;
8631 }
8632 memset(qpair, 0, sizeof(struct qla_qpair));
8633
8634 qpair->hw = vha->hw;
25ff6af1 8635 qpair->vha = vha;
82de802a
QT		 8636 qpair->qp_lock_ptr = &qpair->qp_lock;
8637 spin_lock_init(&qpair->qp_lock);
af7bb382 8638 qpair->use_shadow_reg = IS_SHADOW_REG_CAPABLE(ha) ? 1 : 0;
d7459527
MH		 8639
8640 /* Assign available que pair id */
8641 mutex_lock(&ha->mq_lock);
8642 qpair_id = find_first_zero_bit(ha->qpair_qid_map, ha->max_qpairs);
b95b9452 8643 if (ha->num_qpairs >= ha->max_qpairs) {
d7459527
MH		 8644 mutex_unlock(&ha->mq_lock);
8645 ql_log(ql_log_warn, vha, 0x0183,
8646 "No resources to create additional q pair.\n");
8647 goto fail_qid_map;
8648 }
b95b9452 8649 ha->num_qpairs++;
d7459527
MH		 8650 set_bit(qpair_id, ha->qpair_qid_map);
8651 ha->queue_pair_map[qpair_id] = qpair;
8652 qpair->id = qpair_id;
8653 qpair->vp_idx = vp_idx;
e6373f33 8654 qpair->fw_started = ha->flags.fw_started;
e326d22a 8655 INIT_LIST_HEAD(&qpair->hints_list);
7c3f8fd1
QT		 8656 qpair->chip_reset = ha->base_qpair->chip_reset;
8657 qpair->enable_class_2 = ha->base_qpair->enable_class_2;
8658 qpair->enable_explicit_conf =
8659 ha->base_qpair->enable_explicit_conf;
d7459527
MH		 8660
8661 for (i = 0; i < ha->msix_count; i++) {
093df737 8662 msix = &ha->msix_entries[i];
d7459527
MH		 8663 if (msix->in_use)
8664 continue;
8665 qpair->msix = msix;
83548fe2 8666 ql_dbg(ql_dbg_multiq, vha, 0xc00f,
d7459527
MH		 8667 "Vector %x selected for qpair\n", msix->vector);
8668 break;
8669 }
8670 if (!qpair->msix) {
8671 ql_log(ql_log_warn, vha, 0x0184,
8672 "Out of MSI-X vectors!.\n");
8673 goto fail_msix;
8674 }
8675
8676 qpair->msix->in_use = 1;
8677 list_add_tail(&qpair->qp_list_elem, &vha->qp_list);
8abfa9e2
QT		 8678 qpair->pdev = ha->pdev;
8679 if (IS_QLA27XX(ha) || IS_QLA83XX(ha))
8680 qpair->reqq_start_iocbs = qla_83xx_start_iocbs;
d7459527
MH		 8681
8682 mutex_unlock(&ha->mq_lock);
8683
8684 /* Create response queue first */
82de802a 8685 rsp_id = qla25xx_create_rsp_que(ha, 0, 0, 0, qpair, startqp);
d7459527
MH		 8686 if (!rsp_id) {
8687 ql_log(ql_log_warn, vha, 0x0185,
8688 "Failed to create response queue.\n");
8689 goto fail_rsp;
8690 }
8691
8692 qpair->rsp = ha->rsp_q_map[rsp_id];
8693
8694 /* Create request queue */
82de802a
QT		 8695 req_id = qla25xx_create_req_que(ha, 0, vp_idx, 0, rsp_id, qos,
8696 startqp);
d7459527
MH		 8697 if (!req_id) {
8698 ql_log(ql_log_warn, vha, 0x0186,
8699 "Failed to create request queue.\n");
8700 goto fail_req;
8701 }
8702
8703 qpair->req = ha->req_q_map[req_id];
8704 qpair->rsp->req = qpair->req;
82de802a 8705 qpair->rsp->qpair = qpair;
e326d22a
QT		 8706 /* init qpair to this cpu. Will adjust at run time. */
8707 qla_cpu_update(qpair, smp_processor_id());
d7459527
MH		 8708
8709 if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif) {
8710 if (ha->fw_attributes & BIT_4)
8711 qpair->difdix_supported = 1;
8712 }
8713
8714 qpair->srb_mempool = mempool_create_slab_pool(SRB_MIN_REQ, srb_cachep);
8715 if (!qpair->srb_mempool) {
83548fe2 8716 ql_log(ql_log_warn, vha, 0xd036,
d7459527
MH		 8717 "Failed to create srb mempool for qpair %d\n",
8718 qpair->id);
8719 goto fail_mempool;
8720 }
8721
8722 /* Mark as online */
8723 qpair->online = 1;
8724
8725 if (!vha->flags.qpairs_available)
8726 vha->flags.qpairs_available = 1;
8727
8728 ql_dbg(ql_dbg_multiq, vha, 0xc00d,
8729 "Request/Response queue pair created, id %d\n",
8730 qpair->id);
8731 ql_dbg(ql_dbg_init, vha, 0x0187,
8732 "Request/Response queue pair created, id %d\n",
8733 qpair->id);
8734 }
8735 return qpair;
8736
8737fail_mempool:
8738fail_req:
8739 qla25xx_delete_rsp_que(vha, qpair->rsp);
8740fail_rsp:
8741 mutex_lock(&ha->mq_lock);
8742 qpair->msix->in_use = 0;
8743 list_del(&qpair->qp_list_elem);
8744 if (list_empty(&vha->qp_list))
8745 vha->flags.qpairs_available = 0;
8746fail_msix:
8747 ha->queue_pair_map[qpair_id] = NULL;
8748 clear_bit(qpair_id, ha->qpair_qid_map);
b95b9452 8749 ha->num_qpairs--;
d7459527
MH		 8750 mutex_unlock(&ha->mq_lock);
8751fail_qid_map:
8752 kfree(qpair);
8753 return NULL;
8754}
8755
8756int qla2xxx_delete_qpair(struct scsi_qla_host *vha, struct qla_qpair *qpair)
8757{
d65237c7 8758 int ret = QLA_FUNCTION_FAILED;
d7459527
MH		 8759 struct qla_hw_data *ha = qpair->hw;
8760
8761 qpair->delete_in_progress = 1;
8762 while (atomic_read(&qpair->ref_count))
8763 msleep(500);
8764
8765 ret = qla25xx_delete_req_que(vha, qpair->req);
8766 if (ret != QLA_SUCCESS)
8767 goto fail;
7867b98d 8768
d7459527
MH		 8769 ret = qla25xx_delete_rsp_que(vha, qpair->rsp);
8770 if (ret != QLA_SUCCESS)
8771 goto fail;
8772
8773 mutex_lock(&ha->mq_lock);
8774 ha->queue_pair_map[qpair->id] = NULL;
8775 clear_bit(qpair->id, ha->qpair_qid_map);
b95b9452 8776 ha->num_qpairs--;
d7459527 8777 list_del(&qpair->qp_list_elem);
d65237c7 8778 if (list_empty(&vha->qp_list)) {
d7459527 8779 vha->flags.qpairs_available = 0;
d65237c7
SC		 8780 vha->flags.qpairs_req_created = 0;
8781 vha->flags.qpairs_rsp_created = 0;
8782 }
d7459527
MH		 8783 mempool_destroy(qpair->srb_mempool);
8784 kfree(qpair);
8785 mutex_unlock(&ha->mq_lock);
8786
8787 return QLA_SUCCESS;
8788fail:
8789 return ret;
8790}
Linux 6.x block layer and io_uring tree(s)