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scsi: qla2xxx: flush IO on chip reset or sess delete
[linux-2.6-block.git] / drivers / scsi / qla2xxx / qla_init.c
CommitLineData
1da177e4 1/*
fa90c54f 2 * QLogic Fibre Channel HBA Driver
bd21eaf9 3 * Copyright (c) 2003-2014 QLogic Corporation
1da177e4 4 *
fa90c54f 5 * See LICENSE.qla2xxx for copyright and licensing details.
1da177e4
LT		 6 */
7#include "qla_def.h"
73208dfd 8#include "qla_gbl.h"
1da177e4
LT		 9
10#include <linux/delay.h>
5a0e3ad6 11#include <linux/slab.h>
0107109e 12#include <linux/vmalloc.h>
1da177e4
LT		 13
14#include "qla_devtbl.h"
15
4e08df3f
DM		 16#ifdef CONFIG_SPARC
17#include <asm/prom.h>
4e08df3f
DM		 18#endif
19
2d70c103
NB		 20#include <target/target_core_base.h>
21#include "qla_target.h"
22
1da177e4
LT		 23/*
24* QLogic ISP2x00 Hardware Support Function Prototypes.
25*/
1da177e4 26static int qla2x00_isp_firmware(scsi_qla_host_t *);
1da177e4 27static int qla2x00_setup_chip(scsi_qla_host_t *);
1da177e4
LT		 28static int qla2x00_fw_ready(scsi_qla_host_t *);
29static int qla2x00_configure_hba(scsi_qla_host_t *);
1da177e4
LT		 30static int qla2x00_configure_loop(scsi_qla_host_t *);
31static int qla2x00_configure_local_loop(scsi_qla_host_t *);
1da177e4 32static int qla2x00_configure_fabric(scsi_qla_host_t *);
726b8548 33static int qla2x00_find_all_fabric_devs(scsi_qla_host_t *);
1da177e4 34static int qla2x00_restart_isp(scsi_qla_host_t *);
1da177e4 35
4d4df193
HK		 36static struct qla_chip_state_84xx *qla84xx_get_chip(struct scsi_qla_host *);
37static int qla84xx_init_chip(scsi_qla_host_t *);
73208dfd 38static int qla25xx_init_queues(struct qla_hw_data *);
a5d42f4c 39static int qla24xx_post_prli_work(struct scsi_qla_host*, fc_port_t *);
726b8548
QT		 40static void qla24xx_handle_plogi_done_event(struct scsi_qla_host *,
41 struct event_arg *);
a5d42f4c
DG		 42static void qla24xx_handle_prli_done_event(struct scsi_qla_host *,
43 struct event_arg *);
a4239945 44static void __qla24xx_handle_gpdb_event(scsi_qla_host_t *, struct event_arg *);
4d4df193 45
ac280b67
AV		 46/* SRB Extensions ---------------------------------------------------------- */
47
9ba56b95 48void
8e5f4ba0 49qla2x00_sp_timeout(struct timer_list *t)
ac280b67 50{
8e5f4ba0 51 srb_t *sp = from_timer(sp, t, u.iocb_cmd.timer);
4916392b 52 struct srb_iocb *iocb;
ac280b67
AV		 53 struct req_que *req;
54 unsigned long flags;
bcc71cc3 55 struct qla_hw_data *ha = sp->vha->hw;
ac280b67 56
ef801f07 57 WARN_ON_ONCE(irqs_disabled());
bcc71cc3 58 spin_lock_irqsave(&ha->hardware_lock, flags);
f6145e86 59 req = sp->qpair->req;
ac280b67 60 req->outstanding_cmds[sp->handle] = NULL;
9ba56b95 61 iocb = &sp->u.iocb_cmd;
bcc71cc3 62 spin_unlock_irqrestore(&ha->hardware_lock, flags);
4916392b 63 iocb->timeout(sp);
ac280b67
AV		 64}
65
9ba56b95 66void
25ff6af1 67qla2x00_sp_free(void *ptr)
ac280b67 68{
25ff6af1 69 srb_t *sp = ptr;
9ba56b95 70 struct srb_iocb *iocb = &sp->u.iocb_cmd;
ac280b67 71
4d97cc53 72 del_timer(&iocb->timer);
25ff6af1 73 qla2x00_rel_sp(sp);
ac280b67
AV		 74}
75
ac280b67
AV		 76/* Asynchronous Login/Logout Routines -------------------------------------- */
77
a9b6f722 78unsigned long
5b91490e
AV		 79qla2x00_get_async_timeout(struct scsi_qla_host *vha)
80{
81 unsigned long tmo;
82 struct qla_hw_data *ha = vha->hw;
83
84 /* Firmware should use switch negotiated r_a_tov for timeout. */
85 tmo = ha->r_a_tov / 10 * 2;
8ae6d9c7
GM		 86 if (IS_QLAFX00(ha)) {
87 tmo = FX00_DEF_RATOV * 2;
88 } else if (!IS_FWI2_CAPABLE(ha)) {
5b91490e
AV		 89 /*
90 * Except for earlier ISPs where the timeout is seeded from the
91 * initialization control block.
92 */
93 tmo = ha->login_timeout;
94 }
95 return tmo;
96}
ac280b67 97
726b8548 98void
9ba56b95 99qla2x00_async_iocb_timeout(void *data)
ac280b67 100{
25ff6af1 101 srb_t *sp = data;
ac280b67 102 fc_port_t *fcport = sp->fcport;
726b8548 103 struct srb_iocb *lio = &sp->u.iocb_cmd;
f6145e86
QT		 104 int rc, h;
105 unsigned long flags;
ac280b67 106
5c25d451
QT		 107 if (fcport) {
108 ql_dbg(ql_dbg_disc, fcport->vha, 0x2071,
109 "Async-%s timeout - hdl=%x portid=%06x %8phC.\n",
110 sp->name, sp->handle, fcport->d_id.b24, fcport->port_name);
111
6d674927 112 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
5c25d451
QT		 113 } else {
114 pr_info("Async-%s timeout - hdl=%x.\n",
115 sp->name, sp->handle);
116 }
726b8548
QT		 117
118 switch (sp->type) {
119 case SRB_LOGIN_CMD:
f6145e86
QT		 120 rc = qla24xx_async_abort_cmd(sp, false);
121 if (rc) {
122 /* Retry as needed. */
123 lio->u.logio.data[0] = MBS_COMMAND_ERROR;
124 lio->u.logio.data[1] =
125 lio->u.logio.flags & SRB_LOGIN_RETRIED ?
126 QLA_LOGIO_LOGIN_RETRIED : 0;
127 spin_lock_irqsave(sp->qpair->qp_lock_ptr, flags);
128 for (h = 1; h < sp->qpair->req->num_outstanding_cmds;
129 h++) {
130 if (sp->qpair->req->outstanding_cmds[h] ==
131 sp) {
132 sp->qpair->req->outstanding_cmds[h] =
133 NULL;
134 break;
135 }
136 }
137 spin_unlock_irqrestore(sp->qpair->qp_lock_ptr, flags);
138 sp->done(sp, QLA_FUNCTION_TIMEOUT);
139 }
726b8548
QT		 140 break;
141 case SRB_LOGOUT_CMD:
726b8548
QT		 142 case SRB_CT_PTHRU_CMD:
143 case SRB_MB_IOCB:
144 case SRB_NACK_PLOGI:
145 case SRB_NACK_PRLI:
146 case SRB_NACK_LOGO:
2853192e 147 case SRB_CTRL_VP:
f6145e86
QT		 148 rc = qla24xx_async_abort_cmd(sp, false);
149 if (rc) {
150 spin_lock_irqsave(sp->qpair->qp_lock_ptr, flags);
151 for (h = 1; h < sp->qpair->req->num_outstanding_cmds;
152 h++) {
153 if (sp->qpair->req->outstanding_cmds[h] ==
154 sp) {
155 sp->qpair->req->outstanding_cmds[h] =
156 NULL;
157 break;
158 }
159 }
160 spin_unlock_irqrestore(sp->qpair->qp_lock_ptr, flags);
161 sp->done(sp, QLA_FUNCTION_TIMEOUT);
162 }
726b8548 163 break;
6ac52608 164 }
ac280b67
AV		 165}
166
99b0bec7 167static void
25ff6af1 168qla2x00_async_login_sp_done(void *ptr, int res)
99b0bec7 169{
25ff6af1
JC		 170 srb_t *sp = ptr;
171 struct scsi_qla_host *vha = sp->vha;
9ba56b95 172 struct srb_iocb *lio = &sp->u.iocb_cmd;
726b8548 173 struct event_arg ea;
9ba56b95 174
83548fe2 175 ql_dbg(ql_dbg_disc, vha, 0x20dd,
25ff6af1 176 "%s %8phC res %d \n", __func__, sp->fcport->port_name, res);
726b8548 177
6d674927
QT		 178 sp->fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
179
726b8548
QT		 180 if (!test_bit(UNLOADING, &vha->dpc_flags)) {
181 memset(&ea, 0, sizeof(ea));
182 ea.event = FCME_PLOGI_DONE;
183 ea.fcport = sp->fcport;
184 ea.data[0] = lio->u.logio.data[0];
185 ea.data[1] = lio->u.logio.data[1];
186 ea.iop[0] = lio->u.logio.iop[0];
187 ea.iop[1] = lio->u.logio.iop[1];
188 ea.sp = sp;
189 qla2x00_fcport_event_handler(vha, &ea);
190 }
9ba56b95 191
25ff6af1 192 sp->free(sp);
99b0bec7
AV		 193}
194
48acad09
QT		 195static inline bool
196fcport_is_smaller(fc_port_t *fcport)
197{
198 if (wwn_to_u64(fcport->port_name) <
199 wwn_to_u64(fcport->vha->port_name))
200 return true;
201 else
202 return false;
203}
204
205static inline bool
206fcport_is_bigger(fc_port_t *fcport)
207{
208 return !fcport_is_smaller(fcport);
209}
210
ac280b67
AV		 211int
212qla2x00_async_login(struct scsi_qla_host *vha, fc_port_t *fcport,
213 uint16_t *data)
214{
ac280b67 215 srb_t *sp;
4916392b 216 struct srb_iocb *lio;
726b8548
QT		 217 int rval = QLA_FUNCTION_FAILED;
218
219 if (!vha->flags.online)
220 goto done;
221
9ba56b95 222 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
ac280b67
AV		 223 if (!sp)
224 goto done;
225
726b8548
QT		 226 fcport->flags |= FCF_ASYNC_SENT;
227 fcport->logout_completed = 0;
228
a4239945 229 fcport->disc_state = DSC_LOGIN_PEND;
9ba56b95
GM		 230 sp->type = SRB_LOGIN_CMD;
231 sp->name = "login";
a4239945
QT		 232 sp->gen1 = fcport->rscn_gen;
233 sp->gen2 = fcport->login_gen;
9ba56b95
GM		 234
235 lio = &sp->u.iocb_cmd;
3822263e 236 lio->timeout = qla2x00_async_iocb_timeout;
e74e7d95
BH		 237 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2);
238
9ba56b95 239 sp->done = qla2x00_async_login_sp_done;
835aa4f2 240 if (N2N_TOPO(fcport->vha->hw) && fcport_is_bigger(fcport))
48acad09 241 lio->u.logio.flags |= SRB_LOGIN_PRLI_ONLY;
835aa4f2 242 else
48acad09 243 lio->u.logio.flags |= SRB_LOGIN_COND_PLOGI;
a5d42f4c 244
835aa4f2
GM		 245 if (fcport->fc4f_nvme)
246 lio->u.logio.flags |= SRB_LOGIN_SKIP_PRLI;
a5d42f4c 247
9fe278f4
GM		 248 ql_dbg(ql_dbg_disc, vha, 0x2072,
249 "Async-login - %8phC hdl=%x, loopid=%x portid=%02x%02x%02x "
250 "retries=%d.\n", fcport->port_name, sp->handle, fcport->loop_id,
251 fcport->d_id.b.domain, fcport->d_id.b.area, fcport->d_id.b.al_pa,
252 fcport->login_retry);
253
ac280b67 254 rval = qla2x00_start_sp(sp);
080c9517 255 if (rval != QLA_SUCCESS) {
080c9517
CD		 256 fcport->flags |= FCF_LOGIN_NEEDED;
257 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
ac280b67 258 goto done_free_sp;
080c9517 259 }
ac280b67 260
ac280b67
AV		 261 return rval;
262
263done_free_sp:
25ff6af1 264 sp->free(sp);
726b8548 265 fcport->flags &= ~FCF_ASYNC_SENT;
3dbec59b 266done:
fa83e658 267 fcport->flags &= ~FCF_ASYNC_ACTIVE;
ac280b67
AV		 268 return rval;
269}
270
99b0bec7 271static void
25ff6af1 272qla2x00_async_logout_sp_done(void *ptr, int res)
99b0bec7 273{
25ff6af1 274 srb_t *sp = ptr;
9ba56b95 275
6d674927 276 sp->fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
eaf75d18
QT		 277 sp->fcport->login_gen++;
278 qlt_logo_completion_handler(sp->fcport, res);
25ff6af1 279 sp->free(sp);
99b0bec7
AV		 280}
281
ac280b67
AV		 282int
283qla2x00_async_logout(struct scsi_qla_host *vha, fc_port_t *fcport)
284{
ac280b67 285 srb_t *sp;
4916392b 286 struct srb_iocb *lio;
3dbec59b
QT		 287 int rval = QLA_FUNCTION_FAILED;
288
289 if (!vha->flags.online || (fcport->flags & FCF_ASYNC_SENT))
290 return rval;
ac280b67 291
726b8548 292 fcport->flags |= FCF_ASYNC_SENT;
9ba56b95 293 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
ac280b67
AV		 294 if (!sp)
295 goto done;
296
9ba56b95
GM		 297 sp->type = SRB_LOGOUT_CMD;
298 sp->name = "logout";
9ba56b95
GM		 299
300 lio = &sp->u.iocb_cmd;
3822263e 301 lio->timeout = qla2x00_async_iocb_timeout;
e74e7d95
BH		 302 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2);
303
9ba56b95 304 sp->done = qla2x00_async_logout_sp_done;
ac280b67 305
7c3df132 306 ql_dbg(ql_dbg_disc, vha, 0x2070,
726b8548 307 "Async-logout - hdl=%x loop-id=%x portid=%02x%02x%02x %8phC.\n",
cfb0919c 308 sp->handle, fcport->loop_id, fcport->d_id.b.domain,
726b8548
QT		 309 fcport->d_id.b.area, fcport->d_id.b.al_pa,
310 fcport->port_name);
9fe278f4
GM		 311
312 rval = qla2x00_start_sp(sp);
313 if (rval != QLA_SUCCESS)
314 goto done_free_sp;
ac280b67
AV		 315 return rval;
316
317done_free_sp:
25ff6af1 318 sp->free(sp);
ac280b67 319done:
fa83e658 320 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
ac280b67
AV		 321 return rval;
322}
11aea16a
QT		 323
324void
325qla2x00_async_prlo_done(struct scsi_qla_host *vha, fc_port_t *fcport,
326 uint16_t *data)
327{
fa83e658 328 fcport->flags &= ~FCF_ASYNC_ACTIVE;
11aea16a
QT		 329 /* Don't re-login in target mode */
330 if (!fcport->tgt_session)
331 qla2x00_mark_device_lost(vha, fcport, 1, 0);
332 qlt_logo_completion_handler(fcport, data[0]);
333}
334
335static void
336qla2x00_async_prlo_sp_done(void *s, int res)
337{
338 srb_t *sp = (srb_t *)s;
339 struct srb_iocb *lio = &sp->u.iocb_cmd;
340 struct scsi_qla_host *vha = sp->vha;
341
fa83e658 342 sp->fcport->flags &= ~FCF_ASYNC_ACTIVE;
11aea16a
QT		 343 if (!test_bit(UNLOADING, &vha->dpc_flags))
344 qla2x00_post_async_prlo_done_work(sp->fcport->vha, sp->fcport,
345 lio->u.logio.data);
346 sp->free(sp);
347}
348
349int
350qla2x00_async_prlo(struct scsi_qla_host *vha, fc_port_t *fcport)
351{
352 srb_t *sp;
353 struct srb_iocb *lio;
354 int rval;
355
356 rval = QLA_FUNCTION_FAILED;
357 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
358 if (!sp)
359 goto done;
360
361 sp->type = SRB_PRLO_CMD;
362 sp->name = "prlo";
11aea16a
QT		 363
364 lio = &sp->u.iocb_cmd;
365 lio->timeout = qla2x00_async_iocb_timeout;
e74e7d95
BH		 366 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2);
367
11aea16a
QT		 368 sp->done = qla2x00_async_prlo_sp_done;
369 rval = qla2x00_start_sp(sp);
370 if (rval != QLA_SUCCESS)
371 goto done_free_sp;
372
373 ql_dbg(ql_dbg_disc, vha, 0x2070,
374 "Async-prlo - hdl=%x loop-id=%x portid=%02x%02x%02x.\n",
375 sp->handle, fcport->loop_id, fcport->d_id.b.domain,
376 fcport->d_id.b.area, fcport->d_id.b.al_pa);
377 return rval;
378
379done_free_sp:
380 sp->free(sp);
381done:
fa83e658 382 fcport->flags &= ~FCF_ASYNC_ACTIVE;
11aea16a
QT		 383 return rval;
384}
385
f13515ac
QT		 386static
387void qla24xx_handle_adisc_event(scsi_qla_host_t *vha, struct event_arg *ea)
388{
0616e965
QT		 389 struct fc_port *fcport = ea->fcport;
390
391 ql_dbg(ql_dbg_disc, vha, 0x20d2,
392 "%s %8phC DS %d LS %d rc %d login %d|%d rscn %d|%d lid %d\n",
393 __func__, fcport->port_name, fcport->disc_state,
394 fcport->fw_login_state, ea->rc, fcport->login_gen, ea->sp->gen2,
395 fcport->rscn_gen, ea->sp->gen1, fcport->loop_id);
396
397 if (ea->data[0] != MBS_COMMAND_COMPLETE) {
a4239945
QT		 398 ql_dbg(ql_dbg_disc, vha, 0x2066,
399 "%s %8phC: adisc fail: post delete\n",
400 __func__, ea->fcport->port_name);
2d3fdbeb
QT		 401 /* deleted = 0 & logout_on_delete = force fw cleanup */
402 fcport->deleted = 0;
403 fcport->logout_on_delete = 1;
94cff6e1 404 qlt_schedule_sess_for_deletion(ea->fcport);
a4239945
QT		 405 return;
406 }
a4239945
QT		 407
408 if (ea->fcport->disc_state == DSC_DELETE_PEND)
409 return;
410
411 if (ea->sp->gen2 != ea->fcport->login_gen) {
412 /* target side must have changed it. */
413 ql_dbg(ql_dbg_disc, vha, 0x20d3,
0616e965
QT		 414 "%s %8phC generation changed\n",
415 __func__, ea->fcport->port_name);
a4239945
QT		 416 return;
417 } else if (ea->sp->gen1 != ea->fcport->rscn_gen) {
d4f7a16a 418 qla_rscn_replay(fcport);
861d483d 419 qlt_schedule_sess_for_deletion(fcport);
a4239945
QT		 420 return;
421 }
422
423 __qla24xx_handle_gpdb_event(vha, ea);
f13515ac 424}
ac280b67 425
8f9a2148 426static int qla_post_els_plogi_work(struct scsi_qla_host *vha, fc_port_t *fcport)
8777e431
QT		 427{
428 struct qla_work_evt *e;
429
430 e = qla2x00_alloc_work(vha, QLA_EVT_ELS_PLOGI);
431 if (!e)
432 return QLA_FUNCTION_FAILED;
433
434 e->u.fcport.fcport = fcport;
435 fcport->flags |= FCF_ASYNC_ACTIVE;
436 return qla2x00_post_work(vha, e);
437}
438
5ff1d584 439static void
25ff6af1 440qla2x00_async_adisc_sp_done(void *ptr, int res)
5ff1d584 441{
25ff6af1
JC		 442 srb_t *sp = ptr;
443 struct scsi_qla_host *vha = sp->vha;
f13515ac 444 struct event_arg ea;
0616e965 445 struct srb_iocb *lio = &sp->u.iocb_cmd;
f13515ac
QT		 446
447 ql_dbg(ql_dbg_disc, vha, 0x2066,
448 "Async done-%s res %x %8phC\n",
449 sp->name, res, sp->fcport->port_name);
450
15b6c3c9 451 sp->fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
fa83e658 452
f13515ac
QT		 453 memset(&ea, 0, sizeof(ea));
454 ea.event = FCME_ADISC_DONE;
455 ea.rc = res;
0616e965
QT		 456 ea.data[0] = lio->u.logio.data[0];
457 ea.data[1] = lio->u.logio.data[1];
458 ea.iop[0] = lio->u.logio.iop[0];
459 ea.iop[1] = lio->u.logio.iop[1];
f13515ac
QT		 460 ea.fcport = sp->fcport;
461 ea.sp = sp;
462
463 qla2x00_fcport_event_handler(vha, &ea);
9ba56b95 464
25ff6af1 465 sp->free(sp);
5ff1d584
AV		 466}
467
468int
469qla2x00_async_adisc(struct scsi_qla_host *vha, fc_port_t *fcport,
470 uint16_t *data)
471{
5ff1d584 472 srb_t *sp;
4916392b 473 struct srb_iocb *lio;
5ff1d584
AV		 474 int rval;
475
476 rval = QLA_FUNCTION_FAILED;
726b8548 477 fcport->flags |= FCF_ASYNC_SENT;
9ba56b95 478 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
5ff1d584
AV		 479 if (!sp)
480 goto done;
481
9ba56b95
GM		 482 sp->type = SRB_ADISC_CMD;
483 sp->name = "adisc";
9ba56b95
GM		 484
485 lio = &sp->u.iocb_cmd;
3822263e 486 lio->timeout = qla2x00_async_iocb_timeout;
8777e431
QT		 487 sp->gen1 = fcport->rscn_gen;
488 sp->gen2 = fcport->login_gen;
e74e7d95
BH		 489 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2);
490
9ba56b95 491 sp->done = qla2x00_async_adisc_sp_done;
5ff1d584 492 if (data[1] & QLA_LOGIO_LOGIN_RETRIED)
4916392b 493 lio->u.logio.flags |= SRB_LOGIN_RETRIED;
5ff1d584 494
7c3df132 495 ql_dbg(ql_dbg_disc, vha, 0x206f,
f13515ac
QT		 496 "Async-adisc - hdl=%x loopid=%x portid=%06x %8phC.\n",
497 sp->handle, fcport->loop_id, fcport->d_id.b24, fcport->port_name);
9fe278f4
GM		 498
499 rval = qla2x00_start_sp(sp);
500 if (rval != QLA_SUCCESS)
501 goto done_free_sp;
502
5ff1d584
AV		 503 return rval;
504
505done_free_sp:
25ff6af1 506 sp->free(sp);
5ff1d584 507done:
fa83e658 508 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
f13515ac 509 qla2x00_post_async_adisc_work(vha, fcport, data);
726b8548
QT		 510 return rval;
511}
512
513static void qla24xx_handle_gnl_done_event(scsi_qla_host_t *vha,
514 struct event_arg *ea)
515{
516 fc_port_t *fcport, *conflict_fcport;
517 struct get_name_list_extended *e;
518 u16 i, n, found = 0, loop_id;
519 port_id_t id;
520 u64 wwn;
a4239945
QT		 521 u16 data[2];
522 u8 current_login_state;
726b8548
QT		 523
524 fcport = ea->fcport;
f352eeb7
QT		 525 ql_dbg(ql_dbg_disc, vha, 0xffff,
526 "%s %8phC DS %d LS rc %d %d login %d|%d rscn %d|%d lid %d\n",
527 __func__, fcport->port_name, fcport->disc_state,
528 fcport->fw_login_state, ea->rc,
529 fcport->login_gen, fcport->last_login_gen,
530 fcport->rscn_gen, fcport->last_rscn_gen, vha->loop_id);
726b8548 531
a4239945
QT		 532 if (fcport->disc_state == DSC_DELETE_PEND)
533 return;
534
726b8548
QT		 535 if (ea->rc) { /* rval */
536 if (fcport->login_retry == 0) {
83548fe2
QT		 537 ql_dbg(ql_dbg_disc, vha, 0x20de,
538 "GNL failed Port login retry %8phN, retry cnt=%d.\n",
539 fcport->port_name, fcport->login_retry);
726b8548
QT		 540 }
541 return;
542 }
543
544 if (fcport->last_rscn_gen != fcport->rscn_gen) {
d4f7a16a 545 qla_rscn_replay(fcport);
861d483d 546 qlt_schedule_sess_for_deletion(fcport);
726b8548
QT		 547 return;
548 } else if (fcport->last_login_gen != fcport->login_gen) {
83548fe2 549 ql_dbg(ql_dbg_disc, vha, 0x20e0,
f352eeb7
QT		 550 "%s %8phC login gen changed\n",
551 __func__, fcport->port_name);
726b8548
QT		 552 return;
553 }
554
555 n = ea->data[0] / sizeof(struct get_name_list_extended);
556
83548fe2 557 ql_dbg(ql_dbg_disc, vha, 0x20e1,
726b8548
QT		 558 "%s %d %8phC n %d %02x%02x%02x lid %d \n",
559 __func__, __LINE__, fcport->port_name, n,
560 fcport->d_id.b.domain, fcport->d_id.b.area,
561 fcport->d_id.b.al_pa, fcport->loop_id);
562
563 for (i = 0; i < n; i++) {
564 e = &vha->gnl.l[i];
565 wwn = wwn_to_u64(e->port_name);
48acad09
QT		 566 id.b.domain = e->port_id[2];
567 id.b.area = e->port_id[1];
568 id.b.al_pa = e->port_id[0];
569 id.b.rsvd_1 = 0;
726b8548
QT		 570
571 if (memcmp((u8 *)&wwn, fcport->port_name, WWN_SIZE))
572 continue;
573
48acad09
QT		 574 if (IS_SW_RESV_ADDR(id))
575 continue;
576
726b8548 577 found = 1;
726b8548
QT		 578
579 loop_id = le16_to_cpu(e->nport_handle);
580 loop_id = (loop_id & 0x7fff);
8777e431
QT		 581 if (fcport->fc4f_nvme)
582 current_login_state = e->current_login_state >> 4;
583 else
584 current_login_state = e->current_login_state & 0xf;
585
726b8548 586
83548fe2 587 ql_dbg(ql_dbg_disc, vha, 0x20e2,
8777e431 588 "%s found %8phC CLS [%x|%x] nvme %d ID[%02x%02x%02x|%02x%02x%02x] lid[%d|%d]\n",
83548fe2
QT		 589 __func__, fcport->port_name,
590 e->current_login_state, fcport->fw_login_state,
8777e431 591 fcport->fc4f_nvme, id.b.domain, id.b.area, id.b.al_pa,
83548fe2
QT		 592 fcport->d_id.b.domain, fcport->d_id.b.area,
593 fcport->d_id.b.al_pa, loop_id, fcport->loop_id);
726b8548 594
48acad09
QT		 595 switch (fcport->disc_state) {
596 case DSC_DELETE_PEND:
597 case DSC_DELETED:
598 break;
599 default:
8777e431
QT		 600 if ((id.b24 != fcport->d_id.b24 &&
601 fcport->d_id.b24) ||
602 (fcport->loop_id != FC_NO_LOOP_ID &&
603 fcport->loop_id != loop_id)) {
604 ql_dbg(ql_dbg_disc, vha, 0x20e3,
605 "%s %d %8phC post del sess\n",
606 __func__, __LINE__, fcport->port_name);
48acad09
QT		 607 qlt_schedule_sess_for_deletion(fcport);
608 return;
609 }
610 break;
726b8548
QT		 611 }
612
613 fcport->loop_id = loop_id;
614
615 wwn = wwn_to_u64(fcport->port_name);
616 qlt_find_sess_invalidate_other(vha, wwn,
617 id, loop_id, &conflict_fcport);
618
619 if (conflict_fcport) {
620 /*
621 * Another share fcport share the same loop_id &
622 * nport id. Conflict fcport needs to finish
623 * cleanup before this fcport can proceed to login.
624 */
625 conflict_fcport->conflict = fcport;
626 fcport->login_pause = 1;
627 }
628
48acad09
QT		 629 switch (vha->hw->current_topology) {
630 default:
631 switch (current_login_state) {
632 case DSC_LS_PRLI_COMP:
633 ql_dbg(ql_dbg_disc + ql_dbg_verbose,
634 vha, 0x20e4, "%s %d %8phC post gpdb\n",
635 __func__, __LINE__, fcport->port_name);
a4239945 636
48acad09
QT		 637 if ((e->prli_svc_param_word_3[0] & BIT_4) == 0)
638 fcport->port_type = FCT_INITIATOR;
639 else
640 fcport->port_type = FCT_TARGET;
641 data[0] = data[1] = 0;
642 qla2x00_post_async_adisc_work(vha, fcport,
643 data);
644 break;
645 case DSC_LS_PORT_UNAVAIL:
646 default:
647 if (fcport->loop_id != FC_NO_LOOP_ID)
648 qla2x00_clear_loop_id(fcport);
a4239945 649
48acad09 650 fcport->loop_id = loop_id;
726b8548 651 fcport->fw_login_state = DSC_LS_PORT_UNAVAIL;
48acad09
QT		 652 qla24xx_fcport_handle_login(vha, fcport);
653 break;
726b8548 654 }
726b8548 655 break;
48acad09 656 case ISP_CFG_N:
8777e431
QT		 657 fcport->fw_login_state = current_login_state;
658 fcport->d_id = id;
48acad09
QT		 659 switch (current_login_state) {
660 case DSC_LS_PRLI_COMP:
661 if ((e->prli_svc_param_word_3[0] & BIT_4) == 0)
662 fcport->port_type = FCT_INITIATOR;
663 else
664 fcport->port_type = FCT_TARGET;
665
666 data[0] = data[1] = 0;
667 qla2x00_post_async_adisc_work(vha, fcport,
668 data);
669 break;
670 case DSC_LS_PLOGI_COMP:
671 if (fcport_is_bigger(fcport)) {
672 /* local adapter is smaller */
673 if (fcport->loop_id != FC_NO_LOOP_ID)
674 qla2x00_clear_loop_id(fcport);
675
676 fcport->loop_id = loop_id;
677 qla24xx_fcport_handle_login(vha,
678 fcport);
679 break;
680 }
50435d42 681 /* fall through */
48acad09
QT		 682 default:
683 if (fcport_is_smaller(fcport)) {
684 /* local adapter is bigger */
685 if (fcport->loop_id != FC_NO_LOOP_ID)
686 qla2x00_clear_loop_id(fcport);
687
688 fcport->loop_id = loop_id;
689 qla24xx_fcport_handle_login(vha,
690 fcport);
691 }
692 break;
693 }
694 break;
695 } /* switch (ha->current_topology) */
726b8548
QT		 696 }
697
698 if (!found) {
48acad09
QT		 699 switch (vha->hw->current_topology) {
700 case ISP_CFG_F:
701 case ISP_CFG_FL:
702 for (i = 0; i < n; i++) {
703 e = &vha->gnl.l[i];
704 id.b.domain = e->port_id[0];
705 id.b.area = e->port_id[1];
706 id.b.al_pa = e->port_id[2];
707 id.b.rsvd_1 = 0;
708 loop_id = le16_to_cpu(e->nport_handle);
709
710 if (fcport->d_id.b24 == id.b24) {
711 conflict_fcport =
712 qla2x00_find_fcport_by_wwpn(vha,
713 e->port_name, 0);
72f02ba6
LT		 714 if (conflict_fcport) {
715 ql_dbg(ql_dbg_disc + ql_dbg_verbose,
716 vha, 0x20e5,
717 "%s %d %8phC post del sess\n",
718 __func__, __LINE__,
719 conflict_fcport->port_name);
720 qlt_schedule_sess_for_deletion
721 (conflict_fcport);
722 }
36eb8ff6 723 }
48acad09
QT		 724 /*
725 * FW already picked this loop id for
726 * another fcport
727 */
728 if (fcport->loop_id == loop_id)
729 fcport->loop_id = FC_NO_LOOP_ID;
726b8548 730 }
48acad09
QT		 731 qla24xx_fcport_handle_login(vha, fcport);
732 break;
733 case ISP_CFG_N:
8777e431
QT		 734 fcport->disc_state = DSC_DELETED;
735 if (time_after_eq(jiffies, fcport->dm_login_expire)) {
736 if (fcport->n2n_link_reset_cnt < 2) {
737 fcport->n2n_link_reset_cnt++;
738 /*
739 * remote port is not sending PLOGI.
740 * Reset link to kick start his state
741 * machine
742 */
743 set_bit(N2N_LINK_RESET,
744 &vha->dpc_flags);
745 } else {
746 if (fcport->n2n_chip_reset < 1) {
747 ql_log(ql_log_info, vha, 0x705d,
748 "Chip reset to bring laser down");
749 set_bit(ISP_ABORT_NEEDED,
750 &vha->dpc_flags);
751 fcport->n2n_chip_reset++;
752 } else {
753 ql_log(ql_log_info, vha, 0x705d,
754 "Remote port %8ph is not coming back\n",
755 fcport->port_name);
756 fcport->scan_state = 0;
757 }
758 }
759 qla2xxx_wake_dpc(vha);
760 } else {
761 /*
762 * report port suppose to do PLOGI. Give him
763 * more time. FW will catch it.
764 */
765 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
766 }
48acad09
QT		 767 break;
768 default:
769 break;
726b8548 770 }
726b8548
QT		 771 }
772} /* gnl_event */
773
774static void
25ff6af1 775qla24xx_async_gnl_sp_done(void *s, int res)
726b8548 776{
25ff6af1
JC		 777 struct srb *sp = s;
778 struct scsi_qla_host *vha = sp->vha;
726b8548
QT		 779 unsigned long flags;
780 struct fc_port *fcport = NULL, *tf;
781 u16 i, n = 0, loop_id;
782 struct event_arg ea;
783 struct get_name_list_extended *e;
784 u64 wwn;
785 struct list_head h;
a4239945 786 bool found = false;
726b8548 787
83548fe2 788 ql_dbg(ql_dbg_disc, vha, 0x20e7,
726b8548
QT		 789 "Async done-%s res %x mb[1]=%x mb[2]=%x \n",
790 sp->name, res, sp->u.iocb_cmd.u.mbx.in_mb[1],
791 sp->u.iocb_cmd.u.mbx.in_mb[2]);
792
ef801f07
HM		 793 if (res == QLA_FUNCTION_TIMEOUT)
794 return;
795
0aca7784 796 sp->fcport->flags &= ~(FCF_ASYNC_SENT|FCF_ASYNC_ACTIVE);
726b8548
QT		 797 memset(&ea, 0, sizeof(ea));
798 ea.sp = sp;
799 ea.rc = res;
800 ea.event = FCME_GNL_DONE;
801
802 if (sp->u.iocb_cmd.u.mbx.in_mb[1] >=
803 sizeof(struct get_name_list_extended)) {
804 n = sp->u.iocb_cmd.u.mbx.in_mb[1] /
805 sizeof(struct get_name_list_extended);
806 ea.data[0] = sp->u.iocb_cmd.u.mbx.in_mb[1]; /* amnt xfered */
807 }
808
809 for (i = 0; i < n; i++) {
810 e = &vha->gnl.l[i];
811 loop_id = le16_to_cpu(e->nport_handle);
812 /* mask out reserve bit */
813 loop_id = (loop_id & 0x7fff);
814 set_bit(loop_id, vha->hw->loop_id_map);
815 wwn = wwn_to_u64(e->port_name);
816
83548fe2 817 ql_dbg(ql_dbg_disc + ql_dbg_verbose, vha, 0x20e8,
726b8548
QT		 818 "%s %8phC %02x:%02x:%02x state %d/%d lid %x \n",
819 __func__, (void *)&wwn, e->port_id[2], e->port_id[1],
820 e->port_id[0], e->current_login_state, e->last_login_state,
821 (loop_id & 0x7fff));
822 }
823
0aca7784 824 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
726b8548
QT		 825
826 INIT_LIST_HEAD(&h);
827 fcport = tf = NULL;
828 if (!list_empty(&vha->gnl.fcports))
829 list_splice_init(&vha->gnl.fcports, &h);
0aca7784 830 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
726b8548
QT		 831
832 list_for_each_entry_safe(fcport, tf, &h, gnl_entry) {
833 list_del_init(&fcport->gnl_entry);
0aca7784 834 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
6d674927 835 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
0aca7784 836 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
726b8548
QT		 837 ea.fcport = fcport;
838
839 qla2x00_fcport_event_handler(vha, &ea);
840 }
841
a4239945
QT		 842 /* create new fcport if fw has knowledge of new sessions */
843 for (i = 0; i < n; i++) {
844 port_id_t id;
845 u64 wwnn;
846
847 e = &vha->gnl.l[i];
848 wwn = wwn_to_u64(e->port_name);
849
850 found = false;
851 list_for_each_entry_safe(fcport, tf, &vha->vp_fcports, list) {
852 if (!memcmp((u8 *)&wwn, fcport->port_name,
853 WWN_SIZE)) {
854 found = true;
855 break;
856 }
857 }
858
cf055fb0 859 id.b.domain = e->port_id[2];
a4239945 860 id.b.area = e->port_id[1];
cf055fb0 861 id.b.al_pa = e->port_id[0];
a4239945
QT		 862 id.b.rsvd_1 = 0;
863
864 if (!found && wwn && !IS_SW_RESV_ADDR(id)) {
865 ql_dbg(ql_dbg_disc, vha, 0x2065,
cf055fb0
QT		 866 "%s %d %8phC %06x post new sess\n",
867 __func__, __LINE__, (u8 *)&wwn, id.b24);
a4239945
QT		 868 wwnn = wwn_to_u64(e->node_name);
869 qla24xx_post_newsess_work(vha, &id, (u8 *)&wwn,
870 (u8 *)&wwnn, NULL, FC4_TYPE_UNKNOWN);
871 }
872 }
873
0aca7784
QT		 874 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
875 vha->gnl.sent = 0;
726b8548
QT		 876 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
877
25ff6af1 878 sp->free(sp);
726b8548
QT		 879}
880
881int qla24xx_async_gnl(struct scsi_qla_host *vha, fc_port_t *fcport)
882{
883 srb_t *sp;
884 struct srb_iocb *mbx;
885 int rval = QLA_FUNCTION_FAILED;
886 unsigned long flags;
887 u16 *mb;
888
3dbec59b
QT		 889 if (!vha->flags.online || (fcport->flags & FCF_ASYNC_SENT))
890 return rval;
726b8548 891
83548fe2 892 ql_dbg(ql_dbg_disc, vha, 0x20d9,
726b8548
QT		 893 "Async-gnlist WWPN %8phC \n", fcport->port_name);
894
0aca7784
QT		 895 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
896 fcport->flags |= FCF_ASYNC_SENT;
726b8548
QT		 897 fcport->disc_state = DSC_GNL;
898 fcport->last_rscn_gen = fcport->rscn_gen;
899 fcport->last_login_gen = fcport->login_gen;
900
901 list_add_tail(&fcport->gnl_entry, &vha->gnl.fcports);
0aca7784
QT		 902 if (vha->gnl.sent) {
903 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
904 return QLA_SUCCESS;
905 }
906 vha->gnl.sent = 1;
907 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
726b8548
QT		 908
909 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
910 if (!sp)
911 goto done;
3dbec59b 912
726b8548
QT		 913 sp->type = SRB_MB_IOCB;
914 sp->name = "gnlist";
915 sp->gen1 = fcport->rscn_gen;
916 sp->gen2 = fcport->login_gen;
917
e74e7d95
BH		 918 mbx = &sp->u.iocb_cmd;
919 mbx->timeout = qla2x00_async_iocb_timeout;
726b8548
QT		 920 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha)+2);
921
922 mb = sp->u.iocb_cmd.u.mbx.out_mb;
923 mb[0] = MBC_PORT_NODE_NAME_LIST;
924 mb[1] = BIT_2 | BIT_3;
925 mb[2] = MSW(vha->gnl.ldma);
926 mb[3] = LSW(vha->gnl.ldma);
927 mb[6] = MSW(MSD(vha->gnl.ldma));
928 mb[7] = LSW(MSD(vha->gnl.ldma));
929 mb[8] = vha->gnl.size;
930 mb[9] = vha->vp_idx;
931
726b8548
QT		 932 sp->done = qla24xx_async_gnl_sp_done;
933
934 rval = qla2x00_start_sp(sp);
935 if (rval != QLA_SUCCESS)
936 goto done_free_sp;
937
83548fe2
QT		 938 ql_dbg(ql_dbg_disc, vha, 0x20da,
939 "Async-%s - OUT WWPN %8phC hndl %x\n",
940 sp->name, fcport->port_name, sp->handle);
726b8548
QT		 941
942 return rval;
943
944done_free_sp:
25ff6af1 945 sp->free(sp);
726b8548 946 fcport->flags &= ~FCF_ASYNC_SENT;
3dbec59b 947done:
726b8548
QT		 948 return rval;
949}
950
951int qla24xx_post_gnl_work(struct scsi_qla_host *vha, fc_port_t *fcport)
952{
953 struct qla_work_evt *e;
954
955 e = qla2x00_alloc_work(vha, QLA_EVT_GNL);
956 if (!e)
957 return QLA_FUNCTION_FAILED;
958
959 e->u.fcport.fcport = fcport;
6d674927 960 fcport->flags |= FCF_ASYNC_ACTIVE;
726b8548
QT		 961 return qla2x00_post_work(vha, e);
962}
963
964static
25ff6af1 965void qla24xx_async_gpdb_sp_done(void *s, int res)
726b8548 966{
25ff6af1
JC		 967 struct srb *sp = s;
968 struct scsi_qla_host *vha = sp->vha;
726b8548 969 struct qla_hw_data *ha = vha->hw;
726b8548
QT		 970 fc_port_t *fcport = sp->fcport;
971 u16 *mb = sp->u.iocb_cmd.u.mbx.in_mb;
726b8548
QT		 972 struct event_arg ea;
973
83548fe2 974 ql_dbg(ql_dbg_disc, vha, 0x20db,
726b8548
QT		 975 "Async done-%s res %x, WWPN %8phC mb[1]=%x mb[2]=%x \n",
976 sp->name, res, fcport->port_name, mb[1], mb[2]);
977
bcc71cc3
GM		 978 if (res == QLA_FUNCTION_TIMEOUT) {
979 dma_pool_free(sp->vha->hw->s_dma_pool, sp->u.iocb_cmd.u.mbx.in,
980 sp->u.iocb_cmd.u.mbx.in_dma);
981 return;
982 }
983
ef801f07 984 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE);
726b8548
QT		 985 memset(&ea, 0, sizeof(ea));
986 ea.event = FCME_GPDB_DONE;
726b8548
QT		 987 ea.fcport = fcport;
988 ea.sp = sp;
989
990 qla2x00_fcport_event_handler(vha, &ea);
991
992 dma_pool_free(ha->s_dma_pool, sp->u.iocb_cmd.u.mbx.in,
993 sp->u.iocb_cmd.u.mbx.in_dma);
994
25ff6af1 995 sp->free(sp);
726b8548
QT		 996}
997
a5d42f4c
DG		 998static int qla24xx_post_prli_work(struct scsi_qla_host *vha, fc_port_t *fcport)
999{
1000 struct qla_work_evt *e;
1001
1002 e = qla2x00_alloc_work(vha, QLA_EVT_PRLI);
1003 if (!e)
1004 return QLA_FUNCTION_FAILED;
1005
1006 e->u.fcport.fcport = fcport;
1007
1008 return qla2x00_post_work(vha, e);
1009}
1010
1011static void
1012qla2x00_async_prli_sp_done(void *ptr, int res)
1013{
1014 srb_t *sp = ptr;
1015 struct scsi_qla_host *vha = sp->vha;
1016 struct srb_iocb *lio = &sp->u.iocb_cmd;
1017 struct event_arg ea;
1018
1019 ql_dbg(ql_dbg_disc, vha, 0x2129,
1020 "%s %8phC res %d \n", __func__,
1021 sp->fcport->port_name, res);
1022
1023 sp->fcport->flags &= ~FCF_ASYNC_SENT;
1024
1025 if (!test_bit(UNLOADING, &vha->dpc_flags)) {
1026 memset(&ea, 0, sizeof(ea));
1027 ea.event = FCME_PRLI_DONE;
1028 ea.fcport = sp->fcport;
1029 ea.data[0] = lio->u.logio.data[0];
1030 ea.data[1] = lio->u.logio.data[1];
1031 ea.iop[0] = lio->u.logio.iop[0];
1032 ea.iop[1] = lio->u.logio.iop[1];
1033 ea.sp = sp;
1034
1035 qla2x00_fcport_event_handler(vha, &ea);
1036 }
1037
1038 sp->free(sp);
1039}
1040
1041int
1042qla24xx_async_prli(struct scsi_qla_host *vha, fc_port_t *fcport)
1043{
1044 srb_t *sp;
1045 struct srb_iocb *lio;
1046 int rval = QLA_FUNCTION_FAILED;
1047
1048 if (!vha->flags.online)
1049 return rval;
1050
1051 if (fcport->fw_login_state == DSC_LS_PLOGI_PEND ||
a5d42f4c
DG		 1052 fcport->fw_login_state == DSC_LS_PRLI_PEND)
1053 return rval;
1054
1055 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
1056 if (!sp)
1057 return rval;
1058
1059 fcport->flags |= FCF_ASYNC_SENT;
1060 fcport->logout_completed = 0;
1061
1062 sp->type = SRB_PRLI_CMD;
1063 sp->name = "prli";
a5d42f4c
DG		 1064
1065 lio = &sp->u.iocb_cmd;
1066 lio->timeout = qla2x00_async_iocb_timeout;
e74e7d95
BH		 1067 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2);
1068
a5d42f4c
DG		 1069 sp->done = qla2x00_async_prli_sp_done;
1070 lio->u.logio.flags = 0;
1071
1072 if (fcport->fc4f_nvme)
1073 lio->u.logio.flags |= SRB_LOGIN_NVME_PRLI;
1074
1075 rval = qla2x00_start_sp(sp);
1076 if (rval != QLA_SUCCESS) {
a5d42f4c
DG		 1077 fcport->flags |= FCF_LOGIN_NEEDED;
1078 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
1079 goto done_free_sp;
1080 }
1081
1082 ql_dbg(ql_dbg_disc, vha, 0x211b,
8777e431
QT		 1083 "Async-prli - %8phC hdl=%x, loopid=%x portid=%06x retries=%d %s.\n",
1084 fcport->port_name, sp->handle, fcport->loop_id, fcport->d_id.b24,
1085 fcport->login_retry, fcport->fc4f_nvme ? "nvme" : "fc");
a5d42f4c
DG		 1086
1087 return rval;
1088
1089done_free_sp:
1090 sp->free(sp);
1091 fcport->flags &= ~FCF_ASYNC_SENT;
1092 return rval;
1093}
1094
a07fc0a4 1095int qla24xx_post_gpdb_work(struct scsi_qla_host *vha, fc_port_t *fcport, u8 opt)
726b8548
QT		 1096{
1097 struct qla_work_evt *e;
1098
1099 e = qla2x00_alloc_work(vha, QLA_EVT_GPDB);
1100 if (!e)
1101 return QLA_FUNCTION_FAILED;
1102
1103 e->u.fcport.fcport = fcport;
1104 e->u.fcport.opt = opt;
6d674927 1105 fcport->flags |= FCF_ASYNC_ACTIVE;
726b8548
QT		 1106 return qla2x00_post_work(vha, e);
1107}
1108
1109int qla24xx_async_gpdb(struct scsi_qla_host *vha, fc_port_t *fcport, u8 opt)
1110{
1111 srb_t *sp;
1112 struct srb_iocb *mbx;
1113 int rval = QLA_FUNCTION_FAILED;
1114 u16 *mb;
1115 dma_addr_t pd_dma;
1116 struct port_database_24xx *pd;
1117 struct qla_hw_data *ha = vha->hw;
1118
3dbec59b
QT		 1119 if (!vha->flags.online || (fcport->flags & FCF_ASYNC_SENT))
1120 return rval;
726b8548 1121
726b8548
QT		 1122 fcport->disc_state = DSC_GPDB;
1123
1124 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
1125 if (!sp)
1126 goto done;
1127
3dbec59b 1128 fcport->flags |= FCF_ASYNC_SENT;
e0824e69
JC		 1129 sp->type = SRB_MB_IOCB;
1130 sp->name = "gpdb";
1131 sp->gen1 = fcport->rscn_gen;
1132 sp->gen2 = fcport->login_gen;
e74e7d95
BH		 1133
1134 mbx = &sp->u.iocb_cmd;
1135 mbx->timeout = qla2x00_async_iocb_timeout;
e0824e69
JC		 1136 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2);
1137
08eb7f45 1138 pd = dma_pool_zalloc(ha->s_dma_pool, GFP_KERNEL, &pd_dma);
726b8548 1139 if (pd == NULL) {
83548fe2
QT		 1140 ql_log(ql_log_warn, vha, 0xd043,
1141 "Failed to allocate port database structure.\n");
726b8548
QT		 1142 goto done_free_sp;
1143 }
726b8548 1144
726b8548
QT		 1145 mb = sp->u.iocb_cmd.u.mbx.out_mb;
1146 mb[0] = MBC_GET_PORT_DATABASE;
1147 mb[1] = fcport->loop_id;
1148 mb[2] = MSW(pd_dma);
1149 mb[3] = LSW(pd_dma);
1150 mb[6] = MSW(MSD(pd_dma));
1151 mb[7] = LSW(MSD(pd_dma));
1152 mb[9] = vha->vp_idx;
1153 mb[10] = opt;
1154
726b8548
QT		 1155 mbx->u.mbx.in = (void *)pd;
1156 mbx->u.mbx.in_dma = pd_dma;
1157
1158 sp->done = qla24xx_async_gpdb_sp_done;
1159
83548fe2
QT		 1160 ql_dbg(ql_dbg_disc, vha, 0x20dc,
1161 "Async-%s %8phC hndl %x opt %x\n",
1162 sp->name, fcport->port_name, sp->handle, opt);
726b8548 1163
9fe278f4
GM		 1164 rval = qla2x00_start_sp(sp);
1165 if (rval != QLA_SUCCESS)
1166 goto done_free_sp;
726b8548
QT		 1167 return rval;
1168
1169done_free_sp:
1170 if (pd)
1171 dma_pool_free(ha->s_dma_pool, pd, pd_dma);
1172
25ff6af1 1173 sp->free(sp);
726b8548 1174 fcport->flags &= ~FCF_ASYNC_SENT;
3dbec59b 1175done:
726b8548 1176 qla24xx_post_gpdb_work(vha, fcport, opt);
5ff1d584
AV		 1177 return rval;
1178}
1179
726b8548 1180static
a4239945 1181void __qla24xx_handle_gpdb_event(scsi_qla_host_t *vha, struct event_arg *ea)
726b8548 1182{
726b8548
QT		 1183 unsigned long flags;
1184
726b8548 1185 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
f13515ac 1186 ea->fcport->login_gen++;
726b8548
QT		 1187 ea->fcport->deleted = 0;
1188 ea->fcport->logout_on_delete = 1;
1189
1190 if (!ea->fcport->login_succ && !IS_SW_RESV_ADDR(ea->fcport->d_id)) {
1191 vha->fcport_count++;
1192 ea->fcport->login_succ = 1;
1193
0aca7784 1194 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
cd4ed6b4 1195 qla24xx_sched_upd_fcport(ea->fcport);
0aca7784 1196 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
414d9ff3
QT		 1197 } else if (ea->fcport->login_succ) {
1198 /*
1199 * We have an existing session. A late RSCN delivery
1200 * must have triggered the session to be re-validate.
a4239945 1201 * Session is still valid.
414d9ff3 1202 */
5ef696aa
QT		 1203 ql_dbg(ql_dbg_disc, vha, 0x20d6,
1204 "%s %d %8phC session revalidate success\n",
a4239945 1205 __func__, __LINE__, ea->fcport->port_name);
8a7eac2f 1206 ea->fcport->disc_state = DSC_LOGIN_COMPLETE;
726b8548
QT		 1207 }
1208 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
a4239945
QT		 1209}
1210
1211static
1212void qla24xx_handle_gpdb_event(scsi_qla_host_t *vha, struct event_arg *ea)
1213{
a4239945
QT		 1214 fc_port_t *fcport = ea->fcport;
1215 struct port_database_24xx *pd;
1216 struct srb *sp = ea->sp;
2b5b9647 1217 uint8_t ls;
a4239945
QT		 1218
1219 pd = (struct port_database_24xx *)sp->u.iocb_cmd.u.mbx.in;
1220
1221 fcport->flags &= ~FCF_ASYNC_SENT;
1222
1223 ql_dbg(ql_dbg_disc, vha, 0x20d2,
8777e431
QT		 1224 "%s %8phC DS %d LS %d nvme %x rc %d\n", __func__, fcport->port_name,
1225 fcport->disc_state, pd->current_login_state, fcport->fc4f_nvme,
1226 ea->rc);
a4239945
QT		 1227
1228 if (fcport->disc_state == DSC_DELETE_PEND)
1229 return;
726b8548 1230
2b5b9647
DT		 1231 if (fcport->fc4f_nvme)
1232 ls = pd->current_login_state >> 4;
1233 else
1234 ls = pd->current_login_state & 0xf;
1235
d4f7a16a
HM		 1236 if (ea->sp->gen2 != fcport->login_gen) {
1237 /* target side must have changed it. */
1238
1239 ql_dbg(ql_dbg_disc, vha, 0x20d3,
1240 "%s %8phC generation changed\n",
1241 __func__, fcport->port_name);
1242 return;
1243 } else if (ea->sp->gen1 != fcport->rscn_gen) {
1244 qla_rscn_replay(fcport);
861d483d 1245 qlt_schedule_sess_for_deletion(fcport);
d4f7a16a
HM		 1246 return;
1247 }
1248
2b5b9647 1249 switch (ls) {
a4239945
QT		 1250 case PDS_PRLI_COMPLETE:
1251 __qla24xx_parse_gpdb(vha, fcport, pd);
1252 break;
1253 case PDS_PLOGI_PENDING:
1254 case PDS_PLOGI_COMPLETE:
1255 case PDS_PRLI_PENDING:
1256 case PDS_PRLI2_PENDING:
8fde6977
QT		 1257 /* Set discovery state back to GNL to Relogin attempt */
1258 if (qla_dual_mode_enabled(vha) ||
1259 qla_ini_mode_enabled(vha)) {
1260 fcport->disc_state = DSC_GNL;
1261 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
1262 }
a4239945
QT		 1263 return;
1264 case PDS_LOGO_PENDING:
1265 case PDS_PORT_UNAVAILABLE:
1266 default:
1267 ql_dbg(ql_dbg_disc, vha, 0x20d5, "%s %d %8phC post del sess\n",
1268 __func__, __LINE__, fcport->port_name);
d8630bb9 1269 qlt_schedule_sess_for_deletion(fcport);
a4239945
QT		 1270 return;
1271 }
1272 __qla24xx_handle_gpdb_event(vha, ea);
1273} /* gpdb event */
9cd883f0
QT		 1274
1275static void qla_chk_n2n_b4_login(struct scsi_qla_host *vha, fc_port_t *fcport)
1276{
1277 u8 login = 0;
040036bb 1278 int rc;
9cd883f0
QT		 1279
1280 if (qla_tgt_mode_enabled(vha))
1281 return;
1282
1283 if (qla_dual_mode_enabled(vha)) {
1284 if (N2N_TOPO(vha->hw)) {
1285 u64 mywwn, wwn;
1286
1287 mywwn = wwn_to_u64(vha->port_name);
1288 wwn = wwn_to_u64(fcport->port_name);
1289 if (mywwn > wwn)
1290 login = 1;
1291 else if ((fcport->fw_login_state == DSC_LS_PLOGI_COMP)
1292 && time_after_eq(jiffies,
1293 fcport->plogi_nack_done_deadline))
1294 login = 1;
1295 } else {
1296 login = 1;
1297 }
1298 } else {
1299 /* initiator mode */
1300 login = 1;
1301 }
1302
0754d5e0
QT		 1303 if (login && fcport->login_retry) {
1304 fcport->login_retry--;
040036bb
QT		 1305 if (fcport->loop_id == FC_NO_LOOP_ID) {
1306 fcport->fw_login_state = DSC_LS_PORT_UNAVAIL;
1307 rc = qla2x00_find_new_loop_id(vha, fcport);
1308 if (rc) {
1309 ql_dbg(ql_dbg_disc, vha, 0x20e6,
1310 "%s %d %8phC post del sess - out of loopid\n",
1311 __func__, __LINE__, fcport->port_name);
1312 fcport->scan_state = 0;
94cff6e1 1313 qlt_schedule_sess_for_deletion(fcport);
040036bb
QT		 1314 return;
1315 }
1316 }
9cd883f0
QT		 1317 ql_dbg(ql_dbg_disc, vha, 0x20bf,
1318 "%s %d %8phC post login\n",
1319 __func__, __LINE__, fcport->port_name);
9cd883f0
QT		 1320 qla2x00_post_async_login_work(vha, fcport, NULL);
1321 }
1322}
1323
726b8548
QT		 1324int qla24xx_fcport_handle_login(struct scsi_qla_host *vha, fc_port_t *fcport)
1325{
f13515ac 1326 u16 data[2];
a4239945 1327 u64 wwn;
cd4ed6b4 1328 u16 sec;
726b8548 1329
0754d5e0
QT		 1330 ql_dbg(ql_dbg_disc + ql_dbg_verbose, vha, 0x20d8,
1331 "%s %8phC DS %d LS %d P %d fl %x confl %p rscn %d|%d login %d lid %d scan %d\n",
726b8548
QT		 1332 __func__, fcport->port_name, fcport->disc_state,
1333 fcport->fw_login_state, fcport->login_pause, fcport->flags,
1334 fcport->conflict, fcport->last_rscn_gen, fcport->rscn_gen,
0754d5e0 1335 fcport->login_gen, fcport->loop_id, fcport->scan_state);
726b8548 1336
a4239945
QT		 1337 if (fcport->scan_state != QLA_FCPORT_FOUND)
1338 return 0;
726b8548 1339
07ea4b60
HR		 1340 if ((fcport->loop_id != FC_NO_LOOP_ID) &&
1341 ((fcport->fw_login_state == DSC_LS_PLOGI_PEND) ||
1342 (fcport->fw_login_state == DSC_LS_PRLI_PEND)))
726b8548
QT		 1343 return 0;
1344
5b33469a 1345 if (fcport->fw_login_state == DSC_LS_PLOGI_COMP) {
9cd883f0
QT		 1346 if (time_before_eq(jiffies, fcport->plogi_nack_done_deadline)) {
1347 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
5b33469a 1348 return 0;
9cd883f0 1349 }
5b33469a
QT		 1350 }
1351
726b8548
QT		 1352 /* for pure Target Mode. Login will not be initiated */
1353 if (vha->host->active_mode == MODE_TARGET)
1354 return 0;
1355
1356 if (fcport->flags & FCF_ASYNC_SENT) {
1357 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
1358 return 0;
1359 }
1360
1361 switch (fcport->disc_state) {
1362 case DSC_DELETED:
a4239945 1363 wwn = wwn_to_u64(fcport->node_name);
8777e431
QT		 1364 switch (vha->hw->current_topology) {
1365 case ISP_CFG_N:
1366 if (fcport_is_smaller(fcport)) {
1367 /* this adapter is bigger */
1368 if (fcport->login_retry) {
1369 if (fcport->loop_id == FC_NO_LOOP_ID) {
1370 qla2x00_find_new_loop_id(vha,
1371 fcport);
1372 fcport->fw_login_state =
1373 DSC_LS_PORT_UNAVAIL;
1374 }
1375 fcport->login_retry--;
1376 qla_post_els_plogi_work(vha, fcport);
1377 } else {
1378 ql_log(ql_log_info, vha, 0x705d,
1379 "Unable to reach remote port %8phC",
1380 fcport->port_name);
1381 }
1382 } else {
1383 qla24xx_post_gnl_work(vha, fcport);
1384 }
1385 break;
1386 default:
1387 if (wwn == 0) {
1388 ql_dbg(ql_dbg_disc, vha, 0xffff,
1389 "%s %d %8phC post GNNID\n",
1390 __func__, __LINE__, fcport->port_name);
1391 qla24xx_post_gnnid_work(vha, fcport);
1392 } else if (fcport->loop_id == FC_NO_LOOP_ID) {
1393 ql_dbg(ql_dbg_disc, vha, 0x20bd,
1394 "%s %d %8phC post gnl\n",
1395 __func__, __LINE__, fcport->port_name);
1396 qla24xx_post_gnl_work(vha, fcport);
1397 } else {
1398 qla_chk_n2n_b4_login(vha, fcport);
1399 }
1400 break;
726b8548
QT		 1401 }
1402 break;
1403
1404 case DSC_GNL:
8777e431
QT		 1405 switch (vha->hw->current_topology) {
1406 case ISP_CFG_N:
1407 if ((fcport->current_login_state & 0xf) == 0x6) {
1408 ql_dbg(ql_dbg_disc, vha, 0x2118,
1409 "%s %d %8phC post GPDB work\n",
1410 __func__, __LINE__, fcport->port_name);
1411 fcport->chip_reset =
1412 vha->hw->base_qpair->chip_reset;
1413 qla24xx_post_gpdb_work(vha, fcport, 0);
1414 } else {
1415 ql_dbg(ql_dbg_disc, vha, 0x2118,
1416 "%s %d %8phC post NVMe PRLI\n",
1417 __func__, __LINE__, fcport->port_name);
1418 qla24xx_post_prli_work(vha, fcport);
1419 }
1420 break;
1421 default:
1422 if (fcport->login_pause) {
1423 fcport->last_rscn_gen = fcport->rscn_gen;
1424 fcport->last_login_gen = fcport->login_gen;
1425 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
1426 break;
1427 }
1428 qla_chk_n2n_b4_login(vha, fcport);
726b8548
QT		 1429 break;
1430 }
726b8548
QT		 1431 break;
1432
1433 case DSC_LOGIN_FAILED:
9cd883f0
QT		 1434 if (N2N_TOPO(vha->hw))
1435 qla_chk_n2n_b4_login(vha, fcport);
1436 else
d4f7a16a 1437 qlt_schedule_sess_for_deletion(fcport);
726b8548
QT		 1438 break;
1439
1440 case DSC_LOGIN_COMPLETE:
1441 /* recheck login state */
f13515ac
QT		 1442 data[0] = data[1] = 0;
1443 qla2x00_post_async_adisc_work(vha, fcport, data);
726b8548
QT		 1444 break;
1445
1cbc0efc
DT		 1446 case DSC_LOGIN_PEND:
1447 if (fcport->fw_login_state == DSC_LS_PLOGI_COMP)
1448 qla24xx_post_prli_work(vha, fcport);
1449 break;
1450
cd4ed6b4
QT		 1451 case DSC_UPD_FCPORT:
1452 sec = jiffies_to_msecs(jiffies -
1453 fcport->jiffies_at_registration)/1000;
1454 if (fcport->sec_since_registration < sec && sec &&
1455 !(sec % 60)) {
1456 fcport->sec_since_registration = sec;
1457 ql_dbg(ql_dbg_disc, fcport->vha, 0xffff,
1458 "%s %8phC - Slow Rport registration(%d Sec)\n",
1459 __func__, fcport->port_name, sec);
1460 }
1461
1462 if (fcport->next_disc_state != DSC_DELETE_PEND)
1463 fcport->next_disc_state = DSC_ADISC;
1464 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
1465 break;
1466
726b8548
QT		 1467 default:
1468 break;
1469 }
1470
1471 return 0;
1472}
1473
1474static
1475void qla24xx_handle_rscn_event(fc_port_t *fcport, struct event_arg *ea)
1476{
1477 fcport->rscn_gen++;
1478
83548fe2
QT		 1479 ql_dbg(ql_dbg_disc, fcport->vha, 0x210c,
1480 "%s %8phC DS %d LS %d\n",
1481 __func__, fcport->port_name, fcport->disc_state,
1482 fcport->fw_login_state);
726b8548
QT		 1483
1484 if (fcport->flags & FCF_ASYNC_SENT)
1485 return;
1486
1487 switch (fcport->disc_state) {
1488 case DSC_DELETED:
1489 case DSC_LOGIN_COMPLETE:
5ef696aa 1490 qla24xx_post_gpnid_work(fcport->vha, &ea->id);
726b8548 1491 break;
726b8548
QT		 1492 default:
1493 break;
1494 }
1495}
1496
1497int qla24xx_post_newsess_work(struct scsi_qla_host *vha, port_id_t *id,
a4239945 1498 u8 *port_name, u8 *node_name, void *pla, u8 fc4_type)
726b8548
QT		 1499{
1500 struct qla_work_evt *e;
1501 e = qla2x00_alloc_work(vha, QLA_EVT_NEW_SESS);
1502 if (!e)
1503 return QLA_FUNCTION_FAILED;
1504
1505 e->u.new_sess.id = *id;
1506 e->u.new_sess.pla = pla;
a4239945 1507 e->u.new_sess.fc4_type = fc4_type;
726b8548 1508 memcpy(e->u.new_sess.port_name, port_name, WWN_SIZE);
a4239945
QT		 1509 if (node_name)
1510 memcpy(e->u.new_sess.node_name, node_name, WWN_SIZE);
726b8548
QT		 1511
1512 return qla2x00_post_work(vha, e);
1513}
1514
726b8548
QT		 1515static
1516void qla24xx_handle_relogin_event(scsi_qla_host_t *vha,
1517 struct event_arg *ea)
1518{
1519 fc_port_t *fcport = ea->fcport;
1520
83548fe2
QT		 1521 ql_dbg(ql_dbg_disc, vha, 0x2102,
1522 "%s %8phC DS %d LS %d P %d del %d cnfl %p rscn %d|%d login %d|%d fl %x\n",
1523 __func__, fcport->port_name, fcport->disc_state,
1524 fcport->fw_login_state, fcport->login_pause,
1525 fcport->deleted, fcport->conflict,
1526 fcport->last_rscn_gen, fcport->rscn_gen,
1527 fcport->last_login_gen, fcport->login_gen,
1528 fcport->flags);
726b8548
QT		 1529
1530 if ((fcport->fw_login_state == DSC_LS_PLOGI_PEND) ||
726b8548
QT		 1531 (fcport->fw_login_state == DSC_LS_PRLI_PEND))
1532 return;
1533
5b33469a 1534 if (fcport->fw_login_state == DSC_LS_PLOGI_COMP) {
9cd883f0
QT		 1535 if (time_before_eq(jiffies, fcport->plogi_nack_done_deadline)) {
1536 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
5b33469a 1537 return;
9cd883f0 1538 }
5b33469a
QT		 1539 }
1540
726b8548 1541 if (fcport->last_rscn_gen != fcport->rscn_gen) {
83548fe2 1542 ql_dbg(ql_dbg_disc, vha, 0x20e9, "%s %d %8phC post gidpn\n",
726b8548
QT		 1543 __func__, __LINE__, fcport->port_name);
1544
726b8548
QT		 1545 return;
1546 }
1547
1548 qla24xx_fcport_handle_login(vha, fcport);
1549}
1550
8777e431 1551
8f9a2148
BVA		 1552static void qla_handle_els_plogi_done(scsi_qla_host_t *vha,
1553 struct event_arg *ea)
8777e431
QT		 1554{
1555 ql_dbg(ql_dbg_disc, vha, 0x2118,
1556 "%s %d %8phC post PRLI\n",
1557 __func__, __LINE__, ea->fcport->port_name);
1558 qla24xx_post_prli_work(vha, ea->fcport);
1559}
1560
41dc529a 1561void qla2x00_fcport_event_handler(scsi_qla_host_t *vha, struct event_arg *ea)
726b8548 1562{
f352eeb7 1563 fc_port_t *f, *tf;
41dc529a 1564 uint32_t id = 0, mask, rid;
bee8b846 1565 fc_port_t *fcport;
726b8548
QT		 1566
1567 switch (ea->event) {
1568 case FCME_RELOGIN:
1569 if (test_bit(UNLOADING, &vha->dpc_flags))
1570 return;
5ff1d584 1571
726b8548
QT		 1572 qla24xx_handle_relogin_event(vha, ea);
1573 break;
1574 case FCME_RSCN:
1575 if (test_bit(UNLOADING, &vha->dpc_flags))
1576 return;
41dc529a
QT		 1577 switch (ea->id.b.rsvd_1) {
1578 case RSCN_PORT_ADDR:
d4f7a16a
HM		 1579#define BIGSCAN 1
1580#if defined BIGSCAN & BIGSCAN > 0
1581 {
1582 unsigned long flags;
bee8b846
QT		 1583 fcport = qla2x00_find_fcport_by_nportid
1584 (vha, &ea->id, 1);
cd4ed6b4 1585 if (fcport) {
cb873ba4 1586 fcport->scan_needed = 1;
cd4ed6b4
QT		 1587 fcport->rscn_gen++;
1588 }
bee8b846 1589
f352eeb7
QT		 1590 spin_lock_irqsave(&vha->work_lock, flags);
1591 if (vha->scan.scan_flags == 0) {
1592 ql_dbg(ql_dbg_disc, vha, 0xffff,
1593 "%s: schedule\n", __func__);
1594 vha->scan.scan_flags |= SF_QUEUED;
1595 schedule_delayed_work(&vha->scan.scan_work, 5);
41dc529a 1596 }
f352eeb7 1597 spin_unlock_irqrestore(&vha->work_lock, flags);
d4f7a16a
HM		 1598 }
1599#else
1600 {
1601 int rc;
1602 fcport = qla2x00_find_fcport_by_nportid(vha, &ea->id, 1);
1603 if (!fcport) {
1604 /* cable moved */
1605 rc = qla24xx_post_gpnid_work(vha, &ea->id);
1606 if (rc) {
1607 ql_log(ql_log_warn, vha, 0xd044,
1608 "RSCN GPNID work failed %06x\n",
1609 ea->id.b24);
1610 }
1611 } else {
1612 ea->fcport = fcport;
1613 fcport->scan_needed = 1;
1614 qla24xx_handle_rscn_event(fcport, ea);
1615 }
1616 }
1617#endif
41dc529a
QT		 1618 break;
1619 case RSCN_AREA_ADDR:
1620 case RSCN_DOM_ADDR:
1621 if (ea->id.b.rsvd_1 == RSCN_AREA_ADDR) {
1622 mask = 0xffff00;
83548fe2
QT		 1623 ql_dbg(ql_dbg_async, vha, 0x5044,
1624 "RSCN: Area 0x%06x was affected\n",
1625 ea->id.b24);
41dc529a
QT		 1626 } else {
1627 mask = 0xff0000;
83548fe2
QT		 1628 ql_dbg(ql_dbg_async, vha, 0x507a,
1629 "RSCN: Domain 0x%06x was affected\n",
1630 ea->id.b24);
41dc529a 1631 }
726b8548 1632
41dc529a
QT		 1633 rid = ea->id.b24 & mask;
1634 list_for_each_entry_safe(f, tf, &vha->vp_fcports,
1635 list) {
1636 id = f->d_id.b24 & mask;
1637 if (rid == id) {
1638 ea->fcport = f;
1639 qla24xx_handle_rscn_event(f, ea);
1640 }
726b8548 1641 }
41dc529a
QT		 1642 break;
1643 case RSCN_FAB_ADDR:
1644 default:
83548fe2
QT		 1645 ql_log(ql_log_warn, vha, 0xd045,
1646 "RSCN: Fabric was affected. Addr format %d\n",
1647 ea->id.b.rsvd_1);
41dc529a
QT		 1648 qla2x00_mark_all_devices_lost(vha, 1);
1649 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
1650 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
726b8548
QT		 1651 }
1652 break;
726b8548
QT		 1653 case FCME_GNL_DONE:
1654 qla24xx_handle_gnl_done_event(vha, ea);
1655 break;
1656 case FCME_GPSC_DONE:
a4239945 1657 qla24xx_handle_gpsc_event(vha, ea);
726b8548
QT		 1658 break;
1659 case FCME_PLOGI_DONE: /* Initiator side sent LLIOCB */
1660 qla24xx_handle_plogi_done_event(vha, ea);
1661 break;
a5d42f4c
DG		 1662 case FCME_PRLI_DONE:
1663 qla24xx_handle_prli_done_event(vha, ea);
1664 break;
726b8548
QT		 1665 case FCME_GPDB_DONE:
1666 qla24xx_handle_gpdb_event(vha, ea);
1667 break;
1668 case FCME_GPNID_DONE:
1669 qla24xx_handle_gpnid_event(vha, ea);
1670 break;
d3bae931
DG		 1671 case FCME_GFFID_DONE:
1672 qla24xx_handle_gffid_event(vha, ea);
1673 break;
f13515ac
QT		 1674 case FCME_ADISC_DONE:
1675 qla24xx_handle_adisc_event(vha, ea);
1676 break;
a4239945
QT		 1677 case FCME_GNNID_DONE:
1678 qla24xx_handle_gnnid_event(vha, ea);
1679 break;
1680 case FCME_GFPNID_DONE:
1681 qla24xx_handle_gfpnid_event(vha, ea);
1682 break;
8777e431
QT		 1683 case FCME_ELS_PLOGI_DONE:
1684 qla_handle_els_plogi_done(vha, ea);
1685 break;
726b8548
QT		 1686 default:
1687 BUG_ON(1);
1688 break;
1689 }
5ff1d584
AV		 1690}
1691
d4f7a16a
HM		 1692/*
1693 * RSCN(s) came in for this fcport, but the RSCN(s) was not able
1694 * to be consumed by the fcport
1695 */
1696void qla_rscn_replay(fc_port_t *fcport)
1697{
1698 struct event_arg ea;
1699
1700 switch (fcport->disc_state) {
1701 case DSC_DELETE_PEND:
1702 return;
1703 default:
1704 break;
1705 }
1706
1707 if (fcport->scan_needed) {
1708 memset(&ea, 0, sizeof(ea));
1709 ea.event = FCME_RSCN;
1710 ea.id = fcport->d_id;
1711 ea.id.b.rsvd_1 = RSCN_PORT_ADDR;
1712#if defined BIGSCAN & BIGSCAN > 0
1713 qla2x00_fcport_event_handler(fcport->vha, &ea);
1714#else
1715 qla24xx_post_gpnid_work(fcport->vha, &ea.id);
1716#endif
861d483d 1717 }
d4f7a16a
HM		 1718}
1719
3822263e 1720static void
faef62d1 1721qla2x00_tmf_iocb_timeout(void *data)
3822263e 1722{
25ff6af1 1723 srb_t *sp = data;
faef62d1 1724 struct srb_iocb *tmf = &sp->u.iocb_cmd;
3822263e 1725
faef62d1
AB		 1726 tmf->u.tmf.comp_status = CS_TIMEOUT;
1727 complete(&tmf->u.tmf.comp);
1728}
9ba56b95 1729
faef62d1 1730static void
25ff6af1 1731qla2x00_tmf_sp_done(void *ptr, int res)
faef62d1 1732{
25ff6af1 1733 srb_t *sp = ptr;
faef62d1 1734 struct srb_iocb *tmf = &sp->u.iocb_cmd;
25ff6af1 1735
faef62d1 1736 complete(&tmf->u.tmf.comp);
3822263e
MI		 1737}
1738
1739int
faef62d1 1740qla2x00_async_tm_cmd(fc_port_t *fcport, uint32_t flags, uint32_t lun,
3822263e
MI		 1741 uint32_t tag)
1742{
1743 struct scsi_qla_host *vha = fcport->vha;
faef62d1 1744 struct srb_iocb *tm_iocb;
3822263e 1745 srb_t *sp;
faef62d1 1746 int rval = QLA_FUNCTION_FAILED;
3822263e 1747
9ba56b95 1748 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
3822263e
MI		 1749 if (!sp)
1750 goto done;
1751
faef62d1 1752 tm_iocb = &sp->u.iocb_cmd;
9ba56b95
GM		 1753 sp->type = SRB_TM_CMD;
1754 sp->name = "tmf";
e74e7d95
BH		 1755
1756 tm_iocb->timeout = qla2x00_tmf_iocb_timeout;
1757 init_completion(&tm_iocb->u.tmf.comp);
faef62d1 1758 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha));
e74e7d95 1759
faef62d1
AB		 1760 tm_iocb->u.tmf.flags = flags;
1761 tm_iocb->u.tmf.lun = lun;
1762 tm_iocb->u.tmf.data = tag;
1763 sp->done = qla2x00_tmf_sp_done;
3822263e 1764
7c3df132 1765 ql_dbg(ql_dbg_taskm, vha, 0x802f,
cfb0919c
CD		 1766 "Async-tmf hdl=%x loop-id=%x portid=%02x%02x%02x.\n",
1767 sp->handle, fcport->loop_id, fcport->d_id.b.domain,
1768 fcport->d_id.b.area, fcport->d_id.b.al_pa);
faef62d1 1769
9fe278f4
GM		 1770 rval = qla2x00_start_sp(sp);
1771 if (rval != QLA_SUCCESS)
1772 goto done_free_sp;
faef62d1
AB		 1773 wait_for_completion(&tm_iocb->u.tmf.comp);
1774
b4146c49 1775 rval = tm_iocb->u.tmf.data;
faef62d1 1776
b4146c49
AG		 1777 if (rval != QLA_SUCCESS) {
1778 ql_log(ql_log_warn, vha, 0x8030,
faef62d1
AB		 1779 "TM IOCB failed (%x).\n", rval);
1780 }
1781
1782 if (!test_bit(UNLOADING, &vha->dpc_flags) && !IS_QLAFX00(vha->hw)) {
1783 flags = tm_iocb->u.tmf.flags;
1784 lun = (uint16_t)tm_iocb->u.tmf.lun;
1785
1786 /* Issue Marker IOCB */
1787 qla2x00_marker(vha, vha->hw->req_q_map[0],
1788 vha->hw->rsp_q_map[0], sp->fcport->loop_id, lun,
1789 flags == TCF_LUN_RESET ? MK_SYNC_ID_LUN : MK_SYNC_ID);
1790 }
3822263e
MI		 1791
1792done_free_sp:
25ff6af1 1793 sp->free(sp);
6d674927 1794 sp->fcport->flags &= ~FCF_ASYNC_SENT;
3822263e
MI		 1795done:
1796 return rval;
1797}
1798
4440e46d
AB		 1799static void
1800qla24xx_abort_iocb_timeout(void *data)
1801{
25ff6af1 1802 srb_t *sp = data;
4440e46d
AB		 1803 struct srb_iocb *abt = &sp->u.iocb_cmd;
1804
1805 abt->u.abt.comp_status = CS_TIMEOUT;
f6145e86 1806 sp->done(sp, QLA_FUNCTION_TIMEOUT);
4440e46d
AB		 1807}
1808
1809static void
25ff6af1 1810qla24xx_abort_sp_done(void *ptr, int res)
4440e46d 1811{
25ff6af1 1812 srb_t *sp = ptr;
4440e46d
AB		 1813 struct srb_iocb *abt = &sp->u.iocb_cmd;
1814
f6145e86
QT		 1815 if (del_timer(&sp->u.iocb_cmd.timer)) {
1816 if (sp->flags & SRB_WAKEUP_ON_COMP)
1817 complete(&abt->u.abt.comp);
1818 else
1819 sp->free(sp);
1820 }
4440e46d
AB		 1821}
1822
15f30a57 1823int
f6145e86 1824qla24xx_async_abort_cmd(srb_t *cmd_sp, bool wait)
4440e46d 1825{
25ff6af1 1826 scsi_qla_host_t *vha = cmd_sp->vha;
4440e46d
AB		 1827 struct srb_iocb *abt_iocb;
1828 srb_t *sp;
1829 int rval = QLA_FUNCTION_FAILED;
1830
6a629468
QT		 1831 sp = qla2xxx_get_qpair_sp(cmd_sp->vha, cmd_sp->qpair, cmd_sp->fcport,
1832 GFP_KERNEL);
4440e46d
AB		 1833 if (!sp)
1834 goto done;
1835
1836 abt_iocb = &sp->u.iocb_cmd;
1837 sp->type = SRB_ABT_CMD;
1838 sp->name = "abort";
49cecca7 1839 sp->qpair = cmd_sp->qpair;
f6145e86
QT		 1840 if (wait)
1841 sp->flags = SRB_WAKEUP_ON_COMP;
e74e7d95
BH		 1842
1843 abt_iocb->timeout = qla24xx_abort_iocb_timeout;
1844 init_completion(&abt_iocb->u.abt.comp);
8bccfe0d
QT		 1845 /* FW can send 2 x ABTS's timeout/20s */
1846 qla2x00_init_timer(sp, 42);
e74e7d95 1847
4440e46d 1848 abt_iocb->u.abt.cmd_hndl = cmd_sp->handle;
49cecca7 1849 abt_iocb->u.abt.req_que_no = cpu_to_le16(cmd_sp->qpair->req->id);
b027a5ac 1850
4440e46d 1851 sp->done = qla24xx_abort_sp_done;
4440e46d 1852
4440e46d 1853 ql_dbg(ql_dbg_async, vha, 0x507c,
49cecca7
QT		 1854 "Abort command issued - hdl=%x, type=%x\n",
1855 cmd_sp->handle, cmd_sp->type);
4440e46d 1856
9fe278f4
GM		 1857 rval = qla2x00_start_sp(sp);
1858 if (rval != QLA_SUCCESS)
1859 goto done_free_sp;
1860
f6145e86
QT		 1861 if (wait) {
1862 wait_for_completion(&abt_iocb->u.abt.comp);
1863 rval = abt_iocb->u.abt.comp_status == CS_COMPLETE ?
1864 QLA_SUCCESS : QLA_FUNCTION_FAILED;
8235f4b5
QT		 1865 } else {
1866 goto done;
f6145e86 1867 }
4440e46d
AB		 1868
1869done_free_sp:
25ff6af1 1870 sp->free(sp);
4440e46d
AB		 1871done:
1872 return rval;
1873}
1874
1875int
1876qla24xx_async_abort_command(srb_t *sp)
1877{
1878 unsigned long flags = 0;
1879
1880 uint32_t handle;
1881 fc_port_t *fcport = sp->fcport;
585def9b 1882 struct qla_qpair *qpair = sp->qpair;
4440e46d 1883 struct scsi_qla_host *vha = fcport->vha;
585def9b 1884 struct req_que *req = qpair->req;
b027a5ac 1885
585def9b 1886 spin_lock_irqsave(qpair->qp_lock_ptr, flags);
4440e46d
AB		 1887 for (handle = 1; handle < req->num_outstanding_cmds; handle++) {
1888 if (req->outstanding_cmds[handle] == sp)
1889 break;
1890 }
585def9b
QT		 1891 spin_unlock_irqrestore(qpair->qp_lock_ptr, flags);
1892
4440e46d
AB		 1893 if (handle == req->num_outstanding_cmds) {
1894 /* Command not found. */
1895 return QLA_FUNCTION_FAILED;
1896 }
1897 if (sp->type == SRB_FXIOCB_DCMD)
1898 return qlafx00_fx_disc(vha, &vha->hw->mr.fcport,
1899 FXDISC_ABORT_IOCTL);
1900
f6145e86 1901 return qla24xx_async_abort_cmd(sp, true);
4440e46d
AB		 1902}
1903
a5d42f4c
DG		 1904static void
1905qla24xx_handle_prli_done_event(struct scsi_qla_host *vha, struct event_arg *ea)
1906{
1907 switch (ea->data[0]) {
1908 case MBS_COMMAND_COMPLETE:
1909 ql_dbg(ql_dbg_disc, vha, 0x2118,
1910 "%s %d %8phC post gpdb\n",
1911 __func__, __LINE__, ea->fcport->port_name);
1912
1913 ea->fcport->chip_reset = vha->hw->base_qpair->chip_reset;
1914 ea->fcport->logout_on_delete = 1;
1915 qla24xx_post_gpdb_work(vha, ea->fcport, 0);
1916 break;
1917 default:
1cbc0efc
DT		 1918 if ((ea->iop[0] == LSC_SCODE_ELS_REJECT) &&
1919 (ea->iop[1] == 0x50000)) { /* reson 5=busy expl:0x0 */
1920 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
1921 ea->fcport->fw_login_state = DSC_LS_PLOGI_COMP;
1922 break;
1923 }
1924
edd05de1
DG		 1925 if (ea->fcport->n2n_flag) {
1926 ql_dbg(ql_dbg_disc, vha, 0x2118,
1927 "%s %d %8phC post fc4 prli\n",
1928 __func__, __LINE__, ea->fcport->port_name);
1929 ea->fcport->fc4f_nvme = 0;
1930 ea->fcport->n2n_flag = 0;
1931 qla24xx_post_prli_work(vha, ea->fcport);
1932 }
a5d42f4c
DG		 1933 ql_dbg(ql_dbg_disc, vha, 0x2119,
1934 "%s %d %8phC unhandle event of %x\n",
1935 __func__, __LINE__, ea->fcport->port_name, ea->data[0]);
1936 break;
1937 }
1938}
1939
726b8548
QT		 1940static void
1941qla24xx_handle_plogi_done_event(struct scsi_qla_host *vha, struct event_arg *ea)
ac280b67 1942{
726b8548 1943 port_id_t cid; /* conflict Nport id */
a084fd68
QT		 1944 u16 lid;
1945 struct fc_port *conflict_fcport;
82abdcaf 1946 unsigned long flags;
a4239945
QT		 1947 struct fc_port *fcport = ea->fcport;
1948
f352eeb7
QT		 1949 ql_dbg(ql_dbg_disc, vha, 0xffff,
1950 "%s %8phC DS %d LS %d rc %d login %d|%d rscn %d|%d data %x|%x iop %x|%x\n",
1951 __func__, fcport->port_name, fcport->disc_state,
1952 fcport->fw_login_state, ea->rc, ea->sp->gen2, fcport->login_gen,
861d483d 1953 ea->sp->gen1, fcport->rscn_gen,
f352eeb7
QT		 1954 ea->data[0], ea->data[1], ea->iop[0], ea->iop[1]);
1955
a4239945
QT		 1956 if ((fcport->fw_login_state == DSC_LS_PLOGI_PEND) ||
1957 (fcport->fw_login_state == DSC_LS_PRLI_PEND)) {
1958 ql_dbg(ql_dbg_disc, vha, 0x20ea,
1959 "%s %d %8phC Remote is trying to login\n",
1960 __func__, __LINE__, fcport->port_name);
1961 return;
1962 }
1963
1964 if (fcport->disc_state == DSC_DELETE_PEND)
1965 return;
1966
1967 if (ea->sp->gen2 != fcport->login_gen) {
1968 /* target side must have changed it. */
1969 ql_dbg(ql_dbg_disc, vha, 0x20d3,
f352eeb7
QT		 1970 "%s %8phC generation changed\n",
1971 __func__, fcport->port_name);
1972 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
a4239945
QT		 1973 return;
1974 } else if (ea->sp->gen1 != fcport->rscn_gen) {
861d483d
QT		 1975 ql_dbg(ql_dbg_disc, vha, 0x20d3,
1976 "%s %8phC RSCN generation changed\n",
1977 __func__, fcport->port_name);
d4f7a16a 1978 qla_rscn_replay(fcport);
861d483d 1979 qlt_schedule_sess_for_deletion(fcport);
a4239945
QT		 1980 return;
1981 }
ac280b67 1982
726b8548 1983 switch (ea->data[0]) {
ac280b67 1984 case MBS_COMMAND_COMPLETE:
a4f92a32
AV		 1985 /*
1986 * Driver must validate login state - If PRLI not complete,
1987 * force a relogin attempt via implicit LOGO, PLOGI, and PRLI
1988 * requests.
1989 */
a5d42f4c
DG		 1990 if (ea->fcport->fc4f_nvme) {
1991 ql_dbg(ql_dbg_disc, vha, 0x2117,
1992 "%s %d %8phC post prli\n",
1993 __func__, __LINE__, ea->fcport->port_name);
1994 qla24xx_post_prli_work(vha, ea->fcport);
1995 } else {
1996 ql_dbg(ql_dbg_disc, vha, 0x20ea,
a084fd68
QT		 1997 "%s %d %8phC LoopID 0x%x in use with %06x. post gnl\n",
1998 __func__, __LINE__, ea->fcport->port_name,
1999 ea->fcport->loop_id, ea->fcport->d_id.b24);
2000
2001 set_bit(ea->fcport->loop_id, vha->hw->loop_id_map);
82abdcaf 2002 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
a5d42f4c
DG		 2003 ea->fcport->chip_reset = vha->hw->base_qpair->chip_reset;
2004 ea->fcport->logout_on_delete = 1;
3515832c 2005 ea->fcport->send_els_logo = 0;
82abdcaf
QT		 2006 ea->fcport->fw_login_state = DSC_LS_PRLI_COMP;
2007 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
2008
a5d42f4c
DG		 2009 qla24xx_post_gpdb_work(vha, ea->fcport, 0);
2010 }
ac280b67
AV		 2011 break;
2012 case MBS_COMMAND_ERROR:
83548fe2 2013 ql_dbg(ql_dbg_disc, vha, 0x20eb, "%s %d %8phC cmd error %x\n",
726b8548
QT		 2014 __func__, __LINE__, ea->fcport->port_name, ea->data[1]);
2015
2016 ea->fcport->flags &= ~FCF_ASYNC_SENT;
2017 ea->fcport->disc_state = DSC_LOGIN_FAILED;
2018 if (ea->data[1] & QLA_LOGIO_LOGIN_RETRIED)
ac280b67
AV		 2019 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
2020 else
726b8548 2021 qla2x00_mark_device_lost(vha, ea->fcport, 1, 0);
ac280b67
AV		 2022 break;
2023 case MBS_LOOP_ID_USED:
726b8548
QT		 2024 /* data[1] = IO PARAM 1 = nport ID */
2025 cid.b.domain = (ea->iop[1] >> 16) & 0xff;
2026 cid.b.area = (ea->iop[1] >> 8) & 0xff;
2027 cid.b.al_pa = ea->iop[1] & 0xff;
2028 cid.b.rsvd_1 = 0;
2029
83548fe2 2030 ql_dbg(ql_dbg_disc, vha, 0x20ec,
5c640053 2031 "%s %d %8phC lid %#x in use with pid %06x post gnl\n",
83548fe2 2032 __func__, __LINE__, ea->fcport->port_name,
5c640053 2033 ea->fcport->loop_id, cid.b24);
726b8548 2034
5c640053
QT		 2035 set_bit(ea->fcport->loop_id, vha->hw->loop_id_map);
2036 ea->fcport->loop_id = FC_NO_LOOP_ID;
726b8548
QT		 2037 qla24xx_post_gnl_work(vha, ea->fcport);
2038 break;
2039 case MBS_PORT_ID_USED:
a084fd68
QT		 2040 lid = ea->iop[1] & 0xffff;
2041 qlt_find_sess_invalidate_other(vha,
2042 wwn_to_u64(ea->fcport->port_name),
2043 ea->fcport->d_id, lid, &conflict_fcport);
2044
2045 if (conflict_fcport) {
2046 /*
2047 * Another fcport share the same loop_id/nport id.
2048 * Conflict fcport needs to finish cleanup before this
2049 * fcport can proceed to login.
2050 */
2051 conflict_fcport->conflict = ea->fcport;
2052 ea->fcport->login_pause = 1;
2053
2054 ql_dbg(ql_dbg_disc, vha, 0x20ed,
2055 "%s %d %8phC NPortId %06x inuse with loopid 0x%x. post gidpn\n",
2056 __func__, __LINE__, ea->fcport->port_name,
2057 ea->fcport->d_id.b24, lid);
a084fd68
QT		 2058 } else {
2059 ql_dbg(ql_dbg_disc, vha, 0x20ed,
2060 "%s %d %8phC NPortId %06x inuse with loopid 0x%x. sched delete\n",
2061 __func__, __LINE__, ea->fcport->port_name,
2062 ea->fcport->d_id.b24, lid);
2063
2064 qla2x00_clear_loop_id(ea->fcport);
2065 set_bit(lid, vha->hw->loop_id_map);
2066 ea->fcport->loop_id = lid;
2067 ea->fcport->keep_nport_handle = 0;
94cff6e1 2068 qlt_schedule_sess_for_deletion(ea->fcport);
a084fd68 2069 }
ac280b67
AV		 2070 break;
2071 }
4916392b 2072 return;
ac280b67
AV		 2073}
2074
4916392b 2075void
ac280b67
AV		 2076qla2x00_async_logout_done(struct scsi_qla_host *vha, fc_port_t *fcport,
2077 uint16_t *data)
2078{
a6ca8878 2079 qlt_logo_completion_handler(fcport, data[0]);
726b8548 2080 fcport->login_gen++;
fa83e658 2081 fcport->flags &= ~FCF_ASYNC_ACTIVE;
4916392b 2082 return;
ac280b67
AV		 2083}
2084
1da177e4
LT		 2085/****************************************************************************/
2086/* QLogic ISP2x00 Hardware Support Functions. */
2087/****************************************************************************/
2088
fa492630 2089static int
7d613ac6
SV		 2090qla83xx_nic_core_fw_load(scsi_qla_host_t *vha)
2091{
2092 int rval = QLA_SUCCESS;
2093 struct qla_hw_data *ha = vha->hw;
2094 uint32_t idc_major_ver, idc_minor_ver;
711aa7f7 2095 uint16_t config[4];
7d613ac6
SV		 2096
2097 qla83xx_idc_lock(vha, 0);
2098
2099 /* SV: TODO: Assign initialization timeout from
2100 * flash-info / other param
2101 */
2102 ha->fcoe_dev_init_timeout = QLA83XX_IDC_INITIALIZATION_TIMEOUT;
2103 ha->fcoe_reset_timeout = QLA83XX_IDC_RESET_ACK_TIMEOUT;
2104
2105 /* Set our fcoe function presence */
2106 if (__qla83xx_set_drv_presence(vha) != QLA_SUCCESS) {
2107 ql_dbg(ql_dbg_p3p, vha, 0xb077,
2108 "Error while setting DRV-Presence.\n");
2109 rval = QLA_FUNCTION_FAILED;
2110 goto exit;
2111 }
2112
2113 /* Decide the reset ownership */
2114 qla83xx_reset_ownership(vha);
2115
2116 /*
2117 * On first protocol driver load:
2118 * Init-Owner: Set IDC-Major-Version and Clear IDC-Lock-Recovery
2119 * register.
2120 * Others: Check compatibility with current IDC Major version.
2121 */
2122 qla83xx_rd_reg(vha, QLA83XX_IDC_MAJOR_VERSION, &idc_major_ver);
2123 if (ha->flags.nic_core_reset_owner) {
2124 /* Set IDC Major version */
2125 idc_major_ver = QLA83XX_SUPP_IDC_MAJOR_VERSION;
2126 qla83xx_wr_reg(vha, QLA83XX_IDC_MAJOR_VERSION, idc_major_ver);
2127
2128 /* Clearing IDC-Lock-Recovery register */
2129 qla83xx_wr_reg(vha, QLA83XX_IDC_LOCK_RECOVERY, 0);
2130 } else if (idc_major_ver != QLA83XX_SUPP_IDC_MAJOR_VERSION) {
2131 /*
2132 * Clear further IDC participation if we are not compatible with
2133 * the current IDC Major Version.
2134 */
2135 ql_log(ql_log_warn, vha, 0xb07d,
2136 "Failing load, idc_major_ver=%d, expected_major_ver=%d.\n",
2137 idc_major_ver, QLA83XX_SUPP_IDC_MAJOR_VERSION);
2138 __qla83xx_clear_drv_presence(vha);
2139 rval = QLA_FUNCTION_FAILED;
2140 goto exit;
2141 }
2142 /* Each function sets its supported Minor version. */
2143 qla83xx_rd_reg(vha, QLA83XX_IDC_MINOR_VERSION, &idc_minor_ver);
2144 idc_minor_ver |= (QLA83XX_SUPP_IDC_MINOR_VERSION << (ha->portnum * 2));
2145 qla83xx_wr_reg(vha, QLA83XX_IDC_MINOR_VERSION, idc_minor_ver);
2146
711aa7f7
SK		 2147 if (ha->flags.nic_core_reset_owner) {
2148 memset(config, 0, sizeof(config));
2149 if (!qla81xx_get_port_config(vha, config))
2150 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE,
2151 QLA8XXX_DEV_READY);
2152 }
2153
7d613ac6
SV		 2154 rval = qla83xx_idc_state_handler(vha);
2155
2156exit:
2157 qla83xx_idc_unlock(vha, 0);
2158
2159 return rval;
2160}
2161
1da177e4
LT		 2162/*
2163* qla2x00_initialize_adapter
2164* Initialize board.
2165*
2166* Input:
2167* ha = adapter block pointer.
2168*
2169* Returns:
2170* 0 = success
2171*/
2172int
e315cd28 2173qla2x00_initialize_adapter(scsi_qla_host_t *vha)
1da177e4
LT		 2174{
2175 int rval;
e315cd28 2176 struct qla_hw_data *ha = vha->hw;
73208dfd 2177 struct req_que *req = ha->req_q_map[0];
2533cf67 2178
fc90adaf
JC		 2179 memset(&vha->qla_stats, 0, sizeof(vha->qla_stats));
2180 memset(&vha->fc_host_stat, 0, sizeof(vha->fc_host_stat));
2181
1da177e4 2182 /* Clear adapter flags. */
e315cd28 2183 vha->flags.online = 0;
2533cf67 2184 ha->flags.chip_reset_done = 0;
e315cd28 2185 vha->flags.reset_active = 0;
85880801
AV		 2186 ha->flags.pci_channel_io_perm_failure = 0;
2187 ha->flags.eeh_busy = 0;
fabbb8df 2188 vha->qla_stats.jiffies_at_last_reset = get_jiffies_64();
e315cd28
AC		 2189 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
2190 atomic_set(&vha->loop_state, LOOP_DOWN);
2191 vha->device_flags = DFLG_NO_CABLE;
2192 vha->dpc_flags = 0;
2193 vha->flags.management_server_logged_in = 0;
2194 vha->marker_needed = 0;
1da177e4
LT		 2195 ha->isp_abort_cnt = 0;
2196 ha->beacon_blink_led = 0;
2197
73208dfd
AC		 2198 set_bit(0, ha->req_qid_map);
2199 set_bit(0, ha->rsp_qid_map);
2200
cfb0919c 2201 ql_dbg(ql_dbg_init, vha, 0x0040,
7c3df132 2202 "Configuring PCI space...\n");
e315cd28 2203 rval = ha->isp_ops->pci_config(vha);
1da177e4 2204 if (rval) {
7c3df132
SK		 2205 ql_log(ql_log_warn, vha, 0x0044,
2206 "Unable to configure PCI space.\n");
1da177e4
LT		 2207 return (rval);
2208 }
2209
e315cd28 2210 ha->isp_ops->reset_chip(vha);
1da177e4 2211
e315cd28 2212 rval = qla2xxx_get_flash_info(vha);
c00d8994 2213 if (rval) {
7c3df132
SK		 2214 ql_log(ql_log_fatal, vha, 0x004f,
2215 "Unable to validate FLASH data.\n");
7ec0effd
AD		 2216 return rval;
2217 }
2218
2219 if (IS_QLA8044(ha)) {
2220 qla8044_read_reset_template(vha);
2221
2222 /* NOTE: If ql2xdontresethba==1, set IDC_CTRL DONTRESET_BIT0.
2223 * If DONRESET_BIT0 is set, drivers should not set dev_state
2224 * to NEED_RESET. But if NEED_RESET is set, drivers should
2225 * should honor the reset. */
2226 if (ql2xdontresethba == 1)
2227 qla8044_set_idc_dontreset(vha);
c00d8994
AV		 2228 }
2229
73208dfd 2230 ha->isp_ops->get_flash_version(vha, req->ring);
cfb0919c 2231 ql_dbg(ql_dbg_init, vha, 0x0061,
7c3df132 2232 "Configure NVRAM parameters...\n");
0107109e 2233
e315cd28 2234 ha->isp_ops->nvram_config(vha);
1da177e4 2235
d4c760c2
AV		 2236 if (ha->flags.disable_serdes) {
2237 /* Mask HBA via NVRAM settings? */
7c3df132 2238 ql_log(ql_log_info, vha, 0x0077,
7b833558 2239 "Masking HBA WWPN %8phN (via NVRAM).\n", vha->port_name);
d4c760c2
AV		 2240 return QLA_FUNCTION_FAILED;
2241 }
2242
cfb0919c 2243 ql_dbg(ql_dbg_init, vha, 0x0078,
7c3df132 2244 "Verifying loaded RISC code...\n");
1da177e4 2245
e315cd28
AC		 2246 if (qla2x00_isp_firmware(vha) != QLA_SUCCESS) {
2247 rval = ha->isp_ops->chip_diag(vha);
d19044c3
AV		 2248 if (rval)
2249 return (rval);
e315cd28 2250 rval = qla2x00_setup_chip(vha);
d19044c3
AV		 2251 if (rval)
2252 return (rval);
1da177e4 2253 }
a9083016 2254
4d4df193 2255 if (IS_QLA84XX(ha)) {
e315cd28 2256 ha->cs84xx = qla84xx_get_chip(vha);
4d4df193 2257 if (!ha->cs84xx) {
7c3df132 2258 ql_log(ql_log_warn, vha, 0x00d0,
4d4df193
HK		 2259 "Unable to configure ISP84XX.\n");
2260 return QLA_FUNCTION_FAILED;
2261 }
2262 }
2d70c103 2263
ead03855 2264 if (qla_ini_mode_enabled(vha) || qla_dual_mode_enabled(vha))
2d70c103
NB		 2265 rval = qla2x00_init_rings(vha);
2266
2533cf67 2267 ha->flags.chip_reset_done = 1;
1da177e4 2268
9a069e19 2269 if (rval == QLA_SUCCESS && IS_QLA84XX(ha)) {
6c452a45 2270 /* Issue verify 84xx FW IOCB to complete 84xx initialization */
9a069e19
GM		 2271 rval = qla84xx_init_chip(vha);
2272 if (rval != QLA_SUCCESS) {
7c3df132
SK		 2273 ql_log(ql_log_warn, vha, 0x00d4,
2274 "Unable to initialize ISP84XX.\n");
8d2b21db 2275 qla84xx_put_chip(vha);
9a069e19
GM		 2276 }
2277 }
2278
7d613ac6
SV		 2279 /* Load the NIC Core f/w if we are the first protocol driver. */
2280 if (IS_QLA8031(ha)) {
2281 rval = qla83xx_nic_core_fw_load(vha);
2282 if (rval)
2283 ql_log(ql_log_warn, vha, 0x0124,
2284 "Error in initializing NIC Core f/w.\n");
2285 }
2286
2f0f3f4f
MI		 2287 if (IS_QLA24XX_TYPE(ha) || IS_QLA25XX(ha))
2288 qla24xx_read_fcp_prio_cfg(vha);
09ff701a 2289
c46e65c7
JC		 2290 if (IS_P3P_TYPE(ha))
2291 qla82xx_set_driver_version(vha, QLA2XXX_VERSION);
2292 else
2293 qla25xx_set_driver_version(vha, QLA2XXX_VERSION);
2294
1da177e4
LT		 2295 return (rval);
2296}
2297
2298/**
abbd8870 2299 * qla2100_pci_config() - Setup ISP21xx PCI configuration registers.
2db6228d 2300 * @vha: HA context
1da177e4
LT		 2301 *
2302 * Returns 0 on success.
2303 */
abbd8870 2304int
e315cd28 2305qla2100_pci_config(scsi_qla_host_t *vha)
1da177e4 2306{
a157b101 2307 uint16_t w;
abbd8870 2308 unsigned long flags;
e315cd28 2309 struct qla_hw_data *ha = vha->hw;
3d71644c 2310 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1da177e4 2311
1da177e4 2312 pci_set_master(ha->pdev);
af6177d8 2313 pci_try_set_mwi(ha->pdev);
1da177e4 2314
1da177e4 2315 pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
a157b101 2316 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
abbd8870
AV		 2317 pci_write_config_word(ha->pdev, PCI_COMMAND, w);
2318
737faece 2319 pci_disable_rom(ha->pdev);
1da177e4
LT		 2320
2321 /* Get PCI bus information. */
2322 spin_lock_irqsave(&ha->hardware_lock, flags);
3d71644c 2323 ha->pci_attr = RD_REG_WORD(&reg->ctrl_status);
1da177e4
LT		 2324 spin_unlock_irqrestore(&ha->hardware_lock, flags);
2325
abbd8870
AV		 2326 return QLA_SUCCESS;
2327}
1da177e4 2328
abbd8870
AV		 2329/**
2330 * qla2300_pci_config() - Setup ISP23xx PCI configuration registers.
2db6228d 2331 * @vha: HA context
abbd8870
AV		 2332 *
2333 * Returns 0 on success.
2334 */
2335int
e315cd28 2336qla2300_pci_config(scsi_qla_host_t *vha)
abbd8870 2337{
a157b101 2338 uint16_t w;
abbd8870
AV		 2339 unsigned long flags = 0;
2340 uint32_t cnt;
e315cd28 2341 struct qla_hw_data *ha = vha->hw;
3d71644c 2342 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1da177e4 2343
abbd8870 2344 pci_set_master(ha->pdev);
af6177d8 2345 pci_try_set_mwi(ha->pdev);
1da177e4 2346
abbd8870 2347 pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
a157b101 2348 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
1da177e4 2349
abbd8870
AV		 2350 if (IS_QLA2322(ha) || IS_QLA6322(ha))
2351 w &= ~PCI_COMMAND_INTX_DISABLE;
a157b101 2352 pci_write_config_word(ha->pdev, PCI_COMMAND, w);
1da177e4 2353
abbd8870
AV		 2354 /*
2355 * If this is a 2300 card and not 2312, reset the
2356 * COMMAND_INVALIDATE due to a bug in the 2300. Unfortunately,
2357 * the 2310 also reports itself as a 2300 so we need to get the
2358 * fb revision level -- a 6 indicates it really is a 2300 and
2359 * not a 2310.
2360 */
2361 if (IS_QLA2300(ha)) {
2362 spin_lock_irqsave(&ha->hardware_lock, flags);
1da177e4 2363
abbd8870 2364 /* Pause RISC. */
3d71644c 2365 WRT_REG_WORD(&reg->hccr, HCCR_PAUSE_RISC);
abbd8870 2366 for (cnt = 0; cnt < 30000; cnt++) {
3d71644c 2367 if ((RD_REG_WORD(&reg->hccr) & HCCR_RISC_PAUSE) != 0)
abbd8870 2368 break;
1da177e4 2369
abbd8870
AV		 2370 udelay(10);
2371 }
1da177e4 2372
abbd8870 2373 /* Select FPM registers. */
3d71644c
AV		 2374 WRT_REG_WORD(&reg->ctrl_status, 0x20);
2375 RD_REG_WORD(&reg->ctrl_status);
abbd8870
AV		 2376
2377 /* Get the fb rev level */
3d71644c 2378 ha->fb_rev = RD_FB_CMD_REG(ha, reg);
abbd8870
AV		 2379
2380 if (ha->fb_rev == FPM_2300)
a157b101 2381 pci_clear_mwi(ha->pdev);
abbd8870
AV		 2382
2383 /* Deselect FPM registers. */
3d71644c
AV		 2384 WRT_REG_WORD(&reg->ctrl_status, 0x0);
2385 RD_REG_WORD(&reg->ctrl_status);
abbd8870
AV		 2386
2387 /* Release RISC module. */
3d71644c 2388 WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
abbd8870 2389 for (cnt = 0; cnt < 30000; cnt++) {
3d71644c 2390 if ((RD_REG_WORD(&reg->hccr) & HCCR_RISC_PAUSE) == 0)
abbd8870
AV		 2391 break;
2392
2393 udelay(10);
1da177e4 2394 }
1da177e4 2395
abbd8870
AV		 2396 spin_unlock_irqrestore(&ha->hardware_lock, flags);
2397 }
1da177e4 2398
abbd8870
AV		 2399 pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80);
2400
737faece 2401 pci_disable_rom(ha->pdev);
1da177e4 2402
abbd8870
AV		 2403 /* Get PCI bus information. */
2404 spin_lock_irqsave(&ha->hardware_lock, flags);
3d71644c 2405 ha->pci_attr = RD_REG_WORD(&reg->ctrl_status);
abbd8870
AV		 2406 spin_unlock_irqrestore(&ha->hardware_lock, flags);
2407
2408 return QLA_SUCCESS;
1da177e4
LT		 2409}
2410
0107109e
AV		 2411/**
2412 * qla24xx_pci_config() - Setup ISP24xx PCI configuration registers.
2db6228d 2413 * @vha: HA context
0107109e
AV		 2414 *
2415 * Returns 0 on success.
2416 */
2417int
e315cd28 2418qla24xx_pci_config(scsi_qla_host_t *vha)
0107109e 2419{
a157b101 2420 uint16_t w;
0107109e 2421 unsigned long flags = 0;
e315cd28 2422 struct qla_hw_data *ha = vha->hw;
0107109e 2423 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
0107109e
AV		 2424
2425 pci_set_master(ha->pdev);
af6177d8 2426 pci_try_set_mwi(ha->pdev);
0107109e
AV		 2427
2428 pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
a157b101 2429 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
0107109e
AV		 2430 w &= ~PCI_COMMAND_INTX_DISABLE;
2431 pci_write_config_word(ha->pdev, PCI_COMMAND, w);
2432
2433 pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80);
2434
2435 /* PCI-X -- adjust Maximum Memory Read Byte Count (2048). */
f85ec187
AV		 2436 if (pci_find_capability(ha->pdev, PCI_CAP_ID_PCIX))
2437 pcix_set_mmrbc(ha->pdev, 2048);
0107109e
AV		 2438
2439 /* PCIe -- adjust Maximum Read Request Size (2048). */
e67f1321 2440 if (pci_is_pcie(ha->pdev))
5ffd3a52 2441 pcie_set_readrq(ha->pdev, 4096);
0107109e 2442
737faece 2443 pci_disable_rom(ha->pdev);
0107109e 2444
44c10138 2445 ha->chip_revision = ha->pdev->revision;
a8488abe 2446
0107109e
AV		 2447 /* Get PCI bus information. */
2448 spin_lock_irqsave(&ha->hardware_lock, flags);
2449 ha->pci_attr = RD_REG_DWORD(&reg->ctrl_status);
2450 spin_unlock_irqrestore(&ha->hardware_lock, flags);
2451
2452 return QLA_SUCCESS;
2453}
2454
c3a2f0df
AV		 2455/**
2456 * qla25xx_pci_config() - Setup ISP25xx PCI configuration registers.
2db6228d 2457 * @vha: HA context
c3a2f0df
AV		 2458 *
2459 * Returns 0 on success.
2460 */
2461int
e315cd28 2462qla25xx_pci_config(scsi_qla_host_t *vha)
c3a2f0df
AV		 2463{
2464 uint16_t w;
e315cd28 2465 struct qla_hw_data *ha = vha->hw;
c3a2f0df
AV		 2466
2467 pci_set_master(ha->pdev);
2468 pci_try_set_mwi(ha->pdev);
2469
2470 pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
2471 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
2472 w &= ~PCI_COMMAND_INTX_DISABLE;
2473 pci_write_config_word(ha->pdev, PCI_COMMAND, w);
2474
2475 /* PCIe -- adjust Maximum Read Request Size (2048). */
e67f1321 2476 if (pci_is_pcie(ha->pdev))
5ffd3a52 2477 pcie_set_readrq(ha->pdev, 4096);
c3a2f0df 2478
737faece 2479 pci_disable_rom(ha->pdev);
c3a2f0df
AV		 2480
2481 ha->chip_revision = ha->pdev->revision;
2482
2483 return QLA_SUCCESS;
2484}
2485
1da177e4
LT		 2486/**
2487 * qla2x00_isp_firmware() - Choose firmware image.
2db6228d 2488 * @vha: HA context
1da177e4
LT		 2489 *
2490 * Returns 0 on success.
2491 */
2492static int
e315cd28 2493qla2x00_isp_firmware(scsi_qla_host_t *vha)
1da177e4
LT		 2494{
2495 int rval;
42e421b1
AV		 2496 uint16_t loop_id, topo, sw_cap;
2497 uint8_t domain, area, al_pa;
e315cd28 2498 struct qla_hw_data *ha = vha->hw;
1da177e4
LT		 2499
2500 /* Assume loading risc code */
fa2a1ce5 2501 rval = QLA_FUNCTION_FAILED;
1da177e4
LT		 2502
2503 if (ha->flags.disable_risc_code_load) {
7c3df132 2504 ql_log(ql_log_info, vha, 0x0079, "RISC CODE NOT loaded.\n");
1da177e4
LT		 2505
2506 /* Verify checksum of loaded RISC code. */
e315cd28 2507 rval = qla2x00_verify_checksum(vha, ha->fw_srisc_address);
42e421b1
AV		 2508 if (rval == QLA_SUCCESS) {
2509 /* And, verify we are not in ROM code. */
e315cd28 2510 rval = qla2x00_get_adapter_id(vha, &loop_id, &al_pa,
42e421b1
AV		 2511 &area, &domain, &topo, &sw_cap);
2512 }
1da177e4
LT		 2513 }
2514
7c3df132
SK		 2515 if (rval)
2516 ql_dbg(ql_dbg_init, vha, 0x007a,
2517 "**** Load RISC code ****.\n");
1da177e4
LT		 2518
2519 return (rval);
2520}
2521
2522/**
2523 * qla2x00_reset_chip() - Reset ISP chip.
2db6228d 2524 * @vha: HA context
1da177e4
LT		 2525 *
2526 * Returns 0 on success.
2527 */
abbd8870 2528void
e315cd28 2529qla2x00_reset_chip(scsi_qla_host_t *vha)
1da177e4
LT		 2530{
2531 unsigned long flags = 0;
e315cd28 2532 struct qla_hw_data *ha = vha->hw;
3d71644c 2533 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1da177e4 2534 uint32_t cnt;
1da177e4
LT		 2535 uint16_t cmd;
2536
85880801
AV		 2537 if (unlikely(pci_channel_offline(ha->pdev)))
2538 return;
2539
fd34f556 2540 ha->isp_ops->disable_intrs(ha);
1da177e4
LT		 2541
2542 spin_lock_irqsave(&ha->hardware_lock, flags);
2543
2544 /* Turn off master enable */
2545 cmd = 0;
2546 pci_read_config_word(ha->pdev, PCI_COMMAND, &cmd);
2547 cmd &= ~PCI_COMMAND_MASTER;
2548 pci_write_config_word(ha->pdev, PCI_COMMAND, cmd);
2549
2550 if (!IS_QLA2100(ha)) {
2551 /* Pause RISC. */
2552 WRT_REG_WORD(&reg->hccr, HCCR_PAUSE_RISC);
2553 if (IS_QLA2200(ha) || IS_QLA2300(ha)) {
2554 for (cnt = 0; cnt < 30000; cnt++) {
2555 if ((RD_REG_WORD(&reg->hccr) &
2556 HCCR_RISC_PAUSE) != 0)
2557 break;
2558 udelay(100);
2559 }
2560 } else {
2561 RD_REG_WORD(&reg->hccr); /* PCI Posting. */
2562 udelay(10);
2563 }
2564
2565 /* Select FPM registers. */
2566 WRT_REG_WORD(&reg->ctrl_status, 0x20);
2567 RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
2568
2569 /* FPM Soft Reset. */
2570 WRT_REG_WORD(&reg->fpm_diag_config, 0x100);
2571 RD_REG_WORD(&reg->fpm_diag_config); /* PCI Posting. */
2572
2573 /* Toggle Fpm Reset. */
2574 if (!IS_QLA2200(ha)) {
2575 WRT_REG_WORD(&reg->fpm_diag_config, 0x0);
2576 RD_REG_WORD(&reg->fpm_diag_config); /* PCI Posting. */
2577 }
2578
2579 /* Select frame buffer registers. */
2580 WRT_REG_WORD(&reg->ctrl_status, 0x10);
2581 RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
2582
2583 /* Reset frame buffer FIFOs. */
2584 if (IS_QLA2200(ha)) {
2585 WRT_FB_CMD_REG(ha, reg, 0xa000);
2586 RD_FB_CMD_REG(ha, reg); /* PCI Posting. */
2587 } else {
2588 WRT_FB_CMD_REG(ha, reg, 0x00fc);
2589
2590 /* Read back fb_cmd until zero or 3 seconds max */
2591 for (cnt = 0; cnt < 3000; cnt++) {
2592 if ((RD_FB_CMD_REG(ha, reg) & 0xff) == 0)
2593 break;
2594 udelay(100);
2595 }
2596 }
2597
2598 /* Select RISC module registers. */
2599 WRT_REG_WORD(&reg->ctrl_status, 0);
2600 RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
2601
2602 /* Reset RISC processor. */
2603 WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
2604 RD_REG_WORD(&reg->hccr); /* PCI Posting. */
2605
2606 /* Release RISC processor. */
2607 WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
2608 RD_REG_WORD(&reg->hccr); /* PCI Posting. */
2609 }
2610
2611 WRT_REG_WORD(&reg->hccr, HCCR_CLR_RISC_INT);
2612 WRT_REG_WORD(&reg->hccr, HCCR_CLR_HOST_INT);
2613
2614 /* Reset ISP chip. */
2615 WRT_REG_WORD(&reg->ctrl_status, CSR_ISP_SOFT_RESET);
2616
2617 /* Wait for RISC to recover from reset. */
2618 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
2619 /*
2620 * It is necessary to for a delay here since the card doesn't
2621 * respond to PCI reads during a reset. On some architectures
2622 * this will result in an MCA.
2623 */
2624 udelay(20);
2625 for (cnt = 30000; cnt; cnt--) {
2626 if ((RD_REG_WORD(&reg->ctrl_status) &
2627 CSR_ISP_SOFT_RESET) == 0)
2628 break;
2629 udelay(100);
2630 }
2631 } else
2632 udelay(10);
2633
2634 /* Reset RISC processor. */
2635 WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
2636
2637 WRT_REG_WORD(&reg->semaphore, 0);
2638
2639 /* Release RISC processor. */
2640 WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
2641 RD_REG_WORD(&reg->hccr); /* PCI Posting. */
2642
2643 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
2644 for (cnt = 0; cnt < 30000; cnt++) {
ffb39f03 2645 if (RD_MAILBOX_REG(ha, reg, 0) != MBS_BUSY)
1da177e4 2646 break;
1da177e4
LT		 2647
2648 udelay(100);
2649 }
2650 } else
2651 udelay(100);
2652
2653 /* Turn on master enable */
2654 cmd |= PCI_COMMAND_MASTER;
2655 pci_write_config_word(ha->pdev, PCI_COMMAND, cmd);
2656
2657 /* Disable RISC pause on FPM parity error. */
2658 if (!IS_QLA2100(ha)) {
2659 WRT_REG_WORD(&reg->hccr, HCCR_DISABLE_PARITY_PAUSE);
2660 RD_REG_WORD(&reg->hccr); /* PCI Posting. */
2661 }
2662
2663 spin_unlock_irqrestore(&ha->hardware_lock, flags);
2664}
2665
b1d46989
MI		 2666/**
2667 * qla81xx_reset_mpi() - Reset's MPI FW via Write MPI Register MBC.
2db6228d 2668 * @vha: HA context
b1d46989
MI		 2669 *
2670 * Returns 0 on success.
2671 */
fa492630 2672static int
b1d46989
MI		 2673qla81xx_reset_mpi(scsi_qla_host_t *vha)
2674{
2675 uint16_t mb[4] = {0x1010, 0, 1, 0};
2676
6246b8a1
GM		 2677 if (!IS_QLA81XX(vha->hw))
2678 return QLA_SUCCESS;
2679
b1d46989
MI		 2680 return qla81xx_write_mpi_register(vha, mb);
2681}
2682
0107109e 2683/**
88c26663 2684 * qla24xx_reset_risc() - Perform full reset of ISP24xx RISC.
2db6228d 2685 * @vha: HA context
0107109e
AV		 2686 *
2687 * Returns 0 on success.
2688 */
d14e72fb 2689static inline int
e315cd28 2690qla24xx_reset_risc(scsi_qla_host_t *vha)
0107109e
AV		 2691{
2692 unsigned long flags = 0;
e315cd28 2693 struct qla_hw_data *ha = vha->hw;
0107109e 2694 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
52c82823 2695 uint32_t cnt;
335a1cc9 2696 uint16_t wd;
b1d46989 2697 static int abts_cnt; /* ISP abort retry counts */
d14e72fb 2698 int rval = QLA_SUCCESS;
0107109e 2699
0107109e
AV		 2700 spin_lock_irqsave(&ha->hardware_lock, flags);
2701
2702 /* Reset RISC. */
2703 WRT_REG_DWORD(&reg->ctrl_status, CSRX_DMA_SHUTDOWN|MWB_4096_BYTES);
2704 for (cnt = 0; cnt < 30000; cnt++) {
2705 if ((RD_REG_DWORD(&reg->ctrl_status) & CSRX_DMA_ACTIVE) == 0)
2706 break;
2707
2708 udelay(10);
2709 }
2710
d14e72fb
HM		 2711 if (!(RD_REG_DWORD(&reg->ctrl_status) & CSRX_DMA_ACTIVE))
2712 set_bit(DMA_SHUTDOWN_CMPL, &ha->fw_dump_cap_flags);
2713
2714 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x017e,
2715 "HCCR: 0x%x, Control Status %x, DMA active status:0x%x\n",
2716 RD_REG_DWORD(&reg->hccr),
2717 RD_REG_DWORD(&reg->ctrl_status),
2718 (RD_REG_DWORD(&reg->ctrl_status) & CSRX_DMA_ACTIVE));
2719
0107109e
AV		 2720 WRT_REG_DWORD(&reg->ctrl_status,
2721 CSRX_ISP_SOFT_RESET|CSRX_DMA_SHUTDOWN|MWB_4096_BYTES);
335a1cc9 2722 pci_read_config_word(ha->pdev, PCI_COMMAND, &wd);
88c26663 2723
335a1cc9 2724 udelay(100);
d14e72fb 2725
88c26663 2726 /* Wait for firmware to complete NVRAM accesses. */
52c82823 2727 RD_REG_WORD(&reg->mailbox0);
d14e72fb
HM		 2728 for (cnt = 10000; RD_REG_WORD(&reg->mailbox0) != 0 &&
2729 rval == QLA_SUCCESS; cnt--) {
88c26663 2730 barrier();
d14e72fb
HM		 2731 if (cnt)
2732 udelay(5);
2733 else
2734 rval = QLA_FUNCTION_TIMEOUT;
88c26663
AV		 2735 }
2736
d14e72fb
HM		 2737 if (rval == QLA_SUCCESS)
2738 set_bit(ISP_MBX_RDY, &ha->fw_dump_cap_flags);
2739
2740 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x017f,
2741 "HCCR: 0x%x, MailBox0 Status 0x%x\n",
2742 RD_REG_DWORD(&reg->hccr),
2743 RD_REG_DWORD(&reg->mailbox0));
2744
335a1cc9 2745 /* Wait for soft-reset to complete. */
52c82823 2746 RD_REG_DWORD(&reg->ctrl_status);
200ffb15 2747 for (cnt = 0; cnt < 60; cnt++) {
0107109e 2748 barrier();
d14e72fb
HM		 2749 if ((RD_REG_DWORD(&reg->ctrl_status) &
2750 CSRX_ISP_SOFT_RESET) == 0)
2751 break;
2752
2753 udelay(5);
0107109e 2754 }
d14e72fb
HM		 2755 if (!(RD_REG_DWORD(&reg->ctrl_status) & CSRX_ISP_SOFT_RESET))
2756 set_bit(ISP_SOFT_RESET_CMPL, &ha->fw_dump_cap_flags);
2757
2758 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x015d,
2759 "HCCR: 0x%x, Soft Reset status: 0x%x\n",
2760 RD_REG_DWORD(&reg->hccr),
2761 RD_REG_DWORD(&reg->ctrl_status));
0107109e 2762
b1d46989
MI		 2763 /* If required, do an MPI FW reset now */
2764 if (test_and_clear_bit(MPI_RESET_NEEDED, &vha->dpc_flags)) {
2765 if (qla81xx_reset_mpi(vha) != QLA_SUCCESS) {
2766 if (++abts_cnt < 5) {
2767 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
2768 set_bit(MPI_RESET_NEEDED, &vha->dpc_flags);
2769 } else {
2770 /*
2771 * We exhausted the ISP abort retries. We have to
2772 * set the board offline.
2773 */
2774 abts_cnt = 0;
2775 vha->flags.online = 0;
2776 }
2777 }
2778 }
2779
0107109e
AV		 2780 WRT_REG_DWORD(&reg->hccr, HCCRX_SET_RISC_RESET);
2781 RD_REG_DWORD(&reg->hccr);
2782
2783 WRT_REG_DWORD(&reg->hccr, HCCRX_REL_RISC_PAUSE);
2784 RD_REG_DWORD(&reg->hccr);
2785
2786 WRT_REG_DWORD(&reg->hccr, HCCRX_CLR_RISC_RESET);
2787 RD_REG_DWORD(&reg->hccr);
2788
52c82823 2789 RD_REG_WORD(&reg->mailbox0);
200ffb15 2790 for (cnt = 60; RD_REG_WORD(&reg->mailbox0) != 0 &&
d14e72fb 2791 rval == QLA_SUCCESS; cnt--) {
0107109e 2792 barrier();
d14e72fb
HM		 2793 if (cnt)
2794 udelay(5);
2795 else
2796 rval = QLA_FUNCTION_TIMEOUT;
0107109e 2797 }
d14e72fb
HM		 2798 if (rval == QLA_SUCCESS)
2799 set_bit(RISC_RDY_AFT_RESET, &ha->fw_dump_cap_flags);
2800
2801 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x015e,
2802 "Host Risc 0x%x, mailbox0 0x%x\n",
2803 RD_REG_DWORD(&reg->hccr),
2804 RD_REG_WORD(&reg->mailbox0));
0107109e
AV		 2805
2806 spin_unlock_irqrestore(&ha->hardware_lock, flags);
124f85e6 2807
d14e72fb
HM		 2808 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x015f,
2809 "Driver in %s mode\n",
2810 IS_NOPOLLING_TYPE(ha) ? "Interrupt" : "Polling");
2811
124f85e6
AV		 2812 if (IS_NOPOLLING_TYPE(ha))
2813 ha->isp_ops->enable_intrs(ha);
d14e72fb
HM		 2814
2815 return rval;
0107109e
AV		 2816}
2817
4ea2c9c7
JC		 2818static void
2819qla25xx_read_risc_sema_reg(scsi_qla_host_t *vha, uint32_t *data)
2820{
2821 struct device_reg_24xx __iomem *reg = &vha->hw->iobase->isp24;
2822
2823 WRT_REG_DWORD(&reg->iobase_addr, RISC_REGISTER_BASE_OFFSET);
2824 *data = RD_REG_DWORD(&reg->iobase_window + RISC_REGISTER_WINDOW_OFFET);
2825
2826}
2827
2828static void
2829qla25xx_write_risc_sema_reg(scsi_qla_host_t *vha, uint32_t data)
2830{
2831 struct device_reg_24xx __iomem *reg = &vha->hw->iobase->isp24;
2832
2833 WRT_REG_DWORD(&reg->iobase_addr, RISC_REGISTER_BASE_OFFSET);
2834 WRT_REG_DWORD(&reg->iobase_window + RISC_REGISTER_WINDOW_OFFET, data);
2835}
2836
2837static void
2838qla25xx_manipulate_risc_semaphore(scsi_qla_host_t *vha)
2839{
4ea2c9c7
JC		 2840 uint32_t wd32 = 0;
2841 uint delta_msec = 100;
2842 uint elapsed_msec = 0;
2843 uint timeout_msec;
2844 ulong n;
2845
cc790764
JC		 2846 if (vha->hw->pdev->subsystem_device != 0x0175 &&
2847 vha->hw->pdev->subsystem_device != 0x0240)
4ea2c9c7
JC		 2848 return;
2849
8dd7e3a5
JC		 2850 WRT_REG_DWORD(&vha->hw->iobase->isp24.hccr, HCCRX_SET_RISC_PAUSE);
2851 udelay(100);
2852
4ea2c9c7
JC		 2853attempt:
2854 timeout_msec = TIMEOUT_SEMAPHORE;
2855 n = timeout_msec / delta_msec;
2856 while (n--) {
2857 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_SET);
2858 qla25xx_read_risc_sema_reg(vha, &wd32);
2859 if (wd32 & RISC_SEMAPHORE)
2860 break;
2861 msleep(delta_msec);
2862 elapsed_msec += delta_msec;
2863 if (elapsed_msec > TIMEOUT_TOTAL_ELAPSED)
2864 goto force;
2865 }
2866
2867 if (!(wd32 & RISC_SEMAPHORE))
2868 goto force;
2869
2870 if (!(wd32 & RISC_SEMAPHORE_FORCE))
2871 goto acquired;
2872
2873 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_CLR);
2874 timeout_msec = TIMEOUT_SEMAPHORE_FORCE;
2875 n = timeout_msec / delta_msec;
2876 while (n--) {
2877 qla25xx_read_risc_sema_reg(vha, &wd32);
2878 if (!(wd32 & RISC_SEMAPHORE_FORCE))
2879 break;
2880 msleep(delta_msec);
2881 elapsed_msec += delta_msec;
2882 if (elapsed_msec > TIMEOUT_TOTAL_ELAPSED)
2883 goto force;
2884 }
2885
2886 if (wd32 & RISC_SEMAPHORE_FORCE)
2887 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_FORCE_CLR);
2888
2889 goto attempt;
2890
2891force:
2892 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_FORCE_SET);
2893
2894acquired:
2895 return;
2896}
2897
88c26663
AV		 2898/**
2899 * qla24xx_reset_chip() - Reset ISP24xx chip.
2db6228d 2900 * @vha: HA context
88c26663
AV		 2901 *
2902 * Returns 0 on success.
2903 */
2904void
e315cd28 2905qla24xx_reset_chip(scsi_qla_host_t *vha)
88c26663 2906{
e315cd28 2907 struct qla_hw_data *ha = vha->hw;
85880801
AV		 2908
2909 if (pci_channel_offline(ha->pdev) &&
2910 ha->flags.pci_channel_io_perm_failure) {
2911 return;
2912 }
2913
fd34f556 2914 ha->isp_ops->disable_intrs(ha);
88c26663 2915
4ea2c9c7
JC		 2916 qla25xx_manipulate_risc_semaphore(vha);
2917
88c26663 2918 /* Perform RISC reset. */
e315cd28 2919 qla24xx_reset_risc(vha);
88c26663
AV		 2920}
2921
1da177e4
LT		 2922/**
2923 * qla2x00_chip_diag() - Test chip for proper operation.
2db6228d 2924 * @vha: HA context
1da177e4
LT		 2925 *
2926 * Returns 0 on success.
2927 */
abbd8870 2928int
e315cd28 2929qla2x00_chip_diag(scsi_qla_host_t *vha)
1da177e4
LT		 2930{
2931 int rval;
e315cd28 2932 struct qla_hw_data *ha = vha->hw;
3d71644c 2933 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1da177e4
LT		 2934 unsigned long flags = 0;
2935 uint16_t data;
2936 uint32_t cnt;
2937 uint16_t mb[5];
73208dfd 2938 struct req_que *req = ha->req_q_map[0];
1da177e4
LT		 2939
2940 /* Assume a failed state */
2941 rval = QLA_FUNCTION_FAILED;
2942
da4704d9
BVA		 2943 ql_dbg(ql_dbg_init, vha, 0x007b, "Testing device at %p.\n",
2944 &reg->flash_address);
1da177e4
LT		 2945
2946 spin_lock_irqsave(&ha->hardware_lock, flags);
2947
2948 /* Reset ISP chip. */
2949 WRT_REG_WORD(&reg->ctrl_status, CSR_ISP_SOFT_RESET);
2950
2951 /*
2952 * We need to have a delay here since the card will not respond while
2953 * in reset causing an MCA on some architectures.
2954 */
2955 udelay(20);
2956 data = qla2x00_debounce_register(&reg->ctrl_status);
2957 for (cnt = 6000000 ; cnt && (data & CSR_ISP_SOFT_RESET); cnt--) {
2958 udelay(5);
2959 data = RD_REG_WORD(&reg->ctrl_status);
2960 barrier();
2961 }
2962
2963 if (!cnt)
2964 goto chip_diag_failed;
2965
7c3df132
SK		 2966 ql_dbg(ql_dbg_init, vha, 0x007c,
2967 "Reset register cleared by chip reset.\n");
1da177e4
LT		 2968
2969 /* Reset RISC processor. */
2970 WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
2971 WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
2972
2973 /* Workaround for QLA2312 PCI parity error */
2974 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
2975 data = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 0));
2976 for (cnt = 6000000; cnt && (data == MBS_BUSY); cnt--) {
2977 udelay(5);
2978 data = RD_MAILBOX_REG(ha, reg, 0);
fa2a1ce5 2979 barrier();
1da177e4
LT		 2980 }
2981 } else
2982 udelay(10);
2983
2984 if (!cnt)
2985 goto chip_diag_failed;
2986
2987 /* Check product ID of chip */
5a68a1c2 2988 ql_dbg(ql_dbg_init, vha, 0x007d, "Checking product ID of chip.\n");
1da177e4
LT		 2989
2990 mb[1] = RD_MAILBOX_REG(ha, reg, 1);
2991 mb[2] = RD_MAILBOX_REG(ha, reg, 2);
2992 mb[3] = RD_MAILBOX_REG(ha, reg, 3);
2993 mb[4] = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 4));
2994 if (mb[1] != PROD_ID_1 || (mb[2] != PROD_ID_2 && mb[2] != PROD_ID_2a) ||
2995 mb[3] != PROD_ID_3) {
7c3df132
SK		 2996 ql_log(ql_log_warn, vha, 0x0062,
2997 "Wrong product ID = 0x%x,0x%x,0x%x.\n",
2998 mb[1], mb[2], mb[3]);
1da177e4
LT		 2999
3000 goto chip_diag_failed;
3001 }
3002 ha->product_id[0] = mb[1];
3003 ha->product_id[1] = mb[2];
3004 ha->product_id[2] = mb[3];
3005 ha->product_id[3] = mb[4];
3006
3007 /* Adjust fw RISC transfer size */
73208dfd 3008 if (req->length > 1024)
1da177e4
LT		 3009 ha->fw_transfer_size = REQUEST_ENTRY_SIZE * 1024;
3010 else
3011 ha->fw_transfer_size = REQUEST_ENTRY_SIZE *
73208dfd 3012 req->length;
1da177e4
LT		 3013
3014 if (IS_QLA2200(ha) &&
3015 RD_MAILBOX_REG(ha, reg, 7) == QLA2200A_RISC_ROM_VER) {
3016 /* Limit firmware transfer size with a 2200A */
7c3df132 3017 ql_dbg(ql_dbg_init, vha, 0x007e, "Found QLA2200A Chip.\n");
1da177e4 3018
ea5b6382 3019 ha->device_type |= DT_ISP2200A;
1da177e4
LT		 3020 ha->fw_transfer_size = 128;
3021 }
3022
3023 /* Wrap Incoming Mailboxes Test. */
3024 spin_unlock_irqrestore(&ha->hardware_lock, flags);
3025
7c3df132 3026 ql_dbg(ql_dbg_init, vha, 0x007f, "Checking mailboxes.\n");
e315cd28 3027 rval = qla2x00_mbx_reg_test(vha);
7c3df132
SK		 3028 if (rval)
3029 ql_log(ql_log_warn, vha, 0x0080,
3030 "Failed mailbox send register test.\n");
3031 else
1da177e4
LT		 3032 /* Flag a successful rval */
3033 rval = QLA_SUCCESS;
1da177e4
LT		 3034 spin_lock_irqsave(&ha->hardware_lock, flags);
3035
3036chip_diag_failed:
3037 if (rval)
7c3df132
SK		 3038 ql_log(ql_log_info, vha, 0x0081,
3039 "Chip diagnostics **** FAILED ****.\n");
1da177e4
LT		 3040
3041 spin_unlock_irqrestore(&ha->hardware_lock, flags);
3042
3043 return (rval);
3044}
3045
0107109e
AV		 3046/**
3047 * qla24xx_chip_diag() - Test ISP24xx for proper operation.
2db6228d 3048 * @vha: HA context
0107109e
AV		 3049 *
3050 * Returns 0 on success.
3051 */
3052int
e315cd28 3053qla24xx_chip_diag(scsi_qla_host_t *vha)
0107109e
AV		 3054{
3055 int rval;
e315cd28 3056 struct qla_hw_data *ha = vha->hw;
73208dfd 3057 struct req_que *req = ha->req_q_map[0];
0107109e 3058
7ec0effd 3059 if (IS_P3P_TYPE(ha))
a9083016
GM		 3060 return QLA_SUCCESS;
3061
73208dfd 3062 ha->fw_transfer_size = REQUEST_ENTRY_SIZE * req->length;
0107109e 3063
e315cd28 3064 rval = qla2x00_mbx_reg_test(vha);
0107109e 3065 if (rval) {
7c3df132
SK		 3066 ql_log(ql_log_warn, vha, 0x0082,
3067 "Failed mailbox send register test.\n");
0107109e
AV		 3068 } else {
3069 /* Flag a successful rval */
3070 rval = QLA_SUCCESS;
3071 }
3072
3073 return rval;
3074}
3075
ad0a0b01
QT		 3076static void
3077qla2x00_alloc_offload_mem(scsi_qla_host_t *vha)
0107109e 3078{
a7a167bf 3079 int rval;
df613b96
AV		 3080 dma_addr_t tc_dma;
3081 void *tc;
e315cd28 3082 struct qla_hw_data *ha = vha->hw;
a7a167bf 3083
ad0a0b01 3084 if (ha->eft) {
7c3df132 3085 ql_dbg(ql_dbg_init, vha, 0x00bd,
ad0a0b01
QT		 3086 "%s: Offload Mem is already allocated.\n",
3087 __func__);
a7a167bf
AV		 3088 return;
3089 }
d4e3e04d 3090
ad0a0b01 3091 if (IS_FWI2_CAPABLE(ha)) {
df613b96 3092 /* Allocate memory for Fibre Channel Event Buffer. */
f73cb695
CD		 3093 if (!IS_QLA25XX(ha) && !IS_QLA81XX(ha) && !IS_QLA83XX(ha) &&
3094 !IS_QLA27XX(ha))
436a7b11 3095 goto try_eft;
df613b96 3096
f73cb695
CD		 3097 if (ha->fce)
3098 dma_free_coherent(&ha->pdev->dev,
3099 FCE_SIZE, ha->fce, ha->fce_dma);
3100
3101 /* Allocate memory for Fibre Channel Event Buffer. */
0ea85b50
JP		 3102 tc = dma_zalloc_coherent(&ha->pdev->dev, FCE_SIZE, &tc_dma,
3103 GFP_KERNEL);
df613b96 3104 if (!tc) {
7c3df132
SK		 3105 ql_log(ql_log_warn, vha, 0x00be,
3106 "Unable to allocate (%d KB) for FCE.\n",
3107 FCE_SIZE / 1024);
17d98630 3108 goto try_eft;
df613b96
AV		 3109 }
3110
e315cd28 3111 rval = qla2x00_enable_fce_trace(vha, tc_dma, FCE_NUM_BUFFERS,
df613b96
AV		 3112 ha->fce_mb, &ha->fce_bufs);
3113 if (rval) {
7c3df132
SK		 3114 ql_log(ql_log_warn, vha, 0x00bf,
3115 "Unable to initialize FCE (%d).\n", rval);
df613b96
AV		 3116 dma_free_coherent(&ha->pdev->dev, FCE_SIZE, tc,
3117 tc_dma);
3118 ha->flags.fce_enabled = 0;
17d98630 3119 goto try_eft;
df613b96 3120 }
cfb0919c 3121 ql_dbg(ql_dbg_init, vha, 0x00c0,
7c3df132 3122 "Allocate (%d KB) for FCE...\n", FCE_SIZE / 1024);
df613b96 3123
df613b96
AV		 3124 ha->flags.fce_enabled = 1;
3125 ha->fce_dma = tc_dma;
3126 ha->fce = tc;
f73cb695 3127
436a7b11 3128try_eft:
f73cb695
CD		 3129 if (ha->eft)
3130 dma_free_coherent(&ha->pdev->dev,
3131 EFT_SIZE, ha->eft, ha->eft_dma);
3132
436a7b11 3133 /* Allocate memory for Extended Trace Buffer. */
0ea85b50
JP		 3134 tc = dma_zalloc_coherent(&ha->pdev->dev, EFT_SIZE, &tc_dma,
3135 GFP_KERNEL);
436a7b11 3136 if (!tc) {
7c3df132
SK		 3137 ql_log(ql_log_warn, vha, 0x00c1,
3138 "Unable to allocate (%d KB) for EFT.\n",
3139 EFT_SIZE / 1024);
ad0a0b01 3140 goto eft_err;
436a7b11
AV		 3141 }
3142
e315cd28 3143 rval = qla2x00_enable_eft_trace(vha, tc_dma, EFT_NUM_BUFFERS);
436a7b11 3144 if (rval) {
7c3df132
SK		 3145 ql_log(ql_log_warn, vha, 0x00c2,
3146 "Unable to initialize EFT (%d).\n", rval);
436a7b11
AV		 3147 dma_free_coherent(&ha->pdev->dev, EFT_SIZE, tc,
3148 tc_dma);
ad0a0b01 3149 goto eft_err;
436a7b11 3150 }
cfb0919c 3151 ql_dbg(ql_dbg_init, vha, 0x00c3,
7c3df132 3152 "Allocated (%d KB) EFT ...\n", EFT_SIZE / 1024);
436a7b11 3153
436a7b11
AV		 3154 ha->eft_dma = tc_dma;
3155 ha->eft = tc;
d4e3e04d 3156 }
f73cb695 3157
ad0a0b01
QT		 3158eft_err:
3159 return;
3160}
3161
3162void
3163qla2x00_alloc_fw_dump(scsi_qla_host_t *vha)
3164{
3165 uint32_t dump_size, fixed_size, mem_size, req_q_size, rsp_q_size,
3166 eft_size, fce_size, mq_size;
3167 struct qla_hw_data *ha = vha->hw;
3168 struct req_que *req = ha->req_q_map[0];
3169 struct rsp_que *rsp = ha->rsp_q_map[0];
3170 struct qla2xxx_fw_dump *fw_dump;
3171
3172 dump_size = fixed_size = mem_size = eft_size = fce_size = mq_size = 0;
3173 req_q_size = rsp_q_size = 0;
3174
3175 if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
3176 fixed_size = sizeof(struct qla2100_fw_dump);
3177 } else if (IS_QLA23XX(ha)) {
3178 fixed_size = offsetof(struct qla2300_fw_dump, data_ram);
3179 mem_size = (ha->fw_memory_size - 0x11000 + 1) *
3180 sizeof(uint16_t);
3181 } else if (IS_FWI2_CAPABLE(ha)) {
3182 if (IS_QLA83XX(ha) || IS_QLA27XX(ha))
3183 fixed_size = offsetof(struct qla83xx_fw_dump, ext_mem);
3184 else if (IS_QLA81XX(ha))
3185 fixed_size = offsetof(struct qla81xx_fw_dump, ext_mem);
3186 else if (IS_QLA25XX(ha))
3187 fixed_size = offsetof(struct qla25xx_fw_dump, ext_mem);
3188 else
3189 fixed_size = offsetof(struct qla24xx_fw_dump, ext_mem);
3190
3191 mem_size = (ha->fw_memory_size - 0x100000 + 1) *
3192 sizeof(uint32_t);
3193 if (ha->mqenable) {
3194 if (!IS_QLA83XX(ha) && !IS_QLA27XX(ha))
3195 mq_size = sizeof(struct qla2xxx_mq_chain);
3196 /*
3197 * Allocate maximum buffer size for all queues.
3198 * Resizing must be done at end-of-dump processing.
3199 */
3200 mq_size += ha->max_req_queues *
3201 (req->length * sizeof(request_t));
3202 mq_size += ha->max_rsp_queues *
3203 (rsp->length * sizeof(response_t));
3204 }
3205 if (ha->tgt.atio_ring)
3206 mq_size += ha->tgt.atio_q_length * sizeof(request_t);
3207 /* Allocate memory for Fibre Channel Event Buffer. */
3208 if (!IS_QLA25XX(ha) && !IS_QLA81XX(ha) && !IS_QLA83XX(ha) &&
3209 !IS_QLA27XX(ha))
3210 goto try_eft;
3211
3212 fce_size = sizeof(struct qla2xxx_fce_chain) + FCE_SIZE;
3213try_eft:
3214 ql_dbg(ql_dbg_init, vha, 0x00c3,
3215 "Allocated (%d KB) EFT ...\n", EFT_SIZE / 1024);
3216 eft_size = EFT_SIZE;
3217 }
3218
f73cb695
CD		 3219 if (IS_QLA27XX(ha)) {
3220 if (!ha->fw_dump_template) {
3221 ql_log(ql_log_warn, vha, 0x00ba,
3222 "Failed missing fwdump template\n");
3223 return;
3224 }
3225 dump_size = qla27xx_fwdt_calculate_dump_size(vha);
3226 ql_dbg(ql_dbg_init, vha, 0x00fa,
3227 "-> allocating fwdump (%x bytes)...\n", dump_size);
3228 goto allocate;
3229 }
3230
73208dfd
AC		 3231 req_q_size = req->length * sizeof(request_t);
3232 rsp_q_size = rsp->length * sizeof(response_t);
a7a167bf 3233 dump_size = offsetof(struct qla2xxx_fw_dump, isp);
2afa19a9 3234 dump_size += fixed_size + mem_size + req_q_size + rsp_q_size + eft_size;
bb99de67
AV		 3235 ha->chain_offset = dump_size;
3236 dump_size += mq_size + fce_size;
d4e3e04d 3237
b945e777
QT		 3238 if (ha->exchoffld_buf)
3239 dump_size += sizeof(struct qla2xxx_offld_chain) +
3240 ha->exchoffld_size;
3241 if (ha->exlogin_buf)
3242 dump_size += sizeof(struct qla2xxx_offld_chain) +
3243 ha->exlogin_size;
3244
f73cb695 3245allocate:
ad0a0b01
QT		 3246 if (!ha->fw_dump_len || dump_size != ha->fw_dump_len) {
3247 fw_dump = vmalloc(dump_size);
3248 if (!fw_dump) {
3249 ql_log(ql_log_warn, vha, 0x00c4,
3250 "Unable to allocate (%d KB) for firmware dump.\n",
3251 dump_size / 1024);
3252 } else {
3253 if (ha->fw_dump)
3254 vfree(ha->fw_dump);
3255 ha->fw_dump = fw_dump;
3256
3257 ha->fw_dump_len = dump_size;
3258 ql_dbg(ql_dbg_init, vha, 0x00c5,
3259 "Allocated (%d KB) for firmware dump.\n",
3260 dump_size / 1024);
3261
3262 if (IS_QLA27XX(ha))
3263 return;
3264
3265 ha->fw_dump->signature[0] = 'Q';
3266 ha->fw_dump->signature[1] = 'L';
3267 ha->fw_dump->signature[2] = 'G';
3268 ha->fw_dump->signature[3] = 'C';
3269 ha->fw_dump->version = htonl(1);
3270
3271 ha->fw_dump->fixed_size = htonl(fixed_size);
3272 ha->fw_dump->mem_size = htonl(mem_size);
3273 ha->fw_dump->req_q_size = htonl(req_q_size);
3274 ha->fw_dump->rsp_q_size = htonl(rsp_q_size);
3275
3276 ha->fw_dump->eft_size = htonl(eft_size);
3277 ha->fw_dump->eft_addr_l = htonl(LSD(ha->eft_dma));
3278 ha->fw_dump->eft_addr_h = htonl(MSD(ha->eft_dma));
3279
3280 ha->fw_dump->header_size =
3281 htonl(offsetof(struct qla2xxx_fw_dump, isp));
a7a167bf 3282 }
a7a167bf 3283 }
0107109e
AV		 3284}
3285
18e7555a
AV		 3286static int
3287qla81xx_mpi_sync(scsi_qla_host_t *vha)
3288{
3289#define MPS_MASK 0xe0
3290 int rval;
3291 uint16_t dc;
3292 uint32_t dw;
18e7555a
AV		 3293
3294 if (!IS_QLA81XX(vha->hw))
3295 return QLA_SUCCESS;
3296
3297 rval = qla2x00_write_ram_word(vha, 0x7c00, 1);
3298 if (rval != QLA_SUCCESS) {
7c3df132
SK		 3299 ql_log(ql_log_warn, vha, 0x0105,
3300 "Unable to acquire semaphore.\n");
18e7555a
AV		 3301 goto done;
3302 }
3303
3304 pci_read_config_word(vha->hw->pdev, 0x54, &dc);
3305 rval = qla2x00_read_ram_word(vha, 0x7a15, &dw);
3306 if (rval != QLA_SUCCESS) {
7c3df132 3307 ql_log(ql_log_warn, vha, 0x0067, "Unable to read sync.\n");
18e7555a
AV		 3308 goto done_release;
3309 }
3310
3311 dc &= MPS_MASK;
3312 if (dc == (dw & MPS_MASK))
3313 goto done_release;
3314
3315 dw &= ~MPS_MASK;
3316 dw |= dc;
3317 rval = qla2x00_write_ram_word(vha, 0x7a15, dw);
3318 if (rval != QLA_SUCCESS) {
7c3df132 3319 ql_log(ql_log_warn, vha, 0x0114, "Unable to gain sync.\n");
18e7555a
AV		 3320 }
3321
3322done_release:
3323 rval = qla2x00_write_ram_word(vha, 0x7c00, 0);
3324 if (rval != QLA_SUCCESS) {
7c3df132
SK		 3325 ql_log(ql_log_warn, vha, 0x006d,
3326 "Unable to release semaphore.\n");
18e7555a
AV		 3327 }
3328
3329done:
3330 return rval;
3331}
3332
8d93f550
CD		 3333int
3334qla2x00_alloc_outstanding_cmds(struct qla_hw_data *ha, struct req_que *req)
3335{
3336 /* Don't try to reallocate the array */
3337 if (req->outstanding_cmds)
3338 return QLA_SUCCESS;
3339
d7459527 3340 if (!IS_FWI2_CAPABLE(ha))
8d93f550
CD		 3341 req->num_outstanding_cmds = DEFAULT_OUTSTANDING_COMMANDS;
3342 else {
03e8c680
QT		 3343 if (ha->cur_fw_xcb_count <= ha->cur_fw_iocb_count)
3344 req->num_outstanding_cmds = ha->cur_fw_xcb_count;
8d93f550 3345 else
03e8c680 3346 req->num_outstanding_cmds = ha->cur_fw_iocb_count;
8d93f550
CD		 3347 }
3348
6396bb22
KC		 3349 req->outstanding_cmds = kcalloc(req->num_outstanding_cmds,
3350 sizeof(srb_t *),
3351 GFP_KERNEL);
8d93f550
CD		 3352
3353 if (!req->outstanding_cmds) {
3354 /*
3355 * Try to allocate a minimal size just so we can get through
3356 * initialization.
3357 */
3358 req->num_outstanding_cmds = MIN_OUTSTANDING_COMMANDS;
6396bb22
KC		 3359 req->outstanding_cmds = kcalloc(req->num_outstanding_cmds,
3360 sizeof(srb_t *),
3361 GFP_KERNEL);
8d93f550
CD		 3362
3363 if (!req->outstanding_cmds) {
3364 ql_log(ql_log_fatal, NULL, 0x0126,
3365 "Failed to allocate memory for "
3366 "outstanding_cmds for req_que %p.\n", req);
3367 req->num_outstanding_cmds = 0;
3368 return QLA_FUNCTION_FAILED;
3369 }
3370 }
3371
3372 return QLA_SUCCESS;
3373}
3374
e4e3a2ce
QT		 3375#define PRINT_FIELD(_field, _flag, _str) { \
3376 if (a0->_field & _flag) {\
3377 if (p) {\
3378 strcat(ptr, "|");\
3379 ptr++;\
3380 leftover--;\
3381 } \
3382 len = snprintf(ptr, leftover, "%s", _str); \
3383 p = 1;\
3384 leftover -= len;\
3385 ptr += len; \
3386 } \
3387}
3388
3389static void qla2xxx_print_sfp_info(struct scsi_qla_host *vha)
3390{
3391#define STR_LEN 64
3392 struct sff_8247_a0 *a0 = (struct sff_8247_a0 *)vha->hw->sfp_data;
3393 u8 str[STR_LEN], *ptr, p;
3394 int leftover, len;
3395
3396 memset(str, 0, STR_LEN);
3397 snprintf(str, SFF_VEN_NAME_LEN+1, a0->vendor_name);
3398 ql_dbg(ql_dbg_init, vha, 0x015a,
3399 "SFP MFG Name: %s\n", str);
3400
3401 memset(str, 0, STR_LEN);
3402 snprintf(str, SFF_PART_NAME_LEN+1, a0->vendor_pn);
3403 ql_dbg(ql_dbg_init, vha, 0x015c,
3404 "SFP Part Name: %s\n", str);
3405
3406 /* media */
3407 memset(str, 0, STR_LEN);
3408 ptr = str;
3409 leftover = STR_LEN;
3410 p = len = 0;
3411 PRINT_FIELD(fc_med_cc9, FC_MED_TW, "Twin AX");
3412 PRINT_FIELD(fc_med_cc9, FC_MED_TP, "Twisted Pair");
3413 PRINT_FIELD(fc_med_cc9, FC_MED_MI, "Min Coax");
3414 PRINT_FIELD(fc_med_cc9, FC_MED_TV, "Video Coax");
3415 PRINT_FIELD(fc_med_cc9, FC_MED_M6, "MultiMode 62.5um");
3416 PRINT_FIELD(fc_med_cc9, FC_MED_M5, "MultiMode 50um");
3417 PRINT_FIELD(fc_med_cc9, FC_MED_SM, "SingleMode");
3418 ql_dbg(ql_dbg_init, vha, 0x0160,
3419 "SFP Media: %s\n", str);
3420
3421 /* link length */
3422 memset(str, 0, STR_LEN);
3423 ptr = str;
3424 leftover = STR_LEN;
3425 p = len = 0;
3426 PRINT_FIELD(fc_ll_cc7, FC_LL_VL, "Very Long");
3427 PRINT_FIELD(fc_ll_cc7, FC_LL_S, "Short");
3428 PRINT_FIELD(fc_ll_cc7, FC_LL_I, "Intermediate");
3429 PRINT_FIELD(fc_ll_cc7, FC_LL_L, "Long");
3430 PRINT_FIELD(fc_ll_cc7, FC_LL_M, "Medium");
3431 ql_dbg(ql_dbg_init, vha, 0x0196,
3432 "SFP Link Length: %s\n", str);
3433
3434 memset(str, 0, STR_LEN);
3435 ptr = str;
3436 leftover = STR_LEN;
3437 p = len = 0;
3438 PRINT_FIELD(fc_ll_cc7, FC_LL_SA, "Short Wave (SA)");
3439 PRINT_FIELD(fc_ll_cc7, FC_LL_LC, "Long Wave(LC)");
3440 PRINT_FIELD(fc_tec_cc8, FC_TEC_SN, "Short Wave (SN)");
3441 PRINT_FIELD(fc_tec_cc8, FC_TEC_SL, "Short Wave (SL)");
3442 PRINT_FIELD(fc_tec_cc8, FC_TEC_LL, "Long Wave (LL)");
3443 ql_dbg(ql_dbg_init, vha, 0x016e,
3444 "SFP FC Link Tech: %s\n", str);
3445
3446 if (a0->length_km)
3447 ql_dbg(ql_dbg_init, vha, 0x016f,
3448 "SFP Distant: %d km\n", a0->length_km);
3449 if (a0->length_100m)
3450 ql_dbg(ql_dbg_init, vha, 0x0170,
3451 "SFP Distant: %d m\n", a0->length_100m*100);
3452 if (a0->length_50um_10m)
3453 ql_dbg(ql_dbg_init, vha, 0x0189,
3454 "SFP Distant (WL=50um): %d m\n", a0->length_50um_10m * 10);
3455 if (a0->length_62um_10m)
3456 ql_dbg(ql_dbg_init, vha, 0x018a,
3457 "SFP Distant (WL=62.5um): %d m\n", a0->length_62um_10m * 10);
3458 if (a0->length_om4_10m)
3459 ql_dbg(ql_dbg_init, vha, 0x0194,
3460 "SFP Distant (OM4): %d m\n", a0->length_om4_10m * 10);
3461 if (a0->length_om3_10m)
3462 ql_dbg(ql_dbg_init, vha, 0x0195,
3463 "SFP Distant (OM3): %d m\n", a0->length_om3_10m * 10);
3464}
3465
3466
3467/*
3468 * Return Code:
3469 * QLA_SUCCESS: no action
3470 * QLA_INTERFACE_ERROR: SFP is not there.
3471 * QLA_FUNCTION_FAILED: detected New SFP
3472 */
3473int
3474qla24xx_detect_sfp(scsi_qla_host_t *vha)
3475{
3476 int rc = QLA_SUCCESS;
3477 struct sff_8247_a0 *a;
3478 struct qla_hw_data *ha = vha->hw;
3479
3480 if (!AUTO_DETECT_SFP_SUPPORT(vha))
3481 goto out;
3482
3483 rc = qla2x00_read_sfp_dev(vha, NULL, 0);
3484 if (rc)
3485 goto out;
3486
3487 a = (struct sff_8247_a0 *)vha->hw->sfp_data;
3488 qla2xxx_print_sfp_info(vha);
3489
3490 if (a->fc_ll_cc7 & FC_LL_VL || a->fc_ll_cc7 & FC_LL_L) {
3491 /* long range */
3492 ha->flags.detected_lr_sfp = 1;
3493
3494 if (a->length_km > 5 || a->length_100m > 50)
3495 ha->long_range_distance = LR_DISTANCE_10K;
3496 else
3497 ha->long_range_distance = LR_DISTANCE_5K;
3498
3499 if (ha->flags.detected_lr_sfp != ha->flags.using_lr_setting)
3500 ql_dbg(ql_dbg_async, vha, 0x507b,
3501 "Detected Long Range SFP.\n");
3502 } else {
3503 /* short range */
3504 ha->flags.detected_lr_sfp = 0;
3505 if (ha->flags.using_lr_setting)
3506 ql_dbg(ql_dbg_async, vha, 0x5084,
3507 "Detected Short Range SFP.\n");
3508 }
3509
3510 if (!vha->flags.init_done)
3511 rc = QLA_SUCCESS;
3512out:
3513 return rc;
3514}
3515
1da177e4
LT		 3516/**
3517 * qla2x00_setup_chip() - Load and start RISC firmware.
2db6228d 3518 * @vha: HA context
1da177e4
LT		 3519 *
3520 * Returns 0 on success.
3521 */
3522static int
e315cd28 3523qla2x00_setup_chip(scsi_qla_host_t *vha)
1da177e4 3524{
0107109e
AV		 3525 int rval;
3526 uint32_t srisc_address = 0;
e315cd28 3527 struct qla_hw_data *ha = vha->hw;
3db0652e
AV		 3528 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
3529 unsigned long flags;
dda772e8 3530 uint16_t fw_major_version;
3db0652e 3531
7ec0effd 3532 if (IS_P3P_TYPE(ha)) {
a9083016 3533 rval = ha->isp_ops->load_risc(vha, &srisc_address);
14e303d9
AV		 3534 if (rval == QLA_SUCCESS) {
3535 qla2x00_stop_firmware(vha);
a9083016 3536 goto enable_82xx_npiv;
14e303d9 3537 } else
b963752f 3538 goto failed;
a9083016
GM		 3539 }
3540
3db0652e
AV		 3541 if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) {
3542 /* Disable SRAM, Instruction RAM and GP RAM parity. */
3543 spin_lock_irqsave(&ha->hardware_lock, flags);
3544 WRT_REG_WORD(&reg->hccr, (HCCR_ENABLE_PARITY + 0x0));
3545 RD_REG_WORD(&reg->hccr);
3546 spin_unlock_irqrestore(&ha->hardware_lock, flags);
3547 }
1da177e4 3548
18e7555a
AV		 3549 qla81xx_mpi_sync(vha);
3550
1da177e4 3551 /* Load firmware sequences */
e315cd28 3552 rval = ha->isp_ops->load_risc(vha, &srisc_address);
0107109e 3553 if (rval == QLA_SUCCESS) {
7c3df132
SK		 3554 ql_dbg(ql_dbg_init, vha, 0x00c9,
3555 "Verifying Checksum of loaded RISC code.\n");
1da177e4 3556
e315cd28 3557 rval = qla2x00_verify_checksum(vha, srisc_address);
1da177e4
LT		 3558 if (rval == QLA_SUCCESS) {
3559 /* Start firmware execution. */
7c3df132
SK		 3560 ql_dbg(ql_dbg_init, vha, 0x00ca,
3561 "Starting firmware.\n");
1da177e4 3562
b0d6cabd
HM		 3563 if (ql2xexlogins)
3564 ha->flags.exlogins_enabled = 1;
3565
99e1b683 3566 if (qla_is_exch_offld_enabled(vha))
2f56a7f1
HM		 3567 ha->flags.exchoffld_enabled = 1;
3568
e315cd28 3569 rval = qla2x00_execute_fw(vha, srisc_address);
1da177e4 3570 /* Retrieve firmware information. */
dda772e8 3571 if (rval == QLA_SUCCESS) {
e4e3a2ce
QT		 3572 qla24xx_detect_sfp(vha);
3573
8b4673ba
QT		 3574 if ((IS_QLA83XX(ha) || IS_QLA27XX(ha)) &&
3575 (ha->zio_mode == QLA_ZIO_MODE_6))
3576 qla27xx_set_zio_threshold(vha,
3577 ha->last_zio_threshold);
3578
b0d6cabd
HM		 3579 rval = qla2x00_set_exlogins_buffer(vha);
3580 if (rval != QLA_SUCCESS)
3581 goto failed;
3582
2f56a7f1
HM		 3583 rval = qla2x00_set_exchoffld_buffer(vha);
3584 if (rval != QLA_SUCCESS)
3585 goto failed;
3586
a9083016 3587enable_82xx_npiv:
dda772e8 3588 fw_major_version = ha->fw_major_version;
7ec0effd 3589 if (IS_P3P_TYPE(ha))
3173167f 3590 qla82xx_check_md_needed(vha);
6246b8a1
GM		 3591 else
3592 rval = qla2x00_get_fw_version(vha);
ca9e9c3e
AV		 3593 if (rval != QLA_SUCCESS)
3594 goto failed;
2c3dfe3f 3595 ha->flags.npiv_supported = 0;
e315cd28 3596 if (IS_QLA2XXX_MIDTYPE(ha) &&
946fb891 3597 (ha->fw_attributes & BIT_2)) {
2c3dfe3f 3598 ha->flags.npiv_supported = 1;
4d0ea247
SJ		 3599 if ((!ha->max_npiv_vports) ||
3600 ((ha->max_npiv_vports + 1) %
eb66dc60 3601 MIN_MULTI_ID_FABRIC))
4d0ea247 3602 ha->max_npiv_vports =
eb66dc60 3603 MIN_MULTI_ID_FABRIC - 1;
4d0ea247 3604 }
03e8c680 3605 qla2x00_get_resource_cnts(vha);
d743de66 3606
8d93f550
CD		 3607 /*
3608 * Allocate the array of outstanding commands
3609 * now that we know the firmware resources.
3610 */
3611 rval = qla2x00_alloc_outstanding_cmds(ha,
3612 vha->req);
3613 if (rval != QLA_SUCCESS)
3614 goto failed;
3615
ad0a0b01
QT		 3616 if (!fw_major_version && !(IS_P3P_TYPE(ha)))
3617 qla2x00_alloc_offload_mem(vha);
3618
3619 if (ql2xallocfwdump && !(IS_P3P_TYPE(ha)))
08de2844 3620 qla2x00_alloc_fw_dump(vha);
ad0a0b01 3621
3b6e5b9d
CD		 3622 } else {
3623 goto failed;
1da177e4
LT		 3624 }
3625 } else {
7c3df132
SK		 3626 ql_log(ql_log_fatal, vha, 0x00cd,
3627 "ISP Firmware failed checksum.\n");
3628 goto failed;
1da177e4 3629 }
c74d88a4
AV		 3630 } else
3631 goto failed;
1da177e4 3632
3db0652e
AV		 3633 if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) {
3634 /* Enable proper parity. */
3635 spin_lock_irqsave(&ha->hardware_lock, flags);
3636 if (IS_QLA2300(ha))
3637 /* SRAM parity */
3638 WRT_REG_WORD(&reg->hccr, HCCR_ENABLE_PARITY + 0x1);
3639 else
3640 /* SRAM, Instruction RAM and GP RAM parity */
3641 WRT_REG_WORD(&reg->hccr, HCCR_ENABLE_PARITY + 0x7);
3642 RD_REG_WORD(&reg->hccr);
3643 spin_unlock_irqrestore(&ha->hardware_lock, flags);
3644 }
3645
f3982d89
CD		 3646 if (IS_QLA27XX(ha))
3647 ha->flags.fac_supported = 1;
3648 else if (rval == QLA_SUCCESS && IS_FAC_REQUIRED(ha)) {
1d2874de
JC		 3649 uint32_t size;
3650
3651 rval = qla81xx_fac_get_sector_size(vha, &size);
3652 if (rval == QLA_SUCCESS) {
3653 ha->flags.fac_supported = 1;
3654 ha->fdt_block_size = size << 2;
3655 } else {
7c3df132 3656 ql_log(ql_log_warn, vha, 0x00ce,
1d2874de
JC		 3657 "Unsupported FAC firmware (%d.%02d.%02d).\n",
3658 ha->fw_major_version, ha->fw_minor_version,
3659 ha->fw_subminor_version);
1ca60e3b 3660
f73cb695 3661 if (IS_QLA83XX(ha) || IS_QLA27XX(ha)) {
6246b8a1
GM		 3662 ha->flags.fac_supported = 0;
3663 rval = QLA_SUCCESS;
3664 }
1d2874de
JC		 3665 }
3666 }
ca9e9c3e 3667failed:
1da177e4 3668 if (rval) {
7c3df132
SK		 3669 ql_log(ql_log_fatal, vha, 0x00cf,
3670 "Setup chip ****FAILED****.\n");
1da177e4
LT		 3671 }
3672
3673 return (rval);
3674}
3675
3676/**
3677 * qla2x00_init_response_q_entries() - Initializes response queue entries.
2db6228d 3678 * @rsp: response queue
1da177e4
LT		 3679 *
3680 * Beginning of request ring has initialization control block already built
3681 * by nvram config routine.
3682 *
3683 * Returns 0 on success.
3684 */
73208dfd
AC		 3685void
3686qla2x00_init_response_q_entries(struct rsp_que *rsp)
1da177e4
LT		 3687{
3688 uint16_t cnt;
3689 response_t *pkt;
3690
2afa19a9
AC		 3691 rsp->ring_ptr = rsp->ring;
3692 rsp->ring_index = 0;
3693 rsp->status_srb = NULL;
e315cd28
AC		 3694 pkt = rsp->ring_ptr;
3695 for (cnt = 0; cnt < rsp->length; cnt++) {
1da177e4
LT		 3696 pkt->signature = RESPONSE_PROCESSED;
3697 pkt++;
3698 }
1da177e4
LT		 3699}
3700
3701/**
3702 * qla2x00_update_fw_options() - Read and process firmware options.
2db6228d 3703 * @vha: HA context
1da177e4
LT		 3704 *
3705 * Returns 0 on success.
3706 */
abbd8870 3707void
e315cd28 3708qla2x00_update_fw_options(scsi_qla_host_t *vha)
1da177e4
LT		 3709{
3710 uint16_t swing, emphasis, tx_sens, rx_sens;
e315cd28 3711 struct qla_hw_data *ha = vha->hw;
1da177e4
LT		 3712
3713 memset(ha->fw_options, 0, sizeof(ha->fw_options));
e315cd28 3714 qla2x00_get_fw_options(vha, ha->fw_options);
1da177e4
LT		 3715
3716 if (IS_QLA2100(ha) || IS_QLA2200(ha))
3717 return;
3718
3719 /* Serial Link options. */
7c3df132
SK		 3720 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x0115,
3721 "Serial link options.\n");
3722 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0109,
3723 (uint8_t *)&ha->fw_seriallink_options,
3724 sizeof(ha->fw_seriallink_options));
1da177e4
LT		 3725
3726 ha->fw_options[1] &= ~FO1_SET_EMPHASIS_SWING;
3727 if (ha->fw_seriallink_options[3] & BIT_2) {
3728 ha->fw_options[1] |= FO1_SET_EMPHASIS_SWING;
3729
3730 /* 1G settings */
3731 swing = ha->fw_seriallink_options[2] & (BIT_2 | BIT_1 | BIT_0);
3732 emphasis = (ha->fw_seriallink_options[2] &
3733 (BIT_4 | BIT_3)) >> 3;
3734 tx_sens = ha->fw_seriallink_options[0] &
fa2a1ce5 3735 (BIT_3 | BIT_2 | BIT_1 | BIT_0);
1da177e4
LT		 3736 rx_sens = (ha->fw_seriallink_options[0] &
3737 (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4;
3738 ha->fw_options[10] = (emphasis << 14) | (swing << 8);
3739 if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
3740 if (rx_sens == 0x0)
3741 rx_sens = 0x3;
3742 ha->fw_options[10] |= (tx_sens << 4) | rx_sens;
3743 } else if (IS_QLA2322(ha) || IS_QLA6322(ha))
3744 ha->fw_options[10] |= BIT_5 |
3745 ((rx_sens & (BIT_1 | BIT_0)) << 2) |
3746 (tx_sens & (BIT_1 | BIT_0));
3747
3748 /* 2G settings */
3749 swing = (ha->fw_seriallink_options[2] &
3750 (BIT_7 | BIT_6 | BIT_5)) >> 5;
3751 emphasis = ha->fw_seriallink_options[3] & (BIT_1 | BIT_0);
3752 tx_sens = ha->fw_seriallink_options[1] &
fa2a1ce5 3753 (BIT_3 | BIT_2 | BIT_1 | BIT_0);
1da177e4
LT		 3754 rx_sens = (ha->fw_seriallink_options[1] &
3755 (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4;
3756 ha->fw_options[11] = (emphasis << 14) | (swing << 8);
3757 if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
3758 if (rx_sens == 0x0)
3759 rx_sens = 0x3;
3760 ha->fw_options[11] |= (tx_sens << 4) | rx_sens;
3761 } else if (IS_QLA2322(ha) || IS_QLA6322(ha))
3762 ha->fw_options[11] |= BIT_5 |
3763 ((rx_sens & (BIT_1 | BIT_0)) << 2) |
3764 (tx_sens & (BIT_1 | BIT_0));
3765 }
3766
3767 /* FCP2 options. */
3768 /* Return command IOCBs without waiting for an ABTS to complete. */
3769 ha->fw_options[3] |= BIT_13;
3770
3771 /* LED scheme. */
3772 if (ha->flags.enable_led_scheme)
3773 ha->fw_options[2] |= BIT_12;
3774
48c02fde 3775 /* Detect ISP6312. */
3776 if (IS_QLA6312(ha))
3777 ha->fw_options[2] |= BIT_13;
3778
088d09d4
GM		 3779 /* Set Retry FLOGI in case of P2P connection */
3780 if (ha->operating_mode == P2P) {
3781 ha->fw_options[2] |= BIT_3;
3782 ql_dbg(ql_dbg_disc, vha, 0x2100,
3783 "(%s): Setting FLOGI retry BIT in fw_options[2]: 0x%x\n",
3784 __func__, ha->fw_options[2]);
3785 }
3786
1da177e4 3787 /* Update firmware options. */
e315cd28 3788 qla2x00_set_fw_options(vha, ha->fw_options);
1da177e4
LT		 3789}
3790
0107109e 3791void
e315cd28 3792qla24xx_update_fw_options(scsi_qla_host_t *vha)
0107109e
AV		 3793{
3794 int rval;
e315cd28 3795 struct qla_hw_data *ha = vha->hw;
0107109e 3796
7ec0effd 3797 if (IS_P3P_TYPE(ha))
a9083016
GM		 3798 return;
3799
f198cafa
HM		 3800 /* Hold status IOCBs until ABTS response received. */
3801 if (ql2xfwholdabts)
3802 ha->fw_options[3] |= BIT_12;
3803
088d09d4
GM		 3804 /* Set Retry FLOGI in case of P2P connection */
3805 if (ha->operating_mode == P2P) {
3806 ha->fw_options[2] |= BIT_3;
3807 ql_dbg(ql_dbg_disc, vha, 0x2101,
3808 "(%s): Setting FLOGI retry BIT in fw_options[2]: 0x%x\n",
3809 __func__, ha->fw_options[2]);
3810 }
3811
41dc529a 3812 /* Move PUREX, ABTS RX & RIDA to ATIOQ */
3c4810ff
QT		 3813 if (ql2xmvasynctoatio &&
3814 (IS_QLA83XX(ha) || IS_QLA27XX(ha))) {
41dc529a
QT		 3815 if (qla_tgt_mode_enabled(vha) ||
3816 qla_dual_mode_enabled(vha))
3817 ha->fw_options[2] |= BIT_11;
3818 else
3819 ha->fw_options[2] &= ~BIT_11;
3820 }
3821
f7e761f5
QT		 3822 if (IS_QLA25XX(ha) || IS_QLA83XX(ha) || IS_QLA27XX(ha)) {
3823 /*
3824 * Tell FW to track each exchange to prevent
3825 * driver from using stale exchange.
3826 */
3827 if (qla_tgt_mode_enabled(vha) ||
3828 qla_dual_mode_enabled(vha))
3829 ha->fw_options[2] |= BIT_4;
3830 else
3831 ha->fw_options[2] &= ~BIT_4;
9ecf0b0d
QT		 3832
3833 /* Reserve 1/2 of emergency exchanges for ELS.*/
3834 if (qla2xuseresexchforels)
3835 ha->fw_options[2] |= BIT_8;
3836 else
3837 ha->fw_options[2] &= ~BIT_8;
f7e761f5
QT		 3838 }
3839
83548fe2
QT		 3840 ql_dbg(ql_dbg_init, vha, 0x00e8,
3841 "%s, add FW options 1-3 = 0x%04x 0x%04x 0x%04x mode %x\n",
3842 __func__, ha->fw_options[1], ha->fw_options[2],
3843 ha->fw_options[3], vha->host->active_mode);
3c4810ff
QT		 3844
3845 if (ha->fw_options[1] || ha->fw_options[2] || ha->fw_options[3])
3846 qla2x00_set_fw_options(vha, ha->fw_options);
41dc529a 3847
0107109e 3848 /* Update Serial Link options. */
f94097ed 3849 if ((le16_to_cpu(ha->fw_seriallink_options24[0]) & BIT_0) == 0)
0107109e
AV		 3850 return;
3851
e315cd28 3852 rval = qla2x00_set_serdes_params(vha,
f94097ed 3853 le16_to_cpu(ha->fw_seriallink_options24[1]),
3854 le16_to_cpu(ha->fw_seriallink_options24[2]),
3855 le16_to_cpu(ha->fw_seriallink_options24[3]));
0107109e 3856 if (rval != QLA_SUCCESS) {
7c3df132 3857 ql_log(ql_log_warn, vha, 0x0104,
0107109e
AV		 3858 "Unable to update Serial Link options (%x).\n", rval);
3859 }
3860}
3861
abbd8870 3862void
e315cd28 3863qla2x00_config_rings(struct scsi_qla_host *vha)
abbd8870 3864{
e315cd28 3865 struct qla_hw_data *ha = vha->hw;
3d71644c 3866 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
73208dfd
AC		 3867 struct req_que *req = ha->req_q_map[0];
3868 struct rsp_que *rsp = ha->rsp_q_map[0];
abbd8870
AV		 3869
3870 /* Setup ring parameters in initialization control block. */
ad950360
BVA		 3871 ha->init_cb->request_q_outpointer = cpu_to_le16(0);
3872 ha->init_cb->response_q_inpointer = cpu_to_le16(0);
e315cd28
AC		 3873 ha->init_cb->request_q_length = cpu_to_le16(req->length);
3874 ha->init_cb->response_q_length = cpu_to_le16(rsp->length);
3875 ha->init_cb->request_q_address[0] = cpu_to_le32(LSD(req->dma));
3876 ha->init_cb->request_q_address[1] = cpu_to_le32(MSD(req->dma));
3877 ha->init_cb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma));
3878 ha->init_cb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma));
abbd8870
AV		 3879
3880 WRT_REG_WORD(ISP_REQ_Q_IN(ha, reg), 0);
3881 WRT_REG_WORD(ISP_REQ_Q_OUT(ha, reg), 0);
3882 WRT_REG_WORD(ISP_RSP_Q_IN(ha, reg), 0);
3883 WRT_REG_WORD(ISP_RSP_Q_OUT(ha, reg), 0);
3884 RD_REG_WORD(ISP_RSP_Q_OUT(ha, reg)); /* PCI Posting. */
3885}
3886
0107109e 3887void
e315cd28 3888qla24xx_config_rings(struct scsi_qla_host *vha)
0107109e 3889{
e315cd28 3890 struct qla_hw_data *ha = vha->hw;
118e2ef9 3891 device_reg_t *reg = ISP_QUE_REG(ha, 0);
73208dfd
AC		 3892 struct device_reg_2xxx __iomem *ioreg = &ha->iobase->isp;
3893 struct qla_msix_entry *msix;
0107109e 3894 struct init_cb_24xx *icb;
73208dfd
AC		 3895 uint16_t rid = 0;
3896 struct req_que *req = ha->req_q_map[0];
3897 struct rsp_que *rsp = ha->rsp_q_map[0];
0107109e 3898
6246b8a1 3899 /* Setup ring parameters in initialization control block. */
0107109e 3900 icb = (struct init_cb_24xx *)ha->init_cb;
ad950360
BVA		 3901 icb->request_q_outpointer = cpu_to_le16(0);
3902 icb->response_q_inpointer = cpu_to_le16(0);
e315cd28
AC		 3903 icb->request_q_length = cpu_to_le16(req->length);
3904 icb->response_q_length = cpu_to_le16(rsp->length);
3905 icb->request_q_address[0] = cpu_to_le32(LSD(req->dma));
3906 icb->request_q_address[1] = cpu_to_le32(MSD(req->dma));
3907 icb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma));
3908 icb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma));
0107109e 3909
2d70c103 3910 /* Setup ATIO queue dma pointers for target mode */
ad950360 3911 icb->atio_q_inpointer = cpu_to_le16(0);
2d70c103
NB		 3912 icb->atio_q_length = cpu_to_le16(ha->tgt.atio_q_length);
3913 icb->atio_q_address[0] = cpu_to_le32(LSD(ha->tgt.atio_dma));
3914 icb->atio_q_address[1] = cpu_to_le32(MSD(ha->tgt.atio_dma));
3915
7c6300e3 3916 if (IS_SHADOW_REG_CAPABLE(ha))
ad950360 3917 icb->firmware_options_2 |= cpu_to_le32(BIT_30|BIT_29);
7c6300e3 3918
f73cb695 3919 if (ha->mqenable || IS_QLA83XX(ha) || IS_QLA27XX(ha)) {
ad950360
BVA		 3920 icb->qos = cpu_to_le16(QLA_DEFAULT_QUE_QOS);
3921 icb->rid = cpu_to_le16(rid);
73208dfd
AC		 3922 if (ha->flags.msix_enabled) {
3923 msix = &ha->msix_entries[1];
83548fe2 3924 ql_dbg(ql_dbg_init, vha, 0x0019,
7c3df132
SK		 3925 "Registering vector 0x%x for base que.\n",
3926 msix->entry);
73208dfd
AC		 3927 icb->msix = cpu_to_le16(msix->entry);
3928 }
3929 /* Use alternate PCI bus number */
3930 if (MSB(rid))
ad950360 3931 icb->firmware_options_2 |= cpu_to_le32(BIT_19);
73208dfd
AC		 3932 /* Use alternate PCI devfn */
3933 if (LSB(rid))
ad950360 3934 icb->firmware_options_2 |= cpu_to_le32(BIT_18);
73208dfd 3935
3155754a 3936 /* Use Disable MSIX Handshake mode for capable adapters */
6246b8a1
GM		 3937 if ((ha->fw_attributes & BIT_6) && (IS_MSIX_NACK_CAPABLE(ha)) &&
3938 (ha->flags.msix_enabled)) {
ad950360 3939 icb->firmware_options_2 &= cpu_to_le32(~BIT_22);
3155754a 3940 ha->flags.disable_msix_handshake = 1;
7c3df132
SK		 3941 ql_dbg(ql_dbg_init, vha, 0x00fe,
3942 "MSIX Handshake Disable Mode turned on.\n");
3155754a 3943 } else {
ad950360 3944 icb->firmware_options_2 |= cpu_to_le32(BIT_22);
3155754a 3945 }
ad950360 3946 icb->firmware_options_2 |= cpu_to_le32(BIT_23);
73208dfd
AC		 3947
3948 WRT_REG_DWORD(&reg->isp25mq.req_q_in, 0);
3949 WRT_REG_DWORD(&reg->isp25mq.req_q_out, 0);
3950 WRT_REG_DWORD(&reg->isp25mq.rsp_q_in, 0);
3951 WRT_REG_DWORD(&reg->isp25mq.rsp_q_out, 0);
3952 } else {
3953 WRT_REG_DWORD(&reg->isp24.req_q_in, 0);
3954 WRT_REG_DWORD(&reg->isp24.req_q_out, 0);
3955 WRT_REG_DWORD(&reg->isp24.rsp_q_in, 0);
3956 WRT_REG_DWORD(&reg->isp24.rsp_q_out, 0);
3957 }
aa230bc5 3958 qlt_24xx_config_rings(vha);
2d70c103 3959
73208dfd
AC		 3960 /* PCI posting */
3961 RD_REG_DWORD(&ioreg->hccr);
0107109e
AV		 3962}
3963
1da177e4
LT		 3964/**
3965 * qla2x00_init_rings() - Initializes firmware.
2db6228d 3966 * @vha: HA context
1da177e4
LT		 3967 *
3968 * Beginning of request ring has initialization control block already built
3969 * by nvram config routine.
3970 *
3971 * Returns 0 on success.
3972 */
8ae6d9c7 3973int
e315cd28 3974qla2x00_init_rings(scsi_qla_host_t *vha)
1da177e4
LT		 3975{
3976 int rval;
3977 unsigned long flags = 0;
29bdccbe 3978 int cnt, que;
e315cd28 3979 struct qla_hw_data *ha = vha->hw;
29bdccbe
AC		 3980 struct req_que *req;
3981 struct rsp_que *rsp;
2c3dfe3f
SJ		 3982 struct mid_init_cb_24xx *mid_init_cb =
3983 (struct mid_init_cb_24xx *) ha->init_cb;
1da177e4
LT		 3984
3985 spin_lock_irqsave(&ha->hardware_lock, flags);
3986
3987 /* Clear outstanding commands array. */
2afa19a9 3988 for (que = 0; que < ha->max_req_queues; que++) {
29bdccbe 3989 req = ha->req_q_map[que];
cb43285f 3990 if (!req || !test_bit(que, ha->req_qid_map))
29bdccbe 3991 continue;
7c6300e3
JC		 3992 req->out_ptr = (void *)(req->ring + req->length);
3993 *req->out_ptr = 0;
8d93f550 3994 for (cnt = 1; cnt < req->num_outstanding_cmds; cnt++)
29bdccbe 3995 req->outstanding_cmds[cnt] = NULL;
1da177e4 3996
2afa19a9 3997 req->current_outstanding_cmd = 1;
1da177e4 3998
29bdccbe
AC		 3999 /* Initialize firmware. */
4000 req->ring_ptr = req->ring;
4001 req->ring_index = 0;
4002 req->cnt = req->length;
4003 }
1da177e4 4004
2afa19a9 4005 for (que = 0; que < ha->max_rsp_queues; que++) {
29bdccbe 4006 rsp = ha->rsp_q_map[que];
cb43285f 4007 if (!rsp || !test_bit(que, ha->rsp_qid_map))
29bdccbe 4008 continue;
7c6300e3
JC		 4009 rsp->in_ptr = (void *)(rsp->ring + rsp->length);
4010 *rsp->in_ptr = 0;
29bdccbe 4011 /* Initialize response queue entries */
8ae6d9c7
GM		 4012 if (IS_QLAFX00(ha))
4013 qlafx00_init_response_q_entries(rsp);
4014 else
4015 qla2x00_init_response_q_entries(rsp);
29bdccbe 4016 }
1da177e4 4017
2d70c103
NB		 4018 ha->tgt.atio_ring_ptr = ha->tgt.atio_ring;
4019 ha->tgt.atio_ring_index = 0;
4020 /* Initialize ATIO queue entries */
4021 qlt_init_atio_q_entries(vha);
4022
e315cd28 4023 ha->isp_ops->config_rings(vha);
1da177e4
LT		 4024
4025 spin_unlock_irqrestore(&ha->hardware_lock, flags);
4026
8ae6d9c7
GM		 4027 ql_dbg(ql_dbg_init, vha, 0x00d1, "Issue init firmware.\n");
4028
4029 if (IS_QLAFX00(ha)) {
4030 rval = qlafx00_init_firmware(vha, ha->init_cb_size);
4031 goto next_check;
4032 }
4033
1da177e4 4034 /* Update any ISP specific firmware options before initialization. */
e315cd28 4035 ha->isp_ops->update_fw_options(vha);
1da177e4 4036
605aa2bc 4037 if (ha->flags.npiv_supported) {
45980cc2 4038 if (ha->operating_mode == LOOP && !IS_CNA_CAPABLE(ha))
605aa2bc 4039 ha->max_npiv_vports = MIN_MULTI_ID_FABRIC - 1;
c48339de 4040 mid_init_cb->count = cpu_to_le16(ha->max_npiv_vports);
605aa2bc
LC		 4041 }
4042
24a08138 4043 if (IS_FWI2_CAPABLE(ha)) {
ad950360 4044 mid_init_cb->options = cpu_to_le16(BIT_1);
24a08138 4045 mid_init_cb->init_cb.execution_throttle =
03e8c680 4046 cpu_to_le16(ha->cur_fw_xcb_count);
40f3862b
JC		 4047 ha->flags.dport_enabled =
4048 (mid_init_cb->init_cb.firmware_options_1 & BIT_7) != 0;
4049 ql_dbg(ql_dbg_init, vha, 0x0191, "DPORT Support: %s.\n",
4050 (ha->flags.dport_enabled) ? "enabled" : "disabled");
4051 /* FA-WWPN Status */
2486c627 4052 ha->flags.fawwpn_enabled =
40f3862b 4053 (mid_init_cb->init_cb.firmware_options_1 & BIT_6) != 0;
83548fe2 4054 ql_dbg(ql_dbg_init, vha, 0x00bc, "FA-WWPN Support: %s.\n",
2486c627 4055 (ha->flags.fawwpn_enabled) ? "enabled" : "disabled");
24a08138 4056 }
2c3dfe3f 4057
e315cd28 4058 rval = qla2x00_init_firmware(vha, ha->init_cb_size);
8ae6d9c7 4059next_check:
1da177e4 4060 if (rval) {
7c3df132
SK		 4061 ql_log(ql_log_fatal, vha, 0x00d2,
4062 "Init Firmware **** FAILED ****.\n");
1da177e4 4063 } else {
7c3df132
SK		 4064 ql_dbg(ql_dbg_init, vha, 0x00d3,
4065 "Init Firmware -- success.\n");
4b60c827 4066 QLA_FW_STARTED(ha);
0645cb83 4067 vha->u_ql2xexchoffld = vha->u_ql2xiniexchg = 0;
1da177e4
LT		 4068 }
4069
4070 return (rval);
4071}
4072
4073/**
4074 * qla2x00_fw_ready() - Waits for firmware ready.
2db6228d 4075 * @vha: HA context
1da177e4
LT		 4076 *
4077 * Returns 0 on success.
4078 */
4079static int
e315cd28 4080qla2x00_fw_ready(scsi_qla_host_t *vha)
1da177e4
LT		 4081{
4082 int rval;
4d4df193 4083 unsigned long wtime, mtime, cs84xx_time;
1da177e4
LT		 4084 uint16_t min_wait; /* Minimum wait time if loop is down */
4085 uint16_t wait_time; /* Wait time if loop is coming ready */
b5a340dd 4086 uint16_t state[6];
e315cd28 4087 struct qla_hw_data *ha = vha->hw;
1da177e4 4088
8ae6d9c7
GM		 4089 if (IS_QLAFX00(vha->hw))
4090 return qlafx00_fw_ready(vha);
4091
1da177e4
LT		 4092 rval = QLA_SUCCESS;
4093
33461491
CD		 4094 /* Time to wait for loop down */
4095 if (IS_P3P_TYPE(ha))
4096 min_wait = 30;
4097 else
4098 min_wait = 20;
1da177e4
LT		 4099
4100 /*
4101 * Firmware should take at most one RATOV to login, plus 5 seconds for
4102 * our own processing.
4103 */
4104 if ((wait_time = (ha->retry_count*ha->login_timeout) + 5) < min_wait) {
4105 wait_time = min_wait;
4106 }
4107
4108 /* Min wait time if loop down */
4109 mtime = jiffies + (min_wait * HZ);
4110
4111 /* wait time before firmware ready */
4112 wtime = jiffies + (wait_time * HZ);
4113
4114 /* Wait for ISP to finish LIP */
e315cd28 4115 if (!vha->flags.init_done)
7c3df132
SK		 4116 ql_log(ql_log_info, vha, 0x801e,
4117 "Waiting for LIP to complete.\n");
1da177e4
LT		 4118
4119 do {
5b939038 4120 memset(state, -1, sizeof(state));
e315cd28 4121 rval = qla2x00_get_firmware_state(vha, state);
1da177e4 4122 if (rval == QLA_SUCCESS) {
4d4df193 4123 if (state[0] < FSTATE_LOSS_OF_SYNC) {
e315cd28 4124 vha->device_flags &= ~DFLG_NO_CABLE;
1da177e4 4125 }
4d4df193 4126 if (IS_QLA84XX(ha) && state[0] != FSTATE_READY) {
7c3df132
SK		 4127 ql_dbg(ql_dbg_taskm, vha, 0x801f,
4128 "fw_state=%x 84xx=%x.\n", state[0],
4129 state[2]);
4d4df193
HK		 4130 if ((state[2] & FSTATE_LOGGED_IN) &&
4131 (state[2] & FSTATE_WAITING_FOR_VERIFY)) {
7c3df132
SK		 4132 ql_dbg(ql_dbg_taskm, vha, 0x8028,
4133 "Sending verify iocb.\n");
4d4df193
HK		 4134
4135 cs84xx_time = jiffies;
e315cd28 4136 rval = qla84xx_init_chip(vha);
7c3df132
SK		 4137 if (rval != QLA_SUCCESS) {
4138 ql_log(ql_log_warn,
cfb0919c 4139 vha, 0x8007,
7c3df132 4140 "Init chip failed.\n");
4d4df193 4141 break;
7c3df132 4142 }
4d4df193
HK		 4143
4144 /* Add time taken to initialize. */
4145 cs84xx_time = jiffies - cs84xx_time;
4146 wtime += cs84xx_time;
4147 mtime += cs84xx_time;
cfb0919c 4148 ql_dbg(ql_dbg_taskm, vha, 0x8008,
7c3df132
SK		 4149 "Increasing wait time by %ld. "
4150 "New time %ld.\n", cs84xx_time,
4151 wtime);
4d4df193
HK		 4152 }
4153 } else if (state[0] == FSTATE_READY) {
7c3df132
SK		 4154 ql_dbg(ql_dbg_taskm, vha, 0x8037,
4155 "F/W Ready - OK.\n");
1da177e4 4156
e315cd28 4157 qla2x00_get_retry_cnt(vha, &ha->retry_count,
1da177e4
LT		 4158 &ha->login_timeout, &ha->r_a_tov);
4159
4160 rval = QLA_SUCCESS;
4161 break;
4162 }
4163
4164 rval = QLA_FUNCTION_FAILED;
4165
e315cd28 4166 if (atomic_read(&vha->loop_down_timer) &&
4d4df193 4167 state[0] != FSTATE_READY) {
1da177e4 4168 /* Loop down. Timeout on min_wait for states
fa2a1ce5
AV		 4169 * other than Wait for Login.
4170 */
1da177e4 4171 if (time_after_eq(jiffies, mtime)) {
7c3df132 4172 ql_log(ql_log_info, vha, 0x8038,
1da177e4
LT		 4173 "Cable is unplugged...\n");
4174
e315cd28 4175 vha->device_flags |= DFLG_NO_CABLE;
1da177e4
LT		 4176 break;
4177 }
4178 }
4179 } else {
4180 /* Mailbox cmd failed. Timeout on min_wait. */
cdbb0a4f 4181 if (time_after_eq(jiffies, mtime) ||
7190575f 4182 ha->flags.isp82xx_fw_hung)
1da177e4
LT		 4183 break;
4184 }
4185
4186 if (time_after_eq(jiffies, wtime))
4187 break;
4188
4189 /* Delay for a while */
4190 msleep(500);
1da177e4
LT		 4191 } while (1);
4192
7c3df132 4193 ql_dbg(ql_dbg_taskm, vha, 0x803a,
b5a340dd
JC		 4194 "fw_state=%x (%x, %x, %x, %x %x) curr time=%lx.\n", state[0],
4195 state[1], state[2], state[3], state[4], state[5], jiffies);
1da177e4 4196
cfb0919c 4197 if (rval && !(vha->device_flags & DFLG_NO_CABLE)) {
7c3df132
SK		 4198 ql_log(ql_log_warn, vha, 0x803b,
4199 "Firmware ready **** FAILED ****.\n");
1da177e4
LT		 4200 }
4201
4202 return (rval);
4203}
4204
4205/*
4206* qla2x00_configure_hba
4207* Setup adapter context.
4208*
4209* Input:
4210* ha = adapter state pointer.
4211*
4212* Returns:
4213* 0 = success
4214*
4215* Context:
4216* Kernel context.
4217*/
4218static int
e315cd28 4219qla2x00_configure_hba(scsi_qla_host_t *vha)
1da177e4
LT		 4220{
4221 int rval;
4222 uint16_t loop_id;
4223 uint16_t topo;
2c3dfe3f 4224 uint16_t sw_cap;
1da177e4
LT		 4225 uint8_t al_pa;
4226 uint8_t area;
4227 uint8_t domain;
4228 char connect_type[22];
e315cd28 4229 struct qla_hw_data *ha = vha->hw;
61e1b269 4230 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
482c9dc7 4231 port_id_t id;
9d1aa4e1 4232 unsigned long flags;
1da177e4
LT		 4233
4234 /* Get host addresses. */
e315cd28 4235 rval = qla2x00_get_adapter_id(vha,
2c3dfe3f 4236 &loop_id, &al_pa, &area, &domain, &topo, &sw_cap);
1da177e4 4237 if (rval != QLA_SUCCESS) {
e315cd28 4238 if (LOOP_TRANSITION(vha) || atomic_read(&ha->loop_down_timer) ||
6246b8a1 4239 IS_CNA_CAPABLE(ha) ||
33135aa2 4240 (rval == QLA_COMMAND_ERROR && loop_id == 0x7)) {
7c3df132
SK		 4241 ql_dbg(ql_dbg_disc, vha, 0x2008,
4242 "Loop is in a transition state.\n");
33135aa2 4243 } else {
7c3df132
SK		 4244 ql_log(ql_log_warn, vha, 0x2009,
4245 "Unable to get host loop ID.\n");
61e1b269
JC		 4246 if (IS_FWI2_CAPABLE(ha) && (vha == base_vha) &&
4247 (rval == QLA_COMMAND_ERROR && loop_id == 0x1b)) {
4248 ql_log(ql_log_warn, vha, 0x1151,
4249 "Doing link init.\n");
4250 if (qla24xx_link_initialize(vha) == QLA_SUCCESS)
4251 return rval;
4252 }
e315cd28 4253 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
33135aa2 4254 }
1da177e4
LT		 4255 return (rval);
4256 }
4257
4258 if (topo == 4) {
7c3df132
SK		 4259 ql_log(ql_log_info, vha, 0x200a,
4260 "Cannot get topology - retrying.\n");
1da177e4
LT		 4261 return (QLA_FUNCTION_FAILED);
4262 }
4263
e315cd28 4264 vha->loop_id = loop_id;
1da177e4
LT		 4265
4266 /* initialize */
4267 ha->min_external_loopid = SNS_FIRST_LOOP_ID;
4268 ha->operating_mode = LOOP;
2c3dfe3f 4269 ha->switch_cap = 0;
1da177e4
LT		 4270
4271 switch (topo) {
4272 case 0:
7c3df132 4273 ql_dbg(ql_dbg_disc, vha, 0x200b, "HBA in NL topology.\n");
1da177e4
LT		 4274 ha->current_topology = ISP_CFG_NL;
4275 strcpy(connect_type, "(Loop)");
4276 break;
4277
4278 case 1:
7c3df132 4279 ql_dbg(ql_dbg_disc, vha, 0x200c, "HBA in FL topology.\n");
2c3dfe3f 4280 ha->switch_cap = sw_cap;
1da177e4
LT		 4281 ha->current_topology = ISP_CFG_FL;
4282 strcpy(connect_type, "(FL_Port)");
4283 break;
4284
4285 case 2:
7c3df132 4286 ql_dbg(ql_dbg_disc, vha, 0x200d, "HBA in N P2P topology.\n");
1da177e4
LT		 4287 ha->operating_mode = P2P;
4288 ha->current_topology = ISP_CFG_N;
4289 strcpy(connect_type, "(N_Port-to-N_Port)");
4290 break;
4291
4292 case 3:
7c3df132 4293 ql_dbg(ql_dbg_disc, vha, 0x200e, "HBA in F P2P topology.\n");
2c3dfe3f 4294 ha->switch_cap = sw_cap;
1da177e4
LT		 4295 ha->operating_mode = P2P;
4296 ha->current_topology = ISP_CFG_F;
4297 strcpy(connect_type, "(F_Port)");
4298 break;
4299
4300 default:
7c3df132
SK		 4301 ql_dbg(ql_dbg_disc, vha, 0x200f,
4302 "HBA in unknown topology %x, using NL.\n", topo);
1da177e4
LT		 4303 ha->current_topology = ISP_CFG_NL;
4304 strcpy(connect_type, "(Loop)");
4305 break;
4306 }
4307
4308 /* Save Host port and loop ID. */
4309 /* byte order - Big Endian */
482c9dc7
QT		 4310 id.b.domain = domain;
4311 id.b.area = area;
4312 id.b.al_pa = al_pa;
4313 id.b.rsvd_1 = 0;
9d1aa4e1 4314 spin_lock_irqsave(&ha->hardware_lock, flags);
8777e431
QT		 4315 if (!(topo == 2 && ha->flags.n2n_bigger))
4316 qlt_update_host_map(vha, id);
9d1aa4e1 4317 spin_unlock_irqrestore(&ha->hardware_lock, flags);
2d70c103 4318
e315cd28 4319 if (!vha->flags.init_done)
7c3df132
SK		 4320 ql_log(ql_log_info, vha, 0x2010,
4321 "Topology - %s, Host Loop address 0x%x.\n",
e315cd28 4322 connect_type, vha->loop_id);
1da177e4 4323
1da177e4
LT		 4324 return(rval);
4325}
4326
a9083016 4327inline void
e315cd28
AC		 4328qla2x00_set_model_info(scsi_qla_host_t *vha, uint8_t *model, size_t len,
4329 char *def)
9bb9fcf2
AV		 4330{
4331 char *st, *en;
4332 uint16_t index;
e315cd28 4333 struct qla_hw_data *ha = vha->hw;
ab671149 4334 int use_tbl = !IS_QLA24XX_TYPE(ha) && !IS_QLA25XX(ha) &&
6246b8a1 4335 !IS_CNA_CAPABLE(ha) && !IS_QLA2031(ha);
9bb9fcf2
AV		 4336
4337 if (memcmp(model, BINZERO, len) != 0) {
4338 strncpy(ha->model_number, model, len);
4339 st = en = ha->model_number;
4340 en += len - 1;
4341 while (en > st) {
4342 if (*en != 0x20 && *en != 0x00)
4343 break;
4344 *en-- = '\0';
4345 }
4346
4347 index = (ha->pdev->subsystem_device & 0xff);
7d0dba17
AV		 4348 if (use_tbl &&
4349 ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC &&
9bb9fcf2 4350 index < QLA_MODEL_NAMES)
1ee27146
JC		 4351 strncpy(ha->model_desc,
4352 qla2x00_model_name[index * 2 + 1],
4353 sizeof(ha->model_desc) - 1);
9bb9fcf2
AV		 4354 } else {
4355 index = (ha->pdev->subsystem_device & 0xff);
7d0dba17
AV		 4356 if (use_tbl &&
4357 ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC &&
9bb9fcf2
AV		 4358 index < QLA_MODEL_NAMES) {
4359 strcpy(ha->model_number,
4360 qla2x00_model_name[index * 2]);
1ee27146
JC		 4361 strncpy(ha->model_desc,
4362 qla2x00_model_name[index * 2 + 1],
4363 sizeof(ha->model_desc) - 1);
9bb9fcf2
AV		 4364 } else {
4365 strcpy(ha->model_number, def);
4366 }
4367 }
1ee27146 4368 if (IS_FWI2_CAPABLE(ha))
e315cd28 4369 qla2xxx_get_vpd_field(vha, "\x82", ha->model_desc,
1ee27146 4370 sizeof(ha->model_desc));
9bb9fcf2
AV		 4371}
4372
4e08df3f
DM		 4373/* On sparc systems, obtain port and node WWN from firmware
4374 * properties.
4375 */
e315cd28 4376static void qla2xxx_nvram_wwn_from_ofw(scsi_qla_host_t *vha, nvram_t *nv)
4e08df3f
DM		 4377{
4378#ifdef CONFIG_SPARC
e315cd28 4379 struct qla_hw_data *ha = vha->hw;
4e08df3f 4380 struct pci_dev *pdev = ha->pdev;
15576bc8
DM		 4381 struct device_node *dp = pci_device_to_OF_node(pdev);
4382 const u8 *val;
4e08df3f
DM		 4383 int len;
4384
4385 val = of_get_property(dp, "port-wwn", &len);
4386 if (val && len >= WWN_SIZE)
4387 memcpy(nv->port_name, val, WWN_SIZE);
4388
4389 val = of_get_property(dp, "node-wwn", &len);
4390 if (val && len >= WWN_SIZE)
4391 memcpy(nv->node_name, val, WWN_SIZE);
4392#endif
4393}
4394
1da177e4
LT		 4395/*
4396* NVRAM configuration for ISP 2xxx
4397*
4398* Input:
4399* ha = adapter block pointer.
4400*
4401* Output:
4402* initialization control block in response_ring
4403* host adapters parameters in host adapter block
4404*
4405* Returns:
4406* 0 = success.
4407*/
abbd8870 4408int
e315cd28 4409qla2x00_nvram_config(scsi_qla_host_t *vha)
1da177e4 4410{
4e08df3f 4411 int rval;
0107109e
AV		 4412 uint8_t chksum = 0;
4413 uint16_t cnt;
4414 uint8_t *dptr1, *dptr2;
e315cd28 4415 struct qla_hw_data *ha = vha->hw;
0107109e 4416 init_cb_t *icb = ha->init_cb;
281afe19
SJ		 4417 nvram_t *nv = ha->nvram;
4418 uint8_t *ptr = ha->nvram;
3d71644c 4419 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1da177e4 4420
4e08df3f
DM		 4421 rval = QLA_SUCCESS;
4422
1da177e4 4423 /* Determine NVRAM starting address. */
0107109e 4424 ha->nvram_size = sizeof(nvram_t);
1da177e4
LT		 4425 ha->nvram_base = 0;
4426 if (!IS_QLA2100(ha) && !IS_QLA2200(ha) && !IS_QLA2300(ha))
4427 if ((RD_REG_WORD(&reg->ctrl_status) >> 14) == 1)
4428 ha->nvram_base = 0x80;
4429
4430 /* Get NVRAM data and calculate checksum. */
e315cd28 4431 ha->isp_ops->read_nvram(vha, ptr, ha->nvram_base, ha->nvram_size);
0107109e
AV		 4432 for (cnt = 0, chksum = 0; cnt < ha->nvram_size; cnt++)
4433 chksum += *ptr++;
1da177e4 4434
7c3df132
SK		 4435 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x010f,
4436 "Contents of NVRAM.\n");
4437 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0110,
4438 (uint8_t *)nv, ha->nvram_size);
1da177e4
LT		 4439
4440 /* Bad NVRAM data, set defaults parameters. */
4441 if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' ||
4442 nv->id[2] != 'P' || nv->id[3] != ' ' || nv->nvram_version < 1) {
4443 /* Reset NVRAM data. */
7c3df132 4444 ql_log(ql_log_warn, vha, 0x0064,
9e336520 4445 "Inconsistent NVRAM "
7c3df132
SK		 4446 "detected: checksum=0x%x id=%c version=0x%x.\n",
4447 chksum, nv->id[0], nv->nvram_version);
4448 ql_log(ql_log_warn, vha, 0x0065,
4449 "Falling back to "
4450 "functioning (yet invalid -- WWPN) defaults.\n");
4e08df3f
DM		 4451
4452 /*
4453 * Set default initialization control block.
4454 */
4455 memset(nv, 0, ha->nvram_size);
4456 nv->parameter_block_version = ICB_VERSION;
4457
4458 if (IS_QLA23XX(ha)) {
4459 nv->firmware_options[0] = BIT_2 | BIT_1;
4460 nv->firmware_options[1] = BIT_7 | BIT_5;
4461 nv->add_firmware_options[0] = BIT_5;
4462 nv->add_firmware_options[1] = BIT_5 | BIT_4;
98aee70d 4463 nv->frame_payload_size = 2048;
4e08df3f
DM		 4464 nv->special_options[1] = BIT_7;
4465 } else if (IS_QLA2200(ha)) {
4466 nv->firmware_options[0] = BIT_2 | BIT_1;
4467 nv->firmware_options[1] = BIT_7 | BIT_5;
4468 nv->add_firmware_options[0] = BIT_5;
4469 nv->add_firmware_options[1] = BIT_5 | BIT_4;
98aee70d 4470 nv->frame_payload_size = 1024;
4e08df3f
DM		 4471 } else if (IS_QLA2100(ha)) {
4472 nv->firmware_options[0] = BIT_3 | BIT_1;
4473 nv->firmware_options[1] = BIT_5;
98aee70d 4474 nv->frame_payload_size = 1024;
4e08df3f
DM		 4475 }
4476
ad950360
BVA		 4477 nv->max_iocb_allocation = cpu_to_le16(256);
4478 nv->execution_throttle = cpu_to_le16(16);
4e08df3f
DM		 4479 nv->retry_count = 8;
4480 nv->retry_delay = 1;
4481
4482 nv->port_name[0] = 33;
4483 nv->port_name[3] = 224;
4484 nv->port_name[4] = 139;
4485
e315cd28 4486 qla2xxx_nvram_wwn_from_ofw(vha, nv);
4e08df3f
DM		 4487
4488 nv->login_timeout = 4;
4489
4490 /*
4491 * Set default host adapter parameters
4492 */
4493 nv->host_p[1] = BIT_2;
4494 nv->reset_delay = 5;
4495 nv->port_down_retry_count = 8;
ad950360 4496 nv->max_luns_per_target = cpu_to_le16(8);
4e08df3f
DM		 4497 nv->link_down_timeout = 60;
4498
4499 rval = 1;
1da177e4
LT		 4500 }
4501
4502#if defined(CONFIG_IA64_GENERIC) || defined(CONFIG_IA64_SGI_SN2)
4503 /*
4504 * The SN2 does not provide BIOS emulation which means you can't change
4505 * potentially bogus BIOS settings. Force the use of default settings
4506 * for link rate and frame size. Hope that the rest of the settings
4507 * are valid.
4508 */
4509 if (ia64_platform_is("sn2")) {
98aee70d 4510 nv->frame_payload_size = 2048;
1da177e4
LT		 4511 if (IS_QLA23XX(ha))
4512 nv->special_options[1] = BIT_7;
4513 }
4514#endif
4515
4516 /* Reset Initialization control block */
0107109e 4517 memset(icb, 0, ha->init_cb_size);
1da177e4
LT		 4518
4519 /*
4520 * Setup driver NVRAM options.
4521 */
4522 nv->firmware_options[0] |= (BIT_6 | BIT_1);
4523 nv->firmware_options[0] &= ~(BIT_5 | BIT_4);
4524 nv->firmware_options[1] |= (BIT_5 | BIT_0);
4525 nv->firmware_options[1] &= ~BIT_4;
4526
4527 if (IS_QLA23XX(ha)) {
4528 nv->firmware_options[0] |= BIT_2;
4529 nv->firmware_options[0] &= ~BIT_3;
2d70c103 4530 nv->special_options[0] &= ~BIT_6;
0107109e 4531 nv->add_firmware_options[1] |= BIT_5 | BIT_4;
1da177e4
LT		 4532
4533 if (IS_QLA2300(ha)) {
4534 if (ha->fb_rev == FPM_2310) {
4535 strcpy(ha->model_number, "QLA2310");
4536 } else {
4537 strcpy(ha->model_number, "QLA2300");
4538 }
4539 } else {
e315cd28 4540 qla2x00_set_model_info(vha, nv->model_number,
9bb9fcf2 4541 sizeof(nv->model_number), "QLA23xx");
1da177e4
LT		 4542 }
4543 } else if (IS_QLA2200(ha)) {
4544 nv->firmware_options[0] |= BIT_2;
4545 /*
4546 * 'Point-to-point preferred, else loop' is not a safe
4547 * connection mode setting.
4548 */
4549 if ((nv->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) ==
4550 (BIT_5 | BIT_4)) {
4551 /* Force 'loop preferred, else point-to-point'. */
4552 nv->add_firmware_options[0] &= ~(BIT_6 | BIT_5 | BIT_4);
4553 nv->add_firmware_options[0] |= BIT_5;
4554 }
4555 strcpy(ha->model_number, "QLA22xx");
4556 } else /*if (IS_QLA2100(ha))*/ {
4557 strcpy(ha->model_number, "QLA2100");
4558 }
4559
4560 /*
4561 * Copy over NVRAM RISC parameter block to initialization control block.
4562 */
4563 dptr1 = (uint8_t *)icb;
4564 dptr2 = (uint8_t *)&nv->parameter_block_version;
4565 cnt = (uint8_t *)&icb->request_q_outpointer - (uint8_t *)&icb->version;
4566 while (cnt--)
4567 *dptr1++ = *dptr2++;
4568
4569 /* Copy 2nd half. */
4570 dptr1 = (uint8_t *)icb->add_firmware_options;
4571 cnt = (uint8_t *)icb->reserved_3 - (uint8_t *)icb->add_firmware_options;
4572 while (cnt--)
4573 *dptr1++ = *dptr2++;
0eaaca4c 4574 ha->frame_payload_size = le16_to_cpu(icb->frame_payload_size);
5341e868
AV		 4575 /* Use alternate WWN? */
4576 if (nv->host_p[1] & BIT_7) {
4577 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
4578 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
4579 }
4580
1da177e4
LT		 4581 /* Prepare nodename */
4582 if ((icb->firmware_options[1] & BIT_6) == 0) {
4583 /*
4584 * Firmware will apply the following mask if the nodename was
4585 * not provided.
4586 */
4587 memcpy(icb->node_name, icb->port_name, WWN_SIZE);
4588 icb->node_name[0] &= 0xF0;
4589 }
4590
4591 /*
4592 * Set host adapter parameters.
4593 */
3ce8866c
SK		 4594
4595 /*
4596 * BIT_7 in the host-parameters section allows for modification to
4597 * internal driver logging.
4598 */
0181944f 4599 if (nv->host_p[0] & BIT_7)
cfb0919c 4600 ql2xextended_error_logging = QL_DBG_DEFAULT1_MASK;
1da177e4
LT		 4601 ha->flags.disable_risc_code_load = ((nv->host_p[0] & BIT_4) ? 1 : 0);
4602 /* Always load RISC code on non ISP2[12]00 chips. */
4603 if (!IS_QLA2100(ha) && !IS_QLA2200(ha))
4604 ha->flags.disable_risc_code_load = 0;
4605 ha->flags.enable_lip_reset = ((nv->host_p[1] & BIT_1) ? 1 : 0);
4606 ha->flags.enable_lip_full_login = ((nv->host_p[1] & BIT_2) ? 1 : 0);
4607 ha->flags.enable_target_reset = ((nv->host_p[1] & BIT_3) ? 1 : 0);
06c22bd1 4608 ha->flags.enable_led_scheme = (nv->special_options[1] & BIT_4) ? 1 : 0;
d4c760c2 4609 ha->flags.disable_serdes = 0;
1da177e4
LT		 4610
4611 ha->operating_mode =
4612 (icb->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) >> 4;
4613
4614 memcpy(ha->fw_seriallink_options, nv->seriallink_options,
4615 sizeof(ha->fw_seriallink_options));
4616
4617 /* save HBA serial number */
4618 ha->serial0 = icb->port_name[5];
4619 ha->serial1 = icb->port_name[6];
4620 ha->serial2 = icb->port_name[7];
e315cd28
AC		 4621 memcpy(vha->node_name, icb->node_name, WWN_SIZE);
4622 memcpy(vha->port_name, icb->port_name, WWN_SIZE);
1da177e4 4623
ad950360 4624 icb->execution_throttle = cpu_to_le16(0xFFFF);
1da177e4
LT		 4625
4626 ha->retry_count = nv->retry_count;
4627
4628 /* Set minimum login_timeout to 4 seconds. */
5b91490e 4629 if (nv->login_timeout != ql2xlogintimeout)
1da177e4
LT		 4630 nv->login_timeout = ql2xlogintimeout;
4631 if (nv->login_timeout < 4)
4632 nv->login_timeout = 4;
4633 ha->login_timeout = nv->login_timeout;
1da177e4 4634
00a537b8
AV		 4635 /* Set minimum RATOV to 100 tenths of a second. */
4636 ha->r_a_tov = 100;
1da177e4 4637
1da177e4
LT		 4638 ha->loop_reset_delay = nv->reset_delay;
4639
1da177e4
LT		 4640 /* Link Down Timeout = 0:
4641 *
4642 * When Port Down timer expires we will start returning
4643 * I/O's to OS with "DID_NO_CONNECT".
4644 *
4645 * Link Down Timeout != 0:
4646 *
4647 * The driver waits for the link to come up after link down
4648 * before returning I/Os to OS with "DID_NO_CONNECT".
fa2a1ce5 4649 */
1da177e4
LT		 4650 if (nv->link_down_timeout == 0) {
4651 ha->loop_down_abort_time =
354d6b21 4652 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
1da177e4
LT		 4653 } else {
4654 ha->link_down_timeout = nv->link_down_timeout;
4655 ha->loop_down_abort_time =
4656 (LOOP_DOWN_TIME - ha->link_down_timeout);
fa2a1ce5 4657 }
1da177e4 4658
1da177e4
LT		 4659 /*
4660 * Need enough time to try and get the port back.
4661 */
4662 ha->port_down_retry_count = nv->port_down_retry_count;
4663 if (qlport_down_retry)
4664 ha->port_down_retry_count = qlport_down_retry;
4665 /* Set login_retry_count */
4666 ha->login_retry_count = nv->retry_count;
4667 if (ha->port_down_retry_count == nv->port_down_retry_count &&
4668 ha->port_down_retry_count > 3)
4669 ha->login_retry_count = ha->port_down_retry_count;
4670 else if (ha->port_down_retry_count > (int)ha->login_retry_count)
4671 ha->login_retry_count = ha->port_down_retry_count;
4672 if (ql2xloginretrycount)
4673 ha->login_retry_count = ql2xloginretrycount;
4674
ad950360 4675 icb->lun_enables = cpu_to_le16(0);
1da177e4
LT		 4676 icb->command_resource_count = 0;
4677 icb->immediate_notify_resource_count = 0;
ad950360 4678 icb->timeout = cpu_to_le16(0);
1da177e4
LT		 4679
4680 if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
4681 /* Enable RIO */
4682 icb->firmware_options[0] &= ~BIT_3;
4683 icb->add_firmware_options[0] &=
4684 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0);
4685 icb->add_firmware_options[0] |= BIT_2;
4686 icb->response_accumulation_timer = 3;
4687 icb->interrupt_delay_timer = 5;
4688
e315cd28 4689 vha->flags.process_response_queue = 1;
1da177e4 4690 } else {
4fdfefe5 4691 /* Enable ZIO. */
e315cd28 4692 if (!vha->flags.init_done) {
4fdfefe5
AV		 4693 ha->zio_mode = icb->add_firmware_options[0] &
4694 (BIT_3 | BIT_2 | BIT_1 | BIT_0);
4695 ha->zio_timer = icb->interrupt_delay_timer ?
4696 icb->interrupt_delay_timer: 2;
4697 }
1da177e4
LT		 4698 icb->add_firmware_options[0] &=
4699 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0);
e315cd28 4700 vha->flags.process_response_queue = 0;
4fdfefe5 4701 if (ha->zio_mode != QLA_ZIO_DISABLED) {
4a59f71d 4702 ha->zio_mode = QLA_ZIO_MODE_6;
4703
7c3df132 4704 ql_log(ql_log_info, vha, 0x0068,
4fdfefe5
AV		 4705 "ZIO mode %d enabled; timer delay (%d us).\n",
4706 ha->zio_mode, ha->zio_timer * 100);
1da177e4 4707
4fdfefe5
AV		 4708 icb->add_firmware_options[0] |= (uint8_t)ha->zio_mode;
4709 icb->interrupt_delay_timer = (uint8_t)ha->zio_timer;
e315cd28 4710 vha->flags.process_response_queue = 1;
1da177e4
LT		 4711 }
4712 }
4713
4e08df3f 4714 if (rval) {
7c3df132
SK		 4715 ql_log(ql_log_warn, vha, 0x0069,
4716 "NVRAM configuration failed.\n");
4e08df3f
DM		 4717 }
4718 return (rval);
1da177e4
LT		 4719}
4720
19a7b4ae
JSEC		 4721static void
4722qla2x00_rport_del(void *data)
4723{
4724 fc_port_t *fcport = data;
d97994dc 4725 struct fc_rport *rport;
044d78e1 4726 unsigned long flags;
d97994dc 4727
044d78e1 4728 spin_lock_irqsave(fcport->vha->host->host_lock, flags);
ac280b67 4729 rport = fcport->drport ? fcport->drport: fcport->rport;
d97994dc 4730 fcport->drport = NULL;
044d78e1 4731 spin_unlock_irqrestore(fcport->vha->host->host_lock, flags);
726b8548 4732 if (rport) {
83548fe2
QT		 4733 ql_dbg(ql_dbg_disc, fcport->vha, 0x210b,
4734 "%s %8phN. rport %p roles %x\n",
4735 __func__, fcport->port_name, rport,
4736 rport->roles);
726b8548 4737
d97994dc 4738 fc_remote_port_delete(rport);
726b8548 4739 }
19a7b4ae
JSEC		 4740}
4741
1da177e4
LT		 4742/**
4743 * qla2x00_alloc_fcport() - Allocate a generic fcport.
2db6228d 4744 * @vha: HA context
1da177e4
LT		 4745 * @flags: allocation flags
4746 *
4747 * Returns a pointer to the allocated fcport, or NULL, if none available.
4748 */
9a069e19 4749fc_port_t *
e315cd28 4750qla2x00_alloc_fcport(scsi_qla_host_t *vha, gfp_t flags)
1da177e4
LT		 4751{
4752 fc_port_t *fcport;
4753
bbfbbbc1
MK		 4754 fcport = kzalloc(sizeof(fc_port_t), flags);
4755 if (!fcport)
4756 return NULL;
1da177e4
LT		 4757
4758 /* Setup fcport template structure. */
e315cd28 4759 fcport->vha = vha;
1da177e4
LT		 4760 fcport->port_type = FCT_UNKNOWN;
4761 fcport->loop_id = FC_NO_LOOP_ID;
ec426e10 4762 qla2x00_set_fcport_state(fcport, FCS_UNCONFIGURED);
ad3e0eda 4763 fcport->supported_classes = FC_COS_UNSPECIFIED;
f635e48e 4764 fcport->fp_speed = PORT_SPEED_UNKNOWN;
1da177e4 4765
726b8548
QT		 4766 fcport->ct_desc.ct_sns = dma_alloc_coherent(&vha->hw->pdev->dev,
4767 sizeof(struct ct_sns_pkt), &fcport->ct_desc.ct_sns_dma,
6cb3216a 4768 flags);
726b8548
QT		 4769 fcport->disc_state = DSC_DELETED;
4770 fcport->fw_login_state = DSC_LS_PORT_UNAVAIL;
4771 fcport->deleted = QLA_SESS_DELETED;
4772 fcport->login_retry = vha->hw->login_retry_count;
726b8548
QT		 4773 fcport->logout_on_delete = 1;
4774
4775 if (!fcport->ct_desc.ct_sns) {
83548fe2 4776 ql_log(ql_log_warn, vha, 0xd049,
726b8548
QT		 4777 "Failed to allocate ct_sns request.\n");
4778 kfree(fcport);
4779 fcport = NULL;
4780 }
4781 INIT_WORK(&fcport->del_work, qla24xx_delete_sess_fn);
cd4ed6b4 4782 INIT_WORK(&fcport->reg_work, qla_register_fcport_fn);
726b8548
QT		 4783 INIT_LIST_HEAD(&fcport->gnl_entry);
4784 INIT_LIST_HEAD(&fcport->list);
4785
bbfbbbc1 4786 return fcport;
1da177e4
LT		 4787}
4788
726b8548
QT		 4789void
4790qla2x00_free_fcport(fc_port_t *fcport)
4791{
4792 if (fcport->ct_desc.ct_sns) {
4793 dma_free_coherent(&fcport->vha->hw->pdev->dev,
4794 sizeof(struct ct_sns_pkt), fcport->ct_desc.ct_sns,
4795 fcport->ct_desc.ct_sns_dma);
4796
4797 fcport->ct_desc.ct_sns = NULL;
4798 }
4799 kfree(fcport);
4800}
4801
1da177e4
LT		 4802/*
4803 * qla2x00_configure_loop
4804 * Updates Fibre Channel Device Database with what is actually on loop.
4805 *
4806 * Input:
4807 * ha = adapter block pointer.
4808 *
4809 * Returns:
4810 * 0 = success.
4811 * 1 = error.
4812 * 2 = database was full and device was not configured.
4813 */
4814static int
e315cd28 4815qla2x00_configure_loop(scsi_qla_host_t *vha)
1da177e4
LT		 4816{
4817 int rval;
4818 unsigned long flags, save_flags;
e315cd28 4819 struct qla_hw_data *ha = vha->hw;
1da177e4
LT		 4820 rval = QLA_SUCCESS;
4821
4822 /* Get Initiator ID */
e315cd28
AC		 4823 if (test_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags)) {
4824 rval = qla2x00_configure_hba(vha);
1da177e4 4825 if (rval != QLA_SUCCESS) {
7c3df132
SK		 4826 ql_dbg(ql_dbg_disc, vha, 0x2013,
4827 "Unable to configure HBA.\n");
1da177e4
LT		 4828 return (rval);
4829 }
4830 }
4831
e315cd28 4832 save_flags = flags = vha->dpc_flags;
7c3df132
SK		 4833 ql_dbg(ql_dbg_disc, vha, 0x2014,
4834 "Configure loop -- dpc flags = 0x%lx.\n", flags);
1da177e4
LT		 4835
4836 /*
4837 * If we have both an RSCN and PORT UPDATE pending then handle them
4838 * both at the same time.
4839 */
e315cd28
AC		 4840 clear_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
4841 clear_bit(RSCN_UPDATE, &vha->dpc_flags);
1da177e4 4842
3064ff39
MH		 4843 qla2x00_get_data_rate(vha);
4844
1da177e4
LT		 4845 /* Determine what we need to do */
4846 if (ha->current_topology == ISP_CFG_FL &&
4847 (test_bit(LOCAL_LOOP_UPDATE, &flags))) {
4848
1da177e4
LT		 4849 set_bit(RSCN_UPDATE, &flags);
4850
4851 } else if (ha->current_topology == ISP_CFG_F &&
4852 (test_bit(LOCAL_LOOP_UPDATE, &flags))) {
4853
1da177e4
LT		 4854 set_bit(RSCN_UPDATE, &flags);
4855 clear_bit(LOCAL_LOOP_UPDATE, &flags);
21333b48
AV		 4856
4857 } else if (ha->current_topology == ISP_CFG_N) {
4858 clear_bit(RSCN_UPDATE, &flags);
48acad09
QT		 4859 if (qla_tgt_mode_enabled(vha)) {
4860 /* allow the other side to start the login */
9cd883f0
QT		 4861 clear_bit(LOCAL_LOOP_UPDATE, &flags);
4862 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
9cd883f0 4863 }
41dc529a
QT		 4864 } else if (ha->current_topology == ISP_CFG_NL) {
4865 clear_bit(RSCN_UPDATE, &flags);
4866 set_bit(LOCAL_LOOP_UPDATE, &flags);
e315cd28 4867 } else if (!vha->flags.online ||
1da177e4 4868 (test_bit(ABORT_ISP_ACTIVE, &flags))) {
1da177e4
LT		 4869 set_bit(RSCN_UPDATE, &flags);
4870 set_bit(LOCAL_LOOP_UPDATE, &flags);
4871 }
4872
4873 if (test_bit(LOCAL_LOOP_UPDATE, &flags)) {
7c3df132
SK		 4874 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) {
4875 ql_dbg(ql_dbg_disc, vha, 0x2015,
4876 "Loop resync needed, failing.\n");
1da177e4 4877 rval = QLA_FUNCTION_FAILED;
642ef983 4878 } else
e315cd28 4879 rval = qla2x00_configure_local_loop(vha);
1da177e4
LT		 4880 }
4881
4882 if (rval == QLA_SUCCESS && test_bit(RSCN_UPDATE, &flags)) {
7c3df132 4883 if (LOOP_TRANSITION(vha)) {
83548fe2 4884 ql_dbg(ql_dbg_disc, vha, 0x2099,
7c3df132 4885 "Needs RSCN update and loop transition.\n");
1da177e4 4886 rval = QLA_FUNCTION_FAILED;
7c3df132 4887 }
e315cd28
AC		 4888 else
4889 rval = qla2x00_configure_fabric(vha);
1da177e4
LT		 4890 }
4891
4892 if (rval == QLA_SUCCESS) {
e315cd28
AC		 4893 if (atomic_read(&vha->loop_down_timer) ||
4894 test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) {
1da177e4
LT		 4895 rval = QLA_FUNCTION_FAILED;
4896 } else {
e315cd28 4897 atomic_set(&vha->loop_state, LOOP_READY);
7c3df132
SK		 4898 ql_dbg(ql_dbg_disc, vha, 0x2069,
4899 "LOOP READY.\n");
ec7193e2 4900 ha->flags.fw_init_done = 1;
3bb67df5
DKU		 4901
4902 /*
4903 * Process any ATIO queue entries that came in
4904 * while we weren't online.
4905 */
ead03855
QT		 4906 if (qla_tgt_mode_enabled(vha) ||
4907 qla_dual_mode_enabled(vha)) {
1073daa4
QT		 4908 spin_lock_irqsave(&ha->tgt.atio_lock, flags);
4909 qlt_24xx_process_atio_queue(vha, 0);
4910 spin_unlock_irqrestore(&ha->tgt.atio_lock,
4911 flags);
3bb67df5 4912 }
1da177e4
LT		 4913 }
4914 }
4915
4916 if (rval) {
7c3df132
SK		 4917 ql_dbg(ql_dbg_disc, vha, 0x206a,
4918 "%s *** FAILED ***.\n", __func__);
1da177e4 4919 } else {
7c3df132
SK		 4920 ql_dbg(ql_dbg_disc, vha, 0x206b,
4921 "%s: exiting normally.\n", __func__);
1da177e4
LT		 4922 }
4923
cc3ef7bc 4924 /* Restore state if a resync event occurred during processing */
e315cd28 4925 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) {
1da177e4 4926 if (test_bit(LOCAL_LOOP_UPDATE, &save_flags))
e315cd28 4927 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
f4658b6c 4928 if (test_bit(RSCN_UPDATE, &save_flags)) {
e315cd28 4929 set_bit(RSCN_UPDATE, &vha->dpc_flags);
f4658b6c 4930 }
1da177e4
LT		 4931 }
4932
4933 return (rval);
4934}
4935
1da177e4
LT		 4936/*
4937 * qla2x00_configure_local_loop
4938 * Updates Fibre Channel Device Database with local loop devices.
4939 *
4940 * Input:
4941 * ha = adapter block pointer.
4942 *
4943 * Returns:
4944 * 0 = success.
4945 */
4946static int
e315cd28 4947qla2x00_configure_local_loop(scsi_qla_host_t *vha)
1da177e4
LT		 4948{
4949 int rval, rval2;
4950 int found_devs;
4951 int found;
4952 fc_port_t *fcport, *new_fcport;
4953
4954 uint16_t index;
4955 uint16_t entries;
4956 char *id_iter;
4957 uint16_t loop_id;
4958 uint8_t domain, area, al_pa;
e315cd28 4959 struct qla_hw_data *ha = vha->hw;
41dc529a 4960 unsigned long flags;
1da177e4 4961
8777e431
QT		 4962 /* Inititae N2N login. */
4963 if (test_and_clear_bit(N2N_LOGIN_NEEDED, &vha->dpc_flags)) {
4964 /* borrowing */
4965 u32 *bp, i, sz;
4966
4967 memset(ha->init_cb, 0, ha->init_cb_size);
4968 sz = min_t(int, sizeof(struct els_plogi_payload),
4969 ha->init_cb_size);
4970 rval = qla24xx_get_port_login_templ(vha, ha->init_cb_dma,
4971 (void *)ha->init_cb, sz);
4972 if (rval == QLA_SUCCESS) {
4973 bp = (uint32_t *)ha->init_cb;
4974 for (i = 0; i < sz/4 ; i++, bp++)
4975 *bp = cpu_to_be32(*bp);
4976
4977 memcpy(&ha->plogi_els_payld.data, (void *)ha->init_cb,
4978 sizeof(ha->plogi_els_payld.data));
4979 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
4980 } else {
4981 ql_dbg(ql_dbg_init, vha, 0x00d1,
4982 "PLOGI ELS param read fail.\n");
4983 }
4984 return QLA_SUCCESS;
4985 }
4986
1da177e4
LT		 4987 found_devs = 0;
4988 new_fcport = NULL;
642ef983 4989 entries = MAX_FIBRE_DEVICES_LOOP;
1da177e4 4990
1da177e4 4991 /* Get list of logged in devices. */
642ef983 4992 memset(ha->gid_list, 0, qla2x00_gid_list_size(ha));
e315cd28 4993 rval = qla2x00_get_id_list(vha, ha->gid_list, ha->gid_list_dma,
1da177e4
LT		 4994 &entries);
4995 if (rval != QLA_SUCCESS)
4996 goto cleanup_allocation;
4997
83548fe2 4998 ql_dbg(ql_dbg_disc, vha, 0x2011,
7c3df132
SK		 4999 "Entries in ID list (%d).\n", entries);
5000 ql_dump_buffer(ql_dbg_disc + ql_dbg_buffer, vha, 0x2075,
5001 (uint8_t *)ha->gid_list,
5002 entries * sizeof(struct gid_list_info));
1da177e4 5003
0e324e94
QT		 5004 if (entries == 0) {
5005 spin_lock_irqsave(&vha->work_lock, flags);
5006 vha->scan.scan_retry++;
5007 spin_unlock_irqrestore(&vha->work_lock, flags);
5008
5009 if (vha->scan.scan_retry < MAX_SCAN_RETRIES) {
5010 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
5011 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
5012 }
5013 } else {
5014 vha->scan.scan_retry = 0;
5015 }
5016
9cd883f0
QT		 5017 list_for_each_entry(fcport, &vha->vp_fcports, list) {
5018 fcport->scan_state = QLA_FCPORT_SCAN;
5019 }
5020
1da177e4 5021 /* Allocate temporary fcport for any new fcports discovered. */
e315cd28 5022 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
1da177e4 5023 if (new_fcport == NULL) {
83548fe2 5024 ql_log(ql_log_warn, vha, 0x2012,
7c3df132 5025 "Memory allocation failed for fcport.\n");
1da177e4
LT		 5026 rval = QLA_MEMORY_ALLOC_FAILED;
5027 goto cleanup_allocation;
5028 }
5029 new_fcport->flags &= ~FCF_FABRIC_DEVICE;
5030
1da177e4
LT		 5031 /* Add devices to port list. */
5032 id_iter = (char *)ha->gid_list;
5033 for (index = 0; index < entries; index++) {
5034 domain = ((struct gid_list_info *)id_iter)->domain;
5035 area = ((struct gid_list_info *)id_iter)->area;
5036 al_pa = ((struct gid_list_info *)id_iter)->al_pa;
abbd8870 5037 if (IS_QLA2100(ha) || IS_QLA2200(ha))
1da177e4
LT		 5038 loop_id = (uint16_t)
5039 ((struct gid_list_info *)id_iter)->loop_id_2100;
abbd8870 5040 else
1da177e4
LT		 5041 loop_id = le16_to_cpu(
5042 ((struct gid_list_info *)id_iter)->loop_id);
abbd8870 5043 id_iter += ha->gid_list_info_size;
1da177e4
LT		 5044
5045 /* Bypass reserved domain fields. */
5046 if ((domain & 0xf0) == 0xf0)
5047 continue;
5048
1da177e4
LT		 5049 /* Bypass invalid local loop ID. */
5050 if (loop_id > LAST_LOCAL_LOOP_ID)
5051 continue;
5052
41dc529a 5053 memset(new_fcport->port_name, 0, WWN_SIZE);
370d550e 5054
1da177e4
LT		 5055 /* Fill in member data. */
5056 new_fcport->d_id.b.domain = domain;
5057 new_fcport->d_id.b.area = area;
5058 new_fcport->d_id.b.al_pa = al_pa;
5059 new_fcport->loop_id = loop_id;
9cd883f0 5060 new_fcport->scan_state = QLA_FCPORT_FOUND;
41dc529a 5061
e315cd28 5062 rval2 = qla2x00_get_port_database(vha, new_fcport, 0);
1da177e4 5063 if (rval2 != QLA_SUCCESS) {
83548fe2 5064 ql_dbg(ql_dbg_disc, vha, 0x2097,
7c3df132
SK		 5065 "Failed to retrieve fcport information "
5066 "-- get_port_database=%x, loop_id=0x%04x.\n",
5067 rval2, new_fcport->loop_id);
edd05de1
DG		 5068 /* Skip retry if N2N */
5069 if (ha->current_topology != ISP_CFG_N) {
5070 ql_dbg(ql_dbg_disc, vha, 0x2105,
5071 "Scheduling resync.\n");
5072 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
5073 continue;
5074 }
1da177e4
LT		 5075 }
5076
41dc529a 5077 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
1da177e4
LT		 5078 /* Check for matching device in port list. */
5079 found = 0;
5080 fcport = NULL;
e315cd28 5081 list_for_each_entry(fcport, &vha->vp_fcports, list) {
1da177e4
LT		 5082 if (memcmp(new_fcport->port_name, fcport->port_name,
5083 WWN_SIZE))
5084 continue;
5085
ddb9b126 5086 fcport->flags &= ~FCF_FABRIC_DEVICE;
1da177e4
LT		 5087 fcport->loop_id = new_fcport->loop_id;
5088 fcport->port_type = new_fcport->port_type;
5089 fcport->d_id.b24 = new_fcport->d_id.b24;
5090 memcpy(fcport->node_name, new_fcport->node_name,
5091 WWN_SIZE);
9cd883f0 5092 fcport->scan_state = QLA_FCPORT_FOUND;
1da177e4
LT		 5093 found++;
5094 break;
5095 }
5096
5097 if (!found) {
5098 /* New device, add to fcports list. */
e315cd28 5099 list_add_tail(&new_fcport->list, &vha->vp_fcports);
1da177e4
LT		 5100
5101 /* Allocate a new replacement fcport. */
5102 fcport = new_fcport;
41dc529a
QT		 5103
5104 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
5105
e315cd28 5106 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
41dc529a 5107
1da177e4 5108 if (new_fcport == NULL) {
83548fe2 5109 ql_log(ql_log_warn, vha, 0xd031,
7c3df132 5110 "Failed to allocate memory for fcport.\n");
1da177e4
LT		 5111 rval = QLA_MEMORY_ALLOC_FAILED;
5112 goto cleanup_allocation;
5113 }
41dc529a 5114 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
1da177e4
LT		 5115 new_fcport->flags &= ~FCF_FABRIC_DEVICE;
5116 }
5117
41dc529a
QT		 5118 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
5119
d8b45213 5120 /* Base iIDMA settings on HBA port speed. */
a3cbdfad 5121 fcport->fp_speed = ha->link_data_rate;
d8b45213 5122
1da177e4
LT		 5123 found_devs++;
5124 }
5125
9cd883f0
QT		 5126 list_for_each_entry(fcport, &vha->vp_fcports, list) {
5127 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
5128 break;
5129
5130 if (fcport->scan_state == QLA_FCPORT_SCAN) {
5131 if ((qla_dual_mode_enabled(vha) ||
5132 qla_ini_mode_enabled(vha)) &&
5133 atomic_read(&fcport->state) == FCS_ONLINE) {
5134 qla2x00_mark_device_lost(vha, fcport,
5135 ql2xplogiabsentdevice, 0);
5136 if (fcport->loop_id != FC_NO_LOOP_ID &&
5137 (fcport->flags & FCF_FCP2_DEVICE) == 0 &&
5138 fcport->port_type != FCT_INITIATOR &&
5139 fcport->port_type != FCT_BROADCAST) {
5140 ql_dbg(ql_dbg_disc, vha, 0x20f0,
5141 "%s %d %8phC post del sess\n",
5142 __func__, __LINE__,
5143 fcport->port_name);
5144
d8630bb9 5145 qlt_schedule_sess_for_deletion(fcport);
9cd883f0
QT		 5146 continue;
5147 }
5148 }
5149 }
5150
5151 if (fcport->scan_state == QLA_FCPORT_FOUND)
5152 qla24xx_fcport_handle_login(vha, fcport);
5153 }
5154
1da177e4 5155cleanup_allocation:
c9475cb0 5156 kfree(new_fcport);
1da177e4
LT		 5157
5158 if (rval != QLA_SUCCESS) {
83548fe2 5159 ql_dbg(ql_dbg_disc, vha, 0x2098,
7c3df132 5160 "Configure local loop error exit: rval=%x.\n", rval);
1da177e4
LT		 5161 }
5162
1da177e4
LT		 5163 return (rval);
5164}
5165
d8b45213 5166static void
e315cd28 5167qla2x00_iidma_fcport(scsi_qla_host_t *vha, fc_port_t *fcport)
d8b45213 5168{
d8b45213 5169 int rval;
93f2bd67 5170 uint16_t mb[MAILBOX_REGISTER_COUNT];
e315cd28 5171 struct qla_hw_data *ha = vha->hw;
d8b45213 5172
c76f2c01 5173 if (!IS_IIDMA_CAPABLE(ha))
d8b45213
AV		 5174 return;
5175
c9afb9a2
GM		 5176 if (atomic_read(&fcport->state) != FCS_ONLINE)
5177 return;
5178
39bd9622 5179 if (fcport->fp_speed == PORT_SPEED_UNKNOWN ||
413c2f33
HM		 5180 fcport->fp_speed > ha->link_data_rate ||
5181 !ha->flags.gpsc_supported)
d8b45213
AV		 5182 return;
5183
e315cd28 5184 rval = qla2x00_set_idma_speed(vha, fcport->loop_id, fcport->fp_speed,
a3cbdfad 5185 mb);
d8b45213 5186 if (rval != QLA_SUCCESS) {
7c3df132 5187 ql_dbg(ql_dbg_disc, vha, 0x2004,
7b833558
OK		 5188 "Unable to adjust iIDMA %8phN -- %04x %x %04x %04x.\n",
5189 fcport->port_name, rval, fcport->fp_speed, mb[0], mb[1]);
d8b45213 5190 } else {
7c3df132 5191 ql_dbg(ql_dbg_disc, vha, 0x2005,
33b28357 5192 "iIDMA adjusted to %s GB/s (%X) on %8phN.\n",
d0297c9a 5193 qla2x00_get_link_speed_str(ha, fcport->fp_speed),
33b28357 5194 fcport->fp_speed, fcport->port_name);
d8b45213
AV		 5195 }
5196}
5197
cc28e0ac
QT		 5198void qla_do_iidma_work(struct scsi_qla_host *vha, fc_port_t *fcport)
5199{
5200 qla2x00_iidma_fcport(vha, fcport);
5201 qla24xx_update_fcport_fcp_prio(vha, fcport);
5202}
5203
5204int qla_post_iidma_work(struct scsi_qla_host *vha, fc_port_t *fcport)
5205{
5206 struct qla_work_evt *e;
5207
5208 e = qla2x00_alloc_work(vha, QLA_EVT_IIDMA);
5209 if (!e)
5210 return QLA_FUNCTION_FAILED;
5211
5212 e->u.fcport.fcport = fcport;
5213 return qla2x00_post_work(vha, e);
5214}
5215
726b8548 5216/* qla2x00_reg_remote_port is reserved for Initiator Mode only.*/
23be331d 5217static void
e315cd28 5218qla2x00_reg_remote_port(scsi_qla_host_t *vha, fc_port_t *fcport)
8482e118 5219{
5220 struct fc_rport_identifiers rport_ids;
bdf79621 5221 struct fc_rport *rport;
044d78e1 5222 unsigned long flags;
8482e118 5223
b63d8b89
QT		 5224 if (atomic_read(&fcport->state) == FCS_ONLINE)
5225 return;
5226
f8b02a85
AV		 5227 rport_ids.node_name = wwn_to_u64(fcport->node_name);
5228 rport_ids.port_name = wwn_to_u64(fcport->port_name);
8482e118 5229 rport_ids.port_id = fcport->d_id.b.domain << 16 |
5230 fcport->d_id.b.area << 8 | fcport->d_id.b.al_pa;
77d74143 5231 rport_ids.roles = FC_RPORT_ROLE_UNKNOWN;
e315cd28 5232 fcport->rport = rport = fc_remote_port_add(vha->host, 0, &rport_ids);
77d74143 5233 if (!rport) {
7c3df132
SK		 5234 ql_log(ql_log_warn, vha, 0x2006,
5235 "Unable to allocate fc remote port.\n");
77d74143
AV		 5236 return;
5237 }
2d70c103 5238
044d78e1 5239 spin_lock_irqsave(fcport->vha->host->host_lock, flags);
19a7b4ae 5240 *((fc_port_t **)rport->dd_data) = fcport;
044d78e1 5241 spin_unlock_irqrestore(fcport->vha->host->host_lock, flags);
d97994dc 5242
ad3e0eda 5243 rport->supported_classes = fcport->supported_classes;
77d74143 5244
8482e118 5245 rport_ids.roles = FC_RPORT_ROLE_UNKNOWN;
5246 if (fcport->port_type == FCT_INITIATOR)
5247 rport_ids.roles |= FC_RPORT_ROLE_FCP_INITIATOR;
5248 if (fcport->port_type == FCT_TARGET)
5249 rport_ids.roles |= FC_RPORT_ROLE_FCP_TARGET;
726b8548 5250
83548fe2
QT		 5251 ql_dbg(ql_dbg_disc, vha, 0x20ee,
5252 "%s %8phN. rport %p is %s mode\n",
5253 __func__, fcport->port_name, rport,
5254 (fcport->port_type == FCT_TARGET) ? "tgt" : "ini");
726b8548 5255
77d74143 5256 fc_remote_port_rolechg(rport, rport_ids.roles);
1da177e4
LT		 5257}
5258
23be331d
AB		 5259/*
5260 * qla2x00_update_fcport
5261 * Updates device on list.
5262 *
5263 * Input:
5264 * ha = adapter block pointer.
5265 * fcport = port structure pointer.
5266 *
5267 * Return:
5268 * 0 - Success
5269 * BIT_0 - error
5270 *
5271 * Context:
5272 * Kernel context.
5273 */
5274void
e315cd28 5275qla2x00_update_fcport(scsi_qla_host_t *vha, fc_port_t *fcport)
23be331d 5276{
726b8548
QT		 5277 if (IS_SW_RESV_ADDR(fcport->d_id))
5278 return;
5279
cd4ed6b4
QT		 5280 ql_dbg(ql_dbg_disc, vha, 0x20ef, "%s %8phC\n",
5281 __func__, fcport->port_name);
5282
5283 fcport->disc_state = DSC_UPD_FCPORT;
5284 fcport->login_retry = vha->hw->login_retry_count;
b63d8b89 5285 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT);
b63d8b89
QT		 5286 fcport->deleted = 0;
5287 fcport->logout_on_delete = 1;
5288 fcport->login_retry = vha->hw->login_retry_count;
8777e431 5289 fcport->n2n_chip_reset = fcport->n2n_link_reset_cnt = 0;
23be331d 5290
8777e431
QT		 5291 switch (vha->hw->current_topology) {
5292 case ISP_CFG_N:
5293 case ISP_CFG_NL:
5294 fcport->keep_nport_handle = 1;
5295 break;
5296 default:
5297 break;
5298 }
5299
aecf0434
QT		 5300 qla2x00_iidma_fcport(vha, fcport);
5301
e84067d7
DG		 5302 if (fcport->fc4f_nvme) {
5303 qla_nvme_register_remote(vha, fcport);
b63d8b89
QT		 5304 fcport->disc_state = DSC_LOGIN_COMPLETE;
5305 qla2x00_set_fcport_state(fcport, FCS_ONLINE);
e84067d7
DG		 5306 return;
5307 }
5308
21090cbe 5309 qla24xx_update_fcport_fcp_prio(vha, fcport);
d20ed91b 5310
726b8548
QT		 5311 switch (vha->host->active_mode) {
5312 case MODE_INITIATOR:
d20ed91b 5313 qla2x00_reg_remote_port(vha, fcport);
726b8548
QT		 5314 break;
5315 case MODE_TARGET:
5316 if (!vha->vha_tgt.qla_tgt->tgt_stop &&
5317 !vha->vha_tgt.qla_tgt->tgt_stopped)
5318 qlt_fc_port_added(vha, fcport);
5319 break;
5320 case MODE_DUAL:
d20ed91b 5321 qla2x00_reg_remote_port(vha, fcport);
726b8548
QT		 5322 if (!vha->vha_tgt.qla_tgt->tgt_stop &&
5323 !vha->vha_tgt.qla_tgt->tgt_stopped)
5324 qlt_fc_port_added(vha, fcport);
5325 break;
5326 default:
5327 break;
d20ed91b 5328 }
cc28e0ac 5329
aecf0434
QT		 5330 qla2x00_set_fcport_state(fcport, FCS_ONLINE);
5331
cc28e0ac
QT		 5332 if (IS_IIDMA_CAPABLE(vha->hw) && vha->hw->flags.gpsc_supported) {
5333 if (fcport->id_changed) {
5334 fcport->id_changed = 0;
5335 ql_dbg(ql_dbg_disc, vha, 0x20d7,
5336 "%s %d %8phC post gfpnid fcp_cnt %d\n",
5337 __func__, __LINE__, fcport->port_name,
5338 vha->fcport_count);
5339 qla24xx_post_gfpnid_work(vha, fcport);
5340 } else {
5341 ql_dbg(ql_dbg_disc, vha, 0x20d7,
5342 "%s %d %8phC post gpsc fcp_cnt %d\n",
5343 __func__, __LINE__, fcport->port_name,
5344 vha->fcport_count);
5345 qla24xx_post_gpsc_work(vha, fcport);
5346 }
5347 }
cd4ed6b4
QT		 5348
5349 fcport->disc_state = DSC_LOGIN_COMPLETE;
5350}
5351
5352void qla_register_fcport_fn(struct work_struct *work)
5353{
5354 fc_port_t *fcport = container_of(work, struct fc_port, reg_work);
5355 u32 rscn_gen = fcport->rscn_gen;
5356 u16 data[2];
5357
5358 if (IS_SW_RESV_ADDR(fcport->d_id))
5359 return;
5360
5361 qla2x00_update_fcport(fcport->vha, fcport);
5362
5363 if (rscn_gen != fcport->rscn_gen) {
5364 /* RSCN(s) came in while registration */
5365 switch (fcport->next_disc_state) {
5366 case DSC_DELETE_PEND:
5367 qlt_schedule_sess_for_deletion(fcport);
5368 break;
5369 case DSC_ADISC:
5370 data[0] = data[1] = 0;
5371 qla2x00_post_async_adisc_work(fcport->vha, fcport,
5372 data);
5373 break;
5374 default:
5375 break;
5376 }
5377 }
23be331d
AB		 5378}
5379
1da177e4
LT		 5380/*
5381 * qla2x00_configure_fabric
5382 * Setup SNS devices with loop ID's.
5383 *
5384 * Input:
5385 * ha = adapter block pointer.
5386 *
5387 * Returns:
5388 * 0 = success.
5389 * BIT_0 = error
5390 */
5391static int
e315cd28 5392qla2x00_configure_fabric(scsi_qla_host_t *vha)
1da177e4 5393{
b3b02e6e 5394 int rval;
726b8548 5395 fc_port_t *fcport;
1da177e4 5396 uint16_t mb[MAILBOX_REGISTER_COUNT];
0107109e 5397 uint16_t loop_id;
1da177e4 5398 LIST_HEAD(new_fcports);
e315cd28 5399 struct qla_hw_data *ha = vha->hw;
df673274 5400 int discovery_gen;
1da177e4
LT		 5401
5402 /* If FL port exists, then SNS is present */
e428924c 5403 if (IS_FWI2_CAPABLE(ha))
0107109e
AV		 5404 loop_id = NPH_F_PORT;
5405 else
5406 loop_id = SNS_FL_PORT;
e315cd28 5407 rval = qla2x00_get_port_name(vha, loop_id, vha->fabric_node_name, 1);
1da177e4 5408 if (rval != QLA_SUCCESS) {
83548fe2 5409 ql_dbg(ql_dbg_disc, vha, 0x20a0,
7c3df132 5410 "MBX_GET_PORT_NAME failed, No FL Port.\n");
1da177e4 5411
e315cd28 5412 vha->device_flags &= ~SWITCH_FOUND;
1da177e4
LT		 5413 return (QLA_SUCCESS);
5414 }
e315cd28 5415 vha->device_flags |= SWITCH_FOUND;
1da177e4 5416
41dc529a
QT		 5417
5418 if (qla_tgt_mode_enabled(vha) || qla_dual_mode_enabled(vha)) {
5419 rval = qla2x00_send_change_request(vha, 0x3, 0);
5420 if (rval != QLA_SUCCESS)
5421 ql_log(ql_log_warn, vha, 0x121,
5422 "Failed to enable receiving of RSCN requests: 0x%x.\n",
5423 rval);
5424 }
5425
5426
1da177e4 5427 do {
726b8548
QT		 5428 qla2x00_mgmt_svr_login(vha);
5429
cca5335c
AV		 5430 /* FDMI support. */
5431 if (ql2xfdmienable &&
e315cd28
AC		 5432 test_and_clear_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags))
5433 qla2x00_fdmi_register(vha);
cca5335c 5434
1da177e4 5435 /* Ensure we are logged into the SNS. */
a14c7711 5436 loop_id = NPH_SNS_LID(ha);
0b91d116
CD		 5437 rval = ha->isp_ops->fabric_login(vha, loop_id, 0xff, 0xff,
5438 0xfc, mb, BIT_1|BIT_0);
a14c7711
JC		 5439 if (rval != QLA_SUCCESS || mb[0] != MBS_COMMAND_COMPLETE) {
5440 ql_dbg(ql_dbg_disc, vha, 0x20a1,
5441 "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x mb[2]=%x mb[6]=%x mb[7]=%x (%x).\n",
5442 loop_id, mb[0], mb[1], mb[2], mb[6], mb[7], rval);
0b91d116 5443 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
e452ceb6 5444 return rval;
0b91d116 5445 }
e315cd28
AC		 5446 if (test_and_clear_bit(REGISTER_FC4_NEEDED, &vha->dpc_flags)) {
5447 if (qla2x00_rft_id(vha)) {
1da177e4 5448 /* EMPTY */
83548fe2 5449 ql_dbg(ql_dbg_disc, vha, 0x20a2,
7c3df132 5450 "Register FC-4 TYPE failed.\n");
b98ae0d7
QT		 5451 if (test_bit(LOOP_RESYNC_NEEDED,
5452 &vha->dpc_flags))
5453 break;
1da177e4 5454 }
d3bae931 5455 if (qla2x00_rff_id(vha, FC4_TYPE_FCP_SCSI)) {
1da177e4 5456 /* EMPTY */
83548fe2 5457 ql_dbg(ql_dbg_disc, vha, 0x209a,
7c3df132 5458 "Register FC-4 Features failed.\n");
b98ae0d7
QT		 5459 if (test_bit(LOOP_RESYNC_NEEDED,
5460 &vha->dpc_flags))
5461 break;
1da177e4 5462 }
d3bae931
DG		 5463 if (vha->flags.nvme_enabled) {
5464 if (qla2x00_rff_id(vha, FC_TYPE_NVME)) {
5465 ql_dbg(ql_dbg_disc, vha, 0x2049,
5466 "Register NVME FC Type Features failed.\n");
5467 }
5468 }
e315cd28 5469 if (qla2x00_rnn_id(vha)) {
1da177e4 5470 /* EMPTY */
83548fe2 5471 ql_dbg(ql_dbg_disc, vha, 0x2104,
7c3df132 5472 "Register Node Name failed.\n");
b98ae0d7
QT		 5473 if (test_bit(LOOP_RESYNC_NEEDED,
5474 &vha->dpc_flags))
5475 break;
e315cd28 5476 } else if (qla2x00_rsnn_nn(vha)) {
1da177e4 5477 /* EMPTY */
83548fe2 5478 ql_dbg(ql_dbg_disc, vha, 0x209b,
0bf0efa1 5479 "Register Symbolic Node Name failed.\n");
b98ae0d7
QT		 5480 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
5481 break;
1da177e4
LT		 5482 }
5483 }
5484
827210ba 5485
df673274
AP		 5486 /* Mark the time right before querying FW for connected ports.
5487 * This process is long, asynchronous and by the time it's done,
5488 * collected information might not be accurate anymore. E.g.
5489 * disconnected port might have re-connected and a brand new
5490 * session has been created. In this case session's generation
5491 * will be newer than discovery_gen. */
5492 qlt_do_generation_tick(vha, &discovery_gen);
5493
a4239945 5494 if (USE_ASYNC_SCAN(ha)) {
33b28357
QT		 5495 rval = qla24xx_async_gpnft(vha, FC4_TYPE_FCP_SCSI,
5496 NULL);
a4239945
QT		 5497 if (rval)
5498 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
5499 } else {
f352eeb7
QT		 5500 list_for_each_entry(fcport, &vha->vp_fcports, list)
5501 fcport->scan_state = QLA_FCPORT_SCAN;
5502
a4239945
QT		 5503 rval = qla2x00_find_all_fabric_devs(vha);
5504 }
1da177e4
LT		 5505 if (rval != QLA_SUCCESS)
5506 break;
1da177e4
LT		 5507 } while (0);
5508
e84067d7
DG		 5509 if (!vha->nvme_local_port && vha->flags.nvme_enabled)
5510 qla_nvme_register_hba(vha);
5511
726b8548 5512 if (rval)
7c3df132
SK		 5513 ql_dbg(ql_dbg_disc, vha, 0x2068,
5514 "Configure fabric error exit rval=%d.\n", rval);
1da177e4
LT		 5515
5516 return (rval);
5517}
5518
1da177e4
LT		 5519/*
5520 * qla2x00_find_all_fabric_devs
5521 *
5522 * Input:
5523 * ha = adapter block pointer.
5524 * dev = database device entry pointer.
5525 *
5526 * Returns:
5527 * 0 = success.
5528 *
5529 * Context:
5530 * Kernel context.
5531 */
5532static int
726b8548 5533qla2x00_find_all_fabric_devs(scsi_qla_host_t *vha)
1da177e4
LT		 5534{
5535 int rval;
5536 uint16_t loop_id;
726b8548 5537 fc_port_t *fcport, *new_fcport;
1da177e4
LT		 5538 int found;
5539
5540 sw_info_t *swl;
5541 int swl_idx;
5542 int first_dev, last_dev;
1516ef44 5543 port_id_t wrap = {}, nxt_d_id;
e315cd28 5544 struct qla_hw_data *ha = vha->hw;
bb4cf5b7 5545 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
726b8548 5546 unsigned long flags;
1da177e4
LT		 5547
5548 rval = QLA_SUCCESS;
5549
5550 /* Try GID_PT to get device list, else GAN. */
7a67735b 5551 if (!ha->swl)
642ef983 5552 ha->swl = kcalloc(ha->max_fibre_devices, sizeof(sw_info_t),
7a67735b
AV		 5553 GFP_KERNEL);
5554 swl = ha->swl;
bbfbbbc1 5555 if (!swl) {
1da177e4 5556 /*EMPTY*/
83548fe2 5557 ql_dbg(ql_dbg_disc, vha, 0x209c,
7c3df132 5558 "GID_PT allocations failed, fallback on GA_NXT.\n");
1da177e4 5559 } else {
642ef983 5560 memset(swl, 0, ha->max_fibre_devices * sizeof(sw_info_t));
e315cd28 5561 if (qla2x00_gid_pt(vha, swl) != QLA_SUCCESS) {
1da177e4 5562 swl = NULL;
b98ae0d7
QT		 5563 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
5564 return rval;
e315cd28 5565 } else if (qla2x00_gpn_id(vha, swl) != QLA_SUCCESS) {
1da177e4 5566 swl = NULL;
b98ae0d7
QT		 5567 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
5568 return rval;
e315cd28 5569 } else if (qla2x00_gnn_id(vha, swl) != QLA_SUCCESS) {
1da177e4 5570 swl = NULL;
b98ae0d7
QT		 5571 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
5572 return rval;
726b8548
QT		 5573 } else if (qla2x00_gfpn_id(vha, swl) != QLA_SUCCESS) {
5574 swl = NULL;
b98ae0d7
QT		 5575 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
5576 return rval;
1da177e4 5577 }
e8c72ba5
CD		 5578
5579 /* If other queries succeeded probe for FC-4 type */
b98ae0d7 5580 if (swl) {
e8c72ba5 5581 qla2x00_gff_id(vha, swl);
b98ae0d7
QT		 5582 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
5583 return rval;
5584 }
1da177e4
LT		 5585 }
5586 swl_idx = 0;
5587
5588 /* Allocate temporary fcport for any new fcports discovered. */
e315cd28 5589 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
1da177e4 5590 if (new_fcport == NULL) {
83548fe2 5591 ql_log(ql_log_warn, vha, 0x209d,
7c3df132 5592 "Failed to allocate memory for fcport.\n");
1da177e4
LT		 5593 return (QLA_MEMORY_ALLOC_FAILED);
5594 }
5595 new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED);
1da177e4
LT		 5596 /* Set start port ID scan at adapter ID. */
5597 first_dev = 1;
5598 last_dev = 0;
5599
5600 /* Starting free loop ID. */
e315cd28
AC		 5601 loop_id = ha->min_external_loopid;
5602 for (; loop_id <= ha->max_loop_id; loop_id++) {
5603 if (qla2x00_is_reserved_id(vha, loop_id))
1da177e4
LT		 5604 continue;
5605
3a6478df
GM		 5606 if (ha->current_topology == ISP_CFG_FL &&
5607 (atomic_read(&vha->loop_down_timer) ||
5608 LOOP_TRANSITION(vha))) {
bb2d52b2
AV		 5609 atomic_set(&vha->loop_down_timer, 0);
5610 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
5611 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
1da177e4 5612 break;
bb2d52b2 5613 }
1da177e4
LT		 5614
5615 if (swl != NULL) {
5616 if (last_dev) {
5617 wrap.b24 = new_fcport->d_id.b24;
5618 } else {
5619 new_fcport->d_id.b24 = swl[swl_idx].d_id.b24;
5620 memcpy(new_fcport->node_name,
5621 swl[swl_idx].node_name, WWN_SIZE);
5622 memcpy(new_fcport->port_name,
5623 swl[swl_idx].port_name, WWN_SIZE);
d8b45213
AV		 5624 memcpy(new_fcport->fabric_port_name,
5625 swl[swl_idx].fabric_port_name, WWN_SIZE);
5626 new_fcport->fp_speed = swl[swl_idx].fp_speed;
e8c72ba5 5627 new_fcport->fc4_type = swl[swl_idx].fc4_type;
1da177e4 5628
a5d42f4c 5629 new_fcport->nvme_flag = 0;
1a28faa0 5630 new_fcport->fc4f_nvme = 0;
a5d42f4c
DG		 5631 if (vha->flags.nvme_enabled &&
5632 swl[swl_idx].fc4f_nvme) {
5633 new_fcport->fc4f_nvme =
5634 swl[swl_idx].fc4f_nvme;
5635 ql_log(ql_log_info, vha, 0x2131,
5636 "FOUND: NVME port %8phC as FC Type 28h\n",
5637 new_fcport->port_name);
5638 }
5639
1da177e4
LT		 5640 if (swl[swl_idx].d_id.b.rsvd_1 != 0) {
5641 last_dev = 1;
5642 }
5643 swl_idx++;
5644 }
5645 } else {
5646 /* Send GA_NXT to the switch */
e315cd28 5647 rval = qla2x00_ga_nxt(vha, new_fcport);
1da177e4 5648 if (rval != QLA_SUCCESS) {
83548fe2 5649 ql_log(ql_log_warn, vha, 0x209e,
7c3df132
SK		 5650 "SNS scan failed -- assuming "
5651 "zero-entry result.\n");
1da177e4
LT		 5652 rval = QLA_SUCCESS;
5653 break;
5654 }
5655 }
5656
5657 /* If wrap on switch device list, exit. */
5658 if (first_dev) {
5659 wrap.b24 = new_fcport->d_id.b24;
5660 first_dev = 0;
5661 } else if (new_fcport->d_id.b24 == wrap.b24) {
83548fe2 5662 ql_dbg(ql_dbg_disc, vha, 0x209f,
7c3df132
SK		 5663 "Device wrap (%02x%02x%02x).\n",
5664 new_fcport->d_id.b.domain,
5665 new_fcport->d_id.b.area,
5666 new_fcport->d_id.b.al_pa);
1da177e4
LT		 5667 break;
5668 }
5669
2c3dfe3f 5670 /* Bypass if same physical adapter. */
e315cd28 5671 if (new_fcport->d_id.b24 == base_vha->d_id.b24)
1da177e4
LT		 5672 continue;
5673
2c3dfe3f 5674 /* Bypass virtual ports of the same host. */
bb4cf5b7
CD		 5675 if (qla2x00_is_a_vp_did(vha, new_fcport->d_id.b24))
5676 continue;
2c3dfe3f 5677
f7d289f6
AV		 5678 /* Bypass if same domain and area of adapter. */
5679 if (((new_fcport->d_id.b24 & 0xffff00) ==
e315cd28 5680 (vha->d_id.b24 & 0xffff00)) && ha->current_topology ==
f7d289f6
AV		 5681 ISP_CFG_FL)
5682 continue;
5683
1da177e4
LT		 5684 /* Bypass reserved domain fields. */
5685 if ((new_fcport->d_id.b.domain & 0xf0) == 0xf0)
5686 continue;
5687
e8c72ba5 5688 /* Bypass ports whose FCP-4 type is not FCP_SCSI */
4da26e16
CD		 5689 if (ql2xgffidenable &&
5690 (new_fcport->fc4_type != FC4_TYPE_FCP_SCSI &&
5691 new_fcport->fc4_type != FC4_TYPE_UNKNOWN))
e8c72ba5
CD		 5692 continue;
5693
726b8548
QT		 5694 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
5695
1da177e4
LT		 5696 /* Locate matching device in database. */
5697 found = 0;
e315cd28 5698 list_for_each_entry(fcport, &vha->vp_fcports, list) {
1da177e4
LT		 5699 if (memcmp(new_fcport->port_name, fcport->port_name,
5700 WWN_SIZE))
5701 continue;
5702
827210ba 5703 fcport->scan_state = QLA_FCPORT_FOUND;
b3b02e6e 5704
1da177e4
LT		 5705 found++;
5706
d8b45213
AV		 5707 /* Update port state. */
5708 memcpy(fcport->fabric_port_name,
5709 new_fcport->fabric_port_name, WWN_SIZE);
5710 fcport->fp_speed = new_fcport->fp_speed;
5711
1da177e4 5712 /*
b2032fd5
RD		 5713 * If address the same and state FCS_ONLINE
5714 * (or in target mode), nothing changed.
1da177e4
LT		 5715 */
5716 if (fcport->d_id.b24 == new_fcport->d_id.b24 &&
b2032fd5 5717 (atomic_read(&fcport->state) == FCS_ONLINE ||
726b8548 5718 (vha->host->active_mode == MODE_TARGET))) {
1da177e4
LT		 5719 break;
5720 }
5721
5722 /*
5723 * If device was not a fabric device before.
5724 */
5725 if ((fcport->flags & FCF_FABRIC_DEVICE) == 0) {
5726 fcport->d_id.b24 = new_fcport->d_id.b24;
5f16b331 5727 qla2x00_clear_loop_id(fcport);
1da177e4
LT		 5728 fcport->flags |= (FCF_FABRIC_DEVICE |
5729 FCF_LOGIN_NEEDED);
1da177e4
LT		 5730 break;
5731 }
5732
5733 /*
5734 * Port ID changed or device was marked to be updated;
5735 * Log it out if still logged in and mark it for
5736 * relogin later.
5737 */
726b8548 5738 if (qla_tgt_mode_enabled(base_vha)) {
b2032fd5
RD		 5739 ql_dbg(ql_dbg_tgt_mgt, vha, 0xf080,
5740 "port changed FC ID, %8phC"
5741 " old %x:%x:%x (loop_id 0x%04x)-> new %x:%x:%x\n",
5742 fcport->port_name,
5743 fcport->d_id.b.domain,
5744 fcport->d_id.b.area,
5745 fcport->d_id.b.al_pa,
5746 fcport->loop_id,
5747 new_fcport->d_id.b.domain,
5748 new_fcport->d_id.b.area,
5749 new_fcport->d_id.b.al_pa);
5750 fcport->d_id.b24 = new_fcport->d_id.b24;
5751 break;
5752 }
5753
1da177e4
LT		 5754 fcport->d_id.b24 = new_fcport->d_id.b24;
5755 fcport->flags |= FCF_LOGIN_NEEDED;
1da177e4
LT		 5756 break;
5757 }
5758
9dd9686b
DT		 5759 if (fcport->fc4f_nvme) {
5760 if (fcport->disc_state == DSC_DELETE_PEND) {
5761 fcport->disc_state = DSC_GNL;
5762 vha->fcport_count--;
5763 fcport->login_succ = 0;
5764 }
5765 }
5766
726b8548
QT		 5767 if (found) {
5768 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
1da177e4 5769 continue;
726b8548 5770 }
1da177e4 5771 /* If device was not in our fcports list, then add it. */
b2032fd5 5772 new_fcport->scan_state = QLA_FCPORT_FOUND;
726b8548
QT		 5773 list_add_tail(&new_fcport->list, &vha->vp_fcports);
5774
5775 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
5776
1da177e4
LT		 5777
5778 /* Allocate a new replacement fcport. */
5779 nxt_d_id.b24 = new_fcport->d_id.b24;
e315cd28 5780 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
1da177e4 5781 if (new_fcport == NULL) {
83548fe2 5782 ql_log(ql_log_warn, vha, 0xd032,
7c3df132 5783 "Memory allocation failed for fcport.\n");
1da177e4
LT		 5784 return (QLA_MEMORY_ALLOC_FAILED);
5785 }
5786 new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED);
5787 new_fcport->d_id.b24 = nxt_d_id.b24;
5788 }
5789
726b8548
QT		 5790 qla2x00_free_fcport(new_fcport);
5791
5792 /*
5793 * Logout all previous fabric dev marked lost, except FCP2 devices.
5794 */
5795 list_for_each_entry(fcport, &vha->vp_fcports, list) {
5796 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
5797 break;
5798
5799 if ((fcport->flags & FCF_FABRIC_DEVICE) == 0 ||
5800 (fcport->flags & FCF_LOGIN_NEEDED) == 0)
5801 continue;
5802
5803 if (fcport->scan_state == QLA_FCPORT_SCAN) {
5804 if ((qla_dual_mode_enabled(vha) ||
5805 qla_ini_mode_enabled(vha)) &&
5806 atomic_read(&fcport->state) == FCS_ONLINE) {
5807 qla2x00_mark_device_lost(vha, fcport,
5808 ql2xplogiabsentdevice, 0);
5809 if (fcport->loop_id != FC_NO_LOOP_ID &&
5810 (fcport->flags & FCF_FCP2_DEVICE) == 0 &&
5811 fcport->port_type != FCT_INITIATOR &&
5812 fcport->port_type != FCT_BROADCAST) {
83548fe2 5813 ql_dbg(ql_dbg_disc, vha, 0x20f0,
726b8548
QT		 5814 "%s %d %8phC post del sess\n",
5815 __func__, __LINE__,
5816 fcport->port_name);
d8630bb9 5817 qlt_schedule_sess_for_deletion(fcport);
726b8548
QT		 5818 continue;
5819 }
5820 }
5821 }
1da177e4 5822
726b8548
QT		 5823 if (fcport->scan_state == QLA_FCPORT_FOUND)
5824 qla24xx_fcport_handle_login(vha, fcport);
5825 }
1da177e4
LT		 5826 return (rval);
5827}
5828
5829/*
5830 * qla2x00_find_new_loop_id
5831 * Scan through our port list and find a new usable loop ID.
5832 *
5833 * Input:
5834 * ha: adapter state pointer.
5835 * dev: port structure pointer.
5836 *
5837 * Returns:
5838 * qla2x00 local function return status code.
5839 *
5840 * Context:
5841 * Kernel context.
5842 */
03bcfb57 5843int
e315cd28 5844qla2x00_find_new_loop_id(scsi_qla_host_t *vha, fc_port_t *dev)
1da177e4
LT		 5845{
5846 int rval;
e315cd28 5847 struct qla_hw_data *ha = vha->hw;
feafb7b1 5848 unsigned long flags = 0;
1da177e4
LT		 5849
5850 rval = QLA_SUCCESS;
5851
5f16b331 5852 spin_lock_irqsave(&ha->vport_slock, flags);
1da177e4 5853
5f16b331
CD		 5854 dev->loop_id = find_first_zero_bit(ha->loop_id_map,
5855 LOOPID_MAP_SIZE);
5856 if (dev->loop_id >= LOOPID_MAP_SIZE ||
5857 qla2x00_is_reserved_id(vha, dev->loop_id)) {
5858 dev->loop_id = FC_NO_LOOP_ID;
5859 rval = QLA_FUNCTION_FAILED;
5860 } else
5861 set_bit(dev->loop_id, ha->loop_id_map);
1da177e4 5862
5f16b331 5863 spin_unlock_irqrestore(&ha->vport_slock, flags);
1da177e4 5864
5f16b331
CD		 5865 if (rval == QLA_SUCCESS)
5866 ql_dbg(ql_dbg_disc, dev->vha, 0x2086,
5867 "Assigning new loopid=%x, portid=%x.\n",
5868 dev->loop_id, dev->d_id.b24);
5869 else
5870 ql_log(ql_log_warn, dev->vha, 0x2087,
5871 "No loop_id's available, portid=%x.\n",
5872 dev->d_id.b24);
1da177e4
LT		 5873
5874 return (rval);
5875}
5876
1da177e4 5877
f6602f3b
QT		 5878/* FW does not set aside Loop id for MGMT Server/FFFFFAh */
5879int
5880qla2x00_reserve_mgmt_server_loop_id(scsi_qla_host_t *vha)
5881{
5882 int loop_id = FC_NO_LOOP_ID;
5883 int lid = NPH_MGMT_SERVER - vha->vp_idx;
5884 unsigned long flags;
5885 struct qla_hw_data *ha = vha->hw;
5886
5887 if (vha->vp_idx == 0) {
5888 set_bit(NPH_MGMT_SERVER, ha->loop_id_map);
5889 return NPH_MGMT_SERVER;
5890 }
5891
5892 /* pick id from high and work down to low */
5893 spin_lock_irqsave(&ha->vport_slock, flags);
5894 for (; lid > 0; lid--) {
5895 if (!test_bit(lid, vha->hw->loop_id_map)) {
5896 set_bit(lid, vha->hw->loop_id_map);
5897 loop_id = lid;
5898 break;
5899 }
5900 }
5901 spin_unlock_irqrestore(&ha->vport_slock, flags);
5902
5903 return loop_id;
5904}
5905
1da177e4
LT		 5906/*
5907 * qla2x00_fabric_login
5908 * Issue fabric login command.
5909 *
5910 * Input:
5911 * ha = adapter block pointer.
5912 * device = pointer to FC device type structure.
5913 *
5914 * Returns:
5915 * 0 - Login successfully
5916 * 1 - Login failed
5917 * 2 - Initiator device
5918 * 3 - Fatal error
5919 */
5920int
e315cd28 5921qla2x00_fabric_login(scsi_qla_host_t *vha, fc_port_t *fcport,
1da177e4
LT		 5922 uint16_t *next_loopid)
5923{
5924 int rval;
5925 int retry;
5926 uint16_t tmp_loopid;
5927 uint16_t mb[MAILBOX_REGISTER_COUNT];
e315cd28 5928 struct qla_hw_data *ha = vha->hw;
1da177e4
LT		 5929
5930 retry = 0;
5931 tmp_loopid = 0;
5932
5933 for (;;) {
7c3df132
SK		 5934 ql_dbg(ql_dbg_disc, vha, 0x2000,
5935 "Trying Fabric Login w/loop id 0x%04x for port "
5936 "%02x%02x%02x.\n",
5937 fcport->loop_id, fcport->d_id.b.domain,
5938 fcport->d_id.b.area, fcport->d_id.b.al_pa);
1da177e4
LT		 5939
5940 /* Login fcport on switch. */
0b91d116 5941 rval = ha->isp_ops->fabric_login(vha, fcport->loop_id,
1da177e4
LT		 5942 fcport->d_id.b.domain, fcport->d_id.b.area,
5943 fcport->d_id.b.al_pa, mb, BIT_0);
0b91d116
CD		 5944 if (rval != QLA_SUCCESS) {
5945 return rval;
5946 }
1da177e4
LT		 5947 if (mb[0] == MBS_PORT_ID_USED) {
5948 /*
5949 * Device has another loop ID. The firmware team
0107109e
AV		 5950 * recommends the driver perform an implicit login with
5951 * the specified ID again. The ID we just used is save
5952 * here so we return with an ID that can be tried by
5953 * the next login.
1da177e4
LT		 5954 */
5955 retry++;
5956 tmp_loopid = fcport->loop_id;
5957 fcport->loop_id = mb[1];
5958
7c3df132
SK		 5959 ql_dbg(ql_dbg_disc, vha, 0x2001,
5960 "Fabric Login: port in use - next loop "
5961 "id=0x%04x, port id= %02x%02x%02x.\n",
1da177e4 5962 fcport->loop_id, fcport->d_id.b.domain,
7c3df132 5963 fcport->d_id.b.area, fcport->d_id.b.al_pa);
1da177e4
LT		 5964
5965 } else if (mb[0] == MBS_COMMAND_COMPLETE) {
5966 /*
5967 * Login succeeded.
5968 */
5969 if (retry) {
5970 /* A retry occurred before. */
5971 *next_loopid = tmp_loopid;
5972 } else {
5973 /*
5974 * No retry occurred before. Just increment the
5975 * ID value for next login.
5976 */
5977 *next_loopid = (fcport->loop_id + 1);
5978 }
5979
5980 if (mb[1] & BIT_0) {
5981 fcport->port_type = FCT_INITIATOR;
5982 } else {
5983 fcport->port_type = FCT_TARGET;
5984 if (mb[1] & BIT_1) {
8474f3a0 5985 fcport->flags |= FCF_FCP2_DEVICE;
1da177e4
LT		 5986 }
5987 }
5988
ad3e0eda
AV		 5989 if (mb[10] & BIT_0)
5990 fcport->supported_classes |= FC_COS_CLASS2;
5991 if (mb[10] & BIT_1)
5992 fcport->supported_classes |= FC_COS_CLASS3;
5993
2d70c103
NB		 5994 if (IS_FWI2_CAPABLE(ha)) {
5995 if (mb[10] & BIT_7)
5996 fcport->flags |=
5997 FCF_CONF_COMP_SUPPORTED;
5998 }
5999
1da177e4
LT		 6000 rval = QLA_SUCCESS;
6001 break;
6002 } else if (mb[0] == MBS_LOOP_ID_USED) {
6003 /*
6004 * Loop ID already used, try next loop ID.
6005 */
6006 fcport->loop_id++;
e315cd28 6007 rval = qla2x00_find_new_loop_id(vha, fcport);
1da177e4
LT		 6008 if (rval != QLA_SUCCESS) {
6009 /* Ran out of loop IDs to use */
6010 break;
6011 }
6012 } else if (mb[0] == MBS_COMMAND_ERROR) {
6013 /*
6014 * Firmware possibly timed out during login. If NO
6015 * retries are left to do then the device is declared
6016 * dead.
6017 */
6018 *next_loopid = fcport->loop_id;
e315cd28 6019 ha->isp_ops->fabric_logout(vha, fcport->loop_id,
1c7c6357
AV		 6020 fcport->d_id.b.domain, fcport->d_id.b.area,
6021 fcport->d_id.b.al_pa);
e315cd28 6022 qla2x00_mark_device_lost(vha, fcport, 1, 0);
1da177e4
LT		 6023
6024 rval = 1;
6025 break;
6026 } else {
6027 /*
6028 * unrecoverable / not handled error
6029 */
7c3df132
SK		 6030 ql_dbg(ql_dbg_disc, vha, 0x2002,
6031 "Failed=%x port_id=%02x%02x%02x loop_id=%x "
6032 "jiffies=%lx.\n", mb[0], fcport->d_id.b.domain,
6033 fcport->d_id.b.area, fcport->d_id.b.al_pa,
6034 fcport->loop_id, jiffies);
1da177e4
LT		 6035
6036 *next_loopid = fcport->loop_id;
e315cd28 6037 ha->isp_ops->fabric_logout(vha, fcport->loop_id,
1c7c6357
AV		 6038 fcport->d_id.b.domain, fcport->d_id.b.area,
6039 fcport->d_id.b.al_pa);
5f16b331 6040 qla2x00_clear_loop_id(fcport);
0eedfcf0 6041 fcport->login_retry = 0;
1da177e4
LT		 6042
6043 rval = 3;
6044 break;
6045 }
6046 }
6047
6048 return (rval);
6049}
6050
6051/*
6052 * qla2x00_local_device_login
6053 * Issue local device login command.
6054 *
6055 * Input:
6056 * ha = adapter block pointer.
6057 * loop_id = loop id of device to login to.
6058 *
6059 * Returns (Where's the #define!!!!):
6060 * 0 - Login successfully
6061 * 1 - Login failed
6062 * 3 - Fatal error
6063 */
6064int
e315cd28 6065qla2x00_local_device_login(scsi_qla_host_t *vha, fc_port_t *fcport)
1da177e4
LT		 6066{
6067 int rval;
6068 uint16_t mb[MAILBOX_REGISTER_COUNT];
6069
6070 memset(mb, 0, sizeof(mb));
e315cd28 6071 rval = qla2x00_login_local_device(vha, fcport, mb, BIT_0);
1da177e4
LT		 6072 if (rval == QLA_SUCCESS) {
6073 /* Interrogate mailbox registers for any errors */
6074 if (mb[0] == MBS_COMMAND_ERROR)
6075 rval = 1;
6076 else if (mb[0] == MBS_COMMAND_PARAMETER_ERROR)
6077 /* device not in PCB table */
6078 rval = 3;
6079 }
6080
6081 return (rval);
6082}
6083
6084/*
6085 * qla2x00_loop_resync
6086 * Resync with fibre channel devices.
6087 *
6088 * Input:
6089 * ha = adapter block pointer.
6090 *
6091 * Returns:
6092 * 0 = success
6093 */
6094int
e315cd28 6095qla2x00_loop_resync(scsi_qla_host_t *vha)
1da177e4 6096{
73208dfd 6097 int rval = QLA_SUCCESS;
1da177e4 6098 uint32_t wait_time;
67c2e93a
AC		 6099 struct req_que *req;
6100 struct rsp_que *rsp;
6101
d7459527 6102 req = vha->req;
67c2e93a 6103 rsp = req->rsp;
1da177e4 6104
e315cd28
AC		 6105 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
6106 if (vha->flags.online) {
6107 if (!(rval = qla2x00_fw_ready(vha))) {
1da177e4
LT		 6108 /* Wait at most MAX_TARGET RSCNs for a stable link. */
6109 wait_time = 256;
6110 do {
8ae6d9c7
GM		 6111 if (!IS_QLAFX00(vha->hw)) {
6112 /*
6113 * Issue a marker after FW becomes
6114 * ready.
6115 */
6116 qla2x00_marker(vha, req, rsp, 0, 0,
6117 MK_SYNC_ALL);
6118 vha->marker_needed = 0;
6119 }
1da177e4
LT		 6120
6121 /* Remap devices on Loop. */
e315cd28 6122 clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
1da177e4 6123
8ae6d9c7
GM		 6124 if (IS_QLAFX00(vha->hw))
6125 qlafx00_configure_devices(vha);
6126 else
6127 qla2x00_configure_loop(vha);
6128
1da177e4 6129 wait_time--;
e315cd28
AC		 6130 } while (!atomic_read(&vha->loop_down_timer) &&
6131 !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags))
6132 && wait_time && (test_bit(LOOP_RESYNC_NEEDED,
6133 &vha->dpc_flags)));
1da177e4 6134 }
1da177e4
LT		 6135 }
6136
e315cd28 6137 if (test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags))
1da177e4 6138 return (QLA_FUNCTION_FAILED);
1da177e4 6139
e315cd28 6140 if (rval)
7c3df132
SK		 6141 ql_dbg(ql_dbg_disc, vha, 0x206c,
6142 "%s *** FAILED ***.\n", __func__);
1da177e4
LT		 6143
6144 return (rval);
6145}
6146
579d12b5
SK		 6147/*
6148* qla2x00_perform_loop_resync
6149* Description: This function will set the appropriate flags and call
6150* qla2x00_loop_resync. If successful loop will be resynced
6151* Arguments : scsi_qla_host_t pointer
6152* returm : Success or Failure
6153*/
6154
6155int qla2x00_perform_loop_resync(scsi_qla_host_t *ha)
6156{
6157 int32_t rval = 0;
6158
6159 if (!test_and_set_bit(LOOP_RESYNC_ACTIVE, &ha->dpc_flags)) {
6160 /*Configure the flags so that resync happens properly*/
6161 atomic_set(&ha->loop_down_timer, 0);
6162 if (!(ha->device_flags & DFLG_NO_CABLE)) {
6163 atomic_set(&ha->loop_state, LOOP_UP);
6164 set_bit(LOCAL_LOOP_UPDATE, &ha->dpc_flags);
6165 set_bit(REGISTER_FC4_NEEDED, &ha->dpc_flags);
6166 set_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags);
6167
6168 rval = qla2x00_loop_resync(ha);
6169 } else
6170 atomic_set(&ha->loop_state, LOOP_DEAD);
6171
6172 clear_bit(LOOP_RESYNC_ACTIVE, &ha->dpc_flags);
6173 }
6174
6175 return rval;
6176}
6177
d97994dc 6178void
67becc00 6179qla2x00_update_fcports(scsi_qla_host_t *base_vha)
d97994dc 6180{
6181 fc_port_t *fcport;
feafb7b1
AE		 6182 struct scsi_qla_host *vha;
6183 struct qla_hw_data *ha = base_vha->hw;
6184 unsigned long flags;
d97994dc 6185
feafb7b1 6186 spin_lock_irqsave(&ha->vport_slock, flags);
d97994dc 6187 /* Go with deferred removal of rport references. */
feafb7b1
AE		 6188 list_for_each_entry(vha, &base_vha->hw->vp_list, list) {
6189 atomic_inc(&vha->vref_count);
6190 list_for_each_entry(fcport, &vha->vp_fcports, list) {
8ae598d0 6191 if (fcport->drport &&
feafb7b1
AE		 6192 atomic_read(&fcport->state) != FCS_UNCONFIGURED) {
6193 spin_unlock_irqrestore(&ha->vport_slock, flags);
67becc00 6194 qla2x00_rport_del(fcport);
df673274 6195
feafb7b1
AE		 6196 spin_lock_irqsave(&ha->vport_slock, flags);
6197 }
6198 }
6199 atomic_dec(&vha->vref_count);
c4a9b538 6200 wake_up(&vha->vref_waitq);
feafb7b1
AE		 6201 }
6202 spin_unlock_irqrestore(&ha->vport_slock, flags);
d97994dc 6203}
6204
7d613ac6
SV		 6205/* Assumes idc_lock always held on entry */
6206void
6207qla83xx_reset_ownership(scsi_qla_host_t *vha)
6208{
6209 struct qla_hw_data *ha = vha->hw;
6210 uint32_t drv_presence, drv_presence_mask;
6211 uint32_t dev_part_info1, dev_part_info2, class_type;
6212 uint32_t class_type_mask = 0x3;
6213 uint16_t fcoe_other_function = 0xffff, i;
6214
7ec0effd
AD		 6215 if (IS_QLA8044(ha)) {
6216 drv_presence = qla8044_rd_direct(vha,
6217 QLA8044_CRB_DRV_ACTIVE_INDEX);
6218 dev_part_info1 = qla8044_rd_direct(vha,
6219 QLA8044_CRB_DEV_PART_INFO_INDEX);
6220 dev_part_info2 = qla8044_rd_direct(vha,
6221 QLA8044_CRB_DEV_PART_INFO2);
6222 } else {
6223 qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
6224 qla83xx_rd_reg(vha, QLA83XX_DEV_PARTINFO1, &dev_part_info1);
6225 qla83xx_rd_reg(vha, QLA83XX_DEV_PARTINFO2, &dev_part_info2);
6226 }
7d613ac6
SV		 6227 for (i = 0; i < 8; i++) {
6228 class_type = ((dev_part_info1 >> (i * 4)) & class_type_mask);
6229 if ((class_type == QLA83XX_CLASS_TYPE_FCOE) &&
6230 (i != ha->portnum)) {
6231 fcoe_other_function = i;
6232 break;
6233 }
6234 }
6235 if (fcoe_other_function == 0xffff) {
6236 for (i = 0; i < 8; i++) {
6237 class_type = ((dev_part_info2 >> (i * 4)) &
6238 class_type_mask);
6239 if ((class_type == QLA83XX_CLASS_TYPE_FCOE) &&
6240 ((i + 8) != ha->portnum)) {
6241 fcoe_other_function = i + 8;
6242 break;
6243 }
6244 }
6245 }
6246 /*
6247 * Prepare drv-presence mask based on fcoe functions present.
6248 * However consider only valid physical fcoe function numbers (0-15).
6249 */
6250 drv_presence_mask = ~((1 << (ha->portnum)) |
6251 ((fcoe_other_function == 0xffff) ?
6252 0 : (1 << (fcoe_other_function))));
6253
6254 /* We are the reset owner iff:
6255 * - No other protocol drivers present.
6256 * - This is the lowest among fcoe functions. */
6257 if (!(drv_presence & drv_presence_mask) &&
6258 (ha->portnum < fcoe_other_function)) {
6259 ql_dbg(ql_dbg_p3p, vha, 0xb07f,
6260 "This host is Reset owner.\n");
6261 ha->flags.nic_core_reset_owner = 1;
6262 }
6263}
6264
fa492630 6265static int
7d613ac6
SV		 6266__qla83xx_set_drv_ack(scsi_qla_host_t *vha)
6267{
6268 int rval = QLA_SUCCESS;
6269 struct qla_hw_data *ha = vha->hw;
6270 uint32_t drv_ack;
6271
6272 rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRIVER_ACK, &drv_ack);
6273 if (rval == QLA_SUCCESS) {
6274 drv_ack |= (1 << ha->portnum);
6275 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRIVER_ACK, drv_ack);
6276 }
6277
6278 return rval;
6279}
6280
fa492630 6281static int
7d613ac6
SV		 6282__qla83xx_clear_drv_ack(scsi_qla_host_t *vha)
6283{
6284 int rval = QLA_SUCCESS;
6285 struct qla_hw_data *ha = vha->hw;
6286 uint32_t drv_ack;
6287
6288 rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRIVER_ACK, &drv_ack);
6289 if (rval == QLA_SUCCESS) {
6290 drv_ack &= ~(1 << ha->portnum);
6291 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRIVER_ACK, drv_ack);
6292 }
6293
6294 return rval;
6295}
6296
fa492630 6297static const char *
7d613ac6
SV		 6298qla83xx_dev_state_to_string(uint32_t dev_state)
6299{
6300 switch (dev_state) {
6301 case QLA8XXX_DEV_COLD:
6302 return "COLD/RE-INIT";
6303 case QLA8XXX_DEV_INITIALIZING:
6304 return "INITIALIZING";
6305 case QLA8XXX_DEV_READY:
6306 return "READY";
6307 case QLA8XXX_DEV_NEED_RESET:
6308 return "NEED RESET";
6309 case QLA8XXX_DEV_NEED_QUIESCENT:
6310 return "NEED QUIESCENT";
6311 case QLA8XXX_DEV_FAILED:
6312 return "FAILED";
6313 case QLA8XXX_DEV_QUIESCENT:
6314 return "QUIESCENT";
6315 default:
6316 return "Unknown";
6317 }
6318}
6319
6320/* Assumes idc-lock always held on entry */
6321void
6322qla83xx_idc_audit(scsi_qla_host_t *vha, int audit_type)
6323{
6324 struct qla_hw_data *ha = vha->hw;
6325 uint32_t idc_audit_reg = 0, duration_secs = 0;
6326
6327 switch (audit_type) {
6328 case IDC_AUDIT_TIMESTAMP:
6329 ha->idc_audit_ts = (jiffies_to_msecs(jiffies) / 1000);
6330 idc_audit_reg = (ha->portnum) |
6331 (IDC_AUDIT_TIMESTAMP << 7) | (ha->idc_audit_ts << 8);
6332 qla83xx_wr_reg(vha, QLA83XX_IDC_AUDIT, idc_audit_reg);
6333 break;
6334
6335 case IDC_AUDIT_COMPLETION:
6336 duration_secs = ((jiffies_to_msecs(jiffies) -
6337 jiffies_to_msecs(ha->idc_audit_ts)) / 1000);
6338 idc_audit_reg = (ha->portnum) |
6339 (IDC_AUDIT_COMPLETION << 7) | (duration_secs << 8);
6340 qla83xx_wr_reg(vha, QLA83XX_IDC_AUDIT, idc_audit_reg);
6341 break;
6342
6343 default:
6344 ql_log(ql_log_warn, vha, 0xb078,
6345 "Invalid audit type specified.\n");
6346 break;
6347 }
6348}
6349
6350/* Assumes idc_lock always held on entry */
fa492630 6351static int
7d613ac6
SV		 6352qla83xx_initiating_reset(scsi_qla_host_t *vha)
6353{
6354 struct qla_hw_data *ha = vha->hw;
6355 uint32_t idc_control, dev_state;
6356
6357 __qla83xx_get_idc_control(vha, &idc_control);
6358 if ((idc_control & QLA83XX_IDC_RESET_DISABLED)) {
6359 ql_log(ql_log_info, vha, 0xb080,
6360 "NIC Core reset has been disabled. idc-control=0x%x\n",
6361 idc_control);
6362 return QLA_FUNCTION_FAILED;
6363 }
6364
6365 /* Set NEED-RESET iff in READY state and we are the reset-owner */
6366 qla83xx_rd_reg(vha, QLA83XX_IDC_DEV_STATE, &dev_state);
6367 if (ha->flags.nic_core_reset_owner && dev_state == QLA8XXX_DEV_READY) {
6368 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE,
6369 QLA8XXX_DEV_NEED_RESET);
6370 ql_log(ql_log_info, vha, 0xb056, "HW State: NEED RESET.\n");
6371 qla83xx_idc_audit(vha, IDC_AUDIT_TIMESTAMP);
6372 } else {
6373 const char *state = qla83xx_dev_state_to_string(dev_state);
6374 ql_log(ql_log_info, vha, 0xb057, "HW State: %s.\n", state);
6375
6376 /* SV: XXX: Is timeout required here? */
6377 /* Wait for IDC state change READY -> NEED_RESET */
6378 while (dev_state == QLA8XXX_DEV_READY) {
6379 qla83xx_idc_unlock(vha, 0);
6380 msleep(200);
6381 qla83xx_idc_lock(vha, 0);
6382 qla83xx_rd_reg(vha, QLA83XX_IDC_DEV_STATE, &dev_state);
6383 }
6384 }
6385
6386 /* Send IDC ack by writing to drv-ack register */
6387 __qla83xx_set_drv_ack(vha);
6388
6389 return QLA_SUCCESS;
6390}
6391
6392int
6393__qla83xx_set_idc_control(scsi_qla_host_t *vha, uint32_t idc_control)
6394{
6395 return qla83xx_wr_reg(vha, QLA83XX_IDC_CONTROL, idc_control);
6396}
6397
7d613ac6
SV		 6398int
6399__qla83xx_get_idc_control(scsi_qla_host_t *vha, uint32_t *idc_control)
6400{
6401 return qla83xx_rd_reg(vha, QLA83XX_IDC_CONTROL, idc_control);
6402}
6403
fa492630 6404static int
7d613ac6
SV		 6405qla83xx_check_driver_presence(scsi_qla_host_t *vha)
6406{
6407 uint32_t drv_presence = 0;
6408 struct qla_hw_data *ha = vha->hw;
6409
6410 qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
6411 if (drv_presence & (1 << ha->portnum))
6412 return QLA_SUCCESS;
6413 else
6414 return QLA_TEST_FAILED;
6415}
6416
6417int
6418qla83xx_nic_core_reset(scsi_qla_host_t *vha)
6419{
6420 int rval = QLA_SUCCESS;
6421 struct qla_hw_data *ha = vha->hw;
6422
6423 ql_dbg(ql_dbg_p3p, vha, 0xb058,
6424 "Entered %s().\n", __func__);
6425
6426 if (vha->device_flags & DFLG_DEV_FAILED) {
6427 ql_log(ql_log_warn, vha, 0xb059,
6428 "Device in unrecoverable FAILED state.\n");
6429 return QLA_FUNCTION_FAILED;
6430 }
6431
6432 qla83xx_idc_lock(vha, 0);
6433
6434 if (qla83xx_check_driver_presence(vha) != QLA_SUCCESS) {
6435 ql_log(ql_log_warn, vha, 0xb05a,
6436 "Function=0x%x has been removed from IDC participation.\n",
6437 ha->portnum);
6438 rval = QLA_FUNCTION_FAILED;
6439 goto exit;
6440 }
6441
6442 qla83xx_reset_ownership(vha);
6443
6444 rval = qla83xx_initiating_reset(vha);
6445
6446 /*
6447 * Perform reset if we are the reset-owner,
6448 * else wait till IDC state changes to READY/FAILED.
6449 */
6450 if (rval == QLA_SUCCESS) {
6451 rval = qla83xx_idc_state_handler(vha);
6452
6453 if (rval == QLA_SUCCESS)
6454 ha->flags.nic_core_hung = 0;
6455 __qla83xx_clear_drv_ack(vha);
6456 }
6457
6458exit:
6459 qla83xx_idc_unlock(vha, 0);
6460
6461 ql_dbg(ql_dbg_p3p, vha, 0xb05b, "Exiting %s.\n", __func__);
6462
6463 return rval;
6464}
6465
81178772
SK		 6466int
6467qla2xxx_mctp_dump(scsi_qla_host_t *vha)
6468{
6469 struct qla_hw_data *ha = vha->hw;
6470 int rval = QLA_FUNCTION_FAILED;
6471
6472 if (!IS_MCTP_CAPABLE(ha)) {
6473 /* This message can be removed from the final version */
6474 ql_log(ql_log_info, vha, 0x506d,
6475 "This board is not MCTP capable\n");
6476 return rval;
6477 }
6478
6479 if (!ha->mctp_dump) {
6480 ha->mctp_dump = dma_alloc_coherent(&ha->pdev->dev,
6481 MCTP_DUMP_SIZE, &ha->mctp_dump_dma, GFP_KERNEL);
6482
6483 if (!ha->mctp_dump) {
6484 ql_log(ql_log_warn, vha, 0x506e,
6485 "Failed to allocate memory for mctp dump\n");
6486 return rval;
6487 }
6488 }
6489
6490#define MCTP_DUMP_STR_ADDR 0x00000000
6491 rval = qla2x00_dump_mctp_data(vha, ha->mctp_dump_dma,
6492 MCTP_DUMP_STR_ADDR, MCTP_DUMP_SIZE/4);
6493 if (rval != QLA_SUCCESS) {
6494 ql_log(ql_log_warn, vha, 0x506f,
6495 "Failed to capture mctp dump\n");
6496 } else {
6497 ql_log(ql_log_info, vha, 0x5070,
6498 "Mctp dump capture for host (%ld/%p).\n",
6499 vha->host_no, ha->mctp_dump);
6500 ha->mctp_dumped = 1;
6501 }
6502
409ee0fe 6503 if (!ha->flags.nic_core_reset_hdlr_active && !ha->portnum) {
81178772
SK		 6504 ha->flags.nic_core_reset_hdlr_active = 1;
6505 rval = qla83xx_restart_nic_firmware(vha);
6506 if (rval)
6507 /* NIC Core reset failed. */
6508 ql_log(ql_log_warn, vha, 0x5071,
6509 "Failed to restart nic firmware\n");
6510 else
6511 ql_dbg(ql_dbg_p3p, vha, 0xb084,
6512 "Restarted NIC firmware successfully.\n");
6513 ha->flags.nic_core_reset_hdlr_active = 0;
6514 }
6515
6516 return rval;
6517
6518}
6519
579d12b5 6520/*
8fcd6b8b 6521* qla2x00_quiesce_io
579d12b5
SK		 6522* Description: This function will block the new I/Os
6523* Its not aborting any I/Os as context
6524* is not destroyed during quiescence
6525* Arguments: scsi_qla_host_t
6526* return : void
6527*/
6528void
8fcd6b8b 6529qla2x00_quiesce_io(scsi_qla_host_t *vha)
579d12b5
SK		 6530{
6531 struct qla_hw_data *ha = vha->hw;
6532 struct scsi_qla_host *vp;
6533
8fcd6b8b
CD		 6534 ql_dbg(ql_dbg_dpc, vha, 0x401d,
6535 "Quiescing I/O - ha=%p.\n", ha);
579d12b5
SK		 6536
6537 atomic_set(&ha->loop_down_timer, LOOP_DOWN_TIME);
6538 if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
6539 atomic_set(&vha->loop_state, LOOP_DOWN);
6540 qla2x00_mark_all_devices_lost(vha, 0);
6541 list_for_each_entry(vp, &ha->vp_list, list)
8fcd6b8b 6542 qla2x00_mark_all_devices_lost(vp, 0);
579d12b5
SK		 6543 } else {
6544 if (!atomic_read(&vha->loop_down_timer))
6545 atomic_set(&vha->loop_down_timer,
6546 LOOP_DOWN_TIME);
6547 }
6548 /* Wait for pending cmds to complete */
6549 qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST);
6550}
6551
a9083016
GM		 6552void
6553qla2x00_abort_isp_cleanup(scsi_qla_host_t *vha)
6554{
6555 struct qla_hw_data *ha = vha->hw;
579d12b5 6556 struct scsi_qla_host *vp;
feafb7b1 6557 unsigned long flags;
6aef87be 6558 fc_port_t *fcport;
7c3f8fd1 6559 u16 i;
a9083016 6560
e46ef004
SK		 6561 /* For ISP82XX, driver waits for completion of the commands.
6562 * online flag should be set.
6563 */
7ec0effd 6564 if (!(IS_P3P_TYPE(ha)))
e46ef004 6565 vha->flags.online = 0;
a9083016
GM		 6566 ha->flags.chip_reset_done = 0;
6567 clear_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
2be21fa2 6568 vha->qla_stats.total_isp_aborts++;
a9083016 6569
7c3df132
SK		 6570 ql_log(ql_log_info, vha, 0x00af,
6571 "Performing ISP error recovery - ha=%p.\n", ha);
a9083016 6572
b2000805 6573 ha->flags.purge_mbox = 1;
e46ef004
SK		 6574 /* For ISP82XX, reset_chip is just disabling interrupts.
6575 * Driver waits for the completion of the commands.
6576 * the interrupts need to be enabled.
6577 */
7ec0effd 6578 if (!(IS_P3P_TYPE(ha)))
a9083016
GM		 6579 ha->isp_ops->reset_chip(vha);
6580
5d74c87a 6581 ha->link_data_rate = PORT_SPEED_UNKNOWN;
9cd883f0
QT		 6582 SAVE_TOPO(ha);
6583 ha->flags.rida_fmt2 = 0;
ec7193e2
QT		 6584 ha->flags.n2n_ae = 0;
6585 ha->flags.lip_ae = 0;
6586 ha->current_topology = 0;
6587 ha->flags.fw_started = 0;
6588 ha->flags.fw_init_done = 0;
b2000805
QT		 6589 ha->chip_reset++;
6590 ha->base_qpair->chip_reset = ha->chip_reset;
7c3f8fd1
QT		 6591 for (i = 0; i < ha->max_qpairs; i++) {
6592 if (ha->queue_pair_map[i])
6593 ha->queue_pair_map[i]->chip_reset =
6594 ha->base_qpair->chip_reset;
6595 }
726b8548 6596
b2000805
QT		 6597 /* purge MBox commands */
6598 if (atomic_read(&ha->num_pend_mbx_stage3)) {
6599 clear_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags);
6600 complete(&ha->mbx_intr_comp);
6601 }
6602
6603 i = 0;
6604 while (atomic_read(&ha->num_pend_mbx_stage3) ||
6605 atomic_read(&ha->num_pend_mbx_stage2) ||
6606 atomic_read(&ha->num_pend_mbx_stage1)) {
6607 msleep(20);
6608 i++;
6609 if (i > 50)
6610 break;
6611 }
6612 ha->flags.purge_mbox = 0;
6613
a9083016
GM		 6614 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
6615 if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
6616 atomic_set(&vha->loop_state, LOOP_DOWN);
6617 qla2x00_mark_all_devices_lost(vha, 0);
feafb7b1
AE		 6618
6619 spin_lock_irqsave(&ha->vport_slock, flags);
579d12b5 6620 list_for_each_entry(vp, &ha->vp_list, list) {
feafb7b1
AE		 6621 atomic_inc(&vp->vref_count);
6622 spin_unlock_irqrestore(&ha->vport_slock, flags);
6623
a9083016 6624 qla2x00_mark_all_devices_lost(vp, 0);
feafb7b1
AE		 6625
6626 spin_lock_irqsave(&ha->vport_slock, flags);
6627 atomic_dec(&vp->vref_count);
6628 }
6629 spin_unlock_irqrestore(&ha->vport_slock, flags);
a9083016
GM		 6630 } else {
6631 if (!atomic_read(&vha->loop_down_timer))
6632 atomic_set(&vha->loop_down_timer,
6633 LOOP_DOWN_TIME);
6634 }
6635
6aef87be
AV		 6636 /* Clear all async request states across all VPs. */
6637 list_for_each_entry(fcport, &vha->vp_fcports, list)
6638 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT);
6639 spin_lock_irqsave(&ha->vport_slock, flags);
6640 list_for_each_entry(vp, &ha->vp_list, list) {
6641 atomic_inc(&vp->vref_count);
6642 spin_unlock_irqrestore(&ha->vport_slock, flags);
6643
6644 list_for_each_entry(fcport, &vp->vp_fcports, list)
6645 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT);
6646
6647 spin_lock_irqsave(&ha->vport_slock, flags);
6648 atomic_dec(&vp->vref_count);
6649 }
6650 spin_unlock_irqrestore(&ha->vport_slock, flags);
6651
bddd2d65
LC		 6652 if (!ha->flags.eeh_busy) {
6653 /* Make sure for ISP 82XX IO DMA is complete */
7ec0effd 6654 if (IS_P3P_TYPE(ha)) {
7190575f 6655 qla82xx_chip_reset_cleanup(vha);
7c3df132
SK		 6656 ql_log(ql_log_info, vha, 0x00b4,
6657 "Done chip reset cleanup.\n");
a9083016 6658
e46ef004
SK		 6659 /* Done waiting for pending commands.
6660 * Reset the online flag.
6661 */
6662 vha->flags.online = 0;
4d78c973 6663 }
a9083016 6664
bddd2d65
LC		 6665 /* Requeue all commands in outstanding command list. */
6666 qla2x00_abort_all_cmds(vha, DID_RESET << 16);
6667 }
b6a029e1
AE		 6668 /* memory barrier */
6669 wmb();
a9083016
GM		 6670}
6671
1da177e4
LT		 6672/*
6673* qla2x00_abort_isp
6674* Resets ISP and aborts all outstanding commands.
6675*
6676* Input:
6677* ha = adapter block pointer.
6678*
6679* Returns:
6680* 0 = success
6681*/
6682int
e315cd28 6683qla2x00_abort_isp(scsi_qla_host_t *vha)
1da177e4 6684{
476e8978 6685 int rval;
1da177e4 6686 uint8_t status = 0;
e315cd28
AC		 6687 struct qla_hw_data *ha = vha->hw;
6688 struct scsi_qla_host *vp;
73208dfd 6689 struct req_que *req = ha->req_q_map[0];
feafb7b1 6690 unsigned long flags;
1da177e4 6691
e315cd28 6692 if (vha->flags.online) {
a9083016 6693 qla2x00_abort_isp_cleanup(vha);
1da177e4 6694
a6171297
SV		 6695 if (IS_QLA8031(ha)) {
6696 ql_dbg(ql_dbg_p3p, vha, 0xb05c,
6697 "Clearing fcoe driver presence.\n");
6698 if (qla83xx_clear_drv_presence(vha) != QLA_SUCCESS)
6699 ql_dbg(ql_dbg_p3p, vha, 0xb073,
6700 "Error while clearing DRV-Presence.\n");
6701 }
6702
85880801
AV		 6703 if (unlikely(pci_channel_offline(ha->pdev) &&
6704 ha->flags.pci_channel_io_perm_failure)) {
6705 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
6706 status = 0;
6707 return status;
6708 }
6709
0645cb83
QT		 6710 switch (vha->qlini_mode) {
6711 case QLA2XXX_INI_MODE_DISABLED:
6712 if (!qla_tgt_mode_enabled(vha))
6713 return 0;
6714 break;
6715 case QLA2XXX_INI_MODE_DUAL:
6716 if (!qla_dual_mode_enabled(vha))
6717 return 0;
6718 break;
6719 case QLA2XXX_INI_MODE_ENABLED:
6720 default:
6721 break;
6722 }
6723
73208dfd 6724 ha->isp_ops->get_flash_version(vha, req->ring);
30c47662 6725
e315cd28 6726 ha->isp_ops->nvram_config(vha);
1da177e4 6727
e315cd28
AC		 6728 if (!qla2x00_restart_isp(vha)) {
6729 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
1da177e4 6730
e315cd28 6731 if (!atomic_read(&vha->loop_down_timer)) {
1da177e4
LT		 6732 /*
6733 * Issue marker command only when we are going
6734 * to start the I/O .
6735 */
e315cd28 6736 vha->marker_needed = 1;
1da177e4
LT		 6737 }
6738
e315cd28 6739 vha->flags.online = 1;
1da177e4 6740
fd34f556 6741 ha->isp_ops->enable_intrs(ha);
1da177e4 6742
fa2a1ce5 6743 ha->isp_abort_cnt = 0;
e315cd28 6744 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
476e8978 6745
6246b8a1
GM		 6746 if (IS_QLA81XX(ha) || IS_QLA8031(ha))
6747 qla2x00_get_fw_version(vha);
df613b96
AV		 6748 if (ha->fce) {
6749 ha->flags.fce_enabled = 1;
6750 memset(ha->fce, 0,
6751 fce_calc_size(ha->fce_bufs));
e315cd28 6752 rval = qla2x00_enable_fce_trace(vha,
df613b96
AV		 6753 ha->fce_dma, ha->fce_bufs, ha->fce_mb,
6754 &ha->fce_bufs);
6755 if (rval) {
7c3df132 6756 ql_log(ql_log_warn, vha, 0x8033,
df613b96
AV		 6757 "Unable to reinitialize FCE "
6758 "(%d).\n", rval);
6759 ha->flags.fce_enabled = 0;
6760 }
6761 }
436a7b11
AV		 6762
6763 if (ha->eft) {
6764 memset(ha->eft, 0, EFT_SIZE);
e315cd28 6765 rval = qla2x00_enable_eft_trace(vha,
436a7b11
AV		 6766 ha->eft_dma, EFT_NUM_BUFFERS);
6767 if (rval) {
7c3df132 6768 ql_log(ql_log_warn, vha, 0x8034,
436a7b11
AV		 6769 "Unable to reinitialize EFT "
6770 "(%d).\n", rval);
6771 }
6772 }
1da177e4 6773 } else { /* failed the ISP abort */
e315cd28
AC		 6774 vha->flags.online = 1;
6775 if (test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) {
1da177e4 6776 if (ha->isp_abort_cnt == 0) {
7c3df132
SK		 6777 ql_log(ql_log_fatal, vha, 0x8035,
6778 "ISP error recover failed - "
6779 "board disabled.\n");
fa2a1ce5 6780 /*
1da177e4
LT		 6781 * The next call disables the board
6782 * completely.
6783 */
1e4ac5d6 6784 qla2x00_abort_isp_cleanup(vha);
e315cd28 6785 vha->flags.online = 0;
1da177e4 6786 clear_bit(ISP_ABORT_RETRY,
e315cd28 6787 &vha->dpc_flags);
1da177e4
LT		 6788 status = 0;
6789 } else { /* schedule another ISP abort */
6790 ha->isp_abort_cnt--;
7c3df132
SK		 6791 ql_dbg(ql_dbg_taskm, vha, 0x8020,
6792 "ISP abort - retry remaining %d.\n",
6793 ha->isp_abort_cnt);
1da177e4
LT		 6794 status = 1;
6795 }
6796 } else {
6797 ha->isp_abort_cnt = MAX_RETRIES_OF_ISP_ABORT;
7c3df132
SK		 6798 ql_dbg(ql_dbg_taskm, vha, 0x8021,
6799 "ISP error recovery - retrying (%d) "
6800 "more times.\n", ha->isp_abort_cnt);
e315cd28 6801 set_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
1da177e4
LT		 6802 status = 1;
6803 }
6804 }
fa2a1ce5 6805
1da177e4
LT		 6806 }
6807
e315cd28 6808 if (!status) {
7c3df132 6809 ql_dbg(ql_dbg_taskm, vha, 0x8022, "%s succeeded.\n", __func__);
1608cc4a 6810 qla2x00_configure_hba(vha);
feafb7b1
AE		 6811 spin_lock_irqsave(&ha->vport_slock, flags);
6812 list_for_each_entry(vp, &ha->vp_list, list) {
6813 if (vp->vp_idx) {
6814 atomic_inc(&vp->vref_count);
6815 spin_unlock_irqrestore(&ha->vport_slock, flags);
6816
e315cd28 6817 qla2x00_vp_abort_isp(vp);
feafb7b1
AE		 6818
6819 spin_lock_irqsave(&ha->vport_slock, flags);
6820 atomic_dec(&vp->vref_count);
6821 }
e315cd28 6822 }
feafb7b1
AE		 6823 spin_unlock_irqrestore(&ha->vport_slock, flags);
6824
7d613ac6
SV		 6825 if (IS_QLA8031(ha)) {
6826 ql_dbg(ql_dbg_p3p, vha, 0xb05d,
6827 "Setting back fcoe driver presence.\n");
6828 if (qla83xx_set_drv_presence(vha) != QLA_SUCCESS)
6829 ql_dbg(ql_dbg_p3p, vha, 0xb074,
6830 "Error while setting DRV-Presence.\n");
6831 }
e315cd28 6832 } else {
d8424f68
JP		 6833 ql_log(ql_log_warn, vha, 0x8023, "%s **** FAILED ****.\n",
6834 __func__);
1da177e4
LT		 6835 }
6836
6837 return(status);
6838}
6839
6840/*
6841* qla2x00_restart_isp
6842* restarts the ISP after a reset
6843*
6844* Input:
6845* ha = adapter block pointer.
6846*
6847* Returns:
6848* 0 = success
6849*/
6850static int
e315cd28 6851qla2x00_restart_isp(scsi_qla_host_t *vha)
1da177e4 6852{
c6b2fca8 6853 int status = 0;
e315cd28 6854 struct qla_hw_data *ha = vha->hw;
73208dfd
AC		 6855 struct req_que *req = ha->req_q_map[0];
6856 struct rsp_que *rsp = ha->rsp_q_map[0];
1da177e4
LT		 6857
6858 /* If firmware needs to be loaded */
e315cd28
AC		 6859 if (qla2x00_isp_firmware(vha)) {
6860 vha->flags.online = 0;
6861 status = ha->isp_ops->chip_diag(vha);
6862 if (!status)
6863 status = qla2x00_setup_chip(vha);
1da177e4
LT		 6864 }
6865
e315cd28
AC		 6866 if (!status && !(status = qla2x00_init_rings(vha))) {
6867 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
2533cf67 6868 ha->flags.chip_reset_done = 1;
7108b76e 6869
73208dfd
AC		 6870 /* Initialize the queues in use */
6871 qla25xx_init_queues(ha);
6872
e315cd28
AC		 6873 status = qla2x00_fw_ready(vha);
6874 if (!status) {
0107109e 6875 /* Issue a marker after FW becomes ready. */
73208dfd 6876 qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL);
7108b76e 6877 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
1da177e4
LT		 6878 }
6879
6880 /* if no cable then assume it's good */
e315cd28 6881 if ((vha->device_flags & DFLG_NO_CABLE))
1da177e4 6882 status = 0;
1da177e4
LT		 6883 }
6884 return (status);
6885}
6886
73208dfd
AC		 6887static int
6888qla25xx_init_queues(struct qla_hw_data *ha)
6889{
6890 struct rsp_que *rsp = NULL;
6891 struct req_que *req = NULL;
6892 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
6893 int ret = -1;
6894 int i;
6895
2afa19a9 6896 for (i = 1; i < ha->max_rsp_queues; i++) {
73208dfd 6897 rsp = ha->rsp_q_map[i];
cb43285f 6898 if (rsp && test_bit(i, ha->rsp_qid_map)) {
73208dfd 6899 rsp->options &= ~BIT_0;
618a7523 6900 ret = qla25xx_init_rsp_que(base_vha, rsp);
73208dfd 6901 if (ret != QLA_SUCCESS)
7c3df132
SK		 6902 ql_dbg(ql_dbg_init, base_vha, 0x00ff,
6903 "%s Rsp que: %d init failed.\n",
6904 __func__, rsp->id);
73208dfd 6905 else
7c3df132
SK		 6906 ql_dbg(ql_dbg_init, base_vha, 0x0100,
6907 "%s Rsp que: %d inited.\n",
6908 __func__, rsp->id);
73208dfd 6909 }
2afa19a9
AC		 6910 }
6911 for (i = 1; i < ha->max_req_queues; i++) {
73208dfd 6912 req = ha->req_q_map[i];
cb43285f
QT		 6913 if (req && test_bit(i, ha->req_qid_map)) {
6914 /* Clear outstanding commands array. */
73208dfd 6915 req->options &= ~BIT_0;
618a7523 6916 ret = qla25xx_init_req_que(base_vha, req);
73208dfd 6917 if (ret != QLA_SUCCESS)
7c3df132
SK		 6918 ql_dbg(ql_dbg_init, base_vha, 0x0101,
6919 "%s Req que: %d init failed.\n",
6920 __func__, req->id);
73208dfd 6921 else
7c3df132
SK		 6922 ql_dbg(ql_dbg_init, base_vha, 0x0102,
6923 "%s Req que: %d inited.\n",
6924 __func__, req->id);
73208dfd
AC		 6925 }
6926 }
6927 return ret;
6928}
6929
1da177e4
LT		 6930/*
6931* qla2x00_reset_adapter
6932* Reset adapter.
6933*
6934* Input:
6935* ha = adapter block pointer.
6936*/
abbd8870 6937void
e315cd28 6938qla2x00_reset_adapter(scsi_qla_host_t *vha)
1da177e4
LT		 6939{
6940 unsigned long flags = 0;
e315cd28 6941 struct qla_hw_data *ha = vha->hw;
3d71644c 6942 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1da177e4 6943
e315cd28 6944 vha->flags.online = 0;
fd34f556 6945 ha->isp_ops->disable_intrs(ha);
1da177e4 6946
1da177e4
LT		 6947 spin_lock_irqsave(&ha->hardware_lock, flags);
6948 WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
6949 RD_REG_WORD(&reg->hccr); /* PCI Posting. */
6950 WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
6951 RD_REG_WORD(&reg->hccr); /* PCI Posting. */
6952 spin_unlock_irqrestore(&ha->hardware_lock, flags);
6953}
0107109e
AV		 6954
6955void
e315cd28 6956qla24xx_reset_adapter(scsi_qla_host_t *vha)
0107109e
AV		 6957{
6958 unsigned long flags = 0;
e315cd28 6959 struct qla_hw_data *ha = vha->hw;
0107109e
AV		 6960 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
6961
7ec0effd 6962 if (IS_P3P_TYPE(ha))
a9083016
GM		 6963 return;
6964
e315cd28 6965 vha->flags.online = 0;
fd34f556 6966 ha->isp_ops->disable_intrs(ha);
0107109e
AV		 6967
6968 spin_lock_irqsave(&ha->hardware_lock, flags);
6969 WRT_REG_DWORD(&reg->hccr, HCCRX_SET_RISC_RESET);
6970 RD_REG_DWORD(&reg->hccr);
6971 WRT_REG_DWORD(&reg->hccr, HCCRX_REL_RISC_PAUSE);
6972 RD_REG_DWORD(&reg->hccr);
6973 spin_unlock_irqrestore(&ha->hardware_lock, flags);
09ff36d3
AV		 6974
6975 if (IS_NOPOLLING_TYPE(ha))
6976 ha->isp_ops->enable_intrs(ha);
0107109e
AV		 6977}
6978
4e08df3f
DM		 6979/* On sparc systems, obtain port and node WWN from firmware
6980 * properties.
6981 */
e315cd28
AC		 6982static void qla24xx_nvram_wwn_from_ofw(scsi_qla_host_t *vha,
6983 struct nvram_24xx *nv)
4e08df3f
DM		 6984{
6985#ifdef CONFIG_SPARC
e315cd28 6986 struct qla_hw_data *ha = vha->hw;
4e08df3f 6987 struct pci_dev *pdev = ha->pdev;
15576bc8
DM		 6988 struct device_node *dp = pci_device_to_OF_node(pdev);
6989 const u8 *val;
4e08df3f
DM		 6990 int len;
6991
6992 val = of_get_property(dp, "port-wwn", &len);
6993 if (val && len >= WWN_SIZE)
6994 memcpy(nv->port_name, val, WWN_SIZE);
6995
6996 val = of_get_property(dp, "node-wwn", &len);
6997 if (val && len >= WWN_SIZE)
6998 memcpy(nv->node_name, val, WWN_SIZE);
6999#endif
7000}
7001
0107109e 7002int
e315cd28 7003qla24xx_nvram_config(scsi_qla_host_t *vha)
0107109e 7004{
4e08df3f 7005 int rval;
0107109e
AV		 7006 struct init_cb_24xx *icb;
7007 struct nvram_24xx *nv;
7008 uint32_t *dptr;
7009 uint8_t *dptr1, *dptr2;
7010 uint32_t chksum;
7011 uint16_t cnt;
e315cd28 7012 struct qla_hw_data *ha = vha->hw;
0107109e 7013
4e08df3f 7014 rval = QLA_SUCCESS;
0107109e 7015 icb = (struct init_cb_24xx *)ha->init_cb;
281afe19 7016 nv = ha->nvram;
0107109e
AV		 7017
7018 /* Determine NVRAM starting address. */
f73cb695 7019 if (ha->port_no == 0) {
e5b68a61
AC		 7020 ha->nvram_base = FA_NVRAM_FUNC0_ADDR;
7021 ha->vpd_base = FA_NVRAM_VPD0_ADDR;
7022 } else {
0107109e 7023 ha->nvram_base = FA_NVRAM_FUNC1_ADDR;
6f641790 7024 ha->vpd_base = FA_NVRAM_VPD1_ADDR;
7025 }
f73cb695 7026
e5b68a61
AC		 7027 ha->nvram_size = sizeof(struct nvram_24xx);
7028 ha->vpd_size = FA_NVRAM_VPD_SIZE;
0107109e 7029
281afe19
SJ		 7030 /* Get VPD data into cache */
7031 ha->vpd = ha->nvram + VPD_OFFSET;
e315cd28 7032 ha->isp_ops->read_nvram(vha, (uint8_t *)ha->vpd,
281afe19
SJ		 7033 ha->nvram_base - FA_NVRAM_FUNC0_ADDR, FA_NVRAM_VPD_SIZE * 4);
7034
7035 /* Get NVRAM data into cache and calculate checksum. */
0107109e 7036 dptr = (uint32_t *)nv;
e315cd28 7037 ha->isp_ops->read_nvram(vha, (uint8_t *)dptr, ha->nvram_base,
0107109e 7038 ha->nvram_size);
da08ef5c
JC		 7039 for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++, dptr++)
7040 chksum += le32_to_cpu(*dptr);
0107109e 7041
7c3df132
SK		 7042 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x006a,
7043 "Contents of NVRAM\n");
7044 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x010d,
7045 (uint8_t *)nv, ha->nvram_size);
0107109e
AV		 7046
7047 /* Bad NVRAM data, set defaults parameters. */
7048 if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P'
7049 || nv->id[3] != ' ' ||
ad950360 7050 nv->nvram_version < cpu_to_le16(ICB_VERSION)) {
0107109e 7051 /* Reset NVRAM data. */
7c3df132 7052 ql_log(ql_log_warn, vha, 0x006b,
9e336520 7053 "Inconsistent NVRAM detected: checksum=0x%x id=%c "
7c3df132
SK		 7054 "version=0x%x.\n", chksum, nv->id[0], nv->nvram_version);
7055 ql_log(ql_log_warn, vha, 0x006c,
7056 "Falling back to functioning (yet invalid -- WWPN) "
7057 "defaults.\n");
4e08df3f
DM		 7058
7059 /*
7060 * Set default initialization control block.
7061 */
7062 memset(nv, 0, ha->nvram_size);
ad950360
BVA		 7063 nv->nvram_version = cpu_to_le16(ICB_VERSION);
7064 nv->version = cpu_to_le16(ICB_VERSION);
98aee70d 7065 nv->frame_payload_size = 2048;
ad950360
BVA		 7066 nv->execution_throttle = cpu_to_le16(0xFFFF);
7067 nv->exchange_count = cpu_to_le16(0);
7068 nv->hard_address = cpu_to_le16(124);
4e08df3f 7069 nv->port_name[0] = 0x21;
f73cb695 7070 nv->port_name[1] = 0x00 + ha->port_no + 1;
4e08df3f
DM		 7071 nv->port_name[2] = 0x00;
7072 nv->port_name[3] = 0xe0;
7073 nv->port_name[4] = 0x8b;
7074 nv->port_name[5] = 0x1c;
7075 nv->port_name[6] = 0x55;
7076 nv->port_name[7] = 0x86;
7077 nv->node_name[0] = 0x20;
7078 nv->node_name[1] = 0x00;
7079 nv->node_name[2] = 0x00;
7080 nv->node_name[3] = 0xe0;
7081 nv->node_name[4] = 0x8b;
7082 nv->node_name[5] = 0x1c;
7083 nv->node_name[6] = 0x55;
7084 nv->node_name[7] = 0x86;
e315cd28 7085 qla24xx_nvram_wwn_from_ofw(vha, nv);
ad950360
BVA		 7086 nv->login_retry_count = cpu_to_le16(8);
7087 nv->interrupt_delay_timer = cpu_to_le16(0);
7088 nv->login_timeout = cpu_to_le16(0);
4e08df3f 7089 nv->firmware_options_1 =
ad950360
BVA		 7090 cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1);
7091 nv->firmware_options_2 = cpu_to_le32(2 << 4);
7092 nv->firmware_options_2 |= cpu_to_le32(BIT_12);
7093 nv->firmware_options_3 = cpu_to_le32(2 << 13);
7094 nv->host_p = cpu_to_le32(BIT_11|BIT_10);
7095 nv->efi_parameters = cpu_to_le32(0);
4e08df3f 7096 nv->reset_delay = 5;
ad950360
BVA		 7097 nv->max_luns_per_target = cpu_to_le16(128);
7098 nv->port_down_retry_count = cpu_to_le16(30);
7099 nv->link_down_timeout = cpu_to_le16(30);
4e08df3f
DM		 7100
7101 rval = 1;
0107109e
AV		 7102 }
7103
726b8548 7104 if (qla_tgt_mode_enabled(vha)) {
2d70c103 7105 /* Don't enable full login after initial LIP */
ad950360 7106 nv->firmware_options_1 &= cpu_to_le32(~BIT_13);
2d70c103 7107 /* Don't enable LIP full login for initiator */
ad950360 7108 nv->host_p &= cpu_to_le32(~BIT_10);
2d70c103
NB		 7109 }
7110
7111 qlt_24xx_config_nvram_stage1(vha, nv);
7112
0107109e 7113 /* Reset Initialization control block */
e315cd28 7114 memset(icb, 0, ha->init_cb_size);
0107109e
AV		 7115
7116 /* Copy 1st segment. */
7117 dptr1 = (uint8_t *)icb;
7118 dptr2 = (uint8_t *)&nv->version;
7119 cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version;
7120 while (cnt--)
7121 *dptr1++ = *dptr2++;
7122
7123 icb->login_retry_count = nv->login_retry_count;
3ea66e28 7124 icb->link_down_on_nos = nv->link_down_on_nos;
0107109e
AV		 7125
7126 /* Copy 2nd segment. */
7127 dptr1 = (uint8_t *)&icb->interrupt_delay_timer;
7128 dptr2 = (uint8_t *)&nv->interrupt_delay_timer;
7129 cnt = (uint8_t *)&icb->reserved_3 -
7130 (uint8_t *)&icb->interrupt_delay_timer;
7131 while (cnt--)
7132 *dptr1++ = *dptr2++;
0eaaca4c 7133 ha->frame_payload_size = le16_to_cpu(icb->frame_payload_size);
0107109e
AV		 7134 /*
7135 * Setup driver NVRAM options.
7136 */
e315cd28 7137 qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name),
9bb9fcf2 7138 "QLA2462");
0107109e 7139
2d70c103
NB		 7140 qlt_24xx_config_nvram_stage2(vha, icb);
7141
ad950360 7142 if (nv->host_p & cpu_to_le32(BIT_15)) {
2d70c103 7143 /* Use alternate WWN? */
5341e868
AV		 7144 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
7145 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
7146 }
7147
0107109e 7148 /* Prepare nodename */
ad950360 7149 if ((icb->firmware_options_1 & cpu_to_le32(BIT_14)) == 0) {
0107109e
AV		 7150 /*
7151 * Firmware will apply the following mask if the nodename was
7152 * not provided.
7153 */
7154 memcpy(icb->node_name, icb->port_name, WWN_SIZE);
7155 icb->node_name[0] &= 0xF0;
7156 }
7157
7158 /* Set host adapter parameters. */
7159 ha->flags.disable_risc_code_load = 0;
0c8c39af
AV		 7160 ha->flags.enable_lip_reset = 0;
7161 ha->flags.enable_lip_full_login =
7162 le32_to_cpu(nv->host_p) & BIT_10 ? 1: 0;
7163 ha->flags.enable_target_reset =
7164 le32_to_cpu(nv->host_p) & BIT_11 ? 1: 0;
0107109e 7165 ha->flags.enable_led_scheme = 0;
d4c760c2 7166 ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1: 0;
0107109e 7167
fd0e7e4d
AV		 7168 ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) &
7169 (BIT_6 | BIT_5 | BIT_4)) >> 4;
0107109e
AV		 7170
7171 memcpy(ha->fw_seriallink_options24, nv->seriallink_options,
7172 sizeof(ha->fw_seriallink_options24));
7173
7174 /* save HBA serial number */
7175 ha->serial0 = icb->port_name[5];
7176 ha->serial1 = icb->port_name[6];
7177 ha->serial2 = icb->port_name[7];
e315cd28
AC		 7178 memcpy(vha->node_name, icb->node_name, WWN_SIZE);
7179 memcpy(vha->port_name, icb->port_name, WWN_SIZE);
0107109e 7180
ad950360 7181 icb->execution_throttle = cpu_to_le16(0xFFFF);
bc8fb3cb 7182
0107109e
AV		 7183 ha->retry_count = le16_to_cpu(nv->login_retry_count);
7184
7185 /* Set minimum login_timeout to 4 seconds. */
7186 if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout)
7187 nv->login_timeout = cpu_to_le16(ql2xlogintimeout);
7188 if (le16_to_cpu(nv->login_timeout) < 4)
ad950360 7189 nv->login_timeout = cpu_to_le16(4);
0107109e 7190 ha->login_timeout = le16_to_cpu(nv->login_timeout);
0107109e 7191
00a537b8
AV		 7192 /* Set minimum RATOV to 100 tenths of a second. */
7193 ha->r_a_tov = 100;
0107109e
AV		 7194
7195 ha->loop_reset_delay = nv->reset_delay;
7196
7197 /* Link Down Timeout = 0:
7198 *
7199 * When Port Down timer expires we will start returning
7200 * I/O's to OS with "DID_NO_CONNECT".
7201 *
7202 * Link Down Timeout != 0:
7203 *
7204 * The driver waits for the link to come up after link down
7205 * before returning I/Os to OS with "DID_NO_CONNECT".
7206 */
7207 if (le16_to_cpu(nv->link_down_timeout) == 0) {
7208 ha->loop_down_abort_time =
7209 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
7210 } else {
7211 ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout);
7212 ha->loop_down_abort_time =
7213 (LOOP_DOWN_TIME - ha->link_down_timeout);
7214 }
7215
7216 /* Need enough time to try and get the port back. */
7217 ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count);
7218 if (qlport_down_retry)
7219 ha->port_down_retry_count = qlport_down_retry;
7220
7221 /* Set login_retry_count */
7222 ha->login_retry_count = le16_to_cpu(nv->login_retry_count);
7223 if (ha->port_down_retry_count ==
7224 le16_to_cpu(nv->port_down_retry_count) &&
7225 ha->port_down_retry_count > 3)
7226 ha->login_retry_count = ha->port_down_retry_count;
7227 else if (ha->port_down_retry_count > (int)ha->login_retry_count)
7228 ha->login_retry_count = ha->port_down_retry_count;
7229 if (ql2xloginretrycount)
7230 ha->login_retry_count = ql2xloginretrycount;
7231
8777e431
QT		 7232 /* N2N: driver will initiate Login instead of FW */
7233 icb->firmware_options_3 |= BIT_8;
7234
4fdfefe5 7235 /* Enable ZIO. */
e315cd28 7236 if (!vha->flags.init_done) {
4fdfefe5
AV		 7237 ha->zio_mode = le32_to_cpu(icb->firmware_options_2) &
7238 (BIT_3 | BIT_2 | BIT_1 | BIT_0);
7239 ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ?
7240 le16_to_cpu(icb->interrupt_delay_timer): 2;
7241 }
ad950360 7242 icb->firmware_options_2 &= cpu_to_le32(
4fdfefe5 7243 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0));
4fdfefe5 7244 if (ha->zio_mode != QLA_ZIO_DISABLED) {
4a59f71d 7245 ha->zio_mode = QLA_ZIO_MODE_6;
7246
7c3df132 7247 ql_log(ql_log_info, vha, 0x006f,
4fdfefe5
AV		 7248 "ZIO mode %d enabled; timer delay (%d us).\n",
7249 ha->zio_mode, ha->zio_timer * 100);
7250
7251 icb->firmware_options_2 |= cpu_to_le32(
7252 (uint32_t)ha->zio_mode);
7253 icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer);
4fdfefe5
AV		 7254 }
7255
4e08df3f 7256 if (rval) {
7c3df132
SK		 7257 ql_log(ql_log_warn, vha, 0x0070,
7258 "NVRAM configuration failed.\n");
4e08df3f
DM		 7259 }
7260 return (rval);
0107109e
AV		 7261}
7262
4243c115
SC		 7263uint8_t qla27xx_find_valid_image(struct scsi_qla_host *vha)
7264{
7265 struct qla27xx_image_status pri_image_status, sec_image_status;
7266 uint8_t valid_pri_image, valid_sec_image;
7267 uint32_t *wptr;
7268 uint32_t cnt, chksum, size;
7269 struct qla_hw_data *ha = vha->hw;
7270
7271 valid_pri_image = valid_sec_image = 1;
7272 ha->active_image = 0;
7273 size = sizeof(struct qla27xx_image_status) / sizeof(uint32_t);
7274
7275 if (!ha->flt_region_img_status_pri) {
7276 valid_pri_image = 0;
7277 goto check_sec_image;
7278 }
7279
7280 qla24xx_read_flash_data(vha, (uint32_t *)(&pri_image_status),
7281 ha->flt_region_img_status_pri, size);
7282
7283 if (pri_image_status.signature != QLA27XX_IMG_STATUS_SIGN) {
7284 ql_dbg(ql_dbg_init, vha, 0x018b,
7285 "Primary image signature (0x%x) not valid\n",
7286 pri_image_status.signature);
7287 valid_pri_image = 0;
7288 goto check_sec_image;
7289 }
7290
7291 wptr = (uint32_t *)(&pri_image_status);
7292 cnt = size;
7293
da08ef5c
JC		 7294 for (chksum = 0; cnt--; wptr++)
7295 chksum += le32_to_cpu(*wptr);
41dc529a 7296
4243c115
SC		 7297 if (chksum) {
7298 ql_dbg(ql_dbg_init, vha, 0x018c,
7299 "Checksum validation failed for primary image (0x%x)\n",
7300 chksum);
7301 valid_pri_image = 0;
7302 }
7303
7304check_sec_image:
7305 if (!ha->flt_region_img_status_sec) {
7306 valid_sec_image = 0;
7307 goto check_valid_image;
7308 }
7309
7310 qla24xx_read_flash_data(vha, (uint32_t *)(&sec_image_status),
7311 ha->flt_region_img_status_sec, size);
7312
7313 if (sec_image_status.signature != QLA27XX_IMG_STATUS_SIGN) {
7314 ql_dbg(ql_dbg_init, vha, 0x018d,
7315 "Secondary image signature(0x%x) not valid\n",
7316 sec_image_status.signature);
7317 valid_sec_image = 0;
7318 goto check_valid_image;
7319 }
7320
7321 wptr = (uint32_t *)(&sec_image_status);
7322 cnt = size;
da08ef5c
JC		 7323 for (chksum = 0; cnt--; wptr++)
7324 chksum += le32_to_cpu(*wptr);
4243c115
SC		 7325 if (chksum) {
7326 ql_dbg(ql_dbg_init, vha, 0x018e,
7327 "Checksum validation failed for secondary image (0x%x)\n",
7328 chksum);
7329 valid_sec_image = 0;
7330 }
7331
7332check_valid_image:
7333 if (valid_pri_image && (pri_image_status.image_status_mask & 0x1))
7334 ha->active_image = QLA27XX_PRIMARY_IMAGE;
7335 if (valid_sec_image && (sec_image_status.image_status_mask & 0x1)) {
7336 if (!ha->active_image ||
7337 pri_image_status.generation_number <
7338 sec_image_status.generation_number)
7339 ha->active_image = QLA27XX_SECONDARY_IMAGE;
7340 }
7341
22ebde16 7342 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x018f, "%s image\n",
4243c115
SC		 7343 ha->active_image == 0 ? "default bootld and fw" :
7344 ha->active_image == 1 ? "primary" :
7345 ha->active_image == 2 ? "secondary" :
7346 "Invalid");
7347
7348 return ha->active_image;
7349}
7350
413975a0 7351static int
cbc8eb67
AV		 7352qla24xx_load_risc_flash(scsi_qla_host_t *vha, uint32_t *srisc_addr,
7353 uint32_t faddr)
d1c61909 7354{
73208dfd 7355 int rval = QLA_SUCCESS;
d1c61909 7356 int segments, fragment;
d1c61909
AV		 7357 uint32_t *dcode, dlen;
7358 uint32_t risc_addr;
7359 uint32_t risc_size;
7360 uint32_t i;
e315cd28 7361 struct qla_hw_data *ha = vha->hw;
73208dfd 7362 struct req_que *req = ha->req_q_map[0];
eaac30be 7363
7c3df132 7364 ql_dbg(ql_dbg_init, vha, 0x008b,
cfb0919c 7365 "FW: Loading firmware from flash (%x).\n", faddr);
eaac30be 7366
d1c61909
AV		 7367 rval = QLA_SUCCESS;
7368
7369 segments = FA_RISC_CODE_SEGMENTS;
73208dfd 7370 dcode = (uint32_t *)req->ring;
d1c61909
AV		 7371 *srisc_addr = 0;
7372
4243c115
SC		 7373 if (IS_QLA27XX(ha) &&
7374 qla27xx_find_valid_image(vha) == QLA27XX_SECONDARY_IMAGE)
7375 faddr = ha->flt_region_fw_sec;
7376
d1c61909 7377 /* Validate firmware image by checking version. */
e315cd28 7378 qla24xx_read_flash_data(vha, dcode, faddr + 4, 4);
d1c61909
AV		 7379 for (i = 0; i < 4; i++)
7380 dcode[i] = be32_to_cpu(dcode[i]);
7381 if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff &&
7382 dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) ||
7383 (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 &&
7384 dcode[3] == 0)) {
7c3df132
SK		 7385 ql_log(ql_log_fatal, vha, 0x008c,
7386 "Unable to verify the integrity of flash firmware "
7387 "image.\n");
7388 ql_log(ql_log_fatal, vha, 0x008d,
7389 "Firmware data: %08x %08x %08x %08x.\n",
7390 dcode[0], dcode[1], dcode[2], dcode[3]);
d1c61909
AV		 7391
7392 return QLA_FUNCTION_FAILED;
7393 }
7394
7395 while (segments && rval == QLA_SUCCESS) {
7396 /* Read segment's load information. */
e315cd28 7397 qla24xx_read_flash_data(vha, dcode, faddr, 4);
d1c61909
AV		 7398
7399 risc_addr = be32_to_cpu(dcode[2]);
7400 *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr;
7401 risc_size = be32_to_cpu(dcode[3]);
7402
7403 fragment = 0;
7404 while (risc_size > 0 && rval == QLA_SUCCESS) {
7405 dlen = (uint32_t)(ha->fw_transfer_size >> 2);
7406 if (dlen > risc_size)
7407 dlen = risc_size;
7408
7c3df132
SK		 7409 ql_dbg(ql_dbg_init, vha, 0x008e,
7410 "Loading risc segment@ risc addr %x "
7411 "number of dwords 0x%x offset 0x%x.\n",
7412 risc_addr, dlen, faddr);
d1c61909 7413
e315cd28 7414 qla24xx_read_flash_data(vha, dcode, faddr, dlen);
d1c61909
AV		 7415 for (i = 0; i < dlen; i++)
7416 dcode[i] = swab32(dcode[i]);
7417
73208dfd 7418 rval = qla2x00_load_ram(vha, req->dma, risc_addr,
d1c61909
AV		 7419 dlen);
7420 if (rval) {
7c3df132
SK		 7421 ql_log(ql_log_fatal, vha, 0x008f,
7422 "Failed to load segment %d of firmware.\n",
7423 fragment);
f261f7af 7424 return QLA_FUNCTION_FAILED;
d1c61909
AV		 7425 }
7426
7427 faddr += dlen;
7428 risc_addr += dlen;
7429 risc_size -= dlen;
7430 fragment++;
7431 }
7432
7433 /* Next segment. */
7434 segments--;
7435 }
7436
f73cb695
CD		 7437 if (!IS_QLA27XX(ha))
7438 return rval;
7439
7440 if (ha->fw_dump_template)
7441 vfree(ha->fw_dump_template);
7442 ha->fw_dump_template = NULL;
7443 ha->fw_dump_template_len = 0;
7444
7445 ql_dbg(ql_dbg_init, vha, 0x0161,
7446 "Loading fwdump template from %x\n", faddr);
7447 qla24xx_read_flash_data(vha, dcode, faddr, 7);
7448 risc_size = be32_to_cpu(dcode[2]);
7449 ql_dbg(ql_dbg_init, vha, 0x0162,
7450 "-> array size %x dwords\n", risc_size);
7451 if (risc_size == 0 || risc_size == ~0)
7452 goto default_template;
7453
7454 dlen = (risc_size - 8) * sizeof(*dcode);
7455 ql_dbg(ql_dbg_init, vha, 0x0163,
7456 "-> template allocating %x bytes...\n", dlen);
7457 ha->fw_dump_template = vmalloc(dlen);
7458 if (!ha->fw_dump_template) {
7459 ql_log(ql_log_warn, vha, 0x0164,
7460 "Failed fwdump template allocate %x bytes.\n", risc_size);
7461 goto default_template;
7462 }
7463
7464 faddr += 7;
7465 risc_size -= 8;
7466 dcode = ha->fw_dump_template;
7467 qla24xx_read_flash_data(vha, dcode, faddr, risc_size);
7468 for (i = 0; i < risc_size; i++)
7469 dcode[i] = le32_to_cpu(dcode[i]);
7470
7471 if (!qla27xx_fwdt_template_valid(dcode)) {
7472 ql_log(ql_log_warn, vha, 0x0165,
7473 "Failed fwdump template validate\n");
7474 goto default_template;
7475 }
7476
7477 dlen = qla27xx_fwdt_template_size(dcode);
7478 ql_dbg(ql_dbg_init, vha, 0x0166,
7479 "-> template size %x bytes\n", dlen);
7480 if (dlen > risc_size * sizeof(*dcode)) {
7481 ql_log(ql_log_warn, vha, 0x0167,
4fae52b5 7482 "Failed fwdump template exceeds array by %zx bytes\n",
383a298b 7483 (size_t)(dlen - risc_size * sizeof(*dcode)));
f73cb695
CD		 7484 goto default_template;
7485 }
7486 ha->fw_dump_template_len = dlen;
7487 return rval;
7488
7489default_template:
7490 ql_log(ql_log_warn, vha, 0x0168, "Using default fwdump template\n");
7491 if (ha->fw_dump_template)
7492 vfree(ha->fw_dump_template);
7493 ha->fw_dump_template = NULL;
7494 ha->fw_dump_template_len = 0;
7495
7496 dlen = qla27xx_fwdt_template_default_size();
7497 ql_dbg(ql_dbg_init, vha, 0x0169,
7498 "-> template allocating %x bytes...\n", dlen);
7499 ha->fw_dump_template = vmalloc(dlen);
7500 if (!ha->fw_dump_template) {
7501 ql_log(ql_log_warn, vha, 0x016a,
7502 "Failed fwdump template allocate %x bytes.\n", risc_size);
7503 goto failed_template;
7504 }
7505
7506 dcode = ha->fw_dump_template;
7507 risc_size = dlen / sizeof(*dcode);
7508 memcpy(dcode, qla27xx_fwdt_template_default(), dlen);
7509 for (i = 0; i < risc_size; i++)
7510 dcode[i] = be32_to_cpu(dcode[i]);
7511
7512 if (!qla27xx_fwdt_template_valid(ha->fw_dump_template)) {
7513 ql_log(ql_log_warn, vha, 0x016b,
7514 "Failed fwdump template validate\n");
7515 goto failed_template;
7516 }
7517
7518 dlen = qla27xx_fwdt_template_size(ha->fw_dump_template);
7519 ql_dbg(ql_dbg_init, vha, 0x016c,
7520 "-> template size %x bytes\n", dlen);
7521 ha->fw_dump_template_len = dlen;
7522 return rval;
7523
7524failed_template:
7525 ql_log(ql_log_warn, vha, 0x016d, "Failed default fwdump template\n");
7526 if (ha->fw_dump_template)
7527 vfree(ha->fw_dump_template);
7528 ha->fw_dump_template = NULL;
7529 ha->fw_dump_template_len = 0;
d1c61909
AV		 7530 return rval;
7531}
7532
e9454a88 7533#define QLA_FW_URL "http://ldriver.qlogic.com/firmware/"
d1c61909 7534
0107109e 7535int
e315cd28 7536qla2x00_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
5433383e
AV		 7537{
7538 int rval;
7539 int i, fragment;
7540 uint16_t *wcode, *fwcode;
7541 uint32_t risc_addr, risc_size, fwclen, wlen, *seg;
7542 struct fw_blob *blob;
e315cd28 7543 struct qla_hw_data *ha = vha->hw;
73208dfd 7544 struct req_que *req = ha->req_q_map[0];
5433383e
AV		 7545
7546 /* Load firmware blob. */
e315cd28 7547 blob = qla2x00_request_firmware(vha);
5433383e 7548 if (!blob) {
7c3df132 7549 ql_log(ql_log_info, vha, 0x0083,
94bcf830 7550 "Firmware image unavailable.\n");
7c3df132
SK		 7551 ql_log(ql_log_info, vha, 0x0084,
7552 "Firmware images can be retrieved from: "QLA_FW_URL ".\n");
5433383e
AV		 7553 return QLA_FUNCTION_FAILED;
7554 }
7555
7556 rval = QLA_SUCCESS;
7557
73208dfd 7558 wcode = (uint16_t *)req->ring;
5433383e
AV		 7559 *srisc_addr = 0;
7560 fwcode = (uint16_t *)blob->fw->data;
7561 fwclen = 0;
7562
7563 /* Validate firmware image by checking version. */
7564 if (blob->fw->size < 8 * sizeof(uint16_t)) {
7c3df132 7565 ql_log(ql_log_fatal, vha, 0x0085,
5b5e0928 7566 "Unable to verify integrity of firmware image (%zd).\n",
5433383e
AV		 7567 blob->fw->size);
7568 goto fail_fw_integrity;
7569 }
7570 for (i = 0; i < 4; i++)
7571 wcode[i] = be16_to_cpu(fwcode[i + 4]);
7572 if ((wcode[0] == 0xffff && wcode[1] == 0xffff && wcode[2] == 0xffff &&
7573 wcode[3] == 0xffff) || (wcode[0] == 0 && wcode[1] == 0 &&
7574 wcode[2] == 0 && wcode[3] == 0)) {
7c3df132
SK		 7575 ql_log(ql_log_fatal, vha, 0x0086,
7576 "Unable to verify integrity of firmware image.\n");
7577 ql_log(ql_log_fatal, vha, 0x0087,
7578 "Firmware data: %04x %04x %04x %04x.\n",
7579 wcode[0], wcode[1], wcode[2], wcode[3]);
5433383e
AV		 7580 goto fail_fw_integrity;
7581 }
7582
7583 seg = blob->segs;
7584 while (*seg && rval == QLA_SUCCESS) {
7585 risc_addr = *seg;
7586 *srisc_addr = *srisc_addr == 0 ? *seg : *srisc_addr;
7587 risc_size = be16_to_cpu(fwcode[3]);
7588
7589 /* Validate firmware image size. */
7590 fwclen += risc_size * sizeof(uint16_t);
7591 if (blob->fw->size < fwclen) {
7c3df132 7592 ql_log(ql_log_fatal, vha, 0x0088,
5433383e 7593 "Unable to verify integrity of firmware image "
5b5e0928 7594 "(%zd).\n", blob->fw->size);
5433383e
AV		 7595 goto fail_fw_integrity;
7596 }
7597
7598 fragment = 0;
7599 while (risc_size > 0 && rval == QLA_SUCCESS) {
7600 wlen = (uint16_t)(ha->fw_transfer_size >> 1);
7601 if (wlen > risc_size)
7602 wlen = risc_size;
7c3df132
SK		 7603 ql_dbg(ql_dbg_init, vha, 0x0089,
7604 "Loading risc segment@ risc addr %x number of "
7605 "words 0x%x.\n", risc_addr, wlen);
5433383e
AV		 7606
7607 for (i = 0; i < wlen; i++)
7608 wcode[i] = swab16(fwcode[i]);
7609
73208dfd 7610 rval = qla2x00_load_ram(vha, req->dma, risc_addr,
5433383e
AV		 7611 wlen);
7612 if (rval) {
7c3df132
SK		 7613 ql_log(ql_log_fatal, vha, 0x008a,
7614 "Failed to load segment %d of firmware.\n",
7615 fragment);
5433383e
AV		 7616 break;
7617 }
7618
7619 fwcode += wlen;
7620 risc_addr += wlen;
7621 risc_size -= wlen;
7622 fragment++;
7623 }
7624
7625 /* Next segment. */
7626 seg++;
7627 }
7628 return rval;
7629
7630fail_fw_integrity:
7631 return QLA_FUNCTION_FAILED;
7632}
7633
eaac30be
AV		 7634static int
7635qla24xx_load_risc_blob(scsi_qla_host_t *vha, uint32_t *srisc_addr)
0107109e
AV		 7636{
7637 int rval;
7638 int segments, fragment;
7639 uint32_t *dcode, dlen;
7640 uint32_t risc_addr;
7641 uint32_t risc_size;
7642 uint32_t i;
5433383e 7643 struct fw_blob *blob;
f73cb695
CD		 7644 const uint32_t *fwcode;
7645 uint32_t fwclen;
e315cd28 7646 struct qla_hw_data *ha = vha->hw;
73208dfd 7647 struct req_que *req = ha->req_q_map[0];
0107109e 7648
5433383e 7649 /* Load firmware blob. */
e315cd28 7650 blob = qla2x00_request_firmware(vha);
5433383e 7651 if (!blob) {
7c3df132 7652 ql_log(ql_log_warn, vha, 0x0090,
94bcf830 7653 "Firmware image unavailable.\n");
7c3df132
SK		 7654 ql_log(ql_log_warn, vha, 0x0091,
7655 "Firmware images can be retrieved from: "
7656 QLA_FW_URL ".\n");
d1c61909 7657
eaac30be 7658 return QLA_FUNCTION_FAILED;
0107109e
AV		 7659 }
7660
cfb0919c
CD		 7661 ql_dbg(ql_dbg_init, vha, 0x0092,
7662 "FW: Loading via request-firmware.\n");
eaac30be 7663
0107109e
AV		 7664 rval = QLA_SUCCESS;
7665
7666 segments = FA_RISC_CODE_SEGMENTS;
73208dfd 7667 dcode = (uint32_t *)req->ring;
0107109e 7668 *srisc_addr = 0;
5433383e 7669 fwcode = (uint32_t *)blob->fw->data;
0107109e
AV		 7670 fwclen = 0;
7671
7672 /* Validate firmware image by checking version. */
5433383e 7673 if (blob->fw->size < 8 * sizeof(uint32_t)) {
7c3df132 7674 ql_log(ql_log_fatal, vha, 0x0093,
5b5e0928 7675 "Unable to verify integrity of firmware image (%zd).\n",
5433383e 7676 blob->fw->size);
f73cb695 7677 return QLA_FUNCTION_FAILED;
0107109e
AV		 7678 }
7679 for (i = 0; i < 4; i++)
7680 dcode[i] = be32_to_cpu(fwcode[i + 4]);
7681 if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff &&
7682 dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) ||
7683 (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 &&
7684 dcode[3] == 0)) {
7c3df132 7685 ql_log(ql_log_fatal, vha, 0x0094,
5b5e0928 7686 "Unable to verify integrity of firmware image (%zd).\n",
7c3df132
SK		 7687 blob->fw->size);
7688 ql_log(ql_log_fatal, vha, 0x0095,
7689 "Firmware data: %08x %08x %08x %08x.\n",
7690 dcode[0], dcode[1], dcode[2], dcode[3]);
f73cb695 7691 return QLA_FUNCTION_FAILED;
0107109e
AV		 7692 }
7693
7694 while (segments && rval == QLA_SUCCESS) {
7695 risc_addr = be32_to_cpu(fwcode[2]);
7696 *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr;
7697 risc_size = be32_to_cpu(fwcode[3]);
7698
7699 /* Validate firmware image size. */
7700 fwclen += risc_size * sizeof(uint32_t);
5433383e 7701 if (blob->fw->size < fwclen) {
7c3df132 7702 ql_log(ql_log_fatal, vha, 0x0096,
5433383e 7703 "Unable to verify integrity of firmware image "
5b5e0928 7704 "(%zd).\n", blob->fw->size);
f73cb695 7705 return QLA_FUNCTION_FAILED;
0107109e
AV		 7706 }
7707
7708 fragment = 0;
7709 while (risc_size > 0 && rval == QLA_SUCCESS) {
7710 dlen = (uint32_t)(ha->fw_transfer_size >> 2);
7711 if (dlen > risc_size)
7712 dlen = risc_size;
7713
7c3df132
SK		 7714 ql_dbg(ql_dbg_init, vha, 0x0097,
7715 "Loading risc segment@ risc addr %x "
7716 "number of dwords 0x%x.\n", risc_addr, dlen);
0107109e
AV		 7717
7718 for (i = 0; i < dlen; i++)
7719 dcode[i] = swab32(fwcode[i]);
7720
73208dfd 7721 rval = qla2x00_load_ram(vha, req->dma, risc_addr,
590f98e5 7722 dlen);
0107109e 7723 if (rval) {
7c3df132
SK		 7724 ql_log(ql_log_fatal, vha, 0x0098,
7725 "Failed to load segment %d of firmware.\n",
7726 fragment);
f261f7af 7727 return QLA_FUNCTION_FAILED;
0107109e
AV		 7728 }
7729
7730 fwcode += dlen;
7731 risc_addr += dlen;
7732 risc_size -= dlen;
7733 fragment++;
7734 }
7735
7736 /* Next segment. */
7737 segments--;
7738 }
f73cb695
CD		 7739
7740 if (!IS_QLA27XX(ha))
7741 return rval;
7742
7743 if (ha->fw_dump_template)
7744 vfree(ha->fw_dump_template);
7745 ha->fw_dump_template = NULL;
7746 ha->fw_dump_template_len = 0;
7747
7748 ql_dbg(ql_dbg_init, vha, 0x171,
97ea702b
CD		 7749 "Loading fwdump template from %x\n",
7750 (uint32_t)((void *)fwcode - (void *)blob->fw->data));
f73cb695
CD		 7751 risc_size = be32_to_cpu(fwcode[2]);
7752 ql_dbg(ql_dbg_init, vha, 0x172,
7753 "-> array size %x dwords\n", risc_size);
7754 if (risc_size == 0 || risc_size == ~0)
7755 goto default_template;
7756
7757 dlen = (risc_size - 8) * sizeof(*fwcode);
7758 ql_dbg(ql_dbg_init, vha, 0x0173,
7759 "-> template allocating %x bytes...\n", dlen);
7760 ha->fw_dump_template = vmalloc(dlen);
7761 if (!ha->fw_dump_template) {
7762 ql_log(ql_log_warn, vha, 0x0174,
7763 "Failed fwdump template allocate %x bytes.\n", risc_size);
7764 goto default_template;
7765 }
7766
7767 fwcode += 7;
7768 risc_size -= 8;
7769 dcode = ha->fw_dump_template;
7770 for (i = 0; i < risc_size; i++)
7771 dcode[i] = le32_to_cpu(fwcode[i]);
7772
7773 if (!qla27xx_fwdt_template_valid(dcode)) {
7774 ql_log(ql_log_warn, vha, 0x0175,
7775 "Failed fwdump template validate\n");
7776 goto default_template;
7777 }
7778
7779 dlen = qla27xx_fwdt_template_size(dcode);
7780 ql_dbg(ql_dbg_init, vha, 0x0176,
7781 "-> template size %x bytes\n", dlen);
7782 if (dlen > risc_size * sizeof(*fwcode)) {
7783 ql_log(ql_log_warn, vha, 0x0177,
4fae52b5 7784 "Failed fwdump template exceeds array by %zx bytes\n",
383a298b 7785 (size_t)(dlen - risc_size * sizeof(*fwcode)));
f73cb695
CD		 7786 goto default_template;
7787 }
7788 ha->fw_dump_template_len = dlen;
0107109e
AV		 7789 return rval;
7790
f73cb695
CD		 7791default_template:
7792 ql_log(ql_log_warn, vha, 0x0178, "Using default fwdump template\n");
7793 if (ha->fw_dump_template)
7794 vfree(ha->fw_dump_template);
7795 ha->fw_dump_template = NULL;
7796 ha->fw_dump_template_len = 0;
7797
7798 dlen = qla27xx_fwdt_template_default_size();
7799 ql_dbg(ql_dbg_init, vha, 0x0179,
7800 "-> template allocating %x bytes...\n", dlen);
7801 ha->fw_dump_template = vmalloc(dlen);
7802 if (!ha->fw_dump_template) {
7803 ql_log(ql_log_warn, vha, 0x017a,
7804 "Failed fwdump template allocate %x bytes.\n", risc_size);
7805 goto failed_template;
7806 }
7807
7808 dcode = ha->fw_dump_template;
7809 risc_size = dlen / sizeof(*fwcode);
7810 fwcode = qla27xx_fwdt_template_default();
7811 for (i = 0; i < risc_size; i++)
7812 dcode[i] = be32_to_cpu(fwcode[i]);
7813
7814 if (!qla27xx_fwdt_template_valid(ha->fw_dump_template)) {
7815 ql_log(ql_log_warn, vha, 0x017b,
7816 "Failed fwdump template validate\n");
7817 goto failed_template;
7818 }
7819
7820 dlen = qla27xx_fwdt_template_size(ha->fw_dump_template);
7821 ql_dbg(ql_dbg_init, vha, 0x017c,
7822 "-> template size %x bytes\n", dlen);
7823 ha->fw_dump_template_len = dlen;
7824 return rval;
7825
7826failed_template:
7827 ql_log(ql_log_warn, vha, 0x017d, "Failed default fwdump template\n");
7828 if (ha->fw_dump_template)
7829 vfree(ha->fw_dump_template);
7830 ha->fw_dump_template = NULL;
7831 ha->fw_dump_template_len = 0;
7832 return rval;
0107109e 7833}
18c6c127 7834
eaac30be
AV		 7835int
7836qla24xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
7837{
7838 int rval;
7839
e337d907
AV		 7840 if (ql2xfwloadbin == 1)
7841 return qla81xx_load_risc(vha, srisc_addr);
7842
eaac30be
AV		 7843 /*
7844 * FW Load priority:
7845 * 1) Firmware via request-firmware interface (.bin file).
7846 * 2) Firmware residing in flash.
7847 */
7848 rval = qla24xx_load_risc_blob(vha, srisc_addr);
7849 if (rval == QLA_SUCCESS)
7850 return rval;
7851
cbc8eb67
AV		 7852 return qla24xx_load_risc_flash(vha, srisc_addr,
7853 vha->hw->flt_region_fw);
eaac30be
AV		 7854}
7855
7856int
7857qla81xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
7858{
7859 int rval;
cbc8eb67 7860 struct qla_hw_data *ha = vha->hw;
eaac30be 7861
e337d907 7862 if (ql2xfwloadbin == 2)
cbc8eb67 7863 goto try_blob_fw;
e337d907 7864
eaac30be
AV		 7865 /*
7866 * FW Load priority:
7867 * 1) Firmware residing in flash.
7868 * 2) Firmware via request-firmware interface (.bin file).
cbc8eb67 7869 * 3) Golden-Firmware residing in flash -- limited operation.
eaac30be 7870 */
cbc8eb67 7871 rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_fw);
eaac30be
AV		 7872 if (rval == QLA_SUCCESS)
7873 return rval;
7874
cbc8eb67
AV		 7875try_blob_fw:
7876 rval = qla24xx_load_risc_blob(vha, srisc_addr);
7877 if (rval == QLA_SUCCESS || !ha->flt_region_gold_fw)
7878 return rval;
7879
7c3df132
SK		 7880 ql_log(ql_log_info, vha, 0x0099,
7881 "Attempting to fallback to golden firmware.\n");
cbc8eb67
AV		 7882 rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_gold_fw);
7883 if (rval != QLA_SUCCESS)
7884 return rval;
7885
7c3df132 7886 ql_log(ql_log_info, vha, 0x009a, "Update operational firmware.\n");
cbc8eb67 7887 ha->flags.running_gold_fw = 1;
cbc8eb67 7888 return rval;
eaac30be
AV		 7889}
7890
18c6c127 7891void
e315cd28 7892qla2x00_try_to_stop_firmware(scsi_qla_host_t *vha)
18c6c127
AV		 7893{
7894 int ret, retries;
e315cd28 7895 struct qla_hw_data *ha = vha->hw;
18c6c127 7896
85880801
AV		 7897 if (ha->flags.pci_channel_io_perm_failure)
7898 return;
e428924c 7899 if (!IS_FWI2_CAPABLE(ha))
18c6c127 7900 return;
75edf81d
AV		 7901 if (!ha->fw_major_version)
7902 return;
ec7193e2
QT		 7903 if (!ha->flags.fw_started)
7904 return;
18c6c127 7905
e315cd28 7906 ret = qla2x00_stop_firmware(vha);
7c7f1f29 7907 for (retries = 5; ret != QLA_SUCCESS && ret != QLA_FUNCTION_TIMEOUT &&
b469a7cb 7908 ret != QLA_INVALID_COMMAND && retries ; retries--) {
e315cd28
AC		 7909 ha->isp_ops->reset_chip(vha);
7910 if (ha->isp_ops->chip_diag(vha) != QLA_SUCCESS)
18c6c127 7911 continue;
e315cd28 7912 if (qla2x00_setup_chip(vha) != QLA_SUCCESS)
18c6c127 7913 continue;
7c3df132
SK		 7914 ql_log(ql_log_info, vha, 0x8015,
7915 "Attempting retry of stop-firmware command.\n");
e315cd28 7916 ret = qla2x00_stop_firmware(vha);
18c6c127 7917 }
ec7193e2 7918
4b60c827 7919 QLA_FW_STOPPED(ha);
ec7193e2 7920 ha->flags.fw_init_done = 0;
18c6c127 7921}
2c3dfe3f
SJ		 7922
7923int
e315cd28 7924qla24xx_configure_vhba(scsi_qla_host_t *vha)
2c3dfe3f
SJ		 7925{
7926 int rval = QLA_SUCCESS;
0b91d116 7927 int rval2;
2c3dfe3f 7928 uint16_t mb[MAILBOX_REGISTER_COUNT];
e315cd28
AC		 7929 struct qla_hw_data *ha = vha->hw;
7930 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
67c2e93a
AC		 7931 struct req_que *req;
7932 struct rsp_que *rsp;
2c3dfe3f 7933
e315cd28 7934 if (!vha->vp_idx)
2c3dfe3f
SJ		 7935 return -EINVAL;
7936
e315cd28 7937 rval = qla2x00_fw_ready(base_vha);
d7459527
MH		 7938 if (vha->qpair)
7939 req = vha->qpair->req;
67c2e93a 7940 else
d7459527 7941 req = ha->req_q_map[0];
67c2e93a
AC		 7942 rsp = req->rsp;
7943
2c3dfe3f 7944 if (rval == QLA_SUCCESS) {
e315cd28 7945 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
73208dfd 7946 qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL);
2c3dfe3f
SJ		 7947 }
7948
e315cd28 7949 vha->flags.management_server_logged_in = 0;
2c3dfe3f
SJ		 7950
7951 /* Login to SNS first */
0b91d116
CD		 7952 rval2 = ha->isp_ops->fabric_login(vha, NPH_SNS, 0xff, 0xff, 0xfc, mb,
7953 BIT_1);
7954 if (rval2 != QLA_SUCCESS || mb[0] != MBS_COMMAND_COMPLETE) {
7955 if (rval2 == QLA_MEMORY_ALLOC_FAILED)
7956 ql_dbg(ql_dbg_init, vha, 0x0120,
7957 "Failed SNS login: loop_id=%x, rval2=%d\n",
7958 NPH_SNS, rval2);
7959 else
7960 ql_dbg(ql_dbg_init, vha, 0x0103,
7961 "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x "
7962 "mb[2]=%x mb[6]=%x mb[7]=%x.\n",
7963 NPH_SNS, mb[0], mb[1], mb[2], mb[6], mb[7]);
2c3dfe3f
SJ		 7964 return (QLA_FUNCTION_FAILED);
7965 }
7966
e315cd28
AC		 7967 atomic_set(&vha->loop_down_timer, 0);
7968 atomic_set(&vha->loop_state, LOOP_UP);
7969 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
7970 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
7971 rval = qla2x00_loop_resync(base_vha);
2c3dfe3f
SJ		 7972
7973 return rval;
7974}
4d4df193
HK		 7975
7976/* 84XX Support **************************************************************/
7977
7978static LIST_HEAD(qla_cs84xx_list);
7979static DEFINE_MUTEX(qla_cs84xx_mutex);
7980
7981static struct qla_chip_state_84xx *
e315cd28 7982qla84xx_get_chip(struct scsi_qla_host *vha)
4d4df193
HK		 7983{
7984 struct qla_chip_state_84xx *cs84xx;
e315cd28 7985 struct qla_hw_data *ha = vha->hw;
4d4df193
HK		 7986
7987 mutex_lock(&qla_cs84xx_mutex);
7988
7989 /* Find any shared 84xx chip. */
7990 list_for_each_entry(cs84xx, &qla_cs84xx_list, list) {
7991 if (cs84xx->bus == ha->pdev->bus) {
7992 kref_get(&cs84xx->kref);
7993 goto done;
7994 }
7995 }
7996
7997 cs84xx = kzalloc(sizeof(*cs84xx), GFP_KERNEL);
7998 if (!cs84xx)
7999 goto done;
8000
8001 kref_init(&cs84xx->kref);
8002 spin_lock_init(&cs84xx->access_lock);
8003 mutex_init(&cs84xx->fw_update_mutex);
8004 cs84xx->bus = ha->pdev->bus;
8005
8006 list_add_tail(&cs84xx->list, &qla_cs84xx_list);
8007done:
8008 mutex_unlock(&qla_cs84xx_mutex);
8009 return cs84xx;
8010}
8011
8012static void
8013__qla84xx_chip_release(struct kref *kref)
8014{
8015 struct qla_chip_state_84xx *cs84xx =
8016 container_of(kref, struct qla_chip_state_84xx, kref);
8017
8018 mutex_lock(&qla_cs84xx_mutex);
8019 list_del(&cs84xx->list);
8020 mutex_unlock(&qla_cs84xx_mutex);
8021 kfree(cs84xx);
8022}
8023
8024void
e315cd28 8025qla84xx_put_chip(struct scsi_qla_host *vha)
4d4df193 8026{
e315cd28 8027 struct qla_hw_data *ha = vha->hw;
4d4df193
HK		 8028 if (ha->cs84xx)
8029 kref_put(&ha->cs84xx->kref, __qla84xx_chip_release);
8030}
8031
8032static int
e315cd28 8033qla84xx_init_chip(scsi_qla_host_t *vha)
4d4df193
HK		 8034{
8035 int rval;
8036 uint16_t status[2];
e315cd28 8037 struct qla_hw_data *ha = vha->hw;
4d4df193
HK		 8038
8039 mutex_lock(&ha->cs84xx->fw_update_mutex);
8040
e315cd28 8041 rval = qla84xx_verify_chip(vha, status);
4d4df193
HK		 8042
8043 mutex_unlock(&ha->cs84xx->fw_update_mutex);
8044
8045 return rval != QLA_SUCCESS || status[0] ? QLA_FUNCTION_FAILED:
8046 QLA_SUCCESS;
8047}
3a03eb79
AV		 8048
8049/* 81XX Support **************************************************************/
8050
8051int
8052qla81xx_nvram_config(scsi_qla_host_t *vha)
8053{
8054 int rval;
8055 struct init_cb_81xx *icb;
8056 struct nvram_81xx *nv;
8057 uint32_t *dptr;
8058 uint8_t *dptr1, *dptr2;
8059 uint32_t chksum;
8060 uint16_t cnt;
8061 struct qla_hw_data *ha = vha->hw;
8062
8063 rval = QLA_SUCCESS;
8064 icb = (struct init_cb_81xx *)ha->init_cb;
8065 nv = ha->nvram;
8066
8067 /* Determine NVRAM starting address. */
8068 ha->nvram_size = sizeof(struct nvram_81xx);
3a03eb79 8069 ha->vpd_size = FA_NVRAM_VPD_SIZE;
7ec0effd
AD		 8070 if (IS_P3P_TYPE(ha) || IS_QLA8031(ha))
8071 ha->vpd_size = FA_VPD_SIZE_82XX;
3a03eb79
AV		 8072
8073 /* Get VPD data into cache */
8074 ha->vpd = ha->nvram + VPD_OFFSET;
3d79038f
AV		 8075 ha->isp_ops->read_optrom(vha, ha->vpd, ha->flt_region_vpd << 2,
8076 ha->vpd_size);
3a03eb79
AV		 8077
8078 /* Get NVRAM data into cache and calculate checksum. */
3d79038f 8079 ha->isp_ops->read_optrom(vha, ha->nvram, ha->flt_region_nvram << 2,
3a03eb79 8080 ha->nvram_size);
3d79038f 8081 dptr = (uint32_t *)nv;
da08ef5c
JC		 8082 for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++, dptr++)
8083 chksum += le32_to_cpu(*dptr);
3a03eb79 8084
7c3df132
SK		 8085 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x0111,
8086 "Contents of NVRAM:\n");
8087 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0112,
8088 (uint8_t *)nv, ha->nvram_size);
3a03eb79
AV		 8089
8090 /* Bad NVRAM data, set defaults parameters. */
8091 if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P'
8092 || nv->id[3] != ' ' ||
ad950360 8093 nv->nvram_version < cpu_to_le16(ICB_VERSION)) {
3a03eb79 8094 /* Reset NVRAM data. */
7c3df132 8095 ql_log(ql_log_info, vha, 0x0073,
9e336520 8096 "Inconsistent NVRAM detected: checksum=0x%x id=%c "
7c3df132 8097 "version=0x%x.\n", chksum, nv->id[0],
3a03eb79 8098 le16_to_cpu(nv->nvram_version));
7c3df132
SK		 8099 ql_log(ql_log_info, vha, 0x0074,
8100 "Falling back to functioning (yet invalid -- WWPN) "
8101 "defaults.\n");
3a03eb79
AV		 8102
8103 /*
8104 * Set default initialization control block.
8105 */
8106 memset(nv, 0, ha->nvram_size);
ad950360
BVA		 8107 nv->nvram_version = cpu_to_le16(ICB_VERSION);
8108 nv->version = cpu_to_le16(ICB_VERSION);
98aee70d 8109 nv->frame_payload_size = 2048;
ad950360
BVA		 8110 nv->execution_throttle = cpu_to_le16(0xFFFF);
8111 nv->exchange_count = cpu_to_le16(0);
3a03eb79 8112 nv->port_name[0] = 0x21;
f73cb695 8113 nv->port_name[1] = 0x00 + ha->port_no + 1;
3a03eb79
AV		 8114 nv->port_name[2] = 0x00;
8115 nv->port_name[3] = 0xe0;
8116 nv->port_name[4] = 0x8b;
8117 nv->port_name[5] = 0x1c;
8118 nv->port_name[6] = 0x55;
8119 nv->port_name[7] = 0x86;
8120 nv->node_name[0] = 0x20;
8121 nv->node_name[1] = 0x00;
8122 nv->node_name[2] = 0x00;
8123 nv->node_name[3] = 0xe0;
8124 nv->node_name[4] = 0x8b;
8125 nv->node_name[5] = 0x1c;
8126 nv->node_name[6] = 0x55;
8127 nv->node_name[7] = 0x86;
ad950360
BVA		 8128 nv->login_retry_count = cpu_to_le16(8);
8129 nv->interrupt_delay_timer = cpu_to_le16(0);
8130 nv->login_timeout = cpu_to_le16(0);
3a03eb79 8131 nv->firmware_options_1 =
ad950360
BVA		 8132 cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1);
8133 nv->firmware_options_2 = cpu_to_le32(2 << 4);
8134 nv->firmware_options_2 |= cpu_to_le32(BIT_12);
8135 nv->firmware_options_3 = cpu_to_le32(2 << 13);
8136 nv->host_p = cpu_to_le32(BIT_11|BIT_10);
8137 nv->efi_parameters = cpu_to_le32(0);
3a03eb79 8138 nv->reset_delay = 5;
ad950360
BVA		 8139 nv->max_luns_per_target = cpu_to_le16(128);
8140 nv->port_down_retry_count = cpu_to_le16(30);
8141 nv->link_down_timeout = cpu_to_le16(180);
eeebcc92 8142 nv->enode_mac[0] = 0x00;
6246b8a1
GM		 8143 nv->enode_mac[1] = 0xC0;
8144 nv->enode_mac[2] = 0xDD;
3a03eb79
AV		 8145 nv->enode_mac[3] = 0x04;
8146 nv->enode_mac[4] = 0x05;
f73cb695 8147 nv->enode_mac[5] = 0x06 + ha->port_no + 1;
3a03eb79
AV		 8148
8149 rval = 1;
8150 }
8151
9e522cd8
AE		 8152 if (IS_T10_PI_CAPABLE(ha))
8153 nv->frame_payload_size &= ~7;
8154
aa230bc5
AE		 8155 qlt_81xx_config_nvram_stage1(vha, nv);
8156
3a03eb79 8157 /* Reset Initialization control block */
773120e4 8158 memset(icb, 0, ha->init_cb_size);
3a03eb79
AV		 8159
8160 /* Copy 1st segment. */
8161 dptr1 = (uint8_t *)icb;
8162 dptr2 = (uint8_t *)&nv->version;
8163 cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version;
8164 while (cnt--)
8165 *dptr1++ = *dptr2++;
8166
8167 icb->login_retry_count = nv->login_retry_count;
8168
8169 /* Copy 2nd segment. */
8170 dptr1 = (uint8_t *)&icb->interrupt_delay_timer;
8171 dptr2 = (uint8_t *)&nv->interrupt_delay_timer;
8172 cnt = (uint8_t *)&icb->reserved_5 -
8173 (uint8_t *)&icb->interrupt_delay_timer;
8174 while (cnt--)
8175 *dptr1++ = *dptr2++;
8176
8177 memcpy(icb->enode_mac, nv->enode_mac, sizeof(icb->enode_mac));
8178 /* Some boards (with valid NVRAMs) still have NULL enode_mac!! */
8179 if (!memcmp(icb->enode_mac, "\0\0\0\0\0\0", sizeof(icb->enode_mac))) {
69e5f1ea
AV		 8180 icb->enode_mac[0] = 0x00;
8181 icb->enode_mac[1] = 0xC0;
8182 icb->enode_mac[2] = 0xDD;
3a03eb79
AV		 8183 icb->enode_mac[3] = 0x04;
8184 icb->enode_mac[4] = 0x05;
f73cb695 8185 icb->enode_mac[5] = 0x06 + ha->port_no + 1;
3a03eb79
AV		 8186 }
8187
b64b0e8f
AV		 8188 /* Use extended-initialization control block. */
8189 memcpy(ha->ex_init_cb, &nv->ex_version, sizeof(*ha->ex_init_cb));
0eaaca4c 8190 ha->frame_payload_size = le16_to_cpu(icb->frame_payload_size);
3a03eb79
AV		 8191 /*
8192 * Setup driver NVRAM options.
8193 */
8194 qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name),
a9083016 8195 "QLE8XXX");
3a03eb79 8196
aa230bc5
AE		 8197 qlt_81xx_config_nvram_stage2(vha, icb);
8198
3a03eb79 8199 /* Use alternate WWN? */
ad950360 8200 if (nv->host_p & cpu_to_le32(BIT_15)) {
3a03eb79
AV		 8201 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
8202 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
8203 }
8204
8205 /* Prepare nodename */
ad950360 8206 if ((icb->firmware_options_1 & cpu_to_le32(BIT_14)) == 0) {
3a03eb79
AV		 8207 /*
8208 * Firmware will apply the following mask if the nodename was
8209 * not provided.
8210 */
8211 memcpy(icb->node_name, icb->port_name, WWN_SIZE);
8212 icb->node_name[0] &= 0xF0;
8213 }
8214
8215 /* Set host adapter parameters. */
8216 ha->flags.disable_risc_code_load = 0;
8217 ha->flags.enable_lip_reset = 0;
8218 ha->flags.enable_lip_full_login =
8219 le32_to_cpu(nv->host_p) & BIT_10 ? 1: 0;
8220 ha->flags.enable_target_reset =
8221 le32_to_cpu(nv->host_p) & BIT_11 ? 1: 0;
8222 ha->flags.enable_led_scheme = 0;
8223 ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1: 0;
8224
8225 ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) &
8226 (BIT_6 | BIT_5 | BIT_4)) >> 4;
8227
8228 /* save HBA serial number */
8229 ha->serial0 = icb->port_name[5];
8230 ha->serial1 = icb->port_name[6];
8231 ha->serial2 = icb->port_name[7];
8232 memcpy(vha->node_name, icb->node_name, WWN_SIZE);
8233 memcpy(vha->port_name, icb->port_name, WWN_SIZE);
8234
ad950360 8235 icb->execution_throttle = cpu_to_le16(0xFFFF);
3a03eb79
AV		 8236
8237 ha->retry_count = le16_to_cpu(nv->login_retry_count);
8238
8239 /* Set minimum login_timeout to 4 seconds. */
8240 if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout)
8241 nv->login_timeout = cpu_to_le16(ql2xlogintimeout);
8242 if (le16_to_cpu(nv->login_timeout) < 4)
ad950360 8243 nv->login_timeout = cpu_to_le16(4);
3a03eb79 8244 ha->login_timeout = le16_to_cpu(nv->login_timeout);
3a03eb79
AV		 8245
8246 /* Set minimum RATOV to 100 tenths of a second. */
8247 ha->r_a_tov = 100;
8248
8249 ha->loop_reset_delay = nv->reset_delay;
8250
8251 /* Link Down Timeout = 0:
8252 *
7ec0effd 8253 * When Port Down timer expires we will start returning
3a03eb79
AV		 8254 * I/O's to OS with "DID_NO_CONNECT".
8255 *
8256 * Link Down Timeout != 0:
8257 *
8258 * The driver waits for the link to come up after link down
8259 * before returning I/Os to OS with "DID_NO_CONNECT".
8260 */
8261 if (le16_to_cpu(nv->link_down_timeout) == 0) {
8262 ha->loop_down_abort_time =
8263 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
8264 } else {
8265 ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout);
8266 ha->loop_down_abort_time =
8267 (LOOP_DOWN_TIME - ha->link_down_timeout);
8268 }
8269
8270 /* Need enough time to try and get the port back. */
8271 ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count);
8272 if (qlport_down_retry)
8273 ha->port_down_retry_count = qlport_down_retry;
8274
8275 /* Set login_retry_count */
8276 ha->login_retry_count = le16_to_cpu(nv->login_retry_count);
8277 if (ha->port_down_retry_count ==
8278 le16_to_cpu(nv->port_down_retry_count) &&
8279 ha->port_down_retry_count > 3)
8280 ha->login_retry_count = ha->port_down_retry_count;
8281 else if (ha->port_down_retry_count > (int)ha->login_retry_count)
8282 ha->login_retry_count = ha->port_down_retry_count;
8283 if (ql2xloginretrycount)
8284 ha->login_retry_count = ql2xloginretrycount;
8285
6246b8a1 8286 /* if not running MSI-X we need handshaking on interrupts */
f73cb695 8287 if (!vha->hw->flags.msix_enabled && (IS_QLA83XX(ha) || IS_QLA27XX(ha)))
ad950360 8288 icb->firmware_options_2 |= cpu_to_le32(BIT_22);
6246b8a1 8289
3a03eb79
AV		 8290 /* Enable ZIO. */
8291 if (!vha->flags.init_done) {
8292 ha->zio_mode = le32_to_cpu(icb->firmware_options_2) &
8293 (BIT_3 | BIT_2 | BIT_1 | BIT_0);
8294 ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ?
8295 le16_to_cpu(icb->interrupt_delay_timer): 2;
8296 }
ad950360 8297 icb->firmware_options_2 &= cpu_to_le32(
3a03eb79
AV		 8298 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0));
8299 vha->flags.process_response_queue = 0;
8300 if (ha->zio_mode != QLA_ZIO_DISABLED) {
8301 ha->zio_mode = QLA_ZIO_MODE_6;
8302
7c3df132 8303 ql_log(ql_log_info, vha, 0x0075,
3a03eb79 8304 "ZIO mode %d enabled; timer delay (%d us).\n",
7c3df132
SK		 8305 ha->zio_mode,
8306 ha->zio_timer * 100);
3a03eb79
AV		 8307
8308 icb->firmware_options_2 |= cpu_to_le32(
8309 (uint32_t)ha->zio_mode);
8310 icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer);
8311 vha->flags.process_response_queue = 1;
8312 }
8313
41dc529a 8314 /* enable RIDA Format2 */
48acad09 8315 icb->firmware_options_3 |= BIT_0;
41dc529a 8316
8777e431
QT		 8317 /* N2N: driver will initiate Login instead of FW */
8318 icb->firmware_options_3 |= BIT_8;
41dc529a 8319
edd05de1
DG		 8320 if (IS_QLA27XX(ha)) {
8321 icb->firmware_options_3 |= BIT_8;
8322 ql_dbg(ql_log_info, vha, 0x0075,
8323 "Enabling direct connection.\n");
8324 }
8325
3a03eb79 8326 if (rval) {
7c3df132
SK		 8327 ql_log(ql_log_warn, vha, 0x0076,
8328 "NVRAM configuration failed.\n");
3a03eb79
AV		 8329 }
8330 return (rval);
8331}
8332
a9083016
GM		 8333int
8334qla82xx_restart_isp(scsi_qla_host_t *vha)
8335{
8336 int status, rval;
a9083016
GM		 8337 struct qla_hw_data *ha = vha->hw;
8338 struct req_que *req = ha->req_q_map[0];
8339 struct rsp_que *rsp = ha->rsp_q_map[0];
8340 struct scsi_qla_host *vp;
feafb7b1 8341 unsigned long flags;
a9083016
GM		 8342
8343 status = qla2x00_init_rings(vha);
8344 if (!status) {
8345 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
8346 ha->flags.chip_reset_done = 1;
8347
8348 status = qla2x00_fw_ready(vha);
8349 if (!status) {
a9083016
GM		 8350 /* Issue a marker after FW becomes ready. */
8351 qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL);
a9083016 8352 vha->flags.online = 1;
7108b76e 8353 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
a9083016
GM		 8354 }
8355
8356 /* if no cable then assume it's good */
8357 if ((vha->device_flags & DFLG_NO_CABLE))
8358 status = 0;
a9083016
GM		 8359 }
8360
8361 if (!status) {
8362 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
8363
8364 if (!atomic_read(&vha->loop_down_timer)) {
8365 /*
8366 * Issue marker command only when we are going
8367 * to start the I/O .
8368 */
8369 vha->marker_needed = 1;
8370 }
8371
a9083016
GM		 8372 ha->isp_ops->enable_intrs(ha);
8373
8374 ha->isp_abort_cnt = 0;
8375 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
8376
53296788 8377 /* Update the firmware version */
3173167f 8378 status = qla82xx_check_md_needed(vha);
53296788 8379
a9083016
GM		 8380 if (ha->fce) {
8381 ha->flags.fce_enabled = 1;
8382 memset(ha->fce, 0,
8383 fce_calc_size(ha->fce_bufs));
8384 rval = qla2x00_enable_fce_trace(vha,
8385 ha->fce_dma, ha->fce_bufs, ha->fce_mb,
8386 &ha->fce_bufs);
8387 if (rval) {
cfb0919c 8388 ql_log(ql_log_warn, vha, 0x8001,
7c3df132
SK		 8389 "Unable to reinitialize FCE (%d).\n",
8390 rval);
a9083016
GM		 8391 ha->flags.fce_enabled = 0;
8392 }
8393 }
8394
8395 if (ha->eft) {
8396 memset(ha->eft, 0, EFT_SIZE);
8397 rval = qla2x00_enable_eft_trace(vha,
8398 ha->eft_dma, EFT_NUM_BUFFERS);
8399 if (rval) {
cfb0919c 8400 ql_log(ql_log_warn, vha, 0x8010,
7c3df132
SK		 8401 "Unable to reinitialize EFT (%d).\n",
8402 rval);
a9083016
GM		 8403 }
8404 }
a9083016
GM		 8405 }
8406
8407 if (!status) {
cfb0919c 8408 ql_dbg(ql_dbg_taskm, vha, 0x8011,
7c3df132 8409 "qla82xx_restart_isp succeeded.\n");
feafb7b1
AE		 8410
8411 spin_lock_irqsave(&ha->vport_slock, flags);
8412 list_for_each_entry(vp, &ha->vp_list, list) {
8413 if (vp->vp_idx) {
8414 atomic_inc(&vp->vref_count);
8415 spin_unlock_irqrestore(&ha->vport_slock, flags);
8416
a9083016 8417 qla2x00_vp_abort_isp(vp);
feafb7b1
AE		 8418
8419 spin_lock_irqsave(&ha->vport_slock, flags);
8420 atomic_dec(&vp->vref_count);
8421 }
a9083016 8422 }
feafb7b1
AE		 8423 spin_unlock_irqrestore(&ha->vport_slock, flags);
8424
a9083016 8425 } else {
cfb0919c 8426 ql_log(ql_log_warn, vha, 0x8016,
7c3df132 8427 "qla82xx_restart_isp **** FAILED ****.\n");
a9083016
GM		 8428 }
8429
8430 return status;
8431}
8432
3a03eb79 8433void
ae97c91e 8434qla81xx_update_fw_options(scsi_qla_host_t *vha)
3a03eb79 8435{
ae97c91e
AV		 8436 struct qla_hw_data *ha = vha->hw;
8437
f198cafa
HM		 8438 /* Hold status IOCBs until ABTS response received. */
8439 if (ql2xfwholdabts)
8440 ha->fw_options[3] |= BIT_12;
8441
088d09d4
GM		 8442 /* Set Retry FLOGI in case of P2P connection */
8443 if (ha->operating_mode == P2P) {
8444 ha->fw_options[2] |= BIT_3;
8445 ql_dbg(ql_dbg_disc, vha, 0x2103,
8446 "(%s): Setting FLOGI retry BIT in fw_options[2]: 0x%x\n",
8447 __func__, ha->fw_options[2]);
8448 }
8449
41dc529a
QT		 8450 /* Move PUREX, ABTS RX & RIDA to ATIOQ */
8451 if (ql2xmvasynctoatio) {
8452 if (qla_tgt_mode_enabled(vha) ||
8453 qla_dual_mode_enabled(vha))
8454 ha->fw_options[2] |= BIT_11;
8455 else
8456 ha->fw_options[2] &= ~BIT_11;
8457 }
8458
f7e761f5 8459 if (qla_tgt_mode_enabled(vha) ||
2da52737
QT		 8460 qla_dual_mode_enabled(vha)) {
8461 /* FW auto send SCSI status during */
8462 ha->fw_options[1] |= BIT_8;
8463 ha->fw_options[10] |= (u16)SAM_STAT_BUSY << 8;
8464
8465 /* FW perform Exchange validation */
f7e761f5 8466 ha->fw_options[2] |= BIT_4;
2da52737
QT		 8467 } else {
8468 ha->fw_options[1] &= ~BIT_8;
8469 ha->fw_options[10] &= 0x00ff;
8470
f7e761f5 8471 ha->fw_options[2] &= ~BIT_4;
2da52737 8472 }
f7e761f5 8473
41dc529a
QT		 8474 if (ql2xetsenable) {
8475 /* Enable ETS Burst. */
8476 memset(ha->fw_options, 0, sizeof(ha->fw_options));
8477 ha->fw_options[2] |= BIT_9;
8478 }
8479
83548fe2
QT		 8480 ql_dbg(ql_dbg_init, vha, 0x00e9,
8481 "%s, add FW options 1-3 = 0x%04x 0x%04x 0x%04x mode %x\n",
8482 __func__, ha->fw_options[1], ha->fw_options[2],
8483 ha->fw_options[3], vha->host->active_mode);
ae97c91e 8484
ae97c91e 8485 qla2x00_set_fw_options(vha, ha->fw_options);
3a03eb79 8486}
09ff701a
SR		 8487
8488/*
8489 * qla24xx_get_fcp_prio
8490 * Gets the fcp cmd priority value for the logged in port.
8491 * Looks for a match of the port descriptors within
8492 * each of the fcp prio config entries. If a match is found,
8493 * the tag (priority) value is returned.
8494 *
8495 * Input:
21090cbe 8496 * vha = scsi host structure pointer.
09ff701a
SR		 8497 * fcport = port structure pointer.
8498 *
8499 * Return:
6c452a45 8500 * non-zero (if found)
f28a0a96 8501 * -1 (if not found)
09ff701a
SR		 8502 *
8503 * Context:
8504 * Kernel context
8505 */
f28a0a96 8506static int
09ff701a
SR		 8507qla24xx_get_fcp_prio(scsi_qla_host_t *vha, fc_port_t *fcport)
8508{
8509 int i, entries;
8510 uint8_t pid_match, wwn_match;
f28a0a96 8511 int priority;
09ff701a
SR		 8512 uint32_t pid1, pid2;
8513 uint64_t wwn1, wwn2;
8514 struct qla_fcp_prio_entry *pri_entry;
8515 struct qla_hw_data *ha = vha->hw;
8516
8517 if (!ha->fcp_prio_cfg || !ha->flags.fcp_prio_enabled)
f28a0a96 8518 return -1;
09ff701a 8519
f28a0a96 8520 priority = -1;
09ff701a
SR		 8521 entries = ha->fcp_prio_cfg->num_entries;
8522 pri_entry = &ha->fcp_prio_cfg->entry[0];
8523
8524 for (i = 0; i < entries; i++) {
8525 pid_match = wwn_match = 0;
8526
8527 if (!(pri_entry->flags & FCP_PRIO_ENTRY_VALID)) {
8528 pri_entry++;
8529 continue;
8530 }
8531
8532 /* check source pid for a match */
8533 if (pri_entry->flags & FCP_PRIO_ENTRY_SPID_VALID) {
8534 pid1 = pri_entry->src_pid & INVALID_PORT_ID;
8535 pid2 = vha->d_id.b24 & INVALID_PORT_ID;
8536 if (pid1 == INVALID_PORT_ID)
8537 pid_match++;
8538 else if (pid1 == pid2)
8539 pid_match++;
8540 }
8541
8542 /* check destination pid for a match */
8543 if (pri_entry->flags & FCP_PRIO_ENTRY_DPID_VALID) {
8544 pid1 = pri_entry->dst_pid & INVALID_PORT_ID;
8545 pid2 = fcport->d_id.b24 & INVALID_PORT_ID;
8546 if (pid1 == INVALID_PORT_ID)
8547 pid_match++;
8548 else if (pid1 == pid2)
8549 pid_match++;
8550 }
8551
8552 /* check source WWN for a match */
8553 if (pri_entry->flags & FCP_PRIO_ENTRY_SWWN_VALID) {
8554 wwn1 = wwn_to_u64(vha->port_name);
8555 wwn2 = wwn_to_u64(pri_entry->src_wwpn);
8556 if (wwn2 == (uint64_t)-1)
8557 wwn_match++;
8558 else if (wwn1 == wwn2)
8559 wwn_match++;
8560 }
8561
8562 /* check destination WWN for a match */
8563 if (pri_entry->flags & FCP_PRIO_ENTRY_DWWN_VALID) {
8564 wwn1 = wwn_to_u64(fcport->port_name);
8565 wwn2 = wwn_to_u64(pri_entry->dst_wwpn);
8566 if (wwn2 == (uint64_t)-1)
8567 wwn_match++;
8568 else if (wwn1 == wwn2)
8569 wwn_match++;
8570 }
8571
8572 if (pid_match == 2 || wwn_match == 2) {
8573 /* Found a matching entry */
8574 if (pri_entry->flags & FCP_PRIO_ENTRY_TAG_VALID)
8575 priority = pri_entry->tag;
8576 break;
8577 }
8578
8579 pri_entry++;
8580 }
8581
8582 return priority;
8583}
8584
8585/*
8586 * qla24xx_update_fcport_fcp_prio
8587 * Activates fcp priority for the logged in fc port
8588 *
8589 * Input:
21090cbe 8590 * vha = scsi host structure pointer.
09ff701a
SR		 8591 * fcp = port structure pointer.
8592 *
8593 * Return:
8594 * QLA_SUCCESS or QLA_FUNCTION_FAILED
8595 *
8596 * Context:
8597 * Kernel context.
8598 */
8599int
21090cbe 8600qla24xx_update_fcport_fcp_prio(scsi_qla_host_t *vha, fc_port_t *fcport)
09ff701a
SR		 8601{
8602 int ret;
f28a0a96 8603 int priority;
09ff701a
SR		 8604 uint16_t mb[5];
8605
21090cbe
MI		 8606 if (fcport->port_type != FCT_TARGET ||
8607 fcport->loop_id == FC_NO_LOOP_ID)
09ff701a
SR		 8608 return QLA_FUNCTION_FAILED;
8609
21090cbe 8610 priority = qla24xx_get_fcp_prio(vha, fcport);
f28a0a96
AV		 8611 if (priority < 0)
8612 return QLA_FUNCTION_FAILED;
8613
7ec0effd 8614 if (IS_P3P_TYPE(vha->hw)) {
a00f6296
SK		 8615 fcport->fcp_prio = priority & 0xf;
8616 return QLA_SUCCESS;
8617 }
8618
21090cbe 8619 ret = qla24xx_set_fcp_prio(vha, fcport->loop_id, priority, mb);
cfb0919c
CD		 8620 if (ret == QLA_SUCCESS) {
8621 if (fcport->fcp_prio != priority)
8622 ql_dbg(ql_dbg_user, vha, 0x709e,
8623 "Updated FCP_CMND priority - value=%d loop_id=%d "
8624 "port_id=%02x%02x%02x.\n", priority,
8625 fcport->loop_id, fcport->d_id.b.domain,
8626 fcport->d_id.b.area, fcport->d_id.b.al_pa);
a00f6296 8627 fcport->fcp_prio = priority & 0xf;
cfb0919c 8628 } else
7c3df132 8629 ql_dbg(ql_dbg_user, vha, 0x704f,
cfb0919c
CD		 8630 "Unable to update FCP_CMND priority - ret=0x%x for "
8631 "loop_id=%d port_id=%02x%02x%02x.\n", ret, fcport->loop_id,
8632 fcport->d_id.b.domain, fcport->d_id.b.area,
8633 fcport->d_id.b.al_pa);
09ff701a
SR		 8634 return ret;
8635}
8636
8637/*
8638 * qla24xx_update_all_fcp_prio
8639 * Activates fcp priority for all the logged in ports
8640 *
8641 * Input:
8642 * ha = adapter block pointer.
8643 *
8644 * Return:
8645 * QLA_SUCCESS or QLA_FUNCTION_FAILED
8646 *
8647 * Context:
8648 * Kernel context.
8649 */
8650int
8651qla24xx_update_all_fcp_prio(scsi_qla_host_t *vha)
8652{
8653 int ret;
8654 fc_port_t *fcport;
8655
8656 ret = QLA_FUNCTION_FAILED;
8657 /* We need to set priority for all logged in ports */
8658 list_for_each_entry(fcport, &vha->vp_fcports, list)
8659 ret = qla24xx_update_fcport_fcp_prio(vha, fcport);
8660
8661 return ret;
8662}
d7459527 8663
82de802a
QT		 8664struct qla_qpair *qla2xxx_create_qpair(struct scsi_qla_host *vha, int qos,
8665 int vp_idx, bool startqp)
d7459527
MH		 8666{
8667 int rsp_id = 0;
8668 int req_id = 0;
8669 int i;
8670 struct qla_hw_data *ha = vha->hw;
8671 uint16_t qpair_id = 0;
8672 struct qla_qpair *qpair = NULL;
8673 struct qla_msix_entry *msix;
8674
8675 if (!(ha->fw_attributes & BIT_6) || !ha->flags.msix_enabled) {
8676 ql_log(ql_log_warn, vha, 0x00181,
8677 "FW/Driver is not multi-queue capable.\n");
8678 return NULL;
8679 }
8680
c38d1baf 8681 if (ql2xmqsupport || ql2xnvmeenable) {
d7459527
MH		 8682 qpair = kzalloc(sizeof(struct qla_qpair), GFP_KERNEL);
8683 if (qpair == NULL) {
8684 ql_log(ql_log_warn, vha, 0x0182,
8685 "Failed to allocate memory for queue pair.\n");
8686 return NULL;
8687 }
8688 memset(qpair, 0, sizeof(struct qla_qpair));
8689
8690 qpair->hw = vha->hw;
25ff6af1 8691 qpair->vha = vha;
82de802a
QT		 8692 qpair->qp_lock_ptr = &qpair->qp_lock;
8693 spin_lock_init(&qpair->qp_lock);
af7bb382 8694 qpair->use_shadow_reg = IS_SHADOW_REG_CAPABLE(ha) ? 1 : 0;
d7459527
MH		 8695
8696 /* Assign available que pair id */
8697 mutex_lock(&ha->mq_lock);
8698 qpair_id = find_first_zero_bit(ha->qpair_qid_map, ha->max_qpairs);
b95b9452 8699 if (ha->num_qpairs >= ha->max_qpairs) {
d7459527
MH		 8700 mutex_unlock(&ha->mq_lock);
8701 ql_log(ql_log_warn, vha, 0x0183,
8702 "No resources to create additional q pair.\n");
8703 goto fail_qid_map;
8704 }
b95b9452 8705 ha->num_qpairs++;
d7459527
MH		 8706 set_bit(qpair_id, ha->qpair_qid_map);
8707 ha->queue_pair_map[qpair_id] = qpair;
8708 qpair->id = qpair_id;
8709 qpair->vp_idx = vp_idx;
e6373f33 8710 qpair->fw_started = ha->flags.fw_started;
e326d22a 8711 INIT_LIST_HEAD(&qpair->hints_list);
7c3f8fd1
QT		 8712 qpair->chip_reset = ha->base_qpair->chip_reset;
8713 qpair->enable_class_2 = ha->base_qpair->enable_class_2;
8714 qpair->enable_explicit_conf =
8715 ha->base_qpair->enable_explicit_conf;
d7459527
MH		 8716
8717 for (i = 0; i < ha->msix_count; i++) {
093df737 8718 msix = &ha->msix_entries[i];
d7459527
MH		 8719 if (msix->in_use)
8720 continue;
8721 qpair->msix = msix;
83548fe2 8722 ql_dbg(ql_dbg_multiq, vha, 0xc00f,
d7459527
MH		 8723 "Vector %x selected for qpair\n", msix->vector);
8724 break;
8725 }
8726 if (!qpair->msix) {
8727 ql_log(ql_log_warn, vha, 0x0184,
8728 "Out of MSI-X vectors!.\n");
8729 goto fail_msix;
8730 }
8731
8732 qpair->msix->in_use = 1;
8733 list_add_tail(&qpair->qp_list_elem, &vha->qp_list);
8abfa9e2
QT		 8734 qpair->pdev = ha->pdev;
8735 if (IS_QLA27XX(ha) || IS_QLA83XX(ha))
8736 qpair->reqq_start_iocbs = qla_83xx_start_iocbs;
d7459527
MH		 8737
8738 mutex_unlock(&ha->mq_lock);
8739
8740 /* Create response queue first */
82de802a 8741 rsp_id = qla25xx_create_rsp_que(ha, 0, 0, 0, qpair, startqp);
d7459527
MH		 8742 if (!rsp_id) {
8743 ql_log(ql_log_warn, vha, 0x0185,
8744 "Failed to create response queue.\n");
8745 goto fail_rsp;
8746 }
8747
8748 qpair->rsp = ha->rsp_q_map[rsp_id];
8749
8750 /* Create request queue */
82de802a
QT		 8751 req_id = qla25xx_create_req_que(ha, 0, vp_idx, 0, rsp_id, qos,
8752 startqp);
d7459527
MH		 8753 if (!req_id) {
8754 ql_log(ql_log_warn, vha, 0x0186,
8755 "Failed to create request queue.\n");
8756 goto fail_req;
8757 }
8758
8759 qpair->req = ha->req_q_map[req_id];
8760 qpair->rsp->req = qpair->req;
82de802a 8761 qpair->rsp->qpair = qpair;
e326d22a
QT		 8762 /* init qpair to this cpu. Will adjust at run time. */
8763 qla_cpu_update(qpair, smp_processor_id());
d7459527
MH		 8764
8765 if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif) {
8766 if (ha->fw_attributes & BIT_4)
8767 qpair->difdix_supported = 1;
8768 }
8769
8770 qpair->srb_mempool = mempool_create_slab_pool(SRB_MIN_REQ, srb_cachep);
8771 if (!qpair->srb_mempool) {
83548fe2 8772 ql_log(ql_log_warn, vha, 0xd036,
d7459527
MH		 8773 "Failed to create srb mempool for qpair %d\n",
8774 qpair->id);
8775 goto fail_mempool;
8776 }
8777
8778 /* Mark as online */
8779 qpair->online = 1;
8780
8781 if (!vha->flags.qpairs_available)
8782 vha->flags.qpairs_available = 1;
8783
8784 ql_dbg(ql_dbg_multiq, vha, 0xc00d,
8785 "Request/Response queue pair created, id %d\n",
8786 qpair->id);
8787 ql_dbg(ql_dbg_init, vha, 0x0187,
8788 "Request/Response queue pair created, id %d\n",
8789 qpair->id);
8790 }
8791 return qpair;
8792
8793fail_mempool:
8794fail_req:
8795 qla25xx_delete_rsp_que(vha, qpair->rsp);
8796fail_rsp:
8797 mutex_lock(&ha->mq_lock);
8798 qpair->msix->in_use = 0;
8799 list_del(&qpair->qp_list_elem);
8800 if (list_empty(&vha->qp_list))
8801 vha->flags.qpairs_available = 0;
8802fail_msix:
8803 ha->queue_pair_map[qpair_id] = NULL;
8804 clear_bit(qpair_id, ha->qpair_qid_map);
b95b9452 8805 ha->num_qpairs--;
d7459527
MH		 8806 mutex_unlock(&ha->mq_lock);
8807fail_qid_map:
8808 kfree(qpair);
8809 return NULL;
8810}
8811
8812int qla2xxx_delete_qpair(struct scsi_qla_host *vha, struct qla_qpair *qpair)
8813{
d65237c7 8814 int ret = QLA_FUNCTION_FAILED;
d7459527
MH		 8815 struct qla_hw_data *ha = qpair->hw;
8816
8817 qpair->delete_in_progress = 1;
8818 while (atomic_read(&qpair->ref_count))
8819 msleep(500);
8820
8821 ret = qla25xx_delete_req_que(vha, qpair->req);
8822 if (ret != QLA_SUCCESS)
8823 goto fail;
7867b98d 8824
d7459527
MH		 8825 ret = qla25xx_delete_rsp_que(vha, qpair->rsp);
8826 if (ret != QLA_SUCCESS)
8827 goto fail;
8828
8829 mutex_lock(&ha->mq_lock);
8830 ha->queue_pair_map[qpair->id] = NULL;
8831 clear_bit(qpair->id, ha->qpair_qid_map);
b95b9452 8832 ha->num_qpairs--;
d7459527 8833 list_del(&qpair->qp_list_elem);
d65237c7 8834 if (list_empty(&vha->qp_list)) {
d7459527 8835 vha->flags.qpairs_available = 0;
d65237c7
SC		 8836 vha->flags.qpairs_req_created = 0;
8837 vha->flags.qpairs_rsp_created = 0;
8838 }
d7459527
MH		 8839 mempool_destroy(qpair->srb_mempool);
8840 kfree(qpair);
8841 mutex_unlock(&ha->mq_lock);
8842
8843 return QLA_SUCCESS;
8844fail:
8845 return ret;
8846}
Linux 6.x block layer and io_uring tree(s)