projects / linux-2.6-block.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
scsi: qla2xxx: Fix system crash in qlt_plogi_ack_unref
[linux-2.6-block.git] / drivers / scsi / qla2xxx / qla_init.c
CommitLineData
1da177e4 1/*
fa90c54f 2 * QLogic Fibre Channel HBA Driver
bd21eaf9 3 * Copyright (c) 2003-2014 QLogic Corporation
1da177e4 4 *
fa90c54f 5 * See LICENSE.qla2xxx for copyright and licensing details.
1da177e4
LT		 6 */
7#include "qla_def.h"
73208dfd 8#include "qla_gbl.h"
1da177e4
LT		 9
10#include <linux/delay.h>
5a0e3ad6 11#include <linux/slab.h>
0107109e 12#include <linux/vmalloc.h>
1da177e4
LT		 13
14#include "qla_devtbl.h"
15
4e08df3f
DM		 16#ifdef CONFIG_SPARC
17#include <asm/prom.h>
4e08df3f
DM		 18#endif
19
2d70c103
NB		 20#include <target/target_core_base.h>
21#include "qla_target.h"
22
1da177e4
LT		 23/*
24* QLogic ISP2x00 Hardware Support Function Prototypes.
25*/
1da177e4 26static int qla2x00_isp_firmware(scsi_qla_host_t *);
1da177e4 27static int qla2x00_setup_chip(scsi_qla_host_t *);
1da177e4
LT		 28static int qla2x00_fw_ready(scsi_qla_host_t *);
29static int qla2x00_configure_hba(scsi_qla_host_t *);
1da177e4
LT		 30static int qla2x00_configure_loop(scsi_qla_host_t *);
31static int qla2x00_configure_local_loop(scsi_qla_host_t *);
1da177e4 32static int qla2x00_configure_fabric(scsi_qla_host_t *);
726b8548 33static int qla2x00_find_all_fabric_devs(scsi_qla_host_t *);
1da177e4 34static int qla2x00_restart_isp(scsi_qla_host_t *);
1da177e4 35
4d4df193
HK		 36static struct qla_chip_state_84xx *qla84xx_get_chip(struct scsi_qla_host *);
37static int qla84xx_init_chip(scsi_qla_host_t *);
73208dfd 38static int qla25xx_init_queues(struct qla_hw_data *);
a5d42f4c 39static int qla24xx_post_prli_work(struct scsi_qla_host*, fc_port_t *);
726b8548
QT		 40static void qla24xx_handle_plogi_done_event(struct scsi_qla_host *,
41 struct event_arg *);
a5d42f4c
DG		 42static void qla24xx_handle_prli_done_event(struct scsi_qla_host *,
43 struct event_arg *);
4d4df193 44
ac280b67
AV		 45/* SRB Extensions ---------------------------------------------------------- */
46
9ba56b95 47void
8e5f4ba0 48qla2x00_sp_timeout(struct timer_list *t)
ac280b67 49{
8e5f4ba0 50 srb_t *sp = from_timer(sp, t, u.iocb_cmd.timer);
4916392b 51 struct srb_iocb *iocb;
25ff6af1 52 scsi_qla_host_t *vha = sp->vha;
ac280b67
AV		 53 struct req_que *req;
54 unsigned long flags;
55
25ff6af1
JC		 56 spin_lock_irqsave(&vha->hw->hardware_lock, flags);
57 req = vha->hw->req_q_map[0];
ac280b67 58 req->outstanding_cmds[sp->handle] = NULL;
9ba56b95 59 iocb = &sp->u.iocb_cmd;
4916392b 60 iocb->timeout(sp);
25ff6af1
JC		 61 sp->free(sp);
62 spin_unlock_irqrestore(&vha->hw->hardware_lock, flags);
ac280b67
AV		 63}
64
9ba56b95 65void
25ff6af1 66qla2x00_sp_free(void *ptr)
ac280b67 67{
25ff6af1 68 srb_t *sp = ptr;
9ba56b95 69 struct srb_iocb *iocb = &sp->u.iocb_cmd;
ac280b67 70
4d97cc53 71 del_timer(&iocb->timer);
25ff6af1 72 qla2x00_rel_sp(sp);
ac280b67
AV		 73}
74
ac280b67
AV		 75/* Asynchronous Login/Logout Routines -------------------------------------- */
76
a9b6f722 77unsigned long
5b91490e
AV		 78qla2x00_get_async_timeout(struct scsi_qla_host *vha)
79{
80 unsigned long tmo;
81 struct qla_hw_data *ha = vha->hw;
82
83 /* Firmware should use switch negotiated r_a_tov for timeout. */
84 tmo = ha->r_a_tov / 10 * 2;
8ae6d9c7
GM		 85 if (IS_QLAFX00(ha)) {
86 tmo = FX00_DEF_RATOV * 2;
87 } else if (!IS_FWI2_CAPABLE(ha)) {
5b91490e
AV		 88 /*
89 * Except for earlier ISPs where the timeout is seeded from the
90 * initialization control block.
91 */
92 tmo = ha->login_timeout;
93 }
94 return tmo;
95}
ac280b67 96
726b8548 97void
9ba56b95 98qla2x00_async_iocb_timeout(void *data)
ac280b67 99{
25ff6af1 100 srb_t *sp = data;
ac280b67 101 fc_port_t *fcport = sp->fcport;
726b8548
QT		 102 struct srb_iocb *lio = &sp->u.iocb_cmd;
103 struct event_arg ea;
ac280b67 104
7c3df132 105 ql_dbg(ql_dbg_disc, fcport->vha, 0x2071,
726b8548
QT		 106 "Async-%s timeout - hdl=%x portid=%06x %8phC.\n",
107 sp->name, sp->handle, fcport->d_id.b24, fcport->port_name);
ac280b67 108
5ff1d584 109 fcport->flags &= ~FCF_ASYNC_SENT;
726b8548
QT		 110
111 switch (sp->type) {
112 case SRB_LOGIN_CMD:
6ac52608
AV		 113 /* Retry as needed. */
114 lio->u.logio.data[0] = MBS_COMMAND_ERROR;
115 lio->u.logio.data[1] = lio->u.logio.flags & SRB_LOGIN_RETRIED ?
116 QLA_LOGIO_LOGIN_RETRIED : 0;
726b8548
QT		 117 memset(&ea, 0, sizeof(ea));
118 ea.event = FCME_PLOGI_DONE;
119 ea.fcport = sp->fcport;
120 ea.data[0] = lio->u.logio.data[0];
121 ea.data[1] = lio->u.logio.data[1];
122 ea.sp = sp;
123 qla24xx_handle_plogi_done_event(fcport->vha, &ea);
124 break;
125 case SRB_LOGOUT_CMD:
a6ca8878 126 qlt_logo_completion_handler(fcport, QLA_FUNCTION_TIMEOUT);
726b8548
QT		 127 break;
128 case SRB_CT_PTHRU_CMD:
129 case SRB_MB_IOCB:
130 case SRB_NACK_PLOGI:
131 case SRB_NACK_PRLI:
132 case SRB_NACK_LOGO:
25ff6af1 133 sp->done(sp, QLA_FUNCTION_TIMEOUT);
726b8548 134 break;
6ac52608 135 }
ac280b67
AV		 136}
137
99b0bec7 138static void
25ff6af1 139qla2x00_async_login_sp_done(void *ptr, int res)
99b0bec7 140{
25ff6af1
JC		 141 srb_t *sp = ptr;
142 struct scsi_qla_host *vha = sp->vha;
9ba56b95 143 struct srb_iocb *lio = &sp->u.iocb_cmd;
726b8548 144 struct event_arg ea;
9ba56b95 145
83548fe2 146 ql_dbg(ql_dbg_disc, vha, 0x20dd,
25ff6af1 147 "%s %8phC res %d \n", __func__, sp->fcport->port_name, res);
726b8548
QT		 148
149 sp->fcport->flags &= ~FCF_ASYNC_SENT;
150 if (!test_bit(UNLOADING, &vha->dpc_flags)) {
151 memset(&ea, 0, sizeof(ea));
152 ea.event = FCME_PLOGI_DONE;
153 ea.fcport = sp->fcport;
154 ea.data[0] = lio->u.logio.data[0];
155 ea.data[1] = lio->u.logio.data[1];
156 ea.iop[0] = lio->u.logio.iop[0];
157 ea.iop[1] = lio->u.logio.iop[1];
158 ea.sp = sp;
159 qla2x00_fcport_event_handler(vha, &ea);
160 }
9ba56b95 161
25ff6af1 162 sp->free(sp);
99b0bec7
AV		 163}
164
ac280b67
AV		 165int
166qla2x00_async_login(struct scsi_qla_host *vha, fc_port_t *fcport,
167 uint16_t *data)
168{
ac280b67 169 srb_t *sp;
4916392b 170 struct srb_iocb *lio;
726b8548
QT		 171 int rval = QLA_FUNCTION_FAILED;
172
173 if (!vha->flags.online)
174 goto done;
175
176 if ((fcport->fw_login_state == DSC_LS_PLOGI_PEND) ||
177 (fcport->fw_login_state == DSC_LS_PLOGI_COMP) ||
178 (fcport->fw_login_state == DSC_LS_PRLI_PEND))
179 goto done;
ac280b67 180
9ba56b95 181 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
ac280b67
AV		 182 if (!sp)
183 goto done;
184
726b8548
QT		 185 fcport->flags |= FCF_ASYNC_SENT;
186 fcport->logout_completed = 0;
187
9ba56b95
GM		 188 sp->type = SRB_LOGIN_CMD;
189 sp->name = "login";
190 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2);
191
192 lio = &sp->u.iocb_cmd;
3822263e 193 lio->timeout = qla2x00_async_iocb_timeout;
9ba56b95 194 sp->done = qla2x00_async_login_sp_done;
4916392b 195 lio->u.logio.flags |= SRB_LOGIN_COND_PLOGI;
a5d42f4c
DG		 196
197 if (fcport->fc4f_nvme)
198 lio->u.logio.flags |= SRB_LOGIN_SKIP_PRLI;
199
ac280b67 200 if (data[1] & QLA_LOGIO_LOGIN_RETRIED)
4916392b 201 lio->u.logio.flags |= SRB_LOGIN_RETRIED;
ac280b67 202 rval = qla2x00_start_sp(sp);
080c9517
CD		 203 if (rval != QLA_SUCCESS) {
204 fcport->flags &= ~FCF_ASYNC_SENT;
205 fcport->flags |= FCF_LOGIN_NEEDED;
206 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
ac280b67 207 goto done_free_sp;
080c9517 208 }
ac280b67 209
7c3df132 210 ql_dbg(ql_dbg_disc, vha, 0x2072,
726b8548
QT		 211 "Async-login - %8phC hdl=%x, loopid=%x portid=%02x%02x%02x "
212 "retries=%d.\n", fcport->port_name, sp->handle, fcport->loop_id,
cfb0919c
CD		 213 fcport->d_id.b.domain, fcport->d_id.b.area, fcport->d_id.b.al_pa,
214 fcport->login_retry);
ac280b67
AV		 215 return rval;
216
217done_free_sp:
25ff6af1 218 sp->free(sp);
ac280b67 219done:
726b8548 220 fcport->flags &= ~FCF_ASYNC_SENT;
ac280b67
AV		 221 return rval;
222}
223
99b0bec7 224static void
25ff6af1 225qla2x00_async_logout_sp_done(void *ptr, int res)
99b0bec7 226{
25ff6af1 227 srb_t *sp = ptr;
9ba56b95 228 struct srb_iocb *lio = &sp->u.iocb_cmd;
9ba56b95 229
726b8548 230 sp->fcport->flags &= ~FCF_ASYNC_SENT;
25ff6af1
JC		 231 if (!test_bit(UNLOADING, &sp->vha->dpc_flags))
232 qla2x00_post_async_logout_done_work(sp->vha, sp->fcport,
9ba56b95 233 lio->u.logio.data);
25ff6af1 234 sp->free(sp);
99b0bec7
AV		 235}
236
ac280b67
AV		 237int
238qla2x00_async_logout(struct scsi_qla_host *vha, fc_port_t *fcport)
239{
ac280b67 240 srb_t *sp;
4916392b 241 struct srb_iocb *lio;
ac280b67
AV		 242 int rval;
243
244 rval = QLA_FUNCTION_FAILED;
726b8548 245 fcport->flags |= FCF_ASYNC_SENT;
9ba56b95 246 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
ac280b67
AV		 247 if (!sp)
248 goto done;
249
9ba56b95
GM		 250 sp->type = SRB_LOGOUT_CMD;
251 sp->name = "logout";
252 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2);
253
254 lio = &sp->u.iocb_cmd;
3822263e 255 lio->timeout = qla2x00_async_iocb_timeout;
9ba56b95 256 sp->done = qla2x00_async_logout_sp_done;
ac280b67
AV		 257 rval = qla2x00_start_sp(sp);
258 if (rval != QLA_SUCCESS)
259 goto done_free_sp;
260
7c3df132 261 ql_dbg(ql_dbg_disc, vha, 0x2070,
726b8548 262 "Async-logout - hdl=%x loop-id=%x portid=%02x%02x%02x %8phC.\n",
cfb0919c 263 sp->handle, fcport->loop_id, fcport->d_id.b.domain,
726b8548
QT		 264 fcport->d_id.b.area, fcport->d_id.b.al_pa,
265 fcport->port_name);
ac280b67
AV		 266 return rval;
267
268done_free_sp:
25ff6af1 269 sp->free(sp);
ac280b67 270done:
726b8548 271 fcport->flags &= ~FCF_ASYNC_SENT;
ac280b67
AV		 272 return rval;
273}
274
5ff1d584 275static void
25ff6af1 276qla2x00_async_adisc_sp_done(void *ptr, int res)
5ff1d584 277{
25ff6af1
JC		 278 srb_t *sp = ptr;
279 struct scsi_qla_host *vha = sp->vha;
9ba56b95 280 struct srb_iocb *lio = &sp->u.iocb_cmd;
9ba56b95
GM		 281
282 if (!test_bit(UNLOADING, &vha->dpc_flags))
25ff6af1 283 qla2x00_post_async_adisc_done_work(sp->vha, sp->fcport,
9ba56b95 284 lio->u.logio.data);
25ff6af1 285 sp->free(sp);
5ff1d584
AV		 286}
287
288int
289qla2x00_async_adisc(struct scsi_qla_host *vha, fc_port_t *fcport,
290 uint16_t *data)
291{
5ff1d584 292 srb_t *sp;
4916392b 293 struct srb_iocb *lio;
5ff1d584
AV		 294 int rval;
295
296 rval = QLA_FUNCTION_FAILED;
726b8548 297 fcport->flags |= FCF_ASYNC_SENT;
9ba56b95 298 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
5ff1d584
AV		 299 if (!sp)
300 goto done;
301
9ba56b95
GM		 302 sp->type = SRB_ADISC_CMD;
303 sp->name = "adisc";
304 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2);
305
306 lio = &sp->u.iocb_cmd;
3822263e 307 lio->timeout = qla2x00_async_iocb_timeout;
9ba56b95 308 sp->done = qla2x00_async_adisc_sp_done;
5ff1d584 309 if (data[1] & QLA_LOGIO_LOGIN_RETRIED)
4916392b 310 lio->u.logio.flags |= SRB_LOGIN_RETRIED;
5ff1d584
AV		 311 rval = qla2x00_start_sp(sp);
312 if (rval != QLA_SUCCESS)
313 goto done_free_sp;
314
7c3df132 315 ql_dbg(ql_dbg_disc, vha, 0x206f,
cfb0919c
CD		 316 "Async-adisc - hdl=%x loopid=%x portid=%02x%02x%02x.\n",
317 sp->handle, fcport->loop_id, fcport->d_id.b.domain,
318 fcport->d_id.b.area, fcport->d_id.b.al_pa);
5ff1d584
AV		 319 return rval;
320
321done_free_sp:
25ff6af1 322 sp->free(sp);
5ff1d584 323done:
726b8548
QT		 324 fcport->flags &= ~FCF_ASYNC_SENT;
325 return rval;
326}
327
328static void qla24xx_handle_gnl_done_event(scsi_qla_host_t *vha,
329 struct event_arg *ea)
330{
331 fc_port_t *fcport, *conflict_fcport;
332 struct get_name_list_extended *e;
333 u16 i, n, found = 0, loop_id;
334 port_id_t id;
335 u64 wwn;
a5d42f4c 336 u8 opt = 0, current_login_state;
726b8548
QT		 337
338 fcport = ea->fcport;
339
340 if (ea->rc) { /* rval */
341 if (fcport->login_retry == 0) {
342 fcport->login_retry = vha->hw->login_retry_count;
83548fe2
QT		 343 ql_dbg(ql_dbg_disc, vha, 0x20de,
344 "GNL failed Port login retry %8phN, retry cnt=%d.\n",
345 fcport->port_name, fcport->login_retry);
726b8548
QT		 346 }
347 return;
348 }
349
350 if (fcport->last_rscn_gen != fcport->rscn_gen) {
83548fe2 351 ql_dbg(ql_dbg_disc, vha, 0x20df,
726b8548
QT		 352 "%s %8phC rscn gen changed rscn %d|%d \n",
353 __func__, fcport->port_name,
354 fcport->last_rscn_gen, fcport->rscn_gen);
355 qla24xx_post_gidpn_work(vha, fcport);
356 return;
357 } else if (fcport->last_login_gen != fcport->login_gen) {
83548fe2
QT		 358 ql_dbg(ql_dbg_disc, vha, 0x20e0,
359 "%s %8phC login gen changed login %d|%d\n",
360 __func__, fcport->port_name,
361 fcport->last_login_gen, fcport->login_gen);
726b8548
QT		 362 return;
363 }
364
365 n = ea->data[0] / sizeof(struct get_name_list_extended);
366
83548fe2 367 ql_dbg(ql_dbg_disc, vha, 0x20e1,
726b8548
QT		 368 "%s %d %8phC n %d %02x%02x%02x lid %d \n",
369 __func__, __LINE__, fcport->port_name, n,
370 fcport->d_id.b.domain, fcport->d_id.b.area,
371 fcport->d_id.b.al_pa, fcport->loop_id);
372
373 for (i = 0; i < n; i++) {
374 e = &vha->gnl.l[i];
375 wwn = wwn_to_u64(e->port_name);
376
377 if (memcmp((u8 *)&wwn, fcport->port_name, WWN_SIZE))
378 continue;
379
380 found = 1;
381 id.b.domain = e->port_id[2];
382 id.b.area = e->port_id[1];
383 id.b.al_pa = e->port_id[0];
384 id.b.rsvd_1 = 0;
385
386 loop_id = le16_to_cpu(e->nport_handle);
387 loop_id = (loop_id & 0x7fff);
388
83548fe2
QT		 389 ql_dbg(ql_dbg_disc, vha, 0x20e2,
390 "%s found %8phC CLS [%d|%d] ID[%02x%02x%02x|%02x%02x%02x] lid[%d|%d]\n",
391 __func__, fcport->port_name,
392 e->current_login_state, fcport->fw_login_state,
393 id.b.domain, id.b.area, id.b.al_pa,
394 fcport->d_id.b.domain, fcport->d_id.b.area,
395 fcport->d_id.b.al_pa, loop_id, fcport->loop_id);
726b8548
QT		 396
397 if ((id.b24 != fcport->d_id.b24) ||
398 ((fcport->loop_id != FC_NO_LOOP_ID) &&
399 (fcport->loop_id != loop_id))) {
83548fe2
QT		 400 ql_dbg(ql_dbg_disc, vha, 0x20e3,
401 "%s %d %8phC post del sess\n",
402 __func__, __LINE__, fcport->port_name);
726b8548
QT		 403 qlt_schedule_sess_for_deletion(fcport, 1);
404 return;
405 }
406
407 fcport->loop_id = loop_id;
408
409 wwn = wwn_to_u64(fcport->port_name);
410 qlt_find_sess_invalidate_other(vha, wwn,
411 id, loop_id, &conflict_fcport);
412
413 if (conflict_fcport) {
414 /*
415 * Another share fcport share the same loop_id &
416 * nport id. Conflict fcport needs to finish
417 * cleanup before this fcport can proceed to login.
418 */
419 conflict_fcport->conflict = fcport;
420 fcport->login_pause = 1;
421 }
422
a5d42f4c
DG		 423 if (fcport->fc4f_nvme)
424 current_login_state = e->current_login_state >> 4;
425 else
426 current_login_state = e->current_login_state & 0xf;
427
428 switch (current_login_state) {
726b8548 429 case DSC_LS_PRLI_COMP:
83548fe2
QT		 430 ql_dbg(ql_dbg_disc, vha, 0x20e4,
431 "%s %d %8phC post gpdb\n",
432 __func__, __LINE__, fcport->port_name);
726b8548
QT		 433 opt = PDO_FORCE_ADISC;
434 qla24xx_post_gpdb_work(vha, fcport, opt);
435 break;
726b8548
QT		 436 case DSC_LS_PORT_UNAVAIL:
437 default:
438 if (fcport->loop_id == FC_NO_LOOP_ID) {
439 qla2x00_find_new_loop_id(vha, fcport);
440 fcport->fw_login_state = DSC_LS_PORT_UNAVAIL;
441 }
83548fe2
QT		 442 ql_dbg(ql_dbg_disc, vha, 0x20e5,
443 "%s %d %8phC\n",
444 __func__, __LINE__, fcport->port_name);
726b8548
QT		 445 qla24xx_fcport_handle_login(vha, fcport);
446 break;
447 }
448 }
449
450 if (!found) {
451 /* fw has no record of this port */
452 if (fcport->loop_id == FC_NO_LOOP_ID) {
453 qla2x00_find_new_loop_id(vha, fcport);
454 fcport->fw_login_state = DSC_LS_PORT_UNAVAIL;
455 } else {
456 for (i = 0; i < n; i++) {
457 e = &vha->gnl.l[i];
458 id.b.domain = e->port_id[0];
459 id.b.area = e->port_id[1];
460 id.b.al_pa = e->port_id[2];
461 id.b.rsvd_1 = 0;
462 loop_id = le16_to_cpu(e->nport_handle);
463
464 if (fcport->d_id.b24 == id.b24) {
465 conflict_fcport =
466 qla2x00_find_fcport_by_wwpn(vha,
467 e->port_name, 0);
468
83548fe2 469 ql_dbg(ql_dbg_disc, vha, 0x20e6,
726b8548
QT		 470 "%s %d %8phC post del sess\n",
471 __func__, __LINE__,
472 conflict_fcport->port_name);
473 qlt_schedule_sess_for_deletion
474 (conflict_fcport, 1);
475 }
476
477 if (fcport->loop_id == loop_id) {
478 /* FW already picked this loop id for another fcport */
479 qla2x00_find_new_loop_id(vha, fcport);
480 }
481 }
482 }
483 qla24xx_fcport_handle_login(vha, fcport);
484 }
485} /* gnl_event */
486
487static void
25ff6af1 488qla24xx_async_gnl_sp_done(void *s, int res)
726b8548 489{
25ff6af1
JC		 490 struct srb *sp = s;
491 struct scsi_qla_host *vha = sp->vha;
726b8548
QT		 492 unsigned long flags;
493 struct fc_port *fcport = NULL, *tf;
494 u16 i, n = 0, loop_id;
495 struct event_arg ea;
496 struct get_name_list_extended *e;
497 u64 wwn;
498 struct list_head h;
499
83548fe2 500 ql_dbg(ql_dbg_disc, vha, 0x20e7,
726b8548
QT		 501 "Async done-%s res %x mb[1]=%x mb[2]=%x \n",
502 sp->name, res, sp->u.iocb_cmd.u.mbx.in_mb[1],
503 sp->u.iocb_cmd.u.mbx.in_mb[2]);
504
505 memset(&ea, 0, sizeof(ea));
506 ea.sp = sp;
507 ea.rc = res;
508 ea.event = FCME_GNL_DONE;
509
510 if (sp->u.iocb_cmd.u.mbx.in_mb[1] >=
511 sizeof(struct get_name_list_extended)) {
512 n = sp->u.iocb_cmd.u.mbx.in_mb[1] /
513 sizeof(struct get_name_list_extended);
514 ea.data[0] = sp->u.iocb_cmd.u.mbx.in_mb[1]; /* amnt xfered */
515 }
516
517 for (i = 0; i < n; i++) {
518 e = &vha->gnl.l[i];
519 loop_id = le16_to_cpu(e->nport_handle);
520 /* mask out reserve bit */
521 loop_id = (loop_id & 0x7fff);
522 set_bit(loop_id, vha->hw->loop_id_map);
523 wwn = wwn_to_u64(e->port_name);
524
83548fe2 525 ql_dbg(ql_dbg_disc + ql_dbg_verbose, vha, 0x20e8,
726b8548
QT		 526 "%s %8phC %02x:%02x:%02x state %d/%d lid %x \n",
527 __func__, (void *)&wwn, e->port_id[2], e->port_id[1],
528 e->port_id[0], e->current_login_state, e->last_login_state,
529 (loop_id & 0x7fff));
530 }
531
532 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
533 vha->gnl.sent = 0;
534
535 INIT_LIST_HEAD(&h);
536 fcport = tf = NULL;
537 if (!list_empty(&vha->gnl.fcports))
538 list_splice_init(&vha->gnl.fcports, &h);
539
540 list_for_each_entry_safe(fcport, tf, &h, gnl_entry) {
541 list_del_init(&fcport->gnl_entry);
542 fcport->flags &= ~FCF_ASYNC_SENT;
543 ea.fcport = fcport;
544
545 qla2x00_fcport_event_handler(vha, &ea);
546 }
547
548 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
549
25ff6af1 550 sp->free(sp);
726b8548
QT		 551}
552
553int qla24xx_async_gnl(struct scsi_qla_host *vha, fc_port_t *fcport)
554{
555 srb_t *sp;
556 struct srb_iocb *mbx;
557 int rval = QLA_FUNCTION_FAILED;
558 unsigned long flags;
559 u16 *mb;
560
561 if (!vha->flags.online)
562 goto done;
563
83548fe2 564 ql_dbg(ql_dbg_disc, vha, 0x20d9,
726b8548
QT		 565 "Async-gnlist WWPN %8phC \n", fcport->port_name);
566
567 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
568 fcport->flags |= FCF_ASYNC_SENT;
569 fcport->disc_state = DSC_GNL;
570 fcport->last_rscn_gen = fcport->rscn_gen;
571 fcport->last_login_gen = fcport->login_gen;
572
573 list_add_tail(&fcport->gnl_entry, &vha->gnl.fcports);
574 if (vha->gnl.sent) {
575 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
576 rval = QLA_SUCCESS;
577 goto done;
578 }
579 vha->gnl.sent = 1;
580 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
581
582 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
583 if (!sp)
584 goto done;
585 sp->type = SRB_MB_IOCB;
586 sp->name = "gnlist";
587 sp->gen1 = fcport->rscn_gen;
588 sp->gen2 = fcport->login_gen;
589
590 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha)+2);
591
592 mb = sp->u.iocb_cmd.u.mbx.out_mb;
593 mb[0] = MBC_PORT_NODE_NAME_LIST;
594 mb[1] = BIT_2 | BIT_3;
595 mb[2] = MSW(vha->gnl.ldma);
596 mb[3] = LSW(vha->gnl.ldma);
597 mb[6] = MSW(MSD(vha->gnl.ldma));
598 mb[7] = LSW(MSD(vha->gnl.ldma));
599 mb[8] = vha->gnl.size;
600 mb[9] = vha->vp_idx;
601
602 mbx = &sp->u.iocb_cmd;
603 mbx->timeout = qla2x00_async_iocb_timeout;
604
605 sp->done = qla24xx_async_gnl_sp_done;
606
607 rval = qla2x00_start_sp(sp);
608 if (rval != QLA_SUCCESS)
609 goto done_free_sp;
610
83548fe2
QT		 611 ql_dbg(ql_dbg_disc, vha, 0x20da,
612 "Async-%s - OUT WWPN %8phC hndl %x\n",
613 sp->name, fcport->port_name, sp->handle);
726b8548
QT		 614
615 return rval;
616
617done_free_sp:
25ff6af1 618 sp->free(sp);
726b8548
QT		 619done:
620 fcport->flags &= ~FCF_ASYNC_SENT;
621 return rval;
622}
623
624int qla24xx_post_gnl_work(struct scsi_qla_host *vha, fc_port_t *fcport)
625{
626 struct qla_work_evt *e;
627
628 e = qla2x00_alloc_work(vha, QLA_EVT_GNL);
629 if (!e)
630 return QLA_FUNCTION_FAILED;
631
632 e->u.fcport.fcport = fcport;
633 return qla2x00_post_work(vha, e);
634}
635
636static
25ff6af1 637void qla24xx_async_gpdb_sp_done(void *s, int res)
726b8548 638{
25ff6af1
JC		 639 struct srb *sp = s;
640 struct scsi_qla_host *vha = sp->vha;
726b8548 641 struct qla_hw_data *ha = vha->hw;
726b8548
QT		 642 struct port_database_24xx *pd;
643 fc_port_t *fcport = sp->fcport;
644 u16 *mb = sp->u.iocb_cmd.u.mbx.in_mb;
645 int rval = QLA_SUCCESS;
646 struct event_arg ea;
647
83548fe2 648 ql_dbg(ql_dbg_disc, vha, 0x20db,
726b8548
QT		 649 "Async done-%s res %x, WWPN %8phC mb[1]=%x mb[2]=%x \n",
650 sp->name, res, fcport->port_name, mb[1], mb[2]);
651
652 fcport->flags &= ~FCF_ASYNC_SENT;
653
654 if (res) {
655 rval = res;
656 goto gpd_error_out;
657 }
658
659 pd = (struct port_database_24xx *)sp->u.iocb_cmd.u.mbx.in;
660
15f30a57 661 rval = __qla24xx_parse_gpdb(vha, fcport, pd);
726b8548
QT		 662
663gpd_error_out:
664 memset(&ea, 0, sizeof(ea));
665 ea.event = FCME_GPDB_DONE;
666 ea.rc = rval;
667 ea.fcport = fcport;
668 ea.sp = sp;
669
670 qla2x00_fcport_event_handler(vha, &ea);
671
672 dma_pool_free(ha->s_dma_pool, sp->u.iocb_cmd.u.mbx.in,
673 sp->u.iocb_cmd.u.mbx.in_dma);
674
25ff6af1 675 sp->free(sp);
726b8548
QT		 676}
677
a5d42f4c
DG		 678static int qla24xx_post_prli_work(struct scsi_qla_host *vha, fc_port_t *fcport)
679{
680 struct qla_work_evt *e;
681
682 e = qla2x00_alloc_work(vha, QLA_EVT_PRLI);
683 if (!e)
684 return QLA_FUNCTION_FAILED;
685
686 e->u.fcport.fcport = fcport;
687
688 return qla2x00_post_work(vha, e);
689}
690
691static void
692qla2x00_async_prli_sp_done(void *ptr, int res)
693{
694 srb_t *sp = ptr;
695 struct scsi_qla_host *vha = sp->vha;
696 struct srb_iocb *lio = &sp->u.iocb_cmd;
697 struct event_arg ea;
698
699 ql_dbg(ql_dbg_disc, vha, 0x2129,
700 "%s %8phC res %d \n", __func__,
701 sp->fcport->port_name, res);
702
703 sp->fcport->flags &= ~FCF_ASYNC_SENT;
704
705 if (!test_bit(UNLOADING, &vha->dpc_flags)) {
706 memset(&ea, 0, sizeof(ea));
707 ea.event = FCME_PRLI_DONE;
708 ea.fcport = sp->fcport;
709 ea.data[0] = lio->u.logio.data[0];
710 ea.data[1] = lio->u.logio.data[1];
711 ea.iop[0] = lio->u.logio.iop[0];
712 ea.iop[1] = lio->u.logio.iop[1];
713 ea.sp = sp;
714
715 qla2x00_fcport_event_handler(vha, &ea);
716 }
717
718 sp->free(sp);
719}
720
721int
722qla24xx_async_prli(struct scsi_qla_host *vha, fc_port_t *fcport)
723{
724 srb_t *sp;
725 struct srb_iocb *lio;
726 int rval = QLA_FUNCTION_FAILED;
727
728 if (!vha->flags.online)
729 return rval;
730
731 if (fcport->fw_login_state == DSC_LS_PLOGI_PEND ||
732 fcport->fw_login_state == DSC_LS_PLOGI_COMP ||
733 fcport->fw_login_state == DSC_LS_PRLI_PEND)
734 return rval;
735
736 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
737 if (!sp)
738 return rval;
739
740 fcport->flags |= FCF_ASYNC_SENT;
741 fcport->logout_completed = 0;
742
743 sp->type = SRB_PRLI_CMD;
744 sp->name = "prli";
745 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2);
746
747 lio = &sp->u.iocb_cmd;
748 lio->timeout = qla2x00_async_iocb_timeout;
749 sp->done = qla2x00_async_prli_sp_done;
750 lio->u.logio.flags = 0;
751
752 if (fcport->fc4f_nvme)
753 lio->u.logio.flags |= SRB_LOGIN_NVME_PRLI;
754
755 rval = qla2x00_start_sp(sp);
756 if (rval != QLA_SUCCESS) {
757 fcport->flags &= ~FCF_ASYNC_SENT;
758 fcport->flags |= FCF_LOGIN_NEEDED;
759 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
760 goto done_free_sp;
761 }
762
763 ql_dbg(ql_dbg_disc, vha, 0x211b,
764 "Async-prli - %8phC hdl=%x, loopid=%x portid=%06x retries=%d.\n",
765 fcport->port_name, sp->handle, fcport->loop_id,
766 fcport->d_id.b24, fcport->login_retry);
767
768 return rval;
769
770done_free_sp:
771 sp->free(sp);
772 fcport->flags &= ~FCF_ASYNC_SENT;
773 return rval;
774}
775
a07fc0a4 776int qla24xx_post_gpdb_work(struct scsi_qla_host *vha, fc_port_t *fcport, u8 opt)
726b8548
QT		 777{
778 struct qla_work_evt *e;
779
780 e = qla2x00_alloc_work(vha, QLA_EVT_GPDB);
781 if (!e)
782 return QLA_FUNCTION_FAILED;
783
784 e->u.fcport.fcport = fcport;
785 e->u.fcport.opt = opt;
786 return qla2x00_post_work(vha, e);
787}
788
789int qla24xx_async_gpdb(struct scsi_qla_host *vha, fc_port_t *fcport, u8 opt)
790{
791 srb_t *sp;
792 struct srb_iocb *mbx;
793 int rval = QLA_FUNCTION_FAILED;
794 u16 *mb;
795 dma_addr_t pd_dma;
796 struct port_database_24xx *pd;
797 struct qla_hw_data *ha = vha->hw;
798
799 if (!vha->flags.online)
800 goto done;
801
802 fcport->flags |= FCF_ASYNC_SENT;
803 fcport->disc_state = DSC_GPDB;
804
805 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
806 if (!sp)
807 goto done;
808
e0824e69
JC		 809 sp->type = SRB_MB_IOCB;
810 sp->name = "gpdb";
811 sp->gen1 = fcport->rscn_gen;
812 sp->gen2 = fcport->login_gen;
813 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha) + 2);
814
08eb7f45 815 pd = dma_pool_zalloc(ha->s_dma_pool, GFP_KERNEL, &pd_dma);
726b8548 816 if (pd == NULL) {
83548fe2
QT		 817 ql_log(ql_log_warn, vha, 0xd043,
818 "Failed to allocate port database structure.\n");
726b8548
QT		 819 goto done_free_sp;
820 }
726b8548 821
726b8548
QT		 822 mb = sp->u.iocb_cmd.u.mbx.out_mb;
823 mb[0] = MBC_GET_PORT_DATABASE;
824 mb[1] = fcport->loop_id;
825 mb[2] = MSW(pd_dma);
826 mb[3] = LSW(pd_dma);
827 mb[6] = MSW(MSD(pd_dma));
828 mb[7] = LSW(MSD(pd_dma));
829 mb[9] = vha->vp_idx;
830 mb[10] = opt;
831
832 mbx = &sp->u.iocb_cmd;
833 mbx->timeout = qla2x00_async_iocb_timeout;
834 mbx->u.mbx.in = (void *)pd;
835 mbx->u.mbx.in_dma = pd_dma;
836
837 sp->done = qla24xx_async_gpdb_sp_done;
838
839 rval = qla2x00_start_sp(sp);
840 if (rval != QLA_SUCCESS)
841 goto done_free_sp;
842
83548fe2
QT		 843 ql_dbg(ql_dbg_disc, vha, 0x20dc,
844 "Async-%s %8phC hndl %x opt %x\n",
845 sp->name, fcport->port_name, sp->handle, opt);
726b8548
QT		 846
847 return rval;
848
849done_free_sp:
850 if (pd)
851 dma_pool_free(ha->s_dma_pool, pd, pd_dma);
852
25ff6af1 853 sp->free(sp);
726b8548
QT		 854done:
855 fcport->flags &= ~FCF_ASYNC_SENT;
856 qla24xx_post_gpdb_work(vha, fcport, opt);
5ff1d584
AV		 857 return rval;
858}
859
726b8548
QT		 860static
861void qla24xx_handle_gpdb_event(scsi_qla_host_t *vha, struct event_arg *ea)
862{
863 int rval = ea->rc;
864 fc_port_t *fcport = ea->fcport;
865 unsigned long flags;
414d9ff3 866 u16 opt = ea->sp->u.iocb_cmd.u.mbx.out_mb[10];
726b8548
QT		 867
868 fcport->flags &= ~FCF_ASYNC_SENT;
869
83548fe2 870 ql_dbg(ql_dbg_disc, vha, 0x20d2,
726b8548
QT		 871 "%s %8phC DS %d LS %d rval %d\n", __func__, fcport->port_name,
872 fcport->disc_state, fcport->fw_login_state, rval);
873
874 if (ea->sp->gen2 != fcport->login_gen) {
875 /* target side must have changed it. */
83548fe2 876 ql_dbg(ql_dbg_disc, vha, 0x20d3,
726b8548
QT		 877 "%s %8phC generation changed rscn %d|%d login %d|%d \n",
878 __func__, fcport->port_name, fcport->last_rscn_gen,
879 fcport->rscn_gen, fcport->last_login_gen,
880 fcport->login_gen);
881 return;
882 } else if (ea->sp->gen1 != fcport->rscn_gen) {
83548fe2 883 ql_dbg(ql_dbg_disc, vha, 0x20d4, "%s %d %8phC post gidpn\n",
726b8548
QT		 884 __func__, __LINE__, fcport->port_name);
885 qla24xx_post_gidpn_work(vha, fcport);
886 return;
887 }
888
889 if (rval != QLA_SUCCESS) {
83548fe2 890 ql_dbg(ql_dbg_disc, vha, 0x20d5, "%s %d %8phC post del sess\n",
726b8548
QT		 891 __func__, __LINE__, fcport->port_name);
892 qlt_schedule_sess_for_deletion_lock(fcport);
893 return;
894 }
895
896 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
414d9ff3
QT		 897 if (opt != PDO_FORCE_ADISC)
898 ea->fcport->login_gen++;
726b8548
QT		 899 ea->fcport->deleted = 0;
900 ea->fcport->logout_on_delete = 1;
901
902 if (!ea->fcport->login_succ && !IS_SW_RESV_ADDR(ea->fcport->d_id)) {
903 vha->fcport_count++;
904 ea->fcport->login_succ = 1;
905
906 if (!IS_IIDMA_CAPABLE(vha->hw) ||
907 !vha->hw->flags.gpsc_supported) {
83548fe2 908 ql_dbg(ql_dbg_disc, vha, 0x20d6,
726b8548
QT		 909 "%s %d %8phC post upd_fcport fcp_cnt %d\n",
910 __func__, __LINE__, fcport->port_name,
911 vha->fcport_count);
912
913 qla24xx_post_upd_fcport_work(vha, fcport);
914 } else {
83548fe2 915 ql_dbg(ql_dbg_disc, vha, 0x20d7,
726b8548
QT		 916 "%s %d %8phC post gpsc fcp_cnt %d\n",
917 __func__, __LINE__, fcport->port_name,
918 vha->fcport_count);
919
920 qla24xx_post_gpsc_work(vha, fcport);
921 }
414d9ff3
QT		 922 } else if (ea->fcport->login_succ) {
923 /*
924 * We have an existing session. A late RSCN delivery
925 * must have triggered the session to be re-validate.
926 * session is still valid.
927 */
5ef696aa
QT		 928 ql_dbg(ql_dbg_disc, vha, 0x20d6,
929 "%s %d %8phC session revalidate success\n",
930 __func__, __LINE__, fcport->port_name);
414d9ff3 931 fcport->disc_state = DSC_LOGIN_COMPLETE;
726b8548
QT		 932 }
933 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
934} /* gpdb event */
935
936int qla24xx_fcport_handle_login(struct scsi_qla_host *vha, fc_port_t *fcport)
937{
938 if (fcport->login_retry == 0)
939 return 0;
940
941 if (fcport->scan_state != QLA_FCPORT_FOUND)
942 return 0;
943
83548fe2 944 ql_dbg(ql_dbg_disc, vha, 0x20d8,
726b8548
QT		 945 "%s %8phC DS %d LS %d P %d fl %x confl %p rscn %d|%d login %d|%d retry %d lid %d\n",
946 __func__, fcport->port_name, fcport->disc_state,
947 fcport->fw_login_state, fcport->login_pause, fcport->flags,
948 fcport->conflict, fcport->last_rscn_gen, fcport->rscn_gen,
949 fcport->last_login_gen, fcport->login_gen, fcport->login_retry,
950 fcport->loop_id);
951
952 fcport->login_retry--;
953
954 if ((fcport->fw_login_state == DSC_LS_PLOGI_PEND) ||
726b8548
QT		 955 (fcport->fw_login_state == DSC_LS_PRLI_PEND))
956 return 0;
957
5b33469a
QT		 958 if (fcport->fw_login_state == DSC_LS_PLOGI_COMP) {
959 if (time_before_eq(jiffies, fcport->plogi_nack_done_deadline))
960 return 0;
961 }
962
726b8548
QT		 963 /* for pure Target Mode. Login will not be initiated */
964 if (vha->host->active_mode == MODE_TARGET)
965 return 0;
966
967 if (fcport->flags & FCF_ASYNC_SENT) {
968 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
969 return 0;
970 }
971
972 switch (fcport->disc_state) {
973 case DSC_DELETED:
974 if (fcport->loop_id == FC_NO_LOOP_ID) {
83548fe2
QT		 975 ql_dbg(ql_dbg_disc, vha, 0x20bd,
976 "%s %d %8phC post gnl\n",
977 __func__, __LINE__, fcport->port_name);
5d3300a9 978 qla24xx_post_gnl_work(vha, fcport);
726b8548 979 } else {
83548fe2
QT		 980 ql_dbg(ql_dbg_disc, vha, 0x20bf,
981 "%s %d %8phC post login\n",
982 __func__, __LINE__, fcport->port_name);
726b8548
QT		 983 fcport->disc_state = DSC_LOGIN_PEND;
984 qla2x00_post_async_login_work(vha, fcport, NULL);
985 }
986 break;
987
988 case DSC_GNL:
989 if (fcport->login_pause) {
990 fcport->last_rscn_gen = fcport->rscn_gen;
991 fcport->last_login_gen = fcport->login_gen;
992 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
993 break;
994 }
995
996 if (fcport->flags & FCF_FCP2_DEVICE) {
997 u8 opt = PDO_FORCE_ADISC;
998
83548fe2
QT		 999 ql_dbg(ql_dbg_disc, vha, 0x20c9,
1000 "%s %d %8phC post gpdb\n",
1001 __func__, __LINE__, fcport->port_name);
726b8548
QT		 1002
1003 fcport->disc_state = DSC_GPDB;
1004 qla24xx_post_gpdb_work(vha, fcport, opt);
1005 } else {
83548fe2
QT		 1006 ql_dbg(ql_dbg_disc, vha, 0x20cf,
1007 "%s %d %8phC post login\n",
1008 __func__, __LINE__, fcport->port_name);
726b8548
QT		 1009 fcport->disc_state = DSC_LOGIN_PEND;
1010 qla2x00_post_async_login_work(vha, fcport, NULL);
1011 }
1012
1013 break;
1014
1015 case DSC_LOGIN_FAILED:
83548fe2
QT		 1016 ql_dbg(ql_dbg_disc, vha, 0x20d0,
1017 "%s %d %8phC post gidpn\n",
1018 __func__, __LINE__, fcport->port_name);
726b8548
QT		 1019
1020 qla24xx_post_gidpn_work(vha, fcport);
1021 break;
1022
1023 case DSC_LOGIN_COMPLETE:
1024 /* recheck login state */
83548fe2
QT		 1025 ql_dbg(ql_dbg_disc, vha, 0x20d1,
1026 "%s %d %8phC post gpdb\n",
1027 __func__, __LINE__, fcport->port_name);
726b8548
QT		 1028
1029 qla24xx_post_gpdb_work(vha, fcport, PDO_FORCE_ADISC);
1030 break;
1031
1032 default:
1033 break;
1034 }
1035
1036 return 0;
1037}
1038
1039static
1040void qla24xx_handle_rscn_event(fc_port_t *fcport, struct event_arg *ea)
1041{
1042 fcport->rscn_gen++;
1043
83548fe2
QT		 1044 ql_dbg(ql_dbg_disc, fcport->vha, 0x210c,
1045 "%s %8phC DS %d LS %d\n",
1046 __func__, fcport->port_name, fcport->disc_state,
1047 fcport->fw_login_state);
726b8548
QT		 1048
1049 if (fcport->flags & FCF_ASYNC_SENT)
1050 return;
1051
1052 switch (fcport->disc_state) {
1053 case DSC_DELETED:
1054 case DSC_LOGIN_COMPLETE:
5ef696aa 1055 qla24xx_post_gpnid_work(fcport->vha, &ea->id);
726b8548 1056 break;
726b8548
QT		 1057 default:
1058 break;
1059 }
1060}
1061
1062int qla24xx_post_newsess_work(struct scsi_qla_host *vha, port_id_t *id,
1063 u8 *port_name, void *pla)
1064{
1065 struct qla_work_evt *e;
1066 e = qla2x00_alloc_work(vha, QLA_EVT_NEW_SESS);
1067 if (!e)
1068 return QLA_FUNCTION_FAILED;
1069
1070 e->u.new_sess.id = *id;
1071 e->u.new_sess.pla = pla;
1072 memcpy(e->u.new_sess.port_name, port_name, WWN_SIZE);
1073
1074 return qla2x00_post_work(vha, e);
1075}
1076
1077static
1078int qla24xx_handle_delete_done_event(scsi_qla_host_t *vha,
1079 struct event_arg *ea)
1080{
1081 fc_port_t *fcport = ea->fcport;
1082
1083 if (test_bit(UNLOADING, &vha->dpc_flags))
1084 return 0;
1085
1086 switch (vha->host->active_mode) {
1087 case MODE_INITIATOR:
1088 case MODE_DUAL:
1089 if (fcport->scan_state == QLA_FCPORT_FOUND)
1090 qla24xx_fcport_handle_login(vha, fcport);
1091 break;
1092
1093 case MODE_TARGET:
1094 default:
1095 /* no-op */
1096 break;
1097 }
1098
1099 return 0;
1100}
1101
1102static
1103void qla24xx_handle_relogin_event(scsi_qla_host_t *vha,
1104 struct event_arg *ea)
1105{
1106 fc_port_t *fcport = ea->fcport;
1107
1108 if (fcport->scan_state != QLA_FCPORT_FOUND) {
1109 fcport->login_retry++;
1110 return;
1111 }
1112
83548fe2
QT		 1113 ql_dbg(ql_dbg_disc, vha, 0x2102,
1114 "%s %8phC DS %d LS %d P %d del %d cnfl %p rscn %d|%d login %d|%d fl %x\n",
1115 __func__, fcport->port_name, fcport->disc_state,
1116 fcport->fw_login_state, fcport->login_pause,
1117 fcport->deleted, fcport->conflict,
1118 fcport->last_rscn_gen, fcport->rscn_gen,
1119 fcport->last_login_gen, fcport->login_gen,
1120 fcport->flags);
726b8548
QT		 1121
1122 if ((fcport->fw_login_state == DSC_LS_PLOGI_PEND) ||
726b8548
QT		 1123 (fcport->fw_login_state == DSC_LS_PRLI_PEND))
1124 return;
1125
5b33469a
QT		 1126 if (fcport->fw_login_state == DSC_LS_PLOGI_COMP) {
1127 if (time_before_eq(jiffies, fcport->plogi_nack_done_deadline))
1128 return;
1129 }
1130
726b8548
QT		 1131 if (fcport->flags & FCF_ASYNC_SENT) {
1132 fcport->login_retry++;
1133 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
1134 return;
1135 }
1136
1137 if (fcport->disc_state == DSC_DELETE_PEND) {
1138 fcport->login_retry++;
1139 return;
1140 }
1141
1142 if (fcport->last_rscn_gen != fcport->rscn_gen) {
83548fe2 1143 ql_dbg(ql_dbg_disc, vha, 0x20e9, "%s %d %8phC post gidpn\n",
726b8548
QT		 1144 __func__, __LINE__, fcport->port_name);
1145
5d3300a9 1146 qla24xx_post_gidpn_work(vha, fcport);
726b8548
QT		 1147 return;
1148 }
1149
1150 qla24xx_fcport_handle_login(vha, fcport);
1151}
1152
41dc529a 1153void qla2x00_fcport_event_handler(scsi_qla_host_t *vha, struct event_arg *ea)
726b8548 1154{
41dc529a
QT		 1155 fc_port_t *fcport, *f, *tf;
1156 uint32_t id = 0, mask, rid;
726b8548
QT		 1157 int rc;
1158
b98ae0d7
QT		 1159 switch (ea->event) {
1160 case FCME_RELOGIN:
1161 case FCME_RSCN:
1162 case FCME_GIDPN_DONE:
1163 case FCME_GPSC_DONE:
1164 case FCME_GPNID_DONE:
1165 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags) ||
1166 test_bit(LOOP_RESYNC_ACTIVE, &vha->dpc_flags))
1167 return;
1168 break;
1169 default:
1170 break;
1171 }
1172
726b8548
QT		 1173 switch (ea->event) {
1174 case FCME_RELOGIN:
1175 if (test_bit(UNLOADING, &vha->dpc_flags))
1176 return;
5ff1d584 1177
726b8548
QT		 1178 qla24xx_handle_relogin_event(vha, ea);
1179 break;
1180 case FCME_RSCN:
1181 if (test_bit(UNLOADING, &vha->dpc_flags))
1182 return;
41dc529a
QT		 1183 switch (ea->id.b.rsvd_1) {
1184 case RSCN_PORT_ADDR:
1185 fcport = qla2x00_find_fcport_by_nportid(vha, &ea->id, 1);
1186 if (!fcport) {
1187 /* cable moved */
1188 rc = qla24xx_post_gpnid_work(vha, &ea->id);
1189 if (rc) {
83548fe2
QT		 1190 ql_log(ql_log_warn, vha, 0xd044,
1191 "RSCN GPNID work failed %02x%02x%02x\n",
1192 ea->id.b.domain, ea->id.b.area,
1193 ea->id.b.al_pa);
41dc529a
QT		 1194 }
1195 } else {
1196 ea->fcport = fcport;
1197 qla24xx_handle_rscn_event(fcport, ea);
1198 }
1199 break;
1200 case RSCN_AREA_ADDR:
1201 case RSCN_DOM_ADDR:
1202 if (ea->id.b.rsvd_1 == RSCN_AREA_ADDR) {
1203 mask = 0xffff00;
83548fe2
QT		 1204 ql_dbg(ql_dbg_async, vha, 0x5044,
1205 "RSCN: Area 0x%06x was affected\n",
1206 ea->id.b24);
41dc529a
QT		 1207 } else {
1208 mask = 0xff0000;
83548fe2
QT		 1209 ql_dbg(ql_dbg_async, vha, 0x507a,
1210 "RSCN: Domain 0x%06x was affected\n",
1211 ea->id.b24);
41dc529a 1212 }
726b8548 1213
41dc529a
QT		 1214 rid = ea->id.b24 & mask;
1215 list_for_each_entry_safe(f, tf, &vha->vp_fcports,
1216 list) {
1217 id = f->d_id.b24 & mask;
1218 if (rid == id) {
1219 ea->fcport = f;
1220 qla24xx_handle_rscn_event(f, ea);
1221 }
726b8548 1222 }
41dc529a
QT		 1223 break;
1224 case RSCN_FAB_ADDR:
1225 default:
83548fe2
QT		 1226 ql_log(ql_log_warn, vha, 0xd045,
1227 "RSCN: Fabric was affected. Addr format %d\n",
1228 ea->id.b.rsvd_1);
41dc529a
QT		 1229 qla2x00_mark_all_devices_lost(vha, 1);
1230 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
1231 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
726b8548
QT		 1232 }
1233 break;
1234 case FCME_GIDPN_DONE:
1235 qla24xx_handle_gidpn_event(vha, ea);
1236 break;
1237 case FCME_GNL_DONE:
1238 qla24xx_handle_gnl_done_event(vha, ea);
1239 break;
1240 case FCME_GPSC_DONE:
1241 qla24xx_post_upd_fcport_work(vha, ea->fcport);
1242 break;
1243 case FCME_PLOGI_DONE: /* Initiator side sent LLIOCB */
1244 qla24xx_handle_plogi_done_event(vha, ea);
1245 break;
a5d42f4c
DG		 1246 case FCME_PRLI_DONE:
1247 qla24xx_handle_prli_done_event(vha, ea);
1248 break;
726b8548
QT		 1249 case FCME_GPDB_DONE:
1250 qla24xx_handle_gpdb_event(vha, ea);
1251 break;
1252 case FCME_GPNID_DONE:
1253 qla24xx_handle_gpnid_event(vha, ea);
1254 break;
d3bae931
DG		 1255 case FCME_GFFID_DONE:
1256 qla24xx_handle_gffid_event(vha, ea);
1257 break;
726b8548
QT		 1258 case FCME_DELETE_DONE:
1259 qla24xx_handle_delete_done_event(vha, ea);
1260 break;
1261 default:
1262 BUG_ON(1);
1263 break;
1264 }
5ff1d584
AV		 1265}
1266
3822263e 1267static void
faef62d1 1268qla2x00_tmf_iocb_timeout(void *data)
3822263e 1269{
25ff6af1 1270 srb_t *sp = data;
faef62d1 1271 struct srb_iocb *tmf = &sp->u.iocb_cmd;
3822263e 1272
faef62d1
AB		 1273 tmf->u.tmf.comp_status = CS_TIMEOUT;
1274 complete(&tmf->u.tmf.comp);
1275}
9ba56b95 1276
faef62d1 1277static void
25ff6af1 1278qla2x00_tmf_sp_done(void *ptr, int res)
faef62d1 1279{
25ff6af1 1280 srb_t *sp = ptr;
faef62d1 1281 struct srb_iocb *tmf = &sp->u.iocb_cmd;
25ff6af1 1282
faef62d1 1283 complete(&tmf->u.tmf.comp);
3822263e
MI		 1284}
1285
1286int
faef62d1 1287qla2x00_async_tm_cmd(fc_port_t *fcport, uint32_t flags, uint32_t lun,
3822263e
MI		 1288 uint32_t tag)
1289{
1290 struct scsi_qla_host *vha = fcport->vha;
faef62d1 1291 struct srb_iocb *tm_iocb;
3822263e 1292 srb_t *sp;
faef62d1 1293 int rval = QLA_FUNCTION_FAILED;
3822263e 1294
9ba56b95 1295 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
3822263e
MI		 1296 if (!sp)
1297 goto done;
1298
faef62d1 1299 tm_iocb = &sp->u.iocb_cmd;
9ba56b95
GM		 1300 sp->type = SRB_TM_CMD;
1301 sp->name = "tmf";
faef62d1
AB		 1302 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha));
1303 tm_iocb->u.tmf.flags = flags;
1304 tm_iocb->u.tmf.lun = lun;
1305 tm_iocb->u.tmf.data = tag;
1306 sp->done = qla2x00_tmf_sp_done;
1307 tm_iocb->timeout = qla2x00_tmf_iocb_timeout;
1308 init_completion(&tm_iocb->u.tmf.comp);
3822263e
MI		 1309
1310 rval = qla2x00_start_sp(sp);
1311 if (rval != QLA_SUCCESS)
1312 goto done_free_sp;
1313
7c3df132 1314 ql_dbg(ql_dbg_taskm, vha, 0x802f,
cfb0919c
CD		 1315 "Async-tmf hdl=%x loop-id=%x portid=%02x%02x%02x.\n",
1316 sp->handle, fcport->loop_id, fcport->d_id.b.domain,
1317 fcport->d_id.b.area, fcport->d_id.b.al_pa);
faef62d1
AB		 1318
1319 wait_for_completion(&tm_iocb->u.tmf.comp);
1320
1321 rval = tm_iocb->u.tmf.comp_status == CS_COMPLETE ?
1322 QLA_SUCCESS : QLA_FUNCTION_FAILED;
1323
1324 if ((rval != QLA_SUCCESS) || tm_iocb->u.tmf.data) {
1325 ql_dbg(ql_dbg_taskm, vha, 0x8030,
1326 "TM IOCB failed (%x).\n", rval);
1327 }
1328
1329 if (!test_bit(UNLOADING, &vha->dpc_flags) && !IS_QLAFX00(vha->hw)) {
1330 flags = tm_iocb->u.tmf.flags;
1331 lun = (uint16_t)tm_iocb->u.tmf.lun;
1332
1333 /* Issue Marker IOCB */
1334 qla2x00_marker(vha, vha->hw->req_q_map[0],
1335 vha->hw->rsp_q_map[0], sp->fcport->loop_id, lun,
1336 flags == TCF_LUN_RESET ? MK_SYNC_ID_LUN : MK_SYNC_ID);
1337 }
3822263e
MI		 1338
1339done_free_sp:
25ff6af1 1340 sp->free(sp);
3822263e
MI		 1341done:
1342 return rval;
1343}
1344
4440e46d
AB		 1345static void
1346qla24xx_abort_iocb_timeout(void *data)
1347{
25ff6af1 1348 srb_t *sp = data;
4440e46d
AB		 1349 struct srb_iocb *abt = &sp->u.iocb_cmd;
1350
1351 abt->u.abt.comp_status = CS_TIMEOUT;
1352 complete(&abt->u.abt.comp);
1353}
1354
1355static void
25ff6af1 1356qla24xx_abort_sp_done(void *ptr, int res)
4440e46d 1357{
25ff6af1 1358 srb_t *sp = ptr;
4440e46d
AB		 1359 struct srb_iocb *abt = &sp->u.iocb_cmd;
1360
1361 complete(&abt->u.abt.comp);
1362}
1363
15f30a57 1364int
4440e46d
AB		 1365qla24xx_async_abort_cmd(srb_t *cmd_sp)
1366{
25ff6af1 1367 scsi_qla_host_t *vha = cmd_sp->vha;
4440e46d
AB		 1368 fc_port_t *fcport = cmd_sp->fcport;
1369 struct srb_iocb *abt_iocb;
1370 srb_t *sp;
1371 int rval = QLA_FUNCTION_FAILED;
1372
1373 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL);
1374 if (!sp)
1375 goto done;
1376
1377 abt_iocb = &sp->u.iocb_cmd;
1378 sp->type = SRB_ABT_CMD;
1379 sp->name = "abort";
1380 qla2x00_init_timer(sp, qla2x00_get_async_timeout(vha));
1381 abt_iocb->u.abt.cmd_hndl = cmd_sp->handle;
1382 sp->done = qla24xx_abort_sp_done;
1383 abt_iocb->timeout = qla24xx_abort_iocb_timeout;
1384 init_completion(&abt_iocb->u.abt.comp);
1385
1386 rval = qla2x00_start_sp(sp);
1387 if (rval != QLA_SUCCESS)
1388 goto done_free_sp;
1389
1390 ql_dbg(ql_dbg_async, vha, 0x507c,
1391 "Abort command issued - hdl=%x, target_id=%x\n",
1392 cmd_sp->handle, fcport->tgt_id);
1393
1394 wait_for_completion(&abt_iocb->u.abt.comp);
1395
1396 rval = abt_iocb->u.abt.comp_status == CS_COMPLETE ?
1397 QLA_SUCCESS : QLA_FUNCTION_FAILED;
1398
1399done_free_sp:
25ff6af1 1400 sp->free(sp);
4440e46d
AB		 1401done:
1402 return rval;
1403}
1404
1405int
1406qla24xx_async_abort_command(srb_t *sp)
1407{
1408 unsigned long flags = 0;
1409
1410 uint32_t handle;
1411 fc_port_t *fcport = sp->fcport;
1412 struct scsi_qla_host *vha = fcport->vha;
1413 struct qla_hw_data *ha = vha->hw;
1414 struct req_que *req = vha->req;
1415
1416 spin_lock_irqsave(&ha->hardware_lock, flags);
1417 for (handle = 1; handle < req->num_outstanding_cmds; handle++) {
1418 if (req->outstanding_cmds[handle] == sp)
1419 break;
1420 }
1421 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1422 if (handle == req->num_outstanding_cmds) {
1423 /* Command not found. */
1424 return QLA_FUNCTION_FAILED;
1425 }
1426 if (sp->type == SRB_FXIOCB_DCMD)
1427 return qlafx00_fx_disc(vha, &vha->hw->mr.fcport,
1428 FXDISC_ABORT_IOCTL);
1429
1430 return qla24xx_async_abort_cmd(sp);
1431}
1432
a5d42f4c
DG		 1433static void
1434qla24xx_handle_prli_done_event(struct scsi_qla_host *vha, struct event_arg *ea)
1435{
1436 switch (ea->data[0]) {
1437 case MBS_COMMAND_COMPLETE:
1438 ql_dbg(ql_dbg_disc, vha, 0x2118,
1439 "%s %d %8phC post gpdb\n",
1440 __func__, __LINE__, ea->fcport->port_name);
1441
1442 ea->fcport->chip_reset = vha->hw->base_qpair->chip_reset;
1443 ea->fcport->logout_on_delete = 1;
1444 qla24xx_post_gpdb_work(vha, ea->fcport, 0);
1445 break;
1446 default:
edd05de1
DG		 1447 if (ea->fcport->n2n_flag) {
1448 ql_dbg(ql_dbg_disc, vha, 0x2118,
1449 "%s %d %8phC post fc4 prli\n",
1450 __func__, __LINE__, ea->fcport->port_name);
1451 ea->fcport->fc4f_nvme = 0;
1452 ea->fcport->n2n_flag = 0;
1453 qla24xx_post_prli_work(vha, ea->fcport);
1454 }
a5d42f4c
DG		 1455 ql_dbg(ql_dbg_disc, vha, 0x2119,
1456 "%s %d %8phC unhandle event of %x\n",
1457 __func__, __LINE__, ea->fcport->port_name, ea->data[0]);
1458 break;
1459 }
1460}
1461
726b8548
QT		 1462static void
1463qla24xx_handle_plogi_done_event(struct scsi_qla_host *vha, struct event_arg *ea)
ac280b67 1464{
726b8548 1465 port_id_t cid; /* conflict Nport id */
a084fd68
QT		 1466 u16 lid;
1467 struct fc_port *conflict_fcport;
ac280b67 1468
726b8548 1469 switch (ea->data[0]) {
ac280b67 1470 case MBS_COMMAND_COMPLETE:
a4f92a32
AV		 1471 /*
1472 * Driver must validate login state - If PRLI not complete,
1473 * force a relogin attempt via implicit LOGO, PLOGI, and PRLI
1474 * requests.
1475 */
a5d42f4c
DG		 1476 if (ea->fcport->fc4f_nvme) {
1477 ql_dbg(ql_dbg_disc, vha, 0x2117,
1478 "%s %d %8phC post prli\n",
1479 __func__, __LINE__, ea->fcport->port_name);
1480 qla24xx_post_prli_work(vha, ea->fcport);
1481 } else {
1482 ql_dbg(ql_dbg_disc, vha, 0x20ea,
a084fd68
QT		 1483 "%s %d %8phC LoopID 0x%x in use with %06x. post gnl\n",
1484 __func__, __LINE__, ea->fcport->port_name,
1485 ea->fcport->loop_id, ea->fcport->d_id.b24);
1486
1487 set_bit(ea->fcport->loop_id, vha->hw->loop_id_map);
1488 ea->fcport->loop_id = FC_NO_LOOP_ID;
a5d42f4c
DG		 1489 ea->fcport->chip_reset = vha->hw->base_qpair->chip_reset;
1490 ea->fcport->logout_on_delete = 1;
3515832c 1491 ea->fcport->send_els_logo = 0;
a5d42f4c
DG		 1492 qla24xx_post_gpdb_work(vha, ea->fcport, 0);
1493 }
ac280b67
AV		 1494 break;
1495 case MBS_COMMAND_ERROR:
83548fe2 1496 ql_dbg(ql_dbg_disc, vha, 0x20eb, "%s %d %8phC cmd error %x\n",
726b8548
QT		 1497 __func__, __LINE__, ea->fcport->port_name, ea->data[1]);
1498
1499 ea->fcport->flags &= ~FCF_ASYNC_SENT;
1500 ea->fcport->disc_state = DSC_LOGIN_FAILED;
1501 if (ea->data[1] & QLA_LOGIO_LOGIN_RETRIED)
ac280b67
AV		 1502 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
1503 else
726b8548 1504 qla2x00_mark_device_lost(vha, ea->fcport, 1, 0);
ac280b67
AV		 1505 break;
1506 case MBS_LOOP_ID_USED:
726b8548
QT		 1507 /* data[1] = IO PARAM 1 = nport ID */
1508 cid.b.domain = (ea->iop[1] >> 16) & 0xff;
1509 cid.b.area = (ea->iop[1] >> 8) & 0xff;
1510 cid.b.al_pa = ea->iop[1] & 0xff;
1511 cid.b.rsvd_1 = 0;
1512
83548fe2
QT		 1513 ql_dbg(ql_dbg_disc, vha, 0x20ec,
1514 "%s %d %8phC LoopID 0x%x in use post gnl\n",
1515 __func__, __LINE__, ea->fcport->port_name,
1516 ea->fcport->loop_id);
726b8548
QT		 1517
1518 if (IS_SW_RESV_ADDR(cid)) {
1519 set_bit(ea->fcport->loop_id, vha->hw->loop_id_map);
1520 ea->fcport->loop_id = FC_NO_LOOP_ID;
1521 } else {
1522 qla2x00_clear_loop_id(ea->fcport);
ac280b67 1523 }
726b8548
QT		 1524 qla24xx_post_gnl_work(vha, ea->fcport);
1525 break;
1526 case MBS_PORT_ID_USED:
83548fe2
QT		 1527 ql_dbg(ql_dbg_disc, vha, 0x20ed,
1528 "%s %d %8phC NPortId %02x%02x%02x inuse post gidpn\n",
1529 __func__, __LINE__, ea->fcport->port_name,
1530 ea->fcport->d_id.b.domain, ea->fcport->d_id.b.area,
1531 ea->fcport->d_id.b.al_pa);
726b8548 1532
a084fd68
QT		 1533 lid = ea->iop[1] & 0xffff;
1534 qlt_find_sess_invalidate_other(vha,
1535 wwn_to_u64(ea->fcport->port_name),
1536 ea->fcport->d_id, lid, &conflict_fcport);
1537
1538 if (conflict_fcport) {
1539 /*
1540 * Another fcport share the same loop_id/nport id.
1541 * Conflict fcport needs to finish cleanup before this
1542 * fcport can proceed to login.
1543 */
1544 conflict_fcport->conflict = ea->fcport;
1545 ea->fcport->login_pause = 1;
1546
1547 ql_dbg(ql_dbg_disc, vha, 0x20ed,
1548 "%s %d %8phC NPortId %06x inuse with loopid 0x%x. post gidpn\n",
1549 __func__, __LINE__, ea->fcport->port_name,
1550 ea->fcport->d_id.b24, lid);
1551 qla2x00_clear_loop_id(ea->fcport);
1552 qla24xx_post_gidpn_work(vha, ea->fcport);
1553 } else {
1554 ql_dbg(ql_dbg_disc, vha, 0x20ed,
1555 "%s %d %8phC NPortId %06x inuse with loopid 0x%x. sched delete\n",
1556 __func__, __LINE__, ea->fcport->port_name,
1557 ea->fcport->d_id.b24, lid);
1558
1559 qla2x00_clear_loop_id(ea->fcport);
1560 set_bit(lid, vha->hw->loop_id_map);
1561 ea->fcport->loop_id = lid;
1562 ea->fcport->keep_nport_handle = 0;
1563 qlt_schedule_sess_for_deletion(ea->fcport, false);
1564 }
ac280b67
AV		 1565 break;
1566 }
4916392b 1567 return;
ac280b67
AV		 1568}
1569
4916392b 1570void
ac280b67
AV		 1571qla2x00_async_logout_done(struct scsi_qla_host *vha, fc_port_t *fcport,
1572 uint16_t *data)
1573{
726b8548 1574 qla2x00_mark_device_lost(vha, fcport, 1, 0);
a6ca8878 1575 qlt_logo_completion_handler(fcport, data[0]);
726b8548 1576 fcport->login_gen++;
4916392b 1577 return;
ac280b67
AV		 1578}
1579
4916392b 1580void
5ff1d584
AV		 1581qla2x00_async_adisc_done(struct scsi_qla_host *vha, fc_port_t *fcport,
1582 uint16_t *data)
1583{
1584 if (data[0] == MBS_COMMAND_COMPLETE) {
1585 qla2x00_update_fcport(vha, fcport);
1586
4916392b 1587 return;
5ff1d584
AV		 1588 }
1589
1590 /* Retry login. */
1591 fcport->flags &= ~FCF_ASYNC_SENT;
1592 if (data[1] & QLA_LOGIO_LOGIN_RETRIED)
1593 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
1594 else
80d79440 1595 qla2x00_mark_device_lost(vha, fcport, 1, 0);
5ff1d584 1596
4916392b 1597 return;
5ff1d584
AV		 1598}
1599
1da177e4
LT		 1600/****************************************************************************/
1601/* QLogic ISP2x00 Hardware Support Functions. */
1602/****************************************************************************/
1603
fa492630 1604static int
7d613ac6
SV		 1605qla83xx_nic_core_fw_load(scsi_qla_host_t *vha)
1606{
1607 int rval = QLA_SUCCESS;
1608 struct qla_hw_data *ha = vha->hw;
1609 uint32_t idc_major_ver, idc_minor_ver;
711aa7f7 1610 uint16_t config[4];
7d613ac6
SV		 1611
1612 qla83xx_idc_lock(vha, 0);
1613
1614 /* SV: TODO: Assign initialization timeout from
1615 * flash-info / other param
1616 */
1617 ha->fcoe_dev_init_timeout = QLA83XX_IDC_INITIALIZATION_TIMEOUT;
1618 ha->fcoe_reset_timeout = QLA83XX_IDC_RESET_ACK_TIMEOUT;
1619
1620 /* Set our fcoe function presence */
1621 if (__qla83xx_set_drv_presence(vha) != QLA_SUCCESS) {
1622 ql_dbg(ql_dbg_p3p, vha, 0xb077,
1623 "Error while setting DRV-Presence.\n");
1624 rval = QLA_FUNCTION_FAILED;
1625 goto exit;
1626 }
1627
1628 /* Decide the reset ownership */
1629 qla83xx_reset_ownership(vha);
1630
1631 /*
1632 * On first protocol driver load:
1633 * Init-Owner: Set IDC-Major-Version and Clear IDC-Lock-Recovery
1634 * register.
1635 * Others: Check compatibility with current IDC Major version.
1636 */
1637 qla83xx_rd_reg(vha, QLA83XX_IDC_MAJOR_VERSION, &idc_major_ver);
1638 if (ha->flags.nic_core_reset_owner) {
1639 /* Set IDC Major version */
1640 idc_major_ver = QLA83XX_SUPP_IDC_MAJOR_VERSION;
1641 qla83xx_wr_reg(vha, QLA83XX_IDC_MAJOR_VERSION, idc_major_ver);
1642
1643 /* Clearing IDC-Lock-Recovery register */
1644 qla83xx_wr_reg(vha, QLA83XX_IDC_LOCK_RECOVERY, 0);
1645 } else if (idc_major_ver != QLA83XX_SUPP_IDC_MAJOR_VERSION) {
1646 /*
1647 * Clear further IDC participation if we are not compatible with
1648 * the current IDC Major Version.
1649 */
1650 ql_log(ql_log_warn, vha, 0xb07d,
1651 "Failing load, idc_major_ver=%d, expected_major_ver=%d.\n",
1652 idc_major_ver, QLA83XX_SUPP_IDC_MAJOR_VERSION);
1653 __qla83xx_clear_drv_presence(vha);
1654 rval = QLA_FUNCTION_FAILED;
1655 goto exit;
1656 }
1657 /* Each function sets its supported Minor version. */
1658 qla83xx_rd_reg(vha, QLA83XX_IDC_MINOR_VERSION, &idc_minor_ver);
1659 idc_minor_ver |= (QLA83XX_SUPP_IDC_MINOR_VERSION << (ha->portnum * 2));
1660 qla83xx_wr_reg(vha, QLA83XX_IDC_MINOR_VERSION, idc_minor_ver);
1661
711aa7f7
SK		 1662 if (ha->flags.nic_core_reset_owner) {
1663 memset(config, 0, sizeof(config));
1664 if (!qla81xx_get_port_config(vha, config))
1665 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE,
1666 QLA8XXX_DEV_READY);
1667 }
1668
7d613ac6
SV		 1669 rval = qla83xx_idc_state_handler(vha);
1670
1671exit:
1672 qla83xx_idc_unlock(vha, 0);
1673
1674 return rval;
1675}
1676
1da177e4
LT		 1677/*
1678* qla2x00_initialize_adapter
1679* Initialize board.
1680*
1681* Input:
1682* ha = adapter block pointer.
1683*
1684* Returns:
1685* 0 = success
1686*/
1687int
e315cd28 1688qla2x00_initialize_adapter(scsi_qla_host_t *vha)
1da177e4
LT		 1689{
1690 int rval;
e315cd28 1691 struct qla_hw_data *ha = vha->hw;
73208dfd 1692 struct req_que *req = ha->req_q_map[0];
2533cf67 1693
fc90adaf
JC		 1694 memset(&vha->qla_stats, 0, sizeof(vha->qla_stats));
1695 memset(&vha->fc_host_stat, 0, sizeof(vha->fc_host_stat));
1696
1da177e4 1697 /* Clear adapter flags. */
e315cd28 1698 vha->flags.online = 0;
2533cf67 1699 ha->flags.chip_reset_done = 0;
e315cd28 1700 vha->flags.reset_active = 0;
85880801
AV		 1701 ha->flags.pci_channel_io_perm_failure = 0;
1702 ha->flags.eeh_busy = 0;
fabbb8df 1703 vha->qla_stats.jiffies_at_last_reset = get_jiffies_64();
e315cd28
AC		 1704 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
1705 atomic_set(&vha->loop_state, LOOP_DOWN);
1706 vha->device_flags = DFLG_NO_CABLE;
1707 vha->dpc_flags = 0;
1708 vha->flags.management_server_logged_in = 0;
1709 vha->marker_needed = 0;
1da177e4
LT		 1710 ha->isp_abort_cnt = 0;
1711 ha->beacon_blink_led = 0;
1712
73208dfd
AC		 1713 set_bit(0, ha->req_qid_map);
1714 set_bit(0, ha->rsp_qid_map);
1715
cfb0919c 1716 ql_dbg(ql_dbg_init, vha, 0x0040,
7c3df132 1717 "Configuring PCI space...\n");
e315cd28 1718 rval = ha->isp_ops->pci_config(vha);
1da177e4 1719 if (rval) {
7c3df132
SK		 1720 ql_log(ql_log_warn, vha, 0x0044,
1721 "Unable to configure PCI space.\n");
1da177e4
LT		 1722 return (rval);
1723 }
1724
e315cd28 1725 ha->isp_ops->reset_chip(vha);
1da177e4 1726
e315cd28 1727 rval = qla2xxx_get_flash_info(vha);
c00d8994 1728 if (rval) {
7c3df132
SK		 1729 ql_log(ql_log_fatal, vha, 0x004f,
1730 "Unable to validate FLASH data.\n");
7ec0effd
AD		 1731 return rval;
1732 }
1733
1734 if (IS_QLA8044(ha)) {
1735 qla8044_read_reset_template(vha);
1736
1737 /* NOTE: If ql2xdontresethba==1, set IDC_CTRL DONTRESET_BIT0.
1738 * If DONRESET_BIT0 is set, drivers should not set dev_state
1739 * to NEED_RESET. But if NEED_RESET is set, drivers should
1740 * should honor the reset. */
1741 if (ql2xdontresethba == 1)
1742 qla8044_set_idc_dontreset(vha);
c00d8994
AV		 1743 }
1744
73208dfd 1745 ha->isp_ops->get_flash_version(vha, req->ring);
cfb0919c 1746 ql_dbg(ql_dbg_init, vha, 0x0061,
7c3df132 1747 "Configure NVRAM parameters...\n");
0107109e 1748
e315cd28 1749 ha->isp_ops->nvram_config(vha);
1da177e4 1750
d4c760c2
AV		 1751 if (ha->flags.disable_serdes) {
1752 /* Mask HBA via NVRAM settings? */
7c3df132 1753 ql_log(ql_log_info, vha, 0x0077,
7b833558 1754 "Masking HBA WWPN %8phN (via NVRAM).\n", vha->port_name);
d4c760c2
AV		 1755 return QLA_FUNCTION_FAILED;
1756 }
1757
cfb0919c 1758 ql_dbg(ql_dbg_init, vha, 0x0078,
7c3df132 1759 "Verifying loaded RISC code...\n");
1da177e4 1760
e315cd28
AC		 1761 if (qla2x00_isp_firmware(vha) != QLA_SUCCESS) {
1762 rval = ha->isp_ops->chip_diag(vha);
d19044c3
AV		 1763 if (rval)
1764 return (rval);
e315cd28 1765 rval = qla2x00_setup_chip(vha);
d19044c3
AV		 1766 if (rval)
1767 return (rval);
1da177e4 1768 }
a9083016 1769
4d4df193 1770 if (IS_QLA84XX(ha)) {
e315cd28 1771 ha->cs84xx = qla84xx_get_chip(vha);
4d4df193 1772 if (!ha->cs84xx) {
7c3df132 1773 ql_log(ql_log_warn, vha, 0x00d0,
4d4df193
HK		 1774 "Unable to configure ISP84XX.\n");
1775 return QLA_FUNCTION_FAILED;
1776 }
1777 }
2d70c103 1778
ead03855 1779 if (qla_ini_mode_enabled(vha) || qla_dual_mode_enabled(vha))
2d70c103
NB		 1780 rval = qla2x00_init_rings(vha);
1781
2533cf67 1782 ha->flags.chip_reset_done = 1;
1da177e4 1783
9a069e19 1784 if (rval == QLA_SUCCESS && IS_QLA84XX(ha)) {
6c452a45 1785 /* Issue verify 84xx FW IOCB to complete 84xx initialization */
9a069e19
GM		 1786 rval = qla84xx_init_chip(vha);
1787 if (rval != QLA_SUCCESS) {
7c3df132
SK		 1788 ql_log(ql_log_warn, vha, 0x00d4,
1789 "Unable to initialize ISP84XX.\n");
8d2b21db 1790 qla84xx_put_chip(vha);
9a069e19
GM		 1791 }
1792 }
1793
7d613ac6
SV		 1794 /* Load the NIC Core f/w if we are the first protocol driver. */
1795 if (IS_QLA8031(ha)) {
1796 rval = qla83xx_nic_core_fw_load(vha);
1797 if (rval)
1798 ql_log(ql_log_warn, vha, 0x0124,
1799 "Error in initializing NIC Core f/w.\n");
1800 }
1801
2f0f3f4f
MI		 1802 if (IS_QLA24XX_TYPE(ha) || IS_QLA25XX(ha))
1803 qla24xx_read_fcp_prio_cfg(vha);
09ff701a 1804
c46e65c7
JC		 1805 if (IS_P3P_TYPE(ha))
1806 qla82xx_set_driver_version(vha, QLA2XXX_VERSION);
1807 else
1808 qla25xx_set_driver_version(vha, QLA2XXX_VERSION);
1809
1da177e4
LT		 1810 return (rval);
1811}
1812
1813/**
abbd8870 1814 * qla2100_pci_config() - Setup ISP21xx PCI configuration registers.
1da177e4
LT		 1815 * @ha: HA context
1816 *
1817 * Returns 0 on success.
1818 */
abbd8870 1819int
e315cd28 1820qla2100_pci_config(scsi_qla_host_t *vha)
1da177e4 1821{
a157b101 1822 uint16_t w;
abbd8870 1823 unsigned long flags;
e315cd28 1824 struct qla_hw_data *ha = vha->hw;
3d71644c 1825 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1da177e4 1826
1da177e4 1827 pci_set_master(ha->pdev);
af6177d8 1828 pci_try_set_mwi(ha->pdev);
1da177e4 1829
1da177e4 1830 pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
a157b101 1831 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
abbd8870
AV		 1832 pci_write_config_word(ha->pdev, PCI_COMMAND, w);
1833
737faece 1834 pci_disable_rom(ha->pdev);
1da177e4
LT		 1835
1836 /* Get PCI bus information. */
1837 spin_lock_irqsave(&ha->hardware_lock, flags);
3d71644c 1838 ha->pci_attr = RD_REG_WORD(&reg->ctrl_status);
1da177e4
LT		 1839 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1840
abbd8870
AV		 1841 return QLA_SUCCESS;
1842}
1da177e4 1843
abbd8870
AV		 1844/**
1845 * qla2300_pci_config() - Setup ISP23xx PCI configuration registers.
1846 * @ha: HA context
1847 *
1848 * Returns 0 on success.
1849 */
1850int
e315cd28 1851qla2300_pci_config(scsi_qla_host_t *vha)
abbd8870 1852{
a157b101 1853 uint16_t w;
abbd8870
AV		 1854 unsigned long flags = 0;
1855 uint32_t cnt;
e315cd28 1856 struct qla_hw_data *ha = vha->hw;
3d71644c 1857 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1da177e4 1858
abbd8870 1859 pci_set_master(ha->pdev);
af6177d8 1860 pci_try_set_mwi(ha->pdev);
1da177e4 1861
abbd8870 1862 pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
a157b101 1863 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
1da177e4 1864
abbd8870
AV		 1865 if (IS_QLA2322(ha) || IS_QLA6322(ha))
1866 w &= ~PCI_COMMAND_INTX_DISABLE;
a157b101 1867 pci_write_config_word(ha->pdev, PCI_COMMAND, w);
1da177e4 1868
abbd8870
AV		 1869 /*
1870 * If this is a 2300 card and not 2312, reset the
1871 * COMMAND_INVALIDATE due to a bug in the 2300. Unfortunately,
1872 * the 2310 also reports itself as a 2300 so we need to get the
1873 * fb revision level -- a 6 indicates it really is a 2300 and
1874 * not a 2310.
1875 */
1876 if (IS_QLA2300(ha)) {
1877 spin_lock_irqsave(&ha->hardware_lock, flags);
1da177e4 1878
abbd8870 1879 /* Pause RISC. */
3d71644c 1880 WRT_REG_WORD(&reg->hccr, HCCR_PAUSE_RISC);
abbd8870 1881 for (cnt = 0; cnt < 30000; cnt++) {
3d71644c 1882 if ((RD_REG_WORD(&reg->hccr) & HCCR_RISC_PAUSE) != 0)
abbd8870 1883 break;
1da177e4 1884
abbd8870
AV		 1885 udelay(10);
1886 }
1da177e4 1887
abbd8870 1888 /* Select FPM registers. */
3d71644c
AV		 1889 WRT_REG_WORD(&reg->ctrl_status, 0x20);
1890 RD_REG_WORD(&reg->ctrl_status);
abbd8870
AV		 1891
1892 /* Get the fb rev level */
3d71644c 1893 ha->fb_rev = RD_FB_CMD_REG(ha, reg);
abbd8870
AV		 1894
1895 if (ha->fb_rev == FPM_2300)
a157b101 1896 pci_clear_mwi(ha->pdev);
abbd8870
AV		 1897
1898 /* Deselect FPM registers. */
3d71644c
AV		 1899 WRT_REG_WORD(&reg->ctrl_status, 0x0);
1900 RD_REG_WORD(&reg->ctrl_status);
abbd8870
AV		 1901
1902 /* Release RISC module. */
3d71644c 1903 WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
abbd8870 1904 for (cnt = 0; cnt < 30000; cnt++) {
3d71644c 1905 if ((RD_REG_WORD(&reg->hccr) & HCCR_RISC_PAUSE) == 0)
abbd8870
AV		 1906 break;
1907
1908 udelay(10);
1da177e4 1909 }
1da177e4 1910
abbd8870
AV		 1911 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1912 }
1da177e4 1913
abbd8870
AV		 1914 pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80);
1915
737faece 1916 pci_disable_rom(ha->pdev);
1da177e4 1917
abbd8870
AV		 1918 /* Get PCI bus information. */
1919 spin_lock_irqsave(&ha->hardware_lock, flags);
3d71644c 1920 ha->pci_attr = RD_REG_WORD(&reg->ctrl_status);
abbd8870
AV		 1921 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1922
1923 return QLA_SUCCESS;
1da177e4
LT		 1924}
1925
0107109e
AV		 1926/**
1927 * qla24xx_pci_config() - Setup ISP24xx PCI configuration registers.
1928 * @ha: HA context
1929 *
1930 * Returns 0 on success.
1931 */
1932int
e315cd28 1933qla24xx_pci_config(scsi_qla_host_t *vha)
0107109e 1934{
a157b101 1935 uint16_t w;
0107109e 1936 unsigned long flags = 0;
e315cd28 1937 struct qla_hw_data *ha = vha->hw;
0107109e 1938 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
0107109e
AV		 1939
1940 pci_set_master(ha->pdev);
af6177d8 1941 pci_try_set_mwi(ha->pdev);
0107109e
AV		 1942
1943 pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
a157b101 1944 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
0107109e
AV		 1945 w &= ~PCI_COMMAND_INTX_DISABLE;
1946 pci_write_config_word(ha->pdev, PCI_COMMAND, w);
1947
1948 pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80);
1949
1950 /* PCI-X -- adjust Maximum Memory Read Byte Count (2048). */
f85ec187
AV		 1951 if (pci_find_capability(ha->pdev, PCI_CAP_ID_PCIX))
1952 pcix_set_mmrbc(ha->pdev, 2048);
0107109e
AV		 1953
1954 /* PCIe -- adjust Maximum Read Request Size (2048). */
e67f1321 1955 if (pci_is_pcie(ha->pdev))
5ffd3a52 1956 pcie_set_readrq(ha->pdev, 4096);
0107109e 1957
737faece 1958 pci_disable_rom(ha->pdev);
0107109e 1959
44c10138 1960 ha->chip_revision = ha->pdev->revision;
a8488abe 1961
0107109e
AV		 1962 /* Get PCI bus information. */
1963 spin_lock_irqsave(&ha->hardware_lock, flags);
1964 ha->pci_attr = RD_REG_DWORD(&reg->ctrl_status);
1965 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1966
1967 return QLA_SUCCESS;
1968}
1969
c3a2f0df
AV		 1970/**
1971 * qla25xx_pci_config() - Setup ISP25xx PCI configuration registers.
1972 * @ha: HA context
1973 *
1974 * Returns 0 on success.
1975 */
1976int
e315cd28 1977qla25xx_pci_config(scsi_qla_host_t *vha)
c3a2f0df
AV		 1978{
1979 uint16_t w;
e315cd28 1980 struct qla_hw_data *ha = vha->hw;
c3a2f0df
AV		 1981
1982 pci_set_master(ha->pdev);
1983 pci_try_set_mwi(ha->pdev);
1984
1985 pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
1986 w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
1987 w &= ~PCI_COMMAND_INTX_DISABLE;
1988 pci_write_config_word(ha->pdev, PCI_COMMAND, w);
1989
1990 /* PCIe -- adjust Maximum Read Request Size (2048). */
e67f1321 1991 if (pci_is_pcie(ha->pdev))
5ffd3a52 1992 pcie_set_readrq(ha->pdev, 4096);
c3a2f0df 1993
737faece 1994 pci_disable_rom(ha->pdev);
c3a2f0df
AV		 1995
1996 ha->chip_revision = ha->pdev->revision;
1997
1998 return QLA_SUCCESS;
1999}
2000
1da177e4
LT		 2001/**
2002 * qla2x00_isp_firmware() - Choose firmware image.
2003 * @ha: HA context
2004 *
2005 * Returns 0 on success.
2006 */
2007static int
e315cd28 2008qla2x00_isp_firmware(scsi_qla_host_t *vha)
1da177e4
LT		 2009{
2010 int rval;
42e421b1
AV		 2011 uint16_t loop_id, topo, sw_cap;
2012 uint8_t domain, area, al_pa;
e315cd28 2013 struct qla_hw_data *ha = vha->hw;
1da177e4
LT		 2014
2015 /* Assume loading risc code */
fa2a1ce5 2016 rval = QLA_FUNCTION_FAILED;
1da177e4
LT		 2017
2018 if (ha->flags.disable_risc_code_load) {
7c3df132 2019 ql_log(ql_log_info, vha, 0x0079, "RISC CODE NOT loaded.\n");
1da177e4
LT		 2020
2021 /* Verify checksum of loaded RISC code. */
e315cd28 2022 rval = qla2x00_verify_checksum(vha, ha->fw_srisc_address);
42e421b1
AV		 2023 if (rval == QLA_SUCCESS) {
2024 /* And, verify we are not in ROM code. */
e315cd28 2025 rval = qla2x00_get_adapter_id(vha, &loop_id, &al_pa,
42e421b1
AV		 2026 &area, &domain, &topo, &sw_cap);
2027 }
1da177e4
LT		 2028 }
2029
7c3df132
SK		 2030 if (rval)
2031 ql_dbg(ql_dbg_init, vha, 0x007a,
2032 "**** Load RISC code ****.\n");
1da177e4
LT		 2033
2034 return (rval);
2035}
2036
2037/**
2038 * qla2x00_reset_chip() - Reset ISP chip.
2039 * @ha: HA context
2040 *
2041 * Returns 0 on success.
2042 */
abbd8870 2043void
e315cd28 2044qla2x00_reset_chip(scsi_qla_host_t *vha)
1da177e4
LT		 2045{
2046 unsigned long flags = 0;
e315cd28 2047 struct qla_hw_data *ha = vha->hw;
3d71644c 2048 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1da177e4 2049 uint32_t cnt;
1da177e4
LT		 2050 uint16_t cmd;
2051
85880801
AV		 2052 if (unlikely(pci_channel_offline(ha->pdev)))
2053 return;
2054
fd34f556 2055 ha->isp_ops->disable_intrs(ha);
1da177e4
LT		 2056
2057 spin_lock_irqsave(&ha->hardware_lock, flags);
2058
2059 /* Turn off master enable */
2060 cmd = 0;
2061 pci_read_config_word(ha->pdev, PCI_COMMAND, &cmd);
2062 cmd &= ~PCI_COMMAND_MASTER;
2063 pci_write_config_word(ha->pdev, PCI_COMMAND, cmd);
2064
2065 if (!IS_QLA2100(ha)) {
2066 /* Pause RISC. */
2067 WRT_REG_WORD(&reg->hccr, HCCR_PAUSE_RISC);
2068 if (IS_QLA2200(ha) || IS_QLA2300(ha)) {
2069 for (cnt = 0; cnt < 30000; cnt++) {
2070 if ((RD_REG_WORD(&reg->hccr) &
2071 HCCR_RISC_PAUSE) != 0)
2072 break;
2073 udelay(100);
2074 }
2075 } else {
2076 RD_REG_WORD(&reg->hccr); /* PCI Posting. */
2077 udelay(10);
2078 }
2079
2080 /* Select FPM registers. */
2081 WRT_REG_WORD(&reg->ctrl_status, 0x20);
2082 RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
2083
2084 /* FPM Soft Reset. */
2085 WRT_REG_WORD(&reg->fpm_diag_config, 0x100);
2086 RD_REG_WORD(&reg->fpm_diag_config); /* PCI Posting. */
2087
2088 /* Toggle Fpm Reset. */
2089 if (!IS_QLA2200(ha)) {
2090 WRT_REG_WORD(&reg->fpm_diag_config, 0x0);
2091 RD_REG_WORD(&reg->fpm_diag_config); /* PCI Posting. */
2092 }
2093
2094 /* Select frame buffer registers. */
2095 WRT_REG_WORD(&reg->ctrl_status, 0x10);
2096 RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
2097
2098 /* Reset frame buffer FIFOs. */
2099 if (IS_QLA2200(ha)) {
2100 WRT_FB_CMD_REG(ha, reg, 0xa000);
2101 RD_FB_CMD_REG(ha, reg); /* PCI Posting. */
2102 } else {
2103 WRT_FB_CMD_REG(ha, reg, 0x00fc);
2104
2105 /* Read back fb_cmd until zero or 3 seconds max */
2106 for (cnt = 0; cnt < 3000; cnt++) {
2107 if ((RD_FB_CMD_REG(ha, reg) & 0xff) == 0)
2108 break;
2109 udelay(100);
2110 }
2111 }
2112
2113 /* Select RISC module registers. */
2114 WRT_REG_WORD(&reg->ctrl_status, 0);
2115 RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
2116
2117 /* Reset RISC processor. */
2118 WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
2119 RD_REG_WORD(&reg->hccr); /* PCI Posting. */
2120
2121 /* Release RISC processor. */
2122 WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
2123 RD_REG_WORD(&reg->hccr); /* PCI Posting. */
2124 }
2125
2126 WRT_REG_WORD(&reg->hccr, HCCR_CLR_RISC_INT);
2127 WRT_REG_WORD(&reg->hccr, HCCR_CLR_HOST_INT);
2128
2129 /* Reset ISP chip. */
2130 WRT_REG_WORD(&reg->ctrl_status, CSR_ISP_SOFT_RESET);
2131
2132 /* Wait for RISC to recover from reset. */
2133 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
2134 /*
2135 * It is necessary to for a delay here since the card doesn't
2136 * respond to PCI reads during a reset. On some architectures
2137 * this will result in an MCA.
2138 */
2139 udelay(20);
2140 for (cnt = 30000; cnt; cnt--) {
2141 if ((RD_REG_WORD(&reg->ctrl_status) &
2142 CSR_ISP_SOFT_RESET) == 0)
2143 break;
2144 udelay(100);
2145 }
2146 } else
2147 udelay(10);
2148
2149 /* Reset RISC processor. */
2150 WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
2151
2152 WRT_REG_WORD(&reg->semaphore, 0);
2153
2154 /* Release RISC processor. */
2155 WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
2156 RD_REG_WORD(&reg->hccr); /* PCI Posting. */
2157
2158 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
2159 for (cnt = 0; cnt < 30000; cnt++) {
ffb39f03 2160 if (RD_MAILBOX_REG(ha, reg, 0) != MBS_BUSY)
1da177e4 2161 break;
1da177e4
LT		 2162
2163 udelay(100);
2164 }
2165 } else
2166 udelay(100);
2167
2168 /* Turn on master enable */
2169 cmd |= PCI_COMMAND_MASTER;
2170 pci_write_config_word(ha->pdev, PCI_COMMAND, cmd);
2171
2172 /* Disable RISC pause on FPM parity error. */
2173 if (!IS_QLA2100(ha)) {
2174 WRT_REG_WORD(&reg->hccr, HCCR_DISABLE_PARITY_PAUSE);
2175 RD_REG_WORD(&reg->hccr); /* PCI Posting. */
2176 }
2177
2178 spin_unlock_irqrestore(&ha->hardware_lock, flags);
2179}
2180
b1d46989
MI		 2181/**
2182 * qla81xx_reset_mpi() - Reset's MPI FW via Write MPI Register MBC.
2183 *
2184 * Returns 0 on success.
2185 */
fa492630 2186static int
b1d46989
MI		 2187qla81xx_reset_mpi(scsi_qla_host_t *vha)
2188{
2189 uint16_t mb[4] = {0x1010, 0, 1, 0};
2190
6246b8a1
GM		 2191 if (!IS_QLA81XX(vha->hw))
2192 return QLA_SUCCESS;
2193
b1d46989
MI		 2194 return qla81xx_write_mpi_register(vha, mb);
2195}
2196
0107109e 2197/**
88c26663 2198 * qla24xx_reset_risc() - Perform full reset of ISP24xx RISC.
0107109e
AV		 2199 * @ha: HA context
2200 *
2201 * Returns 0 on success.
2202 */
d14e72fb 2203static inline int
e315cd28 2204qla24xx_reset_risc(scsi_qla_host_t *vha)
0107109e
AV		 2205{
2206 unsigned long flags = 0;
e315cd28 2207 struct qla_hw_data *ha = vha->hw;
0107109e 2208 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
52c82823 2209 uint32_t cnt;
335a1cc9 2210 uint16_t wd;
b1d46989 2211 static int abts_cnt; /* ISP abort retry counts */
d14e72fb 2212 int rval = QLA_SUCCESS;
0107109e 2213
0107109e
AV		 2214 spin_lock_irqsave(&ha->hardware_lock, flags);
2215
2216 /* Reset RISC. */
2217 WRT_REG_DWORD(&reg->ctrl_status, CSRX_DMA_SHUTDOWN|MWB_4096_BYTES);
2218 for (cnt = 0; cnt < 30000; cnt++) {
2219 if ((RD_REG_DWORD(&reg->ctrl_status) & CSRX_DMA_ACTIVE) == 0)
2220 break;
2221
2222 udelay(10);
2223 }
2224
d14e72fb
HM		 2225 if (!(RD_REG_DWORD(&reg->ctrl_status) & CSRX_DMA_ACTIVE))
2226 set_bit(DMA_SHUTDOWN_CMPL, &ha->fw_dump_cap_flags);
2227
2228 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x017e,
2229 "HCCR: 0x%x, Control Status %x, DMA active status:0x%x\n",
2230 RD_REG_DWORD(&reg->hccr),
2231 RD_REG_DWORD(&reg->ctrl_status),
2232 (RD_REG_DWORD(&reg->ctrl_status) & CSRX_DMA_ACTIVE));
2233
0107109e
AV		 2234 WRT_REG_DWORD(&reg->ctrl_status,
2235 CSRX_ISP_SOFT_RESET|CSRX_DMA_SHUTDOWN|MWB_4096_BYTES);
335a1cc9 2236 pci_read_config_word(ha->pdev, PCI_COMMAND, &wd);
88c26663 2237
335a1cc9 2238 udelay(100);
d14e72fb 2239
88c26663 2240 /* Wait for firmware to complete NVRAM accesses. */
52c82823 2241 RD_REG_WORD(&reg->mailbox0);
d14e72fb
HM		 2242 for (cnt = 10000; RD_REG_WORD(&reg->mailbox0) != 0 &&
2243 rval == QLA_SUCCESS; cnt--) {
88c26663 2244 barrier();
d14e72fb
HM		 2245 if (cnt)
2246 udelay(5);
2247 else
2248 rval = QLA_FUNCTION_TIMEOUT;
88c26663
AV		 2249 }
2250
d14e72fb
HM		 2251 if (rval == QLA_SUCCESS)
2252 set_bit(ISP_MBX_RDY, &ha->fw_dump_cap_flags);
2253
2254 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x017f,
2255 "HCCR: 0x%x, MailBox0 Status 0x%x\n",
2256 RD_REG_DWORD(&reg->hccr),
2257 RD_REG_DWORD(&reg->mailbox0));
2258
335a1cc9 2259 /* Wait for soft-reset to complete. */
52c82823 2260 RD_REG_DWORD(&reg->ctrl_status);
200ffb15 2261 for (cnt = 0; cnt < 60; cnt++) {
0107109e 2262 barrier();
d14e72fb
HM		 2263 if ((RD_REG_DWORD(&reg->ctrl_status) &
2264 CSRX_ISP_SOFT_RESET) == 0)
2265 break;
2266
2267 udelay(5);
0107109e 2268 }
d14e72fb
HM		 2269 if (!(RD_REG_DWORD(&reg->ctrl_status) & CSRX_ISP_SOFT_RESET))
2270 set_bit(ISP_SOFT_RESET_CMPL, &ha->fw_dump_cap_flags);
2271
2272 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x015d,
2273 "HCCR: 0x%x, Soft Reset status: 0x%x\n",
2274 RD_REG_DWORD(&reg->hccr),
2275 RD_REG_DWORD(&reg->ctrl_status));
0107109e 2276
b1d46989
MI		 2277 /* If required, do an MPI FW reset now */
2278 if (test_and_clear_bit(MPI_RESET_NEEDED, &vha->dpc_flags)) {
2279 if (qla81xx_reset_mpi(vha) != QLA_SUCCESS) {
2280 if (++abts_cnt < 5) {
2281 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
2282 set_bit(MPI_RESET_NEEDED, &vha->dpc_flags);
2283 } else {
2284 /*
2285 * We exhausted the ISP abort retries. We have to
2286 * set the board offline.
2287 */
2288 abts_cnt = 0;
2289 vha->flags.online = 0;
2290 }
2291 }
2292 }
2293
0107109e
AV		 2294 WRT_REG_DWORD(&reg->hccr, HCCRX_SET_RISC_RESET);
2295 RD_REG_DWORD(&reg->hccr);
2296
2297 WRT_REG_DWORD(&reg->hccr, HCCRX_REL_RISC_PAUSE);
2298 RD_REG_DWORD(&reg->hccr);
2299
2300 WRT_REG_DWORD(&reg->hccr, HCCRX_CLR_RISC_RESET);
2301 RD_REG_DWORD(&reg->hccr);
2302
52c82823 2303 RD_REG_WORD(&reg->mailbox0);
200ffb15 2304 for (cnt = 60; RD_REG_WORD(&reg->mailbox0) != 0 &&
d14e72fb 2305 rval == QLA_SUCCESS; cnt--) {
0107109e 2306 barrier();
d14e72fb
HM		 2307 if (cnt)
2308 udelay(5);
2309 else
2310 rval = QLA_FUNCTION_TIMEOUT;
0107109e 2311 }
d14e72fb
HM		 2312 if (rval == QLA_SUCCESS)
2313 set_bit(RISC_RDY_AFT_RESET, &ha->fw_dump_cap_flags);
2314
2315 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x015e,
2316 "Host Risc 0x%x, mailbox0 0x%x\n",
2317 RD_REG_DWORD(&reg->hccr),
2318 RD_REG_WORD(&reg->mailbox0));
0107109e
AV		 2319
2320 spin_unlock_irqrestore(&ha->hardware_lock, flags);
124f85e6 2321
d14e72fb
HM		 2322 ql_dbg(ql_dbg_init + ql_dbg_verbose, vha, 0x015f,
2323 "Driver in %s mode\n",
2324 IS_NOPOLLING_TYPE(ha) ? "Interrupt" : "Polling");
2325
124f85e6
AV		 2326 if (IS_NOPOLLING_TYPE(ha))
2327 ha->isp_ops->enable_intrs(ha);
d14e72fb
HM		 2328
2329 return rval;
0107109e
AV		 2330}
2331
4ea2c9c7
JC		 2332static void
2333qla25xx_read_risc_sema_reg(scsi_qla_host_t *vha, uint32_t *data)
2334{
2335 struct device_reg_24xx __iomem *reg = &vha->hw->iobase->isp24;
2336
2337 WRT_REG_DWORD(&reg->iobase_addr, RISC_REGISTER_BASE_OFFSET);
2338 *data = RD_REG_DWORD(&reg->iobase_window + RISC_REGISTER_WINDOW_OFFET);
2339
2340}
2341
2342static void
2343qla25xx_write_risc_sema_reg(scsi_qla_host_t *vha, uint32_t data)
2344{
2345 struct device_reg_24xx __iomem *reg = &vha->hw->iobase->isp24;
2346
2347 WRT_REG_DWORD(&reg->iobase_addr, RISC_REGISTER_BASE_OFFSET);
2348 WRT_REG_DWORD(&reg->iobase_window + RISC_REGISTER_WINDOW_OFFET, data);
2349}
2350
2351static void
2352qla25xx_manipulate_risc_semaphore(scsi_qla_host_t *vha)
2353{
4ea2c9c7
JC		 2354 uint32_t wd32 = 0;
2355 uint delta_msec = 100;
2356 uint elapsed_msec = 0;
2357 uint timeout_msec;
2358 ulong n;
2359
cc790764
JC		 2360 if (vha->hw->pdev->subsystem_device != 0x0175 &&
2361 vha->hw->pdev->subsystem_device != 0x0240)
4ea2c9c7
JC		 2362 return;
2363
8dd7e3a5
JC		 2364 WRT_REG_DWORD(&vha->hw->iobase->isp24.hccr, HCCRX_SET_RISC_PAUSE);
2365 udelay(100);
2366
4ea2c9c7
JC		 2367attempt:
2368 timeout_msec = TIMEOUT_SEMAPHORE;
2369 n = timeout_msec / delta_msec;
2370 while (n--) {
2371 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_SET);
2372 qla25xx_read_risc_sema_reg(vha, &wd32);
2373 if (wd32 & RISC_SEMAPHORE)
2374 break;
2375 msleep(delta_msec);
2376 elapsed_msec += delta_msec;
2377 if (elapsed_msec > TIMEOUT_TOTAL_ELAPSED)
2378 goto force;
2379 }
2380
2381 if (!(wd32 & RISC_SEMAPHORE))
2382 goto force;
2383
2384 if (!(wd32 & RISC_SEMAPHORE_FORCE))
2385 goto acquired;
2386
2387 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_CLR);
2388 timeout_msec = TIMEOUT_SEMAPHORE_FORCE;
2389 n = timeout_msec / delta_msec;
2390 while (n--) {
2391 qla25xx_read_risc_sema_reg(vha, &wd32);
2392 if (!(wd32 & RISC_SEMAPHORE_FORCE))
2393 break;
2394 msleep(delta_msec);
2395 elapsed_msec += delta_msec;
2396 if (elapsed_msec > TIMEOUT_TOTAL_ELAPSED)
2397 goto force;
2398 }
2399
2400 if (wd32 & RISC_SEMAPHORE_FORCE)
2401 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_FORCE_CLR);
2402
2403 goto attempt;
2404
2405force:
2406 qla25xx_write_risc_sema_reg(vha, RISC_SEMAPHORE_FORCE_SET);
2407
2408acquired:
2409 return;
2410}
2411
88c26663
AV		 2412/**
2413 * qla24xx_reset_chip() - Reset ISP24xx chip.
2414 * @ha: HA context
2415 *
2416 * Returns 0 on success.
2417 */
2418void
e315cd28 2419qla24xx_reset_chip(scsi_qla_host_t *vha)
88c26663 2420{
e315cd28 2421 struct qla_hw_data *ha = vha->hw;
85880801
AV		 2422
2423 if (pci_channel_offline(ha->pdev) &&
2424 ha->flags.pci_channel_io_perm_failure) {
2425 return;
2426 }
2427
fd34f556 2428 ha->isp_ops->disable_intrs(ha);
88c26663 2429
4ea2c9c7
JC		 2430 qla25xx_manipulate_risc_semaphore(vha);
2431
88c26663 2432 /* Perform RISC reset. */
e315cd28 2433 qla24xx_reset_risc(vha);
88c26663
AV		 2434}
2435
1da177e4
LT		 2436/**
2437 * qla2x00_chip_diag() - Test chip for proper operation.
2438 * @ha: HA context
2439 *
2440 * Returns 0 on success.
2441 */
abbd8870 2442int
e315cd28 2443qla2x00_chip_diag(scsi_qla_host_t *vha)
1da177e4
LT		 2444{
2445 int rval;
e315cd28 2446 struct qla_hw_data *ha = vha->hw;
3d71644c 2447 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1da177e4
LT		 2448 unsigned long flags = 0;
2449 uint16_t data;
2450 uint32_t cnt;
2451 uint16_t mb[5];
73208dfd 2452 struct req_que *req = ha->req_q_map[0];
1da177e4
LT		 2453
2454 /* Assume a failed state */
2455 rval = QLA_FUNCTION_FAILED;
2456
7c3df132
SK		 2457 ql_dbg(ql_dbg_init, vha, 0x007b,
2458 "Testing device at %lx.\n", (u_long)&reg->flash_address);
1da177e4
LT		 2459
2460 spin_lock_irqsave(&ha->hardware_lock, flags);
2461
2462 /* Reset ISP chip. */
2463 WRT_REG_WORD(&reg->ctrl_status, CSR_ISP_SOFT_RESET);
2464
2465 /*
2466 * We need to have a delay here since the card will not respond while
2467 * in reset causing an MCA on some architectures.
2468 */
2469 udelay(20);
2470 data = qla2x00_debounce_register(&reg->ctrl_status);
2471 for (cnt = 6000000 ; cnt && (data & CSR_ISP_SOFT_RESET); cnt--) {
2472 udelay(5);
2473 data = RD_REG_WORD(&reg->ctrl_status);
2474 barrier();
2475 }
2476
2477 if (!cnt)
2478 goto chip_diag_failed;
2479
7c3df132
SK		 2480 ql_dbg(ql_dbg_init, vha, 0x007c,
2481 "Reset register cleared by chip reset.\n");
1da177e4
LT		 2482
2483 /* Reset RISC processor. */
2484 WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
2485 WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
2486
2487 /* Workaround for QLA2312 PCI parity error */
2488 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
2489 data = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 0));
2490 for (cnt = 6000000; cnt && (data == MBS_BUSY); cnt--) {
2491 udelay(5);
2492 data = RD_MAILBOX_REG(ha, reg, 0);
fa2a1ce5 2493 barrier();
1da177e4
LT		 2494 }
2495 } else
2496 udelay(10);
2497
2498 if (!cnt)
2499 goto chip_diag_failed;
2500
2501 /* Check product ID of chip */
5a68a1c2 2502 ql_dbg(ql_dbg_init, vha, 0x007d, "Checking product ID of chip.\n");
1da177e4
LT		 2503
2504 mb[1] = RD_MAILBOX_REG(ha, reg, 1);
2505 mb[2] = RD_MAILBOX_REG(ha, reg, 2);
2506 mb[3] = RD_MAILBOX_REG(ha, reg, 3);
2507 mb[4] = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 4));
2508 if (mb[1] != PROD_ID_1 || (mb[2] != PROD_ID_2 && mb[2] != PROD_ID_2a) ||
2509 mb[3] != PROD_ID_3) {
7c3df132
SK		 2510 ql_log(ql_log_warn, vha, 0x0062,
2511 "Wrong product ID = 0x%x,0x%x,0x%x.\n",
2512 mb[1], mb[2], mb[3]);
1da177e4
LT		 2513
2514 goto chip_diag_failed;
2515 }
2516 ha->product_id[0] = mb[1];
2517 ha->product_id[1] = mb[2];
2518 ha->product_id[2] = mb[3];
2519 ha->product_id[3] = mb[4];
2520
2521 /* Adjust fw RISC transfer size */
73208dfd 2522 if (req->length > 1024)
1da177e4
LT		 2523 ha->fw_transfer_size = REQUEST_ENTRY_SIZE * 1024;
2524 else
2525 ha->fw_transfer_size = REQUEST_ENTRY_SIZE *
73208dfd 2526 req->length;
1da177e4
LT		 2527
2528 if (IS_QLA2200(ha) &&
2529 RD_MAILBOX_REG(ha, reg, 7) == QLA2200A_RISC_ROM_VER) {
2530 /* Limit firmware transfer size with a 2200A */
7c3df132 2531 ql_dbg(ql_dbg_init, vha, 0x007e, "Found QLA2200A Chip.\n");
1da177e4 2532
ea5b6382 2533 ha->device_type |= DT_ISP2200A;
1da177e4
LT		 2534 ha->fw_transfer_size = 128;
2535 }
2536
2537 /* Wrap Incoming Mailboxes Test. */
2538 spin_unlock_irqrestore(&ha->hardware_lock, flags);
2539
7c3df132 2540 ql_dbg(ql_dbg_init, vha, 0x007f, "Checking mailboxes.\n");
e315cd28 2541 rval = qla2x00_mbx_reg_test(vha);
7c3df132
SK		 2542 if (rval)
2543 ql_log(ql_log_warn, vha, 0x0080,
2544 "Failed mailbox send register test.\n");
2545 else
1da177e4
LT		 2546 /* Flag a successful rval */
2547 rval = QLA_SUCCESS;
1da177e4
LT		 2548 spin_lock_irqsave(&ha->hardware_lock, flags);
2549
2550chip_diag_failed:
2551 if (rval)
7c3df132
SK		 2552 ql_log(ql_log_info, vha, 0x0081,
2553 "Chip diagnostics **** FAILED ****.\n");
1da177e4
LT		 2554
2555 spin_unlock_irqrestore(&ha->hardware_lock, flags);
2556
2557 return (rval);
2558}
2559
0107109e
AV		 2560/**
2561 * qla24xx_chip_diag() - Test ISP24xx for proper operation.
2562 * @ha: HA context
2563 *
2564 * Returns 0 on success.
2565 */
2566int
e315cd28 2567qla24xx_chip_diag(scsi_qla_host_t *vha)
0107109e
AV		 2568{
2569 int rval;
e315cd28 2570 struct qla_hw_data *ha = vha->hw;
73208dfd 2571 struct req_que *req = ha->req_q_map[0];
0107109e 2572
7ec0effd 2573 if (IS_P3P_TYPE(ha))
a9083016
GM		 2574 return QLA_SUCCESS;
2575
73208dfd 2576 ha->fw_transfer_size = REQUEST_ENTRY_SIZE * req->length;
0107109e 2577
e315cd28 2578 rval = qla2x00_mbx_reg_test(vha);
0107109e 2579 if (rval) {
7c3df132
SK		 2580 ql_log(ql_log_warn, vha, 0x0082,
2581 "Failed mailbox send register test.\n");
0107109e
AV		 2582 } else {
2583 /* Flag a successful rval */
2584 rval = QLA_SUCCESS;
2585 }
2586
2587 return rval;
2588}
2589
a7a167bf 2590void
e315cd28 2591qla2x00_alloc_fw_dump(scsi_qla_host_t *vha)
0107109e 2592{
a7a167bf
AV		 2593 int rval;
2594 uint32_t dump_size, fixed_size, mem_size, req_q_size, rsp_q_size,
73208dfd 2595 eft_size, fce_size, mq_size;
df613b96
AV		 2596 dma_addr_t tc_dma;
2597 void *tc;
e315cd28 2598 struct qla_hw_data *ha = vha->hw;
73208dfd
AC		 2599 struct req_que *req = ha->req_q_map[0];
2600 struct rsp_que *rsp = ha->rsp_q_map[0];
a7a167bf
AV		 2601
2602 if (ha->fw_dump) {
7c3df132
SK		 2603 ql_dbg(ql_dbg_init, vha, 0x00bd,
2604 "Firmware dump already allocated.\n");
a7a167bf
AV		 2605 return;
2606 }
d4e3e04d 2607
0107109e 2608 ha->fw_dumped = 0;
61f098dd 2609 ha->fw_dump_cap_flags = 0;
f73cb695
CD		 2610 dump_size = fixed_size = mem_size = eft_size = fce_size = mq_size = 0;
2611 req_q_size = rsp_q_size = 0;
2612
2613 if (IS_QLA27XX(ha))
2614 goto try_fce;
2615
d4e3e04d 2616 if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
a7a167bf 2617 fixed_size = sizeof(struct qla2100_fw_dump);
d4e3e04d 2618 } else if (IS_QLA23XX(ha)) {
a7a167bf
AV		 2619 fixed_size = offsetof(struct qla2300_fw_dump, data_ram);
2620 mem_size = (ha->fw_memory_size - 0x11000 + 1) *
2621 sizeof(uint16_t);
e428924c 2622 } else if (IS_FWI2_CAPABLE(ha)) {
b20f02e1 2623 if (IS_QLA83XX(ha) || IS_QLA27XX(ha))
6246b8a1
GM		 2624 fixed_size = offsetof(struct qla83xx_fw_dump, ext_mem);
2625 else if (IS_QLA81XX(ha))
3a03eb79
AV		 2626 fixed_size = offsetof(struct qla81xx_fw_dump, ext_mem);
2627 else if (IS_QLA25XX(ha))
2628 fixed_size = offsetof(struct qla25xx_fw_dump, ext_mem);
2629 else
2630 fixed_size = offsetof(struct qla24xx_fw_dump, ext_mem);
f73cb695 2631
a7a167bf
AV		 2632 mem_size = (ha->fw_memory_size - 0x100000 + 1) *
2633 sizeof(uint32_t);
050c9bb1 2634 if (ha->mqenable) {
b20f02e1 2635 if (!IS_QLA83XX(ha) && !IS_QLA27XX(ha))
6246b8a1 2636 mq_size = sizeof(struct qla2xxx_mq_chain);
050c9bb1
GM		 2637 /*
2638 * Allocate maximum buffer size for all queues.
2639 * Resizing must be done at end-of-dump processing.
2640 */
2641 mq_size += ha->max_req_queues *
2642 (req->length * sizeof(request_t));
2643 mq_size += ha->max_rsp_queues *
2644 (rsp->length * sizeof(response_t));
2645 }
00876ae8 2646 if (ha->tgt.atio_ring)
2d70c103 2647 mq_size += ha->tgt.atio_q_length * sizeof(request_t);
df613b96 2648 /* Allocate memory for Fibre Channel Event Buffer. */
f73cb695
CD		 2649 if (!IS_QLA25XX(ha) && !IS_QLA81XX(ha) && !IS_QLA83XX(ha) &&
2650 !IS_QLA27XX(ha))
436a7b11 2651 goto try_eft;
df613b96 2652
f73cb695
CD		 2653try_fce:
2654 if (ha->fce)
2655 dma_free_coherent(&ha->pdev->dev,
2656 FCE_SIZE, ha->fce, ha->fce_dma);
2657
2658 /* Allocate memory for Fibre Channel Event Buffer. */
0ea85b50
JP		 2659 tc = dma_zalloc_coherent(&ha->pdev->dev, FCE_SIZE, &tc_dma,
2660 GFP_KERNEL);
df613b96 2661 if (!tc) {
7c3df132
SK		 2662 ql_log(ql_log_warn, vha, 0x00be,
2663 "Unable to allocate (%d KB) for FCE.\n",
2664 FCE_SIZE / 1024);
17d98630 2665 goto try_eft;
df613b96
AV		 2666 }
2667
e315cd28 2668 rval = qla2x00_enable_fce_trace(vha, tc_dma, FCE_NUM_BUFFERS,
df613b96
AV		 2669 ha->fce_mb, &ha->fce_bufs);
2670 if (rval) {
7c3df132
SK		 2671 ql_log(ql_log_warn, vha, 0x00bf,
2672 "Unable to initialize FCE (%d).\n", rval);
df613b96
AV		 2673 dma_free_coherent(&ha->pdev->dev, FCE_SIZE, tc,
2674 tc_dma);
2675 ha->flags.fce_enabled = 0;
17d98630 2676 goto try_eft;
df613b96 2677 }
cfb0919c 2678 ql_dbg(ql_dbg_init, vha, 0x00c0,
7c3df132 2679 "Allocate (%d KB) for FCE...\n", FCE_SIZE / 1024);
df613b96 2680
7d9dade3 2681 fce_size = sizeof(struct qla2xxx_fce_chain) + FCE_SIZE;
df613b96
AV		 2682 ha->flags.fce_enabled = 1;
2683 ha->fce_dma = tc_dma;
2684 ha->fce = tc;
f73cb695 2685
436a7b11 2686try_eft:
f73cb695
CD		 2687 if (ha->eft)
2688 dma_free_coherent(&ha->pdev->dev,
2689 EFT_SIZE, ha->eft, ha->eft_dma);
2690
436a7b11 2691 /* Allocate memory for Extended Trace Buffer. */
0ea85b50
JP		 2692 tc = dma_zalloc_coherent(&ha->pdev->dev, EFT_SIZE, &tc_dma,
2693 GFP_KERNEL);
436a7b11 2694 if (!tc) {
7c3df132
SK		 2695 ql_log(ql_log_warn, vha, 0x00c1,
2696 "Unable to allocate (%d KB) for EFT.\n",
2697 EFT_SIZE / 1024);
436a7b11
AV		 2698 goto cont_alloc;
2699 }
2700
e315cd28 2701 rval = qla2x00_enable_eft_trace(vha, tc_dma, EFT_NUM_BUFFERS);
436a7b11 2702 if (rval) {
7c3df132
SK		 2703 ql_log(ql_log_warn, vha, 0x00c2,
2704 "Unable to initialize EFT (%d).\n", rval);
436a7b11
AV		 2705 dma_free_coherent(&ha->pdev->dev, EFT_SIZE, tc,
2706 tc_dma);
2707 goto cont_alloc;
2708 }
cfb0919c 2709 ql_dbg(ql_dbg_init, vha, 0x00c3,
7c3df132 2710 "Allocated (%d KB) EFT ...\n", EFT_SIZE / 1024);
436a7b11
AV		 2711
2712 eft_size = EFT_SIZE;
2713 ha->eft_dma = tc_dma;
2714 ha->eft = tc;
d4e3e04d 2715 }
f73cb695 2716
a7a167bf 2717cont_alloc:
f73cb695
CD		 2718 if (IS_QLA27XX(ha)) {
2719 if (!ha->fw_dump_template) {
2720 ql_log(ql_log_warn, vha, 0x00ba,
2721 "Failed missing fwdump template\n");
2722 return;
2723 }
2724 dump_size = qla27xx_fwdt_calculate_dump_size(vha);
2725 ql_dbg(ql_dbg_init, vha, 0x00fa,
2726 "-> allocating fwdump (%x bytes)...\n", dump_size);
2727 goto allocate;
2728 }
2729
73208dfd
AC		 2730 req_q_size = req->length * sizeof(request_t);
2731 rsp_q_size = rsp->length * sizeof(response_t);
a7a167bf 2732 dump_size = offsetof(struct qla2xxx_fw_dump, isp);
2afa19a9 2733 dump_size += fixed_size + mem_size + req_q_size + rsp_q_size + eft_size;
bb99de67
AV		 2734 ha->chain_offset = dump_size;
2735 dump_size += mq_size + fce_size;
d4e3e04d 2736
b945e777
QT		 2737 if (ha->exchoffld_buf)
2738 dump_size += sizeof(struct qla2xxx_offld_chain) +
2739 ha->exchoffld_size;
2740 if (ha->exlogin_buf)
2741 dump_size += sizeof(struct qla2xxx_offld_chain) +
2742 ha->exlogin_size;
2743
f73cb695 2744allocate:
d4e3e04d 2745 ha->fw_dump = vmalloc(dump_size);
a7a167bf 2746 if (!ha->fw_dump) {
7c3df132
SK		 2747 ql_log(ql_log_warn, vha, 0x00c4,
2748 "Unable to allocate (%d KB) for firmware dump.\n",
2749 dump_size / 1024);
a7a167bf 2750
e30d1756
MI		 2751 if (ha->fce) {
2752 dma_free_coherent(&ha->pdev->dev, FCE_SIZE, ha->fce,
2753 ha->fce_dma);
2754 ha->fce = NULL;
2755 ha->fce_dma = 0;
2756 }
2757
a7a167bf
AV		 2758 if (ha->eft) {
2759 dma_free_coherent(&ha->pdev->dev, eft_size, ha->eft,
2760 ha->eft_dma);
2761 ha->eft = NULL;
2762 ha->eft_dma = 0;
2763 }
2764 return;
2765 }
f73cb695 2766 ha->fw_dump_len = dump_size;
cfb0919c 2767 ql_dbg(ql_dbg_init, vha, 0x00c5,
7c3df132 2768 "Allocated (%d KB) for firmware dump.\n", dump_size / 1024);
a7a167bf 2769
f73cb695
CD		 2770 if (IS_QLA27XX(ha))
2771 return;
2772
a7a167bf
AV		 2773 ha->fw_dump->signature[0] = 'Q';
2774 ha->fw_dump->signature[1] = 'L';
2775 ha->fw_dump->signature[2] = 'G';
2776 ha->fw_dump->signature[3] = 'C';
ad950360 2777 ha->fw_dump->version = htonl(1);
a7a167bf
AV		 2778
2779 ha->fw_dump->fixed_size = htonl(fixed_size);
2780 ha->fw_dump->mem_size = htonl(mem_size);
2781 ha->fw_dump->req_q_size = htonl(req_q_size);
2782 ha->fw_dump->rsp_q_size = htonl(rsp_q_size);
2783
2784 ha->fw_dump->eft_size = htonl(eft_size);
2785 ha->fw_dump->eft_addr_l = htonl(LSD(ha->eft_dma));
2786 ha->fw_dump->eft_addr_h = htonl(MSD(ha->eft_dma));
2787
2788 ha->fw_dump->header_size =
2789 htonl(offsetof(struct qla2xxx_fw_dump, isp));
0107109e
AV		 2790}
2791
18e7555a
AV		 2792static int
2793qla81xx_mpi_sync(scsi_qla_host_t *vha)
2794{
2795#define MPS_MASK 0xe0
2796 int rval;
2797 uint16_t dc;
2798 uint32_t dw;
18e7555a
AV		 2799
2800 if (!IS_QLA81XX(vha->hw))
2801 return QLA_SUCCESS;
2802
2803 rval = qla2x00_write_ram_word(vha, 0x7c00, 1);
2804 if (rval != QLA_SUCCESS) {
7c3df132
SK		 2805 ql_log(ql_log_warn, vha, 0x0105,
2806 "Unable to acquire semaphore.\n");
18e7555a
AV		 2807 goto done;
2808 }
2809
2810 pci_read_config_word(vha->hw->pdev, 0x54, &dc);
2811 rval = qla2x00_read_ram_word(vha, 0x7a15, &dw);
2812 if (rval != QLA_SUCCESS) {
7c3df132 2813 ql_log(ql_log_warn, vha, 0x0067, "Unable to read sync.\n");
18e7555a
AV		 2814 goto done_release;
2815 }
2816
2817 dc &= MPS_MASK;
2818 if (dc == (dw & MPS_MASK))
2819 goto done_release;
2820
2821 dw &= ~MPS_MASK;
2822 dw |= dc;
2823 rval = qla2x00_write_ram_word(vha, 0x7a15, dw);
2824 if (rval != QLA_SUCCESS) {
7c3df132 2825 ql_log(ql_log_warn, vha, 0x0114, "Unable to gain sync.\n");
18e7555a
AV		 2826 }
2827
2828done_release:
2829 rval = qla2x00_write_ram_word(vha, 0x7c00, 0);
2830 if (rval != QLA_SUCCESS) {
7c3df132
SK		 2831 ql_log(ql_log_warn, vha, 0x006d,
2832 "Unable to release semaphore.\n");
18e7555a
AV		 2833 }
2834
2835done:
2836 return rval;
2837}
2838
8d93f550
CD		 2839int
2840qla2x00_alloc_outstanding_cmds(struct qla_hw_data *ha, struct req_que *req)
2841{
2842 /* Don't try to reallocate the array */
2843 if (req->outstanding_cmds)
2844 return QLA_SUCCESS;
2845
d7459527 2846 if (!IS_FWI2_CAPABLE(ha))
8d93f550
CD		 2847 req->num_outstanding_cmds = DEFAULT_OUTSTANDING_COMMANDS;
2848 else {
03e8c680
QT		 2849 if (ha->cur_fw_xcb_count <= ha->cur_fw_iocb_count)
2850 req->num_outstanding_cmds = ha->cur_fw_xcb_count;
8d93f550 2851 else
03e8c680 2852 req->num_outstanding_cmds = ha->cur_fw_iocb_count;
8d93f550
CD		 2853 }
2854
2855 req->outstanding_cmds = kzalloc(sizeof(srb_t *) *
2856 req->num_outstanding_cmds, GFP_KERNEL);
2857
2858 if (!req->outstanding_cmds) {
2859 /*
2860 * Try to allocate a minimal size just so we can get through
2861 * initialization.
2862 */
2863 req->num_outstanding_cmds = MIN_OUTSTANDING_COMMANDS;
2864 req->outstanding_cmds = kzalloc(sizeof(srb_t *) *
2865 req->num_outstanding_cmds, GFP_KERNEL);
2866
2867 if (!req->outstanding_cmds) {
2868 ql_log(ql_log_fatal, NULL, 0x0126,
2869 "Failed to allocate memory for "
2870 "outstanding_cmds for req_que %p.\n", req);
2871 req->num_outstanding_cmds = 0;
2872 return QLA_FUNCTION_FAILED;
2873 }
2874 }
2875
2876 return QLA_SUCCESS;
2877}
2878
e4e3a2ce
QT		 2879#define PRINT_FIELD(_field, _flag, _str) { \
2880 if (a0->_field & _flag) {\
2881 if (p) {\
2882 strcat(ptr, "|");\
2883 ptr++;\
2884 leftover--;\
2885 } \
2886 len = snprintf(ptr, leftover, "%s", _str); \
2887 p = 1;\
2888 leftover -= len;\
2889 ptr += len; \
2890 } \
2891}
2892
2893static void qla2xxx_print_sfp_info(struct scsi_qla_host *vha)
2894{
2895#define STR_LEN 64
2896 struct sff_8247_a0 *a0 = (struct sff_8247_a0 *)vha->hw->sfp_data;
2897 u8 str[STR_LEN], *ptr, p;
2898 int leftover, len;
2899
2900 memset(str, 0, STR_LEN);
2901 snprintf(str, SFF_VEN_NAME_LEN+1, a0->vendor_name);
2902 ql_dbg(ql_dbg_init, vha, 0x015a,
2903 "SFP MFG Name: %s\n", str);
2904
2905 memset(str, 0, STR_LEN);
2906 snprintf(str, SFF_PART_NAME_LEN+1, a0->vendor_pn);
2907 ql_dbg(ql_dbg_init, vha, 0x015c,
2908 "SFP Part Name: %s\n", str);
2909
2910 /* media */
2911 memset(str, 0, STR_LEN);
2912 ptr = str;
2913 leftover = STR_LEN;
2914 p = len = 0;
2915 PRINT_FIELD(fc_med_cc9, FC_MED_TW, "Twin AX");
2916 PRINT_FIELD(fc_med_cc9, FC_MED_TP, "Twisted Pair");
2917 PRINT_FIELD(fc_med_cc9, FC_MED_MI, "Min Coax");
2918 PRINT_FIELD(fc_med_cc9, FC_MED_TV, "Video Coax");
2919 PRINT_FIELD(fc_med_cc9, FC_MED_M6, "MultiMode 62.5um");
2920 PRINT_FIELD(fc_med_cc9, FC_MED_M5, "MultiMode 50um");
2921 PRINT_FIELD(fc_med_cc9, FC_MED_SM, "SingleMode");
2922 ql_dbg(ql_dbg_init, vha, 0x0160,
2923 "SFP Media: %s\n", str);
2924
2925 /* link length */
2926 memset(str, 0, STR_LEN);
2927 ptr = str;
2928 leftover = STR_LEN;
2929 p = len = 0;
2930 PRINT_FIELD(fc_ll_cc7, FC_LL_VL, "Very Long");
2931 PRINT_FIELD(fc_ll_cc7, FC_LL_S, "Short");
2932 PRINT_FIELD(fc_ll_cc7, FC_LL_I, "Intermediate");
2933 PRINT_FIELD(fc_ll_cc7, FC_LL_L, "Long");
2934 PRINT_FIELD(fc_ll_cc7, FC_LL_M, "Medium");
2935 ql_dbg(ql_dbg_init, vha, 0x0196,
2936 "SFP Link Length: %s\n", str);
2937
2938 memset(str, 0, STR_LEN);
2939 ptr = str;
2940 leftover = STR_LEN;
2941 p = len = 0;
2942 PRINT_FIELD(fc_ll_cc7, FC_LL_SA, "Short Wave (SA)");
2943 PRINT_FIELD(fc_ll_cc7, FC_LL_LC, "Long Wave(LC)");
2944 PRINT_FIELD(fc_tec_cc8, FC_TEC_SN, "Short Wave (SN)");
2945 PRINT_FIELD(fc_tec_cc8, FC_TEC_SL, "Short Wave (SL)");
2946 PRINT_FIELD(fc_tec_cc8, FC_TEC_LL, "Long Wave (LL)");
2947 ql_dbg(ql_dbg_init, vha, 0x016e,
2948 "SFP FC Link Tech: %s\n", str);
2949
2950 if (a0->length_km)
2951 ql_dbg(ql_dbg_init, vha, 0x016f,
2952 "SFP Distant: %d km\n", a0->length_km);
2953 if (a0->length_100m)
2954 ql_dbg(ql_dbg_init, vha, 0x0170,
2955 "SFP Distant: %d m\n", a0->length_100m*100);
2956 if (a0->length_50um_10m)
2957 ql_dbg(ql_dbg_init, vha, 0x0189,
2958 "SFP Distant (WL=50um): %d m\n", a0->length_50um_10m * 10);
2959 if (a0->length_62um_10m)
2960 ql_dbg(ql_dbg_init, vha, 0x018a,
2961 "SFP Distant (WL=62.5um): %d m\n", a0->length_62um_10m * 10);
2962 if (a0->length_om4_10m)
2963 ql_dbg(ql_dbg_init, vha, 0x0194,
2964 "SFP Distant (OM4): %d m\n", a0->length_om4_10m * 10);
2965 if (a0->length_om3_10m)
2966 ql_dbg(ql_dbg_init, vha, 0x0195,
2967 "SFP Distant (OM3): %d m\n", a0->length_om3_10m * 10);
2968}
2969
2970
2971/*
2972 * Return Code:
2973 * QLA_SUCCESS: no action
2974 * QLA_INTERFACE_ERROR: SFP is not there.
2975 * QLA_FUNCTION_FAILED: detected New SFP
2976 */
2977int
2978qla24xx_detect_sfp(scsi_qla_host_t *vha)
2979{
2980 int rc = QLA_SUCCESS;
2981 struct sff_8247_a0 *a;
2982 struct qla_hw_data *ha = vha->hw;
2983
2984 if (!AUTO_DETECT_SFP_SUPPORT(vha))
2985 goto out;
2986
2987 rc = qla2x00_read_sfp_dev(vha, NULL, 0);
2988 if (rc)
2989 goto out;
2990
2991 a = (struct sff_8247_a0 *)vha->hw->sfp_data;
2992 qla2xxx_print_sfp_info(vha);
2993
2994 if (a->fc_ll_cc7 & FC_LL_VL || a->fc_ll_cc7 & FC_LL_L) {
2995 /* long range */
2996 ha->flags.detected_lr_sfp = 1;
2997
2998 if (a->length_km > 5 || a->length_100m > 50)
2999 ha->long_range_distance = LR_DISTANCE_10K;
3000 else
3001 ha->long_range_distance = LR_DISTANCE_5K;
3002
3003 if (ha->flags.detected_lr_sfp != ha->flags.using_lr_setting)
3004 ql_dbg(ql_dbg_async, vha, 0x507b,
3005 "Detected Long Range SFP.\n");
3006 } else {
3007 /* short range */
3008 ha->flags.detected_lr_sfp = 0;
3009 if (ha->flags.using_lr_setting)
3010 ql_dbg(ql_dbg_async, vha, 0x5084,
3011 "Detected Short Range SFP.\n");
3012 }
3013
3014 if (!vha->flags.init_done)
3015 rc = QLA_SUCCESS;
3016out:
3017 return rc;
3018}
3019
1da177e4
LT		 3020/**
3021 * qla2x00_setup_chip() - Load and start RISC firmware.
3022 * @ha: HA context
3023 *
3024 * Returns 0 on success.
3025 */
3026static int
e315cd28 3027qla2x00_setup_chip(scsi_qla_host_t *vha)
1da177e4 3028{
0107109e
AV		 3029 int rval;
3030 uint32_t srisc_address = 0;
e315cd28 3031 struct qla_hw_data *ha = vha->hw;
3db0652e
AV		 3032 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
3033 unsigned long flags;
dda772e8 3034 uint16_t fw_major_version;
3db0652e 3035
7ec0effd 3036 if (IS_P3P_TYPE(ha)) {
a9083016 3037 rval = ha->isp_ops->load_risc(vha, &srisc_address);
14e303d9
AV		 3038 if (rval == QLA_SUCCESS) {
3039 qla2x00_stop_firmware(vha);
a9083016 3040 goto enable_82xx_npiv;
14e303d9 3041 } else
b963752f 3042 goto failed;
a9083016
GM		 3043 }
3044
3db0652e
AV		 3045 if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) {
3046 /* Disable SRAM, Instruction RAM and GP RAM parity. */
3047 spin_lock_irqsave(&ha->hardware_lock, flags);
3048 WRT_REG_WORD(&reg->hccr, (HCCR_ENABLE_PARITY + 0x0));
3049 RD_REG_WORD(&reg->hccr);
3050 spin_unlock_irqrestore(&ha->hardware_lock, flags);
3051 }
1da177e4 3052
18e7555a
AV		 3053 qla81xx_mpi_sync(vha);
3054
1da177e4 3055 /* Load firmware sequences */
e315cd28 3056 rval = ha->isp_ops->load_risc(vha, &srisc_address);
0107109e 3057 if (rval == QLA_SUCCESS) {
7c3df132
SK		 3058 ql_dbg(ql_dbg_init, vha, 0x00c9,
3059 "Verifying Checksum of loaded RISC code.\n");
1da177e4 3060
e315cd28 3061 rval = qla2x00_verify_checksum(vha, srisc_address);
1da177e4
LT		 3062 if (rval == QLA_SUCCESS) {
3063 /* Start firmware execution. */
7c3df132
SK		 3064 ql_dbg(ql_dbg_init, vha, 0x00ca,
3065 "Starting firmware.\n");
1da177e4 3066
b0d6cabd
HM		 3067 if (ql2xexlogins)
3068 ha->flags.exlogins_enabled = 1;
3069
99e1b683 3070 if (qla_is_exch_offld_enabled(vha))
2f56a7f1
HM		 3071 ha->flags.exchoffld_enabled = 1;
3072
e315cd28 3073 rval = qla2x00_execute_fw(vha, srisc_address);
1da177e4 3074 /* Retrieve firmware information. */
dda772e8 3075 if (rval == QLA_SUCCESS) {
e4e3a2ce
QT		 3076 qla24xx_detect_sfp(vha);
3077
b0d6cabd
HM		 3078 rval = qla2x00_set_exlogins_buffer(vha);
3079 if (rval != QLA_SUCCESS)
3080 goto failed;
3081
2f56a7f1
HM		 3082 rval = qla2x00_set_exchoffld_buffer(vha);
3083 if (rval != QLA_SUCCESS)
3084 goto failed;
3085
a9083016 3086enable_82xx_npiv:
dda772e8 3087 fw_major_version = ha->fw_major_version;
7ec0effd 3088 if (IS_P3P_TYPE(ha))
3173167f 3089 qla82xx_check_md_needed(vha);
6246b8a1
GM		 3090 else
3091 rval = qla2x00_get_fw_version(vha);
ca9e9c3e
AV		 3092 if (rval != QLA_SUCCESS)
3093 goto failed;
2c3dfe3f 3094 ha->flags.npiv_supported = 0;
e315cd28 3095 if (IS_QLA2XXX_MIDTYPE(ha) &&
946fb891 3096 (ha->fw_attributes & BIT_2)) {
2c3dfe3f 3097 ha->flags.npiv_supported = 1;
4d0ea247
SJ		 3098 if ((!ha->max_npiv_vports) ||
3099 ((ha->max_npiv_vports + 1) %
eb66dc60 3100 MIN_MULTI_ID_FABRIC))
4d0ea247 3101 ha->max_npiv_vports =
eb66dc60 3102 MIN_MULTI_ID_FABRIC - 1;
4d0ea247 3103 }
03e8c680 3104 qla2x00_get_resource_cnts(vha);
d743de66 3105
8d93f550
CD		 3106 /*
3107 * Allocate the array of outstanding commands
3108 * now that we know the firmware resources.
3109 */
3110 rval = qla2x00_alloc_outstanding_cmds(ha,
3111 vha->req);
3112 if (rval != QLA_SUCCESS)
3113 goto failed;
3114
be5ea3cf 3115 if (!fw_major_version && ql2xallocfwdump
7ec0effd 3116 && !(IS_P3P_TYPE(ha)))
08de2844 3117 qla2x00_alloc_fw_dump(vha);
3b6e5b9d
CD		 3118 } else {
3119 goto failed;
1da177e4
LT		 3120 }
3121 } else {
7c3df132
SK		 3122 ql_log(ql_log_fatal, vha, 0x00cd,
3123 "ISP Firmware failed checksum.\n");
3124 goto failed;
1da177e4 3125 }
c74d88a4
AV		 3126 } else
3127 goto failed;
1da177e4 3128
3db0652e
AV		 3129 if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) {
3130 /* Enable proper parity. */
3131 spin_lock_irqsave(&ha->hardware_lock, flags);
3132 if (IS_QLA2300(ha))
3133 /* SRAM parity */
3134 WRT_REG_WORD(&reg->hccr, HCCR_ENABLE_PARITY + 0x1);
3135 else
3136 /* SRAM, Instruction RAM and GP RAM parity */
3137 WRT_REG_WORD(&reg->hccr, HCCR_ENABLE_PARITY + 0x7);
3138 RD_REG_WORD(&reg->hccr);
3139 spin_unlock_irqrestore(&ha->hardware_lock, flags);
3140 }
3141
f3982d89
CD		 3142 if (IS_QLA27XX(ha))
3143 ha->flags.fac_supported = 1;
3144 else if (rval == QLA_SUCCESS && IS_FAC_REQUIRED(ha)) {
1d2874de
JC		 3145 uint32_t size;
3146
3147 rval = qla81xx_fac_get_sector_size(vha, &size);
3148 if (rval == QLA_SUCCESS) {
3149 ha->flags.fac_supported = 1;
3150 ha->fdt_block_size = size << 2;
3151 } else {
7c3df132 3152 ql_log(ql_log_warn, vha, 0x00ce,
1d2874de
JC		 3153 "Unsupported FAC firmware (%d.%02d.%02d).\n",
3154 ha->fw_major_version, ha->fw_minor_version,
3155 ha->fw_subminor_version);
1ca60e3b 3156
f73cb695 3157 if (IS_QLA83XX(ha) || IS_QLA27XX(ha)) {
6246b8a1
GM		 3158 ha->flags.fac_supported = 0;
3159 rval = QLA_SUCCESS;
3160 }
1d2874de
JC		 3161 }
3162 }
ca9e9c3e 3163failed:
1da177e4 3164 if (rval) {
7c3df132
SK		 3165 ql_log(ql_log_fatal, vha, 0x00cf,
3166 "Setup chip ****FAILED****.\n");
1da177e4
LT		 3167 }
3168
3169 return (rval);
3170}
3171
3172/**
3173 * qla2x00_init_response_q_entries() - Initializes response queue entries.
3174 * @ha: HA context
3175 *
3176 * Beginning of request ring has initialization control block already built
3177 * by nvram config routine.
3178 *
3179 * Returns 0 on success.
3180 */
73208dfd
AC		 3181void
3182qla2x00_init_response_q_entries(struct rsp_que *rsp)
1da177e4
LT		 3183{
3184 uint16_t cnt;
3185 response_t *pkt;
3186
2afa19a9
AC		 3187 rsp->ring_ptr = rsp->ring;
3188 rsp->ring_index = 0;
3189 rsp->status_srb = NULL;
e315cd28
AC		 3190 pkt = rsp->ring_ptr;
3191 for (cnt = 0; cnt < rsp->length; cnt++) {
1da177e4
LT		 3192 pkt->signature = RESPONSE_PROCESSED;
3193 pkt++;
3194 }
1da177e4
LT		 3195}
3196
3197/**
3198 * qla2x00_update_fw_options() - Read and process firmware options.
3199 * @ha: HA context
3200 *
3201 * Returns 0 on success.
3202 */
abbd8870 3203void
e315cd28 3204qla2x00_update_fw_options(scsi_qla_host_t *vha)
1da177e4
LT		 3205{
3206 uint16_t swing, emphasis, tx_sens, rx_sens;
e315cd28 3207 struct qla_hw_data *ha = vha->hw;
1da177e4
LT		 3208
3209 memset(ha->fw_options, 0, sizeof(ha->fw_options));
e315cd28 3210 qla2x00_get_fw_options(vha, ha->fw_options);
1da177e4
LT		 3211
3212 if (IS_QLA2100(ha) || IS_QLA2200(ha))
3213 return;
3214
3215 /* Serial Link options. */
7c3df132
SK		 3216 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x0115,
3217 "Serial link options.\n");
3218 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0109,
3219 (uint8_t *)&ha->fw_seriallink_options,
3220 sizeof(ha->fw_seriallink_options));
1da177e4
LT		 3221
3222 ha->fw_options[1] &= ~FO1_SET_EMPHASIS_SWING;
3223 if (ha->fw_seriallink_options[3] & BIT_2) {
3224 ha->fw_options[1] |= FO1_SET_EMPHASIS_SWING;
3225
3226 /* 1G settings */
3227 swing = ha->fw_seriallink_options[2] & (BIT_2 | BIT_1 | BIT_0);
3228 emphasis = (ha->fw_seriallink_options[2] &
3229 (BIT_4 | BIT_3)) >> 3;
3230 tx_sens = ha->fw_seriallink_options[0] &
fa2a1ce5 3231 (BIT_3 | BIT_2 | BIT_1 | BIT_0);
1da177e4
LT		 3232 rx_sens = (ha->fw_seriallink_options[0] &
3233 (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4;
3234 ha->fw_options[10] = (emphasis << 14) | (swing << 8);
3235 if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
3236 if (rx_sens == 0x0)
3237 rx_sens = 0x3;
3238 ha->fw_options[10] |= (tx_sens << 4) | rx_sens;
3239 } else if (IS_QLA2322(ha) || IS_QLA6322(ha))
3240 ha->fw_options[10] |= BIT_5 |
3241 ((rx_sens & (BIT_1 | BIT_0)) << 2) |
3242 (tx_sens & (BIT_1 | BIT_0));
3243
3244 /* 2G settings */
3245 swing = (ha->fw_seriallink_options[2] &
3246 (BIT_7 | BIT_6 | BIT_5)) >> 5;
3247 emphasis = ha->fw_seriallink_options[3] & (BIT_1 | BIT_0);
3248 tx_sens = ha->fw_seriallink_options[1] &
fa2a1ce5 3249 (BIT_3 | BIT_2 | BIT_1 | BIT_0);
1da177e4
LT		 3250 rx_sens = (ha->fw_seriallink_options[1] &
3251 (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4;
3252 ha->fw_options[11] = (emphasis << 14) | (swing << 8);
3253 if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
3254 if (rx_sens == 0x0)
3255 rx_sens = 0x3;
3256 ha->fw_options[11] |= (tx_sens << 4) | rx_sens;
3257 } else if (IS_QLA2322(ha) || IS_QLA6322(ha))
3258 ha->fw_options[11] |= BIT_5 |
3259 ((rx_sens & (BIT_1 | BIT_0)) << 2) |
3260 (tx_sens & (BIT_1 | BIT_0));
3261 }
3262
3263 /* FCP2 options. */
3264 /* Return command IOCBs without waiting for an ABTS to complete. */
3265 ha->fw_options[3] |= BIT_13;
3266
3267 /* LED scheme. */
3268 if (ha->flags.enable_led_scheme)
3269 ha->fw_options[2] |= BIT_12;
3270
48c02fde 3271 /* Detect ISP6312. */
3272 if (IS_QLA6312(ha))
3273 ha->fw_options[2] |= BIT_13;
3274
088d09d4
GM		 3275 /* Set Retry FLOGI in case of P2P connection */
3276 if (ha->operating_mode == P2P) {
3277 ha->fw_options[2] |= BIT_3;
3278 ql_dbg(ql_dbg_disc, vha, 0x2100,
3279 "(%s): Setting FLOGI retry BIT in fw_options[2]: 0x%x\n",
3280 __func__, ha->fw_options[2]);
3281 }
3282
1da177e4 3283 /* Update firmware options. */
e315cd28 3284 qla2x00_set_fw_options(vha, ha->fw_options);
1da177e4
LT		 3285}
3286
0107109e 3287void
e315cd28 3288qla24xx_update_fw_options(scsi_qla_host_t *vha)
0107109e
AV		 3289{
3290 int rval;
e315cd28 3291 struct qla_hw_data *ha = vha->hw;
0107109e 3292
7ec0effd 3293 if (IS_P3P_TYPE(ha))
a9083016
GM		 3294 return;
3295
f198cafa
HM		 3296 /* Hold status IOCBs until ABTS response received. */
3297 if (ql2xfwholdabts)
3298 ha->fw_options[3] |= BIT_12;
3299
088d09d4
GM		 3300 /* Set Retry FLOGI in case of P2P connection */
3301 if (ha->operating_mode == P2P) {
3302 ha->fw_options[2] |= BIT_3;
3303 ql_dbg(ql_dbg_disc, vha, 0x2101,
3304 "(%s): Setting FLOGI retry BIT in fw_options[2]: 0x%x\n",
3305 __func__, ha->fw_options[2]);
3306 }
3307
41dc529a 3308 /* Move PUREX, ABTS RX & RIDA to ATIOQ */
3c4810ff
QT		 3309 if (ql2xmvasynctoatio &&
3310 (IS_QLA83XX(ha) || IS_QLA27XX(ha))) {
41dc529a
QT		 3311 if (qla_tgt_mode_enabled(vha) ||
3312 qla_dual_mode_enabled(vha))
3313 ha->fw_options[2] |= BIT_11;
3314 else
3315 ha->fw_options[2] &= ~BIT_11;
3316 }
3317
f7e761f5
QT		 3318 if (IS_QLA25XX(ha) || IS_QLA83XX(ha) || IS_QLA27XX(ha)) {
3319 /*
3320 * Tell FW to track each exchange to prevent
3321 * driver from using stale exchange.
3322 */
3323 if (qla_tgt_mode_enabled(vha) ||
3324 qla_dual_mode_enabled(vha))
3325 ha->fw_options[2] |= BIT_4;
3326 else
3327 ha->fw_options[2] &= ~BIT_4;
3328 }
3329
83548fe2
QT		 3330 ql_dbg(ql_dbg_init, vha, 0x00e8,
3331 "%s, add FW options 1-3 = 0x%04x 0x%04x 0x%04x mode %x\n",
3332 __func__, ha->fw_options[1], ha->fw_options[2],
3333 ha->fw_options[3], vha->host->active_mode);
3c4810ff
QT		 3334
3335 if (ha->fw_options[1] || ha->fw_options[2] || ha->fw_options[3])
3336 qla2x00_set_fw_options(vha, ha->fw_options);
41dc529a 3337
0107109e 3338 /* Update Serial Link options. */
f94097ed 3339 if ((le16_to_cpu(ha->fw_seriallink_options24[0]) & BIT_0) == 0)
0107109e
AV		 3340 return;
3341
e315cd28 3342 rval = qla2x00_set_serdes_params(vha,
f94097ed 3343 le16_to_cpu(ha->fw_seriallink_options24[1]),
3344 le16_to_cpu(ha->fw_seriallink_options24[2]),
3345 le16_to_cpu(ha->fw_seriallink_options24[3]));
0107109e 3346 if (rval != QLA_SUCCESS) {
7c3df132 3347 ql_log(ql_log_warn, vha, 0x0104,
0107109e
AV		 3348 "Unable to update Serial Link options (%x).\n", rval);
3349 }
3350}
3351
abbd8870 3352void
e315cd28 3353qla2x00_config_rings(struct scsi_qla_host *vha)
abbd8870 3354{
e315cd28 3355 struct qla_hw_data *ha = vha->hw;
3d71644c 3356 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
73208dfd
AC		 3357 struct req_que *req = ha->req_q_map[0];
3358 struct rsp_que *rsp = ha->rsp_q_map[0];
abbd8870
AV		 3359
3360 /* Setup ring parameters in initialization control block. */
ad950360
BVA		 3361 ha->init_cb->request_q_outpointer = cpu_to_le16(0);
3362 ha->init_cb->response_q_inpointer = cpu_to_le16(0);
e315cd28
AC		 3363 ha->init_cb->request_q_length = cpu_to_le16(req->length);
3364 ha->init_cb->response_q_length = cpu_to_le16(rsp->length);
3365 ha->init_cb->request_q_address[0] = cpu_to_le32(LSD(req->dma));
3366 ha->init_cb->request_q_address[1] = cpu_to_le32(MSD(req->dma));
3367 ha->init_cb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma));
3368 ha->init_cb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma));
abbd8870
AV		 3369
3370 WRT_REG_WORD(ISP_REQ_Q_IN(ha, reg), 0);
3371 WRT_REG_WORD(ISP_REQ_Q_OUT(ha, reg), 0);
3372 WRT_REG_WORD(ISP_RSP_Q_IN(ha, reg), 0);
3373 WRT_REG_WORD(ISP_RSP_Q_OUT(ha, reg), 0);
3374 RD_REG_WORD(ISP_RSP_Q_OUT(ha, reg)); /* PCI Posting. */
3375}
3376
0107109e 3377void
e315cd28 3378qla24xx_config_rings(struct scsi_qla_host *vha)
0107109e 3379{
e315cd28 3380 struct qla_hw_data *ha = vha->hw;
118e2ef9 3381 device_reg_t *reg = ISP_QUE_REG(ha, 0);
73208dfd
AC		 3382 struct device_reg_2xxx __iomem *ioreg = &ha->iobase->isp;
3383 struct qla_msix_entry *msix;
0107109e 3384 struct init_cb_24xx *icb;
73208dfd
AC		 3385 uint16_t rid = 0;
3386 struct req_que *req = ha->req_q_map[0];
3387 struct rsp_que *rsp = ha->rsp_q_map[0];
0107109e 3388
6246b8a1 3389 /* Setup ring parameters in initialization control block. */
0107109e 3390 icb = (struct init_cb_24xx *)ha->init_cb;
ad950360
BVA		 3391 icb->request_q_outpointer = cpu_to_le16(0);
3392 icb->response_q_inpointer = cpu_to_le16(0);
e315cd28
AC		 3393 icb->request_q_length = cpu_to_le16(req->length);
3394 icb->response_q_length = cpu_to_le16(rsp->length);
3395 icb->request_q_address[0] = cpu_to_le32(LSD(req->dma));
3396 icb->request_q_address[1] = cpu_to_le32(MSD(req->dma));
3397 icb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma));
3398 icb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma));
0107109e 3399
2d70c103 3400 /* Setup ATIO queue dma pointers for target mode */
ad950360 3401 icb->atio_q_inpointer = cpu_to_le16(0);
2d70c103
NB		 3402 icb->atio_q_length = cpu_to_le16(ha->tgt.atio_q_length);
3403 icb->atio_q_address[0] = cpu_to_le32(LSD(ha->tgt.atio_dma));
3404 icb->atio_q_address[1] = cpu_to_le32(MSD(ha->tgt.atio_dma));
3405
7c6300e3 3406 if (IS_SHADOW_REG_CAPABLE(ha))
ad950360 3407 icb->firmware_options_2 |= cpu_to_le32(BIT_30|BIT_29);
7c6300e3 3408
f73cb695 3409 if (ha->mqenable || IS_QLA83XX(ha) || IS_QLA27XX(ha)) {
ad950360
BVA		 3410 icb->qos = cpu_to_le16(QLA_DEFAULT_QUE_QOS);
3411 icb->rid = cpu_to_le16(rid);
73208dfd
AC		 3412 if (ha->flags.msix_enabled) {
3413 msix = &ha->msix_entries[1];
83548fe2 3414 ql_dbg(ql_dbg_init, vha, 0x0019,
7c3df132
SK		 3415 "Registering vector 0x%x for base que.\n",
3416 msix->entry);
73208dfd
AC		 3417 icb->msix = cpu_to_le16(msix->entry);
3418 }
3419 /* Use alternate PCI bus number */
3420 if (MSB(rid))
ad950360 3421 icb->firmware_options_2 |= cpu_to_le32(BIT_19);
73208dfd
AC		 3422 /* Use alternate PCI devfn */
3423 if (LSB(rid))
ad950360 3424 icb->firmware_options_2 |= cpu_to_le32(BIT_18);
73208dfd 3425
3155754a 3426 /* Use Disable MSIX Handshake mode for capable adapters */
6246b8a1
GM		 3427 if ((ha->fw_attributes & BIT_6) && (IS_MSIX_NACK_CAPABLE(ha)) &&
3428 (ha->flags.msix_enabled)) {
ad950360 3429 icb->firmware_options_2 &= cpu_to_le32(~BIT_22);
3155754a 3430 ha->flags.disable_msix_handshake = 1;
7c3df132
SK		 3431 ql_dbg(ql_dbg_init, vha, 0x00fe,
3432 "MSIX Handshake Disable Mode turned on.\n");
3155754a 3433 } else {
ad950360 3434 icb->firmware_options_2 |= cpu_to_le32(BIT_22);
3155754a 3435 }
ad950360 3436 icb->firmware_options_2 |= cpu_to_le32(BIT_23);
73208dfd
AC		 3437
3438 WRT_REG_DWORD(&reg->isp25mq.req_q_in, 0);
3439 WRT_REG_DWORD(&reg->isp25mq.req_q_out, 0);
3440 WRT_REG_DWORD(&reg->isp25mq.rsp_q_in, 0);
3441 WRT_REG_DWORD(&reg->isp25mq.rsp_q_out, 0);
3442 } else {
3443 WRT_REG_DWORD(&reg->isp24.req_q_in, 0);
3444 WRT_REG_DWORD(&reg->isp24.req_q_out, 0);
3445 WRT_REG_DWORD(&reg->isp24.rsp_q_in, 0);
3446 WRT_REG_DWORD(&reg->isp24.rsp_q_out, 0);
3447 }
aa230bc5 3448 qlt_24xx_config_rings(vha);
2d70c103 3449
73208dfd
AC		 3450 /* PCI posting */
3451 RD_REG_DWORD(&ioreg->hccr);
0107109e
AV		 3452}
3453
1da177e4
LT		 3454/**
3455 * qla2x00_init_rings() - Initializes firmware.
3456 * @ha: HA context
3457 *
3458 * Beginning of request ring has initialization control block already built
3459 * by nvram config routine.
3460 *
3461 * Returns 0 on success.
3462 */
8ae6d9c7 3463int
e315cd28 3464qla2x00_init_rings(scsi_qla_host_t *vha)
1da177e4
LT		 3465{
3466 int rval;
3467 unsigned long flags = 0;
29bdccbe 3468 int cnt, que;
e315cd28 3469 struct qla_hw_data *ha = vha->hw;
29bdccbe
AC		 3470 struct req_que *req;
3471 struct rsp_que *rsp;
2c3dfe3f
SJ		 3472 struct mid_init_cb_24xx *mid_init_cb =
3473 (struct mid_init_cb_24xx *) ha->init_cb;
1da177e4
LT		 3474
3475 spin_lock_irqsave(&ha->hardware_lock, flags);
3476
3477 /* Clear outstanding commands array. */
2afa19a9 3478 for (que = 0; que < ha->max_req_queues; que++) {
29bdccbe 3479 req = ha->req_q_map[que];
cb43285f 3480 if (!req || !test_bit(que, ha->req_qid_map))
29bdccbe 3481 continue;
7c6300e3
JC		 3482 req->out_ptr = (void *)(req->ring + req->length);
3483 *req->out_ptr = 0;
8d93f550 3484 for (cnt = 1; cnt < req->num_outstanding_cmds; cnt++)
29bdccbe 3485 req->outstanding_cmds[cnt] = NULL;
1da177e4 3486
2afa19a9 3487 req->current_outstanding_cmd = 1;
1da177e4 3488
29bdccbe
AC		 3489 /* Initialize firmware. */
3490 req->ring_ptr = req->ring;
3491 req->ring_index = 0;
3492 req->cnt = req->length;
3493 }
1da177e4 3494
2afa19a9 3495 for (que = 0; que < ha->max_rsp_queues; que++) {
29bdccbe 3496 rsp = ha->rsp_q_map[que];
cb43285f 3497 if (!rsp || !test_bit(que, ha->rsp_qid_map))
29bdccbe 3498 continue;
7c6300e3
JC		 3499 rsp->in_ptr = (void *)(rsp->ring + rsp->length);
3500 *rsp->in_ptr = 0;
29bdccbe 3501 /* Initialize response queue entries */
8ae6d9c7
GM		 3502 if (IS_QLAFX00(ha))
3503 qlafx00_init_response_q_entries(rsp);
3504 else
3505 qla2x00_init_response_q_entries(rsp);
29bdccbe 3506 }
1da177e4 3507
2d70c103
NB		 3508 ha->tgt.atio_ring_ptr = ha->tgt.atio_ring;
3509 ha->tgt.atio_ring_index = 0;
3510 /* Initialize ATIO queue entries */
3511 qlt_init_atio_q_entries(vha);
3512
e315cd28 3513 ha->isp_ops->config_rings(vha);
1da177e4
LT		 3514
3515 spin_unlock_irqrestore(&ha->hardware_lock, flags);
3516
8ae6d9c7
GM		 3517 ql_dbg(ql_dbg_init, vha, 0x00d1, "Issue init firmware.\n");
3518
3519 if (IS_QLAFX00(ha)) {
3520 rval = qlafx00_init_firmware(vha, ha->init_cb_size);
3521 goto next_check;
3522 }
3523
1da177e4 3524 /* Update any ISP specific firmware options before initialization. */
e315cd28 3525 ha->isp_ops->update_fw_options(vha);
1da177e4 3526
605aa2bc 3527 if (ha->flags.npiv_supported) {
45980cc2 3528 if (ha->operating_mode == LOOP && !IS_CNA_CAPABLE(ha))
605aa2bc 3529 ha->max_npiv_vports = MIN_MULTI_ID_FABRIC - 1;
c48339de 3530 mid_init_cb->count = cpu_to_le16(ha->max_npiv_vports);
605aa2bc
LC		 3531 }
3532
24a08138 3533 if (IS_FWI2_CAPABLE(ha)) {
ad950360 3534 mid_init_cb->options = cpu_to_le16(BIT_1);
24a08138 3535 mid_init_cb->init_cb.execution_throttle =
03e8c680 3536 cpu_to_le16(ha->cur_fw_xcb_count);
40f3862b
JC		 3537 ha->flags.dport_enabled =
3538 (mid_init_cb->init_cb.firmware_options_1 & BIT_7) != 0;
3539 ql_dbg(ql_dbg_init, vha, 0x0191, "DPORT Support: %s.\n",
3540 (ha->flags.dport_enabled) ? "enabled" : "disabled");
3541 /* FA-WWPN Status */
2486c627 3542 ha->flags.fawwpn_enabled =
40f3862b 3543 (mid_init_cb->init_cb.firmware_options_1 & BIT_6) != 0;
83548fe2 3544 ql_dbg(ql_dbg_init, vha, 0x00bc, "FA-WWPN Support: %s.\n",
2486c627 3545 (ha->flags.fawwpn_enabled) ? "enabled" : "disabled");
24a08138 3546 }
2c3dfe3f 3547
e315cd28 3548 rval = qla2x00_init_firmware(vha, ha->init_cb_size);
8ae6d9c7 3549next_check:
1da177e4 3550 if (rval) {
7c3df132
SK		 3551 ql_log(ql_log_fatal, vha, 0x00d2,
3552 "Init Firmware **** FAILED ****.\n");
1da177e4 3553 } else {
7c3df132
SK		 3554 ql_dbg(ql_dbg_init, vha, 0x00d3,
3555 "Init Firmware -- success.\n");
4b60c827 3556 QLA_FW_STARTED(ha);
1da177e4
LT		 3557 }
3558
3559 return (rval);
3560}
3561
3562/**
3563 * qla2x00_fw_ready() - Waits for firmware ready.
3564 * @ha: HA context
3565 *
3566 * Returns 0 on success.
3567 */
3568static int
e315cd28 3569qla2x00_fw_ready(scsi_qla_host_t *vha)
1da177e4
LT		 3570{
3571 int rval;
4d4df193 3572 unsigned long wtime, mtime, cs84xx_time;
1da177e4
LT		 3573 uint16_t min_wait; /* Minimum wait time if loop is down */
3574 uint16_t wait_time; /* Wait time if loop is coming ready */
b5a340dd 3575 uint16_t state[6];
e315cd28 3576 struct qla_hw_data *ha = vha->hw;
1da177e4 3577
8ae6d9c7
GM		 3578 if (IS_QLAFX00(vha->hw))
3579 return qlafx00_fw_ready(vha);
3580
1da177e4
LT		 3581 rval = QLA_SUCCESS;
3582
33461491
CD		 3583 /* Time to wait for loop down */
3584 if (IS_P3P_TYPE(ha))
3585 min_wait = 30;
3586 else
3587 min_wait = 20;
1da177e4
LT		 3588
3589 /*
3590 * Firmware should take at most one RATOV to login, plus 5 seconds for
3591 * our own processing.
3592 */
3593 if ((wait_time = (ha->retry_count*ha->login_timeout) + 5) < min_wait) {
3594 wait_time = min_wait;
3595 }
3596
3597 /* Min wait time if loop down */
3598 mtime = jiffies + (min_wait * HZ);
3599
3600 /* wait time before firmware ready */
3601 wtime = jiffies + (wait_time * HZ);
3602
3603 /* Wait for ISP to finish LIP */
e315cd28 3604 if (!vha->flags.init_done)
7c3df132
SK		 3605 ql_log(ql_log_info, vha, 0x801e,
3606 "Waiting for LIP to complete.\n");
1da177e4
LT		 3607
3608 do {
5b939038 3609 memset(state, -1, sizeof(state));
e315cd28 3610 rval = qla2x00_get_firmware_state(vha, state);
1da177e4 3611 if (rval == QLA_SUCCESS) {
4d4df193 3612 if (state[0] < FSTATE_LOSS_OF_SYNC) {
e315cd28 3613 vha->device_flags &= ~DFLG_NO_CABLE;
1da177e4 3614 }
4d4df193 3615 if (IS_QLA84XX(ha) && state[0] != FSTATE_READY) {
7c3df132
SK		 3616 ql_dbg(ql_dbg_taskm, vha, 0x801f,
3617 "fw_state=%x 84xx=%x.\n", state[0],
3618 state[2]);
4d4df193
HK		 3619 if ((state[2] & FSTATE_LOGGED_IN) &&
3620 (state[2] & FSTATE_WAITING_FOR_VERIFY)) {
7c3df132
SK		 3621 ql_dbg(ql_dbg_taskm, vha, 0x8028,
3622 "Sending verify iocb.\n");
4d4df193
HK		 3623
3624 cs84xx_time = jiffies;
e315cd28 3625 rval = qla84xx_init_chip(vha);
7c3df132
SK		 3626 if (rval != QLA_SUCCESS) {
3627 ql_log(ql_log_warn,
cfb0919c 3628 vha, 0x8007,
7c3df132 3629 "Init chip failed.\n");
4d4df193 3630 break;
7c3df132 3631 }
4d4df193
HK		 3632
3633 /* Add time taken to initialize. */
3634 cs84xx_time = jiffies - cs84xx_time;
3635 wtime += cs84xx_time;
3636 mtime += cs84xx_time;
cfb0919c 3637 ql_dbg(ql_dbg_taskm, vha, 0x8008,
7c3df132
SK		 3638 "Increasing wait time by %ld. "
3639 "New time %ld.\n", cs84xx_time,
3640 wtime);
4d4df193
HK		 3641 }
3642 } else if (state[0] == FSTATE_READY) {
7c3df132
SK		 3643 ql_dbg(ql_dbg_taskm, vha, 0x8037,
3644 "F/W Ready - OK.\n");
1da177e4 3645
e315cd28 3646 qla2x00_get_retry_cnt(vha, &ha->retry_count,
1da177e4
LT		 3647 &ha->login_timeout, &ha->r_a_tov);
3648
3649 rval = QLA_SUCCESS;
3650 break;
3651 }
3652
3653 rval = QLA_FUNCTION_FAILED;
3654
e315cd28 3655 if (atomic_read(&vha->loop_down_timer) &&
4d4df193 3656 state[0] != FSTATE_READY) {
1da177e4 3657 /* Loop down. Timeout on min_wait for states
fa2a1ce5
AV		 3658 * other than Wait for Login.
3659 */
1da177e4 3660 if (time_after_eq(jiffies, mtime)) {
7c3df132 3661 ql_log(ql_log_info, vha, 0x8038,
1da177e4
LT		 3662 "Cable is unplugged...\n");
3663
e315cd28 3664 vha->device_flags |= DFLG_NO_CABLE;
1da177e4
LT		 3665 break;
3666 }
3667 }
3668 } else {
3669 /* Mailbox cmd failed. Timeout on min_wait. */
cdbb0a4f 3670 if (time_after_eq(jiffies, mtime) ||
7190575f 3671 ha->flags.isp82xx_fw_hung)
1da177e4
LT		 3672 break;
3673 }
3674
3675 if (time_after_eq(jiffies, wtime))
3676 break;
3677
3678 /* Delay for a while */
3679 msleep(500);
1da177e4
LT		 3680 } while (1);
3681
7c3df132 3682 ql_dbg(ql_dbg_taskm, vha, 0x803a,
b5a340dd
JC		 3683 "fw_state=%x (%x, %x, %x, %x %x) curr time=%lx.\n", state[0],
3684 state[1], state[2], state[3], state[4], state[5], jiffies);
1da177e4 3685
cfb0919c 3686 if (rval && !(vha->device_flags & DFLG_NO_CABLE)) {
7c3df132
SK		 3687 ql_log(ql_log_warn, vha, 0x803b,
3688 "Firmware ready **** FAILED ****.\n");
1da177e4
LT		 3689 }
3690
3691 return (rval);
3692}
3693
3694/*
3695* qla2x00_configure_hba
3696* Setup adapter context.
3697*
3698* Input:
3699* ha = adapter state pointer.
3700*
3701* Returns:
3702* 0 = success
3703*
3704* Context:
3705* Kernel context.
3706*/
3707static int
e315cd28 3708qla2x00_configure_hba(scsi_qla_host_t *vha)
1da177e4
LT		 3709{
3710 int rval;
3711 uint16_t loop_id;
3712 uint16_t topo;
2c3dfe3f 3713 uint16_t sw_cap;
1da177e4
LT		 3714 uint8_t al_pa;
3715 uint8_t area;
3716 uint8_t domain;
3717 char connect_type[22];
e315cd28 3718 struct qla_hw_data *ha = vha->hw;
61e1b269 3719 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
482c9dc7 3720 port_id_t id;
1da177e4
LT		 3721
3722 /* Get host addresses. */
e315cd28 3723 rval = qla2x00_get_adapter_id(vha,
2c3dfe3f 3724 &loop_id, &al_pa, &area, &domain, &topo, &sw_cap);
1da177e4 3725 if (rval != QLA_SUCCESS) {
e315cd28 3726 if (LOOP_TRANSITION(vha) || atomic_read(&ha->loop_down_timer) ||
6246b8a1 3727 IS_CNA_CAPABLE(ha) ||
33135aa2 3728 (rval == QLA_COMMAND_ERROR && loop_id == 0x7)) {
7c3df132
SK		 3729 ql_dbg(ql_dbg_disc, vha, 0x2008,
3730 "Loop is in a transition state.\n");
33135aa2 3731 } else {
7c3df132
SK		 3732 ql_log(ql_log_warn, vha, 0x2009,
3733 "Unable to get host loop ID.\n");
61e1b269
JC		 3734 if (IS_FWI2_CAPABLE(ha) && (vha == base_vha) &&
3735 (rval == QLA_COMMAND_ERROR && loop_id == 0x1b)) {
3736 ql_log(ql_log_warn, vha, 0x1151,
3737 "Doing link init.\n");
3738 if (qla24xx_link_initialize(vha) == QLA_SUCCESS)
3739 return rval;
3740 }
e315cd28 3741 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
33135aa2 3742 }
1da177e4
LT		 3743 return (rval);
3744 }
3745
3746 if (topo == 4) {
7c3df132
SK		 3747 ql_log(ql_log_info, vha, 0x200a,
3748 "Cannot get topology - retrying.\n");
1da177e4
LT		 3749 return (QLA_FUNCTION_FAILED);
3750 }
3751
e315cd28 3752 vha->loop_id = loop_id;
1da177e4
LT		 3753
3754 /* initialize */
3755 ha->min_external_loopid = SNS_FIRST_LOOP_ID;
3756 ha->operating_mode = LOOP;
2c3dfe3f 3757 ha->switch_cap = 0;
1da177e4
LT		 3758
3759 switch (topo) {
3760 case 0:
7c3df132 3761 ql_dbg(ql_dbg_disc, vha, 0x200b, "HBA in NL topology.\n");
1da177e4
LT		 3762 ha->current_topology = ISP_CFG_NL;
3763 strcpy(connect_type, "(Loop)");
3764 break;
3765
3766 case 1:
7c3df132 3767 ql_dbg(ql_dbg_disc, vha, 0x200c, "HBA in FL topology.\n");
2c3dfe3f 3768 ha->switch_cap = sw_cap;
1da177e4
LT		 3769 ha->current_topology = ISP_CFG_FL;
3770 strcpy(connect_type, "(FL_Port)");
3771 break;
3772
3773 case 2:
7c3df132 3774 ql_dbg(ql_dbg_disc, vha, 0x200d, "HBA in N P2P topology.\n");
1da177e4
LT		 3775 ha->operating_mode = P2P;
3776 ha->current_topology = ISP_CFG_N;
3777 strcpy(connect_type, "(N_Port-to-N_Port)");
3778 break;
3779
3780 case 3:
7c3df132 3781 ql_dbg(ql_dbg_disc, vha, 0x200e, "HBA in F P2P topology.\n");
2c3dfe3f 3782 ha->switch_cap = sw_cap;
1da177e4
LT		 3783 ha->operating_mode = P2P;
3784 ha->current_topology = ISP_CFG_F;
3785 strcpy(connect_type, "(F_Port)");
3786 break;
3787
3788 default:
7c3df132
SK		 3789 ql_dbg(ql_dbg_disc, vha, 0x200f,
3790 "HBA in unknown topology %x, using NL.\n", topo);
1da177e4
LT		 3791 ha->current_topology = ISP_CFG_NL;
3792 strcpy(connect_type, "(Loop)");
3793 break;
3794 }
3795
3796 /* Save Host port and loop ID. */
3797 /* byte order - Big Endian */
482c9dc7
QT		 3798 id.b.domain = domain;
3799 id.b.area = area;
3800 id.b.al_pa = al_pa;
3801 id.b.rsvd_1 = 0;
3802 qlt_update_host_map(vha, id);
2d70c103 3803
e315cd28 3804 if (!vha->flags.init_done)
7c3df132
SK		 3805 ql_log(ql_log_info, vha, 0x2010,
3806 "Topology - %s, Host Loop address 0x%x.\n",
e315cd28 3807 connect_type, vha->loop_id);
1da177e4 3808
1da177e4
LT		 3809 return(rval);
3810}
3811
a9083016 3812inline void
e315cd28
AC		 3813qla2x00_set_model_info(scsi_qla_host_t *vha, uint8_t *model, size_t len,
3814 char *def)
9bb9fcf2
AV		 3815{
3816 char *st, *en;
3817 uint16_t index;
e315cd28 3818 struct qla_hw_data *ha = vha->hw;
ab671149 3819 int use_tbl = !IS_QLA24XX_TYPE(ha) && !IS_QLA25XX(ha) &&
6246b8a1 3820 !IS_CNA_CAPABLE(ha) && !IS_QLA2031(ha);
9bb9fcf2
AV		 3821
3822 if (memcmp(model, BINZERO, len) != 0) {
3823 strncpy(ha->model_number, model, len);
3824 st = en = ha->model_number;
3825 en += len - 1;
3826 while (en > st) {
3827 if (*en != 0x20 && *en != 0x00)
3828 break;
3829 *en-- = '\0';
3830 }
3831
3832 index = (ha->pdev->subsystem_device & 0xff);
7d0dba17
AV		 3833 if (use_tbl &&
3834 ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC &&
9bb9fcf2 3835 index < QLA_MODEL_NAMES)
1ee27146
JC		 3836 strncpy(ha->model_desc,
3837 qla2x00_model_name[index * 2 + 1],
3838 sizeof(ha->model_desc) - 1);
9bb9fcf2
AV		 3839 } else {
3840 index = (ha->pdev->subsystem_device & 0xff);
7d0dba17
AV		 3841 if (use_tbl &&
3842 ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC &&
9bb9fcf2
AV		 3843 index < QLA_MODEL_NAMES) {
3844 strcpy(ha->model_number,
3845 qla2x00_model_name[index * 2]);
1ee27146
JC		 3846 strncpy(ha->model_desc,
3847 qla2x00_model_name[index * 2 + 1],
3848 sizeof(ha->model_desc) - 1);
9bb9fcf2
AV		 3849 } else {
3850 strcpy(ha->model_number, def);
3851 }
3852 }
1ee27146 3853 if (IS_FWI2_CAPABLE(ha))
e315cd28 3854 qla2xxx_get_vpd_field(vha, "\x82", ha->model_desc,
1ee27146 3855 sizeof(ha->model_desc));
9bb9fcf2
AV		 3856}
3857
4e08df3f
DM		 3858/* On sparc systems, obtain port and node WWN from firmware
3859 * properties.
3860 */
e315cd28 3861static void qla2xxx_nvram_wwn_from_ofw(scsi_qla_host_t *vha, nvram_t *nv)
4e08df3f
DM		 3862{
3863#ifdef CONFIG_SPARC
e315cd28 3864 struct qla_hw_data *ha = vha->hw;
4e08df3f 3865 struct pci_dev *pdev = ha->pdev;
15576bc8
DM		 3866 struct device_node *dp = pci_device_to_OF_node(pdev);
3867 const u8 *val;
4e08df3f
DM		 3868 int len;
3869
3870 val = of_get_property(dp, "port-wwn", &len);
3871 if (val && len >= WWN_SIZE)
3872 memcpy(nv->port_name, val, WWN_SIZE);
3873
3874 val = of_get_property(dp, "node-wwn", &len);
3875 if (val && len >= WWN_SIZE)
3876 memcpy(nv->node_name, val, WWN_SIZE);
3877#endif
3878}
3879
1da177e4
LT		 3880/*
3881* NVRAM configuration for ISP 2xxx
3882*
3883* Input:
3884* ha = adapter block pointer.
3885*
3886* Output:
3887* initialization control block in response_ring
3888* host adapters parameters in host adapter block
3889*
3890* Returns:
3891* 0 = success.
3892*/
abbd8870 3893int
e315cd28 3894qla2x00_nvram_config(scsi_qla_host_t *vha)
1da177e4 3895{
4e08df3f 3896 int rval;
0107109e
AV		 3897 uint8_t chksum = 0;
3898 uint16_t cnt;
3899 uint8_t *dptr1, *dptr2;
e315cd28 3900 struct qla_hw_data *ha = vha->hw;
0107109e 3901 init_cb_t *icb = ha->init_cb;
281afe19
SJ		 3902 nvram_t *nv = ha->nvram;
3903 uint8_t *ptr = ha->nvram;
3d71644c 3904 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1da177e4 3905
4e08df3f
DM		 3906 rval = QLA_SUCCESS;
3907
1da177e4 3908 /* Determine NVRAM starting address. */
0107109e 3909 ha->nvram_size = sizeof(nvram_t);
1da177e4
LT		 3910 ha->nvram_base = 0;
3911 if (!IS_QLA2100(ha) && !IS_QLA2200(ha) && !IS_QLA2300(ha))
3912 if ((RD_REG_WORD(&reg->ctrl_status) >> 14) == 1)
3913 ha->nvram_base = 0x80;
3914
3915 /* Get NVRAM data and calculate checksum. */
e315cd28 3916 ha->isp_ops->read_nvram(vha, ptr, ha->nvram_base, ha->nvram_size);
0107109e
AV		 3917 for (cnt = 0, chksum = 0; cnt < ha->nvram_size; cnt++)
3918 chksum += *ptr++;
1da177e4 3919
7c3df132
SK		 3920 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x010f,
3921 "Contents of NVRAM.\n");
3922 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0110,
3923 (uint8_t *)nv, ha->nvram_size);
1da177e4
LT		 3924
3925 /* Bad NVRAM data, set defaults parameters. */
3926 if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' ||
3927 nv->id[2] != 'P' || nv->id[3] != ' ' || nv->nvram_version < 1) {
3928 /* Reset NVRAM data. */
7c3df132 3929 ql_log(ql_log_warn, vha, 0x0064,
9e336520 3930 "Inconsistent NVRAM "
7c3df132
SK		 3931 "detected: checksum=0x%x id=%c version=0x%x.\n",
3932 chksum, nv->id[0], nv->nvram_version);
3933 ql_log(ql_log_warn, vha, 0x0065,
3934 "Falling back to "
3935 "functioning (yet invalid -- WWPN) defaults.\n");
4e08df3f
DM		 3936
3937 /*
3938 * Set default initialization control block.
3939 */
3940 memset(nv, 0, ha->nvram_size);
3941 nv->parameter_block_version = ICB_VERSION;
3942
3943 if (IS_QLA23XX(ha)) {
3944 nv->firmware_options[0] = BIT_2 | BIT_1;
3945 nv->firmware_options[1] = BIT_7 | BIT_5;
3946 nv->add_firmware_options[0] = BIT_5;
3947 nv->add_firmware_options[1] = BIT_5 | BIT_4;
98aee70d 3948 nv->frame_payload_size = 2048;
4e08df3f
DM		 3949 nv->special_options[1] = BIT_7;
3950 } else if (IS_QLA2200(ha)) {
3951 nv->firmware_options[0] = BIT_2 | BIT_1;
3952 nv->firmware_options[1] = BIT_7 | BIT_5;
3953 nv->add_firmware_options[0] = BIT_5;
3954 nv->add_firmware_options[1] = BIT_5 | BIT_4;
98aee70d 3955 nv->frame_payload_size = 1024;
4e08df3f
DM		 3956 } else if (IS_QLA2100(ha)) {
3957 nv->firmware_options[0] = BIT_3 | BIT_1;
3958 nv->firmware_options[1] = BIT_5;
98aee70d 3959 nv->frame_payload_size = 1024;
4e08df3f
DM		 3960 }
3961
ad950360
BVA		 3962 nv->max_iocb_allocation = cpu_to_le16(256);
3963 nv->execution_throttle = cpu_to_le16(16);
4e08df3f
DM		 3964 nv->retry_count = 8;
3965 nv->retry_delay = 1;
3966
3967 nv->port_name[0] = 33;
3968 nv->port_name[3] = 224;
3969 nv->port_name[4] = 139;
3970
e315cd28 3971 qla2xxx_nvram_wwn_from_ofw(vha, nv);
4e08df3f
DM		 3972
3973 nv->login_timeout = 4;
3974
3975 /*
3976 * Set default host adapter parameters
3977 */
3978 nv->host_p[1] = BIT_2;
3979 nv->reset_delay = 5;
3980 nv->port_down_retry_count = 8;
ad950360 3981 nv->max_luns_per_target = cpu_to_le16(8);
4e08df3f
DM		 3982 nv->link_down_timeout = 60;
3983
3984 rval = 1;
1da177e4
LT		 3985 }
3986
3987#if defined(CONFIG_IA64_GENERIC) || defined(CONFIG_IA64_SGI_SN2)
3988 /*
3989 * The SN2 does not provide BIOS emulation which means you can't change
3990 * potentially bogus BIOS settings. Force the use of default settings
3991 * for link rate and frame size. Hope that the rest of the settings
3992 * are valid.
3993 */
3994 if (ia64_platform_is("sn2")) {
98aee70d 3995 nv->frame_payload_size = 2048;
1da177e4
LT		 3996 if (IS_QLA23XX(ha))
3997 nv->special_options[1] = BIT_7;
3998 }
3999#endif
4000
4001 /* Reset Initialization control block */
0107109e 4002 memset(icb, 0, ha->init_cb_size);
1da177e4
LT		 4003
4004 /*
4005 * Setup driver NVRAM options.
4006 */
4007 nv->firmware_options[0] |= (BIT_6 | BIT_1);
4008 nv->firmware_options[0] &= ~(BIT_5 | BIT_4);
4009 nv->firmware_options[1] |= (BIT_5 | BIT_0);
4010 nv->firmware_options[1] &= ~BIT_4;
4011
4012 if (IS_QLA23XX(ha)) {
4013 nv->firmware_options[0] |= BIT_2;
4014 nv->firmware_options[0] &= ~BIT_3;
2d70c103 4015 nv->special_options[0] &= ~BIT_6;
0107109e 4016 nv->add_firmware_options[1] |= BIT_5 | BIT_4;
1da177e4
LT		 4017
4018 if (IS_QLA2300(ha)) {
4019 if (ha->fb_rev == FPM_2310) {
4020 strcpy(ha->model_number, "QLA2310");
4021 } else {
4022 strcpy(ha->model_number, "QLA2300");
4023 }
4024 } else {
e315cd28 4025 qla2x00_set_model_info(vha, nv->model_number,
9bb9fcf2 4026 sizeof(nv->model_number), "QLA23xx");
1da177e4
LT		 4027 }
4028 } else if (IS_QLA2200(ha)) {
4029 nv->firmware_options[0] |= BIT_2;
4030 /*
4031 * 'Point-to-point preferred, else loop' is not a safe
4032 * connection mode setting.
4033 */
4034 if ((nv->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) ==
4035 (BIT_5 | BIT_4)) {
4036 /* Force 'loop preferred, else point-to-point'. */
4037 nv->add_firmware_options[0] &= ~(BIT_6 | BIT_5 | BIT_4);
4038 nv->add_firmware_options[0] |= BIT_5;
4039 }
4040 strcpy(ha->model_number, "QLA22xx");
4041 } else /*if (IS_QLA2100(ha))*/ {
4042 strcpy(ha->model_number, "QLA2100");
4043 }
4044
4045 /*
4046 * Copy over NVRAM RISC parameter block to initialization control block.
4047 */
4048 dptr1 = (uint8_t *)icb;
4049 dptr2 = (uint8_t *)&nv->parameter_block_version;
4050 cnt = (uint8_t *)&icb->request_q_outpointer - (uint8_t *)&icb->version;
4051 while (cnt--)
4052 *dptr1++ = *dptr2++;
4053
4054 /* Copy 2nd half. */
4055 dptr1 = (uint8_t *)icb->add_firmware_options;
4056 cnt = (uint8_t *)icb->reserved_3 - (uint8_t *)icb->add_firmware_options;
4057 while (cnt--)
4058 *dptr1++ = *dptr2++;
4059
5341e868
AV		 4060 /* Use alternate WWN? */
4061 if (nv->host_p[1] & BIT_7) {
4062 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
4063 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
4064 }
4065
1da177e4
LT		 4066 /* Prepare nodename */
4067 if ((icb->firmware_options[1] & BIT_6) == 0) {
4068 /*
4069 * Firmware will apply the following mask if the nodename was
4070 * not provided.
4071 */
4072 memcpy(icb->node_name, icb->port_name, WWN_SIZE);
4073 icb->node_name[0] &= 0xF0;
4074 }
4075
4076 /*
4077 * Set host adapter parameters.
4078 */
3ce8866c
SK		 4079
4080 /*
4081 * BIT_7 in the host-parameters section allows for modification to
4082 * internal driver logging.
4083 */
0181944f 4084 if (nv->host_p[0] & BIT_7)
cfb0919c 4085 ql2xextended_error_logging = QL_DBG_DEFAULT1_MASK;
1da177e4
LT		 4086 ha->flags.disable_risc_code_load = ((nv->host_p[0] & BIT_4) ? 1 : 0);
4087 /* Always load RISC code on non ISP2[12]00 chips. */
4088 if (!IS_QLA2100(ha) && !IS_QLA2200(ha))
4089 ha->flags.disable_risc_code_load = 0;
4090 ha->flags.enable_lip_reset = ((nv->host_p[1] & BIT_1) ? 1 : 0);
4091 ha->flags.enable_lip_full_login = ((nv->host_p[1] & BIT_2) ? 1 : 0);
4092 ha->flags.enable_target_reset = ((nv->host_p[1] & BIT_3) ? 1 : 0);
06c22bd1 4093 ha->flags.enable_led_scheme = (nv->special_options[1] & BIT_4) ? 1 : 0;
d4c760c2 4094 ha->flags.disable_serdes = 0;
1da177e4
LT		 4095
4096 ha->operating_mode =
4097 (icb->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) >> 4;
4098
4099 memcpy(ha->fw_seriallink_options, nv->seriallink_options,
4100 sizeof(ha->fw_seriallink_options));
4101
4102 /* save HBA serial number */
4103 ha->serial0 = icb->port_name[5];
4104 ha->serial1 = icb->port_name[6];
4105 ha->serial2 = icb->port_name[7];
e315cd28
AC		 4106 memcpy(vha->node_name, icb->node_name, WWN_SIZE);
4107 memcpy(vha->port_name, icb->port_name, WWN_SIZE);
1da177e4 4108
ad950360 4109 icb->execution_throttle = cpu_to_le16(0xFFFF);
1da177e4
LT		 4110
4111 ha->retry_count = nv->retry_count;
4112
4113 /* Set minimum login_timeout to 4 seconds. */
5b91490e 4114 if (nv->login_timeout != ql2xlogintimeout)
1da177e4
LT		 4115 nv->login_timeout = ql2xlogintimeout;
4116 if (nv->login_timeout < 4)
4117 nv->login_timeout = 4;
4118 ha->login_timeout = nv->login_timeout;
1da177e4 4119
00a537b8
AV		 4120 /* Set minimum RATOV to 100 tenths of a second. */
4121 ha->r_a_tov = 100;
1da177e4 4122
1da177e4
LT		 4123 ha->loop_reset_delay = nv->reset_delay;
4124
1da177e4
LT		 4125 /* Link Down Timeout = 0:
4126 *
4127 * When Port Down timer expires we will start returning
4128 * I/O's to OS with "DID_NO_CONNECT".
4129 *
4130 * Link Down Timeout != 0:
4131 *
4132 * The driver waits for the link to come up after link down
4133 * before returning I/Os to OS with "DID_NO_CONNECT".
fa2a1ce5 4134 */
1da177e4
LT		 4135 if (nv->link_down_timeout == 0) {
4136 ha->loop_down_abort_time =
354d6b21 4137 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
1da177e4
LT		 4138 } else {
4139 ha->link_down_timeout = nv->link_down_timeout;
4140 ha->loop_down_abort_time =
4141 (LOOP_DOWN_TIME - ha->link_down_timeout);
fa2a1ce5 4142 }
1da177e4 4143
1da177e4
LT		 4144 /*
4145 * Need enough time to try and get the port back.
4146 */
4147 ha->port_down_retry_count = nv->port_down_retry_count;
4148 if (qlport_down_retry)
4149 ha->port_down_retry_count = qlport_down_retry;
4150 /* Set login_retry_count */
4151 ha->login_retry_count = nv->retry_count;
4152 if (ha->port_down_retry_count == nv->port_down_retry_count &&
4153 ha->port_down_retry_count > 3)
4154 ha->login_retry_count = ha->port_down_retry_count;
4155 else if (ha->port_down_retry_count > (int)ha->login_retry_count)
4156 ha->login_retry_count = ha->port_down_retry_count;
4157 if (ql2xloginretrycount)
4158 ha->login_retry_count = ql2xloginretrycount;
4159
ad950360 4160 icb->lun_enables = cpu_to_le16(0);
1da177e4
LT		 4161 icb->command_resource_count = 0;
4162 icb->immediate_notify_resource_count = 0;
ad950360 4163 icb->timeout = cpu_to_le16(0);
1da177e4
LT		 4164
4165 if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
4166 /* Enable RIO */
4167 icb->firmware_options[0] &= ~BIT_3;
4168 icb->add_firmware_options[0] &=
4169 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0);
4170 icb->add_firmware_options[0] |= BIT_2;
4171 icb->response_accumulation_timer = 3;
4172 icb->interrupt_delay_timer = 5;
4173
e315cd28 4174 vha->flags.process_response_queue = 1;
1da177e4 4175 } else {
4fdfefe5 4176 /* Enable ZIO. */
e315cd28 4177 if (!vha->flags.init_done) {
4fdfefe5
AV		 4178 ha->zio_mode = icb->add_firmware_options[0] &
4179 (BIT_3 | BIT_2 | BIT_1 | BIT_0);
4180 ha->zio_timer = icb->interrupt_delay_timer ?
4181 icb->interrupt_delay_timer: 2;
4182 }
1da177e4
LT		 4183 icb->add_firmware_options[0] &=
4184 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0);
e315cd28 4185 vha->flags.process_response_queue = 0;
4fdfefe5 4186 if (ha->zio_mode != QLA_ZIO_DISABLED) {
4a59f71d 4187 ha->zio_mode = QLA_ZIO_MODE_6;
4188
7c3df132 4189 ql_log(ql_log_info, vha, 0x0068,
4fdfefe5
AV		 4190 "ZIO mode %d enabled; timer delay (%d us).\n",
4191 ha->zio_mode, ha->zio_timer * 100);
1da177e4 4192
4fdfefe5
AV		 4193 icb->add_firmware_options[0] |= (uint8_t)ha->zio_mode;
4194 icb->interrupt_delay_timer = (uint8_t)ha->zio_timer;
e315cd28 4195 vha->flags.process_response_queue = 1;
1da177e4
LT		 4196 }
4197 }
4198
4e08df3f 4199 if (rval) {
7c3df132
SK		 4200 ql_log(ql_log_warn, vha, 0x0069,
4201 "NVRAM configuration failed.\n");
4e08df3f
DM		 4202 }
4203 return (rval);
1da177e4
LT		 4204}
4205
19a7b4ae
JSEC		 4206static void
4207qla2x00_rport_del(void *data)
4208{
4209 fc_port_t *fcport = data;
d97994dc 4210 struct fc_rport *rport;
044d78e1 4211 unsigned long flags;
d97994dc 4212
044d78e1 4213 spin_lock_irqsave(fcport->vha->host->host_lock, flags);
ac280b67 4214 rport = fcport->drport ? fcport->drport: fcport->rport;
d97994dc 4215 fcport->drport = NULL;
044d78e1 4216 spin_unlock_irqrestore(fcport->vha->host->host_lock, flags);
726b8548 4217 if (rport) {
83548fe2
QT		 4218 ql_dbg(ql_dbg_disc, fcport->vha, 0x210b,
4219 "%s %8phN. rport %p roles %x\n",
4220 __func__, fcport->port_name, rport,
4221 rport->roles);
726b8548 4222
d97994dc 4223 fc_remote_port_delete(rport);
726b8548 4224 }
19a7b4ae
JSEC		 4225}
4226
1da177e4
LT		 4227/**
4228 * qla2x00_alloc_fcport() - Allocate a generic fcport.
4229 * @ha: HA context
4230 * @flags: allocation flags
4231 *
4232 * Returns a pointer to the allocated fcport, or NULL, if none available.
4233 */
9a069e19 4234fc_port_t *
e315cd28 4235qla2x00_alloc_fcport(scsi_qla_host_t *vha, gfp_t flags)
1da177e4
LT		 4236{
4237 fc_port_t *fcport;
4238
bbfbbbc1
MK		 4239 fcport = kzalloc(sizeof(fc_port_t), flags);
4240 if (!fcport)
4241 return NULL;
1da177e4
LT		 4242
4243 /* Setup fcport template structure. */
e315cd28 4244 fcport->vha = vha;
1da177e4
LT		 4245 fcport->port_type = FCT_UNKNOWN;
4246 fcport->loop_id = FC_NO_LOOP_ID;
ec426e10 4247 qla2x00_set_fcport_state(fcport, FCS_UNCONFIGURED);
ad3e0eda 4248 fcport->supported_classes = FC_COS_UNSPECIFIED;
1da177e4 4249
726b8548
QT		 4250 fcport->ct_desc.ct_sns = dma_alloc_coherent(&vha->hw->pdev->dev,
4251 sizeof(struct ct_sns_pkt), &fcport->ct_desc.ct_sns_dma,
6cb3216a 4252 flags);
726b8548
QT		 4253 fcport->disc_state = DSC_DELETED;
4254 fcport->fw_login_state = DSC_LS_PORT_UNAVAIL;
4255 fcport->deleted = QLA_SESS_DELETED;
4256 fcport->login_retry = vha->hw->login_retry_count;
4257 fcport->login_retry = 5;
4258 fcport->logout_on_delete = 1;
4259
4260 if (!fcport->ct_desc.ct_sns) {
83548fe2 4261 ql_log(ql_log_warn, vha, 0xd049,
726b8548
QT		 4262 "Failed to allocate ct_sns request.\n");
4263 kfree(fcport);
4264 fcport = NULL;
4265 }
4266 INIT_WORK(&fcport->del_work, qla24xx_delete_sess_fn);
4267 INIT_LIST_HEAD(&fcport->gnl_entry);
4268 INIT_LIST_HEAD(&fcport->list);
4269
bbfbbbc1 4270 return fcport;
1da177e4
LT		 4271}
4272
726b8548
QT		 4273void
4274qla2x00_free_fcport(fc_port_t *fcport)
4275{
4276 if (fcport->ct_desc.ct_sns) {
4277 dma_free_coherent(&fcport->vha->hw->pdev->dev,
4278 sizeof(struct ct_sns_pkt), fcport->ct_desc.ct_sns,
4279 fcport->ct_desc.ct_sns_dma);
4280
4281 fcport->ct_desc.ct_sns = NULL;
4282 }
4283 kfree(fcport);
4284}
4285
1da177e4
LT		 4286/*
4287 * qla2x00_configure_loop
4288 * Updates Fibre Channel Device Database with what is actually on loop.
4289 *
4290 * Input:
4291 * ha = adapter block pointer.
4292 *
4293 * Returns:
4294 * 0 = success.
4295 * 1 = error.
4296 * 2 = database was full and device was not configured.
4297 */
4298static int
e315cd28 4299qla2x00_configure_loop(scsi_qla_host_t *vha)
1da177e4
LT		 4300{
4301 int rval;
4302 unsigned long flags, save_flags;
e315cd28 4303 struct qla_hw_data *ha = vha->hw;
1da177e4
LT		 4304 rval = QLA_SUCCESS;
4305
4306 /* Get Initiator ID */
e315cd28
AC		 4307 if (test_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags)) {
4308 rval = qla2x00_configure_hba(vha);
1da177e4 4309 if (rval != QLA_SUCCESS) {
7c3df132
SK		 4310 ql_dbg(ql_dbg_disc, vha, 0x2013,
4311 "Unable to configure HBA.\n");
1da177e4
LT		 4312 return (rval);
4313 }
4314 }
4315
e315cd28 4316 save_flags = flags = vha->dpc_flags;
7c3df132
SK		 4317 ql_dbg(ql_dbg_disc, vha, 0x2014,
4318 "Configure loop -- dpc flags = 0x%lx.\n", flags);
1da177e4
LT		 4319
4320 /*
4321 * If we have both an RSCN and PORT UPDATE pending then handle them
4322 * both at the same time.
4323 */
e315cd28
AC		 4324 clear_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
4325 clear_bit(RSCN_UPDATE, &vha->dpc_flags);
1da177e4 4326
3064ff39
MH		 4327 qla2x00_get_data_rate(vha);
4328
1da177e4
LT		 4329 /* Determine what we need to do */
4330 if (ha->current_topology == ISP_CFG_FL &&
4331 (test_bit(LOCAL_LOOP_UPDATE, &flags))) {
4332
1da177e4
LT		 4333 set_bit(RSCN_UPDATE, &flags);
4334
4335 } else if (ha->current_topology == ISP_CFG_F &&
4336 (test_bit(LOCAL_LOOP_UPDATE, &flags))) {
4337
1da177e4
LT		 4338 set_bit(RSCN_UPDATE, &flags);
4339 clear_bit(LOCAL_LOOP_UPDATE, &flags);
21333b48
AV		 4340
4341 } else if (ha->current_topology == ISP_CFG_N) {
4342 clear_bit(RSCN_UPDATE, &flags);
41dc529a
QT		 4343 } else if (ha->current_topology == ISP_CFG_NL) {
4344 clear_bit(RSCN_UPDATE, &flags);
4345 set_bit(LOCAL_LOOP_UPDATE, &flags);
e315cd28 4346 } else if (!vha->flags.online ||
1da177e4 4347 (test_bit(ABORT_ISP_ACTIVE, &flags))) {
1da177e4
LT		 4348 set_bit(RSCN_UPDATE, &flags);
4349 set_bit(LOCAL_LOOP_UPDATE, &flags);
4350 }
4351
4352 if (test_bit(LOCAL_LOOP_UPDATE, &flags)) {
7c3df132
SK		 4353 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) {
4354 ql_dbg(ql_dbg_disc, vha, 0x2015,
4355 "Loop resync needed, failing.\n");
1da177e4 4356 rval = QLA_FUNCTION_FAILED;
642ef983 4357 } else
e315cd28 4358 rval = qla2x00_configure_local_loop(vha);
1da177e4
LT		 4359 }
4360
4361 if (rval == QLA_SUCCESS && test_bit(RSCN_UPDATE, &flags)) {
7c3df132 4362 if (LOOP_TRANSITION(vha)) {
83548fe2 4363 ql_dbg(ql_dbg_disc, vha, 0x2099,
7c3df132 4364 "Needs RSCN update and loop transition.\n");
1da177e4 4365 rval = QLA_FUNCTION_FAILED;
7c3df132 4366 }
e315cd28
AC		 4367 else
4368 rval = qla2x00_configure_fabric(vha);
1da177e4
LT		 4369 }
4370
4371 if (rval == QLA_SUCCESS) {
e315cd28
AC		 4372 if (atomic_read(&vha->loop_down_timer) ||
4373 test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) {
1da177e4
LT		 4374 rval = QLA_FUNCTION_FAILED;
4375 } else {
e315cd28 4376 atomic_set(&vha->loop_state, LOOP_READY);
7c3df132
SK		 4377 ql_dbg(ql_dbg_disc, vha, 0x2069,
4378 "LOOP READY.\n");
ec7193e2 4379 ha->flags.fw_init_done = 1;
3bb67df5
DKU		 4380
4381 /*
4382 * Process any ATIO queue entries that came in
4383 * while we weren't online.
4384 */
ead03855
QT		 4385 if (qla_tgt_mode_enabled(vha) ||
4386 qla_dual_mode_enabled(vha)) {
3bb67df5
DKU		 4387 if (IS_QLA27XX(ha) || IS_QLA83XX(ha)) {
4388 spin_lock_irqsave(&ha->tgt.atio_lock,
4389 flags);
4390 qlt_24xx_process_atio_queue(vha, 0);
4391 spin_unlock_irqrestore(
4392 &ha->tgt.atio_lock, flags);
4393 } else {
4394 spin_lock_irqsave(&ha->hardware_lock,
4395 flags);
4396 qlt_24xx_process_atio_queue(vha, 1);
4397 spin_unlock_irqrestore(
4398 &ha->hardware_lock, flags);
4399 }
4400 }
1da177e4
LT		 4401 }
4402 }
4403
4404 if (rval) {
7c3df132
SK		 4405 ql_dbg(ql_dbg_disc, vha, 0x206a,
4406 "%s *** FAILED ***.\n", __func__);
1da177e4 4407 } else {
7c3df132
SK		 4408 ql_dbg(ql_dbg_disc, vha, 0x206b,
4409 "%s: exiting normally.\n", __func__);
1da177e4
LT		 4410 }
4411
cc3ef7bc 4412 /* Restore state if a resync event occurred during processing */
e315cd28 4413 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) {
1da177e4 4414 if (test_bit(LOCAL_LOOP_UPDATE, &save_flags))
e315cd28 4415 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
f4658b6c 4416 if (test_bit(RSCN_UPDATE, &save_flags)) {
e315cd28 4417 set_bit(RSCN_UPDATE, &vha->dpc_flags);
f4658b6c 4418 }
1da177e4
LT		 4419 }
4420
4421 return (rval);
4422}
4423
edd05de1
DG		 4424/*
4425 * N2N Login
4426 * Updates Fibre Channel Device Database with local loop devices.
4427 *
4428 * Input:
4429 * ha = adapter block pointer.
4430 *
4431 * Returns:
4432 */
4433static int qla24xx_n2n_handle_login(struct scsi_qla_host *vha,
4434 fc_port_t *fcport)
4435{
4436 struct qla_hw_data *ha = vha->hw;
4437 int res = QLA_SUCCESS, rval;
4438 int greater_wwpn = 0;
4439 int logged_in = 0;
4440
4441 if (ha->current_topology != ISP_CFG_N)
4442 return res;
4443
4444 if (wwn_to_u64(vha->port_name) >
4445 wwn_to_u64(vha->n2n_port_name)) {
4446 ql_dbg(ql_dbg_disc, vha, 0x2002,
4447 "HBA WWPN is greater %llx > target %llx\n",
4448 wwn_to_u64(vha->port_name),
4449 wwn_to_u64(vha->n2n_port_name));
4450 greater_wwpn = 1;
4451 fcport->d_id.b24 = vha->n2n_id;
4452 }
4453
4454 fcport->loop_id = vha->loop_id;
4455 fcport->fc4f_nvme = 0;
4456 fcport->query = 1;
4457
4458 ql_dbg(ql_dbg_disc, vha, 0x4001,
4459 "Initiate N2N login handler: HBA port_id=%06x loopid=%d\n",
4460 fcport->d_id.b24, vha->loop_id);
4461
4462 /* Fill in member data. */
4463 if (!greater_wwpn) {
4464 rval = qla2x00_get_port_database(vha, fcport, 0);
4465 ql_dbg(ql_dbg_disc, vha, 0x1051,
4466 "Remote login-state (%x/%x) port_id=%06x loop_id=%x, rval=%d\n",
4467 fcport->current_login_state, fcport->last_login_state,
4468 fcport->d_id.b24, fcport->loop_id, rval);
4469
4470 if (((fcport->current_login_state & 0xf) == 0x4) ||
4471 ((fcport->current_login_state & 0xf) == 0x6))
4472 logged_in = 1;
4473 }
4474
4475 if (logged_in || greater_wwpn) {
4476 if (!vha->nvme_local_port && vha->flags.nvme_enabled)
4477 qla_nvme_register_hba(vha);
4478
4479 /* Set connected N_Port d_id */
4480 if (vha->flags.nvme_enabled)
4481 fcport->fc4f_nvme = 1;
4482
4483 fcport->scan_state = QLA_FCPORT_FOUND;
4484 fcport->fw_login_state = DSC_LS_PORT_UNAVAIL;
4485 fcport->disc_state = DSC_GNL;
4486 fcport->n2n_flag = 1;
4487 fcport->flags = 3;
4488 vha->hw->flags.gpsc_supported = 0;
4489
4490 if (greater_wwpn) {
4491 ql_dbg(ql_dbg_disc, vha, 0x20e5,
4492 "%s %d PLOGI ELS %8phC\n",
4493 __func__, __LINE__, fcport->port_name);
4494
4495 res = qla24xx_els_dcmd2_iocb(vha, ELS_DCMD_PLOGI,
4496 fcport, fcport->d_id);
4497 }
4498
4499 if (res != QLA_SUCCESS) {
4500 ql_log(ql_log_info, vha, 0xd04d,
4501 "PLOGI Failed: portid=%06x - retrying\n",
4502 fcport->d_id.b24);
4503 res = QLA_SUCCESS;
4504 } else {
4505 /* State 0x6 means FCP PRLI complete */
4506 if ((fcport->current_login_state & 0xf) == 0x6) {
4507 ql_dbg(ql_dbg_disc, vha, 0x2118,
4508 "%s %d %8phC post GPDB work\n",
4509 __func__, __LINE__, fcport->port_name);
4510 fcport->chip_reset =
4511 vha->hw->base_qpair->chip_reset;
4512 qla24xx_post_gpdb_work(vha, fcport, 0);
4513 } else {
4514 ql_dbg(ql_dbg_disc, vha, 0x2118,
4515 "%s %d %8phC post NVMe PRLI\n",
4516 __func__, __LINE__, fcport->port_name);
4517 qla24xx_post_prli_work(vha, fcport);
4518 }
4519 }
4520 } else {
4521 /* Wait for next database change */
4522 set_bit(N2N_LOGIN_NEEDED, &vha->dpc_flags);
4523 }
1da177e4 4524
edd05de1
DG		 4525 return res;
4526}
1da177e4
LT		 4527
4528/*
4529 * qla2x00_configure_local_loop
4530 * Updates Fibre Channel Device Database with local loop devices.
4531 *
4532 * Input:
4533 * ha = adapter block pointer.
4534 *
4535 * Returns:
4536 * 0 = success.
4537 */
4538static int
e315cd28 4539qla2x00_configure_local_loop(scsi_qla_host_t *vha)
1da177e4
LT		 4540{
4541 int rval, rval2;
4542 int found_devs;
4543 int found;
4544 fc_port_t *fcport, *new_fcport;
4545
4546 uint16_t index;
4547 uint16_t entries;
4548 char *id_iter;
4549 uint16_t loop_id;
4550 uint8_t domain, area, al_pa;
e315cd28 4551 struct qla_hw_data *ha = vha->hw;
41dc529a 4552 unsigned long flags;
1da177e4
LT		 4553
4554 found_devs = 0;
4555 new_fcport = NULL;
642ef983 4556 entries = MAX_FIBRE_DEVICES_LOOP;
1da177e4 4557
1da177e4 4558 /* Get list of logged in devices. */
642ef983 4559 memset(ha->gid_list, 0, qla2x00_gid_list_size(ha));
e315cd28 4560 rval = qla2x00_get_id_list(vha, ha->gid_list, ha->gid_list_dma,
1da177e4
LT		 4561 &entries);
4562 if (rval != QLA_SUCCESS)
4563 goto cleanup_allocation;
4564
83548fe2 4565 ql_dbg(ql_dbg_disc, vha, 0x2011,
7c3df132
SK		 4566 "Entries in ID list (%d).\n", entries);
4567 ql_dump_buffer(ql_dbg_disc + ql_dbg_buffer, vha, 0x2075,
4568 (uint8_t *)ha->gid_list,
4569 entries * sizeof(struct gid_list_info));
1da177e4
LT		 4570
4571 /* Allocate temporary fcport for any new fcports discovered. */
e315cd28 4572 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
1da177e4 4573 if (new_fcport == NULL) {
83548fe2 4574 ql_log(ql_log_warn, vha, 0x2012,
7c3df132 4575 "Memory allocation failed for fcport.\n");
1da177e4
LT		 4576 rval = QLA_MEMORY_ALLOC_FAILED;
4577 goto cleanup_allocation;
4578 }
4579 new_fcport->flags &= ~FCF_FABRIC_DEVICE;
4580
4581 /*
4582 * Mark local devices that were present with FCF_DEVICE_LOST for now.
4583 */
e315cd28 4584 list_for_each_entry(fcport, &vha->vp_fcports, list) {
1da177e4
LT		 4585 if (atomic_read(&fcport->state) == FCS_ONLINE &&
4586 fcport->port_type != FCT_BROADCAST &&
4587 (fcport->flags & FCF_FABRIC_DEVICE) == 0) {
4588
83548fe2 4589 ql_dbg(ql_dbg_disc, vha, 0x2096,
7c3df132
SK		 4590 "Marking port lost loop_id=0x%04x.\n",
4591 fcport->loop_id);
1da177e4 4592
41dc529a 4593 qla2x00_mark_device_lost(vha, fcport, 0, 0);
1da177e4
LT		 4594 }
4595 }
4596
edd05de1
DG		 4597 /* Inititae N2N login. */
4598 if (test_and_clear_bit(N2N_LOGIN_NEEDED, &vha->dpc_flags)) {
4599 rval = qla24xx_n2n_handle_login(vha, new_fcport);
4600 if (rval != QLA_SUCCESS)
4601 goto cleanup_allocation;
4602 return QLA_SUCCESS;
4603 }
4604
1da177e4
LT		 4605 /* Add devices to port list. */
4606 id_iter = (char *)ha->gid_list;
4607 for (index = 0; index < entries; index++) {
4608 domain = ((struct gid_list_info *)id_iter)->domain;
4609 area = ((struct gid_list_info *)id_iter)->area;
4610 al_pa = ((struct gid_list_info *)id_iter)->al_pa;
abbd8870 4611 if (IS_QLA2100(ha) || IS_QLA2200(ha))
1da177e4
LT		 4612 loop_id = (uint16_t)
4613 ((struct gid_list_info *)id_iter)->loop_id_2100;
abbd8870 4614 else
1da177e4
LT		 4615 loop_id = le16_to_cpu(
4616 ((struct gid_list_info *)id_iter)->loop_id);
abbd8870 4617 id_iter += ha->gid_list_info_size;
1da177e4
LT		 4618
4619 /* Bypass reserved domain fields. */
4620 if ((domain & 0xf0) == 0xf0)
4621 continue;
4622
4623 /* Bypass if not same domain and area of adapter. */
f7d289f6 4624 if (area && domain &&
e315cd28 4625 (area != vha->d_id.b.area || domain != vha->d_id.b.domain))
1da177e4
LT		 4626 continue;
4627
4628 /* Bypass invalid local loop ID. */
4629 if (loop_id > LAST_LOCAL_LOOP_ID)
4630 continue;
4631
41dc529a 4632 memset(new_fcport->port_name, 0, WWN_SIZE);
370d550e 4633
1da177e4
LT		 4634 /* Fill in member data. */
4635 new_fcport->d_id.b.domain = domain;
4636 new_fcport->d_id.b.area = area;
4637 new_fcport->d_id.b.al_pa = al_pa;
4638 new_fcport->loop_id = loop_id;
41dc529a 4639
e315cd28 4640 rval2 = qla2x00_get_port_database(vha, new_fcport, 0);
1da177e4 4641 if (rval2 != QLA_SUCCESS) {
83548fe2 4642 ql_dbg(ql_dbg_disc, vha, 0x2097,
7c3df132
SK		 4643 "Failed to retrieve fcport information "
4644 "-- get_port_database=%x, loop_id=0x%04x.\n",
4645 rval2, new_fcport->loop_id);
edd05de1
DG		 4646 /* Skip retry if N2N */
4647 if (ha->current_topology != ISP_CFG_N) {
4648 ql_dbg(ql_dbg_disc, vha, 0x2105,
4649 "Scheduling resync.\n");
4650 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
4651 continue;
4652 }
1da177e4
LT		 4653 }
4654
41dc529a 4655 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
1da177e4
LT		 4656 /* Check for matching device in port list. */
4657 found = 0;
4658 fcport = NULL;
e315cd28 4659 list_for_each_entry(fcport, &vha->vp_fcports, list) {
1da177e4
LT		 4660 if (memcmp(new_fcport->port_name, fcport->port_name,
4661 WWN_SIZE))
4662 continue;
4663
ddb9b126 4664 fcport->flags &= ~FCF_FABRIC_DEVICE;
1da177e4
LT		 4665 fcport->loop_id = new_fcport->loop_id;
4666 fcport->port_type = new_fcport->port_type;
4667 fcport->d_id.b24 = new_fcport->d_id.b24;
4668 memcpy(fcport->node_name, new_fcport->node_name,
4669 WWN_SIZE);
4670
41dc529a
QT		 4671 if (!fcport->login_succ) {
4672 vha->fcport_count++;
4673 fcport->login_succ = 1;
4674 fcport->disc_state = DSC_LOGIN_COMPLETE;
4675 }
4676
1da177e4
LT		 4677 found++;
4678 break;
4679 }
4680
4681 if (!found) {
4682 /* New device, add to fcports list. */
e315cd28 4683 list_add_tail(&new_fcport->list, &vha->vp_fcports);
1da177e4
LT		 4684
4685 /* Allocate a new replacement fcport. */
4686 fcport = new_fcport;
41dc529a
QT		 4687 if (!fcport->login_succ) {
4688 vha->fcport_count++;
4689 fcport->login_succ = 1;
4690 fcport->disc_state = DSC_LOGIN_COMPLETE;
4691 }
4692
4693 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
4694
e315cd28 4695 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
41dc529a 4696
1da177e4 4697 if (new_fcport == NULL) {
83548fe2 4698 ql_log(ql_log_warn, vha, 0xd031,
7c3df132 4699 "Failed to allocate memory for fcport.\n");
1da177e4
LT		 4700 rval = QLA_MEMORY_ALLOC_FAILED;
4701 goto cleanup_allocation;
4702 }
41dc529a 4703 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
1da177e4
LT		 4704 new_fcport->flags &= ~FCF_FABRIC_DEVICE;
4705 }
4706
41dc529a
QT		 4707 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
4708
d8b45213 4709 /* Base iIDMA settings on HBA port speed. */
a3cbdfad 4710 fcport->fp_speed = ha->link_data_rate;
d8b45213 4711
e315cd28 4712 qla2x00_update_fcport(vha, fcport);
1da177e4
LT		 4713
4714 found_devs++;
4715 }
4716
4717cleanup_allocation:
c9475cb0 4718 kfree(new_fcport);
1da177e4
LT		 4719
4720 if (rval != QLA_SUCCESS) {
83548fe2 4721 ql_dbg(ql_dbg_disc, vha, 0x2098,
7c3df132 4722 "Configure local loop error exit: rval=%x.\n", rval);
1da177e4
LT		 4723 }
4724
1da177e4
LT		 4725 return (rval);
4726}
4727
d8b45213 4728static void
e315cd28 4729qla2x00_iidma_fcport(scsi_qla_host_t *vha, fc_port_t *fcport)
d8b45213 4730{
d8b45213 4731 int rval;
93f2bd67 4732 uint16_t mb[MAILBOX_REGISTER_COUNT];
e315cd28 4733 struct qla_hw_data *ha = vha->hw;
d8b45213 4734
c76f2c01 4735 if (!IS_IIDMA_CAPABLE(ha))
d8b45213
AV		 4736 return;
4737
c9afb9a2
GM		 4738 if (atomic_read(&fcport->state) != FCS_ONLINE)
4739 return;
4740
39bd9622
AV		 4741 if (fcport->fp_speed == PORT_SPEED_UNKNOWN ||
4742 fcport->fp_speed > ha->link_data_rate)
d8b45213
AV		 4743 return;
4744
e315cd28 4745 rval = qla2x00_set_idma_speed(vha, fcport->loop_id, fcport->fp_speed,
a3cbdfad 4746 mb);
d8b45213 4747 if (rval != QLA_SUCCESS) {
7c3df132 4748 ql_dbg(ql_dbg_disc, vha, 0x2004,
7b833558
OK		 4749 "Unable to adjust iIDMA %8phN -- %04x %x %04x %04x.\n",
4750 fcport->port_name, rval, fcport->fp_speed, mb[0], mb[1]);
d8b45213 4751 } else {
7c3df132 4752 ql_dbg(ql_dbg_disc, vha, 0x2005,
7b833558 4753 "iIDMA adjusted to %s GB/s on %8phN.\n",
d0297c9a 4754 qla2x00_get_link_speed_str(ha, fcport->fp_speed),
7b833558 4755 fcport->port_name);
d8b45213
AV		 4756 }
4757}
4758
726b8548 4759/* qla2x00_reg_remote_port is reserved for Initiator Mode only.*/
23be331d 4760static void
e315cd28 4761qla2x00_reg_remote_port(scsi_qla_host_t *vha, fc_port_t *fcport)
8482e118 4762{
4763 struct fc_rport_identifiers rport_ids;
bdf79621 4764 struct fc_rport *rport;
044d78e1 4765 unsigned long flags;
8482e118 4766
f8b02a85
AV		 4767 rport_ids.node_name = wwn_to_u64(fcport->node_name);
4768 rport_ids.port_name = wwn_to_u64(fcport->port_name);
8482e118 4769 rport_ids.port_id = fcport->d_id.b.domain << 16 |
4770 fcport->d_id.b.area << 8 | fcport->d_id.b.al_pa;
77d74143 4771 rport_ids.roles = FC_RPORT_ROLE_UNKNOWN;
e315cd28 4772 fcport->rport = rport = fc_remote_port_add(vha->host, 0, &rport_ids);
77d74143 4773 if (!rport) {
7c3df132
SK		 4774 ql_log(ql_log_warn, vha, 0x2006,
4775 "Unable to allocate fc remote port.\n");
77d74143
AV		 4776 return;
4777 }
2d70c103 4778
044d78e1 4779 spin_lock_irqsave(fcport->vha->host->host_lock, flags);
19a7b4ae 4780 *((fc_port_t **)rport->dd_data) = fcport;
044d78e1 4781 spin_unlock_irqrestore(fcport->vha->host->host_lock, flags);
d97994dc 4782
ad3e0eda 4783 rport->supported_classes = fcport->supported_classes;
77d74143 4784
8482e118 4785 rport_ids.roles = FC_RPORT_ROLE_UNKNOWN;
4786 if (fcport->port_type == FCT_INITIATOR)
4787 rport_ids.roles |= FC_RPORT_ROLE_FCP_INITIATOR;
4788 if (fcport->port_type == FCT_TARGET)
4789 rport_ids.roles |= FC_RPORT_ROLE_FCP_TARGET;
726b8548 4790
83548fe2
QT		 4791 ql_dbg(ql_dbg_disc, vha, 0x20ee,
4792 "%s %8phN. rport %p is %s mode\n",
4793 __func__, fcport->port_name, rport,
4794 (fcport->port_type == FCT_TARGET) ? "tgt" : "ini");
726b8548 4795
77d74143 4796 fc_remote_port_rolechg(rport, rport_ids.roles);
1da177e4
LT		 4797}
4798
23be331d
AB		 4799/*
4800 * qla2x00_update_fcport
4801 * Updates device on list.
4802 *
4803 * Input:
4804 * ha = adapter block pointer.
4805 * fcport = port structure pointer.
4806 *
4807 * Return:
4808 * 0 - Success
4809 * BIT_0 - error
4810 *
4811 * Context:
4812 * Kernel context.
4813 */
4814void
e315cd28 4815qla2x00_update_fcport(scsi_qla_host_t *vha, fc_port_t *fcport)
23be331d 4816{
e315cd28 4817 fcport->vha = vha;
8ae6d9c7 4818
726b8548
QT		 4819 if (IS_SW_RESV_ADDR(fcport->d_id))
4820 return;
4821
83548fe2 4822 ql_dbg(ql_dbg_disc, vha, 0x20ef, "%s %8phC\n",
726b8548
QT		 4823 __func__, fcport->port_name);
4824
8ae6d9c7
GM		 4825 if (IS_QLAFX00(vha->hw)) {
4826 qla2x00_set_fcport_state(fcport, FCS_ONLINE);
d20ed91b 4827 goto reg_port;
8ae6d9c7 4828 }
23be331d 4829 fcport->login_retry = 0;
5ff1d584 4830 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT);
726b8548
QT		 4831 fcport->disc_state = DSC_LOGIN_COMPLETE;
4832 fcport->deleted = 0;
4833 fcport->logout_on_delete = 1;
23be331d 4834
e84067d7
DG		 4835 if (fcport->fc4f_nvme) {
4836 qla_nvme_register_remote(vha, fcport);
4837 return;
4838 }
4839
1f93da52 4840 qla2x00_set_fcport_state(fcport, FCS_ONLINE);
e315cd28 4841 qla2x00_iidma_fcport(vha, fcport);
21090cbe 4842 qla24xx_update_fcport_fcp_prio(vha, fcport);
d20ed91b
AP		 4843
4844reg_port:
726b8548
QT		 4845 switch (vha->host->active_mode) {
4846 case MODE_INITIATOR:
d20ed91b 4847 qla2x00_reg_remote_port(vha, fcport);
726b8548
QT		 4848 break;
4849 case MODE_TARGET:
4850 if (!vha->vha_tgt.qla_tgt->tgt_stop &&
4851 !vha->vha_tgt.qla_tgt->tgt_stopped)
4852 qlt_fc_port_added(vha, fcport);
4853 break;
4854 case MODE_DUAL:
d20ed91b 4855 qla2x00_reg_remote_port(vha, fcport);
726b8548
QT		 4856 if (!vha->vha_tgt.qla_tgt->tgt_stop &&
4857 !vha->vha_tgt.qla_tgt->tgt_stopped)
4858 qlt_fc_port_added(vha, fcport);
4859 break;
4860 default:
4861 break;
d20ed91b 4862 }
23be331d
AB		 4863}
4864
1da177e4
LT		 4865/*
4866 * qla2x00_configure_fabric
4867 * Setup SNS devices with loop ID's.
4868 *
4869 * Input:
4870 * ha = adapter block pointer.
4871 *
4872 * Returns:
4873 * 0 = success.
4874 * BIT_0 = error
4875 */
4876static int
e315cd28 4877qla2x00_configure_fabric(scsi_qla_host_t *vha)
1da177e4 4878{
b3b02e6e 4879 int rval;
726b8548 4880 fc_port_t *fcport;
1da177e4 4881 uint16_t mb[MAILBOX_REGISTER_COUNT];
0107109e 4882 uint16_t loop_id;
1da177e4 4883 LIST_HEAD(new_fcports);
e315cd28 4884 struct qla_hw_data *ha = vha->hw;
df673274 4885 int discovery_gen;
1da177e4
LT		 4886
4887 /* If FL port exists, then SNS is present */
e428924c 4888 if (IS_FWI2_CAPABLE(ha))
0107109e
AV		 4889 loop_id = NPH_F_PORT;
4890 else
4891 loop_id = SNS_FL_PORT;
e315cd28 4892 rval = qla2x00_get_port_name(vha, loop_id, vha->fabric_node_name, 1);
1da177e4 4893 if (rval != QLA_SUCCESS) {
83548fe2 4894 ql_dbg(ql_dbg_disc, vha, 0x20a0,
7c3df132 4895 "MBX_GET_PORT_NAME failed, No FL Port.\n");
1da177e4 4896
e315cd28 4897 vha->device_flags &= ~SWITCH_FOUND;
1da177e4
LT		 4898 return (QLA_SUCCESS);
4899 }
e315cd28 4900 vha->device_flags |= SWITCH_FOUND;
1da177e4 4901
41dc529a
QT		 4902
4903 if (qla_tgt_mode_enabled(vha) || qla_dual_mode_enabled(vha)) {
4904 rval = qla2x00_send_change_request(vha, 0x3, 0);
4905 if (rval != QLA_SUCCESS)
4906 ql_log(ql_log_warn, vha, 0x121,
4907 "Failed to enable receiving of RSCN requests: 0x%x.\n",
4908 rval);
4909 }
4910
4911
1da177e4 4912 do {
726b8548
QT		 4913 qla2x00_mgmt_svr_login(vha);
4914
cca5335c
AV		 4915 /* FDMI support. */
4916 if (ql2xfdmienable &&
e315cd28
AC		 4917 test_and_clear_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags))
4918 qla2x00_fdmi_register(vha);
cca5335c 4919
1da177e4 4920 /* Ensure we are logged into the SNS. */
a14c7711 4921 loop_id = NPH_SNS_LID(ha);
0b91d116
CD		 4922 rval = ha->isp_ops->fabric_login(vha, loop_id, 0xff, 0xff,
4923 0xfc, mb, BIT_1|BIT_0);
a14c7711
JC		 4924 if (rval != QLA_SUCCESS || mb[0] != MBS_COMMAND_COMPLETE) {
4925 ql_dbg(ql_dbg_disc, vha, 0x20a1,
4926 "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x mb[2]=%x mb[6]=%x mb[7]=%x (%x).\n",
4927 loop_id, mb[0], mb[1], mb[2], mb[6], mb[7], rval);
0b91d116 4928 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
e452ceb6 4929 return rval;
0b91d116 4930 }
e315cd28
AC		 4931 if (test_and_clear_bit(REGISTER_FC4_NEEDED, &vha->dpc_flags)) {
4932 if (qla2x00_rft_id(vha)) {
1da177e4 4933 /* EMPTY */
83548fe2 4934 ql_dbg(ql_dbg_disc, vha, 0x20a2,
7c3df132 4935 "Register FC-4 TYPE failed.\n");
b98ae0d7
QT		 4936 if (test_bit(LOOP_RESYNC_NEEDED,
4937 &vha->dpc_flags))
4938 break;
1da177e4 4939 }
d3bae931 4940 if (qla2x00_rff_id(vha, FC4_TYPE_FCP_SCSI)) {
1da177e4 4941 /* EMPTY */
83548fe2 4942 ql_dbg(ql_dbg_disc, vha, 0x209a,
7c3df132 4943 "Register FC-4 Features failed.\n");
b98ae0d7
QT		 4944 if (test_bit(LOOP_RESYNC_NEEDED,
4945 &vha->dpc_flags))
4946 break;
1da177e4 4947 }
d3bae931
DG		 4948 if (vha->flags.nvme_enabled) {
4949 if (qla2x00_rff_id(vha, FC_TYPE_NVME)) {
4950 ql_dbg(ql_dbg_disc, vha, 0x2049,
4951 "Register NVME FC Type Features failed.\n");
4952 }
4953 }
e315cd28 4954 if (qla2x00_rnn_id(vha)) {
1da177e4 4955 /* EMPTY */
83548fe2 4956 ql_dbg(ql_dbg_disc, vha, 0x2104,
7c3df132 4957 "Register Node Name failed.\n");
b98ae0d7
QT		 4958 if (test_bit(LOOP_RESYNC_NEEDED,
4959 &vha->dpc_flags))
4960 break;
e315cd28 4961 } else if (qla2x00_rsnn_nn(vha)) {
1da177e4 4962 /* EMPTY */
83548fe2 4963 ql_dbg(ql_dbg_disc, vha, 0x209b,
0bf0efa1 4964 "Register Symbolic Node Name failed.\n");
b98ae0d7
QT		 4965 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
4966 break;
1da177e4
LT		 4967 }
4968 }
4969
827210ba
JC		 4970 list_for_each_entry(fcport, &vha->vp_fcports, list) {
4971 fcport->scan_state = QLA_FCPORT_SCAN;
4972 }
4973
df673274
AP		 4974 /* Mark the time right before querying FW for connected ports.
4975 * This process is long, asynchronous and by the time it's done,
4976 * collected information might not be accurate anymore. E.g.
4977 * disconnected port might have re-connected and a brand new
4978 * session has been created. In this case session's generation
4979 * will be newer than discovery_gen. */
4980 qlt_do_generation_tick(vha, &discovery_gen);
4981
726b8548 4982 rval = qla2x00_find_all_fabric_devs(vha);
1da177e4
LT		 4983 if (rval != QLA_SUCCESS)
4984 break;
1da177e4
LT		 4985 } while (0);
4986
e84067d7
DG		 4987 if (!vha->nvme_local_port && vha->flags.nvme_enabled)
4988 qla_nvme_register_hba(vha);
4989
726b8548 4990 if (rval)
7c3df132
SK		 4991 ql_dbg(ql_dbg_disc, vha, 0x2068,
4992 "Configure fabric error exit rval=%d.\n", rval);
1da177e4
LT		 4993
4994 return (rval);
4995}
4996
1da177e4
LT		 4997/*
4998 * qla2x00_find_all_fabric_devs
4999 *
5000 * Input:
5001 * ha = adapter block pointer.
5002 * dev = database device entry pointer.
5003 *
5004 * Returns:
5005 * 0 = success.
5006 *
5007 * Context:
5008 * Kernel context.
5009 */
5010static int
726b8548 5011qla2x00_find_all_fabric_devs(scsi_qla_host_t *vha)
1da177e4
LT		 5012{
5013 int rval;
5014 uint16_t loop_id;
726b8548 5015 fc_port_t *fcport, *new_fcport;
1da177e4
LT		 5016 int found;
5017
5018 sw_info_t *swl;
5019 int swl_idx;
5020 int first_dev, last_dev;
1516ef44 5021 port_id_t wrap = {}, nxt_d_id;
e315cd28 5022 struct qla_hw_data *ha = vha->hw;
bb4cf5b7 5023 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
726b8548 5024 unsigned long flags;
1da177e4
LT		 5025
5026 rval = QLA_SUCCESS;
5027
5028 /* Try GID_PT to get device list, else GAN. */
7a67735b 5029 if (!ha->swl)
642ef983 5030 ha->swl = kcalloc(ha->max_fibre_devices, sizeof(sw_info_t),
7a67735b
AV		 5031 GFP_KERNEL);
5032 swl = ha->swl;
bbfbbbc1 5033 if (!swl) {
1da177e4 5034 /*EMPTY*/
83548fe2 5035 ql_dbg(ql_dbg_disc, vha, 0x209c,
7c3df132 5036 "GID_PT allocations failed, fallback on GA_NXT.\n");
1da177e4 5037 } else {
642ef983 5038 memset(swl, 0, ha->max_fibre_devices * sizeof(sw_info_t));
e315cd28 5039 if (qla2x00_gid_pt(vha, swl) != QLA_SUCCESS) {
1da177e4 5040 swl = NULL;
b98ae0d7
QT		 5041 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
5042 return rval;
e315cd28 5043 } else if (qla2x00_gpn_id(vha, swl) != QLA_SUCCESS) {
1da177e4 5044 swl = NULL;
b98ae0d7
QT		 5045 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
5046 return rval;
e315cd28 5047 } else if (qla2x00_gnn_id(vha, swl) != QLA_SUCCESS) {
1da177e4 5048 swl = NULL;
b98ae0d7
QT		 5049 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
5050 return rval;
726b8548
QT		 5051 } else if (qla2x00_gfpn_id(vha, swl) != QLA_SUCCESS) {
5052 swl = NULL;
b98ae0d7
QT		 5053 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
5054 return rval;
1da177e4 5055 }
e8c72ba5
CD		 5056
5057 /* If other queries succeeded probe for FC-4 type */
b98ae0d7 5058 if (swl) {
e8c72ba5 5059 qla2x00_gff_id(vha, swl);
b98ae0d7
QT		 5060 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
5061 return rval;
5062 }
1da177e4
LT		 5063 }
5064 swl_idx = 0;
5065
5066 /* Allocate temporary fcport for any new fcports discovered. */
e315cd28 5067 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
1da177e4 5068 if (new_fcport == NULL) {
83548fe2 5069 ql_log(ql_log_warn, vha, 0x209d,
7c3df132 5070 "Failed to allocate memory for fcport.\n");
1da177e4
LT		 5071 return (QLA_MEMORY_ALLOC_FAILED);
5072 }
5073 new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED);
1da177e4
LT		 5074 /* Set start port ID scan at adapter ID. */
5075 first_dev = 1;
5076 last_dev = 0;
5077
5078 /* Starting free loop ID. */
e315cd28
AC		 5079 loop_id = ha->min_external_loopid;
5080 for (; loop_id <= ha->max_loop_id; loop_id++) {
5081 if (qla2x00_is_reserved_id(vha, loop_id))
1da177e4
LT		 5082 continue;
5083
3a6478df
GM		 5084 if (ha->current_topology == ISP_CFG_FL &&
5085 (atomic_read(&vha->loop_down_timer) ||
5086 LOOP_TRANSITION(vha))) {
bb2d52b2
AV		 5087 atomic_set(&vha->loop_down_timer, 0);
5088 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
5089 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
1da177e4 5090 break;
bb2d52b2 5091 }
1da177e4
LT		 5092
5093 if (swl != NULL) {
5094 if (last_dev) {
5095 wrap.b24 = new_fcport->d_id.b24;
5096 } else {
5097 new_fcport->d_id.b24 = swl[swl_idx].d_id.b24;
5098 memcpy(new_fcport->node_name,
5099 swl[swl_idx].node_name, WWN_SIZE);
5100 memcpy(new_fcport->port_name,
5101 swl[swl_idx].port_name, WWN_SIZE);
d8b45213
AV		 5102 memcpy(new_fcport->fabric_port_name,
5103 swl[swl_idx].fabric_port_name, WWN_SIZE);
5104 new_fcport->fp_speed = swl[swl_idx].fp_speed;
e8c72ba5 5105 new_fcport->fc4_type = swl[swl_idx].fc4_type;
1da177e4 5106
a5d42f4c 5107 new_fcport->nvme_flag = 0;
1a28faa0 5108 new_fcport->fc4f_nvme = 0;
a5d42f4c
DG		 5109 if (vha->flags.nvme_enabled &&
5110 swl[swl_idx].fc4f_nvme) {
5111 new_fcport->fc4f_nvme =
5112 swl[swl_idx].fc4f_nvme;
5113 ql_log(ql_log_info, vha, 0x2131,
5114 "FOUND: NVME port %8phC as FC Type 28h\n",
5115 new_fcport->port_name);
5116 }
5117
1da177e4
LT		 5118 if (swl[swl_idx].d_id.b.rsvd_1 != 0) {
5119 last_dev = 1;
5120 }
5121 swl_idx++;
5122 }
5123 } else {
5124 /* Send GA_NXT to the switch */
e315cd28 5125 rval = qla2x00_ga_nxt(vha, new_fcport);
1da177e4 5126 if (rval != QLA_SUCCESS) {
83548fe2 5127 ql_log(ql_log_warn, vha, 0x209e,
7c3df132
SK		 5128 "SNS scan failed -- assuming "
5129 "zero-entry result.\n");
1da177e4
LT		 5130 rval = QLA_SUCCESS;
5131 break;
5132 }
5133 }
5134
5135 /* If wrap on switch device list, exit. */
5136 if (first_dev) {
5137 wrap.b24 = new_fcport->d_id.b24;
5138 first_dev = 0;
5139 } else if (new_fcport->d_id.b24 == wrap.b24) {
83548fe2 5140 ql_dbg(ql_dbg_disc, vha, 0x209f,
7c3df132
SK		 5141 "Device wrap (%02x%02x%02x).\n",
5142 new_fcport->d_id.b.domain,
5143 new_fcport->d_id.b.area,
5144 new_fcport->d_id.b.al_pa);
1da177e4
LT		 5145 break;
5146 }
5147
2c3dfe3f 5148 /* Bypass if same physical adapter. */
e315cd28 5149 if (new_fcport->d_id.b24 == base_vha->d_id.b24)
1da177e4
LT		 5150 continue;
5151
2c3dfe3f 5152 /* Bypass virtual ports of the same host. */
bb4cf5b7
CD		 5153 if (qla2x00_is_a_vp_did(vha, new_fcport->d_id.b24))
5154 continue;
2c3dfe3f 5155
f7d289f6
AV		 5156 /* Bypass if same domain and area of adapter. */
5157 if (((new_fcport->d_id.b24 & 0xffff00) ==
e315cd28 5158 (vha->d_id.b24 & 0xffff00)) && ha->current_topology ==
f7d289f6
AV		 5159 ISP_CFG_FL)
5160 continue;
5161
1da177e4
LT		 5162 /* Bypass reserved domain fields. */
5163 if ((new_fcport->d_id.b.domain & 0xf0) == 0xf0)
5164 continue;
5165
e8c72ba5 5166 /* Bypass ports whose FCP-4 type is not FCP_SCSI */
4da26e16
CD		 5167 if (ql2xgffidenable &&
5168 (new_fcport->fc4_type != FC4_TYPE_FCP_SCSI &&
5169 new_fcport->fc4_type != FC4_TYPE_UNKNOWN))
e8c72ba5
CD		 5170 continue;
5171
726b8548
QT		 5172 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
5173
1da177e4
LT		 5174 /* Locate matching device in database. */
5175 found = 0;
e315cd28 5176 list_for_each_entry(fcport, &vha->vp_fcports, list) {
1da177e4
LT		 5177 if (memcmp(new_fcport->port_name, fcport->port_name,
5178 WWN_SIZE))
5179 continue;
5180
827210ba 5181 fcport->scan_state = QLA_FCPORT_FOUND;
b3b02e6e 5182
1da177e4
LT		 5183 found++;
5184
d8b45213
AV		 5185 /* Update port state. */
5186 memcpy(fcport->fabric_port_name,
5187 new_fcport->fabric_port_name, WWN_SIZE);
5188 fcport->fp_speed = new_fcport->fp_speed;
5189
1da177e4 5190 /*
b2032fd5
RD		 5191 * If address the same and state FCS_ONLINE
5192 * (or in target mode), nothing changed.
1da177e4
LT		 5193 */
5194 if (fcport->d_id.b24 == new_fcport->d_id.b24 &&
b2032fd5 5195 (atomic_read(&fcport->state) == FCS_ONLINE ||
726b8548 5196 (vha->host->active_mode == MODE_TARGET))) {
1da177e4
LT		 5197 break;
5198 }
5199
5200 /*
5201 * If device was not a fabric device before.
5202 */
5203 if ((fcport->flags & FCF_FABRIC_DEVICE) == 0) {
5204 fcport->d_id.b24 = new_fcport->d_id.b24;
5f16b331 5205 qla2x00_clear_loop_id(fcport);
1da177e4
LT		 5206 fcport->flags |= (FCF_FABRIC_DEVICE |
5207 FCF_LOGIN_NEEDED);
1da177e4
LT		 5208 break;
5209 }
5210
5211 /*
5212 * Port ID changed or device was marked to be updated;
5213 * Log it out if still logged in and mark it for
5214 * relogin later.
5215 */
726b8548 5216 if (qla_tgt_mode_enabled(base_vha)) {
b2032fd5
RD		 5217 ql_dbg(ql_dbg_tgt_mgt, vha, 0xf080,
5218 "port changed FC ID, %8phC"
5219 " old %x:%x:%x (loop_id 0x%04x)-> new %x:%x:%x\n",
5220 fcport->port_name,
5221 fcport->d_id.b.domain,
5222 fcport->d_id.b.area,
5223 fcport->d_id.b.al_pa,
5224 fcport->loop_id,
5225 new_fcport->d_id.b.domain,
5226 new_fcport->d_id.b.area,
5227 new_fcport->d_id.b.al_pa);
5228 fcport->d_id.b24 = new_fcport->d_id.b24;
5229 break;
5230 }
5231
1da177e4
LT		 5232 fcport->d_id.b24 = new_fcport->d_id.b24;
5233 fcport->flags |= FCF_LOGIN_NEEDED;
1da177e4
LT		 5234 break;
5235 }
5236
726b8548
QT		 5237 if (found) {
5238 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
1da177e4 5239 continue;
726b8548 5240 }
1da177e4 5241 /* If device was not in our fcports list, then add it. */
b2032fd5 5242 new_fcport->scan_state = QLA_FCPORT_FOUND;
726b8548
QT		 5243 list_add_tail(&new_fcport->list, &vha->vp_fcports);
5244
5245 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
5246
1da177e4
LT		 5247
5248 /* Allocate a new replacement fcport. */
5249 nxt_d_id.b24 = new_fcport->d_id.b24;
e315cd28 5250 new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
1da177e4 5251 if (new_fcport == NULL) {
83548fe2 5252 ql_log(ql_log_warn, vha, 0xd032,
7c3df132 5253 "Memory allocation failed for fcport.\n");
1da177e4
LT		 5254 return (QLA_MEMORY_ALLOC_FAILED);
5255 }
5256 new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED);
5257 new_fcport->d_id.b24 = nxt_d_id.b24;
5258 }
5259
726b8548
QT		 5260 qla2x00_free_fcport(new_fcport);
5261
5262 /*
5263 * Logout all previous fabric dev marked lost, except FCP2 devices.
5264 */
5265 list_for_each_entry(fcport, &vha->vp_fcports, list) {
5266 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
5267 break;
5268
5269 if ((fcport->flags & FCF_FABRIC_DEVICE) == 0 ||
5270 (fcport->flags & FCF_LOGIN_NEEDED) == 0)
5271 continue;
5272
5273 if (fcport->scan_state == QLA_FCPORT_SCAN) {
5274 if ((qla_dual_mode_enabled(vha) ||
5275 qla_ini_mode_enabled(vha)) &&
5276 atomic_read(&fcport->state) == FCS_ONLINE) {
5277 qla2x00_mark_device_lost(vha, fcport,
5278 ql2xplogiabsentdevice, 0);
5279 if (fcport->loop_id != FC_NO_LOOP_ID &&
5280 (fcport->flags & FCF_FCP2_DEVICE) == 0 &&
5281 fcport->port_type != FCT_INITIATOR &&
5282 fcport->port_type != FCT_BROADCAST) {
83548fe2 5283 ql_dbg(ql_dbg_disc, vha, 0x20f0,
726b8548
QT		 5284 "%s %d %8phC post del sess\n",
5285 __func__, __LINE__,
5286 fcport->port_name);
5287
5288 qlt_schedule_sess_for_deletion_lock
5289 (fcport);
5290 continue;
5291 }
5292 }
5293 }
1da177e4 5294
726b8548
QT		 5295 if (fcport->scan_state == QLA_FCPORT_FOUND)
5296 qla24xx_fcport_handle_login(vha, fcport);
5297 }
1da177e4
LT		 5298 return (rval);
5299}
5300
5301/*
5302 * qla2x00_find_new_loop_id
5303 * Scan through our port list and find a new usable loop ID.
5304 *
5305 * Input:
5306 * ha: adapter state pointer.
5307 * dev: port structure pointer.
5308 *
5309 * Returns:
5310 * qla2x00 local function return status code.
5311 *
5312 * Context:
5313 * Kernel context.
5314 */
03bcfb57 5315int
e315cd28 5316qla2x00_find_new_loop_id(scsi_qla_host_t *vha, fc_port_t *dev)
1da177e4
LT		 5317{
5318 int rval;
e315cd28 5319 struct qla_hw_data *ha = vha->hw;
feafb7b1 5320 unsigned long flags = 0;
1da177e4
LT		 5321
5322 rval = QLA_SUCCESS;
5323
5f16b331 5324 spin_lock_irqsave(&ha->vport_slock, flags);
1da177e4 5325
5f16b331
CD		 5326 dev->loop_id = find_first_zero_bit(ha->loop_id_map,
5327 LOOPID_MAP_SIZE);
5328 if (dev->loop_id >= LOOPID_MAP_SIZE ||
5329 qla2x00_is_reserved_id(vha, dev->loop_id)) {
5330 dev->loop_id = FC_NO_LOOP_ID;
5331 rval = QLA_FUNCTION_FAILED;
5332 } else
5333 set_bit(dev->loop_id, ha->loop_id_map);
1da177e4 5334
5f16b331 5335 spin_unlock_irqrestore(&ha->vport_slock, flags);
1da177e4 5336
5f16b331
CD		 5337 if (rval == QLA_SUCCESS)
5338 ql_dbg(ql_dbg_disc, dev->vha, 0x2086,
5339 "Assigning new loopid=%x, portid=%x.\n",
5340 dev->loop_id, dev->d_id.b24);
5341 else
5342 ql_log(ql_log_warn, dev->vha, 0x2087,
5343 "No loop_id's available, portid=%x.\n",
5344 dev->d_id.b24);
1da177e4
LT		 5345
5346 return (rval);
5347}
5348
1da177e4
LT		 5349
5350/*
5351 * qla2x00_fabric_login
5352 * Issue fabric login command.
5353 *
5354 * Input:
5355 * ha = adapter block pointer.
5356 * device = pointer to FC device type structure.
5357 *
5358 * Returns:
5359 * 0 - Login successfully
5360 * 1 - Login failed
5361 * 2 - Initiator device
5362 * 3 - Fatal error
5363 */
5364int
e315cd28 5365qla2x00_fabric_login(scsi_qla_host_t *vha, fc_port_t *fcport,
1da177e4
LT		 5366 uint16_t *next_loopid)
5367{
5368 int rval;
5369 int retry;
5370 uint16_t tmp_loopid;
5371 uint16_t mb[MAILBOX_REGISTER_COUNT];
e315cd28 5372 struct qla_hw_data *ha = vha->hw;
1da177e4
LT		 5373
5374 retry = 0;
5375 tmp_loopid = 0;
5376
5377 for (;;) {
7c3df132
SK		 5378 ql_dbg(ql_dbg_disc, vha, 0x2000,
5379 "Trying Fabric Login w/loop id 0x%04x for port "
5380 "%02x%02x%02x.\n",
5381 fcport->loop_id, fcport->d_id.b.domain,
5382 fcport->d_id.b.area, fcport->d_id.b.al_pa);
1da177e4
LT		 5383
5384 /* Login fcport on switch. */
0b91d116 5385 rval = ha->isp_ops->fabric_login(vha, fcport->loop_id,
1da177e4
LT		 5386 fcport->d_id.b.domain, fcport->d_id.b.area,
5387 fcport->d_id.b.al_pa, mb, BIT_0);
0b91d116
CD		 5388 if (rval != QLA_SUCCESS) {
5389 return rval;
5390 }
1da177e4
LT		 5391 if (mb[0] == MBS_PORT_ID_USED) {
5392 /*
5393 * Device has another loop ID. The firmware team
0107109e
AV		 5394 * recommends the driver perform an implicit login with
5395 * the specified ID again. The ID we just used is save
5396 * here so we return with an ID that can be tried by
5397 * the next login.
1da177e4
LT		 5398 */
5399 retry++;
5400 tmp_loopid = fcport->loop_id;
5401 fcport->loop_id = mb[1];
5402
7c3df132
SK		 5403 ql_dbg(ql_dbg_disc, vha, 0x2001,
5404 "Fabric Login: port in use - next loop "
5405 "id=0x%04x, port id= %02x%02x%02x.\n",
1da177e4 5406 fcport->loop_id, fcport->d_id.b.domain,
7c3df132 5407 fcport->d_id.b.area, fcport->d_id.b.al_pa);
1da177e4
LT		 5408
5409 } else if (mb[0] == MBS_COMMAND_COMPLETE) {
5410 /*
5411 * Login succeeded.
5412 */
5413 if (retry) {
5414 /* A retry occurred before. */
5415 *next_loopid = tmp_loopid;
5416 } else {
5417 /*
5418 * No retry occurred before. Just increment the
5419 * ID value for next login.
5420 */
5421 *next_loopid = (fcport->loop_id + 1);
5422 }
5423
5424 if (mb[1] & BIT_0) {
5425 fcport->port_type = FCT_INITIATOR;
5426 } else {
5427 fcport->port_type = FCT_TARGET;
5428 if (mb[1] & BIT_1) {
8474f3a0 5429 fcport->flags |= FCF_FCP2_DEVICE;
1da177e4
LT		 5430 }
5431 }
5432
ad3e0eda
AV		 5433 if (mb[10] & BIT_0)
5434 fcport->supported_classes |= FC_COS_CLASS2;
5435 if (mb[10] & BIT_1)
5436 fcport->supported_classes |= FC_COS_CLASS3;
5437
2d70c103
NB		 5438 if (IS_FWI2_CAPABLE(ha)) {
5439 if (mb[10] & BIT_7)
5440 fcport->flags |=
5441 FCF_CONF_COMP_SUPPORTED;
5442 }
5443
1da177e4
LT		 5444 rval = QLA_SUCCESS;
5445 break;
5446 } else if (mb[0] == MBS_LOOP_ID_USED) {
5447 /*
5448 * Loop ID already used, try next loop ID.
5449 */
5450 fcport->loop_id++;
e315cd28 5451 rval = qla2x00_find_new_loop_id(vha, fcport);
1da177e4
LT		 5452 if (rval != QLA_SUCCESS) {
5453 /* Ran out of loop IDs to use */
5454 break;
5455 }
5456 } else if (mb[0] == MBS_COMMAND_ERROR) {
5457 /*
5458 * Firmware possibly timed out during login. If NO
5459 * retries are left to do then the device is declared
5460 * dead.
5461 */
5462 *next_loopid = fcport->loop_id;
e315cd28 5463 ha->isp_ops->fabric_logout(vha, fcport->loop_id,
1c7c6357
AV		 5464 fcport->d_id.b.domain, fcport->d_id.b.area,
5465 fcport->d_id.b.al_pa);
e315cd28 5466 qla2x00_mark_device_lost(vha, fcport, 1, 0);
1da177e4
LT		 5467
5468 rval = 1;
5469 break;
5470 } else {
5471 /*
5472 * unrecoverable / not handled error
5473 */
7c3df132
SK		 5474 ql_dbg(ql_dbg_disc, vha, 0x2002,
5475 "Failed=%x port_id=%02x%02x%02x loop_id=%x "
5476 "jiffies=%lx.\n", mb[0], fcport->d_id.b.domain,
5477 fcport->d_id.b.area, fcport->d_id.b.al_pa,
5478 fcport->loop_id, jiffies);
1da177e4
LT		 5479
5480 *next_loopid = fcport->loop_id;
e315cd28 5481 ha->isp_ops->fabric_logout(vha, fcport->loop_id,
1c7c6357
AV		 5482 fcport->d_id.b.domain, fcport->d_id.b.area,
5483 fcport->d_id.b.al_pa);
5f16b331 5484 qla2x00_clear_loop_id(fcport);
0eedfcf0 5485 fcport->login_retry = 0;
1da177e4
LT		 5486
5487 rval = 3;
5488 break;
5489 }
5490 }
5491
5492 return (rval);
5493}
5494
5495/*
5496 * qla2x00_local_device_login
5497 * Issue local device login command.
5498 *
5499 * Input:
5500 * ha = adapter block pointer.
5501 * loop_id = loop id of device to login to.
5502 *
5503 * Returns (Where's the #define!!!!):
5504 * 0 - Login successfully
5505 * 1 - Login failed
5506 * 3 - Fatal error
5507 */
5508int
e315cd28 5509qla2x00_local_device_login(scsi_qla_host_t *vha, fc_port_t *fcport)
1da177e4
LT		 5510{
5511 int rval;
5512 uint16_t mb[MAILBOX_REGISTER_COUNT];
5513
5514 memset(mb, 0, sizeof(mb));
e315cd28 5515 rval = qla2x00_login_local_device(vha, fcport, mb, BIT_0);
1da177e4
LT		 5516 if (rval == QLA_SUCCESS) {
5517 /* Interrogate mailbox registers for any errors */
5518 if (mb[0] == MBS_COMMAND_ERROR)
5519 rval = 1;
5520 else if (mb[0] == MBS_COMMAND_PARAMETER_ERROR)
5521 /* device not in PCB table */
5522 rval = 3;
5523 }
5524
5525 return (rval);
5526}
5527
5528/*
5529 * qla2x00_loop_resync
5530 * Resync with fibre channel devices.
5531 *
5532 * Input:
5533 * ha = adapter block pointer.
5534 *
5535 * Returns:
5536 * 0 = success
5537 */
5538int
e315cd28 5539qla2x00_loop_resync(scsi_qla_host_t *vha)
1da177e4 5540{
73208dfd 5541 int rval = QLA_SUCCESS;
1da177e4 5542 uint32_t wait_time;
67c2e93a
AC		 5543 struct req_que *req;
5544 struct rsp_que *rsp;
5545
d7459527 5546 req = vha->req;
67c2e93a 5547 rsp = req->rsp;
1da177e4 5548
e315cd28
AC		 5549 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
5550 if (vha->flags.online) {
5551 if (!(rval = qla2x00_fw_ready(vha))) {
1da177e4
LT		 5552 /* Wait at most MAX_TARGET RSCNs for a stable link. */
5553 wait_time = 256;
5554 do {
8ae6d9c7
GM		 5555 if (!IS_QLAFX00(vha->hw)) {
5556 /*
5557 * Issue a marker after FW becomes
5558 * ready.
5559 */
5560 qla2x00_marker(vha, req, rsp, 0, 0,
5561 MK_SYNC_ALL);
5562 vha->marker_needed = 0;
5563 }
1da177e4
LT		 5564
5565 /* Remap devices on Loop. */
e315cd28 5566 clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
1da177e4 5567
8ae6d9c7
GM		 5568 if (IS_QLAFX00(vha->hw))
5569 qlafx00_configure_devices(vha);
5570 else
5571 qla2x00_configure_loop(vha);
5572
1da177e4 5573 wait_time--;
e315cd28
AC		 5574 } while (!atomic_read(&vha->loop_down_timer) &&
5575 !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags))
5576 && wait_time && (test_bit(LOOP_RESYNC_NEEDED,
5577 &vha->dpc_flags)));
1da177e4 5578 }
1da177e4
LT		 5579 }
5580
e315cd28 5581 if (test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags))
1da177e4 5582 return (QLA_FUNCTION_FAILED);
1da177e4 5583
e315cd28 5584 if (rval)
7c3df132
SK		 5585 ql_dbg(ql_dbg_disc, vha, 0x206c,
5586 "%s *** FAILED ***.\n", __func__);
1da177e4
LT		 5587
5588 return (rval);
5589}
5590
579d12b5
SK		 5591/*
5592* qla2x00_perform_loop_resync
5593* Description: This function will set the appropriate flags and call
5594* qla2x00_loop_resync. If successful loop will be resynced
5595* Arguments : scsi_qla_host_t pointer
5596* returm : Success or Failure
5597*/
5598
5599int qla2x00_perform_loop_resync(scsi_qla_host_t *ha)
5600{
5601 int32_t rval = 0;
5602
5603 if (!test_and_set_bit(LOOP_RESYNC_ACTIVE, &ha->dpc_flags)) {
5604 /*Configure the flags so that resync happens properly*/
5605 atomic_set(&ha->loop_down_timer, 0);
5606 if (!(ha->device_flags & DFLG_NO_CABLE)) {
5607 atomic_set(&ha->loop_state, LOOP_UP);
5608 set_bit(LOCAL_LOOP_UPDATE, &ha->dpc_flags);
5609 set_bit(REGISTER_FC4_NEEDED, &ha->dpc_flags);
5610 set_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags);
5611
5612 rval = qla2x00_loop_resync(ha);
5613 } else
5614 atomic_set(&ha->loop_state, LOOP_DEAD);
5615
5616 clear_bit(LOOP_RESYNC_ACTIVE, &ha->dpc_flags);
5617 }
5618
5619 return rval;
5620}
5621
d97994dc 5622void
67becc00 5623qla2x00_update_fcports(scsi_qla_host_t *base_vha)
d97994dc 5624{
5625 fc_port_t *fcport;
feafb7b1
AE		 5626 struct scsi_qla_host *vha;
5627 struct qla_hw_data *ha = base_vha->hw;
5628 unsigned long flags;
d97994dc 5629
feafb7b1 5630 spin_lock_irqsave(&ha->vport_slock, flags);
d97994dc 5631 /* Go with deferred removal of rport references. */
feafb7b1
AE		 5632 list_for_each_entry(vha, &base_vha->hw->vp_list, list) {
5633 atomic_inc(&vha->vref_count);
5634 list_for_each_entry(fcport, &vha->vp_fcports, list) {
8ae598d0 5635 if (fcport->drport &&
feafb7b1
AE		 5636 atomic_read(&fcport->state) != FCS_UNCONFIGURED) {
5637 spin_unlock_irqrestore(&ha->vport_slock, flags);
67becc00 5638 qla2x00_rport_del(fcport);
df673274 5639
feafb7b1
AE		 5640 spin_lock_irqsave(&ha->vport_slock, flags);
5641 }
5642 }
5643 atomic_dec(&vha->vref_count);
c4a9b538 5644 wake_up(&vha->vref_waitq);
feafb7b1
AE		 5645 }
5646 spin_unlock_irqrestore(&ha->vport_slock, flags);
d97994dc 5647}
5648
7d613ac6
SV		 5649/* Assumes idc_lock always held on entry */
5650void
5651qla83xx_reset_ownership(scsi_qla_host_t *vha)
5652{
5653 struct qla_hw_data *ha = vha->hw;
5654 uint32_t drv_presence, drv_presence_mask;
5655 uint32_t dev_part_info1, dev_part_info2, class_type;
5656 uint32_t class_type_mask = 0x3;
5657 uint16_t fcoe_other_function = 0xffff, i;
5658
7ec0effd
AD		 5659 if (IS_QLA8044(ha)) {
5660 drv_presence = qla8044_rd_direct(vha,
5661 QLA8044_CRB_DRV_ACTIVE_INDEX);
5662 dev_part_info1 = qla8044_rd_direct(vha,
5663 QLA8044_CRB_DEV_PART_INFO_INDEX);
5664 dev_part_info2 = qla8044_rd_direct(vha,
5665 QLA8044_CRB_DEV_PART_INFO2);
5666 } else {
5667 qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
5668 qla83xx_rd_reg(vha, QLA83XX_DEV_PARTINFO1, &dev_part_info1);
5669 qla83xx_rd_reg(vha, QLA83XX_DEV_PARTINFO2, &dev_part_info2);
5670 }
7d613ac6
SV		 5671 for (i = 0; i < 8; i++) {
5672 class_type = ((dev_part_info1 >> (i * 4)) & class_type_mask);
5673 if ((class_type == QLA83XX_CLASS_TYPE_FCOE) &&
5674 (i != ha->portnum)) {
5675 fcoe_other_function = i;
5676 break;
5677 }
5678 }
5679 if (fcoe_other_function == 0xffff) {
5680 for (i = 0; i < 8; i++) {
5681 class_type = ((dev_part_info2 >> (i * 4)) &
5682 class_type_mask);
5683 if ((class_type == QLA83XX_CLASS_TYPE_FCOE) &&
5684 ((i + 8) != ha->portnum)) {
5685 fcoe_other_function = i + 8;
5686 break;
5687 }
5688 }
5689 }
5690 /*
5691 * Prepare drv-presence mask based on fcoe functions present.
5692 * However consider only valid physical fcoe function numbers (0-15).
5693 */
5694 drv_presence_mask = ~((1 << (ha->portnum)) |
5695 ((fcoe_other_function == 0xffff) ?
5696 0 : (1 << (fcoe_other_function))));
5697
5698 /* We are the reset owner iff:
5699 * - No other protocol drivers present.
5700 * - This is the lowest among fcoe functions. */
5701 if (!(drv_presence & drv_presence_mask) &&
5702 (ha->portnum < fcoe_other_function)) {
5703 ql_dbg(ql_dbg_p3p, vha, 0xb07f,
5704 "This host is Reset owner.\n");
5705 ha->flags.nic_core_reset_owner = 1;
5706 }
5707}
5708
fa492630 5709static int
7d613ac6
SV		 5710__qla83xx_set_drv_ack(scsi_qla_host_t *vha)
5711{
5712 int rval = QLA_SUCCESS;
5713 struct qla_hw_data *ha = vha->hw;
5714 uint32_t drv_ack;
5715
5716 rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRIVER_ACK, &drv_ack);
5717 if (rval == QLA_SUCCESS) {
5718 drv_ack |= (1 << ha->portnum);
5719 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRIVER_ACK, drv_ack);
5720 }
5721
5722 return rval;
5723}
5724
fa492630 5725static int
7d613ac6
SV		 5726__qla83xx_clear_drv_ack(scsi_qla_host_t *vha)
5727{
5728 int rval = QLA_SUCCESS;
5729 struct qla_hw_data *ha = vha->hw;
5730 uint32_t drv_ack;
5731
5732 rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRIVER_ACK, &drv_ack);
5733 if (rval == QLA_SUCCESS) {
5734 drv_ack &= ~(1 << ha->portnum);
5735 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRIVER_ACK, drv_ack);
5736 }
5737
5738 return rval;
5739}
5740
fa492630 5741static const char *
7d613ac6
SV		 5742qla83xx_dev_state_to_string(uint32_t dev_state)
5743{
5744 switch (dev_state) {
5745 case QLA8XXX_DEV_COLD:
5746 return "COLD/RE-INIT";
5747 case QLA8XXX_DEV_INITIALIZING:
5748 return "INITIALIZING";
5749 case QLA8XXX_DEV_READY:
5750 return "READY";
5751 case QLA8XXX_DEV_NEED_RESET:
5752 return "NEED RESET";
5753 case QLA8XXX_DEV_NEED_QUIESCENT:
5754 return "NEED QUIESCENT";
5755 case QLA8XXX_DEV_FAILED:
5756 return "FAILED";
5757 case QLA8XXX_DEV_QUIESCENT:
5758 return "QUIESCENT";
5759 default:
5760 return "Unknown";
5761 }
5762}
5763
5764/* Assumes idc-lock always held on entry */
5765void
5766qla83xx_idc_audit(scsi_qla_host_t *vha, int audit_type)
5767{
5768 struct qla_hw_data *ha = vha->hw;
5769 uint32_t idc_audit_reg = 0, duration_secs = 0;
5770
5771 switch (audit_type) {
5772 case IDC_AUDIT_TIMESTAMP:
5773 ha->idc_audit_ts = (jiffies_to_msecs(jiffies) / 1000);
5774 idc_audit_reg = (ha->portnum) |
5775 (IDC_AUDIT_TIMESTAMP << 7) | (ha->idc_audit_ts << 8);
5776 qla83xx_wr_reg(vha, QLA83XX_IDC_AUDIT, idc_audit_reg);
5777 break;
5778
5779 case IDC_AUDIT_COMPLETION:
5780 duration_secs = ((jiffies_to_msecs(jiffies) -
5781 jiffies_to_msecs(ha->idc_audit_ts)) / 1000);
5782 idc_audit_reg = (ha->portnum) |
5783 (IDC_AUDIT_COMPLETION << 7) | (duration_secs << 8);
5784 qla83xx_wr_reg(vha, QLA83XX_IDC_AUDIT, idc_audit_reg);
5785 break;
5786
5787 default:
5788 ql_log(ql_log_warn, vha, 0xb078,
5789 "Invalid audit type specified.\n");
5790 break;
5791 }
5792}
5793
5794/* Assumes idc_lock always held on entry */
fa492630 5795static int
7d613ac6
SV		 5796qla83xx_initiating_reset(scsi_qla_host_t *vha)
5797{
5798 struct qla_hw_data *ha = vha->hw;
5799 uint32_t idc_control, dev_state;
5800
5801 __qla83xx_get_idc_control(vha, &idc_control);
5802 if ((idc_control & QLA83XX_IDC_RESET_DISABLED)) {
5803 ql_log(ql_log_info, vha, 0xb080,
5804 "NIC Core reset has been disabled. idc-control=0x%x\n",
5805 idc_control);
5806 return QLA_FUNCTION_FAILED;
5807 }
5808
5809 /* Set NEED-RESET iff in READY state and we are the reset-owner */
5810 qla83xx_rd_reg(vha, QLA83XX_IDC_DEV_STATE, &dev_state);
5811 if (ha->flags.nic_core_reset_owner && dev_state == QLA8XXX_DEV_READY) {
5812 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE,
5813 QLA8XXX_DEV_NEED_RESET);
5814 ql_log(ql_log_info, vha, 0xb056, "HW State: NEED RESET.\n");
5815 qla83xx_idc_audit(vha, IDC_AUDIT_TIMESTAMP);
5816 } else {
5817 const char *state = qla83xx_dev_state_to_string(dev_state);
5818 ql_log(ql_log_info, vha, 0xb057, "HW State: %s.\n", state);
5819
5820 /* SV: XXX: Is timeout required here? */
5821 /* Wait for IDC state change READY -> NEED_RESET */
5822 while (dev_state == QLA8XXX_DEV_READY) {
5823 qla83xx_idc_unlock(vha, 0);
5824 msleep(200);
5825 qla83xx_idc_lock(vha, 0);
5826 qla83xx_rd_reg(vha, QLA83XX_IDC_DEV_STATE, &dev_state);
5827 }
5828 }
5829
5830 /* Send IDC ack by writing to drv-ack register */
5831 __qla83xx_set_drv_ack(vha);
5832
5833 return QLA_SUCCESS;
5834}
5835
5836int
5837__qla83xx_set_idc_control(scsi_qla_host_t *vha, uint32_t idc_control)
5838{
5839 return qla83xx_wr_reg(vha, QLA83XX_IDC_CONTROL, idc_control);
5840}
5841
7d613ac6
SV		 5842int
5843__qla83xx_get_idc_control(scsi_qla_host_t *vha, uint32_t *idc_control)
5844{
5845 return qla83xx_rd_reg(vha, QLA83XX_IDC_CONTROL, idc_control);
5846}
5847
fa492630 5848static int
7d613ac6
SV		 5849qla83xx_check_driver_presence(scsi_qla_host_t *vha)
5850{
5851 uint32_t drv_presence = 0;
5852 struct qla_hw_data *ha = vha->hw;
5853
5854 qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
5855 if (drv_presence & (1 << ha->portnum))
5856 return QLA_SUCCESS;
5857 else
5858 return QLA_TEST_FAILED;
5859}
5860
5861int
5862qla83xx_nic_core_reset(scsi_qla_host_t *vha)
5863{
5864 int rval = QLA_SUCCESS;
5865 struct qla_hw_data *ha = vha->hw;
5866
5867 ql_dbg(ql_dbg_p3p, vha, 0xb058,
5868 "Entered %s().\n", __func__);
5869
5870 if (vha->device_flags & DFLG_DEV_FAILED) {
5871 ql_log(ql_log_warn, vha, 0xb059,
5872 "Device in unrecoverable FAILED state.\n");
5873 return QLA_FUNCTION_FAILED;
5874 }
5875
5876 qla83xx_idc_lock(vha, 0);
5877
5878 if (qla83xx_check_driver_presence(vha) != QLA_SUCCESS) {
5879 ql_log(ql_log_warn, vha, 0xb05a,
5880 "Function=0x%x has been removed from IDC participation.\n",
5881 ha->portnum);
5882 rval = QLA_FUNCTION_FAILED;
5883 goto exit;
5884 }
5885
5886 qla83xx_reset_ownership(vha);
5887
5888 rval = qla83xx_initiating_reset(vha);
5889
5890 /*
5891 * Perform reset if we are the reset-owner,
5892 * else wait till IDC state changes to READY/FAILED.
5893 */
5894 if (rval == QLA_SUCCESS) {
5895 rval = qla83xx_idc_state_handler(vha);
5896
5897 if (rval == QLA_SUCCESS)
5898 ha->flags.nic_core_hung = 0;
5899 __qla83xx_clear_drv_ack(vha);
5900 }
5901
5902exit:
5903 qla83xx_idc_unlock(vha, 0);
5904
5905 ql_dbg(ql_dbg_p3p, vha, 0xb05b, "Exiting %s.\n", __func__);
5906
5907 return rval;
5908}
5909
81178772
SK		 5910int
5911qla2xxx_mctp_dump(scsi_qla_host_t *vha)
5912{
5913 struct qla_hw_data *ha = vha->hw;
5914 int rval = QLA_FUNCTION_FAILED;
5915
5916 if (!IS_MCTP_CAPABLE(ha)) {
5917 /* This message can be removed from the final version */
5918 ql_log(ql_log_info, vha, 0x506d,
5919 "This board is not MCTP capable\n");
5920 return rval;
5921 }
5922
5923 if (!ha->mctp_dump) {
5924 ha->mctp_dump = dma_alloc_coherent(&ha->pdev->dev,
5925 MCTP_DUMP_SIZE, &ha->mctp_dump_dma, GFP_KERNEL);
5926
5927 if (!ha->mctp_dump) {
5928 ql_log(ql_log_warn, vha, 0x506e,
5929 "Failed to allocate memory for mctp dump\n");
5930 return rval;
5931 }
5932 }
5933
5934#define MCTP_DUMP_STR_ADDR 0x00000000
5935 rval = qla2x00_dump_mctp_data(vha, ha->mctp_dump_dma,
5936 MCTP_DUMP_STR_ADDR, MCTP_DUMP_SIZE/4);
5937 if (rval != QLA_SUCCESS) {
5938 ql_log(ql_log_warn, vha, 0x506f,
5939 "Failed to capture mctp dump\n");
5940 } else {
5941 ql_log(ql_log_info, vha, 0x5070,
5942 "Mctp dump capture for host (%ld/%p).\n",
5943 vha->host_no, ha->mctp_dump);
5944 ha->mctp_dumped = 1;
5945 }
5946
409ee0fe 5947 if (!ha->flags.nic_core_reset_hdlr_active && !ha->portnum) {
81178772
SK		 5948 ha->flags.nic_core_reset_hdlr_active = 1;
5949 rval = qla83xx_restart_nic_firmware(vha);
5950 if (rval)
5951 /* NIC Core reset failed. */
5952 ql_log(ql_log_warn, vha, 0x5071,
5953 "Failed to restart nic firmware\n");
5954 else
5955 ql_dbg(ql_dbg_p3p, vha, 0xb084,
5956 "Restarted NIC firmware successfully.\n");
5957 ha->flags.nic_core_reset_hdlr_active = 0;
5958 }
5959
5960 return rval;
5961
5962}
5963
579d12b5 5964/*
8fcd6b8b 5965* qla2x00_quiesce_io
579d12b5
SK		 5966* Description: This function will block the new I/Os
5967* Its not aborting any I/Os as context
5968* is not destroyed during quiescence
5969* Arguments: scsi_qla_host_t
5970* return : void
5971*/
5972void
8fcd6b8b 5973qla2x00_quiesce_io(scsi_qla_host_t *vha)
579d12b5
SK		 5974{
5975 struct qla_hw_data *ha = vha->hw;
5976 struct scsi_qla_host *vp;
5977
8fcd6b8b
CD		 5978 ql_dbg(ql_dbg_dpc, vha, 0x401d,
5979 "Quiescing I/O - ha=%p.\n", ha);
579d12b5
SK		 5980
5981 atomic_set(&ha->loop_down_timer, LOOP_DOWN_TIME);
5982 if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
5983 atomic_set(&vha->loop_state, LOOP_DOWN);
5984 qla2x00_mark_all_devices_lost(vha, 0);
5985 list_for_each_entry(vp, &ha->vp_list, list)
8fcd6b8b 5986 qla2x00_mark_all_devices_lost(vp, 0);
579d12b5
SK		 5987 } else {
5988 if (!atomic_read(&vha->loop_down_timer))
5989 atomic_set(&vha->loop_down_timer,
5990 LOOP_DOWN_TIME);
5991 }
5992 /* Wait for pending cmds to complete */
5993 qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST);
5994}
5995
a9083016
GM		 5996void
5997qla2x00_abort_isp_cleanup(scsi_qla_host_t *vha)
5998{
5999 struct qla_hw_data *ha = vha->hw;
579d12b5 6000 struct scsi_qla_host *vp;
feafb7b1 6001 unsigned long flags;
6aef87be 6002 fc_port_t *fcport;
7c3f8fd1 6003 u16 i;
a9083016 6004
e46ef004
SK		 6005 /* For ISP82XX, driver waits for completion of the commands.
6006 * online flag should be set.
6007 */
7ec0effd 6008 if (!(IS_P3P_TYPE(ha)))
e46ef004 6009 vha->flags.online = 0;
a9083016
GM		 6010 ha->flags.chip_reset_done = 0;
6011 clear_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
2be21fa2 6012 vha->qla_stats.total_isp_aborts++;
a9083016 6013
7c3df132
SK		 6014 ql_log(ql_log_info, vha, 0x00af,
6015 "Performing ISP error recovery - ha=%p.\n", ha);
a9083016 6016
e46ef004
SK		 6017 /* For ISP82XX, reset_chip is just disabling interrupts.
6018 * Driver waits for the completion of the commands.
6019 * the interrupts need to be enabled.
6020 */
7ec0effd 6021 if (!(IS_P3P_TYPE(ha)))
a9083016
GM		 6022 ha->isp_ops->reset_chip(vha);
6023
ec7193e2
QT		 6024 ha->flags.n2n_ae = 0;
6025 ha->flags.lip_ae = 0;
6026 ha->current_topology = 0;
6027 ha->flags.fw_started = 0;
6028 ha->flags.fw_init_done = 0;
7c3f8fd1
QT		 6029 ha->base_qpair->chip_reset++;
6030 for (i = 0; i < ha->max_qpairs; i++) {
6031 if (ha->queue_pair_map[i])
6032 ha->queue_pair_map[i]->chip_reset =
6033 ha->base_qpair->chip_reset;
6034 }
726b8548 6035
a9083016
GM		 6036 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
6037 if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
6038 atomic_set(&vha->loop_state, LOOP_DOWN);
6039 qla2x00_mark_all_devices_lost(vha, 0);
feafb7b1
AE		 6040
6041 spin_lock_irqsave(&ha->vport_slock, flags);
579d12b5 6042 list_for_each_entry(vp, &ha->vp_list, list) {
feafb7b1
AE		 6043 atomic_inc(&vp->vref_count);
6044 spin_unlock_irqrestore(&ha->vport_slock, flags);
6045
a9083016 6046 qla2x00_mark_all_devices_lost(vp, 0);
feafb7b1
AE		 6047
6048 spin_lock_irqsave(&ha->vport_slock, flags);
6049 atomic_dec(&vp->vref_count);
6050 }
6051 spin_unlock_irqrestore(&ha->vport_slock, flags);
a9083016
GM		 6052 } else {
6053 if (!atomic_read(&vha->loop_down_timer))
6054 atomic_set(&vha->loop_down_timer,
6055 LOOP_DOWN_TIME);
6056 }
6057
6aef87be
AV		 6058 /* Clear all async request states across all VPs. */
6059 list_for_each_entry(fcport, &vha->vp_fcports, list)
6060 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT);
6061 spin_lock_irqsave(&ha->vport_slock, flags);
6062 list_for_each_entry(vp, &ha->vp_list, list) {
6063 atomic_inc(&vp->vref_count);
6064 spin_unlock_irqrestore(&ha->vport_slock, flags);
6065
6066 list_for_each_entry(fcport, &vp->vp_fcports, list)
6067 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT);
6068
6069 spin_lock_irqsave(&ha->vport_slock, flags);
6070 atomic_dec(&vp->vref_count);
6071 }
6072 spin_unlock_irqrestore(&ha->vport_slock, flags);
6073
bddd2d65
LC		 6074 if (!ha->flags.eeh_busy) {
6075 /* Make sure for ISP 82XX IO DMA is complete */
7ec0effd 6076 if (IS_P3P_TYPE(ha)) {
7190575f 6077 qla82xx_chip_reset_cleanup(vha);
7c3df132
SK		 6078 ql_log(ql_log_info, vha, 0x00b4,
6079 "Done chip reset cleanup.\n");
a9083016 6080
e46ef004
SK		 6081 /* Done waiting for pending commands.
6082 * Reset the online flag.
6083 */
6084 vha->flags.online = 0;
4d78c973 6085 }
a9083016 6086
bddd2d65
LC		 6087 /* Requeue all commands in outstanding command list. */
6088 qla2x00_abort_all_cmds(vha, DID_RESET << 16);
6089 }
b6a029e1
AE		 6090 /* memory barrier */
6091 wmb();
a9083016
GM		 6092}
6093
1da177e4
LT		 6094/*
6095* qla2x00_abort_isp
6096* Resets ISP and aborts all outstanding commands.
6097*
6098* Input:
6099* ha = adapter block pointer.
6100*
6101* Returns:
6102* 0 = success
6103*/
6104int
e315cd28 6105qla2x00_abort_isp(scsi_qla_host_t *vha)
1da177e4 6106{
476e8978 6107 int rval;
1da177e4 6108 uint8_t status = 0;
e315cd28
AC		 6109 struct qla_hw_data *ha = vha->hw;
6110 struct scsi_qla_host *vp;
73208dfd 6111 struct req_que *req = ha->req_q_map[0];
feafb7b1 6112 unsigned long flags;
1da177e4 6113
e315cd28 6114 if (vha->flags.online) {
a9083016 6115 qla2x00_abort_isp_cleanup(vha);
1da177e4 6116
a6171297
SV		 6117 if (IS_QLA8031(ha)) {
6118 ql_dbg(ql_dbg_p3p, vha, 0xb05c,
6119 "Clearing fcoe driver presence.\n");
6120 if (qla83xx_clear_drv_presence(vha) != QLA_SUCCESS)
6121 ql_dbg(ql_dbg_p3p, vha, 0xb073,
6122 "Error while clearing DRV-Presence.\n");
6123 }
6124
85880801
AV		 6125 if (unlikely(pci_channel_offline(ha->pdev) &&
6126 ha->flags.pci_channel_io_perm_failure)) {
6127 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
6128 status = 0;
6129 return status;
6130 }
6131
73208dfd 6132 ha->isp_ops->get_flash_version(vha, req->ring);
30c47662 6133
e315cd28 6134 ha->isp_ops->nvram_config(vha);
1da177e4 6135
e315cd28
AC		 6136 if (!qla2x00_restart_isp(vha)) {
6137 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
1da177e4 6138
e315cd28 6139 if (!atomic_read(&vha->loop_down_timer)) {
1da177e4
LT		 6140 /*
6141 * Issue marker command only when we are going
6142 * to start the I/O .
6143 */
e315cd28 6144 vha->marker_needed = 1;
1da177e4
LT		 6145 }
6146
e315cd28 6147 vha->flags.online = 1;
1da177e4 6148
fd34f556 6149 ha->isp_ops->enable_intrs(ha);
1da177e4 6150
fa2a1ce5 6151 ha->isp_abort_cnt = 0;
e315cd28 6152 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
476e8978 6153
6246b8a1
GM		 6154 if (IS_QLA81XX(ha) || IS_QLA8031(ha))
6155 qla2x00_get_fw_version(vha);
df613b96
AV		 6156 if (ha->fce) {
6157 ha->flags.fce_enabled = 1;
6158 memset(ha->fce, 0,
6159 fce_calc_size(ha->fce_bufs));
e315cd28 6160 rval = qla2x00_enable_fce_trace(vha,
df613b96
AV		 6161 ha->fce_dma, ha->fce_bufs, ha->fce_mb,
6162 &ha->fce_bufs);
6163 if (rval) {
7c3df132 6164 ql_log(ql_log_warn, vha, 0x8033,
df613b96
AV		 6165 "Unable to reinitialize FCE "
6166 "(%d).\n", rval);
6167 ha->flags.fce_enabled = 0;
6168 }
6169 }
436a7b11
AV		 6170
6171 if (ha->eft) {
6172 memset(ha->eft, 0, EFT_SIZE);
e315cd28 6173 rval = qla2x00_enable_eft_trace(vha,
436a7b11
AV		 6174 ha->eft_dma, EFT_NUM_BUFFERS);
6175 if (rval) {
7c3df132 6176 ql_log(ql_log_warn, vha, 0x8034,
436a7b11
AV		 6177 "Unable to reinitialize EFT "
6178 "(%d).\n", rval);
6179 }
6180 }
1da177e4 6181 } else { /* failed the ISP abort */
e315cd28
AC		 6182 vha->flags.online = 1;
6183 if (test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) {
1da177e4 6184 if (ha->isp_abort_cnt == 0) {
7c3df132
SK		 6185 ql_log(ql_log_fatal, vha, 0x8035,
6186 "ISP error recover failed - "
6187 "board disabled.\n");
fa2a1ce5 6188 /*
1da177e4
LT		 6189 * The next call disables the board
6190 * completely.
6191 */
e315cd28
AC		 6192 ha->isp_ops->reset_adapter(vha);
6193 vha->flags.online = 0;
1da177e4 6194 clear_bit(ISP_ABORT_RETRY,
e315cd28 6195 &vha->dpc_flags);
1da177e4
LT		 6196 status = 0;
6197 } else { /* schedule another ISP abort */
6198 ha->isp_abort_cnt--;
7c3df132
SK		 6199 ql_dbg(ql_dbg_taskm, vha, 0x8020,
6200 "ISP abort - retry remaining %d.\n",
6201 ha->isp_abort_cnt);
1da177e4
LT		 6202 status = 1;
6203 }
6204 } else {
6205 ha->isp_abort_cnt = MAX_RETRIES_OF_ISP_ABORT;
7c3df132
SK		 6206 ql_dbg(ql_dbg_taskm, vha, 0x8021,
6207 "ISP error recovery - retrying (%d) "
6208 "more times.\n", ha->isp_abort_cnt);
e315cd28 6209 set_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
1da177e4
LT		 6210 status = 1;
6211 }
6212 }
fa2a1ce5 6213
1da177e4
LT		 6214 }
6215
e315cd28 6216 if (!status) {
7c3df132 6217 ql_dbg(ql_dbg_taskm, vha, 0x8022, "%s succeeded.\n", __func__);
1608cc4a 6218 qla2x00_configure_hba(vha);
feafb7b1
AE		 6219 spin_lock_irqsave(&ha->vport_slock, flags);
6220 list_for_each_entry(vp, &ha->vp_list, list) {
6221 if (vp->vp_idx) {
6222 atomic_inc(&vp->vref_count);
6223 spin_unlock_irqrestore(&ha->vport_slock, flags);
6224
e315cd28 6225 qla2x00_vp_abort_isp(vp);
feafb7b1
AE		 6226
6227 spin_lock_irqsave(&ha->vport_slock, flags);
6228 atomic_dec(&vp->vref_count);
6229 }
e315cd28 6230 }
feafb7b1
AE		 6231 spin_unlock_irqrestore(&ha->vport_slock, flags);
6232
7d613ac6
SV		 6233 if (IS_QLA8031(ha)) {
6234 ql_dbg(ql_dbg_p3p, vha, 0xb05d,
6235 "Setting back fcoe driver presence.\n");
6236 if (qla83xx_set_drv_presence(vha) != QLA_SUCCESS)
6237 ql_dbg(ql_dbg_p3p, vha, 0xb074,
6238 "Error while setting DRV-Presence.\n");
6239 }
e315cd28 6240 } else {
d8424f68
JP		 6241 ql_log(ql_log_warn, vha, 0x8023, "%s **** FAILED ****.\n",
6242 __func__);
1da177e4
LT		 6243 }
6244
6245 return(status);
6246}
6247
6248/*
6249* qla2x00_restart_isp
6250* restarts the ISP after a reset
6251*
6252* Input:
6253* ha = adapter block pointer.
6254*
6255* Returns:
6256* 0 = success
6257*/
6258static int
e315cd28 6259qla2x00_restart_isp(scsi_qla_host_t *vha)
1da177e4 6260{
c6b2fca8 6261 int status = 0;
e315cd28 6262 struct qla_hw_data *ha = vha->hw;
73208dfd
AC		 6263 struct req_que *req = ha->req_q_map[0];
6264 struct rsp_que *rsp = ha->rsp_q_map[0];
1da177e4
LT		 6265
6266 /* If firmware needs to be loaded */
e315cd28
AC		 6267 if (qla2x00_isp_firmware(vha)) {
6268 vha->flags.online = 0;
6269 status = ha->isp_ops->chip_diag(vha);
6270 if (!status)
6271 status = qla2x00_setup_chip(vha);
1da177e4
LT		 6272 }
6273
e315cd28
AC		 6274 if (!status && !(status = qla2x00_init_rings(vha))) {
6275 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
2533cf67 6276 ha->flags.chip_reset_done = 1;
7108b76e 6277
73208dfd
AC		 6278 /* Initialize the queues in use */
6279 qla25xx_init_queues(ha);
6280
e315cd28
AC		 6281 status = qla2x00_fw_ready(vha);
6282 if (!status) {
0107109e 6283 /* Issue a marker after FW becomes ready. */
73208dfd 6284 qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL);
7108b76e 6285 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
1da177e4
LT		 6286 }
6287
6288 /* if no cable then assume it's good */
e315cd28 6289 if ((vha->device_flags & DFLG_NO_CABLE))
1da177e4 6290 status = 0;
1da177e4
LT		 6291 }
6292 return (status);
6293}
6294
73208dfd
AC		 6295static int
6296qla25xx_init_queues(struct qla_hw_data *ha)
6297{
6298 struct rsp_que *rsp = NULL;
6299 struct req_que *req = NULL;
6300 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
6301 int ret = -1;
6302 int i;
6303
2afa19a9 6304 for (i = 1; i < ha->max_rsp_queues; i++) {
73208dfd 6305 rsp = ha->rsp_q_map[i];
cb43285f 6306 if (rsp && test_bit(i, ha->rsp_qid_map)) {
73208dfd 6307 rsp->options &= ~BIT_0;
618a7523 6308 ret = qla25xx_init_rsp_que(base_vha, rsp);
73208dfd 6309 if (ret != QLA_SUCCESS)
7c3df132
SK		 6310 ql_dbg(ql_dbg_init, base_vha, 0x00ff,
6311 "%s Rsp que: %d init failed.\n",
6312 __func__, rsp->id);
73208dfd 6313 else
7c3df132
SK		 6314 ql_dbg(ql_dbg_init, base_vha, 0x0100,
6315 "%s Rsp que: %d inited.\n",
6316 __func__, rsp->id);
73208dfd 6317 }
2afa19a9
AC		 6318 }
6319 for (i = 1; i < ha->max_req_queues; i++) {
73208dfd 6320 req = ha->req_q_map[i];
cb43285f
QT		 6321 if (req && test_bit(i, ha->req_qid_map)) {
6322 /* Clear outstanding commands array. */
73208dfd 6323 req->options &= ~BIT_0;
618a7523 6324 ret = qla25xx_init_req_que(base_vha, req);
73208dfd 6325 if (ret != QLA_SUCCESS)
7c3df132
SK		 6326 ql_dbg(ql_dbg_init, base_vha, 0x0101,
6327 "%s Req que: %d init failed.\n",
6328 __func__, req->id);
73208dfd 6329 else
7c3df132
SK		 6330 ql_dbg(ql_dbg_init, base_vha, 0x0102,
6331 "%s Req que: %d inited.\n",
6332 __func__, req->id);
73208dfd
AC		 6333 }
6334 }
6335 return ret;
6336}
6337
1da177e4
LT		 6338/*
6339* qla2x00_reset_adapter
6340* Reset adapter.
6341*
6342* Input:
6343* ha = adapter block pointer.
6344*/
abbd8870 6345void
e315cd28 6346qla2x00_reset_adapter(scsi_qla_host_t *vha)
1da177e4
LT		 6347{
6348 unsigned long flags = 0;
e315cd28 6349 struct qla_hw_data *ha = vha->hw;
3d71644c 6350 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1da177e4 6351
e315cd28 6352 vha->flags.online = 0;
fd34f556 6353 ha->isp_ops->disable_intrs(ha);
1da177e4 6354
1da177e4
LT		 6355 spin_lock_irqsave(&ha->hardware_lock, flags);
6356 WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
6357 RD_REG_WORD(&reg->hccr); /* PCI Posting. */
6358 WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
6359 RD_REG_WORD(&reg->hccr); /* PCI Posting. */
6360 spin_unlock_irqrestore(&ha->hardware_lock, flags);
6361}
0107109e
AV		 6362
6363void
e315cd28 6364qla24xx_reset_adapter(scsi_qla_host_t *vha)
0107109e
AV		 6365{
6366 unsigned long flags = 0;
e315cd28 6367 struct qla_hw_data *ha = vha->hw;
0107109e
AV		 6368 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
6369
7ec0effd 6370 if (IS_P3P_TYPE(ha))
a9083016
GM		 6371 return;
6372
e315cd28 6373 vha->flags.online = 0;
fd34f556 6374 ha->isp_ops->disable_intrs(ha);
0107109e
AV		 6375
6376 spin_lock_irqsave(&ha->hardware_lock, flags);
6377 WRT_REG_DWORD(&reg->hccr, HCCRX_SET_RISC_RESET);
6378 RD_REG_DWORD(&reg->hccr);
6379 WRT_REG_DWORD(&reg->hccr, HCCRX_REL_RISC_PAUSE);
6380 RD_REG_DWORD(&reg->hccr);
6381 spin_unlock_irqrestore(&ha->hardware_lock, flags);
09ff36d3
AV		 6382
6383 if (IS_NOPOLLING_TYPE(ha))
6384 ha->isp_ops->enable_intrs(ha);
0107109e
AV		 6385}
6386
4e08df3f
DM		 6387/* On sparc systems, obtain port and node WWN from firmware
6388 * properties.
6389 */
e315cd28
AC		 6390static void qla24xx_nvram_wwn_from_ofw(scsi_qla_host_t *vha,
6391 struct nvram_24xx *nv)
4e08df3f
DM		 6392{
6393#ifdef CONFIG_SPARC
e315cd28 6394 struct qla_hw_data *ha = vha->hw;
4e08df3f 6395 struct pci_dev *pdev = ha->pdev;
15576bc8
DM		 6396 struct device_node *dp = pci_device_to_OF_node(pdev);
6397 const u8 *val;
4e08df3f
DM		 6398 int len;
6399
6400 val = of_get_property(dp, "port-wwn", &len);
6401 if (val && len >= WWN_SIZE)
6402 memcpy(nv->port_name, val, WWN_SIZE);
6403
6404 val = of_get_property(dp, "node-wwn", &len);
6405 if (val && len >= WWN_SIZE)
6406 memcpy(nv->node_name, val, WWN_SIZE);
6407#endif
6408}
6409
0107109e 6410int
e315cd28 6411qla24xx_nvram_config(scsi_qla_host_t *vha)
0107109e 6412{
4e08df3f 6413 int rval;
0107109e
AV		 6414 struct init_cb_24xx *icb;
6415 struct nvram_24xx *nv;
6416 uint32_t *dptr;
6417 uint8_t *dptr1, *dptr2;
6418 uint32_t chksum;
6419 uint16_t cnt;
e315cd28 6420 struct qla_hw_data *ha = vha->hw;
0107109e 6421
4e08df3f 6422 rval = QLA_SUCCESS;
0107109e 6423 icb = (struct init_cb_24xx *)ha->init_cb;
281afe19 6424 nv = ha->nvram;
0107109e
AV		 6425
6426 /* Determine NVRAM starting address. */
f73cb695 6427 if (ha->port_no == 0) {
e5b68a61
AC		 6428 ha->nvram_base = FA_NVRAM_FUNC0_ADDR;
6429 ha->vpd_base = FA_NVRAM_VPD0_ADDR;
6430 } else {
0107109e 6431 ha->nvram_base = FA_NVRAM_FUNC1_ADDR;
6f641790 6432 ha->vpd_base = FA_NVRAM_VPD1_ADDR;
6433 }
f73cb695 6434
e5b68a61
AC		 6435 ha->nvram_size = sizeof(struct nvram_24xx);
6436 ha->vpd_size = FA_NVRAM_VPD_SIZE;
0107109e 6437
281afe19
SJ		 6438 /* Get VPD data into cache */
6439 ha->vpd = ha->nvram + VPD_OFFSET;
e315cd28 6440 ha->isp_ops->read_nvram(vha, (uint8_t *)ha->vpd,
281afe19
SJ		 6441 ha->nvram_base - FA_NVRAM_FUNC0_ADDR, FA_NVRAM_VPD_SIZE * 4);
6442
6443 /* Get NVRAM data into cache and calculate checksum. */
0107109e 6444 dptr = (uint32_t *)nv;
e315cd28 6445 ha->isp_ops->read_nvram(vha, (uint8_t *)dptr, ha->nvram_base,
0107109e 6446 ha->nvram_size);
da08ef5c
JC		 6447 for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++, dptr++)
6448 chksum += le32_to_cpu(*dptr);
0107109e 6449
7c3df132
SK		 6450 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x006a,
6451 "Contents of NVRAM\n");
6452 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x010d,
6453 (uint8_t *)nv, ha->nvram_size);
0107109e
AV		 6454
6455 /* Bad NVRAM data, set defaults parameters. */
6456 if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P'
6457 || nv->id[3] != ' ' ||
ad950360 6458 nv->nvram_version < cpu_to_le16(ICB_VERSION)) {
0107109e 6459 /* Reset NVRAM data. */
7c3df132 6460 ql_log(ql_log_warn, vha, 0x006b,
9e336520 6461 "Inconsistent NVRAM detected: checksum=0x%x id=%c "
7c3df132
SK		 6462 "version=0x%x.\n", chksum, nv->id[0], nv->nvram_version);
6463 ql_log(ql_log_warn, vha, 0x006c,
6464 "Falling back to functioning (yet invalid -- WWPN) "
6465 "defaults.\n");
4e08df3f
DM		 6466
6467 /*
6468 * Set default initialization control block.
6469 */
6470 memset(nv, 0, ha->nvram_size);
ad950360
BVA		 6471 nv->nvram_version = cpu_to_le16(ICB_VERSION);
6472 nv->version = cpu_to_le16(ICB_VERSION);
98aee70d 6473 nv->frame_payload_size = 2048;
ad950360
BVA		 6474 nv->execution_throttle = cpu_to_le16(0xFFFF);
6475 nv->exchange_count = cpu_to_le16(0);
6476 nv->hard_address = cpu_to_le16(124);
4e08df3f 6477 nv->port_name[0] = 0x21;
f73cb695 6478 nv->port_name[1] = 0x00 + ha->port_no + 1;
4e08df3f
DM		 6479 nv->port_name[2] = 0x00;
6480 nv->port_name[3] = 0xe0;
6481 nv->port_name[4] = 0x8b;
6482 nv->port_name[5] = 0x1c;
6483 nv->port_name[6] = 0x55;
6484 nv->port_name[7] = 0x86;
6485 nv->node_name[0] = 0x20;
6486 nv->node_name[1] = 0x00;
6487 nv->node_name[2] = 0x00;
6488 nv->node_name[3] = 0xe0;
6489 nv->node_name[4] = 0x8b;
6490 nv->node_name[5] = 0x1c;
6491 nv->node_name[6] = 0x55;
6492 nv->node_name[7] = 0x86;
e315cd28 6493 qla24xx_nvram_wwn_from_ofw(vha, nv);
ad950360
BVA		 6494 nv->login_retry_count = cpu_to_le16(8);
6495 nv->interrupt_delay_timer = cpu_to_le16(0);
6496 nv->login_timeout = cpu_to_le16(0);
4e08df3f 6497 nv->firmware_options_1 =
ad950360
BVA		 6498 cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1);
6499 nv->firmware_options_2 = cpu_to_le32(2 << 4);
6500 nv->firmware_options_2 |= cpu_to_le32(BIT_12);
6501 nv->firmware_options_3 = cpu_to_le32(2 << 13);
6502 nv->host_p = cpu_to_le32(BIT_11|BIT_10);
6503 nv->efi_parameters = cpu_to_le32(0);
4e08df3f 6504 nv->reset_delay = 5;
ad950360
BVA		 6505 nv->max_luns_per_target = cpu_to_le16(128);
6506 nv->port_down_retry_count = cpu_to_le16(30);
6507 nv->link_down_timeout = cpu_to_le16(30);
4e08df3f
DM		 6508
6509 rval = 1;
0107109e
AV		 6510 }
6511
726b8548 6512 if (qla_tgt_mode_enabled(vha)) {
2d70c103 6513 /* Don't enable full login after initial LIP */
ad950360 6514 nv->firmware_options_1 &= cpu_to_le32(~BIT_13);
2d70c103 6515 /* Don't enable LIP full login for initiator */
ad950360 6516 nv->host_p &= cpu_to_le32(~BIT_10);
2d70c103
NB		 6517 }
6518
6519 qlt_24xx_config_nvram_stage1(vha, nv);
6520
0107109e 6521 /* Reset Initialization control block */
e315cd28 6522 memset(icb, 0, ha->init_cb_size);
0107109e
AV		 6523
6524 /* Copy 1st segment. */
6525 dptr1 = (uint8_t *)icb;
6526 dptr2 = (uint8_t *)&nv->version;
6527 cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version;
6528 while (cnt--)
6529 *dptr1++ = *dptr2++;
6530
6531 icb->login_retry_count = nv->login_retry_count;
3ea66e28 6532 icb->link_down_on_nos = nv->link_down_on_nos;
0107109e
AV		 6533
6534 /* Copy 2nd segment. */
6535 dptr1 = (uint8_t *)&icb->interrupt_delay_timer;
6536 dptr2 = (uint8_t *)&nv->interrupt_delay_timer;
6537 cnt = (uint8_t *)&icb->reserved_3 -
6538 (uint8_t *)&icb->interrupt_delay_timer;
6539 while (cnt--)
6540 *dptr1++ = *dptr2++;
6541
6542 /*
6543 * Setup driver NVRAM options.
6544 */
e315cd28 6545 qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name),
9bb9fcf2 6546 "QLA2462");
0107109e 6547
2d70c103
NB		 6548 qlt_24xx_config_nvram_stage2(vha, icb);
6549
ad950360 6550 if (nv->host_p & cpu_to_le32(BIT_15)) {
2d70c103 6551 /* Use alternate WWN? */
5341e868
AV		 6552 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
6553 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
6554 }
6555
0107109e 6556 /* Prepare nodename */
ad950360 6557 if ((icb->firmware_options_1 & cpu_to_le32(BIT_14)) == 0) {
0107109e
AV		 6558 /*
6559 * Firmware will apply the following mask if the nodename was
6560 * not provided.
6561 */
6562 memcpy(icb->node_name, icb->port_name, WWN_SIZE);
6563 icb->node_name[0] &= 0xF0;
6564 }
6565
6566 /* Set host adapter parameters. */
6567 ha->flags.disable_risc_code_load = 0;
0c8c39af
AV		 6568 ha->flags.enable_lip_reset = 0;
6569 ha->flags.enable_lip_full_login =
6570 le32_to_cpu(nv->host_p) & BIT_10 ? 1: 0;
6571 ha->flags.enable_target_reset =
6572 le32_to_cpu(nv->host_p) & BIT_11 ? 1: 0;
0107109e 6573 ha->flags.enable_led_scheme = 0;
d4c760c2 6574 ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1: 0;
0107109e 6575
fd0e7e4d
AV		 6576 ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) &
6577 (BIT_6 | BIT_5 | BIT_4)) >> 4;
0107109e
AV		 6578
6579 memcpy(ha->fw_seriallink_options24, nv->seriallink_options,
6580 sizeof(ha->fw_seriallink_options24));
6581
6582 /* save HBA serial number */
6583 ha->serial0 = icb->port_name[5];
6584 ha->serial1 = icb->port_name[6];
6585 ha->serial2 = icb->port_name[7];
e315cd28
AC		 6586 memcpy(vha->node_name, icb->node_name, WWN_SIZE);
6587 memcpy(vha->port_name, icb->port_name, WWN_SIZE);
0107109e 6588
ad950360 6589 icb->execution_throttle = cpu_to_le16(0xFFFF);
bc8fb3cb 6590
0107109e
AV		 6591 ha->retry_count = le16_to_cpu(nv->login_retry_count);
6592
6593 /* Set minimum login_timeout to 4 seconds. */
6594 if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout)
6595 nv->login_timeout = cpu_to_le16(ql2xlogintimeout);
6596 if (le16_to_cpu(nv->login_timeout) < 4)
ad950360 6597 nv->login_timeout = cpu_to_le16(4);
0107109e 6598 ha->login_timeout = le16_to_cpu(nv->login_timeout);
0107109e 6599
00a537b8
AV		 6600 /* Set minimum RATOV to 100 tenths of a second. */
6601 ha->r_a_tov = 100;
0107109e
AV		 6602
6603 ha->loop_reset_delay = nv->reset_delay;
6604
6605 /* Link Down Timeout = 0:
6606 *
6607 * When Port Down timer expires we will start returning
6608 * I/O's to OS with "DID_NO_CONNECT".
6609 *
6610 * Link Down Timeout != 0:
6611 *
6612 * The driver waits for the link to come up after link down
6613 * before returning I/Os to OS with "DID_NO_CONNECT".
6614 */
6615 if (le16_to_cpu(nv->link_down_timeout) == 0) {
6616 ha->loop_down_abort_time =
6617 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
6618 } else {
6619 ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout);
6620 ha->loop_down_abort_time =
6621 (LOOP_DOWN_TIME - ha->link_down_timeout);
6622 }
6623
6624 /* Need enough time to try and get the port back. */
6625 ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count);
6626 if (qlport_down_retry)
6627 ha->port_down_retry_count = qlport_down_retry;
6628
6629 /* Set login_retry_count */
6630 ha->login_retry_count = le16_to_cpu(nv->login_retry_count);
6631 if (ha->port_down_retry_count ==
6632 le16_to_cpu(nv->port_down_retry_count) &&
6633 ha->port_down_retry_count > 3)
6634 ha->login_retry_count = ha->port_down_retry_count;
6635 else if (ha->port_down_retry_count > (int)ha->login_retry_count)
6636 ha->login_retry_count = ha->port_down_retry_count;
6637 if (ql2xloginretrycount)
6638 ha->login_retry_count = ql2xloginretrycount;
6639
4fdfefe5 6640 /* Enable ZIO. */
e315cd28 6641 if (!vha->flags.init_done) {
4fdfefe5
AV		 6642 ha->zio_mode = le32_to_cpu(icb->firmware_options_2) &
6643 (BIT_3 | BIT_2 | BIT_1 | BIT_0);
6644 ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ?
6645 le16_to_cpu(icb->interrupt_delay_timer): 2;
6646 }
ad950360 6647 icb->firmware_options_2 &= cpu_to_le32(
4fdfefe5 6648 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0));
e315cd28 6649 vha->flags.process_response_queue = 0;
4fdfefe5 6650 if (ha->zio_mode != QLA_ZIO_DISABLED) {
4a59f71d 6651 ha->zio_mode = QLA_ZIO_MODE_6;
6652
7c3df132 6653 ql_log(ql_log_info, vha, 0x006f,
4fdfefe5
AV		 6654 "ZIO mode %d enabled; timer delay (%d us).\n",
6655 ha->zio_mode, ha->zio_timer * 100);
6656
6657 icb->firmware_options_2 |= cpu_to_le32(
6658 (uint32_t)ha->zio_mode);
6659 icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer);
e315cd28 6660 vha->flags.process_response_queue = 1;
4fdfefe5
AV		 6661 }
6662
4e08df3f 6663 if (rval) {
7c3df132
SK		 6664 ql_log(ql_log_warn, vha, 0x0070,
6665 "NVRAM configuration failed.\n");
4e08df3f
DM		 6666 }
6667 return (rval);
0107109e
AV		 6668}
6669
4243c115
SC		 6670uint8_t qla27xx_find_valid_image(struct scsi_qla_host *vha)
6671{
6672 struct qla27xx_image_status pri_image_status, sec_image_status;
6673 uint8_t valid_pri_image, valid_sec_image;
6674 uint32_t *wptr;
6675 uint32_t cnt, chksum, size;
6676 struct qla_hw_data *ha = vha->hw;
6677
6678 valid_pri_image = valid_sec_image = 1;
6679 ha->active_image = 0;
6680 size = sizeof(struct qla27xx_image_status) / sizeof(uint32_t);
6681
6682 if (!ha->flt_region_img_status_pri) {
6683 valid_pri_image = 0;
6684 goto check_sec_image;
6685 }
6686
6687 qla24xx_read_flash_data(vha, (uint32_t *)(&pri_image_status),
6688 ha->flt_region_img_status_pri, size);
6689
6690 if (pri_image_status.signature != QLA27XX_IMG_STATUS_SIGN) {
6691 ql_dbg(ql_dbg_init, vha, 0x018b,
6692 "Primary image signature (0x%x) not valid\n",
6693 pri_image_status.signature);
6694 valid_pri_image = 0;
6695 goto check_sec_image;
6696 }
6697
6698 wptr = (uint32_t *)(&pri_image_status);
6699 cnt = size;
6700
da08ef5c
JC		 6701 for (chksum = 0; cnt--; wptr++)
6702 chksum += le32_to_cpu(*wptr);
41dc529a 6703
4243c115
SC		 6704 if (chksum) {
6705 ql_dbg(ql_dbg_init, vha, 0x018c,
6706 "Checksum validation failed for primary image (0x%x)\n",
6707 chksum);
6708 valid_pri_image = 0;
6709 }
6710
6711check_sec_image:
6712 if (!ha->flt_region_img_status_sec) {
6713 valid_sec_image = 0;
6714 goto check_valid_image;
6715 }
6716
6717 qla24xx_read_flash_data(vha, (uint32_t *)(&sec_image_status),
6718 ha->flt_region_img_status_sec, size);
6719
6720 if (sec_image_status.signature != QLA27XX_IMG_STATUS_SIGN) {
6721 ql_dbg(ql_dbg_init, vha, 0x018d,
6722 "Secondary image signature(0x%x) not valid\n",
6723 sec_image_status.signature);
6724 valid_sec_image = 0;
6725 goto check_valid_image;
6726 }
6727
6728 wptr = (uint32_t *)(&sec_image_status);
6729 cnt = size;
da08ef5c
JC		 6730 for (chksum = 0; cnt--; wptr++)
6731 chksum += le32_to_cpu(*wptr);
4243c115
SC		 6732 if (chksum) {
6733 ql_dbg(ql_dbg_init, vha, 0x018e,
6734 "Checksum validation failed for secondary image (0x%x)\n",
6735 chksum);
6736 valid_sec_image = 0;
6737 }
6738
6739check_valid_image:
6740 if (valid_pri_image && (pri_image_status.image_status_mask & 0x1))
6741 ha->active_image = QLA27XX_PRIMARY_IMAGE;
6742 if (valid_sec_image && (sec_image_status.image_status_mask & 0x1)) {
6743 if (!ha->active_image ||
6744 pri_image_status.generation_number <
6745 sec_image_status.generation_number)
6746 ha->active_image = QLA27XX_SECONDARY_IMAGE;
6747 }
6748
6749 ql_dbg(ql_dbg_init, vha, 0x018f, "%s image\n",
6750 ha->active_image == 0 ? "default bootld and fw" :
6751 ha->active_image == 1 ? "primary" :
6752 ha->active_image == 2 ? "secondary" :
6753 "Invalid");
6754
6755 return ha->active_image;
6756}
6757
413975a0 6758static int
cbc8eb67
AV		 6759qla24xx_load_risc_flash(scsi_qla_host_t *vha, uint32_t *srisc_addr,
6760 uint32_t faddr)
d1c61909 6761{
73208dfd 6762 int rval = QLA_SUCCESS;
d1c61909 6763 int segments, fragment;
d1c61909
AV		 6764 uint32_t *dcode, dlen;
6765 uint32_t risc_addr;
6766 uint32_t risc_size;
6767 uint32_t i;
e315cd28 6768 struct qla_hw_data *ha = vha->hw;
73208dfd 6769 struct req_que *req = ha->req_q_map[0];
eaac30be 6770
7c3df132 6771 ql_dbg(ql_dbg_init, vha, 0x008b,
cfb0919c 6772 "FW: Loading firmware from flash (%x).\n", faddr);
eaac30be 6773
d1c61909
AV		 6774 rval = QLA_SUCCESS;
6775
6776 segments = FA_RISC_CODE_SEGMENTS;
73208dfd 6777 dcode = (uint32_t *)req->ring;
d1c61909
AV		 6778 *srisc_addr = 0;
6779
4243c115
SC		 6780 if (IS_QLA27XX(ha) &&
6781 qla27xx_find_valid_image(vha) == QLA27XX_SECONDARY_IMAGE)
6782 faddr = ha->flt_region_fw_sec;
6783
d1c61909 6784 /* Validate firmware image by checking version. */
e315cd28 6785 qla24xx_read_flash_data(vha, dcode, faddr + 4, 4);
d1c61909
AV		 6786 for (i = 0; i < 4; i++)
6787 dcode[i] = be32_to_cpu(dcode[i]);
6788 if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff &&
6789 dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) ||
6790 (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 &&
6791 dcode[3] == 0)) {
7c3df132
SK		 6792 ql_log(ql_log_fatal, vha, 0x008c,
6793 "Unable to verify the integrity of flash firmware "
6794 "image.\n");
6795 ql_log(ql_log_fatal, vha, 0x008d,
6796 "Firmware data: %08x %08x %08x %08x.\n",
6797 dcode[0], dcode[1], dcode[2], dcode[3]);
d1c61909
AV		 6798
6799 return QLA_FUNCTION_FAILED;
6800 }
6801
6802 while (segments && rval == QLA_SUCCESS) {
6803 /* Read segment's load information. */
e315cd28 6804 qla24xx_read_flash_data(vha, dcode, faddr, 4);
d1c61909
AV		 6805
6806 risc_addr = be32_to_cpu(dcode[2]);
6807 *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr;
6808 risc_size = be32_to_cpu(dcode[3]);
6809
6810 fragment = 0;
6811 while (risc_size > 0 && rval == QLA_SUCCESS) {
6812 dlen = (uint32_t)(ha->fw_transfer_size >> 2);
6813 if (dlen > risc_size)
6814 dlen = risc_size;
6815
7c3df132
SK		 6816 ql_dbg(ql_dbg_init, vha, 0x008e,
6817 "Loading risc segment@ risc addr %x "
6818 "number of dwords 0x%x offset 0x%x.\n",
6819 risc_addr, dlen, faddr);
d1c61909 6820
e315cd28 6821 qla24xx_read_flash_data(vha, dcode, faddr, dlen);
d1c61909
AV		 6822 for (i = 0; i < dlen; i++)
6823 dcode[i] = swab32(dcode[i]);
6824
73208dfd 6825 rval = qla2x00_load_ram(vha, req->dma, risc_addr,
d1c61909
AV		 6826 dlen);
6827 if (rval) {
7c3df132
SK		 6828 ql_log(ql_log_fatal, vha, 0x008f,
6829 "Failed to load segment %d of firmware.\n",
6830 fragment);
f261f7af 6831 return QLA_FUNCTION_FAILED;
d1c61909
AV		 6832 }
6833
6834 faddr += dlen;
6835 risc_addr += dlen;
6836 risc_size -= dlen;
6837 fragment++;
6838 }
6839
6840 /* Next segment. */
6841 segments--;
6842 }
6843
f73cb695
CD		 6844 if (!IS_QLA27XX(ha))
6845 return rval;
6846
6847 if (ha->fw_dump_template)
6848 vfree(ha->fw_dump_template);
6849 ha->fw_dump_template = NULL;
6850 ha->fw_dump_template_len = 0;
6851
6852 ql_dbg(ql_dbg_init, vha, 0x0161,
6853 "Loading fwdump template from %x\n", faddr);
6854 qla24xx_read_flash_data(vha, dcode, faddr, 7);
6855 risc_size = be32_to_cpu(dcode[2]);
6856 ql_dbg(ql_dbg_init, vha, 0x0162,
6857 "-> array size %x dwords\n", risc_size);
6858 if (risc_size == 0 || risc_size == ~0)
6859 goto default_template;
6860
6861 dlen = (risc_size - 8) * sizeof(*dcode);
6862 ql_dbg(ql_dbg_init, vha, 0x0163,
6863 "-> template allocating %x bytes...\n", dlen);
6864 ha->fw_dump_template = vmalloc(dlen);
6865 if (!ha->fw_dump_template) {
6866 ql_log(ql_log_warn, vha, 0x0164,
6867 "Failed fwdump template allocate %x bytes.\n", risc_size);
6868 goto default_template;
6869 }
6870
6871 faddr += 7;
6872 risc_size -= 8;
6873 dcode = ha->fw_dump_template;
6874 qla24xx_read_flash_data(vha, dcode, faddr, risc_size);
6875 for (i = 0; i < risc_size; i++)
6876 dcode[i] = le32_to_cpu(dcode[i]);
6877
6878 if (!qla27xx_fwdt_template_valid(dcode)) {
6879 ql_log(ql_log_warn, vha, 0x0165,
6880 "Failed fwdump template validate\n");
6881 goto default_template;
6882 }
6883
6884 dlen = qla27xx_fwdt_template_size(dcode);
6885 ql_dbg(ql_dbg_init, vha, 0x0166,
6886 "-> template size %x bytes\n", dlen);
6887 if (dlen > risc_size * sizeof(*dcode)) {
6888 ql_log(ql_log_warn, vha, 0x0167,
4fae52b5 6889 "Failed fwdump template exceeds array by %zx bytes\n",
383a298b 6890 (size_t)(dlen - risc_size * sizeof(*dcode)));
f73cb695
CD		 6891 goto default_template;
6892 }
6893 ha->fw_dump_template_len = dlen;
6894 return rval;
6895
6896default_template:
6897 ql_log(ql_log_warn, vha, 0x0168, "Using default fwdump template\n");
6898 if (ha->fw_dump_template)
6899 vfree(ha->fw_dump_template);
6900 ha->fw_dump_template = NULL;
6901 ha->fw_dump_template_len = 0;
6902
6903 dlen = qla27xx_fwdt_template_default_size();
6904 ql_dbg(ql_dbg_init, vha, 0x0169,
6905 "-> template allocating %x bytes...\n", dlen);
6906 ha->fw_dump_template = vmalloc(dlen);
6907 if (!ha->fw_dump_template) {
6908 ql_log(ql_log_warn, vha, 0x016a,
6909 "Failed fwdump template allocate %x bytes.\n", risc_size);
6910 goto failed_template;
6911 }
6912
6913 dcode = ha->fw_dump_template;
6914 risc_size = dlen / sizeof(*dcode);
6915 memcpy(dcode, qla27xx_fwdt_template_default(), dlen);
6916 for (i = 0; i < risc_size; i++)
6917 dcode[i] = be32_to_cpu(dcode[i]);
6918
6919 if (!qla27xx_fwdt_template_valid(ha->fw_dump_template)) {
6920 ql_log(ql_log_warn, vha, 0x016b,
6921 "Failed fwdump template validate\n");
6922 goto failed_template;
6923 }
6924
6925 dlen = qla27xx_fwdt_template_size(ha->fw_dump_template);
6926 ql_dbg(ql_dbg_init, vha, 0x016c,
6927 "-> template size %x bytes\n", dlen);
6928 ha->fw_dump_template_len = dlen;
6929 return rval;
6930
6931failed_template:
6932 ql_log(ql_log_warn, vha, 0x016d, "Failed default fwdump template\n");
6933 if (ha->fw_dump_template)
6934 vfree(ha->fw_dump_template);
6935 ha->fw_dump_template = NULL;
6936 ha->fw_dump_template_len = 0;
d1c61909
AV		 6937 return rval;
6938}
6939
e9454a88 6940#define QLA_FW_URL "http://ldriver.qlogic.com/firmware/"
d1c61909 6941
0107109e 6942int
e315cd28 6943qla2x00_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
5433383e
AV		 6944{
6945 int rval;
6946 int i, fragment;
6947 uint16_t *wcode, *fwcode;
6948 uint32_t risc_addr, risc_size, fwclen, wlen, *seg;
6949 struct fw_blob *blob;
e315cd28 6950 struct qla_hw_data *ha = vha->hw;
73208dfd 6951 struct req_que *req = ha->req_q_map[0];
5433383e
AV		 6952
6953 /* Load firmware blob. */
e315cd28 6954 blob = qla2x00_request_firmware(vha);
5433383e 6955 if (!blob) {
7c3df132 6956 ql_log(ql_log_info, vha, 0x0083,
94bcf830 6957 "Firmware image unavailable.\n");
7c3df132
SK		 6958 ql_log(ql_log_info, vha, 0x0084,
6959 "Firmware images can be retrieved from: "QLA_FW_URL ".\n");
5433383e
AV		 6960 return QLA_FUNCTION_FAILED;
6961 }
6962
6963 rval = QLA_SUCCESS;
6964
73208dfd 6965 wcode = (uint16_t *)req->ring;
5433383e
AV		 6966 *srisc_addr = 0;
6967 fwcode = (uint16_t *)blob->fw->data;
6968 fwclen = 0;
6969
6970 /* Validate firmware image by checking version. */
6971 if (blob->fw->size < 8 * sizeof(uint16_t)) {
7c3df132 6972 ql_log(ql_log_fatal, vha, 0x0085,
5b5e0928 6973 "Unable to verify integrity of firmware image (%zd).\n",
5433383e
AV		 6974 blob->fw->size);
6975 goto fail_fw_integrity;
6976 }
6977 for (i = 0; i < 4; i++)
6978 wcode[i] = be16_to_cpu(fwcode[i + 4]);
6979 if ((wcode[0] == 0xffff && wcode[1] == 0xffff && wcode[2] == 0xffff &&
6980 wcode[3] == 0xffff) || (wcode[0] == 0 && wcode[1] == 0 &&
6981 wcode[2] == 0 && wcode[3] == 0)) {
7c3df132
SK		 6982 ql_log(ql_log_fatal, vha, 0x0086,
6983 "Unable to verify integrity of firmware image.\n");
6984 ql_log(ql_log_fatal, vha, 0x0087,
6985 "Firmware data: %04x %04x %04x %04x.\n",
6986 wcode[0], wcode[1], wcode[2], wcode[3]);
5433383e
AV		 6987 goto fail_fw_integrity;
6988 }
6989
6990 seg = blob->segs;
6991 while (*seg && rval == QLA_SUCCESS) {
6992 risc_addr = *seg;
6993 *srisc_addr = *srisc_addr == 0 ? *seg : *srisc_addr;
6994 risc_size = be16_to_cpu(fwcode[3]);
6995
6996 /* Validate firmware image size. */
6997 fwclen += risc_size * sizeof(uint16_t);
6998 if (blob->fw->size < fwclen) {
7c3df132 6999 ql_log(ql_log_fatal, vha, 0x0088,
5433383e 7000 "Unable to verify integrity of firmware image "
5b5e0928 7001 "(%zd).\n", blob->fw->size);
5433383e
AV		 7002 goto fail_fw_integrity;
7003 }
7004
7005 fragment = 0;
7006 while (risc_size > 0 && rval == QLA_SUCCESS) {
7007 wlen = (uint16_t)(ha->fw_transfer_size >> 1);
7008 if (wlen > risc_size)
7009 wlen = risc_size;
7c3df132
SK		 7010 ql_dbg(ql_dbg_init, vha, 0x0089,
7011 "Loading risc segment@ risc addr %x number of "
7012 "words 0x%x.\n", risc_addr, wlen);
5433383e
AV		 7013
7014 for (i = 0; i < wlen; i++)
7015 wcode[i] = swab16(fwcode[i]);
7016
73208dfd 7017 rval = qla2x00_load_ram(vha, req->dma, risc_addr,
5433383e
AV		 7018 wlen);
7019 if (rval) {
7c3df132
SK		 7020 ql_log(ql_log_fatal, vha, 0x008a,
7021 "Failed to load segment %d of firmware.\n",
7022 fragment);
5433383e
AV		 7023 break;
7024 }
7025
7026 fwcode += wlen;
7027 risc_addr += wlen;
7028 risc_size -= wlen;
7029 fragment++;
7030 }
7031
7032 /* Next segment. */
7033 seg++;
7034 }
7035 return rval;
7036
7037fail_fw_integrity:
7038 return QLA_FUNCTION_FAILED;
7039}
7040
eaac30be
AV		 7041static int
7042qla24xx_load_risc_blob(scsi_qla_host_t *vha, uint32_t *srisc_addr)
0107109e
AV		 7043{
7044 int rval;
7045 int segments, fragment;
7046 uint32_t *dcode, dlen;
7047 uint32_t risc_addr;
7048 uint32_t risc_size;
7049 uint32_t i;
5433383e 7050 struct fw_blob *blob;
f73cb695
CD		 7051 const uint32_t *fwcode;
7052 uint32_t fwclen;
e315cd28 7053 struct qla_hw_data *ha = vha->hw;
73208dfd 7054 struct req_que *req = ha->req_q_map[0];
0107109e 7055
5433383e 7056 /* Load firmware blob. */
e315cd28 7057 blob = qla2x00_request_firmware(vha);
5433383e 7058 if (!blob) {
7c3df132 7059 ql_log(ql_log_warn, vha, 0x0090,
94bcf830 7060 "Firmware image unavailable.\n");
7c3df132
SK		 7061 ql_log(ql_log_warn, vha, 0x0091,
7062 "Firmware images can be retrieved from: "
7063 QLA_FW_URL ".\n");
d1c61909 7064
eaac30be 7065 return QLA_FUNCTION_FAILED;
0107109e
AV		 7066 }
7067
cfb0919c
CD		 7068 ql_dbg(ql_dbg_init, vha, 0x0092,
7069 "FW: Loading via request-firmware.\n");
eaac30be 7070
0107109e
AV		 7071 rval = QLA_SUCCESS;
7072
7073 segments = FA_RISC_CODE_SEGMENTS;
73208dfd 7074 dcode = (uint32_t *)req->ring;
0107109e 7075 *srisc_addr = 0;
5433383e 7076 fwcode = (uint32_t *)blob->fw->data;
0107109e
AV		 7077 fwclen = 0;
7078
7079 /* Validate firmware image by checking version. */
5433383e 7080 if (blob->fw->size < 8 * sizeof(uint32_t)) {
7c3df132 7081 ql_log(ql_log_fatal, vha, 0x0093,
5b5e0928 7082 "Unable to verify integrity of firmware image (%zd).\n",
5433383e 7083 blob->fw->size);
f73cb695 7084 return QLA_FUNCTION_FAILED;
0107109e
AV		 7085 }
7086 for (i = 0; i < 4; i++)
7087 dcode[i] = be32_to_cpu(fwcode[i + 4]);
7088 if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff &&
7089 dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) ||
7090 (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 &&
7091 dcode[3] == 0)) {
7c3df132 7092 ql_log(ql_log_fatal, vha, 0x0094,
5b5e0928 7093 "Unable to verify integrity of firmware image (%zd).\n",
7c3df132
SK		 7094 blob->fw->size);
7095 ql_log(ql_log_fatal, vha, 0x0095,
7096 "Firmware data: %08x %08x %08x %08x.\n",
7097 dcode[0], dcode[1], dcode[2], dcode[3]);
f73cb695 7098 return QLA_FUNCTION_FAILED;
0107109e
AV		 7099 }
7100
7101 while (segments && rval == QLA_SUCCESS) {
7102 risc_addr = be32_to_cpu(fwcode[2]);
7103 *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr;
7104 risc_size = be32_to_cpu(fwcode[3]);
7105
7106 /* Validate firmware image size. */
7107 fwclen += risc_size * sizeof(uint32_t);
5433383e 7108 if (blob->fw->size < fwclen) {
7c3df132 7109 ql_log(ql_log_fatal, vha, 0x0096,
5433383e 7110 "Unable to verify integrity of firmware image "
5b5e0928 7111 "(%zd).\n", blob->fw->size);
f73cb695 7112 return QLA_FUNCTION_FAILED;
0107109e
AV		 7113 }
7114
7115 fragment = 0;
7116 while (risc_size > 0 && rval == QLA_SUCCESS) {
7117 dlen = (uint32_t)(ha->fw_transfer_size >> 2);
7118 if (dlen > risc_size)
7119 dlen = risc_size;
7120
7c3df132
SK		 7121 ql_dbg(ql_dbg_init, vha, 0x0097,
7122 "Loading risc segment@ risc addr %x "
7123 "number of dwords 0x%x.\n", risc_addr, dlen);
0107109e
AV		 7124
7125 for (i = 0; i < dlen; i++)
7126 dcode[i] = swab32(fwcode[i]);
7127
73208dfd 7128 rval = qla2x00_load_ram(vha, req->dma, risc_addr,
590f98e5 7129 dlen);
0107109e 7130 if (rval) {
7c3df132
SK		 7131 ql_log(ql_log_fatal, vha, 0x0098,
7132 "Failed to load segment %d of firmware.\n",
7133 fragment);
f261f7af 7134 return QLA_FUNCTION_FAILED;
0107109e
AV		 7135 }
7136
7137 fwcode += dlen;
7138 risc_addr += dlen;
7139 risc_size -= dlen;
7140 fragment++;
7141 }
7142
7143 /* Next segment. */
7144 segments--;
7145 }
f73cb695
CD		 7146
7147 if (!IS_QLA27XX(ha))
7148 return rval;
7149
7150 if (ha->fw_dump_template)
7151 vfree(ha->fw_dump_template);
7152 ha->fw_dump_template = NULL;
7153 ha->fw_dump_template_len = 0;
7154
7155 ql_dbg(ql_dbg_init, vha, 0x171,
97ea702b
CD		 7156 "Loading fwdump template from %x\n",
7157 (uint32_t)((void *)fwcode - (void *)blob->fw->data));
f73cb695
CD		 7158 risc_size = be32_to_cpu(fwcode[2]);
7159 ql_dbg(ql_dbg_init, vha, 0x172,
7160 "-> array size %x dwords\n", risc_size);
7161 if (risc_size == 0 || risc_size == ~0)
7162 goto default_template;
7163
7164 dlen = (risc_size - 8) * sizeof(*fwcode);
7165 ql_dbg(ql_dbg_init, vha, 0x0173,
7166 "-> template allocating %x bytes...\n", dlen);
7167 ha->fw_dump_template = vmalloc(dlen);
7168 if (!ha->fw_dump_template) {
7169 ql_log(ql_log_warn, vha, 0x0174,
7170 "Failed fwdump template allocate %x bytes.\n", risc_size);
7171 goto default_template;
7172 }
7173
7174 fwcode += 7;
7175 risc_size -= 8;
7176 dcode = ha->fw_dump_template;
7177 for (i = 0; i < risc_size; i++)
7178 dcode[i] = le32_to_cpu(fwcode[i]);
7179
7180 if (!qla27xx_fwdt_template_valid(dcode)) {
7181 ql_log(ql_log_warn, vha, 0x0175,
7182 "Failed fwdump template validate\n");
7183 goto default_template;
7184 }
7185
7186 dlen = qla27xx_fwdt_template_size(dcode);
7187 ql_dbg(ql_dbg_init, vha, 0x0176,
7188 "-> template size %x bytes\n", dlen);
7189 if (dlen > risc_size * sizeof(*fwcode)) {
7190 ql_log(ql_log_warn, vha, 0x0177,
4fae52b5 7191 "Failed fwdump template exceeds array by %zx bytes\n",
383a298b 7192 (size_t)(dlen - risc_size * sizeof(*fwcode)));
f73cb695
CD		 7193 goto default_template;
7194 }
7195 ha->fw_dump_template_len = dlen;
0107109e
AV		 7196 return rval;
7197
f73cb695
CD		 7198default_template:
7199 ql_log(ql_log_warn, vha, 0x0178, "Using default fwdump template\n");
7200 if (ha->fw_dump_template)
7201 vfree(ha->fw_dump_template);
7202 ha->fw_dump_template = NULL;
7203 ha->fw_dump_template_len = 0;
7204
7205 dlen = qla27xx_fwdt_template_default_size();
7206 ql_dbg(ql_dbg_init, vha, 0x0179,
7207 "-> template allocating %x bytes...\n", dlen);
7208 ha->fw_dump_template = vmalloc(dlen);
7209 if (!ha->fw_dump_template) {
7210 ql_log(ql_log_warn, vha, 0x017a,
7211 "Failed fwdump template allocate %x bytes.\n", risc_size);
7212 goto failed_template;
7213 }
7214
7215 dcode = ha->fw_dump_template;
7216 risc_size = dlen / sizeof(*fwcode);
7217 fwcode = qla27xx_fwdt_template_default();
7218 for (i = 0; i < risc_size; i++)
7219 dcode[i] = be32_to_cpu(fwcode[i]);
7220
7221 if (!qla27xx_fwdt_template_valid(ha->fw_dump_template)) {
7222 ql_log(ql_log_warn, vha, 0x017b,
7223 "Failed fwdump template validate\n");
7224 goto failed_template;
7225 }
7226
7227 dlen = qla27xx_fwdt_template_size(ha->fw_dump_template);
7228 ql_dbg(ql_dbg_init, vha, 0x017c,
7229 "-> template size %x bytes\n", dlen);
7230 ha->fw_dump_template_len = dlen;
7231 return rval;
7232
7233failed_template:
7234 ql_log(ql_log_warn, vha, 0x017d, "Failed default fwdump template\n");
7235 if (ha->fw_dump_template)
7236 vfree(ha->fw_dump_template);
7237 ha->fw_dump_template = NULL;
7238 ha->fw_dump_template_len = 0;
7239 return rval;
0107109e 7240}
18c6c127 7241
eaac30be
AV		 7242int
7243qla24xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
7244{
7245 int rval;
7246
e337d907
AV		 7247 if (ql2xfwloadbin == 1)
7248 return qla81xx_load_risc(vha, srisc_addr);
7249
eaac30be
AV		 7250 /*
7251 * FW Load priority:
7252 * 1) Firmware via request-firmware interface (.bin file).
7253 * 2) Firmware residing in flash.
7254 */
7255 rval = qla24xx_load_risc_blob(vha, srisc_addr);
7256 if (rval == QLA_SUCCESS)
7257 return rval;
7258
cbc8eb67
AV		 7259 return qla24xx_load_risc_flash(vha, srisc_addr,
7260 vha->hw->flt_region_fw);
eaac30be
AV		 7261}
7262
7263int
7264qla81xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
7265{
7266 int rval;
cbc8eb67 7267 struct qla_hw_data *ha = vha->hw;
eaac30be 7268
e337d907 7269 if (ql2xfwloadbin == 2)
cbc8eb67 7270 goto try_blob_fw;
e337d907 7271
eaac30be
AV		 7272 /*
7273 * FW Load priority:
7274 * 1) Firmware residing in flash.
7275 * 2) Firmware via request-firmware interface (.bin file).
cbc8eb67 7276 * 3) Golden-Firmware residing in flash -- limited operation.
eaac30be 7277 */
cbc8eb67 7278 rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_fw);
eaac30be
AV		 7279 if (rval == QLA_SUCCESS)
7280 return rval;
7281
cbc8eb67
AV		 7282try_blob_fw:
7283 rval = qla24xx_load_risc_blob(vha, srisc_addr);
7284 if (rval == QLA_SUCCESS || !ha->flt_region_gold_fw)
7285 return rval;
7286
7c3df132
SK		 7287 ql_log(ql_log_info, vha, 0x0099,
7288 "Attempting to fallback to golden firmware.\n");
cbc8eb67
AV		 7289 rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_gold_fw);
7290 if (rval != QLA_SUCCESS)
7291 return rval;
7292
7c3df132 7293 ql_log(ql_log_info, vha, 0x009a, "Update operational firmware.\n");
cbc8eb67 7294 ha->flags.running_gold_fw = 1;
cbc8eb67 7295 return rval;
eaac30be
AV		 7296}
7297
18c6c127 7298void
e315cd28 7299qla2x00_try_to_stop_firmware(scsi_qla_host_t *vha)
18c6c127
AV		 7300{
7301 int ret, retries;
e315cd28 7302 struct qla_hw_data *ha = vha->hw;
18c6c127 7303
85880801
AV		 7304 if (ha->flags.pci_channel_io_perm_failure)
7305 return;
e428924c 7306 if (!IS_FWI2_CAPABLE(ha))
18c6c127 7307 return;
75edf81d
AV		 7308 if (!ha->fw_major_version)
7309 return;
ec7193e2
QT		 7310 if (!ha->flags.fw_started)
7311 return;
18c6c127 7312
e315cd28 7313 ret = qla2x00_stop_firmware(vha);
7c7f1f29 7314 for (retries = 5; ret != QLA_SUCCESS && ret != QLA_FUNCTION_TIMEOUT &&
b469a7cb 7315 ret != QLA_INVALID_COMMAND && retries ; retries--) {
e315cd28
AC		 7316 ha->isp_ops->reset_chip(vha);
7317 if (ha->isp_ops->chip_diag(vha) != QLA_SUCCESS)
18c6c127 7318 continue;
e315cd28 7319 if (qla2x00_setup_chip(vha) != QLA_SUCCESS)
18c6c127 7320 continue;
7c3df132
SK		 7321 ql_log(ql_log_info, vha, 0x8015,
7322 "Attempting retry of stop-firmware command.\n");
e315cd28 7323 ret = qla2x00_stop_firmware(vha);
18c6c127 7324 }
ec7193e2 7325
4b60c827 7326 QLA_FW_STOPPED(ha);
ec7193e2 7327 ha->flags.fw_init_done = 0;
18c6c127 7328}
2c3dfe3f
SJ		 7329
7330int
e315cd28 7331qla24xx_configure_vhba(scsi_qla_host_t *vha)
2c3dfe3f
SJ		 7332{
7333 int rval = QLA_SUCCESS;
0b91d116 7334 int rval2;
2c3dfe3f 7335 uint16_t mb[MAILBOX_REGISTER_COUNT];
e315cd28
AC		 7336 struct qla_hw_data *ha = vha->hw;
7337 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
67c2e93a
AC		 7338 struct req_que *req;
7339 struct rsp_que *rsp;
2c3dfe3f 7340
e315cd28 7341 if (!vha->vp_idx)
2c3dfe3f
SJ		 7342 return -EINVAL;
7343
e315cd28 7344 rval = qla2x00_fw_ready(base_vha);
d7459527
MH		 7345 if (vha->qpair)
7346 req = vha->qpair->req;
67c2e93a 7347 else
d7459527 7348 req = ha->req_q_map[0];
67c2e93a
AC		 7349 rsp = req->rsp;
7350
2c3dfe3f 7351 if (rval == QLA_SUCCESS) {
e315cd28 7352 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
73208dfd 7353 qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL);
2c3dfe3f
SJ		 7354 }
7355
e315cd28 7356 vha->flags.management_server_logged_in = 0;
2c3dfe3f
SJ		 7357
7358 /* Login to SNS first */
0b91d116
CD		 7359 rval2 = ha->isp_ops->fabric_login(vha, NPH_SNS, 0xff, 0xff, 0xfc, mb,
7360 BIT_1);
7361 if (rval2 != QLA_SUCCESS || mb[0] != MBS_COMMAND_COMPLETE) {
7362 if (rval2 == QLA_MEMORY_ALLOC_FAILED)
7363 ql_dbg(ql_dbg_init, vha, 0x0120,
7364 "Failed SNS login: loop_id=%x, rval2=%d\n",
7365 NPH_SNS, rval2);
7366 else
7367 ql_dbg(ql_dbg_init, vha, 0x0103,
7368 "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x "
7369 "mb[2]=%x mb[6]=%x mb[7]=%x.\n",
7370 NPH_SNS, mb[0], mb[1], mb[2], mb[6], mb[7]);
2c3dfe3f
SJ		 7371 return (QLA_FUNCTION_FAILED);
7372 }
7373
e315cd28
AC		 7374 atomic_set(&vha->loop_down_timer, 0);
7375 atomic_set(&vha->loop_state, LOOP_UP);
7376 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
7377 set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
7378 rval = qla2x00_loop_resync(base_vha);
2c3dfe3f
SJ		 7379
7380 return rval;
7381}
4d4df193
HK		 7382
7383/* 84XX Support **************************************************************/
7384
7385static LIST_HEAD(qla_cs84xx_list);
7386static DEFINE_MUTEX(qla_cs84xx_mutex);
7387
7388static struct qla_chip_state_84xx *
e315cd28 7389qla84xx_get_chip(struct scsi_qla_host *vha)
4d4df193
HK		 7390{
7391 struct qla_chip_state_84xx *cs84xx;
e315cd28 7392 struct qla_hw_data *ha = vha->hw;
4d4df193
HK		 7393
7394 mutex_lock(&qla_cs84xx_mutex);
7395
7396 /* Find any shared 84xx chip. */
7397 list_for_each_entry(cs84xx, &qla_cs84xx_list, list) {
7398 if (cs84xx->bus == ha->pdev->bus) {
7399 kref_get(&cs84xx->kref);
7400 goto done;
7401 }
7402 }
7403
7404 cs84xx = kzalloc(sizeof(*cs84xx), GFP_KERNEL);
7405 if (!cs84xx)
7406 goto done;
7407
7408 kref_init(&cs84xx->kref);
7409 spin_lock_init(&cs84xx->access_lock);
7410 mutex_init(&cs84xx->fw_update_mutex);
7411 cs84xx->bus = ha->pdev->bus;
7412
7413 list_add_tail(&cs84xx->list, &qla_cs84xx_list);
7414done:
7415 mutex_unlock(&qla_cs84xx_mutex);
7416 return cs84xx;
7417}
7418
7419static void
7420__qla84xx_chip_release(struct kref *kref)
7421{
7422 struct qla_chip_state_84xx *cs84xx =
7423 container_of(kref, struct qla_chip_state_84xx, kref);
7424
7425 mutex_lock(&qla_cs84xx_mutex);
7426 list_del(&cs84xx->list);
7427 mutex_unlock(&qla_cs84xx_mutex);
7428 kfree(cs84xx);
7429}
7430
7431void
e315cd28 7432qla84xx_put_chip(struct scsi_qla_host *vha)
4d4df193 7433{
e315cd28 7434 struct qla_hw_data *ha = vha->hw;
4d4df193
HK		 7435 if (ha->cs84xx)
7436 kref_put(&ha->cs84xx->kref, __qla84xx_chip_release);
7437}
7438
7439static int
e315cd28 7440qla84xx_init_chip(scsi_qla_host_t *vha)
4d4df193
HK		 7441{
7442 int rval;
7443 uint16_t status[2];
e315cd28 7444 struct qla_hw_data *ha = vha->hw;
4d4df193
HK		 7445
7446 mutex_lock(&ha->cs84xx->fw_update_mutex);
7447
e315cd28 7448 rval = qla84xx_verify_chip(vha, status);
4d4df193
HK		 7449
7450 mutex_unlock(&ha->cs84xx->fw_update_mutex);
7451
7452 return rval != QLA_SUCCESS || status[0] ? QLA_FUNCTION_FAILED:
7453 QLA_SUCCESS;
7454}
3a03eb79
AV		 7455
7456/* 81XX Support **************************************************************/
7457
7458int
7459qla81xx_nvram_config(scsi_qla_host_t *vha)
7460{
7461 int rval;
7462 struct init_cb_81xx *icb;
7463 struct nvram_81xx *nv;
7464 uint32_t *dptr;
7465 uint8_t *dptr1, *dptr2;
7466 uint32_t chksum;
7467 uint16_t cnt;
7468 struct qla_hw_data *ha = vha->hw;
7469
7470 rval = QLA_SUCCESS;
7471 icb = (struct init_cb_81xx *)ha->init_cb;
7472 nv = ha->nvram;
7473
7474 /* Determine NVRAM starting address. */
7475 ha->nvram_size = sizeof(struct nvram_81xx);
3a03eb79 7476 ha->vpd_size = FA_NVRAM_VPD_SIZE;
7ec0effd
AD		 7477 if (IS_P3P_TYPE(ha) || IS_QLA8031(ha))
7478 ha->vpd_size = FA_VPD_SIZE_82XX;
3a03eb79
AV		 7479
7480 /* Get VPD data into cache */
7481 ha->vpd = ha->nvram + VPD_OFFSET;
3d79038f
AV		 7482 ha->isp_ops->read_optrom(vha, ha->vpd, ha->flt_region_vpd << 2,
7483 ha->vpd_size);
3a03eb79
AV		 7484
7485 /* Get NVRAM data into cache and calculate checksum. */
3d79038f 7486 ha->isp_ops->read_optrom(vha, ha->nvram, ha->flt_region_nvram << 2,
3a03eb79 7487 ha->nvram_size);
3d79038f 7488 dptr = (uint32_t *)nv;
da08ef5c
JC		 7489 for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++, dptr++)
7490 chksum += le32_to_cpu(*dptr);
3a03eb79 7491
7c3df132
SK		 7492 ql_dbg(ql_dbg_init + ql_dbg_buffer, vha, 0x0111,
7493 "Contents of NVRAM:\n");
7494 ql_dump_buffer(ql_dbg_init + ql_dbg_buffer, vha, 0x0112,
7495 (uint8_t *)nv, ha->nvram_size);
3a03eb79
AV		 7496
7497 /* Bad NVRAM data, set defaults parameters. */
7498 if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P'
7499 || nv->id[3] != ' ' ||
ad950360 7500 nv->nvram_version < cpu_to_le16(ICB_VERSION)) {
3a03eb79 7501 /* Reset NVRAM data. */
7c3df132 7502 ql_log(ql_log_info, vha, 0x0073,
9e336520 7503 "Inconsistent NVRAM detected: checksum=0x%x id=%c "
7c3df132 7504 "version=0x%x.\n", chksum, nv->id[0],
3a03eb79 7505 le16_to_cpu(nv->nvram_version));
7c3df132
SK		 7506 ql_log(ql_log_info, vha, 0x0074,
7507 "Falling back to functioning (yet invalid -- WWPN) "
7508 "defaults.\n");
3a03eb79
AV		 7509
7510 /*
7511 * Set default initialization control block.
7512 */
7513 memset(nv, 0, ha->nvram_size);
ad950360
BVA		 7514 nv->nvram_version = cpu_to_le16(ICB_VERSION);
7515 nv->version = cpu_to_le16(ICB_VERSION);
98aee70d 7516 nv->frame_payload_size = 2048;
ad950360
BVA		 7517 nv->execution_throttle = cpu_to_le16(0xFFFF);
7518 nv->exchange_count = cpu_to_le16(0);
3a03eb79 7519 nv->port_name[0] = 0x21;
f73cb695 7520 nv->port_name[1] = 0x00 + ha->port_no + 1;
3a03eb79
AV		 7521 nv->port_name[2] = 0x00;
7522 nv->port_name[3] = 0xe0;
7523 nv->port_name[4] = 0x8b;
7524 nv->port_name[5] = 0x1c;
7525 nv->port_name[6] = 0x55;
7526 nv->port_name[7] = 0x86;
7527 nv->node_name[0] = 0x20;
7528 nv->node_name[1] = 0x00;
7529 nv->node_name[2] = 0x00;
7530 nv->node_name[3] = 0xe0;
7531 nv->node_name[4] = 0x8b;
7532 nv->node_name[5] = 0x1c;
7533 nv->node_name[6] = 0x55;
7534 nv->node_name[7] = 0x86;
ad950360
BVA		 7535 nv->login_retry_count = cpu_to_le16(8);
7536 nv->interrupt_delay_timer = cpu_to_le16(0);
7537 nv->login_timeout = cpu_to_le16(0);
3a03eb79 7538 nv->firmware_options_1 =
ad950360
BVA		 7539 cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1);
7540 nv->firmware_options_2 = cpu_to_le32(2 << 4);
7541 nv->firmware_options_2 |= cpu_to_le32(BIT_12);
7542 nv->firmware_options_3 = cpu_to_le32(2 << 13);
7543 nv->host_p = cpu_to_le32(BIT_11|BIT_10);
7544 nv->efi_parameters = cpu_to_le32(0);
3a03eb79 7545 nv->reset_delay = 5;
ad950360
BVA		 7546 nv->max_luns_per_target = cpu_to_le16(128);
7547 nv->port_down_retry_count = cpu_to_le16(30);
7548 nv->link_down_timeout = cpu_to_le16(180);
eeebcc92 7549 nv->enode_mac[0] = 0x00;
6246b8a1
GM		 7550 nv->enode_mac[1] = 0xC0;
7551 nv->enode_mac[2] = 0xDD;
3a03eb79
AV		 7552 nv->enode_mac[3] = 0x04;
7553 nv->enode_mac[4] = 0x05;
f73cb695 7554 nv->enode_mac[5] = 0x06 + ha->port_no + 1;
3a03eb79
AV		 7555
7556 rval = 1;
7557 }
7558
9e522cd8
AE		 7559 if (IS_T10_PI_CAPABLE(ha))
7560 nv->frame_payload_size &= ~7;
7561
aa230bc5
AE		 7562 qlt_81xx_config_nvram_stage1(vha, nv);
7563
3a03eb79 7564 /* Reset Initialization control block */
773120e4 7565 memset(icb, 0, ha->init_cb_size);
3a03eb79
AV		 7566
7567 /* Copy 1st segment. */
7568 dptr1 = (uint8_t *)icb;
7569 dptr2 = (uint8_t *)&nv->version;
7570 cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version;
7571 while (cnt--)
7572 *dptr1++ = *dptr2++;
7573
7574 icb->login_retry_count = nv->login_retry_count;
7575
7576 /* Copy 2nd segment. */
7577 dptr1 = (uint8_t *)&icb->interrupt_delay_timer;
7578 dptr2 = (uint8_t *)&nv->interrupt_delay_timer;
7579 cnt = (uint8_t *)&icb->reserved_5 -
7580 (uint8_t *)&icb->interrupt_delay_timer;
7581 while (cnt--)
7582 *dptr1++ = *dptr2++;
7583
7584 memcpy(icb->enode_mac, nv->enode_mac, sizeof(icb->enode_mac));
7585 /* Some boards (with valid NVRAMs) still have NULL enode_mac!! */
7586 if (!memcmp(icb->enode_mac, "\0\0\0\0\0\0", sizeof(icb->enode_mac))) {
69e5f1ea
AV		 7587 icb->enode_mac[0] = 0x00;
7588 icb->enode_mac[1] = 0xC0;
7589 icb->enode_mac[2] = 0xDD;
3a03eb79
AV		 7590 icb->enode_mac[3] = 0x04;
7591 icb->enode_mac[4] = 0x05;
f73cb695 7592 icb->enode_mac[5] = 0x06 + ha->port_no + 1;
3a03eb79
AV		 7593 }
7594
b64b0e8f
AV		 7595 /* Use extended-initialization control block. */
7596 memcpy(ha->ex_init_cb, &nv->ex_version, sizeof(*ha->ex_init_cb));
7597
3a03eb79
AV		 7598 /*
7599 * Setup driver NVRAM options.
7600 */
7601 qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name),
a9083016 7602 "QLE8XXX");
3a03eb79 7603
aa230bc5
AE		 7604 qlt_81xx_config_nvram_stage2(vha, icb);
7605
3a03eb79 7606 /* Use alternate WWN? */
ad950360 7607 if (nv->host_p & cpu_to_le32(BIT_15)) {
3a03eb79
AV		 7608 memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
7609 memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
7610 }
7611
7612 /* Prepare nodename */
ad950360 7613 if ((icb->firmware_options_1 & cpu_to_le32(BIT_14)) == 0) {
3a03eb79
AV		 7614 /*
7615 * Firmware will apply the following mask if the nodename was
7616 * not provided.
7617 */
7618 memcpy(icb->node_name, icb->port_name, WWN_SIZE);
7619 icb->node_name[0] &= 0xF0;
7620 }
7621
7622 /* Set host adapter parameters. */
7623 ha->flags.disable_risc_code_load = 0;
7624 ha->flags.enable_lip_reset = 0;
7625 ha->flags.enable_lip_full_login =
7626 le32_to_cpu(nv->host_p) & BIT_10 ? 1: 0;
7627 ha->flags.enable_target_reset =
7628 le32_to_cpu(nv->host_p) & BIT_11 ? 1: 0;
7629 ha->flags.enable_led_scheme = 0;
7630 ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1: 0;
7631
7632 ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) &
7633 (BIT_6 | BIT_5 | BIT_4)) >> 4;
7634
7635 /* save HBA serial number */
7636 ha->serial0 = icb->port_name[5];
7637 ha->serial1 = icb->port_name[6];
7638 ha->serial2 = icb->port_name[7];
7639 memcpy(vha->node_name, icb->node_name, WWN_SIZE);
7640 memcpy(vha->port_name, icb->port_name, WWN_SIZE);
7641
ad950360 7642 icb->execution_throttle = cpu_to_le16(0xFFFF);
3a03eb79
AV		 7643
7644 ha->retry_count = le16_to_cpu(nv->login_retry_count);
7645
7646 /* Set minimum login_timeout to 4 seconds. */
7647 if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout)
7648 nv->login_timeout = cpu_to_le16(ql2xlogintimeout);
7649 if (le16_to_cpu(nv->login_timeout) < 4)
ad950360 7650 nv->login_timeout = cpu_to_le16(4);
3a03eb79 7651 ha->login_timeout = le16_to_cpu(nv->login_timeout);
3a03eb79
AV		 7652
7653 /* Set minimum RATOV to 100 tenths of a second. */
7654 ha->r_a_tov = 100;
7655
7656 ha->loop_reset_delay = nv->reset_delay;
7657
7658 /* Link Down Timeout = 0:
7659 *
7ec0effd 7660 * When Port Down timer expires we will start returning
3a03eb79
AV		 7661 * I/O's to OS with "DID_NO_CONNECT".
7662 *
7663 * Link Down Timeout != 0:
7664 *
7665 * The driver waits for the link to come up after link down
7666 * before returning I/Os to OS with "DID_NO_CONNECT".
7667 */
7668 if (le16_to_cpu(nv->link_down_timeout) == 0) {
7669 ha->loop_down_abort_time =
7670 (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
7671 } else {
7672 ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout);
7673 ha->loop_down_abort_time =
7674 (LOOP_DOWN_TIME - ha->link_down_timeout);
7675 }
7676
7677 /* Need enough time to try and get the port back. */
7678 ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count);
7679 if (qlport_down_retry)
7680 ha->port_down_retry_count = qlport_down_retry;
7681
7682 /* Set login_retry_count */
7683 ha->login_retry_count = le16_to_cpu(nv->login_retry_count);
7684 if (ha->port_down_retry_count ==
7685 le16_to_cpu(nv->port_down_retry_count) &&
7686 ha->port_down_retry_count > 3)
7687 ha->login_retry_count = ha->port_down_retry_count;
7688 else if (ha->port_down_retry_count > (int)ha->login_retry_count)
7689 ha->login_retry_count = ha->port_down_retry_count;
7690 if (ql2xloginretrycount)
7691 ha->login_retry_count = ql2xloginretrycount;
7692
6246b8a1 7693 /* if not running MSI-X we need handshaking on interrupts */
f73cb695 7694 if (!vha->hw->flags.msix_enabled && (IS_QLA83XX(ha) || IS_QLA27XX(ha)))
ad950360 7695 icb->firmware_options_2 |= cpu_to_le32(BIT_22);
6246b8a1 7696
3a03eb79
AV		 7697 /* Enable ZIO. */
7698 if (!vha->flags.init_done) {
7699 ha->zio_mode = le32_to_cpu(icb->firmware_options_2) &
7700 (BIT_3 | BIT_2 | BIT_1 | BIT_0);
7701 ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ?
7702 le16_to_cpu(icb->interrupt_delay_timer): 2;
7703 }
ad950360 7704 icb->firmware_options_2 &= cpu_to_le32(
3a03eb79
AV		 7705 ~(BIT_3 | BIT_2 | BIT_1 | BIT_0));
7706 vha->flags.process_response_queue = 0;
7707 if (ha->zio_mode != QLA_ZIO_DISABLED) {
7708 ha->zio_mode = QLA_ZIO_MODE_6;
7709
7c3df132 7710 ql_log(ql_log_info, vha, 0x0075,
3a03eb79 7711 "ZIO mode %d enabled; timer delay (%d us).\n",
7c3df132
SK		 7712 ha->zio_mode,
7713 ha->zio_timer * 100);
3a03eb79
AV		 7714
7715 icb->firmware_options_2 |= cpu_to_le32(
7716 (uint32_t)ha->zio_mode);
7717 icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer);
7718 vha->flags.process_response_queue = 1;
7719 }
7720
41dc529a
QT		 7721 /* enable RIDA Format2 */
7722 if (qla_tgt_mode_enabled(vha) || qla_dual_mode_enabled(vha))
7723 icb->firmware_options_3 |= BIT_0;
7724
edd05de1
DG		 7725 if (IS_QLA27XX(ha)) {
7726 icb->firmware_options_3 |= BIT_8;
7727 ql_dbg(ql_log_info, vha, 0x0075,
7728 "Enabling direct connection.\n");
7729 }
7730
3a03eb79 7731 if (rval) {
7c3df132
SK		 7732 ql_log(ql_log_warn, vha, 0x0076,
7733 "NVRAM configuration failed.\n");
3a03eb79
AV		 7734 }
7735 return (rval);
7736}
7737
a9083016
GM		 7738int
7739qla82xx_restart_isp(scsi_qla_host_t *vha)
7740{
7741 int status, rval;
a9083016
GM		 7742 struct qla_hw_data *ha = vha->hw;
7743 struct req_que *req = ha->req_q_map[0];
7744 struct rsp_que *rsp = ha->rsp_q_map[0];
7745 struct scsi_qla_host *vp;
feafb7b1 7746 unsigned long flags;
a9083016
GM		 7747
7748 status = qla2x00_init_rings(vha);
7749 if (!status) {
7750 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
7751 ha->flags.chip_reset_done = 1;
7752
7753 status = qla2x00_fw_ready(vha);
7754 if (!status) {
a9083016
GM		 7755 /* Issue a marker after FW becomes ready. */
7756 qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL);
a9083016 7757 vha->flags.online = 1;
7108b76e 7758 set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
a9083016
GM		 7759 }
7760
7761 /* if no cable then assume it's good */
7762 if ((vha->device_flags & DFLG_NO_CABLE))
7763 status = 0;
a9083016
GM		 7764 }
7765
7766 if (!status) {
7767 clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
7768
7769 if (!atomic_read(&vha->loop_down_timer)) {
7770 /*
7771 * Issue marker command only when we are going
7772 * to start the I/O .
7773 */
7774 vha->marker_needed = 1;
7775 }
7776
a9083016
GM		 7777 ha->isp_ops->enable_intrs(ha);
7778
7779 ha->isp_abort_cnt = 0;
7780 clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
7781
53296788 7782 /* Update the firmware version */
3173167f 7783 status = qla82xx_check_md_needed(vha);
53296788 7784
a9083016
GM		 7785 if (ha->fce) {
7786 ha->flags.fce_enabled = 1;
7787 memset(ha->fce, 0,
7788 fce_calc_size(ha->fce_bufs));
7789 rval = qla2x00_enable_fce_trace(vha,
7790 ha->fce_dma, ha->fce_bufs, ha->fce_mb,
7791 &ha->fce_bufs);
7792 if (rval) {
cfb0919c 7793 ql_log(ql_log_warn, vha, 0x8001,
7c3df132
SK		 7794 "Unable to reinitialize FCE (%d).\n",
7795 rval);
a9083016
GM		 7796 ha->flags.fce_enabled = 0;
7797 }
7798 }
7799
7800 if (ha->eft) {
7801 memset(ha->eft, 0, EFT_SIZE);
7802 rval = qla2x00_enable_eft_trace(vha,
7803 ha->eft_dma, EFT_NUM_BUFFERS);
7804 if (rval) {
cfb0919c 7805 ql_log(ql_log_warn, vha, 0x8010,
7c3df132
SK		 7806 "Unable to reinitialize EFT (%d).\n",
7807 rval);
a9083016
GM		 7808 }
7809 }
a9083016
GM		 7810 }
7811
7812 if (!status) {
cfb0919c 7813 ql_dbg(ql_dbg_taskm, vha, 0x8011,
7c3df132 7814 "qla82xx_restart_isp succeeded.\n");
feafb7b1
AE		 7815
7816 spin_lock_irqsave(&ha->vport_slock, flags);
7817 list_for_each_entry(vp, &ha->vp_list, list) {
7818 if (vp->vp_idx) {
7819 atomic_inc(&vp->vref_count);
7820 spin_unlock_irqrestore(&ha->vport_slock, flags);
7821
a9083016 7822 qla2x00_vp_abort_isp(vp);
feafb7b1
AE		 7823
7824 spin_lock_irqsave(&ha->vport_slock, flags);
7825 atomic_dec(&vp->vref_count);
7826 }
a9083016 7827 }
feafb7b1
AE		 7828 spin_unlock_irqrestore(&ha->vport_slock, flags);
7829
a9083016 7830 } else {
cfb0919c 7831 ql_log(ql_log_warn, vha, 0x8016,
7c3df132 7832 "qla82xx_restart_isp **** FAILED ****.\n");
a9083016
GM		 7833 }
7834
7835 return status;
7836}
7837
3a03eb79 7838void
ae97c91e 7839qla81xx_update_fw_options(scsi_qla_host_t *vha)
3a03eb79 7840{
ae97c91e
AV		 7841 struct qla_hw_data *ha = vha->hw;
7842
f198cafa
HM		 7843 /* Hold status IOCBs until ABTS response received. */
7844 if (ql2xfwholdabts)
7845 ha->fw_options[3] |= BIT_12;
7846
088d09d4
GM		 7847 /* Set Retry FLOGI in case of P2P connection */
7848 if (ha->operating_mode == P2P) {
7849 ha->fw_options[2] |= BIT_3;
7850 ql_dbg(ql_dbg_disc, vha, 0x2103,
7851 "(%s): Setting FLOGI retry BIT in fw_options[2]: 0x%x\n",
7852 __func__, ha->fw_options[2]);
7853 }
7854
41dc529a
QT		 7855 /* Move PUREX, ABTS RX & RIDA to ATIOQ */
7856 if (ql2xmvasynctoatio) {
7857 if (qla_tgt_mode_enabled(vha) ||
7858 qla_dual_mode_enabled(vha))
7859 ha->fw_options[2] |= BIT_11;
7860 else
7861 ha->fw_options[2] &= ~BIT_11;
7862 }
7863
f7e761f5 7864 if (qla_tgt_mode_enabled(vha) ||
2da52737
QT		 7865 qla_dual_mode_enabled(vha)) {
7866 /* FW auto send SCSI status during */
7867 ha->fw_options[1] |= BIT_8;
7868 ha->fw_options[10] |= (u16)SAM_STAT_BUSY << 8;
7869
7870 /* FW perform Exchange validation */
f7e761f5 7871 ha->fw_options[2] |= BIT_4;
2da52737
QT		 7872 } else {
7873 ha->fw_options[1] &= ~BIT_8;
7874 ha->fw_options[10] &= 0x00ff;
7875
f7e761f5 7876 ha->fw_options[2] &= ~BIT_4;
2da52737 7877 }
f7e761f5 7878
41dc529a
QT		 7879 if (ql2xetsenable) {
7880 /* Enable ETS Burst. */
7881 memset(ha->fw_options, 0, sizeof(ha->fw_options));
7882 ha->fw_options[2] |= BIT_9;
7883 }
7884
83548fe2
QT		 7885 ql_dbg(ql_dbg_init, vha, 0x00e9,
7886 "%s, add FW options 1-3 = 0x%04x 0x%04x 0x%04x mode %x\n",
7887 __func__, ha->fw_options[1], ha->fw_options[2],
7888 ha->fw_options[3], vha->host->active_mode);
ae97c91e 7889
ae97c91e 7890 qla2x00_set_fw_options(vha, ha->fw_options);
3a03eb79 7891}
09ff701a
SR		 7892
7893/*
7894 * qla24xx_get_fcp_prio
7895 * Gets the fcp cmd priority value for the logged in port.
7896 * Looks for a match of the port descriptors within
7897 * each of the fcp prio config entries. If a match is found,
7898 * the tag (priority) value is returned.
7899 *
7900 * Input:
21090cbe 7901 * vha = scsi host structure pointer.
09ff701a
SR		 7902 * fcport = port structure pointer.
7903 *
7904 * Return:
6c452a45 7905 * non-zero (if found)
f28a0a96 7906 * -1 (if not found)
09ff701a
SR		 7907 *
7908 * Context:
7909 * Kernel context
7910 */
f28a0a96 7911static int
09ff701a
SR		 7912qla24xx_get_fcp_prio(scsi_qla_host_t *vha, fc_port_t *fcport)
7913{
7914 int i, entries;
7915 uint8_t pid_match, wwn_match;
f28a0a96 7916 int priority;
09ff701a
SR		 7917 uint32_t pid1, pid2;
7918 uint64_t wwn1, wwn2;
7919 struct qla_fcp_prio_entry *pri_entry;
7920 struct qla_hw_data *ha = vha->hw;
7921
7922 if (!ha->fcp_prio_cfg || !ha->flags.fcp_prio_enabled)
f28a0a96 7923 return -1;
09ff701a 7924
f28a0a96 7925 priority = -1;
09ff701a
SR		 7926 entries = ha->fcp_prio_cfg->num_entries;
7927 pri_entry = &ha->fcp_prio_cfg->entry[0];
7928
7929 for (i = 0; i < entries; i++) {
7930 pid_match = wwn_match = 0;
7931
7932 if (!(pri_entry->flags & FCP_PRIO_ENTRY_VALID)) {
7933 pri_entry++;
7934 continue;
7935 }
7936
7937 /* check source pid for a match */
7938 if (pri_entry->flags & FCP_PRIO_ENTRY_SPID_VALID) {
7939 pid1 = pri_entry->src_pid & INVALID_PORT_ID;
7940 pid2 = vha->d_id.b24 & INVALID_PORT_ID;
7941 if (pid1 == INVALID_PORT_ID)
7942 pid_match++;
7943 else if (pid1 == pid2)
7944 pid_match++;
7945 }
7946
7947 /* check destination pid for a match */
7948 if (pri_entry->flags & FCP_PRIO_ENTRY_DPID_VALID) {
7949 pid1 = pri_entry->dst_pid & INVALID_PORT_ID;
7950 pid2 = fcport->d_id.b24 & INVALID_PORT_ID;
7951 if (pid1 == INVALID_PORT_ID)
7952 pid_match++;
7953 else if (pid1 == pid2)
7954 pid_match++;
7955 }
7956
7957 /* check source WWN for a match */
7958 if (pri_entry->flags & FCP_PRIO_ENTRY_SWWN_VALID) {
7959 wwn1 = wwn_to_u64(vha->port_name);
7960 wwn2 = wwn_to_u64(pri_entry->src_wwpn);
7961 if (wwn2 == (uint64_t)-1)
7962 wwn_match++;
7963 else if (wwn1 == wwn2)
7964 wwn_match++;
7965 }
7966
7967 /* check destination WWN for a match */
7968 if (pri_entry->flags & FCP_PRIO_ENTRY_DWWN_VALID) {
7969 wwn1 = wwn_to_u64(fcport->port_name);
7970 wwn2 = wwn_to_u64(pri_entry->dst_wwpn);
7971 if (wwn2 == (uint64_t)-1)
7972 wwn_match++;
7973 else if (wwn1 == wwn2)
7974 wwn_match++;
7975 }
7976
7977 if (pid_match == 2 || wwn_match == 2) {
7978 /* Found a matching entry */
7979 if (pri_entry->flags & FCP_PRIO_ENTRY_TAG_VALID)
7980 priority = pri_entry->tag;
7981 break;
7982 }
7983
7984 pri_entry++;
7985 }
7986
7987 return priority;
7988}
7989
7990/*
7991 * qla24xx_update_fcport_fcp_prio
7992 * Activates fcp priority for the logged in fc port
7993 *
7994 * Input:
21090cbe 7995 * vha = scsi host structure pointer.
09ff701a
SR		 7996 * fcp = port structure pointer.
7997 *
7998 * Return:
7999 * QLA_SUCCESS or QLA_FUNCTION_FAILED
8000 *
8001 * Context:
8002 * Kernel context.
8003 */
8004int
21090cbe 8005qla24xx_update_fcport_fcp_prio(scsi_qla_host_t *vha, fc_port_t *fcport)
09ff701a
SR		 8006{
8007 int ret;
f28a0a96 8008 int priority;
09ff701a
SR		 8009 uint16_t mb[5];
8010
21090cbe
MI		 8011 if (fcport->port_type != FCT_TARGET ||
8012 fcport->loop_id == FC_NO_LOOP_ID)
09ff701a
SR		 8013 return QLA_FUNCTION_FAILED;
8014
21090cbe 8015 priority = qla24xx_get_fcp_prio(vha, fcport);
f28a0a96
AV		 8016 if (priority < 0)
8017 return QLA_FUNCTION_FAILED;
8018
7ec0effd 8019 if (IS_P3P_TYPE(vha->hw)) {
a00f6296
SK		 8020 fcport->fcp_prio = priority & 0xf;
8021 return QLA_SUCCESS;
8022 }
8023
21090cbe 8024 ret = qla24xx_set_fcp_prio(vha, fcport->loop_id, priority, mb);
cfb0919c
CD		 8025 if (ret == QLA_SUCCESS) {
8026 if (fcport->fcp_prio != priority)
8027 ql_dbg(ql_dbg_user, vha, 0x709e,
8028 "Updated FCP_CMND priority - value=%d loop_id=%d "
8029 "port_id=%02x%02x%02x.\n", priority,
8030 fcport->loop_id, fcport->d_id.b.domain,
8031 fcport->d_id.b.area, fcport->d_id.b.al_pa);
a00f6296 8032 fcport->fcp_prio = priority & 0xf;
cfb0919c 8033 } else
7c3df132 8034 ql_dbg(ql_dbg_user, vha, 0x704f,
cfb0919c
CD		 8035 "Unable to update FCP_CMND priority - ret=0x%x for "
8036 "loop_id=%d port_id=%02x%02x%02x.\n", ret, fcport->loop_id,
8037 fcport->d_id.b.domain, fcport->d_id.b.area,
8038 fcport->d_id.b.al_pa);
09ff701a
SR		 8039 return ret;
8040}
8041
8042/*
8043 * qla24xx_update_all_fcp_prio
8044 * Activates fcp priority for all the logged in ports
8045 *
8046 * Input:
8047 * ha = adapter block pointer.
8048 *
8049 * Return:
8050 * QLA_SUCCESS or QLA_FUNCTION_FAILED
8051 *
8052 * Context:
8053 * Kernel context.
8054 */
8055int
8056qla24xx_update_all_fcp_prio(scsi_qla_host_t *vha)
8057{
8058 int ret;
8059 fc_port_t *fcport;
8060
8061 ret = QLA_FUNCTION_FAILED;
8062 /* We need to set priority for all logged in ports */
8063 list_for_each_entry(fcport, &vha->vp_fcports, list)
8064 ret = qla24xx_update_fcport_fcp_prio(vha, fcport);
8065
8066 return ret;
8067}
d7459527 8068
82de802a
QT		 8069struct qla_qpair *qla2xxx_create_qpair(struct scsi_qla_host *vha, int qos,
8070 int vp_idx, bool startqp)
d7459527
MH		 8071{
8072 int rsp_id = 0;
8073 int req_id = 0;
8074 int i;
8075 struct qla_hw_data *ha = vha->hw;
8076 uint16_t qpair_id = 0;
8077 struct qla_qpair *qpair = NULL;
8078 struct qla_msix_entry *msix;
8079
8080 if (!(ha->fw_attributes & BIT_6) || !ha->flags.msix_enabled) {
8081 ql_log(ql_log_warn, vha, 0x00181,
8082 "FW/Driver is not multi-queue capable.\n");
8083 return NULL;
8084 }
8085
c38d1baf 8086 if (ql2xmqsupport || ql2xnvmeenable) {
d7459527
MH		 8087 qpair = kzalloc(sizeof(struct qla_qpair), GFP_KERNEL);
8088 if (qpair == NULL) {
8089 ql_log(ql_log_warn, vha, 0x0182,
8090 "Failed to allocate memory for queue pair.\n");
8091 return NULL;
8092 }
8093 memset(qpair, 0, sizeof(struct qla_qpair));
8094
8095 qpair->hw = vha->hw;
25ff6af1 8096 qpair->vha = vha;
82de802a
QT		 8097 qpair->qp_lock_ptr = &qpair->qp_lock;
8098 spin_lock_init(&qpair->qp_lock);
af7bb382 8099 qpair->use_shadow_reg = IS_SHADOW_REG_CAPABLE(ha) ? 1 : 0;
d7459527
MH		 8100
8101 /* Assign available que pair id */
8102 mutex_lock(&ha->mq_lock);
8103 qpair_id = find_first_zero_bit(ha->qpair_qid_map, ha->max_qpairs);
b95b9452 8104 if (ha->num_qpairs >= ha->max_qpairs) {
d7459527
MH		 8105 mutex_unlock(&ha->mq_lock);
8106 ql_log(ql_log_warn, vha, 0x0183,
8107 "No resources to create additional q pair.\n");
8108 goto fail_qid_map;
8109 }
b95b9452 8110 ha->num_qpairs++;
d7459527
MH		 8111 set_bit(qpair_id, ha->qpair_qid_map);
8112 ha->queue_pair_map[qpair_id] = qpair;
8113 qpair->id = qpair_id;
8114 qpair->vp_idx = vp_idx;
e6373f33 8115 qpair->fw_started = ha->flags.fw_started;
e326d22a 8116 INIT_LIST_HEAD(&qpair->hints_list);
cf19c45d 8117 INIT_LIST_HEAD(&qpair->nvme_done_list);
7c3f8fd1
QT		 8118 qpair->chip_reset = ha->base_qpair->chip_reset;
8119 qpair->enable_class_2 = ha->base_qpair->enable_class_2;
8120 qpair->enable_explicit_conf =
8121 ha->base_qpair->enable_explicit_conf;
d7459527
MH		 8122
8123 for (i = 0; i < ha->msix_count; i++) {
093df737 8124 msix = &ha->msix_entries[i];
d7459527
MH		 8125 if (msix->in_use)
8126 continue;
8127 qpair->msix = msix;
83548fe2 8128 ql_dbg(ql_dbg_multiq, vha, 0xc00f,
d7459527
MH		 8129 "Vector %x selected for qpair\n", msix->vector);
8130 break;
8131 }
8132 if (!qpair->msix) {
8133 ql_log(ql_log_warn, vha, 0x0184,
8134 "Out of MSI-X vectors!.\n");
8135 goto fail_msix;
8136 }
8137
8138 qpair->msix->in_use = 1;
8139 list_add_tail(&qpair->qp_list_elem, &vha->qp_list);
8abfa9e2
QT		 8140 qpair->pdev = ha->pdev;
8141 if (IS_QLA27XX(ha) || IS_QLA83XX(ha))
8142 qpair->reqq_start_iocbs = qla_83xx_start_iocbs;
d7459527
MH		 8143
8144 mutex_unlock(&ha->mq_lock);
8145
8146 /* Create response queue first */
82de802a 8147 rsp_id = qla25xx_create_rsp_que(ha, 0, 0, 0, qpair, startqp);
d7459527
MH		 8148 if (!rsp_id) {
8149 ql_log(ql_log_warn, vha, 0x0185,
8150 "Failed to create response queue.\n");
8151 goto fail_rsp;
8152 }
8153
8154 qpair->rsp = ha->rsp_q_map[rsp_id];
8155
8156 /* Create request queue */
82de802a
QT		 8157 req_id = qla25xx_create_req_que(ha, 0, vp_idx, 0, rsp_id, qos,
8158 startqp);
d7459527
MH		 8159 if (!req_id) {
8160 ql_log(ql_log_warn, vha, 0x0186,
8161 "Failed to create request queue.\n");
8162 goto fail_req;
8163 }
8164
8165 qpair->req = ha->req_q_map[req_id];
8166 qpair->rsp->req = qpair->req;
82de802a 8167 qpair->rsp->qpair = qpair;
e326d22a
QT		 8168 /* init qpair to this cpu. Will adjust at run time. */
8169 qla_cpu_update(qpair, smp_processor_id());
d7459527
MH		 8170
8171 if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif) {
8172 if (ha->fw_attributes & BIT_4)
8173 qpair->difdix_supported = 1;
8174 }
8175
8176 qpair->srb_mempool = mempool_create_slab_pool(SRB_MIN_REQ, srb_cachep);
8177 if (!qpair->srb_mempool) {
83548fe2 8178 ql_log(ql_log_warn, vha, 0xd036,
d7459527
MH		 8179 "Failed to create srb mempool for qpair %d\n",
8180 qpair->id);
8181 goto fail_mempool;
8182 }
8183
8184 /* Mark as online */
8185 qpair->online = 1;
8186
8187 if (!vha->flags.qpairs_available)
8188 vha->flags.qpairs_available = 1;
8189
8190 ql_dbg(ql_dbg_multiq, vha, 0xc00d,
8191 "Request/Response queue pair created, id %d\n",
8192 qpair->id);
8193 ql_dbg(ql_dbg_init, vha, 0x0187,
8194 "Request/Response queue pair created, id %d\n",
8195 qpair->id);
8196 }
8197 return qpair;
8198
8199fail_mempool:
8200fail_req:
8201 qla25xx_delete_rsp_que(vha, qpair->rsp);
8202fail_rsp:
8203 mutex_lock(&ha->mq_lock);
8204 qpair->msix->in_use = 0;
8205 list_del(&qpair->qp_list_elem);
8206 if (list_empty(&vha->qp_list))
8207 vha->flags.qpairs_available = 0;
8208fail_msix:
8209 ha->queue_pair_map[qpair_id] = NULL;
8210 clear_bit(qpair_id, ha->qpair_qid_map);
b95b9452 8211 ha->num_qpairs--;
d7459527
MH		 8212 mutex_unlock(&ha->mq_lock);
8213fail_qid_map:
8214 kfree(qpair);
8215 return NULL;
8216}
8217
8218int qla2xxx_delete_qpair(struct scsi_qla_host *vha, struct qla_qpair *qpair)
8219{
d65237c7 8220 int ret = QLA_FUNCTION_FAILED;
d7459527
MH		 8221 struct qla_hw_data *ha = qpair->hw;
8222
d65237c7
SC		 8223 if (!vha->flags.qpairs_req_created && !vha->flags.qpairs_rsp_created)
8224 goto fail;
8225
d7459527
MH		 8226 qpair->delete_in_progress = 1;
8227 while (atomic_read(&qpair->ref_count))
8228 msleep(500);
8229
8230 ret = qla25xx_delete_req_que(vha, qpair->req);
8231 if (ret != QLA_SUCCESS)
8232 goto fail;
8233 ret = qla25xx_delete_rsp_que(vha, qpair->rsp);
8234 if (ret != QLA_SUCCESS)
8235 goto fail;
8236
8237 mutex_lock(&ha->mq_lock);
8238 ha->queue_pair_map[qpair->id] = NULL;
8239 clear_bit(qpair->id, ha->qpair_qid_map);
b95b9452 8240 ha->num_qpairs--;
d7459527 8241 list_del(&qpair->qp_list_elem);
d65237c7 8242 if (list_empty(&vha->qp_list)) {
d7459527 8243 vha->flags.qpairs_available = 0;
d65237c7
SC		 8244 vha->flags.qpairs_req_created = 0;
8245 vha->flags.qpairs_rsp_created = 0;
8246 }
d7459527
MH		 8247 mempool_destroy(qpair->srb_mempool);
8248 kfree(qpair);
8249 mutex_unlock(&ha->mq_lock);
8250
8251 return QLA_SUCCESS;
8252fail:
8253 return ret;
8254}
Linux 6.x block layer and io_uring tree(s)