fork: report pid reservation failure properly
[linux-2.6-block.git] / drivers / scsi / pmcraid.c
CommitLineData
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1/*
2 * pmcraid.c -- driver for PMC Sierra MaxRAID controller adapters
3 *
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4 * Written By: Anil Ravindranath<anil_ravindranath@pmc-sierra.com>
5 * PMC-Sierra Inc
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6 *
7 * Copyright (C) 2008, 2009 PMC Sierra Inc
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307,
22 * USA
23 *
24 */
25#include <linux/fs.h>
26#include <linux/init.h>
27#include <linux/types.h>
28#include <linux/errno.h>
29#include <linux/kernel.h>
30#include <linux/ioport.h>
31#include <linux/delay.h>
32#include <linux/pci.h>
33#include <linux/wait.h>
34#include <linux/spinlock.h>
35#include <linux/sched.h>
36#include <linux/interrupt.h>
37#include <linux/blkdev.h>
38#include <linux/firmware.h>
39#include <linux/module.h>
40#include <linux/moduleparam.h>
41#include <linux/hdreg.h>
89a36810 42#include <linux/io.h>
5a0e3ad6 43#include <linux/slab.h>
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44#include <asm/irq.h>
45#include <asm/processor.h>
46#include <linux/libata.h>
47#include <linux/mutex.h>
48#include <scsi/scsi.h>
49#include <scsi/scsi_host.h>
34876402 50#include <scsi/scsi_device.h>
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51#include <scsi/scsi_tcq.h>
52#include <scsi/scsi_eh.h>
53#include <scsi/scsi_cmnd.h>
54#include <scsi/scsicam.h>
55
56#include "pmcraid.h"
57
58/*
59 * Module configuration parameters
60 */
61static unsigned int pmcraid_debug_log;
62static unsigned int pmcraid_disable_aen;
63static unsigned int pmcraid_log_level = IOASC_LOG_LEVEL_MUST;
5da61410 64static unsigned int pmcraid_enable_msix;
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65
66/*
67 * Data structures to support multiple adapters by the LLD.
68 * pmcraid_adapter_count - count of configured adapters
69 */
70static atomic_t pmcraid_adapter_count = ATOMIC_INIT(0);
71
72/*
73 * Supporting user-level control interface through IOCTL commands.
74 * pmcraid_major - major number to use
75 * pmcraid_minor - minor number(s) to use
76 */
77static unsigned int pmcraid_major;
78static struct class *pmcraid_class;
79DECLARE_BITMAP(pmcraid_minor, PMCRAID_MAX_ADAPTERS);
80
81/*
82 * Module parameters
83 */
729c8456 84MODULE_AUTHOR("Anil Ravindranath<anil_ravindranath@pmc-sierra.com>");
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85MODULE_DESCRIPTION("PMC Sierra MaxRAID Controller Driver");
86MODULE_LICENSE("GPL");
87MODULE_VERSION(PMCRAID_DRIVER_VERSION);
88
89module_param_named(log_level, pmcraid_log_level, uint, (S_IRUGO | S_IWUSR));
90MODULE_PARM_DESC(log_level,
91 "Enables firmware error code logging, default :1 high-severity"
92 " errors, 2: all errors including high-severity errors,"
93 " 0: disables logging");
94
95module_param_named(debug, pmcraid_debug_log, uint, (S_IRUGO | S_IWUSR));
96MODULE_PARM_DESC(debug,
97 "Enable driver verbose message logging. Set 1 to enable."
98 "(default: 0)");
99
100module_param_named(disable_aen, pmcraid_disable_aen, uint, (S_IRUGO | S_IWUSR));
101MODULE_PARM_DESC(disable_aen,
102 "Disable driver aen notifications to apps. Set 1 to disable."
103 "(default: 0)");
104
105/* chip specific constants for PMC MaxRAID controllers (same for
106 * 0x5220 and 0x8010
107 */
108static struct pmcraid_chip_details pmcraid_chip_cfg[] = {
109 {
110 .ioastatus = 0x0,
111 .ioarrin = 0x00040,
112 .mailbox = 0x7FC30,
113 .global_intr_mask = 0x00034,
114 .ioa_host_intr = 0x0009C,
115 .ioa_host_intr_clr = 0x000A0,
c20c4267 116 .ioa_host_msix_intr = 0x7FC40,
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117 .ioa_host_mask = 0x7FC28,
118 .ioa_host_mask_clr = 0x7FC28,
119 .host_ioa_intr = 0x00020,
120 .host_ioa_intr_clr = 0x00020,
121 .transop_timeout = 300
122 }
123};
124
125/*
126 * PCI device ids supported by pmcraid driver
127 */
6f039790 128static struct pci_device_id pmcraid_pci_table[] = {
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129 { PCI_DEVICE(PCI_VENDOR_ID_PMC, PCI_DEVICE_ID_PMC_MAXRAID),
130 0, 0, (kernel_ulong_t)&pmcraid_chip_cfg[0]
131 },
132 {}
133};
134
135MODULE_DEVICE_TABLE(pci, pmcraid_pci_table);
136
137
138
139/**
140 * pmcraid_slave_alloc - Prepare for commands to a device
141 * @scsi_dev: scsi device struct
142 *
143 * This function is called by mid-layer prior to sending any command to the new
144 * device. Stores resource entry details of the device in scsi_device struct.
145 * Queuecommand uses the resource handle and other details to fill up IOARCB
146 * while sending commands to the device.
147 *
148 * Return value:
149 * 0 on success / -ENXIO if device does not exist
150 */
151static int pmcraid_slave_alloc(struct scsi_device *scsi_dev)
152{
153 struct pmcraid_resource_entry *temp, *res = NULL;
154 struct pmcraid_instance *pinstance;
155 u8 target, bus, lun;
156 unsigned long lock_flags;
157 int rc = -ENXIO;
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158 u16 fw_version;
159
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160 pinstance = shost_priv(scsi_dev->host);
161
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162 fw_version = be16_to_cpu(pinstance->inq_data->fw_version);
163
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164 /* Driver exposes VSET and GSCSI resources only; all other device types
165 * are not exposed. Resource list is synchronized using resource lock
166 * so any traversal or modifications to the list should be done inside
167 * this lock
168 */
169 spin_lock_irqsave(&pinstance->resource_lock, lock_flags);
170 list_for_each_entry(temp, &pinstance->used_res_q, queue) {
171
729c8456 172 /* do not expose VSETs with order-ids > MAX_VSET_TARGETS */
89a36810 173 if (RES_IS_VSET(temp->cfg_entry)) {
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174 if (fw_version <= PMCRAID_FW_VERSION_1)
175 target = temp->cfg_entry.unique_flags1;
176 else
177 target = temp->cfg_entry.array_id & 0xFF;
178
729c8456 179 if (target > PMCRAID_MAX_VSET_TARGETS)
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180 continue;
181 bus = PMCRAID_VSET_BUS_ID;
182 lun = 0;
183 } else if (RES_IS_GSCSI(temp->cfg_entry)) {
184 target = RES_TARGET(temp->cfg_entry.resource_address);
185 bus = PMCRAID_PHYS_BUS_ID;
186 lun = RES_LUN(temp->cfg_entry.resource_address);
187 } else {
188 continue;
189 }
190
191 if (bus == scsi_dev->channel &&
192 target == scsi_dev->id &&
193 lun == scsi_dev->lun) {
194 res = temp;
195 break;
196 }
197 }
198
199 if (res) {
200 res->scsi_dev = scsi_dev;
201 scsi_dev->hostdata = res;
202 res->change_detected = 0;
203 atomic_set(&res->read_failures, 0);
204 atomic_set(&res->write_failures, 0);
205 rc = 0;
206 }
207 spin_unlock_irqrestore(&pinstance->resource_lock, lock_flags);
208 return rc;
209}
210
211/**
212 * pmcraid_slave_configure - Configures a SCSI device
213 * @scsi_dev: scsi device struct
214 *
25985edc 215 * This function is executed by SCSI mid layer just after a device is first
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216 * scanned (i.e. it has responded to an INQUIRY). For VSET resources, the
217 * timeout value (default 30s) will be over-written to a higher value (60s)
218 * and max_sectors value will be over-written to 512. It also sets queue depth
219 * to host->cmd_per_lun value
220 *
221 * Return value:
222 * 0 on success
223 */
224static int pmcraid_slave_configure(struct scsi_device *scsi_dev)
225{
226 struct pmcraid_resource_entry *res = scsi_dev->hostdata;
227
228 if (!res)
229 return 0;
230
231 /* LLD exposes VSETs and Enclosure devices only */
232 if (RES_IS_GSCSI(res->cfg_entry) &&
233 scsi_dev->type != TYPE_ENCLOSURE)
234 return -ENXIO;
235
236 pmcraid_info("configuring %x:%x:%x:%x\n",
237 scsi_dev->host->unique_id,
238 scsi_dev->channel,
239 scsi_dev->id,
9cb78c16 240 (u8)scsi_dev->lun);
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241
242 if (RES_IS_GSCSI(res->cfg_entry)) {
243 scsi_dev->allow_restart = 1;
244 } else if (RES_IS_VSET(res->cfg_entry)) {
245 scsi_dev->allow_restart = 1;
246 blk_queue_rq_timeout(scsi_dev->request_queue,
247 PMCRAID_VSET_IO_TIMEOUT);
086fa5ff 248 blk_queue_max_hw_sectors(scsi_dev->request_queue,
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249 PMCRAID_VSET_MAX_SECTORS);
250 }
251
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252 /*
253 * We never want to report TCQ support for these types of devices.
254 */
255 if (!RES_IS_GSCSI(res->cfg_entry) && !RES_IS_VSET(res->cfg_entry))
256 scsi_dev->tagged_supported = 0;
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257
258 return 0;
259}
260
261/**
262 * pmcraid_slave_destroy - Unconfigure a SCSI device before removing it
263 *
264 * @scsi_dev: scsi device struct
265 *
266 * This is called by mid-layer before removing a device. Pointer assignments
267 * done in pmcraid_slave_alloc will be reset to NULL here.
268 *
269 * Return value
270 * none
271 */
272static void pmcraid_slave_destroy(struct scsi_device *scsi_dev)
273{
274 struct pmcraid_resource_entry *res;
275
276 res = (struct pmcraid_resource_entry *)scsi_dev->hostdata;
277
278 if (res)
279 res->scsi_dev = NULL;
280
281 scsi_dev->hostdata = NULL;
282}
283
284/**
285 * pmcraid_change_queue_depth - Change the device's queue depth
286 * @scsi_dev: scsi device struct
287 * @depth: depth to set
288 *
289 * Return value
c20c4267 290 * actual depth set
89a36810 291 */
db5ed4df 292static int pmcraid_change_queue_depth(struct scsi_device *scsi_dev, int depth)
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293{
294 if (depth > PMCRAID_MAX_CMD_PER_LUN)
295 depth = PMCRAID_MAX_CMD_PER_LUN;
db5ed4df 296 return scsi_change_queue_depth(scsi_dev, depth);
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297}
298
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299/**
300 * pmcraid_init_cmdblk - initializes a command block
301 *
302 * @cmd: pointer to struct pmcraid_cmd to be initialized
303 * @index: if >=0 first time initialization; otherwise reinitialization
304 *
305 * Return Value
306 * None
307 */
308void pmcraid_init_cmdblk(struct pmcraid_cmd *cmd, int index)
309{
310 struct pmcraid_ioarcb *ioarcb = &(cmd->ioa_cb->ioarcb);
311 dma_addr_t dma_addr = cmd->ioa_cb_bus_addr;
312
313 if (index >= 0) {
314 /* first time initialization (called from probe) */
315 u32 ioasa_offset =
316 offsetof(struct pmcraid_control_block, ioasa);
317
318 cmd->index = index;
319 ioarcb->response_handle = cpu_to_le32(index << 2);
320 ioarcb->ioarcb_bus_addr = cpu_to_le64(dma_addr);
321 ioarcb->ioasa_bus_addr = cpu_to_le64(dma_addr + ioasa_offset);
322 ioarcb->ioasa_len = cpu_to_le16(sizeof(struct pmcraid_ioasa));
323 } else {
324 /* re-initialization of various lengths, called once command is
325 * processed by IOA
326 */
327 memset(&cmd->ioa_cb->ioarcb.cdb, 0, PMCRAID_MAX_CDB_LEN);
c20c4267 328 ioarcb->hrrq_id = 0;
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329 ioarcb->request_flags0 = 0;
330 ioarcb->request_flags1 = 0;
331 ioarcb->cmd_timeout = 0;
332 ioarcb->ioarcb_bus_addr &= (~0x1FULL);
333 ioarcb->ioadl_bus_addr = 0;
334 ioarcb->ioadl_length = 0;
335 ioarcb->data_transfer_length = 0;
336 ioarcb->add_cmd_param_length = 0;
337 ioarcb->add_cmd_param_offset = 0;
338 cmd->ioa_cb->ioasa.ioasc = 0;
339 cmd->ioa_cb->ioasa.residual_data_length = 0;
c20c4267 340 cmd->time_left = 0;
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341 }
342
343 cmd->cmd_done = NULL;
344 cmd->scsi_cmd = NULL;
345 cmd->release = 0;
346 cmd->completion_req = 0;
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347 cmd->sense_buffer = 0;
348 cmd->sense_buffer_dma = 0;
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349 cmd->dma_handle = 0;
350 init_timer(&cmd->timer);
351}
352
353/**
354 * pmcraid_reinit_cmdblk - reinitialize a command block
355 *
356 * @cmd: pointer to struct pmcraid_cmd to be reinitialized
357 *
358 * Return Value
359 * None
360 */
361static void pmcraid_reinit_cmdblk(struct pmcraid_cmd *cmd)
362{
363 pmcraid_init_cmdblk(cmd, -1);
364}
365
366/**
367 * pmcraid_get_free_cmd - get a free cmd block from command block pool
368 * @pinstance: adapter instance structure
369 *
370 * Return Value:
371 * returns pointer to cmd block or NULL if no blocks are available
372 */
373static struct pmcraid_cmd *pmcraid_get_free_cmd(
374 struct pmcraid_instance *pinstance
375)
376{
377 struct pmcraid_cmd *cmd = NULL;
378 unsigned long lock_flags;
379
380 /* free cmd block list is protected by free_pool_lock */
381 spin_lock_irqsave(&pinstance->free_pool_lock, lock_flags);
382
383 if (!list_empty(&pinstance->free_cmd_pool)) {
384 cmd = list_entry(pinstance->free_cmd_pool.next,
385 struct pmcraid_cmd, free_list);
386 list_del(&cmd->free_list);
387 }
388 spin_unlock_irqrestore(&pinstance->free_pool_lock, lock_flags);
389
390 /* Initialize the command block before giving it the caller */
391 if (cmd != NULL)
392 pmcraid_reinit_cmdblk(cmd);
393 return cmd;
394}
395
396/**
397 * pmcraid_return_cmd - return a completed command block back into free pool
398 * @cmd: pointer to the command block
399 *
400 * Return Value:
401 * nothing
402 */
403void pmcraid_return_cmd(struct pmcraid_cmd *cmd)
404{
405 struct pmcraid_instance *pinstance = cmd->drv_inst;
406 unsigned long lock_flags;
407
408 spin_lock_irqsave(&pinstance->free_pool_lock, lock_flags);
409 list_add_tail(&cmd->free_list, &pinstance->free_cmd_pool);
410 spin_unlock_irqrestore(&pinstance->free_pool_lock, lock_flags);
411}
412
413/**
414 * pmcraid_read_interrupts - reads IOA interrupts
415 *
416 * @pinstance: pointer to adapter instance structure
417 *
418 * Return value
419 * interrupts read from IOA
420 */
421static u32 pmcraid_read_interrupts(struct pmcraid_instance *pinstance)
422{
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423 return (pinstance->interrupt_mode) ?
424 ioread32(pinstance->int_regs.ioa_host_msix_interrupt_reg) :
425 ioread32(pinstance->int_regs.ioa_host_interrupt_reg);
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426}
427
428/**
429 * pmcraid_disable_interrupts - Masks and clears all specified interrupts
430 *
431 * @pinstance: pointer to per adapter instance structure
432 * @intrs: interrupts to disable
433 *
434 * Return Value
435 * None
436 */
437static void pmcraid_disable_interrupts(
438 struct pmcraid_instance *pinstance,
439 u32 intrs
440)
441{
442 u32 gmask = ioread32(pinstance->int_regs.global_interrupt_mask_reg);
443 u32 nmask = gmask | GLOBAL_INTERRUPT_MASK;
444
89a36810 445 iowrite32(intrs, pinstance->int_regs.ioa_host_interrupt_clr_reg);
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446 iowrite32(nmask, pinstance->int_regs.global_interrupt_mask_reg);
447 ioread32(pinstance->int_regs.global_interrupt_mask_reg);
448
449 if (!pinstance->interrupt_mode) {
450 iowrite32(intrs,
451 pinstance->int_regs.ioa_host_interrupt_mask_reg);
452 ioread32(pinstance->int_regs.ioa_host_interrupt_mask_reg);
453 }
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454}
455
456/**
457 * pmcraid_enable_interrupts - Enables specified interrupts
458 *
459 * @pinstance: pointer to per adapter instance structure
460 * @intr: interrupts to enable
461 *
462 * Return Value
463 * None
464 */
465static void pmcraid_enable_interrupts(
466 struct pmcraid_instance *pinstance,
467 u32 intrs
468)
469{
470 u32 gmask = ioread32(pinstance->int_regs.global_interrupt_mask_reg);
471 u32 nmask = gmask & (~GLOBAL_INTERRUPT_MASK);
472
473 iowrite32(nmask, pinstance->int_regs.global_interrupt_mask_reg);
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474
475 if (!pinstance->interrupt_mode) {
476 iowrite32(~intrs,
477 pinstance->int_regs.ioa_host_interrupt_mask_reg);
478 ioread32(pinstance->int_regs.ioa_host_interrupt_mask_reg);
479 }
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480
481 pmcraid_info("enabled interrupts global mask = %x intr_mask = %x\n",
482 ioread32(pinstance->int_regs.global_interrupt_mask_reg),
483 ioread32(pinstance->int_regs.ioa_host_interrupt_mask_reg));
484}
485
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486/**
487 * pmcraid_clr_trans_op - clear trans to op interrupt
488 *
489 * @pinstance: pointer to per adapter instance structure
490 *
491 * Return Value
492 * None
493 */
494static void pmcraid_clr_trans_op(
495 struct pmcraid_instance *pinstance
496)
497{
498 unsigned long lock_flags;
499
500 if (!pinstance->interrupt_mode) {
501 iowrite32(INTRS_TRANSITION_TO_OPERATIONAL,
502 pinstance->int_regs.ioa_host_interrupt_mask_reg);
503 ioread32(pinstance->int_regs.ioa_host_interrupt_mask_reg);
504 iowrite32(INTRS_TRANSITION_TO_OPERATIONAL,
505 pinstance->int_regs.ioa_host_interrupt_clr_reg);
506 ioread32(pinstance->int_regs.ioa_host_interrupt_clr_reg);
507 }
508
509 if (pinstance->reset_cmd != NULL) {
510 del_timer(&pinstance->reset_cmd->timer);
511 spin_lock_irqsave(
512 pinstance->host->host_lock, lock_flags);
513 pinstance->reset_cmd->cmd_done(pinstance->reset_cmd);
514 spin_unlock_irqrestore(
515 pinstance->host->host_lock, lock_flags);
516 }
517}
518
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519/**
520 * pmcraid_reset_type - Determine the required reset type
521 * @pinstance: pointer to adapter instance structure
522 *
523 * IOA requires hard reset if any of the following conditions is true.
524 * 1. If HRRQ valid interrupt is not masked
525 * 2. IOA reset alert doorbell is set
526 * 3. If there are any error interrupts
527 */
528static void pmcraid_reset_type(struct pmcraid_instance *pinstance)
529{
530 u32 mask;
531 u32 intrs;
532 u32 alerts;
533
534 mask = ioread32(pinstance->int_regs.ioa_host_interrupt_mask_reg);
535 intrs = ioread32(pinstance->int_regs.ioa_host_interrupt_reg);
536 alerts = ioread32(pinstance->int_regs.host_ioa_interrupt_reg);
537
538 if ((mask & INTRS_HRRQ_VALID) == 0 ||
539 (alerts & DOORBELL_IOA_RESET_ALERT) ||
540 (intrs & PMCRAID_ERROR_INTERRUPTS)) {
541 pmcraid_info("IOA requires hard reset\n");
542 pinstance->ioa_hard_reset = 1;
543 }
544
545 /* If unit check is active, trigger the dump */
546 if (intrs & INTRS_IOA_UNIT_CHECK)
547 pinstance->ioa_unit_check = 1;
548}
549
550/**
551 * pmcraid_bist_done - completion function for PCI BIST
552 * @cmd: pointer to reset command
553 * Return Value
c20c4267 554 * none
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555 */
556
557static void pmcraid_ioa_reset(struct pmcraid_cmd *);
558
559static void pmcraid_bist_done(struct pmcraid_cmd *cmd)
560{
561 struct pmcraid_instance *pinstance = cmd->drv_inst;
562 unsigned long lock_flags;
563 int rc;
564 u16 pci_reg;
565
566 rc = pci_read_config_word(pinstance->pdev, PCI_COMMAND, &pci_reg);
567
568 /* If PCI config space can't be accessed wait for another two secs */
569 if ((rc != PCIBIOS_SUCCESSFUL || (!(pci_reg & PCI_COMMAND_MEMORY))) &&
c20c4267 570 cmd->time_left > 0) {
89a36810 571 pmcraid_info("BIST not complete, waiting another 2 secs\n");
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572 cmd->timer.expires = jiffies + cmd->time_left;
573 cmd->time_left = 0;
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574 cmd->timer.data = (unsigned long)cmd;
575 cmd->timer.function =
576 (void (*)(unsigned long))pmcraid_bist_done;
577 add_timer(&cmd->timer);
578 } else {
c20c4267 579 cmd->time_left = 0;
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580 pmcraid_info("BIST is complete, proceeding with reset\n");
581 spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
582 pmcraid_ioa_reset(cmd);
583 spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
584 }
585}
586
587/**
588 * pmcraid_start_bist - starts BIST
589 * @cmd: pointer to reset cmd
590 * Return Value
591 * none
592 */
593static void pmcraid_start_bist(struct pmcraid_cmd *cmd)
594{
595 struct pmcraid_instance *pinstance = cmd->drv_inst;
596 u32 doorbells, intrs;
597
598 /* proceed with bist and wait for 2 seconds */
599 iowrite32(DOORBELL_IOA_START_BIST,
600 pinstance->int_regs.host_ioa_interrupt_reg);
601 doorbells = ioread32(pinstance->int_regs.host_ioa_interrupt_reg);
602 intrs = ioread32(pinstance->int_regs.ioa_host_interrupt_reg);
c20c4267 603 pmcraid_info("doorbells after start bist: %x intrs: %x\n",
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604 doorbells, intrs);
605
c20c4267 606 cmd->time_left = msecs_to_jiffies(PMCRAID_BIST_TIMEOUT);
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607 cmd->timer.data = (unsigned long)cmd;
608 cmd->timer.expires = jiffies + msecs_to_jiffies(PMCRAID_BIST_TIMEOUT);
609 cmd->timer.function = (void (*)(unsigned long))pmcraid_bist_done;
610 add_timer(&cmd->timer);
611}
612
613/**
614 * pmcraid_reset_alert_done - completion routine for reset_alert
615 * @cmd: pointer to command block used in reset sequence
616 * Return value
617 * None
618 */
619static void pmcraid_reset_alert_done(struct pmcraid_cmd *cmd)
620{
621 struct pmcraid_instance *pinstance = cmd->drv_inst;
622 u32 status = ioread32(pinstance->ioa_status);
623 unsigned long lock_flags;
624
625 /* if the critical operation in progress bit is set or the wait times
626 * out, invoke reset engine to proceed with hard reset. If there is
627 * some more time to wait, restart the timer
628 */
629 if (((status & INTRS_CRITICAL_OP_IN_PROGRESS) == 0) ||
c20c4267 630 cmd->time_left <= 0) {
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631 pmcraid_info("critical op is reset proceeding with reset\n");
632 spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
633 pmcraid_ioa_reset(cmd);
634 spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
635 } else {
636 pmcraid_info("critical op is not yet reset waiting again\n");
637 /* restart timer if some more time is available to wait */
c20c4267 638 cmd->time_left -= PMCRAID_CHECK_FOR_RESET_TIMEOUT;
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639 cmd->timer.data = (unsigned long)cmd;
640 cmd->timer.expires = jiffies + PMCRAID_CHECK_FOR_RESET_TIMEOUT;
641 cmd->timer.function =
642 (void (*)(unsigned long))pmcraid_reset_alert_done;
643 add_timer(&cmd->timer);
644 }
645}
646
647/**
648 * pmcraid_reset_alert - alerts IOA for a possible reset
649 * @cmd : command block to be used for reset sequence.
650 *
651 * Return Value
652 * returns 0 if pci config-space is accessible and RESET_DOORBELL is
653 * successfully written to IOA. Returns non-zero in case pci_config_space
654 * is not accessible
655 */
c20c4267 656static void pmcraid_notify_ioastate(struct pmcraid_instance *, u32);
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657static void pmcraid_reset_alert(struct pmcraid_cmd *cmd)
658{
659 struct pmcraid_instance *pinstance = cmd->drv_inst;
660 u32 doorbells;
661 int rc;
662 u16 pci_reg;
663
664 /* If we are able to access IOA PCI config space, alert IOA that we are
665 * going to reset it soon. This enables IOA to preserv persistent error
666 * data if any. In case memory space is not accessible, proceed with
667 * BIST or slot_reset
668 */
669 rc = pci_read_config_word(pinstance->pdev, PCI_COMMAND, &pci_reg);
670 if ((rc == PCIBIOS_SUCCESSFUL) && (pci_reg & PCI_COMMAND_MEMORY)) {
671
672 /* wait for IOA permission i.e until CRITICAL_OPERATION bit is
673 * reset IOA doesn't generate any interrupts when CRITICAL
674 * OPERATION bit is reset. A timer is started to wait for this
675 * bit to be reset.
676 */
c20c4267 677 cmd->time_left = PMCRAID_RESET_TIMEOUT;
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678 cmd->timer.data = (unsigned long)cmd;
679 cmd->timer.expires = jiffies + PMCRAID_CHECK_FOR_RESET_TIMEOUT;
680 cmd->timer.function =
681 (void (*)(unsigned long))pmcraid_reset_alert_done;
682 add_timer(&cmd->timer);
683
684 iowrite32(DOORBELL_IOA_RESET_ALERT,
685 pinstance->int_regs.host_ioa_interrupt_reg);
686 doorbells =
687 ioread32(pinstance->int_regs.host_ioa_interrupt_reg);
688 pmcraid_info("doorbells after reset alert: %x\n", doorbells);
689 } else {
690 pmcraid_info("PCI config is not accessible starting BIST\n");
691 pinstance->ioa_state = IOA_STATE_IN_HARD_RESET;
692 pmcraid_start_bist(cmd);
693 }
694}
695
696/**
697 * pmcraid_timeout_handler - Timeout handler for internally generated ops
698 *
699 * @cmd : pointer to command structure, that got timedout
700 *
701 * This function blocks host requests and initiates an adapter reset.
702 *
703 * Return value:
704 * None
705 */
706static void pmcraid_timeout_handler(struct pmcraid_cmd *cmd)
707{
708 struct pmcraid_instance *pinstance = cmd->drv_inst;
709 unsigned long lock_flags;
710
34876402 711 dev_info(&pinstance->pdev->dev,
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712 "Adapter being reset due to cmd(CDB[0] = %x) timeout\n",
713 cmd->ioa_cb->ioarcb.cdb[0]);
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714
715 /* Command timeouts result in hard reset sequence. The command that got
716 * timed out may be the one used as part of reset sequence. In this
717 * case restart reset sequence using the same command block even if
718 * reset is in progress. Otherwise fail this command and get a free
719 * command block to restart the reset sequence.
720 */
721 spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
722 if (!pinstance->ioa_reset_in_progress) {
723 pinstance->ioa_reset_attempts = 0;
724 cmd = pmcraid_get_free_cmd(pinstance);
725
726 /* If we are out of command blocks, just return here itself.
727 * Some other command's timeout handler can do the reset job
728 */
729 if (cmd == NULL) {
730 spin_unlock_irqrestore(pinstance->host->host_lock,
731 lock_flags);
732 pmcraid_err("no free cmnd block for timeout handler\n");
733 return;
734 }
735
736 pinstance->reset_cmd = cmd;
737 pinstance->ioa_reset_in_progress = 1;
738 } else {
739 pmcraid_info("reset is already in progress\n");
740
741 if (pinstance->reset_cmd != cmd) {
742 /* This command should have been given to IOA, this
743 * command will be completed by fail_outstanding_cmds
744 * anyway
745 */
746 pmcraid_err("cmd is pending but reset in progress\n");
747 }
748
749 /* If this command was being used as part of the reset
750 * sequence, set cmd_done pointer to pmcraid_ioa_reset. This
751 * causes fail_outstanding_commands not to return the command
752 * block back to free pool
753 */
754 if (cmd == pinstance->reset_cmd)
755 cmd->cmd_done = pmcraid_ioa_reset;
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756 }
757
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758 /* Notify apps of important IOA bringup/bringdown sequences */
759 if (pinstance->scn.ioa_state != PMC_DEVICE_EVENT_RESET_START &&
760 pinstance->scn.ioa_state != PMC_DEVICE_EVENT_SHUTDOWN_START)
761 pmcraid_notify_ioastate(pinstance,
762 PMC_DEVICE_EVENT_RESET_START);
763
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764 pinstance->ioa_state = IOA_STATE_IN_RESET_ALERT;
765 scsi_block_requests(pinstance->host);
766 pmcraid_reset_alert(cmd);
767 spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
768}
769
770/**
771 * pmcraid_internal_done - completion routine for internally generated cmds
772 *
773 * @cmd: command that got response from IOA
774 *
775 * Return Value:
776 * none
777 */
778static void pmcraid_internal_done(struct pmcraid_cmd *cmd)
779{
780 pmcraid_info("response internal cmd CDB[0] = %x ioasc = %x\n",
781 cmd->ioa_cb->ioarcb.cdb[0],
782 le32_to_cpu(cmd->ioa_cb->ioasa.ioasc));
783
784 /* Some of the internal commands are sent with callers blocking for the
785 * response. Same will be indicated as part of cmd->completion_req
786 * field. Response path needs to wake up any waiters waiting for cmd
787 * completion if this flag is set.
788 */
789 if (cmd->completion_req) {
790 cmd->completion_req = 0;
791 complete(&cmd->wait_for_completion);
792 }
793
794 /* most of the internal commands are completed by caller itself, so
795 * no need to return the command block back to free pool until we are
796 * required to do so (e.g once done with initialization).
797 */
798 if (cmd->release) {
799 cmd->release = 0;
800 pmcraid_return_cmd(cmd);
801 }
802}
803
804/**
805 * pmcraid_reinit_cfgtable_done - done function for cfg table reinitialization
806 *
807 * @cmd: command that got response from IOA
808 *
809 * This routine is called after driver re-reads configuration table due to a
810 * lost CCN. It returns the command block back to free pool and schedules
811 * worker thread to add/delete devices into the system.
812 *
813 * Return Value:
814 * none
815 */
816static void pmcraid_reinit_cfgtable_done(struct pmcraid_cmd *cmd)
817{
818 pmcraid_info("response internal cmd CDB[0] = %x ioasc = %x\n",
819 cmd->ioa_cb->ioarcb.cdb[0],
820 le32_to_cpu(cmd->ioa_cb->ioasa.ioasc));
821
822 if (cmd->release) {
823 cmd->release = 0;
824 pmcraid_return_cmd(cmd);
825 }
826 pmcraid_info("scheduling worker for config table reinitialization\n");
827 schedule_work(&cmd->drv_inst->worker_q);
828}
829
830/**
831 * pmcraid_erp_done - Process completion of SCSI error response from device
832 * @cmd: pmcraid_command
833 *
834 * This function copies the sense buffer into the scsi_cmd struct and completes
835 * scsi_cmd by calling scsi_done function.
836 *
837 * Return value:
838 * none
839 */
840static void pmcraid_erp_done(struct pmcraid_cmd *cmd)
841{
842 struct scsi_cmnd *scsi_cmd = cmd->scsi_cmd;
843 struct pmcraid_instance *pinstance = cmd->drv_inst;
844 u32 ioasc = le32_to_cpu(cmd->ioa_cb->ioasa.ioasc);
845
846 if (PMCRAID_IOASC_SENSE_KEY(ioasc) > 0) {
847 scsi_cmd->result |= (DID_ERROR << 16);
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848 scmd_printk(KERN_INFO, scsi_cmd,
849 "command CDB[0] = %x failed with IOASC: 0x%08X\n",
850 cmd->ioa_cb->ioarcb.cdb[0], ioasc);
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851 }
852
853 /* if we had allocated sense buffers for request sense, copy the sense
854 * release the buffers
855 */
856 if (cmd->sense_buffer != NULL) {
857 memcpy(scsi_cmd->sense_buffer,
858 cmd->sense_buffer,
859 SCSI_SENSE_BUFFERSIZE);
860 pci_free_consistent(pinstance->pdev,
861 SCSI_SENSE_BUFFERSIZE,
862 cmd->sense_buffer, cmd->sense_buffer_dma);
863 cmd->sense_buffer = NULL;
864 cmd->sense_buffer_dma = 0;
865 }
866
867 scsi_dma_unmap(scsi_cmd);
868 pmcraid_return_cmd(cmd);
869 scsi_cmd->scsi_done(scsi_cmd);
870}
871
872/**
873 * pmcraid_fire_command - sends an IOA command to adapter
874 *
875 * This function adds the given block into pending command list
876 * and returns without waiting
877 *
878 * @cmd : command to be sent to the device
879 *
880 * Return Value
881 * None
882 */
883static void _pmcraid_fire_command(struct pmcraid_cmd *cmd)
884{
885 struct pmcraid_instance *pinstance = cmd->drv_inst;
886 unsigned long lock_flags;
887
888 /* Add this command block to pending cmd pool. We do this prior to
889 * writting IOARCB to ioarrin because IOA might complete the command
890 * by the time we are about to add it to the list. Response handler
c20c4267 891 * (isr/tasklet) looks for cmd block in the pending pending list.
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892 */
893 spin_lock_irqsave(&pinstance->pending_pool_lock, lock_flags);
894 list_add_tail(&cmd->free_list, &pinstance->pending_cmd_pool);
895 spin_unlock_irqrestore(&pinstance->pending_pool_lock, lock_flags);
896 atomic_inc(&pinstance->outstanding_cmds);
897
898 /* driver writes lower 32-bit value of IOARCB address only */
899 mb();
900 iowrite32(le32_to_cpu(cmd->ioa_cb->ioarcb.ioarcb_bus_addr),
901 pinstance->ioarrin);
902}
903
904/**
905 * pmcraid_send_cmd - fires a command to IOA
906 *
907 * This function also sets up timeout function, and command completion
908 * function
909 *
910 * @cmd: pointer to the command block to be fired to IOA
911 * @cmd_done: command completion function, called once IOA responds
912 * @timeout: timeout to wait for this command completion
913 * @timeout_func: timeout handler
914 *
915 * Return value
916 * none
917 */
918static void pmcraid_send_cmd(
919 struct pmcraid_cmd *cmd,
920 void (*cmd_done) (struct pmcraid_cmd *),
921 unsigned long timeout,
922 void (*timeout_func) (struct pmcraid_cmd *)
923)
924{
925 /* initialize done function */
926 cmd->cmd_done = cmd_done;
927
928 if (timeout_func) {
929 /* setup timeout handler */
930 cmd->timer.data = (unsigned long)cmd;
931 cmd->timer.expires = jiffies + timeout;
932 cmd->timer.function = (void (*)(unsigned long))timeout_func;
933 add_timer(&cmd->timer);
934 }
935
936 /* fire the command to IOA */
937 _pmcraid_fire_command(cmd);
938}
939
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940/**
941 * pmcraid_ioa_shutdown_done - completion function for IOA shutdown command
942 * @cmd: pointer to the command block used for sending IOA shutdown command
943 *
944 * Return value
945 * None
946 */
947static void pmcraid_ioa_shutdown_done(struct pmcraid_cmd *cmd)
948{
949 struct pmcraid_instance *pinstance = cmd->drv_inst;
950 unsigned long lock_flags;
951
952 spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
953 pmcraid_ioa_reset(cmd);
954 spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
955}
956
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957/**
958 * pmcraid_ioa_shutdown - sends SHUTDOWN command to ioa
959 *
960 * @cmd: pointer to the command block used as part of reset sequence
961 *
962 * Return Value
963 * None
964 */
965static void pmcraid_ioa_shutdown(struct pmcraid_cmd *cmd)
966{
967 pmcraid_info("response for Cancel CCN CDB[0] = %x ioasc = %x\n",
968 cmd->ioa_cb->ioarcb.cdb[0],
969 le32_to_cpu(cmd->ioa_cb->ioasa.ioasc));
970
971 /* Note that commands sent during reset require next command to be sent
972 * to IOA. Hence reinit the done function as well as timeout function
973 */
974 pmcraid_reinit_cmdblk(cmd);
975 cmd->ioa_cb->ioarcb.request_type = REQ_TYPE_IOACMD;
976 cmd->ioa_cb->ioarcb.resource_handle =
977 cpu_to_le32(PMCRAID_IOA_RES_HANDLE);
978 cmd->ioa_cb->ioarcb.cdb[0] = PMCRAID_IOA_SHUTDOWN;
979 cmd->ioa_cb->ioarcb.cdb[1] = PMCRAID_SHUTDOWN_NORMAL;
980
981 /* fire shutdown command to hardware. */
982 pmcraid_info("firing normal shutdown command (%d) to IOA\n",
983 le32_to_cpu(cmd->ioa_cb->ioarcb.response_handle));
984
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985 pmcraid_notify_ioastate(cmd->drv_inst, PMC_DEVICE_EVENT_SHUTDOWN_START);
986
987 pmcraid_send_cmd(cmd, pmcraid_ioa_shutdown_done,
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988 PMCRAID_SHUTDOWN_TIMEOUT,
989 pmcraid_timeout_handler);
990}
991
992/**
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993 * pmcraid_get_fwversion_done - completion function for get_fwversion
994 *
995 * @cmd: pointer to command block used to send INQUIRY command
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996 *
997 * Return Value
c20c4267 998 * none
89a36810 999 */
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1000static void pmcraid_querycfg(struct pmcraid_cmd *);
1001
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1002static void pmcraid_get_fwversion_done(struct pmcraid_cmd *cmd)
1003{
1004 struct pmcraid_instance *pinstance = cmd->drv_inst;
1005 u32 ioasc = le32_to_cpu(cmd->ioa_cb->ioasa.ioasc);
1006 unsigned long lock_flags;
1007
1008 /* configuration table entry size depends on firmware version. If fw
1009 * version is not known, it is not possible to interpret IOA config
1010 * table
1011 */
1012 if (ioasc) {
1013 pmcraid_err("IOA Inquiry failed with %x\n", ioasc);
1014 spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
1015 pinstance->ioa_state = IOA_STATE_IN_RESET_ALERT;
1016 pmcraid_reset_alert(cmd);
1017 spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
1018 } else {
1019 pmcraid_querycfg(cmd);
1020 }
1021}
1022
1023/**
1024 * pmcraid_get_fwversion - reads firmware version information
1025 *
1026 * @cmd: pointer to command block used to send INQUIRY command
1027 *
1028 * Return Value
1029 * none
1030 */
1031static void pmcraid_get_fwversion(struct pmcraid_cmd *cmd)
1032{
1033 struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb;
1034 struct pmcraid_ioadl_desc *ioadl = ioarcb->add_data.u.ioadl;
1035 struct pmcraid_instance *pinstance = cmd->drv_inst;
1036 u16 data_size = sizeof(struct pmcraid_inquiry_data);
1037
1038 pmcraid_reinit_cmdblk(cmd);
1039 ioarcb->request_type = REQ_TYPE_SCSI;
1040 ioarcb->resource_handle = cpu_to_le32(PMCRAID_IOA_RES_HANDLE);
1041 ioarcb->cdb[0] = INQUIRY;
1042 ioarcb->cdb[1] = 1;
1043 ioarcb->cdb[2] = 0xD0;
1044 ioarcb->cdb[3] = (data_size >> 8) & 0xFF;
1045 ioarcb->cdb[4] = data_size & 0xFF;
1046
1047 /* Since entire inquiry data it can be part of IOARCB itself
1048 */
1049 ioarcb->ioadl_bus_addr = cpu_to_le64((cmd->ioa_cb_bus_addr) +
1050 offsetof(struct pmcraid_ioarcb,
1051 add_data.u.ioadl[0]));
1052 ioarcb->ioadl_length = cpu_to_le32(sizeof(struct pmcraid_ioadl_desc));
1053 ioarcb->ioarcb_bus_addr &= ~(0x1FULL);
1054
1055 ioarcb->request_flags0 |= NO_LINK_DESCS;
1056 ioarcb->data_transfer_length = cpu_to_le32(data_size);
1057 ioadl = &(ioarcb->add_data.u.ioadl[0]);
1058 ioadl->flags = IOADL_FLAGS_LAST_DESC;
1059 ioadl->address = cpu_to_le64(pinstance->inq_data_baddr);
1060 ioadl->data_len = cpu_to_le32(data_size);
1061
1062 pmcraid_send_cmd(cmd, pmcraid_get_fwversion_done,
1063 PMCRAID_INTERNAL_TIMEOUT, pmcraid_timeout_handler);
1064}
1065
1066/**
1067 * pmcraid_identify_hrrq - registers host rrq buffers with IOA
1068 * @cmd: pointer to command block to be used for identify hrrq
1069 *
1070 * Return Value
1071 * none
1072 */
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1073static void pmcraid_identify_hrrq(struct pmcraid_cmd *cmd)
1074{
1075 struct pmcraid_instance *pinstance = cmd->drv_inst;
1076 struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb;
c20c4267 1077 int index = cmd->hrrq_index;
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1078 __be64 hrrq_addr = cpu_to_be64(pinstance->hrrq_start_bus_addr[index]);
1079 u32 hrrq_size = cpu_to_be32(sizeof(u32) * PMCRAID_MAX_CMD);
c20c4267 1080 void (*done_function)(struct pmcraid_cmd *);
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1081
1082 pmcraid_reinit_cmdblk(cmd);
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1083 cmd->hrrq_index = index + 1;
1084
1085 if (cmd->hrrq_index < pinstance->num_hrrq) {
1086 done_function = pmcraid_identify_hrrq;
1087 } else {
1088 cmd->hrrq_index = 0;
1089 done_function = pmcraid_get_fwversion;
1090 }
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1091
1092 /* Initialize ioarcb */
1093 ioarcb->request_type = REQ_TYPE_IOACMD;
1094 ioarcb->resource_handle = cpu_to_le32(PMCRAID_IOA_RES_HANDLE);
1095
1096 /* initialize the hrrq number where IOA will respond to this command */
1097 ioarcb->hrrq_id = index;
1098 ioarcb->cdb[0] = PMCRAID_IDENTIFY_HRRQ;
1099 ioarcb->cdb[1] = index;
1100
1101 /* IOA expects 64-bit pci address to be written in B.E format
1102 * (i.e cdb[2]=MSByte..cdb[9]=LSB.
1103 */
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1104 pmcraid_info("HRRQ_IDENTIFY with hrrq:ioarcb:index => %llx:%llx:%x\n",
1105 hrrq_addr, ioarcb->ioarcb_bus_addr, index);
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1106
1107 memcpy(&(ioarcb->cdb[2]), &hrrq_addr, sizeof(hrrq_addr));
1108 memcpy(&(ioarcb->cdb[10]), &hrrq_size, sizeof(hrrq_size));
1109
1110 /* Subsequent commands require HRRQ identification to be successful.
1111 * Note that this gets called even during reset from SCSI mid-layer
1112 * or tasklet
1113 */
c20c4267 1114 pmcraid_send_cmd(cmd, done_function,
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1115 PMCRAID_INTERNAL_TIMEOUT,
1116 pmcraid_timeout_handler);
1117}
1118
1119static void pmcraid_process_ccn(struct pmcraid_cmd *cmd);
1120static void pmcraid_process_ldn(struct pmcraid_cmd *cmd);
1121
1122/**
1123 * pmcraid_send_hcam_cmd - send an initialized command block(HCAM) to IOA
1124 *
1125 * @cmd: initialized command block pointer
1126 *
1127 * Return Value
1128 * none
1129 */
1130static void pmcraid_send_hcam_cmd(struct pmcraid_cmd *cmd)
1131{
1132 if (cmd->ioa_cb->ioarcb.cdb[1] == PMCRAID_HCAM_CODE_CONFIG_CHANGE)
1133 atomic_set(&(cmd->drv_inst->ccn.ignore), 0);
1134 else
1135 atomic_set(&(cmd->drv_inst->ldn.ignore), 0);
1136
1137 pmcraid_send_cmd(cmd, cmd->cmd_done, 0, NULL);
1138}
1139
1140/**
1141 * pmcraid_init_hcam - send an initialized command block(HCAM) to IOA
1142 *
1143 * @pinstance: pointer to adapter instance structure
1144 * @type: HCAM type
1145 *
1146 * Return Value
1147 * pointer to initialized pmcraid_cmd structure or NULL
1148 */
1149static struct pmcraid_cmd *pmcraid_init_hcam
1150(
1151 struct pmcraid_instance *pinstance,
1152 u8 type
1153)
1154{
1155 struct pmcraid_cmd *cmd;
1156 struct pmcraid_ioarcb *ioarcb;
1157 struct pmcraid_ioadl_desc *ioadl;
1158 struct pmcraid_hostrcb *hcam;
1159 void (*cmd_done) (struct pmcraid_cmd *);
1160 dma_addr_t dma;
1161 int rcb_size;
1162
1163 cmd = pmcraid_get_free_cmd(pinstance);
1164
1165 if (!cmd) {
1166 pmcraid_err("no free command blocks for hcam\n");
1167 return cmd;
1168 }
1169
1170 if (type == PMCRAID_HCAM_CODE_CONFIG_CHANGE) {
c20c4267 1171 rcb_size = sizeof(struct pmcraid_hcam_ccn_ext);
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1172 cmd_done = pmcraid_process_ccn;
1173 dma = pinstance->ccn.baddr + PMCRAID_AEN_HDR_SIZE;
1174 hcam = &pinstance->ccn;
1175 } else {
1176 rcb_size = sizeof(struct pmcraid_hcam_ldn);
1177 cmd_done = pmcraid_process_ldn;
1178 dma = pinstance->ldn.baddr + PMCRAID_AEN_HDR_SIZE;
1179 hcam = &pinstance->ldn;
1180 }
1181
1182 /* initialize command pointer used for HCAM registration */
1183 hcam->cmd = cmd;
1184
1185 ioarcb = &cmd->ioa_cb->ioarcb;
1186 ioarcb->ioadl_bus_addr = cpu_to_le64((cmd->ioa_cb_bus_addr) +
1187 offsetof(struct pmcraid_ioarcb,
1188 add_data.u.ioadl[0]));
1189 ioarcb->ioadl_length = cpu_to_le32(sizeof(struct pmcraid_ioadl_desc));
1190 ioadl = ioarcb->add_data.u.ioadl;
1191
1192 /* Initialize ioarcb */
1193 ioarcb->request_type = REQ_TYPE_HCAM;
1194 ioarcb->resource_handle = cpu_to_le32(PMCRAID_IOA_RES_HANDLE);
1195 ioarcb->cdb[0] = PMCRAID_HOST_CONTROLLED_ASYNC;
1196 ioarcb->cdb[1] = type;
1197 ioarcb->cdb[7] = (rcb_size >> 8) & 0xFF;
1198 ioarcb->cdb[8] = (rcb_size) & 0xFF;
1199
1200 ioarcb->data_transfer_length = cpu_to_le32(rcb_size);
1201
88197966 1202 ioadl[0].flags |= IOADL_FLAGS_READ_LAST;
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1203 ioadl[0].data_len = cpu_to_le32(rcb_size);
1204 ioadl[0].address = cpu_to_le32(dma);
1205
1206 cmd->cmd_done = cmd_done;
1207 return cmd;
1208}
1209
1210/**
1211 * pmcraid_send_hcam - Send an HCAM to IOA
1212 * @pinstance: ioa config struct
1213 * @type: HCAM type
1214 *
1215 * This function will send a Host Controlled Async command to IOA.
1216 *
1217 * Return value:
c20c4267 1218 * none
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AR
1219 */
1220static void pmcraid_send_hcam(struct pmcraid_instance *pinstance, u8 type)
1221{
1222 struct pmcraid_cmd *cmd = pmcraid_init_hcam(pinstance, type);
1223 pmcraid_send_hcam_cmd(cmd);
1224}
1225
1226
1227/**
1228 * pmcraid_prepare_cancel_cmd - prepares a command block to abort another
1229 *
1230 * @cmd: pointer to cmd that is used as cancelling command
1231 * @cmd_to_cancel: pointer to the command that needs to be cancelled
1232 */
1233static void pmcraid_prepare_cancel_cmd(
1234 struct pmcraid_cmd *cmd,
1235 struct pmcraid_cmd *cmd_to_cancel
1236)
1237{
1238 struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb;
1239 __be64 ioarcb_addr = cmd_to_cancel->ioa_cb->ioarcb.ioarcb_bus_addr;
1240
1241 /* Get the resource handle to where the command to be aborted has been
1242 * sent.
1243 */
1244 ioarcb->resource_handle = cmd_to_cancel->ioa_cb->ioarcb.resource_handle;
1245 ioarcb->request_type = REQ_TYPE_IOACMD;
1246 memset(ioarcb->cdb, 0, PMCRAID_MAX_CDB_LEN);
1247 ioarcb->cdb[0] = PMCRAID_ABORT_CMD;
1248
1249 /* IOARCB address of the command to be cancelled is given in
1250 * cdb[2]..cdb[9] is Big-Endian format. Note that length bits in
1251 * IOARCB address are not masked.
1252 */
1253 ioarcb_addr = cpu_to_be64(ioarcb_addr);
1254 memcpy(&(ioarcb->cdb[2]), &ioarcb_addr, sizeof(ioarcb_addr));
1255}
1256
1257/**
1258 * pmcraid_cancel_hcam - sends ABORT task to abort a given HCAM
1259 *
1260 * @cmd: command to be used as cancelling command
1261 * @type: HCAM type
1262 * @cmd_done: op done function for the cancelling command
1263 */
1264static void pmcraid_cancel_hcam(
1265 struct pmcraid_cmd *cmd,
1266 u8 type,
1267 void (*cmd_done) (struct pmcraid_cmd *)
1268)
1269{
1270 struct pmcraid_instance *pinstance;
1271 struct pmcraid_hostrcb *hcam;
1272
1273 pinstance = cmd->drv_inst;
1274 hcam = (type == PMCRAID_HCAM_CODE_LOG_DATA) ?
1275 &pinstance->ldn : &pinstance->ccn;
1276
1277 /* prepare for cancelling previous hcam command. If the HCAM is
1278 * currently not pending with IOA, we would have hcam->cmd as non-null
1279 */
1280 if (hcam->cmd == NULL)
1281 return;
1282
1283 pmcraid_prepare_cancel_cmd(cmd, hcam->cmd);
1284
1285 /* writing to IOARRIN must be protected by host_lock, as mid-layer
1286 * schedule queuecommand while we are doing this
1287 */
1288 pmcraid_send_cmd(cmd, cmd_done,
1289 PMCRAID_INTERNAL_TIMEOUT,
1290 pmcraid_timeout_handler);
1291}
1292
1293/**
1294 * pmcraid_cancel_ccn - cancel CCN HCAM already registered with IOA
1295 *
1296 * @cmd: command block to be used for cancelling the HCAM
1297 */
1298static void pmcraid_cancel_ccn(struct pmcraid_cmd *cmd)
1299{
1300 pmcraid_info("response for Cancel LDN CDB[0] = %x ioasc = %x\n",
1301 cmd->ioa_cb->ioarcb.cdb[0],
1302 le32_to_cpu(cmd->ioa_cb->ioasa.ioasc));
1303
1304 pmcraid_reinit_cmdblk(cmd);
1305
1306 pmcraid_cancel_hcam(cmd,
1307 PMCRAID_HCAM_CODE_CONFIG_CHANGE,
1308 pmcraid_ioa_shutdown);
1309}
1310
1311/**
1312 * pmcraid_cancel_ldn - cancel LDN HCAM already registered with IOA
1313 *
1314 * @cmd: command block to be used for cancelling the HCAM
1315 */
1316static void pmcraid_cancel_ldn(struct pmcraid_cmd *cmd)
1317{
1318 pmcraid_cancel_hcam(cmd,
1319 PMCRAID_HCAM_CODE_LOG_DATA,
1320 pmcraid_cancel_ccn);
1321}
1322
1323/**
1324 * pmcraid_expose_resource - check if the resource can be exposed to OS
1325 *
c20c4267 1326 * @fw_version: firmware version code
89a36810
AR
1327 * @cfgte: pointer to configuration table entry of the resource
1328 *
1329 * Return value:
c20c4267 1330 * true if resource can be added to midlayer, false(0) otherwise
89a36810 1331 */
c20c4267
AR
1332static int pmcraid_expose_resource(u16 fw_version,
1333 struct pmcraid_config_table_entry *cfgte)
89a36810
AR
1334{
1335 int retval = 0;
1336
c20c4267
AR
1337 if (cfgte->resource_type == RES_TYPE_VSET) {
1338 if (fw_version <= PMCRAID_FW_VERSION_1)
1339 retval = ((cfgte->unique_flags1 & 0x80) == 0);
1340 else
1341 retval = ((cfgte->unique_flags0 & 0x80) == 0 &&
1342 (cfgte->unique_flags1 & 0x80) == 0);
1343
1344 } else if (cfgte->resource_type == RES_TYPE_GSCSI)
89a36810
AR
1345 retval = (RES_BUS(cfgte->resource_address) !=
1346 PMCRAID_VIRTUAL_ENCL_BUS_ID);
1347 return retval;
1348}
1349
1350/* attributes supported by pmcraid_event_family */
1351enum {
1352 PMCRAID_AEN_ATTR_UNSPEC,
1353 PMCRAID_AEN_ATTR_EVENT,
1354 __PMCRAID_AEN_ATTR_MAX,
1355};
1356#define PMCRAID_AEN_ATTR_MAX (__PMCRAID_AEN_ATTR_MAX - 1)
1357
1358/* commands supported by pmcraid_event_family */
1359enum {
1360 PMCRAID_AEN_CMD_UNSPEC,
1361 PMCRAID_AEN_CMD_EVENT,
1362 __PMCRAID_AEN_CMD_MAX,
1363};
1364#define PMCRAID_AEN_CMD_MAX (__PMCRAID_AEN_CMD_MAX - 1)
1365
5e53e689
JB
1366static struct genl_multicast_group pmcraid_mcgrps[] = {
1367 { .name = "events", /* not really used - see ID discussion below */ },
1368};
1369
89a36810 1370static struct genl_family pmcraid_event_family = {
5e53e689
JB
1371 /*
1372 * Due to prior multicast group abuse (the code having assumed that
1373 * the family ID can be used as a multicast group ID) we need to
1374 * statically allocate a family (and thus group) ID.
1375 */
1376 .id = GENL_ID_PMCRAID,
89a36810
AR
1377 .name = "pmcraid",
1378 .version = 1,
5e53e689
JB
1379 .maxattr = PMCRAID_AEN_ATTR_MAX,
1380 .mcgrps = pmcraid_mcgrps,
1381 .n_mcgrps = ARRAY_SIZE(pmcraid_mcgrps),
89a36810
AR
1382};
1383
1384/**
1385 * pmcraid_netlink_init - registers pmcraid_event_family
1386 *
1387 * Return value:
c20c4267
AR
1388 * 0 if the pmcraid_event_family is successfully registered
1389 * with netlink generic, non-zero otherwise
89a36810
AR
1390 */
1391static int pmcraid_netlink_init(void)
1392{
1393 int result;
1394
1395 result = genl_register_family(&pmcraid_event_family);
1396
1397 if (result)
1398 return result;
1399
1400 pmcraid_info("registered NETLINK GENERIC group: %d\n",
1401 pmcraid_event_family.id);
1402
1403 return result;
1404}
1405
1406/**
1407 * pmcraid_netlink_release - unregisters pmcraid_event_family
1408 *
1409 * Return value:
c20c4267 1410 * none
89a36810
AR
1411 */
1412static void pmcraid_netlink_release(void)
1413{
1414 genl_unregister_family(&pmcraid_event_family);
1415}
1416
1417/**
1418 * pmcraid_notify_aen - sends event msg to user space application
1419 * @pinstance: pointer to adapter instance structure
1420 * @type: HCAM type
1421 *
1422 * Return value:
1423 * 0 if success, error value in case of any failure.
1424 */
c20c4267
AR
1425static int pmcraid_notify_aen(
1426 struct pmcraid_instance *pinstance,
1427 struct pmcraid_aen_msg *aen_msg,
1428 u32 data_size
1429)
89a36810
AR
1430{
1431 struct sk_buff *skb;
89a36810 1432 void *msg_header;
c20c4267 1433 u32 total_size, nla_genl_hdr_total_size;
89a36810
AR
1434 int result;
1435
89a36810
AR
1436 aen_msg->hostno = (pinstance->host->unique_id << 16 |
1437 MINOR(pinstance->cdev.dev));
1438 aen_msg->length = data_size;
c20c4267 1439
89a36810
AR
1440 data_size += sizeof(*aen_msg);
1441
1442 total_size = nla_total_size(data_size);
c20c4267
AR
1443 /* Add GENL_HDR to total_size */
1444 nla_genl_hdr_total_size =
1445 (total_size + (GENL_HDRLEN +
1446 ((struct genl_family *)&pmcraid_event_family)->hdrsize)
1447 + NLMSG_HDRLEN);
1448 skb = genlmsg_new(nla_genl_hdr_total_size, GFP_ATOMIC);
89a36810
AR
1449
1450
1451 if (!skb) {
1452 pmcraid_err("Failed to allocate aen data SKB of size: %x\n",
1453 total_size);
1454 return -ENOMEM;
1455 }
1456
1457 /* add the genetlink message header */
1458 msg_header = genlmsg_put(skb, 0, 0,
1459 &pmcraid_event_family, 0,
1460 PMCRAID_AEN_CMD_EVENT);
1461 if (!msg_header) {
1462 pmcraid_err("failed to copy command details\n");
1463 nlmsg_free(skb);
1464 return -ENOMEM;
1465 }
1466
1467 result = nla_put(skb, PMCRAID_AEN_ATTR_EVENT, data_size, aen_msg);
1468
1469 if (result) {
c20c4267 1470 pmcraid_err("failed to copy AEN attribute data\n");
89a36810
AR
1471 nlmsg_free(skb);
1472 return -EINVAL;
1473 }
1474
1475 /* send genetlink multicast message to notify appplications */
053c095a 1476 genlmsg_end(skb, msg_header);
89a36810 1477
5e53e689
JB
1478 result = genlmsg_multicast(&pmcraid_event_family, skb,
1479 0, 0, GFP_ATOMIC);
89a36810
AR
1480
1481 /* If there are no listeners, genlmsg_multicast may return non-zero
1482 * value.
1483 */
1484 if (result)
c20c4267 1485 pmcraid_info("error (%x) sending aen event message\n", result);
89a36810
AR
1486 return result;
1487}
1488
c20c4267
AR
1489/**
1490 * pmcraid_notify_ccn - notifies about CCN event msg to user space
1491 * @pinstance: pointer adapter instance structure
1492 *
1493 * Return value:
1494 * 0 if success, error value in case of any failure
1495 */
1496static int pmcraid_notify_ccn(struct pmcraid_instance *pinstance)
1497{
1498 return pmcraid_notify_aen(pinstance,
1499 pinstance->ccn.msg,
1500 pinstance->ccn.hcam->data_len +
1501 sizeof(struct pmcraid_hcam_hdr));
1502}
1503
1504/**
1505 * pmcraid_notify_ldn - notifies about CCN event msg to user space
1506 * @pinstance: pointer adapter instance structure
1507 *
1508 * Return value:
1509 * 0 if success, error value in case of any failure
1510 */
1511static int pmcraid_notify_ldn(struct pmcraid_instance *pinstance)
1512{
1513 return pmcraid_notify_aen(pinstance,
1514 pinstance->ldn.msg,
1515 pinstance->ldn.hcam->data_len +
1516 sizeof(struct pmcraid_hcam_hdr));
1517}
1518
1519/**
1520 * pmcraid_notify_ioastate - sends IOA state event msg to user space
1521 * @pinstance: pointer adapter instance structure
1522 * @evt: controller state event to be sent
1523 *
1524 * Return value:
1525 * 0 if success, error value in case of any failure
1526 */
1527static void pmcraid_notify_ioastate(struct pmcraid_instance *pinstance, u32 evt)
1528{
1529 pinstance->scn.ioa_state = evt;
1530 pmcraid_notify_aen(pinstance,
1531 &pinstance->scn.msg,
1532 sizeof(u32));
1533}
1534
89a36810
AR
1535/**
1536 * pmcraid_handle_config_change - Handle a config change from the adapter
1537 * @pinstance: pointer to per adapter instance structure
1538 *
1539 * Return value:
1540 * none
1541 */
729c8456 1542
89a36810
AR
1543static void pmcraid_handle_config_change(struct pmcraid_instance *pinstance)
1544{
1545 struct pmcraid_config_table_entry *cfg_entry;
1546 struct pmcraid_hcam_ccn *ccn_hcam;
1547 struct pmcraid_cmd *cmd;
1548 struct pmcraid_cmd *cfgcmd;
1549 struct pmcraid_resource_entry *res = NULL;
89a36810
AR
1550 unsigned long lock_flags;
1551 unsigned long host_lock_flags;
729c8456
AR
1552 u32 new_entry = 1;
1553 u32 hidden_entry = 0;
c20c4267 1554 u16 fw_version;
89a36810
AR
1555 int rc;
1556
1557 ccn_hcam = (struct pmcraid_hcam_ccn *)pinstance->ccn.hcam;
1558 cfg_entry = &ccn_hcam->cfg_entry;
c20c4267 1559 fw_version = be16_to_cpu(pinstance->inq_data->fw_version);
89a36810 1560
592488a3
AR
1561 pmcraid_info("CCN(%x): %x timestamp: %llx type: %x lost: %x flags: %x \
1562 res: %x:%x:%x:%x\n",
89a36810
AR
1563 pinstance->ccn.hcam->ilid,
1564 pinstance->ccn.hcam->op_code,
592488a3
AR
1565 ((pinstance->ccn.hcam->timestamp1) |
1566 ((pinstance->ccn.hcam->timestamp2 & 0xffffffffLL) << 32)),
89a36810
AR
1567 pinstance->ccn.hcam->notification_type,
1568 pinstance->ccn.hcam->notification_lost,
1569 pinstance->ccn.hcam->flags,
1570 pinstance->host->unique_id,
1571 RES_IS_VSET(*cfg_entry) ? PMCRAID_VSET_BUS_ID :
1572 (RES_IS_GSCSI(*cfg_entry) ? PMCRAID_PHYS_BUS_ID :
1573 RES_BUS(cfg_entry->resource_address)),
c20c4267
AR
1574 RES_IS_VSET(*cfg_entry) ?
1575 (fw_version <= PMCRAID_FW_VERSION_1 ?
1576 cfg_entry->unique_flags1 :
1577 cfg_entry->array_id & 0xFF) :
89a36810
AR
1578 RES_TARGET(cfg_entry->resource_address),
1579 RES_LUN(cfg_entry->resource_address));
1580
1581
1582 /* If this HCAM indicates a lost notification, read the config table */
1583 if (pinstance->ccn.hcam->notification_lost) {
1584 cfgcmd = pmcraid_get_free_cmd(pinstance);
1585 if (cfgcmd) {
1586 pmcraid_info("lost CCN, reading config table\b");
1587 pinstance->reinit_cfg_table = 1;
1588 pmcraid_querycfg(cfgcmd);
1589 } else {
1590 pmcraid_err("lost CCN, no free cmd for querycfg\n");
1591 }
1592 goto out_notify_apps;
1593 }
1594
1595 /* If this resource is not going to be added to mid-layer, just notify
729c8456
AR
1596 * applications and return. If this notification is about hiding a VSET
1597 * resource, check if it was exposed already.
89a36810 1598 */
729c8456
AR
1599 if (pinstance->ccn.hcam->notification_type ==
1600 NOTIFICATION_TYPE_ENTRY_CHANGED &&
c20c4267
AR
1601 cfg_entry->resource_type == RES_TYPE_VSET) {
1602
1603 if (fw_version <= PMCRAID_FW_VERSION_1)
1604 hidden_entry = (cfg_entry->unique_flags1 & 0x80) != 0;
1605 else
1606 hidden_entry = (cfg_entry->unique_flags1 & 0x80) != 0;
1607
1608 } else if (!pmcraid_expose_resource(fw_version, cfg_entry)) {
89a36810 1609 goto out_notify_apps;
c20c4267 1610 }
89a36810
AR
1611
1612 spin_lock_irqsave(&pinstance->resource_lock, lock_flags);
1613 list_for_each_entry(res, &pinstance->used_res_q, queue) {
1614 rc = memcmp(&res->cfg_entry.resource_address,
1615 &cfg_entry->resource_address,
1616 sizeof(cfg_entry->resource_address));
1617 if (!rc) {
1618 new_entry = 0;
1619 break;
1620 }
1621 }
1622
1623 if (new_entry) {
1624
729c8456
AR
1625 if (hidden_entry) {
1626 spin_unlock_irqrestore(&pinstance->resource_lock,
1627 lock_flags);
1628 goto out_notify_apps;
1629 }
1630
89a36810
AR
1631 /* If there are more number of resources than what driver can
1632 * manage, do not notify the applications about the CCN. Just
1633 * ignore this notifications and re-register the same HCAM
1634 */
1635 if (list_empty(&pinstance->free_res_q)) {
1636 spin_unlock_irqrestore(&pinstance->resource_lock,
1637 lock_flags);
1638 pmcraid_err("too many resources attached\n");
1639 spin_lock_irqsave(pinstance->host->host_lock,
1640 host_lock_flags);
1641 pmcraid_send_hcam(pinstance,
1642 PMCRAID_HCAM_CODE_CONFIG_CHANGE);
1643 spin_unlock_irqrestore(pinstance->host->host_lock,
1644 host_lock_flags);
1645 return;
1646 }
1647
1648 res = list_entry(pinstance->free_res_q.next,
1649 struct pmcraid_resource_entry, queue);
1650
1651 list_del(&res->queue);
1652 res->scsi_dev = NULL;
1653 res->reset_progress = 0;
1654 list_add_tail(&res->queue, &pinstance->used_res_q);
1655 }
1656
c20c4267 1657 memcpy(&res->cfg_entry, cfg_entry, pinstance->config_table_entry_size);
89a36810
AR
1658
1659 if (pinstance->ccn.hcam->notification_type ==
729c8456 1660 NOTIFICATION_TYPE_ENTRY_DELETED || hidden_entry) {
89a36810 1661 if (res->scsi_dev) {
c20c4267
AR
1662 if (fw_version <= PMCRAID_FW_VERSION_1)
1663 res->cfg_entry.unique_flags1 &= 0x7F;
1664 else
1665 res->cfg_entry.array_id &= 0xFF;
89a36810
AR
1666 res->change_detected = RES_CHANGE_DEL;
1667 res->cfg_entry.resource_handle =
1668 PMCRAID_INVALID_RES_HANDLE;
1669 schedule_work(&pinstance->worker_q);
1670 } else {
1671 /* This may be one of the non-exposed resources */
1672 list_move_tail(&res->queue, &pinstance->free_res_q);
1673 }
1674 } else if (!res->scsi_dev) {
1675 res->change_detected = RES_CHANGE_ADD;
1676 schedule_work(&pinstance->worker_q);
1677 }
1678 spin_unlock_irqrestore(&pinstance->resource_lock, lock_flags);
1679
1680out_notify_apps:
1681
1682 /* Notify configuration changes to registered applications.*/
1683 if (!pmcraid_disable_aen)
c20c4267 1684 pmcraid_notify_ccn(pinstance);
89a36810
AR
1685
1686 cmd = pmcraid_init_hcam(pinstance, PMCRAID_HCAM_CODE_CONFIG_CHANGE);
1687 if (cmd)
1688 pmcraid_send_hcam_cmd(cmd);
1689}
1690
1691/**
1692 * pmcraid_get_error_info - return error string for an ioasc
1693 * @ioasc: ioasc code
1694 * Return Value
1695 * none
1696 */
1697static struct pmcraid_ioasc_error *pmcraid_get_error_info(u32 ioasc)
1698{
1699 int i;
1700 for (i = 0; i < ARRAY_SIZE(pmcraid_ioasc_error_table); i++) {
1701 if (pmcraid_ioasc_error_table[i].ioasc_code == ioasc)
1702 return &pmcraid_ioasc_error_table[i];
1703 }
1704 return NULL;
1705}
1706
1707/**
1708 * pmcraid_ioasc_logger - log IOASC information based user-settings
1709 * @ioasc: ioasc code
1710 * @cmd: pointer to command that resulted in 'ioasc'
1711 */
1712void pmcraid_ioasc_logger(u32 ioasc, struct pmcraid_cmd *cmd)
1713{
1714 struct pmcraid_ioasc_error *error_info = pmcraid_get_error_info(ioasc);
1715
1716 if (error_info == NULL ||
1717 cmd->drv_inst->current_log_level < error_info->log_level)
1718 return;
1719
1720 /* log the error string */
c20c4267 1721 pmcraid_err("cmd [%x] for resource %x failed with %x(%s)\n",
89a36810
AR
1722 cmd->ioa_cb->ioarcb.cdb[0],
1723 cmd->ioa_cb->ioarcb.resource_handle,
1724 le32_to_cpu(ioasc), error_info->error_string);
1725}
1726
1727/**
1728 * pmcraid_handle_error_log - Handle a config change (error log) from the IOA
1729 *
1730 * @pinstance: pointer to per adapter instance structure
1731 *
1732 * Return value:
1733 * none
1734 */
1735static void pmcraid_handle_error_log(struct pmcraid_instance *pinstance)
1736{
1737 struct pmcraid_hcam_ldn *hcam_ldn;
1738 u32 ioasc;
1739
1740 hcam_ldn = (struct pmcraid_hcam_ldn *)pinstance->ldn.hcam;
1741
1742 pmcraid_info
1743 ("LDN(%x): %x type: %x lost: %x flags: %x overlay id: %x\n",
1744 pinstance->ldn.hcam->ilid,
1745 pinstance->ldn.hcam->op_code,
1746 pinstance->ldn.hcam->notification_type,
1747 pinstance->ldn.hcam->notification_lost,
1748 pinstance->ldn.hcam->flags,
1749 pinstance->ldn.hcam->overlay_id);
1750
1751 /* log only the errors, no need to log informational log entries */
1752 if (pinstance->ldn.hcam->notification_type !=
1753 NOTIFICATION_TYPE_ERROR_LOG)
1754 return;
1755
1756 if (pinstance->ldn.hcam->notification_lost ==
1757 HOSTRCB_NOTIFICATIONS_LOST)
34876402 1758 dev_info(&pinstance->pdev->dev, "Error notifications lost\n");
89a36810
AR
1759
1760 ioasc = le32_to_cpu(hcam_ldn->error_log.fd_ioasc);
1761
1762 if (ioasc == PMCRAID_IOASC_UA_BUS_WAS_RESET ||
1763 ioasc == PMCRAID_IOASC_UA_BUS_WAS_RESET_BY_OTHER) {
34876402 1764 dev_info(&pinstance->pdev->dev,
89a36810
AR
1765 "UnitAttention due to IOA Bus Reset\n");
1766 scsi_report_bus_reset(
1767 pinstance->host,
1768 RES_BUS(hcam_ldn->error_log.fd_ra));
1769 }
1770
1771 return;
1772}
1773
1774/**
1775 * pmcraid_process_ccn - Op done function for a CCN.
1776 * @cmd: pointer to command struct
1777 *
1778 * This function is the op done function for a configuration
1779 * change notification
1780 *
1781 * Return value:
1782 * none
1783 */
1784static void pmcraid_process_ccn(struct pmcraid_cmd *cmd)
1785{
1786 struct pmcraid_instance *pinstance = cmd->drv_inst;
1787 u32 ioasc = le32_to_cpu(cmd->ioa_cb->ioasa.ioasc);
1788 unsigned long lock_flags;
1789
1790 pinstance->ccn.cmd = NULL;
1791 pmcraid_return_cmd(cmd);
1792
1793 /* If driver initiated IOA reset happened while this hcam was pending
1794 * with IOA, or IOA bringdown sequence is in progress, no need to
1795 * re-register the hcam
1796 */
1797 if (ioasc == PMCRAID_IOASC_IOA_WAS_RESET ||
1798 atomic_read(&pinstance->ccn.ignore) == 1) {
1799 return;
1800 } else if (ioasc) {
34876402 1801 dev_info(&pinstance->pdev->dev,
89a36810
AR
1802 "Host RCB (CCN) failed with IOASC: 0x%08X\n", ioasc);
1803 spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
1804 pmcraid_send_hcam(pinstance, PMCRAID_HCAM_CODE_CONFIG_CHANGE);
1805 spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
1806 } else {
1807 pmcraid_handle_config_change(pinstance);
1808 }
1809}
1810
1811/**
1812 * pmcraid_process_ldn - op done function for an LDN
1813 * @cmd: pointer to command block
1814 *
1815 * Return value
1816 * none
1817 */
1818static void pmcraid_initiate_reset(struct pmcraid_instance *);
592488a3 1819static void pmcraid_set_timestamp(struct pmcraid_cmd *cmd);
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1820
1821static void pmcraid_process_ldn(struct pmcraid_cmd *cmd)
1822{
1823 struct pmcraid_instance *pinstance = cmd->drv_inst;
1824 struct pmcraid_hcam_ldn *ldn_hcam =
1825 (struct pmcraid_hcam_ldn *)pinstance->ldn.hcam;
1826 u32 ioasc = le32_to_cpu(cmd->ioa_cb->ioasa.ioasc);
1827 u32 fd_ioasc = le32_to_cpu(ldn_hcam->error_log.fd_ioasc);
1828 unsigned long lock_flags;
1829
1830 /* return the command block back to freepool */
1831 pinstance->ldn.cmd = NULL;
1832 pmcraid_return_cmd(cmd);
1833
1834 /* If driver initiated IOA reset happened while this hcam was pending
1835 * with IOA, no need to re-register the hcam as reset engine will do it
1836 * once reset sequence is complete
1837 */
1838 if (ioasc == PMCRAID_IOASC_IOA_WAS_RESET ||
1839 atomic_read(&pinstance->ccn.ignore) == 1) {
1840 return;
1841 } else if (!ioasc) {
1842 pmcraid_handle_error_log(pinstance);
1843 if (fd_ioasc == PMCRAID_IOASC_NR_IOA_RESET_REQUIRED) {
1844 spin_lock_irqsave(pinstance->host->host_lock,
1845 lock_flags);
1846 pmcraid_initiate_reset(pinstance);
1847 spin_unlock_irqrestore(pinstance->host->host_lock,
1848 lock_flags);
1849 return;
1850 }
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1851 if (fd_ioasc == PMCRAID_IOASC_TIME_STAMP_OUT_OF_SYNC) {
1852 pinstance->timestamp_error = 1;
1853 pmcraid_set_timestamp(cmd);
1854 }
89a36810 1855 } else {
34876402 1856 dev_info(&pinstance->pdev->dev,
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1857 "Host RCB(LDN) failed with IOASC: 0x%08X\n", ioasc);
1858 }
1859 /* send netlink message for HCAM notification if enabled */
1860 if (!pmcraid_disable_aen)
c20c4267 1861 pmcraid_notify_ldn(pinstance);
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1862
1863 cmd = pmcraid_init_hcam(pinstance, PMCRAID_HCAM_CODE_LOG_DATA);
1864 if (cmd)
1865 pmcraid_send_hcam_cmd(cmd);
1866}
1867
1868/**
1869 * pmcraid_register_hcams - register HCAMs for CCN and LDN
1870 *
1871 * @pinstance: pointer per adapter instance structure
1872 *
1873 * Return Value
1874 * none
1875 */
1876static void pmcraid_register_hcams(struct pmcraid_instance *pinstance)
1877{
1878 pmcraid_send_hcam(pinstance, PMCRAID_HCAM_CODE_CONFIG_CHANGE);
1879 pmcraid_send_hcam(pinstance, PMCRAID_HCAM_CODE_LOG_DATA);
1880}
1881
1882/**
1883 * pmcraid_unregister_hcams - cancel HCAMs registered already
1884 * @cmd: pointer to command used as part of reset sequence
1885 */
1886static void pmcraid_unregister_hcams(struct pmcraid_cmd *cmd)
1887{
1888 struct pmcraid_instance *pinstance = cmd->drv_inst;
1889
1890 /* During IOA bringdown, HCAM gets fired and tasklet proceeds with
1891 * handling hcam response though it is not necessary. In order to
1892 * prevent this, set 'ignore', so that bring-down sequence doesn't
1893 * re-send any more hcams
1894 */
1895 atomic_set(&pinstance->ccn.ignore, 1);
1896 atomic_set(&pinstance->ldn.ignore, 1);
1897
1898 /* If adapter reset was forced as part of runtime reset sequence,
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1899 * start the reset sequence. Reset will be triggered even in case
1900 * IOA unit_check.
89a36810 1901 */
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1902 if ((pinstance->force_ioa_reset && !pinstance->ioa_bringdown) ||
1903 pinstance->ioa_unit_check) {
89a36810 1904 pinstance->force_ioa_reset = 0;
c20c4267 1905 pinstance->ioa_unit_check = 0;
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1906 pinstance->ioa_state = IOA_STATE_IN_RESET_ALERT;
1907 pmcraid_reset_alert(cmd);
1908 return;
1909 }
1910
1911 /* Driver tries to cancel HCAMs by sending ABORT TASK for each HCAM
1912 * one after the other. So CCN cancellation will be triggered by
1913 * pmcraid_cancel_ldn itself.
1914 */
1915 pmcraid_cancel_ldn(cmd);
1916}
1917
1918/**
1919 * pmcraid_reset_enable_ioa - re-enable IOA after a hard reset
1920 * @pinstance: pointer to adapter instance structure
1921 * Return Value
1922 * 1 if TRANSITION_TO_OPERATIONAL is active, otherwise 0
1923 */
1924static void pmcraid_reinit_buffers(struct pmcraid_instance *);
1925
1926static int pmcraid_reset_enable_ioa(struct pmcraid_instance *pinstance)
1927{
1928 u32 intrs;
1929
1930 pmcraid_reinit_buffers(pinstance);
1931 intrs = pmcraid_read_interrupts(pinstance);
1932
1933 pmcraid_enable_interrupts(pinstance, PMCRAID_PCI_INTERRUPTS);
1934
1935 if (intrs & INTRS_TRANSITION_TO_OPERATIONAL) {
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1936 if (!pinstance->interrupt_mode) {
1937 iowrite32(INTRS_TRANSITION_TO_OPERATIONAL,
1938 pinstance->int_regs.
1939 ioa_host_interrupt_mask_reg);
1940 iowrite32(INTRS_TRANSITION_TO_OPERATIONAL,
1941 pinstance->int_regs.ioa_host_interrupt_clr_reg);
1942 }
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1943 return 1;
1944 } else {
1945 return 0;
1946 }
1947}
1948
1949/**
1950 * pmcraid_soft_reset - performs a soft reset and makes IOA become ready
1951 * @cmd : pointer to reset command block
1952 *
1953 * Return Value
1954 * none
1955 */
1956static void pmcraid_soft_reset(struct pmcraid_cmd *cmd)
1957{
1958 struct pmcraid_instance *pinstance = cmd->drv_inst;
1959 u32 int_reg;
1960 u32 doorbell;
1961
1962 /* There will be an interrupt when Transition to Operational bit is
1963 * set so tasklet would execute next reset task. The timeout handler
1964 * would re-initiate a reset
1965 */
1966 cmd->cmd_done = pmcraid_ioa_reset;
1967 cmd->timer.data = (unsigned long)cmd;
1968 cmd->timer.expires = jiffies +
1969 msecs_to_jiffies(PMCRAID_TRANSOP_TIMEOUT);
1970 cmd->timer.function = (void (*)(unsigned long))pmcraid_timeout_handler;
1971
1972 if (!timer_pending(&cmd->timer))
1973 add_timer(&cmd->timer);
1974
1975 /* Enable destructive diagnostics on IOA if it is not yet in
1976 * operational state
1977 */
1978 doorbell = DOORBELL_RUNTIME_RESET |
1979 DOORBELL_ENABLE_DESTRUCTIVE_DIAGS;
1980
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1981 /* Since we do RESET_ALERT and Start BIST we have to again write
1982 * MSIX Doorbell to indicate the interrupt mode
1983 */
1984 if (pinstance->interrupt_mode) {
1985 iowrite32(DOORBELL_INTR_MODE_MSIX,
1986 pinstance->int_regs.host_ioa_interrupt_reg);
1987 ioread32(pinstance->int_regs.host_ioa_interrupt_reg);
1988 }
1989
89a36810 1990 iowrite32(doorbell, pinstance->int_regs.host_ioa_interrupt_reg);
c20c4267 1991 ioread32(pinstance->int_regs.host_ioa_interrupt_reg),
89a36810 1992 int_reg = ioread32(pinstance->int_regs.ioa_host_interrupt_reg);
c20c4267 1993
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1994 pmcraid_info("Waiting for IOA to become operational %x:%x\n",
1995 ioread32(pinstance->int_regs.host_ioa_interrupt_reg),
1996 int_reg);
1997}
1998
1999/**
2000 * pmcraid_get_dump - retrieves IOA dump in case of Unit Check interrupt
2001 *
2002 * @pinstance: pointer to adapter instance structure
2003 *
2004 * Return Value
2005 * none
2006 */
2007static void pmcraid_get_dump(struct pmcraid_instance *pinstance)
2008{
2009 pmcraid_info("%s is not yet implemented\n", __func__);
2010}
2011
2012/**
2013 * pmcraid_fail_outstanding_cmds - Fails all outstanding ops.
2014 * @pinstance: pointer to adapter instance structure
2015 *
2016 * This function fails all outstanding ops. If they are submitted to IOA
2017 * already, it sends cancel all messages if IOA is still accepting IOARCBs,
2018 * otherwise just completes the commands and returns the cmd blocks to free
2019 * pool.
2020 *
2021 * Return value:
2022 * none
2023 */
2024static void pmcraid_fail_outstanding_cmds(struct pmcraid_instance *pinstance)
2025{
2026 struct pmcraid_cmd *cmd, *temp;
2027 unsigned long lock_flags;
2028
2029 /* pending command list is protected by pending_pool_lock. Its
2030 * traversal must be done as within this lock
2031 */
2032 spin_lock_irqsave(&pinstance->pending_pool_lock, lock_flags);
2033 list_for_each_entry_safe(cmd, temp, &pinstance->pending_cmd_pool,
2034 free_list) {
2035 list_del(&cmd->free_list);
2036 spin_unlock_irqrestore(&pinstance->pending_pool_lock,
2037 lock_flags);
2038 cmd->ioa_cb->ioasa.ioasc =
2039 cpu_to_le32(PMCRAID_IOASC_IOA_WAS_RESET);
2040 cmd->ioa_cb->ioasa.ilid =
2041 cpu_to_be32(PMCRAID_DRIVER_ILID);
2042
2043 /* In case the command timer is still running */
2044 del_timer(&cmd->timer);
2045
2046 /* If this is an IO command, complete it by invoking scsi_done
2047 * function. If this is one of the internal commands other
2048 * than pmcraid_ioa_reset and HCAM commands invoke cmd_done to
2049 * complete it
2050 */
2051 if (cmd->scsi_cmd) {
2052
2053 struct scsi_cmnd *scsi_cmd = cmd->scsi_cmd;
2054 __le32 resp = cmd->ioa_cb->ioarcb.response_handle;
2055
2056 scsi_cmd->result |= DID_ERROR << 16;
2057
2058 scsi_dma_unmap(scsi_cmd);
2059 pmcraid_return_cmd(cmd);
2060
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2061 pmcraid_info("failing(%d) CDB[0] = %x result: %x\n",
2062 le32_to_cpu(resp) >> 2,
2063 cmd->ioa_cb->ioarcb.cdb[0],
2064 scsi_cmd->result);
2065 scsi_cmd->scsi_done(scsi_cmd);
2066 } else if (cmd->cmd_done == pmcraid_internal_done ||
2067 cmd->cmd_done == pmcraid_erp_done) {
2068 cmd->cmd_done(cmd);
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2069 } else if (cmd->cmd_done != pmcraid_ioa_reset &&
2070 cmd->cmd_done != pmcraid_ioa_shutdown_done) {
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2071 pmcraid_return_cmd(cmd);
2072 }
2073
2074 atomic_dec(&pinstance->outstanding_cmds);
2075 spin_lock_irqsave(&pinstance->pending_pool_lock, lock_flags);
2076 }
2077
2078 spin_unlock_irqrestore(&pinstance->pending_pool_lock, lock_flags);
2079}
2080
2081/**
2082 * pmcraid_ioa_reset - Implementation of IOA reset logic
2083 *
2084 * @cmd: pointer to the cmd block to be used for entire reset process
2085 *
2086 * This function executes most of the steps required for IOA reset. This gets
2087 * called by user threads (modprobe/insmod/rmmod) timer, tasklet and midlayer's
25985edc 2088 * 'eh_' thread. Access to variables used for controlling the reset sequence is
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2089 * synchronized using host lock. Various functions called during reset process
2090 * would make use of a single command block, pointer to which is also stored in
2091 * adapter instance structure.
2092 *
2093 * Return Value
2094 * None
2095 */
2096static void pmcraid_ioa_reset(struct pmcraid_cmd *cmd)
2097{
2098 struct pmcraid_instance *pinstance = cmd->drv_inst;
2099 u8 reset_complete = 0;
2100
2101 pinstance->ioa_reset_in_progress = 1;
2102
2103 if (pinstance->reset_cmd != cmd) {
2104 pmcraid_err("reset is called with different command block\n");
2105 pinstance->reset_cmd = cmd;
2106 }
2107
2108 pmcraid_info("reset_engine: state = %d, command = %p\n",
2109 pinstance->ioa_state, cmd);
2110
2111 switch (pinstance->ioa_state) {
2112
2113 case IOA_STATE_DEAD:
2114 /* If IOA is offline, whatever may be the reset reason, just
2115 * return. callers might be waiting on the reset wait_q, wake
2116 * up them
2117 */
2118 pmcraid_err("IOA is offline no reset is possible\n");
2119 reset_complete = 1;
2120 break;
2121
2122 case IOA_STATE_IN_BRINGDOWN:
2123 /* we enter here, once ioa shutdown command is processed by IOA
2124 * Alert IOA for a possible reset. If reset alert fails, IOA
2125 * goes through hard-reset
2126 */
2127 pmcraid_disable_interrupts(pinstance, ~0);
2128 pinstance->ioa_state = IOA_STATE_IN_RESET_ALERT;
2129 pmcraid_reset_alert(cmd);
2130 break;
2131
2132 case IOA_STATE_UNKNOWN:
2133 /* We may be called during probe or resume. Some pre-processing
2134 * is required for prior to reset
2135 */
2136 scsi_block_requests(pinstance->host);
2137
2138 /* If asked to reset while IOA was processing responses or
2139 * there are any error responses then IOA may require
2140 * hard-reset.
2141 */
2142 if (pinstance->ioa_hard_reset == 0) {
2143 if (ioread32(pinstance->ioa_status) &
2144 INTRS_TRANSITION_TO_OPERATIONAL) {
2145 pmcraid_info("sticky bit set, bring-up\n");
2146 pinstance->ioa_state = IOA_STATE_IN_BRINGUP;
2147 pmcraid_reinit_cmdblk(cmd);
2148 pmcraid_identify_hrrq(cmd);
2149 } else {
2150 pinstance->ioa_state = IOA_STATE_IN_SOFT_RESET;
2151 pmcraid_soft_reset(cmd);
2152 }
2153 } else {
2154 /* Alert IOA of a possible reset and wait for critical
2155 * operation in progress bit to reset
2156 */
2157 pinstance->ioa_state = IOA_STATE_IN_RESET_ALERT;
2158 pmcraid_reset_alert(cmd);
2159 }
2160 break;
2161
2162 case IOA_STATE_IN_RESET_ALERT:
2163 /* If critical operation in progress bit is reset or wait gets
2164 * timed out, reset proceeds with starting BIST on the IOA.
2165 * pmcraid_ioa_hard_reset keeps a count of reset attempts. If
2166 * they are 3 or more, reset engine marks IOA dead and returns
2167 */
2168 pinstance->ioa_state = IOA_STATE_IN_HARD_RESET;
2169 pmcraid_start_bist(cmd);
2170 break;
2171
2172 case IOA_STATE_IN_HARD_RESET:
2173 pinstance->ioa_reset_attempts++;
2174
2175 /* retry reset if we haven't reached maximum allowed limit */
2176 if (pinstance->ioa_reset_attempts > PMCRAID_RESET_ATTEMPTS) {
2177 pinstance->ioa_reset_attempts = 0;
2178 pmcraid_err("IOA didn't respond marking it as dead\n");
2179 pinstance->ioa_state = IOA_STATE_DEAD;
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2180
2181 if (pinstance->ioa_bringdown)
2182 pmcraid_notify_ioastate(pinstance,
2183 PMC_DEVICE_EVENT_SHUTDOWN_FAILED);
2184 else
2185 pmcraid_notify_ioastate(pinstance,
2186 PMC_DEVICE_EVENT_RESET_FAILED);
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AR
2187 reset_complete = 1;
2188 break;
2189 }
2190
2191 /* Once either bist or pci reset is done, restore PCI config
2192 * space. If this fails, proceed with hard reset again
2193 */
1d3c16a8 2194 pci_restore_state(pinstance->pdev);
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2195
2196 /* fail all pending commands */
2197 pmcraid_fail_outstanding_cmds(pinstance);
2198
2199 /* check if unit check is active, if so extract dump */
2200 if (pinstance->ioa_unit_check) {
2201 pmcraid_info("unit check is active\n");
2202 pinstance->ioa_unit_check = 0;
2203 pmcraid_get_dump(pinstance);
2204 pinstance->ioa_reset_attempts--;
2205 pinstance->ioa_state = IOA_STATE_IN_RESET_ALERT;
2206 pmcraid_reset_alert(cmd);
2207 break;
2208 }
2209
2210 /* if the reset reason is to bring-down the ioa, we might be
2211 * done with the reset restore pci_config_space and complete
2212 * the reset
2213 */
2214 if (pinstance->ioa_bringdown) {
2215 pmcraid_info("bringing down the adapter\n");
2216 pinstance->ioa_shutdown_type = SHUTDOWN_NONE;
2217 pinstance->ioa_bringdown = 0;
2218 pinstance->ioa_state = IOA_STATE_UNKNOWN;
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2219 pmcraid_notify_ioastate(pinstance,
2220 PMC_DEVICE_EVENT_SHUTDOWN_SUCCESS);
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2221 reset_complete = 1;
2222 } else {
2223 /* bring-up IOA, so proceed with soft reset
2224 * Reinitialize hrrq_buffers and their indices also
2225 * enable interrupts after a pci_restore_state
2226 */
2227 if (pmcraid_reset_enable_ioa(pinstance)) {
2228 pinstance->ioa_state = IOA_STATE_IN_BRINGUP;
2229 pmcraid_info("bringing up the adapter\n");
2230 pmcraid_reinit_cmdblk(cmd);
2231 pmcraid_identify_hrrq(cmd);
2232 } else {
2233 pinstance->ioa_state = IOA_STATE_IN_SOFT_RESET;
2234 pmcraid_soft_reset(cmd);
2235 }
2236 }
2237 break;
2238
2239 case IOA_STATE_IN_SOFT_RESET:
2240 /* TRANSITION TO OPERATIONAL is on so start initialization
2241 * sequence
2242 */
2243 pmcraid_info("In softreset proceeding with bring-up\n");
2244 pinstance->ioa_state = IOA_STATE_IN_BRINGUP;
2245
2246 /* Initialization commands start with HRRQ identification. From
2247 * now on tasklet completes most of the commands as IOA is up
2248 * and intrs are enabled
2249 */
2250 pmcraid_identify_hrrq(cmd);
2251 break;
2252
2253 case IOA_STATE_IN_BRINGUP:
2254 /* we are done with bringing up of IOA, change the ioa_state to
2255 * operational and wake up any waiters
2256 */
2257 pinstance->ioa_state = IOA_STATE_OPERATIONAL;
2258 reset_complete = 1;
2259 break;
2260
2261 case IOA_STATE_OPERATIONAL:
2262 default:
2263 /* When IOA is operational and a reset is requested, check for
2264 * the reset reason. If reset is to bring down IOA, unregister
2265 * HCAMs and initiate shutdown; if adapter reset is forced then
2266 * restart reset sequence again
2267 */
2268 if (pinstance->ioa_shutdown_type == SHUTDOWN_NONE &&
2269 pinstance->force_ioa_reset == 0) {
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2270 pmcraid_notify_ioastate(pinstance,
2271 PMC_DEVICE_EVENT_RESET_SUCCESS);
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AR
2272 reset_complete = 1;
2273 } else {
2274 if (pinstance->ioa_shutdown_type != SHUTDOWN_NONE)
2275 pinstance->ioa_state = IOA_STATE_IN_BRINGDOWN;
2276 pmcraid_reinit_cmdblk(cmd);
2277 pmcraid_unregister_hcams(cmd);
2278 }
2279 break;
2280 }
2281
2282 /* reset will be completed if ioa_state is either DEAD or UNKNOWN or
2283 * OPERATIONAL. Reset all control variables used during reset, wake up
2284 * any waiting threads and let the SCSI mid-layer send commands. Note
2285 * that host_lock must be held before invoking scsi_report_bus_reset.
2286 */
2287 if (reset_complete) {
2288 pinstance->ioa_reset_in_progress = 0;
2289 pinstance->ioa_reset_attempts = 0;
2290 pinstance->reset_cmd = NULL;
2291 pinstance->ioa_shutdown_type = SHUTDOWN_NONE;
2292 pinstance->ioa_bringdown = 0;
2293 pmcraid_return_cmd(cmd);
2294
2295 /* If target state is to bring up the adapter, proceed with
2296 * hcam registration and resource exposure to mid-layer.
2297 */
2298 if (pinstance->ioa_state == IOA_STATE_OPERATIONAL)
2299 pmcraid_register_hcams(pinstance);
2300
2301 wake_up_all(&pinstance->reset_wait_q);
2302 }
2303
2304 return;
2305}
2306
2307/**
2308 * pmcraid_initiate_reset - initiates reset sequence. This is called from
2309 * ISR/tasklet during error interrupts including IOA unit check. If reset
2310 * is already in progress, it just returns, otherwise initiates IOA reset
2311 * to bring IOA up to operational state.
2312 *
2313 * @pinstance: pointer to adapter instance structure
2314 *
2315 * Return value
2316 * none
2317 */
2318static void pmcraid_initiate_reset(struct pmcraid_instance *pinstance)
2319{
2320 struct pmcraid_cmd *cmd;
2321
2322 /* If the reset is already in progress, just return, otherwise start
2323 * reset sequence and return
2324 */
2325 if (!pinstance->ioa_reset_in_progress) {
2326 scsi_block_requests(pinstance->host);
2327 cmd = pmcraid_get_free_cmd(pinstance);
2328
2329 if (cmd == NULL) {
2330 pmcraid_err("no cmnd blocks for initiate_reset\n");
2331 return;
2332 }
2333
2334 pinstance->ioa_shutdown_type = SHUTDOWN_NONE;
2335 pinstance->reset_cmd = cmd;
2336 pinstance->force_ioa_reset = 1;
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AR
2337 pmcraid_notify_ioastate(pinstance,
2338 PMC_DEVICE_EVENT_RESET_START);
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2339 pmcraid_ioa_reset(cmd);
2340 }
2341}
2342
2343/**
2344 * pmcraid_reset_reload - utility routine for doing IOA reset either to bringup
2345 * or bringdown IOA
2346 * @pinstance: pointer adapter instance structure
2347 * @shutdown_type: shutdown type to be used NONE, NORMAL or ABRREV
2348 * @target_state: expected target state after reset
2349 *
2350 * Note: This command initiates reset and waits for its completion. Hence this
2351 * should not be called from isr/timer/tasklet functions (timeout handlers,
2352 * error response handlers and interrupt handlers).
2353 *
2354 * Return Value
2355 * 1 in case ioa_state is not target_state, 0 otherwise.
2356 */
2357static int pmcraid_reset_reload(
2358 struct pmcraid_instance *pinstance,
2359 u8 shutdown_type,
2360 u8 target_state
2361)
2362{
2363 struct pmcraid_cmd *reset_cmd = NULL;
2364 unsigned long lock_flags;
2365 int reset = 1;
2366
2367 spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
2368
2369 if (pinstance->ioa_reset_in_progress) {
2370 pmcraid_info("reset_reload: reset is already in progress\n");
2371
2372 spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
2373
2374 wait_event(pinstance->reset_wait_q,
2375 !pinstance->ioa_reset_in_progress);
2376
2377 spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
2378
2379 if (pinstance->ioa_state == IOA_STATE_DEAD) {
2380 spin_unlock_irqrestore(pinstance->host->host_lock,
2381 lock_flags);
2382 pmcraid_info("reset_reload: IOA is dead\n");
2383 return reset;
2384 } else if (pinstance->ioa_state == target_state) {
2385 reset = 0;
2386 }
2387 }
2388
2389 if (reset) {
2390 pmcraid_info("reset_reload: proceeding with reset\n");
2391 scsi_block_requests(pinstance->host);
2392 reset_cmd = pmcraid_get_free_cmd(pinstance);
2393
2394 if (reset_cmd == NULL) {
2395 pmcraid_err("no free cmnd for reset_reload\n");
2396 spin_unlock_irqrestore(pinstance->host->host_lock,
2397 lock_flags);
2398 return reset;
2399 }
2400
2401 if (shutdown_type == SHUTDOWN_NORMAL)
2402 pinstance->ioa_bringdown = 1;
2403
2404 pinstance->ioa_shutdown_type = shutdown_type;
2405 pinstance->reset_cmd = reset_cmd;
2406 pinstance->force_ioa_reset = reset;
2407 pmcraid_info("reset_reload: initiating reset\n");
2408 pmcraid_ioa_reset(reset_cmd);
2409 spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
2410 pmcraid_info("reset_reload: waiting for reset to complete\n");
2411 wait_event(pinstance->reset_wait_q,
2412 !pinstance->ioa_reset_in_progress);
2413
c20c4267 2414 pmcraid_info("reset_reload: reset is complete !!\n");
89a36810
AR
2415 scsi_unblock_requests(pinstance->host);
2416 if (pinstance->ioa_state == target_state)
2417 reset = 0;
2418 }
2419
2420 return reset;
2421}
2422
2423/**
2424 * pmcraid_reset_bringdown - wrapper over pmcraid_reset_reload to bringdown IOA
2425 *
2426 * @pinstance: pointer to adapter instance structure
2427 *
2428 * Return Value
2429 * whatever is returned from pmcraid_reset_reload
2430 */
2431static int pmcraid_reset_bringdown(struct pmcraid_instance *pinstance)
2432{
2433 return pmcraid_reset_reload(pinstance,
2434 SHUTDOWN_NORMAL,
2435 IOA_STATE_UNKNOWN);
2436}
2437
2438/**
2439 * pmcraid_reset_bringup - wrapper over pmcraid_reset_reload to bring up IOA
2440 *
2441 * @pinstance: pointer to adapter instance structure
2442 *
2443 * Return Value
2444 * whatever is returned from pmcraid_reset_reload
2445 */
2446static int pmcraid_reset_bringup(struct pmcraid_instance *pinstance)
2447{
c20c4267
AR
2448 pmcraid_notify_ioastate(pinstance, PMC_DEVICE_EVENT_RESET_START);
2449
89a36810
AR
2450 return pmcraid_reset_reload(pinstance,
2451 SHUTDOWN_NONE,
2452 IOA_STATE_OPERATIONAL);
2453}
2454
2455/**
2456 * pmcraid_request_sense - Send request sense to a device
2457 * @cmd: pmcraid command struct
2458 *
2459 * This function sends a request sense to a device as a result of a check
2460 * condition. This method re-uses the same command block that failed earlier.
2461 */
2462static void pmcraid_request_sense(struct pmcraid_cmd *cmd)
2463{
2464 struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb;
2465 struct pmcraid_ioadl_desc *ioadl = ioarcb->add_data.u.ioadl;
2466
2467 /* allocate DMAable memory for sense buffers */
2468 cmd->sense_buffer = pci_alloc_consistent(cmd->drv_inst->pdev,
2469 SCSI_SENSE_BUFFERSIZE,
2470 &cmd->sense_buffer_dma);
2471
2472 if (cmd->sense_buffer == NULL) {
2473 pmcraid_err
2474 ("couldn't allocate sense buffer for request sense\n");
2475 pmcraid_erp_done(cmd);
2476 return;
2477 }
2478
2479 /* re-use the command block */
2480 memset(&cmd->ioa_cb->ioasa, 0, sizeof(struct pmcraid_ioasa));
2481 memset(ioarcb->cdb, 0, PMCRAID_MAX_CDB_LEN);
2482 ioarcb->request_flags0 = (SYNC_COMPLETE |
2483 NO_LINK_DESCS |
2484 INHIBIT_UL_CHECK);
2485 ioarcb->request_type = REQ_TYPE_SCSI;
2486 ioarcb->cdb[0] = REQUEST_SENSE;
2487 ioarcb->cdb[4] = SCSI_SENSE_BUFFERSIZE;
2488
2489 ioarcb->ioadl_bus_addr = cpu_to_le64((cmd->ioa_cb_bus_addr) +
2490 offsetof(struct pmcraid_ioarcb,
2491 add_data.u.ioadl[0]));
2492 ioarcb->ioadl_length = cpu_to_le32(sizeof(struct pmcraid_ioadl_desc));
2493
2494 ioarcb->data_transfer_length = cpu_to_le32(SCSI_SENSE_BUFFERSIZE);
2495
2496 ioadl->address = cpu_to_le64(cmd->sense_buffer_dma);
2497 ioadl->data_len = cpu_to_le32(SCSI_SENSE_BUFFERSIZE);
88197966 2498 ioadl->flags = IOADL_FLAGS_LAST_DESC;
89a36810
AR
2499
2500 /* request sense might be called as part of error response processing
2501 * which runs in tasklets context. It is possible that mid-layer might
2502 * schedule queuecommand during this time, hence, writting to IOARRIN
2503 * must be protect by host_lock
2504 */
2505 pmcraid_send_cmd(cmd, pmcraid_erp_done,
2506 PMCRAID_REQUEST_SENSE_TIMEOUT,
2507 pmcraid_timeout_handler);
2508}
2509
2510/**
2511 * pmcraid_cancel_all - cancel all outstanding IOARCBs as part of error recovery
2512 * @cmd: command that failed
2513 * @sense: true if request_sense is required after cancel all
2514 *
2515 * This function sends a cancel all to a device to clear the queue.
2516 */
2517static void pmcraid_cancel_all(struct pmcraid_cmd *cmd, u32 sense)
2518{
2519 struct scsi_cmnd *scsi_cmd = cmd->scsi_cmd;
2520 struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb;
2521 struct pmcraid_resource_entry *res = scsi_cmd->device->hostdata;
2522 void (*cmd_done) (struct pmcraid_cmd *) = sense ? pmcraid_erp_done
2523 : pmcraid_request_sense;
2524
2525 memset(ioarcb->cdb, 0, PMCRAID_MAX_CDB_LEN);
2526 ioarcb->request_flags0 = SYNC_OVERRIDE;
2527 ioarcb->request_type = REQ_TYPE_IOACMD;
2528 ioarcb->cdb[0] = PMCRAID_CANCEL_ALL_REQUESTS;
2529
2530 if (RES_IS_GSCSI(res->cfg_entry))
2531 ioarcb->cdb[1] = PMCRAID_SYNC_COMPLETE_AFTER_CANCEL;
2532
2533 ioarcb->ioadl_bus_addr = 0;
2534 ioarcb->ioadl_length = 0;
2535 ioarcb->data_transfer_length = 0;
2536 ioarcb->ioarcb_bus_addr &= (~0x1FULL);
2537
2538 /* writing to IOARRIN must be protected by host_lock, as mid-layer
2539 * schedule queuecommand while we are doing this
2540 */
2541 pmcraid_send_cmd(cmd, cmd_done,
2542 PMCRAID_REQUEST_SENSE_TIMEOUT,
2543 pmcraid_timeout_handler);
2544}
2545
2546/**
2547 * pmcraid_frame_auto_sense: frame fixed format sense information
2548 *
2549 * @cmd: pointer to failing command block
2550 *
2551 * Return value
2552 * none
2553 */
2554static void pmcraid_frame_auto_sense(struct pmcraid_cmd *cmd)
2555{
2556 u8 *sense_buf = cmd->scsi_cmd->sense_buffer;
2557 struct pmcraid_resource_entry *res = cmd->scsi_cmd->device->hostdata;
2558 struct pmcraid_ioasa *ioasa = &cmd->ioa_cb->ioasa;
2559 u32 ioasc = le32_to_cpu(ioasa->ioasc);
2560 u32 failing_lba = 0;
2561
2562 memset(sense_buf, 0, SCSI_SENSE_BUFFERSIZE);
2563 cmd->scsi_cmd->result = SAM_STAT_CHECK_CONDITION;
2564
2565 if (RES_IS_VSET(res->cfg_entry) &&
2566 ioasc == PMCRAID_IOASC_ME_READ_ERROR_NO_REALLOC &&
2567 ioasa->u.vset.failing_lba_hi != 0) {
2568
2569 sense_buf[0] = 0x72;
2570 sense_buf[1] = PMCRAID_IOASC_SENSE_KEY(ioasc);
2571 sense_buf[2] = PMCRAID_IOASC_SENSE_CODE(ioasc);
2572 sense_buf[3] = PMCRAID_IOASC_SENSE_QUAL(ioasc);
2573
2574 sense_buf[7] = 12;
2575 sense_buf[8] = 0;
2576 sense_buf[9] = 0x0A;
2577 sense_buf[10] = 0x80;
2578
2579 failing_lba = le32_to_cpu(ioasa->u.vset.failing_lba_hi);
2580
2581 sense_buf[12] = (failing_lba & 0xff000000) >> 24;
2582 sense_buf[13] = (failing_lba & 0x00ff0000) >> 16;
2583 sense_buf[14] = (failing_lba & 0x0000ff00) >> 8;
2584 sense_buf[15] = failing_lba & 0x000000ff;
2585
2586 failing_lba = le32_to_cpu(ioasa->u.vset.failing_lba_lo);
2587
2588 sense_buf[16] = (failing_lba & 0xff000000) >> 24;
2589 sense_buf[17] = (failing_lba & 0x00ff0000) >> 16;
2590 sense_buf[18] = (failing_lba & 0x0000ff00) >> 8;
2591 sense_buf[19] = failing_lba & 0x000000ff;
2592 } else {
2593 sense_buf[0] = 0x70;
2594 sense_buf[2] = PMCRAID_IOASC_SENSE_KEY(ioasc);
2595 sense_buf[12] = PMCRAID_IOASC_SENSE_CODE(ioasc);
2596 sense_buf[13] = PMCRAID_IOASC_SENSE_QUAL(ioasc);
2597
2598 if (ioasc == PMCRAID_IOASC_ME_READ_ERROR_NO_REALLOC) {
2599 if (RES_IS_VSET(res->cfg_entry))
2600 failing_lba =
2601 le32_to_cpu(ioasa->u.
2602 vset.failing_lba_lo);
2603 sense_buf[0] |= 0x80;
2604 sense_buf[3] = (failing_lba >> 24) & 0xff;
2605 sense_buf[4] = (failing_lba >> 16) & 0xff;
2606 sense_buf[5] = (failing_lba >> 8) & 0xff;
2607 sense_buf[6] = failing_lba & 0xff;
2608 }
2609
2610 sense_buf[7] = 6; /* additional length */
2611 }
2612}
2613
2614/**
2615 * pmcraid_error_handler - Error response handlers for a SCSI op
2616 * @cmd: pointer to pmcraid_cmd that has failed
2617 *
2618 * This function determines whether or not to initiate ERP on the affected
2619 * device. This is called from a tasklet, which doesn't hold any locks.
2620 *
2621 * Return value:
2622 * 0 it caller can complete the request, otherwise 1 where in error
2623 * handler itself completes the request and returns the command block
2624 * back to free-pool
2625 */
2626static int pmcraid_error_handler(struct pmcraid_cmd *cmd)
2627{
2628 struct scsi_cmnd *scsi_cmd = cmd->scsi_cmd;
2629 struct pmcraid_resource_entry *res = scsi_cmd->device->hostdata;
2630 struct pmcraid_instance *pinstance = cmd->drv_inst;
2631 struct pmcraid_ioasa *ioasa = &cmd->ioa_cb->ioasa;
2632 u32 ioasc = le32_to_cpu(ioasa->ioasc);
2633 u32 masked_ioasc = ioasc & PMCRAID_IOASC_SENSE_MASK;
2634 u32 sense_copied = 0;
2635
2636 if (!res) {
2637 pmcraid_info("resource pointer is NULL\n");
2638 return 0;
2639 }
2640
2641 /* If this was a SCSI read/write command keep count of errors */
2642 if (SCSI_CMD_TYPE(scsi_cmd->cmnd[0]) == SCSI_READ_CMD)
2643 atomic_inc(&res->read_failures);
2644 else if (SCSI_CMD_TYPE(scsi_cmd->cmnd[0]) == SCSI_WRITE_CMD)
2645 atomic_inc(&res->write_failures);
2646
2647 if (!RES_IS_GSCSI(res->cfg_entry) &&
2648 masked_ioasc != PMCRAID_IOASC_HW_DEVICE_BUS_STATUS_ERROR) {
2649 pmcraid_frame_auto_sense(cmd);
2650 }
2651
2652 /* Log IOASC/IOASA information based on user settings */
2653 pmcraid_ioasc_logger(ioasc, cmd);
2654
2655 switch (masked_ioasc) {
2656
2657 case PMCRAID_IOASC_AC_TERMINATED_BY_HOST:
2658 scsi_cmd->result |= (DID_ABORT << 16);
2659 break;
2660
2661 case PMCRAID_IOASC_IR_INVALID_RESOURCE_HANDLE:
2662 case PMCRAID_IOASC_HW_CANNOT_COMMUNICATE:
2663 scsi_cmd->result |= (DID_NO_CONNECT << 16);
2664 break;
2665
2666 case PMCRAID_IOASC_NR_SYNC_REQUIRED:
2667 res->sync_reqd = 1;
2668 scsi_cmd->result |= (DID_IMM_RETRY << 16);
2669 break;
2670
2671 case PMCRAID_IOASC_ME_READ_ERROR_NO_REALLOC:
2672 scsi_cmd->result |= (DID_PASSTHROUGH << 16);
2673 break;
2674
2675 case PMCRAID_IOASC_UA_BUS_WAS_RESET:
2676 case PMCRAID_IOASC_UA_BUS_WAS_RESET_BY_OTHER:
2677 if (!res->reset_progress)
2678 scsi_report_bus_reset(pinstance->host,
2679 scsi_cmd->device->channel);
2680 scsi_cmd->result |= (DID_ERROR << 16);
2681 break;
2682
2683 case PMCRAID_IOASC_HW_DEVICE_BUS_STATUS_ERROR:
2684 scsi_cmd->result |= PMCRAID_IOASC_SENSE_STATUS(ioasc);
2685 res->sync_reqd = 1;
2686
2687 /* if check_condition is not active return with error otherwise
2688 * get/frame the sense buffer
2689 */
2690 if (PMCRAID_IOASC_SENSE_STATUS(ioasc) !=
2691 SAM_STAT_CHECK_CONDITION &&
2692 PMCRAID_IOASC_SENSE_STATUS(ioasc) != SAM_STAT_ACA_ACTIVE)
2693 return 0;
2694
2695 /* If we have auto sense data as part of IOASA pass it to
2696 * mid-layer
2697 */
2698 if (ioasa->auto_sense_length != 0) {
2699 short sense_len = ioasa->auto_sense_length;
2700 int data_size = min_t(u16, le16_to_cpu(sense_len),
2701 SCSI_SENSE_BUFFERSIZE);
2702
2703 memcpy(scsi_cmd->sense_buffer,
2704 ioasa->sense_data,
2705 data_size);
2706 sense_copied = 1;
2707 }
2708
a70757ba 2709 if (RES_IS_GSCSI(res->cfg_entry))
89a36810 2710 pmcraid_cancel_all(cmd, sense_copied);
a70757ba 2711 else if (sense_copied)
89a36810 2712 pmcraid_erp_done(cmd);
a70757ba 2713 else
89a36810 2714 pmcraid_request_sense(cmd);
89a36810
AR
2715
2716 return 1;
2717
2718 case PMCRAID_IOASC_NR_INIT_CMD_REQUIRED:
2719 break;
2720
2721 default:
2722 if (PMCRAID_IOASC_SENSE_KEY(ioasc) > RECOVERED_ERROR)
2723 scsi_cmd->result |= (DID_ERROR << 16);
2724 break;
2725 }
2726 return 0;
2727}
2728
2729/**
2730 * pmcraid_reset_device - device reset handler functions
2731 *
2732 * @scsi_cmd: scsi command struct
2733 * @modifier: reset modifier indicating the reset sequence to be performed
2734 *
2735 * This function issues a device reset to the affected device.
2736 * A LUN reset will be sent to the device first. If that does
2737 * not work, a target reset will be sent.
2738 *
2739 * Return value:
2740 * SUCCESS / FAILED
2741 */
2742static int pmcraid_reset_device(
2743 struct scsi_cmnd *scsi_cmd,
2744 unsigned long timeout,
2745 u8 modifier
2746)
2747{
2748 struct pmcraid_cmd *cmd;
2749 struct pmcraid_instance *pinstance;
2750 struct pmcraid_resource_entry *res;
2751 struct pmcraid_ioarcb *ioarcb;
2752 unsigned long lock_flags;
2753 u32 ioasc;
2754
2755 pinstance =
2756 (struct pmcraid_instance *)scsi_cmd->device->host->hostdata;
2757 res = scsi_cmd->device->hostdata;
2758
2759 if (!res) {
34876402
AR
2760 sdev_printk(KERN_ERR, scsi_cmd->device,
2761 "reset_device: NULL resource pointer\n");
89a36810
AR
2762 return FAILED;
2763 }
2764
2765 /* If adapter is currently going through reset/reload, return failed.
2766 * This will force the mid-layer to call _eh_bus/host reset, which
2767 * will then go to sleep and wait for the reset to complete
2768 */
2769 spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
2770 if (pinstance->ioa_reset_in_progress ||
2771 pinstance->ioa_state == IOA_STATE_DEAD) {
2772 spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
2773 return FAILED;
2774 }
2775
2776 res->reset_progress = 1;
2777 pmcraid_info("Resetting %s resource with addr %x\n",
2778 ((modifier & RESET_DEVICE_LUN) ? "LUN" :
2779 ((modifier & RESET_DEVICE_TARGET) ? "TARGET" : "BUS")),
2780 le32_to_cpu(res->cfg_entry.resource_address));
2781
2782 /* get a free cmd block */
2783 cmd = pmcraid_get_free_cmd(pinstance);
2784
2785 if (cmd == NULL) {
2786 spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
2787 pmcraid_err("%s: no cmd blocks are available\n", __func__);
2788 return FAILED;
2789 }
2790
2791 ioarcb = &cmd->ioa_cb->ioarcb;
2792 ioarcb->resource_handle = res->cfg_entry.resource_handle;
2793 ioarcb->request_type = REQ_TYPE_IOACMD;
2794 ioarcb->cdb[0] = PMCRAID_RESET_DEVICE;
2795
2796 /* Initialize reset modifier bits */
2797 if (modifier)
2798 modifier = ENABLE_RESET_MODIFIER | modifier;
2799
2800 ioarcb->cdb[1] = modifier;
2801
2802 init_completion(&cmd->wait_for_completion);
2803 cmd->completion_req = 1;
2804
2805 pmcraid_info("cmd(CDB[0] = %x) for %x with index = %d\n",
2806 cmd->ioa_cb->ioarcb.cdb[0],
2807 le32_to_cpu(cmd->ioa_cb->ioarcb.resource_handle),
2808 le32_to_cpu(cmd->ioa_cb->ioarcb.response_handle) >> 2);
2809
2810 pmcraid_send_cmd(cmd,
2811 pmcraid_internal_done,
2812 timeout,
2813 pmcraid_timeout_handler);
2814
2815 spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
2816
2817 /* RESET_DEVICE command completes after all pending IOARCBs are
2818 * completed. Once this command is completed, pmcraind_internal_done
2819 * will wake up the 'completion' queue.
2820 */
2821 wait_for_completion(&cmd->wait_for_completion);
2822
2823 /* complete the command here itself and return the command block
2824 * to free list
2825 */
2826 pmcraid_return_cmd(cmd);
2827 res->reset_progress = 0;
2828 ioasc = le32_to_cpu(cmd->ioa_cb->ioasa.ioasc);
2829
2830 /* set the return value based on the returned ioasc */
2831 return PMCRAID_IOASC_SENSE_KEY(ioasc) ? FAILED : SUCCESS;
2832}
2833
2834/**
2835 * _pmcraid_io_done - helper for pmcraid_io_done function
2836 *
2837 * @cmd: pointer to pmcraid command struct
2838 * @reslen: residual data length to be set in the ioasa
2839 * @ioasc: ioasc either returned by IOA or set by driver itself.
2840 *
2841 * This function is invoked by pmcraid_io_done to complete mid-layer
2842 * scsi ops.
2843 *
2844 * Return value:
2845 * 0 if caller is required to return it to free_pool. Returns 1 if
2846 * caller need not worry about freeing command block as error handler
2847 * will take care of that.
2848 */
2849
2850static int _pmcraid_io_done(struct pmcraid_cmd *cmd, int reslen, int ioasc)
2851{
2852 struct scsi_cmnd *scsi_cmd = cmd->scsi_cmd;
2853 int rc = 0;
2854
2855 scsi_set_resid(scsi_cmd, reslen);
2856
2857 pmcraid_info("response(%d) CDB[0] = %x ioasc:result: %x:%x\n",
2858 le32_to_cpu(cmd->ioa_cb->ioarcb.response_handle) >> 2,
2859 cmd->ioa_cb->ioarcb.cdb[0],
2860 ioasc, scsi_cmd->result);
2861
2862 if (PMCRAID_IOASC_SENSE_KEY(ioasc) != 0)
2863 rc = pmcraid_error_handler(cmd);
2864
2865 if (rc == 0) {
2866 scsi_dma_unmap(scsi_cmd);
2867 scsi_cmd->scsi_done(scsi_cmd);
2868 }
2869
2870 return rc;
2871}
2872
2873/**
2874 * pmcraid_io_done - SCSI completion function
2875 *
2876 * @cmd: pointer to pmcraid command struct
2877 *
2878 * This function is invoked by tasklet/mid-layer error handler to completing
2879 * the SCSI ops sent from mid-layer.
2880 *
2881 * Return value
2882 * none
2883 */
2884
2885static void pmcraid_io_done(struct pmcraid_cmd *cmd)
2886{
2887 u32 ioasc = le32_to_cpu(cmd->ioa_cb->ioasa.ioasc);
2888 u32 reslen = le32_to_cpu(cmd->ioa_cb->ioasa.residual_data_length);
2889
2890 if (_pmcraid_io_done(cmd, reslen, ioasc) == 0)
2891 pmcraid_return_cmd(cmd);
2892}
2893
2894/**
2895 * pmcraid_abort_cmd - Aborts a single IOARCB already submitted to IOA
2896 *
2897 * @cmd: command block of the command to be aborted
2898 *
2899 * Return Value:
2900 * returns pointer to command structure used as cancelling cmd
2901 */
2902static struct pmcraid_cmd *pmcraid_abort_cmd(struct pmcraid_cmd *cmd)
2903{
2904 struct pmcraid_cmd *cancel_cmd;
2905 struct pmcraid_instance *pinstance;
2906 struct pmcraid_resource_entry *res;
2907
2908 pinstance = (struct pmcraid_instance *)cmd->drv_inst;
2909 res = cmd->scsi_cmd->device->hostdata;
2910
2911 cancel_cmd = pmcraid_get_free_cmd(pinstance);
2912
2913 if (cancel_cmd == NULL) {
2914 pmcraid_err("%s: no cmd blocks are available\n", __func__);
2915 return NULL;
2916 }
2917
2918 pmcraid_prepare_cancel_cmd(cancel_cmd, cmd);
2919
2920 pmcraid_info("aborting command CDB[0]= %x with index = %d\n",
2921 cmd->ioa_cb->ioarcb.cdb[0],
2922 cmd->ioa_cb->ioarcb.response_handle >> 2);
2923
2924 init_completion(&cancel_cmd->wait_for_completion);
2925 cancel_cmd->completion_req = 1;
2926
2927 pmcraid_info("command (%d) CDB[0] = %x for %x\n",
2928 le32_to_cpu(cancel_cmd->ioa_cb->ioarcb.response_handle) >> 2,
c20c4267 2929 cancel_cmd->ioa_cb->ioarcb.cdb[0],
89a36810
AR
2930 le32_to_cpu(cancel_cmd->ioa_cb->ioarcb.resource_handle));
2931
2932 pmcraid_send_cmd(cancel_cmd,
2933 pmcraid_internal_done,
2934 PMCRAID_INTERNAL_TIMEOUT,
2935 pmcraid_timeout_handler);
2936 return cancel_cmd;
2937}
2938
2939/**
2940 * pmcraid_abort_complete - Waits for ABORT TASK completion
2941 *
2942 * @cancel_cmd: command block use as cancelling command
2943 *
2944 * Return Value:
2945 * returns SUCCESS if ABORT TASK has good completion
2946 * otherwise FAILED
2947 */
2948static int pmcraid_abort_complete(struct pmcraid_cmd *cancel_cmd)
2949{
2950 struct pmcraid_resource_entry *res;
2951 u32 ioasc;
2952
2953 wait_for_completion(&cancel_cmd->wait_for_completion);
c20c4267
AR
2954 res = cancel_cmd->res;
2955 cancel_cmd->res = NULL;
89a36810
AR
2956 ioasc = le32_to_cpu(cancel_cmd->ioa_cb->ioasa.ioasc);
2957
2958 /* If the abort task is not timed out we will get a Good completion
2959 * as sense_key, otherwise we may get one the following responses
25985edc 2960 * due to subsequent bus reset or device reset. In case IOASC is
89a36810
AR
2961 * NR_SYNC_REQUIRED, set sync_reqd flag for the corresponding resource
2962 */
2963 if (ioasc == PMCRAID_IOASC_UA_BUS_WAS_RESET ||
2964 ioasc == PMCRAID_IOASC_NR_SYNC_REQUIRED) {
2965 if (ioasc == PMCRAID_IOASC_NR_SYNC_REQUIRED)
2966 res->sync_reqd = 1;
2967 ioasc = 0;
2968 }
2969
2970 /* complete the command here itself */
2971 pmcraid_return_cmd(cancel_cmd);
2972 return PMCRAID_IOASC_SENSE_KEY(ioasc) ? FAILED : SUCCESS;
2973}
2974
2975/**
2976 * pmcraid_eh_abort_handler - entry point for aborting a single task on errors
2977 *
2978 * @scsi_cmd: scsi command struct given by mid-layer. When this is called
2979 * mid-layer ensures that no other commands are queued. This
2980 * never gets called under interrupt, but a separate eh thread.
2981 *
2982 * Return value:
2983 * SUCCESS / FAILED
2984 */
2985static int pmcraid_eh_abort_handler(struct scsi_cmnd *scsi_cmd)
2986{
2987 struct pmcraid_instance *pinstance;
2988 struct pmcraid_cmd *cmd;
2989 struct pmcraid_resource_entry *res;
2990 unsigned long host_lock_flags;
2991 unsigned long pending_lock_flags;
2992 struct pmcraid_cmd *cancel_cmd = NULL;
2993 int cmd_found = 0;
2994 int rc = FAILED;
2995
2996 pinstance =
2997 (struct pmcraid_instance *)scsi_cmd->device->host->hostdata;
2998
34876402
AR
2999 scmd_printk(KERN_INFO, scsi_cmd,
3000 "I/O command timed out, aborting it.\n");
89a36810
AR
3001
3002 res = scsi_cmd->device->hostdata;
3003
3004 if (res == NULL)
3005 return rc;
3006
3007 /* If we are currently going through reset/reload, return failed.
3008 * This will force the mid-layer to eventually call
3009 * pmcraid_eh_host_reset which will then go to sleep and wait for the
3010 * reset to complete
3011 */
3012 spin_lock_irqsave(pinstance->host->host_lock, host_lock_flags);
3013
3014 if (pinstance->ioa_reset_in_progress ||
3015 pinstance->ioa_state == IOA_STATE_DEAD) {
3016 spin_unlock_irqrestore(pinstance->host->host_lock,
3017 host_lock_flags);
3018 return rc;
3019 }
3020
3021 /* loop over pending cmd list to find cmd corresponding to this
3022 * scsi_cmd. Note that this command might not have been completed
3023 * already. locking: all pending commands are protected with
3024 * pending_pool_lock.
3025 */
3026 spin_lock_irqsave(&pinstance->pending_pool_lock, pending_lock_flags);
3027 list_for_each_entry(cmd, &pinstance->pending_cmd_pool, free_list) {
3028
3029 if (cmd->scsi_cmd == scsi_cmd) {
3030 cmd_found = 1;
3031 break;
3032 }
3033 }
3034
3035 spin_unlock_irqrestore(&pinstance->pending_pool_lock,
3036 pending_lock_flags);
3037
3038 /* If the command to be aborted was given to IOA and still pending with
3039 * it, send ABORT_TASK to abort this and wait for its completion
3040 */
3041 if (cmd_found)
3042 cancel_cmd = pmcraid_abort_cmd(cmd);
3043
3044 spin_unlock_irqrestore(pinstance->host->host_lock,
3045 host_lock_flags);
3046
3047 if (cancel_cmd) {
c20c4267 3048 cancel_cmd->res = cmd->scsi_cmd->device->hostdata;
89a36810
AR
3049 rc = pmcraid_abort_complete(cancel_cmd);
3050 }
3051
3052 return cmd_found ? rc : SUCCESS;
3053}
3054
3055/**
3056 * pmcraid_eh_xxxx_reset_handler - bus/target/device reset handler callbacks
3057 *
3058 * @scmd: pointer to scsi_cmd that was sent to the resource to be reset.
3059 *
3060 * All these routines invokve pmcraid_reset_device with appropriate parameters.
3061 * Since these are called from mid-layer EH thread, no other IO will be queued
3062 * to the resource being reset. However, control path (IOCTL) may be active so
3063 * it is necessary to synchronize IOARRIN writes which pmcraid_reset_device
3064 * takes care by locking/unlocking host_lock.
3065 *
3066 * Return value
c20c4267 3067 * SUCCESS or FAILED
89a36810
AR
3068 */
3069static int pmcraid_eh_device_reset_handler(struct scsi_cmnd *scmd)
3070{
34876402
AR
3071 scmd_printk(KERN_INFO, scmd,
3072 "resetting device due to an I/O command timeout.\n");
89a36810
AR
3073 return pmcraid_reset_device(scmd,
3074 PMCRAID_INTERNAL_TIMEOUT,
3075 RESET_DEVICE_LUN);
3076}
3077
3078static int pmcraid_eh_bus_reset_handler(struct scsi_cmnd *scmd)
3079{
34876402
AR
3080 scmd_printk(KERN_INFO, scmd,
3081 "Doing bus reset due to an I/O command timeout.\n");
89a36810
AR
3082 return pmcraid_reset_device(scmd,
3083 PMCRAID_RESET_BUS_TIMEOUT,
3084 RESET_DEVICE_BUS);
3085}
3086
3087static int pmcraid_eh_target_reset_handler(struct scsi_cmnd *scmd)
3088{
34876402
AR
3089 scmd_printk(KERN_INFO, scmd,
3090 "Doing target reset due to an I/O command timeout.\n");
89a36810
AR
3091 return pmcraid_reset_device(scmd,
3092 PMCRAID_INTERNAL_TIMEOUT,
3093 RESET_DEVICE_TARGET);
3094}
3095
3096/**
3097 * pmcraid_eh_host_reset_handler - adapter reset handler callback
3098 *
3099 * @scmd: pointer to scsi_cmd that was sent to a resource of adapter
3100 *
3101 * Initiates adapter reset to bring it up to operational state
3102 *
3103 * Return value
c20c4267 3104 * SUCCESS or FAILED
89a36810
AR
3105 */
3106static int pmcraid_eh_host_reset_handler(struct scsi_cmnd *scmd)
3107{
3108 unsigned long interval = 10000; /* 10 seconds interval */
3109 int waits = jiffies_to_msecs(PMCRAID_RESET_HOST_TIMEOUT) / interval;
3110 struct pmcraid_instance *pinstance =
3111 (struct pmcraid_instance *)(scmd->device->host->hostdata);
3112
3113
3114 /* wait for an additional 150 seconds just in case firmware could come
3115 * up and if it could complete all the pending commands excluding the
3116 * two HCAM (CCN and LDN).
3117 */
3118 while (waits--) {
3119 if (atomic_read(&pinstance->outstanding_cmds) <=
3120 PMCRAID_MAX_HCAM_CMD)
3121 return SUCCESS;
3122 msleep(interval);
3123 }
3124
3125 dev_err(&pinstance->pdev->dev,
3126 "Adapter being reset due to an I/O command timeout.\n");
3127 return pmcraid_reset_bringup(pinstance) == 0 ? SUCCESS : FAILED;
3128}
3129
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3130/**
3131 * pmcraid_init_ioadls - initializes IOADL related fields in IOARCB
3132 * @cmd: pmcraid command struct
3133 * @sgcount: count of scatter-gather elements
3134 *
3135 * Return value
3136 * returns pointer pmcraid_ioadl_desc, initialized to point to internal
3137 * or external IOADLs
3138 */
3139struct pmcraid_ioadl_desc *
3140pmcraid_init_ioadls(struct pmcraid_cmd *cmd, int sgcount)
3141{
3142 struct pmcraid_ioadl_desc *ioadl;
3143 struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb;
3144 int ioadl_count = 0;
3145
3146 if (ioarcb->add_cmd_param_length)
3147 ioadl_count = DIV_ROUND_UP(ioarcb->add_cmd_param_length, 16);
3148 ioarcb->ioadl_length =
3149 sizeof(struct pmcraid_ioadl_desc) * sgcount;
3150
3151 if ((sgcount + ioadl_count) > (ARRAY_SIZE(ioarcb->add_data.u.ioadl))) {
3152 /* external ioadls start at offset 0x80 from control_block
3153 * structure, re-using 24 out of 27 ioadls part of IOARCB.
3154 * It is necessary to indicate to firmware that driver is
3155 * using ioadls to be treated as external to IOARCB.
3156 */
3157 ioarcb->ioarcb_bus_addr &= ~(0x1FULL);
3158 ioarcb->ioadl_bus_addr =
3159 cpu_to_le64((cmd->ioa_cb_bus_addr) +
3160 offsetof(struct pmcraid_ioarcb,
3161 add_data.u.ioadl[3]));
3162 ioadl = &ioarcb->add_data.u.ioadl[3];
3163 } else {
3164 ioarcb->ioadl_bus_addr =
3165 cpu_to_le64((cmd->ioa_cb_bus_addr) +
3166 offsetof(struct pmcraid_ioarcb,
3167 add_data.u.ioadl[ioadl_count]));
3168
3169 ioadl = &ioarcb->add_data.u.ioadl[ioadl_count];
3170 ioarcb->ioarcb_bus_addr |=
3171 DIV_ROUND_CLOSEST(sgcount + ioadl_count, 8);
3172 }
3173
3174 return ioadl;
3175}
3176
3177/**
3178 * pmcraid_build_ioadl - Build a scatter/gather list and map the buffer
3179 * @pinstance: pointer to adapter instance structure
3180 * @cmd: pmcraid command struct
3181 *
3182 * This function is invoked by queuecommand entry point while sending a command
3183 * to firmware. This builds ioadl descriptors and sets up ioarcb fields.
3184 *
3185 * Return value:
c20c4267 3186 * 0 on success or -1 on failure
89a36810
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3187 */
3188static int pmcraid_build_ioadl(
3189 struct pmcraid_instance *pinstance,
3190 struct pmcraid_cmd *cmd
3191)
3192{
3193 int i, nseg;
3194 struct scatterlist *sglist;
3195
3196 struct scsi_cmnd *scsi_cmd = cmd->scsi_cmd;
3197 struct pmcraid_ioarcb *ioarcb = &(cmd->ioa_cb->ioarcb);
3198 struct pmcraid_ioadl_desc *ioadl = ioarcb->add_data.u.ioadl;
3199
3200 u32 length = scsi_bufflen(scsi_cmd);
3201
3202 if (!length)
3203 return 0;
3204
3205 nseg = scsi_dma_map(scsi_cmd);
3206
3207 if (nseg < 0) {
34876402 3208 scmd_printk(KERN_ERR, scsi_cmd, "scsi_map_dma failed!\n");
89a36810
AR
3209 return -1;
3210 } else if (nseg > PMCRAID_MAX_IOADLS) {
3211 scsi_dma_unmap(scsi_cmd);
34876402 3212 scmd_printk(KERN_ERR, scsi_cmd,
89a36810
AR
3213 "sg count is (%d) more than allowed!\n", nseg);
3214 return -1;
3215 }
3216
3217 /* Initialize IOARCB data transfer length fields */
3218 if (scsi_cmd->sc_data_direction == DMA_TO_DEVICE)
3219 ioarcb->request_flags0 |= TRANSFER_DIR_WRITE;
3220
3221 ioarcb->request_flags0 |= NO_LINK_DESCS;
3222 ioarcb->data_transfer_length = cpu_to_le32(length);
3223 ioadl = pmcraid_init_ioadls(cmd, nseg);
3224
3225 /* Initialize IOADL descriptor addresses */
3226 scsi_for_each_sg(scsi_cmd, sglist, nseg, i) {
3227 ioadl[i].data_len = cpu_to_le32(sg_dma_len(sglist));
3228 ioadl[i].address = cpu_to_le64(sg_dma_address(sglist));
3229 ioadl[i].flags = 0;
3230 }
3231 /* setup last descriptor */
88197966 3232 ioadl[i - 1].flags = IOADL_FLAGS_LAST_DESC;
89a36810
AR
3233
3234 return 0;
3235}
3236
3237/**
3238 * pmcraid_free_sglist - Frees an allocated SG buffer list
3239 * @sglist: scatter/gather list pointer
3240 *
3241 * Free a DMA'able memory previously allocated with pmcraid_alloc_sglist
3242 *
3243 * Return value:
c20c4267 3244 * none
89a36810
AR
3245 */
3246static void pmcraid_free_sglist(struct pmcraid_sglist *sglist)
3247{
3248 int i;
3249
3250 for (i = 0; i < sglist->num_sg; i++)
3251 __free_pages(sg_page(&(sglist->scatterlist[i])),
3252 sglist->order);
3253
3254 kfree(sglist);
3255}
3256
3257/**
3258 * pmcraid_alloc_sglist - Allocates memory for a SG list
3259 * @buflen: buffer length
3260 *
3261 * Allocates a DMA'able buffer in chunks and assembles a scatter/gather
3262 * list.
3263 *
3264 * Return value
c20c4267 3265 * pointer to sglist / NULL on failure
89a36810
AR
3266 */
3267static struct pmcraid_sglist *pmcraid_alloc_sglist(int buflen)
3268{
3269 struct pmcraid_sglist *sglist;
3270 struct scatterlist *scatterlist;
3271 struct page *page;
3272 int num_elem, i, j;
3273 int sg_size;
3274 int order;
3275 int bsize_elem;
3276
3277 sg_size = buflen / (PMCRAID_MAX_IOADLS - 1);
3278 order = (sg_size > 0) ? get_order(sg_size) : 0;
3279 bsize_elem = PAGE_SIZE * (1 << order);
3280
3281 /* Determine the actual number of sg entries needed */
3282 if (buflen % bsize_elem)
3283 num_elem = (buflen / bsize_elem) + 1;
3284 else
3285 num_elem = buflen / bsize_elem;
3286
3287 /* Allocate a scatter/gather list for the DMA */
3288 sglist = kzalloc(sizeof(struct pmcraid_sglist) +
3289 (sizeof(struct scatterlist) * (num_elem - 1)),
3290 GFP_KERNEL);
3291
3292 if (sglist == NULL)
3293 return NULL;
3294
3295 scatterlist = sglist->scatterlist;
3296 sg_init_table(scatterlist, num_elem);
3297 sglist->order = order;
3298 sglist->num_sg = num_elem;
3299 sg_size = buflen;
3300
3301 for (i = 0; i < num_elem; i++) {
592488a3 3302 page = alloc_pages(GFP_KERNEL|GFP_DMA|__GFP_ZERO, order);
89a36810
AR
3303 if (!page) {
3304 for (j = i - 1; j >= 0; j--)
3305 __free_pages(sg_page(&scatterlist[j]), order);
3306 kfree(sglist);
3307 return NULL;
3308 }
3309
3310 sg_set_page(&scatterlist[i], page,
3311 sg_size < bsize_elem ? sg_size : bsize_elem, 0);
3312 sg_size -= bsize_elem;
3313 }
3314
3315 return sglist;
3316}
3317
3318/**
3319 * pmcraid_copy_sglist - Copy user buffer to kernel buffer's SG list
3320 * @sglist: scatter/gather list pointer
3321 * @buffer: buffer pointer
3322 * @len: buffer length
3323 * @direction: data transfer direction
3324 *
3325 * Copy a user buffer into a buffer allocated by pmcraid_alloc_sglist
3326 *
3327 * Return value:
3328 * 0 on success / other on failure
3329 */
3330static int pmcraid_copy_sglist(
3331 struct pmcraid_sglist *sglist,
3332 unsigned long buffer,
3333 u32 len,
3334 int direction
3335)
3336{
3337 struct scatterlist *scatterlist;
3338 void *kaddr;
3339 int bsize_elem;
3340 int i;
3341 int rc = 0;
3342
3343 /* Determine the actual number of bytes per element */
3344 bsize_elem = PAGE_SIZE * (1 << sglist->order);
3345
3346 scatterlist = sglist->scatterlist;
3347
3348 for (i = 0; i < (len / bsize_elem); i++, buffer += bsize_elem) {
3349 struct page *page = sg_page(&scatterlist[i]);
3350
3351 kaddr = kmap(page);
3352 if (direction == DMA_TO_DEVICE)
3353 rc = __copy_from_user(kaddr,
3354 (void *)buffer,
3355 bsize_elem);
3356 else
3357 rc = __copy_to_user((void *)buffer, kaddr, bsize_elem);
3358
3359 kunmap(page);
3360
3361 if (rc) {
3362 pmcraid_err("failed to copy user data into sg list\n");
3363 return -EFAULT;
3364 }
3365
3366 scatterlist[i].length = bsize_elem;
3367 }
3368
3369 if (len % bsize_elem) {
3370 struct page *page = sg_page(&scatterlist[i]);
3371
3372 kaddr = kmap(page);
3373
3374 if (direction == DMA_TO_DEVICE)
3375 rc = __copy_from_user(kaddr,
3376 (void *)buffer,
3377 len % bsize_elem);
3378 else
3379 rc = __copy_to_user((void *)buffer,
3380 kaddr,
3381 len % bsize_elem);
3382
3383 kunmap(page);
3384
3385 scatterlist[i].length = len % bsize_elem;
3386 }
3387
3388 if (rc) {
3389 pmcraid_err("failed to copy user data into sg list\n");
3390 rc = -EFAULT;
3391 }
3392
3393 return rc;
3394}
3395
3396/**
3397 * pmcraid_queuecommand - Queue a mid-layer request
3398 * @scsi_cmd: scsi command struct
3399 * @done: done function
3400 *
3401 * This function queues a request generated by the mid-layer. Midlayer calls
3402 * this routine within host->lock. Some of the functions called by queuecommand
3403 * would use cmd block queue locks (free_pool_lock and pending_pool_lock)
3404 *
3405 * Return value:
3406 * 0 on success
3407 * SCSI_MLQUEUE_DEVICE_BUSY if device is busy
3408 * SCSI_MLQUEUE_HOST_BUSY if host is busy
3409 */
f281233d 3410static int pmcraid_queuecommand_lck(
89a36810
AR
3411 struct scsi_cmnd *scsi_cmd,
3412 void (*done) (struct scsi_cmnd *)
3413)
3414{
3415 struct pmcraid_instance *pinstance;
3416 struct pmcraid_resource_entry *res;
3417 struct pmcraid_ioarcb *ioarcb;
3418 struct pmcraid_cmd *cmd;
c20c4267 3419 u32 fw_version;
89a36810
AR
3420 int rc = 0;
3421
3422 pinstance =
3423 (struct pmcraid_instance *)scsi_cmd->device->host->hostdata;
c20c4267 3424 fw_version = be16_to_cpu(pinstance->inq_data->fw_version);
89a36810
AR
3425 scsi_cmd->scsi_done = done;
3426 res = scsi_cmd->device->hostdata;
3427 scsi_cmd->result = (DID_OK << 16);
3428
3429 /* if adapter is marked as dead, set result to DID_NO_CONNECT complete
3430 * the command
3431 */
3432 if (pinstance->ioa_state == IOA_STATE_DEAD) {
3433 pmcraid_info("IOA is dead, but queuecommand is scheduled\n");
3434 scsi_cmd->result = (DID_NO_CONNECT << 16);
3435 scsi_cmd->scsi_done(scsi_cmd);
3436 return 0;
3437 }
3438
3439 /* If IOA reset is in progress, can't queue the commands */
3440 if (pinstance->ioa_reset_in_progress)
3441 return SCSI_MLQUEUE_HOST_BUSY;
3442
c20c4267
AR
3443 /* Firmware doesn't support SYNCHRONIZE_CACHE command (0x35), complete
3444 * the command here itself with success return
3445 */
3446 if (scsi_cmd->cmnd[0] == SYNCHRONIZE_CACHE) {
3447 pmcraid_info("SYNC_CACHE(0x35), completing in driver itself\n");
3448 scsi_cmd->scsi_done(scsi_cmd);
3449 return 0;
3450 }
3451
89a36810
AR
3452 /* initialize the command and IOARCB to be sent to IOA */
3453 cmd = pmcraid_get_free_cmd(pinstance);
3454
3455 if (cmd == NULL) {
3456 pmcraid_err("free command block is not available\n");
3457 return SCSI_MLQUEUE_HOST_BUSY;
3458 }
3459
3460 cmd->scsi_cmd = scsi_cmd;
3461 ioarcb = &(cmd->ioa_cb->ioarcb);
3462 memcpy(ioarcb->cdb, scsi_cmd->cmnd, scsi_cmd->cmd_len);
3463 ioarcb->resource_handle = res->cfg_entry.resource_handle;
3464 ioarcb->request_type = REQ_TYPE_SCSI;
3465
c20c4267
AR
3466 /* set hrrq number where the IOA should respond to. Note that all cmds
3467 * generated internally uses hrrq_id 0, exception to this is the cmd
3468 * block of scsi_cmd which is re-used (e.g. cancel/abort), which uses
3469 * hrrq_id assigned here in queuecommand
3470 */
3471 ioarcb->hrrq_id = atomic_add_return(1, &(pinstance->last_message_id)) %
3472 pinstance->num_hrrq;
89a36810
AR
3473 cmd->cmd_done = pmcraid_io_done;
3474
3475 if (RES_IS_GSCSI(res->cfg_entry) || RES_IS_VSET(res->cfg_entry)) {
3476 if (scsi_cmd->underflow == 0)
3477 ioarcb->request_flags0 |= INHIBIT_UL_CHECK;
3478
3479 if (res->sync_reqd) {
3480 ioarcb->request_flags0 |= SYNC_COMPLETE;
3481 res->sync_reqd = 0;
3482 }
3483
3484 ioarcb->request_flags0 |= NO_LINK_DESCS;
50668633
CH
3485
3486 if (scsi_cmd->flags & SCMD_TAGGED)
3487 ioarcb->request_flags1 |= TASK_TAG_SIMPLE;
89a36810
AR
3488
3489 if (RES_IS_GSCSI(res->cfg_entry))
3490 ioarcb->request_flags1 |= DELAY_AFTER_RESET;
3491 }
3492
3493 rc = pmcraid_build_ioadl(pinstance, cmd);
3494
3495 pmcraid_info("command (%d) CDB[0] = %x for %x:%x:%x:%x\n",
3496 le32_to_cpu(ioarcb->response_handle) >> 2,
3497 scsi_cmd->cmnd[0], pinstance->host->unique_id,
3498 RES_IS_VSET(res->cfg_entry) ? PMCRAID_VSET_BUS_ID :
3499 PMCRAID_PHYS_BUS_ID,
3500 RES_IS_VSET(res->cfg_entry) ?
c20c4267
AR
3501 (fw_version <= PMCRAID_FW_VERSION_1 ?
3502 res->cfg_entry.unique_flags1 :
3503 res->cfg_entry.array_id & 0xFF) :
89a36810
AR
3504 RES_TARGET(res->cfg_entry.resource_address),
3505 RES_LUN(res->cfg_entry.resource_address));
3506
3507 if (likely(rc == 0)) {
3508 _pmcraid_fire_command(cmd);
3509 } else {
3510 pmcraid_err("queuecommand could not build ioadl\n");
3511 pmcraid_return_cmd(cmd);
3512 rc = SCSI_MLQUEUE_HOST_BUSY;
3513 }
3514
3515 return rc;
3516}
3517
f281233d
JG
3518static DEF_SCSI_QCMD(pmcraid_queuecommand)
3519
89a36810
AR
3520/**
3521 * pmcraid_open -char node "open" entry, allowed only users with admin access
3522 */
3523static int pmcraid_chr_open(struct inode *inode, struct file *filep)
3524{
3525 struct pmcraid_instance *pinstance;
3526
3527 if (!capable(CAP_SYS_ADMIN))
3528 return -EACCES;
3529
3530 /* Populate adapter instance * pointer for use by ioctl */
3531 pinstance = container_of(inode->i_cdev, struct pmcraid_instance, cdev);
3532 filep->private_data = pinstance;
3533
3534 return 0;
3535}
3536
89a36810
AR
3537/**
3538 * pmcraid_fasync - Async notifier registration from applications
3539 *
3540 * This function adds the calling process to a driver global queue. When an
3541 * event occurs, SIGIO will be sent to all processes in this queue.
3542 */
3543static int pmcraid_chr_fasync(int fd, struct file *filep, int mode)
3544{
3545 struct pmcraid_instance *pinstance;
3546 int rc;
3547
660bdddb 3548 pinstance = filep->private_data;
89a36810
AR
3549 mutex_lock(&pinstance->aen_queue_lock);
3550 rc = fasync_helper(fd, filep, mode, &pinstance->aen_queue);
3551 mutex_unlock(&pinstance->aen_queue_lock);
3552
3553 return rc;
3554}
3555
3556
3557/**
3558 * pmcraid_build_passthrough_ioadls - builds SG elements for passthrough
3559 * commands sent over IOCTL interface
3560 *
3561 * @cmd : pointer to struct pmcraid_cmd
3562 * @buflen : length of the request buffer
3563 * @direction : data transfer direction
3564 *
3565 * Return value
af901ca1 3566 * 0 on success, non-zero error code on failure
89a36810
AR
3567 */
3568static int pmcraid_build_passthrough_ioadls(
3569 struct pmcraid_cmd *cmd,
3570 int buflen,
3571 int direction
3572)
3573{
3574 struct pmcraid_sglist *sglist = NULL;
3575 struct scatterlist *sg = NULL;
3576 struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb;
3577 struct pmcraid_ioadl_desc *ioadl;
3578 int i;
3579
3580 sglist = pmcraid_alloc_sglist(buflen);
3581
3582 if (!sglist) {
3583 pmcraid_err("can't allocate memory for passthrough SGls\n");
3584 return -ENOMEM;
3585 }
3586
3587 sglist->num_dma_sg = pci_map_sg(cmd->drv_inst->pdev,
3588 sglist->scatterlist,
3589 sglist->num_sg, direction);
3590
3591 if (!sglist->num_dma_sg || sglist->num_dma_sg > PMCRAID_MAX_IOADLS) {
3592 dev_err(&cmd->drv_inst->pdev->dev,
3593 "Failed to map passthrough buffer!\n");
3594 pmcraid_free_sglist(sglist);
3595 return -EIO;
3596 }
3597
3598 cmd->sglist = sglist;
3599 ioarcb->request_flags0 |= NO_LINK_DESCS;
3600
3601 ioadl = pmcraid_init_ioadls(cmd, sglist->num_dma_sg);
3602
3603 /* Initialize IOADL descriptor addresses */
3604 for_each_sg(sglist->scatterlist, sg, sglist->num_dma_sg, i) {
3605 ioadl[i].data_len = cpu_to_le32(sg_dma_len(sg));
3606 ioadl[i].address = cpu_to_le64(sg_dma_address(sg));
3607 ioadl[i].flags = 0;
3608 }
3609
3610 /* setup the last descriptor */
88197966 3611 ioadl[i - 1].flags = IOADL_FLAGS_LAST_DESC;
89a36810
AR
3612
3613 return 0;
3614}
3615
3616
3617/**
3618 * pmcraid_release_passthrough_ioadls - release passthrough ioadls
3619 *
3620 * @cmd: pointer to struct pmcraid_cmd for which ioadls were allocated
3621 * @buflen: size of the request buffer
3622 * @direction: data transfer direction
3623 *
3624 * Return value
af901ca1 3625 * 0 on success, non-zero error code on failure
89a36810
AR
3626 */
3627static void pmcraid_release_passthrough_ioadls(
3628 struct pmcraid_cmd *cmd,
3629 int buflen,
3630 int direction
3631)
3632{
3633 struct pmcraid_sglist *sglist = cmd->sglist;
3634
3635 if (buflen > 0) {
3636 pci_unmap_sg(cmd->drv_inst->pdev,
3637 sglist->scatterlist,
3638 sglist->num_sg,
3639 direction);
3640 pmcraid_free_sglist(sglist);
3641 cmd->sglist = NULL;
3642 }
3643}
3644
3645/**
3646 * pmcraid_ioctl_passthrough - handling passthrough IOCTL commands
3647 *
3648 * @pinstance: pointer to adapter instance structure
3649 * @cmd: ioctl code
3650 * @arg: pointer to pmcraid_passthrough_buffer user buffer
3651 *
3652 * Return value
af901ca1 3653 * 0 on success, non-zero error code on failure
89a36810
AR
3654 */
3655static long pmcraid_ioctl_passthrough(
3656 struct pmcraid_instance *pinstance,
3657 unsigned int ioctl_cmd,
3658 unsigned int buflen,
3659 unsigned long arg
3660)
3661{
3662 struct pmcraid_passthrough_ioctl_buffer *buffer;
3663 struct pmcraid_ioarcb *ioarcb;
3664 struct pmcraid_cmd *cmd;
3665 struct pmcraid_cmd *cancel_cmd;
3666 unsigned long request_buffer;
3667 unsigned long request_offset;
3668 unsigned long lock_flags;
592488a3 3669 void *ioasa;
c20c4267 3670 u32 ioasc;
89a36810
AR
3671 int request_size;
3672 int buffer_size;
3673 u8 access, direction;
3674 int rc = 0;
3675
3676 /* If IOA reset is in progress, wait 10 secs for reset to complete */
3677 if (pinstance->ioa_reset_in_progress) {
3678 rc = wait_event_interruptible_timeout(
3679 pinstance->reset_wait_q,
3680 !pinstance->ioa_reset_in_progress,
3681 msecs_to_jiffies(10000));
3682
3683 if (!rc)
3684 return -ETIMEDOUT;
3685 else if (rc < 0)
3686 return -ERESTARTSYS;
3687 }
3688
3689 /* If adapter is not in operational state, return error */
3690 if (pinstance->ioa_state != IOA_STATE_OPERATIONAL) {
3691 pmcraid_err("IOA is not operational\n");
3692 return -ENOTTY;
3693 }
3694
3695 buffer_size = sizeof(struct pmcraid_passthrough_ioctl_buffer);
3696 buffer = kmalloc(buffer_size, GFP_KERNEL);
3697
3698 if (!buffer) {
3699 pmcraid_err("no memory for passthrough buffer\n");
3700 return -ENOMEM;
3701 }
3702
3703 request_offset =
3704 offsetof(struct pmcraid_passthrough_ioctl_buffer, request_buffer);
3705
3706 request_buffer = arg + request_offset;
3707
3708 rc = __copy_from_user(buffer,
3709 (struct pmcraid_passthrough_ioctl_buffer *) arg,
3710 sizeof(struct pmcraid_passthrough_ioctl_buffer));
592488a3
AR
3711
3712 ioasa =
3713 (void *)(arg +
3714 offsetof(struct pmcraid_passthrough_ioctl_buffer, ioasa));
3715
89a36810
AR
3716 if (rc) {
3717 pmcraid_err("ioctl: can't copy passthrough buffer\n");
3718 rc = -EFAULT;
3719 goto out_free_buffer;
3720 }
3721
3722 request_size = buffer->ioarcb.data_transfer_length;
3723
3724 if (buffer->ioarcb.request_flags0 & TRANSFER_DIR_WRITE) {
3725 access = VERIFY_READ;
3726 direction = DMA_TO_DEVICE;
3727 } else {
3728 access = VERIFY_WRITE;
3729 direction = DMA_FROM_DEVICE;
3730 }
3731
3732 if (request_size > 0) {
3733 rc = access_ok(access, arg, request_offset + request_size);
3734
3735 if (!rc) {
3736 rc = -EFAULT;
3737 goto out_free_buffer;
3738 }
5f6279da
DR
3739 } else if (request_size < 0) {
3740 rc = -EINVAL;
3741 goto out_free_buffer;
89a36810
AR
3742 }
3743
3744 /* check if we have any additional command parameters */
3745 if (buffer->ioarcb.add_cmd_param_length > PMCRAID_ADD_CMD_PARAM_LEN) {
3746 rc = -EINVAL;
3747 goto out_free_buffer;
3748 }
3749
3750 cmd = pmcraid_get_free_cmd(pinstance);
3751
3752 if (!cmd) {
3753 pmcraid_err("free command block is not available\n");
3754 rc = -ENOMEM;
3755 goto out_free_buffer;
3756 }
3757
3758 cmd->scsi_cmd = NULL;
3759 ioarcb = &(cmd->ioa_cb->ioarcb);
3760
3761 /* Copy the user-provided IOARCB stuff field by field */
3762 ioarcb->resource_handle = buffer->ioarcb.resource_handle;
3763 ioarcb->data_transfer_length = buffer->ioarcb.data_transfer_length;
3764 ioarcb->cmd_timeout = buffer->ioarcb.cmd_timeout;
3765 ioarcb->request_type = buffer->ioarcb.request_type;
3766 ioarcb->request_flags0 = buffer->ioarcb.request_flags0;
3767 ioarcb->request_flags1 = buffer->ioarcb.request_flags1;
3768 memcpy(ioarcb->cdb, buffer->ioarcb.cdb, PMCRAID_MAX_CDB_LEN);
3769
3770 if (buffer->ioarcb.add_cmd_param_length) {
3771 ioarcb->add_cmd_param_length =
3772 buffer->ioarcb.add_cmd_param_length;
3773 ioarcb->add_cmd_param_offset =
3774 buffer->ioarcb.add_cmd_param_offset;
3775 memcpy(ioarcb->add_data.u.add_cmd_params,
3776 buffer->ioarcb.add_data.u.add_cmd_params,
3777 buffer->ioarcb.add_cmd_param_length);
3778 }
3779
c20c4267
AR
3780 /* set hrrq number where the IOA should respond to. Note that all cmds
3781 * generated internally uses hrrq_id 0, exception to this is the cmd
3782 * block of scsi_cmd which is re-used (e.g. cancel/abort), which uses
3783 * hrrq_id assigned here in queuecommand
3784 */
3785 ioarcb->hrrq_id = atomic_add_return(1, &(pinstance->last_message_id)) %
3786 pinstance->num_hrrq;
3787
89a36810
AR
3788 if (request_size) {
3789 rc = pmcraid_build_passthrough_ioadls(cmd,
3790 request_size,
3791 direction);
3792 if (rc) {
3793 pmcraid_err("couldn't build passthrough ioadls\n");
3794 goto out_free_buffer;
3795 }
b5b51544
DR
3796 } else if (request_size < 0) {
3797 rc = -EINVAL;
3798 goto out_free_buffer;
89a36810
AR
3799 }
3800
3801 /* If data is being written into the device, copy the data from user
3802 * buffers
3803 */
3804 if (direction == DMA_TO_DEVICE && request_size > 0) {
3805 rc = pmcraid_copy_sglist(cmd->sglist,
3806 request_buffer,
3807 request_size,
3808 direction);
3809 if (rc) {
3810 pmcraid_err("failed to copy user buffer\n");
3811 goto out_free_sglist;
3812 }
3813 }
3814
3815 /* passthrough ioctl is a blocking command so, put the user to sleep
3816 * until timeout. Note that a timeout value of 0 means, do timeout.
3817 */
3818 cmd->cmd_done = pmcraid_internal_done;
3819 init_completion(&cmd->wait_for_completion);
3820 cmd->completion_req = 1;
3821
3822 pmcraid_info("command(%d) (CDB[0] = %x) for %x\n",
3823 le32_to_cpu(cmd->ioa_cb->ioarcb.response_handle) >> 2,
3824 cmd->ioa_cb->ioarcb.cdb[0],
3825 le32_to_cpu(cmd->ioa_cb->ioarcb.resource_handle));
3826
3827 spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
3828 _pmcraid_fire_command(cmd);
3829 spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
3830
c20c4267
AR
3831 /* NOTE ! Remove the below line once abort_task is implemented
3832 * in firmware. This line disables ioctl command timeout handling logic
3833 * similar to IO command timeout handling, making ioctl commands to wait
3834 * until the command completion regardless of timeout value specified in
3835 * ioarcb
3836 */
3837 buffer->ioarcb.cmd_timeout = 0;
3838
89a36810
AR
3839 /* If command timeout is specified put caller to wait till that time,
3840 * otherwise it would be blocking wait. If command gets timed out, it
3841 * will be aborted.
3842 */
3843 if (buffer->ioarcb.cmd_timeout == 0) {
3844 wait_for_completion(&cmd->wait_for_completion);
3845 } else if (!wait_for_completion_timeout(
3846 &cmd->wait_for_completion,
3847 msecs_to_jiffies(buffer->ioarcb.cmd_timeout * 1000))) {
3848
3849 pmcraid_info("aborting cmd %d (CDB[0] = %x) due to timeout\n",
3850 le32_to_cpu(cmd->ioa_cb->ioarcb.response_handle >> 2),
3851 cmd->ioa_cb->ioarcb.cdb[0]);
3852
89a36810
AR
3853 spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
3854 cancel_cmd = pmcraid_abort_cmd(cmd);
3855 spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
3856
3857 if (cancel_cmd) {
3858 wait_for_completion(&cancel_cmd->wait_for_completion);
c20c4267 3859 ioasc = cancel_cmd->ioa_cb->ioasa.ioasc;
89a36810 3860 pmcraid_return_cmd(cancel_cmd);
c20c4267
AR
3861
3862 /* if abort task couldn't find the command i.e it got
3863 * completed prior to aborting, return good completion.
25985edc 3864 * if command got aborted successfully or there was IOA
c20c4267
AR
3865 * reset due to abort task itself getting timedout then
3866 * return -ETIMEDOUT
3867 */
3868 if (ioasc == PMCRAID_IOASC_IOA_WAS_RESET ||
3869 PMCRAID_IOASC_SENSE_KEY(ioasc) == 0x00) {
3870 if (ioasc != PMCRAID_IOASC_GC_IOARCB_NOTFOUND)
3871 rc = -ETIMEDOUT;
3872 goto out_handle_response;
3873 }
89a36810
AR
3874 }
3875
c20c4267
AR
3876 /* no command block for abort task or abort task failed to abort
3877 * the IOARCB, then wait for 150 more seconds and initiate reset
3878 * sequence after timeout
3879 */
3880 if (!wait_for_completion_timeout(
3881 &cmd->wait_for_completion,
3882 msecs_to_jiffies(150 * 1000))) {
3883 pmcraid_reset_bringup(cmd->drv_inst);
3884 rc = -ETIMEDOUT;
3885 }
89a36810
AR
3886 }
3887
c20c4267 3888out_handle_response:
592488a3
AR
3889 /* copy entire IOASA buffer and return IOCTL success.
3890 * If copying IOASA to user-buffer fails, return
89a36810
AR
3891 * EFAULT
3892 */
592488a3
AR
3893 if (copy_to_user(ioasa, &cmd->ioa_cb->ioasa,
3894 sizeof(struct pmcraid_ioasa))) {
3895 pmcraid_err("failed to copy ioasa buffer to user\n");
3896 rc = -EFAULT;
89a36810 3897 }
c20c4267 3898
89a36810
AR
3899 /* If the data transfer was from device, copy the data onto user
3900 * buffers
3901 */
3902 else if (direction == DMA_FROM_DEVICE && request_size > 0) {
3903 rc = pmcraid_copy_sglist(cmd->sglist,
3904 request_buffer,
3905 request_size,
3906 direction);
3907 if (rc) {
3908 pmcraid_err("failed to copy user buffer\n");
3909 rc = -EFAULT;
3910 }
3911 }
3912
3913out_free_sglist:
3914 pmcraid_release_passthrough_ioadls(cmd, request_size, direction);
3915 pmcraid_return_cmd(cmd);
3916
3917out_free_buffer:
3918 kfree(buffer);
3919
3920 return rc;
3921}
3922
3923
3924
3925
3926/**
3927 * pmcraid_ioctl_driver - ioctl handler for commands handled by driver itself
3928 *
3929 * @pinstance: pointer to adapter instance structure
3930 * @cmd: ioctl command passed in
3931 * @buflen: length of user_buffer
3932 * @user_buffer: user buffer pointer
3933 *
3934 * Return Value
3935 * 0 in case of success, otherwise appropriate error code
3936 */
3937static long pmcraid_ioctl_driver(
3938 struct pmcraid_instance *pinstance,
3939 unsigned int cmd,
3940 unsigned int buflen,
3941 void __user *user_buffer
3942)
3943{
3944 int rc = -ENOSYS;
3945
3946 if (!access_ok(VERIFY_READ, user_buffer, _IOC_SIZE(cmd))) {
c20c4267 3947 pmcraid_err("ioctl_driver: access fault in request buffer\n");
89a36810
AR
3948 return -EFAULT;
3949 }
3950
3951 switch (cmd) {
3952 case PMCRAID_IOCTL_RESET_ADAPTER:
3953 pmcraid_reset_bringup(pinstance);
3954 rc = 0;
3955 break;
3956
3957 default:
3958 break;
3959 }
3960
3961 return rc;
3962}
3963
3964/**
3965 * pmcraid_check_ioctl_buffer - check for proper access to user buffer
3966 *
3967 * @cmd: ioctl command
3968 * @arg: user buffer
3969 * @hdr: pointer to kernel memory for pmcraid_ioctl_header
3970 *
3971 * Return Value
3972 * negetive error code if there are access issues, otherwise zero.
3973 * Upon success, returns ioctl header copied out of user buffer.
3974 */
3975
3976static int pmcraid_check_ioctl_buffer(
3977 int cmd,
3978 void __user *arg,
3979 struct pmcraid_ioctl_header *hdr
3980)
3981{
3982 int rc = 0;
3983 int access = VERIFY_READ;
3984
3985 if (copy_from_user(hdr, arg, sizeof(struct pmcraid_ioctl_header))) {
3986 pmcraid_err("couldn't copy ioctl header from user buffer\n");
3987 return -EFAULT;
3988 }
3989
3990 /* check for valid driver signature */
3991 rc = memcmp(hdr->signature,
3992 PMCRAID_IOCTL_SIGNATURE,
3993 sizeof(hdr->signature));
3994 if (rc) {
3995 pmcraid_err("signature verification failed\n");
3996 return -EINVAL;
3997 }
3998
89a36810
AR
3999 /* check for appropriate buffer access */
4000 if ((_IOC_DIR(cmd) & _IOC_READ) == _IOC_READ)
4001 access = VERIFY_WRITE;
4002
4003 rc = access_ok(access,
4004 (arg + sizeof(struct pmcraid_ioctl_header)),
4005 hdr->buffer_length);
4006 if (!rc) {
4007 pmcraid_err("access failed for user buffer of size %d\n",
4008 hdr->buffer_length);
4009 return -EFAULT;
4010 }
4011
4012 return 0;
4013}
4014
4015/**
4016 * pmcraid_ioctl - char node ioctl entry point
4017 */
4018static long pmcraid_chr_ioctl(
4019 struct file *filep,
4020 unsigned int cmd,
4021 unsigned long arg
4022)
4023{
4024 struct pmcraid_instance *pinstance = NULL;
4025 struct pmcraid_ioctl_header *hdr = NULL;
4026 int retval = -ENOTTY;
4027
a63ec376 4028 hdr = kmalloc(sizeof(struct pmcraid_ioctl_header), GFP_KERNEL);
89a36810
AR
4029
4030 if (!hdr) {
4f91b114 4031 pmcraid_err("failed to allocate memory for ioctl header\n");
89a36810
AR
4032 return -ENOMEM;
4033 }
4034
4035 retval = pmcraid_check_ioctl_buffer(cmd, (void *)arg, hdr);
4036
4037 if (retval) {
4038 pmcraid_info("chr_ioctl: header check failed\n");
4039 kfree(hdr);
4040 return retval;
4041 }
4042
660bdddb 4043 pinstance = filep->private_data;
89a36810
AR
4044
4045 if (!pinstance) {
4046 pmcraid_info("adapter instance is not found\n");
4047 kfree(hdr);
4048 return -ENOTTY;
4049 }
4050
4051 switch (_IOC_TYPE(cmd)) {
4052
4053 case PMCRAID_PASSTHROUGH_IOCTL:
4054 /* If ioctl code is to download microcode, we need to block
4055 * mid-layer requests.
4056 */
4057 if (cmd == PMCRAID_IOCTL_DOWNLOAD_MICROCODE)
4058 scsi_block_requests(pinstance->host);
4059
4060 retval = pmcraid_ioctl_passthrough(pinstance,
4061 cmd,
4062 hdr->buffer_length,
4063 arg);
4064
4065 if (cmd == PMCRAID_IOCTL_DOWNLOAD_MICROCODE)
4066 scsi_unblock_requests(pinstance->host);
4067 break;
4068
4069 case PMCRAID_DRIVER_IOCTL:
4070 arg += sizeof(struct pmcraid_ioctl_header);
4071 retval = pmcraid_ioctl_driver(pinstance,
4072 cmd,
4073 hdr->buffer_length,
4074 (void __user *)arg);
4075 break;
4076
4077 default:
4078 retval = -ENOTTY;
4079 break;
4080 }
4081
4082 kfree(hdr);
4083
4084 return retval;
4085}
4086
4087/**
4088 * File operations structure for management interface
4089 */
4090static const struct file_operations pmcraid_fops = {
4091 .owner = THIS_MODULE,
4092 .open = pmcraid_chr_open,
89a36810
AR
4093 .fasync = pmcraid_chr_fasync,
4094 .unlocked_ioctl = pmcraid_chr_ioctl,
4095#ifdef CONFIG_COMPAT
4096 .compat_ioctl = pmcraid_chr_ioctl,
4097#endif
6038f373 4098 .llseek = noop_llseek,
89a36810
AR
4099};
4100
4101
4102
4103
4104/**
4105 * pmcraid_show_log_level - Display adapter's error logging level
4106 * @dev: class device struct
4107 * @buf: buffer
4108 *
4109 * Return value:
4110 * number of bytes printed to buffer
4111 */
4112static ssize_t pmcraid_show_log_level(
4113 struct device *dev,
4114 struct device_attribute *attr,
4115 char *buf)
4116{
4117 struct Scsi_Host *shost = class_to_shost(dev);
4118 struct pmcraid_instance *pinstance =
4119 (struct pmcraid_instance *)shost->hostdata;
4120 return snprintf(buf, PAGE_SIZE, "%d\n", pinstance->current_log_level);
4121}
4122
4123/**
4124 * pmcraid_store_log_level - Change the adapter's error logging level
4125 * @dev: class device struct
4126 * @buf: buffer
4127 * @count: not used
4128 *
4129 * Return value:
4130 * number of bytes printed to buffer
4131 */
4132static ssize_t pmcraid_store_log_level(
4133 struct device *dev,
4134 struct device_attribute *attr,
4135 const char *buf,
4136 size_t count
4137)
4138{
4139 struct Scsi_Host *shost;
4140 struct pmcraid_instance *pinstance;
f7c65af5 4141 u8 val;
89a36810 4142
f7c65af5 4143 if (kstrtou8(buf, 10, &val))
89a36810
AR
4144 return -EINVAL;
4145 /* log-level should be from 0 to 2 */
4146 if (val > 2)
4147 return -EINVAL;
4148
4149 shost = class_to_shost(dev);
4150 pinstance = (struct pmcraid_instance *)shost->hostdata;
4151 pinstance->current_log_level = val;
4152
4153 return strlen(buf);
4154}
4155
4156static struct device_attribute pmcraid_log_level_attr = {
4157 .attr = {
4158 .name = "log_level",
4159 .mode = S_IRUGO | S_IWUSR,
4160 },
4161 .show = pmcraid_show_log_level,
4162 .store = pmcraid_store_log_level,
4163};
4164
4165/**
4166 * pmcraid_show_drv_version - Display driver version
4167 * @dev: class device struct
4168 * @buf: buffer
4169 *
4170 * Return value:
4171 * number of bytes printed to buffer
4172 */
4173static ssize_t pmcraid_show_drv_version(
4174 struct device *dev,
4175 struct device_attribute *attr,
4176 char *buf
4177)
4178{
a1b66665
MM
4179 return snprintf(buf, PAGE_SIZE, "version: %s\n",
4180 PMCRAID_DRIVER_VERSION);
89a36810
AR
4181}
4182
4183static struct device_attribute pmcraid_driver_version_attr = {
4184 .attr = {
4185 .name = "drv_version",
4186 .mode = S_IRUGO,
4187 },
4188 .show = pmcraid_show_drv_version,
4189};
4190
4191/**
4192 * pmcraid_show_io_adapter_id - Display driver assigned adapter id
4193 * @dev: class device struct
4194 * @buf: buffer
4195 *
4196 * Return value:
4197 * number of bytes printed to buffer
4198 */
4199static ssize_t pmcraid_show_adapter_id(
4200 struct device *dev,
4201 struct device_attribute *attr,
4202 char *buf
4203)
4204{
4205 struct Scsi_Host *shost = class_to_shost(dev);
4206 struct pmcraid_instance *pinstance =
4207 (struct pmcraid_instance *)shost->hostdata;
4208 u32 adapter_id = (pinstance->pdev->bus->number << 8) |
4209 pinstance->pdev->devfn;
4210 u32 aen_group = pmcraid_event_family.id;
4211
4212 return snprintf(buf, PAGE_SIZE,
4213 "adapter id: %d\nminor: %d\naen group: %d\n",
4214 adapter_id, MINOR(pinstance->cdev.dev), aen_group);
4215}
4216
4217static struct device_attribute pmcraid_adapter_id_attr = {
4218 .attr = {
4219 .name = "adapter_id",
5a0ccb6b 4220 .mode = S_IRUGO,
89a36810
AR
4221 },
4222 .show = pmcraid_show_adapter_id,
4223};
4224
4225static struct device_attribute *pmcraid_host_attrs[] = {
4226 &pmcraid_log_level_attr,
4227 &pmcraid_driver_version_attr,
4228 &pmcraid_adapter_id_attr,
4229 NULL,
4230};
4231
4232
4233/* host template structure for pmcraid driver */
4234static struct scsi_host_template pmcraid_host_template = {
4235 .module = THIS_MODULE,
4236 .name = PMCRAID_DRIVER_NAME,
4237 .queuecommand = pmcraid_queuecommand,
4238 .eh_abort_handler = pmcraid_eh_abort_handler,
4239 .eh_bus_reset_handler = pmcraid_eh_bus_reset_handler,
4240 .eh_target_reset_handler = pmcraid_eh_target_reset_handler,
4241 .eh_device_reset_handler = pmcraid_eh_device_reset_handler,
4242 .eh_host_reset_handler = pmcraid_eh_host_reset_handler,
4243
4244 .slave_alloc = pmcraid_slave_alloc,
4245 .slave_configure = pmcraid_slave_configure,
4246 .slave_destroy = pmcraid_slave_destroy,
4247 .change_queue_depth = pmcraid_change_queue_depth,
89a36810
AR
4248 .can_queue = PMCRAID_MAX_IO_CMD,
4249 .this_id = -1,
4250 .sg_tablesize = PMCRAID_MAX_IOADLS,
4251 .max_sectors = PMCRAID_IOA_MAX_SECTORS,
54b2b50c 4252 .no_write_same = 1,
89a36810
AR
4253 .cmd_per_lun = PMCRAID_MAX_CMD_PER_LUN,
4254 .use_clustering = ENABLE_CLUSTERING,
4255 .shost_attrs = pmcraid_host_attrs,
2ecb204d
CH
4256 .proc_name = PMCRAID_DRIVER_NAME,
4257 .use_blk_tags = 1,
89a36810
AR
4258};
4259
c20c4267
AR
4260/*
4261 * pmcraid_isr_msix - implements MSI-X interrupt handling routine
4262 * @irq: interrupt vector number
4263 * @dev_id: pointer hrrq_vector
89a36810
AR
4264 *
4265 * Return Value
c20c4267 4266 * IRQ_HANDLED if interrupt is handled or IRQ_NONE if ignored
89a36810 4267 */
c20c4267
AR
4268
4269static irqreturn_t pmcraid_isr_msix(int irq, void *dev_id)
89a36810 4270{
c20c4267
AR
4271 struct pmcraid_isr_param *hrrq_vector;
4272 struct pmcraid_instance *pinstance;
4273 unsigned long lock_flags;
4274 u32 intrs_val;
4275 int hrrq_id;
4276
4277 hrrq_vector = (struct pmcraid_isr_param *)dev_id;
4278 hrrq_id = hrrq_vector->hrrq_id;
4279 pinstance = hrrq_vector->drv_inst;
4280
4281 if (!hrrq_id) {
4282 /* Read the interrupt */
4283 intrs_val = pmcraid_read_interrupts(pinstance);
4284 if (intrs_val &&
4285 ((ioread32(pinstance->int_regs.host_ioa_interrupt_reg)
4286 & DOORBELL_INTR_MSIX_CLR) == 0)) {
4287 /* Any error interrupts including unit_check,
4288 * initiate IOA reset.In case of unit check indicate
4289 * to reset_sequence that IOA unit checked and prepare
4290 * for a dump during reset sequence
4291 */
4292 if (intrs_val & PMCRAID_ERROR_INTERRUPTS) {
4293 if (intrs_val & INTRS_IOA_UNIT_CHECK)
4294 pinstance->ioa_unit_check = 1;
4295
4296 pmcraid_err("ISR: error interrupts: %x \
4297 initiating reset\n", intrs_val);
4298 spin_lock_irqsave(pinstance->host->host_lock,
4299 lock_flags);
4300 pmcraid_initiate_reset(pinstance);
4301 spin_unlock_irqrestore(
4302 pinstance->host->host_lock,
4303 lock_flags);
4304 }
4305 /* If interrupt was as part of the ioa initialization,
4306 * clear it. Delete the timer and wakeup the
4307 * reset engine to proceed with reset sequence
4308 */
4309 if (intrs_val & INTRS_TRANSITION_TO_OPERATIONAL)
4310 pmcraid_clr_trans_op(pinstance);
4311
4312 /* Clear the interrupt register by writing
4313 * to host to ioa doorbell. Once done
4314 * FW will clear the interrupt.
4315 */
4316 iowrite32(DOORBELL_INTR_MSIX_CLR,
4317 pinstance->int_regs.host_ioa_interrupt_reg);
4318 ioread32(pinstance->int_regs.host_ioa_interrupt_reg);
4319
89a36810 4320
c20c4267
AR
4321 }
4322 }
4323
4324 tasklet_schedule(&(pinstance->isr_tasklet[hrrq_id]));
4325
4326 return IRQ_HANDLED;
89a36810
AR
4327}
4328
4329/**
c20c4267 4330 * pmcraid_isr - implements legacy interrupt handling routine
89a36810
AR
4331 *
4332 * @irq: interrupt vector number
4333 * @dev_id: pointer hrrq_vector
4334 *
4335 * Return Value
4336 * IRQ_HANDLED if interrupt is handled or IRQ_NONE if ignored
4337 */
4338static irqreturn_t pmcraid_isr(int irq, void *dev_id)
4339{
4340 struct pmcraid_isr_param *hrrq_vector;
4341 struct pmcraid_instance *pinstance;
89a36810 4342 u32 intrs;
c20c4267
AR
4343 unsigned long lock_flags;
4344 int hrrq_id = 0;
89a36810
AR
4345
4346 /* In case of legacy interrupt mode where interrupts are shared across
4347 * isrs, it may be possible that the current interrupt is not from IOA
4348 */
4349 if (!dev_id) {
4350 printk(KERN_INFO "%s(): NULL host pointer\n", __func__);
4351 return IRQ_NONE;
4352 }
89a36810
AR
4353 hrrq_vector = (struct pmcraid_isr_param *)dev_id;
4354 pinstance = hrrq_vector->drv_inst;
4355
89a36810
AR
4356 intrs = pmcraid_read_interrupts(pinstance);
4357
c20c4267 4358 if (unlikely((intrs & PMCRAID_PCI_INTERRUPTS) == 0))
89a36810 4359 return IRQ_NONE;
89a36810
AR
4360
4361 /* Any error interrupts including unit_check, initiate IOA reset.
4362 * In case of unit check indicate to reset_sequence that IOA unit
4363 * checked and prepare for a dump during reset sequence
4364 */
4365 if (intrs & PMCRAID_ERROR_INTERRUPTS) {
4366
4367 if (intrs & INTRS_IOA_UNIT_CHECK)
4368 pinstance->ioa_unit_check = 1;
4369
4370 iowrite32(intrs,
4371 pinstance->int_regs.ioa_host_interrupt_clr_reg);
4372 pmcraid_err("ISR: error interrupts: %x initiating reset\n",
4373 intrs);
c20c4267
AR
4374 intrs = ioread32(
4375 pinstance->int_regs.ioa_host_interrupt_clr_reg);
4376 spin_lock_irqsave(pinstance->host->host_lock, lock_flags);
89a36810 4377 pmcraid_initiate_reset(pinstance);
c20c4267 4378 spin_unlock_irqrestore(pinstance->host->host_lock, lock_flags);
89a36810 4379 } else {
c20c4267
AR
4380 /* If interrupt was as part of the ioa initialization,
4381 * clear. Delete the timer and wakeup the
4382 * reset engine to proceed with reset sequence
4383 */
4384 if (intrs & INTRS_TRANSITION_TO_OPERATIONAL) {
4385 pmcraid_clr_trans_op(pinstance);
4386 } else {
4387 iowrite32(intrs,
4388 pinstance->int_regs.ioa_host_interrupt_clr_reg);
4389 ioread32(
4390 pinstance->int_regs.ioa_host_interrupt_clr_reg);
89a36810 4391
c20c4267
AR
4392 tasklet_schedule(
4393 &(pinstance->isr_tasklet[hrrq_id]));
4394 }
4395 }
89a36810
AR
4396
4397 return IRQ_HANDLED;
4398}
4399
4400
4401/**
4402 * pmcraid_worker_function - worker thread function
4403 *
4404 * @workp: pointer to struct work queue
4405 *
4406 * Return Value
4407 * None
4408 */
4409
4410static void pmcraid_worker_function(struct work_struct *workp)
4411{
4412 struct pmcraid_instance *pinstance;
4413 struct pmcraid_resource_entry *res;
4414 struct pmcraid_resource_entry *temp;
4415 struct scsi_device *sdev;
4416 unsigned long lock_flags;
4417 unsigned long host_lock_flags;
c20c4267 4418 u16 fw_version;
89a36810
AR
4419 u8 bus, target, lun;
4420
4421 pinstance = container_of(workp, struct pmcraid_instance, worker_q);
4422 /* add resources only after host is added into system */
4423 if (!atomic_read(&pinstance->expose_resources))
4424 return;
4425
c20c4267
AR
4426 fw_version = be16_to_cpu(pinstance->inq_data->fw_version);
4427
89a36810
AR
4428 spin_lock_irqsave(&pinstance->resource_lock, lock_flags);
4429 list_for_each_entry_safe(res, temp, &pinstance->used_res_q, queue) {
4430
4431 if (res->change_detected == RES_CHANGE_DEL && res->scsi_dev) {
4432 sdev = res->scsi_dev;
4433
4434 /* host_lock must be held before calling
4435 * scsi_device_get
4436 */
4437 spin_lock_irqsave(pinstance->host->host_lock,
4438 host_lock_flags);
4439 if (!scsi_device_get(sdev)) {
4440 spin_unlock_irqrestore(
4441 pinstance->host->host_lock,
4442 host_lock_flags);
4443 pmcraid_info("deleting %x from midlayer\n",
4444 res->cfg_entry.resource_address);
4445 list_move_tail(&res->queue,
4446 &pinstance->free_res_q);
4447 spin_unlock_irqrestore(
4448 &pinstance->resource_lock,
4449 lock_flags);
4450 scsi_remove_device(sdev);
4451 scsi_device_put(sdev);
4452 spin_lock_irqsave(&pinstance->resource_lock,
4453 lock_flags);
4454 res->change_detected = 0;
4455 } else {
4456 spin_unlock_irqrestore(
4457 pinstance->host->host_lock,
4458 host_lock_flags);
4459 }
4460 }
4461 }
4462
4463 list_for_each_entry(res, &pinstance->used_res_q, queue) {
4464
4465 if (res->change_detected == RES_CHANGE_ADD) {
4466
c20c4267
AR
4467 if (!pmcraid_expose_resource(fw_version,
4468 &res->cfg_entry))
89a36810
AR
4469 continue;
4470
4471 if (RES_IS_VSET(res->cfg_entry)) {
4472 bus = PMCRAID_VSET_BUS_ID;
c20c4267
AR
4473 if (fw_version <= PMCRAID_FW_VERSION_1)
4474 target = res->cfg_entry.unique_flags1;
4475 else
4476 target = res->cfg_entry.array_id & 0xFF;
89a36810
AR
4477 lun = PMCRAID_VSET_LUN_ID;
4478 } else {
4479 bus = PMCRAID_PHYS_BUS_ID;
4480 target =
4481 RES_TARGET(
4482 res->cfg_entry.resource_address);
4483 lun = RES_LUN(res->cfg_entry.resource_address);
4484 }
4485
4486 res->change_detected = 0;
4487 spin_unlock_irqrestore(&pinstance->resource_lock,
4488 lock_flags);
4489 scsi_add_device(pinstance->host, bus, target, lun);
4490 spin_lock_irqsave(&pinstance->resource_lock,
4491 lock_flags);
4492 }
4493 }
4494
4495 spin_unlock_irqrestore(&pinstance->resource_lock, lock_flags);
4496}
4497
4498/**
4499 * pmcraid_tasklet_function - Tasklet function
4500 *
4501 * @instance: pointer to msix param structure
4502 *
4503 * Return Value
4504 * None
4505 */
c20c4267 4506static void pmcraid_tasklet_function(unsigned long instance)
89a36810
AR
4507{
4508 struct pmcraid_isr_param *hrrq_vector;
4509 struct pmcraid_instance *pinstance;
4510 unsigned long hrrq_lock_flags;
4511 unsigned long pending_lock_flags;
4512 unsigned long host_lock_flags;
4513 spinlock_t *lockp; /* hrrq buffer lock */
4514 int id;
89a36810
AR
4515 __le32 resp;
4516
4517 hrrq_vector = (struct pmcraid_isr_param *)instance;
4518 pinstance = hrrq_vector->drv_inst;
4519 id = hrrq_vector->hrrq_id;
4520 lockp = &(pinstance->hrrq_lock[id]);
89a36810
AR
4521
4522 /* loop through each of the commands responded by IOA. Each HRRQ buf is
4523 * protected by its own lock. Traversals must be done within this lock
4524 * as there may be multiple tasklets running on multiple CPUs. Note
4525 * that the lock is held just for picking up the response handle and
4526 * manipulating hrrq_curr/toggle_bit values.
4527 */
4528 spin_lock_irqsave(lockp, hrrq_lock_flags);
4529
4530 resp = le32_to_cpu(*(pinstance->hrrq_curr[id]));
4531
4532 while ((resp & HRRQ_TOGGLE_BIT) ==
4533 pinstance->host_toggle_bit[id]) {
4534
4535 int cmd_index = resp >> 2;
4536 struct pmcraid_cmd *cmd = NULL;
4537
89a36810
AR
4538 if (pinstance->hrrq_curr[id] < pinstance->hrrq_end[id]) {
4539 pinstance->hrrq_curr[id]++;
4540 } else {
4541 pinstance->hrrq_curr[id] = pinstance->hrrq_start[id];
4542 pinstance->host_toggle_bit[id] ^= 1u;
4543 }
4544
c20c4267
AR
4545 if (cmd_index >= PMCRAID_MAX_CMD) {
4546 /* In case of invalid response handle, log message */
4547 pmcraid_err("Invalid response handle %d\n", cmd_index);
4548 resp = le32_to_cpu(*(pinstance->hrrq_curr[id]));
4549 continue;
4550 }
4551
4552 cmd = pinstance->cmd_list[cmd_index];
89a36810
AR
4553 spin_unlock_irqrestore(lockp, hrrq_lock_flags);
4554
4555 spin_lock_irqsave(&pinstance->pending_pool_lock,
4556 pending_lock_flags);
4557 list_del(&cmd->free_list);
4558 spin_unlock_irqrestore(&pinstance->pending_pool_lock,
4559 pending_lock_flags);
4560 del_timer(&cmd->timer);
4561 atomic_dec(&pinstance->outstanding_cmds);
4562
4563 if (cmd->cmd_done == pmcraid_ioa_reset) {
4564 spin_lock_irqsave(pinstance->host->host_lock,
4565 host_lock_flags);
4566 cmd->cmd_done(cmd);
4567 spin_unlock_irqrestore(pinstance->host->host_lock,
4568 host_lock_flags);
4569 } else if (cmd->cmd_done != NULL) {
4570 cmd->cmd_done(cmd);
4571 }
4572 /* loop over until we are done with all responses */
4573 spin_lock_irqsave(lockp, hrrq_lock_flags);
4574 resp = le32_to_cpu(*(pinstance->hrrq_curr[id]));
4575 }
4576
4577 spin_unlock_irqrestore(lockp, hrrq_lock_flags);
4578}
4579
4580/**
4581 * pmcraid_unregister_interrupt_handler - de-register interrupts handlers
4582 * @pinstance: pointer to adapter instance structure
4583 *
4584 * This routine un-registers registered interrupt handler and
4585 * also frees irqs/vectors.
4586 *
4587 * Retun Value
4588 * None
4589 */
4590static
4591void pmcraid_unregister_interrupt_handler(struct pmcraid_instance *pinstance)
4592{
c20c4267
AR
4593 int i;
4594
4595 for (i = 0; i < pinstance->num_hrrq; i++)
4596 free_irq(pinstance->hrrq_vector[i].vector,
4597 &(pinstance->hrrq_vector[i]));
4598
4599 if (pinstance->interrupt_mode) {
4600 pci_disable_msix(pinstance->pdev);
4601 pinstance->interrupt_mode = 0;
4602 }
89a36810
AR
4603}
4604
4605/**
4606 * pmcraid_register_interrupt_handler - registers interrupt handler
4607 * @pinstance: pointer to per-adapter instance structure
4608 *
4609 * Return Value
4610 * 0 on success, non-zero error code otherwise.
4611 */
4612static int
4613pmcraid_register_interrupt_handler(struct pmcraid_instance *pinstance)
4614{
c20c4267 4615 int rc;
89a36810
AR
4616 struct pci_dev *pdev = pinstance->pdev;
4617
5da61410
AR
4618 if ((pmcraid_enable_msix) &&
4619 (pci_find_capability(pdev, PCI_CAP_ID_MSIX))) {
c20c4267
AR
4620 int num_hrrq = PMCRAID_NUM_MSIX_VECTORS;
4621 struct msix_entry entries[PMCRAID_NUM_MSIX_VECTORS];
4622 int i;
4623 for (i = 0; i < PMCRAID_NUM_MSIX_VECTORS; i++)
4624 entries[i].entry = i;
4625
c01a8bc0
AG
4626 num_hrrq = pci_enable_msix_range(pdev, entries, 1, num_hrrq);
4627 if (num_hrrq < 0)
c20c4267
AR
4628 goto pmcraid_isr_legacy;
4629
c20c4267
AR
4630 for (i = 0; i < num_hrrq; i++) {
4631 pinstance->hrrq_vector[i].hrrq_id = i;
4632 pinstance->hrrq_vector[i].drv_inst = pinstance;
4633 pinstance->hrrq_vector[i].vector = entries[i].vector;
4634 rc = request_irq(pinstance->hrrq_vector[i].vector,
4635 pmcraid_isr_msix, 0,
4636 PMCRAID_DRIVER_NAME,
4637 &(pinstance->hrrq_vector[i]));
4638
4639 if (rc) {
4640 int j;
4641 for (j = 0; j < i; j++)
4642 free_irq(entries[j].vector,
4643 &(pinstance->hrrq_vector[j]));
4644 pci_disable_msix(pdev);
4645 goto pmcraid_isr_legacy;
4646 }
4647 }
4648
4649 pinstance->num_hrrq = num_hrrq;
4650 pinstance->interrupt_mode = 1;
4651 iowrite32(DOORBELL_INTR_MODE_MSIX,
4652 pinstance->int_regs.host_ioa_interrupt_reg);
4653 ioread32(pinstance->int_regs.host_ioa_interrupt_reg);
4654 goto pmcraid_isr_out;
4655 }
4656
4657pmcraid_isr_legacy:
4658 /* If MSI-X registration failed fallback to legacy mode, where
4659 * only one hrrq entry will be used
4660 */
89a36810
AR
4661 pinstance->hrrq_vector[0].hrrq_id = 0;
4662 pinstance->hrrq_vector[0].drv_inst = pinstance;
c20c4267 4663 pinstance->hrrq_vector[0].vector = pdev->irq;
89a36810 4664 pinstance->num_hrrq = 1;
c20c4267
AR
4665
4666 rc = request_irq(pdev->irq, pmcraid_isr, IRQF_SHARED,
4667 PMCRAID_DRIVER_NAME, &pinstance->hrrq_vector[0]);
4668pmcraid_isr_out:
4669 return rc;
89a36810
AR
4670}
4671
4672/**
4673 * pmcraid_release_cmd_blocks - release buufers allocated for command blocks
4674 * @pinstance: per adapter instance structure pointer
4675 * @max_index: number of buffer blocks to release
4676 *
4677 * Return Value
4678 * None
4679 */
4680static void
4681pmcraid_release_cmd_blocks(struct pmcraid_instance *pinstance, int max_index)
4682{
4683 int i;
4684 for (i = 0; i < max_index; i++) {
4685 kmem_cache_free(pinstance->cmd_cachep, pinstance->cmd_list[i]);
4686 pinstance->cmd_list[i] = NULL;
4687 }
4688 kmem_cache_destroy(pinstance->cmd_cachep);
4689 pinstance->cmd_cachep = NULL;
4690}
4691
4692/**
4693 * pmcraid_release_control_blocks - releases buffers alloced for control blocks
4694 * @pinstance: pointer to per adapter instance structure
4695 * @max_index: number of buffers (from 0 onwards) to release
4696 *
4697 * This function assumes that the command blocks for which control blocks are
4698 * linked are not released.
4699 *
4700 * Return Value
4701 * None
4702 */
4703static void
4704pmcraid_release_control_blocks(
4705 struct pmcraid_instance *pinstance,
4706 int max_index
4707)
4708{
4709 int i;
4710
4711 if (pinstance->control_pool == NULL)
4712 return;
4713
4714 for (i = 0; i < max_index; i++) {
4715 pci_pool_free(pinstance->control_pool,
4716 pinstance->cmd_list[i]->ioa_cb,
4717 pinstance->cmd_list[i]->ioa_cb_bus_addr);
4718 pinstance->cmd_list[i]->ioa_cb = NULL;
4719 pinstance->cmd_list[i]->ioa_cb_bus_addr = 0;
4720 }
4721 pci_pool_destroy(pinstance->control_pool);
4722 pinstance->control_pool = NULL;
4723}
4724
4725/**
4726 * pmcraid_allocate_cmd_blocks - allocate memory for cmd block structures
4727 * @pinstance - pointer to per adapter instance structure
4728 *
4729 * Allocates memory for command blocks using kernel slab allocator.
4730 *
4731 * Return Value
4732 * 0 in case of success; -ENOMEM in case of failure
4733 */
6f039790 4734static int pmcraid_allocate_cmd_blocks(struct pmcraid_instance *pinstance)
89a36810
AR
4735{
4736 int i;
4737
4738 sprintf(pinstance->cmd_pool_name, "pmcraid_cmd_pool_%d",
4739 pinstance->host->unique_id);
4740
4741
4742 pinstance->cmd_cachep = kmem_cache_create(
4743 pinstance->cmd_pool_name,
4744 sizeof(struct pmcraid_cmd), 0,
4745 SLAB_HWCACHE_ALIGN, NULL);
4746 if (!pinstance->cmd_cachep)
4747 return -ENOMEM;
4748
4749 for (i = 0; i < PMCRAID_MAX_CMD; i++) {
4750 pinstance->cmd_list[i] =
4751 kmem_cache_alloc(pinstance->cmd_cachep, GFP_KERNEL);
4752 if (!pinstance->cmd_list[i]) {
4753 pmcraid_release_cmd_blocks(pinstance, i);
4754 return -ENOMEM;
4755 }
4756 }
4757 return 0;
4758}
4759
4760/**
4761 * pmcraid_allocate_control_blocks - allocates memory control blocks
4762 * @pinstance : pointer to per adapter instance structure
4763 *
4764 * This function allocates PCI memory for DMAable buffers like IOARCB, IOADLs
4765 * and IOASAs. This is called after command blocks are already allocated.
4766 *
4767 * Return Value
4768 * 0 in case it can allocate all control blocks, otherwise -ENOMEM
4769 */
6f039790 4770static int pmcraid_allocate_control_blocks(struct pmcraid_instance *pinstance)
89a36810
AR
4771{
4772 int i;
4773
4774 sprintf(pinstance->ctl_pool_name, "pmcraid_control_pool_%d",
4775 pinstance->host->unique_id);
4776
4777 pinstance->control_pool =
4778 pci_pool_create(pinstance->ctl_pool_name,
4779 pinstance->pdev,
4780 sizeof(struct pmcraid_control_block),
4781 PMCRAID_IOARCB_ALIGNMENT, 0);
4782
4783 if (!pinstance->control_pool)
4784 return -ENOMEM;
4785
4786 for (i = 0; i < PMCRAID_MAX_CMD; i++) {
4787 pinstance->cmd_list[i]->ioa_cb =
4788 pci_pool_alloc(
4789 pinstance->control_pool,
4790 GFP_KERNEL,
4791 &(pinstance->cmd_list[i]->ioa_cb_bus_addr));
4792
4793 if (!pinstance->cmd_list[i]->ioa_cb) {
4794 pmcraid_release_control_blocks(pinstance, i);
4795 return -ENOMEM;
4796 }
4797 memset(pinstance->cmd_list[i]->ioa_cb, 0,
4798 sizeof(struct pmcraid_control_block));
4799 }
4800 return 0;
4801}
4802
4803/**
4804 * pmcraid_release_host_rrqs - release memory allocated for hrrq buffer(s)
4805 * @pinstance: pointer to per adapter instance structure
4806 * @maxindex: size of hrrq buffer pointer array
4807 *
4808 * Return Value
4809 * None
4810 */
4811static void
4812pmcraid_release_host_rrqs(struct pmcraid_instance *pinstance, int maxindex)
4813{
4814 int i;
4815 for (i = 0; i < maxindex; i++) {
4816
4817 pci_free_consistent(pinstance->pdev,
4818 HRRQ_ENTRY_SIZE * PMCRAID_MAX_CMD,
4819 pinstance->hrrq_start[i],
4820 pinstance->hrrq_start_bus_addr[i]);
4821
4822 /* reset pointers and toggle bit to zeros */
4823 pinstance->hrrq_start[i] = NULL;
4824 pinstance->hrrq_start_bus_addr[i] = 0;
4825 pinstance->host_toggle_bit[i] = 0;
4826 }
4827}
4828
4829/**
4830 * pmcraid_allocate_host_rrqs - Allocate and initialize host RRQ buffers
4831 * @pinstance: pointer to per adapter instance structure
4832 *
4833 * Return value
4834 * 0 hrrq buffers are allocated, -ENOMEM otherwise.
4835 */
6f039790 4836static int pmcraid_allocate_host_rrqs(struct pmcraid_instance *pinstance)
89a36810 4837{
c20c4267 4838 int i, buffer_size;
89a36810 4839
c20c4267 4840 buffer_size = HRRQ_ENTRY_SIZE * PMCRAID_MAX_CMD;
89a36810 4841
c20c4267 4842 for (i = 0; i < pinstance->num_hrrq; i++) {
89a36810
AR
4843 pinstance->hrrq_start[i] =
4844 pci_alloc_consistent(
4845 pinstance->pdev,
4846 buffer_size,
4847 &(pinstance->hrrq_start_bus_addr[i]));
4848
4849 if (pinstance->hrrq_start[i] == 0) {
c20c4267
AR
4850 pmcraid_err("pci_alloc failed for hrrq vector : %d\n",
4851 i);
89a36810
AR
4852 pmcraid_release_host_rrqs(pinstance, i);
4853 return -ENOMEM;
4854 }
4855
4856 memset(pinstance->hrrq_start[i], 0, buffer_size);
4857 pinstance->hrrq_curr[i] = pinstance->hrrq_start[i];
4858 pinstance->hrrq_end[i] =
c20c4267 4859 pinstance->hrrq_start[i] + PMCRAID_MAX_CMD - 1;
89a36810
AR
4860 pinstance->host_toggle_bit[i] = 1;
4861 spin_lock_init(&pinstance->hrrq_lock[i]);
4862 }
4863 return 0;
4864}
4865
4866/**
4867 * pmcraid_release_hcams - release HCAM buffers
4868 *
4869 * @pinstance: pointer to per adapter instance structure
4870 *
4871 * Return value
4872 * none
4873 */
4874static void pmcraid_release_hcams(struct pmcraid_instance *pinstance)
4875{
4876 if (pinstance->ccn.msg != NULL) {
4877 pci_free_consistent(pinstance->pdev,
4878 PMCRAID_AEN_HDR_SIZE +
c20c4267 4879 sizeof(struct pmcraid_hcam_ccn_ext),
89a36810
AR
4880 pinstance->ccn.msg,
4881 pinstance->ccn.baddr);
4882
4883 pinstance->ccn.msg = NULL;
4884 pinstance->ccn.hcam = NULL;
4885 pinstance->ccn.baddr = 0;
4886 }
4887
4888 if (pinstance->ldn.msg != NULL) {
4889 pci_free_consistent(pinstance->pdev,
4890 PMCRAID_AEN_HDR_SIZE +
4891 sizeof(struct pmcraid_hcam_ldn),
4892 pinstance->ldn.msg,
4893 pinstance->ldn.baddr);
4894
4895 pinstance->ldn.msg = NULL;
4896 pinstance->ldn.hcam = NULL;
4897 pinstance->ldn.baddr = 0;
4898 }
4899}
4900
4901/**
4902 * pmcraid_allocate_hcams - allocates HCAM buffers
4903 * @pinstance : pointer to per adapter instance structure
4904 *
4905 * Return Value:
4906 * 0 in case of successful allocation, non-zero otherwise
4907 */
4908static int pmcraid_allocate_hcams(struct pmcraid_instance *pinstance)
4909{
4910 pinstance->ccn.msg = pci_alloc_consistent(
4911 pinstance->pdev,
4912 PMCRAID_AEN_HDR_SIZE +
c20c4267 4913 sizeof(struct pmcraid_hcam_ccn_ext),
89a36810
AR
4914 &(pinstance->ccn.baddr));
4915
4916 pinstance->ldn.msg = pci_alloc_consistent(
4917 pinstance->pdev,
4918 PMCRAID_AEN_HDR_SIZE +
4919 sizeof(struct pmcraid_hcam_ldn),
4920 &(pinstance->ldn.baddr));
4921
4922 if (pinstance->ldn.msg == NULL || pinstance->ccn.msg == NULL) {
4923 pmcraid_release_hcams(pinstance);
4924 } else {
4925 pinstance->ccn.hcam =
4926 (void *)pinstance->ccn.msg + PMCRAID_AEN_HDR_SIZE;
4927 pinstance->ldn.hcam =
4928 (void *)pinstance->ldn.msg + PMCRAID_AEN_HDR_SIZE;
4929
4930 atomic_set(&pinstance->ccn.ignore, 0);
4931 atomic_set(&pinstance->ldn.ignore, 0);
4932 }
4933
4934 return (pinstance->ldn.msg == NULL) ? -ENOMEM : 0;
4935}
4936
4937/**
4938 * pmcraid_release_config_buffers - release config.table buffers
4939 * @pinstance: pointer to per adapter instance structure
4940 *
4941 * Return Value
4942 * none
4943 */
4944static void pmcraid_release_config_buffers(struct pmcraid_instance *pinstance)
4945{
4946 if (pinstance->cfg_table != NULL &&
4947 pinstance->cfg_table_bus_addr != 0) {
4948 pci_free_consistent(pinstance->pdev,
4949 sizeof(struct pmcraid_config_table),
4950 pinstance->cfg_table,
4951 pinstance->cfg_table_bus_addr);
4952 pinstance->cfg_table = NULL;
4953 pinstance->cfg_table_bus_addr = 0;
4954 }
4955
4956 if (pinstance->res_entries != NULL) {
4957 int i;
4958
4959 for (i = 0; i < PMCRAID_MAX_RESOURCES; i++)
4960 list_del(&pinstance->res_entries[i].queue);
4961 kfree(pinstance->res_entries);
4962 pinstance->res_entries = NULL;
4963 }
4964
4965 pmcraid_release_hcams(pinstance);
4966}
4967
4968/**
4969 * pmcraid_allocate_config_buffers - allocates DMAable memory for config table
4970 * @pinstance : pointer to per adapter instance structure
4971 *
4972 * Return Value
4973 * 0 for successful allocation, -ENOMEM for any failure
4974 */
6f039790 4975static int pmcraid_allocate_config_buffers(struct pmcraid_instance *pinstance)
89a36810
AR
4976{
4977 int i;
4978
4979 pinstance->res_entries =
4980 kzalloc(sizeof(struct pmcraid_resource_entry) *
4981 PMCRAID_MAX_RESOURCES, GFP_KERNEL);
4982
4983 if (NULL == pinstance->res_entries) {
4984 pmcraid_err("failed to allocate memory for resource table\n");
4985 return -ENOMEM;
4986 }
4987
4988 for (i = 0; i < PMCRAID_MAX_RESOURCES; i++)
4989 list_add_tail(&pinstance->res_entries[i].queue,
4990 &pinstance->free_res_q);
4991
4992 pinstance->cfg_table =
4993 pci_alloc_consistent(pinstance->pdev,
4994 sizeof(struct pmcraid_config_table),
4995 &pinstance->cfg_table_bus_addr);
4996
4997 if (NULL == pinstance->cfg_table) {
4998 pmcraid_err("couldn't alloc DMA memory for config table\n");
4999 pmcraid_release_config_buffers(pinstance);
5000 return -ENOMEM;
5001 }
5002
5003 if (pmcraid_allocate_hcams(pinstance)) {
5004 pmcraid_err("could not alloc DMA memory for HCAMS\n");
5005 pmcraid_release_config_buffers(pinstance);
5006 return -ENOMEM;
5007 }
5008
5009 return 0;
5010}
5011
5012/**
5013 * pmcraid_init_tasklets - registers tasklets for response handling
5014 *
5015 * @pinstance: pointer adapter instance structure
5016 *
5017 * Return value
5018 * none
5019 */
5020static void pmcraid_init_tasklets(struct pmcraid_instance *pinstance)
5021{
5022 int i;
5023 for (i = 0; i < pinstance->num_hrrq; i++)
5024 tasklet_init(&pinstance->isr_tasklet[i],
5025 pmcraid_tasklet_function,
5026 (unsigned long)&pinstance->hrrq_vector[i]);
5027}
5028
5029/**
5030 * pmcraid_kill_tasklets - destroys tasklets registered for response handling
5031 *
5032 * @pinstance: pointer to adapter instance structure
5033 *
5034 * Return value
5035 * none
5036 */
5037static void pmcraid_kill_tasklets(struct pmcraid_instance *pinstance)
5038{
5039 int i;
5040 for (i = 0; i < pinstance->num_hrrq; i++)
5041 tasklet_kill(&pinstance->isr_tasklet[i]);
5042}
5043
c20c4267
AR
5044/**
5045 * pmcraid_release_buffers - release per-adapter buffers allocated
5046 *
5047 * @pinstance: pointer to adapter soft state
5048 *
5049 * Return Value
5050 * none
5051 */
5052static void pmcraid_release_buffers(struct pmcraid_instance *pinstance)
5053{
5054 pmcraid_release_config_buffers(pinstance);
5055 pmcraid_release_control_blocks(pinstance, PMCRAID_MAX_CMD);
5056 pmcraid_release_cmd_blocks(pinstance, PMCRAID_MAX_CMD);
5057 pmcraid_release_host_rrqs(pinstance, pinstance->num_hrrq);
5058
5059 if (pinstance->inq_data != NULL) {
5060 pci_free_consistent(pinstance->pdev,
5061 sizeof(struct pmcraid_inquiry_data),
5062 pinstance->inq_data,
5063 pinstance->inq_data_baddr);
5064
5065 pinstance->inq_data = NULL;
5066 pinstance->inq_data_baddr = 0;
5067 }
592488a3
AR
5068
5069 if (pinstance->timestamp_data != NULL) {
5070 pci_free_consistent(pinstance->pdev,
5071 sizeof(struct pmcraid_timestamp_data),
5072 pinstance->timestamp_data,
5073 pinstance->timestamp_data_baddr);
5074
5075 pinstance->timestamp_data = NULL;
5076 pinstance->timestamp_data_baddr = 0;
5077 }
c20c4267
AR
5078}
5079
89a36810
AR
5080/**
5081 * pmcraid_init_buffers - allocates memory and initializes various structures
5082 * @pinstance: pointer to per adapter instance structure
5083 *
5084 * This routine pre-allocates memory based on the type of block as below:
5085 * cmdblocks(PMCRAID_MAX_CMD): kernel memory using kernel's slab_allocator,
5086 * IOARCBs(PMCRAID_MAX_CMD) : DMAable memory, using pci pool allocator
5087 * config-table entries : DMAable memory using pci_alloc_consistent
5088 * HostRRQs : DMAable memory, using pci_alloc_consistent
5089 *
5090 * Return Value
5091 * 0 in case all of the blocks are allocated, -ENOMEM otherwise.
5092 */
6f039790 5093static int pmcraid_init_buffers(struct pmcraid_instance *pinstance)
89a36810
AR
5094{
5095 int i;
5096
5097 if (pmcraid_allocate_host_rrqs(pinstance)) {
5098 pmcraid_err("couldn't allocate memory for %d host rrqs\n",
5099 pinstance->num_hrrq);
5100 return -ENOMEM;
5101 }
5102
5103 if (pmcraid_allocate_config_buffers(pinstance)) {
5104 pmcraid_err("couldn't allocate memory for config buffers\n");
5105 pmcraid_release_host_rrqs(pinstance, pinstance->num_hrrq);
5106 return -ENOMEM;
5107 }
5108
5109 if (pmcraid_allocate_cmd_blocks(pinstance)) {
c20c4267 5110 pmcraid_err("couldn't allocate memory for cmd blocks\n");
89a36810
AR
5111 pmcraid_release_config_buffers(pinstance);
5112 pmcraid_release_host_rrqs(pinstance, pinstance->num_hrrq);
5113 return -ENOMEM;
5114 }
5115
5116 if (pmcraid_allocate_control_blocks(pinstance)) {
c20c4267 5117 pmcraid_err("couldn't allocate memory control blocks\n");
89a36810
AR
5118 pmcraid_release_config_buffers(pinstance);
5119 pmcraid_release_cmd_blocks(pinstance, PMCRAID_MAX_CMD);
5120 pmcraid_release_host_rrqs(pinstance, pinstance->num_hrrq);
5121 return -ENOMEM;
5122 }
5123
c20c4267
AR
5124 /* allocate DMAable memory for page D0 INQUIRY buffer */
5125 pinstance->inq_data = pci_alloc_consistent(
5126 pinstance->pdev,
5127 sizeof(struct pmcraid_inquiry_data),
5128 &pinstance->inq_data_baddr);
5129
5130 if (pinstance->inq_data == NULL) {
5131 pmcraid_err("couldn't allocate DMA memory for INQUIRY\n");
5132 pmcraid_release_buffers(pinstance);
5133 return -ENOMEM;
5134 }
5135
592488a3
AR
5136 /* allocate DMAable memory for set timestamp data buffer */
5137 pinstance->timestamp_data = pci_alloc_consistent(
5138 pinstance->pdev,
5139 sizeof(struct pmcraid_timestamp_data),
5140 &pinstance->timestamp_data_baddr);
5141
5142 if (pinstance->timestamp_data == NULL) {
5143 pmcraid_err("couldn't allocate DMA memory for \
5144 set time_stamp \n");
5145 pmcraid_release_buffers(pinstance);
5146 return -ENOMEM;
5147 }
5148
5149
89a36810
AR
5150 /* Initialize all the command blocks and add them to free pool. No
5151 * need to lock (free_pool_lock) as this is done in initialization
5152 * itself
5153 */
5154 for (i = 0; i < PMCRAID_MAX_CMD; i++) {
5155 struct pmcraid_cmd *cmdp = pinstance->cmd_list[i];
5156 pmcraid_init_cmdblk(cmdp, i);
5157 cmdp->drv_inst = pinstance;
5158 list_add_tail(&cmdp->free_list, &pinstance->free_cmd_pool);
5159 }
5160
5161 return 0;
5162}
5163
5164/**
5165 * pmcraid_reinit_buffers - resets various buffer pointers
5166 * @pinstance: pointer to adapter instance
5167 * Return value
c20c4267 5168 * none
89a36810
AR
5169 */
5170static void pmcraid_reinit_buffers(struct pmcraid_instance *pinstance)
5171{
5172 int i;
5173 int buffer_size = HRRQ_ENTRY_SIZE * PMCRAID_MAX_CMD;
5174
5175 for (i = 0; i < pinstance->num_hrrq; i++) {
5176 memset(pinstance->hrrq_start[i], 0, buffer_size);
5177 pinstance->hrrq_curr[i] = pinstance->hrrq_start[i];
5178 pinstance->hrrq_end[i] =
5179 pinstance->hrrq_start[i] + PMCRAID_MAX_CMD - 1;
5180 pinstance->host_toggle_bit[i] = 1;
5181 }
5182}
5183
5184/**
5185 * pmcraid_init_instance - initialize per instance data structure
5186 * @pdev: pointer to pci device structure
5187 * @host: pointer to Scsi_Host structure
5188 * @mapped_pci_addr: memory mapped IOA configuration registers
5189 *
5190 * Return Value
5191 * 0 on success, non-zero in case of any failure
5192 */
6f039790
GKH
5193static int pmcraid_init_instance(struct pci_dev *pdev, struct Scsi_Host *host,
5194 void __iomem *mapped_pci_addr)
89a36810
AR
5195{
5196 struct pmcraid_instance *pinstance =
5197 (struct pmcraid_instance *)host->hostdata;
5198
5199 pinstance->host = host;
5200 pinstance->pdev = pdev;
5201
5202 /* Initialize register addresses */
5203 pinstance->mapped_dma_addr = mapped_pci_addr;
5204
5205 /* Initialize chip-specific details */
5206 {
5207 struct pmcraid_chip_details *chip_cfg = pinstance->chip_cfg;
5208 struct pmcraid_interrupts *pint_regs = &pinstance->int_regs;
5209
5210 pinstance->ioarrin = mapped_pci_addr + chip_cfg->ioarrin;
5211
5212 pint_regs->ioa_host_interrupt_reg =
5213 mapped_pci_addr + chip_cfg->ioa_host_intr;
5214 pint_regs->ioa_host_interrupt_clr_reg =
5215 mapped_pci_addr + chip_cfg->ioa_host_intr_clr;
c20c4267
AR
5216 pint_regs->ioa_host_msix_interrupt_reg =
5217 mapped_pci_addr + chip_cfg->ioa_host_msix_intr;
89a36810
AR
5218 pint_regs->host_ioa_interrupt_reg =
5219 mapped_pci_addr + chip_cfg->host_ioa_intr;
5220 pint_regs->host_ioa_interrupt_clr_reg =
5221 mapped_pci_addr + chip_cfg->host_ioa_intr_clr;
5222
5223 /* Current version of firmware exposes interrupt mask set
5224 * and mask clr registers through memory mapped bar0.
5225 */
5226 pinstance->mailbox = mapped_pci_addr + chip_cfg->mailbox;
5227 pinstance->ioa_status = mapped_pci_addr + chip_cfg->ioastatus;
5228 pint_regs->ioa_host_interrupt_mask_reg =
5229 mapped_pci_addr + chip_cfg->ioa_host_mask;
5230 pint_regs->ioa_host_interrupt_mask_clr_reg =
5231 mapped_pci_addr + chip_cfg->ioa_host_mask_clr;
5232 pint_regs->global_interrupt_mask_reg =
5233 mapped_pci_addr + chip_cfg->global_intr_mask;
5234 };
5235
5236 pinstance->ioa_reset_attempts = 0;
5237 init_waitqueue_head(&pinstance->reset_wait_q);
5238
5239 atomic_set(&pinstance->outstanding_cmds, 0);
c20c4267 5240 atomic_set(&pinstance->last_message_id, 0);
89a36810
AR
5241 atomic_set(&pinstance->expose_resources, 0);
5242
5243 INIT_LIST_HEAD(&pinstance->free_res_q);
5244 INIT_LIST_HEAD(&pinstance->used_res_q);
5245 INIT_LIST_HEAD(&pinstance->free_cmd_pool);
5246 INIT_LIST_HEAD(&pinstance->pending_cmd_pool);
5247
5248 spin_lock_init(&pinstance->free_pool_lock);
5249 spin_lock_init(&pinstance->pending_pool_lock);
5250 spin_lock_init(&pinstance->resource_lock);
5251 mutex_init(&pinstance->aen_queue_lock);
5252
5253 /* Work-queue (Shared) for deferred processing error handling */
5254 INIT_WORK(&pinstance->worker_q, pmcraid_worker_function);
5255
5256 /* Initialize the default log_level */
5257 pinstance->current_log_level = pmcraid_log_level;
5258
5259 /* Setup variables required for reset engine */
5260 pinstance->ioa_state = IOA_STATE_UNKNOWN;
5261 pinstance->reset_cmd = NULL;
5262 return 0;
5263}
5264
89a36810
AR
5265/**
5266 * pmcraid_shutdown - shutdown adapter controller.
5267 * @pdev: pci device struct
5268 *
5269 * Issues an adapter shutdown to the card waits for its completion
5270 *
5271 * Return value
5272 * none
5273 */
5274static void pmcraid_shutdown(struct pci_dev *pdev)
5275{
5276 struct pmcraid_instance *pinstance = pci_get_drvdata(pdev);
5277 pmcraid_reset_bringdown(pinstance);
5278}
5279
5280
5281/**
5282 * pmcraid_get_minor - returns unused minor number from minor number bitmap
5283 */
5284static unsigned short pmcraid_get_minor(void)
5285{
5286 int minor;
5287
5288 minor = find_first_zero_bit(pmcraid_minor, sizeof(pmcraid_minor));
5289 __set_bit(minor, pmcraid_minor);
5290 return minor;
5291}
5292
5293/**
5294 * pmcraid_release_minor - releases given minor back to minor number bitmap
5295 */
5296static void pmcraid_release_minor(unsigned short minor)
5297{
5298 __clear_bit(minor, pmcraid_minor);
5299}
5300
5301/**
5302 * pmcraid_setup_chrdev - allocates a minor number and registers a char device
5303 *
5304 * @pinstance: pointer to adapter instance for which to register device
5305 *
5306 * Return value
5307 * 0 in case of success, otherwise non-zero
5308 */
5309static int pmcraid_setup_chrdev(struct pmcraid_instance *pinstance)
5310{
5311 int minor;
5312 int error;
5313
5314 minor = pmcraid_get_minor();
5315 cdev_init(&pinstance->cdev, &pmcraid_fops);
5316 pinstance->cdev.owner = THIS_MODULE;
5317
5318 error = cdev_add(&pinstance->cdev, MKDEV(pmcraid_major, minor), 1);
5319
5320 if (error)
5321 pmcraid_release_minor(minor);
5322 else
5323 device_create(pmcraid_class, NULL, MKDEV(pmcraid_major, minor),
c20c4267 5324 NULL, "%s%u", PMCRAID_DEVFILE, minor);
89a36810
AR
5325 return error;
5326}
5327
5328/**
5329 * pmcraid_release_chrdev - unregisters per-adapter management interface
5330 *
5331 * @pinstance: pointer to adapter instance structure
5332 *
5333 * Return value
5334 * none
5335 */
5336static void pmcraid_release_chrdev(struct pmcraid_instance *pinstance)
5337{
5338 pmcraid_release_minor(MINOR(pinstance->cdev.dev));
5339 device_destroy(pmcraid_class,
5340 MKDEV(pmcraid_major, MINOR(pinstance->cdev.dev)));
5341 cdev_del(&pinstance->cdev);
5342}
5343
5344/**
5345 * pmcraid_remove - IOA hot plug remove entry point
5346 * @pdev: pci device struct
5347 *
5348 * Return value
5349 * none
5350 */
6f039790 5351static void pmcraid_remove(struct pci_dev *pdev)
89a36810
AR
5352{
5353 struct pmcraid_instance *pinstance = pci_get_drvdata(pdev);
5354
5355 /* remove the management interface (/dev file) for this device */
5356 pmcraid_release_chrdev(pinstance);
5357
5358 /* remove host template from scsi midlayer */
5359 scsi_remove_host(pinstance->host);
5360
5361 /* block requests from mid-layer */
5362 scsi_block_requests(pinstance->host);
5363
5364 /* initiate shutdown adapter */
5365 pmcraid_shutdown(pdev);
5366
5367 pmcraid_disable_interrupts(pinstance, ~0);
43829731 5368 flush_work(&pinstance->worker_q);
89a36810
AR
5369
5370 pmcraid_kill_tasklets(pinstance);
5371 pmcraid_unregister_interrupt_handler(pinstance);
5372 pmcraid_release_buffers(pinstance);
5373 iounmap(pinstance->mapped_dma_addr);
5374 pci_release_regions(pdev);
5375 scsi_host_put(pinstance->host);
5376 pci_disable_device(pdev);
5377
5378 return;
5379}
5380
5381#ifdef CONFIG_PM
5382/**
5383 * pmcraid_suspend - driver suspend entry point for power management
5384 * @pdev: PCI device structure
5385 * @state: PCI power state to suspend routine
5386 *
5387 * Return Value - 0 always
5388 */
5389static int pmcraid_suspend(struct pci_dev *pdev, pm_message_t state)
5390{
5391 struct pmcraid_instance *pinstance = pci_get_drvdata(pdev);
5392
5393 pmcraid_shutdown(pdev);
5394 pmcraid_disable_interrupts(pinstance, ~0);
5395 pmcraid_kill_tasklets(pinstance);
5396 pci_set_drvdata(pinstance->pdev, pinstance);
5397 pmcraid_unregister_interrupt_handler(pinstance);
5398 pci_save_state(pdev);
5399 pci_disable_device(pdev);
5400 pci_set_power_state(pdev, pci_choose_state(pdev, state));
5401
5402 return 0;
5403}
5404
5405/**
5406 * pmcraid_resume - driver resume entry point PCI power management
5407 * @pdev: PCI device structure
5408 *
5409 * Return Value - 0 in case of success. Error code in case of any failure
5410 */
5411static int pmcraid_resume(struct pci_dev *pdev)
5412{
5413 struct pmcraid_instance *pinstance = pci_get_drvdata(pdev);
5414 struct Scsi_Host *host = pinstance->host;
5415 int rc;
89a36810
AR
5416
5417 pci_set_power_state(pdev, PCI_D0);
5418 pci_enable_wake(pdev, PCI_D0, 0);
5419 pci_restore_state(pdev);
5420
5421 rc = pci_enable_device(pdev);
5422
5423 if (rc) {
34876402 5424 dev_err(&pdev->dev, "resume: Enable device failed\n");
89a36810
AR
5425 return rc;
5426 }
5427
5428 pci_set_master(pdev);
5429
5430 if ((sizeof(dma_addr_t) == 4) ||
5431 pci_set_dma_mask(pdev, DMA_BIT_MASK(64)))
5432 rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
5433
5434 if (rc == 0)
5435 rc = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
5436
5437 if (rc != 0) {
34876402 5438 dev_err(&pdev->dev, "resume: Failed to set PCI DMA mask\n");
89a36810
AR
5439 goto disable_device;
5440 }
5441
c20c4267 5442 pmcraid_disable_interrupts(pinstance, ~0);
89a36810 5443 atomic_set(&pinstance->outstanding_cmds, 0);
89a36810
AR
5444 rc = pmcraid_register_interrupt_handler(pinstance);
5445
5446 if (rc) {
34876402
AR
5447 dev_err(&pdev->dev,
5448 "resume: couldn't register interrupt handlers\n");
89a36810
AR
5449 rc = -ENODEV;
5450 goto release_host;
5451 }
5452
5453 pmcraid_init_tasklets(pinstance);
5454 pmcraid_enable_interrupts(pinstance, PMCRAID_PCI_INTERRUPTS);
5455
5456 /* Start with hard reset sequence which brings up IOA to operational
5457 * state as well as completes the reset sequence.
5458 */
5459 pinstance->ioa_hard_reset = 1;
5460
5461 /* Start IOA firmware initialization and bring card to Operational
5462 * state.
5463 */
5464 if (pmcraid_reset_bringup(pinstance)) {
c20c4267 5465 dev_err(&pdev->dev, "couldn't initialize IOA\n");
89a36810
AR
5466 rc = -ENODEV;
5467 goto release_tasklets;
5468 }
5469
5470 return 0;
5471
5472release_tasklets:
c20c4267 5473 pmcraid_disable_interrupts(pinstance, ~0);
89a36810
AR
5474 pmcraid_kill_tasklets(pinstance);
5475 pmcraid_unregister_interrupt_handler(pinstance);
5476
5477release_host:
5478 scsi_host_put(host);
5479
5480disable_device:
5481 pci_disable_device(pdev);
5482
5483 return rc;
5484}
5485
5486#else
5487
5488#define pmcraid_suspend NULL
5489#define pmcraid_resume NULL
5490
5491#endif /* CONFIG_PM */
5492
5493/**
5494 * pmcraid_complete_ioa_reset - Called by either timer or tasklet during
c20c4267 5495 * completion of the ioa reset
89a36810
AR
5496 * @cmd: pointer to reset command block
5497 */
5498static void pmcraid_complete_ioa_reset(struct pmcraid_cmd *cmd)
5499{
5500 struct pmcraid_instance *pinstance = cmd->drv_inst;
5501 unsigned long flags;
5502
5503 spin_lock_irqsave(pinstance->host->host_lock, flags);
5504 pmcraid_ioa_reset(cmd);
5505 spin_unlock_irqrestore(pinstance->host->host_lock, flags);
5506 scsi_unblock_requests(pinstance->host);
5507 schedule_work(&pinstance->worker_q);
5508}
5509
5510/**
5511 * pmcraid_set_supported_devs - sends SET SUPPORTED DEVICES to IOAFP
5512 *
5513 * @cmd: pointer to pmcraid_cmd structure
5514 *
5515 * Return Value
5516 * 0 for success or non-zero for failure cases
5517 */
5518static void pmcraid_set_supported_devs(struct pmcraid_cmd *cmd)
5519{
5520 struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb;
5521 void (*cmd_done) (struct pmcraid_cmd *) = pmcraid_complete_ioa_reset;
5522
5523 pmcraid_reinit_cmdblk(cmd);
5524
5525 ioarcb->resource_handle = cpu_to_le32(PMCRAID_IOA_RES_HANDLE);
5526 ioarcb->request_type = REQ_TYPE_IOACMD;
5527 ioarcb->cdb[0] = PMCRAID_SET_SUPPORTED_DEVICES;
5528 ioarcb->cdb[1] = ALL_DEVICES_SUPPORTED;
5529
5530 /* If this was called as part of resource table reinitialization due to
5531 * lost CCN, it is enough to return the command block back to free pool
5532 * as part of set_supported_devs completion function.
5533 */
5534 if (cmd->drv_inst->reinit_cfg_table) {
5535 cmd->drv_inst->reinit_cfg_table = 0;
5536 cmd->release = 1;
5537 cmd_done = pmcraid_reinit_cfgtable_done;
5538 }
5539
5540 /* we will be done with the reset sequence after set supported devices,
5541 * setup the done function to return the command block back to free
5542 * pool
5543 */
5544 pmcraid_send_cmd(cmd,
5545 cmd_done,
5546 PMCRAID_SET_SUP_DEV_TIMEOUT,
5547 pmcraid_timeout_handler);
5548 return;
5549}
5550
592488a3
AR
5551/**
5552 * pmcraid_set_timestamp - set the timestamp to IOAFP
5553 *
5554 * @cmd: pointer to pmcraid_cmd structure
5555 *
5556 * Return Value
5557 * 0 for success or non-zero for failure cases
5558 */
5559static void pmcraid_set_timestamp(struct pmcraid_cmd *cmd)
5560{
5561 struct pmcraid_instance *pinstance = cmd->drv_inst;
5562 struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb;
5563 __be32 time_stamp_len = cpu_to_be32(PMCRAID_TIMESTAMP_LEN);
5564 struct pmcraid_ioadl_desc *ioadl = ioarcb->add_data.u.ioadl;
5565
5566 struct timeval tv;
5567 __le64 timestamp;
5568
5569 do_gettimeofday(&tv);
5570 timestamp = tv.tv_sec * 1000;
5571
5572 pinstance->timestamp_data->timestamp[0] = (__u8)(timestamp);
5573 pinstance->timestamp_data->timestamp[1] = (__u8)((timestamp) >> 8);
5574 pinstance->timestamp_data->timestamp[2] = (__u8)((timestamp) >> 16);
5575 pinstance->timestamp_data->timestamp[3] = (__u8)((timestamp) >> 24);
5576 pinstance->timestamp_data->timestamp[4] = (__u8)((timestamp) >> 32);
5577 pinstance->timestamp_data->timestamp[5] = (__u8)((timestamp) >> 40);
5578
5579 pmcraid_reinit_cmdblk(cmd);
5580 ioarcb->request_type = REQ_TYPE_SCSI;
5581 ioarcb->resource_handle = cpu_to_le32(PMCRAID_IOA_RES_HANDLE);
5582 ioarcb->cdb[0] = PMCRAID_SCSI_SET_TIMESTAMP;
5583 ioarcb->cdb[1] = PMCRAID_SCSI_SERVICE_ACTION;
5584 memcpy(&(ioarcb->cdb[6]), &time_stamp_len, sizeof(time_stamp_len));
5585
5586 ioarcb->ioadl_bus_addr = cpu_to_le64((cmd->ioa_cb_bus_addr) +
5587 offsetof(struct pmcraid_ioarcb,
5588 add_data.u.ioadl[0]));
5589 ioarcb->ioadl_length = cpu_to_le32(sizeof(struct pmcraid_ioadl_desc));
5590 ioarcb->ioarcb_bus_addr &= ~(0x1FULL);
5591
5592 ioarcb->request_flags0 |= NO_LINK_DESCS;
5593 ioarcb->request_flags0 |= TRANSFER_DIR_WRITE;
5594 ioarcb->data_transfer_length =
5595 cpu_to_le32(sizeof(struct pmcraid_timestamp_data));
5596 ioadl = &(ioarcb->add_data.u.ioadl[0]);
5597 ioadl->flags = IOADL_FLAGS_LAST_DESC;
5598 ioadl->address = cpu_to_le64(pinstance->timestamp_data_baddr);
5599 ioadl->data_len = cpu_to_le32(sizeof(struct pmcraid_timestamp_data));
5600
5601 if (!pinstance->timestamp_error) {
5602 pinstance->timestamp_error = 0;
5603 pmcraid_send_cmd(cmd, pmcraid_set_supported_devs,
5604 PMCRAID_INTERNAL_TIMEOUT, pmcraid_timeout_handler);
5605 } else {
5606 pmcraid_send_cmd(cmd, pmcraid_return_cmd,
5607 PMCRAID_INTERNAL_TIMEOUT, pmcraid_timeout_handler);
5608 return;
5609 }
5610}
5611
5612
89a36810
AR
5613/**
5614 * pmcraid_init_res_table - Initialize the resource table
5615 * @cmd: pointer to pmcraid command struct
5616 *
5617 * This function looks through the existing resource table, comparing
5618 * it with the config table. This function will take care of old/new
5619 * devices and schedule adding/removing them from the mid-layer
5620 * as appropriate.
5621 *
5622 * Return value
5623 * None
5624 */
5625static void pmcraid_init_res_table(struct pmcraid_cmd *cmd)
5626{
5627 struct pmcraid_instance *pinstance = cmd->drv_inst;
5628 struct pmcraid_resource_entry *res, *temp;
5629 struct pmcraid_config_table_entry *cfgte;
5630 unsigned long lock_flags;
5631 int found, rc, i;
c20c4267 5632 u16 fw_version;
89a36810
AR
5633 LIST_HEAD(old_res);
5634
5635 if (pinstance->cfg_table->flags & MICROCODE_UPDATE_REQUIRED)
34876402 5636 pmcraid_err("IOA requires microcode download\n");
89a36810 5637
c20c4267
AR
5638 fw_version = be16_to_cpu(pinstance->inq_data->fw_version);
5639
89a36810
AR
5640 /* resource list is protected by pinstance->resource_lock.
5641 * init_res_table can be called from probe (user-thread) or runtime
5642 * reset (timer/tasklet)
5643 */
5644 spin_lock_irqsave(&pinstance->resource_lock, lock_flags);
5645
5646 list_for_each_entry_safe(res, temp, &pinstance->used_res_q, queue)
5647 list_move_tail(&res->queue, &old_res);
5648
5649 for (i = 0; i < pinstance->cfg_table->num_entries; i++) {
c20c4267
AR
5650 if (be16_to_cpu(pinstance->inq_data->fw_version) <=
5651 PMCRAID_FW_VERSION_1)
5652 cfgte = &pinstance->cfg_table->entries[i];
5653 else
5654 cfgte = (struct pmcraid_config_table_entry *)
5655 &pinstance->cfg_table->entries_ext[i];
89a36810 5656
c20c4267 5657 if (!pmcraid_expose_resource(fw_version, cfgte))
89a36810
AR
5658 continue;
5659
5660 found = 0;
5661
5662 /* If this entry was already detected and initialized */
5663 list_for_each_entry_safe(res, temp, &old_res, queue) {
5664
5665 rc = memcmp(&res->cfg_entry.resource_address,
5666 &cfgte->resource_address,
5667 sizeof(cfgte->resource_address));
5668 if (!rc) {
5669 list_move_tail(&res->queue,
5670 &pinstance->used_res_q);
5671 found = 1;
5672 break;
5673 }
5674 }
5675
5676 /* If this is new entry, initialize it and add it the queue */
5677 if (!found) {
5678
5679 if (list_empty(&pinstance->free_res_q)) {
34876402 5680 pmcraid_err("Too many devices attached\n");
89a36810
AR
5681 break;
5682 }
5683
5684 found = 1;
5685 res = list_entry(pinstance->free_res_q.next,
5686 struct pmcraid_resource_entry, queue);
5687
5688 res->scsi_dev = NULL;
5689 res->change_detected = RES_CHANGE_ADD;
5690 res->reset_progress = 0;
5691 list_move_tail(&res->queue, &pinstance->used_res_q);
5692 }
5693
5694 /* copy new configuration table entry details into driver
5695 * maintained resource entry
5696 */
5697 if (found) {
5698 memcpy(&res->cfg_entry, cfgte,
c20c4267 5699 pinstance->config_table_entry_size);
89a36810
AR
5700 pmcraid_info("New res type:%x, vset:%x, addr:%x:\n",
5701 res->cfg_entry.resource_type,
c20c4267
AR
5702 (fw_version <= PMCRAID_FW_VERSION_1 ?
5703 res->cfg_entry.unique_flags1 :
5704 res->cfg_entry.array_id & 0xFF),
89a36810
AR
5705 le32_to_cpu(res->cfg_entry.resource_address));
5706 }
5707 }
5708
5709 /* Detect any deleted entries, mark them for deletion from mid-layer */
5710 list_for_each_entry_safe(res, temp, &old_res, queue) {
5711
5712 if (res->scsi_dev) {
5713 res->change_detected = RES_CHANGE_DEL;
5714 res->cfg_entry.resource_handle =
5715 PMCRAID_INVALID_RES_HANDLE;
5716 list_move_tail(&res->queue, &pinstance->used_res_q);
5717 } else {
5718 list_move_tail(&res->queue, &pinstance->free_res_q);
5719 }
5720 }
5721
5722 /* release the resource list lock */
5723 spin_unlock_irqrestore(&pinstance->resource_lock, lock_flags);
592488a3 5724 pmcraid_set_timestamp(cmd);
89a36810
AR
5725}
5726
5727/**
5728 * pmcraid_querycfg - Send a Query IOA Config to the adapter.
5729 * @cmd: pointer pmcraid_cmd struct
5730 *
5731 * This function sends a Query IOA Configuration command to the adapter to
5732 * retrieve the IOA configuration table.
5733 *
5734 * Return value:
5735 * none
5736 */
5737static void pmcraid_querycfg(struct pmcraid_cmd *cmd)
5738{
5739 struct pmcraid_ioarcb *ioarcb = &cmd->ioa_cb->ioarcb;
5740 struct pmcraid_ioadl_desc *ioadl = ioarcb->add_data.u.ioadl;
5741 struct pmcraid_instance *pinstance = cmd->drv_inst;
5742 int cfg_table_size = cpu_to_be32(sizeof(struct pmcraid_config_table));
5743
c20c4267
AR
5744 if (be16_to_cpu(pinstance->inq_data->fw_version) <=
5745 PMCRAID_FW_VERSION_1)
5746 pinstance->config_table_entry_size =
5747 sizeof(struct pmcraid_config_table_entry);
5748 else
5749 pinstance->config_table_entry_size =
5750 sizeof(struct pmcraid_config_table_entry_ext);
5751
89a36810
AR
5752 ioarcb->request_type = REQ_TYPE_IOACMD;
5753 ioarcb->resource_handle = cpu_to_le32(PMCRAID_IOA_RES_HANDLE);
5754
5755 ioarcb->cdb[0] = PMCRAID_QUERY_IOA_CONFIG;
5756
5757 /* firmware requires 4-byte length field, specified in B.E format */
5758 memcpy(&(ioarcb->cdb[10]), &cfg_table_size, sizeof(cfg_table_size));
5759
5760 /* Since entire config table can be described by single IOADL, it can
5761 * be part of IOARCB itself
5762 */
5763 ioarcb->ioadl_bus_addr = cpu_to_le64((cmd->ioa_cb_bus_addr) +
5764 offsetof(struct pmcraid_ioarcb,
5765 add_data.u.ioadl[0]));
5766 ioarcb->ioadl_length = cpu_to_le32(sizeof(struct pmcraid_ioadl_desc));
5767 ioarcb->ioarcb_bus_addr &= ~(0x1FULL);
5768
5769 ioarcb->request_flags0 |= NO_LINK_DESCS;
5770 ioarcb->data_transfer_length =
5771 cpu_to_le32(sizeof(struct pmcraid_config_table));
5772
5773 ioadl = &(ioarcb->add_data.u.ioadl[0]);
88197966 5774 ioadl->flags = IOADL_FLAGS_LAST_DESC;
89a36810
AR
5775 ioadl->address = cpu_to_le64(pinstance->cfg_table_bus_addr);
5776 ioadl->data_len = cpu_to_le32(sizeof(struct pmcraid_config_table));
5777
5778 pmcraid_send_cmd(cmd, pmcraid_init_res_table,
5779 PMCRAID_INTERNAL_TIMEOUT, pmcraid_timeout_handler);
5780}
5781
5782
5783/**
c20c4267 5784 * pmcraid_probe - PCI probe entry pointer for PMC MaxRAID controller driver
89a36810
AR
5785 * @pdev: pointer to pci device structure
5786 * @dev_id: pointer to device ids structure
5787 *
5788 * Return Value
5789 * returns 0 if the device is claimed and successfully configured.
5790 * returns non-zero error code in case of any failure
5791 */
6f039790
GKH
5792static int pmcraid_probe(struct pci_dev *pdev,
5793 const struct pci_device_id *dev_id)
89a36810
AR
5794{
5795 struct pmcraid_instance *pinstance;
5796 struct Scsi_Host *host;
5797 void __iomem *mapped_pci_addr;
5798 int rc = PCIBIOS_SUCCESSFUL;
5799
5800 if (atomic_read(&pmcraid_adapter_count) >= PMCRAID_MAX_ADAPTERS) {
5801 pmcraid_err
5802 ("maximum number(%d) of supported adapters reached\n",
5803 atomic_read(&pmcraid_adapter_count));
5804 return -ENOMEM;
5805 }
5806
5807 atomic_inc(&pmcraid_adapter_count);
5808 rc = pci_enable_device(pdev);
5809
5810 if (rc) {
5811 dev_err(&pdev->dev, "Cannot enable adapter\n");
5812 atomic_dec(&pmcraid_adapter_count);
5813 return rc;
5814 }
5815
5816 dev_info(&pdev->dev,
5817 "Found new IOA(%x:%x), Total IOA count: %d\n",
5818 pdev->vendor, pdev->device,
5819 atomic_read(&pmcraid_adapter_count));
5820
5821 rc = pci_request_regions(pdev, PMCRAID_DRIVER_NAME);
5822
5823 if (rc < 0) {
5824 dev_err(&pdev->dev,
5825 "Couldn't register memory range of registers\n");
5826 goto out_disable_device;
5827 }
5828
5829 mapped_pci_addr = pci_iomap(pdev, 0, 0);
5830
5831 if (!mapped_pci_addr) {
5832 dev_err(&pdev->dev, "Couldn't map PCI registers memory\n");
5833 rc = -ENOMEM;
5834 goto out_release_regions;
5835 }
5836
5837 pci_set_master(pdev);
5838
5839 /* Firmware requires the system bus address of IOARCB to be within
5840 * 32-bit addressable range though it has 64-bit IOARRIN register.
5841 * However, firmware supports 64-bit streaming DMA buffers, whereas
5842 * coherent buffers are to be 32-bit. Since pci_alloc_consistent always
5843 * returns memory within 4GB (if not, change this logic), coherent
25985edc 5844 * buffers are within firmware acceptable address ranges.
89a36810
AR
5845 */
5846 if ((sizeof(dma_addr_t) == 4) ||
5847 pci_set_dma_mask(pdev, DMA_BIT_MASK(64)))
5848 rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
5849
5850 /* firmware expects 32-bit DMA addresses for IOARRIN register; set 32
5851 * bit mask for pci_alloc_consistent to return addresses within 4GB
5852 */
5853 if (rc == 0)
5854 rc = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
5855
5856 if (rc != 0) {
5857 dev_err(&pdev->dev, "Failed to set PCI DMA mask\n");
5858 goto cleanup_nomem;
5859 }
5860
5861 host = scsi_host_alloc(&pmcraid_host_template,
5862 sizeof(struct pmcraid_instance));
5863
5864 if (!host) {
5865 dev_err(&pdev->dev, "scsi_host_alloc failed!\n");
5866 rc = -ENOMEM;
5867 goto cleanup_nomem;
5868 }
5869
5870 host->max_id = PMCRAID_MAX_NUM_TARGETS_PER_BUS;
5871 host->max_lun = PMCRAID_MAX_NUM_LUNS_PER_TARGET;
5872 host->unique_id = host->host_no;
5873 host->max_channel = PMCRAID_MAX_BUS_TO_SCAN;
5874 host->max_cmd_len = PMCRAID_MAX_CDB_LEN;
5875
5876 /* zero out entire instance structure */
5877 pinstance = (struct pmcraid_instance *)host->hostdata;
5878 memset(pinstance, 0, sizeof(*pinstance));
5879
5880 pinstance->chip_cfg =
5881 (struct pmcraid_chip_details *)(dev_id->driver_data);
5882
5883 rc = pmcraid_init_instance(pdev, host, mapped_pci_addr);
5884
5885 if (rc < 0) {
5886 dev_err(&pdev->dev, "failed to initialize adapter instance\n");
5887 goto out_scsi_host_put;
5888 }
5889
5890 pci_set_drvdata(pdev, pinstance);
5891
5892 /* Save PCI config-space for use following the reset */
5893 rc = pci_save_state(pinstance->pdev);
5894
5895 if (rc != 0) {
5896 dev_err(&pdev->dev, "Failed to save PCI config space\n");
5897 goto out_scsi_host_put;
5898 }
5899
5900 pmcraid_disable_interrupts(pinstance, ~0);
5901
5902 rc = pmcraid_register_interrupt_handler(pinstance);
5903
5904 if (rc) {
34876402 5905 dev_err(&pdev->dev, "couldn't register interrupt handler\n");
89a36810
AR
5906 goto out_scsi_host_put;
5907 }
5908
5909 pmcraid_init_tasklets(pinstance);
5910
5911 /* allocate verious buffers used by LLD.*/
5912 rc = pmcraid_init_buffers(pinstance);
5913
5914 if (rc) {
5915 pmcraid_err("couldn't allocate memory blocks\n");
5916 goto out_unregister_isr;
5917 }
5918
5919 /* check the reset type required */
5920 pmcraid_reset_type(pinstance);
5921
5922 pmcraid_enable_interrupts(pinstance, PMCRAID_PCI_INTERRUPTS);
5923
5924 /* Start IOA firmware initialization and bring card to Operational
5925 * state.
5926 */
5927 pmcraid_info("starting IOA initialization sequence\n");
5928 if (pmcraid_reset_bringup(pinstance)) {
c20c4267 5929 dev_err(&pdev->dev, "couldn't initialize IOA\n");
89a36810
AR
5930 rc = 1;
5931 goto out_release_bufs;
5932 }
5933
5934 /* Add adapter instance into mid-layer list */
5935 rc = scsi_add_host(pinstance->host, &pdev->dev);
5936 if (rc != 0) {
5937 pmcraid_err("couldn't add host into mid-layer: %d\n", rc);
5938 goto out_release_bufs;
5939 }
5940
5941 scsi_scan_host(pinstance->host);
5942
5943 rc = pmcraid_setup_chrdev(pinstance);
5944
5945 if (rc != 0) {
5946 pmcraid_err("couldn't create mgmt interface, error: %x\n",
5947 rc);
5948 goto out_remove_host;
5949 }
5950
5951 /* Schedule worker thread to handle CCN and take care of adding and
5952 * removing devices to OS
5953 */
5954 atomic_set(&pinstance->expose_resources, 1);
5955 schedule_work(&pinstance->worker_q);
5956 return rc;
5957
5958out_remove_host:
5959 scsi_remove_host(host);
5960
5961out_release_bufs:
5962 pmcraid_release_buffers(pinstance);
5963
5964out_unregister_isr:
5965 pmcraid_kill_tasklets(pinstance);
5966 pmcraid_unregister_interrupt_handler(pinstance);
5967
5968out_scsi_host_put:
5969 scsi_host_put(host);
5970
5971cleanup_nomem:
5972 iounmap(mapped_pci_addr);
5973
5974out_release_regions:
5975 pci_release_regions(pdev);
5976
5977out_disable_device:
5978 atomic_dec(&pmcraid_adapter_count);
89a36810
AR
5979 pci_disable_device(pdev);
5980 return -ENODEV;
5981}
5982
5983/*
5984 * PCI driver structure of pcmraid driver
5985 */
5986static struct pci_driver pmcraid_driver = {
5987 .name = PMCRAID_DRIVER_NAME,
5988 .id_table = pmcraid_pci_table,
5989 .probe = pmcraid_probe,
5990 .remove = pmcraid_remove,
5991 .suspend = pmcraid_suspend,
5992 .resume = pmcraid_resume,
5993 .shutdown = pmcraid_shutdown
5994};
5995
89a36810
AR
5996/**
5997 * pmcraid_init - module load entry point
5998 */
5999static int __init pmcraid_init(void)
6000{
6001 dev_t dev;
6002 int error;
6003
a1b66665
MM
6004 pmcraid_info("%s Device Driver version: %s\n",
6005 PMCRAID_DRIVER_NAME, PMCRAID_DRIVER_VERSION);
89a36810
AR
6006
6007 error = alloc_chrdev_region(&dev, 0,
6008 PMCRAID_MAX_ADAPTERS,
6009 PMCRAID_DEVFILE);
6010
6011 if (error) {
6012 pmcraid_err("failed to get a major number for adapters\n");
6013 goto out_init;
6014 }
6015
6016 pmcraid_major = MAJOR(dev);
6017 pmcraid_class = class_create(THIS_MODULE, PMCRAID_DEVFILE);
6018
6019 if (IS_ERR(pmcraid_class)) {
6020 error = PTR_ERR(pmcraid_class);
278cee05 6021 pmcraid_err("failed to register with sysfs, error = %x\n",
89a36810
AR
6022 error);
6023 goto out_unreg_chrdev;
6024 }
6025
89a36810
AR
6026 error = pmcraid_netlink_init();
6027
6028 if (error)
6029 goto out_unreg_chrdev;
6030
6031 error = pci_register_driver(&pmcraid_driver);
6032
6033 if (error == 0)
6034 goto out_init;
6035
6036 pmcraid_err("failed to register pmcraid driver, error = %x\n",
6037 error);
6038 class_destroy(pmcraid_class);
6039 pmcraid_netlink_release();
6040
6041out_unreg_chrdev:
6042 unregister_chrdev_region(MKDEV(pmcraid_major, 0), PMCRAID_MAX_ADAPTERS);
34876402 6043
89a36810
AR
6044out_init:
6045 return error;
6046}
6047
6048/**
6049 * pmcraid_exit - module unload entry point
6050 */
6051static void __exit pmcraid_exit(void)
6052{
6053 pmcraid_netlink_release();
89a36810
AR
6054 unregister_chrdev_region(MKDEV(pmcraid_major, 0),
6055 PMCRAID_MAX_ADAPTERS);
6056 pci_unregister_driver(&pmcraid_driver);
592488a3 6057 class_destroy(pmcraid_class);
89a36810
AR
6058}
6059
6060module_init(pmcraid_init);
6061module_exit(pmcraid_exit);