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[PATCH] libata: use preallocated buffers
[linux-2.6-block.git] / drivers / scsi / libata-core.c
CommitLineData
1da177e4 1/*
af36d7f0
JG		 2 * libata-core.c - helper library for ATA
3 *
4 * Maintained by: Jeff Garzik <jgarzik@pobox.com>
5 * Please ALWAYS copy linux-ide@vger.kernel.org
6 * on emails.
7 *
8 * Copyright 2003-2004 Red Hat, Inc. All rights reserved.
9 * Copyright 2003-2004 Jeff Garzik
10 *
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2, or (at your option)
15 * any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; see the file COPYING. If not, write to
24 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
25 *
26 *
27 * libata documentation is available via 'make {ps|pdf}docs',
28 * as Documentation/DocBook/libata.*
29 *
30 * Hardware documentation available from http://www.t13.org/ and
31 * http://www.sata-io.org/
32 *
1da177e4
LT		 33 */
34
35#include <linux/config.h>
36#include <linux/kernel.h>
37#include <linux/module.h>
38#include <linux/pci.h>
39#include <linux/init.h>
40#include <linux/list.h>
41#include <linux/mm.h>
42#include <linux/highmem.h>
43#include <linux/spinlock.h>
44#include <linux/blkdev.h>
45#include <linux/delay.h>
46#include <linux/timer.h>
47#include <linux/interrupt.h>
48#include <linux/completion.h>
49#include <linux/suspend.h>
50#include <linux/workqueue.h>
67846b30 51#include <linux/jiffies.h>
378f058c 52#include <linux/scatterlist.h>
1da177e4 53#include <scsi/scsi.h>
1da177e4 54#include "scsi_priv.h"
193515d5 55#include <scsi/scsi_cmnd.h>
1da177e4
LT		 56#include <scsi/scsi_host.h>
57#include <linux/libata.h>
58#include <asm/io.h>
59#include <asm/semaphore.h>
60#include <asm/byteorder.h>
61
62#include "libata.h"
63
6aff8f1f 64static unsigned int ata_dev_init_params(struct ata_port *ap,
00b6f5e9
AL		 65 struct ata_device *dev,
66 u16 heads,
67 u16 sectors);
83206a29
TH		 68static unsigned int ata_dev_set_xfermode(struct ata_port *ap,
69 struct ata_device *dev);
acf356b1 70static void ata_dev_xfermask(struct ata_port *ap, struct ata_device *dev);
1da177e4
LT		 71
72static unsigned int ata_unique_id = 1;
73static struct workqueue_struct *ata_wq;
74
418dc1f5 75int atapi_enabled = 1;
1623c81e
JG		 76module_param(atapi_enabled, int, 0444);
77MODULE_PARM_DESC(atapi_enabled, "Enable discovery of ATAPI devices (0=off, 1=on)");
78
95de719a
AL		 79int atapi_dmadir = 0;
80module_param(atapi_dmadir, int, 0444);
81MODULE_PARM_DESC(atapi_dmadir, "Enable ATAPI DMADIR bridge support (0=off, 1=on)");
82
c3c013a2
JG		 83int libata_fua = 0;
84module_param_named(fua, libata_fua, int, 0444);
85MODULE_PARM_DESC(fua, "FUA support (0=off, 1=on)");
86
1da177e4
LT		 87MODULE_AUTHOR("Jeff Garzik");
88MODULE_DESCRIPTION("Library module for ATA devices");
89MODULE_LICENSE("GPL");
90MODULE_VERSION(DRV_VERSION);
91
0baab86b 92
1da177e4
LT		 93/**
94 * ata_tf_to_fis - Convert ATA taskfile to SATA FIS structure
95 * @tf: Taskfile to convert
96 * @fis: Buffer into which data will output
97 * @pmp: Port multiplier port
98 *
99 * Converts a standard ATA taskfile to a Serial ATA
100 * FIS structure (Register - Host to Device).
101 *
102 * LOCKING:
103 * Inherited from caller.
104 */
105
057ace5e 106void ata_tf_to_fis(const struct ata_taskfile *tf, u8 *fis, u8 pmp)
1da177e4
LT		 107{
108 fis[0] = 0x27; /* Register - Host to Device FIS */
109 fis[1] = (pmp & 0xf) | (1 << 7); /* Port multiplier number,
110 bit 7 indicates Command FIS */
111 fis[2] = tf->command;
112 fis[3] = tf->feature;
113
114 fis[4] = tf->lbal;
115 fis[5] = tf->lbam;
116 fis[6] = tf->lbah;
117 fis[7] = tf->device;
118
119 fis[8] = tf->hob_lbal;
120 fis[9] = tf->hob_lbam;
121 fis[10] = tf->hob_lbah;
122 fis[11] = tf->hob_feature;
123
124 fis[12] = tf->nsect;
125 fis[13] = tf->hob_nsect;
126 fis[14] = 0;
127 fis[15] = tf->ctl;
128
129 fis[16] = 0;
130 fis[17] = 0;
131 fis[18] = 0;
132 fis[19] = 0;
133}
134
135/**
136 * ata_tf_from_fis - Convert SATA FIS to ATA taskfile
137 * @fis: Buffer from which data will be input
138 * @tf: Taskfile to output
139 *
e12a1be6 140 * Converts a serial ATA FIS structure to a standard ATA taskfile.
1da177e4
LT		 141 *
142 * LOCKING:
143 * Inherited from caller.
144 */
145
057ace5e 146void ata_tf_from_fis(const u8 *fis, struct ata_taskfile *tf)
1da177e4
LT		 147{
148 tf->command = fis[2]; /* status */
149 tf->feature = fis[3]; /* error */
150
151 tf->lbal = fis[4];
152 tf->lbam = fis[5];
153 tf->lbah = fis[6];
154 tf->device = fis[7];
155
156 tf->hob_lbal = fis[8];
157 tf->hob_lbam = fis[9];
158 tf->hob_lbah = fis[10];
159
160 tf->nsect = fis[12];
161 tf->hob_nsect = fis[13];
162}
163
8cbd6df1
AL		 164static const u8 ata_rw_cmds[] = {
165 /* pio multi */
166 ATA_CMD_READ_MULTI,
167 ATA_CMD_WRITE_MULTI,
168 ATA_CMD_READ_MULTI_EXT,
169 ATA_CMD_WRITE_MULTI_EXT,
9a3dccc4
TH		 170 0,
171 0,
172 0,
173 ATA_CMD_WRITE_MULTI_FUA_EXT,
8cbd6df1
AL		 174 /* pio */
175 ATA_CMD_PIO_READ,
176 ATA_CMD_PIO_WRITE,
177 ATA_CMD_PIO_READ_EXT,
178 ATA_CMD_PIO_WRITE_EXT,
9a3dccc4
TH		 179 0,
180 0,
181 0,
182 0,
8cbd6df1
AL		 183 /* dma */
184 ATA_CMD_READ,
185 ATA_CMD_WRITE,
186 ATA_CMD_READ_EXT,
9a3dccc4
TH		 187 ATA_CMD_WRITE_EXT,
188 0,
189 0,
190 0,
191 ATA_CMD_WRITE_FUA_EXT
8cbd6df1 192};
1da177e4
LT		 193
194/**
8cbd6df1
AL		 195 * ata_rwcmd_protocol - set taskfile r/w commands and protocol
196 * @qc: command to examine and configure
1da177e4 197 *
2e9edbf8 198 * Examine the device configuration and tf->flags to calculate
8cbd6df1 199 * the proper read/write commands and protocol to use.
1da177e4
LT		 200 *
201 * LOCKING:
202 * caller.
203 */
9a3dccc4 204int ata_rwcmd_protocol(struct ata_queued_cmd *qc)
1da177e4 205{
8cbd6df1
AL		 206 struct ata_taskfile *tf = &qc->tf;
207 struct ata_device *dev = qc->dev;
9a3dccc4 208 u8 cmd;
1da177e4 209
9a3dccc4 210 int index, fua, lba48, write;
2e9edbf8 211
9a3dccc4 212 fua = (tf->flags & ATA_TFLAG_FUA) ? 4 : 0;
8cbd6df1
AL		 213 lba48 = (tf->flags & ATA_TFLAG_LBA48) ? 2 : 0;
214 write = (tf->flags & ATA_TFLAG_WRITE) ? 1 : 0;
1da177e4 215
8cbd6df1
AL		 216 if (dev->flags & ATA_DFLAG_PIO) {
217 tf->protocol = ATA_PROT_PIO;
9a3dccc4 218 index = dev->multi_count ? 0 : 8;
8d238e01
AC		 219 } else if (lba48 && (qc->ap->flags & ATA_FLAG_PIO_LBA48)) {
220 /* Unable to use DMA due to host limitation */
221 tf->protocol = ATA_PROT_PIO;
0565c26d 222 index = dev->multi_count ? 0 : 8;
8cbd6df1
AL		 223 } else {
224 tf->protocol = ATA_PROT_DMA;
9a3dccc4 225 index = 16;
8cbd6df1 226 }
1da177e4 227
9a3dccc4
TH		 228 cmd = ata_rw_cmds[index + fua + lba48 + write];
229 if (cmd) {
230 tf->command = cmd;
231 return 0;
232 }
233 return -1;
1da177e4
LT		 234}
235
cb95d562
TH		 236/**
237 * ata_pack_xfermask - Pack pio, mwdma and udma masks into xfer_mask
238 * @pio_mask: pio_mask
239 * @mwdma_mask: mwdma_mask
240 * @udma_mask: udma_mask
241 *
242 * Pack @pio_mask, @mwdma_mask and @udma_mask into a single
243 * unsigned int xfer_mask.
244 *
245 * LOCKING:
246 * None.
247 *
248 * RETURNS:
249 * Packed xfer_mask.
250 */
251static unsigned int ata_pack_xfermask(unsigned int pio_mask,
252 unsigned int mwdma_mask,
253 unsigned int udma_mask)
254{
255 return ((pio_mask << ATA_SHIFT_PIO) & ATA_MASK_PIO) |
256 ((mwdma_mask << ATA_SHIFT_MWDMA) & ATA_MASK_MWDMA) |
257 ((udma_mask << ATA_SHIFT_UDMA) & ATA_MASK_UDMA);
258}
259
c0489e4e
TH		 260/**
261 * ata_unpack_xfermask - Unpack xfer_mask into pio, mwdma and udma masks
262 * @xfer_mask: xfer_mask to unpack
263 * @pio_mask: resulting pio_mask
264 * @mwdma_mask: resulting mwdma_mask
265 * @udma_mask: resulting udma_mask
266 *
267 * Unpack @xfer_mask into @pio_mask, @mwdma_mask and @udma_mask.
268 * Any NULL distination masks will be ignored.
269 */
270static void ata_unpack_xfermask(unsigned int xfer_mask,
271 unsigned int *pio_mask,
272 unsigned int *mwdma_mask,
273 unsigned int *udma_mask)
274{
275 if (pio_mask)
276 *pio_mask = (xfer_mask & ATA_MASK_PIO) >> ATA_SHIFT_PIO;
277 if (mwdma_mask)
278 *mwdma_mask = (xfer_mask & ATA_MASK_MWDMA) >> ATA_SHIFT_MWDMA;
279 if (udma_mask)
280 *udma_mask = (xfer_mask & ATA_MASK_UDMA) >> ATA_SHIFT_UDMA;
281}
282
cb95d562 283static const struct ata_xfer_ent {
be9a50c8 284 int shift, bits;
cb95d562
TH		 285 u8 base;
286} ata_xfer_tbl[] = {
287 { ATA_SHIFT_PIO, ATA_BITS_PIO, XFER_PIO_0 },
288 { ATA_SHIFT_MWDMA, ATA_BITS_MWDMA, XFER_MW_DMA_0 },
289 { ATA_SHIFT_UDMA, ATA_BITS_UDMA, XFER_UDMA_0 },
290 { -1, },
291};
292
293/**
294 * ata_xfer_mask2mode - Find matching XFER_* for the given xfer_mask
295 * @xfer_mask: xfer_mask of interest
296 *
297 * Return matching XFER_* value for @xfer_mask. Only the highest
298 * bit of @xfer_mask is considered.
299 *
300 * LOCKING:
301 * None.
302 *
303 * RETURNS:
304 * Matching XFER_* value, 0 if no match found.
305 */
306static u8 ata_xfer_mask2mode(unsigned int xfer_mask)
307{
308 int highbit = fls(xfer_mask) - 1;
309 const struct ata_xfer_ent *ent;
310
311 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
312 if (highbit >= ent->shift && highbit < ent->shift + ent->bits)
313 return ent->base + highbit - ent->shift;
314 return 0;
315}
316
317/**
318 * ata_xfer_mode2mask - Find matching xfer_mask for XFER_*
319 * @xfer_mode: XFER_* of interest
320 *
321 * Return matching xfer_mask for @xfer_mode.
322 *
323 * LOCKING:
324 * None.
325 *
326 * RETURNS:
327 * Matching xfer_mask, 0 if no match found.
328 */
329static unsigned int ata_xfer_mode2mask(u8 xfer_mode)
330{
331 const struct ata_xfer_ent *ent;
332
333 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
334 if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits)
335 return 1 << (ent->shift + xfer_mode - ent->base);
336 return 0;
337}
338
339/**
340 * ata_xfer_mode2shift - Find matching xfer_shift for XFER_*
341 * @xfer_mode: XFER_* of interest
342 *
343 * Return matching xfer_shift for @xfer_mode.
344 *
345 * LOCKING:
346 * None.
347 *
348 * RETURNS:
349 * Matching xfer_shift, -1 if no match found.
350 */
351static int ata_xfer_mode2shift(unsigned int xfer_mode)
352{
353 const struct ata_xfer_ent *ent;
354
355 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
356 if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits)
357 return ent->shift;
358 return -1;
359}
360
1da177e4 361/**
1da7b0d0
TH		 362 * ata_mode_string - convert xfer_mask to string
363 * @xfer_mask: mask of bits supported; only highest bit counts.
1da177e4
LT		 364 *
365 * Determine string which represents the highest speed
1da7b0d0 366 * (highest bit in @modemask).
1da177e4
LT		 367 *
368 * LOCKING:
369 * None.
370 *
371 * RETURNS:
372 * Constant C string representing highest speed listed in
1da7b0d0 373 * @mode_mask, or the constant C string "<n/a>".
1da177e4 374 */
1da7b0d0 375static const char *ata_mode_string(unsigned int xfer_mask)
1da177e4 376{
75f554bc
TH		 377 static const char * const xfer_mode_str[] = {
378 "PIO0",
379 "PIO1",
380 "PIO2",
381 "PIO3",
382 "PIO4",
383 "MWDMA0",
384 "MWDMA1",
385 "MWDMA2",
386 "UDMA/16",
387 "UDMA/25",
388 "UDMA/33",
389 "UDMA/44",
390 "UDMA/66",
391 "UDMA/100",
392 "UDMA/133",
393 "UDMA7",
394 };
1da7b0d0 395 int highbit;
1da177e4 396
1da7b0d0
TH		 397 highbit = fls(xfer_mask) - 1;
398 if (highbit >= 0 && highbit < ARRAY_SIZE(xfer_mode_str))
399 return xfer_mode_str[highbit];
1da177e4 400 return "<n/a>";
1da177e4
LT		 401}
402
4c360c81
TH		 403static const char *sata_spd_string(unsigned int spd)
404{
405 static const char * const spd_str[] = {
406 "1.5 Gbps",
407 "3.0 Gbps",
408 };
409
410 if (spd == 0 || (spd - 1) >= ARRAY_SIZE(spd_str))
411 return "<unknown>";
412 return spd_str[spd - 1];
413}
414
1ad8e7f9 415void ata_dev_disable(struct ata_port *ap, struct ata_device *dev)
0b8efb0a 416{
e1211e3f 417 if (ata_dev_enabled(dev)) {
0b8efb0a
TH		 418 printk(KERN_WARNING "ata%u: dev %u disabled\n",
419 ap->id, dev->devno);
420 dev->class++;
421 }
422}
423
1da177e4
LT		 424/**
425 * ata_pio_devchk - PATA device presence detection
426 * @ap: ATA channel to examine
427 * @device: Device to examine (starting at zero)
428 *
429 * This technique was originally described in
430 * Hale Landis's ATADRVR (www.ata-atapi.com), and
431 * later found its way into the ATA/ATAPI spec.
432 *
433 * Write a pattern to the ATA shadow registers,
434 * and if a device is present, it will respond by
435 * correctly storing and echoing back the
436 * ATA shadow register contents.
437 *
438 * LOCKING:
439 * caller.
440 */
441
442static unsigned int ata_pio_devchk(struct ata_port *ap,
443 unsigned int device)
444{
445 struct ata_ioports *ioaddr = &ap->ioaddr;
446 u8 nsect, lbal;
447
448 ap->ops->dev_select(ap, device);
449
450 outb(0x55, ioaddr->nsect_addr);
451 outb(0xaa, ioaddr->lbal_addr);
452
453 outb(0xaa, ioaddr->nsect_addr);
454 outb(0x55, ioaddr->lbal_addr);
455
456 outb(0x55, ioaddr->nsect_addr);
457 outb(0xaa, ioaddr->lbal_addr);
458
459 nsect = inb(ioaddr->nsect_addr);
460 lbal = inb(ioaddr->lbal_addr);
461
462 if ((nsect == 0x55) && (lbal == 0xaa))
463 return 1; /* we found a device */
464
465 return 0; /* nothing found */
466}
467
468/**
469 * ata_mmio_devchk - PATA device presence detection
470 * @ap: ATA channel to examine
471 * @device: Device to examine (starting at zero)
472 *
473 * This technique was originally described in
474 * Hale Landis's ATADRVR (www.ata-atapi.com), and
475 * later found its way into the ATA/ATAPI spec.
476 *
477 * Write a pattern to the ATA shadow registers,
478 * and if a device is present, it will respond by
479 * correctly storing and echoing back the
480 * ATA shadow register contents.
481 *
482 * LOCKING:
483 * caller.
484 */
485
486static unsigned int ata_mmio_devchk(struct ata_port *ap,
487 unsigned int device)
488{
489 struct ata_ioports *ioaddr = &ap->ioaddr;
490 u8 nsect, lbal;
491
492 ap->ops->dev_select(ap, device);
493
494 writeb(0x55, (void __iomem *) ioaddr->nsect_addr);
495 writeb(0xaa, (void __iomem *) ioaddr->lbal_addr);
496
497 writeb(0xaa, (void __iomem *) ioaddr->nsect_addr);
498 writeb(0x55, (void __iomem *) ioaddr->lbal_addr);
499
500 writeb(0x55, (void __iomem *) ioaddr->nsect_addr);
501 writeb(0xaa, (void __iomem *) ioaddr->lbal_addr);
502
503 nsect = readb((void __iomem *) ioaddr->nsect_addr);
504 lbal = readb((void __iomem *) ioaddr->lbal_addr);
505
506 if ((nsect == 0x55) && (lbal == 0xaa))
507 return 1; /* we found a device */
508
509 return 0; /* nothing found */
510}
511
512/**
513 * ata_devchk - PATA device presence detection
514 * @ap: ATA channel to examine
515 * @device: Device to examine (starting at zero)
516 *
517 * Dispatch ATA device presence detection, depending
518 * on whether we are using PIO or MMIO to talk to the
519 * ATA shadow registers.
520 *
521 * LOCKING:
522 * caller.
523 */
524
525static unsigned int ata_devchk(struct ata_port *ap,
526 unsigned int device)
527{
528 if (ap->flags & ATA_FLAG_MMIO)
529 return ata_mmio_devchk(ap, device);
530 return ata_pio_devchk(ap, device);
531}
532
533/**
534 * ata_dev_classify - determine device type based on ATA-spec signature
535 * @tf: ATA taskfile register set for device to be identified
536 *
537 * Determine from taskfile register contents whether a device is
538 * ATA or ATAPI, as per "Signature and persistence" section
539 * of ATA/PI spec (volume 1, sect 5.14).
540 *
541 * LOCKING:
542 * None.
543 *
544 * RETURNS:
545 * Device type, %ATA_DEV_ATA, %ATA_DEV_ATAPI, or %ATA_DEV_UNKNOWN
546 * the event of failure.
547 */
548
057ace5e 549unsigned int ata_dev_classify(const struct ata_taskfile *tf)
1da177e4
LT		 550{
551 /* Apple's open source Darwin code hints that some devices only
552 * put a proper signature into the LBA mid/high registers,
553 * So, we only check those. It's sufficient for uniqueness.
554 */
555
556 if (((tf->lbam == 0) && (tf->lbah == 0)) ||
557 ((tf->lbam == 0x3c) && (tf->lbah == 0xc3))) {
558 DPRINTK("found ATA device by sig\n");
559 return ATA_DEV_ATA;
560 }
561
562 if (((tf->lbam == 0x14) && (tf->lbah == 0xeb)) ||
563 ((tf->lbam == 0x69) && (tf->lbah == 0x96))) {
564 DPRINTK("found ATAPI device by sig\n");
565 return ATA_DEV_ATAPI;
566 }
567
568 DPRINTK("unknown device\n");
569 return ATA_DEV_UNKNOWN;
570}
571
572/**
573 * ata_dev_try_classify - Parse returned ATA device signature
574 * @ap: ATA channel to examine
575 * @device: Device to examine (starting at zero)
b4dc7623 576 * @r_err: Value of error register on completion
1da177e4
LT		 577 *
578 * After an event -- SRST, E.D.D., or SATA COMRESET -- occurs,
579 * an ATA/ATAPI-defined set of values is placed in the ATA
580 * shadow registers, indicating the results of device detection
581 * and diagnostics.
582 *
583 * Select the ATA device, and read the values from the ATA shadow
584 * registers. Then parse according to the Error register value,
585 * and the spec-defined values examined by ata_dev_classify().
586 *
587 * LOCKING:
588 * caller.
b4dc7623
TH		 589 *
590 * RETURNS:
591 * Device type - %ATA_DEV_ATA, %ATA_DEV_ATAPI or %ATA_DEV_NONE.
1da177e4
LT		 592 */
593
b4dc7623
TH		 594static unsigned int
595ata_dev_try_classify(struct ata_port *ap, unsigned int device, u8 *r_err)
1da177e4 596{
1da177e4
LT		 597 struct ata_taskfile tf;
598 unsigned int class;
599 u8 err;
600
601 ap->ops->dev_select(ap, device);
602
603 memset(&tf, 0, sizeof(tf));
604
1da177e4 605 ap->ops->tf_read(ap, &tf);
0169e284 606 err = tf.feature;
b4dc7623
TH		 607 if (r_err)
608 *r_err = err;
1da177e4
LT		 609
610 /* see if device passed diags */
611 if (err == 1)
612 /* do nothing */ ;
613 else if ((device == 0) && (err == 0x81))
614 /* do nothing */ ;
615 else
b4dc7623 616 return ATA_DEV_NONE;
1da177e4 617
b4dc7623 618 /* determine if device is ATA or ATAPI */
1da177e4 619 class = ata_dev_classify(&tf);
b4dc7623 620
1da177e4 621 if (class == ATA_DEV_UNKNOWN)
b4dc7623 622 return ATA_DEV_NONE;
1da177e4 623 if ((class == ATA_DEV_ATA) && (ata_chk_status(ap) == 0))
b4dc7623
TH		 624 return ATA_DEV_NONE;
625 return class;
1da177e4
LT		 626}
627
628/**
6a62a04d 629 * ata_id_string - Convert IDENTIFY DEVICE page into string
1da177e4
LT		 630 * @id: IDENTIFY DEVICE results we will examine
631 * @s: string into which data is output
632 * @ofs: offset into identify device page
633 * @len: length of string to return. must be an even number.
634 *
635 * The strings in the IDENTIFY DEVICE page are broken up into
636 * 16-bit chunks. Run through the string, and output each
637 * 8-bit chunk linearly, regardless of platform.
638 *
639 * LOCKING:
640 * caller.
641 */
642
6a62a04d
TH		 643void ata_id_string(const u16 *id, unsigned char *s,
644 unsigned int ofs, unsigned int len)
1da177e4
LT		 645{
646 unsigned int c;
647
648 while (len > 0) {
649 c = id[ofs] >> 8;
650 *s = c;
651 s++;
652
653 c = id[ofs] & 0xff;
654 *s = c;
655 s++;
656
657 ofs++;
658 len -= 2;
659 }
660}
661
0e949ff3 662/**
6a62a04d 663 * ata_id_c_string - Convert IDENTIFY DEVICE page into C string
0e949ff3
TH		 664 * @id: IDENTIFY DEVICE results we will examine
665 * @s: string into which data is output
666 * @ofs: offset into identify device page
667 * @len: length of string to return. must be an odd number.
668 *
6a62a04d 669 * This function is identical to ata_id_string except that it
0e949ff3
TH		 670 * trims trailing spaces and terminates the resulting string with
671 * null. @len must be actual maximum length (even number) + 1.
672 *
673 * LOCKING:
674 * caller.
675 */
6a62a04d
TH		 676void ata_id_c_string(const u16 *id, unsigned char *s,
677 unsigned int ofs, unsigned int len)
0e949ff3
TH		 678{
679 unsigned char *p;
680
681 WARN_ON(!(len & 1));
682
6a62a04d 683 ata_id_string(id, s, ofs, len - 1);
0e949ff3
TH		 684
685 p = s + strnlen(s, len - 1);
686 while (p > s && p[-1] == ' ')
687 p--;
688 *p = '\0';
689}
0baab86b 690
2940740b
TH		 691static u64 ata_id_n_sectors(const u16 *id)
692{
693 if (ata_id_has_lba(id)) {
694 if (ata_id_has_lba48(id))
695 return ata_id_u64(id, 100);
696 else
697 return ata_id_u32(id, 60);
698 } else {
699 if (ata_id_current_chs_valid(id))
700 return ata_id_u32(id, 57);
701 else
702 return id[1] * id[3] * id[6];
703 }
704}
705
0baab86b
EF		 706/**
707 * ata_noop_dev_select - Select device 0/1 on ATA bus
708 * @ap: ATA channel to manipulate
709 * @device: ATA device (numbered from zero) to select
710 *
711 * This function performs no actual function.
712 *
713 * May be used as the dev_select() entry in ata_port_operations.
714 *
715 * LOCKING:
716 * caller.
717 */
1da177e4
LT		 718void ata_noop_dev_select (struct ata_port *ap, unsigned int device)
719{
720}
721
0baab86b 722
1da177e4
LT		 723/**
724 * ata_std_dev_select - Select device 0/1 on ATA bus
725 * @ap: ATA channel to manipulate
726 * @device: ATA device (numbered from zero) to select
727 *
728 * Use the method defined in the ATA specification to
729 * make either device 0, or device 1, active on the
0baab86b
EF		 730 * ATA channel. Works with both PIO and MMIO.
731 *
732 * May be used as the dev_select() entry in ata_port_operations.
1da177e4
LT		 733 *
734 * LOCKING:
735 * caller.
736 */
737
738void ata_std_dev_select (struct ata_port *ap, unsigned int device)
739{
740 u8 tmp;
741
742 if (device == 0)
743 tmp = ATA_DEVICE_OBS;
744 else
745 tmp = ATA_DEVICE_OBS | ATA_DEV1;
746
747 if (ap->flags & ATA_FLAG_MMIO) {
748 writeb(tmp, (void __iomem *) ap->ioaddr.device_addr);
749 } else {
750 outb(tmp, ap->ioaddr.device_addr);
751 }
752 ata_pause(ap); /* needed; also flushes, for mmio */
753}
754
755/**
756 * ata_dev_select - Select device 0/1 on ATA bus
757 * @ap: ATA channel to manipulate
758 * @device: ATA device (numbered from zero) to select
759 * @wait: non-zero to wait for Status register BSY bit to clear
760 * @can_sleep: non-zero if context allows sleeping
761 *
762 * Use the method defined in the ATA specification to
763 * make either device 0, or device 1, active on the
764 * ATA channel.
765 *
766 * This is a high-level version of ata_std_dev_select(),
767 * which additionally provides the services of inserting
768 * the proper pauses and status polling, where needed.
769 *
770 * LOCKING:
771 * caller.
772 */
773
774void ata_dev_select(struct ata_port *ap, unsigned int device,
775 unsigned int wait, unsigned int can_sleep)
776{
777 VPRINTK("ENTER, ata%u: device %u, wait %u\n",
778 ap->id, device, wait);
779
780 if (wait)
781 ata_wait_idle(ap);
782
783 ap->ops->dev_select(ap, device);
784
785 if (wait) {
786 if (can_sleep && ap->device[device].class == ATA_DEV_ATAPI)
787 msleep(150);
788 ata_wait_idle(ap);
789 }
790}
791
792/**
793 * ata_dump_id - IDENTIFY DEVICE info debugging output
0bd3300a 794 * @id: IDENTIFY DEVICE page to dump
1da177e4 795 *
0bd3300a
TH		 796 * Dump selected 16-bit words from the given IDENTIFY DEVICE
797 * page.
1da177e4
LT		 798 *
799 * LOCKING:
800 * caller.
801 */
802
0bd3300a 803static inline void ata_dump_id(const u16 *id)
1da177e4
LT		 804{
805 DPRINTK("49==0x%04x "
806 "53==0x%04x "
807 "63==0x%04x "
808 "64==0x%04x "
809 "75==0x%04x \n",
0bd3300a
TH		 810 id[49],
811 id[53],
812 id[63],
813 id[64],
814 id[75]);
1da177e4
LT		 815 DPRINTK("80==0x%04x "
816 "81==0x%04x "
817 "82==0x%04x "
818 "83==0x%04x "
819 "84==0x%04x \n",
0bd3300a
TH		 820 id[80],
821 id[81],
822 id[82],
823 id[83],
824 id[84]);
1da177e4
LT		 825 DPRINTK("88==0x%04x "
826 "93==0x%04x\n",
0bd3300a
TH		 827 id[88],
828 id[93]);
1da177e4
LT		 829}
830
cb95d562
TH		 831/**
832 * ata_id_xfermask - Compute xfermask from the given IDENTIFY data
833 * @id: IDENTIFY data to compute xfer mask from
834 *
835 * Compute the xfermask for this device. This is not as trivial
836 * as it seems if we must consider early devices correctly.
837 *
838 * FIXME: pre IDE drive timing (do we care ?).
839 *
840 * LOCKING:
841 * None.
842 *
843 * RETURNS:
844 * Computed xfermask
845 */
846static unsigned int ata_id_xfermask(const u16 *id)
847{
848 unsigned int pio_mask, mwdma_mask, udma_mask;
849
850 /* Usual case. Word 53 indicates word 64 is valid */
851 if (id[ATA_ID_FIELD_VALID] & (1 << 1)) {
852 pio_mask = id[ATA_ID_PIO_MODES] & 0x03;
853 pio_mask <<= 3;
854 pio_mask |= 0x7;
855 } else {
856 /* If word 64 isn't valid then Word 51 high byte holds
857 * the PIO timing number for the maximum. Turn it into
858 * a mask.
859 */
860 pio_mask = (2 << (id[ATA_ID_OLD_PIO_MODES] & 0xFF)) - 1 ;
861
862 /* But wait.. there's more. Design your standards by
863 * committee and you too can get a free iordy field to
864 * process. However its the speeds not the modes that
865 * are supported... Note drivers using the timing API
866 * will get this right anyway
867 */
868 }
869
870 mwdma_mask = id[ATA_ID_MWDMA_MODES] & 0x07;
fb21f0d0
TH		 871
872 udma_mask = 0;
873 if (id[ATA_ID_FIELD_VALID] & (1 << 2))
874 udma_mask = id[ATA_ID_UDMA_MODES] & 0xff;
cb95d562
TH		 875
876 return ata_pack_xfermask(pio_mask, mwdma_mask, udma_mask);
877}
878
86e45b6b
TH		 879/**
880 * ata_port_queue_task - Queue port_task
881 * @ap: The ata_port to queue port_task for
882 *
883 * Schedule @fn(@data) for execution after @delay jiffies using
884 * port_task. There is one port_task per port and it's the
885 * user(low level driver)'s responsibility to make sure that only
886 * one task is active at any given time.
887 *
888 * libata core layer takes care of synchronization between
889 * port_task and EH. ata_port_queue_task() may be ignored for EH
890 * synchronization.
891 *
892 * LOCKING:
893 * Inherited from caller.
894 */
895void ata_port_queue_task(struct ata_port *ap, void (*fn)(void *), void *data,
896 unsigned long delay)
897{
898 int rc;
899
2e755f68 900 if (ap->flags & ATA_FLAG_FLUSH_PORT_TASK)
86e45b6b
TH		 901 return;
902
903 PREPARE_WORK(&ap->port_task, fn, data);
904
905 if (!delay)
906 rc = queue_work(ata_wq, &ap->port_task);
907 else
908 rc = queue_delayed_work(ata_wq, &ap->port_task, delay);
909
910 /* rc == 0 means that another user is using port task */
911 WARN_ON(rc == 0);
912}
913
914/**
915 * ata_port_flush_task - Flush port_task
916 * @ap: The ata_port to flush port_task for
917 *
918 * After this function completes, port_task is guranteed not to
919 * be running or scheduled.
920 *
921 * LOCKING:
922 * Kernel thread context (may sleep)
923 */
924void ata_port_flush_task(struct ata_port *ap)
925{
926 unsigned long flags;
927
928 DPRINTK("ENTER\n");
929
930 spin_lock_irqsave(&ap->host_set->lock, flags);
2e755f68 931 ap->flags |= ATA_FLAG_FLUSH_PORT_TASK;
86e45b6b
TH		 932 spin_unlock_irqrestore(&ap->host_set->lock, flags);
933
934 DPRINTK("flush #1\n");
935 flush_workqueue(ata_wq);
936
937 /*
938 * At this point, if a task is running, it's guaranteed to see
939 * the FLUSH flag; thus, it will never queue pio tasks again.
940 * Cancel and flush.
941 */
942 if (!cancel_delayed_work(&ap->port_task)) {
943 DPRINTK("flush #2\n");
944 flush_workqueue(ata_wq);
945 }
946
947 spin_lock_irqsave(&ap->host_set->lock, flags);
2e755f68 948 ap->flags &= ~ATA_FLAG_FLUSH_PORT_TASK;
86e45b6b
TH		 949 spin_unlock_irqrestore(&ap->host_set->lock, flags);
950
951 DPRINTK("EXIT\n");
952}
953
77853bf2 954void ata_qc_complete_internal(struct ata_queued_cmd *qc)
a2a7a662 955{
77853bf2 956 struct completion *waiting = qc->private_data;
a2a7a662 957
77853bf2 958 qc->ap->ops->tf_read(qc->ap, &qc->tf);
a2a7a662 959 complete(waiting);
a2a7a662
TH		 960}
961
962/**
963 * ata_exec_internal - execute libata internal command
964 * @ap: Port to which the command is sent
965 * @dev: Device to which the command is sent
966 * @tf: Taskfile registers for the command and the result
d69cf37d 967 * @cdb: CDB for packet command
a2a7a662
TH		 968 * @dma_dir: Data tranfer direction of the command
969 * @buf: Data buffer of the command
970 * @buflen: Length of data buffer
971 *
972 * Executes libata internal command with timeout. @tf contains
973 * command on entry and result on return. Timeout and error
974 * conditions are reported via return value. No recovery action
975 * is taken after a command times out. It's caller's duty to
976 * clean up after timeout.
977 *
978 * LOCKING:
979 * None. Should be called with kernel context, might sleep.
980 */
981
1ad8e7f9
TH		 982unsigned ata_exec_internal(struct ata_port *ap, struct ata_device *dev,
983 struct ata_taskfile *tf, const u8 *cdb,
984 int dma_dir, void *buf, unsigned int buflen)
a2a7a662
TH		 985{
986 u8 command = tf->command;
987 struct ata_queued_cmd *qc;
988 DECLARE_COMPLETION(wait);
989 unsigned long flags;
77853bf2 990 unsigned int err_mask;
a2a7a662
TH		 991
992 spin_lock_irqsave(&ap->host_set->lock, flags);
993
994 qc = ata_qc_new_init(ap, dev);
995 BUG_ON(qc == NULL);
996
997 qc->tf = *tf;
d69cf37d
TH		 998 if (cdb)
999 memcpy(qc->cdb, cdb, ATAPI_CDB_LEN);
a2a7a662
TH		 1000 qc->dma_dir = dma_dir;
1001 if (dma_dir != DMA_NONE) {
1002 ata_sg_init_one(qc, buf, buflen);
1003 qc->nsect = buflen / ATA_SECT_SIZE;
1004 }
1005
77853bf2 1006 qc->private_data = &wait;
a2a7a662
TH		 1007 qc->complete_fn = ata_qc_complete_internal;
1008
8e0e694a 1009 ata_qc_issue(qc);
a2a7a662
TH		 1010
1011 spin_unlock_irqrestore(&ap->host_set->lock, flags);
1012
1013 if (!wait_for_completion_timeout(&wait, ATA_TMOUT_INTERNAL)) {
41ade50c
AL		 1014 ata_port_flush_task(ap);
1015
a2a7a662
TH		 1016 spin_lock_irqsave(&ap->host_set->lock, flags);
1017
1018 /* We're racing with irq here. If we lose, the
1019 * following test prevents us from completing the qc
1020 * again. If completion irq occurs after here but
1021 * before the caller cleans up, it will result in a
1022 * spurious interrupt. We can live with that.
1023 */
77853bf2 1024 if (qc->flags & ATA_QCFLAG_ACTIVE) {
11a56d24 1025 qc->err_mask = AC_ERR_TIMEOUT;
a2a7a662
TH		 1026 ata_qc_complete(qc);
1027 printk(KERN_WARNING "ata%u: qc timeout (cmd 0x%x)\n",
1028 ap->id, command);
1029 }
1030
1031 spin_unlock_irqrestore(&ap->host_set->lock, flags);
1032 }
1033
15869303
TH		 1034 /* finish up */
1035 spin_lock_irqsave(&ap->host_set->lock, flags);
1036
77853bf2
TH		 1037 *tf = qc->tf;
1038 err_mask = qc->err_mask;
1039
1040 ata_qc_free(qc);
1041
1f7dd3e9
TH		 1042 /* XXX - Some LLDDs (sata_mv) disable port on command failure.
1043 * Until those drivers are fixed, we detect the condition
1044 * here, fail the command with AC_ERR_SYSTEM and reenable the
1045 * port.
1046 *
1047 * Note that this doesn't change any behavior as internal
1048 * command failure results in disabling the device in the
1049 * higher layer for LLDDs without new reset/EH callbacks.
1050 *
1051 * Kill the following code as soon as those drivers are fixed.
1052 */
198e0fed 1053 if (ap->flags & ATA_FLAG_DISABLED) {
1f7dd3e9
TH		 1054 err_mask |= AC_ERR_SYSTEM;
1055 ata_port_probe(ap);
1056 }
1057
15869303
TH		 1058 spin_unlock_irqrestore(&ap->host_set->lock, flags);
1059
77853bf2 1060 return err_mask;
a2a7a662
TH		 1061}
1062
1bc4ccff
AC		 1063/**
1064 * ata_pio_need_iordy - check if iordy needed
1065 * @adev: ATA device
1066 *
1067 * Check if the current speed of the device requires IORDY. Used
1068 * by various controllers for chip configuration.
1069 */
1070
1071unsigned int ata_pio_need_iordy(const struct ata_device *adev)
1072{
1073 int pio;
1074 int speed = adev->pio_mode - XFER_PIO_0;
1075
1076 if (speed < 2)
1077 return 0;
1078 if (speed > 2)
1079 return 1;
2e9edbf8 1080
1bc4ccff
AC		 1081 /* If we have no drive specific rule, then PIO 2 is non IORDY */
1082
1083 if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE */
1084 pio = adev->id[ATA_ID_EIDE_PIO];
1085 /* Is the speed faster than the drive allows non IORDY ? */
1086 if (pio) {
1087 /* This is cycle times not frequency - watch the logic! */
1088 if (pio > 240) /* PIO2 is 240nS per cycle */
1089 return 1;
1090 return 0;
1091 }
1092 }
1093 return 0;
1094}
1095
1da177e4 1096/**
49016aca
TH		 1097 * ata_dev_read_id - Read ID data from the specified device
1098 * @ap: port on which target device resides
1099 * @dev: target device
1100 * @p_class: pointer to class of the target device (may be changed)
1101 * @post_reset: is this read ID post-reset?
fe635c7e 1102 * @id: buffer to read IDENTIFY data into
1da177e4 1103 *
49016aca
TH		 1104 * Read ID data from the specified device. ATA_CMD_ID_ATA is
1105 * performed on ATA devices and ATA_CMD_ID_ATAPI on ATAPI
aec5c3c1
TH		 1106 * devices. This function also issues ATA_CMD_INIT_DEV_PARAMS
1107 * for pre-ATA4 drives.
1da177e4
LT		 1108 *
1109 * LOCKING:
49016aca
TH		 1110 * Kernel thread context (may sleep)
1111 *
1112 * RETURNS:
1113 * 0 on success, -errno otherwise.
1da177e4 1114 */
49016aca 1115static int ata_dev_read_id(struct ata_port *ap, struct ata_device *dev,
fe635c7e 1116 unsigned int *p_class, int post_reset, u16 *id)
1da177e4 1117{
49016aca 1118 unsigned int class = *p_class;
a0123703 1119 struct ata_taskfile tf;
49016aca
TH		 1120 unsigned int err_mask = 0;
1121 const char *reason;
1122 int rc;
1da177e4 1123
49016aca 1124 DPRINTK("ENTER, host %u, dev %u\n", ap->id, dev->devno);
1da177e4 1125
49016aca 1126 ata_dev_select(ap, dev->devno, 1, 1); /* select device 0/1 */
1da177e4 1127
49016aca
TH		 1128 retry:
1129 ata_tf_init(ap, &tf, dev->devno);
a0123703 1130
49016aca
TH		 1131 switch (class) {
1132 case ATA_DEV_ATA:
a0123703 1133 tf.command = ATA_CMD_ID_ATA;
49016aca
TH		 1134 break;
1135 case ATA_DEV_ATAPI:
a0123703 1136 tf.command = ATA_CMD_ID_ATAPI;
49016aca
TH		 1137 break;
1138 default:
1139 rc = -ENODEV;
1140 reason = "unsupported class";
1141 goto err_out;
1da177e4
LT		 1142 }
1143
a0123703 1144 tf.protocol = ATA_PROT_PIO;
1da177e4 1145
d69cf37d 1146 err_mask = ata_exec_internal(ap, dev, &tf, NULL, DMA_FROM_DEVICE,
49016aca 1147 id, sizeof(id[0]) * ATA_ID_WORDS);
a0123703 1148 if (err_mask) {
49016aca
TH		 1149 rc = -EIO;
1150 reason = "I/O error";
1da177e4
LT		 1151 goto err_out;
1152 }
1153
49016aca 1154 swap_buf_le16(id, ATA_ID_WORDS);
1da177e4 1155
49016aca 1156 /* sanity check */
692785e7 1157 if ((class == ATA_DEV_ATA) != (ata_id_is_ata(id) | ata_id_is_cfa(id))) {
49016aca
TH		 1158 rc = -EINVAL;
1159 reason = "device reports illegal type";
1160 goto err_out;
1161 }
1162
1163 if (post_reset && class == ATA_DEV_ATA) {
1164 /*
1165 * The exact sequence expected by certain pre-ATA4 drives is:
1166 * SRST RESET
1167 * IDENTIFY
1168 * INITIALIZE DEVICE PARAMETERS
1169 * anything else..
1170 * Some drives were very specific about that exact sequence.
1171 */
1172 if (ata_id_major_version(id) < 4 || !ata_id_has_lba(id)) {
00b6f5e9 1173 err_mask = ata_dev_init_params(ap, dev, id[3], id[6]);
49016aca
TH		 1174 if (err_mask) {
1175 rc = -EIO;
1176 reason = "INIT_DEV_PARAMS failed";
1177 goto err_out;
1178 }
1179
1180 /* current CHS translation info (id[53-58]) might be
1181 * changed. reread the identify device info.
1182 */
1183 post_reset = 0;
1184 goto retry;
1185 }
1186 }
1187
1188 *p_class = class;
fe635c7e 1189
49016aca
TH		 1190 return 0;
1191
1192 err_out:
1193 printk(KERN_WARNING "ata%u: dev %u failed to IDENTIFY (%s)\n",
1194 ap->id, dev->devno, reason);
49016aca
TH		 1195 return rc;
1196}
1197
4b2f3ede
TH		 1198static inline u8 ata_dev_knobble(const struct ata_port *ap,
1199 struct ata_device *dev)
1200{
1201 return ((ap->cbl == ATA_CBL_SATA) && (!ata_id_is_sata(dev->id)));
1202}
1203
49016aca 1204/**
ffeae418
TH		 1205 * ata_dev_configure - Configure the specified ATA/ATAPI device
1206 * @ap: Port on which target device resides
1207 * @dev: Target device to configure
4c2d721a 1208 * @print_info: Enable device info printout
ffeae418
TH		 1209 *
1210 * Configure @dev according to @dev->id. Generic and low-level
1211 * driver specific fixups are also applied.
49016aca
TH		 1212 *
1213 * LOCKING:
ffeae418
TH		 1214 * Kernel thread context (may sleep)
1215 *
1216 * RETURNS:
1217 * 0 on success, -errno otherwise
49016aca 1218 */
4c2d721a
TH		 1219static int ata_dev_configure(struct ata_port *ap, struct ata_device *dev,
1220 int print_info)
49016aca 1221{
1148c3a7 1222 const u16 *id = dev->id;
ff8854b2 1223 unsigned int xfer_mask;
49016aca
TH		 1224 int i, rc;
1225
e1211e3f 1226 if (!ata_dev_enabled(dev)) {
49016aca 1227 DPRINTK("ENTER/EXIT (host %u, dev %u) -- nodev\n",
ffeae418
TH		 1228 ap->id, dev->devno);
1229 return 0;
49016aca
TH		 1230 }
1231
ffeae418 1232 DPRINTK("ENTER, host %u, dev %u\n", ap->id, dev->devno);
1da177e4 1233
c39f5ebe
TH		 1234 /* print device capabilities */
1235 if (print_info)
1236 printk(KERN_DEBUG "ata%u: dev %u cfg 49:%04x 82:%04x 83:%04x "
1237 "84:%04x 85:%04x 86:%04x 87:%04x 88:%04x\n",
1238 ap->id, dev->devno, id[49], id[82], id[83],
1239 id[84], id[85], id[86], id[87], id[88]);
1240
208a9933 1241 /* initialize to-be-configured parameters */
ea1dd4e1 1242 dev->flags &= ~ATA_DFLAG_CFG_MASK;
208a9933
TH		 1243 dev->max_sectors = 0;
1244 dev->cdb_len = 0;
1245 dev->n_sectors = 0;
1246 dev->cylinders = 0;
1247 dev->heads = 0;
1248 dev->sectors = 0;
1249
1da177e4
LT		 1250 /*
1251 * common ATA, ATAPI feature tests
1252 */
1253
ff8854b2 1254 /* find max transfer mode; for printk only */
1148c3a7 1255 xfer_mask = ata_id_xfermask(id);
1da177e4 1256
1148c3a7 1257 ata_dump_id(id);
1da177e4
LT		 1258
1259 /* ATA-specific feature tests */
1260 if (dev->class == ATA_DEV_ATA) {
1148c3a7 1261 dev->n_sectors = ata_id_n_sectors(id);
2940740b 1262
1148c3a7 1263 if (ata_id_has_lba(id)) {
4c2d721a 1264 const char *lba_desc;
8bf62ece 1265
4c2d721a
TH		 1266 lba_desc = "LBA";
1267 dev->flags |= ATA_DFLAG_LBA;
1148c3a7 1268 if (ata_id_has_lba48(id)) {
8bf62ece 1269 dev->flags |= ATA_DFLAG_LBA48;
4c2d721a
TH		 1270 lba_desc = "LBA48";
1271 }
8bf62ece
AL		 1272
1273 /* print device info to dmesg */
4c2d721a
TH		 1274 if (print_info)
1275 printk(KERN_INFO "ata%u: dev %u ATA-%d, "
1276 "max %s, %Lu sectors: %s\n",
1277 ap->id, dev->devno,
1148c3a7 1278 ata_id_major_version(id),
ff8854b2 1279 ata_mode_string(xfer_mask),
4c2d721a
TH		 1280 (unsigned long long)dev->n_sectors,
1281 lba_desc);
ffeae418 1282 } else {
8bf62ece
AL		 1283 /* CHS */
1284
1285 /* Default translation */
1148c3a7
TH		 1286 dev->cylinders = id[1];
1287 dev->heads = id[3];
1288 dev->sectors = id[6];
8bf62ece 1289
1148c3a7 1290 if (ata_id_current_chs_valid(id)) {
8bf62ece 1291 /* Current CHS translation is valid. */
1148c3a7
TH		 1292 dev->cylinders = id[54];
1293 dev->heads = id[55];
1294 dev->sectors = id[56];
8bf62ece
AL		 1295 }
1296
1297 /* print device info to dmesg */
4c2d721a
TH		 1298 if (print_info)
1299 printk(KERN_INFO "ata%u: dev %u ATA-%d, "
1300 "max %s, %Lu sectors: CHS %u/%u/%u\n",
1301 ap->id, dev->devno,
1148c3a7 1302 ata_id_major_version(id),
ff8854b2 1303 ata_mode_string(xfer_mask),
4c2d721a
TH		 1304 (unsigned long long)dev->n_sectors,
1305 dev->cylinders, dev->heads, dev->sectors);
1da177e4
LT		 1306 }
1307
6e7846e9 1308 dev->cdb_len = 16;
1da177e4
LT		 1309 }
1310
1311 /* ATAPI-specific feature tests */
2c13b7ce 1312 else if (dev->class == ATA_DEV_ATAPI) {
1148c3a7 1313 rc = atapi_cdb_len(id);
1da177e4
LT		 1314 if ((rc < 12) || (rc > ATAPI_CDB_LEN)) {
1315 printk(KERN_WARNING "ata%u: unsupported CDB len\n", ap->id);
ffeae418 1316 rc = -EINVAL;
1da177e4
LT		 1317 goto err_out_nosup;
1318 }
6e7846e9 1319 dev->cdb_len = (unsigned int) rc;
1da177e4
LT		 1320
1321 /* print device info to dmesg */
4c2d721a
TH		 1322 if (print_info)
1323 printk(KERN_INFO "ata%u: dev %u ATAPI, max %s\n",
ff8854b2 1324 ap->id, dev->devno, ata_mode_string(xfer_mask));
1da177e4
LT		 1325 }
1326
6e7846e9
TH		 1327 ap->host->max_cmd_len = 0;
1328 for (i = 0; i < ATA_MAX_DEVICES; i++)
1329 ap->host->max_cmd_len = max_t(unsigned int,
1330 ap->host->max_cmd_len,
1331 ap->device[i].cdb_len);
1332
4b2f3ede
TH		 1333 /* limit bridge transfers to udma5, 200 sectors */
1334 if (ata_dev_knobble(ap, dev)) {
4c2d721a
TH		 1335 if (print_info)
1336 printk(KERN_INFO "ata%u(%u): applying bridge limits\n",
1337 ap->id, dev->devno);
5a529139 1338 dev->udma_mask &= ATA_UDMA5;
4b2f3ede
TH		 1339 dev->max_sectors = ATA_MAX_SECTORS;
1340 }
1341
1342 if (ap->ops->dev_config)
1343 ap->ops->dev_config(ap, dev);
1344
1da177e4 1345 DPRINTK("EXIT, drv_stat = 0x%x\n", ata_chk_status(ap));
ffeae418 1346 return 0;
1da177e4
LT		 1347
1348err_out_nosup:
1da177e4 1349 DPRINTK("EXIT, err\n");
ffeae418 1350 return rc;
1da177e4
LT		 1351}
1352
1353/**
1354 * ata_bus_probe - Reset and probe ATA bus
1355 * @ap: Bus to probe
1356 *
0cba632b
JG		 1357 * Master ATA bus probing function. Initiates a hardware-dependent
1358 * bus reset, then attempts to identify any devices found on
1359 * the bus.
1360 *
1da177e4 1361 * LOCKING:
0cba632b 1362 * PCI/etc. bus probe sem.
1da177e4
LT		 1363 *
1364 * RETURNS:
96072e69 1365 * Zero on success, negative errno otherwise.
1da177e4
LT		 1366 */
1367
1368static int ata_bus_probe(struct ata_port *ap)
1369{
28ca5c57 1370 unsigned int classes[ATA_MAX_DEVICES];
14d2bac1
TH		 1371 int tries[ATA_MAX_DEVICES];
1372 int i, rc, down_xfermask;
e82cbdb9 1373 struct ata_device *dev;
1da177e4 1374
28ca5c57 1375 ata_port_probe(ap);
c19ba8af 1376
14d2bac1
TH		 1377 for (i = 0; i < ATA_MAX_DEVICES; i++)
1378 tries[i] = ATA_PROBE_MAX_TRIES;
1379
1380 retry:
1381 down_xfermask = 0;
1382
2044470c
TH		 1383 /* reset and determine device classes */
1384 for (i = 0; i < ATA_MAX_DEVICES; i++)
1385 classes[i] = ATA_DEV_UNKNOWN;
2061a47a 1386
2044470c 1387 if (ap->ops->probe_reset) {
c19ba8af 1388 rc = ap->ops->probe_reset(ap, classes);
28ca5c57
TH		 1389 if (rc) {
1390 printk("ata%u: reset failed (errno=%d)\n", ap->id, rc);
1391 return rc;
c19ba8af 1392 }
28ca5c57 1393 } else {
c19ba8af
TH		 1394 ap->ops->phy_reset(ap);
1395
f8c2c420
TH		 1396 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1397 if (!(ap->flags & ATA_FLAG_DISABLED))
28ca5c57 1398 classes[i] = ap->device[i].class;
f8c2c420
TH		 1399 ap->device[i].class = ATA_DEV_UNKNOWN;
1400 }
2044470c 1401
28ca5c57
TH		 1402 ata_port_probe(ap);
1403 }
1da177e4 1404
2044470c
TH		 1405 for (i = 0; i < ATA_MAX_DEVICES; i++)
1406 if (classes[i] == ATA_DEV_UNKNOWN)
1407 classes[i] = ATA_DEV_NONE;
1408
28ca5c57 1409 /* read IDENTIFY page and configure devices */
1da177e4 1410 for (i = 0; i < ATA_MAX_DEVICES; i++) {
e82cbdb9 1411 dev = &ap->device[i];
28ca5c57 1412
ec573755
TH		 1413 if (tries[i])
1414 dev->class = classes[i];
ffeae418 1415
14d2bac1 1416 if (!ata_dev_enabled(dev))
ffeae418 1417 continue;
ffeae418 1418
fe635c7e 1419 rc = ata_dev_read_id(ap, dev, &dev->class, 1, dev->id);
14d2bac1
TH		 1420 if (rc)
1421 goto fail;
1422
1423 rc = ata_dev_configure(ap, dev, 1);
1424 if (rc)
1425 goto fail;
1da177e4
LT		 1426 }
1427
e82cbdb9
TH		 1428 /* configure transfer mode */
1429 if (ap->ops->set_mode) {
1430 /* FIXME: make ->set_mode handle no device case and
1431 * return error code and failing device on failure as
1432 * ata_set_mode() does.
1433 */
14d2bac1
TH		 1434 for (i = 0; i < ATA_MAX_DEVICES; i++)
1435 if (ata_dev_enabled(&ap->device[i])) {
1436 ap->ops->set_mode(ap);
1437 break;
1438 }
e82cbdb9 1439 rc = 0;
51713d35 1440 } else
14d2bac1 1441 rc = ata_set_mode(ap, &dev);
51713d35
TH		 1442
1443 if (rc) {
1444 down_xfermask = 1;
1445 goto fail;
e82cbdb9 1446 }
1da177e4 1447
e82cbdb9
TH		 1448 for (i = 0; i < ATA_MAX_DEVICES; i++)
1449 if (ata_dev_enabled(&ap->device[i]))
1450 return 0;
1da177e4 1451
e82cbdb9
TH		 1452 /* no device present, disable port */
1453 ata_port_disable(ap);
1da177e4 1454 ap->ops->port_disable(ap);
96072e69 1455 return -ENODEV;
14d2bac1
TH		 1456
1457 fail:
1458 switch (rc) {
1459 case -EINVAL:
1460 case -ENODEV:
1461 tries[dev->devno] = 0;
1462 break;
1463 case -EIO:
3c567b7d 1464 sata_down_spd_limit(ap);
14d2bac1
TH		 1465 /* fall through */
1466 default:
1467 tries[dev->devno]--;
1468 if (down_xfermask &&
1469 ata_down_xfermask_limit(ap, dev, tries[dev->devno] == 1))
1470 tries[dev->devno] = 0;
1471 }
1472
ec573755
TH		 1473 if (!tries[dev->devno]) {
1474 ata_down_xfermask_limit(ap, dev, 1);
1475 ata_dev_disable(ap, dev);
1476 }
1477
14d2bac1 1478 goto retry;
1da177e4
LT		 1479}
1480
1481/**
0cba632b
JG		 1482 * ata_port_probe - Mark port as enabled
1483 * @ap: Port for which we indicate enablement
1da177e4 1484 *
0cba632b
JG		 1485 * Modify @ap data structure such that the system
1486 * thinks that the entire port is enabled.
1487 *
1488 * LOCKING: host_set lock, or some other form of
1489 * serialization.
1da177e4
LT		 1490 */
1491
1492void ata_port_probe(struct ata_port *ap)
1493{
198e0fed 1494 ap->flags &= ~ATA_FLAG_DISABLED;
1da177e4
LT		 1495}
1496
3be680b7
TH		 1497/**
1498 * sata_print_link_status - Print SATA link status
1499 * @ap: SATA port to printk link status about
1500 *
1501 * This function prints link speed and status of a SATA link.
1502 *
1503 * LOCKING:
1504 * None.
1505 */
1506static void sata_print_link_status(struct ata_port *ap)
1507{
6d5f9732 1508 u32 sstatus, scontrol, tmp;
3be680b7
TH		 1509
1510 if (!ap->ops->scr_read)
1511 return;
1512
1513 sstatus = scr_read(ap, SCR_STATUS);
6d5f9732 1514 scontrol = scr_read(ap, SCR_CONTROL);
3be680b7
TH		 1515
1516 if (sata_dev_present(ap)) {
1517 tmp = (sstatus >> 4) & 0xf;
6d5f9732
TH		 1518 printk(KERN_INFO
1519 "ata%u: SATA link up %s (SStatus %X SControl %X)\n",
1520 ap->id, sata_spd_string(tmp), sstatus, scontrol);
3be680b7 1521 } else {
6d5f9732
TH		 1522 printk(KERN_INFO
1523 "ata%u: SATA link down (SStatus %X SControl %X)\n",
1524 ap->id, sstatus, scontrol);
3be680b7
TH		 1525 }
1526}
1527
1da177e4 1528/**
780a87f7
JG		 1529 * __sata_phy_reset - Wake/reset a low-level SATA PHY
1530 * @ap: SATA port associated with target SATA PHY.
1da177e4 1531 *
780a87f7
JG		 1532 * This function issues commands to standard SATA Sxxx
1533 * PHY registers, to wake up the phy (and device), and
1534 * clear any reset condition.
1da177e4
LT		 1535 *
1536 * LOCKING:
0cba632b 1537 * PCI/etc. bus probe sem.
1da177e4
LT		 1538 *
1539 */
1540void __sata_phy_reset(struct ata_port *ap)
1541{
1542 u32 sstatus;
1543 unsigned long timeout = jiffies + (HZ * 5);
1544
1545 if (ap->flags & ATA_FLAG_SATA_RESET) {
cdcca89e
BR		 1546 /* issue phy wake/reset */
1547 scr_write_flush(ap, SCR_CONTROL, 0x301);
62ba2841
TH		 1548 /* Couldn't find anything in SATA I/II specs, but
1549 * AHCI-1.1 10.4.2 says at least 1 ms. */
1550 mdelay(1);
1da177e4 1551 }
cdcca89e 1552 scr_write_flush(ap, SCR_CONTROL, 0x300); /* phy wake/clear reset */
1da177e4
LT		 1553
1554 /* wait for phy to become ready, if necessary */
1555 do {
1556 msleep(200);
1557 sstatus = scr_read(ap, SCR_STATUS);
1558 if ((sstatus & 0xf) != 1)
1559 break;
1560 } while (time_before(jiffies, timeout));
1561
3be680b7
TH		 1562 /* print link status */
1563 sata_print_link_status(ap);
656563e3 1564
3be680b7
TH		 1565 /* TODO: phy layer with polling, timeouts, etc. */
1566 if (sata_dev_present(ap))
1da177e4 1567 ata_port_probe(ap);
3be680b7 1568 else
1da177e4 1569 ata_port_disable(ap);
1da177e4 1570
198e0fed 1571 if (ap->flags & ATA_FLAG_DISABLED)
1da177e4
LT		 1572 return;
1573
1574 if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) {
1575 ata_port_disable(ap);
1576 return;
1577 }
1578
1579 ap->cbl = ATA_CBL_SATA;
1580}
1581
1582/**
780a87f7
JG		 1583 * sata_phy_reset - Reset SATA bus.
1584 * @ap: SATA port associated with target SATA PHY.
1da177e4 1585 *
780a87f7
JG		 1586 * This function resets the SATA bus, and then probes
1587 * the bus for devices.
1da177e4
LT		 1588 *
1589 * LOCKING:
0cba632b 1590 * PCI/etc. bus probe sem.
1da177e4
LT		 1591 *
1592 */
1593void sata_phy_reset(struct ata_port *ap)
1594{
1595 __sata_phy_reset(ap);
198e0fed 1596 if (ap->flags & ATA_FLAG_DISABLED)
1da177e4
LT		 1597 return;
1598 ata_bus_reset(ap);
1599}
1600
ebdfca6e
AC		 1601/**
1602 * ata_dev_pair - return other device on cable
1603 * @ap: port
1604 * @adev: device
1605 *
1606 * Obtain the other device on the same cable, or if none is
1607 * present NULL is returned
1608 */
2e9edbf8 1609
ebdfca6e
AC		 1610struct ata_device *ata_dev_pair(struct ata_port *ap, struct ata_device *adev)
1611{
1612 struct ata_device *pair = &ap->device[1 - adev->devno];
e1211e3f 1613 if (!ata_dev_enabled(pair))
ebdfca6e
AC		 1614 return NULL;
1615 return pair;
1616}
1617
1da177e4 1618/**
780a87f7
JG		 1619 * ata_port_disable - Disable port.
1620 * @ap: Port to be disabled.
1da177e4 1621 *
780a87f7
JG		 1622 * Modify @ap data structure such that the system
1623 * thinks that the entire port is disabled, and should
1624 * never attempt to probe or communicate with devices
1625 * on this port.
1626 *
1627 * LOCKING: host_set lock, or some other form of
1628 * serialization.
1da177e4
LT		 1629 */
1630
1631void ata_port_disable(struct ata_port *ap)
1632{
1633 ap->device[0].class = ATA_DEV_NONE;
1634 ap->device[1].class = ATA_DEV_NONE;
198e0fed 1635 ap->flags |= ATA_FLAG_DISABLED;
1da177e4
LT		 1636}
1637
1c3fae4d 1638/**
3c567b7d 1639 * sata_down_spd_limit - adjust SATA spd limit downward
1c3fae4d
TH		 1640 * @ap: Port to adjust SATA spd limit for
1641 *
1642 * Adjust SATA spd limit of @ap downward. Note that this
1643 * function only adjusts the limit. The change must be applied
3c567b7d 1644 * using sata_set_spd().
1c3fae4d
TH		 1645 *
1646 * LOCKING:
1647 * Inherited from caller.
1648 *
1649 * RETURNS:
1650 * 0 on success, negative errno on failure
1651 */
3c567b7d 1652int sata_down_spd_limit(struct ata_port *ap)
1c3fae4d
TH		 1653{
1654 u32 spd, mask;
1655 int highbit;
1656
1657 if (ap->cbl != ATA_CBL_SATA || !ap->ops->scr_read)
1658 return -EOPNOTSUPP;
1659
1660 mask = ap->sata_spd_limit;
1661 if (mask <= 1)
1662 return -EINVAL;
1663 highbit = fls(mask) - 1;
1664 mask &= ~(1 << highbit);
1665
1666 spd = (scr_read(ap, SCR_STATUS) >> 4) & 0xf;
1667 if (spd <= 1)
1668 return -EINVAL;
1669 spd--;
1670 mask &= (1 << spd) - 1;
1671 if (!mask)
1672 return -EINVAL;
1673
1674 ap->sata_spd_limit = mask;
1675
1676 printk(KERN_WARNING "ata%u: limiting SATA link speed to %s\n",
1677 ap->id, sata_spd_string(fls(mask)));
1678
1679 return 0;
1680}
1681
3c567b7d 1682static int __sata_set_spd_needed(struct ata_port *ap, u32 *scontrol)
1c3fae4d
TH		 1683{
1684 u32 spd, limit;
1685
1686 if (ap->sata_spd_limit == UINT_MAX)
1687 limit = 0;
1688 else
1689 limit = fls(ap->sata_spd_limit);
1690
1691 spd = (*scontrol >> 4) & 0xf;
1692 *scontrol = (*scontrol & ~0xf0) | ((limit & 0xf) << 4);
1693
1694 return spd != limit;
1695}
1696
1697/**
3c567b7d 1698 * sata_set_spd_needed - is SATA spd configuration needed
1c3fae4d
TH		 1699 * @ap: Port in question
1700 *
1701 * Test whether the spd limit in SControl matches
1702 * @ap->sata_spd_limit. This function is used to determine
1703 * whether hardreset is necessary to apply SATA spd
1704 * configuration.
1705 *
1706 * LOCKING:
1707 * Inherited from caller.
1708 *
1709 * RETURNS:
1710 * 1 if SATA spd configuration is needed, 0 otherwise.
1711 */
3c567b7d 1712int sata_set_spd_needed(struct ata_port *ap)
1c3fae4d
TH		 1713{
1714 u32 scontrol;
1715
1716 if (ap->cbl != ATA_CBL_SATA || !ap->ops->scr_read)
1717 return 0;
1718
1719 scontrol = scr_read(ap, SCR_CONTROL);
1720
3c567b7d 1721 return __sata_set_spd_needed(ap, &scontrol);
1c3fae4d
TH		 1722}
1723
1724/**
3c567b7d 1725 * sata_set_spd - set SATA spd according to spd limit
1c3fae4d
TH		 1726 * @ap: Port to set SATA spd for
1727 *
1728 * Set SATA spd of @ap according to sata_spd_limit.
1729 *
1730 * LOCKING:
1731 * Inherited from caller.
1732 *
1733 * RETURNS:
1734 * 0 if spd doesn't need to be changed, 1 if spd has been
1735 * changed. -EOPNOTSUPP if SCR registers are inaccessible.
1736 */
3c567b7d 1737int sata_set_spd(struct ata_port *ap)
1c3fae4d
TH		 1738{
1739 u32 scontrol;
1740
1741 if (ap->cbl != ATA_CBL_SATA || !ap->ops->scr_read)
1742 return -EOPNOTSUPP;
1743
1744 scontrol = scr_read(ap, SCR_CONTROL);
3c567b7d 1745 if (!__sata_set_spd_needed(ap, &scontrol))
1c3fae4d
TH		 1746 return 0;
1747
1748 scr_write(ap, SCR_CONTROL, scontrol);
1749 return 1;
1750}
1751
452503f9
AC		 1752/*
1753 * This mode timing computation functionality is ported over from
1754 * drivers/ide/ide-timing.h and was originally written by Vojtech Pavlik
1755 */
1756/*
1757 * PIO 0-5, MWDMA 0-2 and UDMA 0-6 timings (in nanoseconds).
1758 * These were taken from ATA/ATAPI-6 standard, rev 0a, except
1759 * for PIO 5, which is a nonstandard extension and UDMA6, which
2e9edbf8 1760 * is currently supported only by Maxtor drives.
452503f9
AC		 1761 */
1762
1763static const struct ata_timing ata_timing[] = {
1764
1765 { XFER_UDMA_6, 0, 0, 0, 0, 0, 0, 0, 15 },
1766 { XFER_UDMA_5, 0, 0, 0, 0, 0, 0, 0, 20 },
1767 { XFER_UDMA_4, 0, 0, 0, 0, 0, 0, 0, 30 },
1768 { XFER_UDMA_3, 0, 0, 0, 0, 0, 0, 0, 45 },
1769
1770 { XFER_UDMA_2, 0, 0, 0, 0, 0, 0, 0, 60 },
1771 { XFER_UDMA_1, 0, 0, 0, 0, 0, 0, 0, 80 },
1772 { XFER_UDMA_0, 0, 0, 0, 0, 0, 0, 0, 120 },
1773
1774/* { XFER_UDMA_SLOW, 0, 0, 0, 0, 0, 0, 0, 150 }, */
2e9edbf8 1775
452503f9
AC		 1776 { XFER_MW_DMA_2, 25, 0, 0, 0, 70, 25, 120, 0 },
1777 { XFER_MW_DMA_1, 45, 0, 0, 0, 80, 50, 150, 0 },
1778 { XFER_MW_DMA_0, 60, 0, 0, 0, 215, 215, 480, 0 },
2e9edbf8 1779
452503f9
AC		 1780 { XFER_SW_DMA_2, 60, 0, 0, 0, 120, 120, 240, 0 },
1781 { XFER_SW_DMA_1, 90, 0, 0, 0, 240, 240, 480, 0 },
1782 { XFER_SW_DMA_0, 120, 0, 0, 0, 480, 480, 960, 0 },
1783
1784/* { XFER_PIO_5, 20, 50, 30, 100, 50, 30, 100, 0 }, */
1785 { XFER_PIO_4, 25, 70, 25, 120, 70, 25, 120, 0 },
1786 { XFER_PIO_3, 30, 80, 70, 180, 80, 70, 180, 0 },
1787
1788 { XFER_PIO_2, 30, 290, 40, 330, 100, 90, 240, 0 },
1789 { XFER_PIO_1, 50, 290, 93, 383, 125, 100, 383, 0 },
1790 { XFER_PIO_0, 70, 290, 240, 600, 165, 150, 600, 0 },
1791
1792/* { XFER_PIO_SLOW, 120, 290, 240, 960, 290, 240, 960, 0 }, */
1793
1794 { 0xFF }
1795};
1796
1797#define ENOUGH(v,unit) (((v)-1)/(unit)+1)
1798#define EZ(v,unit) ((v)?ENOUGH(v,unit):0)
1799
1800static void ata_timing_quantize(const struct ata_timing *t, struct ata_timing *q, int T, int UT)
1801{
1802 q->setup = EZ(t->setup * 1000, T);
1803 q->act8b = EZ(t->act8b * 1000, T);
1804 q->rec8b = EZ(t->rec8b * 1000, T);
1805 q->cyc8b = EZ(t->cyc8b * 1000, T);
1806 q->active = EZ(t->active * 1000, T);
1807 q->recover = EZ(t->recover * 1000, T);
1808 q->cycle = EZ(t->cycle * 1000, T);
1809 q->udma = EZ(t->udma * 1000, UT);
1810}
1811
1812void ata_timing_merge(const struct ata_timing *a, const struct ata_timing *b,
1813 struct ata_timing *m, unsigned int what)
1814{
1815 if (what & ATA_TIMING_SETUP ) m->setup = max(a->setup, b->setup);
1816 if (what & ATA_TIMING_ACT8B ) m->act8b = max(a->act8b, b->act8b);
1817 if (what & ATA_TIMING_REC8B ) m->rec8b = max(a->rec8b, b->rec8b);
1818 if (what & ATA_TIMING_CYC8B ) m->cyc8b = max(a->cyc8b, b->cyc8b);
1819 if (what & ATA_TIMING_ACTIVE ) m->active = max(a->active, b->active);
1820 if (what & ATA_TIMING_RECOVER) m->recover = max(a->recover, b->recover);
1821 if (what & ATA_TIMING_CYCLE ) m->cycle = max(a->cycle, b->cycle);
1822 if (what & ATA_TIMING_UDMA ) m->udma = max(a->udma, b->udma);
1823}
1824
1825static const struct ata_timing* ata_timing_find_mode(unsigned short speed)
1826{
1827 const struct ata_timing *t;
1828
1829 for (t = ata_timing; t->mode != speed; t++)
91190758 1830 if (t->mode == 0xFF)
452503f9 1831 return NULL;
2e9edbf8 1832 return t;
452503f9
AC		 1833}
1834
1835int ata_timing_compute(struct ata_device *adev, unsigned short speed,
1836 struct ata_timing *t, int T, int UT)
1837{
1838 const struct ata_timing *s;
1839 struct ata_timing p;
1840
1841 /*
2e9edbf8 1842 * Find the mode.
75b1f2f8 1843 */
452503f9
AC		 1844
1845 if (!(s = ata_timing_find_mode(speed)))
1846 return -EINVAL;
1847
75b1f2f8
AL		 1848 memcpy(t, s, sizeof(*s));
1849
452503f9
AC		 1850 /*
1851 * If the drive is an EIDE drive, it can tell us it needs extended
1852 * PIO/MW_DMA cycle timing.
1853 */
1854
1855 if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE drive */
1856 memset(&p, 0, sizeof(p));
1857 if(speed >= XFER_PIO_0 && speed <= XFER_SW_DMA_0) {
1858 if (speed <= XFER_PIO_2) p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO];
1859 else p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO_IORDY];
1860 } else if(speed >= XFER_MW_DMA_0 && speed <= XFER_MW_DMA_2) {
1861 p.cycle = adev->id[ATA_ID_EIDE_DMA_MIN];
1862 }
1863 ata_timing_merge(&p, t, t, ATA_TIMING_CYCLE | ATA_TIMING_CYC8B);
1864 }
1865
1866 /*
1867 * Convert the timing to bus clock counts.
1868 */
1869
75b1f2f8 1870 ata_timing_quantize(t, t, T, UT);
452503f9
AC		 1871
1872 /*
c893a3ae
RD		 1873 * Even in DMA/UDMA modes we still use PIO access for IDENTIFY,
1874 * S.M.A.R.T * and some other commands. We have to ensure that the
1875 * DMA cycle timing is slower/equal than the fastest PIO timing.
452503f9
AC		 1876 */
1877
1878 if (speed > XFER_PIO_4) {
1879 ata_timing_compute(adev, adev->pio_mode, &p, T, UT);
1880 ata_timing_merge(&p, t, t, ATA_TIMING_ALL);
1881 }
1882
1883 /*
c893a3ae 1884 * Lengthen active & recovery time so that cycle time is correct.
452503f9
AC		 1885 */
1886
1887 if (t->act8b + t->rec8b < t->cyc8b) {
1888 t->act8b += (t->cyc8b - (t->act8b + t->rec8b)) / 2;
1889 t->rec8b = t->cyc8b - t->act8b;
1890 }
1891
1892 if (t->active + t->recover < t->cycle) {
1893 t->active += (t->cycle - (t->active + t->recover)) / 2;
1894 t->recover = t->cycle - t->active;
1895 }
1896
1897 return 0;
1898}
1899
cf176e1a
TH		 1900/**
1901 * ata_down_xfermask_limit - adjust dev xfer masks downward
1902 * @ap: Port associated with device @dev
1903 * @dev: Device to adjust xfer masks
1904 * @force_pio0: Force PIO0
1905 *
1906 * Adjust xfer masks of @dev downward. Note that this function
1907 * does not apply the change. Invoking ata_set_mode() afterwards
1908 * will apply the limit.
1909 *
1910 * LOCKING:
1911 * Inherited from caller.
1912 *
1913 * RETURNS:
1914 * 0 on success, negative errno on failure
1915 */
1ad8e7f9
TH		 1916int ata_down_xfermask_limit(struct ata_port *ap, struct ata_device *dev,
1917 int force_pio0)
cf176e1a
TH		 1918{
1919 unsigned long xfer_mask;
1920 int highbit;
1921
1922 xfer_mask = ata_pack_xfermask(dev->pio_mask, dev->mwdma_mask,
1923 dev->udma_mask);
1924
1925 if (!xfer_mask)
1926 goto fail;
1927 /* don't gear down to MWDMA from UDMA, go directly to PIO */
1928 if (xfer_mask & ATA_MASK_UDMA)
1929 xfer_mask &= ~ATA_MASK_MWDMA;
1930
1931 highbit = fls(xfer_mask) - 1;
1932 xfer_mask &= ~(1 << highbit);
1933 if (force_pio0)
1934 xfer_mask &= 1 << ATA_SHIFT_PIO;
1935 if (!xfer_mask)
1936 goto fail;
1937
1938 ata_unpack_xfermask(xfer_mask, &dev->pio_mask, &dev->mwdma_mask,
1939 &dev->udma_mask);
1940
1941 printk(KERN_WARNING "ata%u: dev %u limiting speed to %s\n",
1942 ap->id, dev->devno, ata_mode_string(xfer_mask));
1943
1944 return 0;
1945
1946 fail:
1947 return -EINVAL;
1948}
1949
83206a29 1950static int ata_dev_set_mode(struct ata_port *ap, struct ata_device *dev)
1da177e4 1951{
83206a29
TH		 1952 unsigned int err_mask;
1953 int rc;
1da177e4 1954
e8384607 1955 dev->flags &= ~ATA_DFLAG_PIO;
1da177e4
LT		 1956 if (dev->xfer_shift == ATA_SHIFT_PIO)
1957 dev->flags |= ATA_DFLAG_PIO;
1958
83206a29
TH		 1959 err_mask = ata_dev_set_xfermode(ap, dev);
1960 if (err_mask) {
1961 printk(KERN_ERR
1962 "ata%u: failed to set xfermode (err_mask=0x%x)\n",
1963 ap->id, err_mask);
1964 return -EIO;
1965 }
1da177e4 1966
83206a29 1967 rc = ata_dev_revalidate(ap, dev, 0);
5eb45c02 1968 if (rc)
83206a29 1969 return rc;
48a8a14f 1970
23e71c3d
TH		 1971 DPRINTK("xfer_shift=%u, xfer_mode=0x%x\n",
1972 dev->xfer_shift, (int)dev->xfer_mode);
1da177e4
LT		 1973
1974 printk(KERN_INFO "ata%u: dev %u configured for %s\n",
23e71c3d
TH		 1975 ap->id, dev->devno,
1976 ata_mode_string(ata_xfer_mode2mask(dev->xfer_mode)));
83206a29 1977 return 0;
1da177e4
LT		 1978}
1979
1da177e4
LT		 1980/**
1981 * ata_set_mode - Program timings and issue SET FEATURES - XFER
1982 * @ap: port on which timings will be programmed
e82cbdb9 1983 * @r_failed_dev: out paramter for failed device
1da177e4 1984 *
e82cbdb9
TH		 1985 * Set ATA device disk transfer mode (PIO3, UDMA6, etc.). If
1986 * ata_set_mode() fails, pointer to the failing device is
1987 * returned in @r_failed_dev.
780a87f7 1988 *
1da177e4 1989 * LOCKING:
0cba632b 1990 * PCI/etc. bus probe sem.
e82cbdb9
TH		 1991 *
1992 * RETURNS:
1993 * 0 on success, negative errno otherwise
1da177e4 1994 */
1ad8e7f9 1995int ata_set_mode(struct ata_port *ap, struct ata_device **r_failed_dev)
1da177e4 1996{
e8e0619f 1997 struct ata_device *dev;
e82cbdb9 1998 int i, rc = 0, used_dma = 0, found = 0;
1da177e4 1999
a6d5a51c
TH		 2000 /* step 1: calculate xfer_mask */
2001 for (i = 0; i < ATA_MAX_DEVICES; i++) {
acf356b1 2002 unsigned int pio_mask, dma_mask;
a6d5a51c 2003
e8e0619f
TH		 2004 dev = &ap->device[i];
2005
e1211e3f 2006 if (!ata_dev_enabled(dev))
a6d5a51c
TH		 2007 continue;
2008
acf356b1 2009 ata_dev_xfermask(ap, dev);
1da177e4 2010
acf356b1
TH		 2011 pio_mask = ata_pack_xfermask(dev->pio_mask, 0, 0);
2012 dma_mask = ata_pack_xfermask(0, dev->mwdma_mask, dev->udma_mask);
2013 dev->pio_mode = ata_xfer_mask2mode(pio_mask);
2014 dev->dma_mode = ata_xfer_mask2mode(dma_mask);
5444a6f4 2015
4f65977d 2016 found = 1;
5444a6f4
AC		 2017 if (dev->dma_mode)
2018 used_dma = 1;
a6d5a51c 2019 }
4f65977d 2020 if (!found)
e82cbdb9 2021 goto out;
a6d5a51c
TH		 2022
2023 /* step 2: always set host PIO timings */
e8e0619f
TH		 2024 for (i = 0; i < ATA_MAX_DEVICES; i++) {
2025 dev = &ap->device[i];
2026 if (!ata_dev_enabled(dev))
2027 continue;
2028
2029 if (!dev->pio_mode) {
2030 printk(KERN_WARNING "ata%u: dev %u no PIO support\n",
2031 ap->id, dev->devno);
2032 rc = -EINVAL;
e82cbdb9 2033 goto out;
e8e0619f
TH		 2034 }
2035
2036 dev->xfer_mode = dev->pio_mode;
2037 dev->xfer_shift = ATA_SHIFT_PIO;
2038 if (ap->ops->set_piomode)
2039 ap->ops->set_piomode(ap, dev);
2040 }
1da177e4 2041
a6d5a51c 2042 /* step 3: set host DMA timings */
e8e0619f
TH		 2043 for (i = 0; i < ATA_MAX_DEVICES; i++) {
2044 dev = &ap->device[i];
2045
2046 if (!ata_dev_enabled(dev) || !dev->dma_mode)
2047 continue;
2048
2049 dev->xfer_mode = dev->dma_mode;
2050 dev->xfer_shift = ata_xfer_mode2shift(dev->dma_mode);
2051 if (ap->ops->set_dmamode)
2052 ap->ops->set_dmamode(ap, dev);
2053 }
1da177e4
LT		 2054
2055 /* step 4: update devices' xfer mode */
83206a29 2056 for (i = 0; i < ATA_MAX_DEVICES; i++) {
e8e0619f 2057 dev = &ap->device[i];
1da177e4 2058
e1211e3f 2059 if (!ata_dev_enabled(dev))
83206a29
TH		 2060 continue;
2061
5bbc53f4
TH		 2062 rc = ata_dev_set_mode(ap, dev);
2063 if (rc)
e82cbdb9 2064 goto out;
83206a29 2065 }
1da177e4 2066
e8e0619f
TH		 2067 /* Record simplex status. If we selected DMA then the other
2068 * host channels are not permitted to do so.
5444a6f4 2069 */
5444a6f4
AC		 2070 if (used_dma && (ap->host_set->flags & ATA_HOST_SIMPLEX))
2071 ap->host_set->simplex_claimed = 1;
2072
e8e0619f 2073 /* step5: chip specific finalisation */
1da177e4
LT		 2074 if (ap->ops->post_set_mode)
2075 ap->ops->post_set_mode(ap);
2076
e82cbdb9
TH		 2077 out:
2078 if (rc)
2079 *r_failed_dev = dev;
2080 return rc;
1da177e4
LT		 2081}
2082
1fdffbce
JG		 2083/**
2084 * ata_tf_to_host - issue ATA taskfile to host controller
2085 * @ap: port to which command is being issued
2086 * @tf: ATA taskfile register set
2087 *
2088 * Issues ATA taskfile register set to ATA host controller,
2089 * with proper synchronization with interrupt handler and
2090 * other threads.
2091 *
2092 * LOCKING:
2093 * spin_lock_irqsave(host_set lock)
2094 */
2095
2096static inline void ata_tf_to_host(struct ata_port *ap,
2097 const struct ata_taskfile *tf)
2098{
2099 ap->ops->tf_load(ap, tf);
2100 ap->ops->exec_command(ap, tf);
2101}
2102
1da177e4
LT		 2103/**
2104 * ata_busy_sleep - sleep until BSY clears, or timeout
2105 * @ap: port containing status register to be polled
2106 * @tmout_pat: impatience timeout
2107 * @tmout: overall timeout
2108 *
780a87f7
JG		 2109 * Sleep until ATA Status register bit BSY clears,
2110 * or a timeout occurs.
2111 *
2112 * LOCKING: None.
1da177e4
LT		 2113 */
2114
6f8b9958
TH		 2115unsigned int ata_busy_sleep (struct ata_port *ap,
2116 unsigned long tmout_pat, unsigned long tmout)
1da177e4
LT		 2117{
2118 unsigned long timer_start, timeout;
2119 u8 status;
2120
2121 status = ata_busy_wait(ap, ATA_BUSY, 300);
2122 timer_start = jiffies;
2123 timeout = timer_start + tmout_pat;
2124 while ((status & ATA_BUSY) && (time_before(jiffies, timeout))) {
2125 msleep(50);
2126 status = ata_busy_wait(ap, ATA_BUSY, 3);
2127 }
2128
2129 if (status & ATA_BUSY)
2130 printk(KERN_WARNING "ata%u is slow to respond, "
2131 "please be patient\n", ap->id);
2132
2133 timeout = timer_start + tmout;
2134 while ((status & ATA_BUSY) && (time_before(jiffies, timeout))) {
2135 msleep(50);
2136 status = ata_chk_status(ap);
2137 }
2138
2139 if (status & ATA_BUSY) {
2140 printk(KERN_ERR "ata%u failed to respond (%lu secs)\n",
2141 ap->id, tmout / HZ);
2142 return 1;
2143 }
2144
2145 return 0;
2146}
2147
2148static void ata_bus_post_reset(struct ata_port *ap, unsigned int devmask)
2149{
2150 struct ata_ioports *ioaddr = &ap->ioaddr;
2151 unsigned int dev0 = devmask & (1 << 0);
2152 unsigned int dev1 = devmask & (1 << 1);
2153 unsigned long timeout;
2154
2155 /* if device 0 was found in ata_devchk, wait for its
2156 * BSY bit to clear
2157 */
2158 if (dev0)
2159 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
2160
2161 /* if device 1 was found in ata_devchk, wait for
2162 * register access, then wait for BSY to clear
2163 */
2164 timeout = jiffies + ATA_TMOUT_BOOT;
2165 while (dev1) {
2166 u8 nsect, lbal;
2167
2168 ap->ops->dev_select(ap, 1);
2169 if (ap->flags & ATA_FLAG_MMIO) {
2170 nsect = readb((void __iomem *) ioaddr->nsect_addr);
2171 lbal = readb((void __iomem *) ioaddr->lbal_addr);
2172 } else {
2173 nsect = inb(ioaddr->nsect_addr);
2174 lbal = inb(ioaddr->lbal_addr);
2175 }
2176 if ((nsect == 1) && (lbal == 1))
2177 break;
2178 if (time_after(jiffies, timeout)) {
2179 dev1 = 0;
2180 break;
2181 }
2182 msleep(50); /* give drive a breather */
2183 }
2184 if (dev1)
2185 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
2186
2187 /* is all this really necessary? */
2188 ap->ops->dev_select(ap, 0);
2189 if (dev1)
2190 ap->ops->dev_select(ap, 1);
2191 if (dev0)
2192 ap->ops->dev_select(ap, 0);
2193}
2194
1da177e4
LT		 2195static unsigned int ata_bus_softreset(struct ata_port *ap,
2196 unsigned int devmask)
2197{
2198 struct ata_ioports *ioaddr = &ap->ioaddr;
2199
2200 DPRINTK("ata%u: bus reset via SRST\n", ap->id);
2201
2202 /* software reset. causes dev0 to be selected */
2203 if (ap->flags & ATA_FLAG_MMIO) {
2204 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
2205 udelay(20); /* FIXME: flush */
2206 writeb(ap->ctl | ATA_SRST, (void __iomem *) ioaddr->ctl_addr);
2207 udelay(20); /* FIXME: flush */
2208 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
2209 } else {
2210 outb(ap->ctl, ioaddr->ctl_addr);
2211 udelay(10);
2212 outb(ap->ctl | ATA_SRST, ioaddr->ctl_addr);
2213 udelay(10);
2214 outb(ap->ctl, ioaddr->ctl_addr);
2215 }
2216
2217 /* spec mandates ">= 2ms" before checking status.
2218 * We wait 150ms, because that was the magic delay used for
2219 * ATAPI devices in Hale Landis's ATADRVR, for the period of time
2220 * between when the ATA command register is written, and then
2221 * status is checked. Because waiting for "a while" before
2222 * checking status is fine, post SRST, we perform this magic
2223 * delay here as well.
09c7ad79
AC		 2224 *
2225 * Old drivers/ide uses the 2mS rule and then waits for ready
1da177e4
LT		 2226 */
2227 msleep(150);
2228
2e9edbf8 2229 /* Before we perform post reset processing we want to see if
298a41ca
TH		 2230 * the bus shows 0xFF because the odd clown forgets the D7
2231 * pulldown resistor.
2232 */
987d2f05
TH		 2233 if (ata_check_status(ap) == 0xFF) {
2234 printk(KERN_ERR "ata%u: SRST failed (status 0xFF)\n", ap->id);
298a41ca 2235 return AC_ERR_OTHER;
987d2f05 2236 }
09c7ad79 2237
1da177e4
LT		 2238 ata_bus_post_reset(ap, devmask);
2239
2240 return 0;
2241}
2242
2243/**
2244 * ata_bus_reset - reset host port and associated ATA channel
2245 * @ap: port to reset
2246 *
2247 * This is typically the first time we actually start issuing
2248 * commands to the ATA channel. We wait for BSY to clear, then
2249 * issue EXECUTE DEVICE DIAGNOSTIC command, polling for its
2250 * result. Determine what devices, if any, are on the channel
2251 * by looking at the device 0/1 error register. Look at the signature
2252 * stored in each device's taskfile registers, to determine if
2253 * the device is ATA or ATAPI.
2254 *
2255 * LOCKING:
0cba632b
JG		 2256 * PCI/etc. bus probe sem.
2257 * Obtains host_set lock.
1da177e4
LT		 2258 *
2259 * SIDE EFFECTS:
198e0fed 2260 * Sets ATA_FLAG_DISABLED if bus reset fails.
1da177e4
LT		 2261 */
2262
2263void ata_bus_reset(struct ata_port *ap)
2264{
2265 struct ata_ioports *ioaddr = &ap->ioaddr;
2266 unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
2267 u8 err;
aec5c3c1 2268 unsigned int dev0, dev1 = 0, devmask = 0;
1da177e4
LT		 2269
2270 DPRINTK("ENTER, host %u, port %u\n", ap->id, ap->port_no);
2271
2272 /* determine if device 0/1 are present */
2273 if (ap->flags & ATA_FLAG_SATA_RESET)
2274 dev0 = 1;
2275 else {
2276 dev0 = ata_devchk(ap, 0);
2277 if (slave_possible)
2278 dev1 = ata_devchk(ap, 1);
2279 }
2280
2281 if (dev0)
2282 devmask |= (1 << 0);
2283 if (dev1)
2284 devmask |= (1 << 1);
2285
2286 /* select device 0 again */
2287 ap->ops->dev_select(ap, 0);
2288
2289 /* issue bus reset */
2290 if (ap->flags & ATA_FLAG_SRST)
aec5c3c1
TH		 2291 if (ata_bus_softreset(ap, devmask))
2292 goto err_out;
1da177e4
LT		 2293
2294 /*
2295 * determine by signature whether we have ATA or ATAPI devices
2296 */
b4dc7623 2297 ap->device[0].class = ata_dev_try_classify(ap, 0, &err);
1da177e4 2298 if ((slave_possible) && (err != 0x81))
b4dc7623 2299 ap->device[1].class = ata_dev_try_classify(ap, 1, &err);
1da177e4
LT		 2300
2301 /* re-enable interrupts */
2302 if (ap->ioaddr.ctl_addr) /* FIXME: hack. create a hook instead */
2303 ata_irq_on(ap);
2304
2305 /* is double-select really necessary? */
2306 if (ap->device[1].class != ATA_DEV_NONE)
2307 ap->ops->dev_select(ap, 1);
2308 if (ap->device[0].class != ATA_DEV_NONE)
2309 ap->ops->dev_select(ap, 0);
2310
2311 /* if no devices were detected, disable this port */
2312 if ((ap->device[0].class == ATA_DEV_NONE) &&
2313 (ap->device[1].class == ATA_DEV_NONE))
2314 goto err_out;
2315
2316 if (ap->flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST)) {
2317 /* set up device control for ATA_FLAG_SATA_RESET */
2318 if (ap->flags & ATA_FLAG_MMIO)
2319 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
2320 else
2321 outb(ap->ctl, ioaddr->ctl_addr);
2322 }
2323
2324 DPRINTK("EXIT\n");
2325 return;
2326
2327err_out:
2328 printk(KERN_ERR "ata%u: disabling port\n", ap->id);
2329 ap->ops->port_disable(ap);
2330
2331 DPRINTK("EXIT\n");
2332}
2333
7a7921e8
TH		 2334static int sata_phy_resume(struct ata_port *ap)
2335{
2336 unsigned long timeout = jiffies + (HZ * 5);
852ee16a 2337 u32 scontrol, sstatus;
7a7921e8 2338
852ee16a
TH		 2339 scontrol = scr_read(ap, SCR_CONTROL);
2340 scontrol = (scontrol & 0x0f0) | 0x300;
2341 scr_write_flush(ap, SCR_CONTROL, scontrol);
7a7921e8
TH		 2342
2343 /* Wait for phy to become ready, if necessary. */
2344 do {
2345 msleep(200);
2346 sstatus = scr_read(ap, SCR_STATUS);
2347 if ((sstatus & 0xf) != 1)
2348 return 0;
2349 } while (time_before(jiffies, timeout));
2350
2351 return -1;
2352}
2353
8a19ac89
TH		 2354/**
2355 * ata_std_probeinit - initialize probing
2356 * @ap: port to be probed
2357 *
2358 * @ap is about to be probed. Initialize it. This function is
2359 * to be used as standard callback for ata_drive_probe_reset().
3a39746a
TH		 2360 *
2361 * NOTE!!! Do not use this function as probeinit if a low level
2362 * driver implements only hardreset. Just pass NULL as probeinit
2363 * in that case. Using this function is probably okay but doing
2364 * so makes reset sequence different from the original
2365 * ->phy_reset implementation and Jeff nervous. :-P
8a19ac89 2366 */
17efc5f7 2367void ata_std_probeinit(struct ata_port *ap)
8a19ac89 2368{
17efc5f7 2369 if ((ap->flags & ATA_FLAG_SATA) && ap->ops->scr_read) {
1c3fae4d
TH		 2370 u32 spd;
2371
db70fef0
TH		 2372 /* set cable type and resume link */
2373 ap->cbl = ATA_CBL_SATA;
8a19ac89 2374 sata_phy_resume(ap);
1c3fae4d 2375
db70fef0 2376 /* init sata_spd_limit to the current value */
1c3fae4d
TH		 2377 spd = (scr_read(ap, SCR_CONTROL) & 0xf0) >> 4;
2378 if (spd)
2379 ap->sata_spd_limit &= (1 << spd) - 1;
2380
db70fef0 2381 /* wait for device */
3a39746a
TH		 2382 if (sata_dev_present(ap))
2383 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
2384 }
8a19ac89
TH		 2385}
2386
c2bd5804
TH		 2387/**
2388 * ata_std_softreset - reset host port via ATA SRST
2389 * @ap: port to reset
c2bd5804
TH		 2390 * @classes: resulting classes of attached devices
2391 *
2392 * Reset host port using ATA SRST. This function is to be used
2393 * as standard callback for ata_drive_*_reset() functions.
2394 *
2395 * LOCKING:
2396 * Kernel thread context (may sleep)
2397 *
2398 * RETURNS:
2399 * 0 on success, -errno otherwise.
2400 */
2bf2cb26 2401int ata_std_softreset(struct ata_port *ap, unsigned int *classes)
c2bd5804
TH		 2402{
2403 unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
2404 unsigned int devmask = 0, err_mask;
2405 u8 err;
2406
2407 DPRINTK("ENTER\n");
2408
3a39746a
TH		 2409 if (ap->ops->scr_read && !sata_dev_present(ap)) {
2410 classes[0] = ATA_DEV_NONE;
2411 goto out;
2412 }
2413
c2bd5804
TH		 2414 /* determine if device 0/1 are present */
2415 if (ata_devchk(ap, 0))
2416 devmask |= (1 << 0);
2417 if (slave_possible && ata_devchk(ap, 1))
2418 devmask |= (1 << 1);
2419
c2bd5804
TH		 2420 /* select device 0 again */
2421 ap->ops->dev_select(ap, 0);
2422
2423 /* issue bus reset */
2424 DPRINTK("about to softreset, devmask=%x\n", devmask);
2425 err_mask = ata_bus_softreset(ap, devmask);
2426 if (err_mask) {
2bf2cb26
TH		 2427 printk(KERN_ERR "ata%u: SRST failed (err_mask=0x%x)\n",
2428 ap->id, err_mask);
c2bd5804
TH		 2429 return -EIO;
2430 }
2431
2432 /* determine by signature whether we have ATA or ATAPI devices */
2433 classes[0] = ata_dev_try_classify(ap, 0, &err);
2434 if (slave_possible && err != 0x81)
2435 classes[1] = ata_dev_try_classify(ap, 1, &err);
2436
3a39746a 2437 out:
c2bd5804
TH		 2438 DPRINTK("EXIT, classes[0]=%u [1]=%u\n", classes[0], classes[1]);
2439 return 0;
2440}
2441
2442/**
2443 * sata_std_hardreset - reset host port via SATA phy reset
2444 * @ap: port to reset
c2bd5804
TH		 2445 * @class: resulting class of attached device
2446 *
2447 * SATA phy-reset host port using DET bits of SControl register.
2448 * This function is to be used as standard callback for
2449 * ata_drive_*_reset().
2450 *
2451 * LOCKING:
2452 * Kernel thread context (may sleep)
2453 *
2454 * RETURNS:
2455 * 0 on success, -errno otherwise.
2456 */
2bf2cb26 2457int sata_std_hardreset(struct ata_port *ap, unsigned int *class)
c2bd5804 2458{
852ee16a
TH		 2459 u32 scontrol;
2460
c2bd5804
TH		 2461 DPRINTK("ENTER\n");
2462
3c567b7d 2463 if (sata_set_spd_needed(ap)) {
1c3fae4d
TH		 2464 /* SATA spec says nothing about how to reconfigure
2465 * spd. To be on the safe side, turn off phy during
2466 * reconfiguration. This works for at least ICH7 AHCI
2467 * and Sil3124.
2468 */
2469 scontrol = scr_read(ap, SCR_CONTROL);
2470 scontrol = (scontrol & 0x0f0) | 0x302;
2471 scr_write_flush(ap, SCR_CONTROL, scontrol);
2472
3c567b7d 2473 sata_set_spd(ap);
1c3fae4d
TH		 2474 }
2475
2476 /* issue phy wake/reset */
852ee16a
TH		 2477 scontrol = scr_read(ap, SCR_CONTROL);
2478 scontrol = (scontrol & 0x0f0) | 0x301;
2479 scr_write_flush(ap, SCR_CONTROL, scontrol);
c2bd5804 2480
1c3fae4d 2481 /* Couldn't find anything in SATA I/II specs, but AHCI-1.1
c2bd5804
TH		 2482 * 10.4.2 says at least 1 ms.
2483 */
2484 msleep(1);
2485
1c3fae4d 2486 /* bring phy back */
7a7921e8 2487 sata_phy_resume(ap);
c2bd5804 2488
c2bd5804
TH		 2489 /* TODO: phy layer with polling, timeouts, etc. */
2490 if (!sata_dev_present(ap)) {
2491 *class = ATA_DEV_NONE;
2492 DPRINTK("EXIT, link offline\n");
2493 return 0;
2494 }
2495
2496 if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) {
987d2f05
TH		 2497 printk(KERN_ERR
2498 "ata%u: COMRESET failed (device not ready)\n", ap->id);
c2bd5804
TH		 2499 return -EIO;
2500 }
2501
3a39746a
TH		 2502 ap->ops->dev_select(ap, 0); /* probably unnecessary */
2503
c2bd5804
TH		 2504 *class = ata_dev_try_classify(ap, 0, NULL);
2505
2506 DPRINTK("EXIT, class=%u\n", *class);
2507 return 0;
2508}
2509
2510/**
2511 * ata_std_postreset - standard postreset callback
2512 * @ap: the target ata_port
2513 * @classes: classes of attached devices
2514 *
2515 * This function is invoked after a successful reset. Note that
2516 * the device might have been reset more than once using
2517 * different reset methods before postreset is invoked.
c2bd5804
TH		 2518 *
2519 * This function is to be used as standard callback for
2520 * ata_drive_*_reset().
2521 *
2522 * LOCKING:
2523 * Kernel thread context (may sleep)
2524 */
2525void ata_std_postreset(struct ata_port *ap, unsigned int *classes)
2526{
2527 DPRINTK("ENTER\n");
2528
c2bd5804
TH		 2529 /* print link status */
2530 if (ap->cbl == ATA_CBL_SATA)
2531 sata_print_link_status(ap);
2532
3a39746a
TH		 2533 /* re-enable interrupts */
2534 if (ap->ioaddr.ctl_addr) /* FIXME: hack. create a hook instead */
2535 ata_irq_on(ap);
c2bd5804
TH		 2536
2537 /* is double-select really necessary? */
2538 if (classes[0] != ATA_DEV_NONE)
2539 ap->ops->dev_select(ap, 1);
2540 if (classes[1] != ATA_DEV_NONE)
2541 ap->ops->dev_select(ap, 0);
2542
3a39746a
TH		 2543 /* bail out if no device is present */
2544 if (classes[0] == ATA_DEV_NONE && classes[1] == ATA_DEV_NONE) {
2545 DPRINTK("EXIT, no device\n");
2546 return;
2547 }
2548
2549 /* set up device control */
2550 if (ap->ioaddr.ctl_addr) {
2551 if (ap->flags & ATA_FLAG_MMIO)
2552 writeb(ap->ctl, (void __iomem *) ap->ioaddr.ctl_addr);
2553 else
2554 outb(ap->ctl, ap->ioaddr.ctl_addr);
2555 }
c2bd5804
TH		 2556
2557 DPRINTK("EXIT\n");
2558}
2559
2560/**
2561 * ata_std_probe_reset - standard probe reset method
2562 * @ap: prot to perform probe-reset
2563 * @classes: resulting classes of attached devices
2564 *
2565 * The stock off-the-shelf ->probe_reset method.
2566 *
2567 * LOCKING:
2568 * Kernel thread context (may sleep)
2569 *
2570 * RETURNS:
2571 * 0 on success, -errno otherwise.
2572 */
2573int ata_std_probe_reset(struct ata_port *ap, unsigned int *classes)
2574{
2575 ata_reset_fn_t hardreset;
2576
2577 hardreset = NULL;
db70fef0 2578 if (ap->cbl == ATA_CBL_SATA && ap->ops->scr_read)
c2bd5804
TH		 2579 hardreset = sata_std_hardreset;
2580
8a19ac89 2581 return ata_drive_probe_reset(ap, ata_std_probeinit,
7944ea95 2582 ata_std_softreset, hardreset,
c2bd5804
TH		 2583 ata_std_postreset, classes);
2584}
2585
2bf2cb26
TH		 2586int ata_do_reset(struct ata_port *ap, ata_reset_fn_t reset,
2587 ata_postreset_fn_t postreset, unsigned int *classes)
a62c0fc5
TH		 2588{
2589 int i, rc;
2590
2591 for (i = 0; i < ATA_MAX_DEVICES; i++)
2592 classes[i] = ATA_DEV_UNKNOWN;
2593
2bf2cb26 2594 rc = reset(ap, classes);
a62c0fc5
TH		 2595 if (rc)
2596 return rc;
2597
2598 /* If any class isn't ATA_DEV_UNKNOWN, consider classification
2599 * is complete and convert all ATA_DEV_UNKNOWN to
2600 * ATA_DEV_NONE.
2601 */
2602 for (i = 0; i < ATA_MAX_DEVICES; i++)
2603 if (classes[i] != ATA_DEV_UNKNOWN)
2604 break;
2605
2606 if (i < ATA_MAX_DEVICES)
2607 for (i = 0; i < ATA_MAX_DEVICES; i++)
2608 if (classes[i] == ATA_DEV_UNKNOWN)
2609 classes[i] = ATA_DEV_NONE;
2610
2611 if (postreset)
2612 postreset(ap, classes);
2613
9974e7cc 2614 return 0;
a62c0fc5
TH		 2615}
2616
2617/**
2618 * ata_drive_probe_reset - Perform probe reset with given methods
2619 * @ap: port to reset
7944ea95 2620 * @probeinit: probeinit method (can be NULL)
a62c0fc5
TH		 2621 * @softreset: softreset method (can be NULL)
2622 * @hardreset: hardreset method (can be NULL)
2623 * @postreset: postreset method (can be NULL)
2624 * @classes: resulting classes of attached devices
2625 *
2626 * Reset the specified port and classify attached devices using
2627 * given methods. This function prefers softreset but tries all
2628 * possible reset sequences to reset and classify devices. This
2629 * function is intended to be used for constructing ->probe_reset
2630 * callback by low level drivers.
2631 *
2632 * Reset methods should follow the following rules.
2633 *
2634 * - Return 0 on sucess, -errno on failure.
2635 * - If classification is supported, fill classes[] with
2636 * recognized class codes.
2637 * - If classification is not supported, leave classes[] alone.
a62c0fc5
TH		 2638 *
2639 * LOCKING:
2640 * Kernel thread context (may sleep)
2641 *
2642 * RETURNS:
2643 * 0 on success, -EINVAL if no reset method is avaliable, -ENODEV
2644 * if classification fails, and any error code from reset
2645 * methods.
2646 */
7944ea95 2647int ata_drive_probe_reset(struct ata_port *ap, ata_probeinit_fn_t probeinit,
a62c0fc5
TH		 2648 ata_reset_fn_t softreset, ata_reset_fn_t hardreset,
2649 ata_postreset_fn_t postreset, unsigned int *classes)
2650{
2651 int rc = -EINVAL;
2652
7944ea95
TH		 2653 if (probeinit)
2654 probeinit(ap);
2655
3c567b7d 2656 if (softreset && !sata_set_spd_needed(ap)) {
2bf2cb26 2657 rc = ata_do_reset(ap, softreset, postreset, classes);
9974e7cc
TH		 2658 if (rc == 0 && classes[0] != ATA_DEV_UNKNOWN)
2659 goto done;
edbabd86
TH		 2660 printk(KERN_INFO "ata%u: softreset failed, will try "
2661 "hardreset in 5 secs\n", ap->id);
2662 ssleep(5);
a62c0fc5
TH		 2663 }
2664
2665 if (!hardreset)
9974e7cc 2666 goto done;
a62c0fc5 2667
90dac02c 2668 while (1) {
2bf2cb26 2669 rc = ata_do_reset(ap, hardreset, postreset, classes);
90dac02c
TH		 2670 if (rc == 0) {
2671 if (classes[0] != ATA_DEV_UNKNOWN)
2672 goto done;
2673 break;
2674 }
2675
3c567b7d 2676 if (sata_down_spd_limit(ap))
90dac02c 2677 goto done;
edbabd86
TH		 2678
2679 printk(KERN_INFO "ata%u: hardreset failed, will retry "
2680 "in 5 secs\n", ap->id);
2681 ssleep(5);
90dac02c 2682 }
a62c0fc5 2683
edbabd86
TH		 2684 if (softreset) {
2685 printk(KERN_INFO "ata%u: hardreset succeeded without "
2686 "classification, will retry softreset in 5 secs\n",
2687 ap->id);
2688 ssleep(5);
2689
2bf2cb26 2690 rc = ata_do_reset(ap, softreset, postreset, classes);
edbabd86 2691 }
a62c0fc5 2692
9974e7cc
TH		 2693 done:
2694 if (rc == 0 && classes[0] == ATA_DEV_UNKNOWN)
2695 rc = -ENODEV;
a62c0fc5
TH		 2696 return rc;
2697}
2698
623a3128
TH		 2699/**
2700 * ata_dev_same_device - Determine whether new ID matches configured device
2701 * @ap: port on which the device to compare against resides
2702 * @dev: device to compare against
2703 * @new_class: class of the new device
2704 * @new_id: IDENTIFY page of the new device
2705 *
2706 * Compare @new_class and @new_id against @dev and determine
2707 * whether @dev is the device indicated by @new_class and
2708 * @new_id.
2709 *
2710 * LOCKING:
2711 * None.
2712 *
2713 * RETURNS:
2714 * 1 if @dev matches @new_class and @new_id, 0 otherwise.
2715 */
2716static int ata_dev_same_device(struct ata_port *ap, struct ata_device *dev,
2717 unsigned int new_class, const u16 *new_id)
2718{
2719 const u16 *old_id = dev->id;
2720 unsigned char model[2][41], serial[2][21];
2721 u64 new_n_sectors;
2722
2723 if (dev->class != new_class) {
2724 printk(KERN_INFO
2725 "ata%u: dev %u class mismatch %d != %d\n",
2726 ap->id, dev->devno, dev->class, new_class);
2727 return 0;
2728 }
2729
2730 ata_id_c_string(old_id, model[0], ATA_ID_PROD_OFS, sizeof(model[0]));
2731 ata_id_c_string(new_id, model[1], ATA_ID_PROD_OFS, sizeof(model[1]));
2732 ata_id_c_string(old_id, serial[0], ATA_ID_SERNO_OFS, sizeof(serial[0]));
2733 ata_id_c_string(new_id, serial[1], ATA_ID_SERNO_OFS, sizeof(serial[1]));
2734 new_n_sectors = ata_id_n_sectors(new_id);
2735
2736 if (strcmp(model[0], model[1])) {
2737 printk(KERN_INFO
2738 "ata%u: dev %u model number mismatch '%s' != '%s'\n",
2739 ap->id, dev->devno, model[0], model[1]);
2740 return 0;
2741 }
2742
2743 if (strcmp(serial[0], serial[1])) {
2744 printk(KERN_INFO
2745 "ata%u: dev %u serial number mismatch '%s' != '%s'\n",
2746 ap->id, dev->devno, serial[0], serial[1]);
2747 return 0;
2748 }
2749
2750 if (dev->class == ATA_DEV_ATA && dev->n_sectors != new_n_sectors) {
2751 printk(KERN_INFO
2752 "ata%u: dev %u n_sectors mismatch %llu != %llu\n",
2753 ap->id, dev->devno, (unsigned long long)dev->n_sectors,
2754 (unsigned long long)new_n_sectors);
2755 return 0;
2756 }
2757
2758 return 1;
2759}
2760
2761/**
2762 * ata_dev_revalidate - Revalidate ATA device
2763 * @ap: port on which the device to revalidate resides
2764 * @dev: device to revalidate
2765 * @post_reset: is this revalidation after reset?
2766 *
2767 * Re-read IDENTIFY page and make sure @dev is still attached to
2768 * the port.
2769 *
2770 * LOCKING:
2771 * Kernel thread context (may sleep)
2772 *
2773 * RETURNS:
2774 * 0 on success, negative errno otherwise
2775 */
2776int ata_dev_revalidate(struct ata_port *ap, struct ata_device *dev,
2777 int post_reset)
2778{
5eb45c02 2779 unsigned int class = dev->class;
fe635c7e 2780 u16 *id = (void *)ap->sector_buf;
623a3128
TH		 2781 int rc;
2782
5eb45c02
TH		 2783 if (!ata_dev_enabled(dev)) {
2784 rc = -ENODEV;
2785 goto fail;
2786 }
623a3128 2787
fe635c7e
TH		 2788 /* read ID data */
2789 rc = ata_dev_read_id(ap, dev, &class, post_reset, id);
623a3128
TH		 2790 if (rc)
2791 goto fail;
2792
2793 /* is the device still there? */
2794 if (!ata_dev_same_device(ap, dev, class, id)) {
2795 rc = -ENODEV;
2796 goto fail;
2797 }
2798
fe635c7e 2799 memcpy(dev->id, id, sizeof(id[0]) * ATA_ID_WORDS);
623a3128
TH		 2800
2801 /* configure device according to the new ID */
5eb45c02
TH		 2802 rc = ata_dev_configure(ap, dev, 0);
2803 if (rc == 0)
2804 return 0;
623a3128
TH		 2805
2806 fail:
2807 printk(KERN_ERR "ata%u: dev %u revalidation failed (errno=%d)\n",
2808 ap->id, dev->devno, rc);
623a3128
TH		 2809 return rc;
2810}
2811
98ac62de 2812static const char * const ata_dma_blacklist [] = {
f4b15fef
AC		 2813 "WDC AC11000H", NULL,
2814 "WDC AC22100H", NULL,
2815 "WDC AC32500H", NULL,
2816 "WDC AC33100H", NULL,
2817 "WDC AC31600H", NULL,
2818 "WDC AC32100H", "24.09P07",
2819 "WDC AC23200L", "21.10N21",
2820 "Compaq CRD-8241B", NULL,
2821 "CRD-8400B", NULL,
2822 "CRD-8480B", NULL,
2823 "CRD-8482B", NULL,
2824 "CRD-84", NULL,
2825 "SanDisk SDP3B", NULL,
2826 "SanDisk SDP3B-64", NULL,
2827 "SANYO CD-ROM CRD", NULL,
2828 "HITACHI CDR-8", NULL,
2e9edbf8 2829 "HITACHI CDR-8335", NULL,
f4b15fef 2830 "HITACHI CDR-8435", NULL,
2e9edbf8
JG		 2831 "Toshiba CD-ROM XM-6202B", NULL,
2832 "TOSHIBA CD-ROM XM-1702BC", NULL,
2833 "CD-532E-A", NULL,
2834 "E-IDE CD-ROM CR-840", NULL,
2835 "CD-ROM Drive/F5A", NULL,
2836 "WPI CDD-820", NULL,
f4b15fef 2837 "SAMSUNG CD-ROM SC-148C", NULL,
2e9edbf8 2838 "SAMSUNG CD-ROM SC", NULL,
f4b15fef
AC		 2839 "SanDisk SDP3B-64", NULL,
2840 "ATAPI CD-ROM DRIVE 40X MAXIMUM",NULL,
2841 "_NEC DV5800A", NULL,
2842 "SAMSUNG CD-ROM SN-124", "N001"
1da177e4 2843};
2e9edbf8 2844
f4b15fef
AC		 2845static int ata_strim(char *s, size_t len)
2846{
2847 len = strnlen(s, len);
2848
2849 /* ATAPI specifies that empty space is blank-filled; remove blanks */
2850 while ((len > 0) && (s[len - 1] == ' ')) {
2851 len--;
2852 s[len] = 0;
2853 }
2854 return len;
2855}
1da177e4 2856
057ace5e 2857static int ata_dma_blacklisted(const struct ata_device *dev)
1da177e4 2858{
f4b15fef
AC		 2859 unsigned char model_num[40];
2860 unsigned char model_rev[16];
2861 unsigned int nlen, rlen;
1da177e4
LT		 2862 int i;
2863
f4b15fef
AC		 2864 ata_id_string(dev->id, model_num, ATA_ID_PROD_OFS,
2865 sizeof(model_num));
2866 ata_id_string(dev->id, model_rev, ATA_ID_FW_REV_OFS,
2867 sizeof(model_rev));
2868 nlen = ata_strim(model_num, sizeof(model_num));
2869 rlen = ata_strim(model_rev, sizeof(model_rev));
1da177e4 2870
f4b15fef
AC		 2871 for (i = 0; i < ARRAY_SIZE(ata_dma_blacklist); i += 2) {
2872 if (!strncmp(ata_dma_blacklist[i], model_num, nlen)) {
2873 if (ata_dma_blacklist[i+1] == NULL)
2874 return 1;
2875 if (!strncmp(ata_dma_blacklist[i], model_rev, rlen))
2876 return 1;
2877 }
2878 }
1da177e4
LT		 2879 return 0;
2880}
2881
a6d5a51c
TH		 2882/**
2883 * ata_dev_xfermask - Compute supported xfermask of the given device
2884 * @ap: Port on which the device to compute xfermask for resides
2885 * @dev: Device to compute xfermask for
2886 *
acf356b1
TH		 2887 * Compute supported xfermask of @dev and store it in
2888 * dev->*_mask. This function is responsible for applying all
2889 * known limits including host controller limits, device
2890 * blacklist, etc...
a6d5a51c 2891 *
600511e8
TH		 2892 * FIXME: The current implementation limits all transfer modes to
2893 * the fastest of the lowested device on the port. This is not
05c8e0ac 2894 * required on most controllers.
600511e8 2895 *
a6d5a51c
TH		 2896 * LOCKING:
2897 * None.
a6d5a51c 2898 */
acf356b1 2899static void ata_dev_xfermask(struct ata_port *ap, struct ata_device *dev)
1da177e4 2900{
5444a6f4 2901 struct ata_host_set *hs = ap->host_set;
a6d5a51c
TH		 2902 unsigned long xfer_mask;
2903 int i;
1da177e4 2904
565083e1
TH		 2905 xfer_mask = ata_pack_xfermask(ap->pio_mask,
2906 ap->mwdma_mask, ap->udma_mask);
2907
2908 /* Apply cable rule here. Don't apply it early because when
2909 * we handle hot plug the cable type can itself change.
2910 */
2911 if (ap->cbl == ATA_CBL_PATA40)
2912 xfer_mask &= ~(0xF8 << ATA_SHIFT_UDMA);
1da177e4 2913
5444a6f4 2914 /* FIXME: Use port-wide xfermask for now */
a6d5a51c
TH		 2915 for (i = 0; i < ATA_MAX_DEVICES; i++) {
2916 struct ata_device *d = &ap->device[i];
565083e1
TH		 2917
2918 if (ata_dev_absent(d))
2919 continue;
2920
2921 if (ata_dev_disabled(d)) {
2922 /* to avoid violating device selection timing */
2923 xfer_mask &= ata_pack_xfermask(d->pio_mask,
2924 UINT_MAX, UINT_MAX);
a6d5a51c 2925 continue;
565083e1
TH		 2926 }
2927
2928 xfer_mask &= ata_pack_xfermask(d->pio_mask,
2929 d->mwdma_mask, d->udma_mask);
a6d5a51c
TH		 2930 xfer_mask &= ata_id_xfermask(d->id);
2931 if (ata_dma_blacklisted(d))
2932 xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA);
1da177e4
LT		 2933 }
2934
a6d5a51c
TH		 2935 if (ata_dma_blacklisted(dev))
2936 printk(KERN_WARNING "ata%u: dev %u is on DMA blacklist, "
2937 "disabling DMA\n", ap->id, dev->devno);
2938
5444a6f4
AC		 2939 if (hs->flags & ATA_HOST_SIMPLEX) {
2940 if (hs->simplex_claimed)
2941 xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA);
2942 }
565083e1 2943
5444a6f4
AC		 2944 if (ap->ops->mode_filter)
2945 xfer_mask = ap->ops->mode_filter(ap, dev, xfer_mask);
2946
565083e1
TH		 2947 ata_unpack_xfermask(xfer_mask, &dev->pio_mask,
2948 &dev->mwdma_mask, &dev->udma_mask);
1da177e4
LT		 2949}
2950
1da177e4
LT		 2951/**
2952 * ata_dev_set_xfermode - Issue SET FEATURES - XFER MODE command
2953 * @ap: Port associated with device @dev
2954 * @dev: Device to which command will be sent
2955 *
780a87f7
JG		 2956 * Issue SET FEATURES - XFER MODE command to device @dev
2957 * on port @ap.
2958 *
1da177e4 2959 * LOCKING:
0cba632b 2960 * PCI/etc. bus probe sem.
83206a29
TH		 2961 *
2962 * RETURNS:
2963 * 0 on success, AC_ERR_* mask otherwise.
1da177e4
LT		 2964 */
2965
83206a29
TH		 2966static unsigned int ata_dev_set_xfermode(struct ata_port *ap,
2967 struct ata_device *dev)
1da177e4 2968{
a0123703 2969 struct ata_taskfile tf;
83206a29 2970 unsigned int err_mask;
1da177e4
LT		 2971
2972 /* set up set-features taskfile */
2973 DPRINTK("set features - xfer mode\n");
2974
a0123703
TH		 2975 ata_tf_init(ap, &tf, dev->devno);
2976 tf.command = ATA_CMD_SET_FEATURES;
2977 tf.feature = SETFEATURES_XFER;
2978 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
2979 tf.protocol = ATA_PROT_NODATA;
2980 tf.nsect = dev->xfer_mode;
1da177e4 2981
d69cf37d 2982 err_mask = ata_exec_internal(ap, dev, &tf, NULL, DMA_NONE, NULL, 0);
1da177e4 2983
83206a29
TH		 2984 DPRINTK("EXIT, err_mask=%x\n", err_mask);
2985 return err_mask;
1da177e4
LT		 2986}
2987
8bf62ece
AL		 2988/**
2989 * ata_dev_init_params - Issue INIT DEV PARAMS command
2990 * @ap: Port associated with device @dev
2991 * @dev: Device to which command will be sent
2992 *
2993 * LOCKING:
6aff8f1f
TH		 2994 * Kernel thread context (may sleep)
2995 *
2996 * RETURNS:
2997 * 0 on success, AC_ERR_* mask otherwise.
8bf62ece
AL		 2998 */
2999
6aff8f1f 3000static unsigned int ata_dev_init_params(struct ata_port *ap,
00b6f5e9
AL		 3001 struct ata_device *dev,
3002 u16 heads,
3003 u16 sectors)
8bf62ece 3004{
a0123703 3005 struct ata_taskfile tf;
6aff8f1f 3006 unsigned int err_mask;
8bf62ece
AL		 3007
3008 /* Number of sectors per track 1-255. Number of heads 1-16 */
3009 if (sectors < 1 || sectors > 255 || heads < 1 || heads > 16)
00b6f5e9 3010 return AC_ERR_INVALID;
8bf62ece
AL		 3011
3012 /* set up init dev params taskfile */
3013 DPRINTK("init dev params \n");
3014
a0123703
TH		 3015 ata_tf_init(ap, &tf, dev->devno);
3016 tf.command = ATA_CMD_INIT_DEV_PARAMS;
3017 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
3018 tf.protocol = ATA_PROT_NODATA;
3019 tf.nsect = sectors;
3020 tf.device |= (heads - 1) & 0x0f; /* max head = num. of heads - 1 */
8bf62ece 3021
d69cf37d 3022 err_mask = ata_exec_internal(ap, dev, &tf, NULL, DMA_NONE, NULL, 0);
8bf62ece 3023
6aff8f1f
TH		 3024 DPRINTK("EXIT, err_mask=%x\n", err_mask);
3025 return err_mask;
8bf62ece
AL		 3026}
3027
1da177e4 3028/**
0cba632b
JG		 3029 * ata_sg_clean - Unmap DMA memory associated with command
3030 * @qc: Command containing DMA memory to be released
3031 *
3032 * Unmap all mapped DMA memory associated with this command.
1da177e4
LT		 3033 *
3034 * LOCKING:
0cba632b 3035 * spin_lock_irqsave(host_set lock)
1da177e4
LT		 3036 */
3037
3038static void ata_sg_clean(struct ata_queued_cmd *qc)
3039{
3040 struct ata_port *ap = qc->ap;
cedc9a47 3041 struct scatterlist *sg = qc->__sg;
1da177e4 3042 int dir = qc->dma_dir;
cedc9a47 3043 void *pad_buf = NULL;
1da177e4 3044
a4631474
TH		 3045 WARN_ON(!(qc->flags & ATA_QCFLAG_DMAMAP));
3046 WARN_ON(sg == NULL);
1da177e4
LT		 3047
3048 if (qc->flags & ATA_QCFLAG_SINGLE)
f131883e 3049 WARN_ON(qc->n_elem > 1);
1da177e4 3050
2c13b7ce 3051 VPRINTK("unmapping %u sg elements\n", qc->n_elem);
1da177e4 3052
cedc9a47
JG		 3053 /* if we padded the buffer out to 32-bit bound, and data
3054 * xfer direction is from-device, we must copy from the
3055 * pad buffer back into the supplied buffer
3056 */
3057 if (qc->pad_len && !(qc->tf.flags & ATA_TFLAG_WRITE))
3058 pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
3059
3060 if (qc->flags & ATA_QCFLAG_SG) {
e1410f2d 3061 if (qc->n_elem)
2f1f610b 3062 dma_unmap_sg(ap->dev, sg, qc->n_elem, dir);
cedc9a47
JG		 3063 /* restore last sg */
3064 sg[qc->orig_n_elem - 1].length += qc->pad_len;
3065 if (pad_buf) {
3066 struct scatterlist *psg = &qc->pad_sgent;
3067 void *addr = kmap_atomic(psg->page, KM_IRQ0);
3068 memcpy(addr + psg->offset, pad_buf, qc->pad_len);
dfa15988 3069 kunmap_atomic(addr, KM_IRQ0);
cedc9a47
JG		 3070 }
3071 } else {
2e242fa9 3072 if (qc->n_elem)
2f1f610b 3073 dma_unmap_single(ap->dev,
e1410f2d
JG		 3074 sg_dma_address(&sg[0]), sg_dma_len(&sg[0]),
3075 dir);
cedc9a47
JG		 3076 /* restore sg */
3077 sg->length += qc->pad_len;
3078 if (pad_buf)
3079 memcpy(qc->buf_virt + sg->length - qc->pad_len,
3080 pad_buf, qc->pad_len);
3081 }
1da177e4
LT		 3082
3083 qc->flags &= ~ATA_QCFLAG_DMAMAP;
cedc9a47 3084 qc->__sg = NULL;
1da177e4
LT		 3085}
3086
3087/**
3088 * ata_fill_sg - Fill PCI IDE PRD table
3089 * @qc: Metadata associated with taskfile to be transferred
3090 *
780a87f7
JG		 3091 * Fill PCI IDE PRD (scatter-gather) table with segments
3092 * associated with the current disk command.
3093 *
1da177e4 3094 * LOCKING:
780a87f7 3095 * spin_lock_irqsave(host_set lock)
1da177e4
LT		 3096 *
3097 */
3098static void ata_fill_sg(struct ata_queued_cmd *qc)
3099{
1da177e4 3100 struct ata_port *ap = qc->ap;
cedc9a47
JG		 3101 struct scatterlist *sg;
3102 unsigned int idx;
1da177e4 3103
a4631474 3104 WARN_ON(qc->__sg == NULL);
f131883e 3105 WARN_ON(qc->n_elem == 0 && qc->pad_len == 0);
1da177e4
LT		 3106
3107 idx = 0;
cedc9a47 3108 ata_for_each_sg(sg, qc) {
1da177e4
LT		 3109 u32 addr, offset;
3110 u32 sg_len, len;
3111
3112 /* determine if physical DMA addr spans 64K boundary.
3113 * Note h/w doesn't support 64-bit, so we unconditionally
3114 * truncate dma_addr_t to u32.
3115 */
3116 addr = (u32) sg_dma_address(sg);
3117 sg_len = sg_dma_len(sg);
3118
3119 while (sg_len) {
3120 offset = addr & 0xffff;
3121 len = sg_len;
3122 if ((offset + sg_len) > 0x10000)
3123 len = 0x10000 - offset;
3124
3125 ap->prd[idx].addr = cpu_to_le32(addr);
3126 ap->prd[idx].flags_len = cpu_to_le32(len & 0xffff);
3127 VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", idx, addr, len);
3128
3129 idx++;
3130 sg_len -= len;
3131 addr += len;
3132 }
3133 }
3134
3135 if (idx)
3136 ap->prd[idx - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT);
3137}
3138/**
3139 * ata_check_atapi_dma - Check whether ATAPI DMA can be supported
3140 * @qc: Metadata associated with taskfile to check
3141 *
780a87f7
JG		 3142 * Allow low-level driver to filter ATA PACKET commands, returning
3143 * a status indicating whether or not it is OK to use DMA for the
3144 * supplied PACKET command.
3145 *
1da177e4 3146 * LOCKING:
0cba632b
JG		 3147 * spin_lock_irqsave(host_set lock)
3148 *
1da177e4
LT		 3149 * RETURNS: 0 when ATAPI DMA can be used
3150 * nonzero otherwise
3151 */
3152int ata_check_atapi_dma(struct ata_queued_cmd *qc)
3153{
3154 struct ata_port *ap = qc->ap;
3155 int rc = 0; /* Assume ATAPI DMA is OK by default */
3156
3157 if (ap->ops->check_atapi_dma)
3158 rc = ap->ops->check_atapi_dma(qc);
3159
3160 return rc;
3161}
3162/**
3163 * ata_qc_prep - Prepare taskfile for submission
3164 * @qc: Metadata associated with taskfile to be prepared
3165 *
780a87f7
JG		 3166 * Prepare ATA taskfile for submission.
3167 *
1da177e4
LT		 3168 * LOCKING:
3169 * spin_lock_irqsave(host_set lock)
3170 */
3171void ata_qc_prep(struct ata_queued_cmd *qc)
3172{
3173 if (!(qc->flags & ATA_QCFLAG_DMAMAP))
3174 return;
3175
3176 ata_fill_sg(qc);
3177}
3178
e46834cd
BK		 3179void ata_noop_qc_prep(struct ata_queued_cmd *qc) { }
3180
0cba632b
JG		 3181/**
3182 * ata_sg_init_one - Associate command with memory buffer
3183 * @qc: Command to be associated
3184 * @buf: Memory buffer
3185 * @buflen: Length of memory buffer, in bytes.
3186 *
3187 * Initialize the data-related elements of queued_cmd @qc
3188 * to point to a single memory buffer, @buf of byte length @buflen.
3189 *
3190 * LOCKING:
3191 * spin_lock_irqsave(host_set lock)
3192 */
3193
1da177e4
LT		 3194void ata_sg_init_one(struct ata_queued_cmd *qc, void *buf, unsigned int buflen)
3195{
3196 struct scatterlist *sg;
3197
3198 qc->flags |= ATA_QCFLAG_SINGLE;
3199
3200 memset(&qc->sgent, 0, sizeof(qc->sgent));
cedc9a47 3201 qc->__sg = &qc->sgent;
1da177e4 3202 qc->n_elem = 1;
cedc9a47 3203 qc->orig_n_elem = 1;
1da177e4
LT		 3204 qc->buf_virt = buf;
3205
cedc9a47 3206 sg = qc->__sg;
f0612bbc 3207 sg_init_one(sg, buf, buflen);
1da177e4
LT		 3208}
3209
0cba632b
JG		 3210/**
3211 * ata_sg_init - Associate command with scatter-gather table.
3212 * @qc: Command to be associated
3213 * @sg: Scatter-gather table.
3214 * @n_elem: Number of elements in s/g table.
3215 *
3216 * Initialize the data-related elements of queued_cmd @qc
3217 * to point to a scatter-gather table @sg, containing @n_elem
3218 * elements.
3219 *
3220 * LOCKING:
3221 * spin_lock_irqsave(host_set lock)
3222 */
3223
1da177e4
LT		 3224void ata_sg_init(struct ata_queued_cmd *qc, struct scatterlist *sg,
3225 unsigned int n_elem)
3226{
3227 qc->flags |= ATA_QCFLAG_SG;
cedc9a47 3228 qc->__sg = sg;
1da177e4 3229 qc->n_elem = n_elem;
cedc9a47 3230 qc->orig_n_elem = n_elem;
1da177e4
LT		 3231}
3232
3233/**
0cba632b
JG		 3234 * ata_sg_setup_one - DMA-map the memory buffer associated with a command.
3235 * @qc: Command with memory buffer to be mapped.
3236 *
3237 * DMA-map the memory buffer associated with queued_cmd @qc.
1da177e4
LT		 3238 *
3239 * LOCKING:
3240 * spin_lock_irqsave(host_set lock)
3241 *
3242 * RETURNS:
0cba632b 3243 * Zero on success, negative on error.
1da177e4
LT		 3244 */
3245
3246static int ata_sg_setup_one(struct ata_queued_cmd *qc)
3247{
3248 struct ata_port *ap = qc->ap;
3249 int dir = qc->dma_dir;
cedc9a47 3250 struct scatterlist *sg = qc->__sg;
1da177e4 3251 dma_addr_t dma_address;
2e242fa9 3252 int trim_sg = 0;
1da177e4 3253
cedc9a47
JG		 3254 /* we must lengthen transfers to end on a 32-bit boundary */
3255 qc->pad_len = sg->length & 3;
3256 if (qc->pad_len) {
3257 void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
3258 struct scatterlist *psg = &qc->pad_sgent;
3259
a4631474 3260 WARN_ON(qc->dev->class != ATA_DEV_ATAPI);
cedc9a47
JG		 3261
3262 memset(pad_buf, 0, ATA_DMA_PAD_SZ);
3263
3264 if (qc->tf.flags & ATA_TFLAG_WRITE)
3265 memcpy(pad_buf, qc->buf_virt + sg->length - qc->pad_len,
3266 qc->pad_len);
3267
3268 sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ);
3269 sg_dma_len(psg) = ATA_DMA_PAD_SZ;
3270 /* trim sg */
3271 sg->length -= qc->pad_len;
2e242fa9
TH		 3272 if (sg->length == 0)
3273 trim_sg = 1;
cedc9a47
JG		 3274
3275 DPRINTK("padding done, sg->length=%u pad_len=%u\n",
3276 sg->length, qc->pad_len);
3277 }
3278
2e242fa9
TH		 3279 if (trim_sg) {
3280 qc->n_elem--;
e1410f2d
JG		 3281 goto skip_map;
3282 }
3283
2f1f610b 3284 dma_address = dma_map_single(ap->dev, qc->buf_virt,
32529e01 3285 sg->length, dir);
537a95d9
TH		 3286 if (dma_mapping_error(dma_address)) {
3287 /* restore sg */
3288 sg->length += qc->pad_len;
1da177e4 3289 return -1;
537a95d9 3290 }
1da177e4
LT		 3291
3292 sg_dma_address(sg) = dma_address;
32529e01 3293 sg_dma_len(sg) = sg->length;
1da177e4 3294
2e242fa9 3295skip_map:
1da177e4
LT		 3296 DPRINTK("mapped buffer of %d bytes for %s\n", sg_dma_len(sg),
3297 qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
3298
3299 return 0;
3300}
3301
3302/**
0cba632b
JG		 3303 * ata_sg_setup - DMA-map the scatter-gather table associated with a command.
3304 * @qc: Command with scatter-gather table to be mapped.
3305 *
3306 * DMA-map the scatter-gather table associated with queued_cmd @qc.
1da177e4
LT		 3307 *
3308 * LOCKING:
3309 * spin_lock_irqsave(host_set lock)
3310 *
3311 * RETURNS:
0cba632b 3312 * Zero on success, negative on error.
1da177e4
LT		 3313 *
3314 */
3315
3316static int ata_sg_setup(struct ata_queued_cmd *qc)
3317{
3318 struct ata_port *ap = qc->ap;
cedc9a47
JG		 3319 struct scatterlist *sg = qc->__sg;
3320 struct scatterlist *lsg = &sg[qc->n_elem - 1];
e1410f2d 3321 int n_elem, pre_n_elem, dir, trim_sg = 0;
1da177e4
LT		 3322
3323 VPRINTK("ENTER, ata%u\n", ap->id);
a4631474 3324 WARN_ON(!(qc->flags & ATA_QCFLAG_SG));
1da177e4 3325
cedc9a47
JG		 3326 /* we must lengthen transfers to end on a 32-bit boundary */
3327 qc->pad_len = lsg->length & 3;
3328 if (qc->pad_len) {
3329 void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
3330 struct scatterlist *psg = &qc->pad_sgent;
3331 unsigned int offset;
3332
a4631474 3333 WARN_ON(qc->dev->class != ATA_DEV_ATAPI);
cedc9a47
JG		 3334
3335 memset(pad_buf, 0, ATA_DMA_PAD_SZ);
3336
3337 /*
3338 * psg->page/offset are used to copy to-be-written
3339 * data in this function or read data in ata_sg_clean.
3340 */
3341 offset = lsg->offset + lsg->length - qc->pad_len;
3342 psg->page = nth_page(lsg->page, offset >> PAGE_SHIFT);
3343 psg->offset = offset_in_page(offset);
3344
3345 if (qc->tf.flags & ATA_TFLAG_WRITE) {
3346 void *addr = kmap_atomic(psg->page, KM_IRQ0);
3347 memcpy(pad_buf, addr + psg->offset, qc->pad_len);
dfa15988 3348 kunmap_atomic(addr, KM_IRQ0);
cedc9a47
JG		 3349 }
3350
3351 sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ);
3352 sg_dma_len(psg) = ATA_DMA_PAD_SZ;
3353 /* trim last sg */
3354 lsg->length -= qc->pad_len;
e1410f2d
JG		 3355 if (lsg->length == 0)
3356 trim_sg = 1;
cedc9a47
JG		 3357
3358 DPRINTK("padding done, sg[%d].length=%u pad_len=%u\n",
3359 qc->n_elem - 1, lsg->length, qc->pad_len);
3360 }
3361
e1410f2d
JG		 3362 pre_n_elem = qc->n_elem;
3363 if (trim_sg && pre_n_elem)
3364 pre_n_elem--;
3365
3366 if (!pre_n_elem) {
3367 n_elem = 0;
3368 goto skip_map;
3369 }
3370
1da177e4 3371 dir = qc->dma_dir;
2f1f610b 3372 n_elem = dma_map_sg(ap->dev, sg, pre_n_elem, dir);
537a95d9
TH		 3373 if (n_elem < 1) {
3374 /* restore last sg */
3375 lsg->length += qc->pad_len;
1da177e4 3376 return -1;
537a95d9 3377 }
1da177e4
LT		 3378
3379 DPRINTK("%d sg elements mapped\n", n_elem);
3380
e1410f2d 3381skip_map:
1da177e4
LT		 3382 qc->n_elem = n_elem;
3383
3384 return 0;
3385}
3386
40e8c82c
TH		 3387/**
3388 * ata_poll_qc_complete - turn irq back on and finish qc
3389 * @qc: Command to complete
8e8b77dd 3390 * @err_mask: ATA status register content
40e8c82c
TH		 3391 *
3392 * LOCKING:
3393 * None. (grabs host lock)
3394 */
3395
a22e2eb0 3396void ata_poll_qc_complete(struct ata_queued_cmd *qc)
40e8c82c
TH		 3397{
3398 struct ata_port *ap = qc->ap;
b8f6153e 3399 unsigned long flags;
40e8c82c 3400
b8f6153e 3401 spin_lock_irqsave(&ap->host_set->lock, flags);
40e8c82c
TH		 3402 ap->flags &= ~ATA_FLAG_NOINTR;
3403 ata_irq_on(ap);
a22e2eb0 3404 ata_qc_complete(qc);
b8f6153e 3405 spin_unlock_irqrestore(&ap->host_set->lock, flags);
40e8c82c
TH		 3406}
3407
1da177e4 3408/**
c893a3ae 3409 * ata_pio_poll - poll using PIO, depending on current state
c91af2c8 3410 * @qc: qc in progress
1da177e4
LT		 3411 *
3412 * LOCKING:
0cba632b 3413 * None. (executing in kernel thread context)
1da177e4
LT		 3414 *
3415 * RETURNS:
6f0ef4fa 3416 * timeout value to use
1da177e4 3417 */
c91af2c8 3418static unsigned long ata_pio_poll(struct ata_queued_cmd *qc)
1da177e4 3419{
c91af2c8 3420 struct ata_port *ap = qc->ap;
1da177e4 3421 u8 status;
14be71f4
AL		 3422 unsigned int poll_state = HSM_ST_UNKNOWN;
3423 unsigned int reg_state = HSM_ST_UNKNOWN;
14be71f4
AL		 3424
3425 switch (ap->hsm_task_state) {
3426 case HSM_ST:
3427 case HSM_ST_POLL:
3428 poll_state = HSM_ST_POLL;
3429 reg_state = HSM_ST;
1da177e4 3430 break;
14be71f4
AL		 3431 case HSM_ST_LAST:
3432 case HSM_ST_LAST_POLL:
3433 poll_state = HSM_ST_LAST_POLL;
3434 reg_state = HSM_ST_LAST;
1da177e4
LT		 3435 break;
3436 default:
3437 BUG();
3438 break;
3439 }
3440
3441 status = ata_chk_status(ap);
3442 if (status & ATA_BUSY) {
3443 if (time_after(jiffies, ap->pio_task_timeout)) {
11a56d24 3444 qc->err_mask |= AC_ERR_TIMEOUT;
7c398335 3445 ap->hsm_task_state = HSM_ST_TMOUT;
1da177e4
LT		 3446 return 0;
3447 }
14be71f4 3448 ap->hsm_task_state = poll_state;
1da177e4
LT		 3449 return ATA_SHORT_PAUSE;
3450 }
3451
14be71f4 3452 ap->hsm_task_state = reg_state;
1da177e4
LT		 3453 return 0;
3454}
3455
3456/**
6f0ef4fa 3457 * ata_pio_complete - check if drive is busy or idle
c91af2c8 3458 * @qc: qc to complete
1da177e4
LT		 3459 *
3460 * LOCKING:
0cba632b 3461 * None. (executing in kernel thread context)
7fb6ec28
JG		 3462 *
3463 * RETURNS:
3464 * Non-zero if qc completed, zero otherwise.
1da177e4 3465 */
c91af2c8 3466static int ata_pio_complete(struct ata_queued_cmd *qc)
1da177e4 3467{
c91af2c8 3468 struct ata_port *ap = qc->ap;
1da177e4
LT		 3469 u8 drv_stat;
3470
3471 /*
31433ea3
AC		 3472 * This is purely heuristic. This is a fast path. Sometimes when
3473 * we enter, BSY will be cleared in a chk-status or two. If not,
3474 * the drive is probably seeking or something. Snooze for a couple
3475 * msecs, then chk-status again. If still busy, fall back to
14be71f4 3476 * HSM_ST_POLL state.
1da177e4 3477 */
fe79e683
AL		 3478 drv_stat = ata_busy_wait(ap, ATA_BUSY, 10);
3479 if (drv_stat & ATA_BUSY) {
1da177e4 3480 msleep(2);
fe79e683
AL		 3481 drv_stat = ata_busy_wait(ap, ATA_BUSY, 10);
3482 if (drv_stat & ATA_BUSY) {
14be71f4 3483 ap->hsm_task_state = HSM_ST_LAST_POLL;
1da177e4 3484 ap->pio_task_timeout = jiffies + ATA_TMOUT_PIO;
7fb6ec28 3485 return 0;
1da177e4
LT		 3486 }
3487 }
3488
3489 drv_stat = ata_wait_idle(ap);
3490 if (!ata_ok(drv_stat)) {
1c848984 3491 qc->err_mask |= __ac_err_mask(drv_stat);
14be71f4 3492 ap->hsm_task_state = HSM_ST_ERR;
7fb6ec28 3493 return 0;
1da177e4
LT		 3494 }
3495
14be71f4 3496 ap->hsm_task_state = HSM_ST_IDLE;
1da177e4 3497
a4631474 3498 WARN_ON(qc->err_mask);
a22e2eb0 3499 ata_poll_qc_complete(qc);
7fb6ec28
JG		 3500
3501 /* another command may start at this point */
3502
3503 return 1;
1da177e4
LT		 3504}
3505
0baab86b
EF		 3506
3507/**
c893a3ae 3508 * swap_buf_le16 - swap halves of 16-bit words in place
0baab86b
EF		 3509 * @buf: Buffer to swap
3510 * @buf_words: Number of 16-bit words in buffer.
3511 *
3512 * Swap halves of 16-bit words if needed to convert from
3513 * little-endian byte order to native cpu byte order, or
3514 * vice-versa.
3515 *
3516 * LOCKING:
6f0ef4fa 3517 * Inherited from caller.
0baab86b 3518 */
1da177e4
LT		 3519void swap_buf_le16(u16 *buf, unsigned int buf_words)
3520{
3521#ifdef __BIG_ENDIAN
3522 unsigned int i;
3523
3524 for (i = 0; i < buf_words; i++)
3525 buf[i] = le16_to_cpu(buf[i]);
3526#endif /* __BIG_ENDIAN */
3527}
3528
6ae4cfb5
AL		 3529/**
3530 * ata_mmio_data_xfer - Transfer data by MMIO
3531 * @ap: port to read/write
3532 * @buf: data buffer
3533 * @buflen: buffer length
344babaa 3534 * @write_data: read/write
6ae4cfb5
AL		 3535 *
3536 * Transfer data from/to the device data register by MMIO.
3537 *
3538 * LOCKING:
3539 * Inherited from caller.
6ae4cfb5
AL		 3540 */
3541
1da177e4
LT		 3542static void ata_mmio_data_xfer(struct ata_port *ap, unsigned char *buf,
3543 unsigned int buflen, int write_data)
3544{
3545 unsigned int i;
3546 unsigned int words = buflen >> 1;
3547 u16 *buf16 = (u16 *) buf;
3548 void __iomem *mmio = (void __iomem *)ap->ioaddr.data_addr;
3549
6ae4cfb5 3550 /* Transfer multiple of 2 bytes */
1da177e4
LT		 3551 if (write_data) {
3552 for (i = 0; i < words; i++)
3553 writew(le16_to_cpu(buf16[i]), mmio);
3554 } else {
3555 for (i = 0; i < words; i++)
3556 buf16[i] = cpu_to_le16(readw(mmio));
3557 }
6ae4cfb5
AL		 3558
3559 /* Transfer trailing 1 byte, if any. */
3560 if (unlikely(buflen & 0x01)) {
3561 u16 align_buf[1] = { 0 };
3562 unsigned char *trailing_buf = buf + buflen - 1;
3563
3564 if (write_data) {
3565 memcpy(align_buf, trailing_buf, 1);
3566 writew(le16_to_cpu(align_buf[0]), mmio);
3567 } else {
3568 align_buf[0] = cpu_to_le16(readw(mmio));
3569 memcpy(trailing_buf, align_buf, 1);
3570 }
3571 }
1da177e4
LT		 3572}
3573
6ae4cfb5
AL		 3574/**
3575 * ata_pio_data_xfer - Transfer data by PIO
3576 * @ap: port to read/write
3577 * @buf: data buffer
3578 * @buflen: buffer length
344babaa 3579 * @write_data: read/write
6ae4cfb5
AL		 3580 *
3581 * Transfer data from/to the device data register by PIO.
3582 *
3583 * LOCKING:
3584 * Inherited from caller.
6ae4cfb5
AL		 3585 */
3586
1da177e4
LT		 3587static void ata_pio_data_xfer(struct ata_port *ap, unsigned char *buf,
3588 unsigned int buflen, int write_data)
3589{
6ae4cfb5 3590 unsigned int words = buflen >> 1;
1da177e4 3591
6ae4cfb5 3592 /* Transfer multiple of 2 bytes */
1da177e4 3593 if (write_data)
6ae4cfb5 3594 outsw(ap->ioaddr.data_addr, buf, words);
1da177e4 3595 else
6ae4cfb5
AL		 3596 insw(ap->ioaddr.data_addr, buf, words);
3597
3598 /* Transfer trailing 1 byte, if any. */
3599 if (unlikely(buflen & 0x01)) {
3600 u16 align_buf[1] = { 0 };
3601 unsigned char *trailing_buf = buf + buflen - 1;
3602
3603 if (write_data) {
3604 memcpy(align_buf, trailing_buf, 1);
3605 outw(le16_to_cpu(align_buf[0]), ap->ioaddr.data_addr);
3606 } else {
3607 align_buf[0] = cpu_to_le16(inw(ap->ioaddr.data_addr));
3608 memcpy(trailing_buf, align_buf, 1);
3609 }
3610 }
1da177e4
LT		 3611}
3612
6ae4cfb5
AL		 3613/**
3614 * ata_data_xfer - Transfer data from/to the data register.
3615 * @ap: port to read/write
3616 * @buf: data buffer
3617 * @buflen: buffer length
3618 * @do_write: read/write
3619 *
3620 * Transfer data from/to the device data register.
3621 *
3622 * LOCKING:
3623 * Inherited from caller.
6ae4cfb5
AL		 3624 */
3625
1da177e4
LT		 3626static void ata_data_xfer(struct ata_port *ap, unsigned char *buf,
3627 unsigned int buflen, int do_write)
3628{
a1bd9e68
AC		 3629 /* Make the crap hardware pay the costs not the good stuff */
3630 if (unlikely(ap->flags & ATA_FLAG_IRQ_MASK)) {
3631 unsigned long flags;
3632 local_irq_save(flags);
3633 if (ap->flags & ATA_FLAG_MMIO)
3634 ata_mmio_data_xfer(ap, buf, buflen, do_write);
3635 else
3636 ata_pio_data_xfer(ap, buf, buflen, do_write);
3637 local_irq_restore(flags);
3638 } else {
3639 if (ap->flags & ATA_FLAG_MMIO)
3640 ata_mmio_data_xfer(ap, buf, buflen, do_write);
3641 else
3642 ata_pio_data_xfer(ap, buf, buflen, do_write);
3643 }
1da177e4
LT		 3644}
3645
6ae4cfb5
AL		 3646/**
3647 * ata_pio_sector - Transfer ATA_SECT_SIZE (512 bytes) of data.
3648 * @qc: Command on going
3649 *
3650 * Transfer ATA_SECT_SIZE of data from/to the ATA device.
3651 *
3652 * LOCKING:
3653 * Inherited from caller.
3654 */
3655
1da177e4
LT		 3656static void ata_pio_sector(struct ata_queued_cmd *qc)
3657{
3658 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
cedc9a47 3659 struct scatterlist *sg = qc->__sg;
1da177e4
LT		 3660 struct ata_port *ap = qc->ap;
3661 struct page *page;
3662 unsigned int offset;
3663 unsigned char *buf;
3664
3665 if (qc->cursect == (qc->nsect - 1))
14be71f4 3666 ap->hsm_task_state = HSM_ST_LAST;
1da177e4
LT		 3667
3668 page = sg[qc->cursg].page;
3669 offset = sg[qc->cursg].offset + qc->cursg_ofs * ATA_SECT_SIZE;
3670
3671 /* get the current page and offset */
3672 page = nth_page(page, (offset >> PAGE_SHIFT));
3673 offset %= PAGE_SIZE;
3674
3675 buf = kmap(page) + offset;
3676
3677 qc->cursect++;
3678 qc->cursg_ofs++;
3679
32529e01 3680 if ((qc->cursg_ofs * ATA_SECT_SIZE) == (&sg[qc->cursg])->length) {
1da177e4
LT		 3681 qc->cursg++;
3682 qc->cursg_ofs = 0;
3683 }
3684
3685 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
3686
3687 /* do the actual data transfer */
3688 do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
3689 ata_data_xfer(ap, buf, ATA_SECT_SIZE, do_write);
3690
3691 kunmap(page);
3692}
3693
6ae4cfb5
AL		 3694/**
3695 * __atapi_pio_bytes - Transfer data from/to the ATAPI device.
3696 * @qc: Command on going
3697 * @bytes: number of bytes
3698 *
3699 * Transfer Transfer data from/to the ATAPI device.
3700 *
3701 * LOCKING:
3702 * Inherited from caller.
3703 *
3704 */
3705
1da177e4
LT		 3706static void __atapi_pio_bytes(struct ata_queued_cmd *qc, unsigned int bytes)
3707{
3708 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
cedc9a47 3709 struct scatterlist *sg = qc->__sg;
1da177e4
LT		 3710 struct ata_port *ap = qc->ap;
3711 struct page *page;
3712 unsigned char *buf;
3713 unsigned int offset, count;
3714
563a6e1f 3715 if (qc->curbytes + bytes >= qc->nbytes)
14be71f4 3716 ap->hsm_task_state = HSM_ST_LAST;
1da177e4
LT		 3717
3718next_sg:
563a6e1f 3719 if (unlikely(qc->cursg >= qc->n_elem)) {
7fb6ec28 3720 /*
563a6e1f
AL		 3721 * The end of qc->sg is reached and the device expects
3722 * more data to transfer. In order not to overrun qc->sg
3723 * and fulfill length specified in the byte count register,
3724 * - for read case, discard trailing data from the device
3725 * - for write case, padding zero data to the device
3726 */
3727 u16 pad_buf[1] = { 0 };
3728 unsigned int words = bytes >> 1;
3729 unsigned int i;
3730
3731 if (words) /* warning if bytes > 1 */
7fb6ec28 3732 printk(KERN_WARNING "ata%u: %u bytes trailing data\n",
563a6e1f
AL		 3733 ap->id, bytes);
3734
3735 for (i = 0; i < words; i++)
3736 ata_data_xfer(ap, (unsigned char*)pad_buf, 2, do_write);
3737
14be71f4 3738 ap->hsm_task_state = HSM_ST_LAST;
563a6e1f
AL		 3739 return;
3740 }
3741
cedc9a47 3742 sg = &qc->__sg[qc->cursg];
1da177e4 3743
1da177e4
LT		 3744 page = sg->page;
3745 offset = sg->offset + qc->cursg_ofs;
3746
3747 /* get the current page and offset */
3748 page = nth_page(page, (offset >> PAGE_SHIFT));
3749 offset %= PAGE_SIZE;
3750
6952df03 3751 /* don't overrun current sg */
32529e01 3752 count = min(sg->length - qc->cursg_ofs, bytes);
1da177e4
LT		 3753
3754 /* don't cross page boundaries */
3755 count = min(count, (unsigned int)PAGE_SIZE - offset);
3756
3757 buf = kmap(page) + offset;
3758
3759 bytes -= count;
3760 qc->curbytes += count;
3761 qc->cursg_ofs += count;
3762
32529e01 3763 if (qc->cursg_ofs == sg->length) {
1da177e4
LT		 3764 qc->cursg++;
3765 qc->cursg_ofs = 0;
3766 }
3767
3768 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
3769
3770 /* do the actual data transfer */
3771 ata_data_xfer(ap, buf, count, do_write);
3772
3773 kunmap(page);
3774
563a6e1f 3775 if (bytes)
1da177e4 3776 goto next_sg;
1da177e4
LT		 3777}
3778
6ae4cfb5
AL		 3779/**
3780 * atapi_pio_bytes - Transfer data from/to the ATAPI device.
3781 * @qc: Command on going
3782 *
3783 * Transfer Transfer data from/to the ATAPI device.
3784 *
3785 * LOCKING:
3786 * Inherited from caller.
6ae4cfb5
AL		 3787 */
3788
1da177e4
LT		 3789static void atapi_pio_bytes(struct ata_queued_cmd *qc)
3790{
3791 struct ata_port *ap = qc->ap;
3792 struct ata_device *dev = qc->dev;
3793 unsigned int ireason, bc_lo, bc_hi, bytes;
3794 int i_write, do_write = (qc->tf.flags & ATA_TFLAG_WRITE) ? 1 : 0;
3795
3796 ap->ops->tf_read(ap, &qc->tf);
3797 ireason = qc->tf.nsect;
3798 bc_lo = qc->tf.lbam;
3799 bc_hi = qc->tf.lbah;
3800 bytes = (bc_hi << 8) | bc_lo;
3801
3802 /* shall be cleared to zero, indicating xfer of data */
3803 if (ireason & (1 << 0))
3804 goto err_out;
3805
3806 /* make sure transfer direction matches expected */
3807 i_write = ((ireason & (1 << 1)) == 0) ? 1 : 0;
3808 if (do_write != i_write)
3809 goto err_out;
3810
3811 __atapi_pio_bytes(qc, bytes);
3812
3813 return;
3814
3815err_out:
3816 printk(KERN_INFO "ata%u: dev %u: ATAPI check failed\n",
3817 ap->id, dev->devno);
11a56d24 3818 qc->err_mask |= AC_ERR_HSM;
14be71f4 3819 ap->hsm_task_state = HSM_ST_ERR;
1da177e4
LT		 3820}
3821
3822/**
6f0ef4fa 3823 * ata_pio_block - start PIO on a block
c91af2c8 3824 * @qc: qc to transfer block for
1da177e4
LT		 3825 *
3826 * LOCKING:
0cba632b 3827 * None. (executing in kernel thread context)
1da177e4 3828 */
c91af2c8 3829static void ata_pio_block(struct ata_queued_cmd *qc)
1da177e4 3830{
c91af2c8 3831 struct ata_port *ap = qc->ap;
1da177e4
LT		 3832 u8 status;
3833
3834 /*
6f0ef4fa 3835 * This is purely heuristic. This is a fast path.
1da177e4
LT		 3836 * Sometimes when we enter, BSY will be cleared in
3837 * a chk-status or two. If not, the drive is probably seeking
3838 * or something. Snooze for a couple msecs, then
3839 * chk-status again. If still busy, fall back to
14be71f4 3840 * HSM_ST_POLL state.
1da177e4
LT		 3841 */
3842 status = ata_busy_wait(ap, ATA_BUSY, 5);
3843 if (status & ATA_BUSY) {
3844 msleep(2);
3845 status = ata_busy_wait(ap, ATA_BUSY, 10);
3846 if (status & ATA_BUSY) {
14be71f4 3847 ap->hsm_task_state = HSM_ST_POLL;
1da177e4
LT		 3848 ap->pio_task_timeout = jiffies + ATA_TMOUT_PIO;
3849 return;
3850 }
3851 }
3852
fe79e683
AL		 3853 /* check error */
3854 if (status & (ATA_ERR | ATA_DF)) {
3855 qc->err_mask |= AC_ERR_DEV;
3856 ap->hsm_task_state = HSM_ST_ERR;
3857 return;
3858 }
3859
3860 /* transfer data if any */
1da177e4 3861 if (is_atapi_taskfile(&qc->tf)) {
fe79e683 3862 /* DRQ=0 means no more data to transfer */
1da177e4 3863 if ((status & ATA_DRQ) == 0) {
14be71f4 3864 ap->hsm_task_state = HSM_ST_LAST;
1da177e4
LT		 3865 return;
3866 }
3867
3868 atapi_pio_bytes(qc);
3869 } else {
3870 /* handle BSY=0, DRQ=0 as error */
3871 if ((status & ATA_DRQ) == 0) {
11a56d24 3872 qc->err_mask |= AC_ERR_HSM;
14be71f4 3873 ap->hsm_task_state = HSM_ST_ERR;
1da177e4
LT		 3874 return;
3875 }
3876
3877 ata_pio_sector(qc);
3878 }
3879}
3880
c91af2c8 3881static void ata_pio_error(struct ata_queued_cmd *qc)
1da177e4 3882{
c91af2c8 3883 struct ata_port *ap = qc->ap;
1da177e4 3884
0565c26d 3885 if (qc->tf.command != ATA_CMD_PACKET)
d63cb4a6
TH		 3886 printk(KERN_WARNING "ata%u: dev %u PIO error\n",
3887 ap->id, qc->dev->devno);
0565c26d 3888
2e9edbf8 3889 /* make sure qc->err_mask is available to
1c848984
AL		 3890 * know what's wrong and recover
3891 */
a4631474 3892 WARN_ON(qc->err_mask == 0);
1c848984 3893
14be71f4 3894 ap->hsm_task_state = HSM_ST_IDLE;
1da177e4 3895
a22e2eb0 3896 ata_poll_qc_complete(qc);
1da177e4
LT		 3897}
3898
3899static void ata_pio_task(void *_data)
3900{
c91af2c8
TH		 3901 struct ata_queued_cmd *qc = _data;
3902 struct ata_port *ap = qc->ap;
7fb6ec28
JG		 3903 unsigned long timeout;
3904 int qc_completed;
3905
3906fsm_start:
3907 timeout = 0;
3908 qc_completed = 0;
1da177e4 3909
14be71f4
AL		 3910 switch (ap->hsm_task_state) {
3911 case HSM_ST_IDLE:
1da177e4
LT		 3912 return;
3913
14be71f4 3914 case HSM_ST:
c91af2c8 3915 ata_pio_block(qc);
1da177e4
LT		 3916 break;
3917
14be71f4 3918 case HSM_ST_LAST:
c91af2c8 3919 qc_completed = ata_pio_complete(qc);
1da177e4
LT		 3920 break;
3921
14be71f4
AL		 3922 case HSM_ST_POLL:
3923 case HSM_ST_LAST_POLL:
c91af2c8 3924 timeout = ata_pio_poll(qc);
1da177e4
LT		 3925 break;
3926
14be71f4
AL		 3927 case HSM_ST_TMOUT:
3928 case HSM_ST_ERR:
c91af2c8 3929 ata_pio_error(qc);
1da177e4
LT		 3930 return;
3931 }
3932
3933 if (timeout)
c91af2c8 3934 ata_port_queue_task(ap, ata_pio_task, qc, timeout);
7fb6ec28
JG		 3935 else if (!qc_completed)
3936 goto fsm_start;
1da177e4
LT		 3937}
3938
8061f5f0
TH		 3939/**
3940 * atapi_packet_task - Write CDB bytes to hardware
c91af2c8 3941 * @_data: qc in progress
8061f5f0
TH		 3942 *
3943 * When device has indicated its readiness to accept
3944 * a CDB, this function is called. Send the CDB.
3945 * If DMA is to be performed, exit immediately.
3946 * Otherwise, we are in polling mode, so poll
3947 * status under operation succeeds or fails.
3948 *
3949 * LOCKING:
3950 * Kernel thread context (may sleep)
3951 */
8061f5f0
TH		 3952static void atapi_packet_task(void *_data)
3953{
c91af2c8
TH		 3954 struct ata_queued_cmd *qc = _data;
3955 struct ata_port *ap = qc->ap;
8061f5f0
TH		 3956 u8 status;
3957
8061f5f0
TH		 3958 /* sleep-wait for BSY to clear */
3959 DPRINTK("busy wait\n");
3960 if (ata_busy_sleep(ap, ATA_TMOUT_CDB_QUICK, ATA_TMOUT_CDB)) {
3961 qc->err_mask |= AC_ERR_TIMEOUT;
3962 goto err_out;
3963 }
3964
3965 /* make sure DRQ is set */
3966 status = ata_chk_status(ap);
3967 if ((status & (ATA_BUSY | ATA_DRQ)) != ATA_DRQ) {
3968 qc->err_mask |= AC_ERR_HSM;
3969 goto err_out;
3970 }
3971
3972 /* send SCSI cdb */
3973 DPRINTK("send cdb\n");
3974 WARN_ON(qc->dev->cdb_len < 12);
3975
3976 if (qc->tf.protocol == ATA_PROT_ATAPI_DMA ||
3977 qc->tf.protocol == ATA_PROT_ATAPI_NODATA) {
3978 unsigned long flags;
3979
3980 /* Once we're done issuing command and kicking bmdma,
3981 * irq handler takes over. To not lose irq, we need
3982 * to clear NOINTR flag before sending cdb, but
3983 * interrupt handler shouldn't be invoked before we're
3984 * finished. Hence, the following locking.
3985 */
3986 spin_lock_irqsave(&ap->host_set->lock, flags);
3987 ap->flags &= ~ATA_FLAG_NOINTR;
3988 ata_data_xfer(ap, qc->cdb, qc->dev->cdb_len, 1);
3989 if (qc->tf.protocol == ATA_PROT_ATAPI_DMA)
3990 ap->ops->bmdma_start(qc); /* initiate bmdma */
3991 spin_unlock_irqrestore(&ap->host_set->lock, flags);
3992 } else {
3993 ata_data_xfer(ap, qc->cdb, qc->dev->cdb_len, 1);
3994
3995 /* PIO commands are handled by polling */
3996 ap->hsm_task_state = HSM_ST;
c91af2c8 3997 ata_port_queue_task(ap, ata_pio_task, qc, 0);
8061f5f0
TH		 3998 }
3999
4000 return;
4001
4002err_out:
4003 ata_poll_qc_complete(qc);
4004}
4005
1da177e4
LT		 4006/**
4007 * ata_qc_new - Request an available ATA command, for queueing
4008 * @ap: Port associated with device @dev
4009 * @dev: Device from whom we request an available command structure
4010 *
4011 * LOCKING:
0cba632b 4012 * None.
1da177e4
LT		 4013 */
4014
4015static struct ata_queued_cmd *ata_qc_new(struct ata_port *ap)
4016{
4017 struct ata_queued_cmd *qc = NULL;
4018 unsigned int i;
4019
4020 for (i = 0; i < ATA_MAX_QUEUE; i++)
4021 if (!test_and_set_bit(i, &ap->qactive)) {
4022 qc = ata_qc_from_tag(ap, i);
4023 break;
4024 }
4025
4026 if (qc)
4027 qc->tag = i;
4028
4029 return qc;
4030}
4031
4032/**
4033 * ata_qc_new_init - Request an available ATA command, and initialize it
4034 * @ap: Port associated with device @dev
4035 * @dev: Device from whom we request an available command structure
4036 *
4037 * LOCKING:
0cba632b 4038 * None.
1da177e4
LT		 4039 */
4040
4041struct ata_queued_cmd *ata_qc_new_init(struct ata_port *ap,
4042 struct ata_device *dev)
4043{
4044 struct ata_queued_cmd *qc;
4045
4046 qc = ata_qc_new(ap);
4047 if (qc) {
1da177e4
LT		 4048 qc->scsicmd = NULL;
4049 qc->ap = ap;
4050 qc->dev = dev;
1da177e4 4051
2c13b7ce 4052 ata_qc_reinit(qc);
1da177e4
LT		 4053 }
4054
4055 return qc;
4056}
4057
1da177e4
LT		 4058/**
4059 * ata_qc_free - free unused ata_queued_cmd
4060 * @qc: Command to complete
4061 *
4062 * Designed to free unused ata_queued_cmd object
4063 * in case something prevents using it.
4064 *
4065 * LOCKING:
0cba632b 4066 * spin_lock_irqsave(host_set lock)
1da177e4
LT		 4067 */
4068void ata_qc_free(struct ata_queued_cmd *qc)
4069{
4ba946e9
TH		 4070 struct ata_port *ap = qc->ap;
4071 unsigned int tag;
4072
a4631474 4073 WARN_ON(qc == NULL); /* ata_qc_from_tag _might_ return NULL */
1da177e4 4074
4ba946e9
TH		 4075 qc->flags = 0;
4076 tag = qc->tag;
4077 if (likely(ata_tag_valid(tag))) {
4ba946e9
TH		 4078 qc->tag = ATA_TAG_POISON;
4079 clear_bit(tag, &ap->qactive);
4080 }
1da177e4
LT		 4081}
4082
76014427 4083void __ata_qc_complete(struct ata_queued_cmd *qc)
1da177e4 4084{
a4631474
TH		 4085 WARN_ON(qc == NULL); /* ata_qc_from_tag _might_ return NULL */
4086 WARN_ON(!(qc->flags & ATA_QCFLAG_ACTIVE));
1da177e4
LT		 4087
4088 if (likely(qc->flags & ATA_QCFLAG_DMAMAP))
4089 ata_sg_clean(qc);
4090
7401abf2
TH		 4091 /* command should be marked inactive atomically with qc completion */
4092 qc->ap->active_tag = ATA_TAG_POISON;
4093
3f3791d3
AL		 4094 /* atapi: mark qc as inactive to prevent the interrupt handler
4095 * from completing the command twice later, before the error handler
4096 * is called. (when rc != 0 and atapi request sense is needed)
4097 */
4098 qc->flags &= ~ATA_QCFLAG_ACTIVE;
4099
1da177e4 4100 /* call completion callback */
77853bf2 4101 qc->complete_fn(qc);
1da177e4
LT		 4102}
4103
4104static inline int ata_should_dma_map(struct ata_queued_cmd *qc)
4105{
4106 struct ata_port *ap = qc->ap;
4107
4108 switch (qc->tf.protocol) {
4109 case ATA_PROT_DMA:
4110 case ATA_PROT_ATAPI_DMA:
4111 return 1;
4112
4113 case ATA_PROT_ATAPI:
4114 case ATA_PROT_PIO:
1da177e4
LT		 4115 if (ap->flags & ATA_FLAG_PIO_DMA)
4116 return 1;
4117
4118 /* fall through */
4119
4120 default:
4121 return 0;
4122 }
4123
4124 /* never reached */
4125}
4126
4127/**
4128 * ata_qc_issue - issue taskfile to device
4129 * @qc: command to issue to device
4130 *
4131 * Prepare an ATA command to submission to device.
4132 * This includes mapping the data into a DMA-able
4133 * area, filling in the S/G table, and finally
4134 * writing the taskfile to hardware, starting the command.
4135 *
4136 * LOCKING:
4137 * spin_lock_irqsave(host_set lock)
1da177e4 4138 */
8e0e694a 4139void ata_qc_issue(struct ata_queued_cmd *qc)
1da177e4
LT		 4140{
4141 struct ata_port *ap = qc->ap;
4142
e4a70e76
TH		 4143 qc->ap->active_tag = qc->tag;
4144 qc->flags |= ATA_QCFLAG_ACTIVE;
4145
1da177e4
LT		 4146 if (ata_should_dma_map(qc)) {
4147 if (qc->flags & ATA_QCFLAG_SG) {
4148 if (ata_sg_setup(qc))
8e436af9 4149 goto sg_err;
1da177e4
LT		 4150 } else if (qc->flags & ATA_QCFLAG_SINGLE) {
4151 if (ata_sg_setup_one(qc))
8e436af9 4152 goto sg_err;
1da177e4
LT		 4153 }
4154 } else {
4155 qc->flags &= ~ATA_QCFLAG_DMAMAP;
4156 }
4157
4158 ap->ops->qc_prep(qc);
4159
8e0e694a
TH		 4160 qc->err_mask |= ap->ops->qc_issue(qc);
4161 if (unlikely(qc->err_mask))
4162 goto err;
4163 return;
1da177e4 4164
8e436af9
TH		 4165sg_err:
4166 qc->flags &= ~ATA_QCFLAG_DMAMAP;
8e0e694a
TH		 4167 qc->err_mask |= AC_ERR_SYSTEM;
4168err:
4169 ata_qc_complete(qc);
1da177e4
LT		 4170}
4171
4172/**
4173 * ata_qc_issue_prot - issue taskfile to device in proto-dependent manner
4174 * @qc: command to issue to device
4175 *
4176 * Using various libata functions and hooks, this function
4177 * starts an ATA command. ATA commands are grouped into
4178 * classes called "protocols", and issuing each type of protocol
4179 * is slightly different.
4180 *
0baab86b
EF		 4181 * May be used as the qc_issue() entry in ata_port_operations.
4182 *
1da177e4
LT		 4183 * LOCKING:
4184 * spin_lock_irqsave(host_set lock)
4185 *
4186 * RETURNS:
9a3d9eb0 4187 * Zero on success, AC_ERR_* mask on failure
1da177e4
LT		 4188 */
4189
9a3d9eb0 4190unsigned int ata_qc_issue_prot(struct ata_queued_cmd *qc)
1da177e4
LT		 4191{
4192 struct ata_port *ap = qc->ap;
4193
4194 ata_dev_select(ap, qc->dev->devno, 1, 0);
4195
4196 switch (qc->tf.protocol) {
4197 case ATA_PROT_NODATA:
e5338254 4198 ata_tf_to_host(ap, &qc->tf);
1da177e4
LT		 4199 break;
4200
4201 case ATA_PROT_DMA:
4202 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
4203 ap->ops->bmdma_setup(qc); /* set up bmdma */
4204 ap->ops->bmdma_start(qc); /* initiate bmdma */
4205 break;
4206
4207 case ATA_PROT_PIO: /* load tf registers, initiate polling pio */
4208 ata_qc_set_polling(qc);
e5338254 4209 ata_tf_to_host(ap, &qc->tf);
14be71f4 4210 ap->hsm_task_state = HSM_ST;
c91af2c8 4211 ata_port_queue_task(ap, ata_pio_task, qc, 0);
1da177e4
LT		 4212 break;
4213
4214 case ATA_PROT_ATAPI:
4215 ata_qc_set_polling(qc);
e5338254 4216 ata_tf_to_host(ap, &qc->tf);
c91af2c8 4217 ata_port_queue_task(ap, atapi_packet_task, qc, 0);
1da177e4
LT		 4218 break;
4219
4220 case ATA_PROT_ATAPI_NODATA:
c1389503 4221 ap->flags |= ATA_FLAG_NOINTR;
e5338254 4222 ata_tf_to_host(ap, &qc->tf);
c91af2c8 4223 ata_port_queue_task(ap, atapi_packet_task, qc, 0);
1da177e4
LT		 4224 break;
4225
4226 case ATA_PROT_ATAPI_DMA:
c1389503 4227 ap->flags |= ATA_FLAG_NOINTR;
1da177e4
LT		 4228 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
4229 ap->ops->bmdma_setup(qc); /* set up bmdma */
c91af2c8 4230 ata_port_queue_task(ap, atapi_packet_task, qc, 0);
1da177e4
LT		 4231 break;
4232
4233 default:
4234 WARN_ON(1);
9a3d9eb0 4235 return AC_ERR_SYSTEM;
1da177e4
LT		 4236 }
4237
4238 return 0;
4239}
4240
1da177e4
LT		 4241/**
4242 * ata_host_intr - Handle host interrupt for given (port, task)
4243 * @ap: Port on which interrupt arrived (possibly...)
4244 * @qc: Taskfile currently active in engine
4245 *
4246 * Handle host interrupt for given queued command. Currently,
4247 * only DMA interrupts are handled. All other commands are
4248 * handled via polling with interrupts disabled (nIEN bit).
4249 *
4250 * LOCKING:
4251 * spin_lock_irqsave(host_set lock)
4252 *
4253 * RETURNS:
4254 * One if interrupt was handled, zero if not (shared irq).
4255 */
4256
4257inline unsigned int ata_host_intr (struct ata_port *ap,
4258 struct ata_queued_cmd *qc)
4259{
4260 u8 status, host_stat;
4261
4262 switch (qc->tf.protocol) {
4263
4264 case ATA_PROT_DMA:
4265 case ATA_PROT_ATAPI_DMA:
4266 case ATA_PROT_ATAPI:
4267 /* check status of DMA engine */
4268 host_stat = ap->ops->bmdma_status(ap);
4269 VPRINTK("ata%u: host_stat 0x%X\n", ap->id, host_stat);
4270
4271 /* if it's not our irq... */
4272 if (!(host_stat & ATA_DMA_INTR))
4273 goto idle_irq;
4274
4275 /* before we do anything else, clear DMA-Start bit */
b73fc89f 4276 ap->ops->bmdma_stop(qc);
1da177e4
LT		 4277
4278 /* fall through */
4279
4280 case ATA_PROT_ATAPI_NODATA:
4281 case ATA_PROT_NODATA:
4282 /* check altstatus */
4283 status = ata_altstatus(ap);
4284 if (status & ATA_BUSY)
4285 goto idle_irq;
4286
4287 /* check main status, clearing INTRQ */
4288 status = ata_chk_status(ap);
4289 if (unlikely(status & ATA_BUSY))
4290 goto idle_irq;
4291 DPRINTK("ata%u: protocol %d (dev_stat 0x%X)\n",
4292 ap->id, qc->tf.protocol, status);
4293
4294 /* ack bmdma irq events */
4295 ap->ops->irq_clear(ap);
4296
4297 /* complete taskfile transaction */
a22e2eb0
AL		 4298 qc->err_mask |= ac_err_mask(status);
4299 ata_qc_complete(qc);
1da177e4
LT		 4300 break;
4301
4302 default:
4303 goto idle_irq;
4304 }
4305
4306 return 1; /* irq handled */
4307
4308idle_irq:
4309 ap->stats.idle_irq++;
4310
4311#ifdef ATA_IRQ_TRAP
4312 if ((ap->stats.idle_irq % 1000) == 0) {
1da177e4
LT		 4313 ata_irq_ack(ap, 0); /* debug trap */
4314 printk(KERN_WARNING "ata%d: irq trap\n", ap->id);
23cfce89 4315 return 1;
1da177e4
LT		 4316 }
4317#endif
4318 return 0; /* irq not handled */
4319}
4320
4321/**
4322 * ata_interrupt - Default ATA host interrupt handler
0cba632b
JG		 4323 * @irq: irq line (unused)
4324 * @dev_instance: pointer to our ata_host_set information structure
1da177e4
LT		 4325 * @regs: unused
4326 *
0cba632b
JG		 4327 * Default interrupt handler for PCI IDE devices. Calls
4328 * ata_host_intr() for each port that is not disabled.
4329 *
1da177e4 4330 * LOCKING:
0cba632b 4331 * Obtains host_set lock during operation.
1da177e4
LT		 4332 *
4333 * RETURNS:
0cba632b 4334 * IRQ_NONE or IRQ_HANDLED.
1da177e4
LT		 4335 */
4336
4337irqreturn_t ata_interrupt (int irq, void *dev_instance, struct pt_regs *regs)
4338{
4339 struct ata_host_set *host_set = dev_instance;
4340 unsigned int i;
4341 unsigned int handled = 0;
4342 unsigned long flags;
4343
4344 /* TODO: make _irqsave conditional on x86 PCI IDE legacy mode */
4345 spin_lock_irqsave(&host_set->lock, flags);
4346
4347 for (i = 0; i < host_set->n_ports; i++) {
4348 struct ata_port *ap;
4349
4350 ap = host_set->ports[i];
c1389503 4351 if (ap &&
198e0fed 4352 !(ap->flags & (ATA_FLAG_DISABLED | ATA_FLAG_NOINTR))) {
1da177e4
LT		 4353 struct ata_queued_cmd *qc;
4354
4355 qc = ata_qc_from_tag(ap, ap->active_tag);
21b1ed74
AL		 4356 if (qc && (!(qc->tf.ctl & ATA_NIEN)) &&
4357 (qc->flags & ATA_QCFLAG_ACTIVE))
1da177e4
LT		 4358 handled |= ata_host_intr(ap, qc);
4359 }
4360 }
4361
4362 spin_unlock_irqrestore(&host_set->lock, flags);
4363
4364 return IRQ_RETVAL(handled);
4365}
4366
0baab86b 4367
9b847548
JA		 4368/*
4369 * Execute a 'simple' command, that only consists of the opcode 'cmd' itself,
4370 * without filling any other registers
4371 */
4372static int ata_do_simple_cmd(struct ata_port *ap, struct ata_device *dev,
4373 u8 cmd)
4374{
4375 struct ata_taskfile tf;
4376 int err;
4377
4378 ata_tf_init(ap, &tf, dev->devno);
4379
4380 tf.command = cmd;
4381 tf.flags |= ATA_TFLAG_DEVICE;
4382 tf.protocol = ATA_PROT_NODATA;
4383
d69cf37d 4384 err = ata_exec_internal(ap, dev, &tf, NULL, DMA_NONE, NULL, 0);
9b847548
JA		 4385 if (err)
4386 printk(KERN_ERR "%s: ata command failed: %d\n",
4387 __FUNCTION__, err);
4388
4389 return err;
4390}
4391
4392static int ata_flush_cache(struct ata_port *ap, struct ata_device *dev)
4393{
4394 u8 cmd;
4395
4396 if (!ata_try_flush_cache(dev))
4397 return 0;
4398
4399 if (ata_id_has_flush_ext(dev->id))
4400 cmd = ATA_CMD_FLUSH_EXT;
4401 else
4402 cmd = ATA_CMD_FLUSH;
4403
4404 return ata_do_simple_cmd(ap, dev, cmd);
4405}
4406
4407static int ata_standby_drive(struct ata_port *ap, struct ata_device *dev)
4408{
4409 return ata_do_simple_cmd(ap, dev, ATA_CMD_STANDBYNOW1);
4410}
4411
4412static int ata_start_drive(struct ata_port *ap, struct ata_device *dev)
4413{
4414 return ata_do_simple_cmd(ap, dev, ATA_CMD_IDLEIMMEDIATE);
4415}
4416
4417/**
4418 * ata_device_resume - wakeup a previously suspended devices
c893a3ae
RD		 4419 * @ap: port the device is connected to
4420 * @dev: the device to resume
9b847548
JA		 4421 *
4422 * Kick the drive back into action, by sending it an idle immediate
4423 * command and making sure its transfer mode matches between drive
4424 * and host.
4425 *
4426 */
4427int ata_device_resume(struct ata_port *ap, struct ata_device *dev)
4428{
4429 if (ap->flags & ATA_FLAG_SUSPENDED) {
e82cbdb9 4430 struct ata_device *failed_dev;
9b847548 4431 ap->flags &= ~ATA_FLAG_SUSPENDED;
e82cbdb9
TH		 4432 while (ata_set_mode(ap, &failed_dev))
4433 ata_dev_disable(ap, failed_dev);
9b847548 4434 }
e1211e3f 4435 if (!ata_dev_enabled(dev))
9b847548
JA		 4436 return 0;
4437 if (dev->class == ATA_DEV_ATA)
4438 ata_start_drive(ap, dev);
4439
4440 return 0;
4441}
4442
4443/**
4444 * ata_device_suspend - prepare a device for suspend
c893a3ae
RD		 4445 * @ap: port the device is connected to
4446 * @dev: the device to suspend
9b847548
JA		 4447 *
4448 * Flush the cache on the drive, if appropriate, then issue a
4449 * standbynow command.
9b847548 4450 */
082776e4 4451int ata_device_suspend(struct ata_port *ap, struct ata_device *dev, pm_message_t state)
9b847548 4452{
e1211e3f 4453 if (!ata_dev_enabled(dev))
9b847548
JA		 4454 return 0;
4455 if (dev->class == ATA_DEV_ATA)
4456 ata_flush_cache(ap, dev);
4457
082776e4
NC		 4458 if (state.event != PM_EVENT_FREEZE)
4459 ata_standby_drive(ap, dev);
9b847548
JA		 4460 ap->flags |= ATA_FLAG_SUSPENDED;
4461 return 0;
4462}
4463
c893a3ae
RD		 4464/**
4465 * ata_port_start - Set port up for dma.
4466 * @ap: Port to initialize
4467 *
4468 * Called just after data structures for each port are
4469 * initialized. Allocates space for PRD table.
4470 *
4471 * May be used as the port_start() entry in ata_port_operations.
4472 *
4473 * LOCKING:
4474 * Inherited from caller.
4475 */
4476
1da177e4
LT		 4477int ata_port_start (struct ata_port *ap)
4478{
2f1f610b 4479 struct device *dev = ap->dev;
6037d6bb 4480 int rc;
1da177e4
LT		 4481
4482 ap->prd = dma_alloc_coherent(dev, ATA_PRD_TBL_SZ, &ap->prd_dma, GFP_KERNEL);
4483 if (!ap->prd)
4484 return -ENOMEM;
4485
6037d6bb
JG		 4486 rc = ata_pad_alloc(ap, dev);
4487 if (rc) {
cedc9a47 4488 dma_free_coherent(dev, ATA_PRD_TBL_SZ, ap->prd, ap->prd_dma);
6037d6bb 4489 return rc;
cedc9a47
JG		 4490 }
4491
1da177e4
LT		 4492 DPRINTK("prd alloc, virt %p, dma %llx\n", ap->prd, (unsigned long long) ap->prd_dma);
4493
4494 return 0;
4495}
4496
0baab86b
EF		 4497
4498/**
4499 * ata_port_stop - Undo ata_port_start()
4500 * @ap: Port to shut down
4501 *
4502 * Frees the PRD table.
4503 *
4504 * May be used as the port_stop() entry in ata_port_operations.
4505 *
4506 * LOCKING:
6f0ef4fa 4507 * Inherited from caller.
0baab86b
EF		 4508 */
4509
1da177e4
LT		 4510void ata_port_stop (struct ata_port *ap)
4511{
2f1f610b 4512 struct device *dev = ap->dev;
1da177e4
LT		 4513
4514 dma_free_coherent(dev, ATA_PRD_TBL_SZ, ap->prd, ap->prd_dma);
6037d6bb 4515 ata_pad_free(ap, dev);
1da177e4
LT		 4516}
4517
aa8f0dc6
JG		 4518void ata_host_stop (struct ata_host_set *host_set)
4519{
4520 if (host_set->mmio_base)
4521 iounmap(host_set->mmio_base);
4522}
4523
4524
1da177e4
LT		 4525/**
4526 * ata_host_remove - Unregister SCSI host structure with upper layers
4527 * @ap: Port to unregister
4528 * @do_unregister: 1 if we fully unregister, 0 to just stop the port
4529 *
4530 * LOCKING:
6f0ef4fa 4531 * Inherited from caller.
1da177e4
LT		 4532 */
4533
4534static void ata_host_remove(struct ata_port *ap, unsigned int do_unregister)
4535{
4536 struct Scsi_Host *sh = ap->host;
4537
4538 DPRINTK("ENTER\n");
4539
4540 if (do_unregister)
4541 scsi_remove_host(sh);
4542
4543 ap->ops->port_stop(ap);
4544}
4545
4546/**
4547 * ata_host_init - Initialize an ata_port structure
4548 * @ap: Structure to initialize
4549 * @host: associated SCSI mid-layer structure
4550 * @host_set: Collection of hosts to which @ap belongs
4551 * @ent: Probe information provided by low-level driver
4552 * @port_no: Port number associated with this ata_port
4553 *
0cba632b
JG		 4554 * Initialize a new ata_port structure, and its associated
4555 * scsi_host.
4556 *
1da177e4 4557 * LOCKING:
0cba632b 4558 * Inherited from caller.
1da177e4
LT		 4559 */
4560
4561static void ata_host_init(struct ata_port *ap, struct Scsi_Host *host,
4562 struct ata_host_set *host_set,
057ace5e 4563 const struct ata_probe_ent *ent, unsigned int port_no)
1da177e4
LT		 4564{
4565 unsigned int i;
4566
4567 host->max_id = 16;
4568 host->max_lun = 1;
4569 host->max_channel = 1;
4570 host->unique_id = ata_unique_id++;
4571 host->max_cmd_len = 12;
12413197 4572
198e0fed 4573 ap->flags = ATA_FLAG_DISABLED;
1da177e4
LT		 4574 ap->id = host->unique_id;
4575 ap->host = host;
4576 ap->ctl = ATA_DEVCTL_OBS;
4577 ap->host_set = host_set;
2f1f610b 4578 ap->dev = ent->dev;
1da177e4
LT		 4579 ap->port_no = port_no;
4580 ap->hard_port_no =
4581 ent->legacy_mode ? ent->hard_port_no : port_no;
4582 ap->pio_mask = ent->pio_mask;
4583 ap->mwdma_mask = ent->mwdma_mask;
4584 ap->udma_mask = ent->udma_mask;
4585 ap->flags |= ent->host_flags;
4586 ap->ops = ent->port_ops;
4587 ap->cbl = ATA_CBL_NONE;
1c3fae4d 4588 ap->sata_spd_limit = UINT_MAX;
1da177e4
LT		 4589 ap->active_tag = ATA_TAG_POISON;
4590 ap->last_ctl = 0xFF;
4591
86e45b6b 4592 INIT_WORK(&ap->port_task, NULL, NULL);
a72ec4ce 4593 INIT_LIST_HEAD(&ap->eh_done_q);
1da177e4 4594
acf356b1
TH		 4595 for (i = 0; i < ATA_MAX_DEVICES; i++) {
4596 struct ata_device *dev = &ap->device[i];
4597 dev->devno = i;
4598 dev->pio_mask = UINT_MAX;
4599 dev->mwdma_mask = UINT_MAX;
4600 dev->udma_mask = UINT_MAX;
4601 }
1da177e4
LT		 4602
4603#ifdef ATA_IRQ_TRAP
4604 ap->stats.unhandled_irq = 1;
4605 ap->stats.idle_irq = 1;
4606#endif
4607
4608 memcpy(&ap->ioaddr, &ent->port[port_no], sizeof(struct ata_ioports));
4609}
4610
4611/**
4612 * ata_host_add - Attach low-level ATA driver to system
4613 * @ent: Information provided by low-level driver
4614 * @host_set: Collections of ports to which we add
4615 * @port_no: Port number associated with this host
4616 *
0cba632b
JG		 4617 * Attach low-level ATA driver to system.
4618 *
1da177e4 4619 * LOCKING:
0cba632b 4620 * PCI/etc. bus probe sem.
1da177e4
LT		 4621 *
4622 * RETURNS:
0cba632b 4623 * New ata_port on success, for NULL on error.
1da177e4
LT		 4624 */
4625
057ace5e 4626static struct ata_port * ata_host_add(const struct ata_probe_ent *ent,
1da177e4
LT		 4627 struct ata_host_set *host_set,
4628 unsigned int port_no)
4629{
4630 struct Scsi_Host *host;
4631 struct ata_port *ap;
4632 int rc;
4633
4634 DPRINTK("ENTER\n");
aec5c3c1
TH		 4635
4636 if (!ent->port_ops->probe_reset &&
4637 !(ent->host_flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST))) {
4638 printk(KERN_ERR "ata%u: no reset mechanism available\n",
4639 port_no);
4640 return NULL;
4641 }
4642
1da177e4
LT		 4643 host = scsi_host_alloc(ent->sht, sizeof(struct ata_port));
4644 if (!host)
4645 return NULL;
4646
30afc84c
TH		 4647 host->transportt = &ata_scsi_transport_template;
4648
35bb94b1 4649 ap = ata_shost_to_port(host);
1da177e4
LT		 4650
4651 ata_host_init(ap, host, host_set, ent, port_no);
4652
4653 rc = ap->ops->port_start(ap);
4654 if (rc)
4655 goto err_out;
4656
4657 return ap;
4658
4659err_out:
4660 scsi_host_put(host);
4661 return NULL;
4662}
4663
4664/**
0cba632b
JG		 4665 * ata_device_add - Register hardware device with ATA and SCSI layers
4666 * @ent: Probe information describing hardware device to be registered
4667 *
4668 * This function processes the information provided in the probe
4669 * information struct @ent, allocates the necessary ATA and SCSI
4670 * host information structures, initializes them, and registers
4671 * everything with requisite kernel subsystems.
4672 *
4673 * This function requests irqs, probes the ATA bus, and probes
4674 * the SCSI bus.
1da177e4
LT		 4675 *
4676 * LOCKING:
0cba632b 4677 * PCI/etc. bus probe sem.
1da177e4
LT		 4678 *
4679 * RETURNS:
0cba632b 4680 * Number of ports registered. Zero on error (no ports registered).
1da177e4
LT		 4681 */
4682
057ace5e 4683int ata_device_add(const struct ata_probe_ent *ent)
1da177e4
LT		 4684{
4685 unsigned int count = 0, i;
4686 struct device *dev = ent->dev;
4687 struct ata_host_set *host_set;
4688
4689 DPRINTK("ENTER\n");
4690 /* alloc a container for our list of ATA ports (buses) */
57f3bda8 4691 host_set = kzalloc(sizeof(struct ata_host_set) +
1da177e4
LT		 4692 (ent->n_ports * sizeof(void *)), GFP_KERNEL);
4693 if (!host_set)
4694 return 0;
1da177e4
LT		 4695 spin_lock_init(&host_set->lock);
4696
4697 host_set->dev = dev;
4698 host_set->n_ports = ent->n_ports;
4699 host_set->irq = ent->irq;
4700 host_set->mmio_base = ent->mmio_base;
4701 host_set->private_data = ent->private_data;
4702 host_set->ops = ent->port_ops;
5444a6f4 4703 host_set->flags = ent->host_set_flags;
1da177e4
LT		 4704
4705 /* register each port bound to this device */
4706 for (i = 0; i < ent->n_ports; i++) {
4707 struct ata_port *ap;
4708 unsigned long xfer_mode_mask;
4709
4710 ap = ata_host_add(ent, host_set, i);
4711 if (!ap)
4712 goto err_out;
4713
4714 host_set->ports[i] = ap;
4715 xfer_mode_mask =(ap->udma_mask << ATA_SHIFT_UDMA) |
4716 (ap->mwdma_mask << ATA_SHIFT_MWDMA) |
4717 (ap->pio_mask << ATA_SHIFT_PIO);
4718
4719 /* print per-port info to dmesg */
4720 printk(KERN_INFO "ata%u: %cATA max %s cmd 0x%lX ctl 0x%lX "
4721 "bmdma 0x%lX irq %lu\n",
4722 ap->id,
4723 ap->flags & ATA_FLAG_SATA ? 'S' : 'P',
4724 ata_mode_string(xfer_mode_mask),
4725 ap->ioaddr.cmd_addr,
4726 ap->ioaddr.ctl_addr,
4727 ap->ioaddr.bmdma_addr,
4728 ent->irq);
4729
4730 ata_chk_status(ap);
4731 host_set->ops->irq_clear(ap);
4732 count++;
4733 }
4734
57f3bda8
RD		 4735 if (!count)
4736 goto err_free_ret;
1da177e4
LT		 4737
4738 /* obtain irq, that is shared between channels */
4739 if (request_irq(ent->irq, ent->port_ops->irq_handler, ent->irq_flags,
4740 DRV_NAME, host_set))
4741 goto err_out;
4742
4743 /* perform each probe synchronously */
4744 DPRINTK("probe begin\n");
4745 for (i = 0; i < count; i++) {
4746 struct ata_port *ap;
4747 int rc;
4748
4749 ap = host_set->ports[i];
4750
c893a3ae 4751 DPRINTK("ata%u: bus probe begin\n", ap->id);
1da177e4 4752 rc = ata_bus_probe(ap);
c893a3ae 4753 DPRINTK("ata%u: bus probe end\n", ap->id);
1da177e4
LT		 4754
4755 if (rc) {
4756 /* FIXME: do something useful here?
4757 * Current libata behavior will
4758 * tear down everything when
4759 * the module is removed
4760 * or the h/w is unplugged.
4761 */
4762 }
4763
4764 rc = scsi_add_host(ap->host, dev);
4765 if (rc) {
4766 printk(KERN_ERR "ata%u: scsi_add_host failed\n",
4767 ap->id);
4768 /* FIXME: do something useful here */
4769 /* FIXME: handle unconditional calls to
4770 * scsi_scan_host and ata_host_remove, below,
4771 * at the very least
4772 */
4773 }
4774 }
4775
4776 /* probes are done, now scan each port's disk(s) */
c893a3ae 4777 DPRINTK("host probe begin\n");
1da177e4
LT		 4778 for (i = 0; i < count; i++) {
4779 struct ata_port *ap = host_set->ports[i];
4780
644dd0cc 4781 ata_scsi_scan_host(ap);
1da177e4
LT		 4782 }
4783
4784 dev_set_drvdata(dev, host_set);
4785
4786 VPRINTK("EXIT, returning %u\n", ent->n_ports);
4787 return ent->n_ports; /* success */
4788
4789err_out:
4790 for (i = 0; i < count; i++) {
4791 ata_host_remove(host_set->ports[i], 1);
4792 scsi_host_put(host_set->ports[i]->host);
4793 }
57f3bda8 4794err_free_ret:
1da177e4
LT		 4795 kfree(host_set);
4796 VPRINTK("EXIT, returning 0\n");
4797 return 0;
4798}
4799
17b14451
AC		 4800/**
4801 * ata_host_set_remove - PCI layer callback for device removal
4802 * @host_set: ATA host set that was removed
4803 *
2e9edbf8 4804 * Unregister all objects associated with this host set. Free those
17b14451
AC		 4805 * objects.
4806 *
4807 * LOCKING:
4808 * Inherited from calling layer (may sleep).
4809 */
4810
17b14451
AC		 4811void ata_host_set_remove(struct ata_host_set *host_set)
4812{
4813 struct ata_port *ap;
4814 unsigned int i;
4815
4816 for (i = 0; i < host_set->n_ports; i++) {
4817 ap = host_set->ports[i];
4818 scsi_remove_host(ap->host);
4819 }
4820
4821 free_irq(host_set->irq, host_set);
4822
4823 for (i = 0; i < host_set->n_ports; i++) {
4824 ap = host_set->ports[i];
4825
4826 ata_scsi_release(ap->host);
4827
4828 if ((ap->flags & ATA_FLAG_NO_LEGACY) == 0) {
4829 struct ata_ioports *ioaddr = &ap->ioaddr;
4830
4831 if (ioaddr->cmd_addr == 0x1f0)
4832 release_region(0x1f0, 8);
4833 else if (ioaddr->cmd_addr == 0x170)
4834 release_region(0x170, 8);
4835 }
4836
4837 scsi_host_put(ap->host);
4838 }
4839
4840 if (host_set->ops->host_stop)
4841 host_set->ops->host_stop(host_set);
4842
4843 kfree(host_set);
4844}
4845
1da177e4
LT		 4846/**
4847 * ata_scsi_release - SCSI layer callback hook for host unload
4848 * @host: libata host to be unloaded
4849 *
4850 * Performs all duties necessary to shut down a libata port...
4851 * Kill port kthread, disable port, and release resources.
4852 *
4853 * LOCKING:
4854 * Inherited from SCSI layer.
4855 *
4856 * RETURNS:
4857 * One.
4858 */
4859
4860int ata_scsi_release(struct Scsi_Host *host)
4861{
35bb94b1 4862 struct ata_port *ap = ata_shost_to_port(host);
1da177e4
LT		 4863
4864 DPRINTK("ENTER\n");
4865
4866 ap->ops->port_disable(ap);
4867 ata_host_remove(ap, 0);
4868
4869 DPRINTK("EXIT\n");
4870 return 1;
4871}
4872
4873/**
4874 * ata_std_ports - initialize ioaddr with standard port offsets.
4875 * @ioaddr: IO address structure to be initialized
0baab86b
EF		 4876 *
4877 * Utility function which initializes data_addr, error_addr,
4878 * feature_addr, nsect_addr, lbal_addr, lbam_addr, lbah_addr,
4879 * device_addr, status_addr, and command_addr to standard offsets
4880 * relative to cmd_addr.
4881 *
4882 * Does not set ctl_addr, altstatus_addr, bmdma_addr, or scr_addr.
1da177e4 4883 */
0baab86b 4884
1da177e4
LT		 4885void ata_std_ports(struct ata_ioports *ioaddr)
4886{
4887 ioaddr->data_addr = ioaddr->cmd_addr + ATA_REG_DATA;
4888 ioaddr->error_addr = ioaddr->cmd_addr + ATA_REG_ERR;
4889 ioaddr->feature_addr = ioaddr->cmd_addr + ATA_REG_FEATURE;
4890 ioaddr->nsect_addr = ioaddr->cmd_addr + ATA_REG_NSECT;
4891 ioaddr->lbal_addr = ioaddr->cmd_addr + ATA_REG_LBAL;
4892 ioaddr->lbam_addr = ioaddr->cmd_addr + ATA_REG_LBAM;
4893 ioaddr->lbah_addr = ioaddr->cmd_addr + ATA_REG_LBAH;
4894 ioaddr->device_addr = ioaddr->cmd_addr + ATA_REG_DEVICE;
4895 ioaddr->status_addr = ioaddr->cmd_addr + ATA_REG_STATUS;
4896 ioaddr->command_addr = ioaddr->cmd_addr + ATA_REG_CMD;
4897}
4898
0baab86b 4899
374b1873
JG		 4900#ifdef CONFIG_PCI
4901
4902void ata_pci_host_stop (struct ata_host_set *host_set)
4903{
4904 struct pci_dev *pdev = to_pci_dev(host_set->dev);
4905
4906 pci_iounmap(pdev, host_set->mmio_base);
4907}
4908
1da177e4
LT		 4909/**
4910 * ata_pci_remove_one - PCI layer callback for device removal
4911 * @pdev: PCI device that was removed
4912 *
4913 * PCI layer indicates to libata via this hook that
6f0ef4fa 4914 * hot-unplug or module unload event has occurred.
1da177e4
LT		 4915 * Handle this by unregistering all objects associated
4916 * with this PCI device. Free those objects. Then finally
4917 * release PCI resources and disable device.
4918 *
4919 * LOCKING:
4920 * Inherited from PCI layer (may sleep).
4921 */
4922
4923void ata_pci_remove_one (struct pci_dev *pdev)
4924{
4925 struct device *dev = pci_dev_to_dev(pdev);
4926 struct ata_host_set *host_set = dev_get_drvdata(dev);
1da177e4 4927
17b14451 4928 ata_host_set_remove(host_set);
1da177e4
LT		 4929 pci_release_regions(pdev);
4930 pci_disable_device(pdev);
4931 dev_set_drvdata(dev, NULL);
4932}
4933
4934/* move to PCI subsystem */
057ace5e 4935int pci_test_config_bits(struct pci_dev *pdev, const struct pci_bits *bits)
1da177e4
LT		 4936{
4937 unsigned long tmp = 0;
4938
4939 switch (bits->width) {
4940 case 1: {
4941 u8 tmp8 = 0;
4942 pci_read_config_byte(pdev, bits->reg, &tmp8);
4943 tmp = tmp8;
4944 break;
4945 }
4946 case 2: {
4947 u16 tmp16 = 0;
4948 pci_read_config_word(pdev, bits->reg, &tmp16);
4949 tmp = tmp16;
4950 break;
4951 }
4952 case 4: {
4953 u32 tmp32 = 0;
4954 pci_read_config_dword(pdev, bits->reg, &tmp32);
4955 tmp = tmp32;
4956 break;
4957 }
4958
4959 default:
4960 return -EINVAL;
4961 }
4962
4963 tmp &= bits->mask;
4964
4965 return (tmp == bits->val) ? 1 : 0;
4966}
9b847548
JA		 4967
4968int ata_pci_device_suspend(struct pci_dev *pdev, pm_message_t state)
4969{
4970 pci_save_state(pdev);
4971 pci_disable_device(pdev);
4972 pci_set_power_state(pdev, PCI_D3hot);
4973 return 0;
4974}
4975
4976int ata_pci_device_resume(struct pci_dev *pdev)
4977{
4978 pci_set_power_state(pdev, PCI_D0);
4979 pci_restore_state(pdev);
4980 pci_enable_device(pdev);
4981 pci_set_master(pdev);
4982 return 0;
4983}
1da177e4
LT		 4984#endif /* CONFIG_PCI */
4985
4986
1da177e4
LT		 4987static int __init ata_init(void)
4988{
4989 ata_wq = create_workqueue("ata");
4990 if (!ata_wq)
4991 return -ENOMEM;
4992
4993 printk(KERN_DEBUG "libata version " DRV_VERSION " loaded.\n");
4994 return 0;
4995}
4996
4997static void __exit ata_exit(void)
4998{
4999 destroy_workqueue(ata_wq);
5000}
5001
5002module_init(ata_init);
5003module_exit(ata_exit);
5004
67846b30
JG		 5005static unsigned long ratelimit_time;
5006static spinlock_t ata_ratelimit_lock = SPIN_LOCK_UNLOCKED;
5007
5008int ata_ratelimit(void)
5009{
5010 int rc;
5011 unsigned long flags;
5012
5013 spin_lock_irqsave(&ata_ratelimit_lock, flags);
5014
5015 if (time_after(jiffies, ratelimit_time)) {
5016 rc = 1;
5017 ratelimit_time = jiffies + (HZ/5);
5018 } else
5019 rc = 0;
5020
5021 spin_unlock_irqrestore(&ata_ratelimit_lock, flags);
5022
5023 return rc;
5024}
5025
c22daff4
TH		 5026/**
5027 * ata_wait_register - wait until register value changes
5028 * @reg: IO-mapped register
5029 * @mask: Mask to apply to read register value
5030 * @val: Wait condition
5031 * @interval_msec: polling interval in milliseconds
5032 * @timeout_msec: timeout in milliseconds
5033 *
5034 * Waiting for some bits of register to change is a common
5035 * operation for ATA controllers. This function reads 32bit LE
5036 * IO-mapped register @reg and tests for the following condition.
5037 *
5038 * (*@reg & mask) != val
5039 *
5040 * If the condition is met, it returns; otherwise, the process is
5041 * repeated after @interval_msec until timeout.
5042 *
5043 * LOCKING:
5044 * Kernel thread context (may sleep)
5045 *
5046 * RETURNS:
5047 * The final register value.
5048 */
5049u32 ata_wait_register(void __iomem *reg, u32 mask, u32 val,
5050 unsigned long interval_msec,
5051 unsigned long timeout_msec)
5052{
5053 unsigned long timeout;
5054 u32 tmp;
5055
5056 tmp = ioread32(reg);
5057
5058 /* Calculate timeout _after_ the first read to make sure
5059 * preceding writes reach the controller before starting to
5060 * eat away the timeout.
5061 */
5062 timeout = jiffies + (timeout_msec * HZ) / 1000;
5063
5064 while ((tmp & mask) == val && time_before(jiffies, timeout)) {
5065 msleep(interval_msec);
5066 tmp = ioread32(reg);
5067 }
5068
5069 return tmp;
5070}
5071
1da177e4
LT		 5072/*
5073 * libata is essentially a library of internal helper functions for
5074 * low-level ATA host controller drivers. As such, the API/ABI is
5075 * likely to change as new drivers are added and updated.
5076 * Do not depend on ABI/API stability.
5077 */
5078
5079EXPORT_SYMBOL_GPL(ata_std_bios_param);
5080EXPORT_SYMBOL_GPL(ata_std_ports);
5081EXPORT_SYMBOL_GPL(ata_device_add);
17b14451 5082EXPORT_SYMBOL_GPL(ata_host_set_remove);
1da177e4
LT		 5083EXPORT_SYMBOL_GPL(ata_sg_init);
5084EXPORT_SYMBOL_GPL(ata_sg_init_one);
76014427 5085EXPORT_SYMBOL_GPL(__ata_qc_complete);
1da177e4 5086EXPORT_SYMBOL_GPL(ata_qc_issue_prot);
1da177e4
LT		 5087EXPORT_SYMBOL_GPL(ata_tf_load);
5088EXPORT_SYMBOL_GPL(ata_tf_read);
5089EXPORT_SYMBOL_GPL(ata_noop_dev_select);
5090EXPORT_SYMBOL_GPL(ata_std_dev_select);
5091EXPORT_SYMBOL_GPL(ata_tf_to_fis);
5092EXPORT_SYMBOL_GPL(ata_tf_from_fis);
5093EXPORT_SYMBOL_GPL(ata_check_status);
5094EXPORT_SYMBOL_GPL(ata_altstatus);
1da177e4
LT		 5095EXPORT_SYMBOL_GPL(ata_exec_command);
5096EXPORT_SYMBOL_GPL(ata_port_start);
5097EXPORT_SYMBOL_GPL(ata_port_stop);
aa8f0dc6 5098EXPORT_SYMBOL_GPL(ata_host_stop);
1da177e4
LT		 5099EXPORT_SYMBOL_GPL(ata_interrupt);
5100EXPORT_SYMBOL_GPL(ata_qc_prep);
e46834cd 5101EXPORT_SYMBOL_GPL(ata_noop_qc_prep);
1da177e4
LT		 5102EXPORT_SYMBOL_GPL(ata_bmdma_setup);
5103EXPORT_SYMBOL_GPL(ata_bmdma_start);
5104EXPORT_SYMBOL_GPL(ata_bmdma_irq_clear);
5105EXPORT_SYMBOL_GPL(ata_bmdma_status);
5106EXPORT_SYMBOL_GPL(ata_bmdma_stop);
5107EXPORT_SYMBOL_GPL(ata_port_probe);
3c567b7d 5108EXPORT_SYMBOL_GPL(sata_set_spd);
1da177e4
LT		 5109EXPORT_SYMBOL_GPL(sata_phy_reset);
5110EXPORT_SYMBOL_GPL(__sata_phy_reset);
5111EXPORT_SYMBOL_GPL(ata_bus_reset);
8a19ac89 5112EXPORT_SYMBOL_GPL(ata_std_probeinit);
c2bd5804
TH		 5113EXPORT_SYMBOL_GPL(ata_std_softreset);
5114EXPORT_SYMBOL_GPL(sata_std_hardreset);
5115EXPORT_SYMBOL_GPL(ata_std_postreset);
5116EXPORT_SYMBOL_GPL(ata_std_probe_reset);
a62c0fc5 5117EXPORT_SYMBOL_GPL(ata_drive_probe_reset);
623a3128 5118EXPORT_SYMBOL_GPL(ata_dev_revalidate);
2e9edbf8
JG		 5119EXPORT_SYMBOL_GPL(ata_dev_classify);
5120EXPORT_SYMBOL_GPL(ata_dev_pair);
1da177e4 5121EXPORT_SYMBOL_GPL(ata_port_disable);
67846b30 5122EXPORT_SYMBOL_GPL(ata_ratelimit);
c22daff4 5123EXPORT_SYMBOL_GPL(ata_wait_register);
6f8b9958 5124EXPORT_SYMBOL_GPL(ata_busy_sleep);
86e45b6b 5125EXPORT_SYMBOL_GPL(ata_port_queue_task);
1da177e4
LT		 5126EXPORT_SYMBOL_GPL(ata_scsi_ioctl);
5127EXPORT_SYMBOL_GPL(ata_scsi_queuecmd);
1da177e4
LT		 5128EXPORT_SYMBOL_GPL(ata_scsi_slave_config);
5129EXPORT_SYMBOL_GPL(ata_scsi_release);
5130EXPORT_SYMBOL_GPL(ata_host_intr);
6a62a04d
TH		 5131EXPORT_SYMBOL_GPL(ata_id_string);
5132EXPORT_SYMBOL_GPL(ata_id_c_string);
1da177e4
LT		 5133EXPORT_SYMBOL_GPL(ata_scsi_simulate);
5134
1bc4ccff 5135EXPORT_SYMBOL_GPL(ata_pio_need_iordy);
452503f9
AC		 5136EXPORT_SYMBOL_GPL(ata_timing_compute);
5137EXPORT_SYMBOL_GPL(ata_timing_merge);
5138
1da177e4
LT		 5139#ifdef CONFIG_PCI
5140EXPORT_SYMBOL_GPL(pci_test_config_bits);
374b1873 5141EXPORT_SYMBOL_GPL(ata_pci_host_stop);
1da177e4
LT		 5142EXPORT_SYMBOL_GPL(ata_pci_init_native_mode);
5143EXPORT_SYMBOL_GPL(ata_pci_init_one);
5144EXPORT_SYMBOL_GPL(ata_pci_remove_one);
9b847548
JA		 5145EXPORT_SYMBOL_GPL(ata_pci_device_suspend);
5146EXPORT_SYMBOL_GPL(ata_pci_device_resume);
67951ade
AC		 5147EXPORT_SYMBOL_GPL(ata_pci_default_filter);
5148EXPORT_SYMBOL_GPL(ata_pci_clear_simplex);
1da177e4 5149#endif /* CONFIG_PCI */
9b847548
JA		 5150
5151EXPORT_SYMBOL_GPL(ata_device_suspend);
5152EXPORT_SYMBOL_GPL(ata_device_resume);
5153EXPORT_SYMBOL_GPL(ata_scsi_device_suspend);
5154EXPORT_SYMBOL_GPL(ata_scsi_device_resume);
ece1d636 5155
ece1d636
TH		 5156EXPORT_SYMBOL_GPL(ata_eng_timeout);
5157EXPORT_SYMBOL_GPL(ata_eh_qc_complete);
5158EXPORT_SYMBOL_GPL(ata_eh_qc_retry);
Linux 6.x block layer and io_uring tree(s)