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[PATCH] libata: implement ata_down_xfermask_limit()
[linux-2.6-block.git] / drivers / scsi / libata-core.c
CommitLineData
1da177e4 1/*
af36d7f0
JG		 2 * libata-core.c - helper library for ATA
3 *
4 * Maintained by: Jeff Garzik <jgarzik@pobox.com>
5 * Please ALWAYS copy linux-ide@vger.kernel.org
6 * on emails.
7 *
8 * Copyright 2003-2004 Red Hat, Inc. All rights reserved.
9 * Copyright 2003-2004 Jeff Garzik
10 *
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2, or (at your option)
15 * any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; see the file COPYING. If not, write to
24 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
25 *
26 *
27 * libata documentation is available via 'make {ps|pdf}docs',
28 * as Documentation/DocBook/libata.*
29 *
30 * Hardware documentation available from http://www.t13.org/ and
31 * http://www.sata-io.org/
32 *
1da177e4
LT		 33 */
34
35#include <linux/config.h>
36#include <linux/kernel.h>
37#include <linux/module.h>
38#include <linux/pci.h>
39#include <linux/init.h>
40#include <linux/list.h>
41#include <linux/mm.h>
42#include <linux/highmem.h>
43#include <linux/spinlock.h>
44#include <linux/blkdev.h>
45#include <linux/delay.h>
46#include <linux/timer.h>
47#include <linux/interrupt.h>
48#include <linux/completion.h>
49#include <linux/suspend.h>
50#include <linux/workqueue.h>
67846b30 51#include <linux/jiffies.h>
378f058c 52#include <linux/scatterlist.h>
1da177e4 53#include <scsi/scsi.h>
1da177e4 54#include "scsi_priv.h"
193515d5 55#include <scsi/scsi_cmnd.h>
1da177e4
LT		 56#include <scsi/scsi_host.h>
57#include <linux/libata.h>
58#include <asm/io.h>
59#include <asm/semaphore.h>
60#include <asm/byteorder.h>
61
62#include "libata.h"
63
6aff8f1f 64static unsigned int ata_dev_init_params(struct ata_port *ap,
00b6f5e9
AL		 65 struct ata_device *dev,
66 u16 heads,
67 u16 sectors);
cf176e1a
TH		 68static int ata_down_xfermask_limit(struct ata_port *ap, struct ata_device *dev,
69 int force_pio0);
1c3fae4d 70static int ata_down_sata_spd_limit(struct ata_port *ap);
e82cbdb9 71static int ata_set_mode(struct ata_port *ap, struct ata_device **r_failed_dev);
83206a29
TH		 72static unsigned int ata_dev_set_xfermode(struct ata_port *ap,
73 struct ata_device *dev);
acf356b1 74static void ata_dev_xfermask(struct ata_port *ap, struct ata_device *dev);
1da177e4
LT		 75
76static unsigned int ata_unique_id = 1;
77static struct workqueue_struct *ata_wq;
78
418dc1f5 79int atapi_enabled = 1;
1623c81e
JG		 80module_param(atapi_enabled, int, 0444);
81MODULE_PARM_DESC(atapi_enabled, "Enable discovery of ATAPI devices (0=off, 1=on)");
82
c3c013a2
JG		 83int libata_fua = 0;
84module_param_named(fua, libata_fua, int, 0444);
85MODULE_PARM_DESC(fua, "FUA support (0=off, 1=on)");
86
1da177e4
LT		 87MODULE_AUTHOR("Jeff Garzik");
88MODULE_DESCRIPTION("Library module for ATA devices");
89MODULE_LICENSE("GPL");
90MODULE_VERSION(DRV_VERSION);
91
0baab86b 92
1da177e4
LT		 93/**
94 * ata_tf_to_fis - Convert ATA taskfile to SATA FIS structure
95 * @tf: Taskfile to convert
96 * @fis: Buffer into which data will output
97 * @pmp: Port multiplier port
98 *
99 * Converts a standard ATA taskfile to a Serial ATA
100 * FIS structure (Register - Host to Device).
101 *
102 * LOCKING:
103 * Inherited from caller.
104 */
105
057ace5e 106void ata_tf_to_fis(const struct ata_taskfile *tf, u8 *fis, u8 pmp)
1da177e4
LT		 107{
108 fis[0] = 0x27; /* Register - Host to Device FIS */
109 fis[1] = (pmp & 0xf) | (1 << 7); /* Port multiplier number,
110 bit 7 indicates Command FIS */
111 fis[2] = tf->command;
112 fis[3] = tf->feature;
113
114 fis[4] = tf->lbal;
115 fis[5] = tf->lbam;
116 fis[6] = tf->lbah;
117 fis[7] = tf->device;
118
119 fis[8] = tf->hob_lbal;
120 fis[9] = tf->hob_lbam;
121 fis[10] = tf->hob_lbah;
122 fis[11] = tf->hob_feature;
123
124 fis[12] = tf->nsect;
125 fis[13] = tf->hob_nsect;
126 fis[14] = 0;
127 fis[15] = tf->ctl;
128
129 fis[16] = 0;
130 fis[17] = 0;
131 fis[18] = 0;
132 fis[19] = 0;
133}
134
135/**
136 * ata_tf_from_fis - Convert SATA FIS to ATA taskfile
137 * @fis: Buffer from which data will be input
138 * @tf: Taskfile to output
139 *
e12a1be6 140 * Converts a serial ATA FIS structure to a standard ATA taskfile.
1da177e4
LT		 141 *
142 * LOCKING:
143 * Inherited from caller.
144 */
145
057ace5e 146void ata_tf_from_fis(const u8 *fis, struct ata_taskfile *tf)
1da177e4
LT		 147{
148 tf->command = fis[2]; /* status */
149 tf->feature = fis[3]; /* error */
150
151 tf->lbal = fis[4];
152 tf->lbam = fis[5];
153 tf->lbah = fis[6];
154 tf->device = fis[7];
155
156 tf->hob_lbal = fis[8];
157 tf->hob_lbam = fis[9];
158 tf->hob_lbah = fis[10];
159
160 tf->nsect = fis[12];
161 tf->hob_nsect = fis[13];
162}
163
8cbd6df1
AL		 164static const u8 ata_rw_cmds[] = {
165 /* pio multi */
166 ATA_CMD_READ_MULTI,
167 ATA_CMD_WRITE_MULTI,
168 ATA_CMD_READ_MULTI_EXT,
169 ATA_CMD_WRITE_MULTI_EXT,
9a3dccc4
TH		 170 0,
171 0,
172 0,
173 ATA_CMD_WRITE_MULTI_FUA_EXT,
8cbd6df1
AL		 174 /* pio */
175 ATA_CMD_PIO_READ,
176 ATA_CMD_PIO_WRITE,
177 ATA_CMD_PIO_READ_EXT,
178 ATA_CMD_PIO_WRITE_EXT,
9a3dccc4
TH		 179 0,
180 0,
181 0,
182 0,
8cbd6df1
AL		 183 /* dma */
184 ATA_CMD_READ,
185 ATA_CMD_WRITE,
186 ATA_CMD_READ_EXT,
9a3dccc4
TH		 187 ATA_CMD_WRITE_EXT,
188 0,
189 0,
190 0,
191 ATA_CMD_WRITE_FUA_EXT
8cbd6df1 192};
1da177e4
LT		 193
194/**
8cbd6df1
AL		 195 * ata_rwcmd_protocol - set taskfile r/w commands and protocol
196 * @qc: command to examine and configure
1da177e4 197 *
2e9edbf8 198 * Examine the device configuration and tf->flags to calculate
8cbd6df1 199 * the proper read/write commands and protocol to use.
1da177e4
LT		 200 *
201 * LOCKING:
202 * caller.
203 */
9a3dccc4 204int ata_rwcmd_protocol(struct ata_queued_cmd *qc)
1da177e4 205{
8cbd6df1
AL		 206 struct ata_taskfile *tf = &qc->tf;
207 struct ata_device *dev = qc->dev;
9a3dccc4 208 u8 cmd;
1da177e4 209
9a3dccc4 210 int index, fua, lba48, write;
2e9edbf8 211
9a3dccc4 212 fua = (tf->flags & ATA_TFLAG_FUA) ? 4 : 0;
8cbd6df1
AL		 213 lba48 = (tf->flags & ATA_TFLAG_LBA48) ? 2 : 0;
214 write = (tf->flags & ATA_TFLAG_WRITE) ? 1 : 0;
1da177e4 215
8cbd6df1
AL		 216 if (dev->flags & ATA_DFLAG_PIO) {
217 tf->protocol = ATA_PROT_PIO;
9a3dccc4 218 index = dev->multi_count ? 0 : 8;
8d238e01
AC		 219 } else if (lba48 && (qc->ap->flags & ATA_FLAG_PIO_LBA48)) {
220 /* Unable to use DMA due to host limitation */
221 tf->protocol = ATA_PROT_PIO;
0565c26d 222 index = dev->multi_count ? 0 : 8;
8cbd6df1
AL		 223 } else {
224 tf->protocol = ATA_PROT_DMA;
9a3dccc4 225 index = 16;
8cbd6df1 226 }
1da177e4 227
9a3dccc4
TH		 228 cmd = ata_rw_cmds[index + fua + lba48 + write];
229 if (cmd) {
230 tf->command = cmd;
231 return 0;
232 }
233 return -1;
1da177e4
LT		 234}
235
cb95d562
TH		 236/**
237 * ata_pack_xfermask - Pack pio, mwdma and udma masks into xfer_mask
238 * @pio_mask: pio_mask
239 * @mwdma_mask: mwdma_mask
240 * @udma_mask: udma_mask
241 *
242 * Pack @pio_mask, @mwdma_mask and @udma_mask into a single
243 * unsigned int xfer_mask.
244 *
245 * LOCKING:
246 * None.
247 *
248 * RETURNS:
249 * Packed xfer_mask.
250 */
251static unsigned int ata_pack_xfermask(unsigned int pio_mask,
252 unsigned int mwdma_mask,
253 unsigned int udma_mask)
254{
255 return ((pio_mask << ATA_SHIFT_PIO) & ATA_MASK_PIO) |
256 ((mwdma_mask << ATA_SHIFT_MWDMA) & ATA_MASK_MWDMA) |
257 ((udma_mask << ATA_SHIFT_UDMA) & ATA_MASK_UDMA);
258}
259
c0489e4e
TH		 260/**
261 * ata_unpack_xfermask - Unpack xfer_mask into pio, mwdma and udma masks
262 * @xfer_mask: xfer_mask to unpack
263 * @pio_mask: resulting pio_mask
264 * @mwdma_mask: resulting mwdma_mask
265 * @udma_mask: resulting udma_mask
266 *
267 * Unpack @xfer_mask into @pio_mask, @mwdma_mask and @udma_mask.
268 * Any NULL distination masks will be ignored.
269 */
270static void ata_unpack_xfermask(unsigned int xfer_mask,
271 unsigned int *pio_mask,
272 unsigned int *mwdma_mask,
273 unsigned int *udma_mask)
274{
275 if (pio_mask)
276 *pio_mask = (xfer_mask & ATA_MASK_PIO) >> ATA_SHIFT_PIO;
277 if (mwdma_mask)
278 *mwdma_mask = (xfer_mask & ATA_MASK_MWDMA) >> ATA_SHIFT_MWDMA;
279 if (udma_mask)
280 *udma_mask = (xfer_mask & ATA_MASK_UDMA) >> ATA_SHIFT_UDMA;
281}
282
cb95d562 283static const struct ata_xfer_ent {
be9a50c8 284 int shift, bits;
cb95d562
TH		 285 u8 base;
286} ata_xfer_tbl[] = {
287 { ATA_SHIFT_PIO, ATA_BITS_PIO, XFER_PIO_0 },
288 { ATA_SHIFT_MWDMA, ATA_BITS_MWDMA, XFER_MW_DMA_0 },
289 { ATA_SHIFT_UDMA, ATA_BITS_UDMA, XFER_UDMA_0 },
290 { -1, },
291};
292
293/**
294 * ata_xfer_mask2mode - Find matching XFER_* for the given xfer_mask
295 * @xfer_mask: xfer_mask of interest
296 *
297 * Return matching XFER_* value for @xfer_mask. Only the highest
298 * bit of @xfer_mask is considered.
299 *
300 * LOCKING:
301 * None.
302 *
303 * RETURNS:
304 * Matching XFER_* value, 0 if no match found.
305 */
306static u8 ata_xfer_mask2mode(unsigned int xfer_mask)
307{
308 int highbit = fls(xfer_mask) - 1;
309 const struct ata_xfer_ent *ent;
310
311 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
312 if (highbit >= ent->shift && highbit < ent->shift + ent->bits)
313 return ent->base + highbit - ent->shift;
314 return 0;
315}
316
317/**
318 * ata_xfer_mode2mask - Find matching xfer_mask for XFER_*
319 * @xfer_mode: XFER_* of interest
320 *
321 * Return matching xfer_mask for @xfer_mode.
322 *
323 * LOCKING:
324 * None.
325 *
326 * RETURNS:
327 * Matching xfer_mask, 0 if no match found.
328 */
329static unsigned int ata_xfer_mode2mask(u8 xfer_mode)
330{
331 const struct ata_xfer_ent *ent;
332
333 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
334 if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits)
335 return 1 << (ent->shift + xfer_mode - ent->base);
336 return 0;
337}
338
339/**
340 * ata_xfer_mode2shift - Find matching xfer_shift for XFER_*
341 * @xfer_mode: XFER_* of interest
342 *
343 * Return matching xfer_shift for @xfer_mode.
344 *
345 * LOCKING:
346 * None.
347 *
348 * RETURNS:
349 * Matching xfer_shift, -1 if no match found.
350 */
351static int ata_xfer_mode2shift(unsigned int xfer_mode)
352{
353 const struct ata_xfer_ent *ent;
354
355 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
356 if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits)
357 return ent->shift;
358 return -1;
359}
360
1da177e4 361/**
1da7b0d0
TH		 362 * ata_mode_string - convert xfer_mask to string
363 * @xfer_mask: mask of bits supported; only highest bit counts.
1da177e4
LT		 364 *
365 * Determine string which represents the highest speed
1da7b0d0 366 * (highest bit in @modemask).
1da177e4
LT		 367 *
368 * LOCKING:
369 * None.
370 *
371 * RETURNS:
372 * Constant C string representing highest speed listed in
1da7b0d0 373 * @mode_mask, or the constant C string "<n/a>".
1da177e4 374 */
1da7b0d0 375static const char *ata_mode_string(unsigned int xfer_mask)
1da177e4 376{
75f554bc
TH		 377 static const char * const xfer_mode_str[] = {
378 "PIO0",
379 "PIO1",
380 "PIO2",
381 "PIO3",
382 "PIO4",
383 "MWDMA0",
384 "MWDMA1",
385 "MWDMA2",
386 "UDMA/16",
387 "UDMA/25",
388 "UDMA/33",
389 "UDMA/44",
390 "UDMA/66",
391 "UDMA/100",
392 "UDMA/133",
393 "UDMA7",
394 };
1da7b0d0 395 int highbit;
1da177e4 396
1da7b0d0
TH		 397 highbit = fls(xfer_mask) - 1;
398 if (highbit >= 0 && highbit < ARRAY_SIZE(xfer_mode_str))
399 return xfer_mode_str[highbit];
1da177e4 400 return "<n/a>";
1da177e4
LT		 401}
402
4c360c81
TH		 403static const char *sata_spd_string(unsigned int spd)
404{
405 static const char * const spd_str[] = {
406 "1.5 Gbps",
407 "3.0 Gbps",
408 };
409
410 if (spd == 0 || (spd - 1) >= ARRAY_SIZE(spd_str))
411 return "<unknown>";
412 return spd_str[spd - 1];
413}
414
0b8efb0a
TH		 415static void ata_dev_disable(struct ata_port *ap, struct ata_device *dev)
416{
e1211e3f 417 if (ata_dev_enabled(dev)) {
0b8efb0a
TH		 418 printk(KERN_WARNING "ata%u: dev %u disabled\n",
419 ap->id, dev->devno);
420 dev->class++;
421 }
422}
423
1da177e4
LT		 424/**
425 * ata_pio_devchk - PATA device presence detection
426 * @ap: ATA channel to examine
427 * @device: Device to examine (starting at zero)
428 *
429 * This technique was originally described in
430 * Hale Landis's ATADRVR (www.ata-atapi.com), and
431 * later found its way into the ATA/ATAPI spec.
432 *
433 * Write a pattern to the ATA shadow registers,
434 * and if a device is present, it will respond by
435 * correctly storing and echoing back the
436 * ATA shadow register contents.
437 *
438 * LOCKING:
439 * caller.
440 */
441
442static unsigned int ata_pio_devchk(struct ata_port *ap,
443 unsigned int device)
444{
445 struct ata_ioports *ioaddr = &ap->ioaddr;
446 u8 nsect, lbal;
447
448 ap->ops->dev_select(ap, device);
449
450 outb(0x55, ioaddr->nsect_addr);
451 outb(0xaa, ioaddr->lbal_addr);
452
453 outb(0xaa, ioaddr->nsect_addr);
454 outb(0x55, ioaddr->lbal_addr);
455
456 outb(0x55, ioaddr->nsect_addr);
457 outb(0xaa, ioaddr->lbal_addr);
458
459 nsect = inb(ioaddr->nsect_addr);
460 lbal = inb(ioaddr->lbal_addr);
461
462 if ((nsect == 0x55) && (lbal == 0xaa))
463 return 1; /* we found a device */
464
465 return 0; /* nothing found */
466}
467
468/**
469 * ata_mmio_devchk - PATA device presence detection
470 * @ap: ATA channel to examine
471 * @device: Device to examine (starting at zero)
472 *
473 * This technique was originally described in
474 * Hale Landis's ATADRVR (www.ata-atapi.com), and
475 * later found its way into the ATA/ATAPI spec.
476 *
477 * Write a pattern to the ATA shadow registers,
478 * and if a device is present, it will respond by
479 * correctly storing and echoing back the
480 * ATA shadow register contents.
481 *
482 * LOCKING:
483 * caller.
484 */
485
486static unsigned int ata_mmio_devchk(struct ata_port *ap,
487 unsigned int device)
488{
489 struct ata_ioports *ioaddr = &ap->ioaddr;
490 u8 nsect, lbal;
491
492 ap->ops->dev_select(ap, device);
493
494 writeb(0x55, (void __iomem *) ioaddr->nsect_addr);
495 writeb(0xaa, (void __iomem *) ioaddr->lbal_addr);
496
497 writeb(0xaa, (void __iomem *) ioaddr->nsect_addr);
498 writeb(0x55, (void __iomem *) ioaddr->lbal_addr);
499
500 writeb(0x55, (void __iomem *) ioaddr->nsect_addr);
501 writeb(0xaa, (void __iomem *) ioaddr->lbal_addr);
502
503 nsect = readb((void __iomem *) ioaddr->nsect_addr);
504 lbal = readb((void __iomem *) ioaddr->lbal_addr);
505
506 if ((nsect == 0x55) && (lbal == 0xaa))
507 return 1; /* we found a device */
508
509 return 0; /* nothing found */
510}
511
512/**
513 * ata_devchk - PATA device presence detection
514 * @ap: ATA channel to examine
515 * @device: Device to examine (starting at zero)
516 *
517 * Dispatch ATA device presence detection, depending
518 * on whether we are using PIO or MMIO to talk to the
519 * ATA shadow registers.
520 *
521 * LOCKING:
522 * caller.
523 */
524
525static unsigned int ata_devchk(struct ata_port *ap,
526 unsigned int device)
527{
528 if (ap->flags & ATA_FLAG_MMIO)
529 return ata_mmio_devchk(ap, device);
530 return ata_pio_devchk(ap, device);
531}
532
533/**
534 * ata_dev_classify - determine device type based on ATA-spec signature
535 * @tf: ATA taskfile register set for device to be identified
536 *
537 * Determine from taskfile register contents whether a device is
538 * ATA or ATAPI, as per "Signature and persistence" section
539 * of ATA/PI spec (volume 1, sect 5.14).
540 *
541 * LOCKING:
542 * None.
543 *
544 * RETURNS:
545 * Device type, %ATA_DEV_ATA, %ATA_DEV_ATAPI, or %ATA_DEV_UNKNOWN
546 * the event of failure.
547 */
548
057ace5e 549unsigned int ata_dev_classify(const struct ata_taskfile *tf)
1da177e4
LT		 550{
551 /* Apple's open source Darwin code hints that some devices only
552 * put a proper signature into the LBA mid/high registers,
553 * So, we only check those. It's sufficient for uniqueness.
554 */
555
556 if (((tf->lbam == 0) && (tf->lbah == 0)) ||
557 ((tf->lbam == 0x3c) && (tf->lbah == 0xc3))) {
558 DPRINTK("found ATA device by sig\n");
559 return ATA_DEV_ATA;
560 }
561
562 if (((tf->lbam == 0x14) && (tf->lbah == 0xeb)) ||
563 ((tf->lbam == 0x69) && (tf->lbah == 0x96))) {
564 DPRINTK("found ATAPI device by sig\n");
565 return ATA_DEV_ATAPI;
566 }
567
568 DPRINTK("unknown device\n");
569 return ATA_DEV_UNKNOWN;
570}
571
572/**
573 * ata_dev_try_classify - Parse returned ATA device signature
574 * @ap: ATA channel to examine
575 * @device: Device to examine (starting at zero)
b4dc7623 576 * @r_err: Value of error register on completion
1da177e4
LT		 577 *
578 * After an event -- SRST, E.D.D., or SATA COMRESET -- occurs,
579 * an ATA/ATAPI-defined set of values is placed in the ATA
580 * shadow registers, indicating the results of device detection
581 * and diagnostics.
582 *
583 * Select the ATA device, and read the values from the ATA shadow
584 * registers. Then parse according to the Error register value,
585 * and the spec-defined values examined by ata_dev_classify().
586 *
587 * LOCKING:
588 * caller.
b4dc7623
TH		 589 *
590 * RETURNS:
591 * Device type - %ATA_DEV_ATA, %ATA_DEV_ATAPI or %ATA_DEV_NONE.
1da177e4
LT		 592 */
593
b4dc7623
TH		 594static unsigned int
595ata_dev_try_classify(struct ata_port *ap, unsigned int device, u8 *r_err)
1da177e4 596{
1da177e4
LT		 597 struct ata_taskfile tf;
598 unsigned int class;
599 u8 err;
600
601 ap->ops->dev_select(ap, device);
602
603 memset(&tf, 0, sizeof(tf));
604
1da177e4 605 ap->ops->tf_read(ap, &tf);
0169e284 606 err = tf.feature;
b4dc7623
TH		 607 if (r_err)
608 *r_err = err;
1da177e4
LT		 609
610 /* see if device passed diags */
611 if (err == 1)
612 /* do nothing */ ;
613 else if ((device == 0) && (err == 0x81))
614 /* do nothing */ ;
615 else
b4dc7623 616 return ATA_DEV_NONE;
1da177e4 617
b4dc7623 618 /* determine if device is ATA or ATAPI */
1da177e4 619 class = ata_dev_classify(&tf);
b4dc7623 620
1da177e4 621 if (class == ATA_DEV_UNKNOWN)
b4dc7623 622 return ATA_DEV_NONE;
1da177e4 623 if ((class == ATA_DEV_ATA) && (ata_chk_status(ap) == 0))
b4dc7623
TH		 624 return ATA_DEV_NONE;
625 return class;
1da177e4
LT		 626}
627
628/**
6a62a04d 629 * ata_id_string - Convert IDENTIFY DEVICE page into string
1da177e4
LT		 630 * @id: IDENTIFY DEVICE results we will examine
631 * @s: string into which data is output
632 * @ofs: offset into identify device page
633 * @len: length of string to return. must be an even number.
634 *
635 * The strings in the IDENTIFY DEVICE page are broken up into
636 * 16-bit chunks. Run through the string, and output each
637 * 8-bit chunk linearly, regardless of platform.
638 *
639 * LOCKING:
640 * caller.
641 */
642
6a62a04d
TH		 643void ata_id_string(const u16 *id, unsigned char *s,
644 unsigned int ofs, unsigned int len)
1da177e4
LT		 645{
646 unsigned int c;
647
648 while (len > 0) {
649 c = id[ofs] >> 8;
650 *s = c;
651 s++;
652
653 c = id[ofs] & 0xff;
654 *s = c;
655 s++;
656
657 ofs++;
658 len -= 2;
659 }
660}
661
0e949ff3 662/**
6a62a04d 663 * ata_id_c_string - Convert IDENTIFY DEVICE page into C string
0e949ff3
TH		 664 * @id: IDENTIFY DEVICE results we will examine
665 * @s: string into which data is output
666 * @ofs: offset into identify device page
667 * @len: length of string to return. must be an odd number.
668 *
6a62a04d 669 * This function is identical to ata_id_string except that it
0e949ff3
TH		 670 * trims trailing spaces and terminates the resulting string with
671 * null. @len must be actual maximum length (even number) + 1.
672 *
673 * LOCKING:
674 * caller.
675 */
6a62a04d
TH		 676void ata_id_c_string(const u16 *id, unsigned char *s,
677 unsigned int ofs, unsigned int len)
0e949ff3
TH		 678{
679 unsigned char *p;
680
681 WARN_ON(!(len & 1));
682
6a62a04d 683 ata_id_string(id, s, ofs, len - 1);
0e949ff3
TH		 684
685 p = s + strnlen(s, len - 1);
686 while (p > s && p[-1] == ' ')
687 p--;
688 *p = '\0';
689}
0baab86b 690
2940740b
TH		 691static u64 ata_id_n_sectors(const u16 *id)
692{
693 if (ata_id_has_lba(id)) {
694 if (ata_id_has_lba48(id))
695 return ata_id_u64(id, 100);
696 else
697 return ata_id_u32(id, 60);
698 } else {
699 if (ata_id_current_chs_valid(id))
700 return ata_id_u32(id, 57);
701 else
702 return id[1] * id[3] * id[6];
703 }
704}
705
0baab86b
EF		 706/**
707 * ata_noop_dev_select - Select device 0/1 on ATA bus
708 * @ap: ATA channel to manipulate
709 * @device: ATA device (numbered from zero) to select
710 *
711 * This function performs no actual function.
712 *
713 * May be used as the dev_select() entry in ata_port_operations.
714 *
715 * LOCKING:
716 * caller.
717 */
1da177e4
LT		 718void ata_noop_dev_select (struct ata_port *ap, unsigned int device)
719{
720}
721
0baab86b 722
1da177e4
LT		 723/**
724 * ata_std_dev_select - Select device 0/1 on ATA bus
725 * @ap: ATA channel to manipulate
726 * @device: ATA device (numbered from zero) to select
727 *
728 * Use the method defined in the ATA specification to
729 * make either device 0, or device 1, active on the
0baab86b
EF		 730 * ATA channel. Works with both PIO and MMIO.
731 *
732 * May be used as the dev_select() entry in ata_port_operations.
1da177e4
LT		 733 *
734 * LOCKING:
735 * caller.
736 */
737
738void ata_std_dev_select (struct ata_port *ap, unsigned int device)
739{
740 u8 tmp;
741
742 if (device == 0)
743 tmp = ATA_DEVICE_OBS;
744 else
745 tmp = ATA_DEVICE_OBS | ATA_DEV1;
746
747 if (ap->flags & ATA_FLAG_MMIO) {
748 writeb(tmp, (void __iomem *) ap->ioaddr.device_addr);
749 } else {
750 outb(tmp, ap->ioaddr.device_addr);
751 }
752 ata_pause(ap); /* needed; also flushes, for mmio */
753}
754
755/**
756 * ata_dev_select - Select device 0/1 on ATA bus
757 * @ap: ATA channel to manipulate
758 * @device: ATA device (numbered from zero) to select
759 * @wait: non-zero to wait for Status register BSY bit to clear
760 * @can_sleep: non-zero if context allows sleeping
761 *
762 * Use the method defined in the ATA specification to
763 * make either device 0, or device 1, active on the
764 * ATA channel.
765 *
766 * This is a high-level version of ata_std_dev_select(),
767 * which additionally provides the services of inserting
768 * the proper pauses and status polling, where needed.
769 *
770 * LOCKING:
771 * caller.
772 */
773
774void ata_dev_select(struct ata_port *ap, unsigned int device,
775 unsigned int wait, unsigned int can_sleep)
776{
777 VPRINTK("ENTER, ata%u: device %u, wait %u\n",
778 ap->id, device, wait);
779
780 if (wait)
781 ata_wait_idle(ap);
782
783 ap->ops->dev_select(ap, device);
784
785 if (wait) {
786 if (can_sleep && ap->device[device].class == ATA_DEV_ATAPI)
787 msleep(150);
788 ata_wait_idle(ap);
789 }
790}
791
792/**
793 * ata_dump_id - IDENTIFY DEVICE info debugging output
0bd3300a 794 * @id: IDENTIFY DEVICE page to dump
1da177e4 795 *
0bd3300a
TH		 796 * Dump selected 16-bit words from the given IDENTIFY DEVICE
797 * page.
1da177e4
LT		 798 *
799 * LOCKING:
800 * caller.
801 */
802
0bd3300a 803static inline void ata_dump_id(const u16 *id)
1da177e4
LT		 804{
805 DPRINTK("49==0x%04x "
806 "53==0x%04x "
807 "63==0x%04x "
808 "64==0x%04x "
809 "75==0x%04x \n",
0bd3300a
TH		 810 id[49],
811 id[53],
812 id[63],
813 id[64],
814 id[75]);
1da177e4
LT		 815 DPRINTK("80==0x%04x "
816 "81==0x%04x "
817 "82==0x%04x "
818 "83==0x%04x "
819 "84==0x%04x \n",
0bd3300a
TH		 820 id[80],
821 id[81],
822 id[82],
823 id[83],
824 id[84]);
1da177e4
LT		 825 DPRINTK("88==0x%04x "
826 "93==0x%04x\n",
0bd3300a
TH		 827 id[88],
828 id[93]);
1da177e4
LT		 829}
830
cb95d562
TH		 831/**
832 * ata_id_xfermask - Compute xfermask from the given IDENTIFY data
833 * @id: IDENTIFY data to compute xfer mask from
834 *
835 * Compute the xfermask for this device. This is not as trivial
836 * as it seems if we must consider early devices correctly.
837 *
838 * FIXME: pre IDE drive timing (do we care ?).
839 *
840 * LOCKING:
841 * None.
842 *
843 * RETURNS:
844 * Computed xfermask
845 */
846static unsigned int ata_id_xfermask(const u16 *id)
847{
848 unsigned int pio_mask, mwdma_mask, udma_mask;
849
850 /* Usual case. Word 53 indicates word 64 is valid */
851 if (id[ATA_ID_FIELD_VALID] & (1 << 1)) {
852 pio_mask = id[ATA_ID_PIO_MODES] & 0x03;
853 pio_mask <<= 3;
854 pio_mask |= 0x7;
855 } else {
856 /* If word 64 isn't valid then Word 51 high byte holds
857 * the PIO timing number for the maximum. Turn it into
858 * a mask.
859 */
860 pio_mask = (2 << (id[ATA_ID_OLD_PIO_MODES] & 0xFF)) - 1 ;
861
862 /* But wait.. there's more. Design your standards by
863 * committee and you too can get a free iordy field to
864 * process. However its the speeds not the modes that
865 * are supported... Note drivers using the timing API
866 * will get this right anyway
867 */
868 }
869
870 mwdma_mask = id[ATA_ID_MWDMA_MODES] & 0x07;
fb21f0d0
TH		 871
872 udma_mask = 0;
873 if (id[ATA_ID_FIELD_VALID] & (1 << 2))
874 udma_mask = id[ATA_ID_UDMA_MODES] & 0xff;
cb95d562
TH		 875
876 return ata_pack_xfermask(pio_mask, mwdma_mask, udma_mask);
877}
878
86e45b6b
TH		 879/**
880 * ata_port_queue_task - Queue port_task
881 * @ap: The ata_port to queue port_task for
882 *
883 * Schedule @fn(@data) for execution after @delay jiffies using
884 * port_task. There is one port_task per port and it's the
885 * user(low level driver)'s responsibility to make sure that only
886 * one task is active at any given time.
887 *
888 * libata core layer takes care of synchronization between
889 * port_task and EH. ata_port_queue_task() may be ignored for EH
890 * synchronization.
891 *
892 * LOCKING:
893 * Inherited from caller.
894 */
895void ata_port_queue_task(struct ata_port *ap, void (*fn)(void *), void *data,
896 unsigned long delay)
897{
898 int rc;
899
2e755f68 900 if (ap->flags & ATA_FLAG_FLUSH_PORT_TASK)
86e45b6b
TH		 901 return;
902
903 PREPARE_WORK(&ap->port_task, fn, data);
904
905 if (!delay)
906 rc = queue_work(ata_wq, &ap->port_task);
907 else
908 rc = queue_delayed_work(ata_wq, &ap->port_task, delay);
909
910 /* rc == 0 means that another user is using port task */
911 WARN_ON(rc == 0);
912}
913
914/**
915 * ata_port_flush_task - Flush port_task
916 * @ap: The ata_port to flush port_task for
917 *
918 * After this function completes, port_task is guranteed not to
919 * be running or scheduled.
920 *
921 * LOCKING:
922 * Kernel thread context (may sleep)
923 */
924void ata_port_flush_task(struct ata_port *ap)
925{
926 unsigned long flags;
927
928 DPRINTK("ENTER\n");
929
930 spin_lock_irqsave(&ap->host_set->lock, flags);
2e755f68 931 ap->flags |= ATA_FLAG_FLUSH_PORT_TASK;
86e45b6b
TH		 932 spin_unlock_irqrestore(&ap->host_set->lock, flags);
933
934 DPRINTK("flush #1\n");
935 flush_workqueue(ata_wq);
936
937 /*
938 * At this point, if a task is running, it's guaranteed to see
939 * the FLUSH flag; thus, it will never queue pio tasks again.
940 * Cancel and flush.
941 */
942 if (!cancel_delayed_work(&ap->port_task)) {
943 DPRINTK("flush #2\n");
944 flush_workqueue(ata_wq);
945 }
946
947 spin_lock_irqsave(&ap->host_set->lock, flags);
2e755f68 948 ap->flags &= ~ATA_FLAG_FLUSH_PORT_TASK;
86e45b6b
TH		 949 spin_unlock_irqrestore(&ap->host_set->lock, flags);
950
951 DPRINTK("EXIT\n");
952}
953
77853bf2 954void ata_qc_complete_internal(struct ata_queued_cmd *qc)
a2a7a662 955{
77853bf2 956 struct completion *waiting = qc->private_data;
a2a7a662 957
77853bf2 958 qc->ap->ops->tf_read(qc->ap, &qc->tf);
a2a7a662 959 complete(waiting);
a2a7a662
TH		 960}
961
962/**
963 * ata_exec_internal - execute libata internal command
964 * @ap: Port to which the command is sent
965 * @dev: Device to which the command is sent
966 * @tf: Taskfile registers for the command and the result
967 * @dma_dir: Data tranfer direction of the command
968 * @buf: Data buffer of the command
969 * @buflen: Length of data buffer
970 *
971 * Executes libata internal command with timeout. @tf contains
972 * command on entry and result on return. Timeout and error
973 * conditions are reported via return value. No recovery action
974 * is taken after a command times out. It's caller's duty to
975 * clean up after timeout.
976 *
977 * LOCKING:
978 * None. Should be called with kernel context, might sleep.
979 */
980
981static unsigned
982ata_exec_internal(struct ata_port *ap, struct ata_device *dev,
983 struct ata_taskfile *tf,
984 int dma_dir, void *buf, unsigned int buflen)
985{
986 u8 command = tf->command;
987 struct ata_queued_cmd *qc;
988 DECLARE_COMPLETION(wait);
989 unsigned long flags;
77853bf2 990 unsigned int err_mask;
a2a7a662
TH		 991
992 spin_lock_irqsave(&ap->host_set->lock, flags);
993
994 qc = ata_qc_new_init(ap, dev);
995 BUG_ON(qc == NULL);
996
997 qc->tf = *tf;
998 qc->dma_dir = dma_dir;
999 if (dma_dir != DMA_NONE) {
1000 ata_sg_init_one(qc, buf, buflen);
1001 qc->nsect = buflen / ATA_SECT_SIZE;
1002 }
1003
77853bf2 1004 qc->private_data = &wait;
a2a7a662
TH		 1005 qc->complete_fn = ata_qc_complete_internal;
1006
8e0e694a 1007 ata_qc_issue(qc);
a2a7a662
TH		 1008
1009 spin_unlock_irqrestore(&ap->host_set->lock, flags);
1010
1011 if (!wait_for_completion_timeout(&wait, ATA_TMOUT_INTERNAL)) {
41ade50c
AL		 1012 ata_port_flush_task(ap);
1013
a2a7a662
TH		 1014 spin_lock_irqsave(&ap->host_set->lock, flags);
1015
1016 /* We're racing with irq here. If we lose, the
1017 * following test prevents us from completing the qc
1018 * again. If completion irq occurs after here but
1019 * before the caller cleans up, it will result in a
1020 * spurious interrupt. We can live with that.
1021 */
77853bf2 1022 if (qc->flags & ATA_QCFLAG_ACTIVE) {
11a56d24 1023 qc->err_mask = AC_ERR_TIMEOUT;
a2a7a662
TH		 1024 ata_qc_complete(qc);
1025 printk(KERN_WARNING "ata%u: qc timeout (cmd 0x%x)\n",
1026 ap->id, command);
1027 }
1028
1029 spin_unlock_irqrestore(&ap->host_set->lock, flags);
1030 }
1031
77853bf2
TH		 1032 *tf = qc->tf;
1033 err_mask = qc->err_mask;
1034
1035 ata_qc_free(qc);
1036
1f7dd3e9
TH		 1037 /* XXX - Some LLDDs (sata_mv) disable port on command failure.
1038 * Until those drivers are fixed, we detect the condition
1039 * here, fail the command with AC_ERR_SYSTEM and reenable the
1040 * port.
1041 *
1042 * Note that this doesn't change any behavior as internal
1043 * command failure results in disabling the device in the
1044 * higher layer for LLDDs without new reset/EH callbacks.
1045 *
1046 * Kill the following code as soon as those drivers are fixed.
1047 */
1048 if (ap->flags & ATA_FLAG_PORT_DISABLED) {
1049 err_mask |= AC_ERR_SYSTEM;
1050 ata_port_probe(ap);
1051 }
1052
77853bf2 1053 return err_mask;
a2a7a662
TH		 1054}
1055
1bc4ccff
AC		 1056/**
1057 * ata_pio_need_iordy - check if iordy needed
1058 * @adev: ATA device
1059 *
1060 * Check if the current speed of the device requires IORDY. Used
1061 * by various controllers for chip configuration.
1062 */
1063
1064unsigned int ata_pio_need_iordy(const struct ata_device *adev)
1065{
1066 int pio;
1067 int speed = adev->pio_mode - XFER_PIO_0;
1068
1069 if (speed < 2)
1070 return 0;
1071 if (speed > 2)
1072 return 1;
2e9edbf8 1073
1bc4ccff
AC		 1074 /* If we have no drive specific rule, then PIO 2 is non IORDY */
1075
1076 if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE */
1077 pio = adev->id[ATA_ID_EIDE_PIO];
1078 /* Is the speed faster than the drive allows non IORDY ? */
1079 if (pio) {
1080 /* This is cycle times not frequency - watch the logic! */
1081 if (pio > 240) /* PIO2 is 240nS per cycle */
1082 return 1;
1083 return 0;
1084 }
1085 }
1086 return 0;
1087}
1088
1da177e4 1089/**
49016aca
TH		 1090 * ata_dev_read_id - Read ID data from the specified device
1091 * @ap: port on which target device resides
1092 * @dev: target device
1093 * @p_class: pointer to class of the target device (may be changed)
1094 * @post_reset: is this read ID post-reset?
d9572b1d 1095 * @p_id: read IDENTIFY page (newly allocated)
1da177e4 1096 *
49016aca
TH		 1097 * Read ID data from the specified device. ATA_CMD_ID_ATA is
1098 * performed on ATA devices and ATA_CMD_ID_ATAPI on ATAPI
aec5c3c1
TH		 1099 * devices. This function also issues ATA_CMD_INIT_DEV_PARAMS
1100 * for pre-ATA4 drives.
1da177e4
LT		 1101 *
1102 * LOCKING:
49016aca
TH		 1103 * Kernel thread context (may sleep)
1104 *
1105 * RETURNS:
1106 * 0 on success, -errno otherwise.
1da177e4 1107 */
49016aca 1108static int ata_dev_read_id(struct ata_port *ap, struct ata_device *dev,
d9572b1d 1109 unsigned int *p_class, int post_reset, u16 **p_id)
1da177e4 1110{
49016aca 1111 unsigned int class = *p_class;
a0123703 1112 struct ata_taskfile tf;
49016aca 1113 unsigned int err_mask = 0;
d9572b1d 1114 u16 *id;
49016aca
TH		 1115 const char *reason;
1116 int rc;
1da177e4 1117
49016aca 1118 DPRINTK("ENTER, host %u, dev %u\n", ap->id, dev->devno);
1da177e4 1119
49016aca 1120 ata_dev_select(ap, dev->devno, 1, 1); /* select device 0/1 */
1da177e4 1121
d9572b1d
TH		 1122 id = kmalloc(sizeof(id[0]) * ATA_ID_WORDS, GFP_KERNEL);
1123 if (id == NULL) {
1124 rc = -ENOMEM;
1125 reason = "out of memory";
1126 goto err_out;
1127 }
1128
49016aca
TH		 1129 retry:
1130 ata_tf_init(ap, &tf, dev->devno);
a0123703 1131
49016aca
TH		 1132 switch (class) {
1133 case ATA_DEV_ATA:
a0123703 1134 tf.command = ATA_CMD_ID_ATA;
49016aca
TH		 1135 break;
1136 case ATA_DEV_ATAPI:
a0123703 1137 tf.command = ATA_CMD_ID_ATAPI;
49016aca
TH		 1138 break;
1139 default:
1140 rc = -ENODEV;
1141 reason = "unsupported class";
1142 goto err_out;
1da177e4
LT		 1143 }
1144
a0123703 1145 tf.protocol = ATA_PROT_PIO;
1da177e4 1146
a0123703 1147 err_mask = ata_exec_internal(ap, dev, &tf, DMA_FROM_DEVICE,
49016aca 1148 id, sizeof(id[0]) * ATA_ID_WORDS);
a0123703 1149 if (err_mask) {
49016aca
TH		 1150 rc = -EIO;
1151 reason = "I/O error";
1da177e4
LT		 1152 goto err_out;
1153 }
1154
49016aca 1155 swap_buf_le16(id, ATA_ID_WORDS);
1da177e4 1156
49016aca 1157 /* sanity check */
692785e7 1158 if ((class == ATA_DEV_ATA) != (ata_id_is_ata(id) | ata_id_is_cfa(id))) {
49016aca
TH		 1159 rc = -EINVAL;
1160 reason = "device reports illegal type";
1161 goto err_out;
1162 }
1163
1164 if (post_reset && class == ATA_DEV_ATA) {
1165 /*
1166 * The exact sequence expected by certain pre-ATA4 drives is:
1167 * SRST RESET
1168 * IDENTIFY
1169 * INITIALIZE DEVICE PARAMETERS
1170 * anything else..
1171 * Some drives were very specific about that exact sequence.
1172 */
1173 if (ata_id_major_version(id) < 4 || !ata_id_has_lba(id)) {
00b6f5e9 1174 err_mask = ata_dev_init_params(ap, dev, id[3], id[6]);
49016aca
TH		 1175 if (err_mask) {
1176 rc = -EIO;
1177 reason = "INIT_DEV_PARAMS failed";
1178 goto err_out;
1179 }
1180
1181 /* current CHS translation info (id[53-58]) might be
1182 * changed. reread the identify device info.
1183 */
1184 post_reset = 0;
1185 goto retry;
1186 }
1187 }
1188
1189 *p_class = class;
d9572b1d 1190 *p_id = id;
49016aca
TH		 1191 return 0;
1192
1193 err_out:
1194 printk(KERN_WARNING "ata%u: dev %u failed to IDENTIFY (%s)\n",
1195 ap->id, dev->devno, reason);
d9572b1d 1196 kfree(id);
49016aca
TH		 1197 return rc;
1198}
1199
4b2f3ede
TH		 1200static inline u8 ata_dev_knobble(const struct ata_port *ap,
1201 struct ata_device *dev)
1202{
1203 return ((ap->cbl == ATA_CBL_SATA) && (!ata_id_is_sata(dev->id)));
1204}
1205
49016aca 1206/**
ffeae418
TH		 1207 * ata_dev_configure - Configure the specified ATA/ATAPI device
1208 * @ap: Port on which target device resides
1209 * @dev: Target device to configure
4c2d721a 1210 * @print_info: Enable device info printout
ffeae418
TH		 1211 *
1212 * Configure @dev according to @dev->id. Generic and low-level
1213 * driver specific fixups are also applied.
49016aca
TH		 1214 *
1215 * LOCKING:
ffeae418
TH		 1216 * Kernel thread context (may sleep)
1217 *
1218 * RETURNS:
1219 * 0 on success, -errno otherwise
49016aca 1220 */
4c2d721a
TH		 1221static int ata_dev_configure(struct ata_port *ap, struct ata_device *dev,
1222 int print_info)
49016aca 1223{
1148c3a7 1224 const u16 *id = dev->id;
ff8854b2 1225 unsigned int xfer_mask;
49016aca
TH		 1226 int i, rc;
1227
e1211e3f 1228 if (!ata_dev_enabled(dev)) {
49016aca 1229 DPRINTK("ENTER/EXIT (host %u, dev %u) -- nodev\n",
ffeae418
TH		 1230 ap->id, dev->devno);
1231 return 0;
49016aca
TH		 1232 }
1233
ffeae418 1234 DPRINTK("ENTER, host %u, dev %u\n", ap->id, dev->devno);
1da177e4 1235
c39f5ebe
TH		 1236 /* print device capabilities */
1237 if (print_info)
1238 printk(KERN_DEBUG "ata%u: dev %u cfg 49:%04x 82:%04x 83:%04x "
1239 "84:%04x 85:%04x 86:%04x 87:%04x 88:%04x\n",
1240 ap->id, dev->devno, id[49], id[82], id[83],
1241 id[84], id[85], id[86], id[87], id[88]);
1242
208a9933
TH		 1243 /* initialize to-be-configured parameters */
1244 dev->flags = 0;
1245 dev->max_sectors = 0;
1246 dev->cdb_len = 0;
1247 dev->n_sectors = 0;
1248 dev->cylinders = 0;
1249 dev->heads = 0;
1250 dev->sectors = 0;
1251
1da177e4
LT		 1252 /*
1253 * common ATA, ATAPI feature tests
1254 */
1255
ff8854b2 1256 /* find max transfer mode; for printk only */
1148c3a7 1257 xfer_mask = ata_id_xfermask(id);
1da177e4 1258
1148c3a7 1259 ata_dump_id(id);
1da177e4
LT		 1260
1261 /* ATA-specific feature tests */
1262 if (dev->class == ATA_DEV_ATA) {
1148c3a7 1263 dev->n_sectors = ata_id_n_sectors(id);
2940740b 1264
1148c3a7 1265 if (ata_id_has_lba(id)) {
4c2d721a 1266 const char *lba_desc;
8bf62ece 1267
4c2d721a
TH		 1268 lba_desc = "LBA";
1269 dev->flags |= ATA_DFLAG_LBA;
1148c3a7 1270 if (ata_id_has_lba48(id)) {
8bf62ece 1271 dev->flags |= ATA_DFLAG_LBA48;
4c2d721a
TH		 1272 lba_desc = "LBA48";
1273 }
8bf62ece
AL		 1274
1275 /* print device info to dmesg */
4c2d721a
TH		 1276 if (print_info)
1277 printk(KERN_INFO "ata%u: dev %u ATA-%d, "
1278 "max %s, %Lu sectors: %s\n",
1279 ap->id, dev->devno,
1148c3a7 1280 ata_id_major_version(id),
ff8854b2 1281 ata_mode_string(xfer_mask),
4c2d721a
TH		 1282 (unsigned long long)dev->n_sectors,
1283 lba_desc);
ffeae418 1284 } else {
8bf62ece
AL		 1285 /* CHS */
1286
1287 /* Default translation */
1148c3a7
TH		 1288 dev->cylinders = id[1];
1289 dev->heads = id[3];
1290 dev->sectors = id[6];
8bf62ece 1291
1148c3a7 1292 if (ata_id_current_chs_valid(id)) {
8bf62ece 1293 /* Current CHS translation is valid. */
1148c3a7
TH		 1294 dev->cylinders = id[54];
1295 dev->heads = id[55];
1296 dev->sectors = id[56];
8bf62ece
AL		 1297 }
1298
1299 /* print device info to dmesg */
4c2d721a
TH		 1300 if (print_info)
1301 printk(KERN_INFO "ata%u: dev %u ATA-%d, "
1302 "max %s, %Lu sectors: CHS %u/%u/%u\n",
1303 ap->id, dev->devno,
1148c3a7 1304 ata_id_major_version(id),
ff8854b2 1305 ata_mode_string(xfer_mask),
4c2d721a
TH		 1306 (unsigned long long)dev->n_sectors,
1307 dev->cylinders, dev->heads, dev->sectors);
1da177e4
LT		 1308 }
1309
6e7846e9 1310 dev->cdb_len = 16;
1da177e4
LT		 1311 }
1312
1313 /* ATAPI-specific feature tests */
2c13b7ce 1314 else if (dev->class == ATA_DEV_ATAPI) {
1148c3a7 1315 rc = atapi_cdb_len(id);
1da177e4
LT		 1316 if ((rc < 12) || (rc > ATAPI_CDB_LEN)) {
1317 printk(KERN_WARNING "ata%u: unsupported CDB len\n", ap->id);
ffeae418 1318 rc = -EINVAL;
1da177e4
LT		 1319 goto err_out_nosup;
1320 }
6e7846e9 1321 dev->cdb_len = (unsigned int) rc;
1da177e4
LT		 1322
1323 /* print device info to dmesg */
4c2d721a
TH		 1324 if (print_info)
1325 printk(KERN_INFO "ata%u: dev %u ATAPI, max %s\n",
ff8854b2 1326 ap->id, dev->devno, ata_mode_string(xfer_mask));
1da177e4
LT		 1327 }
1328
6e7846e9
TH		 1329 ap->host->max_cmd_len = 0;
1330 for (i = 0; i < ATA_MAX_DEVICES; i++)
1331 ap->host->max_cmd_len = max_t(unsigned int,
1332 ap->host->max_cmd_len,
1333 ap->device[i].cdb_len);
1334
4b2f3ede
TH		 1335 /* limit bridge transfers to udma5, 200 sectors */
1336 if (ata_dev_knobble(ap, dev)) {
4c2d721a
TH		 1337 if (print_info)
1338 printk(KERN_INFO "ata%u(%u): applying bridge limits\n",
1339 ap->id, dev->devno);
5a529139 1340 dev->udma_mask &= ATA_UDMA5;
4b2f3ede
TH		 1341 dev->max_sectors = ATA_MAX_SECTORS;
1342 }
1343
1344 if (ap->ops->dev_config)
1345 ap->ops->dev_config(ap, dev);
1346
1da177e4 1347 DPRINTK("EXIT, drv_stat = 0x%x\n", ata_chk_status(ap));
ffeae418 1348 return 0;
1da177e4
LT		 1349
1350err_out_nosup:
1da177e4 1351 DPRINTK("EXIT, err\n");
ffeae418 1352 return rc;
1da177e4
LT		 1353}
1354
1355/**
1356 * ata_bus_probe - Reset and probe ATA bus
1357 * @ap: Bus to probe
1358 *
0cba632b
JG		 1359 * Master ATA bus probing function. Initiates a hardware-dependent
1360 * bus reset, then attempts to identify any devices found on
1361 * the bus.
1362 *
1da177e4 1363 * LOCKING:
0cba632b 1364 * PCI/etc. bus probe sem.
1da177e4
LT		 1365 *
1366 * RETURNS:
96072e69 1367 * Zero on success, negative errno otherwise.
1da177e4
LT		 1368 */
1369
1370static int ata_bus_probe(struct ata_port *ap)
1371{
28ca5c57 1372 unsigned int classes[ATA_MAX_DEVICES];
96072e69 1373 int i, rc, found = 0;
e82cbdb9 1374 struct ata_device *dev;
1da177e4 1375
28ca5c57 1376 ata_port_probe(ap);
c19ba8af 1377
2044470c
TH		 1378 /* reset and determine device classes */
1379 for (i = 0; i < ATA_MAX_DEVICES; i++)
1380 classes[i] = ATA_DEV_UNKNOWN;
2061a47a 1381
2044470c 1382 if (ap->ops->probe_reset) {
c19ba8af 1383 rc = ap->ops->probe_reset(ap, classes);
28ca5c57
TH		 1384 if (rc) {
1385 printk("ata%u: reset failed (errno=%d)\n", ap->id, rc);
1386 return rc;
c19ba8af 1387 }
28ca5c57 1388 } else {
c19ba8af
TH		 1389 ap->ops->phy_reset(ap);
1390
2044470c
TH		 1391 if (!(ap->flags & ATA_FLAG_PORT_DISABLED))
1392 for (i = 0; i < ATA_MAX_DEVICES; i++)
28ca5c57 1393 classes[i] = ap->device[i].class;
2044470c 1394
28ca5c57
TH		 1395 ata_port_probe(ap);
1396 }
1da177e4 1397
2044470c
TH		 1398 for (i = 0; i < ATA_MAX_DEVICES; i++)
1399 if (classes[i] == ATA_DEV_UNKNOWN)
1400 classes[i] = ATA_DEV_NONE;
1401
28ca5c57 1402 /* read IDENTIFY page and configure devices */
1da177e4 1403 for (i = 0; i < ATA_MAX_DEVICES; i++) {
e82cbdb9 1404 dev = &ap->device[i];
28ca5c57
TH		 1405 dev->class = classes[i];
1406
e1211e3f 1407 if (!ata_dev_enabled(dev))
ffeae418
TH		 1408 continue;
1409
1410 WARN_ON(dev->id != NULL);
1411 if (ata_dev_read_id(ap, dev, &dev->class, 1, &dev->id)) {
1412 dev->class = ATA_DEV_NONE;
1413 continue;
1414 }
1415
4c2d721a 1416 if (ata_dev_configure(ap, dev, 1)) {
fcef978f 1417 ata_dev_disable(ap, dev);
ffeae418 1418 continue;
1da177e4 1419 }
ffeae418 1420
ffeae418 1421 found = 1;
1da177e4
LT		 1422 }
1423
e82cbdb9
TH		 1424 /* configure transfer mode */
1425 if (ap->ops->set_mode) {
1426 /* FIXME: make ->set_mode handle no device case and
1427 * return error code and failing device on failure as
1428 * ata_set_mode() does.
1429 */
1430 if (found)
1431 ap->ops->set_mode(ap);
1432 rc = 0;
1433 } else {
1434 while (ata_set_mode(ap, &dev))
1435 ata_dev_disable(ap, dev);
1436 }
1da177e4 1437
e82cbdb9
TH		 1438 for (i = 0; i < ATA_MAX_DEVICES; i++)
1439 if (ata_dev_enabled(&ap->device[i]))
1440 return 0;
1da177e4 1441
e82cbdb9
TH		 1442 /* no device present, disable port */
1443 ata_port_disable(ap);
1da177e4 1444 ap->ops->port_disable(ap);
96072e69 1445 return -ENODEV;
1da177e4
LT		 1446}
1447
1448/**
0cba632b
JG		 1449 * ata_port_probe - Mark port as enabled
1450 * @ap: Port for which we indicate enablement
1da177e4 1451 *
0cba632b
JG		 1452 * Modify @ap data structure such that the system
1453 * thinks that the entire port is enabled.
1454 *
1455 * LOCKING: host_set lock, or some other form of
1456 * serialization.
1da177e4
LT		 1457 */
1458
1459void ata_port_probe(struct ata_port *ap)
1460{
1461 ap->flags &= ~ATA_FLAG_PORT_DISABLED;
1462}
1463
3be680b7
TH		 1464/**
1465 * sata_print_link_status - Print SATA link status
1466 * @ap: SATA port to printk link status about
1467 *
1468 * This function prints link speed and status of a SATA link.
1469 *
1470 * LOCKING:
1471 * None.
1472 */
1473static void sata_print_link_status(struct ata_port *ap)
1474{
1475 u32 sstatus, tmp;
3be680b7
TH		 1476
1477 if (!ap->ops->scr_read)
1478 return;
1479
1480 sstatus = scr_read(ap, SCR_STATUS);
1481
1482 if (sata_dev_present(ap)) {
1483 tmp = (sstatus >> 4) & 0xf;
4c360c81
TH		 1484 printk(KERN_INFO "ata%u: SATA link up %s (SStatus %X)\n",
1485 ap->id, sata_spd_string(tmp), sstatus);
3be680b7
TH		 1486 } else {
1487 printk(KERN_INFO "ata%u: SATA link down (SStatus %X)\n",
1488 ap->id, sstatus);
1489 }
1490}
1491
1da177e4 1492/**
780a87f7
JG		 1493 * __sata_phy_reset - Wake/reset a low-level SATA PHY
1494 * @ap: SATA port associated with target SATA PHY.
1da177e4 1495 *
780a87f7
JG		 1496 * This function issues commands to standard SATA Sxxx
1497 * PHY registers, to wake up the phy (and device), and
1498 * clear any reset condition.
1da177e4
LT		 1499 *
1500 * LOCKING:
0cba632b 1501 * PCI/etc. bus probe sem.
1da177e4
LT		 1502 *
1503 */
1504void __sata_phy_reset(struct ata_port *ap)
1505{
1506 u32 sstatus;
1507 unsigned long timeout = jiffies + (HZ * 5);
1508
1509 if (ap->flags & ATA_FLAG_SATA_RESET) {
cdcca89e
BR		 1510 /* issue phy wake/reset */
1511 scr_write_flush(ap, SCR_CONTROL, 0x301);
62ba2841
TH		 1512 /* Couldn't find anything in SATA I/II specs, but
1513 * AHCI-1.1 10.4.2 says at least 1 ms. */
1514 mdelay(1);
1da177e4 1515 }
cdcca89e 1516 scr_write_flush(ap, SCR_CONTROL, 0x300); /* phy wake/clear reset */
1da177e4
LT		 1517
1518 /* wait for phy to become ready, if necessary */
1519 do {
1520 msleep(200);
1521 sstatus = scr_read(ap, SCR_STATUS);
1522 if ((sstatus & 0xf) != 1)
1523 break;
1524 } while (time_before(jiffies, timeout));
1525
3be680b7
TH		 1526 /* print link status */
1527 sata_print_link_status(ap);
656563e3 1528
3be680b7
TH		 1529 /* TODO: phy layer with polling, timeouts, etc. */
1530 if (sata_dev_present(ap))
1da177e4 1531 ata_port_probe(ap);
3be680b7 1532 else
1da177e4 1533 ata_port_disable(ap);
1da177e4
LT		 1534
1535 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1536 return;
1537
1538 if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) {
1539 ata_port_disable(ap);
1540 return;
1541 }
1542
1543 ap->cbl = ATA_CBL_SATA;
1544}
1545
1546/**
780a87f7
JG		 1547 * sata_phy_reset - Reset SATA bus.
1548 * @ap: SATA port associated with target SATA PHY.
1da177e4 1549 *
780a87f7
JG		 1550 * This function resets the SATA bus, and then probes
1551 * the bus for devices.
1da177e4
LT		 1552 *
1553 * LOCKING:
0cba632b 1554 * PCI/etc. bus probe sem.
1da177e4
LT		 1555 *
1556 */
1557void sata_phy_reset(struct ata_port *ap)
1558{
1559 __sata_phy_reset(ap);
1560 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1561 return;
1562 ata_bus_reset(ap);
1563}
1564
ebdfca6e
AC		 1565/**
1566 * ata_dev_pair - return other device on cable
1567 * @ap: port
1568 * @adev: device
1569 *
1570 * Obtain the other device on the same cable, or if none is
1571 * present NULL is returned
1572 */
2e9edbf8 1573
ebdfca6e
AC		 1574struct ata_device *ata_dev_pair(struct ata_port *ap, struct ata_device *adev)
1575{
1576 struct ata_device *pair = &ap->device[1 - adev->devno];
e1211e3f 1577 if (!ata_dev_enabled(pair))
ebdfca6e
AC		 1578 return NULL;
1579 return pair;
1580}
1581
1da177e4 1582/**
780a87f7
JG		 1583 * ata_port_disable - Disable port.
1584 * @ap: Port to be disabled.
1da177e4 1585 *
780a87f7
JG		 1586 * Modify @ap data structure such that the system
1587 * thinks that the entire port is disabled, and should
1588 * never attempt to probe or communicate with devices
1589 * on this port.
1590 *
1591 * LOCKING: host_set lock, or some other form of
1592 * serialization.
1da177e4
LT		 1593 */
1594
1595void ata_port_disable(struct ata_port *ap)
1596{
1597 ap->device[0].class = ATA_DEV_NONE;
1598 ap->device[1].class = ATA_DEV_NONE;
1599 ap->flags |= ATA_FLAG_PORT_DISABLED;
1600}
1601
1c3fae4d
TH		 1602/**
1603 * ata_down_sata_spd_limit - adjust SATA spd limit downward
1604 * @ap: Port to adjust SATA spd limit for
1605 *
1606 * Adjust SATA spd limit of @ap downward. Note that this
1607 * function only adjusts the limit. The change must be applied
1608 * using ata_set_sata_spd().
1609 *
1610 * LOCKING:
1611 * Inherited from caller.
1612 *
1613 * RETURNS:
1614 * 0 on success, negative errno on failure
1615 */
1616static int ata_down_sata_spd_limit(struct ata_port *ap)
1617{
1618 u32 spd, mask;
1619 int highbit;
1620
1621 if (ap->cbl != ATA_CBL_SATA || !ap->ops->scr_read)
1622 return -EOPNOTSUPP;
1623
1624 mask = ap->sata_spd_limit;
1625 if (mask <= 1)
1626 return -EINVAL;
1627 highbit = fls(mask) - 1;
1628 mask &= ~(1 << highbit);
1629
1630 spd = (scr_read(ap, SCR_STATUS) >> 4) & 0xf;
1631 if (spd <= 1)
1632 return -EINVAL;
1633 spd--;
1634 mask &= (1 << spd) - 1;
1635 if (!mask)
1636 return -EINVAL;
1637
1638 ap->sata_spd_limit = mask;
1639
1640 printk(KERN_WARNING "ata%u: limiting SATA link speed to %s\n",
1641 ap->id, sata_spd_string(fls(mask)));
1642
1643 return 0;
1644}
1645
1646static int __ata_set_sata_spd_needed(struct ata_port *ap, u32 *scontrol)
1647{
1648 u32 spd, limit;
1649
1650 if (ap->sata_spd_limit == UINT_MAX)
1651 limit = 0;
1652 else
1653 limit = fls(ap->sata_spd_limit);
1654
1655 spd = (*scontrol >> 4) & 0xf;
1656 *scontrol = (*scontrol & ~0xf0) | ((limit & 0xf) << 4);
1657
1658 return spd != limit;
1659}
1660
1661/**
1662 * ata_set_sata_spd_needed - is SATA spd configuration needed
1663 * @ap: Port in question
1664 *
1665 * Test whether the spd limit in SControl matches
1666 * @ap->sata_spd_limit. This function is used to determine
1667 * whether hardreset is necessary to apply SATA spd
1668 * configuration.
1669 *
1670 * LOCKING:
1671 * Inherited from caller.
1672 *
1673 * RETURNS:
1674 * 1 if SATA spd configuration is needed, 0 otherwise.
1675 */
1676static int ata_set_sata_spd_needed(struct ata_port *ap)
1677{
1678 u32 scontrol;
1679
1680 if (ap->cbl != ATA_CBL_SATA || !ap->ops->scr_read)
1681 return 0;
1682
1683 scontrol = scr_read(ap, SCR_CONTROL);
1684
1685 return __ata_set_sata_spd_needed(ap, &scontrol);
1686}
1687
1688/**
1689 * ata_set_sata_spd - set SATA spd according to spd limit
1690 * @ap: Port to set SATA spd for
1691 *
1692 * Set SATA spd of @ap according to sata_spd_limit.
1693 *
1694 * LOCKING:
1695 * Inherited from caller.
1696 *
1697 * RETURNS:
1698 * 0 if spd doesn't need to be changed, 1 if spd has been
1699 * changed. -EOPNOTSUPP if SCR registers are inaccessible.
1700 */
1701static int ata_set_sata_spd(struct ata_port *ap)
1702{
1703 u32 scontrol;
1704
1705 if (ap->cbl != ATA_CBL_SATA || !ap->ops->scr_read)
1706 return -EOPNOTSUPP;
1707
1708 scontrol = scr_read(ap, SCR_CONTROL);
1709 if (!__ata_set_sata_spd_needed(ap, &scontrol))
1710 return 0;
1711
1712 scr_write(ap, SCR_CONTROL, scontrol);
1713 return 1;
1714}
1715
452503f9
AC		 1716/*
1717 * This mode timing computation functionality is ported over from
1718 * drivers/ide/ide-timing.h and was originally written by Vojtech Pavlik
1719 */
1720/*
1721 * PIO 0-5, MWDMA 0-2 and UDMA 0-6 timings (in nanoseconds).
1722 * These were taken from ATA/ATAPI-6 standard, rev 0a, except
1723 * for PIO 5, which is a nonstandard extension and UDMA6, which
2e9edbf8 1724 * is currently supported only by Maxtor drives.
452503f9
AC		 1725 */
1726
1727static const struct ata_timing ata_timing[] = {
1728
1729 { XFER_UDMA_6, 0, 0, 0, 0, 0, 0, 0, 15 },
1730 { XFER_UDMA_5, 0, 0, 0, 0, 0, 0, 0, 20 },
1731 { XFER_UDMA_4, 0, 0, 0, 0, 0, 0, 0, 30 },
1732 { XFER_UDMA_3, 0, 0, 0, 0, 0, 0, 0, 45 },
1733
1734 { XFER_UDMA_2, 0, 0, 0, 0, 0, 0, 0, 60 },
1735 { XFER_UDMA_1, 0, 0, 0, 0, 0, 0, 0, 80 },
1736 { XFER_UDMA_0, 0, 0, 0, 0, 0, 0, 0, 120 },
1737
1738/* { XFER_UDMA_SLOW, 0, 0, 0, 0, 0, 0, 0, 150 }, */
2e9edbf8 1739
452503f9
AC		 1740 { XFER_MW_DMA_2, 25, 0, 0, 0, 70, 25, 120, 0 },
1741 { XFER_MW_DMA_1, 45, 0, 0, 0, 80, 50, 150, 0 },
1742 { XFER_MW_DMA_0, 60, 0, 0, 0, 215, 215, 480, 0 },
2e9edbf8 1743
452503f9
AC		 1744 { XFER_SW_DMA_2, 60, 0, 0, 0, 120, 120, 240, 0 },
1745 { XFER_SW_DMA_1, 90, 0, 0, 0, 240, 240, 480, 0 },
1746 { XFER_SW_DMA_0, 120, 0, 0, 0, 480, 480, 960, 0 },
1747
1748/* { XFER_PIO_5, 20, 50, 30, 100, 50, 30, 100, 0 }, */
1749 { XFER_PIO_4, 25, 70, 25, 120, 70, 25, 120, 0 },
1750 { XFER_PIO_3, 30, 80, 70, 180, 80, 70, 180, 0 },
1751
1752 { XFER_PIO_2, 30, 290, 40, 330, 100, 90, 240, 0 },
1753 { XFER_PIO_1, 50, 290, 93, 383, 125, 100, 383, 0 },
1754 { XFER_PIO_0, 70, 290, 240, 600, 165, 150, 600, 0 },
1755
1756/* { XFER_PIO_SLOW, 120, 290, 240, 960, 290, 240, 960, 0 }, */
1757
1758 { 0xFF }
1759};
1760
1761#define ENOUGH(v,unit) (((v)-1)/(unit)+1)
1762#define EZ(v,unit) ((v)?ENOUGH(v,unit):0)
1763
1764static void ata_timing_quantize(const struct ata_timing *t, struct ata_timing *q, int T, int UT)
1765{
1766 q->setup = EZ(t->setup * 1000, T);
1767 q->act8b = EZ(t->act8b * 1000, T);
1768 q->rec8b = EZ(t->rec8b * 1000, T);
1769 q->cyc8b = EZ(t->cyc8b * 1000, T);
1770 q->active = EZ(t->active * 1000, T);
1771 q->recover = EZ(t->recover * 1000, T);
1772 q->cycle = EZ(t->cycle * 1000, T);
1773 q->udma = EZ(t->udma * 1000, UT);
1774}
1775
1776void ata_timing_merge(const struct ata_timing *a, const struct ata_timing *b,
1777 struct ata_timing *m, unsigned int what)
1778{
1779 if (what & ATA_TIMING_SETUP ) m->setup = max(a->setup, b->setup);
1780 if (what & ATA_TIMING_ACT8B ) m->act8b = max(a->act8b, b->act8b);
1781 if (what & ATA_TIMING_REC8B ) m->rec8b = max(a->rec8b, b->rec8b);
1782 if (what & ATA_TIMING_CYC8B ) m->cyc8b = max(a->cyc8b, b->cyc8b);
1783 if (what & ATA_TIMING_ACTIVE ) m->active = max(a->active, b->active);
1784 if (what & ATA_TIMING_RECOVER) m->recover = max(a->recover, b->recover);
1785 if (what & ATA_TIMING_CYCLE ) m->cycle = max(a->cycle, b->cycle);
1786 if (what & ATA_TIMING_UDMA ) m->udma = max(a->udma, b->udma);
1787}
1788
1789static const struct ata_timing* ata_timing_find_mode(unsigned short speed)
1790{
1791 const struct ata_timing *t;
1792
1793 for (t = ata_timing; t->mode != speed; t++)
91190758 1794 if (t->mode == 0xFF)
452503f9 1795 return NULL;
2e9edbf8 1796 return t;
452503f9
AC		 1797}
1798
1799int ata_timing_compute(struct ata_device *adev, unsigned short speed,
1800 struct ata_timing *t, int T, int UT)
1801{
1802 const struct ata_timing *s;
1803 struct ata_timing p;
1804
1805 /*
2e9edbf8 1806 * Find the mode.
75b1f2f8 1807 */
452503f9
AC		 1808
1809 if (!(s = ata_timing_find_mode(speed)))
1810 return -EINVAL;
1811
75b1f2f8
AL		 1812 memcpy(t, s, sizeof(*s));
1813
452503f9
AC		 1814 /*
1815 * If the drive is an EIDE drive, it can tell us it needs extended
1816 * PIO/MW_DMA cycle timing.
1817 */
1818
1819 if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE drive */
1820 memset(&p, 0, sizeof(p));
1821 if(speed >= XFER_PIO_0 && speed <= XFER_SW_DMA_0) {
1822 if (speed <= XFER_PIO_2) p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO];
1823 else p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO_IORDY];
1824 } else if(speed >= XFER_MW_DMA_0 && speed <= XFER_MW_DMA_2) {
1825 p.cycle = adev->id[ATA_ID_EIDE_DMA_MIN];
1826 }
1827 ata_timing_merge(&p, t, t, ATA_TIMING_CYCLE | ATA_TIMING_CYC8B);
1828 }
1829
1830 /*
1831 * Convert the timing to bus clock counts.
1832 */
1833
75b1f2f8 1834 ata_timing_quantize(t, t, T, UT);
452503f9
AC		 1835
1836 /*
c893a3ae
RD		 1837 * Even in DMA/UDMA modes we still use PIO access for IDENTIFY,
1838 * S.M.A.R.T * and some other commands. We have to ensure that the
1839 * DMA cycle timing is slower/equal than the fastest PIO timing.
452503f9
AC		 1840 */
1841
1842 if (speed > XFER_PIO_4) {
1843 ata_timing_compute(adev, adev->pio_mode, &p, T, UT);
1844 ata_timing_merge(&p, t, t, ATA_TIMING_ALL);
1845 }
1846
1847 /*
c893a3ae 1848 * Lengthen active & recovery time so that cycle time is correct.
452503f9
AC		 1849 */
1850
1851 if (t->act8b + t->rec8b < t->cyc8b) {
1852 t->act8b += (t->cyc8b - (t->act8b + t->rec8b)) / 2;
1853 t->rec8b = t->cyc8b - t->act8b;
1854 }
1855
1856 if (t->active + t->recover < t->cycle) {
1857 t->active += (t->cycle - (t->active + t->recover)) / 2;
1858 t->recover = t->cycle - t->active;
1859 }
1860
1861 return 0;
1862}
1863
cf176e1a
TH		 1864/**
1865 * ata_down_xfermask_limit - adjust dev xfer masks downward
1866 * @ap: Port associated with device @dev
1867 * @dev: Device to adjust xfer masks
1868 * @force_pio0: Force PIO0
1869 *
1870 * Adjust xfer masks of @dev downward. Note that this function
1871 * does not apply the change. Invoking ata_set_mode() afterwards
1872 * will apply the limit.
1873 *
1874 * LOCKING:
1875 * Inherited from caller.
1876 *
1877 * RETURNS:
1878 * 0 on success, negative errno on failure
1879 */
1880static int ata_down_xfermask_limit(struct ata_port *ap, struct ata_device *dev,
1881 int force_pio0)
1882{
1883 unsigned long xfer_mask;
1884 int highbit;
1885
1886 xfer_mask = ata_pack_xfermask(dev->pio_mask, dev->mwdma_mask,
1887 dev->udma_mask);
1888
1889 if (!xfer_mask)
1890 goto fail;
1891 /* don't gear down to MWDMA from UDMA, go directly to PIO */
1892 if (xfer_mask & ATA_MASK_UDMA)
1893 xfer_mask &= ~ATA_MASK_MWDMA;
1894
1895 highbit = fls(xfer_mask) - 1;
1896 xfer_mask &= ~(1 << highbit);
1897 if (force_pio0)
1898 xfer_mask &= 1 << ATA_SHIFT_PIO;
1899 if (!xfer_mask)
1900 goto fail;
1901
1902 ata_unpack_xfermask(xfer_mask, &dev->pio_mask, &dev->mwdma_mask,
1903 &dev->udma_mask);
1904
1905 printk(KERN_WARNING "ata%u: dev %u limiting speed to %s\n",
1906 ap->id, dev->devno, ata_mode_string(xfer_mask));
1907
1908 return 0;
1909
1910 fail:
1911 return -EINVAL;
1912}
1913
83206a29 1914static int ata_dev_set_mode(struct ata_port *ap, struct ata_device *dev)
1da177e4 1915{
83206a29
TH		 1916 unsigned int err_mask;
1917 int rc;
1da177e4
LT		 1918
1919 if (dev->xfer_shift == ATA_SHIFT_PIO)
1920 dev->flags |= ATA_DFLAG_PIO;
1921
83206a29
TH		 1922 err_mask = ata_dev_set_xfermode(ap, dev);
1923 if (err_mask) {
1924 printk(KERN_ERR
1925 "ata%u: failed to set xfermode (err_mask=0x%x)\n",
1926 ap->id, err_mask);
1927 return -EIO;
1928 }
1da177e4 1929
83206a29
TH		 1930 rc = ata_dev_revalidate(ap, dev, 0);
1931 if (rc) {
1932 printk(KERN_ERR
1933 "ata%u: failed to revalidate after set xfermode\n",
1934 ap->id);
1935 return rc;
48a8a14f
TH		 1936 }
1937
23e71c3d
TH		 1938 DPRINTK("xfer_shift=%u, xfer_mode=0x%x\n",
1939 dev->xfer_shift, (int)dev->xfer_mode);
1da177e4
LT		 1940
1941 printk(KERN_INFO "ata%u: dev %u configured for %s\n",
23e71c3d
TH		 1942 ap->id, dev->devno,
1943 ata_mode_string(ata_xfer_mode2mask(dev->xfer_mode)));
83206a29 1944 return 0;
1da177e4
LT		 1945}
1946
1da177e4
LT		 1947/**
1948 * ata_set_mode - Program timings and issue SET FEATURES - XFER
1949 * @ap: port on which timings will be programmed
e82cbdb9 1950 * @r_failed_dev: out paramter for failed device
1da177e4 1951 *
e82cbdb9
TH		 1952 * Set ATA device disk transfer mode (PIO3, UDMA6, etc.). If
1953 * ata_set_mode() fails, pointer to the failing device is
1954 * returned in @r_failed_dev.
780a87f7 1955 *
1da177e4 1956 * LOCKING:
0cba632b 1957 * PCI/etc. bus probe sem.
e82cbdb9
TH		 1958 *
1959 * RETURNS:
1960 * 0 on success, negative errno otherwise
1da177e4 1961 */
e82cbdb9 1962static int ata_set_mode(struct ata_port *ap, struct ata_device **r_failed_dev)
1da177e4 1963{
e8e0619f 1964 struct ata_device *dev;
e82cbdb9 1965 int i, rc = 0, used_dma = 0, found = 0;
1da177e4 1966
a6d5a51c
TH		 1967 /* step 1: calculate xfer_mask */
1968 for (i = 0; i < ATA_MAX_DEVICES; i++) {
acf356b1 1969 unsigned int pio_mask, dma_mask;
a6d5a51c 1970
e8e0619f
TH		 1971 dev = &ap->device[i];
1972
e1211e3f 1973 if (!ata_dev_enabled(dev))
a6d5a51c
TH		 1974 continue;
1975
acf356b1 1976 ata_dev_xfermask(ap, dev);
1da177e4 1977
acf356b1
TH		 1978 pio_mask = ata_pack_xfermask(dev->pio_mask, 0, 0);
1979 dma_mask = ata_pack_xfermask(0, dev->mwdma_mask, dev->udma_mask);
1980 dev->pio_mode = ata_xfer_mask2mode(pio_mask);
1981 dev->dma_mode = ata_xfer_mask2mode(dma_mask);
5444a6f4 1982
4f65977d 1983 found = 1;
5444a6f4
AC		 1984 if (dev->dma_mode)
1985 used_dma = 1;
a6d5a51c 1986 }
4f65977d 1987 if (!found)
e82cbdb9 1988 goto out;
a6d5a51c
TH		 1989
1990 /* step 2: always set host PIO timings */
e8e0619f
TH		 1991 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1992 dev = &ap->device[i];
1993 if (!ata_dev_enabled(dev))
1994 continue;
1995
1996 if (!dev->pio_mode) {
1997 printk(KERN_WARNING "ata%u: dev %u no PIO support\n",
1998 ap->id, dev->devno);
1999 rc = -EINVAL;
e82cbdb9 2000 goto out;
e8e0619f
TH		 2001 }
2002
2003 dev->xfer_mode = dev->pio_mode;
2004 dev->xfer_shift = ATA_SHIFT_PIO;
2005 if (ap->ops->set_piomode)
2006 ap->ops->set_piomode(ap, dev);
2007 }
1da177e4 2008
a6d5a51c 2009 /* step 3: set host DMA timings */
e8e0619f
TH		 2010 for (i = 0; i < ATA_MAX_DEVICES; i++) {
2011 dev = &ap->device[i];
2012
2013 if (!ata_dev_enabled(dev) || !dev->dma_mode)
2014 continue;
2015
2016 dev->xfer_mode = dev->dma_mode;
2017 dev->xfer_shift = ata_xfer_mode2shift(dev->dma_mode);
2018 if (ap->ops->set_dmamode)
2019 ap->ops->set_dmamode(ap, dev);
2020 }
1da177e4
LT		 2021
2022 /* step 4: update devices' xfer mode */
83206a29 2023 for (i = 0; i < ATA_MAX_DEVICES; i++) {
e8e0619f 2024 dev = &ap->device[i];
1da177e4 2025
e1211e3f 2026 if (!ata_dev_enabled(dev))
83206a29
TH		 2027 continue;
2028
5bbc53f4
TH		 2029 rc = ata_dev_set_mode(ap, dev);
2030 if (rc)
e82cbdb9 2031 goto out;
83206a29 2032 }
1da177e4 2033
e8e0619f
TH		 2034 /* Record simplex status. If we selected DMA then the other
2035 * host channels are not permitted to do so.
5444a6f4 2036 */
5444a6f4
AC		 2037 if (used_dma && (ap->host_set->flags & ATA_HOST_SIMPLEX))
2038 ap->host_set->simplex_claimed = 1;
2039
e8e0619f 2040 /* step5: chip specific finalisation */
1da177e4
LT		 2041 if (ap->ops->post_set_mode)
2042 ap->ops->post_set_mode(ap);
2043
e82cbdb9
TH		 2044 out:
2045 if (rc)
2046 *r_failed_dev = dev;
2047 return rc;
1da177e4
LT		 2048}
2049
1fdffbce
JG		 2050/**
2051 * ata_tf_to_host - issue ATA taskfile to host controller
2052 * @ap: port to which command is being issued
2053 * @tf: ATA taskfile register set
2054 *
2055 * Issues ATA taskfile register set to ATA host controller,
2056 * with proper synchronization with interrupt handler and
2057 * other threads.
2058 *
2059 * LOCKING:
2060 * spin_lock_irqsave(host_set lock)
2061 */
2062
2063static inline void ata_tf_to_host(struct ata_port *ap,
2064 const struct ata_taskfile *tf)
2065{
2066 ap->ops->tf_load(ap, tf);
2067 ap->ops->exec_command(ap, tf);
2068}
2069
1da177e4
LT		 2070/**
2071 * ata_busy_sleep - sleep until BSY clears, or timeout
2072 * @ap: port containing status register to be polled
2073 * @tmout_pat: impatience timeout
2074 * @tmout: overall timeout
2075 *
780a87f7
JG		 2076 * Sleep until ATA Status register bit BSY clears,
2077 * or a timeout occurs.
2078 *
2079 * LOCKING: None.
1da177e4
LT		 2080 */
2081
6f8b9958
TH		 2082unsigned int ata_busy_sleep (struct ata_port *ap,
2083 unsigned long tmout_pat, unsigned long tmout)
1da177e4
LT		 2084{
2085 unsigned long timer_start, timeout;
2086 u8 status;
2087
2088 status = ata_busy_wait(ap, ATA_BUSY, 300);
2089 timer_start = jiffies;
2090 timeout = timer_start + tmout_pat;
2091 while ((status & ATA_BUSY) && (time_before(jiffies, timeout))) {
2092 msleep(50);
2093 status = ata_busy_wait(ap, ATA_BUSY, 3);
2094 }
2095
2096 if (status & ATA_BUSY)
2097 printk(KERN_WARNING "ata%u is slow to respond, "
2098 "please be patient\n", ap->id);
2099
2100 timeout = timer_start + tmout;
2101 while ((status & ATA_BUSY) && (time_before(jiffies, timeout))) {
2102 msleep(50);
2103 status = ata_chk_status(ap);
2104 }
2105
2106 if (status & ATA_BUSY) {
2107 printk(KERN_ERR "ata%u failed to respond (%lu secs)\n",
2108 ap->id, tmout / HZ);
2109 return 1;
2110 }
2111
2112 return 0;
2113}
2114
2115static void ata_bus_post_reset(struct ata_port *ap, unsigned int devmask)
2116{
2117 struct ata_ioports *ioaddr = &ap->ioaddr;
2118 unsigned int dev0 = devmask & (1 << 0);
2119 unsigned int dev1 = devmask & (1 << 1);
2120 unsigned long timeout;
2121
2122 /* if device 0 was found in ata_devchk, wait for its
2123 * BSY bit to clear
2124 */
2125 if (dev0)
2126 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
2127
2128 /* if device 1 was found in ata_devchk, wait for
2129 * register access, then wait for BSY to clear
2130 */
2131 timeout = jiffies + ATA_TMOUT_BOOT;
2132 while (dev1) {
2133 u8 nsect, lbal;
2134
2135 ap->ops->dev_select(ap, 1);
2136 if (ap->flags & ATA_FLAG_MMIO) {
2137 nsect = readb((void __iomem *) ioaddr->nsect_addr);
2138 lbal = readb((void __iomem *) ioaddr->lbal_addr);
2139 } else {
2140 nsect = inb(ioaddr->nsect_addr);
2141 lbal = inb(ioaddr->lbal_addr);
2142 }
2143 if ((nsect == 1) && (lbal == 1))
2144 break;
2145 if (time_after(jiffies, timeout)) {
2146 dev1 = 0;
2147 break;
2148 }
2149 msleep(50); /* give drive a breather */
2150 }
2151 if (dev1)
2152 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
2153
2154 /* is all this really necessary? */
2155 ap->ops->dev_select(ap, 0);
2156 if (dev1)
2157 ap->ops->dev_select(ap, 1);
2158 if (dev0)
2159 ap->ops->dev_select(ap, 0);
2160}
2161
1da177e4
LT		 2162static unsigned int ata_bus_softreset(struct ata_port *ap,
2163 unsigned int devmask)
2164{
2165 struct ata_ioports *ioaddr = &ap->ioaddr;
2166
2167 DPRINTK("ata%u: bus reset via SRST\n", ap->id);
2168
2169 /* software reset. causes dev0 to be selected */
2170 if (ap->flags & ATA_FLAG_MMIO) {
2171 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
2172 udelay(20); /* FIXME: flush */
2173 writeb(ap->ctl | ATA_SRST, (void __iomem *) ioaddr->ctl_addr);
2174 udelay(20); /* FIXME: flush */
2175 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
2176 } else {
2177 outb(ap->ctl, ioaddr->ctl_addr);
2178 udelay(10);
2179 outb(ap->ctl | ATA_SRST, ioaddr->ctl_addr);
2180 udelay(10);
2181 outb(ap->ctl, ioaddr->ctl_addr);
2182 }
2183
2184 /* spec mandates ">= 2ms" before checking status.
2185 * We wait 150ms, because that was the magic delay used for
2186 * ATAPI devices in Hale Landis's ATADRVR, for the period of time
2187 * between when the ATA command register is written, and then
2188 * status is checked. Because waiting for "a while" before
2189 * checking status is fine, post SRST, we perform this magic
2190 * delay here as well.
09c7ad79
AC		 2191 *
2192 * Old drivers/ide uses the 2mS rule and then waits for ready
1da177e4
LT		 2193 */
2194 msleep(150);
2195
2e9edbf8 2196 /* Before we perform post reset processing we want to see if
298a41ca
TH		 2197 * the bus shows 0xFF because the odd clown forgets the D7
2198 * pulldown resistor.
2199 */
09c7ad79 2200 if (ata_check_status(ap) == 0xFF)
298a41ca 2201 return AC_ERR_OTHER;
09c7ad79 2202
1da177e4
LT		 2203 ata_bus_post_reset(ap, devmask);
2204
2205 return 0;
2206}
2207
2208/**
2209 * ata_bus_reset - reset host port and associated ATA channel
2210 * @ap: port to reset
2211 *
2212 * This is typically the first time we actually start issuing
2213 * commands to the ATA channel. We wait for BSY to clear, then
2214 * issue EXECUTE DEVICE DIAGNOSTIC command, polling for its
2215 * result. Determine what devices, if any, are on the channel
2216 * by looking at the device 0/1 error register. Look at the signature
2217 * stored in each device's taskfile registers, to determine if
2218 * the device is ATA or ATAPI.
2219 *
2220 * LOCKING:
0cba632b
JG		 2221 * PCI/etc. bus probe sem.
2222 * Obtains host_set lock.
1da177e4
LT		 2223 *
2224 * SIDE EFFECTS:
2225 * Sets ATA_FLAG_PORT_DISABLED if bus reset fails.
2226 */
2227
2228void ata_bus_reset(struct ata_port *ap)
2229{
2230 struct ata_ioports *ioaddr = &ap->ioaddr;
2231 unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
2232 u8 err;
aec5c3c1 2233 unsigned int dev0, dev1 = 0, devmask = 0;
1da177e4
LT		 2234
2235 DPRINTK("ENTER, host %u, port %u\n", ap->id, ap->port_no);
2236
2237 /* determine if device 0/1 are present */
2238 if (ap->flags & ATA_FLAG_SATA_RESET)
2239 dev0 = 1;
2240 else {
2241 dev0 = ata_devchk(ap, 0);
2242 if (slave_possible)
2243 dev1 = ata_devchk(ap, 1);
2244 }
2245
2246 if (dev0)
2247 devmask |= (1 << 0);
2248 if (dev1)
2249 devmask |= (1 << 1);
2250
2251 /* select device 0 again */
2252 ap->ops->dev_select(ap, 0);
2253
2254 /* issue bus reset */
2255 if (ap->flags & ATA_FLAG_SRST)
aec5c3c1
TH		 2256 if (ata_bus_softreset(ap, devmask))
2257 goto err_out;
1da177e4
LT		 2258
2259 /*
2260 * determine by signature whether we have ATA or ATAPI devices
2261 */
b4dc7623 2262 ap->device[0].class = ata_dev_try_classify(ap, 0, &err);
1da177e4 2263 if ((slave_possible) && (err != 0x81))
b4dc7623 2264 ap->device[1].class = ata_dev_try_classify(ap, 1, &err);
1da177e4
LT		 2265
2266 /* re-enable interrupts */
2267 if (ap->ioaddr.ctl_addr) /* FIXME: hack. create a hook instead */
2268 ata_irq_on(ap);
2269
2270 /* is double-select really necessary? */
2271 if (ap->device[1].class != ATA_DEV_NONE)
2272 ap->ops->dev_select(ap, 1);
2273 if (ap->device[0].class != ATA_DEV_NONE)
2274 ap->ops->dev_select(ap, 0);
2275
2276 /* if no devices were detected, disable this port */
2277 if ((ap->device[0].class == ATA_DEV_NONE) &&
2278 (ap->device[1].class == ATA_DEV_NONE))
2279 goto err_out;
2280
2281 if (ap->flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST)) {
2282 /* set up device control for ATA_FLAG_SATA_RESET */
2283 if (ap->flags & ATA_FLAG_MMIO)
2284 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
2285 else
2286 outb(ap->ctl, ioaddr->ctl_addr);
2287 }
2288
2289 DPRINTK("EXIT\n");
2290 return;
2291
2292err_out:
2293 printk(KERN_ERR "ata%u: disabling port\n", ap->id);
2294 ap->ops->port_disable(ap);
2295
2296 DPRINTK("EXIT\n");
2297}
2298
7a7921e8
TH		 2299static int sata_phy_resume(struct ata_port *ap)
2300{
2301 unsigned long timeout = jiffies + (HZ * 5);
852ee16a 2302 u32 scontrol, sstatus;
7a7921e8 2303
852ee16a
TH		 2304 scontrol = scr_read(ap, SCR_CONTROL);
2305 scontrol = (scontrol & 0x0f0) | 0x300;
2306 scr_write_flush(ap, SCR_CONTROL, scontrol);
7a7921e8
TH		 2307
2308 /* Wait for phy to become ready, if necessary. */
2309 do {
2310 msleep(200);
2311 sstatus = scr_read(ap, SCR_STATUS);
2312 if ((sstatus & 0xf) != 1)
2313 return 0;
2314 } while (time_before(jiffies, timeout));
2315
2316 return -1;
2317}
2318
8a19ac89
TH		 2319/**
2320 * ata_std_probeinit - initialize probing
2321 * @ap: port to be probed
2322 *
2323 * @ap is about to be probed. Initialize it. This function is
2324 * to be used as standard callback for ata_drive_probe_reset().
3a39746a
TH		 2325 *
2326 * NOTE!!! Do not use this function as probeinit if a low level
2327 * driver implements only hardreset. Just pass NULL as probeinit
2328 * in that case. Using this function is probably okay but doing
2329 * so makes reset sequence different from the original
2330 * ->phy_reset implementation and Jeff nervous. :-P
8a19ac89 2331 */
17efc5f7 2332void ata_std_probeinit(struct ata_port *ap)
8a19ac89 2333{
17efc5f7 2334 if ((ap->flags & ATA_FLAG_SATA) && ap->ops->scr_read) {
1c3fae4d
TH		 2335 u32 spd;
2336
8a19ac89 2337 sata_phy_resume(ap);
1c3fae4d
TH		 2338
2339 spd = (scr_read(ap, SCR_CONTROL) & 0xf0) >> 4;
2340 if (spd)
2341 ap->sata_spd_limit &= (1 << spd) - 1;
2342
3a39746a
TH		 2343 if (sata_dev_present(ap))
2344 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
2345 }
8a19ac89
TH		 2346}
2347
c2bd5804
TH		 2348/**
2349 * ata_std_softreset - reset host port via ATA SRST
2350 * @ap: port to reset
2351 * @verbose: fail verbosely
2352 * @classes: resulting classes of attached devices
2353 *
2354 * Reset host port using ATA SRST. This function is to be used
2355 * as standard callback for ata_drive_*_reset() functions.
2356 *
2357 * LOCKING:
2358 * Kernel thread context (may sleep)
2359 *
2360 * RETURNS:
2361 * 0 on success, -errno otherwise.
2362 */
2363int ata_std_softreset(struct ata_port *ap, int verbose, unsigned int *classes)
2364{
2365 unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
2366 unsigned int devmask = 0, err_mask;
2367 u8 err;
2368
2369 DPRINTK("ENTER\n");
2370
3a39746a
TH		 2371 if (ap->ops->scr_read && !sata_dev_present(ap)) {
2372 classes[0] = ATA_DEV_NONE;
2373 goto out;
2374 }
2375
c2bd5804
TH		 2376 /* determine if device 0/1 are present */
2377 if (ata_devchk(ap, 0))
2378 devmask |= (1 << 0);
2379 if (slave_possible && ata_devchk(ap, 1))
2380 devmask |= (1 << 1);
2381
c2bd5804
TH		 2382 /* select device 0 again */
2383 ap->ops->dev_select(ap, 0);
2384
2385 /* issue bus reset */
2386 DPRINTK("about to softreset, devmask=%x\n", devmask);
2387 err_mask = ata_bus_softreset(ap, devmask);
2388 if (err_mask) {
2389 if (verbose)
2390 printk(KERN_ERR "ata%u: SRST failed (err_mask=0x%x)\n",
2391 ap->id, err_mask);
2392 else
2393 DPRINTK("EXIT, softreset failed (err_mask=0x%x)\n",
2394 err_mask);
2395 return -EIO;
2396 }
2397
2398 /* determine by signature whether we have ATA or ATAPI devices */
2399 classes[0] = ata_dev_try_classify(ap, 0, &err);
2400 if (slave_possible && err != 0x81)
2401 classes[1] = ata_dev_try_classify(ap, 1, &err);
2402
3a39746a 2403 out:
c2bd5804
TH		 2404 DPRINTK("EXIT, classes[0]=%u [1]=%u\n", classes[0], classes[1]);
2405 return 0;
2406}
2407
2408/**
2409 * sata_std_hardreset - reset host port via SATA phy reset
2410 * @ap: port to reset
2411 * @verbose: fail verbosely
2412 * @class: resulting class of attached device
2413 *
2414 * SATA phy-reset host port using DET bits of SControl register.
2415 * This function is to be used as standard callback for
2416 * ata_drive_*_reset().
2417 *
2418 * LOCKING:
2419 * Kernel thread context (may sleep)
2420 *
2421 * RETURNS:
2422 * 0 on success, -errno otherwise.
2423 */
2424int sata_std_hardreset(struct ata_port *ap, int verbose, unsigned int *class)
2425{
852ee16a
TH		 2426 u32 scontrol;
2427
c2bd5804
TH		 2428 DPRINTK("ENTER\n");
2429
1c3fae4d
TH		 2430 if (ata_set_sata_spd_needed(ap)) {
2431 /* SATA spec says nothing about how to reconfigure
2432 * spd. To be on the safe side, turn off phy during
2433 * reconfiguration. This works for at least ICH7 AHCI
2434 * and Sil3124.
2435 */
2436 scontrol = scr_read(ap, SCR_CONTROL);
2437 scontrol = (scontrol & 0x0f0) | 0x302;
2438 scr_write_flush(ap, SCR_CONTROL, scontrol);
2439
2440 ata_set_sata_spd(ap);
2441 }
2442
2443 /* issue phy wake/reset */
852ee16a
TH		 2444 scontrol = scr_read(ap, SCR_CONTROL);
2445 scontrol = (scontrol & 0x0f0) | 0x301;
2446 scr_write_flush(ap, SCR_CONTROL, scontrol);
c2bd5804 2447
1c3fae4d 2448 /* Couldn't find anything in SATA I/II specs, but AHCI-1.1
c2bd5804
TH		 2449 * 10.4.2 says at least 1 ms.
2450 */
2451 msleep(1);
2452
1c3fae4d 2453 /* bring phy back */
7a7921e8 2454 sata_phy_resume(ap);
c2bd5804 2455
c2bd5804
TH		 2456 /* TODO: phy layer with polling, timeouts, etc. */
2457 if (!sata_dev_present(ap)) {
2458 *class = ATA_DEV_NONE;
2459 DPRINTK("EXIT, link offline\n");
2460 return 0;
2461 }
2462
2463 if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) {
2464 if (verbose)
2465 printk(KERN_ERR "ata%u: COMRESET failed "
2466 "(device not ready)\n", ap->id);
2467 else
2468 DPRINTK("EXIT, device not ready\n");
2469 return -EIO;
2470 }
2471
3a39746a
TH		 2472 ap->ops->dev_select(ap, 0); /* probably unnecessary */
2473
c2bd5804
TH		 2474 *class = ata_dev_try_classify(ap, 0, NULL);
2475
2476 DPRINTK("EXIT, class=%u\n", *class);
2477 return 0;
2478}
2479
2480/**
2481 * ata_std_postreset - standard postreset callback
2482 * @ap: the target ata_port
2483 * @classes: classes of attached devices
2484 *
2485 * This function is invoked after a successful reset. Note that
2486 * the device might have been reset more than once using
2487 * different reset methods before postreset is invoked.
c2bd5804
TH		 2488 *
2489 * This function is to be used as standard callback for
2490 * ata_drive_*_reset().
2491 *
2492 * LOCKING:
2493 * Kernel thread context (may sleep)
2494 */
2495void ata_std_postreset(struct ata_port *ap, unsigned int *classes)
2496{
2497 DPRINTK("ENTER\n");
2498
56497bd5 2499 /* set cable type if it isn't already set */
c2bd5804
TH		 2500 if (ap->cbl == ATA_CBL_NONE && ap->flags & ATA_FLAG_SATA)
2501 ap->cbl = ATA_CBL_SATA;
2502
2503 /* print link status */
2504 if (ap->cbl == ATA_CBL_SATA)
2505 sata_print_link_status(ap);
2506
3a39746a
TH		 2507 /* re-enable interrupts */
2508 if (ap->ioaddr.ctl_addr) /* FIXME: hack. create a hook instead */
2509 ata_irq_on(ap);
c2bd5804
TH		 2510
2511 /* is double-select really necessary? */
2512 if (classes[0] != ATA_DEV_NONE)
2513 ap->ops->dev_select(ap, 1);
2514 if (classes[1] != ATA_DEV_NONE)
2515 ap->ops->dev_select(ap, 0);
2516
3a39746a
TH		 2517 /* bail out if no device is present */
2518 if (classes[0] == ATA_DEV_NONE && classes[1] == ATA_DEV_NONE) {
2519 DPRINTK("EXIT, no device\n");
2520 return;
2521 }
2522
2523 /* set up device control */
2524 if (ap->ioaddr.ctl_addr) {
2525 if (ap->flags & ATA_FLAG_MMIO)
2526 writeb(ap->ctl, (void __iomem *) ap->ioaddr.ctl_addr);
2527 else
2528 outb(ap->ctl, ap->ioaddr.ctl_addr);
2529 }
c2bd5804
TH		 2530
2531 DPRINTK("EXIT\n");
2532}
2533
2534/**
2535 * ata_std_probe_reset - standard probe reset method
2536 * @ap: prot to perform probe-reset
2537 * @classes: resulting classes of attached devices
2538 *
2539 * The stock off-the-shelf ->probe_reset method.
2540 *
2541 * LOCKING:
2542 * Kernel thread context (may sleep)
2543 *
2544 * RETURNS:
2545 * 0 on success, -errno otherwise.
2546 */
2547int ata_std_probe_reset(struct ata_port *ap, unsigned int *classes)
2548{
2549 ata_reset_fn_t hardreset;
2550
2551 hardreset = NULL;
b911fc3a 2552 if (ap->flags & ATA_FLAG_SATA && ap->ops->scr_read)
c2bd5804
TH		 2553 hardreset = sata_std_hardreset;
2554
8a19ac89 2555 return ata_drive_probe_reset(ap, ata_std_probeinit,
7944ea95 2556 ata_std_softreset, hardreset,
c2bd5804
TH		 2557 ata_std_postreset, classes);
2558}
2559
9974e7cc
TH		 2560static int ata_do_reset(struct ata_port *ap,
2561 ata_reset_fn_t reset, ata_postreset_fn_t postreset,
2562 int verbose, unsigned int *classes)
a62c0fc5
TH		 2563{
2564 int i, rc;
2565
2566 for (i = 0; i < ATA_MAX_DEVICES; i++)
2567 classes[i] = ATA_DEV_UNKNOWN;
2568
9974e7cc 2569 rc = reset(ap, verbose, classes);
a62c0fc5
TH		 2570 if (rc)
2571 return rc;
2572
2573 /* If any class isn't ATA_DEV_UNKNOWN, consider classification
2574 * is complete and convert all ATA_DEV_UNKNOWN to
2575 * ATA_DEV_NONE.
2576 */
2577 for (i = 0; i < ATA_MAX_DEVICES; i++)
2578 if (classes[i] != ATA_DEV_UNKNOWN)
2579 break;
2580
2581 if (i < ATA_MAX_DEVICES)
2582 for (i = 0; i < ATA_MAX_DEVICES; i++)
2583 if (classes[i] == ATA_DEV_UNKNOWN)
2584 classes[i] = ATA_DEV_NONE;
2585
2586 if (postreset)
2587 postreset(ap, classes);
2588
9974e7cc 2589 return 0;
a62c0fc5
TH		 2590}
2591
2592/**
2593 * ata_drive_probe_reset - Perform probe reset with given methods
2594 * @ap: port to reset
7944ea95 2595 * @probeinit: probeinit method (can be NULL)
a62c0fc5
TH		 2596 * @softreset: softreset method (can be NULL)
2597 * @hardreset: hardreset method (can be NULL)
2598 * @postreset: postreset method (can be NULL)
2599 * @classes: resulting classes of attached devices
2600 *
2601 * Reset the specified port and classify attached devices using
2602 * given methods. This function prefers softreset but tries all
2603 * possible reset sequences to reset and classify devices. This
2604 * function is intended to be used for constructing ->probe_reset
2605 * callback by low level drivers.
2606 *
2607 * Reset methods should follow the following rules.
2608 *
2609 * - Return 0 on sucess, -errno on failure.
2610 * - If classification is supported, fill classes[] with
2611 * recognized class codes.
2612 * - If classification is not supported, leave classes[] alone.
2613 * - If verbose is non-zero, print error message on failure;
2614 * otherwise, shut up.
2615 *
2616 * LOCKING:
2617 * Kernel thread context (may sleep)
2618 *
2619 * RETURNS:
2620 * 0 on success, -EINVAL if no reset method is avaliable, -ENODEV
2621 * if classification fails, and any error code from reset
2622 * methods.
2623 */
7944ea95 2624int ata_drive_probe_reset(struct ata_port *ap, ata_probeinit_fn_t probeinit,
a62c0fc5
TH		 2625 ata_reset_fn_t softreset, ata_reset_fn_t hardreset,
2626 ata_postreset_fn_t postreset, unsigned int *classes)
2627{
2628 int rc = -EINVAL;
2629
7944ea95
TH		 2630 if (probeinit)
2631 probeinit(ap);
2632
90dac02c 2633 if (softreset && !ata_set_sata_spd_needed(ap)) {
9974e7cc
TH		 2634 rc = ata_do_reset(ap, softreset, postreset, 0, classes);
2635 if (rc == 0 && classes[0] != ATA_DEV_UNKNOWN)
2636 goto done;
edbabd86
TH		 2637 printk(KERN_INFO "ata%u: softreset failed, will try "
2638 "hardreset in 5 secs\n", ap->id);
2639 ssleep(5);
a62c0fc5
TH		 2640 }
2641
2642 if (!hardreset)
9974e7cc 2643 goto done;
a62c0fc5 2644
90dac02c
TH		 2645 while (1) {
2646 rc = ata_do_reset(ap, hardreset, postreset, 0, classes);
2647 if (rc == 0) {
2648 if (classes[0] != ATA_DEV_UNKNOWN)
2649 goto done;
2650 break;
2651 }
2652
2653 if (ata_down_sata_spd_limit(ap))
2654 goto done;
edbabd86
TH		 2655
2656 printk(KERN_INFO "ata%u: hardreset failed, will retry "
2657 "in 5 secs\n", ap->id);
2658 ssleep(5);
90dac02c 2659 }
a62c0fc5 2660
edbabd86
TH		 2661 if (softreset) {
2662 printk(KERN_INFO "ata%u: hardreset succeeded without "
2663 "classification, will retry softreset in 5 secs\n",
2664 ap->id);
2665 ssleep(5);
2666
9974e7cc 2667 rc = ata_do_reset(ap, softreset, postreset, 0, classes);
edbabd86 2668 }
a62c0fc5 2669
9974e7cc
TH		 2670 done:
2671 if (rc == 0 && classes[0] == ATA_DEV_UNKNOWN)
2672 rc = -ENODEV;
a62c0fc5
TH		 2673 return rc;
2674}
2675
623a3128
TH		 2676/**
2677 * ata_dev_same_device - Determine whether new ID matches configured device
2678 * @ap: port on which the device to compare against resides
2679 * @dev: device to compare against
2680 * @new_class: class of the new device
2681 * @new_id: IDENTIFY page of the new device
2682 *
2683 * Compare @new_class and @new_id against @dev and determine
2684 * whether @dev is the device indicated by @new_class and
2685 * @new_id.
2686 *
2687 * LOCKING:
2688 * None.
2689 *
2690 * RETURNS:
2691 * 1 if @dev matches @new_class and @new_id, 0 otherwise.
2692 */
2693static int ata_dev_same_device(struct ata_port *ap, struct ata_device *dev,
2694 unsigned int new_class, const u16 *new_id)
2695{
2696 const u16 *old_id = dev->id;
2697 unsigned char model[2][41], serial[2][21];
2698 u64 new_n_sectors;
2699
2700 if (dev->class != new_class) {
2701 printk(KERN_INFO
2702 "ata%u: dev %u class mismatch %d != %d\n",
2703 ap->id, dev->devno, dev->class, new_class);
2704 return 0;
2705 }
2706
2707 ata_id_c_string(old_id, model[0], ATA_ID_PROD_OFS, sizeof(model[0]));
2708 ata_id_c_string(new_id, model[1], ATA_ID_PROD_OFS, sizeof(model[1]));
2709 ata_id_c_string(old_id, serial[0], ATA_ID_SERNO_OFS, sizeof(serial[0]));
2710 ata_id_c_string(new_id, serial[1], ATA_ID_SERNO_OFS, sizeof(serial[1]));
2711 new_n_sectors = ata_id_n_sectors(new_id);
2712
2713 if (strcmp(model[0], model[1])) {
2714 printk(KERN_INFO
2715 "ata%u: dev %u model number mismatch '%s' != '%s'\n",
2716 ap->id, dev->devno, model[0], model[1]);
2717 return 0;
2718 }
2719
2720 if (strcmp(serial[0], serial[1])) {
2721 printk(KERN_INFO
2722 "ata%u: dev %u serial number mismatch '%s' != '%s'\n",
2723 ap->id, dev->devno, serial[0], serial[1]);
2724 return 0;
2725 }
2726
2727 if (dev->class == ATA_DEV_ATA && dev->n_sectors != new_n_sectors) {
2728 printk(KERN_INFO
2729 "ata%u: dev %u n_sectors mismatch %llu != %llu\n",
2730 ap->id, dev->devno, (unsigned long long)dev->n_sectors,
2731 (unsigned long long)new_n_sectors);
2732 return 0;
2733 }
2734
2735 return 1;
2736}
2737
2738/**
2739 * ata_dev_revalidate - Revalidate ATA device
2740 * @ap: port on which the device to revalidate resides
2741 * @dev: device to revalidate
2742 * @post_reset: is this revalidation after reset?
2743 *
2744 * Re-read IDENTIFY page and make sure @dev is still attached to
2745 * the port.
2746 *
2747 * LOCKING:
2748 * Kernel thread context (may sleep)
2749 *
2750 * RETURNS:
2751 * 0 on success, negative errno otherwise
2752 */
2753int ata_dev_revalidate(struct ata_port *ap, struct ata_device *dev,
2754 int post_reset)
2755{
2756 unsigned int class;
2757 u16 *id;
2758 int rc;
2759
e1211e3f 2760 if (!ata_dev_enabled(dev))
623a3128
TH		 2761 return -ENODEV;
2762
2763 class = dev->class;
2764 id = NULL;
2765
2766 /* allocate & read ID data */
2767 rc = ata_dev_read_id(ap, dev, &class, post_reset, &id);
2768 if (rc)
2769 goto fail;
2770
2771 /* is the device still there? */
2772 if (!ata_dev_same_device(ap, dev, class, id)) {
2773 rc = -ENODEV;
2774 goto fail;
2775 }
2776
2777 kfree(dev->id);
2778 dev->id = id;
2779
2780 /* configure device according to the new ID */
2781 return ata_dev_configure(ap, dev, 0);
2782
2783 fail:
2784 printk(KERN_ERR "ata%u: dev %u revalidation failed (errno=%d)\n",
2785 ap->id, dev->devno, rc);
2786 kfree(id);
2787 return rc;
2788}
2789
98ac62de 2790static const char * const ata_dma_blacklist [] = {
f4b15fef
AC		 2791 "WDC AC11000H", NULL,
2792 "WDC AC22100H", NULL,
2793 "WDC AC32500H", NULL,
2794 "WDC AC33100H", NULL,
2795 "WDC AC31600H", NULL,
2796 "WDC AC32100H", "24.09P07",
2797 "WDC AC23200L", "21.10N21",
2798 "Compaq CRD-8241B", NULL,
2799 "CRD-8400B", NULL,
2800 "CRD-8480B", NULL,
2801 "CRD-8482B", NULL,
2802 "CRD-84", NULL,
2803 "SanDisk SDP3B", NULL,
2804 "SanDisk SDP3B-64", NULL,
2805 "SANYO CD-ROM CRD", NULL,
2806 "HITACHI CDR-8", NULL,
2e9edbf8 2807 "HITACHI CDR-8335", NULL,
f4b15fef 2808 "HITACHI CDR-8435", NULL,
2e9edbf8
JG		 2809 "Toshiba CD-ROM XM-6202B", NULL,
2810 "TOSHIBA CD-ROM XM-1702BC", NULL,
2811 "CD-532E-A", NULL,
2812 "E-IDE CD-ROM CR-840", NULL,
2813 "CD-ROM Drive/F5A", NULL,
2814 "WPI CDD-820", NULL,
f4b15fef 2815 "SAMSUNG CD-ROM SC-148C", NULL,
2e9edbf8 2816 "SAMSUNG CD-ROM SC", NULL,
f4b15fef
AC		 2817 "SanDisk SDP3B-64", NULL,
2818 "ATAPI CD-ROM DRIVE 40X MAXIMUM",NULL,
2819 "_NEC DV5800A", NULL,
2820 "SAMSUNG CD-ROM SN-124", "N001"
1da177e4 2821};
2e9edbf8 2822
f4b15fef
AC		 2823static int ata_strim(char *s, size_t len)
2824{
2825 len = strnlen(s, len);
2826
2827 /* ATAPI specifies that empty space is blank-filled; remove blanks */
2828 while ((len > 0) && (s[len - 1] == ' ')) {
2829 len--;
2830 s[len] = 0;
2831 }
2832 return len;
2833}
1da177e4 2834
057ace5e 2835static int ata_dma_blacklisted(const struct ata_device *dev)
1da177e4 2836{
f4b15fef
AC		 2837 unsigned char model_num[40];
2838 unsigned char model_rev[16];
2839 unsigned int nlen, rlen;
1da177e4
LT		 2840 int i;
2841
f4b15fef
AC		 2842 ata_id_string(dev->id, model_num, ATA_ID_PROD_OFS,
2843 sizeof(model_num));
2844 ata_id_string(dev->id, model_rev, ATA_ID_FW_REV_OFS,
2845 sizeof(model_rev));
2846 nlen = ata_strim(model_num, sizeof(model_num));
2847 rlen = ata_strim(model_rev, sizeof(model_rev));
1da177e4 2848
f4b15fef
AC		 2849 for (i = 0; i < ARRAY_SIZE(ata_dma_blacklist); i += 2) {
2850 if (!strncmp(ata_dma_blacklist[i], model_num, nlen)) {
2851 if (ata_dma_blacklist[i+1] == NULL)
2852 return 1;
2853 if (!strncmp(ata_dma_blacklist[i], model_rev, rlen))
2854 return 1;
2855 }
2856 }
1da177e4
LT		 2857 return 0;
2858}
2859
a6d5a51c
TH		 2860/**
2861 * ata_dev_xfermask - Compute supported xfermask of the given device
2862 * @ap: Port on which the device to compute xfermask for resides
2863 * @dev: Device to compute xfermask for
2864 *
acf356b1
TH		 2865 * Compute supported xfermask of @dev and store it in
2866 * dev->*_mask. This function is responsible for applying all
2867 * known limits including host controller limits, device
2868 * blacklist, etc...
a6d5a51c 2869 *
600511e8
TH		 2870 * FIXME: The current implementation limits all transfer modes to
2871 * the fastest of the lowested device on the port. This is not
05c8e0ac 2872 * required on most controllers.
600511e8 2873 *
a6d5a51c
TH		 2874 * LOCKING:
2875 * None.
a6d5a51c 2876 */
acf356b1 2877static void ata_dev_xfermask(struct ata_port *ap, struct ata_device *dev)
1da177e4 2878{
5444a6f4 2879 struct ata_host_set *hs = ap->host_set;
a6d5a51c
TH		 2880 unsigned long xfer_mask;
2881 int i;
1da177e4 2882
a6d5a51c
TH		 2883 xfer_mask = ata_pack_xfermask(ap->pio_mask, ap->mwdma_mask,
2884 ap->udma_mask);
1da177e4 2885
5444a6f4 2886 /* FIXME: Use port-wide xfermask for now */
a6d5a51c
TH		 2887 for (i = 0; i < ATA_MAX_DEVICES; i++) {
2888 struct ata_device *d = &ap->device[i];
e1211e3f 2889 if (!ata_dev_enabled(d))
a6d5a51c 2890 continue;
acf356b1
TH		 2891 xfer_mask &= ata_pack_xfermask(d->pio_mask, d->mwdma_mask,
2892 d->udma_mask);
a6d5a51c
TH		 2893 xfer_mask &= ata_id_xfermask(d->id);
2894 if (ata_dma_blacklisted(d))
2895 xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA);
5444a6f4
AC		 2896 /* Apply cable rule here. Don't apply it early because when
2897 we handle hot plug the cable type can itself change */
2898 if (ap->cbl == ATA_CBL_PATA40)
2899 xfer_mask &= ~(0xF8 << ATA_SHIFT_UDMA);
1da177e4
LT		 2900 }
2901
a6d5a51c
TH		 2902 if (ata_dma_blacklisted(dev))
2903 printk(KERN_WARNING "ata%u: dev %u is on DMA blacklist, "
2904 "disabling DMA\n", ap->id, dev->devno);
2905
5444a6f4
AC		 2906 if (hs->flags & ATA_HOST_SIMPLEX) {
2907 if (hs->simplex_claimed)
2908 xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA);
2909 }
2910 if (ap->ops->mode_filter)
2911 xfer_mask = ap->ops->mode_filter(ap, dev, xfer_mask);
2912
acf356b1
TH		 2913 ata_unpack_xfermask(xfer_mask, &dev->pio_mask, &dev->mwdma_mask,
2914 &dev->udma_mask);
1da177e4
LT		 2915}
2916
1da177e4
LT		 2917/**
2918 * ata_dev_set_xfermode - Issue SET FEATURES - XFER MODE command
2919 * @ap: Port associated with device @dev
2920 * @dev: Device to which command will be sent
2921 *
780a87f7
JG		 2922 * Issue SET FEATURES - XFER MODE command to device @dev
2923 * on port @ap.
2924 *
1da177e4 2925 * LOCKING:
0cba632b 2926 * PCI/etc. bus probe sem.
83206a29
TH		 2927 *
2928 * RETURNS:
2929 * 0 on success, AC_ERR_* mask otherwise.
1da177e4
LT		 2930 */
2931
83206a29
TH		 2932static unsigned int ata_dev_set_xfermode(struct ata_port *ap,
2933 struct ata_device *dev)
1da177e4 2934{
a0123703 2935 struct ata_taskfile tf;
83206a29 2936 unsigned int err_mask;
1da177e4
LT		 2937
2938 /* set up set-features taskfile */
2939 DPRINTK("set features - xfer mode\n");
2940
a0123703
TH		 2941 ata_tf_init(ap, &tf, dev->devno);
2942 tf.command = ATA_CMD_SET_FEATURES;
2943 tf.feature = SETFEATURES_XFER;
2944 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
2945 tf.protocol = ATA_PROT_NODATA;
2946 tf.nsect = dev->xfer_mode;
1da177e4 2947
83206a29 2948 err_mask = ata_exec_internal(ap, dev, &tf, DMA_NONE, NULL, 0);
1da177e4 2949
83206a29
TH		 2950 DPRINTK("EXIT, err_mask=%x\n", err_mask);
2951 return err_mask;
1da177e4
LT		 2952}
2953
8bf62ece
AL		 2954/**
2955 * ata_dev_init_params - Issue INIT DEV PARAMS command
2956 * @ap: Port associated with device @dev
2957 * @dev: Device to which command will be sent
2958 *
2959 * LOCKING:
6aff8f1f
TH		 2960 * Kernel thread context (may sleep)
2961 *
2962 * RETURNS:
2963 * 0 on success, AC_ERR_* mask otherwise.
8bf62ece
AL		 2964 */
2965
6aff8f1f 2966static unsigned int ata_dev_init_params(struct ata_port *ap,
00b6f5e9
AL		 2967 struct ata_device *dev,
2968 u16 heads,
2969 u16 sectors)
8bf62ece 2970{
a0123703 2971 struct ata_taskfile tf;
6aff8f1f 2972 unsigned int err_mask;
8bf62ece
AL		 2973
2974 /* Number of sectors per track 1-255. Number of heads 1-16 */
2975 if (sectors < 1 || sectors > 255 || heads < 1 || heads > 16)
00b6f5e9 2976 return AC_ERR_INVALID;
8bf62ece
AL		 2977
2978 /* set up init dev params taskfile */
2979 DPRINTK("init dev params \n");
2980
a0123703
TH		 2981 ata_tf_init(ap, &tf, dev->devno);
2982 tf.command = ATA_CMD_INIT_DEV_PARAMS;
2983 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
2984 tf.protocol = ATA_PROT_NODATA;
2985 tf.nsect = sectors;
2986 tf.device |= (heads - 1) & 0x0f; /* max head = num. of heads - 1 */
8bf62ece 2987
6aff8f1f 2988 err_mask = ata_exec_internal(ap, dev, &tf, DMA_NONE, NULL, 0);
8bf62ece 2989
6aff8f1f
TH		 2990 DPRINTK("EXIT, err_mask=%x\n", err_mask);
2991 return err_mask;
8bf62ece
AL		 2992}
2993
1da177e4 2994/**
0cba632b
JG		 2995 * ata_sg_clean - Unmap DMA memory associated with command
2996 * @qc: Command containing DMA memory to be released
2997 *
2998 * Unmap all mapped DMA memory associated with this command.
1da177e4
LT		 2999 *
3000 * LOCKING:
0cba632b 3001 * spin_lock_irqsave(host_set lock)
1da177e4
LT		 3002 */
3003
3004static void ata_sg_clean(struct ata_queued_cmd *qc)
3005{
3006 struct ata_port *ap = qc->ap;
cedc9a47 3007 struct scatterlist *sg = qc->__sg;
1da177e4 3008 int dir = qc->dma_dir;
cedc9a47 3009 void *pad_buf = NULL;
1da177e4 3010
a4631474
TH		 3011 WARN_ON(!(qc->flags & ATA_QCFLAG_DMAMAP));
3012 WARN_ON(sg == NULL);
1da177e4
LT		 3013
3014 if (qc->flags & ATA_QCFLAG_SINGLE)
f131883e 3015 WARN_ON(qc->n_elem > 1);
1da177e4 3016
2c13b7ce 3017 VPRINTK("unmapping %u sg elements\n", qc->n_elem);
1da177e4 3018
cedc9a47
JG		 3019 /* if we padded the buffer out to 32-bit bound, and data
3020 * xfer direction is from-device, we must copy from the
3021 * pad buffer back into the supplied buffer
3022 */
3023 if (qc->pad_len && !(qc->tf.flags & ATA_TFLAG_WRITE))
3024 pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
3025
3026 if (qc->flags & ATA_QCFLAG_SG) {
e1410f2d 3027 if (qc->n_elem)
2f1f610b 3028 dma_unmap_sg(ap->dev, sg, qc->n_elem, dir);
cedc9a47
JG		 3029 /* restore last sg */
3030 sg[qc->orig_n_elem - 1].length += qc->pad_len;
3031 if (pad_buf) {
3032 struct scatterlist *psg = &qc->pad_sgent;
3033 void *addr = kmap_atomic(psg->page, KM_IRQ0);
3034 memcpy(addr + psg->offset, pad_buf, qc->pad_len);
dfa15988 3035 kunmap_atomic(addr, KM_IRQ0);
cedc9a47
JG		 3036 }
3037 } else {
2e242fa9 3038 if (qc->n_elem)
2f1f610b 3039 dma_unmap_single(ap->dev,
e1410f2d
JG		 3040 sg_dma_address(&sg[0]), sg_dma_len(&sg[0]),
3041 dir);
cedc9a47
JG		 3042 /* restore sg */
3043 sg->length += qc->pad_len;
3044 if (pad_buf)
3045 memcpy(qc->buf_virt + sg->length - qc->pad_len,
3046 pad_buf, qc->pad_len);
3047 }
1da177e4
LT		 3048
3049 qc->flags &= ~ATA_QCFLAG_DMAMAP;
cedc9a47 3050 qc->__sg = NULL;
1da177e4
LT		 3051}
3052
3053/**
3054 * ata_fill_sg - Fill PCI IDE PRD table
3055 * @qc: Metadata associated with taskfile to be transferred
3056 *
780a87f7
JG		 3057 * Fill PCI IDE PRD (scatter-gather) table with segments
3058 * associated with the current disk command.
3059 *
1da177e4 3060 * LOCKING:
780a87f7 3061 * spin_lock_irqsave(host_set lock)
1da177e4
LT		 3062 *
3063 */
3064static void ata_fill_sg(struct ata_queued_cmd *qc)
3065{
1da177e4 3066 struct ata_port *ap = qc->ap;
cedc9a47
JG		 3067 struct scatterlist *sg;
3068 unsigned int idx;
1da177e4 3069
a4631474 3070 WARN_ON(qc->__sg == NULL);
f131883e 3071 WARN_ON(qc->n_elem == 0 && qc->pad_len == 0);
1da177e4
LT		 3072
3073 idx = 0;
cedc9a47 3074 ata_for_each_sg(sg, qc) {
1da177e4
LT		 3075 u32 addr, offset;
3076 u32 sg_len, len;
3077
3078 /* determine if physical DMA addr spans 64K boundary.
3079 * Note h/w doesn't support 64-bit, so we unconditionally
3080 * truncate dma_addr_t to u32.
3081 */
3082 addr = (u32) sg_dma_address(sg);
3083 sg_len = sg_dma_len(sg);
3084
3085 while (sg_len) {
3086 offset = addr & 0xffff;
3087 len = sg_len;
3088 if ((offset + sg_len) > 0x10000)
3089 len = 0x10000 - offset;
3090
3091 ap->prd[idx].addr = cpu_to_le32(addr);
3092 ap->prd[idx].flags_len = cpu_to_le32(len & 0xffff);
3093 VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", idx, addr, len);
3094
3095 idx++;
3096 sg_len -= len;
3097 addr += len;
3098 }
3099 }
3100
3101 if (idx)
3102 ap->prd[idx - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT);
3103}
3104/**
3105 * ata_check_atapi_dma - Check whether ATAPI DMA can be supported
3106 * @qc: Metadata associated with taskfile to check
3107 *
780a87f7
JG		 3108 * Allow low-level driver to filter ATA PACKET commands, returning
3109 * a status indicating whether or not it is OK to use DMA for the
3110 * supplied PACKET command.
3111 *
1da177e4 3112 * LOCKING:
0cba632b
JG		 3113 * spin_lock_irqsave(host_set lock)
3114 *
1da177e4
LT		 3115 * RETURNS: 0 when ATAPI DMA can be used
3116 * nonzero otherwise
3117 */
3118int ata_check_atapi_dma(struct ata_queued_cmd *qc)
3119{
3120 struct ata_port *ap = qc->ap;
3121 int rc = 0; /* Assume ATAPI DMA is OK by default */
3122
3123 if (ap->ops->check_atapi_dma)
3124 rc = ap->ops->check_atapi_dma(qc);
3125
3126 return rc;
3127}
3128/**
3129 * ata_qc_prep - Prepare taskfile for submission
3130 * @qc: Metadata associated with taskfile to be prepared
3131 *
780a87f7
JG		 3132 * Prepare ATA taskfile for submission.
3133 *
1da177e4
LT		 3134 * LOCKING:
3135 * spin_lock_irqsave(host_set lock)
3136 */
3137void ata_qc_prep(struct ata_queued_cmd *qc)
3138{
3139 if (!(qc->flags & ATA_QCFLAG_DMAMAP))
3140 return;
3141
3142 ata_fill_sg(qc);
3143}
3144
e46834cd
BK		 3145void ata_noop_qc_prep(struct ata_queued_cmd *qc) { }
3146
0cba632b
JG		 3147/**
3148 * ata_sg_init_one - Associate command with memory buffer
3149 * @qc: Command to be associated
3150 * @buf: Memory buffer
3151 * @buflen: Length of memory buffer, in bytes.
3152 *
3153 * Initialize the data-related elements of queued_cmd @qc
3154 * to point to a single memory buffer, @buf of byte length @buflen.
3155 *
3156 * LOCKING:
3157 * spin_lock_irqsave(host_set lock)
3158 */
3159
1da177e4
LT		 3160void ata_sg_init_one(struct ata_queued_cmd *qc, void *buf, unsigned int buflen)
3161{
3162 struct scatterlist *sg;
3163
3164 qc->flags |= ATA_QCFLAG_SINGLE;
3165
3166 memset(&qc->sgent, 0, sizeof(qc->sgent));
cedc9a47 3167 qc->__sg = &qc->sgent;
1da177e4 3168 qc->n_elem = 1;
cedc9a47 3169 qc->orig_n_elem = 1;
1da177e4
LT		 3170 qc->buf_virt = buf;
3171
cedc9a47 3172 sg = qc->__sg;
f0612bbc 3173 sg_init_one(sg, buf, buflen);
1da177e4
LT		 3174}
3175
0cba632b
JG		 3176/**
3177 * ata_sg_init - Associate command with scatter-gather table.
3178 * @qc: Command to be associated
3179 * @sg: Scatter-gather table.
3180 * @n_elem: Number of elements in s/g table.
3181 *
3182 * Initialize the data-related elements of queued_cmd @qc
3183 * to point to a scatter-gather table @sg, containing @n_elem
3184 * elements.
3185 *
3186 * LOCKING:
3187 * spin_lock_irqsave(host_set lock)
3188 */
3189
1da177e4
LT		 3190void ata_sg_init(struct ata_queued_cmd *qc, struct scatterlist *sg,
3191 unsigned int n_elem)
3192{
3193 qc->flags |= ATA_QCFLAG_SG;
cedc9a47 3194 qc->__sg = sg;
1da177e4 3195 qc->n_elem = n_elem;
cedc9a47 3196 qc->orig_n_elem = n_elem;
1da177e4
LT		 3197}
3198
3199/**
0cba632b
JG		 3200 * ata_sg_setup_one - DMA-map the memory buffer associated with a command.
3201 * @qc: Command with memory buffer to be mapped.
3202 *
3203 * DMA-map the memory buffer associated with queued_cmd @qc.
1da177e4
LT		 3204 *
3205 * LOCKING:
3206 * spin_lock_irqsave(host_set lock)
3207 *
3208 * RETURNS:
0cba632b 3209 * Zero on success, negative on error.
1da177e4
LT		 3210 */
3211
3212static int ata_sg_setup_one(struct ata_queued_cmd *qc)
3213{
3214 struct ata_port *ap = qc->ap;
3215 int dir = qc->dma_dir;
cedc9a47 3216 struct scatterlist *sg = qc->__sg;
1da177e4 3217 dma_addr_t dma_address;
2e242fa9 3218 int trim_sg = 0;
1da177e4 3219
cedc9a47
JG		 3220 /* we must lengthen transfers to end on a 32-bit boundary */
3221 qc->pad_len = sg->length & 3;
3222 if (qc->pad_len) {
3223 void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
3224 struct scatterlist *psg = &qc->pad_sgent;
3225
a4631474 3226 WARN_ON(qc->dev->class != ATA_DEV_ATAPI);
cedc9a47
JG		 3227
3228 memset(pad_buf, 0, ATA_DMA_PAD_SZ);
3229
3230 if (qc->tf.flags & ATA_TFLAG_WRITE)
3231 memcpy(pad_buf, qc->buf_virt + sg->length - qc->pad_len,
3232 qc->pad_len);
3233
3234 sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ);
3235 sg_dma_len(psg) = ATA_DMA_PAD_SZ;
3236 /* trim sg */
3237 sg->length -= qc->pad_len;
2e242fa9
TH		 3238 if (sg->length == 0)
3239 trim_sg = 1;
cedc9a47
JG		 3240
3241 DPRINTK("padding done, sg->length=%u pad_len=%u\n",
3242 sg->length, qc->pad_len);
3243 }
3244
2e242fa9
TH		 3245 if (trim_sg) {
3246 qc->n_elem--;
e1410f2d
JG		 3247 goto skip_map;
3248 }
3249
2f1f610b 3250 dma_address = dma_map_single(ap->dev, qc->buf_virt,
32529e01 3251 sg->length, dir);
537a95d9
TH		 3252 if (dma_mapping_error(dma_address)) {
3253 /* restore sg */
3254 sg->length += qc->pad_len;
1da177e4 3255 return -1;
537a95d9 3256 }
1da177e4
LT		 3257
3258 sg_dma_address(sg) = dma_address;
32529e01 3259 sg_dma_len(sg) = sg->length;
1da177e4 3260
2e242fa9 3261skip_map:
1da177e4
LT		 3262 DPRINTK("mapped buffer of %d bytes for %s\n", sg_dma_len(sg),
3263 qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
3264
3265 return 0;
3266}
3267
3268/**
0cba632b
JG		 3269 * ata_sg_setup - DMA-map the scatter-gather table associated with a command.
3270 * @qc: Command with scatter-gather table to be mapped.
3271 *
3272 * DMA-map the scatter-gather table associated with queued_cmd @qc.
1da177e4
LT		 3273 *
3274 * LOCKING:
3275 * spin_lock_irqsave(host_set lock)
3276 *
3277 * RETURNS:
0cba632b 3278 * Zero on success, negative on error.
1da177e4
LT		 3279 *
3280 */
3281
3282static int ata_sg_setup(struct ata_queued_cmd *qc)
3283{
3284 struct ata_port *ap = qc->ap;
cedc9a47
JG		 3285 struct scatterlist *sg = qc->__sg;
3286 struct scatterlist *lsg = &sg[qc->n_elem - 1];
e1410f2d 3287 int n_elem, pre_n_elem, dir, trim_sg = 0;
1da177e4
LT		 3288
3289 VPRINTK("ENTER, ata%u\n", ap->id);
a4631474 3290 WARN_ON(!(qc->flags & ATA_QCFLAG_SG));
1da177e4 3291
cedc9a47
JG		 3292 /* we must lengthen transfers to end on a 32-bit boundary */
3293 qc->pad_len = lsg->length & 3;
3294 if (qc->pad_len) {
3295 void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
3296 struct scatterlist *psg = &qc->pad_sgent;
3297 unsigned int offset;
3298
a4631474 3299 WARN_ON(qc->dev->class != ATA_DEV_ATAPI);
cedc9a47
JG		 3300
3301 memset(pad_buf, 0, ATA_DMA_PAD_SZ);
3302
3303 /*
3304 * psg->page/offset are used to copy to-be-written
3305 * data in this function or read data in ata_sg_clean.
3306 */
3307 offset = lsg->offset + lsg->length - qc->pad_len;
3308 psg->page = nth_page(lsg->page, offset >> PAGE_SHIFT);
3309 psg->offset = offset_in_page(offset);
3310
3311 if (qc->tf.flags & ATA_TFLAG_WRITE) {
3312 void *addr = kmap_atomic(psg->page, KM_IRQ0);
3313 memcpy(pad_buf, addr + psg->offset, qc->pad_len);
dfa15988 3314 kunmap_atomic(addr, KM_IRQ0);
cedc9a47
JG		 3315 }
3316
3317 sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ);
3318 sg_dma_len(psg) = ATA_DMA_PAD_SZ;
3319 /* trim last sg */
3320 lsg->length -= qc->pad_len;
e1410f2d
JG		 3321 if (lsg->length == 0)
3322 trim_sg = 1;
cedc9a47
JG		 3323
3324 DPRINTK("padding done, sg[%d].length=%u pad_len=%u\n",
3325 qc->n_elem - 1, lsg->length, qc->pad_len);
3326 }
3327
e1410f2d
JG		 3328 pre_n_elem = qc->n_elem;
3329 if (trim_sg && pre_n_elem)
3330 pre_n_elem--;
3331
3332 if (!pre_n_elem) {
3333 n_elem = 0;
3334 goto skip_map;
3335 }
3336
1da177e4 3337 dir = qc->dma_dir;
2f1f610b 3338 n_elem = dma_map_sg(ap->dev, sg, pre_n_elem, dir);
537a95d9
TH		 3339 if (n_elem < 1) {
3340 /* restore last sg */
3341 lsg->length += qc->pad_len;
1da177e4 3342 return -1;
537a95d9 3343 }
1da177e4
LT		 3344
3345 DPRINTK("%d sg elements mapped\n", n_elem);
3346
e1410f2d 3347skip_map:
1da177e4
LT		 3348 qc->n_elem = n_elem;
3349
3350 return 0;
3351}
3352
40e8c82c
TH		 3353/**
3354 * ata_poll_qc_complete - turn irq back on and finish qc
3355 * @qc: Command to complete
8e8b77dd 3356 * @err_mask: ATA status register content
40e8c82c
TH		 3357 *
3358 * LOCKING:
3359 * None. (grabs host lock)
3360 */
3361
a22e2eb0 3362void ata_poll_qc_complete(struct ata_queued_cmd *qc)
40e8c82c
TH		 3363{
3364 struct ata_port *ap = qc->ap;
b8f6153e 3365 unsigned long flags;
40e8c82c 3366
b8f6153e 3367 spin_lock_irqsave(&ap->host_set->lock, flags);
40e8c82c
TH		 3368 ap->flags &= ~ATA_FLAG_NOINTR;
3369 ata_irq_on(ap);
a22e2eb0 3370 ata_qc_complete(qc);
b8f6153e 3371 spin_unlock_irqrestore(&ap->host_set->lock, flags);
40e8c82c
TH		 3372}
3373
1da177e4 3374/**
c893a3ae 3375 * ata_pio_poll - poll using PIO, depending on current state
6f0ef4fa 3376 * @ap: the target ata_port
1da177e4
LT		 3377 *
3378 * LOCKING:
0cba632b 3379 * None. (executing in kernel thread context)
1da177e4
LT		 3380 *
3381 * RETURNS:
6f0ef4fa 3382 * timeout value to use
1da177e4
LT		 3383 */
3384
3385static unsigned long ata_pio_poll(struct ata_port *ap)
3386{
c14b8331 3387 struct ata_queued_cmd *qc;
1da177e4 3388 u8 status;
14be71f4
AL		 3389 unsigned int poll_state = HSM_ST_UNKNOWN;
3390 unsigned int reg_state = HSM_ST_UNKNOWN;
14be71f4 3391
c14b8331 3392 qc = ata_qc_from_tag(ap, ap->active_tag);
a4631474 3393 WARN_ON(qc == NULL);
c14b8331 3394
14be71f4
AL		 3395 switch (ap->hsm_task_state) {
3396 case HSM_ST:
3397 case HSM_ST_POLL:
3398 poll_state = HSM_ST_POLL;
3399 reg_state = HSM_ST;
1da177e4 3400 break;
14be71f4
AL		 3401 case HSM_ST_LAST:
3402 case HSM_ST_LAST_POLL:
3403 poll_state = HSM_ST_LAST_POLL;
3404 reg_state = HSM_ST_LAST;
1da177e4
LT		 3405 break;
3406 default:
3407 BUG();
3408 break;
3409 }
3410
3411 status = ata_chk_status(ap);
3412 if (status & ATA_BUSY) {
3413 if (time_after(jiffies, ap->pio_task_timeout)) {
11a56d24 3414 qc->err_mask |= AC_ERR_TIMEOUT;
7c398335 3415 ap->hsm_task_state = HSM_ST_TMOUT;
1da177e4
LT		 3416 return 0;
3417 }
14be71f4 3418 ap->hsm_task_state = poll_state;
1da177e4
LT		 3419 return ATA_SHORT_PAUSE;
3420 }
3421
14be71f4 3422 ap->hsm_task_state = reg_state;
1da177e4
LT		 3423 return 0;
3424}
3425
3426/**
6f0ef4fa
RD		 3427 * ata_pio_complete - check if drive is busy or idle
3428 * @ap: the target ata_port
1da177e4
LT		 3429 *
3430 * LOCKING:
0cba632b 3431 * None. (executing in kernel thread context)
7fb6ec28
JG		 3432 *
3433 * RETURNS:
3434 * Non-zero if qc completed, zero otherwise.
1da177e4
LT		 3435 */
3436
7fb6ec28 3437static int ata_pio_complete (struct ata_port *ap)
1da177e4
LT		 3438{
3439 struct ata_queued_cmd *qc;
3440 u8 drv_stat;
3441
3442 /*
31433ea3
AC		 3443 * This is purely heuristic. This is a fast path. Sometimes when
3444 * we enter, BSY will be cleared in a chk-status or two. If not,
3445 * the drive is probably seeking or something. Snooze for a couple
3446 * msecs, then chk-status again. If still busy, fall back to
14be71f4 3447 * HSM_ST_POLL state.
1da177e4 3448 */
fe79e683
AL		 3449 drv_stat = ata_busy_wait(ap, ATA_BUSY, 10);
3450 if (drv_stat & ATA_BUSY) {
1da177e4 3451 msleep(2);
fe79e683
AL		 3452 drv_stat = ata_busy_wait(ap, ATA_BUSY, 10);
3453 if (drv_stat & ATA_BUSY) {
14be71f4 3454 ap->hsm_task_state = HSM_ST_LAST_POLL;
1da177e4 3455 ap->pio_task_timeout = jiffies + ATA_TMOUT_PIO;
7fb6ec28 3456 return 0;
1da177e4
LT		 3457 }
3458 }
3459
c14b8331 3460 qc = ata_qc_from_tag(ap, ap->active_tag);
a4631474 3461 WARN_ON(qc == NULL);
c14b8331 3462
1da177e4
LT		 3463 drv_stat = ata_wait_idle(ap);
3464 if (!ata_ok(drv_stat)) {
1c848984 3465 qc->err_mask |= __ac_err_mask(drv_stat);
14be71f4 3466 ap->hsm_task_state = HSM_ST_ERR;
7fb6ec28 3467 return 0;
1da177e4
LT		 3468 }
3469
14be71f4 3470 ap->hsm_task_state = HSM_ST_IDLE;
1da177e4 3471
a4631474 3472 WARN_ON(qc->err_mask);
a22e2eb0 3473 ata_poll_qc_complete(qc);
7fb6ec28
JG		 3474
3475 /* another command may start at this point */
3476
3477 return 1;
1da177e4
LT		 3478}
3479
0baab86b
EF		 3480
3481/**
c893a3ae 3482 * swap_buf_le16 - swap halves of 16-bit words in place
0baab86b
EF		 3483 * @buf: Buffer to swap
3484 * @buf_words: Number of 16-bit words in buffer.
3485 *
3486 * Swap halves of 16-bit words if needed to convert from
3487 * little-endian byte order to native cpu byte order, or
3488 * vice-versa.
3489 *
3490 * LOCKING:
6f0ef4fa 3491 * Inherited from caller.
0baab86b 3492 */
1da177e4
LT		 3493void swap_buf_le16(u16 *buf, unsigned int buf_words)
3494{
3495#ifdef __BIG_ENDIAN
3496 unsigned int i;
3497
3498 for (i = 0; i < buf_words; i++)
3499 buf[i] = le16_to_cpu(buf[i]);
3500#endif /* __BIG_ENDIAN */
3501}
3502
6ae4cfb5
AL		 3503/**
3504 * ata_mmio_data_xfer - Transfer data by MMIO
3505 * @ap: port to read/write
3506 * @buf: data buffer
3507 * @buflen: buffer length
344babaa 3508 * @write_data: read/write
6ae4cfb5
AL		 3509 *
3510 * Transfer data from/to the device data register by MMIO.
3511 *
3512 * LOCKING:
3513 * Inherited from caller.
6ae4cfb5
AL		 3514 */
3515
1da177e4
LT		 3516static void ata_mmio_data_xfer(struct ata_port *ap, unsigned char *buf,
3517 unsigned int buflen, int write_data)
3518{
3519 unsigned int i;
3520 unsigned int words = buflen >> 1;
3521 u16 *buf16 = (u16 *) buf;
3522 void __iomem *mmio = (void __iomem *)ap->ioaddr.data_addr;
3523
6ae4cfb5 3524 /* Transfer multiple of 2 bytes */
1da177e4
LT		 3525 if (write_data) {
3526 for (i = 0; i < words; i++)
3527 writew(le16_to_cpu(buf16[i]), mmio);
3528 } else {
3529 for (i = 0; i < words; i++)
3530 buf16[i] = cpu_to_le16(readw(mmio));
3531 }
6ae4cfb5
AL		 3532
3533 /* Transfer trailing 1 byte, if any. */
3534 if (unlikely(buflen & 0x01)) {
3535 u16 align_buf[1] = { 0 };
3536 unsigned char *trailing_buf = buf + buflen - 1;
3537
3538 if (write_data) {
3539 memcpy(align_buf, trailing_buf, 1);
3540 writew(le16_to_cpu(align_buf[0]), mmio);
3541 } else {
3542 align_buf[0] = cpu_to_le16(readw(mmio));
3543 memcpy(trailing_buf, align_buf, 1);
3544 }
3545 }
1da177e4
LT		 3546}
3547
6ae4cfb5
AL		 3548/**
3549 * ata_pio_data_xfer - Transfer data by PIO
3550 * @ap: port to read/write
3551 * @buf: data buffer
3552 * @buflen: buffer length
344babaa 3553 * @write_data: read/write
6ae4cfb5
AL		 3554 *
3555 * Transfer data from/to the device data register by PIO.
3556 *
3557 * LOCKING:
3558 * Inherited from caller.
6ae4cfb5
AL		 3559 */
3560
1da177e4
LT		 3561static void ata_pio_data_xfer(struct ata_port *ap, unsigned char *buf,
3562 unsigned int buflen, int write_data)
3563{
6ae4cfb5 3564 unsigned int words = buflen >> 1;
1da177e4 3565
6ae4cfb5 3566 /* Transfer multiple of 2 bytes */
1da177e4 3567 if (write_data)
6ae4cfb5 3568 outsw(ap->ioaddr.data_addr, buf, words);
1da177e4 3569 else
6ae4cfb5
AL		 3570 insw(ap->ioaddr.data_addr, buf, words);
3571
3572 /* Transfer trailing 1 byte, if any. */
3573 if (unlikely(buflen & 0x01)) {
3574 u16 align_buf[1] = { 0 };
3575 unsigned char *trailing_buf = buf + buflen - 1;
3576
3577 if (write_data) {
3578 memcpy(align_buf, trailing_buf, 1);
3579 outw(le16_to_cpu(align_buf[0]), ap->ioaddr.data_addr);
3580 } else {
3581 align_buf[0] = cpu_to_le16(inw(ap->ioaddr.data_addr));
3582 memcpy(trailing_buf, align_buf, 1);
3583 }
3584 }
1da177e4
LT		 3585}
3586
6ae4cfb5
AL		 3587/**
3588 * ata_data_xfer - Transfer data from/to the data register.
3589 * @ap: port to read/write
3590 * @buf: data buffer
3591 * @buflen: buffer length
3592 * @do_write: read/write
3593 *
3594 * Transfer data from/to the device data register.
3595 *
3596 * LOCKING:
3597 * Inherited from caller.
6ae4cfb5
AL		 3598 */
3599
1da177e4
LT		 3600static void ata_data_xfer(struct ata_port *ap, unsigned char *buf,
3601 unsigned int buflen, int do_write)
3602{
a1bd9e68
AC		 3603 /* Make the crap hardware pay the costs not the good stuff */
3604 if (unlikely(ap->flags & ATA_FLAG_IRQ_MASK)) {
3605 unsigned long flags;
3606 local_irq_save(flags);
3607 if (ap->flags & ATA_FLAG_MMIO)
3608 ata_mmio_data_xfer(ap, buf, buflen, do_write);
3609 else
3610 ata_pio_data_xfer(ap, buf, buflen, do_write);
3611 local_irq_restore(flags);
3612 } else {
3613 if (ap->flags & ATA_FLAG_MMIO)
3614 ata_mmio_data_xfer(ap, buf, buflen, do_write);
3615 else
3616 ata_pio_data_xfer(ap, buf, buflen, do_write);
3617 }
1da177e4
LT		 3618}
3619
6ae4cfb5
AL		 3620/**
3621 * ata_pio_sector - Transfer ATA_SECT_SIZE (512 bytes) of data.
3622 * @qc: Command on going
3623 *
3624 * Transfer ATA_SECT_SIZE of data from/to the ATA device.
3625 *
3626 * LOCKING:
3627 * Inherited from caller.
3628 */
3629
1da177e4
LT		 3630static void ata_pio_sector(struct ata_queued_cmd *qc)
3631{
3632 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
cedc9a47 3633 struct scatterlist *sg = qc->__sg;
1da177e4
LT		 3634 struct ata_port *ap = qc->ap;
3635 struct page *page;
3636 unsigned int offset;
3637 unsigned char *buf;
3638
3639 if (qc->cursect == (qc->nsect - 1))
14be71f4 3640 ap->hsm_task_state = HSM_ST_LAST;
1da177e4
LT		 3641
3642 page = sg[qc->cursg].page;
3643 offset = sg[qc->cursg].offset + qc->cursg_ofs * ATA_SECT_SIZE;
3644
3645 /* get the current page and offset */
3646 page = nth_page(page, (offset >> PAGE_SHIFT));
3647 offset %= PAGE_SIZE;
3648
3649 buf = kmap(page) + offset;
3650
3651 qc->cursect++;
3652 qc->cursg_ofs++;
3653
32529e01 3654 if ((qc->cursg_ofs * ATA_SECT_SIZE) == (&sg[qc->cursg])->length) {
1da177e4
LT		 3655 qc->cursg++;
3656 qc->cursg_ofs = 0;
3657 }
3658
3659 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
3660
3661 /* do the actual data transfer */
3662 do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
3663 ata_data_xfer(ap, buf, ATA_SECT_SIZE, do_write);
3664
3665 kunmap(page);
3666}
3667
6ae4cfb5
AL		 3668/**
3669 * __atapi_pio_bytes - Transfer data from/to the ATAPI device.
3670 * @qc: Command on going
3671 * @bytes: number of bytes
3672 *
3673 * Transfer Transfer data from/to the ATAPI device.
3674 *
3675 * LOCKING:
3676 * Inherited from caller.
3677 *
3678 */
3679
1da177e4
LT		 3680static void __atapi_pio_bytes(struct ata_queued_cmd *qc, unsigned int bytes)
3681{
3682 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
cedc9a47 3683 struct scatterlist *sg = qc->__sg;
1da177e4
LT		 3684 struct ata_port *ap = qc->ap;
3685 struct page *page;
3686 unsigned char *buf;
3687 unsigned int offset, count;
3688
563a6e1f 3689 if (qc->curbytes + bytes >= qc->nbytes)
14be71f4 3690 ap->hsm_task_state = HSM_ST_LAST;
1da177e4
LT		 3691
3692next_sg:
563a6e1f 3693 if (unlikely(qc->cursg >= qc->n_elem)) {
7fb6ec28 3694 /*
563a6e1f
AL		 3695 * The end of qc->sg is reached and the device expects
3696 * more data to transfer. In order not to overrun qc->sg
3697 * and fulfill length specified in the byte count register,
3698 * - for read case, discard trailing data from the device
3699 * - for write case, padding zero data to the device
3700 */
3701 u16 pad_buf[1] = { 0 };
3702 unsigned int words = bytes >> 1;
3703 unsigned int i;
3704
3705 if (words) /* warning if bytes > 1 */
7fb6ec28 3706 printk(KERN_WARNING "ata%u: %u bytes trailing data\n",
563a6e1f
AL		 3707 ap->id, bytes);
3708
3709 for (i = 0; i < words; i++)
3710 ata_data_xfer(ap, (unsigned char*)pad_buf, 2, do_write);
3711
14be71f4 3712 ap->hsm_task_state = HSM_ST_LAST;
563a6e1f
AL		 3713 return;
3714 }
3715
cedc9a47 3716 sg = &qc->__sg[qc->cursg];
1da177e4 3717
1da177e4
LT		 3718 page = sg->page;
3719 offset = sg->offset + qc->cursg_ofs;
3720
3721 /* get the current page and offset */
3722 page = nth_page(page, (offset >> PAGE_SHIFT));
3723 offset %= PAGE_SIZE;
3724
6952df03 3725 /* don't overrun current sg */
32529e01 3726 count = min(sg->length - qc->cursg_ofs, bytes);
1da177e4
LT		 3727
3728 /* don't cross page boundaries */
3729 count = min(count, (unsigned int)PAGE_SIZE - offset);
3730
3731 buf = kmap(page) + offset;
3732
3733 bytes -= count;
3734 qc->curbytes += count;
3735 qc->cursg_ofs += count;
3736
32529e01 3737 if (qc->cursg_ofs == sg->length) {
1da177e4
LT		 3738 qc->cursg++;
3739 qc->cursg_ofs = 0;
3740 }
3741
3742 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
3743
3744 /* do the actual data transfer */
3745 ata_data_xfer(ap, buf, count, do_write);
3746
3747 kunmap(page);
3748
563a6e1f 3749 if (bytes)
1da177e4 3750 goto next_sg;
1da177e4
LT		 3751}
3752
6ae4cfb5
AL		 3753/**
3754 * atapi_pio_bytes - Transfer data from/to the ATAPI device.
3755 * @qc: Command on going
3756 *
3757 * Transfer Transfer data from/to the ATAPI device.
3758 *
3759 * LOCKING:
3760 * Inherited from caller.
6ae4cfb5
AL		 3761 */
3762
1da177e4
LT		 3763static void atapi_pio_bytes(struct ata_queued_cmd *qc)
3764{
3765 struct ata_port *ap = qc->ap;
3766 struct ata_device *dev = qc->dev;
3767 unsigned int ireason, bc_lo, bc_hi, bytes;
3768 int i_write, do_write = (qc->tf.flags & ATA_TFLAG_WRITE) ? 1 : 0;
3769
3770 ap->ops->tf_read(ap, &qc->tf);
3771 ireason = qc->tf.nsect;
3772 bc_lo = qc->tf.lbam;
3773 bc_hi = qc->tf.lbah;
3774 bytes = (bc_hi << 8) | bc_lo;
3775
3776 /* shall be cleared to zero, indicating xfer of data */
3777 if (ireason & (1 << 0))
3778 goto err_out;
3779
3780 /* make sure transfer direction matches expected */
3781 i_write = ((ireason & (1 << 1)) == 0) ? 1 : 0;
3782 if (do_write != i_write)
3783 goto err_out;
3784
3785 __atapi_pio_bytes(qc, bytes);
3786
3787 return;
3788
3789err_out:
3790 printk(KERN_INFO "ata%u: dev %u: ATAPI check failed\n",
3791 ap->id, dev->devno);
11a56d24 3792 qc->err_mask |= AC_ERR_HSM;
14be71f4 3793 ap->hsm_task_state = HSM_ST_ERR;
1da177e4
LT		 3794}
3795
3796/**
6f0ef4fa
RD		 3797 * ata_pio_block - start PIO on a block
3798 * @ap: the target ata_port
1da177e4
LT		 3799 *
3800 * LOCKING:
0cba632b 3801 * None. (executing in kernel thread context)
1da177e4
LT		 3802 */
3803
3804static void ata_pio_block(struct ata_port *ap)
3805{
3806 struct ata_queued_cmd *qc;
3807 u8 status;
3808
3809 /*
6f0ef4fa 3810 * This is purely heuristic. This is a fast path.
1da177e4
LT		 3811 * Sometimes when we enter, BSY will be cleared in
3812 * a chk-status or two. If not, the drive is probably seeking
3813 * or something. Snooze for a couple msecs, then
3814 * chk-status again. If still busy, fall back to
14be71f4 3815 * HSM_ST_POLL state.
1da177e4
LT		 3816 */
3817 status = ata_busy_wait(ap, ATA_BUSY, 5);
3818 if (status & ATA_BUSY) {
3819 msleep(2);
3820 status = ata_busy_wait(ap, ATA_BUSY, 10);
3821 if (status & ATA_BUSY) {
14be71f4 3822 ap->hsm_task_state = HSM_ST_POLL;
1da177e4
LT		 3823 ap->pio_task_timeout = jiffies + ATA_TMOUT_PIO;
3824 return;
3825 }
3826 }
3827
3828 qc = ata_qc_from_tag(ap, ap->active_tag);
a4631474 3829 WARN_ON(qc == NULL);
1da177e4 3830
fe79e683
AL		 3831 /* check error */
3832 if (status & (ATA_ERR | ATA_DF)) {
3833 qc->err_mask |= AC_ERR_DEV;
3834 ap->hsm_task_state = HSM_ST_ERR;
3835 return;
3836 }
3837
3838 /* transfer data if any */
1da177e4 3839 if (is_atapi_taskfile(&qc->tf)) {
fe79e683 3840 /* DRQ=0 means no more data to transfer */
1da177e4 3841 if ((status & ATA_DRQ) == 0) {
14be71f4 3842 ap->hsm_task_state = HSM_ST_LAST;
1da177e4
LT		 3843 return;
3844 }
3845
3846 atapi_pio_bytes(qc);
3847 } else {
3848 /* handle BSY=0, DRQ=0 as error */
3849 if ((status & ATA_DRQ) == 0) {
11a56d24 3850 qc->err_mask |= AC_ERR_HSM;
14be71f4 3851 ap->hsm_task_state = HSM_ST_ERR;
1da177e4
LT		 3852 return;
3853 }
3854
3855 ata_pio_sector(qc);
3856 }
3857}
3858
3859static void ata_pio_error(struct ata_port *ap)
3860{
3861 struct ata_queued_cmd *qc;
a7dac447 3862
1da177e4 3863 qc = ata_qc_from_tag(ap, ap->active_tag);
a4631474 3864 WARN_ON(qc == NULL);
1da177e4 3865
0565c26d
AL		 3866 if (qc->tf.command != ATA_CMD_PACKET)
3867 printk(KERN_WARNING "ata%u: PIO error\n", ap->id);
3868
2e9edbf8 3869 /* make sure qc->err_mask is available to
1c848984
AL		 3870 * know what's wrong and recover
3871 */
a4631474 3872 WARN_ON(qc->err_mask == 0);
1c848984 3873
14be71f4 3874 ap->hsm_task_state = HSM_ST_IDLE;
1da177e4 3875
a22e2eb0 3876 ata_poll_qc_complete(qc);
1da177e4
LT		 3877}
3878
3879static void ata_pio_task(void *_data)
3880{
3881 struct ata_port *ap = _data;
7fb6ec28
JG		 3882 unsigned long timeout;
3883 int qc_completed;
3884
3885fsm_start:
3886 timeout = 0;
3887 qc_completed = 0;
1da177e4 3888
14be71f4
AL		 3889 switch (ap->hsm_task_state) {
3890 case HSM_ST_IDLE:
1da177e4
LT		 3891 return;
3892
14be71f4 3893 case HSM_ST:
1da177e4
LT		 3894 ata_pio_block(ap);
3895 break;
3896
14be71f4 3897 case HSM_ST_LAST:
7fb6ec28 3898 qc_completed = ata_pio_complete(ap);
1da177e4
LT		 3899 break;
3900
14be71f4
AL		 3901 case HSM_ST_POLL:
3902 case HSM_ST_LAST_POLL:
1da177e4
LT		 3903 timeout = ata_pio_poll(ap);
3904 break;
3905
14be71f4
AL		 3906 case HSM_ST_TMOUT:
3907 case HSM_ST_ERR:
1da177e4
LT		 3908 ata_pio_error(ap);
3909 return;
3910 }
3911
3912 if (timeout)
8061f5f0 3913 ata_port_queue_task(ap, ata_pio_task, ap, timeout);
7fb6ec28
JG		 3914 else if (!qc_completed)
3915 goto fsm_start;
1da177e4
LT		 3916}
3917
8061f5f0
TH		 3918/**
3919 * atapi_packet_task - Write CDB bytes to hardware
3920 * @_data: Port to which ATAPI device is attached.
3921 *
3922 * When device has indicated its readiness to accept
3923 * a CDB, this function is called. Send the CDB.
3924 * If DMA is to be performed, exit immediately.
3925 * Otherwise, we are in polling mode, so poll
3926 * status under operation succeeds or fails.
3927 *
3928 * LOCKING:
3929 * Kernel thread context (may sleep)
3930 */
3931
3932static void atapi_packet_task(void *_data)
3933{
3934 struct ata_port *ap = _data;
3935 struct ata_queued_cmd *qc;
3936 u8 status;
3937
3938 qc = ata_qc_from_tag(ap, ap->active_tag);
3939 WARN_ON(qc == NULL);
3940 WARN_ON(!(qc->flags & ATA_QCFLAG_ACTIVE));
3941
3942 /* sleep-wait for BSY to clear */
3943 DPRINTK("busy wait\n");
3944 if (ata_busy_sleep(ap, ATA_TMOUT_CDB_QUICK, ATA_TMOUT_CDB)) {
3945 qc->err_mask |= AC_ERR_TIMEOUT;
3946 goto err_out;
3947 }
3948
3949 /* make sure DRQ is set */
3950 status = ata_chk_status(ap);
3951 if ((status & (ATA_BUSY | ATA_DRQ)) != ATA_DRQ) {
3952 qc->err_mask |= AC_ERR_HSM;
3953 goto err_out;
3954 }
3955
3956 /* send SCSI cdb */
3957 DPRINTK("send cdb\n");
3958 WARN_ON(qc->dev->cdb_len < 12);
3959
3960 if (qc->tf.protocol == ATA_PROT_ATAPI_DMA ||
3961 qc->tf.protocol == ATA_PROT_ATAPI_NODATA) {
3962 unsigned long flags;
3963
3964 /* Once we're done issuing command and kicking bmdma,
3965 * irq handler takes over. To not lose irq, we need
3966 * to clear NOINTR flag before sending cdb, but
3967 * interrupt handler shouldn't be invoked before we're
3968 * finished. Hence, the following locking.
3969 */
3970 spin_lock_irqsave(&ap->host_set->lock, flags);
3971 ap->flags &= ~ATA_FLAG_NOINTR;
3972 ata_data_xfer(ap, qc->cdb, qc->dev->cdb_len, 1);
3973 if (qc->tf.protocol == ATA_PROT_ATAPI_DMA)
3974 ap->ops->bmdma_start(qc); /* initiate bmdma */
3975 spin_unlock_irqrestore(&ap->host_set->lock, flags);
3976 } else {
3977 ata_data_xfer(ap, qc->cdb, qc->dev->cdb_len, 1);
3978
3979 /* PIO commands are handled by polling */
3980 ap->hsm_task_state = HSM_ST;
3981 ata_port_queue_task(ap, ata_pio_task, ap, 0);
3982 }
3983
3984 return;
3985
3986err_out:
3987 ata_poll_qc_complete(qc);
3988}
3989
1da177e4
LT		 3990/**
3991 * ata_qc_timeout - Handle timeout of queued command
3992 * @qc: Command that timed out
3993 *
3994 * Some part of the kernel (currently, only the SCSI layer)
3995 * has noticed that the active command on port @ap has not
3996 * completed after a specified length of time. Handle this
3997 * condition by disabling DMA (if necessary) and completing
3998 * transactions, with error if necessary.
3999 *
4000 * This also handles the case of the "lost interrupt", where
4001 * for some reason (possibly hardware bug, possibly driver bug)
4002 * an interrupt was not delivered to the driver, even though the
4003 * transaction completed successfully.
4004 *
4005 * LOCKING:
0cba632b 4006 * Inherited from SCSI layer (none, can sleep)
1da177e4
LT		 4007 */
4008
4009static void ata_qc_timeout(struct ata_queued_cmd *qc)
4010{
4011 struct ata_port *ap = qc->ap;
b8f6153e 4012 struct ata_host_set *host_set = ap->host_set;
1da177e4 4013 u8 host_stat = 0, drv_stat;
b8f6153e 4014 unsigned long flags;
1da177e4
LT		 4015
4016 DPRINTK("ENTER\n");
4017
c18d06f8
TH		 4018 ap->hsm_task_state = HSM_ST_IDLE;
4019
b8f6153e
JG		 4020 spin_lock_irqsave(&host_set->lock, flags);
4021
1da177e4
LT		 4022 switch (qc->tf.protocol) {
4023
4024 case ATA_PROT_DMA:
4025 case ATA_PROT_ATAPI_DMA:
4026 host_stat = ap->ops->bmdma_status(ap);
4027
4028 /* before we do anything else, clear DMA-Start bit */
b73fc89f 4029 ap->ops->bmdma_stop(qc);
1da177e4
LT		 4030
4031 /* fall through */
4032
4033 default:
4034 ata_altstatus(ap);
4035 drv_stat = ata_chk_status(ap);
4036
4037 /* ack bmdma irq events */
4038 ap->ops->irq_clear(ap);
4039
4040 printk(KERN_ERR "ata%u: command 0x%x timeout, stat 0x%x host_stat 0x%x\n",
4041 ap->id, qc->tf.command, drv_stat, host_stat);
4042
4043 /* complete taskfile transaction */
a22e2eb0 4044 qc->err_mask |= ac_err_mask(drv_stat);
1da177e4
LT		 4045 break;
4046 }
b8f6153e
JG		 4047
4048 spin_unlock_irqrestore(&host_set->lock, flags);
4049
a72ec4ce
TH		 4050 ata_eh_qc_complete(qc);
4051
1da177e4
LT		 4052 DPRINTK("EXIT\n");
4053}
4054
4055/**
4056 * ata_eng_timeout - Handle timeout of queued command
4057 * @ap: Port on which timed-out command is active
4058 *
4059 * Some part of the kernel (currently, only the SCSI layer)
4060 * has noticed that the active command on port @ap has not
4061 * completed after a specified length of time. Handle this
4062 * condition by disabling DMA (if necessary) and completing
4063 * transactions, with error if necessary.
4064 *
4065 * This also handles the case of the "lost interrupt", where
4066 * for some reason (possibly hardware bug, possibly driver bug)
4067 * an interrupt was not delivered to the driver, even though the
4068 * transaction completed successfully.
4069 *
4070 * LOCKING:
4071 * Inherited from SCSI layer (none, can sleep)
4072 */
4073
4074void ata_eng_timeout(struct ata_port *ap)
4075{
1da177e4
LT		 4076 DPRINTK("ENTER\n");
4077
f6379020 4078 ata_qc_timeout(ata_qc_from_tag(ap, ap->active_tag));
1da177e4 4079
1da177e4
LT		 4080 DPRINTK("EXIT\n");
4081}
4082
4083/**
4084 * ata_qc_new - Request an available ATA command, for queueing
4085 * @ap: Port associated with device @dev
4086 * @dev: Device from whom we request an available command structure
4087 *
4088 * LOCKING:
0cba632b 4089 * None.
1da177e4
LT		 4090 */
4091
4092static struct ata_queued_cmd *ata_qc_new(struct ata_port *ap)
4093{
4094 struct ata_queued_cmd *qc = NULL;
4095 unsigned int i;
4096
4097 for (i = 0; i < ATA_MAX_QUEUE; i++)
4098 if (!test_and_set_bit(i, &ap->qactive)) {
4099 qc = ata_qc_from_tag(ap, i);
4100 break;
4101 }
4102
4103 if (qc)
4104 qc->tag = i;
4105
4106 return qc;
4107}
4108
4109/**
4110 * ata_qc_new_init - Request an available ATA command, and initialize it
4111 * @ap: Port associated with device @dev
4112 * @dev: Device from whom we request an available command structure
4113 *
4114 * LOCKING:
0cba632b 4115 * None.
1da177e4
LT		 4116 */
4117
4118struct ata_queued_cmd *ata_qc_new_init(struct ata_port *ap,
4119 struct ata_device *dev)
4120{
4121 struct ata_queued_cmd *qc;
4122
4123 qc = ata_qc_new(ap);
4124 if (qc) {
1da177e4
LT		 4125 qc->scsicmd = NULL;
4126 qc->ap = ap;
4127 qc->dev = dev;
1da177e4 4128
2c13b7ce 4129 ata_qc_reinit(qc);
1da177e4
LT		 4130 }
4131
4132 return qc;
4133}
4134
1da177e4
LT		 4135/**
4136 * ata_qc_free - free unused ata_queued_cmd
4137 * @qc: Command to complete
4138 *
4139 * Designed to free unused ata_queued_cmd object
4140 * in case something prevents using it.
4141 *
4142 * LOCKING:
0cba632b 4143 * spin_lock_irqsave(host_set lock)
1da177e4
LT		 4144 */
4145void ata_qc_free(struct ata_queued_cmd *qc)
4146{
4ba946e9
TH		 4147 struct ata_port *ap = qc->ap;
4148 unsigned int tag;
4149
a4631474 4150 WARN_ON(qc == NULL); /* ata_qc_from_tag _might_ return NULL */
1da177e4 4151
4ba946e9
TH		 4152 qc->flags = 0;
4153 tag = qc->tag;
4154 if (likely(ata_tag_valid(tag))) {
4155 if (tag == ap->active_tag)
4156 ap->active_tag = ATA_TAG_POISON;
4157 qc->tag = ATA_TAG_POISON;
4158 clear_bit(tag, &ap->qactive);
4159 }
1da177e4
LT		 4160}
4161
76014427 4162void __ata_qc_complete(struct ata_queued_cmd *qc)
1da177e4 4163{
a4631474
TH		 4164 WARN_ON(qc == NULL); /* ata_qc_from_tag _might_ return NULL */
4165 WARN_ON(!(qc->flags & ATA_QCFLAG_ACTIVE));
1da177e4
LT		 4166
4167 if (likely(qc->flags & ATA_QCFLAG_DMAMAP))
4168 ata_sg_clean(qc);
4169
3f3791d3
AL		 4170 /* atapi: mark qc as inactive to prevent the interrupt handler
4171 * from completing the command twice later, before the error handler
4172 * is called. (when rc != 0 and atapi request sense is needed)
4173 */
4174 qc->flags &= ~ATA_QCFLAG_ACTIVE;
4175
1da177e4 4176 /* call completion callback */
77853bf2 4177 qc->complete_fn(qc);
1da177e4
LT		 4178}
4179
4180static inline int ata_should_dma_map(struct ata_queued_cmd *qc)
4181{
4182 struct ata_port *ap = qc->ap;
4183
4184 switch (qc->tf.protocol) {
4185 case ATA_PROT_DMA:
4186 case ATA_PROT_ATAPI_DMA:
4187 return 1;
4188
4189 case ATA_PROT_ATAPI:
4190 case ATA_PROT_PIO:
1da177e4
LT		 4191 if (ap->flags & ATA_FLAG_PIO_DMA)
4192 return 1;
4193
4194 /* fall through */
4195
4196 default:
4197 return 0;
4198 }
4199
4200 /* never reached */
4201}
4202
4203/**
4204 * ata_qc_issue - issue taskfile to device
4205 * @qc: command to issue to device
4206 *
4207 * Prepare an ATA command to submission to device.
4208 * This includes mapping the data into a DMA-able
4209 * area, filling in the S/G table, and finally
4210 * writing the taskfile to hardware, starting the command.
4211 *
4212 * LOCKING:
4213 * spin_lock_irqsave(host_set lock)
1da177e4 4214 */
8e0e694a 4215void ata_qc_issue(struct ata_queued_cmd *qc)
1da177e4
LT		 4216{
4217 struct ata_port *ap = qc->ap;
4218
e4a70e76
TH		 4219 qc->ap->active_tag = qc->tag;
4220 qc->flags |= ATA_QCFLAG_ACTIVE;
4221
1da177e4
LT		 4222 if (ata_should_dma_map(qc)) {
4223 if (qc->flags & ATA_QCFLAG_SG) {
4224 if (ata_sg_setup(qc))
8e436af9 4225 goto sg_err;
1da177e4
LT		 4226 } else if (qc->flags & ATA_QCFLAG_SINGLE) {
4227 if (ata_sg_setup_one(qc))
8e436af9 4228 goto sg_err;
1da177e4
LT		 4229 }
4230 } else {
4231 qc->flags &= ~ATA_QCFLAG_DMAMAP;
4232 }
4233
4234 ap->ops->qc_prep(qc);
4235
8e0e694a
TH		 4236 qc->err_mask |= ap->ops->qc_issue(qc);
4237 if (unlikely(qc->err_mask))
4238 goto err;
4239 return;
1da177e4 4240
8e436af9
TH		 4241sg_err:
4242 qc->flags &= ~ATA_QCFLAG_DMAMAP;
8e0e694a
TH		 4243 qc->err_mask |= AC_ERR_SYSTEM;
4244err:
4245 ata_qc_complete(qc);
1da177e4
LT		 4246}
4247
4248/**
4249 * ata_qc_issue_prot - issue taskfile to device in proto-dependent manner
4250 * @qc: command to issue to device
4251 *
4252 * Using various libata functions and hooks, this function
4253 * starts an ATA command. ATA commands are grouped into
4254 * classes called "protocols", and issuing each type of protocol
4255 * is slightly different.
4256 *
0baab86b
EF		 4257 * May be used as the qc_issue() entry in ata_port_operations.
4258 *
1da177e4
LT		 4259 * LOCKING:
4260 * spin_lock_irqsave(host_set lock)
4261 *
4262 * RETURNS:
9a3d9eb0 4263 * Zero on success, AC_ERR_* mask on failure
1da177e4
LT		 4264 */
4265
9a3d9eb0 4266unsigned int ata_qc_issue_prot(struct ata_queued_cmd *qc)
1da177e4
LT		 4267{
4268 struct ata_port *ap = qc->ap;
4269
4270 ata_dev_select(ap, qc->dev->devno, 1, 0);
4271
4272 switch (qc->tf.protocol) {
4273 case ATA_PROT_NODATA:
e5338254 4274 ata_tf_to_host(ap, &qc->tf);
1da177e4
LT		 4275 break;
4276
4277 case ATA_PROT_DMA:
4278 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
4279 ap->ops->bmdma_setup(qc); /* set up bmdma */
4280 ap->ops->bmdma_start(qc); /* initiate bmdma */
4281 break;
4282
4283 case ATA_PROT_PIO: /* load tf registers, initiate polling pio */
4284 ata_qc_set_polling(qc);
e5338254 4285 ata_tf_to_host(ap, &qc->tf);
14be71f4 4286 ap->hsm_task_state = HSM_ST;
8061f5f0 4287 ata_port_queue_task(ap, ata_pio_task, ap, 0);
1da177e4
LT		 4288 break;
4289
4290 case ATA_PROT_ATAPI:
4291 ata_qc_set_polling(qc);
e5338254 4292 ata_tf_to_host(ap, &qc->tf);
8061f5f0 4293 ata_port_queue_task(ap, atapi_packet_task, ap, 0);
1da177e4
LT		 4294 break;
4295
4296 case ATA_PROT_ATAPI_NODATA:
c1389503 4297 ap->flags |= ATA_FLAG_NOINTR;
e5338254 4298 ata_tf_to_host(ap, &qc->tf);
8061f5f0 4299 ata_port_queue_task(ap, atapi_packet_task, ap, 0);
1da177e4
LT		 4300 break;
4301
4302 case ATA_PROT_ATAPI_DMA:
c1389503 4303 ap->flags |= ATA_FLAG_NOINTR;
1da177e4
LT		 4304 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
4305 ap->ops->bmdma_setup(qc); /* set up bmdma */
8061f5f0 4306 ata_port_queue_task(ap, atapi_packet_task, ap, 0);
1da177e4
LT		 4307 break;
4308
4309 default:
4310 WARN_ON(1);
9a3d9eb0 4311 return AC_ERR_SYSTEM;
1da177e4
LT		 4312 }
4313
4314 return 0;
4315}
4316
1da177e4
LT		 4317/**
4318 * ata_host_intr - Handle host interrupt for given (port, task)
4319 * @ap: Port on which interrupt arrived (possibly...)
4320 * @qc: Taskfile currently active in engine
4321 *
4322 * Handle host interrupt for given queued command. Currently,
4323 * only DMA interrupts are handled. All other commands are
4324 * handled via polling with interrupts disabled (nIEN bit).
4325 *
4326 * LOCKING:
4327 * spin_lock_irqsave(host_set lock)
4328 *
4329 * RETURNS:
4330 * One if interrupt was handled, zero if not (shared irq).
4331 */
4332
4333inline unsigned int ata_host_intr (struct ata_port *ap,
4334 struct ata_queued_cmd *qc)
4335{
4336 u8 status, host_stat;
4337
4338 switch (qc->tf.protocol) {
4339
4340 case ATA_PROT_DMA:
4341 case ATA_PROT_ATAPI_DMA:
4342 case ATA_PROT_ATAPI:
4343 /* check status of DMA engine */
4344 host_stat = ap->ops->bmdma_status(ap);
4345 VPRINTK("ata%u: host_stat 0x%X\n", ap->id, host_stat);
4346
4347 /* if it's not our irq... */
4348 if (!(host_stat & ATA_DMA_INTR))
4349 goto idle_irq;
4350
4351 /* before we do anything else, clear DMA-Start bit */
b73fc89f 4352 ap->ops->bmdma_stop(qc);
1da177e4
LT		 4353
4354 /* fall through */
4355
4356 case ATA_PROT_ATAPI_NODATA:
4357 case ATA_PROT_NODATA:
4358 /* check altstatus */
4359 status = ata_altstatus(ap);
4360 if (status & ATA_BUSY)
4361 goto idle_irq;
4362
4363 /* check main status, clearing INTRQ */
4364 status = ata_chk_status(ap);
4365 if (unlikely(status & ATA_BUSY))
4366 goto idle_irq;
4367 DPRINTK("ata%u: protocol %d (dev_stat 0x%X)\n",
4368 ap->id, qc->tf.protocol, status);
4369
4370 /* ack bmdma irq events */
4371 ap->ops->irq_clear(ap);
4372
4373 /* complete taskfile transaction */
a22e2eb0
AL		 4374 qc->err_mask |= ac_err_mask(status);
4375 ata_qc_complete(qc);
1da177e4
LT		 4376 break;
4377
4378 default:
4379 goto idle_irq;
4380 }
4381
4382 return 1; /* irq handled */
4383
4384idle_irq:
4385 ap->stats.idle_irq++;
4386
4387#ifdef ATA_IRQ_TRAP
4388 if ((ap->stats.idle_irq % 1000) == 0) {
1da177e4
LT		 4389 ata_irq_ack(ap, 0); /* debug trap */
4390 printk(KERN_WARNING "ata%d: irq trap\n", ap->id);
23cfce89 4391 return 1;
1da177e4
LT		 4392 }
4393#endif
4394 return 0; /* irq not handled */
4395}
4396
4397/**
4398 * ata_interrupt - Default ATA host interrupt handler
0cba632b
JG		 4399 * @irq: irq line (unused)
4400 * @dev_instance: pointer to our ata_host_set information structure
1da177e4
LT		 4401 * @regs: unused
4402 *
0cba632b
JG		 4403 * Default interrupt handler for PCI IDE devices. Calls
4404 * ata_host_intr() for each port that is not disabled.
4405 *
1da177e4 4406 * LOCKING:
0cba632b 4407 * Obtains host_set lock during operation.
1da177e4
LT		 4408 *
4409 * RETURNS:
0cba632b 4410 * IRQ_NONE or IRQ_HANDLED.
1da177e4
LT		 4411 */
4412
4413irqreturn_t ata_interrupt (int irq, void *dev_instance, struct pt_regs *regs)
4414{
4415 struct ata_host_set *host_set = dev_instance;
4416 unsigned int i;
4417 unsigned int handled = 0;
4418 unsigned long flags;
4419
4420 /* TODO: make _irqsave conditional on x86 PCI IDE legacy mode */
4421 spin_lock_irqsave(&host_set->lock, flags);
4422
4423 for (i = 0; i < host_set->n_ports; i++) {
4424 struct ata_port *ap;
4425
4426 ap = host_set->ports[i];
c1389503
TH		 4427 if (ap &&
4428 !(ap->flags & (ATA_FLAG_PORT_DISABLED | ATA_FLAG_NOINTR))) {
1da177e4
LT		 4429 struct ata_queued_cmd *qc;
4430
4431 qc = ata_qc_from_tag(ap, ap->active_tag);
21b1ed74
AL		 4432 if (qc && (!(qc->tf.ctl & ATA_NIEN)) &&
4433 (qc->flags & ATA_QCFLAG_ACTIVE))
1da177e4
LT		 4434 handled |= ata_host_intr(ap, qc);
4435 }
4436 }
4437
4438 spin_unlock_irqrestore(&host_set->lock, flags);
4439
4440 return IRQ_RETVAL(handled);
4441}
4442
0baab86b 4443
9b847548
JA		 4444/*
4445 * Execute a 'simple' command, that only consists of the opcode 'cmd' itself,
4446 * without filling any other registers
4447 */
4448static int ata_do_simple_cmd(struct ata_port *ap, struct ata_device *dev,
4449 u8 cmd)
4450{
4451 struct ata_taskfile tf;
4452 int err;
4453
4454 ata_tf_init(ap, &tf, dev->devno);
4455
4456 tf.command = cmd;
4457 tf.flags |= ATA_TFLAG_DEVICE;
4458 tf.protocol = ATA_PROT_NODATA;
4459
4460 err = ata_exec_internal(ap, dev, &tf, DMA_NONE, NULL, 0);
4461 if (err)
4462 printk(KERN_ERR "%s: ata command failed: %d\n",
4463 __FUNCTION__, err);
4464
4465 return err;
4466}
4467
4468static int ata_flush_cache(struct ata_port *ap, struct ata_device *dev)
4469{
4470 u8 cmd;
4471
4472 if (!ata_try_flush_cache(dev))
4473 return 0;
4474
4475 if (ata_id_has_flush_ext(dev->id))
4476 cmd = ATA_CMD_FLUSH_EXT;
4477 else
4478 cmd = ATA_CMD_FLUSH;
4479
4480 return ata_do_simple_cmd(ap, dev, cmd);
4481}
4482
4483static int ata_standby_drive(struct ata_port *ap, struct ata_device *dev)
4484{
4485 return ata_do_simple_cmd(ap, dev, ATA_CMD_STANDBYNOW1);
4486}
4487
4488static int ata_start_drive(struct ata_port *ap, struct ata_device *dev)
4489{
4490 return ata_do_simple_cmd(ap, dev, ATA_CMD_IDLEIMMEDIATE);
4491}
4492
4493/**
4494 * ata_device_resume - wakeup a previously suspended devices
c893a3ae
RD		 4495 * @ap: port the device is connected to
4496 * @dev: the device to resume
9b847548
JA		 4497 *
4498 * Kick the drive back into action, by sending it an idle immediate
4499 * command and making sure its transfer mode matches between drive
4500 * and host.
4501 *
4502 */
4503int ata_device_resume(struct ata_port *ap, struct ata_device *dev)
4504{
4505 if (ap->flags & ATA_FLAG_SUSPENDED) {
e82cbdb9 4506 struct ata_device *failed_dev;
9b847548 4507 ap->flags &= ~ATA_FLAG_SUSPENDED;
e82cbdb9
TH		 4508 while (ata_set_mode(ap, &failed_dev))
4509 ata_dev_disable(ap, failed_dev);
9b847548 4510 }
e1211e3f 4511 if (!ata_dev_enabled(dev))
9b847548
JA		 4512 return 0;
4513 if (dev->class == ATA_DEV_ATA)
4514 ata_start_drive(ap, dev);
4515
4516 return 0;
4517}
4518
4519/**
4520 * ata_device_suspend - prepare a device for suspend
c893a3ae
RD		 4521 * @ap: port the device is connected to
4522 * @dev: the device to suspend
9b847548
JA		 4523 *
4524 * Flush the cache on the drive, if appropriate, then issue a
4525 * standbynow command.
9b847548 4526 */
082776e4 4527int ata_device_suspend(struct ata_port *ap, struct ata_device *dev, pm_message_t state)
9b847548 4528{
e1211e3f 4529 if (!ata_dev_enabled(dev))
9b847548
JA		 4530 return 0;
4531 if (dev->class == ATA_DEV_ATA)
4532 ata_flush_cache(ap, dev);
4533
082776e4
NC		 4534 if (state.event != PM_EVENT_FREEZE)
4535 ata_standby_drive(ap, dev);
9b847548
JA		 4536 ap->flags |= ATA_FLAG_SUSPENDED;
4537 return 0;
4538}
4539
c893a3ae
RD		 4540/**
4541 * ata_port_start - Set port up for dma.
4542 * @ap: Port to initialize
4543 *
4544 * Called just after data structures for each port are
4545 * initialized. Allocates space for PRD table.
4546 *
4547 * May be used as the port_start() entry in ata_port_operations.
4548 *
4549 * LOCKING:
4550 * Inherited from caller.
4551 */
4552
1da177e4
LT		 4553int ata_port_start (struct ata_port *ap)
4554{
2f1f610b 4555 struct device *dev = ap->dev;
6037d6bb 4556 int rc;
1da177e4
LT		 4557
4558 ap->prd = dma_alloc_coherent(dev, ATA_PRD_TBL_SZ, &ap->prd_dma, GFP_KERNEL);
4559 if (!ap->prd)
4560 return -ENOMEM;
4561
6037d6bb
JG		 4562 rc = ata_pad_alloc(ap, dev);
4563 if (rc) {
cedc9a47 4564 dma_free_coherent(dev, ATA_PRD_TBL_SZ, ap->prd, ap->prd_dma);
6037d6bb 4565 return rc;
cedc9a47
JG		 4566 }
4567
1da177e4
LT		 4568 DPRINTK("prd alloc, virt %p, dma %llx\n", ap->prd, (unsigned long long) ap->prd_dma);
4569
4570 return 0;
4571}
4572
0baab86b
EF		 4573
4574/**
4575 * ata_port_stop - Undo ata_port_start()
4576 * @ap: Port to shut down
4577 *
4578 * Frees the PRD table.
4579 *
4580 * May be used as the port_stop() entry in ata_port_operations.
4581 *
4582 * LOCKING:
6f0ef4fa 4583 * Inherited from caller.
0baab86b
EF		 4584 */
4585
1da177e4
LT		 4586void ata_port_stop (struct ata_port *ap)
4587{
2f1f610b 4588 struct device *dev = ap->dev;
1da177e4
LT		 4589
4590 dma_free_coherent(dev, ATA_PRD_TBL_SZ, ap->prd, ap->prd_dma);
6037d6bb 4591 ata_pad_free(ap, dev);
1da177e4
LT		 4592}
4593
aa8f0dc6
JG		 4594void ata_host_stop (struct ata_host_set *host_set)
4595{
4596 if (host_set->mmio_base)
4597 iounmap(host_set->mmio_base);
4598}
4599
4600
1da177e4
LT		 4601/**
4602 * ata_host_remove - Unregister SCSI host structure with upper layers
4603 * @ap: Port to unregister
4604 * @do_unregister: 1 if we fully unregister, 0 to just stop the port
4605 *
4606 * LOCKING:
6f0ef4fa 4607 * Inherited from caller.
1da177e4
LT		 4608 */
4609
4610static void ata_host_remove(struct ata_port *ap, unsigned int do_unregister)
4611{
4612 struct Scsi_Host *sh = ap->host;
4613
4614 DPRINTK("ENTER\n");
4615
4616 if (do_unregister)
4617 scsi_remove_host(sh);
4618
4619 ap->ops->port_stop(ap);
4620}
4621
4622/**
4623 * ata_host_init - Initialize an ata_port structure
4624 * @ap: Structure to initialize
4625 * @host: associated SCSI mid-layer structure
4626 * @host_set: Collection of hosts to which @ap belongs
4627 * @ent: Probe information provided by low-level driver
4628 * @port_no: Port number associated with this ata_port
4629 *
0cba632b
JG		 4630 * Initialize a new ata_port structure, and its associated
4631 * scsi_host.
4632 *
1da177e4 4633 * LOCKING:
0cba632b 4634 * Inherited from caller.
1da177e4
LT		 4635 */
4636
4637static void ata_host_init(struct ata_port *ap, struct Scsi_Host *host,
4638 struct ata_host_set *host_set,
057ace5e 4639 const struct ata_probe_ent *ent, unsigned int port_no)
1da177e4
LT		 4640{
4641 unsigned int i;
4642
4643 host->max_id = 16;
4644 host->max_lun = 1;
4645 host->max_channel = 1;
4646 host->unique_id = ata_unique_id++;
4647 host->max_cmd_len = 12;
12413197 4648
1da177e4
LT		 4649 ap->flags = ATA_FLAG_PORT_DISABLED;
4650 ap->id = host->unique_id;
4651 ap->host = host;
4652 ap->ctl = ATA_DEVCTL_OBS;
4653 ap->host_set = host_set;
2f1f610b 4654 ap->dev = ent->dev;
1da177e4
LT		 4655 ap->port_no = port_no;
4656 ap->hard_port_no =
4657 ent->legacy_mode ? ent->hard_port_no : port_no;
4658 ap->pio_mask = ent->pio_mask;
4659 ap->mwdma_mask = ent->mwdma_mask;
4660 ap->udma_mask = ent->udma_mask;
4661 ap->flags |= ent->host_flags;
4662 ap->ops = ent->port_ops;
4663 ap->cbl = ATA_CBL_NONE;
1c3fae4d 4664 ap->sata_spd_limit = UINT_MAX;
1da177e4
LT		 4665 ap->active_tag = ATA_TAG_POISON;
4666 ap->last_ctl = 0xFF;
4667
86e45b6b 4668 INIT_WORK(&ap->port_task, NULL, NULL);
a72ec4ce 4669 INIT_LIST_HEAD(&ap->eh_done_q);
1da177e4 4670
acf356b1
TH		 4671 for (i = 0; i < ATA_MAX_DEVICES; i++) {
4672 struct ata_device *dev = &ap->device[i];
4673 dev->devno = i;
4674 dev->pio_mask = UINT_MAX;
4675 dev->mwdma_mask = UINT_MAX;
4676 dev->udma_mask = UINT_MAX;
4677 }
1da177e4
LT		 4678
4679#ifdef ATA_IRQ_TRAP
4680 ap->stats.unhandled_irq = 1;
4681 ap->stats.idle_irq = 1;
4682#endif
4683
4684 memcpy(&ap->ioaddr, &ent->port[port_no], sizeof(struct ata_ioports));
4685}
4686
4687/**
4688 * ata_host_add - Attach low-level ATA driver to system
4689 * @ent: Information provided by low-level driver
4690 * @host_set: Collections of ports to which we add
4691 * @port_no: Port number associated with this host
4692 *
0cba632b
JG		 4693 * Attach low-level ATA driver to system.
4694 *
1da177e4 4695 * LOCKING:
0cba632b 4696 * PCI/etc. bus probe sem.
1da177e4
LT		 4697 *
4698 * RETURNS:
0cba632b 4699 * New ata_port on success, for NULL on error.
1da177e4
LT		 4700 */
4701
057ace5e 4702static struct ata_port * ata_host_add(const struct ata_probe_ent *ent,
1da177e4
LT		 4703 struct ata_host_set *host_set,
4704 unsigned int port_no)
4705{
4706 struct Scsi_Host *host;
4707 struct ata_port *ap;
4708 int rc;
4709
4710 DPRINTK("ENTER\n");
aec5c3c1
TH		 4711
4712 if (!ent->port_ops->probe_reset &&
4713 !(ent->host_flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST))) {
4714 printk(KERN_ERR "ata%u: no reset mechanism available\n",
4715 port_no);
4716 return NULL;
4717 }
4718
1da177e4
LT		 4719 host = scsi_host_alloc(ent->sht, sizeof(struct ata_port));
4720 if (!host)
4721 return NULL;
4722
30afc84c
TH		 4723 host->transportt = &ata_scsi_transport_template;
4724
1da177e4
LT		 4725 ap = (struct ata_port *) &host->hostdata[0];
4726
4727 ata_host_init(ap, host, host_set, ent, port_no);
4728
4729 rc = ap->ops->port_start(ap);
4730 if (rc)
4731 goto err_out;
4732
4733 return ap;
4734
4735err_out:
4736 scsi_host_put(host);
4737 return NULL;
4738}
4739
4740/**
0cba632b
JG		 4741 * ata_device_add - Register hardware device with ATA and SCSI layers
4742 * @ent: Probe information describing hardware device to be registered
4743 *
4744 * This function processes the information provided in the probe
4745 * information struct @ent, allocates the necessary ATA and SCSI
4746 * host information structures, initializes them, and registers
4747 * everything with requisite kernel subsystems.
4748 *
4749 * This function requests irqs, probes the ATA bus, and probes
4750 * the SCSI bus.
1da177e4
LT		 4751 *
4752 * LOCKING:
0cba632b 4753 * PCI/etc. bus probe sem.
1da177e4
LT		 4754 *
4755 * RETURNS:
0cba632b 4756 * Number of ports registered. Zero on error (no ports registered).
1da177e4
LT		 4757 */
4758
057ace5e 4759int ata_device_add(const struct ata_probe_ent *ent)
1da177e4
LT		 4760{
4761 unsigned int count = 0, i;
4762 struct device *dev = ent->dev;
4763 struct ata_host_set *host_set;
4764
4765 DPRINTK("ENTER\n");
4766 /* alloc a container for our list of ATA ports (buses) */
57f3bda8 4767 host_set = kzalloc(sizeof(struct ata_host_set) +
1da177e4
LT		 4768 (ent->n_ports * sizeof(void *)), GFP_KERNEL);
4769 if (!host_set)
4770 return 0;
1da177e4
LT		 4771 spin_lock_init(&host_set->lock);
4772
4773 host_set->dev = dev;
4774 host_set->n_ports = ent->n_ports;
4775 host_set->irq = ent->irq;
4776 host_set->mmio_base = ent->mmio_base;
4777 host_set->private_data = ent->private_data;
4778 host_set->ops = ent->port_ops;
5444a6f4 4779 host_set->flags = ent->host_set_flags;
1da177e4
LT		 4780
4781 /* register each port bound to this device */
4782 for (i = 0; i < ent->n_ports; i++) {
4783 struct ata_port *ap;
4784 unsigned long xfer_mode_mask;
4785
4786 ap = ata_host_add(ent, host_set, i);
4787 if (!ap)
4788 goto err_out;
4789
4790 host_set->ports[i] = ap;
4791 xfer_mode_mask =(ap->udma_mask << ATA_SHIFT_UDMA) |
4792 (ap->mwdma_mask << ATA_SHIFT_MWDMA) |
4793 (ap->pio_mask << ATA_SHIFT_PIO);
4794
4795 /* print per-port info to dmesg */
4796 printk(KERN_INFO "ata%u: %cATA max %s cmd 0x%lX ctl 0x%lX "
4797 "bmdma 0x%lX irq %lu\n",
4798 ap->id,
4799 ap->flags & ATA_FLAG_SATA ? 'S' : 'P',
4800 ata_mode_string(xfer_mode_mask),
4801 ap->ioaddr.cmd_addr,
4802 ap->ioaddr.ctl_addr,
4803 ap->ioaddr.bmdma_addr,
4804 ent->irq);
4805
4806 ata_chk_status(ap);
4807 host_set->ops->irq_clear(ap);
4808 count++;
4809 }
4810
57f3bda8
RD		 4811 if (!count)
4812 goto err_free_ret;
1da177e4
LT		 4813
4814 /* obtain irq, that is shared between channels */
4815 if (request_irq(ent->irq, ent->port_ops->irq_handler, ent->irq_flags,
4816 DRV_NAME, host_set))
4817 goto err_out;
4818
4819 /* perform each probe synchronously */
4820 DPRINTK("probe begin\n");
4821 for (i = 0; i < count; i++) {
4822 struct ata_port *ap;
4823 int rc;
4824
4825 ap = host_set->ports[i];
4826
c893a3ae 4827 DPRINTK("ata%u: bus probe begin\n", ap->id);
1da177e4 4828 rc = ata_bus_probe(ap);
c893a3ae 4829 DPRINTK("ata%u: bus probe end\n", ap->id);
1da177e4
LT		 4830
4831 if (rc) {
4832 /* FIXME: do something useful here?
4833 * Current libata behavior will
4834 * tear down everything when
4835 * the module is removed
4836 * or the h/w is unplugged.
4837 */
4838 }
4839
4840 rc = scsi_add_host(ap->host, dev);
4841 if (rc) {
4842 printk(KERN_ERR "ata%u: scsi_add_host failed\n",
4843 ap->id);
4844 /* FIXME: do something useful here */
4845 /* FIXME: handle unconditional calls to
4846 * scsi_scan_host and ata_host_remove, below,
4847 * at the very least
4848 */
4849 }
4850 }
4851
4852 /* probes are done, now scan each port's disk(s) */
c893a3ae 4853 DPRINTK("host probe begin\n");
1da177e4
LT		 4854 for (i = 0; i < count; i++) {
4855 struct ata_port *ap = host_set->ports[i];
4856
644dd0cc 4857 ata_scsi_scan_host(ap);
1da177e4
LT		 4858 }
4859
4860 dev_set_drvdata(dev, host_set);
4861
4862 VPRINTK("EXIT, returning %u\n", ent->n_ports);
4863 return ent->n_ports; /* success */
4864
4865err_out:
4866 for (i = 0; i < count; i++) {
4867 ata_host_remove(host_set->ports[i], 1);
4868 scsi_host_put(host_set->ports[i]->host);
4869 }
57f3bda8 4870err_free_ret:
1da177e4
LT		 4871 kfree(host_set);
4872 VPRINTK("EXIT, returning 0\n");
4873 return 0;
4874}
4875
17b14451
AC		 4876/**
4877 * ata_host_set_remove - PCI layer callback for device removal
4878 * @host_set: ATA host set that was removed
4879 *
2e9edbf8 4880 * Unregister all objects associated with this host set. Free those
17b14451
AC		 4881 * objects.
4882 *
4883 * LOCKING:
4884 * Inherited from calling layer (may sleep).
4885 */
4886
17b14451
AC		 4887void ata_host_set_remove(struct ata_host_set *host_set)
4888{
4889 struct ata_port *ap;
4890 unsigned int i;
4891
4892 for (i = 0; i < host_set->n_ports; i++) {
4893 ap = host_set->ports[i];
4894 scsi_remove_host(ap->host);
4895 }
4896
4897 free_irq(host_set->irq, host_set);
4898
4899 for (i = 0; i < host_set->n_ports; i++) {
4900 ap = host_set->ports[i];
4901
4902 ata_scsi_release(ap->host);
4903
4904 if ((ap->flags & ATA_FLAG_NO_LEGACY) == 0) {
4905 struct ata_ioports *ioaddr = &ap->ioaddr;
4906
4907 if (ioaddr->cmd_addr == 0x1f0)
4908 release_region(0x1f0, 8);
4909 else if (ioaddr->cmd_addr == 0x170)
4910 release_region(0x170, 8);
4911 }
4912
4913 scsi_host_put(ap->host);
4914 }
4915
4916 if (host_set->ops->host_stop)
4917 host_set->ops->host_stop(host_set);
4918
4919 kfree(host_set);
4920}
4921
1da177e4
LT		 4922/**
4923 * ata_scsi_release - SCSI layer callback hook for host unload
4924 * @host: libata host to be unloaded
4925 *
4926 * Performs all duties necessary to shut down a libata port...
4927 * Kill port kthread, disable port, and release resources.
4928 *
4929 * LOCKING:
4930 * Inherited from SCSI layer.
4931 *
4932 * RETURNS:
4933 * One.
4934 */
4935
4936int ata_scsi_release(struct Scsi_Host *host)
4937{
4938 struct ata_port *ap = (struct ata_port *) &host->hostdata[0];
d9572b1d 4939 int i;
1da177e4
LT		 4940
4941 DPRINTK("ENTER\n");
4942
4943 ap->ops->port_disable(ap);
4944 ata_host_remove(ap, 0);
d9572b1d
TH		 4945 for (i = 0; i < ATA_MAX_DEVICES; i++)
4946 kfree(ap->device[i].id);
1da177e4
LT		 4947
4948 DPRINTK("EXIT\n");
4949 return 1;
4950}
4951
4952/**
4953 * ata_std_ports - initialize ioaddr with standard port offsets.
4954 * @ioaddr: IO address structure to be initialized
0baab86b
EF		 4955 *
4956 * Utility function which initializes data_addr, error_addr,
4957 * feature_addr, nsect_addr, lbal_addr, lbam_addr, lbah_addr,
4958 * device_addr, status_addr, and command_addr to standard offsets
4959 * relative to cmd_addr.
4960 *
4961 * Does not set ctl_addr, altstatus_addr, bmdma_addr, or scr_addr.
1da177e4 4962 */
0baab86b 4963
1da177e4
LT		 4964void ata_std_ports(struct ata_ioports *ioaddr)
4965{
4966 ioaddr->data_addr = ioaddr->cmd_addr + ATA_REG_DATA;
4967 ioaddr->error_addr = ioaddr->cmd_addr + ATA_REG_ERR;
4968 ioaddr->feature_addr = ioaddr->cmd_addr + ATA_REG_FEATURE;
4969 ioaddr->nsect_addr = ioaddr->cmd_addr + ATA_REG_NSECT;
4970 ioaddr->lbal_addr = ioaddr->cmd_addr + ATA_REG_LBAL;
4971 ioaddr->lbam_addr = ioaddr->cmd_addr + ATA_REG_LBAM;
4972 ioaddr->lbah_addr = ioaddr->cmd_addr + ATA_REG_LBAH;
4973 ioaddr->device_addr = ioaddr->cmd_addr + ATA_REG_DEVICE;
4974 ioaddr->status_addr = ioaddr->cmd_addr + ATA_REG_STATUS;
4975 ioaddr->command_addr = ioaddr->cmd_addr + ATA_REG_CMD;
4976}
4977
0baab86b 4978
374b1873
JG		 4979#ifdef CONFIG_PCI
4980
4981void ata_pci_host_stop (struct ata_host_set *host_set)
4982{
4983 struct pci_dev *pdev = to_pci_dev(host_set->dev);
4984
4985 pci_iounmap(pdev, host_set->mmio_base);
4986}
4987
1da177e4
LT		 4988/**
4989 * ata_pci_remove_one - PCI layer callback for device removal
4990 * @pdev: PCI device that was removed
4991 *
4992 * PCI layer indicates to libata via this hook that
6f0ef4fa 4993 * hot-unplug or module unload event has occurred.
1da177e4
LT		 4994 * Handle this by unregistering all objects associated
4995 * with this PCI device. Free those objects. Then finally
4996 * release PCI resources and disable device.
4997 *
4998 * LOCKING:
4999 * Inherited from PCI layer (may sleep).
5000 */
5001
5002void ata_pci_remove_one (struct pci_dev *pdev)
5003{
5004 struct device *dev = pci_dev_to_dev(pdev);
5005 struct ata_host_set *host_set = dev_get_drvdata(dev);
1da177e4 5006
17b14451 5007 ata_host_set_remove(host_set);
1da177e4
LT		 5008 pci_release_regions(pdev);
5009 pci_disable_device(pdev);
5010 dev_set_drvdata(dev, NULL);
5011}
5012
5013/* move to PCI subsystem */
057ace5e 5014int pci_test_config_bits(struct pci_dev *pdev, const struct pci_bits *bits)
1da177e4
LT		 5015{
5016 unsigned long tmp = 0;
5017
5018 switch (bits->width) {
5019 case 1: {
5020 u8 tmp8 = 0;
5021 pci_read_config_byte(pdev, bits->reg, &tmp8);
5022 tmp = tmp8;
5023 break;
5024 }
5025 case 2: {
5026 u16 tmp16 = 0;
5027 pci_read_config_word(pdev, bits->reg, &tmp16);
5028 tmp = tmp16;
5029 break;
5030 }
5031 case 4: {
5032 u32 tmp32 = 0;
5033 pci_read_config_dword(pdev, bits->reg, &tmp32);
5034 tmp = tmp32;
5035 break;
5036 }
5037
5038 default:
5039 return -EINVAL;
5040 }
5041
5042 tmp &= bits->mask;
5043
5044 return (tmp == bits->val) ? 1 : 0;
5045}
9b847548
JA		 5046
5047int ata_pci_device_suspend(struct pci_dev *pdev, pm_message_t state)
5048{
5049 pci_save_state(pdev);
5050 pci_disable_device(pdev);
5051 pci_set_power_state(pdev, PCI_D3hot);
5052 return 0;
5053}
5054
5055int ata_pci_device_resume(struct pci_dev *pdev)
5056{
5057 pci_set_power_state(pdev, PCI_D0);
5058 pci_restore_state(pdev);
5059 pci_enable_device(pdev);
5060 pci_set_master(pdev);
5061 return 0;
5062}
1da177e4
LT		 5063#endif /* CONFIG_PCI */
5064
5065
1da177e4
LT		 5066static int __init ata_init(void)
5067{
5068 ata_wq = create_workqueue("ata");
5069 if (!ata_wq)
5070 return -ENOMEM;
5071
5072 printk(KERN_DEBUG "libata version " DRV_VERSION " loaded.\n");
5073 return 0;
5074}
5075
5076static void __exit ata_exit(void)
5077{
5078 destroy_workqueue(ata_wq);
5079}
5080
5081module_init(ata_init);
5082module_exit(ata_exit);
5083
67846b30
JG		 5084static unsigned long ratelimit_time;
5085static spinlock_t ata_ratelimit_lock = SPIN_LOCK_UNLOCKED;
5086
5087int ata_ratelimit(void)
5088{
5089 int rc;
5090 unsigned long flags;
5091
5092 spin_lock_irqsave(&ata_ratelimit_lock, flags);
5093
5094 if (time_after(jiffies, ratelimit_time)) {
5095 rc = 1;
5096 ratelimit_time = jiffies + (HZ/5);
5097 } else
5098 rc = 0;
5099
5100 spin_unlock_irqrestore(&ata_ratelimit_lock, flags);
5101
5102 return rc;
5103}
5104
1da177e4
LT		 5105/*
5106 * libata is essentially a library of internal helper functions for
5107 * low-level ATA host controller drivers. As such, the API/ABI is
5108 * likely to change as new drivers are added and updated.
5109 * Do not depend on ABI/API stability.
5110 */
5111
5112EXPORT_SYMBOL_GPL(ata_std_bios_param);
5113EXPORT_SYMBOL_GPL(ata_std_ports);
5114EXPORT_SYMBOL_GPL(ata_device_add);
17b14451 5115EXPORT_SYMBOL_GPL(ata_host_set_remove);
1da177e4
LT		 5116EXPORT_SYMBOL_GPL(ata_sg_init);
5117EXPORT_SYMBOL_GPL(ata_sg_init_one);
76014427 5118EXPORT_SYMBOL_GPL(__ata_qc_complete);
1da177e4
LT		 5119EXPORT_SYMBOL_GPL(ata_qc_issue_prot);
5120EXPORT_SYMBOL_GPL(ata_eng_timeout);
5121EXPORT_SYMBOL_GPL(ata_tf_load);
5122EXPORT_SYMBOL_GPL(ata_tf_read);
5123EXPORT_SYMBOL_GPL(ata_noop_dev_select);
5124EXPORT_SYMBOL_GPL(ata_std_dev_select);
5125EXPORT_SYMBOL_GPL(ata_tf_to_fis);
5126EXPORT_SYMBOL_GPL(ata_tf_from_fis);
5127EXPORT_SYMBOL_GPL(ata_check_status);
5128EXPORT_SYMBOL_GPL(ata_altstatus);
1da177e4
LT		 5129EXPORT_SYMBOL_GPL(ata_exec_command);
5130EXPORT_SYMBOL_GPL(ata_port_start);
5131EXPORT_SYMBOL_GPL(ata_port_stop);
aa8f0dc6 5132EXPORT_SYMBOL_GPL(ata_host_stop);
1da177e4
LT		 5133EXPORT_SYMBOL_GPL(ata_interrupt);
5134EXPORT_SYMBOL_GPL(ata_qc_prep);
e46834cd 5135EXPORT_SYMBOL_GPL(ata_noop_qc_prep);
1da177e4
LT		 5136EXPORT_SYMBOL_GPL(ata_bmdma_setup);
5137EXPORT_SYMBOL_GPL(ata_bmdma_start);
5138EXPORT_SYMBOL_GPL(ata_bmdma_irq_clear);
5139EXPORT_SYMBOL_GPL(ata_bmdma_status);
5140EXPORT_SYMBOL_GPL(ata_bmdma_stop);
5141EXPORT_SYMBOL_GPL(ata_port_probe);
5142EXPORT_SYMBOL_GPL(sata_phy_reset);
5143EXPORT_SYMBOL_GPL(__sata_phy_reset);
5144EXPORT_SYMBOL_GPL(ata_bus_reset);
8a19ac89 5145EXPORT_SYMBOL_GPL(ata_std_probeinit);
c2bd5804
TH		 5146EXPORT_SYMBOL_GPL(ata_std_softreset);
5147EXPORT_SYMBOL_GPL(sata_std_hardreset);
5148EXPORT_SYMBOL_GPL(ata_std_postreset);
5149EXPORT_SYMBOL_GPL(ata_std_probe_reset);
a62c0fc5 5150EXPORT_SYMBOL_GPL(ata_drive_probe_reset);
623a3128 5151EXPORT_SYMBOL_GPL(ata_dev_revalidate);
2e9edbf8
JG		 5152EXPORT_SYMBOL_GPL(ata_dev_classify);
5153EXPORT_SYMBOL_GPL(ata_dev_pair);
1da177e4 5154EXPORT_SYMBOL_GPL(ata_port_disable);
67846b30 5155EXPORT_SYMBOL_GPL(ata_ratelimit);
6f8b9958 5156EXPORT_SYMBOL_GPL(ata_busy_sleep);
86e45b6b 5157EXPORT_SYMBOL_GPL(ata_port_queue_task);
1da177e4
LT		 5158EXPORT_SYMBOL_GPL(ata_scsi_ioctl);
5159EXPORT_SYMBOL_GPL(ata_scsi_queuecmd);
5160EXPORT_SYMBOL_GPL(ata_scsi_error);
5161EXPORT_SYMBOL_GPL(ata_scsi_slave_config);
5162EXPORT_SYMBOL_GPL(ata_scsi_release);
5163EXPORT_SYMBOL_GPL(ata_host_intr);
6a62a04d
TH		 5164EXPORT_SYMBOL_GPL(ata_id_string);
5165EXPORT_SYMBOL_GPL(ata_id_c_string);
1da177e4 5166EXPORT_SYMBOL_GPL(ata_scsi_simulate);
a72ec4ce
TH		 5167EXPORT_SYMBOL_GPL(ata_eh_qc_complete);
5168EXPORT_SYMBOL_GPL(ata_eh_qc_retry);
1da177e4 5169
1bc4ccff 5170EXPORT_SYMBOL_GPL(ata_pio_need_iordy);
452503f9
AC		 5171EXPORT_SYMBOL_GPL(ata_timing_compute);
5172EXPORT_SYMBOL_GPL(ata_timing_merge);
5173
1da177e4
LT		 5174#ifdef CONFIG_PCI
5175EXPORT_SYMBOL_GPL(pci_test_config_bits);
374b1873 5176EXPORT_SYMBOL_GPL(ata_pci_host_stop);
1da177e4
LT		 5177EXPORT_SYMBOL_GPL(ata_pci_init_native_mode);
5178EXPORT_SYMBOL_GPL(ata_pci_init_one);
5179EXPORT_SYMBOL_GPL(ata_pci_remove_one);
9b847548
JA		 5180EXPORT_SYMBOL_GPL(ata_pci_device_suspend);
5181EXPORT_SYMBOL_GPL(ata_pci_device_resume);
67951ade
AC		 5182EXPORT_SYMBOL_GPL(ata_pci_default_filter);
5183EXPORT_SYMBOL_GPL(ata_pci_clear_simplex);
1da177e4 5184#endif /* CONFIG_PCI */
9b847548
JA		 5185
5186EXPORT_SYMBOL_GPL(ata_device_suspend);
5187EXPORT_SYMBOL_GPL(ata_device_resume);
5188EXPORT_SYMBOL_GPL(ata_scsi_device_suspend);
5189EXPORT_SYMBOL_GPL(ata_scsi_device_resume);
Linux 6.x block layer and io_uring tree(s)