projects / linux-2.6-block.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
[PATCH] libata-dev: Minor fix for ata_hsm_move() to work with ata_host_intr()
[linux-2.6-block.git] / drivers / scsi / libata-core.c
CommitLineData
1da177e4 1/*
af36d7f0
JG		 2 * libata-core.c - helper library for ATA
3 *
4 * Maintained by: Jeff Garzik <jgarzik@pobox.com>
5 * Please ALWAYS copy linux-ide@vger.kernel.org
6 * on emails.
7 *
8 * Copyright 2003-2004 Red Hat, Inc. All rights reserved.
9 * Copyright 2003-2004 Jeff Garzik
10 *
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2, or (at your option)
15 * any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; see the file COPYING. If not, write to
24 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
25 *
26 *
27 * libata documentation is available via 'make {ps|pdf}docs',
28 * as Documentation/DocBook/libata.*
29 *
30 * Hardware documentation available from http://www.t13.org/ and
31 * http://www.sata-io.org/
32 *
1da177e4
LT		 33 */
34
35#include <linux/config.h>
36#include <linux/kernel.h>
37#include <linux/module.h>
38#include <linux/pci.h>
39#include <linux/init.h>
40#include <linux/list.h>
41#include <linux/mm.h>
42#include <linux/highmem.h>
43#include <linux/spinlock.h>
44#include <linux/blkdev.h>
45#include <linux/delay.h>
46#include <linux/timer.h>
47#include <linux/interrupt.h>
48#include <linux/completion.h>
49#include <linux/suspend.h>
50#include <linux/workqueue.h>
67846b30 51#include <linux/jiffies.h>
378f058c 52#include <linux/scatterlist.h>
1da177e4 53#include <scsi/scsi.h>
1da177e4 54#include "scsi_priv.h"
193515d5 55#include <scsi/scsi_cmnd.h>
1da177e4
LT		 56#include <scsi/scsi_host.h>
57#include <linux/libata.h>
58#include <asm/io.h>
59#include <asm/semaphore.h>
60#include <asm/byteorder.h>
61
62#include "libata.h"
63
6aff8f1f
TH		 64static unsigned int ata_dev_init_params(struct ata_port *ap,
65 struct ata_device *dev);
1da177e4 66static void ata_set_mode(struct ata_port *ap);
83206a29
TH		 67static unsigned int ata_dev_set_xfermode(struct ata_port *ap,
68 struct ata_device *dev);
acf356b1 69static void ata_dev_xfermask(struct ata_port *ap, struct ata_device *dev);
e33b9dfa 70static void ata_pio_error(struct ata_port *ap);
1da177e4
LT		 71
72static unsigned int ata_unique_id = 1;
73static struct workqueue_struct *ata_wq;
74
418dc1f5 75int atapi_enabled = 1;
1623c81e
JG		 76module_param(atapi_enabled, int, 0444);
77MODULE_PARM_DESC(atapi_enabled, "Enable discovery of ATAPI devices (0=off, 1=on)");
78
c3c013a2
JG		 79int libata_fua = 0;
80module_param_named(fua, libata_fua, int, 0444);
81MODULE_PARM_DESC(fua, "FUA support (0=off, 1=on)");
82
1da177e4
LT		 83MODULE_AUTHOR("Jeff Garzik");
84MODULE_DESCRIPTION("Library module for ATA devices");
85MODULE_LICENSE("GPL");
86MODULE_VERSION(DRV_VERSION);
87
0baab86b 88
1da177e4
LT		 89/**
90 * ata_tf_to_fis - Convert ATA taskfile to SATA FIS structure
91 * @tf: Taskfile to convert
92 * @fis: Buffer into which data will output
93 * @pmp: Port multiplier port
94 *
95 * Converts a standard ATA taskfile to a Serial ATA
96 * FIS structure (Register - Host to Device).
97 *
98 * LOCKING:
99 * Inherited from caller.
100 */
101
057ace5e 102void ata_tf_to_fis(const struct ata_taskfile *tf, u8 *fis, u8 pmp)
1da177e4
LT		 103{
104 fis[0] = 0x27; /* Register - Host to Device FIS */
105 fis[1] = (pmp & 0xf) | (1 << 7); /* Port multiplier number,
106 bit 7 indicates Command FIS */
107 fis[2] = tf->command;
108 fis[3] = tf->feature;
109
110 fis[4] = tf->lbal;
111 fis[5] = tf->lbam;
112 fis[6] = tf->lbah;
113 fis[7] = tf->device;
114
115 fis[8] = tf->hob_lbal;
116 fis[9] = tf->hob_lbam;
117 fis[10] = tf->hob_lbah;
118 fis[11] = tf->hob_feature;
119
120 fis[12] = tf->nsect;
121 fis[13] = tf->hob_nsect;
122 fis[14] = 0;
123 fis[15] = tf->ctl;
124
125 fis[16] = 0;
126 fis[17] = 0;
127 fis[18] = 0;
128 fis[19] = 0;
129}
130
131/**
132 * ata_tf_from_fis - Convert SATA FIS to ATA taskfile
133 * @fis: Buffer from which data will be input
134 * @tf: Taskfile to output
135 *
e12a1be6 136 * Converts a serial ATA FIS structure to a standard ATA taskfile.
1da177e4
LT		 137 *
138 * LOCKING:
139 * Inherited from caller.
140 */
141
057ace5e 142void ata_tf_from_fis(const u8 *fis, struct ata_taskfile *tf)
1da177e4
LT		 143{
144 tf->command = fis[2]; /* status */
145 tf->feature = fis[3]; /* error */
146
147 tf->lbal = fis[4];
148 tf->lbam = fis[5];
149 tf->lbah = fis[6];
150 tf->device = fis[7];
151
152 tf->hob_lbal = fis[8];
153 tf->hob_lbam = fis[9];
154 tf->hob_lbah = fis[10];
155
156 tf->nsect = fis[12];
157 tf->hob_nsect = fis[13];
158}
159
8cbd6df1
AL		 160static const u8 ata_rw_cmds[] = {
161 /* pio multi */
162 ATA_CMD_READ_MULTI,
163 ATA_CMD_WRITE_MULTI,
164 ATA_CMD_READ_MULTI_EXT,
165 ATA_CMD_WRITE_MULTI_EXT,
9a3dccc4
TH		 166 0,
167 0,
168 0,
169 ATA_CMD_WRITE_MULTI_FUA_EXT,
8cbd6df1
AL		 170 /* pio */
171 ATA_CMD_PIO_READ,
172 ATA_CMD_PIO_WRITE,
173 ATA_CMD_PIO_READ_EXT,
174 ATA_CMD_PIO_WRITE_EXT,
9a3dccc4
TH		 175 0,
176 0,
177 0,
178 0,
8cbd6df1
AL		 179 /* dma */
180 ATA_CMD_READ,
181 ATA_CMD_WRITE,
182 ATA_CMD_READ_EXT,
9a3dccc4
TH		 183 ATA_CMD_WRITE_EXT,
184 0,
185 0,
186 0,
187 ATA_CMD_WRITE_FUA_EXT
8cbd6df1 188};
1da177e4
LT		 189
190/**
8cbd6df1
AL		 191 * ata_rwcmd_protocol - set taskfile r/w commands and protocol
192 * @qc: command to examine and configure
1da177e4 193 *
2e9edbf8 194 * Examine the device configuration and tf->flags to calculate
8cbd6df1 195 * the proper read/write commands and protocol to use.
1da177e4
LT		 196 *
197 * LOCKING:
198 * caller.
199 */
9a3dccc4 200int ata_rwcmd_protocol(struct ata_queued_cmd *qc)
1da177e4 201{
8cbd6df1
AL		 202 struct ata_taskfile *tf = &qc->tf;
203 struct ata_device *dev = qc->dev;
9a3dccc4 204 u8 cmd;
1da177e4 205
9a3dccc4 206 int index, fua, lba48, write;
2e9edbf8 207
9a3dccc4 208 fua = (tf->flags & ATA_TFLAG_FUA) ? 4 : 0;
8cbd6df1
AL		 209 lba48 = (tf->flags & ATA_TFLAG_LBA48) ? 2 : 0;
210 write = (tf->flags & ATA_TFLAG_WRITE) ? 1 : 0;
1da177e4 211
8cbd6df1
AL		 212 if (dev->flags & ATA_DFLAG_PIO) {
213 tf->protocol = ATA_PROT_PIO;
9a3dccc4 214 index = dev->multi_count ? 0 : 8;
8d238e01
AC		 215 } else if (lba48 && (qc->ap->flags & ATA_FLAG_PIO_LBA48)) {
216 /* Unable to use DMA due to host limitation */
217 tf->protocol = ATA_PROT_PIO;
aef9d533 218 index = dev->multi_count ? 0 : 8;
8cbd6df1
AL		 219 } else {
220 tf->protocol = ATA_PROT_DMA;
9a3dccc4 221 index = 16;
8cbd6df1 222 }
1da177e4 223
9a3dccc4
TH		 224 cmd = ata_rw_cmds[index + fua + lba48 + write];
225 if (cmd) {
226 tf->command = cmd;
227 return 0;
228 }
229 return -1;
1da177e4
LT		 230}
231
cb95d562
TH		 232/**
233 * ata_pack_xfermask - Pack pio, mwdma and udma masks into xfer_mask
234 * @pio_mask: pio_mask
235 * @mwdma_mask: mwdma_mask
236 * @udma_mask: udma_mask
237 *
238 * Pack @pio_mask, @mwdma_mask and @udma_mask into a single
239 * unsigned int xfer_mask.
240 *
241 * LOCKING:
242 * None.
243 *
244 * RETURNS:
245 * Packed xfer_mask.
246 */
247static unsigned int ata_pack_xfermask(unsigned int pio_mask,
248 unsigned int mwdma_mask,
249 unsigned int udma_mask)
250{
251 return ((pio_mask << ATA_SHIFT_PIO) & ATA_MASK_PIO) |
252 ((mwdma_mask << ATA_SHIFT_MWDMA) & ATA_MASK_MWDMA) |
253 ((udma_mask << ATA_SHIFT_UDMA) & ATA_MASK_UDMA);
254}
255
c0489e4e
TH		 256/**
257 * ata_unpack_xfermask - Unpack xfer_mask into pio, mwdma and udma masks
258 * @xfer_mask: xfer_mask to unpack
259 * @pio_mask: resulting pio_mask
260 * @mwdma_mask: resulting mwdma_mask
261 * @udma_mask: resulting udma_mask
262 *
263 * Unpack @xfer_mask into @pio_mask, @mwdma_mask and @udma_mask.
264 * Any NULL distination masks will be ignored.
265 */
266static void ata_unpack_xfermask(unsigned int xfer_mask,
267 unsigned int *pio_mask,
268 unsigned int *mwdma_mask,
269 unsigned int *udma_mask)
270{
271 if (pio_mask)
272 *pio_mask = (xfer_mask & ATA_MASK_PIO) >> ATA_SHIFT_PIO;
273 if (mwdma_mask)
274 *mwdma_mask = (xfer_mask & ATA_MASK_MWDMA) >> ATA_SHIFT_MWDMA;
275 if (udma_mask)
276 *udma_mask = (xfer_mask & ATA_MASK_UDMA) >> ATA_SHIFT_UDMA;
277}
278
cb95d562
TH		 279static const struct ata_xfer_ent {
280 unsigned int shift, bits;
281 u8 base;
282} ata_xfer_tbl[] = {
283 { ATA_SHIFT_PIO, ATA_BITS_PIO, XFER_PIO_0 },
284 { ATA_SHIFT_MWDMA, ATA_BITS_MWDMA, XFER_MW_DMA_0 },
285 { ATA_SHIFT_UDMA, ATA_BITS_UDMA, XFER_UDMA_0 },
286 { -1, },
1da177e4
LT		 287};
288
289/**
cb95d562
TH		 290 * ata_xfer_mask2mode - Find matching XFER_* for the given xfer_mask
291 * @xfer_mask: xfer_mask of interest
1da177e4 292 *
cb95d562
TH		 293 * Return matching XFER_* value for @xfer_mask. Only the highest
294 * bit of @xfer_mask is considered.
1da177e4
LT		 295 *
296 * LOCKING:
297 * None.
298 *
299 * RETURNS:
cb95d562 300 * Matching XFER_* value, 0 if no match found.
1da177e4 301 */
cb95d562
TH		 302static u8 ata_xfer_mask2mode(unsigned int xfer_mask)
303{
304 int highbit = fls(xfer_mask) - 1;
305 const struct ata_xfer_ent *ent;
1da177e4 306
cb95d562
TH		 307 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
308 if (highbit >= ent->shift && highbit < ent->shift + ent->bits)
309 return ent->base + highbit - ent->shift;
310 return 0;
311}
312
313/**
314 * ata_xfer_mode2mask - Find matching xfer_mask for XFER_*
315 * @xfer_mode: XFER_* of interest
316 *
317 * Return matching xfer_mask for @xfer_mode.
318 *
319 * LOCKING:
320 * None.
321 *
322 * RETURNS:
323 * Matching xfer_mask, 0 if no match found.
324 */
325static unsigned int ata_xfer_mode2mask(u8 xfer_mode)
1da177e4 326{
cb95d562 327 const struct ata_xfer_ent *ent;
1da177e4 328
cb95d562
TH		 329 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
330 if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits)
331 return 1 << (ent->shift + xfer_mode - ent->base);
332 return 0;
333}
1da177e4 334
cb95d562
TH		 335/**
336 * ata_xfer_mode2shift - Find matching xfer_shift for XFER_*
337 * @xfer_mode: XFER_* of interest
338 *
339 * Return matching xfer_shift for @xfer_mode.
340 *
341 * LOCKING:
342 * None.
343 *
344 * RETURNS:
345 * Matching xfer_shift, -1 if no match found.
346 */
347static int ata_xfer_mode2shift(unsigned int xfer_mode)
348{
349 const struct ata_xfer_ent *ent;
1da177e4 350
cb95d562
TH		 351 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
352 if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits)
353 return ent->shift;
354 return -1;
355}
356
1da177e4 357/**
1da7b0d0
TH		 358 * ata_mode_string - convert xfer_mask to string
359 * @xfer_mask: mask of bits supported; only highest bit counts.
1da177e4
LT		 360 *
361 * Determine string which represents the highest speed
1da7b0d0 362 * (highest bit in @modemask).
1da177e4
LT		 363 *
364 * LOCKING:
365 * None.
366 *
367 * RETURNS:
368 * Constant C string representing highest speed listed in
1da7b0d0 369 * @mode_mask, or the constant C string "<n/a>".
1da177e4 370 */
1da7b0d0 371static const char *ata_mode_string(unsigned int xfer_mask)
1da177e4 372{
75f554bc
TH		 373 static const char * const xfer_mode_str[] = {
374 "PIO0",
375 "PIO1",
376 "PIO2",
377 "PIO3",
378 "PIO4",
379 "MWDMA0",
380 "MWDMA1",
381 "MWDMA2",
382 "UDMA/16",
383 "UDMA/25",
384 "UDMA/33",
385 "UDMA/44",
386 "UDMA/66",
387 "UDMA/100",
388 "UDMA/133",
389 "UDMA7",
390 };
1da7b0d0 391 int highbit;
1da177e4 392
1da7b0d0
TH		 393 highbit = fls(xfer_mask) - 1;
394 if (highbit >= 0 && highbit < ARRAY_SIZE(xfer_mode_str))
395 return xfer_mode_str[highbit];
1da177e4 396 return "<n/a>";
1da177e4
LT		 397}
398
0b8efb0a
TH		 399static void ata_dev_disable(struct ata_port *ap, struct ata_device *dev)
400{
401 if (ata_dev_present(dev)) {
402 printk(KERN_WARNING "ata%u: dev %u disabled\n",
403 ap->id, dev->devno);
404 dev->class++;
405 }
406}
407
1da177e4
LT		 408/**
409 * ata_pio_devchk - PATA device presence detection
410 * @ap: ATA channel to examine
411 * @device: Device to examine (starting at zero)
412 *
413 * This technique was originally described in
414 * Hale Landis's ATADRVR (www.ata-atapi.com), and
415 * later found its way into the ATA/ATAPI spec.
416 *
417 * Write a pattern to the ATA shadow registers,
418 * and if a device is present, it will respond by
419 * correctly storing and echoing back the
420 * ATA shadow register contents.
421 *
422 * LOCKING:
423 * caller.
424 */
425
426static unsigned int ata_pio_devchk(struct ata_port *ap,
427 unsigned int device)
428{
429 struct ata_ioports *ioaddr = &ap->ioaddr;
430 u8 nsect, lbal;
431
432 ap->ops->dev_select(ap, device);
433
434 outb(0x55, ioaddr->nsect_addr);
435 outb(0xaa, ioaddr->lbal_addr);
436
437 outb(0xaa, ioaddr->nsect_addr);
438 outb(0x55, ioaddr->lbal_addr);
439
440 outb(0x55, ioaddr->nsect_addr);
441 outb(0xaa, ioaddr->lbal_addr);
442
443 nsect = inb(ioaddr->nsect_addr);
444 lbal = inb(ioaddr->lbal_addr);
445
446 if ((nsect == 0x55) && (lbal == 0xaa))
447 return 1; /* we found a device */
448
449 return 0; /* nothing found */
450}
451
452/**
453 * ata_mmio_devchk - PATA device presence detection
454 * @ap: ATA channel to examine
455 * @device: Device to examine (starting at zero)
456 *
457 * This technique was originally described in
458 * Hale Landis's ATADRVR (www.ata-atapi.com), and
459 * later found its way into the ATA/ATAPI spec.
460 *
461 * Write a pattern to the ATA shadow registers,
462 * and if a device is present, it will respond by
463 * correctly storing and echoing back the
464 * ATA shadow register contents.
465 *
466 * LOCKING:
467 * caller.
468 */
469
470static unsigned int ata_mmio_devchk(struct ata_port *ap,
471 unsigned int device)
472{
473 struct ata_ioports *ioaddr = &ap->ioaddr;
474 u8 nsect, lbal;
475
476 ap->ops->dev_select(ap, device);
477
478 writeb(0x55, (void __iomem *) ioaddr->nsect_addr);
479 writeb(0xaa, (void __iomem *) ioaddr->lbal_addr);
480
481 writeb(0xaa, (void __iomem *) ioaddr->nsect_addr);
482 writeb(0x55, (void __iomem *) ioaddr->lbal_addr);
483
484 writeb(0x55, (void __iomem *) ioaddr->nsect_addr);
485 writeb(0xaa, (void __iomem *) ioaddr->lbal_addr);
486
487 nsect = readb((void __iomem *) ioaddr->nsect_addr);
488 lbal = readb((void __iomem *) ioaddr->lbal_addr);
489
490 if ((nsect == 0x55) && (lbal == 0xaa))
491 return 1; /* we found a device */
492
493 return 0; /* nothing found */
494}
495
496/**
497 * ata_devchk - PATA device presence detection
498 * @ap: ATA channel to examine
499 * @device: Device to examine (starting at zero)
500 *
501 * Dispatch ATA device presence detection, depending
502 * on whether we are using PIO or MMIO to talk to the
503 * ATA shadow registers.
504 *
505 * LOCKING:
506 * caller.
507 */
508
509static unsigned int ata_devchk(struct ata_port *ap,
510 unsigned int device)
511{
512 if (ap->flags & ATA_FLAG_MMIO)
513 return ata_mmio_devchk(ap, device);
514 return ata_pio_devchk(ap, device);
515}
516
517/**
518 * ata_dev_classify - determine device type based on ATA-spec signature
519 * @tf: ATA taskfile register set for device to be identified
520 *
521 * Determine from taskfile register contents whether a device is
522 * ATA or ATAPI, as per "Signature and persistence" section
523 * of ATA/PI spec (volume 1, sect 5.14).
524 *
525 * LOCKING:
526 * None.
527 *
528 * RETURNS:
529 * Device type, %ATA_DEV_ATA, %ATA_DEV_ATAPI, or %ATA_DEV_UNKNOWN
530 * the event of failure.
531 */
532
057ace5e 533unsigned int ata_dev_classify(const struct ata_taskfile *tf)
1da177e4
LT		 534{
535 /* Apple's open source Darwin code hints that some devices only
536 * put a proper signature into the LBA mid/high registers,
537 * So, we only check those. It's sufficient for uniqueness.
538 */
539
540 if (((tf->lbam == 0) && (tf->lbah == 0)) ||
541 ((tf->lbam == 0x3c) && (tf->lbah == 0xc3))) {
542 DPRINTK("found ATA device by sig\n");
543 return ATA_DEV_ATA;
544 }
545
546 if (((tf->lbam == 0x14) && (tf->lbah == 0xeb)) ||
547 ((tf->lbam == 0x69) && (tf->lbah == 0x96))) {
548 DPRINTK("found ATAPI device by sig\n");
549 return ATA_DEV_ATAPI;
550 }
551
552 DPRINTK("unknown device\n");
553 return ATA_DEV_UNKNOWN;
554}
555
556/**
557 * ata_dev_try_classify - Parse returned ATA device signature
558 * @ap: ATA channel to examine
559 * @device: Device to examine (starting at zero)
b4dc7623 560 * @r_err: Value of error register on completion
1da177e4
LT		 561 *
562 * After an event -- SRST, E.D.D., or SATA COMRESET -- occurs,
563 * an ATA/ATAPI-defined set of values is placed in the ATA
564 * shadow registers, indicating the results of device detection
565 * and diagnostics.
566 *
567 * Select the ATA device, and read the values from the ATA shadow
568 * registers. Then parse according to the Error register value,
569 * and the spec-defined values examined by ata_dev_classify().
570 *
571 * LOCKING:
572 * caller.
b4dc7623
TH		 573 *
574 * RETURNS:
575 * Device type - %ATA_DEV_ATA, %ATA_DEV_ATAPI or %ATA_DEV_NONE.
1da177e4
LT		 576 */
577
b4dc7623
TH		 578static unsigned int
579ata_dev_try_classify(struct ata_port *ap, unsigned int device, u8 *r_err)
1da177e4 580{
1da177e4
LT		 581 struct ata_taskfile tf;
582 unsigned int class;
583 u8 err;
584
585 ap->ops->dev_select(ap, device);
586
587 memset(&tf, 0, sizeof(tf));
588
1da177e4 589 ap->ops->tf_read(ap, &tf);
0169e284 590 err = tf.feature;
b4dc7623
TH		 591 if (r_err)
592 *r_err = err;
1da177e4
LT		 593
594 /* see if device passed diags */
595 if (err == 1)
596 /* do nothing */ ;
597 else if ((device == 0) && (err == 0x81))
598 /* do nothing */ ;
599 else
b4dc7623 600 return ATA_DEV_NONE;
1da177e4 601
b4dc7623 602 /* determine if device is ATA or ATAPI */
1da177e4 603 class = ata_dev_classify(&tf);
b4dc7623 604
1da177e4 605 if (class == ATA_DEV_UNKNOWN)
b4dc7623 606 return ATA_DEV_NONE;
1da177e4 607 if ((class == ATA_DEV_ATA) && (ata_chk_status(ap) == 0))
b4dc7623
TH		 608 return ATA_DEV_NONE;
609 return class;
1da177e4
LT		 610}
611
612/**
6a62a04d 613 * ata_id_string - Convert IDENTIFY DEVICE page into string
1da177e4
LT		 614 * @id: IDENTIFY DEVICE results we will examine
615 * @s: string into which data is output
616 * @ofs: offset into identify device page
617 * @len: length of string to return. must be an even number.
618 *
619 * The strings in the IDENTIFY DEVICE page are broken up into
620 * 16-bit chunks. Run through the string, and output each
621 * 8-bit chunk linearly, regardless of platform.
622 *
623 * LOCKING:
624 * caller.
625 */
626
6a62a04d
TH		 627void ata_id_string(const u16 *id, unsigned char *s,
628 unsigned int ofs, unsigned int len)
1da177e4
LT		 629{
630 unsigned int c;
631
632 while (len > 0) {
633 c = id[ofs] >> 8;
634 *s = c;
635 s++;
636
637 c = id[ofs] & 0xff;
638 *s = c;
639 s++;
640
641 ofs++;
642 len -= 2;
643 }
644}
645
0e949ff3 646/**
6a62a04d 647 * ata_id_c_string - Convert IDENTIFY DEVICE page into C string
0e949ff3
TH		 648 * @id: IDENTIFY DEVICE results we will examine
649 * @s: string into which data is output
650 * @ofs: offset into identify device page
651 * @len: length of string to return. must be an odd number.
652 *
6a62a04d 653 * This function is identical to ata_id_string except that it
0e949ff3
TH		 654 * trims trailing spaces and terminates the resulting string with
655 * null. @len must be actual maximum length (even number) + 1.
656 *
657 * LOCKING:
658 * caller.
659 */
6a62a04d
TH		 660void ata_id_c_string(const u16 *id, unsigned char *s,
661 unsigned int ofs, unsigned int len)
0e949ff3
TH		 662{
663 unsigned char *p;
664
665 WARN_ON(!(len & 1));
666
6a62a04d 667 ata_id_string(id, s, ofs, len - 1);
0e949ff3
TH		 668
669 p = s + strnlen(s, len - 1);
670 while (p > s && p[-1] == ' ')
671 p--;
672 *p = '\0';
673}
0baab86b 674
2940740b
TH		 675static u64 ata_id_n_sectors(const u16 *id)
676{
677 if (ata_id_has_lba(id)) {
678 if (ata_id_has_lba48(id))
679 return ata_id_u64(id, 100);
680 else
681 return ata_id_u32(id, 60);
682 } else {
683 if (ata_id_current_chs_valid(id))
684 return ata_id_u32(id, 57);
685 else
686 return id[1] * id[3] * id[6];
687 }
688}
0baab86b
EF		 689
690/**
691 * ata_noop_dev_select - Select device 0/1 on ATA bus
692 * @ap: ATA channel to manipulate
693 * @device: ATA device (numbered from zero) to select
694 *
695 * This function performs no actual function.
696 *
697 * May be used as the dev_select() entry in ata_port_operations.
698 *
699 * LOCKING:
700 * caller.
701 */
1da177e4
LT		 702void ata_noop_dev_select (struct ata_port *ap, unsigned int device)
703{
704}
705
0baab86b 706
1da177e4
LT		 707/**
708 * ata_std_dev_select - Select device 0/1 on ATA bus
709 * @ap: ATA channel to manipulate
710 * @device: ATA device (numbered from zero) to select
711 *
712 * Use the method defined in the ATA specification to
713 * make either device 0, or device 1, active on the
0baab86b
EF		 714 * ATA channel. Works with both PIO and MMIO.
715 *
716 * May be used as the dev_select() entry in ata_port_operations.
1da177e4
LT		 717 *
718 * LOCKING:
719 * caller.
720 */
721
722void ata_std_dev_select (struct ata_port *ap, unsigned int device)
723{
724 u8 tmp;
725
726 if (device == 0)
727 tmp = ATA_DEVICE_OBS;
728 else
729 tmp = ATA_DEVICE_OBS | ATA_DEV1;
730
731 if (ap->flags & ATA_FLAG_MMIO) {
732 writeb(tmp, (void __iomem *) ap->ioaddr.device_addr);
733 } else {
734 outb(tmp, ap->ioaddr.device_addr);
735 }
736 ata_pause(ap); /* needed; also flushes, for mmio */
737}
738
739/**
740 * ata_dev_select - Select device 0/1 on ATA bus
741 * @ap: ATA channel to manipulate
742 * @device: ATA device (numbered from zero) to select
743 * @wait: non-zero to wait for Status register BSY bit to clear
744 * @can_sleep: non-zero if context allows sleeping
745 *
746 * Use the method defined in the ATA specification to
747 * make either device 0, or device 1, active on the
748 * ATA channel.
749 *
750 * This is a high-level version of ata_std_dev_select(),
751 * which additionally provides the services of inserting
752 * the proper pauses and status polling, where needed.
753 *
754 * LOCKING:
755 * caller.
756 */
757
758void ata_dev_select(struct ata_port *ap, unsigned int device,
759 unsigned int wait, unsigned int can_sleep)
760{
761 VPRINTK("ENTER, ata%u: device %u, wait %u\n",
762 ap->id, device, wait);
763
764 if (wait)
765 ata_wait_idle(ap);
766
767 ap->ops->dev_select(ap, device);
768
769 if (wait) {
770 if (can_sleep && ap->device[device].class == ATA_DEV_ATAPI)
771 msleep(150);
772 ata_wait_idle(ap);
773 }
774}
775
776/**
777 * ata_dump_id - IDENTIFY DEVICE info debugging output
0bd3300a 778 * @id: IDENTIFY DEVICE page to dump
1da177e4 779 *
0bd3300a
TH		 780 * Dump selected 16-bit words from the given IDENTIFY DEVICE
781 * page.
1da177e4
LT		 782 *
783 * LOCKING:
784 * caller.
785 */
786
0bd3300a 787static inline void ata_dump_id(const u16 *id)
1da177e4
LT		 788{
789 DPRINTK("49==0x%04x "
790 "53==0x%04x "
791 "63==0x%04x "
792 "64==0x%04x "
793 "75==0x%04x \n",
0bd3300a
TH		 794 id[49],
795 id[53],
796 id[63],
797 id[64],
798 id[75]);
1da177e4
LT		 799 DPRINTK("80==0x%04x "
800 "81==0x%04x "
801 "82==0x%04x "
802 "83==0x%04x "
803 "84==0x%04x \n",
0bd3300a
TH		 804 id[80],
805 id[81],
806 id[82],
807 id[83],
808 id[84]);
1da177e4
LT		 809 DPRINTK("88==0x%04x "
810 "93==0x%04x\n",
0bd3300a
TH		 811 id[88],
812 id[93]);
1da177e4
LT		 813}
814
cb95d562
TH		 815/**
816 * ata_id_xfermask - Compute xfermask from the given IDENTIFY data
817 * @id: IDENTIFY data to compute xfer mask from
11e29e21 818 *
cb95d562
TH		 819 * Compute the xfermask for this device. This is not as trivial
820 * as it seems if we must consider early devices correctly.
821 *
822 * FIXME: pre IDE drive timing (do we care ?).
823 *
824 * LOCKING:
825 * None.
826 *
827 * RETURNS:
828 * Computed xfermask
11e29e21 829 */
cb95d562 830static unsigned int ata_id_xfermask(const u16 *id)
11e29e21 831{
cb95d562 832 unsigned int pio_mask, mwdma_mask, udma_mask;
11e29e21 833
ffa29456 834 /* Usual case. Word 53 indicates word 64 is valid */
cb95d562
TH		 835 if (id[ATA_ID_FIELD_VALID] & (1 << 1)) {
836 pio_mask = id[ATA_ID_PIO_MODES] & 0x03;
837 pio_mask <<= 3;
838 pio_mask |= 0x7;
839 } else {
840 /* If word 64 isn't valid then Word 51 high byte holds
841 * the PIO timing number for the maximum. Turn it into
842 * a mask.
843 */
844 pio_mask = (2 << (id[ATA_ID_OLD_PIO_MODES] & 0xFF)) - 1 ;
845
846 /* But wait.. there's more. Design your standards by
847 * committee and you too can get a free iordy field to
848 * process. However its the speeds not the modes that
849 * are supported... Note drivers using the timing API
850 * will get this right anyway
851 */
11e29e21
AC		 852 }
853
cb95d562 854 mwdma_mask = id[ATA_ID_MWDMA_MODES] & 0x07;
fb21f0d0
TH		 855
856 udma_mask = 0;
857 if (id[ATA_ID_FIELD_VALID] & (1 << 2))
858 udma_mask = id[ATA_ID_UDMA_MODES] & 0xff;
11e29e21 859
cb95d562 860 return ata_pack_xfermask(pio_mask, mwdma_mask, udma_mask);
95064379
TH		 861}
862
86e45b6b
TH		 863/**
864 * ata_port_queue_task - Queue port_task
865 * @ap: The ata_port to queue port_task for
866 *
867 * Schedule @fn(@data) for execution after @delay jiffies using
868 * port_task. There is one port_task per port and it's the
869 * user(low level driver)'s responsibility to make sure that only
870 * one task is active at any given time.
871 *
872 * libata core layer takes care of synchronization between
873 * port_task and EH. ata_port_queue_task() may be ignored for EH
874 * synchronization.
875 *
876 * LOCKING:
877 * Inherited from caller.
878 */
879void ata_port_queue_task(struct ata_port *ap, void (*fn)(void *), void *data,
880 unsigned long delay)
95064379 881{
86e45b6b
TH		 882 int rc;
883
2e755f68 884 if (ap->flags & ATA_FLAG_FLUSH_PORT_TASK)
86e45b6b
TH		 885 return;
886
887 PREPARE_WORK(&ap->port_task, fn, data);
888
889 if (!delay)
890 rc = queue_work(ata_wq, &ap->port_task);
891 else
892 rc = queue_delayed_work(ata_wq, &ap->port_task, delay);
893
894 /* rc == 0 means that another user is using port task */
895 WARN_ON(rc == 0);
c18d06f8
TH		 896}
897
898/**
86e45b6b
TH		 899 * ata_port_flush_task - Flush port_task
900 * @ap: The ata_port to flush port_task for
c18d06f8 901 *
86e45b6b
TH		 902 * After this function completes, port_task is guranteed not to
903 * be running or scheduled.
c18d06f8
TH		 904 *
905 * LOCKING:
906 * Kernel thread context (may sleep)
907 */
86e45b6b 908void ata_port_flush_task(struct ata_port *ap)
c18d06f8 909{
c18d06f8
TH		 910 unsigned long flags;
911
912 DPRINTK("ENTER\n");
913
914 spin_lock_irqsave(&ap->host_set->lock, flags);
2e755f68 915 ap->flags |= ATA_FLAG_FLUSH_PORT_TASK;
c18d06f8
TH		 916 spin_unlock_irqrestore(&ap->host_set->lock, flags);
917
918 DPRINTK("flush #1\n");
919 flush_workqueue(ata_wq);
920
921 /*
922 * At this point, if a task is running, it's guaranteed to see
923 * the FLUSH flag; thus, it will never queue pio tasks again.
924 * Cancel and flush.
925 */
86e45b6b 926 if (!cancel_delayed_work(&ap->port_task)) {
c18d06f8
TH		 927 DPRINTK("flush #2\n");
928 flush_workqueue(ata_wq);
929 }
930
931 spin_lock_irqsave(&ap->host_set->lock, flags);
2e755f68 932 ap->flags &= ~ATA_FLAG_FLUSH_PORT_TASK;
c18d06f8
TH		 933 spin_unlock_irqrestore(&ap->host_set->lock, flags);
934
935 DPRINTK("EXIT\n");
95064379
TH		 936}
937
77853bf2 938void ata_qc_complete_internal(struct ata_queued_cmd *qc)
64f043d8 939{
77853bf2 940 struct completion *waiting = qc->private_data;
64f043d8 941
77853bf2 942 qc->ap->ops->tf_read(qc->ap, &qc->tf);
a2a7a662 943 complete(waiting);
a2a7a662
TH		 944}
945
946/**
947 * ata_exec_internal - execute libata internal command
948 * @ap: Port to which the command is sent
949 * @dev: Device to which the command is sent
950 * @tf: Taskfile registers for the command and the result
951 * @dma_dir: Data tranfer direction of the command
952 * @buf: Data buffer of the command
953 * @buflen: Length of data buffer
954 *
955 * Executes libata internal command with timeout. @tf contains
956 * command on entry and result on return. Timeout and error
957 * conditions are reported via return value. No recovery action
958 * is taken after a command times out. It's caller's duty to
959 * clean up after timeout.
960 *
961 * LOCKING:
962 * None. Should be called with kernel context, might sleep.
963 */
964
965static unsigned
966ata_exec_internal(struct ata_port *ap, struct ata_device *dev,
967 struct ata_taskfile *tf,
968 int dma_dir, void *buf, unsigned int buflen)
969{
970 u8 command = tf->command;
971 struct ata_queued_cmd *qc;
972 DECLARE_COMPLETION(wait);
973 unsigned long flags;
77853bf2 974 unsigned int err_mask;
a2a7a662
TH		 975
976 spin_lock_irqsave(&ap->host_set->lock, flags);
977
978 qc = ata_qc_new_init(ap, dev);
979 BUG_ON(qc == NULL);
980
981 qc->tf = *tf;
982 qc->dma_dir = dma_dir;
983 if (dma_dir != DMA_NONE) {
984 ata_sg_init_one(qc, buf, buflen);
985 qc->nsect = buflen / ATA_SECT_SIZE;
986 }
987
77853bf2 988 qc->private_data = &wait;
a2a7a662
TH		 989 qc->complete_fn = ata_qc_complete_internal;
990
9a3d9eb0
TH		 991 qc->err_mask = ata_qc_issue(qc);
992 if (qc->err_mask)
8e436af9 993 ata_qc_complete(qc);
a2a7a662
TH		 994
995 spin_unlock_irqrestore(&ap->host_set->lock, flags);
996
997 if (!wait_for_completion_timeout(&wait, ATA_TMOUT_INTERNAL)) {
41ade50c
AL		 998 ata_port_flush_task(ap);
999
a2a7a662
TH		 1000 spin_lock_irqsave(&ap->host_set->lock, flags);
1001
1002 /* We're racing with irq here. If we lose, the
1003 * following test prevents us from completing the qc
1004 * again. If completion irq occurs after here but
1005 * before the caller cleans up, it will result in a
1006 * spurious interrupt. We can live with that.
1007 */
77853bf2 1008 if (qc->flags & ATA_QCFLAG_ACTIVE) {
11a56d24 1009 qc->err_mask = AC_ERR_TIMEOUT;
a2a7a662
TH		 1010 ata_qc_complete(qc);
1011 printk(KERN_WARNING "ata%u: qc timeout (cmd 0x%x)\n",
1012 ap->id, command);
64f043d8
JG		 1013 }
1014
a2a7a662 1015 spin_unlock_irqrestore(&ap->host_set->lock, flags);
64f043d8
JG		 1016 }
1017
77853bf2
TH		 1018 *tf = qc->tf;
1019 err_mask = qc->err_mask;
1020
1021 ata_qc_free(qc);
1022
1f7dd3e9
TH		 1023 /* XXX - Some LLDDs (sata_mv) disable port on command failure.
1024 * Until those drivers are fixed, we detect the condition
1025 * here, fail the command with AC_ERR_SYSTEM and reenable the
1026 * port.
1027 *
1028 * Note that this doesn't change any behavior as internal
1029 * command failure results in disabling the device in the
1030 * higher layer for LLDDs without new reset/EH callbacks.
1031 *
1032 * Kill the following code as soon as those drivers are fixed.
1033 */
1034 if (ap->flags & ATA_FLAG_PORT_DISABLED) {
1035 err_mask |= AC_ERR_SYSTEM;
1036 ata_port_probe(ap);
1037 }
1038
77853bf2 1039 return err_mask;
64f043d8
JG		 1040}
1041
1bc4ccff
AC		 1042/**
1043 * ata_pio_need_iordy - check if iordy needed
1044 * @adev: ATA device
1045 *
1046 * Check if the current speed of the device requires IORDY. Used
1047 * by various controllers for chip configuration.
1048 */
1049
1050unsigned int ata_pio_need_iordy(const struct ata_device *adev)
1051{
1052 int pio;
1053 int speed = adev->pio_mode - XFER_PIO_0;
1054
1055 if (speed < 2)
1056 return 0;
1057 if (speed > 2)
1058 return 1;
2e9edbf8 1059
1bc4ccff
AC		 1060 /* If we have no drive specific rule, then PIO 2 is non IORDY */
1061
1062 if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE */
1063 pio = adev->id[ATA_ID_EIDE_PIO];
1064 /* Is the speed faster than the drive allows non IORDY ? */
1065 if (pio) {
1066 /* This is cycle times not frequency - watch the logic! */
1067 if (pio > 240) /* PIO2 is 240nS per cycle */
1068 return 1;
1069 return 0;
1070 }
1071 }
1072 return 0;
1073}
1074
1da177e4 1075/**
49016aca
TH		 1076 * ata_dev_read_id - Read ID data from the specified device
1077 * @ap: port on which target device resides
1078 * @dev: target device
1079 * @p_class: pointer to class of the target device (may be changed)
1080 * @post_reset: is this read ID post-reset?
d9572b1d 1081 * @p_id: read IDENTIFY page (newly allocated)
1da177e4 1082 *
49016aca
TH		 1083 * Read ID data from the specified device. ATA_CMD_ID_ATA is
1084 * performed on ATA devices and ATA_CMD_ID_ATAPI on ATAPI
aec5c3c1
TH		 1085 * devices. This function also issues ATA_CMD_INIT_DEV_PARAMS
1086 * for pre-ATA4 drives.
1da177e4
LT		 1087 *
1088 * LOCKING:
49016aca
TH		 1089 * Kernel thread context (may sleep)
1090 *
1091 * RETURNS:
1092 * 0 on success, -errno otherwise.
1da177e4 1093 */
49016aca 1094static int ata_dev_read_id(struct ata_port *ap, struct ata_device *dev,
d9572b1d 1095 unsigned int *p_class, int post_reset, u16 **p_id)
1da177e4 1096{
49016aca 1097 unsigned int class = *p_class;
a0123703 1098 struct ata_taskfile tf;
49016aca 1099 unsigned int err_mask = 0;
d9572b1d 1100 u16 *id;
49016aca
TH		 1101 const char *reason;
1102 int rc;
1da177e4 1103
49016aca 1104 DPRINTK("ENTER, host %u, dev %u\n", ap->id, dev->devno);
1da177e4 1105
49016aca 1106 ata_dev_select(ap, dev->devno, 1, 1); /* select device 0/1 */
1da177e4 1107
d9572b1d
TH		 1108 id = kmalloc(sizeof(id[0]) * ATA_ID_WORDS, GFP_KERNEL);
1109 if (id == NULL) {
1110 rc = -ENOMEM;
1111 reason = "out of memory";
1112 goto err_out;
1113 }
1114
49016aca
TH		 1115 retry:
1116 ata_tf_init(ap, &tf, dev->devno);
a0123703 1117
49016aca
TH		 1118 switch (class) {
1119 case ATA_DEV_ATA:
a0123703 1120 tf.command = ATA_CMD_ID_ATA;
49016aca
TH		 1121 break;
1122 case ATA_DEV_ATAPI:
a0123703 1123 tf.command = ATA_CMD_ID_ATAPI;
49016aca
TH		 1124 break;
1125 default:
1126 rc = -ENODEV;
1127 reason = "unsupported class";
1128 goto err_out;
1da177e4
LT		 1129 }
1130
a0123703 1131 tf.protocol = ATA_PROT_PIO;
1da177e4 1132
a0123703 1133 err_mask = ata_exec_internal(ap, dev, &tf, DMA_FROM_DEVICE,
49016aca 1134 id, sizeof(id[0]) * ATA_ID_WORDS);
a0123703 1135 if (err_mask) {
49016aca
TH		 1136 rc = -EIO;
1137 reason = "I/O error";
1da177e4
LT		 1138 goto err_out;
1139 }
1140
49016aca 1141 swap_buf_le16(id, ATA_ID_WORDS);
1da177e4 1142
49016aca
TH		 1143 /* sanity check */
1144 if ((class == ATA_DEV_ATA) != ata_id_is_ata(id)) {
1145 rc = -EINVAL;
1146 reason = "device reports illegal type";
1147 goto err_out;
1148 }
1149
1150 if (post_reset && class == ATA_DEV_ATA) {
1151 /*
1152 * The exact sequence expected by certain pre-ATA4 drives is:
1153 * SRST RESET
1154 * IDENTIFY
1155 * INITIALIZE DEVICE PARAMETERS
1156 * anything else..
1157 * Some drives were very specific about that exact sequence.
1158 */
1159 if (ata_id_major_version(id) < 4 || !ata_id_has_lba(id)) {
1160 err_mask = ata_dev_init_params(ap, dev);
1161 if (err_mask) {
1162 rc = -EIO;
1163 reason = "INIT_DEV_PARAMS failed";
1164 goto err_out;
1165 }
1166
1167 /* current CHS translation info (id[53-58]) might be
1168 * changed. reread the identify device info.
1169 */
1170 post_reset = 0;
1171 goto retry;
1172 }
1173 }
1174
1175 *p_class = class;
d9572b1d 1176 *p_id = id;
49016aca
TH		 1177 return 0;
1178
1179 err_out:
1180 printk(KERN_WARNING "ata%u: dev %u failed to IDENTIFY (%s)\n",
1181 ap->id, dev->devno, reason);
d9572b1d 1182 kfree(id);
49016aca
TH		 1183 return rc;
1184}
1185
4b2f3ede
TH		 1186static inline u8 ata_dev_knobble(const struct ata_port *ap,
1187 struct ata_device *dev)
1188{
1189 return ((ap->cbl == ATA_CBL_SATA) && (!ata_id_is_sata(dev->id)));
1190}
1191
49016aca 1192/**
ffeae418
TH		 1193 * ata_dev_configure - Configure the specified ATA/ATAPI device
1194 * @ap: Port on which target device resides
1195 * @dev: Target device to configure
4c2d721a 1196 * @print_info: Enable device info printout
ffeae418
TH		 1197 *
1198 * Configure @dev according to @dev->id. Generic and low-level
1199 * driver specific fixups are also applied.
49016aca
TH		 1200 *
1201 * LOCKING:
ffeae418
TH		 1202 * Kernel thread context (may sleep)
1203 *
1204 * RETURNS:
1205 * 0 on success, -errno otherwise
49016aca 1206 */
4c2d721a
TH		 1207static int ata_dev_configure(struct ata_port *ap, struct ata_device *dev,
1208 int print_info)
49016aca 1209{
1148c3a7 1210 const u16 *id = dev->id;
ff8854b2 1211 unsigned int xfer_mask;
49016aca
TH		 1212 int i, rc;
1213
1214 if (!ata_dev_present(dev)) {
1215 DPRINTK("ENTER/EXIT (host %u, dev %u) -- nodev\n",
ffeae418
TH		 1216 ap->id, dev->devno);
1217 return 0;
49016aca
TH		 1218 }
1219
ffeae418 1220 DPRINTK("ENTER, host %u, dev %u\n", ap->id, dev->devno);
49016aca 1221
c39f5ebe
TH		 1222 /* print device capabilities */
1223 if (print_info)
1224 printk(KERN_DEBUG "ata%u: dev %u cfg 49:%04x 82:%04x 83:%04x "
1225 "84:%04x 85:%04x 86:%04x 87:%04x 88:%04x\n",
1226 ap->id, dev->devno, id[49], id[82], id[83],
1227 id[84], id[85], id[86], id[87], id[88]);
1228
208a9933
TH		 1229 /* initialize to-be-configured parameters */
1230 dev->flags = 0;
1231 dev->max_sectors = 0;
1232 dev->cdb_len = 0;
1233 dev->n_sectors = 0;
1234 dev->cylinders = 0;
1235 dev->heads = 0;
1236 dev->sectors = 0;
1da177e4
LT		 1237
1238 /*
1239 * common ATA, ATAPI feature tests
1240 */
1241
ff8854b2 1242 /* find max transfer mode; for printk only */
1148c3a7 1243 xfer_mask = ata_id_xfermask(id);
1da177e4 1244
1148c3a7 1245 ata_dump_id(id);
1da177e4
LT		 1246
1247 /* ATA-specific feature tests */
1248 if (dev->class == ATA_DEV_ATA) {
1148c3a7 1249 dev->n_sectors = ata_id_n_sectors(id);
2940740b 1250
1148c3a7 1251 if (ata_id_has_lba(id)) {
4c2d721a 1252 const char *lba_desc;
8bf62ece 1253
4c2d721a
TH		 1254 lba_desc = "LBA";
1255 dev->flags |= ATA_DFLAG_LBA;
1148c3a7 1256 if (ata_id_has_lba48(id)) {
8bf62ece 1257 dev->flags |= ATA_DFLAG_LBA48;
4c2d721a
TH		 1258 lba_desc = "LBA48";
1259 }
8bf62ece
AL		 1260
1261 /* print device info to dmesg */
4c2d721a
TH		 1262 if (print_info)
1263 printk(KERN_INFO "ata%u: dev %u ATA-%d, "
1264 "max %s, %Lu sectors: %s\n",
1265 ap->id, dev->devno,
1148c3a7 1266 ata_id_major_version(id),
ff8854b2 1267 ata_mode_string(xfer_mask),
4c2d721a
TH		 1268 (unsigned long long)dev->n_sectors,
1269 lba_desc);
ffeae418 1270 } else {
8bf62ece
AL		 1271 /* CHS */
1272
1273 /* Default translation */
1148c3a7
TH		 1274 dev->cylinders = id[1];
1275 dev->heads = id[3];
1276 dev->sectors = id[6];
8bf62ece 1277
1148c3a7 1278 if (ata_id_current_chs_valid(id)) {
8bf62ece 1279 /* Current CHS translation is valid. */
1148c3a7
TH		 1280 dev->cylinders = id[54];
1281 dev->heads = id[55];
1282 dev->sectors = id[56];
8bf62ece
AL		 1283 }
1284
1285 /* print device info to dmesg */
4c2d721a
TH		 1286 if (print_info)
1287 printk(KERN_INFO "ata%u: dev %u ATA-%d, "
1288 "max %s, %Lu sectors: CHS %u/%u/%u\n",
1289 ap->id, dev->devno,
1148c3a7 1290 ata_id_major_version(id),
ff8854b2 1291 ata_mode_string(xfer_mask),
4c2d721a
TH		 1292 (unsigned long long)dev->n_sectors,
1293 dev->cylinders, dev->heads, dev->sectors);
1da177e4
LT		 1294 }
1295
07f6f7d0
AL		 1296 if (dev->id[59] & 0x100) {
1297 dev->multi_count = dev->id[59] & 0xff;
1298 DPRINTK("ata%u: dev %u multi count %u\n",
1299 ap->id, device, dev->multi_count);
1300 }
1301
13ee4628 1302 dev->cdb_len = 16;
1da177e4
LT		 1303 }
1304
1305 /* ATAPI-specific feature tests */
2c13b7ce 1306 else if (dev->class == ATA_DEV_ATAPI) {
1148c3a7 1307 rc = atapi_cdb_len(id);
1da177e4
LT		 1308 if ((rc < 12) || (rc > ATAPI_CDB_LEN)) {
1309 printk(KERN_WARNING "ata%u: unsupported CDB len\n", ap->id);
ffeae418 1310 rc = -EINVAL;
1da177e4
LT		 1311 goto err_out_nosup;
1312 }
6e7846e9 1313 dev->cdb_len = (unsigned int) rc;
1da177e4 1314
312f7da2
AL		 1315 if (ata_id_cdb_intr(dev->id))
1316 dev->flags |= ATA_DFLAG_CDB_INTR;
1317
1da177e4 1318 /* print device info to dmesg */
4c2d721a
TH		 1319 if (print_info)
1320 printk(KERN_INFO "ata%u: dev %u ATAPI, max %s\n",
ff8854b2 1321 ap->id, dev->devno, ata_mode_string(xfer_mask));
1da177e4
LT		 1322 }
1323
6e7846e9
TH		 1324 ap->host->max_cmd_len = 0;
1325 for (i = 0; i < ATA_MAX_DEVICES; i++)
1326 ap->host->max_cmd_len = max_t(unsigned int,
1327 ap->host->max_cmd_len,
1328 ap->device[i].cdb_len);
1329
6f2f3812 1330 /* limit bridge transfers to udma5, 200 sectors */
4b2f3ede 1331 if (ata_dev_knobble(ap, dev)) {
4c2d721a
TH		 1332 if (print_info)
1333 printk(KERN_INFO "ata%u(%u): applying bridge limits\n",
1334 ap->id, dev->devno);
5a529139 1335 dev->udma_mask &= ATA_UDMA5;
4b2f3ede 1336 dev->max_sectors = ATA_MAX_SECTORS;
6f2f3812
BC		 1337 }
1338
1339 if (ap->ops->dev_config)
4b2f3ede
TH		 1340 ap->ops->dev_config(ap, dev);
1341
1da177e4 1342 DPRINTK("EXIT, drv_stat = 0x%x\n", ata_chk_status(ap));
ffeae418 1343 return 0;
1da177e4
LT		 1344
1345err_out_nosup:
1da177e4 1346 DPRINTK("EXIT, err\n");
ffeae418 1347 return rc;
6f2f3812
BC		 1348}
1349
1da177e4
LT		 1350/**
1351 * ata_bus_probe - Reset and probe ATA bus
1352 * @ap: Bus to probe
1353 *
0cba632b
JG		 1354 * Master ATA bus probing function. Initiates a hardware-dependent
1355 * bus reset, then attempts to identify any devices found on
1356 * the bus.
1357 *
1da177e4 1358 * LOCKING:
0cba632b 1359 * PCI/etc. bus probe sem.
1da177e4
LT		 1360 *
1361 * RETURNS:
1362 * Zero on success, non-zero on error.
1363 */
1364
1365static int ata_bus_probe(struct ata_port *ap)
1366{
28ca5c57
TH		 1367 unsigned int classes[ATA_MAX_DEVICES];
1368 unsigned int i, rc, found = 0;
1da177e4 1369
28ca5c57 1370 ata_port_probe(ap);
c19ba8af 1371
2044470c
TH		 1372 /* reset and determine device classes */
1373 for (i = 0; i < ATA_MAX_DEVICES; i++)
1374 classes[i] = ATA_DEV_UNKNOWN;
c19ba8af 1375
2044470c 1376 if (ap->ops->probe_reset) {
c19ba8af 1377 rc = ap->ops->probe_reset(ap, classes);
28ca5c57
TH		 1378 if (rc) {
1379 printk("ata%u: reset failed (errno=%d)\n", ap->id, rc);
1380 return rc;
c19ba8af 1381 }
28ca5c57 1382 } else {
c19ba8af
TH		 1383 ap->ops->phy_reset(ap);
1384
2044470c
TH		 1385 if (!(ap->flags & ATA_FLAG_PORT_DISABLED))
1386 for (i = 0; i < ATA_MAX_DEVICES; i++)
28ca5c57 1387 classes[i] = ap->device[i].class;
2044470c 1388
28ca5c57
TH		 1389 ata_port_probe(ap);
1390 }
1da177e4 1391
2044470c
TH		 1392 for (i = 0; i < ATA_MAX_DEVICES; i++)
1393 if (classes[i] == ATA_DEV_UNKNOWN)
1394 classes[i] = ATA_DEV_NONE;
1395
28ca5c57 1396 /* read IDENTIFY page and configure devices */
1da177e4 1397 for (i = 0; i < ATA_MAX_DEVICES; i++) {
ffeae418
TH		 1398 struct ata_device *dev = &ap->device[i];
1399
28ca5c57
TH		 1400 dev->class = classes[i];
1401
ffeae418
TH		 1402 if (!ata_dev_present(dev))
1403 continue;
1404
1405 WARN_ON(dev->id != NULL);
1406 if (ata_dev_read_id(ap, dev, &dev->class, 1, &dev->id)) {
1407 dev->class = ATA_DEV_NONE;
1408 continue;
1409 }
1410
4c2d721a 1411 if (ata_dev_configure(ap, dev, 1)) {
fcef978f 1412 ata_dev_disable(ap, dev);
ffeae418 1413 continue;
1da177e4 1414 }
ffeae418 1415
ffeae418 1416 found = 1;
1da177e4
LT		 1417 }
1418
28ca5c57 1419 if (!found)
1da177e4
LT		 1420 goto err_out_disable;
1421
1422 ata_set_mode(ap);
1423 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1424 goto err_out_disable;
1425
1426 return 0;
1427
1428err_out_disable:
1429 ap->ops->port_disable(ap);
1da177e4
LT		 1430 return -1;
1431}
1432
1433/**
0cba632b
JG		 1434 * ata_port_probe - Mark port as enabled
1435 * @ap: Port for which we indicate enablement
1da177e4 1436 *
0cba632b
JG		 1437 * Modify @ap data structure such that the system
1438 * thinks that the entire port is enabled.
1439 *
1440 * LOCKING: host_set lock, or some other form of
1441 * serialization.
1da177e4
LT		 1442 */
1443
1444void ata_port_probe(struct ata_port *ap)
1445{
1446 ap->flags &= ~ATA_FLAG_PORT_DISABLED;
1447}
1448
3be680b7
TH		 1449/**
1450 * sata_print_link_status - Print SATA link status
1451 * @ap: SATA port to printk link status about
1452 *
1453 * This function prints link speed and status of a SATA link.
1454 *
1455 * LOCKING:
1456 * None.
1457 */
1458static void sata_print_link_status(struct ata_port *ap)
1459{
1460 u32 sstatus, tmp;
1461 const char *speed;
1462
1463 if (!ap->ops->scr_read)
1464 return;
1465
1466 sstatus = scr_read(ap, SCR_STATUS);
1467
1468 if (sata_dev_present(ap)) {
1469 tmp = (sstatus >> 4) & 0xf;
1470 if (tmp & (1 << 0))
1471 speed = "1.5";
1472 else if (tmp & (1 << 1))
1473 speed = "3.0";
1474 else
1475 speed = "<unknown>";
1476 printk(KERN_INFO "ata%u: SATA link up %s Gbps (SStatus %X)\n",
1477 ap->id, speed, sstatus);
1478 } else {
1479 printk(KERN_INFO "ata%u: SATA link down (SStatus %X)\n",
1480 ap->id, sstatus);
1481 }
1482}
1483
1da177e4 1484/**
780a87f7
JG		 1485 * __sata_phy_reset - Wake/reset a low-level SATA PHY
1486 * @ap: SATA port associated with target SATA PHY.
1da177e4 1487 *
780a87f7
JG		 1488 * This function issues commands to standard SATA Sxxx
1489 * PHY registers, to wake up the phy (and device), and
1490 * clear any reset condition.
1da177e4
LT		 1491 *
1492 * LOCKING:
0cba632b 1493 * PCI/etc. bus probe sem.
1da177e4
LT		 1494 *
1495 */
1496void __sata_phy_reset(struct ata_port *ap)
1497{
1498 u32 sstatus;
1499 unsigned long timeout = jiffies + (HZ * 5);
1500
1501 if (ap->flags & ATA_FLAG_SATA_RESET) {
cdcca89e
BR		 1502 /* issue phy wake/reset */
1503 scr_write_flush(ap, SCR_CONTROL, 0x301);
62ba2841
TH		 1504 /* Couldn't find anything in SATA I/II specs, but
1505 * AHCI-1.1 10.4.2 says at least 1 ms. */
1506 mdelay(1);
1da177e4 1507 }
cdcca89e 1508 scr_write_flush(ap, SCR_CONTROL, 0x300); /* phy wake/clear reset */
1da177e4
LT		 1509
1510 /* wait for phy to become ready, if necessary */
1511 do {
1512 msleep(200);
1513 sstatus = scr_read(ap, SCR_STATUS);
1514 if ((sstatus & 0xf) != 1)
1515 break;
1516 } while (time_before(jiffies, timeout));
1517
3be680b7
TH		 1518 /* print link status */
1519 sata_print_link_status(ap);
656563e3 1520
3be680b7
TH		 1521 /* TODO: phy layer with polling, timeouts, etc. */
1522 if (sata_dev_present(ap))
1da177e4 1523 ata_port_probe(ap);
3be680b7 1524 else
1da177e4 1525 ata_port_disable(ap);
1da177e4
LT		 1526
1527 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1528 return;
1529
1530 if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) {
1531 ata_port_disable(ap);
1532 return;
1533 }
1534
1535 ap->cbl = ATA_CBL_SATA;
1536}
1537
1538/**
780a87f7
JG		 1539 * sata_phy_reset - Reset SATA bus.
1540 * @ap: SATA port associated with target SATA PHY.
1da177e4 1541 *
780a87f7
JG		 1542 * This function resets the SATA bus, and then probes
1543 * the bus for devices.
1da177e4
LT		 1544 *
1545 * LOCKING:
0cba632b 1546 * PCI/etc. bus probe sem.
1da177e4
LT		 1547 *
1548 */
1549void sata_phy_reset(struct ata_port *ap)
1550{
1551 __sata_phy_reset(ap);
1552 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1553 return;
1554 ata_bus_reset(ap);
1555}
1556
ebdfca6e
AC		 1557/**
1558 * ata_dev_pair - return other device on cable
1559 * @ap: port
1560 * @adev: device
1561 *
1562 * Obtain the other device on the same cable, or if none is
1563 * present NULL is returned
1564 */
2e9edbf8 1565
ebdfca6e
AC		 1566struct ata_device *ata_dev_pair(struct ata_port *ap, struct ata_device *adev)
1567{
1568 struct ata_device *pair = &ap->device[1 - adev->devno];
1569 if (!ata_dev_present(pair))
1570 return NULL;
1571 return pair;
1572}
1573
1da177e4 1574/**
780a87f7
JG		 1575 * ata_port_disable - Disable port.
1576 * @ap: Port to be disabled.
1da177e4 1577 *
780a87f7
JG		 1578 * Modify @ap data structure such that the system
1579 * thinks that the entire port is disabled, and should
1580 * never attempt to probe or communicate with devices
1581 * on this port.
1582 *
1583 * LOCKING: host_set lock, or some other form of
1584 * serialization.
1da177e4
LT		 1585 */
1586
1587void ata_port_disable(struct ata_port *ap)
1588{
1589 ap->device[0].class = ATA_DEV_NONE;
1590 ap->device[1].class = ATA_DEV_NONE;
1591 ap->flags |= ATA_FLAG_PORT_DISABLED;
1592}
1593
452503f9
AC		 1594/*
1595 * This mode timing computation functionality is ported over from
1596 * drivers/ide/ide-timing.h and was originally written by Vojtech Pavlik
1597 */
1598/*
1599 * PIO 0-5, MWDMA 0-2 and UDMA 0-6 timings (in nanoseconds).
1600 * These were taken from ATA/ATAPI-6 standard, rev 0a, except
1601 * for PIO 5, which is a nonstandard extension and UDMA6, which
2e9edbf8 1602 * is currently supported only by Maxtor drives.
452503f9
AC		 1603 */
1604
1605static const struct ata_timing ata_timing[] = {
1606
1607 { XFER_UDMA_6, 0, 0, 0, 0, 0, 0, 0, 15 },
1608 { XFER_UDMA_5, 0, 0, 0, 0, 0, 0, 0, 20 },
1609 { XFER_UDMA_4, 0, 0, 0, 0, 0, 0, 0, 30 },
1610 { XFER_UDMA_3, 0, 0, 0, 0, 0, 0, 0, 45 },
1611
1612 { XFER_UDMA_2, 0, 0, 0, 0, 0, 0, 0, 60 },
1613 { XFER_UDMA_1, 0, 0, 0, 0, 0, 0, 0, 80 },
1614 { XFER_UDMA_0, 0, 0, 0, 0, 0, 0, 0, 120 },
1615
1616/* { XFER_UDMA_SLOW, 0, 0, 0, 0, 0, 0, 0, 150 }, */
2e9edbf8 1617
452503f9
AC		 1618 { XFER_MW_DMA_2, 25, 0, 0, 0, 70, 25, 120, 0 },
1619 { XFER_MW_DMA_1, 45, 0, 0, 0, 80, 50, 150, 0 },
1620 { XFER_MW_DMA_0, 60, 0, 0, 0, 215, 215, 480, 0 },
2e9edbf8 1621
452503f9
AC		 1622 { XFER_SW_DMA_2, 60, 0, 0, 0, 120, 120, 240, 0 },
1623 { XFER_SW_DMA_1, 90, 0, 0, 0, 240, 240, 480, 0 },
1624 { XFER_SW_DMA_0, 120, 0, 0, 0, 480, 480, 960, 0 },
1625
1626/* { XFER_PIO_5, 20, 50, 30, 100, 50, 30, 100, 0 }, */
1627 { XFER_PIO_4, 25, 70, 25, 120, 70, 25, 120, 0 },
1628 { XFER_PIO_3, 30, 80, 70, 180, 80, 70, 180, 0 },
1629
1630 { XFER_PIO_2, 30, 290, 40, 330, 100, 90, 240, 0 },
1631 { XFER_PIO_1, 50, 290, 93, 383, 125, 100, 383, 0 },
1632 { XFER_PIO_0, 70, 290, 240, 600, 165, 150, 600, 0 },
1633
1634/* { XFER_PIO_SLOW, 120, 290, 240, 960, 290, 240, 960, 0 }, */
1635
1636 { 0xFF }
1637};
1638
1639#define ENOUGH(v,unit) (((v)-1)/(unit)+1)
1640#define EZ(v,unit) ((v)?ENOUGH(v,unit):0)
1641
1642static void ata_timing_quantize(const struct ata_timing *t, struct ata_timing *q, int T, int UT)
1643{
1644 q->setup = EZ(t->setup * 1000, T);
1645 q->act8b = EZ(t->act8b * 1000, T);
1646 q->rec8b = EZ(t->rec8b * 1000, T);
1647 q->cyc8b = EZ(t->cyc8b * 1000, T);
1648 q->active = EZ(t->active * 1000, T);
1649 q->recover = EZ(t->recover * 1000, T);
1650 q->cycle = EZ(t->cycle * 1000, T);
1651 q->udma = EZ(t->udma * 1000, UT);
1652}
1653
1654void ata_timing_merge(const struct ata_timing *a, const struct ata_timing *b,
1655 struct ata_timing *m, unsigned int what)
1656{
1657 if (what & ATA_TIMING_SETUP ) m->setup = max(a->setup, b->setup);
1658 if (what & ATA_TIMING_ACT8B ) m->act8b = max(a->act8b, b->act8b);
1659 if (what & ATA_TIMING_REC8B ) m->rec8b = max(a->rec8b, b->rec8b);
1660 if (what & ATA_TIMING_CYC8B ) m->cyc8b = max(a->cyc8b, b->cyc8b);
1661 if (what & ATA_TIMING_ACTIVE ) m->active = max(a->active, b->active);
1662 if (what & ATA_TIMING_RECOVER) m->recover = max(a->recover, b->recover);
1663 if (what & ATA_TIMING_CYCLE ) m->cycle = max(a->cycle, b->cycle);
1664 if (what & ATA_TIMING_UDMA ) m->udma = max(a->udma, b->udma);
1665}
1666
1667static const struct ata_timing* ata_timing_find_mode(unsigned short speed)
1668{
1669 const struct ata_timing *t;
1670
1671 for (t = ata_timing; t->mode != speed; t++)
91190758 1672 if (t->mode == 0xFF)
452503f9 1673 return NULL;
2e9edbf8 1674 return t;
452503f9
AC		 1675}
1676
1677int ata_timing_compute(struct ata_device *adev, unsigned short speed,
1678 struct ata_timing *t, int T, int UT)
1679{
1680 const struct ata_timing *s;
1681 struct ata_timing p;
1682
1683 /*
2e9edbf8 1684 * Find the mode.
75b1f2f8 1685 */
452503f9
AC		 1686
1687 if (!(s = ata_timing_find_mode(speed)))
1688 return -EINVAL;
1689
75b1f2f8
AL		 1690 memcpy(t, s, sizeof(*s));
1691
452503f9
AC		 1692 /*
1693 * If the drive is an EIDE drive, it can tell us it needs extended
1694 * PIO/MW_DMA cycle timing.
1695 */
1696
1697 if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE drive */
1698 memset(&p, 0, sizeof(p));
1699 if(speed >= XFER_PIO_0 && speed <= XFER_SW_DMA_0) {
1700 if (speed <= XFER_PIO_2) p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO];
1701 else p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO_IORDY];
1702 } else if(speed >= XFER_MW_DMA_0 && speed <= XFER_MW_DMA_2) {
1703 p.cycle = adev->id[ATA_ID_EIDE_DMA_MIN];
1704 }
1705 ata_timing_merge(&p, t, t, ATA_TIMING_CYCLE | ATA_TIMING_CYC8B);
1706 }
1707
1708 /*
1709 * Convert the timing to bus clock counts.
1710 */
1711
75b1f2f8 1712 ata_timing_quantize(t, t, T, UT);
452503f9
AC		 1713
1714 /*
c893a3ae
RD		 1715 * Even in DMA/UDMA modes we still use PIO access for IDENTIFY,
1716 * S.M.A.R.T * and some other commands. We have to ensure that the
1717 * DMA cycle timing is slower/equal than the fastest PIO timing.
452503f9
AC		 1718 */
1719
1720 if (speed > XFER_PIO_4) {
1721 ata_timing_compute(adev, adev->pio_mode, &p, T, UT);
1722 ata_timing_merge(&p, t, t, ATA_TIMING_ALL);
1723 }
1724
1725 /*
c893a3ae 1726 * Lengthen active & recovery time so that cycle time is correct.
452503f9
AC		 1727 */
1728
1729 if (t->act8b + t->rec8b < t->cyc8b) {
1730 t->act8b += (t->cyc8b - (t->act8b + t->rec8b)) / 2;
1731 t->rec8b = t->cyc8b - t->act8b;
1732 }
1733
1734 if (t->active + t->recover < t->cycle) {
1735 t->active += (t->cycle - (t->active + t->recover)) / 2;
1736 t->recover = t->cycle - t->active;
1737 }
1738
1739 return 0;
1740}
1741
83206a29 1742static int ata_dev_set_mode(struct ata_port *ap, struct ata_device *dev)
1da177e4 1743{
83206a29
TH		 1744 unsigned int err_mask;
1745 int rc;
1da177e4
LT		 1746
1747 if (dev->xfer_shift == ATA_SHIFT_PIO)
1748 dev->flags |= ATA_DFLAG_PIO;
1749
83206a29
TH		 1750 err_mask = ata_dev_set_xfermode(ap, dev);
1751 if (err_mask) {
1752 printk(KERN_ERR
1753 "ata%u: failed to set xfermode (err_mask=0x%x)\n",
1754 ap->id, err_mask);
1755 return -EIO;
1756 }
1da177e4 1757
83206a29
TH		 1758 rc = ata_dev_revalidate(ap, dev, 0);
1759 if (rc) {
1760 printk(KERN_ERR
1761 "ata%u: failed to revalidate after set xfermode\n",
1762 ap->id);
1763 return rc;
48a8a14f 1764 }
1da177e4 1765
23e71c3d
TH		 1766 DPRINTK("xfer_shift=%u, xfer_mode=0x%x\n",
1767 dev->xfer_shift, (int)dev->xfer_mode);
1da177e4
LT		 1768
1769 printk(KERN_INFO "ata%u: dev %u configured for %s\n",
23e71c3d
TH		 1770 ap->id, dev->devno,
1771 ata_mode_string(ata_xfer_mode2mask(dev->xfer_mode)));
83206a29 1772 return 0;
1da177e4
LT		 1773}
1774
1775static int ata_host_set_pio(struct ata_port *ap)
1776{
a6d5a51c 1777 int i;
1da177e4
LT		 1778
1779 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1780 struct ata_device *dev = &ap->device[i];
a6d5a51c
TH		 1781
1782 if (!ata_dev_present(dev))
1783 continue;
1784
1785 if (!dev->pio_mode) {
88f93a31 1786 printk(KERN_WARNING "ata%u: no PIO support for device %d.\n", ap->id, i);
a6d5a51c 1787 return -1;
1da177e4 1788 }
a6d5a51c
TH		 1789
1790 dev->xfer_mode = dev->pio_mode;
1791 dev->xfer_shift = ATA_SHIFT_PIO;
1792 if (ap->ops->set_piomode)
1793 ap->ops->set_piomode(ap, dev);
1da177e4
LT		 1794 }
1795
1796 return 0;
1797}
1798
a6d5a51c 1799static void ata_host_set_dma(struct ata_port *ap)
1da177e4
LT		 1800{
1801 int i;
1802
1803 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1804 struct ata_device *dev = &ap->device[i];
a6d5a51c
TH		 1805
1806 if (!ata_dev_present(dev) || !dev->dma_mode)
1807 continue;
1808
1809 dev->xfer_mode = dev->dma_mode;
1810 dev->xfer_shift = ata_xfer_mode2shift(dev->dma_mode);
1811 if (ap->ops->set_dmamode)
1812 ap->ops->set_dmamode(ap, dev);
1da177e4
LT		 1813 }
1814}
1815
1816/**
1817 * ata_set_mode - Program timings and issue SET FEATURES - XFER
1818 * @ap: port on which timings will be programmed
1819 *
780a87f7
JG		 1820 * Set ATA device disk transfer mode (PIO3, UDMA6, etc.).
1821 *
1da177e4 1822 * LOCKING:
0cba632b 1823 * PCI/etc. bus probe sem.
1da177e4
LT		 1824 */
1825static void ata_set_mode(struct ata_port *ap)
1826{
a6d5a51c 1827 int i, rc;
1da177e4 1828
a6d5a51c
TH		 1829 /* step 1: calculate xfer_mask */
1830 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1831 struct ata_device *dev = &ap->device[i];
acf356b1 1832 unsigned int pio_mask, dma_mask;
a6d5a51c
TH		 1833
1834 if (!ata_dev_present(dev))
1835 continue;
1836
acf356b1 1837 ata_dev_xfermask(ap, dev);
1da177e4 1838
acf356b1 1839 /* TODO: let LLDD filter dev->*_mask here */
1da177e4 1840
acf356b1
TH		 1841 pio_mask = ata_pack_xfermask(dev->pio_mask, 0, 0);
1842 dma_mask = ata_pack_xfermask(0, dev->mwdma_mask, dev->udma_mask);
1843 dev->pio_mode = ata_xfer_mask2mode(pio_mask);
1844 dev->dma_mode = ata_xfer_mask2mode(dma_mask);
a6d5a51c
TH		 1845 }
1846
1847 /* step 2: always set host PIO timings */
1848 rc = ata_host_set_pio(ap);
1da177e4
LT		 1849 if (rc)
1850 goto err_out;
1851
a6d5a51c
TH		 1852 /* step 3: set host DMA timings */
1853 ata_host_set_dma(ap);
1da177e4
LT		 1854
1855 /* step 4: update devices' xfer mode */
83206a29
TH		 1856 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1857 struct ata_device *dev = &ap->device[i];
1da177e4 1858
83206a29
TH		 1859 if (!ata_dev_present(dev))
1860 continue;
1861
1862 if (ata_dev_set_mode(ap, dev))
1863 goto err_out;
1864 }
1da177e4
LT		 1865
1866 if (ap->ops->post_set_mode)
1867 ap->ops->post_set_mode(ap);
1868
1da177e4
LT		 1869 return;
1870
1871err_out:
1872 ata_port_disable(ap);
1873}
1874
1fdffbce
JG		 1875/**
1876 * ata_tf_to_host - issue ATA taskfile to host controller
1877 * @ap: port to which command is being issued
1878 * @tf: ATA taskfile register set
1879 *
1880 * Issues ATA taskfile register set to ATA host controller,
1881 * with proper synchronization with interrupt handler and
1882 * other threads.
1883 *
1884 * LOCKING:
1885 * spin_lock_irqsave(host_set lock)
1886 */
1887
1888static inline void ata_tf_to_host(struct ata_port *ap,
1889 const struct ata_taskfile *tf)
1890{
1891 ap->ops->tf_load(ap, tf);
1892 ap->ops->exec_command(ap, tf);
1893}
1894
1da177e4
LT		 1895/**
1896 * ata_busy_sleep - sleep until BSY clears, or timeout
1897 * @ap: port containing status register to be polled
1898 * @tmout_pat: impatience timeout
1899 * @tmout: overall timeout
1900 *
780a87f7
JG		 1901 * Sleep until ATA Status register bit BSY clears,
1902 * or a timeout occurs.
1903 *
1904 * LOCKING: None.
1da177e4
LT		 1905 */
1906
6f8b9958
TH		 1907unsigned int ata_busy_sleep (struct ata_port *ap,
1908 unsigned long tmout_pat, unsigned long tmout)
1da177e4
LT		 1909{
1910 unsigned long timer_start, timeout;
1911 u8 status;
1912
1913 status = ata_busy_wait(ap, ATA_BUSY, 300);
1914 timer_start = jiffies;
1915 timeout = timer_start + tmout_pat;
1916 while ((status & ATA_BUSY) && (time_before(jiffies, timeout))) {
1917 msleep(50);
1918 status = ata_busy_wait(ap, ATA_BUSY, 3);
1919 }
1920
1921 if (status & ATA_BUSY)
1922 printk(KERN_WARNING "ata%u is slow to respond, "
1923 "please be patient\n", ap->id);
1924
1925 timeout = timer_start + tmout;
1926 while ((status & ATA_BUSY) && (time_before(jiffies, timeout))) {
1927 msleep(50);
1928 status = ata_chk_status(ap);
1929 }
1930
1931 if (status & ATA_BUSY) {
1932 printk(KERN_ERR "ata%u failed to respond (%lu secs)\n",
1933 ap->id, tmout / HZ);
1934 return 1;
1935 }
1936
1937 return 0;
1938}
1939
1940static void ata_bus_post_reset(struct ata_port *ap, unsigned int devmask)
1941{
1942 struct ata_ioports *ioaddr = &ap->ioaddr;
1943 unsigned int dev0 = devmask & (1 << 0);
1944 unsigned int dev1 = devmask & (1 << 1);
1945 unsigned long timeout;
1946
1947 /* if device 0 was found in ata_devchk, wait for its
1948 * BSY bit to clear
1949 */
1950 if (dev0)
1951 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
1952
1953 /* if device 1 was found in ata_devchk, wait for
1954 * register access, then wait for BSY to clear
1955 */
1956 timeout = jiffies + ATA_TMOUT_BOOT;
1957 while (dev1) {
1958 u8 nsect, lbal;
1959
1960 ap->ops->dev_select(ap, 1);
1961 if (ap->flags & ATA_FLAG_MMIO) {
1962 nsect = readb((void __iomem *) ioaddr->nsect_addr);
1963 lbal = readb((void __iomem *) ioaddr->lbal_addr);
1964 } else {
1965 nsect = inb(ioaddr->nsect_addr);
1966 lbal = inb(ioaddr->lbal_addr);
1967 }
1968 if ((nsect == 1) && (lbal == 1))
1969 break;
1970 if (time_after(jiffies, timeout)) {
1971 dev1 = 0;
1972 break;
1973 }
1974 msleep(50); /* give drive a breather */
1975 }
1976 if (dev1)
1977 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
1978
1979 /* is all this really necessary? */
1980 ap->ops->dev_select(ap, 0);
1981 if (dev1)
1982 ap->ops->dev_select(ap, 1);
1983 if (dev0)
1984 ap->ops->dev_select(ap, 0);
1985}
1986
1da177e4
LT		 1987static unsigned int ata_bus_softreset(struct ata_port *ap,
1988 unsigned int devmask)
1989{
1990 struct ata_ioports *ioaddr = &ap->ioaddr;
1991
1992 DPRINTK("ata%u: bus reset via SRST\n", ap->id);
1993
1994 /* software reset. causes dev0 to be selected */
1995 if (ap->flags & ATA_FLAG_MMIO) {
1996 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
1997 udelay(20); /* FIXME: flush */
1998 writeb(ap->ctl | ATA_SRST, (void __iomem *) ioaddr->ctl_addr);
1999 udelay(20); /* FIXME: flush */
2000 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
2001 } else {
2002 outb(ap->ctl, ioaddr->ctl_addr);
2003 udelay(10);
2004 outb(ap->ctl | ATA_SRST, ioaddr->ctl_addr);
2005 udelay(10);
2006 outb(ap->ctl, ioaddr->ctl_addr);
2007 }
2008
2009 /* spec mandates ">= 2ms" before checking status.
2010 * We wait 150ms, because that was the magic delay used for
2011 * ATAPI devices in Hale Landis's ATADRVR, for the period of time
2012 * between when the ATA command register is written, and then
2013 * status is checked. Because waiting for "a while" before
2014 * checking status is fine, post SRST, we perform this magic
2015 * delay here as well.
09c7ad79
AC		 2016 *
2017 * Old drivers/ide uses the 2mS rule and then waits for ready
1da177e4
LT		 2018 */
2019 msleep(150);
2020
2e9edbf8
JG		 2021
2022 /* Before we perform post reset processing we want to see if
09c7ad79
AC		 2023 the bus shows 0xFF because the odd clown forgets the D7 pulldown
2024 resistor */
2e9edbf8 2025
09c7ad79
AC		 2026 if (ata_check_status(ap) == 0xFF)
2027 return 1; /* Positive is failure for some reason */
2028
1da177e4
LT		 2029 ata_bus_post_reset(ap, devmask);
2030
2031 return 0;
2032}
2033
2034/**
2035 * ata_bus_reset - reset host port and associated ATA channel
2036 * @ap: port to reset
2037 *
2038 * This is typically the first time we actually start issuing
2039 * commands to the ATA channel. We wait for BSY to clear, then
2040 * issue EXECUTE DEVICE DIAGNOSTIC command, polling for its
2041 * result. Determine what devices, if any, are on the channel
2042 * by looking at the device 0/1 error register. Look at the signature
2043 * stored in each device's taskfile registers, to determine if
2044 * the device is ATA or ATAPI.
2045 *
2046 * LOCKING:
0cba632b
JG		 2047 * PCI/etc. bus probe sem.
2048 * Obtains host_set lock.
1da177e4
LT		 2049 *
2050 * SIDE EFFECTS:
2051 * Sets ATA_FLAG_PORT_DISABLED if bus reset fails.
2052 */
2053
2054void ata_bus_reset(struct ata_port *ap)
2055{
2056 struct ata_ioports *ioaddr = &ap->ioaddr;
2057 unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
2058 u8 err;
aec5c3c1 2059 unsigned int dev0, dev1 = 0, devmask = 0;
1da177e4
LT		 2060
2061 DPRINTK("ENTER, host %u, port %u\n", ap->id, ap->port_no);
2062
2063 /* determine if device 0/1 are present */
2064 if (ap->flags & ATA_FLAG_SATA_RESET)
2065 dev0 = 1;
2066 else {
2067 dev0 = ata_devchk(ap, 0);
2068 if (slave_possible)
2069 dev1 = ata_devchk(ap, 1);
2070 }
2071
2072 if (dev0)
2073 devmask |= (1 << 0);
2074 if (dev1)
2075 devmask |= (1 << 1);
2076
2077 /* select device 0 again */
2078 ap->ops->dev_select(ap, 0);
2079
2080 /* issue bus reset */
2081 if (ap->flags & ATA_FLAG_SRST)
aec5c3c1
TH		 2082 if (ata_bus_softreset(ap, devmask))
2083 goto err_out;
1da177e4
LT		 2084
2085 /*
2086 * determine by signature whether we have ATA or ATAPI devices
2087 */
b4dc7623 2088 ap->device[0].class = ata_dev_try_classify(ap, 0, &err);
1da177e4 2089 if ((slave_possible) && (err != 0x81))
b4dc7623 2090 ap->device[1].class = ata_dev_try_classify(ap, 1, &err);
1da177e4
LT		 2091
2092 /* re-enable interrupts */
2093 if (ap->ioaddr.ctl_addr) /* FIXME: hack. create a hook instead */
2094 ata_irq_on(ap);
2095
2096 /* is double-select really necessary? */
2097 if (ap->device[1].class != ATA_DEV_NONE)
2098 ap->ops->dev_select(ap, 1);
2099 if (ap->device[0].class != ATA_DEV_NONE)
2100 ap->ops->dev_select(ap, 0);
2101
2102 /* if no devices were detected, disable this port */
2103 if ((ap->device[0].class == ATA_DEV_NONE) &&
2104 (ap->device[1].class == ATA_DEV_NONE))
2105 goto err_out;
2106
2107 if (ap->flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST)) {
2108 /* set up device control for ATA_FLAG_SATA_RESET */
2109 if (ap->flags & ATA_FLAG_MMIO)
2110 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
2111 else
2112 outb(ap->ctl, ioaddr->ctl_addr);
2113 }
2114
2115 DPRINTK("EXIT\n");
2116 return;
2117
2118err_out:
2119 printk(KERN_ERR "ata%u: disabling port\n", ap->id);
2120 ap->ops->port_disable(ap);
2121
2122 DPRINTK("EXIT\n");
2123}
2124
7a7921e8
TH		 2125static int sata_phy_resume(struct ata_port *ap)
2126{
2127 unsigned long timeout = jiffies + (HZ * 5);
2128 u32 sstatus;
2129
2130 scr_write_flush(ap, SCR_CONTROL, 0x300);
2131
2132 /* Wait for phy to become ready, if necessary. */
2133 do {
2134 msleep(200);
2135 sstatus = scr_read(ap, SCR_STATUS);
2136 if ((sstatus & 0xf) != 1)
2137 return 0;
2138 } while (time_before(jiffies, timeout));
2139
2140 return -1;
2141}
2142
8a19ac89
TH		 2143/**
2144 * ata_std_probeinit - initialize probing
2145 * @ap: port to be probed
2146 *
2147 * @ap is about to be probed. Initialize it. This function is
2148 * to be used as standard callback for ata_drive_probe_reset().
3a39746a
TH		 2149 *
2150 * NOTE!!! Do not use this function as probeinit if a low level
2151 * driver implements only hardreset. Just pass NULL as probeinit
2152 * in that case. Using this function is probably okay but doing
2153 * so makes reset sequence different from the original
2154 * ->phy_reset implementation and Jeff nervous. :-P
8a19ac89
TH		 2155 */
2156extern void ata_std_probeinit(struct ata_port *ap)
2157{
3a39746a 2158 if (ap->flags & ATA_FLAG_SATA && ap->ops->scr_read) {
8a19ac89 2159 sata_phy_resume(ap);
3a39746a
TH		 2160 if (sata_dev_present(ap))
2161 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
2162 }
8a19ac89
TH		 2163}
2164
c2bd5804
TH		 2165/**
2166 * ata_std_softreset - reset host port via ATA SRST
2167 * @ap: port to reset
2168 * @verbose: fail verbosely
2169 * @classes: resulting classes of attached devices
2170 *
2171 * Reset host port using ATA SRST. This function is to be used
2172 * as standard callback for ata_drive_*_reset() functions.
2173 *
2174 * LOCKING:
2175 * Kernel thread context (may sleep)
2176 *
2177 * RETURNS:
2178 * 0 on success, -errno otherwise.
2179 */
2180int ata_std_softreset(struct ata_port *ap, int verbose, unsigned int *classes)
2181{
2182 unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
2183 unsigned int devmask = 0, err_mask;
2184 u8 err;
2185
2186 DPRINTK("ENTER\n");
2187
3a39746a
TH		 2188 if (ap->ops->scr_read && !sata_dev_present(ap)) {
2189 classes[0] = ATA_DEV_NONE;
2190 goto out;
2191 }
2192
c2bd5804
TH		 2193 /* determine if device 0/1 are present */
2194 if (ata_devchk(ap, 0))
2195 devmask |= (1 << 0);
2196 if (slave_possible && ata_devchk(ap, 1))
2197 devmask |= (1 << 1);
2198
c2bd5804
TH		 2199 /* select device 0 again */
2200 ap->ops->dev_select(ap, 0);
2201
2202 /* issue bus reset */
2203 DPRINTK("about to softreset, devmask=%x\n", devmask);
2204 err_mask = ata_bus_softreset(ap, devmask);
2205 if (err_mask) {
2206 if (verbose)
2207 printk(KERN_ERR "ata%u: SRST failed (err_mask=0x%x)\n",
2208 ap->id, err_mask);
2209 else
2210 DPRINTK("EXIT, softreset failed (err_mask=0x%x)\n",
2211 err_mask);
2212 return -EIO;
2213 }
2214
2215 /* determine by signature whether we have ATA or ATAPI devices */
2216 classes[0] = ata_dev_try_classify(ap, 0, &err);
2217 if (slave_possible && err != 0x81)
2218 classes[1] = ata_dev_try_classify(ap, 1, &err);
2219
3a39746a 2220 out:
c2bd5804
TH		 2221 DPRINTK("EXIT, classes[0]=%u [1]=%u\n", classes[0], classes[1]);
2222 return 0;
2223}
2224
2225/**
2226 * sata_std_hardreset - reset host port via SATA phy reset
2227 * @ap: port to reset
2228 * @verbose: fail verbosely
2229 * @class: resulting class of attached device
2230 *
2231 * SATA phy-reset host port using DET bits of SControl register.
2232 * This function is to be used as standard callback for
2233 * ata_drive_*_reset().
2234 *
2235 * LOCKING:
2236 * Kernel thread context (may sleep)
2237 *
2238 * RETURNS:
2239 * 0 on success, -errno otherwise.
2240 */
2241int sata_std_hardreset(struct ata_port *ap, int verbose, unsigned int *class)
2242{
c2bd5804
TH		 2243 DPRINTK("ENTER\n");
2244
2245 /* Issue phy wake/reset */
2246 scr_write_flush(ap, SCR_CONTROL, 0x301);
2247
2248 /*
2249 * Couldn't find anything in SATA I/II specs, but AHCI-1.1
2250 * 10.4.2 says at least 1 ms.
2251 */
2252 msleep(1);
2253
7a7921e8
TH		 2254 /* Bring phy back */
2255 sata_phy_resume(ap);
c2bd5804 2256
c2bd5804
TH		 2257 /* TODO: phy layer with polling, timeouts, etc. */
2258 if (!sata_dev_present(ap)) {
2259 *class = ATA_DEV_NONE;
2260 DPRINTK("EXIT, link offline\n");
2261 return 0;
2262 }
2263
2264 if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) {
2265 if (verbose)
2266 printk(KERN_ERR "ata%u: COMRESET failed "
2267 "(device not ready)\n", ap->id);
2268 else
2269 DPRINTK("EXIT, device not ready\n");
2270 return -EIO;
2271 }
2272
3a39746a
TH		 2273 ap->ops->dev_select(ap, 0); /* probably unnecessary */
2274
c2bd5804
TH		 2275 *class = ata_dev_try_classify(ap, 0, NULL);
2276
2277 DPRINTK("EXIT, class=%u\n", *class);
2278 return 0;
2279}
2280
2281/**
2282 * ata_std_postreset - standard postreset callback
2283 * @ap: the target ata_port
2284 * @classes: classes of attached devices
2285 *
2286 * This function is invoked after a successful reset. Note that
2287 * the device might have been reset more than once using
2288 * different reset methods before postreset is invoked.
c2bd5804
TH		 2289 *
2290 * This function is to be used as standard callback for
2291 * ata_drive_*_reset().
2292 *
2293 * LOCKING:
2294 * Kernel thread context (may sleep)
2295 */
2296void ata_std_postreset(struct ata_port *ap, unsigned int *classes)
2297{
2298 DPRINTK("ENTER\n");
2299
56497bd5 2300 /* set cable type if it isn't already set */
c2bd5804
TH		 2301 if (ap->cbl == ATA_CBL_NONE && ap->flags & ATA_FLAG_SATA)
2302 ap->cbl = ATA_CBL_SATA;
2303
2304 /* print link status */
2305 if (ap->cbl == ATA_CBL_SATA)
2306 sata_print_link_status(ap);
2307
3a39746a
TH		 2308 /* re-enable interrupts */
2309 if (ap->ioaddr.ctl_addr) /* FIXME: hack. create a hook instead */
2310 ata_irq_on(ap);
c2bd5804
TH		 2311
2312 /* is double-select really necessary? */
2313 if (classes[0] != ATA_DEV_NONE)
2314 ap->ops->dev_select(ap, 1);
2315 if (classes[1] != ATA_DEV_NONE)
2316 ap->ops->dev_select(ap, 0);
2317
3a39746a
TH		 2318 /* bail out if no device is present */
2319 if (classes[0] == ATA_DEV_NONE && classes[1] == ATA_DEV_NONE) {
2320 DPRINTK("EXIT, no device\n");
2321 return;
2322 }
2323
2324 /* set up device control */
2325 if (ap->ioaddr.ctl_addr) {
2326 if (ap->flags & ATA_FLAG_MMIO)
2327 writeb(ap->ctl, (void __iomem *) ap->ioaddr.ctl_addr);
2328 else
2329 outb(ap->ctl, ap->ioaddr.ctl_addr);
2330 }
c2bd5804
TH		 2331
2332 DPRINTK("EXIT\n");
2333}
2334
2335/**
2336 * ata_std_probe_reset - standard probe reset method
2337 * @ap: prot to perform probe-reset
2338 * @classes: resulting classes of attached devices
2339 *
2340 * The stock off-the-shelf ->probe_reset method.
2341 *
2342 * LOCKING:
2343 * Kernel thread context (may sleep)
2344 *
2345 * RETURNS:
2346 * 0 on success, -errno otherwise.
2347 */
2348int ata_std_probe_reset(struct ata_port *ap, unsigned int *classes)
2349{
2350 ata_reset_fn_t hardreset;
2351
2352 hardreset = NULL;
b911fc3a 2353 if (ap->flags & ATA_FLAG_SATA && ap->ops->scr_read)
c2bd5804
TH		 2354 hardreset = sata_std_hardreset;
2355
8a19ac89 2356 return ata_drive_probe_reset(ap, ata_std_probeinit,
7944ea95 2357 ata_std_softreset, hardreset,
c2bd5804
TH		 2358 ata_std_postreset, classes);
2359}
2360
a62c0fc5
TH		 2361static int do_probe_reset(struct ata_port *ap, ata_reset_fn_t reset,
2362 ata_postreset_fn_t postreset,
2363 unsigned int *classes)
2364{
2365 int i, rc;
2366
2367 for (i = 0; i < ATA_MAX_DEVICES; i++)
2368 classes[i] = ATA_DEV_UNKNOWN;
2369
2370 rc = reset(ap, 0, classes);
2371 if (rc)
2372 return rc;
2373
2374 /* If any class isn't ATA_DEV_UNKNOWN, consider classification
2375 * is complete and convert all ATA_DEV_UNKNOWN to
2376 * ATA_DEV_NONE.
2377 */
2378 for (i = 0; i < ATA_MAX_DEVICES; i++)
2379 if (classes[i] != ATA_DEV_UNKNOWN)
2380 break;
2381
2382 if (i < ATA_MAX_DEVICES)
2383 for (i = 0; i < ATA_MAX_DEVICES; i++)
2384 if (classes[i] == ATA_DEV_UNKNOWN)
2385 classes[i] = ATA_DEV_NONE;
2386
2387 if (postreset)
2388 postreset(ap, classes);
2389
2390 return classes[0] != ATA_DEV_UNKNOWN ? 0 : -ENODEV;
2391}
2392
2393/**
2394 * ata_drive_probe_reset - Perform probe reset with given methods
2395 * @ap: port to reset
7944ea95 2396 * @probeinit: probeinit method (can be NULL)
a62c0fc5
TH		 2397 * @softreset: softreset method (can be NULL)
2398 * @hardreset: hardreset method (can be NULL)
2399 * @postreset: postreset method (can be NULL)
2400 * @classes: resulting classes of attached devices
2401 *
2402 * Reset the specified port and classify attached devices using
2403 * given methods. This function prefers softreset but tries all
2404 * possible reset sequences to reset and classify devices. This
2405 * function is intended to be used for constructing ->probe_reset
2406 * callback by low level drivers.
2407 *
2408 * Reset methods should follow the following rules.
2409 *
2410 * - Return 0 on sucess, -errno on failure.
2411 * - If classification is supported, fill classes[] with
2412 * recognized class codes.
2413 * - If classification is not supported, leave classes[] alone.
2414 * - If verbose is non-zero, print error message on failure;
2415 * otherwise, shut up.
2416 *
2417 * LOCKING:
2418 * Kernel thread context (may sleep)
2419 *
2420 * RETURNS:
2421 * 0 on success, -EINVAL if no reset method is avaliable, -ENODEV
2422 * if classification fails, and any error code from reset
2423 * methods.
2424 */
7944ea95 2425int ata_drive_probe_reset(struct ata_port *ap, ata_probeinit_fn_t probeinit,
a62c0fc5
TH		 2426 ata_reset_fn_t softreset, ata_reset_fn_t hardreset,
2427 ata_postreset_fn_t postreset, unsigned int *classes)
2428{
2429 int rc = -EINVAL;
2430
7944ea95
TH		 2431 if (probeinit)
2432 probeinit(ap);
2433
a62c0fc5
TH		 2434 if (softreset) {
2435 rc = do_probe_reset(ap, softreset, postreset, classes);
2436 if (rc == 0)
2437 return 0;
2438 }
2439
2440 if (!hardreset)
2441 return rc;
2442
2443 rc = do_probe_reset(ap, hardreset, postreset, classes);
2444 if (rc == 0 || rc != -ENODEV)
2445 return rc;
2446
2447 if (softreset)
2448 rc = do_probe_reset(ap, softreset, postreset, classes);
2449
2450 return rc;
2451}
2452
623a3128
TH		 2453/**
2454 * ata_dev_same_device - Determine whether new ID matches configured device
2455 * @ap: port on which the device to compare against resides
2456 * @dev: device to compare against
2457 * @new_class: class of the new device
2458 * @new_id: IDENTIFY page of the new device
2459 *
2460 * Compare @new_class and @new_id against @dev and determine
2461 * whether @dev is the device indicated by @new_class and
2462 * @new_id.
2463 *
2464 * LOCKING:
2465 * None.
2466 *
2467 * RETURNS:
2468 * 1 if @dev matches @new_class and @new_id, 0 otherwise.
2469 */
2470static int ata_dev_same_device(struct ata_port *ap, struct ata_device *dev,
2471 unsigned int new_class, const u16 *new_id)
2472{
2473 const u16 *old_id = dev->id;
2474 unsigned char model[2][41], serial[2][21];
2475 u64 new_n_sectors;
2476
2477 if (dev->class != new_class) {
2478 printk(KERN_INFO
2479 "ata%u: dev %u class mismatch %d != %d\n",
2480 ap->id, dev->devno, dev->class, new_class);
2481 return 0;
2482 }
2483
2484 ata_id_c_string(old_id, model[0], ATA_ID_PROD_OFS, sizeof(model[0]));
2485 ata_id_c_string(new_id, model[1], ATA_ID_PROD_OFS, sizeof(model[1]));
2486 ata_id_c_string(old_id, serial[0], ATA_ID_SERNO_OFS, sizeof(serial[0]));
2487 ata_id_c_string(new_id, serial[1], ATA_ID_SERNO_OFS, sizeof(serial[1]));
2488 new_n_sectors = ata_id_n_sectors(new_id);
2489
2490 if (strcmp(model[0], model[1])) {
2491 printk(KERN_INFO
2492 "ata%u: dev %u model number mismatch '%s' != '%s'\n",
2493 ap->id, dev->devno, model[0], model[1]);
2494 return 0;
2495 }
2496
2497 if (strcmp(serial[0], serial[1])) {
2498 printk(KERN_INFO
2499 "ata%u: dev %u serial number mismatch '%s' != '%s'\n",
2500 ap->id, dev->devno, serial[0], serial[1]);
2501 return 0;
2502 }
2503
2504 if (dev->class == ATA_DEV_ATA && dev->n_sectors != new_n_sectors) {
2505 printk(KERN_INFO
2506 "ata%u: dev %u n_sectors mismatch %llu != %llu\n",
2507 ap->id, dev->devno, (unsigned long long)dev->n_sectors,
2508 (unsigned long long)new_n_sectors);
2509 return 0;
2510 }
2511
2512 return 1;
2513}
2514
2515/**
2516 * ata_dev_revalidate - Revalidate ATA device
2517 * @ap: port on which the device to revalidate resides
2518 * @dev: device to revalidate
2519 * @post_reset: is this revalidation after reset?
2520 *
2521 * Re-read IDENTIFY page and make sure @dev is still attached to
2522 * the port.
2523 *
2524 * LOCKING:
2525 * Kernel thread context (may sleep)
2526 *
2527 * RETURNS:
2528 * 0 on success, negative errno otherwise
2529 */
2530int ata_dev_revalidate(struct ata_port *ap, struct ata_device *dev,
2531 int post_reset)
1da177e4 2532{
623a3128
TH		 2533 unsigned int class;
2534 u16 *id;
2535 int rc;
2536
2537 if (!ata_dev_present(dev))
2538 return -ENODEV;
2539
2540 class = dev->class;
2541 id = NULL;
2542
2543 /* allocate & read ID data */
2544 rc = ata_dev_read_id(ap, dev, &class, post_reset, &id);
2545 if (rc)
2546 goto fail;
2547
2548 /* is the device still there? */
2549 if (!ata_dev_same_device(ap, dev, class, id)) {
2550 rc = -ENODEV;
2551 goto fail;
2552 }
2553
2554 kfree(dev->id);
2555 dev->id = id;
2556
2557 /* configure device according to the new ID */
2558 return ata_dev_configure(ap, dev, 0);
2559
2560 fail:
2561 printk(KERN_ERR "ata%u: dev %u revalidation failed (errno=%d)\n",
2562 ap->id, dev->devno, rc);
2563 kfree(id);
2564 return rc;
1da177e4
LT		 2565}
2566
98ac62de 2567static const char * const ata_dma_blacklist [] = {
f4b15fef
AC		 2568 "WDC AC11000H", NULL,
2569 "WDC AC22100H", NULL,
2570 "WDC AC32500H", NULL,
2571 "WDC AC33100H", NULL,
2572 "WDC AC31600H", NULL,
2573 "WDC AC32100H", "24.09P07",
2574 "WDC AC23200L", "21.10N21",
2575 "Compaq CRD-8241B", NULL,
2576 "CRD-8400B", NULL,
2577 "CRD-8480B", NULL,
2578 "CRD-8482B", NULL,
2579 "CRD-84", NULL,
2580 "SanDisk SDP3B", NULL,
2581 "SanDisk SDP3B-64", NULL,
2582 "SANYO CD-ROM CRD", NULL,
2583 "HITACHI CDR-8", NULL,
2e9edbf8 2584 "HITACHI CDR-8335", NULL,
f4b15fef 2585 "HITACHI CDR-8435", NULL,
2e9edbf8
JG		 2586 "Toshiba CD-ROM XM-6202B", NULL,
2587 "TOSHIBA CD-ROM XM-1702BC", NULL,
2588 "CD-532E-A", NULL,
2589 "E-IDE CD-ROM CR-840", NULL,
2590 "CD-ROM Drive/F5A", NULL,
2591 "WPI CDD-820", NULL,
f4b15fef 2592 "SAMSUNG CD-ROM SC-148C", NULL,
2e9edbf8 2593 "SAMSUNG CD-ROM SC", NULL,
f4b15fef
AC		 2594 "SanDisk SDP3B-64", NULL,
2595 "ATAPI CD-ROM DRIVE 40X MAXIMUM",NULL,
2596 "_NEC DV5800A", NULL,
2597 "SAMSUNG CD-ROM SN-124", "N001"
1da177e4 2598};
2e9edbf8 2599
f4b15fef
AC		 2600static int ata_strim(char *s, size_t len)
2601{
2602 len = strnlen(s, len);
2603
2604 /* ATAPI specifies that empty space is blank-filled; remove blanks */
2605 while ((len > 0) && (s[len - 1] == ' ')) {
2606 len--;
2607 s[len] = 0;
2608 }
2609 return len;
2610}
1da177e4 2611
057ace5e 2612static int ata_dma_blacklisted(const struct ata_device *dev)
1da177e4 2613{
f4b15fef
AC		 2614 unsigned char model_num[40];
2615 unsigned char model_rev[16];
2616 unsigned int nlen, rlen;
1da177e4
LT		 2617 int i;
2618
f4b15fef
AC		 2619 ata_id_string(dev->id, model_num, ATA_ID_PROD_OFS,
2620 sizeof(model_num));
2621 ata_id_string(dev->id, model_rev, ATA_ID_FW_REV_OFS,
2622 sizeof(model_rev));
2623 nlen = ata_strim(model_num, sizeof(model_num));
2624 rlen = ata_strim(model_rev, sizeof(model_rev));
1da177e4 2625
f4b15fef
AC		 2626 for (i = 0; i < ARRAY_SIZE(ata_dma_blacklist); i += 2) {
2627 if (!strncmp(ata_dma_blacklist[i], model_num, nlen)) {
2628 if (ata_dma_blacklist[i+1] == NULL)
2629 return 1;
2630 if (!strncmp(ata_dma_blacklist[i], model_rev, rlen))
2631 return 1;
2632 }
2633 }
1da177e4
LT		 2634 return 0;
2635}
2636
1da177e4 2637/**
a6d5a51c
TH		 2638 * ata_dev_xfermask - Compute supported xfermask of the given device
2639 * @ap: Port on which the device to compute xfermask for resides
2640 * @dev: Device to compute xfermask for
1da177e4 2641 *
acf356b1
TH		 2642 * Compute supported xfermask of @dev and store it in
2643 * dev->*_mask. This function is responsible for applying all
2644 * known limits including host controller limits, device
2645 * blacklist, etc...
0cba632b 2646 *
1da177e4 2647 * LOCKING:
a6d5a51c 2648 * None.
1da177e4 2649 */
acf356b1 2650static void ata_dev_xfermask(struct ata_port *ap, struct ata_device *dev)
1da177e4 2651{
a6d5a51c
TH		 2652 unsigned long xfer_mask;
2653 int i;
1da177e4 2654
a6d5a51c
TH		 2655 xfer_mask = ata_pack_xfermask(ap->pio_mask, ap->mwdma_mask,
2656 ap->udma_mask);
1da177e4 2657
a6d5a51c
TH		 2658 /* use port-wide xfermask for now */
2659 for (i = 0; i < ATA_MAX_DEVICES; i++) {
2660 struct ata_device *d = &ap->device[i];
2661 if (!ata_dev_present(d))
2662 continue;
acf356b1
TH		 2663 xfer_mask &= ata_pack_xfermask(d->pio_mask, d->mwdma_mask,
2664 d->udma_mask);
a6d5a51c
TH		 2665 xfer_mask &= ata_id_xfermask(d->id);
2666 if (ata_dma_blacklisted(d))
2667 xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA);
1da177e4
LT		 2668 }
2669
a6d5a51c
TH		 2670 if (ata_dma_blacklisted(dev))
2671 printk(KERN_WARNING "ata%u: dev %u is on DMA blacklist, "
2672 "disabling DMA\n", ap->id, dev->devno);
2673
acf356b1
TH		 2674 ata_unpack_xfermask(xfer_mask, &dev->pio_mask, &dev->mwdma_mask,
2675 &dev->udma_mask);
1da177e4
LT		 2676}
2677
2678/**
2679 * ata_dev_set_xfermode - Issue SET FEATURES - XFER MODE command
2680 * @ap: Port associated with device @dev
2681 * @dev: Device to which command will be sent
2682 *
780a87f7
JG		 2683 * Issue SET FEATURES - XFER MODE command to device @dev
2684 * on port @ap.
2685 *
1da177e4 2686 * LOCKING:
0cba632b 2687 * PCI/etc. bus probe sem.
83206a29
TH		 2688 *
2689 * RETURNS:
2690 * 0 on success, AC_ERR_* mask otherwise.
1da177e4
LT		 2691 */
2692
83206a29
TH		 2693static unsigned int ata_dev_set_xfermode(struct ata_port *ap,
2694 struct ata_device *dev)
1da177e4 2695{
a0123703 2696 struct ata_taskfile tf;
83206a29 2697 unsigned int err_mask;
1da177e4
LT		 2698
2699 /* set up set-features taskfile */
2700 DPRINTK("set features - xfer mode\n");
2701
a0123703
TH		 2702 ata_tf_init(ap, &tf, dev->devno);
2703 tf.command = ATA_CMD_SET_FEATURES;
2704 tf.feature = SETFEATURES_XFER;
2705 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
2706 tf.protocol = ATA_PROT_NODATA;
2707 tf.nsect = dev->xfer_mode;
1da177e4 2708
83206a29 2709 err_mask = ata_exec_internal(ap, dev, &tf, DMA_NONE, NULL, 0);
1da177e4 2710
83206a29
TH		 2711 DPRINTK("EXIT, err_mask=%x\n", err_mask);
2712 return err_mask;
1da177e4
LT		 2713}
2714
8bf62ece
AL		 2715/**
2716 * ata_dev_init_params - Issue INIT DEV PARAMS command
2717 * @ap: Port associated with device @dev
2718 * @dev: Device to which command will be sent
2719 *
2720 * LOCKING:
6aff8f1f
TH		 2721 * Kernel thread context (may sleep)
2722 *
2723 * RETURNS:
2724 * 0 on success, AC_ERR_* mask otherwise.
8bf62ece
AL		 2725 */
2726
6aff8f1f
TH		 2727static unsigned int ata_dev_init_params(struct ata_port *ap,
2728 struct ata_device *dev)
8bf62ece 2729{
a0123703 2730 struct ata_taskfile tf;
6aff8f1f 2731 unsigned int err_mask;
8bf62ece
AL		 2732 u16 sectors = dev->id[6];
2733 u16 heads = dev->id[3];
2734
2735 /* Number of sectors per track 1-255. Number of heads 1-16 */
2736 if (sectors < 1 || sectors > 255 || heads < 1 || heads > 16)
6aff8f1f 2737 return 0;
8bf62ece
AL		 2738
2739 /* set up init dev params taskfile */
2740 DPRINTK("init dev params \n");
2741
a0123703
TH		 2742 ata_tf_init(ap, &tf, dev->devno);
2743 tf.command = ATA_CMD_INIT_DEV_PARAMS;
2744 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
2745 tf.protocol = ATA_PROT_NODATA;
2746 tf.nsect = sectors;
2747 tf.device |= (heads - 1) & 0x0f; /* max head = num. of heads - 1 */
8bf62ece 2748
6aff8f1f 2749 err_mask = ata_exec_internal(ap, dev, &tf, DMA_NONE, NULL, 0);
8bf62ece 2750
6aff8f1f
TH		 2751 DPRINTK("EXIT, err_mask=%x\n", err_mask);
2752 return err_mask;
8bf62ece
AL		 2753}
2754
1da177e4 2755/**
0cba632b
JG		 2756 * ata_sg_clean - Unmap DMA memory associated with command
2757 * @qc: Command containing DMA memory to be released
2758 *
2759 * Unmap all mapped DMA memory associated with this command.
1da177e4
LT		 2760 *
2761 * LOCKING:
0cba632b 2762 * spin_lock_irqsave(host_set lock)
1da177e4
LT		 2763 */
2764
2765static void ata_sg_clean(struct ata_queued_cmd *qc)
2766{
2767 struct ata_port *ap = qc->ap;
cedc9a47 2768 struct scatterlist *sg = qc->__sg;
1da177e4 2769 int dir = qc->dma_dir;
cedc9a47 2770 void *pad_buf = NULL;
1da177e4 2771
a4631474
TH		 2772 WARN_ON(!(qc->flags & ATA_QCFLAG_DMAMAP));
2773 WARN_ON(sg == NULL);
1da177e4
LT		 2774
2775 if (qc->flags & ATA_QCFLAG_SINGLE)
f131883e 2776 WARN_ON(qc->n_elem > 1);
1da177e4 2777
2c13b7ce 2778 VPRINTK("unmapping %u sg elements\n", qc->n_elem);
1da177e4 2779
cedc9a47
JG		 2780 /* if we padded the buffer out to 32-bit bound, and data
2781 * xfer direction is from-device, we must copy from the
2782 * pad buffer back into the supplied buffer
2783 */
2784 if (qc->pad_len && !(qc->tf.flags & ATA_TFLAG_WRITE))
2785 pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
2786
2787 if (qc->flags & ATA_QCFLAG_SG) {
e1410f2d 2788 if (qc->n_elem)
2f1f610b 2789 dma_unmap_sg(ap->dev, sg, qc->n_elem, dir);
cedc9a47
JG		 2790 /* restore last sg */
2791 sg[qc->orig_n_elem - 1].length += qc->pad_len;
2792 if (pad_buf) {
2793 struct scatterlist *psg = &qc->pad_sgent;
2794 void *addr = kmap_atomic(psg->page, KM_IRQ0);
2795 memcpy(addr + psg->offset, pad_buf, qc->pad_len);
dfa15988 2796 kunmap_atomic(addr, KM_IRQ0);
cedc9a47
JG		 2797 }
2798 } else {
2e242fa9 2799 if (qc->n_elem)
2f1f610b 2800 dma_unmap_single(ap->dev,
e1410f2d
JG		 2801 sg_dma_address(&sg[0]), sg_dma_len(&sg[0]),
2802 dir);
cedc9a47
JG		 2803 /* restore sg */
2804 sg->length += qc->pad_len;
2805 if (pad_buf)
2806 memcpy(qc->buf_virt + sg->length - qc->pad_len,
2807 pad_buf, qc->pad_len);
2808 }
1da177e4
LT		 2809
2810 qc->flags &= ~ATA_QCFLAG_DMAMAP;
cedc9a47 2811 qc->__sg = NULL;
1da177e4
LT		 2812}
2813
2814/**
2815 * ata_fill_sg - Fill PCI IDE PRD table
2816 * @qc: Metadata associated with taskfile to be transferred
2817 *
780a87f7
JG		 2818 * Fill PCI IDE PRD (scatter-gather) table with segments
2819 * associated with the current disk command.
2820 *
1da177e4 2821 * LOCKING:
780a87f7 2822 * spin_lock_irqsave(host_set lock)
1da177e4
LT		 2823 *
2824 */
2825static void ata_fill_sg(struct ata_queued_cmd *qc)
2826{
1da177e4 2827 struct ata_port *ap = qc->ap;
cedc9a47
JG		 2828 struct scatterlist *sg;
2829 unsigned int idx;
1da177e4 2830
a4631474 2831 WARN_ON(qc->__sg == NULL);
f131883e 2832 WARN_ON(qc->n_elem == 0 && qc->pad_len == 0);
1da177e4
LT		 2833
2834 idx = 0;
cedc9a47 2835 ata_for_each_sg(sg, qc) {
1da177e4
LT		 2836 u32 addr, offset;
2837 u32 sg_len, len;
2838
2839 /* determine if physical DMA addr spans 64K boundary.
2840 * Note h/w doesn't support 64-bit, so we unconditionally
2841 * truncate dma_addr_t to u32.
2842 */
2843 addr = (u32) sg_dma_address(sg);
2844 sg_len = sg_dma_len(sg);
2845
2846 while (sg_len) {
2847 offset = addr & 0xffff;
2848 len = sg_len;
2849 if ((offset + sg_len) > 0x10000)
2850 len = 0x10000 - offset;
2851
2852 ap->prd[idx].addr = cpu_to_le32(addr);
2853 ap->prd[idx].flags_len = cpu_to_le32(len & 0xffff);
2854 VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", idx, addr, len);
2855
2856 idx++;
2857 sg_len -= len;
2858 addr += len;
2859 }
2860 }
2861
2862 if (idx)
2863 ap->prd[idx - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT);
2864}
2865/**
2866 * ata_check_atapi_dma - Check whether ATAPI DMA can be supported
2867 * @qc: Metadata associated with taskfile to check
2868 *
780a87f7
JG		 2869 * Allow low-level driver to filter ATA PACKET commands, returning
2870 * a status indicating whether or not it is OK to use DMA for the
2871 * supplied PACKET command.
2872 *
1da177e4 2873 * LOCKING:
0cba632b
JG		 2874 * spin_lock_irqsave(host_set lock)
2875 *
1da177e4
LT		 2876 * RETURNS: 0 when ATAPI DMA can be used
2877 * nonzero otherwise
2878 */
2879int ata_check_atapi_dma(struct ata_queued_cmd *qc)
2880{
2881 struct ata_port *ap = qc->ap;
2882 int rc = 0; /* Assume ATAPI DMA is OK by default */
2883
2884 if (ap->ops->check_atapi_dma)
2885 rc = ap->ops->check_atapi_dma(qc);
2886
2887 return rc;
2888}
2889/**
2890 * ata_qc_prep - Prepare taskfile for submission
2891 * @qc: Metadata associated with taskfile to be prepared
2892 *
780a87f7
JG		 2893 * Prepare ATA taskfile for submission.
2894 *
1da177e4
LT		 2895 * LOCKING:
2896 * spin_lock_irqsave(host_set lock)
2897 */
2898void ata_qc_prep(struct ata_queued_cmd *qc)
2899{
2900 if (!(qc->flags & ATA_QCFLAG_DMAMAP))
2901 return;
2902
2903 ata_fill_sg(qc);
2904}
2905
e46834cd
BK		 2906void ata_noop_qc_prep(struct ata_queued_cmd *qc) { }
2907
0cba632b
JG		 2908/**
2909 * ata_sg_init_one - Associate command with memory buffer
2910 * @qc: Command to be associated
2911 * @buf: Memory buffer
2912 * @buflen: Length of memory buffer, in bytes.
2913 *
2914 * Initialize the data-related elements of queued_cmd @qc
2915 * to point to a single memory buffer, @buf of byte length @buflen.
2916 *
2917 * LOCKING:
2918 * spin_lock_irqsave(host_set lock)
2919 */
2920
1da177e4
LT		 2921void ata_sg_init_one(struct ata_queued_cmd *qc, void *buf, unsigned int buflen)
2922{
2923 struct scatterlist *sg;
2924
2925 qc->flags |= ATA_QCFLAG_SINGLE;
2926
2927 memset(&qc->sgent, 0, sizeof(qc->sgent));
cedc9a47 2928 qc->__sg = &qc->sgent;
1da177e4 2929 qc->n_elem = 1;
cedc9a47 2930 qc->orig_n_elem = 1;
1da177e4
LT		 2931 qc->buf_virt = buf;
2932
cedc9a47 2933 sg = qc->__sg;
f0612bbc 2934 sg_init_one(sg, buf, buflen);
1da177e4
LT		 2935}
2936
0cba632b
JG		 2937/**
2938 * ata_sg_init - Associate command with scatter-gather table.
2939 * @qc: Command to be associated
2940 * @sg: Scatter-gather table.
2941 * @n_elem: Number of elements in s/g table.
2942 *
2943 * Initialize the data-related elements of queued_cmd @qc
2944 * to point to a scatter-gather table @sg, containing @n_elem
2945 * elements.
2946 *
2947 * LOCKING:
2948 * spin_lock_irqsave(host_set lock)
2949 */
2950
1da177e4
LT		 2951void ata_sg_init(struct ata_queued_cmd *qc, struct scatterlist *sg,
2952 unsigned int n_elem)
2953{
2954 qc->flags |= ATA_QCFLAG_SG;
cedc9a47 2955 qc->__sg = sg;
1da177e4 2956 qc->n_elem = n_elem;
cedc9a47 2957 qc->orig_n_elem = n_elem;
1da177e4
LT		 2958}
2959
2960/**
0cba632b
JG		 2961 * ata_sg_setup_one - DMA-map the memory buffer associated with a command.
2962 * @qc: Command with memory buffer to be mapped.
2963 *
2964 * DMA-map the memory buffer associated with queued_cmd @qc.
1da177e4
LT		 2965 *
2966 * LOCKING:
2967 * spin_lock_irqsave(host_set lock)
2968 *
2969 * RETURNS:
0cba632b 2970 * Zero on success, negative on error.
1da177e4
LT		 2971 */
2972
2973static int ata_sg_setup_one(struct ata_queued_cmd *qc)
2974{
2975 struct ata_port *ap = qc->ap;
2976 int dir = qc->dma_dir;
cedc9a47 2977 struct scatterlist *sg = qc->__sg;
1da177e4 2978 dma_addr_t dma_address;
2e242fa9 2979 int trim_sg = 0;
1da177e4 2980
cedc9a47
JG		 2981 /* we must lengthen transfers to end on a 32-bit boundary */
2982 qc->pad_len = sg->length & 3;
2983 if (qc->pad_len) {
2984 void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
2985 struct scatterlist *psg = &qc->pad_sgent;
2986
a4631474 2987 WARN_ON(qc->dev->class != ATA_DEV_ATAPI);
cedc9a47
JG		 2988
2989 memset(pad_buf, 0, ATA_DMA_PAD_SZ);
2990
2991 if (qc->tf.flags & ATA_TFLAG_WRITE)
2992 memcpy(pad_buf, qc->buf_virt + sg->length - qc->pad_len,
2993 qc->pad_len);
2994
2995 sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ);
2996 sg_dma_len(psg) = ATA_DMA_PAD_SZ;
2997 /* trim sg */
2998 sg->length -= qc->pad_len;
2e242fa9
TH		 2999 if (sg->length == 0)
3000 trim_sg = 1;
cedc9a47
JG		 3001
3002 DPRINTK("padding done, sg->length=%u pad_len=%u\n",
3003 sg->length, qc->pad_len);
3004 }
3005
2e242fa9
TH		 3006 if (trim_sg) {
3007 qc->n_elem--;
e1410f2d
JG		 3008 goto skip_map;
3009 }
3010
2f1f610b 3011 dma_address = dma_map_single(ap->dev, qc->buf_virt,
32529e01 3012 sg->length, dir);
537a95d9
TH		 3013 if (dma_mapping_error(dma_address)) {
3014 /* restore sg */
3015 sg->length += qc->pad_len;
1da177e4 3016 return -1;
537a95d9 3017 }
1da177e4
LT		 3018
3019 sg_dma_address(sg) = dma_address;
32529e01 3020 sg_dma_len(sg) = sg->length;
1da177e4 3021
2e242fa9 3022skip_map:
1da177e4
LT		 3023 DPRINTK("mapped buffer of %d bytes for %s\n", sg_dma_len(sg),
3024 qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
3025
3026 return 0;
3027}
3028
3029/**
0cba632b
JG		 3030 * ata_sg_setup - DMA-map the scatter-gather table associated with a command.
3031 * @qc: Command with scatter-gather table to be mapped.
3032 *
3033 * DMA-map the scatter-gather table associated with queued_cmd @qc.
1da177e4
LT		 3034 *
3035 * LOCKING:
3036 * spin_lock_irqsave(host_set lock)
3037 *
3038 * RETURNS:
0cba632b 3039 * Zero on success, negative on error.
1da177e4
LT		 3040 *
3041 */
3042
3043static int ata_sg_setup(struct ata_queued_cmd *qc)
3044{
3045 struct ata_port *ap = qc->ap;
cedc9a47
JG		 3046 struct scatterlist *sg = qc->__sg;
3047 struct scatterlist *lsg = &sg[qc->n_elem - 1];
e1410f2d 3048 int n_elem, pre_n_elem, dir, trim_sg = 0;
1da177e4
LT		 3049
3050 VPRINTK("ENTER, ata%u\n", ap->id);
a4631474 3051 WARN_ON(!(qc->flags & ATA_QCFLAG_SG));
1da177e4 3052
cedc9a47
JG		 3053 /* we must lengthen transfers to end on a 32-bit boundary */
3054 qc->pad_len = lsg->length & 3;
3055 if (qc->pad_len) {
3056 void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
3057 struct scatterlist *psg = &qc->pad_sgent;
3058 unsigned int offset;
3059
a4631474 3060 WARN_ON(qc->dev->class != ATA_DEV_ATAPI);
cedc9a47
JG		 3061
3062 memset(pad_buf, 0, ATA_DMA_PAD_SZ);
3063
3064 /*
3065 * psg->page/offset are used to copy to-be-written
3066 * data in this function or read data in ata_sg_clean.
3067 */
3068 offset = lsg->offset + lsg->length - qc->pad_len;
3069 psg->page = nth_page(lsg->page, offset >> PAGE_SHIFT);
3070 psg->offset = offset_in_page(offset);
3071
3072 if (qc->tf.flags & ATA_TFLAG_WRITE) {
3073 void *addr = kmap_atomic(psg->page, KM_IRQ0);
3074 memcpy(pad_buf, addr + psg->offset, qc->pad_len);
dfa15988 3075 kunmap_atomic(addr, KM_IRQ0);
cedc9a47
JG		 3076 }
3077
3078 sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ);
3079 sg_dma_len(psg) = ATA_DMA_PAD_SZ;
3080 /* trim last sg */
3081 lsg->length -= qc->pad_len;
e1410f2d
JG		 3082 if (lsg->length == 0)
3083 trim_sg = 1;
cedc9a47
JG		 3084
3085 DPRINTK("padding done, sg[%d].length=%u pad_len=%u\n",
3086 qc->n_elem - 1, lsg->length, qc->pad_len);
3087 }
3088
e1410f2d
JG		 3089 pre_n_elem = qc->n_elem;
3090 if (trim_sg && pre_n_elem)
3091 pre_n_elem--;
3092
3093 if (!pre_n_elem) {
3094 n_elem = 0;
3095 goto skip_map;
3096 }
3097
1da177e4 3098 dir = qc->dma_dir;
2f1f610b 3099 n_elem = dma_map_sg(ap->dev, sg, pre_n_elem, dir);
537a95d9
TH		 3100 if (n_elem < 1) {
3101 /* restore last sg */
3102 lsg->length += qc->pad_len;
1da177e4 3103 return -1;
537a95d9 3104 }
1da177e4
LT		 3105
3106 DPRINTK("%d sg elements mapped\n", n_elem);
3107
e1410f2d 3108skip_map:
1da177e4
LT		 3109 qc->n_elem = n_elem;
3110
3111 return 0;
3112}
3113
40e8c82c
TH		 3114/**
3115 * ata_poll_qc_complete - turn irq back on and finish qc
3116 * @qc: Command to complete
8e8b77dd 3117 * @err_mask: ATA status register content
40e8c82c
TH		 3118 *
3119 * LOCKING:
3120 * None. (grabs host lock)
3121 */
3122
a22e2eb0 3123void ata_poll_qc_complete(struct ata_queued_cmd *qc)
40e8c82c
TH		 3124{
3125 struct ata_port *ap = qc->ap;
b8f6153e 3126 unsigned long flags;
40e8c82c 3127
b8f6153e 3128 spin_lock_irqsave(&ap->host_set->lock, flags);
40e8c82c 3129 ata_irq_on(ap);
a22e2eb0 3130 ata_qc_complete(qc);
b8f6153e 3131 spin_unlock_irqrestore(&ap->host_set->lock, flags);
40e8c82c
TH		 3132}
3133
1da177e4 3134/**
c893a3ae 3135 * ata_pio_poll - poll using PIO, depending on current state
6f0ef4fa 3136 * @ap: the target ata_port
1da177e4
LT		 3137 *
3138 * LOCKING:
0cba632b 3139 * None. (executing in kernel thread context)
1da177e4
LT		 3140 *
3141 * RETURNS:
6f0ef4fa 3142 * timeout value to use
1da177e4
LT		 3143 */
3144
3145static unsigned long ata_pio_poll(struct ata_port *ap)
3146{
c14b8331 3147 struct ata_queued_cmd *qc;
1da177e4 3148 u8 status;
14be71f4
AL		 3149 unsigned int poll_state = HSM_ST_UNKNOWN;
3150 unsigned int reg_state = HSM_ST_UNKNOWN;
14be71f4 3151
c14b8331 3152 qc = ata_qc_from_tag(ap, ap->active_tag);
a4631474 3153 WARN_ON(qc == NULL);
c14b8331 3154
14be71f4
AL		 3155 switch (ap->hsm_task_state) {
3156 case HSM_ST:
3157 case HSM_ST_POLL:
3158 poll_state = HSM_ST_POLL;
3159 reg_state = HSM_ST;
1da177e4 3160 break;
14be71f4
AL		 3161 case HSM_ST_LAST:
3162 case HSM_ST_LAST_POLL:
3163 poll_state = HSM_ST_LAST_POLL;
3164 reg_state = HSM_ST_LAST;
1da177e4
LT		 3165 break;
3166 default:
3167 BUG();
3168 break;
3169 }
3170
3171 status = ata_chk_status(ap);
3172 if (status & ATA_BUSY) {
3173 if (time_after(jiffies, ap->pio_task_timeout)) {
11a56d24 3174 qc->err_mask |= AC_ERR_TIMEOUT;
7c398335 3175 ap->hsm_task_state = HSM_ST_TMOUT;
1da177e4
LT		 3176 return 0;
3177 }
14be71f4 3178 ap->hsm_task_state = poll_state;
1da177e4
LT		 3179 return ATA_SHORT_PAUSE;
3180 }
3181
14be71f4 3182 ap->hsm_task_state = reg_state;
1da177e4
LT		 3183 return 0;
3184}
3185
3186/**
6f0ef4fa
RD		 3187 * ata_pio_complete - check if drive is busy or idle
3188 * @ap: the target ata_port
1da177e4
LT		 3189 *
3190 * LOCKING:
0cba632b 3191 * None. (executing in kernel thread context)
7fb6ec28
JG		 3192 *
3193 * RETURNS:
fbcdd80b
AL		 3194 * Zero if qc completed.
3195 * Non-zero if has next.
1da177e4
LT		 3196 */
3197
7fb6ec28 3198static int ata_pio_complete (struct ata_port *ap)
1da177e4
LT		 3199{
3200 struct ata_queued_cmd *qc;
3201 u8 drv_stat;
3202
3203 /*
31433ea3
AC		 3204 * This is purely heuristic. This is a fast path. Sometimes when
3205 * we enter, BSY will be cleared in a chk-status or two. If not,
3206 * the drive is probably seeking or something. Snooze for a couple
3207 * msecs, then chk-status again. If still busy, fall back to
07f6f7d0 3208 * HSM_ST_LAST_POLL state.
1da177e4 3209 */
fe79e683
AL		 3210 drv_stat = ata_busy_wait(ap, ATA_BUSY, 10);
3211 if (drv_stat & ATA_BUSY) {
1da177e4 3212 msleep(2);
fe79e683
AL		 3213 drv_stat = ata_busy_wait(ap, ATA_BUSY, 10);
3214 if (drv_stat & ATA_BUSY) {
14be71f4 3215 ap->hsm_task_state = HSM_ST_LAST_POLL;
1da177e4 3216 ap->pio_task_timeout = jiffies + ATA_TMOUT_PIO;
fbcdd80b 3217 return 1;
1da177e4
LT		 3218 }
3219 }
3220
c14b8331 3221 qc = ata_qc_from_tag(ap, ap->active_tag);
a4631474 3222 WARN_ON(qc == NULL);
c14b8331 3223
1da177e4
LT		 3224 drv_stat = ata_wait_idle(ap);
3225 if (!ata_ok(drv_stat)) {
1c848984 3226 qc->err_mask |= __ac_err_mask(drv_stat);
14be71f4 3227 ap->hsm_task_state = HSM_ST_ERR;
fbcdd80b 3228 return 1;
1da177e4
LT		 3229 }
3230
14be71f4 3231 ap->hsm_task_state = HSM_ST_IDLE;
1da177e4 3232
a4631474 3233 WARN_ON(qc->err_mask);
a22e2eb0 3234 ata_poll_qc_complete(qc);
7fb6ec28
JG		 3235
3236 /* another command may start at this point */
3237
fbcdd80b 3238 return 0;
1da177e4
LT		 3239}
3240
0baab86b
EF		 3241
3242/**
c893a3ae 3243 * swap_buf_le16 - swap halves of 16-bit words in place
0baab86b
EF		 3244 * @buf: Buffer to swap
3245 * @buf_words: Number of 16-bit words in buffer.
3246 *
3247 * Swap halves of 16-bit words if needed to convert from
3248 * little-endian byte order to native cpu byte order, or
3249 * vice-versa.
3250 *
3251 * LOCKING:
6f0ef4fa 3252 * Inherited from caller.
0baab86b 3253 */
1da177e4
LT		 3254void swap_buf_le16(u16 *buf, unsigned int buf_words)
3255{
3256#ifdef __BIG_ENDIAN
3257 unsigned int i;
3258
3259 for (i = 0; i < buf_words; i++)
3260 buf[i] = le16_to_cpu(buf[i]);
3261#endif /* __BIG_ENDIAN */
3262}
3263
6ae4cfb5
AL		 3264/**
3265 * ata_mmio_data_xfer - Transfer data by MMIO
3266 * @ap: port to read/write
3267 * @buf: data buffer
3268 * @buflen: buffer length
344babaa 3269 * @write_data: read/write
6ae4cfb5
AL		 3270 *
3271 * Transfer data from/to the device data register by MMIO.
3272 *
3273 * LOCKING:
3274 * Inherited from caller.
6ae4cfb5
AL		 3275 */
3276
1da177e4
LT		 3277static void ata_mmio_data_xfer(struct ata_port *ap, unsigned char *buf,
3278 unsigned int buflen, int write_data)
3279{
3280 unsigned int i;
3281 unsigned int words = buflen >> 1;
3282 u16 *buf16 = (u16 *) buf;
3283 void __iomem *mmio = (void __iomem *)ap->ioaddr.data_addr;
3284
6ae4cfb5 3285 /* Transfer multiple of 2 bytes */
1da177e4
LT		 3286 if (write_data) {
3287 for (i = 0; i < words; i++)
3288 writew(le16_to_cpu(buf16[i]), mmio);
3289 } else {
3290 for (i = 0; i < words; i++)
3291 buf16[i] = cpu_to_le16(readw(mmio));
3292 }
6ae4cfb5
AL		 3293
3294 /* Transfer trailing 1 byte, if any. */
3295 if (unlikely(buflen & 0x01)) {
3296 u16 align_buf[1] = { 0 };
3297 unsigned char *trailing_buf = buf + buflen - 1;
3298
3299 if (write_data) {
3300 memcpy(align_buf, trailing_buf, 1);
3301 writew(le16_to_cpu(align_buf[0]), mmio);
3302 } else {
3303 align_buf[0] = cpu_to_le16(readw(mmio));
3304 memcpy(trailing_buf, align_buf, 1);
3305 }
3306 }
1da177e4
LT		 3307}
3308
6ae4cfb5
AL		 3309/**
3310 * ata_pio_data_xfer - Transfer data by PIO
3311 * @ap: port to read/write
3312 * @buf: data buffer
3313 * @buflen: buffer length
344babaa 3314 * @write_data: read/write
6ae4cfb5
AL		 3315 *
3316 * Transfer data from/to the device data register by PIO.
3317 *
3318 * LOCKING:
3319 * Inherited from caller.
6ae4cfb5
AL		 3320 */
3321
1da177e4
LT		 3322static void ata_pio_data_xfer(struct ata_port *ap, unsigned char *buf,
3323 unsigned int buflen, int write_data)
3324{
6ae4cfb5 3325 unsigned int words = buflen >> 1;
1da177e4 3326
6ae4cfb5 3327 /* Transfer multiple of 2 bytes */
1da177e4 3328 if (write_data)
6ae4cfb5 3329 outsw(ap->ioaddr.data_addr, buf, words);
1da177e4 3330 else
6ae4cfb5
AL		 3331 insw(ap->ioaddr.data_addr, buf, words);
3332
3333 /* Transfer trailing 1 byte, if any. */
3334 if (unlikely(buflen & 0x01)) {
3335 u16 align_buf[1] = { 0 };
3336 unsigned char *trailing_buf = buf + buflen - 1;
3337
3338 if (write_data) {
3339 memcpy(align_buf, trailing_buf, 1);
3340 outw(le16_to_cpu(align_buf[0]), ap->ioaddr.data_addr);
3341 } else {
3342 align_buf[0] = cpu_to_le16(inw(ap->ioaddr.data_addr));
3343 memcpy(trailing_buf, align_buf, 1);
3344 }
3345 }
1da177e4
LT		 3346}
3347
6ae4cfb5
AL		 3348/**
3349 * ata_data_xfer - Transfer data from/to the data register.
3350 * @ap: port to read/write
3351 * @buf: data buffer
3352 * @buflen: buffer length
3353 * @do_write: read/write
3354 *
3355 * Transfer data from/to the device data register.
3356 *
3357 * LOCKING:
3358 * Inherited from caller.
6ae4cfb5
AL		 3359 */
3360
1da177e4
LT		 3361static void ata_data_xfer(struct ata_port *ap, unsigned char *buf,
3362 unsigned int buflen, int do_write)
3363{
a1bd9e68
AC		 3364 /* Make the crap hardware pay the costs not the good stuff */
3365 if (unlikely(ap->flags & ATA_FLAG_IRQ_MASK)) {
3366 unsigned long flags;
3367 local_irq_save(flags);
3368 if (ap->flags & ATA_FLAG_MMIO)
3369 ata_mmio_data_xfer(ap, buf, buflen, do_write);
3370 else
3371 ata_pio_data_xfer(ap, buf, buflen, do_write);
3372 local_irq_restore(flags);
3373 } else {
3374 if (ap->flags & ATA_FLAG_MMIO)
3375 ata_mmio_data_xfer(ap, buf, buflen, do_write);
3376 else
3377 ata_pio_data_xfer(ap, buf, buflen, do_write);
3378 }
1da177e4
LT		 3379}
3380
6ae4cfb5
AL		 3381/**
3382 * ata_pio_sector - Transfer ATA_SECT_SIZE (512 bytes) of data.
3383 * @qc: Command on going
3384 *
3385 * Transfer ATA_SECT_SIZE of data from/to the ATA device.
3386 *
3387 * LOCKING:
3388 * Inherited from caller.
3389 */
3390
1da177e4
LT		 3391static void ata_pio_sector(struct ata_queued_cmd *qc)
3392{
3393 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
cedc9a47 3394 struct scatterlist *sg = qc->__sg;
1da177e4
LT		 3395 struct ata_port *ap = qc->ap;
3396 struct page *page;
3397 unsigned int offset;
3398 unsigned char *buf;
3399
3400 if (qc->cursect == (qc->nsect - 1))
14be71f4 3401 ap->hsm_task_state = HSM_ST_LAST;
1da177e4
LT		 3402
3403 page = sg[qc->cursg].page;
3404 offset = sg[qc->cursg].offset + qc->cursg_ofs * ATA_SECT_SIZE;
3405
3406 /* get the current page and offset */
3407 page = nth_page(page, (offset >> PAGE_SHIFT));
3408 offset %= PAGE_SIZE;
3409
1da177e4
LT		 3410 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
3411
91b8b313
AL		 3412 if (PageHighMem(page)) {
3413 unsigned long flags;
3414
3415 local_irq_save(flags);
3416 buf = kmap_atomic(page, KM_IRQ0);
083958d3 3417
91b8b313
AL		 3418 /* do the actual data transfer */
3419 ata_data_xfer(ap, buf + offset, ATA_SECT_SIZE, do_write);
1da177e4 3420
91b8b313
AL		 3421 kunmap_atomic(buf, KM_IRQ0);
3422 local_irq_restore(flags);
3423 } else {
3424 buf = page_address(page);
3425 ata_data_xfer(ap, buf + offset, ATA_SECT_SIZE, do_write);
3426 }
7282aa4b
AL		 3427
3428 qc->cursect++;
3429 qc->cursg_ofs++;
3430
3431 if ((qc->cursg_ofs * ATA_SECT_SIZE) == (&sg[qc->cursg])->length) {
3432 qc->cursg++;
3433 qc->cursg_ofs = 0;
3434 }
1da177e4
LT		 3435}
3436
07f6f7d0
AL		 3437/**
3438 * ata_pio_sectors - Transfer one or many 512-byte sectors.
3439 * @qc: Command on going
3440 *
3441 * Transfer one or many ATA_SECT_SIZE of data from/to the
3442 * ATA device for the DRQ request.
3443 *
3444 * LOCKING:
3445 * Inherited from caller.
3446 */
3447
3448static void ata_pio_sectors(struct ata_queued_cmd *qc)
3449{
3450 if (is_multi_taskfile(&qc->tf)) {
3451 /* READ/WRITE MULTIPLE */
3452 unsigned int nsect;
3453
587005de 3454 WARN_ON(qc->dev->multi_count == 0);
07f6f7d0
AL		 3455
3456 nsect = min(qc->nsect - qc->cursect, qc->dev->multi_count);
3457 while (nsect--)
3458 ata_pio_sector(qc);
3459 } else
3460 ata_pio_sector(qc);
3461}
3462
c71c1857
AL		 3463/**
3464 * atapi_send_cdb - Write CDB bytes to hardware
3465 * @ap: Port to which ATAPI device is attached.
3466 * @qc: Taskfile currently active
3467 *
3468 * When device has indicated its readiness to accept
3469 * a CDB, this function is called. Send the CDB.
3470 *
3471 * LOCKING:
3472 * caller.
3473 */
3474
3475static void atapi_send_cdb(struct ata_port *ap, struct ata_queued_cmd *qc)
3476{
3477 /* send SCSI cdb */
3478 DPRINTK("send cdb\n");
db024d53 3479 WARN_ON(qc->dev->cdb_len < 12);
c71c1857 3480
db024d53 3481 ata_data_xfer(ap, qc->cdb, qc->dev->cdb_len, 1);
c71c1857
AL		 3482 ata_altstatus(ap); /* flush */
3483
3484 switch (qc->tf.protocol) {
3485 case ATA_PROT_ATAPI:
3486 ap->hsm_task_state = HSM_ST;
3487 break;
3488 case ATA_PROT_ATAPI_NODATA:
3489 ap->hsm_task_state = HSM_ST_LAST;
3490 break;
3491 case ATA_PROT_ATAPI_DMA:
3492 ap->hsm_task_state = HSM_ST_LAST;
3493 /* initiate bmdma */
3494 ap->ops->bmdma_start(qc);
3495 break;
3496 }
3497}
3498
3499/**
e27486db
AL		 3500 * ata_pio_first_block - Write first data block to hardware
3501 * @ap: Port to which ATA/ATAPI device is attached.
c71c1857
AL		 3502 *
3503 * When device has indicated its readiness to accept
3504 * the data, this function sends out the CDB or
3505 * the first data block by PIO.
3506 * After this,
3507 * - If polling, ata_pio_task() handles the rest.
3508 * - Otherwise, interrupt handler takes over.
3509 *
3510 * LOCKING:
3511 * Kernel thread context (may sleep)
fbcdd80b
AL		 3512 *
3513 * RETURNS:
3514 * Zero if irq handler takes over
3515 * Non-zero if has next (polling).
c71c1857
AL		 3516 */
3517
fbcdd80b 3518static int ata_pio_first_block(struct ata_port *ap)
c71c1857 3519{
c71c1857
AL		 3520 struct ata_queued_cmd *qc;
3521 u8 status;
3522 unsigned long flags;
fbcdd80b 3523 int has_next;
c71c1857
AL		 3524
3525 qc = ata_qc_from_tag(ap, ap->active_tag);
587005de
JG		 3526 WARN_ON(qc == NULL);
3527 WARN_ON((qc->flags & ATA_QCFLAG_ACTIVE) == 0);
c71c1857 3528
fbcdd80b
AL		 3529 /* if polling, we will stay in the work queue after sending the data.
3530 * otherwise, interrupt handler takes over after sending the data.
3531 */
3532 has_next = (qc->tf.flags & ATA_TFLAG_POLLING);
3533
c71c1857
AL		 3534 /* sleep-wait for BSY to clear */
3535 DPRINTK("busy wait\n");
fbcdd80b 3536 if (ata_busy_sleep(ap, ATA_TMOUT_DATAOUT_QUICK, ATA_TMOUT_DATAOUT)) {
555a8965 3537 qc->err_mask |= AC_ERR_TIMEOUT;
fbcdd80b 3538 ap->hsm_task_state = HSM_ST_TMOUT;
c71c1857 3539 goto err_out;
fbcdd80b 3540 }
c71c1857
AL		 3541
3542 /* make sure DRQ is set */
3543 status = ata_chk_status(ap);
fbcdd80b
AL		 3544 if ((status & (ATA_BUSY | ATA_DRQ)) != ATA_DRQ) {
3545 /* device status error */
555a8965 3546 qc->err_mask |= AC_ERR_HSM;
fbcdd80b 3547 ap->hsm_task_state = HSM_ST_ERR;
c71c1857 3548 goto err_out;
fbcdd80b 3549 }
c71c1857
AL		 3550
3551 /* Send the CDB (atapi) or the first data block (ata pio out).
3552 * During the state transition, interrupt handler shouldn't
3553 * be invoked before the data transfer is complete and
3554 * hsm_task_state is changed. Hence, the following locking.
3555 */
3556 spin_lock_irqsave(&ap->host_set->lock, flags);
3557
3558 if (qc->tf.protocol == ATA_PROT_PIO) {
3559 /* PIO data out protocol.
3560 * send first data block.
3561 */
3562
07f6f7d0
AL		 3563 /* ata_pio_sectors() might change the state to HSM_ST_LAST.
3564 * so, the state is changed here before ata_pio_sectors().
c71c1857
AL		 3565 */
3566 ap->hsm_task_state = HSM_ST;
07f6f7d0 3567 ata_pio_sectors(qc);
c71c1857
AL		 3568 ata_altstatus(ap); /* flush */
3569 } else
3570 /* send CDB */
3571 atapi_send_cdb(ap, qc);
3572
fbcdd80b
AL		 3573 spin_unlock_irqrestore(&ap->host_set->lock, flags);
3574
c71c1857
AL		 3575 /* if polling, ata_pio_task() handles the rest.
3576 * otherwise, interrupt handler takes over from here.
3577 */
fbcdd80b 3578 return has_next;
c71c1857
AL		 3579
3580err_out:
fbcdd80b 3581 return 1; /* has next */
c71c1857
AL		 3582}
3583
6ae4cfb5
AL		 3584/**
3585 * __atapi_pio_bytes - Transfer data from/to the ATAPI device.
3586 * @qc: Command on going
3587 * @bytes: number of bytes
3588 *
3589 * Transfer Transfer data from/to the ATAPI device.
3590 *
3591 * LOCKING:
3592 * Inherited from caller.
3593 *
3594 */
3595
1da177e4
LT		 3596static void __atapi_pio_bytes(struct ata_queued_cmd *qc, unsigned int bytes)
3597{
3598 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
cedc9a47 3599 struct scatterlist *sg = qc->__sg;
1da177e4
LT		 3600 struct ata_port *ap = qc->ap;
3601 struct page *page;
3602 unsigned char *buf;
3603 unsigned int offset, count;
3604
563a6e1f 3605 if (qc->curbytes + bytes >= qc->nbytes)
14be71f4 3606 ap->hsm_task_state = HSM_ST_LAST;
1da177e4
LT		 3607
3608next_sg:
563a6e1f 3609 if (unlikely(qc->cursg >= qc->n_elem)) {
7fb6ec28 3610 /*
563a6e1f
AL		 3611 * The end of qc->sg is reached and the device expects
3612 * more data to transfer. In order not to overrun qc->sg
3613 * and fulfill length specified in the byte count register,
3614 * - for read case, discard trailing data from the device
3615 * - for write case, padding zero data to the device
3616 */
3617 u16 pad_buf[1] = { 0 };
3618 unsigned int words = bytes >> 1;
3619 unsigned int i;
3620
3621 if (words) /* warning if bytes > 1 */
7fb6ec28 3622 printk(KERN_WARNING "ata%u: %u bytes trailing data\n",
563a6e1f
AL		 3623 ap->id, bytes);
3624
3625 for (i = 0; i < words; i++)
3626 ata_data_xfer(ap, (unsigned char*)pad_buf, 2, do_write);
3627
14be71f4 3628 ap->hsm_task_state = HSM_ST_LAST;
563a6e1f
AL		 3629 return;
3630 }
3631
cedc9a47 3632 sg = &qc->__sg[qc->cursg];
1da177e4 3633
1da177e4
LT		 3634 page = sg->page;
3635 offset = sg->offset + qc->cursg_ofs;
3636
3637 /* get the current page and offset */
3638 page = nth_page(page, (offset >> PAGE_SHIFT));
3639 offset %= PAGE_SIZE;
3640
6952df03 3641 /* don't overrun current sg */
32529e01 3642 count = min(sg->length - qc->cursg_ofs, bytes);
1da177e4
LT		 3643
3644 /* don't cross page boundaries */
3645 count = min(count, (unsigned int)PAGE_SIZE - offset);
3646
7282aa4b
AL		 3647 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
3648
91b8b313
AL		 3649 if (PageHighMem(page)) {
3650 unsigned long flags;
3651
3652 local_irq_save(flags);
3653 buf = kmap_atomic(page, KM_IRQ0);
083958d3 3654
91b8b313
AL		 3655 /* do the actual data transfer */
3656 ata_data_xfer(ap, buf + offset, count, do_write);
7282aa4b 3657
91b8b313
AL		 3658 kunmap_atomic(buf, KM_IRQ0);
3659 local_irq_restore(flags);
3660 } else {
3661 buf = page_address(page);
3662 ata_data_xfer(ap, buf + offset, count, do_write);
3663 }
7282aa4b 3664
1da177e4
LT		 3665 bytes -= count;
3666 qc->curbytes += count;
3667 qc->cursg_ofs += count;
3668
32529e01 3669 if (qc->cursg_ofs == sg->length) {
1da177e4
LT		 3670 qc->cursg++;
3671 qc->cursg_ofs = 0;
3672 }
3673
563a6e1f 3674 if (bytes)
1da177e4 3675 goto next_sg;
1da177e4
LT		 3676}
3677
6ae4cfb5
AL		 3678/**
3679 * atapi_pio_bytes - Transfer data from/to the ATAPI device.
3680 * @qc: Command on going
3681 *
3682 * Transfer Transfer data from/to the ATAPI device.
3683 *
3684 * LOCKING:
3685 * Inherited from caller.
6ae4cfb5
AL		 3686 */
3687
1da177e4
LT		 3688static void atapi_pio_bytes(struct ata_queued_cmd *qc)
3689{
3690 struct ata_port *ap = qc->ap;
3691 struct ata_device *dev = qc->dev;
3692 unsigned int ireason, bc_lo, bc_hi, bytes;
3693 int i_write, do_write = (qc->tf.flags & ATA_TFLAG_WRITE) ? 1 : 0;
3694
3695 ap->ops->tf_read(ap, &qc->tf);
3696 ireason = qc->tf.nsect;
3697 bc_lo = qc->tf.lbam;
3698 bc_hi = qc->tf.lbah;
3699 bytes = (bc_hi << 8) | bc_lo;
3700
3701 /* shall be cleared to zero, indicating xfer of data */
3702 if (ireason & (1 << 0))
3703 goto err_out;
3704
3705 /* make sure transfer direction matches expected */
3706 i_write = ((ireason & (1 << 1)) == 0) ? 1 : 0;
3707 if (do_write != i_write)
3708 goto err_out;
3709
312f7da2
AL		 3710 VPRINTK("ata%u: xfering %d bytes\n", ap->id, bytes);
3711
1da177e4
LT		 3712 __atapi_pio_bytes(qc, bytes);
3713
3714 return;
3715
3716err_out:
3717 printk(KERN_INFO "ata%u: dev %u: ATAPI check failed\n",
3718 ap->id, dev->devno);
11a56d24 3719 qc->err_mask |= AC_ERR_HSM;
14be71f4 3720 ap->hsm_task_state = HSM_ST_ERR;
1da177e4
LT		 3721}
3722
3723/**
6f0ef4fa
RD		 3724 * ata_pio_block - start PIO on a block
3725 * @ap: the target ata_port
1da177e4
LT		 3726 *
3727 * LOCKING:
0cba632b 3728 * None. (executing in kernel thread context)
1da177e4
LT		 3729 */
3730
3731static void ata_pio_block(struct ata_port *ap)
3732{
3733 struct ata_queued_cmd *qc;
3734 u8 status;
3735
3736 /*
6f0ef4fa 3737 * This is purely heuristic. This is a fast path.
1da177e4
LT		 3738 * Sometimes when we enter, BSY will be cleared in
3739 * a chk-status or two. If not, the drive is probably seeking
3740 * or something. Snooze for a couple msecs, then
3741 * chk-status again. If still busy, fall back to
14be71f4 3742 * HSM_ST_POLL state.
1da177e4
LT		 3743 */
3744 status = ata_busy_wait(ap, ATA_BUSY, 5);
3745 if (status & ATA_BUSY) {
3746 msleep(2);
3747 status = ata_busy_wait(ap, ATA_BUSY, 10);
3748 if (status & ATA_BUSY) {
14be71f4 3749 ap->hsm_task_state = HSM_ST_POLL;
1da177e4
LT		 3750 ap->pio_task_timeout = jiffies + ATA_TMOUT_PIO;
3751 return;
3752 }
3753 }
3754
3755 qc = ata_qc_from_tag(ap, ap->active_tag);
a4631474 3756 WARN_ON(qc == NULL);
1da177e4 3757
fe79e683
AL		 3758 /* check error */
3759 if (status & (ATA_ERR | ATA_DF)) {
3760 qc->err_mask |= AC_ERR_DEV;
3761 ap->hsm_task_state = HSM_ST_ERR;
3762 return;
3763 }
3764
3765 /* transfer data if any */
1da177e4 3766 if (is_atapi_taskfile(&qc->tf)) {
fe79e683 3767 /* DRQ=0 means no more data to transfer */
1da177e4 3768 if ((status & ATA_DRQ) == 0) {
14be71f4 3769 ap->hsm_task_state = HSM_ST_LAST;
1da177e4
LT		 3770 return;
3771 }
3772
3773 atapi_pio_bytes(qc);
3774 } else {
3775 /* handle BSY=0, DRQ=0 as error */
3776 if ((status & ATA_DRQ) == 0) {
11a56d24 3777 qc->err_mask |= AC_ERR_HSM;
14be71f4 3778 ap->hsm_task_state = HSM_ST_ERR;
1da177e4
LT		 3779 return;
3780 }
3781
07f6f7d0 3782 ata_pio_sectors(qc);
1da177e4 3783 }
467b16d4
AL		 3784
3785 ata_altstatus(ap); /* flush */
1da177e4
LT		 3786}
3787
3788static void ata_pio_error(struct ata_port *ap)
3789{
3790 struct ata_queued_cmd *qc;
a7dac447 3791
1da177e4 3792 qc = ata_qc_from_tag(ap, ap->active_tag);
a4631474 3793 WARN_ON(qc == NULL);
1da177e4 3794
000080c3
AL		 3795 if (qc->tf.command != ATA_CMD_PACKET)
3796 printk(KERN_WARNING "ata%u: PIO error\n", ap->id);
3797
2e9edbf8 3798 /* make sure qc->err_mask is available to
1c848984
AL		 3799 * know what's wrong and recover
3800 */
a4631474 3801 WARN_ON(qc->err_mask == 0);
1c848984 3802
14be71f4 3803 ap->hsm_task_state = HSM_ST_IDLE;
1da177e4 3804
a22e2eb0 3805 ata_poll_qc_complete(qc);
1da177e4
LT		 3806}
3807
e2cec771
AL		 3808static void ata_hsm_move(struct ata_port *ap, struct ata_queued_cmd *qc,
3809 u8 status)
3810{
6912ccd5
AL		 3811 WARN_ON((qc->flags & ATA_QCFLAG_ACTIVE) == 0);
3812
e2cec771
AL		 3813 /* check error */
3814 if (unlikely(status & (ATA_ERR | ATA_DF))) {
3815 qc->err_mask |= AC_ERR_DEV;
3816 ap->hsm_task_state = HSM_ST_ERR;
3817 }
3818
3819fsm_start:
3820 switch (ap->hsm_task_state) {
3821 case HSM_ST_FIRST:
e2cec771
AL		 3822 /* check device status */
3823 if (unlikely((status & (ATA_BUSY | ATA_DRQ)) != ATA_DRQ)) {
3824 /* Wrong status. Let EH handle this */
3825 qc->err_mask |= AC_ERR_HSM;
3826 ap->hsm_task_state = HSM_ST_ERR;
3827 goto fsm_start;
3828 }
3829
3830 atapi_send_cdb(ap, qc);
3831
3832 break;
3833
3834 case HSM_ST:
3835 /* complete command or read/write the data register */
3836 if (qc->tf.protocol == ATA_PROT_ATAPI) {
3837 /* ATAPI PIO protocol */
3838 if ((status & ATA_DRQ) == 0) {
3839 /* no more data to transfer */
3840 ap->hsm_task_state = HSM_ST_LAST;
3841 goto fsm_start;
3842 }
3843
3844 atapi_pio_bytes(qc);
3845
3846 if (unlikely(ap->hsm_task_state == HSM_ST_ERR))
3847 /* bad ireason reported by device */
3848 goto fsm_start;
3849
3850 } else {
3851 /* ATA PIO protocol */
3852 if (unlikely((status & ATA_DRQ) == 0)) {
3853 /* handle BSY=0, DRQ=0 as error */
3854 qc->err_mask |= AC_ERR_HSM;
3855 ap->hsm_task_state = HSM_ST_ERR;
3856 goto fsm_start;
3857 }
3858
3859 ata_pio_sectors(qc);
3860
3861 if (ap->hsm_task_state == HSM_ST_LAST &&
3862 (!(qc->tf.flags & ATA_TFLAG_WRITE))) {
3863 /* all data read */
3864 ata_altstatus(ap);
3865 status = ata_chk_status(ap);
3866 goto fsm_start;
3867 }
3868 }
3869
3870 ata_altstatus(ap); /* flush */
3871 break;
3872
3873 case HSM_ST_LAST:
6912ccd5
AL		 3874 if (unlikely(!ata_ok(status))) {
3875 qc->err_mask |= __ac_err_mask(status);
e2cec771
AL		 3876 ap->hsm_task_state = HSM_ST_ERR;
3877 goto fsm_start;
3878 }
3879
3880 /* no more data to transfer */
3881 DPRINTK("ata%u: command complete, drv_stat 0x%x\n",
3882 ap->id, status);
3883
6912ccd5
AL		 3884 WARN_ON(qc->err_mask);
3885
e2cec771
AL		 3886 ap->hsm_task_state = HSM_ST_IDLE;
3887
3888 /* complete taskfile transaction */
e2cec771
AL		 3889 ata_qc_complete(qc);
3890 break;
3891
3892 case HSM_ST_ERR:
3893 if (qc->tf.command != ATA_CMD_PACKET)
6912ccd5
AL		 3894 printk(KERN_ERR "ata%u: command error, drv_stat 0x%x\n",
3895 ap->id, status);
e2cec771
AL		 3896
3897 /* make sure qc->err_mask is available to
3898 * know what's wrong and recover
3899 */
3900 WARN_ON(qc->err_mask == 0);
3901
3902 ap->hsm_task_state = HSM_ST_IDLE;
3903 ata_qc_complete(qc);
3904 break;
3905 default:
6912ccd5 3906 BUG();
e2cec771
AL		 3907 }
3908
3909}
3910
1da177e4
LT		 3911static void ata_pio_task(void *_data)
3912{
3913 struct ata_port *ap = _data;
7fb6ec28 3914 unsigned long timeout;
fbcdd80b 3915 int has_next;
7fb6ec28
JG		 3916
3917fsm_start:
3918 timeout = 0;
fbcdd80b 3919 has_next = 1;
1da177e4 3920
14be71f4 3921 switch (ap->hsm_task_state) {
e27486db 3922 case HSM_ST_FIRST:
fbcdd80b
AL		 3923 has_next = ata_pio_first_block(ap);
3924 break;
e27486db 3925
14be71f4 3926 case HSM_ST:
1da177e4
LT		 3927 ata_pio_block(ap);
3928 break;
3929
14be71f4 3930 case HSM_ST_LAST:
fbcdd80b 3931 has_next = ata_pio_complete(ap);
1da177e4
LT		 3932 break;
3933
14be71f4
AL		 3934 case HSM_ST_POLL:
3935 case HSM_ST_LAST_POLL:
1da177e4
LT		 3936 timeout = ata_pio_poll(ap);
3937 break;
3938
14be71f4
AL		 3939 case HSM_ST_TMOUT:
3940 case HSM_ST_ERR:
1da177e4
LT		 3941 ata_pio_error(ap);
3942 return;
467b16d4
AL		 3943
3944 default:
3945 BUG();
3946 return;
1da177e4
LT		 3947 }
3948
3949 if (timeout)
8061f5f0 3950 ata_port_queue_task(ap, ata_pio_task, ap, timeout);
46e202ec 3951 else if (has_next)
7fb6ec28 3952 goto fsm_start;
1da177e4
LT		 3953}
3954
1da177e4
LT		 3955/**
3956 * ata_qc_timeout - Handle timeout of queued command
3957 * @qc: Command that timed out
3958 *
3959 * Some part of the kernel (currently, only the SCSI layer)
3960 * has noticed that the active command on port @ap has not
3961 * completed after a specified length of time. Handle this
3962 * condition by disabling DMA (if necessary) and completing
3963 * transactions, with error if necessary.
3964 *
3965 * This also handles the case of the "lost interrupt", where
3966 * for some reason (possibly hardware bug, possibly driver bug)
3967 * an interrupt was not delivered to the driver, even though the
3968 * transaction completed successfully.
3969 *
3970 * LOCKING:
0cba632b 3971 * Inherited from SCSI layer (none, can sleep)
1da177e4
LT		 3972 */
3973
3974static void ata_qc_timeout(struct ata_queued_cmd *qc)
3975{
3976 struct ata_port *ap = qc->ap;
b8f6153e 3977 struct ata_host_set *host_set = ap->host_set;
1da177e4 3978 u8 host_stat = 0, drv_stat;
b8f6153e 3979 unsigned long flags;
1da177e4
LT		 3980
3981 DPRINTK("ENTER\n");
3982
c18d06f8
TH		 3983 ap->hsm_task_state = HSM_ST_IDLE;
3984
b8f6153e
JG		 3985 spin_lock_irqsave(&host_set->lock, flags);
3986
1da177e4
LT		 3987 switch (qc->tf.protocol) {
3988
3989 case ATA_PROT_DMA:
3990 case ATA_PROT_ATAPI_DMA:
3991 host_stat = ap->ops->bmdma_status(ap);
3992
3993 /* before we do anything else, clear DMA-Start bit */
b73fc89f 3994 ap->ops->bmdma_stop(qc);
1da177e4
LT		 3995
3996 /* fall through */
3997
3998 default:
3999 ata_altstatus(ap);
4000 drv_stat = ata_chk_status(ap);
4001
4002 /* ack bmdma irq events */
4003 ap->ops->irq_clear(ap);
4004
4005 printk(KERN_ERR "ata%u: command 0x%x timeout, stat 0x%x host_stat 0x%x\n",
4006 ap->id, qc->tf.command, drv_stat, host_stat);
4007
312f7da2
AL		 4008 ap->hsm_task_state = HSM_ST_IDLE;
4009
1da177e4 4010 /* complete taskfile transaction */
555a8965 4011 qc->err_mask |= AC_ERR_TIMEOUT;
1da177e4
LT		 4012 break;
4013 }
b8f6153e
JG		 4014
4015 spin_unlock_irqrestore(&host_set->lock, flags);
4016
a72ec4ce
TH		 4017 ata_eh_qc_complete(qc);
4018
1da177e4
LT		 4019 DPRINTK("EXIT\n");
4020}
4021
4022/**
4023 * ata_eng_timeout - Handle timeout of queued command
4024 * @ap: Port on which timed-out command is active
4025 *
4026 * Some part of the kernel (currently, only the SCSI layer)
4027 * has noticed that the active command on port @ap has not
4028 * completed after a specified length of time. Handle this
4029 * condition by disabling DMA (if necessary) and completing
4030 * transactions, with error if necessary.
4031 *
4032 * This also handles the case of the "lost interrupt", where
4033 * for some reason (possibly hardware bug, possibly driver bug)
4034 * an interrupt was not delivered to the driver, even though the
4035 * transaction completed successfully.
4036 *
4037 * LOCKING:
4038 * Inherited from SCSI layer (none, can sleep)
4039 */
4040
4041void ata_eng_timeout(struct ata_port *ap)
4042{
1da177e4
LT		 4043 DPRINTK("ENTER\n");
4044
f6379020 4045 ata_qc_timeout(ata_qc_from_tag(ap, ap->active_tag));
1da177e4 4046
1da177e4
LT		 4047 DPRINTK("EXIT\n");
4048}
4049
4050/**
4051 * ata_qc_new - Request an available ATA command, for queueing
4052 * @ap: Port associated with device @dev
4053 * @dev: Device from whom we request an available command structure
4054 *
4055 * LOCKING:
0cba632b 4056 * None.
1da177e4
LT		 4057 */
4058
4059static struct ata_queued_cmd *ata_qc_new(struct ata_port *ap)
4060{
4061 struct ata_queued_cmd *qc = NULL;
4062 unsigned int i;
4063
4064 for (i = 0; i < ATA_MAX_QUEUE; i++)
4065 if (!test_and_set_bit(i, &ap->qactive)) {
4066 qc = ata_qc_from_tag(ap, i);
4067 break;
4068 }
4069
4070 if (qc)
4071 qc->tag = i;
4072
4073 return qc;
4074}
4075
4076/**
4077 * ata_qc_new_init - Request an available ATA command, and initialize it
4078 * @ap: Port associated with device @dev
4079 * @dev: Device from whom we request an available command structure
4080 *
4081 * LOCKING:
0cba632b 4082 * None.
1da177e4
LT		 4083 */
4084
4085struct ata_queued_cmd *ata_qc_new_init(struct ata_port *ap,
4086 struct ata_device *dev)
4087{
4088 struct ata_queued_cmd *qc;
4089
4090 qc = ata_qc_new(ap);
4091 if (qc) {
1da177e4
LT		 4092 qc->scsicmd = NULL;
4093 qc->ap = ap;
4094 qc->dev = dev;
1da177e4 4095
2c13b7ce 4096 ata_qc_reinit(qc);
1da177e4
LT		 4097 }
4098
4099 return qc;
4100}
4101
1da177e4
LT		 4102/**
4103 * ata_qc_free - free unused ata_queued_cmd
4104 * @qc: Command to complete
4105 *
4106 * Designed to free unused ata_queued_cmd object
4107 * in case something prevents using it.
4108 *
4109 * LOCKING:
0cba632b 4110 * spin_lock_irqsave(host_set lock)
1da177e4
LT		 4111 */
4112void ata_qc_free(struct ata_queued_cmd *qc)
4113{
4ba946e9
TH		 4114 struct ata_port *ap = qc->ap;
4115 unsigned int tag;
4116
a4631474 4117 WARN_ON(qc == NULL); /* ata_qc_from_tag _might_ return NULL */
1da177e4 4118
4ba946e9
TH		 4119 qc->flags = 0;
4120 tag = qc->tag;
4121 if (likely(ata_tag_valid(tag))) {
4122 if (tag == ap->active_tag)
4123 ap->active_tag = ATA_TAG_POISON;
4124 qc->tag = ATA_TAG_POISON;
4125 clear_bit(tag, &ap->qactive);
4126 }
1da177e4
LT		 4127}
4128
76014427 4129void __ata_qc_complete(struct ata_queued_cmd *qc)
1da177e4 4130{
a4631474
TH		 4131 WARN_ON(qc == NULL); /* ata_qc_from_tag _might_ return NULL */
4132 WARN_ON(!(qc->flags & ATA_QCFLAG_ACTIVE));
1da177e4
LT		 4133
4134 if (likely(qc->flags & ATA_QCFLAG_DMAMAP))
4135 ata_sg_clean(qc);
4136
3f3791d3
AL		 4137 /* atapi: mark qc as inactive to prevent the interrupt handler
4138 * from completing the command twice later, before the error handler
4139 * is called. (when rc != 0 and atapi request sense is needed)
4140 */
4141 qc->flags &= ~ATA_QCFLAG_ACTIVE;
4142
1da177e4 4143 /* call completion callback */
77853bf2 4144 qc->complete_fn(qc);
1da177e4
LT		 4145}
4146
4147static inline int ata_should_dma_map(struct ata_queued_cmd *qc)
4148{
4149 struct ata_port *ap = qc->ap;
4150
4151 switch (qc->tf.protocol) {
4152 case ATA_PROT_DMA:
4153 case ATA_PROT_ATAPI_DMA:
4154 return 1;
4155
4156 case ATA_PROT_ATAPI:
4157 case ATA_PROT_PIO:
1da177e4
LT		 4158 if (ap->flags & ATA_FLAG_PIO_DMA)
4159 return 1;
4160
4161 /* fall through */
4162
4163 default:
4164 return 0;
4165 }
4166
4167 /* never reached */
4168}
4169
4170/**
4171 * ata_qc_issue - issue taskfile to device
4172 * @qc: command to issue to device
4173 *
4174 * Prepare an ATA command to submission to device.
4175 * This includes mapping the data into a DMA-able
4176 * area, filling in the S/G table, and finally
4177 * writing the taskfile to hardware, starting the command.
4178 *
4179 * LOCKING:
4180 * spin_lock_irqsave(host_set lock)
4181 *
4182 * RETURNS:
9a3d9eb0 4183 * Zero on success, AC_ERR_* mask on failure
1da177e4
LT		 4184 */
4185
9a3d9eb0 4186unsigned int ata_qc_issue(struct ata_queued_cmd *qc)
1da177e4
LT		 4187{
4188 struct ata_port *ap = qc->ap;
4189
4190 if (ata_should_dma_map(qc)) {
4191 if (qc->flags & ATA_QCFLAG_SG) {
4192 if (ata_sg_setup(qc))
8e436af9 4193 goto sg_err;
1da177e4
LT		 4194 } else if (qc->flags & ATA_QCFLAG_SINGLE) {
4195 if (ata_sg_setup_one(qc))
8e436af9 4196 goto sg_err;
1da177e4
LT		 4197 }
4198 } else {
4199 qc->flags &= ~ATA_QCFLAG_DMAMAP;
4200 }
4201
4202 ap->ops->qc_prep(qc);
4203
4204 qc->ap->active_tag = qc->tag;
4205 qc->flags |= ATA_QCFLAG_ACTIVE;
4206
4207 return ap->ops->qc_issue(qc);
4208
8e436af9
TH		 4209sg_err:
4210 qc->flags &= ~ATA_QCFLAG_DMAMAP;
9a3d9eb0 4211 return AC_ERR_SYSTEM;
1da177e4
LT		 4212}
4213
0baab86b 4214
1da177e4
LT		 4215/**
4216 * ata_qc_issue_prot - issue taskfile to device in proto-dependent manner
4217 * @qc: command to issue to device
4218 *
4219 * Using various libata functions and hooks, this function
4220 * starts an ATA command. ATA commands are grouped into
4221 * classes called "protocols", and issuing each type of protocol
4222 * is slightly different.
4223 *
0baab86b
EF		 4224 * May be used as the qc_issue() entry in ata_port_operations.
4225 *
1da177e4
LT		 4226 * LOCKING:
4227 * spin_lock_irqsave(host_set lock)
4228 *
4229 * RETURNS:
9a3d9eb0 4230 * Zero on success, AC_ERR_* mask on failure
1da177e4
LT		 4231 */
4232
9a3d9eb0 4233unsigned int ata_qc_issue_prot(struct ata_queued_cmd *qc)
1da177e4
LT		 4234{
4235 struct ata_port *ap = qc->ap;
4236
e50362ec
AL		 4237 /* Use polling pio if the LLD doesn't handle
4238 * interrupt driven pio and atapi CDB interrupt.
4239 */
4240 if (ap->flags & ATA_FLAG_PIO_POLLING) {
4241 switch (qc->tf.protocol) {
4242 case ATA_PROT_PIO:
4243 case ATA_PROT_ATAPI:
4244 case ATA_PROT_ATAPI_NODATA:
4245 qc->tf.flags |= ATA_TFLAG_POLLING;
4246 break;
4247 case ATA_PROT_ATAPI_DMA:
4248 if (qc->dev->flags & ATA_DFLAG_CDB_INTR)
4249 BUG();
4250 break;
4251 default:
4252 break;
4253 }
4254 }
4255
312f7da2 4256 /* select the device */
1da177e4
LT		 4257 ata_dev_select(ap, qc->dev->devno, 1, 0);
4258
312f7da2 4259 /* start the command */
1da177e4
LT		 4260 switch (qc->tf.protocol) {
4261 case ATA_PROT_NODATA:
312f7da2
AL		 4262 if (qc->tf.flags & ATA_TFLAG_POLLING)
4263 ata_qc_set_polling(qc);
4264
e5338254 4265 ata_tf_to_host(ap, &qc->tf);
312f7da2
AL		 4266 ap->hsm_task_state = HSM_ST_LAST;
4267
4268 if (qc->tf.flags & ATA_TFLAG_POLLING)
46e202ec 4269 ata_port_queue_task(ap, ata_pio_task, ap, 0);
312f7da2 4270
1da177e4
LT		 4271 break;
4272
4273 case ATA_PROT_DMA:
587005de 4274 WARN_ON(qc->tf.flags & ATA_TFLAG_POLLING);
312f7da2 4275
1da177e4
LT		 4276 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
4277 ap->ops->bmdma_setup(qc); /* set up bmdma */
4278 ap->ops->bmdma_start(qc); /* initiate bmdma */
312f7da2 4279 ap->hsm_task_state = HSM_ST_LAST;
1da177e4
LT		 4280 break;
4281
312f7da2
AL		 4282 case ATA_PROT_PIO:
4283 if (qc->tf.flags & ATA_TFLAG_POLLING)
4284 ata_qc_set_polling(qc);
4285
e5338254 4286 ata_tf_to_host(ap, &qc->tf);
312f7da2 4287
54f00389
AL		 4288 if (qc->tf.flags & ATA_TFLAG_WRITE) {
4289 /* PIO data out protocol */
4290 ap->hsm_task_state = HSM_ST_FIRST;
ce1e7a2a 4291 ata_port_queue_task(ap, ata_pio_task, ap, 0);
54f00389
AL		 4292
4293 /* always send first data block using
e27486db 4294 * the ata_pio_task() codepath.
54f00389 4295 */
312f7da2 4296 } else {
54f00389
AL		 4297 /* PIO data in protocol */
4298 ap->hsm_task_state = HSM_ST;
4299
4300 if (qc->tf.flags & ATA_TFLAG_POLLING)
ce1e7a2a 4301 ata_port_queue_task(ap, ata_pio_task, ap, 0);
54f00389
AL		 4302
4303 /* if polling, ata_pio_task() handles the rest.
4304 * otherwise, interrupt handler takes over from here.
4305 */
312f7da2
AL		 4306 }
4307
1da177e4
LT		 4308 break;
4309
4310 case ATA_PROT_ATAPI:
1da177e4 4311 case ATA_PROT_ATAPI_NODATA:
312f7da2
AL		 4312 if (qc->tf.flags & ATA_TFLAG_POLLING)
4313 ata_qc_set_polling(qc);
4314
e5338254 4315 ata_tf_to_host(ap, &qc->tf);
f6ef65e6 4316
312f7da2
AL		 4317 ap->hsm_task_state = HSM_ST_FIRST;
4318
4319 /* send cdb by polling if no cdb interrupt */
4320 if ((!(qc->dev->flags & ATA_DFLAG_CDB_INTR)) ||
4321 (qc->tf.flags & ATA_TFLAG_POLLING))
13ee4628 4322 ata_port_queue_task(ap, ata_pio_task, ap, 0);
1da177e4
LT		 4323 break;
4324
4325 case ATA_PROT_ATAPI_DMA:
587005de 4326 WARN_ON(qc->tf.flags & ATA_TFLAG_POLLING);
312f7da2 4327
1da177e4
LT		 4328 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
4329 ap->ops->bmdma_setup(qc); /* set up bmdma */
312f7da2
AL		 4330 ap->hsm_task_state = HSM_ST_FIRST;
4331
4332 /* send cdb by polling if no cdb interrupt */
4333 if (!(qc->dev->flags & ATA_DFLAG_CDB_INTR))
13ee4628 4334 ata_port_queue_task(ap, ata_pio_task, ap, 0);
1da177e4
LT		 4335 break;
4336
4337 default:
4338 WARN_ON(1);
9a3d9eb0 4339 return AC_ERR_SYSTEM;
1da177e4
LT		 4340 }
4341
4342 return 0;
4343}
4344
1da177e4
LT		 4345/**
4346 * ata_host_intr - Handle host interrupt for given (port, task)
4347 * @ap: Port on which interrupt arrived (possibly...)
4348 * @qc: Taskfile currently active in engine
4349 *
4350 * Handle host interrupt for given queued command. Currently,
4351 * only DMA interrupts are handled. All other commands are
4352 * handled via polling with interrupts disabled (nIEN bit).
4353 *
4354 * LOCKING:
4355 * spin_lock_irqsave(host_set lock)
4356 *
4357 * RETURNS:
4358 * One if interrupt was handled, zero if not (shared irq).
4359 */
4360
4361inline unsigned int ata_host_intr (struct ata_port *ap,
4362 struct ata_queued_cmd *qc)
4363{
312f7da2 4364 u8 status, host_stat = 0;
1da177e4 4365
312f7da2
AL		 4366 VPRINTK("ata%u: protocol %d task_state %d\n",
4367 ap->id, qc->tf.protocol, ap->hsm_task_state);
1da177e4 4368
312f7da2
AL		 4369 /* Check whether we are expecting interrupt in this state */
4370 switch (ap->hsm_task_state) {
4371 case HSM_ST_FIRST:
6912ccd5
AL		 4372 /* Some pre-ATAPI-4 devices assert INTRQ
4373 * at this state when ready to receive CDB.
4374 */
4375
312f7da2
AL		 4376 /* Check the ATA_DFLAG_CDB_INTR flag is enough here.
4377 * The flag was turned on only for atapi devices.
4378 * No need to check is_atapi_taskfile(&qc->tf) again.
4379 */
4380 if (!(qc->dev->flags & ATA_DFLAG_CDB_INTR))
1da177e4 4381 goto idle_irq;
312f7da2
AL		 4382 break;
4383 case HSM_ST_LAST:
4384 if (qc->tf.protocol == ATA_PROT_DMA ||
4385 qc->tf.protocol == ATA_PROT_ATAPI_DMA) {
4386 /* check status of DMA engine */
4387 host_stat = ap->ops->bmdma_status(ap);
4388 VPRINTK("ata%u: host_stat 0x%X\n", ap->id, host_stat);
4389
4390 /* if it's not our irq... */
4391 if (!(host_stat & ATA_DMA_INTR))
4392 goto idle_irq;
4393
4394 /* before we do anything else, clear DMA-Start bit */
4395 ap->ops->bmdma_stop(qc);
a4f16610
AL		 4396
4397 if (unlikely(host_stat & ATA_DMA_ERR)) {
4398 /* error when transfering data to/from memory */
4399 qc->err_mask |= AC_ERR_HOST_BUS;
4400 ap->hsm_task_state = HSM_ST_ERR;
4401 }
312f7da2
AL		 4402 }
4403 break;
4404 case HSM_ST:
4405 break;
4406 default:
4407 goto idle_irq;
4408 }
1da177e4 4409
312f7da2
AL		 4410 /* check altstatus */
4411 status = ata_altstatus(ap);
4412 if (status & ATA_BUSY)
4413 goto idle_irq;
1da177e4 4414
312f7da2
AL		 4415 /* check main status, clearing INTRQ */
4416 status = ata_chk_status(ap);
4417 if (unlikely(status & ATA_BUSY))
4418 goto idle_irq;
1da177e4 4419
312f7da2
AL		 4420 DPRINTK("ata%u: protocol %d task_state %d (dev_stat 0x%X)\n",
4421 ap->id, qc->tf.protocol, ap->hsm_task_state, status);
1da177e4 4422
312f7da2
AL		 4423 /* ack bmdma irq events */
4424 ap->ops->irq_clear(ap);
1da177e4 4425
e2cec771 4426 ata_hsm_move(ap, qc, status);
1da177e4
LT		 4427 return 1; /* irq handled */
4428
4429idle_irq:
4430 ap->stats.idle_irq++;
4431
4432#ifdef ATA_IRQ_TRAP
4433 if ((ap->stats.idle_irq % 1000) == 0) {
1da177e4
LT		 4434 ata_irq_ack(ap, 0); /* debug trap */
4435 printk(KERN_WARNING "ata%d: irq trap\n", ap->id);
23cfce89 4436 return 1;
1da177e4
LT		 4437 }
4438#endif
4439 return 0; /* irq not handled */
4440}
4441
4442/**
4443 * ata_interrupt - Default ATA host interrupt handler
0cba632b
JG		 4444 * @irq: irq line (unused)
4445 * @dev_instance: pointer to our ata_host_set information structure
1da177e4
LT		 4446 * @regs: unused
4447 *
0cba632b
JG		 4448 * Default interrupt handler for PCI IDE devices. Calls
4449 * ata_host_intr() for each port that is not disabled.
4450 *
1da177e4 4451 * LOCKING:
0cba632b 4452 * Obtains host_set lock during operation.
1da177e4
LT		 4453 *
4454 * RETURNS:
0cba632b 4455 * IRQ_NONE or IRQ_HANDLED.
1da177e4
LT		 4456 */
4457
4458irqreturn_t ata_interrupt (int irq, void *dev_instance, struct pt_regs *regs)
4459{
4460 struct ata_host_set *host_set = dev_instance;
4461 unsigned int i;
4462 unsigned int handled = 0;
4463 unsigned long flags;
4464
4465 /* TODO: make _irqsave conditional on x86 PCI IDE legacy mode */
4466 spin_lock_irqsave(&host_set->lock, flags);
4467
4468 for (i = 0; i < host_set->n_ports; i++) {
4469 struct ata_port *ap;
4470
4471 ap = host_set->ports[i];
c1389503 4472 if (ap &&
312f7da2 4473 !(ap->flags & ATA_FLAG_PORT_DISABLED)) {
1da177e4
LT		 4474 struct ata_queued_cmd *qc;
4475
4476 qc = ata_qc_from_tag(ap, ap->active_tag);
312f7da2 4477 if (qc && (!(qc->tf.flags & ATA_TFLAG_POLLING)) &&
21b1ed74 4478 (qc->flags & ATA_QCFLAG_ACTIVE))
1da177e4
LT		 4479 handled |= ata_host_intr(ap, qc);
4480 }
4481 }
4482
4483 spin_unlock_irqrestore(&host_set->lock, flags);
4484
4485 return IRQ_RETVAL(handled);
4486}
4487
0baab86b 4488
9b847548
JA		 4489/*
4490 * Execute a 'simple' command, that only consists of the opcode 'cmd' itself,
4491 * without filling any other registers
4492 */
4493static int ata_do_simple_cmd(struct ata_port *ap, struct ata_device *dev,
4494 u8 cmd)
4495{
4496 struct ata_taskfile tf;
4497 int err;
4498
4499 ata_tf_init(ap, &tf, dev->devno);
4500
4501 tf.command = cmd;
4502 tf.flags |= ATA_TFLAG_DEVICE;
4503 tf.protocol = ATA_PROT_NODATA;
4504
4505 err = ata_exec_internal(ap, dev, &tf, DMA_NONE, NULL, 0);
4506 if (err)
4507 printk(KERN_ERR "%s: ata command failed: %d\n",
4508 __FUNCTION__, err);
4509
4510 return err;
4511}
4512
4513static int ata_flush_cache(struct ata_port *ap, struct ata_device *dev)
4514{
4515 u8 cmd;
4516
4517 if (!ata_try_flush_cache(dev))
4518 return 0;
4519
4520 if (ata_id_has_flush_ext(dev->id))
4521 cmd = ATA_CMD_FLUSH_EXT;
4522 else
4523 cmd = ATA_CMD_FLUSH;
4524
4525 return ata_do_simple_cmd(ap, dev, cmd);
4526}
4527
4528static int ata_standby_drive(struct ata_port *ap, struct ata_device *dev)
4529{
4530 return ata_do_simple_cmd(ap, dev, ATA_CMD_STANDBYNOW1);
4531}
4532
4533static int ata_start_drive(struct ata_port *ap, struct ata_device *dev)
4534{
4535 return ata_do_simple_cmd(ap, dev, ATA_CMD_IDLEIMMEDIATE);
4536}
4537
4538/**
4539 * ata_device_resume - wakeup a previously suspended devices
c893a3ae
RD		 4540 * @ap: port the device is connected to
4541 * @dev: the device to resume
9b847548
JA		 4542 *
4543 * Kick the drive back into action, by sending it an idle immediate
4544 * command and making sure its transfer mode matches between drive
4545 * and host.
4546 *
4547 */
4548int ata_device_resume(struct ata_port *ap, struct ata_device *dev)
4549{
4550 if (ap->flags & ATA_FLAG_SUSPENDED) {
4551 ap->flags &= ~ATA_FLAG_SUSPENDED;
4552 ata_set_mode(ap);
4553 }
4554 if (!ata_dev_present(dev))
4555 return 0;
4556 if (dev->class == ATA_DEV_ATA)
4557 ata_start_drive(ap, dev);
4558
4559 return 0;
4560}
4561
4562/**
4563 * ata_device_suspend - prepare a device for suspend
c893a3ae
RD		 4564 * @ap: port the device is connected to
4565 * @dev: the device to suspend
9b847548
JA		 4566 *
4567 * Flush the cache on the drive, if appropriate, then issue a
4568 * standbynow command.
9b847548 4569 */
082776e4 4570int ata_device_suspend(struct ata_port *ap, struct ata_device *dev, pm_message_t state)
9b847548
JA		 4571{
4572 if (!ata_dev_present(dev))
4573 return 0;
4574 if (dev->class == ATA_DEV_ATA)
4575 ata_flush_cache(ap, dev);
4576
082776e4
NC		 4577 if (state.event != PM_EVENT_FREEZE)
4578 ata_standby_drive(ap, dev);
9b847548
JA		 4579 ap->flags |= ATA_FLAG_SUSPENDED;
4580 return 0;
4581}
4582
332b5a52
AL		 4583/**
4584 * ata_port_start - Set port up for dma.
4585 * @ap: Port to initialize
4586 *
4587 * Called just after data structures for each port are
4588 * initialized. Allocates space for PRD table.
4589 *
4590 * May be used as the port_start() entry in ata_port_operations.
4591 *
4592 * LOCKING:
4593 * Inherited from caller.
4594 */
4595
1da177e4
LT		 4596int ata_port_start (struct ata_port *ap)
4597{
2f1f610b 4598 struct device *dev = ap->dev;
6037d6bb 4599 int rc;
1da177e4
LT		 4600
4601 ap->prd = dma_alloc_coherent(dev, ATA_PRD_TBL_SZ, &ap->prd_dma, GFP_KERNEL);
4602 if (!ap->prd)
4603 return -ENOMEM;
4604
6037d6bb
JG		 4605 rc = ata_pad_alloc(ap, dev);
4606 if (rc) {
cedc9a47 4607 dma_free_coherent(dev, ATA_PRD_TBL_SZ, ap->prd, ap->prd_dma);
6037d6bb 4608 return rc;
cedc9a47
JG		 4609 }
4610
1da177e4
LT		 4611 DPRINTK("prd alloc, virt %p, dma %llx\n", ap->prd, (unsigned long long) ap->prd_dma);
4612
4613 return 0;
4614}
4615
0baab86b
EF		 4616
4617/**
4618 * ata_port_stop - Undo ata_port_start()
4619 * @ap: Port to shut down
4620 *
4621 * Frees the PRD table.
4622 *
4623 * May be used as the port_stop() entry in ata_port_operations.
4624 *
4625 * LOCKING:
6f0ef4fa 4626 * Inherited from caller.
0baab86b
EF		 4627 */
4628
1da177e4
LT		 4629void ata_port_stop (struct ata_port *ap)
4630{
2f1f610b 4631 struct device *dev = ap->dev;
1da177e4
LT		 4632
4633 dma_free_coherent(dev, ATA_PRD_TBL_SZ, ap->prd, ap->prd_dma);
6037d6bb 4634 ata_pad_free(ap, dev);
1da177e4
LT		 4635}
4636
aa8f0dc6
JG		 4637void ata_host_stop (struct ata_host_set *host_set)
4638{
4639 if (host_set->mmio_base)
4640 iounmap(host_set->mmio_base);
4641}
4642
4643
1da177e4
LT		 4644/**
4645 * ata_host_remove - Unregister SCSI host structure with upper layers
4646 * @ap: Port to unregister
4647 * @do_unregister: 1 if we fully unregister, 0 to just stop the port
4648 *
4649 * LOCKING:
6f0ef4fa 4650 * Inherited from caller.
1da177e4
LT		 4651 */
4652
4653static void ata_host_remove(struct ata_port *ap, unsigned int do_unregister)
4654{
4655 struct Scsi_Host *sh = ap->host;
4656
4657 DPRINTK("ENTER\n");
4658
4659 if (do_unregister)
4660 scsi_remove_host(sh);
4661
4662 ap->ops->port_stop(ap);
4663}
4664
4665/**
4666 * ata_host_init - Initialize an ata_port structure
4667 * @ap: Structure to initialize
4668 * @host: associated SCSI mid-layer structure
4669 * @host_set: Collection of hosts to which @ap belongs
4670 * @ent: Probe information provided by low-level driver
4671 * @port_no: Port number associated with this ata_port
4672 *
0cba632b
JG		 4673 * Initialize a new ata_port structure, and its associated
4674 * scsi_host.
4675 *
1da177e4 4676 * LOCKING:
0cba632b 4677 * Inherited from caller.
1da177e4
LT		 4678 */
4679
4680static void ata_host_init(struct ata_port *ap, struct Scsi_Host *host,
4681 struct ata_host_set *host_set,
057ace5e 4682 const struct ata_probe_ent *ent, unsigned int port_no)
1da177e4
LT		 4683{
4684 unsigned int i;
4685
4686 host->max_id = 16;
4687 host->max_lun = 1;
4688 host->max_channel = 1;
4689 host->unique_id = ata_unique_id++;
4690 host->max_cmd_len = 12;
12413197 4691
1da177e4
LT		 4692 ap->flags = ATA_FLAG_PORT_DISABLED;
4693 ap->id = host->unique_id;
4694 ap->host = host;
4695 ap->ctl = ATA_DEVCTL_OBS;
4696 ap->host_set = host_set;
2f1f610b 4697 ap->dev = ent->dev;
1da177e4
LT		 4698 ap->port_no = port_no;
4699 ap->hard_port_no =
4700 ent->legacy_mode ? ent->hard_port_no : port_no;
4701 ap->pio_mask = ent->pio_mask;
4702 ap->mwdma_mask = ent->mwdma_mask;
4703 ap->udma_mask = ent->udma_mask;
4704 ap->flags |= ent->host_flags;
4705 ap->ops = ent->port_ops;
4706 ap->cbl = ATA_CBL_NONE;
4707 ap->active_tag = ATA_TAG_POISON;
4708 ap->last_ctl = 0xFF;
4709
86e45b6b 4710 INIT_WORK(&ap->port_task, NULL, NULL);
a72ec4ce 4711 INIT_LIST_HEAD(&ap->eh_done_q);
1da177e4 4712
acf356b1
TH		 4713 for (i = 0; i < ATA_MAX_DEVICES; i++) {
4714 struct ata_device *dev = &ap->device[i];
4715 dev->devno = i;
4716 dev->pio_mask = UINT_MAX;
4717 dev->mwdma_mask = UINT_MAX;
4718 dev->udma_mask = UINT_MAX;
4719 }
1da177e4
LT		 4720
4721#ifdef ATA_IRQ_TRAP
4722 ap->stats.unhandled_irq = 1;
4723 ap->stats.idle_irq = 1;
4724#endif
4725
4726 memcpy(&ap->ioaddr, &ent->port[port_no], sizeof(struct ata_ioports));
4727}
4728
4729/**
4730 * ata_host_add - Attach low-level ATA driver to system
4731 * @ent: Information provided by low-level driver
4732 * @host_set: Collections of ports to which we add
4733 * @port_no: Port number associated with this host
4734 *
0cba632b
JG		 4735 * Attach low-level ATA driver to system.
4736 *
1da177e4 4737 * LOCKING:
0cba632b 4738 * PCI/etc. bus probe sem.
1da177e4
LT		 4739 *
4740 * RETURNS:
0cba632b 4741 * New ata_port on success, for NULL on error.
1da177e4
LT		 4742 */
4743
057ace5e 4744static struct ata_port * ata_host_add(const struct ata_probe_ent *ent,
1da177e4
LT		 4745 struct ata_host_set *host_set,
4746 unsigned int port_no)
4747{
4748 struct Scsi_Host *host;
4749 struct ata_port *ap;
4750 int rc;
4751
4752 DPRINTK("ENTER\n");
aec5c3c1
TH		 4753
4754 if (!ent->port_ops->probe_reset &&
4755 !(ent->host_flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST))) {
4756 printk(KERN_ERR "ata%u: no reset mechanism available\n",
4757 port_no);
4758 return NULL;
4759 }
4760
1da177e4
LT		 4761 host = scsi_host_alloc(ent->sht, sizeof(struct ata_port));
4762 if (!host)
4763 return NULL;
4764
30afc84c
TH		 4765 host->transportt = &ata_scsi_transport_template;
4766
1da177e4
LT		 4767 ap = (struct ata_port *) &host->hostdata[0];
4768
4769 ata_host_init(ap, host, host_set, ent, port_no);
4770
4771 rc = ap->ops->port_start(ap);
4772 if (rc)
4773 goto err_out;
4774
4775 return ap;
4776
4777err_out:
4778 scsi_host_put(host);
4779 return NULL;
4780}
4781
4782/**
0cba632b
JG		 4783 * ata_device_add - Register hardware device with ATA and SCSI layers
4784 * @ent: Probe information describing hardware device to be registered
4785 *
4786 * This function processes the information provided in the probe
4787 * information struct @ent, allocates the necessary ATA and SCSI
4788 * host information structures, initializes them, and registers
4789 * everything with requisite kernel subsystems.
4790 *
4791 * This function requests irqs, probes the ATA bus, and probes
4792 * the SCSI bus.
1da177e4
LT		 4793 *
4794 * LOCKING:
0cba632b 4795 * PCI/etc. bus probe sem.
1da177e4
LT		 4796 *
4797 * RETURNS:
0cba632b 4798 * Number of ports registered. Zero on error (no ports registered).
1da177e4
LT		 4799 */
4800
057ace5e 4801int ata_device_add(const struct ata_probe_ent *ent)
1da177e4
LT		 4802{
4803 unsigned int count = 0, i;
4804 struct device *dev = ent->dev;
4805 struct ata_host_set *host_set;
4806
4807 DPRINTK("ENTER\n");
4808 /* alloc a container for our list of ATA ports (buses) */
57f3bda8 4809 host_set = kzalloc(sizeof(struct ata_host_set) +
1da177e4
LT		 4810 (ent->n_ports * sizeof(void *)), GFP_KERNEL);
4811 if (!host_set)
4812 return 0;
1da177e4
LT		 4813 spin_lock_init(&host_set->lock);
4814
4815 host_set->dev = dev;
4816 host_set->n_ports = ent->n_ports;
4817 host_set->irq = ent->irq;
4818 host_set->mmio_base = ent->mmio_base;
4819 host_set->private_data = ent->private_data;
4820 host_set->ops = ent->port_ops;
4821
4822 /* register each port bound to this device */
4823 for (i = 0; i < ent->n_ports; i++) {
4824 struct ata_port *ap;
4825 unsigned long xfer_mode_mask;
4826
4827 ap = ata_host_add(ent, host_set, i);
4828 if (!ap)
4829 goto err_out;
4830
4831 host_set->ports[i] = ap;
4832 xfer_mode_mask =(ap->udma_mask << ATA_SHIFT_UDMA) |
4833 (ap->mwdma_mask << ATA_SHIFT_MWDMA) |
4834 (ap->pio_mask << ATA_SHIFT_PIO);
4835
4836 /* print per-port info to dmesg */
4837 printk(KERN_INFO "ata%u: %cATA max %s cmd 0x%lX ctl 0x%lX "
4838 "bmdma 0x%lX irq %lu\n",
4839 ap->id,
4840 ap->flags & ATA_FLAG_SATA ? 'S' : 'P',
4841 ata_mode_string(xfer_mode_mask),
4842 ap->ioaddr.cmd_addr,
4843 ap->ioaddr.ctl_addr,
4844 ap->ioaddr.bmdma_addr,
4845 ent->irq);
4846
4847 ata_chk_status(ap);
4848 host_set->ops->irq_clear(ap);
4849 count++;
4850 }
4851
57f3bda8
RD		 4852 if (!count)
4853 goto err_free_ret;
1da177e4
LT		 4854
4855 /* obtain irq, that is shared between channels */
4856 if (request_irq(ent->irq, ent->port_ops->irq_handler, ent->irq_flags,
4857 DRV_NAME, host_set))
4858 goto err_out;
4859
4860 /* perform each probe synchronously */
4861 DPRINTK("probe begin\n");
4862 for (i = 0; i < count; i++) {
4863 struct ata_port *ap;
4864 int rc;
4865
4866 ap = host_set->ports[i];
4867
c893a3ae 4868 DPRINTK("ata%u: bus probe begin\n", ap->id);
1da177e4 4869 rc = ata_bus_probe(ap);
c893a3ae 4870 DPRINTK("ata%u: bus probe end\n", ap->id);
1da177e4
LT		 4871
4872 if (rc) {
4873 /* FIXME: do something useful here?
4874 * Current libata behavior will
4875 * tear down everything when
4876 * the module is removed
4877 * or the h/w is unplugged.
4878 */
4879 }
4880
4881 rc = scsi_add_host(ap->host, dev);
4882 if (rc) {
4883 printk(KERN_ERR "ata%u: scsi_add_host failed\n",
4884 ap->id);
4885 /* FIXME: do something useful here */
4886 /* FIXME: handle unconditional calls to
4887 * scsi_scan_host and ata_host_remove, below,
4888 * at the very least
4889 */
4890 }
4891 }
4892
4893 /* probes are done, now scan each port's disk(s) */
c893a3ae 4894 DPRINTK("host probe begin\n");
1da177e4
LT		 4895 for (i = 0; i < count; i++) {
4896 struct ata_port *ap = host_set->ports[i];
4897
644dd0cc 4898 ata_scsi_scan_host(ap);
1da177e4
LT		 4899 }
4900
4901 dev_set_drvdata(dev, host_set);
4902
4903 VPRINTK("EXIT, returning %u\n", ent->n_ports);
4904 return ent->n_ports; /* success */
4905
4906err_out:
4907 for (i = 0; i < count; i++) {
4908 ata_host_remove(host_set->ports[i], 1);
4909 scsi_host_put(host_set->ports[i]->host);
4910 }
57f3bda8 4911err_free_ret:
1da177e4
LT		 4912 kfree(host_set);
4913 VPRINTK("EXIT, returning 0\n");
4914 return 0;
4915}
4916
17b14451
AC		 4917/**
4918 * ata_host_set_remove - PCI layer callback for device removal
4919 * @host_set: ATA host set that was removed
4920 *
2e9edbf8 4921 * Unregister all objects associated with this host set. Free those
17b14451
AC		 4922 * objects.
4923 *
4924 * LOCKING:
4925 * Inherited from calling layer (may sleep).
4926 */
4927
17b14451
AC		 4928void ata_host_set_remove(struct ata_host_set *host_set)
4929{
4930 struct ata_port *ap;
4931 unsigned int i;
4932
4933 for (i = 0; i < host_set->n_ports; i++) {
4934 ap = host_set->ports[i];
4935 scsi_remove_host(ap->host);
4936 }
4937
4938 free_irq(host_set->irq, host_set);
4939
4940 for (i = 0; i < host_set->n_ports; i++) {
4941 ap = host_set->ports[i];
4942
4943 ata_scsi_release(ap->host);
4944
4945 if ((ap->flags & ATA_FLAG_NO_LEGACY) == 0) {
4946 struct ata_ioports *ioaddr = &ap->ioaddr;
4947
4948 if (ioaddr->cmd_addr == 0x1f0)
4949 release_region(0x1f0, 8);
4950 else if (ioaddr->cmd_addr == 0x170)
4951 release_region(0x170, 8);
4952 }
4953
4954 scsi_host_put(ap->host);
4955 }
4956
4957 if (host_set->ops->host_stop)
4958 host_set->ops->host_stop(host_set);
4959
4960 kfree(host_set);
4961}
4962
1da177e4
LT		 4963/**
4964 * ata_scsi_release - SCSI layer callback hook for host unload
4965 * @host: libata host to be unloaded
4966 *
4967 * Performs all duties necessary to shut down a libata port...
4968 * Kill port kthread, disable port, and release resources.
4969 *
4970 * LOCKING:
4971 * Inherited from SCSI layer.
4972 *
4973 * RETURNS:
4974 * One.
4975 */
4976
4977int ata_scsi_release(struct Scsi_Host *host)
4978{
4979 struct ata_port *ap = (struct ata_port *) &host->hostdata[0];
d9572b1d 4980 int i;
1da177e4
LT		 4981
4982 DPRINTK("ENTER\n");
4983
4984 ap->ops->port_disable(ap);
4985 ata_host_remove(ap, 0);
d9572b1d
TH		 4986 for (i = 0; i < ATA_MAX_DEVICES; i++)
4987 kfree(ap->device[i].id);
1da177e4
LT		 4988
4989 DPRINTK("EXIT\n");
4990 return 1;
4991}
4992
4993/**
4994 * ata_std_ports - initialize ioaddr with standard port offsets.
4995 * @ioaddr: IO address structure to be initialized
0baab86b
EF		 4996 *
4997 * Utility function which initializes data_addr, error_addr,
4998 * feature_addr, nsect_addr, lbal_addr, lbam_addr, lbah_addr,
4999 * device_addr, status_addr, and command_addr to standard offsets
5000 * relative to cmd_addr.
5001 *
5002 * Does not set ctl_addr, altstatus_addr, bmdma_addr, or scr_addr.
1da177e4 5003 */
0baab86b 5004
1da177e4
LT		 5005void ata_std_ports(struct ata_ioports *ioaddr)
5006{
5007 ioaddr->data_addr = ioaddr->cmd_addr + ATA_REG_DATA;
5008 ioaddr->error_addr = ioaddr->cmd_addr + ATA_REG_ERR;
5009 ioaddr->feature_addr = ioaddr->cmd_addr + ATA_REG_FEATURE;
5010 ioaddr->nsect_addr = ioaddr->cmd_addr + ATA_REG_NSECT;
5011 ioaddr->lbal_addr = ioaddr->cmd_addr + ATA_REG_LBAL;
5012 ioaddr->lbam_addr = ioaddr->cmd_addr + ATA_REG_LBAM;
5013 ioaddr->lbah_addr = ioaddr->cmd_addr + ATA_REG_LBAH;
5014 ioaddr->device_addr = ioaddr->cmd_addr + ATA_REG_DEVICE;
5015 ioaddr->status_addr = ioaddr->cmd_addr + ATA_REG_STATUS;
5016 ioaddr->command_addr = ioaddr->cmd_addr + ATA_REG_CMD;
5017}
5018
0baab86b 5019
374b1873
JG		 5020#ifdef CONFIG_PCI
5021
5022void ata_pci_host_stop (struct ata_host_set *host_set)
5023{
5024 struct pci_dev *pdev = to_pci_dev(host_set->dev);
5025
5026 pci_iounmap(pdev, host_set->mmio_base);
5027}
5028
1da177e4
LT		 5029/**
5030 * ata_pci_remove_one - PCI layer callback for device removal
5031 * @pdev: PCI device that was removed
5032 *
5033 * PCI layer indicates to libata via this hook that
6f0ef4fa 5034 * hot-unplug or module unload event has occurred.
1da177e4
LT		 5035 * Handle this by unregistering all objects associated
5036 * with this PCI device. Free those objects. Then finally
5037 * release PCI resources and disable device.
5038 *
5039 * LOCKING:
5040 * Inherited from PCI layer (may sleep).
5041 */
5042
5043void ata_pci_remove_one (struct pci_dev *pdev)
5044{
5045 struct device *dev = pci_dev_to_dev(pdev);
5046 struct ata_host_set *host_set = dev_get_drvdata(dev);
1da177e4 5047
17b14451 5048 ata_host_set_remove(host_set);
1da177e4
LT		 5049 pci_release_regions(pdev);
5050 pci_disable_device(pdev);
5051 dev_set_drvdata(dev, NULL);
5052}
5053
5054/* move to PCI subsystem */
057ace5e 5055int pci_test_config_bits(struct pci_dev *pdev, const struct pci_bits *bits)
1da177e4
LT		 5056{
5057 unsigned long tmp = 0;
5058
5059 switch (bits->width) {
5060 case 1: {
5061 u8 tmp8 = 0;
5062 pci_read_config_byte(pdev, bits->reg, &tmp8);
5063 tmp = tmp8;
5064 break;
5065 }
5066 case 2: {
5067 u16 tmp16 = 0;
5068 pci_read_config_word(pdev, bits->reg, &tmp16);
5069 tmp = tmp16;
5070 break;
5071 }
5072 case 4: {
5073 u32 tmp32 = 0;
5074 pci_read_config_dword(pdev, bits->reg, &tmp32);
5075 tmp = tmp32;
5076 break;
5077 }
5078
5079 default:
5080 return -EINVAL;
5081 }
5082
5083 tmp &= bits->mask;
5084
5085 return (tmp == bits->val) ? 1 : 0;
5086}
9b847548
JA		 5087
5088int ata_pci_device_suspend(struct pci_dev *pdev, pm_message_t state)
5089{
5090 pci_save_state(pdev);
5091 pci_disable_device(pdev);
5092 pci_set_power_state(pdev, PCI_D3hot);
5093 return 0;
5094}
5095
5096int ata_pci_device_resume(struct pci_dev *pdev)
5097{
5098 pci_set_power_state(pdev, PCI_D0);
5099 pci_restore_state(pdev);
5100 pci_enable_device(pdev);
5101 pci_set_master(pdev);
5102 return 0;
5103}
1da177e4
LT		 5104#endif /* CONFIG_PCI */
5105
5106
1da177e4
LT		 5107static int __init ata_init(void)
5108{
5109 ata_wq = create_workqueue("ata");
5110 if (!ata_wq)
5111 return -ENOMEM;
5112
5113 printk(KERN_DEBUG "libata version " DRV_VERSION " loaded.\n");
5114 return 0;
5115}
5116
5117static void __exit ata_exit(void)
5118{
5119 destroy_workqueue(ata_wq);
5120}
5121
5122module_init(ata_init);
5123module_exit(ata_exit);
5124
67846b30
JG		 5125static unsigned long ratelimit_time;
5126static spinlock_t ata_ratelimit_lock = SPIN_LOCK_UNLOCKED;
5127
5128int ata_ratelimit(void)
5129{
5130 int rc;
5131 unsigned long flags;
5132
5133 spin_lock_irqsave(&ata_ratelimit_lock, flags);
5134
5135 if (time_after(jiffies, ratelimit_time)) {
5136 rc = 1;
5137 ratelimit_time = jiffies + (HZ/5);
5138 } else
5139 rc = 0;
5140
5141 spin_unlock_irqrestore(&ata_ratelimit_lock, flags);
5142
5143 return rc;
5144}
5145
1da177e4
LT		 5146/*
5147 * libata is essentially a library of internal helper functions for
5148 * low-level ATA host controller drivers. As such, the API/ABI is
5149 * likely to change as new drivers are added and updated.
5150 * Do not depend on ABI/API stability.
5151 */
5152
5153EXPORT_SYMBOL_GPL(ata_std_bios_param);
5154EXPORT_SYMBOL_GPL(ata_std_ports);
5155EXPORT_SYMBOL_GPL(ata_device_add);
17b14451 5156EXPORT_SYMBOL_GPL(ata_host_set_remove);
1da177e4
LT		 5157EXPORT_SYMBOL_GPL(ata_sg_init);
5158EXPORT_SYMBOL_GPL(ata_sg_init_one);
76014427 5159EXPORT_SYMBOL_GPL(__ata_qc_complete);
1da177e4
LT		 5160EXPORT_SYMBOL_GPL(ata_qc_issue_prot);
5161EXPORT_SYMBOL_GPL(ata_eng_timeout);
5162EXPORT_SYMBOL_GPL(ata_tf_load);
5163EXPORT_SYMBOL_GPL(ata_tf_read);
5164EXPORT_SYMBOL_GPL(ata_noop_dev_select);
5165EXPORT_SYMBOL_GPL(ata_std_dev_select);
5166EXPORT_SYMBOL_GPL(ata_tf_to_fis);
5167EXPORT_SYMBOL_GPL(ata_tf_from_fis);
5168EXPORT_SYMBOL_GPL(ata_check_status);
5169EXPORT_SYMBOL_GPL(ata_altstatus);
1da177e4
LT		 5170EXPORT_SYMBOL_GPL(ata_exec_command);
5171EXPORT_SYMBOL_GPL(ata_port_start);
5172EXPORT_SYMBOL_GPL(ata_port_stop);
aa8f0dc6 5173EXPORT_SYMBOL_GPL(ata_host_stop);
1da177e4
LT		 5174EXPORT_SYMBOL_GPL(ata_interrupt);
5175EXPORT_SYMBOL_GPL(ata_qc_prep);
e46834cd 5176EXPORT_SYMBOL_GPL(ata_noop_qc_prep);
1da177e4
LT		 5177EXPORT_SYMBOL_GPL(ata_bmdma_setup);
5178EXPORT_SYMBOL_GPL(ata_bmdma_start);
5179EXPORT_SYMBOL_GPL(ata_bmdma_irq_clear);
5180EXPORT_SYMBOL_GPL(ata_bmdma_status);
5181EXPORT_SYMBOL_GPL(ata_bmdma_stop);
5182EXPORT_SYMBOL_GPL(ata_port_probe);
5183EXPORT_SYMBOL_GPL(sata_phy_reset);
5184EXPORT_SYMBOL_GPL(__sata_phy_reset);
5185EXPORT_SYMBOL_GPL(ata_bus_reset);
8a19ac89 5186EXPORT_SYMBOL_GPL(ata_std_probeinit);
c2bd5804
TH		 5187EXPORT_SYMBOL_GPL(ata_std_softreset);
5188EXPORT_SYMBOL_GPL(sata_std_hardreset);
5189EXPORT_SYMBOL_GPL(ata_std_postreset);
5190EXPORT_SYMBOL_GPL(ata_std_probe_reset);
a62c0fc5 5191EXPORT_SYMBOL_GPL(ata_drive_probe_reset);
623a3128 5192EXPORT_SYMBOL_GPL(ata_dev_revalidate);
2e9edbf8
JG		 5193EXPORT_SYMBOL_GPL(ata_dev_classify);
5194EXPORT_SYMBOL_GPL(ata_dev_pair);
1da177e4 5195EXPORT_SYMBOL_GPL(ata_port_disable);
67846b30 5196EXPORT_SYMBOL_GPL(ata_ratelimit);
6f8b9958 5197EXPORT_SYMBOL_GPL(ata_busy_sleep);
86e45b6b 5198EXPORT_SYMBOL_GPL(ata_port_queue_task);
1da177e4
LT		 5199EXPORT_SYMBOL_GPL(ata_scsi_ioctl);
5200EXPORT_SYMBOL_GPL(ata_scsi_queuecmd);
5201EXPORT_SYMBOL_GPL(ata_scsi_error);
5202EXPORT_SYMBOL_GPL(ata_scsi_slave_config);
5203EXPORT_SYMBOL_GPL(ata_scsi_release);
5204EXPORT_SYMBOL_GPL(ata_host_intr);
6a62a04d
TH		 5205EXPORT_SYMBOL_GPL(ata_id_string);
5206EXPORT_SYMBOL_GPL(ata_id_c_string);
1da177e4 5207EXPORT_SYMBOL_GPL(ata_scsi_simulate);
a72ec4ce
TH		 5208EXPORT_SYMBOL_GPL(ata_eh_qc_complete);
5209EXPORT_SYMBOL_GPL(ata_eh_qc_retry);
1da177e4 5210
1bc4ccff 5211EXPORT_SYMBOL_GPL(ata_pio_need_iordy);
452503f9
AC		 5212EXPORT_SYMBOL_GPL(ata_timing_compute);
5213EXPORT_SYMBOL_GPL(ata_timing_merge);
5214
1da177e4
LT		 5215#ifdef CONFIG_PCI
5216EXPORT_SYMBOL_GPL(pci_test_config_bits);
374b1873 5217EXPORT_SYMBOL_GPL(ata_pci_host_stop);
1da177e4
LT		 5218EXPORT_SYMBOL_GPL(ata_pci_init_native_mode);
5219EXPORT_SYMBOL_GPL(ata_pci_init_one);
5220EXPORT_SYMBOL_GPL(ata_pci_remove_one);
9b847548
JA		 5221EXPORT_SYMBOL_GPL(ata_pci_device_suspend);
5222EXPORT_SYMBOL_GPL(ata_pci_device_resume);
67951ade
AC		 5223EXPORT_SYMBOL_GPL(ata_pci_default_filter);
5224EXPORT_SYMBOL_GPL(ata_pci_clear_simplex);
1da177e4 5225#endif /* CONFIG_PCI */
9b847548
JA		 5226
5227EXPORT_SYMBOL_GPL(ata_device_suspend);
5228EXPORT_SYMBOL_GPL(ata_device_resume);
5229EXPORT_SYMBOL_GPL(ata_scsi_device_suspend);
5230EXPORT_SYMBOL_GPL(ata_scsi_device_resume);
Linux 6.x block layer and io_uring tree(s)