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[PATCH] libata: implement ata_dev_revalidate()
[linux-2.6-block.git] / drivers / scsi / libata-core.c
CommitLineData
1da177e4 1/*
af36d7f0
JG		 2 * libata-core.c - helper library for ATA
3 *
4 * Maintained by: Jeff Garzik <jgarzik@pobox.com>
5 * Please ALWAYS copy linux-ide@vger.kernel.org
6 * on emails.
7 *
8 * Copyright 2003-2004 Red Hat, Inc. All rights reserved.
9 * Copyright 2003-2004 Jeff Garzik
10 *
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2, or (at your option)
15 * any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; see the file COPYING. If not, write to
24 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
25 *
26 *
27 * libata documentation is available via 'make {ps|pdf}docs',
28 * as Documentation/DocBook/libata.*
29 *
30 * Hardware documentation available from http://www.t13.org/ and
31 * http://www.sata-io.org/
32 *
1da177e4
LT		 33 */
34
35#include <linux/config.h>
36#include <linux/kernel.h>
37#include <linux/module.h>
38#include <linux/pci.h>
39#include <linux/init.h>
40#include <linux/list.h>
41#include <linux/mm.h>
42#include <linux/highmem.h>
43#include <linux/spinlock.h>
44#include <linux/blkdev.h>
45#include <linux/delay.h>
46#include <linux/timer.h>
47#include <linux/interrupt.h>
48#include <linux/completion.h>
49#include <linux/suspend.h>
50#include <linux/workqueue.h>
67846b30 51#include <linux/jiffies.h>
378f058c 52#include <linux/scatterlist.h>
1da177e4 53#include <scsi/scsi.h>
1da177e4 54#include "scsi_priv.h"
193515d5 55#include <scsi/scsi_cmnd.h>
1da177e4
LT		 56#include <scsi/scsi_host.h>
57#include <linux/libata.h>
58#include <asm/io.h>
59#include <asm/semaphore.h>
60#include <asm/byteorder.h>
61
62#include "libata.h"
63
6aff8f1f
TH		 64static unsigned int ata_dev_init_params(struct ata_port *ap,
65 struct ata_device *dev);
1da177e4
LT		 66static void ata_set_mode(struct ata_port *ap);
67static void ata_dev_set_xfermode(struct ata_port *ap, struct ata_device *dev);
057ace5e 68static unsigned int ata_get_mode_mask(const struct ata_port *ap, int shift);
1da177e4 69static int fgb(u32 bitmap);
057ace5e 70static int ata_choose_xfer_mode(const struct ata_port *ap,
1da177e4
LT		 71 u8 *xfer_mode_out,
72 unsigned int *xfer_shift_out);
1da177e4
LT		 73
74static unsigned int ata_unique_id = 1;
75static struct workqueue_struct *ata_wq;
76
1623c81e
JG		 77int atapi_enabled = 0;
78module_param(atapi_enabled, int, 0444);
79MODULE_PARM_DESC(atapi_enabled, "Enable discovery of ATAPI devices (0=off, 1=on)");
80
c3c013a2
JG		 81int libata_fua = 0;
82module_param_named(fua, libata_fua, int, 0444);
83MODULE_PARM_DESC(fua, "FUA support (0=off, 1=on)");
84
1da177e4
LT		 85MODULE_AUTHOR("Jeff Garzik");
86MODULE_DESCRIPTION("Library module for ATA devices");
87MODULE_LICENSE("GPL");
88MODULE_VERSION(DRV_VERSION);
89
0baab86b 90
1da177e4
LT		 91/**
92 * ata_tf_to_fis - Convert ATA taskfile to SATA FIS structure
93 * @tf: Taskfile to convert
94 * @fis: Buffer into which data will output
95 * @pmp: Port multiplier port
96 *
97 * Converts a standard ATA taskfile to a Serial ATA
98 * FIS structure (Register - Host to Device).
99 *
100 * LOCKING:
101 * Inherited from caller.
102 */
103
057ace5e 104void ata_tf_to_fis(const struct ata_taskfile *tf, u8 *fis, u8 pmp)
1da177e4
LT		 105{
106 fis[0] = 0x27; /* Register - Host to Device FIS */
107 fis[1] = (pmp & 0xf) | (1 << 7); /* Port multiplier number,
108 bit 7 indicates Command FIS */
109 fis[2] = tf->command;
110 fis[3] = tf->feature;
111
112 fis[4] = tf->lbal;
113 fis[5] = tf->lbam;
114 fis[6] = tf->lbah;
115 fis[7] = tf->device;
116
117 fis[8] = tf->hob_lbal;
118 fis[9] = tf->hob_lbam;
119 fis[10] = tf->hob_lbah;
120 fis[11] = tf->hob_feature;
121
122 fis[12] = tf->nsect;
123 fis[13] = tf->hob_nsect;
124 fis[14] = 0;
125 fis[15] = tf->ctl;
126
127 fis[16] = 0;
128 fis[17] = 0;
129 fis[18] = 0;
130 fis[19] = 0;
131}
132
133/**
134 * ata_tf_from_fis - Convert SATA FIS to ATA taskfile
135 * @fis: Buffer from which data will be input
136 * @tf: Taskfile to output
137 *
e12a1be6 138 * Converts a serial ATA FIS structure to a standard ATA taskfile.
1da177e4
LT		 139 *
140 * LOCKING:
141 * Inherited from caller.
142 */
143
057ace5e 144void ata_tf_from_fis(const u8 *fis, struct ata_taskfile *tf)
1da177e4
LT		 145{
146 tf->command = fis[2]; /* status */
147 tf->feature = fis[3]; /* error */
148
149 tf->lbal = fis[4];
150 tf->lbam = fis[5];
151 tf->lbah = fis[6];
152 tf->device = fis[7];
153
154 tf->hob_lbal = fis[8];
155 tf->hob_lbam = fis[9];
156 tf->hob_lbah = fis[10];
157
158 tf->nsect = fis[12];
159 tf->hob_nsect = fis[13];
160}
161
8cbd6df1
AL		 162static const u8 ata_rw_cmds[] = {
163 /* pio multi */
164 ATA_CMD_READ_MULTI,
165 ATA_CMD_WRITE_MULTI,
166 ATA_CMD_READ_MULTI_EXT,
167 ATA_CMD_WRITE_MULTI_EXT,
9a3dccc4
TH		 168 0,
169 0,
170 0,
171 ATA_CMD_WRITE_MULTI_FUA_EXT,
8cbd6df1
AL		 172 /* pio */
173 ATA_CMD_PIO_READ,
174 ATA_CMD_PIO_WRITE,
175 ATA_CMD_PIO_READ_EXT,
176 ATA_CMD_PIO_WRITE_EXT,
9a3dccc4
TH		 177 0,
178 0,
179 0,
180 0,
8cbd6df1
AL		 181 /* dma */
182 ATA_CMD_READ,
183 ATA_CMD_WRITE,
184 ATA_CMD_READ_EXT,
9a3dccc4
TH		 185 ATA_CMD_WRITE_EXT,
186 0,
187 0,
188 0,
189 ATA_CMD_WRITE_FUA_EXT
8cbd6df1 190};
1da177e4
LT		 191
192/**
8cbd6df1
AL		 193 * ata_rwcmd_protocol - set taskfile r/w commands and protocol
194 * @qc: command to examine and configure
1da177e4 195 *
8cbd6df1
AL		 196 * Examine the device configuration and tf->flags to calculate
197 * the proper read/write commands and protocol to use.
1da177e4
LT		 198 *
199 * LOCKING:
200 * caller.
201 */
9a3dccc4 202int ata_rwcmd_protocol(struct ata_queued_cmd *qc)
1da177e4 203{
8cbd6df1
AL		 204 struct ata_taskfile *tf = &qc->tf;
205 struct ata_device *dev = qc->dev;
9a3dccc4 206 u8 cmd;
1da177e4 207
9a3dccc4 208 int index, fua, lba48, write;
8cbd6df1 209
9a3dccc4 210 fua = (tf->flags & ATA_TFLAG_FUA) ? 4 : 0;
8cbd6df1
AL		 211 lba48 = (tf->flags & ATA_TFLAG_LBA48) ? 2 : 0;
212 write = (tf->flags & ATA_TFLAG_WRITE) ? 1 : 0;
1da177e4 213
8cbd6df1
AL		 214 if (dev->flags & ATA_DFLAG_PIO) {
215 tf->protocol = ATA_PROT_PIO;
9a3dccc4 216 index = dev->multi_count ? 0 : 8;
8d238e01
AC		 217 } else if (lba48 && (qc->ap->flags & ATA_FLAG_PIO_LBA48)) {
218 /* Unable to use DMA due to host limitation */
219 tf->protocol = ATA_PROT_PIO;
0565c26d 220 index = dev->multi_count ? 0 : 8;
8cbd6df1
AL		 221 } else {
222 tf->protocol = ATA_PROT_DMA;
9a3dccc4 223 index = 16;
8cbd6df1 224 }
1da177e4 225
9a3dccc4
TH		 226 cmd = ata_rw_cmds[index + fua + lba48 + write];
227 if (cmd) {
228 tf->command = cmd;
229 return 0;
230 }
231 return -1;
1da177e4
LT		 232}
233
98ac62de 234static const char * const xfer_mode_str[] = {
1da177e4
LT		 235 "UDMA/16",
236 "UDMA/25",
237 "UDMA/33",
238 "UDMA/44",
239 "UDMA/66",
240 "UDMA/100",
241 "UDMA/133",
242 "UDMA7",
243 "MWDMA0",
244 "MWDMA1",
245 "MWDMA2",
246 "PIO0",
247 "PIO1",
248 "PIO2",
249 "PIO3",
250 "PIO4",
251};
252
253/**
254 * ata_udma_string - convert UDMA bit offset to string
255 * @mask: mask of bits supported; only highest bit counts.
256 *
257 * Determine string which represents the highest speed
258 * (highest bit in @udma_mask).
259 *
260 * LOCKING:
261 * None.
262 *
263 * RETURNS:
264 * Constant C string representing highest speed listed in
265 * @udma_mask, or the constant C string "<n/a>".
266 */
267
268static const char *ata_mode_string(unsigned int mask)
269{
270 int i;
271
272 for (i = 7; i >= 0; i--)
273 if (mask & (1 << i))
274 goto out;
275 for (i = ATA_SHIFT_MWDMA + 2; i >= ATA_SHIFT_MWDMA; i--)
276 if (mask & (1 << i))
277 goto out;
278 for (i = ATA_SHIFT_PIO + 4; i >= ATA_SHIFT_PIO; i--)
279 if (mask & (1 << i))
280 goto out;
281
282 return "<n/a>";
283
284out:
285 return xfer_mode_str[i];
286}
287
288/**
289 * ata_pio_devchk - PATA device presence detection
290 * @ap: ATA channel to examine
291 * @device: Device to examine (starting at zero)
292 *
293 * This technique was originally described in
294 * Hale Landis's ATADRVR (www.ata-atapi.com), and
295 * later found its way into the ATA/ATAPI spec.
296 *
297 * Write a pattern to the ATA shadow registers,
298 * and if a device is present, it will respond by
299 * correctly storing and echoing back the
300 * ATA shadow register contents.
301 *
302 * LOCKING:
303 * caller.
304 */
305
306static unsigned int ata_pio_devchk(struct ata_port *ap,
307 unsigned int device)
308{
309 struct ata_ioports *ioaddr = &ap->ioaddr;
310 u8 nsect, lbal;
311
312 ap->ops->dev_select(ap, device);
313
314 outb(0x55, ioaddr->nsect_addr);
315 outb(0xaa, ioaddr->lbal_addr);
316
317 outb(0xaa, ioaddr->nsect_addr);
318 outb(0x55, ioaddr->lbal_addr);
319
320 outb(0x55, ioaddr->nsect_addr);
321 outb(0xaa, ioaddr->lbal_addr);
322
323 nsect = inb(ioaddr->nsect_addr);
324 lbal = inb(ioaddr->lbal_addr);
325
326 if ((nsect == 0x55) && (lbal == 0xaa))
327 return 1; /* we found a device */
328
329 return 0; /* nothing found */
330}
331
332/**
333 * ata_mmio_devchk - PATA device presence detection
334 * @ap: ATA channel to examine
335 * @device: Device to examine (starting at zero)
336 *
337 * This technique was originally described in
338 * Hale Landis's ATADRVR (www.ata-atapi.com), and
339 * later found its way into the ATA/ATAPI spec.
340 *
341 * Write a pattern to the ATA shadow registers,
342 * and if a device is present, it will respond by
343 * correctly storing and echoing back the
344 * ATA shadow register contents.
345 *
346 * LOCKING:
347 * caller.
348 */
349
350static unsigned int ata_mmio_devchk(struct ata_port *ap,
351 unsigned int device)
352{
353 struct ata_ioports *ioaddr = &ap->ioaddr;
354 u8 nsect, lbal;
355
356 ap->ops->dev_select(ap, device);
357
358 writeb(0x55, (void __iomem *) ioaddr->nsect_addr);
359 writeb(0xaa, (void __iomem *) ioaddr->lbal_addr);
360
361 writeb(0xaa, (void __iomem *) ioaddr->nsect_addr);
362 writeb(0x55, (void __iomem *) ioaddr->lbal_addr);
363
364 writeb(0x55, (void __iomem *) ioaddr->nsect_addr);
365 writeb(0xaa, (void __iomem *) ioaddr->lbal_addr);
366
367 nsect = readb((void __iomem *) ioaddr->nsect_addr);
368 lbal = readb((void __iomem *) ioaddr->lbal_addr);
369
370 if ((nsect == 0x55) && (lbal == 0xaa))
371 return 1; /* we found a device */
372
373 return 0; /* nothing found */
374}
375
376/**
377 * ata_devchk - PATA device presence detection
378 * @ap: ATA channel to examine
379 * @device: Device to examine (starting at zero)
380 *
381 * Dispatch ATA device presence detection, depending
382 * on whether we are using PIO or MMIO to talk to the
383 * ATA shadow registers.
384 *
385 * LOCKING:
386 * caller.
387 */
388
389static unsigned int ata_devchk(struct ata_port *ap,
390 unsigned int device)
391{
392 if (ap->flags & ATA_FLAG_MMIO)
393 return ata_mmio_devchk(ap, device);
394 return ata_pio_devchk(ap, device);
395}
396
397/**
398 * ata_dev_classify - determine device type based on ATA-spec signature
399 * @tf: ATA taskfile register set for device to be identified
400 *
401 * Determine from taskfile register contents whether a device is
402 * ATA or ATAPI, as per "Signature and persistence" section
403 * of ATA/PI spec (volume 1, sect 5.14).
404 *
405 * LOCKING:
406 * None.
407 *
408 * RETURNS:
409 * Device type, %ATA_DEV_ATA, %ATA_DEV_ATAPI, or %ATA_DEV_UNKNOWN
410 * the event of failure.
411 */
412
057ace5e 413unsigned int ata_dev_classify(const struct ata_taskfile *tf)
1da177e4
LT		 414{
415 /* Apple's open source Darwin code hints that some devices only
416 * put a proper signature into the LBA mid/high registers,
417 * So, we only check those. It's sufficient for uniqueness.
418 */
419
420 if (((tf->lbam == 0) && (tf->lbah == 0)) ||
421 ((tf->lbam == 0x3c) && (tf->lbah == 0xc3))) {
422 DPRINTK("found ATA device by sig\n");
423 return ATA_DEV_ATA;
424 }
425
426 if (((tf->lbam == 0x14) && (tf->lbah == 0xeb)) ||
427 ((tf->lbam == 0x69) && (tf->lbah == 0x96))) {
428 DPRINTK("found ATAPI device by sig\n");
429 return ATA_DEV_ATAPI;
430 }
431
432 DPRINTK("unknown device\n");
433 return ATA_DEV_UNKNOWN;
434}
435
436/**
437 * ata_dev_try_classify - Parse returned ATA device signature
438 * @ap: ATA channel to examine
439 * @device: Device to examine (starting at zero)
b4dc7623 440 * @r_err: Value of error register on completion
1da177e4
LT		 441 *
442 * After an event -- SRST, E.D.D., or SATA COMRESET -- occurs,
443 * an ATA/ATAPI-defined set of values is placed in the ATA
444 * shadow registers, indicating the results of device detection
445 * and diagnostics.
446 *
447 * Select the ATA device, and read the values from the ATA shadow
448 * registers. Then parse according to the Error register value,
449 * and the spec-defined values examined by ata_dev_classify().
450 *
451 * LOCKING:
452 * caller.
b4dc7623
TH		 453 *
454 * RETURNS:
455 * Device type - %ATA_DEV_ATA, %ATA_DEV_ATAPI or %ATA_DEV_NONE.
1da177e4
LT		 456 */
457
b4dc7623
TH		 458static unsigned int
459ata_dev_try_classify(struct ata_port *ap, unsigned int device, u8 *r_err)
1da177e4 460{
1da177e4
LT		 461 struct ata_taskfile tf;
462 unsigned int class;
463 u8 err;
464
465 ap->ops->dev_select(ap, device);
466
467 memset(&tf, 0, sizeof(tf));
468
1da177e4 469 ap->ops->tf_read(ap, &tf);
0169e284 470 err = tf.feature;
b4dc7623
TH		 471 if (r_err)
472 *r_err = err;
1da177e4
LT		 473
474 /* see if device passed diags */
475 if (err == 1)
476 /* do nothing */ ;
477 else if ((device == 0) && (err == 0x81))
478 /* do nothing */ ;
479 else
b4dc7623 480 return ATA_DEV_NONE;
1da177e4 481
b4dc7623 482 /* determine if device is ATA or ATAPI */
1da177e4 483 class = ata_dev_classify(&tf);
b4dc7623 484
1da177e4 485 if (class == ATA_DEV_UNKNOWN)
b4dc7623 486 return ATA_DEV_NONE;
1da177e4 487 if ((class == ATA_DEV_ATA) && (ata_chk_status(ap) == 0))
b4dc7623
TH		 488 return ATA_DEV_NONE;
489 return class;
1da177e4
LT		 490}
491
492/**
6a62a04d 493 * ata_id_string - Convert IDENTIFY DEVICE page into string
1da177e4
LT		 494 * @id: IDENTIFY DEVICE results we will examine
495 * @s: string into which data is output
496 * @ofs: offset into identify device page
497 * @len: length of string to return. must be an even number.
498 *
499 * The strings in the IDENTIFY DEVICE page are broken up into
500 * 16-bit chunks. Run through the string, and output each
501 * 8-bit chunk linearly, regardless of platform.
502 *
503 * LOCKING:
504 * caller.
505 */
506
6a62a04d
TH		 507void ata_id_string(const u16 *id, unsigned char *s,
508 unsigned int ofs, unsigned int len)
1da177e4
LT		 509{
510 unsigned int c;
511
512 while (len > 0) {
513 c = id[ofs] >> 8;
514 *s = c;
515 s++;
516
517 c = id[ofs] & 0xff;
518 *s = c;
519 s++;
520
521 ofs++;
522 len -= 2;
523 }
524}
525
0e949ff3 526/**
6a62a04d 527 * ata_id_c_string - Convert IDENTIFY DEVICE page into C string
0e949ff3
TH		 528 * @id: IDENTIFY DEVICE results we will examine
529 * @s: string into which data is output
530 * @ofs: offset into identify device page
531 * @len: length of string to return. must be an odd number.
532 *
6a62a04d 533 * This function is identical to ata_id_string except that it
0e949ff3
TH		 534 * trims trailing spaces and terminates the resulting string with
535 * null. @len must be actual maximum length (even number) + 1.
536 *
537 * LOCKING:
538 * caller.
539 */
6a62a04d
TH		 540void ata_id_c_string(const u16 *id, unsigned char *s,
541 unsigned int ofs, unsigned int len)
0e949ff3
TH		 542{
543 unsigned char *p;
544
545 WARN_ON(!(len & 1));
546
6a62a04d 547 ata_id_string(id, s, ofs, len - 1);
0e949ff3
TH		 548
549 p = s + strnlen(s, len - 1);
550 while (p > s && p[-1] == ' ')
551 p--;
552 *p = '\0';
553}
0baab86b 554
2940740b
TH		 555static u64 ata_id_n_sectors(const u16 *id)
556{
557 if (ata_id_has_lba(id)) {
558 if (ata_id_has_lba48(id))
559 return ata_id_u64(id, 100);
560 else
561 return ata_id_u32(id, 60);
562 } else {
563 if (ata_id_current_chs_valid(id))
564 return ata_id_u32(id, 57);
565 else
566 return id[1] * id[3] * id[6];
567 }
568}
569
0baab86b
EF		 570/**
571 * ata_noop_dev_select - Select device 0/1 on ATA bus
572 * @ap: ATA channel to manipulate
573 * @device: ATA device (numbered from zero) to select
574 *
575 * This function performs no actual function.
576 *
577 * May be used as the dev_select() entry in ata_port_operations.
578 *
579 * LOCKING:
580 * caller.
581 */
1da177e4
LT		 582void ata_noop_dev_select (struct ata_port *ap, unsigned int device)
583{
584}
585
0baab86b 586
1da177e4
LT		 587/**
588 * ata_std_dev_select - Select device 0/1 on ATA bus
589 * @ap: ATA channel to manipulate
590 * @device: ATA device (numbered from zero) to select
591 *
592 * Use the method defined in the ATA specification to
593 * make either device 0, or device 1, active on the
0baab86b
EF		 594 * ATA channel. Works with both PIO and MMIO.
595 *
596 * May be used as the dev_select() entry in ata_port_operations.
1da177e4
LT		 597 *
598 * LOCKING:
599 * caller.
600 */
601
602void ata_std_dev_select (struct ata_port *ap, unsigned int device)
603{
604 u8 tmp;
605
606 if (device == 0)
607 tmp = ATA_DEVICE_OBS;
608 else
609 tmp = ATA_DEVICE_OBS | ATA_DEV1;
610
611 if (ap->flags & ATA_FLAG_MMIO) {
612 writeb(tmp, (void __iomem *) ap->ioaddr.device_addr);
613 } else {
614 outb(tmp, ap->ioaddr.device_addr);
615 }
616 ata_pause(ap); /* needed; also flushes, for mmio */
617}
618
619/**
620 * ata_dev_select - Select device 0/1 on ATA bus
621 * @ap: ATA channel to manipulate
622 * @device: ATA device (numbered from zero) to select
623 * @wait: non-zero to wait for Status register BSY bit to clear
624 * @can_sleep: non-zero if context allows sleeping
625 *
626 * Use the method defined in the ATA specification to
627 * make either device 0, or device 1, active on the
628 * ATA channel.
629 *
630 * This is a high-level version of ata_std_dev_select(),
631 * which additionally provides the services of inserting
632 * the proper pauses and status polling, where needed.
633 *
634 * LOCKING:
635 * caller.
636 */
637
638void ata_dev_select(struct ata_port *ap, unsigned int device,
639 unsigned int wait, unsigned int can_sleep)
640{
641 VPRINTK("ENTER, ata%u: device %u, wait %u\n",
642 ap->id, device, wait);
643
644 if (wait)
645 ata_wait_idle(ap);
646
647 ap->ops->dev_select(ap, device);
648
649 if (wait) {
650 if (can_sleep && ap->device[device].class == ATA_DEV_ATAPI)
651 msleep(150);
652 ata_wait_idle(ap);
653 }
654}
655
656/**
657 * ata_dump_id - IDENTIFY DEVICE info debugging output
0bd3300a 658 * @id: IDENTIFY DEVICE page to dump
1da177e4 659 *
0bd3300a
TH		 660 * Dump selected 16-bit words from the given IDENTIFY DEVICE
661 * page.
1da177e4
LT		 662 *
663 * LOCKING:
664 * caller.
665 */
666
0bd3300a 667static inline void ata_dump_id(const u16 *id)
1da177e4
LT		 668{
669 DPRINTK("49==0x%04x "
670 "53==0x%04x "
671 "63==0x%04x "
672 "64==0x%04x "
673 "75==0x%04x \n",
0bd3300a
TH		 674 id[49],
675 id[53],
676 id[63],
677 id[64],
678 id[75]);
1da177e4
LT		 679 DPRINTK("80==0x%04x "
680 "81==0x%04x "
681 "82==0x%04x "
682 "83==0x%04x "
683 "84==0x%04x \n",
0bd3300a
TH		 684 id[80],
685 id[81],
686 id[82],
687 id[83],
688 id[84]);
1da177e4
LT		 689 DPRINTK("88==0x%04x "
690 "93==0x%04x\n",
0bd3300a
TH		 691 id[88],
692 id[93]);
1da177e4
LT		 693}
694
11e29e21
AC		 695/*
696 * Compute the PIO modes available for this device. This is not as
697 * trivial as it seems if we must consider early devices correctly.
698 *
699 * FIXME: pre IDE drive timing (do we care ?).
700 */
701
057ace5e 702static unsigned int ata_pio_modes(const struct ata_device *adev)
11e29e21
AC		 703{
704 u16 modes;
705
ffa29456
AC		 706 /* Usual case. Word 53 indicates word 64 is valid */
707 if (adev->id[ATA_ID_FIELD_VALID] & (1 << 1)) {
11e29e21
AC		 708 modes = adev->id[ATA_ID_PIO_MODES] & 0x03;
709 modes <<= 3;
710 modes |= 0x7;
711 return modes;
712 }
713
ffa29456
AC		 714 /* If word 64 isn't valid then Word 51 high byte holds the PIO timing
715 number for the maximum. Turn it into a mask and return it */
716 modes = (2 << ((adev->id[ATA_ID_OLD_PIO_MODES] >> 8) & 0xFF)) - 1 ;
11e29e21 717 return modes;
ffa29456
AC		 718 /* But wait.. there's more. Design your standards by committee and
719 you too can get a free iordy field to process. However its the
720 speeds not the modes that are supported... Note drivers using the
721 timing API will get this right anyway */
11e29e21
AC		 722}
723
95064379
TH		 724static inline void
725ata_queue_packet_task(struct ata_port *ap)
726{
c18d06f8
TH		 727 if (!(ap->flags & ATA_FLAG_FLUSH_PIO_TASK))
728 queue_work(ata_wq, &ap->packet_task);
95064379
TH		 729}
730
731static inline void
732ata_queue_pio_task(struct ata_port *ap)
733{
c18d06f8
TH		 734 if (!(ap->flags & ATA_FLAG_FLUSH_PIO_TASK))
735 queue_work(ata_wq, &ap->pio_task);
95064379
TH		 736}
737
738static inline void
739ata_queue_delayed_pio_task(struct ata_port *ap, unsigned long delay)
740{
c18d06f8
TH		 741 if (!(ap->flags & ATA_FLAG_FLUSH_PIO_TASK))
742 queue_delayed_work(ata_wq, &ap->pio_task, delay);
743}
744
745/**
746 * ata_flush_pio_tasks - Flush pio_task and packet_task
747 * @ap: the target ata_port
748 *
749 * After this function completes, pio_task and packet_task are
750 * guranteed not to be running or scheduled.
751 *
752 * LOCKING:
753 * Kernel thread context (may sleep)
754 */
755
756static void ata_flush_pio_tasks(struct ata_port *ap)
757{
758 int tmp = 0;
759 unsigned long flags;
760
761 DPRINTK("ENTER\n");
762
763 spin_lock_irqsave(&ap->host_set->lock, flags);
764 ap->flags |= ATA_FLAG_FLUSH_PIO_TASK;
765 spin_unlock_irqrestore(&ap->host_set->lock, flags);
766
767 DPRINTK("flush #1\n");
768 flush_workqueue(ata_wq);
769
770 /*
771 * At this point, if a task is running, it's guaranteed to see
772 * the FLUSH flag; thus, it will never queue pio tasks again.
773 * Cancel and flush.
774 */
775 tmp |= cancel_delayed_work(&ap->pio_task);
776 tmp |= cancel_delayed_work(&ap->packet_task);
777 if (!tmp) {
778 DPRINTK("flush #2\n");
779 flush_workqueue(ata_wq);
780 }
781
782 spin_lock_irqsave(&ap->host_set->lock, flags);
783 ap->flags &= ~ATA_FLAG_FLUSH_PIO_TASK;
784 spin_unlock_irqrestore(&ap->host_set->lock, flags);
785
786 DPRINTK("EXIT\n");
95064379
TH		 787}
788
77853bf2 789void ata_qc_complete_internal(struct ata_queued_cmd *qc)
a2a7a662 790{
77853bf2 791 struct completion *waiting = qc->private_data;
a2a7a662 792
77853bf2 793 qc->ap->ops->tf_read(qc->ap, &qc->tf);
a2a7a662 794 complete(waiting);
a2a7a662
TH		 795}
796
797/**
798 * ata_exec_internal - execute libata internal command
799 * @ap: Port to which the command is sent
800 * @dev: Device to which the command is sent
801 * @tf: Taskfile registers for the command and the result
802 * @dma_dir: Data tranfer direction of the command
803 * @buf: Data buffer of the command
804 * @buflen: Length of data buffer
805 *
806 * Executes libata internal command with timeout. @tf contains
807 * command on entry and result on return. Timeout and error
808 * conditions are reported via return value. No recovery action
809 * is taken after a command times out. It's caller's duty to
810 * clean up after timeout.
811 *
812 * LOCKING:
813 * None. Should be called with kernel context, might sleep.
814 */
815
816static unsigned
817ata_exec_internal(struct ata_port *ap, struct ata_device *dev,
818 struct ata_taskfile *tf,
819 int dma_dir, void *buf, unsigned int buflen)
820{
821 u8 command = tf->command;
822 struct ata_queued_cmd *qc;
823 DECLARE_COMPLETION(wait);
824 unsigned long flags;
77853bf2 825 unsigned int err_mask;
a2a7a662
TH		 826
827 spin_lock_irqsave(&ap->host_set->lock, flags);
828
829 qc = ata_qc_new_init(ap, dev);
830 BUG_ON(qc == NULL);
831
832 qc->tf = *tf;
833 qc->dma_dir = dma_dir;
834 if (dma_dir != DMA_NONE) {
835 ata_sg_init_one(qc, buf, buflen);
836 qc->nsect = buflen / ATA_SECT_SIZE;
837 }
838
77853bf2 839 qc->private_data = &wait;
a2a7a662
TH		 840 qc->complete_fn = ata_qc_complete_internal;
841
9a3d9eb0
TH		 842 qc->err_mask = ata_qc_issue(qc);
843 if (qc->err_mask)
8e436af9 844 ata_qc_complete(qc);
a2a7a662
TH		 845
846 spin_unlock_irqrestore(&ap->host_set->lock, flags);
847
848 if (!wait_for_completion_timeout(&wait, ATA_TMOUT_INTERNAL)) {
849 spin_lock_irqsave(&ap->host_set->lock, flags);
850
851 /* We're racing with irq here. If we lose, the
852 * following test prevents us from completing the qc
853 * again. If completion irq occurs after here but
854 * before the caller cleans up, it will result in a
855 * spurious interrupt. We can live with that.
856 */
77853bf2 857 if (qc->flags & ATA_QCFLAG_ACTIVE) {
11a56d24 858 qc->err_mask = AC_ERR_TIMEOUT;
a2a7a662
TH		 859 ata_qc_complete(qc);
860 printk(KERN_WARNING "ata%u: qc timeout (cmd 0x%x)\n",
861 ap->id, command);
862 }
863
864 spin_unlock_irqrestore(&ap->host_set->lock, flags);
865 }
866
77853bf2
TH		 867 *tf = qc->tf;
868 err_mask = qc->err_mask;
869
870 ata_qc_free(qc);
871
872 return err_mask;
a2a7a662
TH		 873}
874
1bc4ccff
AC		 875/**
876 * ata_pio_need_iordy - check if iordy needed
877 * @adev: ATA device
878 *
879 * Check if the current speed of the device requires IORDY. Used
880 * by various controllers for chip configuration.
881 */
882
883unsigned int ata_pio_need_iordy(const struct ata_device *adev)
884{
885 int pio;
886 int speed = adev->pio_mode - XFER_PIO_0;
887
888 if (speed < 2)
889 return 0;
890 if (speed > 2)
891 return 1;
892
893 /* If we have no drive specific rule, then PIO 2 is non IORDY */
894
895 if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE */
896 pio = adev->id[ATA_ID_EIDE_PIO];
897 /* Is the speed faster than the drive allows non IORDY ? */
898 if (pio) {
899 /* This is cycle times not frequency - watch the logic! */
900 if (pio > 240) /* PIO2 is 240nS per cycle */
901 return 1;
902 return 0;
903 }
904 }
905 return 0;
906}
907
1da177e4 908/**
49016aca
TH		 909 * ata_dev_read_id - Read ID data from the specified device
910 * @ap: port on which target device resides
911 * @dev: target device
912 * @p_class: pointer to class of the target device (may be changed)
913 * @post_reset: is this read ID post-reset?
d9572b1d 914 * @p_id: read IDENTIFY page (newly allocated)
1da177e4 915 *
49016aca
TH		 916 * Read ID data from the specified device. ATA_CMD_ID_ATA is
917 * performed on ATA devices and ATA_CMD_ID_ATAPI on ATAPI
918 * devices. This function also takes care of EDD signature
919 * misreporting (to be removed once EDD support is gone) and
920 * issues ATA_CMD_INIT_DEV_PARAMS for pre-ATA4 drives.
1da177e4
LT		 921 *
922 * LOCKING:
49016aca
TH		 923 * Kernel thread context (may sleep)
924 *
925 * RETURNS:
926 * 0 on success, -errno otherwise.
1da177e4 927 */
49016aca 928static int ata_dev_read_id(struct ata_port *ap, struct ata_device *dev,
d9572b1d 929 unsigned int *p_class, int post_reset, u16 **p_id)
1da177e4 930{
49016aca 931 unsigned int class = *p_class;
1da177e4 932 unsigned int using_edd;
a0123703 933 struct ata_taskfile tf;
49016aca 934 unsigned int err_mask = 0;
d9572b1d 935 u16 *id;
49016aca
TH		 936 const char *reason;
937 int rc;
1da177e4 938
49016aca 939 DPRINTK("ENTER, host %u, dev %u\n", ap->id, dev->devno);
1da177e4 940
61eb066a
TH		 941 if (ap->ops->probe_reset ||
942 ap->flags & (ATA_FLAG_SRST | ATA_FLAG_SATA_RESET))
1da177e4
LT		 943 using_edd = 0;
944 else
945 using_edd = 1;
946
49016aca 947 ata_dev_select(ap, dev->devno, 1, 1); /* select device 0/1 */
1da177e4 948
d9572b1d
TH		 949 id = kmalloc(sizeof(id[0]) * ATA_ID_WORDS, GFP_KERNEL);
950 if (id == NULL) {
951 rc = -ENOMEM;
952 reason = "out of memory";
953 goto err_out;
954 }
955
49016aca
TH		 956 retry:
957 ata_tf_init(ap, &tf, dev->devno);
a0123703 958
49016aca
TH		 959 switch (class) {
960 case ATA_DEV_ATA:
a0123703 961 tf.command = ATA_CMD_ID_ATA;
49016aca
TH		 962 break;
963 case ATA_DEV_ATAPI:
a0123703 964 tf.command = ATA_CMD_ID_ATAPI;
49016aca
TH		 965 break;
966 default:
967 rc = -ENODEV;
968 reason = "unsupported class";
969 goto err_out;
1da177e4
LT		 970 }
971
a0123703 972 tf.protocol = ATA_PROT_PIO;
1da177e4 973
a0123703 974 err_mask = ata_exec_internal(ap, dev, &tf, DMA_FROM_DEVICE,
49016aca 975 id, sizeof(id[0]) * ATA_ID_WORDS);
1da177e4 976
a0123703 977 if (err_mask) {
49016aca
TH		 978 rc = -EIO;
979 reason = "I/O error";
980
a0123703
TH		 981 if (err_mask & ~AC_ERR_DEV)
982 goto err_out;
0169e284 983
1da177e4
LT		 984 /*
985 * arg! EDD works for all test cases, but seems to return
986 * the ATA signature for some ATAPI devices. Until the
987 * reason for this is found and fixed, we fix up the mess
988 * here. If IDENTIFY DEVICE returns command aborted
989 * (as ATAPI devices do), then we issue an
990 * IDENTIFY PACKET DEVICE.
991 *
992 * ATA software reset (SRST, the default) does not appear
993 * to have this problem.
994 */
49016aca 995 if ((using_edd) && (class == ATA_DEV_ATA)) {
a0123703 996 u8 err = tf.feature;
1da177e4 997 if (err & ATA_ABORTED) {
49016aca 998 class = ATA_DEV_ATAPI;
1da177e4
LT		 999 goto retry;
1000 }
1001 }
1002 goto err_out;
1003 }
1004
49016aca 1005 swap_buf_le16(id, ATA_ID_WORDS);
1da177e4
LT		 1006
1007 /* print device capabilities */
1008 printk(KERN_DEBUG "ata%u: dev %u cfg "
1009 "49:%04x 82:%04x 83:%04x 84:%04x 85:%04x 86:%04x 87:%04x 88:%04x\n",
49016aca
TH		 1010 ap->id, dev->devno,
1011 id[49], id[82], id[83], id[84], id[85], id[86], id[87], id[88]);
1012
1013 /* sanity check */
1014 if ((class == ATA_DEV_ATA) != ata_id_is_ata(id)) {
1015 rc = -EINVAL;
1016 reason = "device reports illegal type";
1017 goto err_out;
1018 }
1019
1020 if (post_reset && class == ATA_DEV_ATA) {
1021 /*
1022 * The exact sequence expected by certain pre-ATA4 drives is:
1023 * SRST RESET
1024 * IDENTIFY
1025 * INITIALIZE DEVICE PARAMETERS
1026 * anything else..
1027 * Some drives were very specific about that exact sequence.
1028 */
1029 if (ata_id_major_version(id) < 4 || !ata_id_has_lba(id)) {
1030 err_mask = ata_dev_init_params(ap, dev);
1031 if (err_mask) {
1032 rc = -EIO;
1033 reason = "INIT_DEV_PARAMS failed";
1034 goto err_out;
1035 }
1036
1037 /* current CHS translation info (id[53-58]) might be
1038 * changed. reread the identify device info.
1039 */
1040 post_reset = 0;
1041 goto retry;
1042 }
1043 }
1044
1045 *p_class = class;
d9572b1d 1046 *p_id = id;
49016aca
TH		 1047 return 0;
1048
1049 err_out:
1050 printk(KERN_WARNING "ata%u: dev %u failed to IDENTIFY (%s)\n",
1051 ap->id, dev->devno, reason);
d9572b1d 1052 kfree(id);
49016aca
TH		 1053 return rc;
1054}
1055
4b2f3ede
TH		 1056static inline u8 ata_dev_knobble(const struct ata_port *ap,
1057 struct ata_device *dev)
1058{
1059 return ((ap->cbl == ATA_CBL_SATA) && (!ata_id_is_sata(dev->id)));
1060}
1061
49016aca 1062/**
ffeae418
TH		 1063 * ata_dev_configure - Configure the specified ATA/ATAPI device
1064 * @ap: Port on which target device resides
1065 * @dev: Target device to configure
4c2d721a 1066 * @print_info: Enable device info printout
ffeae418
TH		 1067 *
1068 * Configure @dev according to @dev->id. Generic and low-level
1069 * driver specific fixups are also applied.
49016aca
TH		 1070 *
1071 * LOCKING:
ffeae418
TH		 1072 * Kernel thread context (may sleep)
1073 *
1074 * RETURNS:
1075 * 0 on success, -errno otherwise
49016aca 1076 */
4c2d721a
TH		 1077static int ata_dev_configure(struct ata_port *ap, struct ata_device *dev,
1078 int print_info)
49016aca 1079{
49016aca
TH		 1080 unsigned long xfer_modes;
1081 int i, rc;
1082
1083 if (!ata_dev_present(dev)) {
1084 DPRINTK("ENTER/EXIT (host %u, dev %u) -- nodev\n",
ffeae418
TH		 1085 ap->id, dev->devno);
1086 return 0;
49016aca
TH		 1087 }
1088
ffeae418 1089 DPRINTK("ENTER, host %u, dev %u\n", ap->id, dev->devno);
1da177e4 1090
208a9933
TH		 1091 /* initialize to-be-configured parameters */
1092 dev->flags = 0;
1093 dev->max_sectors = 0;
1094 dev->cdb_len = 0;
1095 dev->n_sectors = 0;
1096 dev->cylinders = 0;
1097 dev->heads = 0;
1098 dev->sectors = 0;
1099
1da177e4
LT		 1100 /*
1101 * common ATA, ATAPI feature tests
1102 */
1103
8bf62ece
AL		 1104 /* we require DMA support (bits 8 of word 49) */
1105 if (!ata_id_has_dma(dev->id)) {
1106 printk(KERN_DEBUG "ata%u: no dma\n", ap->id);
ffeae418 1107 rc = -EINVAL;
1da177e4
LT		 1108 goto err_out_nosup;
1109 }
1110
1111 /* quick-n-dirty find max transfer mode; for printk only */
1112 xfer_modes = dev->id[ATA_ID_UDMA_MODES];
1113 if (!xfer_modes)
1114 xfer_modes = (dev->id[ATA_ID_MWDMA_MODES]) << ATA_SHIFT_MWDMA;
11e29e21
AC		 1115 if (!xfer_modes)
1116 xfer_modes = ata_pio_modes(dev);
1da177e4 1117
0bd3300a 1118 ata_dump_id(dev->id);
1da177e4
LT		 1119
1120 /* ATA-specific feature tests */
1121 if (dev->class == ATA_DEV_ATA) {
2940740b
TH		 1122 dev->n_sectors = ata_id_n_sectors(dev->id);
1123
8bf62ece 1124 if (ata_id_has_lba(dev->id)) {
4c2d721a 1125 const char *lba_desc;
8bf62ece 1126
4c2d721a
TH		 1127 lba_desc = "LBA";
1128 dev->flags |= ATA_DFLAG_LBA;
1129 if (ata_id_has_lba48(dev->id)) {
8bf62ece 1130 dev->flags |= ATA_DFLAG_LBA48;
4c2d721a
TH		 1131 lba_desc = "LBA48";
1132 }
8bf62ece
AL		 1133
1134 /* print device info to dmesg */
4c2d721a
TH		 1135 if (print_info)
1136 printk(KERN_INFO "ata%u: dev %u ATA-%d, "
1137 "max %s, %Lu sectors: %s\n",
1138 ap->id, dev->devno,
1139 ata_id_major_version(dev->id),
1140 ata_mode_string(xfer_modes),
1141 (unsigned long long)dev->n_sectors,
1142 lba_desc);
ffeae418 1143 } else {
8bf62ece
AL		 1144 /* CHS */
1145
1146 /* Default translation */
1147 dev->cylinders = dev->id[1];
1148 dev->heads = dev->id[3];
1149 dev->sectors = dev->id[6];
8bf62ece
AL		 1150
1151 if (ata_id_current_chs_valid(dev->id)) {
1152 /* Current CHS translation is valid. */
1153 dev->cylinders = dev->id[54];
1154 dev->heads = dev->id[55];
1155 dev->sectors = dev->id[56];
8bf62ece
AL		 1156 }
1157
1158 /* print device info to dmesg */
4c2d721a
TH		 1159 if (print_info)
1160 printk(KERN_INFO "ata%u: dev %u ATA-%d, "
1161 "max %s, %Lu sectors: CHS %u/%u/%u\n",
1162 ap->id, dev->devno,
1163 ata_id_major_version(dev->id),
1164 ata_mode_string(xfer_modes),
1165 (unsigned long long)dev->n_sectors,
1166 dev->cylinders, dev->heads, dev->sectors);
1da177e4
LT		 1167 }
1168
6e7846e9 1169 dev->cdb_len = 16;
1da177e4
LT		 1170 }
1171
1172 /* ATAPI-specific feature tests */
2c13b7ce 1173 else if (dev->class == ATA_DEV_ATAPI) {
1da177e4
LT		 1174 rc = atapi_cdb_len(dev->id);
1175 if ((rc < 12) || (rc > ATAPI_CDB_LEN)) {
1176 printk(KERN_WARNING "ata%u: unsupported CDB len\n", ap->id);
ffeae418 1177 rc = -EINVAL;
1da177e4
LT		 1178 goto err_out_nosup;
1179 }
6e7846e9 1180 dev->cdb_len = (unsigned int) rc;
1da177e4
LT		 1181
1182 /* print device info to dmesg */
4c2d721a
TH		 1183 if (print_info)
1184 printk(KERN_INFO "ata%u: dev %u ATAPI, max %s\n",
1185 ap->id, dev->devno, ata_mode_string(xfer_modes));
1da177e4
LT		 1186 }
1187
6e7846e9
TH		 1188 ap->host->max_cmd_len = 0;
1189 for (i = 0; i < ATA_MAX_DEVICES; i++)
1190 ap->host->max_cmd_len = max_t(unsigned int,
1191 ap->host->max_cmd_len,
1192 ap->device[i].cdb_len);
1193
4b2f3ede
TH		 1194 /* limit bridge transfers to udma5, 200 sectors */
1195 if (ata_dev_knobble(ap, dev)) {
4c2d721a
TH		 1196 if (print_info)
1197 printk(KERN_INFO "ata%u(%u): applying bridge limits\n",
1198 ap->id, dev->devno);
4b2f3ede
TH		 1199 ap->udma_mask &= ATA_UDMA5;
1200 dev->max_sectors = ATA_MAX_SECTORS;
1201 }
1202
1203 if (ap->ops->dev_config)
1204 ap->ops->dev_config(ap, dev);
1205
1da177e4 1206 DPRINTK("EXIT, drv_stat = 0x%x\n", ata_chk_status(ap));
ffeae418 1207 return 0;
1da177e4
LT		 1208
1209err_out_nosup:
1210 printk(KERN_WARNING "ata%u: dev %u not supported, ignoring\n",
ffeae418 1211 ap->id, dev->devno);
1da177e4 1212 DPRINTK("EXIT, err\n");
ffeae418 1213 return rc;
1da177e4
LT		 1214}
1215
1216/**
1217 * ata_bus_probe - Reset and probe ATA bus
1218 * @ap: Bus to probe
1219 *
0cba632b
JG		 1220 * Master ATA bus probing function. Initiates a hardware-dependent
1221 * bus reset, then attempts to identify any devices found on
1222 * the bus.
1223 *
1da177e4 1224 * LOCKING:
0cba632b 1225 * PCI/etc. bus probe sem.
1da177e4
LT		 1226 *
1227 * RETURNS:
1228 * Zero on success, non-zero on error.
1229 */
1230
1231static int ata_bus_probe(struct ata_port *ap)
1232{
28ca5c57
TH		 1233 unsigned int classes[ATA_MAX_DEVICES];
1234 unsigned int i, rc, found = 0;
1da177e4 1235
28ca5c57 1236 ata_port_probe(ap);
c19ba8af 1237
28ca5c57
TH		 1238 /* reset */
1239 if (ap->ops->probe_reset) {
c19ba8af 1240 rc = ap->ops->probe_reset(ap, classes);
28ca5c57
TH		 1241 if (rc) {
1242 printk("ata%u: reset failed (errno=%d)\n", ap->id, rc);
1243 return rc;
c19ba8af 1244 }
28ca5c57
TH		 1245
1246 for (i = 0; i < ATA_MAX_DEVICES; i++)
1247 if (classes[i] == ATA_DEV_UNKNOWN)
1248 classes[i] = ATA_DEV_NONE;
1249 } else {
c19ba8af
TH		 1250 ap->ops->phy_reset(ap);
1251
28ca5c57
TH		 1252 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1253 if (!(ap->flags & ATA_FLAG_PORT_DISABLED))
1254 classes[i] = ap->device[i].class;
1255 else
1256 ap->device[i].class = ATA_DEV_UNKNOWN;
1257 }
1258 ata_port_probe(ap);
1259 }
1da177e4 1260
28ca5c57 1261 /* read IDENTIFY page and configure devices */
1da177e4 1262 for (i = 0; i < ATA_MAX_DEVICES; i++) {
ffeae418
TH		 1263 struct ata_device *dev = &ap->device[i];
1264
28ca5c57
TH		 1265 dev->class = classes[i];
1266
ffeae418
TH		 1267 if (!ata_dev_present(dev))
1268 continue;
1269
1270 WARN_ON(dev->id != NULL);
1271 if (ata_dev_read_id(ap, dev, &dev->class, 1, &dev->id)) {
1272 dev->class = ATA_DEV_NONE;
1273 continue;
1274 }
1275
4c2d721a 1276 if (ata_dev_configure(ap, dev, 1)) {
ffeae418
TH		 1277 dev->class++; /* disable device */
1278 continue;
1da177e4 1279 }
ffeae418 1280
ffeae418 1281 found = 1;
1da177e4
LT		 1282 }
1283
28ca5c57 1284 if (!found)
1da177e4
LT		 1285 goto err_out_disable;
1286
1287 ata_set_mode(ap);
1288 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1289 goto err_out_disable;
1290
1291 return 0;
1292
1293err_out_disable:
1294 ap->ops->port_disable(ap);
1da177e4
LT		 1295 return -1;
1296}
1297
1298/**
0cba632b
JG		 1299 * ata_port_probe - Mark port as enabled
1300 * @ap: Port for which we indicate enablement
1da177e4 1301 *
0cba632b
JG		 1302 * Modify @ap data structure such that the system
1303 * thinks that the entire port is enabled.
1304 *
1305 * LOCKING: host_set lock, or some other form of
1306 * serialization.
1da177e4
LT		 1307 */
1308
1309void ata_port_probe(struct ata_port *ap)
1310{
1311 ap->flags &= ~ATA_FLAG_PORT_DISABLED;
1312}
1313
3be680b7
TH		 1314/**
1315 * sata_print_link_status - Print SATA link status
1316 * @ap: SATA port to printk link status about
1317 *
1318 * This function prints link speed and status of a SATA link.
1319 *
1320 * LOCKING:
1321 * None.
1322 */
1323static void sata_print_link_status(struct ata_port *ap)
1324{
1325 u32 sstatus, tmp;
1326 const char *speed;
1327
1328 if (!ap->ops->scr_read)
1329 return;
1330
1331 sstatus = scr_read(ap, SCR_STATUS);
1332
1333 if (sata_dev_present(ap)) {
1334 tmp = (sstatus >> 4) & 0xf;
1335 if (tmp & (1 << 0))
1336 speed = "1.5";
1337 else if (tmp & (1 << 1))
1338 speed = "3.0";
1339 else
1340 speed = "<unknown>";
1341 printk(KERN_INFO "ata%u: SATA link up %s Gbps (SStatus %X)\n",
1342 ap->id, speed, sstatus);
1343 } else {
1344 printk(KERN_INFO "ata%u: SATA link down (SStatus %X)\n",
1345 ap->id, sstatus);
1346 }
1347}
1348
1da177e4 1349/**
780a87f7
JG		 1350 * __sata_phy_reset - Wake/reset a low-level SATA PHY
1351 * @ap: SATA port associated with target SATA PHY.
1da177e4 1352 *
780a87f7
JG		 1353 * This function issues commands to standard SATA Sxxx
1354 * PHY registers, to wake up the phy (and device), and
1355 * clear any reset condition.
1da177e4
LT		 1356 *
1357 * LOCKING:
0cba632b 1358 * PCI/etc. bus probe sem.
1da177e4
LT		 1359 *
1360 */
1361void __sata_phy_reset(struct ata_port *ap)
1362{
1363 u32 sstatus;
1364 unsigned long timeout = jiffies + (HZ * 5);
1365
1366 if (ap->flags & ATA_FLAG_SATA_RESET) {
cdcca89e
BR		 1367 /* issue phy wake/reset */
1368 scr_write_flush(ap, SCR_CONTROL, 0x301);
62ba2841
TH		 1369 /* Couldn't find anything in SATA I/II specs, but
1370 * AHCI-1.1 10.4.2 says at least 1 ms. */
1371 mdelay(1);
1da177e4 1372 }
cdcca89e 1373 scr_write_flush(ap, SCR_CONTROL, 0x300); /* phy wake/clear reset */
1da177e4
LT		 1374
1375 /* wait for phy to become ready, if necessary */
1376 do {
1377 msleep(200);
1378 sstatus = scr_read(ap, SCR_STATUS);
1379 if ((sstatus & 0xf) != 1)
1380 break;
1381 } while (time_before(jiffies, timeout));
1382
3be680b7
TH		 1383 /* print link status */
1384 sata_print_link_status(ap);
656563e3 1385
3be680b7
TH		 1386 /* TODO: phy layer with polling, timeouts, etc. */
1387 if (sata_dev_present(ap))
1da177e4 1388 ata_port_probe(ap);
3be680b7 1389 else
1da177e4 1390 ata_port_disable(ap);
1da177e4
LT		 1391
1392 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1393 return;
1394
1395 if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) {
1396 ata_port_disable(ap);
1397 return;
1398 }
1399
1400 ap->cbl = ATA_CBL_SATA;
1401}
1402
1403/**
780a87f7
JG		 1404 * sata_phy_reset - Reset SATA bus.
1405 * @ap: SATA port associated with target SATA PHY.
1da177e4 1406 *
780a87f7
JG		 1407 * This function resets the SATA bus, and then probes
1408 * the bus for devices.
1da177e4
LT		 1409 *
1410 * LOCKING:
0cba632b 1411 * PCI/etc. bus probe sem.
1da177e4
LT		 1412 *
1413 */
1414void sata_phy_reset(struct ata_port *ap)
1415{
1416 __sata_phy_reset(ap);
1417 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1418 return;
1419 ata_bus_reset(ap);
1420}
1421
1422/**
780a87f7
JG		 1423 * ata_port_disable - Disable port.
1424 * @ap: Port to be disabled.
1da177e4 1425 *
780a87f7
JG		 1426 * Modify @ap data structure such that the system
1427 * thinks that the entire port is disabled, and should
1428 * never attempt to probe or communicate with devices
1429 * on this port.
1430 *
1431 * LOCKING: host_set lock, or some other form of
1432 * serialization.
1da177e4
LT		 1433 */
1434
1435void ata_port_disable(struct ata_port *ap)
1436{
1437 ap->device[0].class = ATA_DEV_NONE;
1438 ap->device[1].class = ATA_DEV_NONE;
1439 ap->flags |= ATA_FLAG_PORT_DISABLED;
1440}
1441
452503f9
AC		 1442/*
1443 * This mode timing computation functionality is ported over from
1444 * drivers/ide/ide-timing.h and was originally written by Vojtech Pavlik
1445 */
1446/*
1447 * PIO 0-5, MWDMA 0-2 and UDMA 0-6 timings (in nanoseconds).
1448 * These were taken from ATA/ATAPI-6 standard, rev 0a, except
1449 * for PIO 5, which is a nonstandard extension and UDMA6, which
1450 * is currently supported only by Maxtor drives.
1451 */
1452
1453static const struct ata_timing ata_timing[] = {
1454
1455 { XFER_UDMA_6, 0, 0, 0, 0, 0, 0, 0, 15 },
1456 { XFER_UDMA_5, 0, 0, 0, 0, 0, 0, 0, 20 },
1457 { XFER_UDMA_4, 0, 0, 0, 0, 0, 0, 0, 30 },
1458 { XFER_UDMA_3, 0, 0, 0, 0, 0, 0, 0, 45 },
1459
1460 { XFER_UDMA_2, 0, 0, 0, 0, 0, 0, 0, 60 },
1461 { XFER_UDMA_1, 0, 0, 0, 0, 0, 0, 0, 80 },
1462 { XFER_UDMA_0, 0, 0, 0, 0, 0, 0, 0, 120 },
1463
1464/* { XFER_UDMA_SLOW, 0, 0, 0, 0, 0, 0, 0, 150 }, */
1465
1466 { XFER_MW_DMA_2, 25, 0, 0, 0, 70, 25, 120, 0 },
1467 { XFER_MW_DMA_1, 45, 0, 0, 0, 80, 50, 150, 0 },
1468 { XFER_MW_DMA_0, 60, 0, 0, 0, 215, 215, 480, 0 },
1469
1470 { XFER_SW_DMA_2, 60, 0, 0, 0, 120, 120, 240, 0 },
1471 { XFER_SW_DMA_1, 90, 0, 0, 0, 240, 240, 480, 0 },
1472 { XFER_SW_DMA_0, 120, 0, 0, 0, 480, 480, 960, 0 },
1473
1474/* { XFER_PIO_5, 20, 50, 30, 100, 50, 30, 100, 0 }, */
1475 { XFER_PIO_4, 25, 70, 25, 120, 70, 25, 120, 0 },
1476 { XFER_PIO_3, 30, 80, 70, 180, 80, 70, 180, 0 },
1477
1478 { XFER_PIO_2, 30, 290, 40, 330, 100, 90, 240, 0 },
1479 { XFER_PIO_1, 50, 290, 93, 383, 125, 100, 383, 0 },
1480 { XFER_PIO_0, 70, 290, 240, 600, 165, 150, 600, 0 },
1481
1482/* { XFER_PIO_SLOW, 120, 290, 240, 960, 290, 240, 960, 0 }, */
1483
1484 { 0xFF }
1485};
1486
1487#define ENOUGH(v,unit) (((v)-1)/(unit)+1)
1488#define EZ(v,unit) ((v)?ENOUGH(v,unit):0)
1489
1490static void ata_timing_quantize(const struct ata_timing *t, struct ata_timing *q, int T, int UT)
1491{
1492 q->setup = EZ(t->setup * 1000, T);
1493 q->act8b = EZ(t->act8b * 1000, T);
1494 q->rec8b = EZ(t->rec8b * 1000, T);
1495 q->cyc8b = EZ(t->cyc8b * 1000, T);
1496 q->active = EZ(t->active * 1000, T);
1497 q->recover = EZ(t->recover * 1000, T);
1498 q->cycle = EZ(t->cycle * 1000, T);
1499 q->udma = EZ(t->udma * 1000, UT);
1500}
1501
1502void ata_timing_merge(const struct ata_timing *a, const struct ata_timing *b,
1503 struct ata_timing *m, unsigned int what)
1504{
1505 if (what & ATA_TIMING_SETUP ) m->setup = max(a->setup, b->setup);
1506 if (what & ATA_TIMING_ACT8B ) m->act8b = max(a->act8b, b->act8b);
1507 if (what & ATA_TIMING_REC8B ) m->rec8b = max(a->rec8b, b->rec8b);
1508 if (what & ATA_TIMING_CYC8B ) m->cyc8b = max(a->cyc8b, b->cyc8b);
1509 if (what & ATA_TIMING_ACTIVE ) m->active = max(a->active, b->active);
1510 if (what & ATA_TIMING_RECOVER) m->recover = max(a->recover, b->recover);
1511 if (what & ATA_TIMING_CYCLE ) m->cycle = max(a->cycle, b->cycle);
1512 if (what & ATA_TIMING_UDMA ) m->udma = max(a->udma, b->udma);
1513}
1514
1515static const struct ata_timing* ata_timing_find_mode(unsigned short speed)
1516{
1517 const struct ata_timing *t;
1518
1519 for (t = ata_timing; t->mode != speed; t++)
91190758 1520 if (t->mode == 0xFF)
452503f9
AC		 1521 return NULL;
1522 return t;
1523}
1524
1525int ata_timing_compute(struct ata_device *adev, unsigned short speed,
1526 struct ata_timing *t, int T, int UT)
1527{
1528 const struct ata_timing *s;
1529 struct ata_timing p;
1530
1531 /*
1532 * Find the mode.
75b1f2f8 1533 */
452503f9
AC		 1534
1535 if (!(s = ata_timing_find_mode(speed)))
1536 return -EINVAL;
1537
75b1f2f8
AL		 1538 memcpy(t, s, sizeof(*s));
1539
452503f9
AC		 1540 /*
1541 * If the drive is an EIDE drive, it can tell us it needs extended
1542 * PIO/MW_DMA cycle timing.
1543 */
1544
1545 if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE drive */
1546 memset(&p, 0, sizeof(p));
1547 if(speed >= XFER_PIO_0 && speed <= XFER_SW_DMA_0) {
1548 if (speed <= XFER_PIO_2) p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO];
1549 else p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO_IORDY];
1550 } else if(speed >= XFER_MW_DMA_0 && speed <= XFER_MW_DMA_2) {
1551 p.cycle = adev->id[ATA_ID_EIDE_DMA_MIN];
1552 }
1553 ata_timing_merge(&p, t, t, ATA_TIMING_CYCLE | ATA_TIMING_CYC8B);
1554 }
1555
1556 /*
1557 * Convert the timing to bus clock counts.
1558 */
1559
75b1f2f8 1560 ata_timing_quantize(t, t, T, UT);
452503f9
AC		 1561
1562 /*
c893a3ae
RD		 1563 * Even in DMA/UDMA modes we still use PIO access for IDENTIFY,
1564 * S.M.A.R.T * and some other commands. We have to ensure that the
1565 * DMA cycle timing is slower/equal than the fastest PIO timing.
452503f9
AC		 1566 */
1567
1568 if (speed > XFER_PIO_4) {
1569 ata_timing_compute(adev, adev->pio_mode, &p, T, UT);
1570 ata_timing_merge(&p, t, t, ATA_TIMING_ALL);
1571 }
1572
1573 /*
c893a3ae 1574 * Lengthen active & recovery time so that cycle time is correct.
452503f9
AC		 1575 */
1576
1577 if (t->act8b + t->rec8b < t->cyc8b) {
1578 t->act8b += (t->cyc8b - (t->act8b + t->rec8b)) / 2;
1579 t->rec8b = t->cyc8b - t->act8b;
1580 }
1581
1582 if (t->active + t->recover < t->cycle) {
1583 t->active += (t->cycle - (t->active + t->recover)) / 2;
1584 t->recover = t->cycle - t->active;
1585 }
1586
1587 return 0;
1588}
1589
057ace5e 1590static const struct {
1da177e4
LT		 1591 unsigned int shift;
1592 u8 base;
1593} xfer_mode_classes[] = {
1594 { ATA_SHIFT_UDMA, XFER_UDMA_0 },
1595 { ATA_SHIFT_MWDMA, XFER_MW_DMA_0 },
1596 { ATA_SHIFT_PIO, XFER_PIO_0 },
1597};
1598
858119e1 1599static u8 base_from_shift(unsigned int shift)
1da177e4
LT		 1600{
1601 int i;
1602
1603 for (i = 0; i < ARRAY_SIZE(xfer_mode_classes); i++)
1604 if (xfer_mode_classes[i].shift == shift)
1605 return xfer_mode_classes[i].base;
1606
1607 return 0xff;
1608}
1609
1610static void ata_dev_set_mode(struct ata_port *ap, struct ata_device *dev)
1611{
1612 int ofs, idx;
1613 u8 base;
1614
1615 if (!ata_dev_present(dev) || (ap->flags & ATA_FLAG_PORT_DISABLED))
1616 return;
1617
1618 if (dev->xfer_shift == ATA_SHIFT_PIO)
1619 dev->flags |= ATA_DFLAG_PIO;
1620
1621 ata_dev_set_xfermode(ap, dev);
1622
1623 base = base_from_shift(dev->xfer_shift);
1624 ofs = dev->xfer_mode - base;
1625 idx = ofs + dev->xfer_shift;
1626 WARN_ON(idx >= ARRAY_SIZE(xfer_mode_str));
1627
1628 DPRINTK("idx=%d xfer_shift=%u, xfer_mode=0x%x, base=0x%x, offset=%d\n",
1629 idx, dev->xfer_shift, (int)dev->xfer_mode, (int)base, ofs);
1630
1631 printk(KERN_INFO "ata%u: dev %u configured for %s\n",
1632 ap->id, dev->devno, xfer_mode_str[idx]);
1633}
1634
1635static int ata_host_set_pio(struct ata_port *ap)
1636{
1637 unsigned int mask;
1638 int x, i;
1639 u8 base, xfer_mode;
1640
1641 mask = ata_get_mode_mask(ap, ATA_SHIFT_PIO);
1642 x = fgb(mask);
1643 if (x < 0) {
1644 printk(KERN_WARNING "ata%u: no PIO support\n", ap->id);
1645 return -1;
1646 }
1647
1648 base = base_from_shift(ATA_SHIFT_PIO);
1649 xfer_mode = base + x;
1650
1651 DPRINTK("base 0x%x xfer_mode 0x%x mask 0x%x x %d\n",
1652 (int)base, (int)xfer_mode, mask, x);
1653
1654 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1655 struct ata_device *dev = &ap->device[i];
1656 if (ata_dev_present(dev)) {
1657 dev->pio_mode = xfer_mode;
1658 dev->xfer_mode = xfer_mode;
1659 dev->xfer_shift = ATA_SHIFT_PIO;
1660 if (ap->ops->set_piomode)
1661 ap->ops->set_piomode(ap, dev);
1662 }
1663 }
1664
1665 return 0;
1666}
1667
1668static void ata_host_set_dma(struct ata_port *ap, u8 xfer_mode,
1669 unsigned int xfer_shift)
1670{
1671 int i;
1672
1673 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1674 struct ata_device *dev = &ap->device[i];
1675 if (ata_dev_present(dev)) {
1676 dev->dma_mode = xfer_mode;
1677 dev->xfer_mode = xfer_mode;
1678 dev->xfer_shift = xfer_shift;
1679 if (ap->ops->set_dmamode)
1680 ap->ops->set_dmamode(ap, dev);
1681 }
1682 }
1683}
1684
1685/**
1686 * ata_set_mode - Program timings and issue SET FEATURES - XFER
1687 * @ap: port on which timings will be programmed
1688 *
780a87f7
JG		 1689 * Set ATA device disk transfer mode (PIO3, UDMA6, etc.).
1690 *
1da177e4 1691 * LOCKING:
0cba632b 1692 * PCI/etc. bus probe sem.
1da177e4
LT		 1693 */
1694static void ata_set_mode(struct ata_port *ap)
1695{
8cbd6df1 1696 unsigned int xfer_shift;
1da177e4
LT		 1697 u8 xfer_mode;
1698 int rc;
1699
1700 /* step 1: always set host PIO timings */
1701 rc = ata_host_set_pio(ap);
1702 if (rc)
1703 goto err_out;
1704
1705 /* step 2: choose the best data xfer mode */
1706 xfer_mode = xfer_shift = 0;
1707 rc = ata_choose_xfer_mode(ap, &xfer_mode, &xfer_shift);
1708 if (rc)
1709 goto err_out;
1710
1711 /* step 3: if that xfer mode isn't PIO, set host DMA timings */
1712 if (xfer_shift != ATA_SHIFT_PIO)
1713 ata_host_set_dma(ap, xfer_mode, xfer_shift);
1714
1715 /* step 4: update devices' xfer mode */
1716 ata_dev_set_mode(ap, &ap->device[0]);
1717 ata_dev_set_mode(ap, &ap->device[1]);
1718
1719 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1720 return;
1721
1722 if (ap->ops->post_set_mode)
1723 ap->ops->post_set_mode(ap);
1724
1da177e4
LT		 1725 return;
1726
1727err_out:
1728 ata_port_disable(ap);
1729}
1730
1fdffbce
JG		 1731/**
1732 * ata_tf_to_host - issue ATA taskfile to host controller
1733 * @ap: port to which command is being issued
1734 * @tf: ATA taskfile register set
1735 *
1736 * Issues ATA taskfile register set to ATA host controller,
1737 * with proper synchronization with interrupt handler and
1738 * other threads.
1739 *
1740 * LOCKING:
1741 * spin_lock_irqsave(host_set lock)
1742 */
1743
1744static inline void ata_tf_to_host(struct ata_port *ap,
1745 const struct ata_taskfile *tf)
1746{
1747 ap->ops->tf_load(ap, tf);
1748 ap->ops->exec_command(ap, tf);
1749}
1750
1da177e4
LT		 1751/**
1752 * ata_busy_sleep - sleep until BSY clears, or timeout
1753 * @ap: port containing status register to be polled
1754 * @tmout_pat: impatience timeout
1755 * @tmout: overall timeout
1756 *
780a87f7
JG		 1757 * Sleep until ATA Status register bit BSY clears,
1758 * or a timeout occurs.
1759 *
1760 * LOCKING: None.
1da177e4
LT		 1761 */
1762
6f8b9958
TH		 1763unsigned int ata_busy_sleep (struct ata_port *ap,
1764 unsigned long tmout_pat, unsigned long tmout)
1da177e4
LT		 1765{
1766 unsigned long timer_start, timeout;
1767 u8 status;
1768
1769 status = ata_busy_wait(ap, ATA_BUSY, 300);
1770 timer_start = jiffies;
1771 timeout = timer_start + tmout_pat;
1772 while ((status & ATA_BUSY) && (time_before(jiffies, timeout))) {
1773 msleep(50);
1774 status = ata_busy_wait(ap, ATA_BUSY, 3);
1775 }
1776
1777 if (status & ATA_BUSY)
1778 printk(KERN_WARNING "ata%u is slow to respond, "
1779 "please be patient\n", ap->id);
1780
1781 timeout = timer_start + tmout;
1782 while ((status & ATA_BUSY) && (time_before(jiffies, timeout))) {
1783 msleep(50);
1784 status = ata_chk_status(ap);
1785 }
1786
1787 if (status & ATA_BUSY) {
1788 printk(KERN_ERR "ata%u failed to respond (%lu secs)\n",
1789 ap->id, tmout / HZ);
1790 return 1;
1791 }
1792
1793 return 0;
1794}
1795
1796static void ata_bus_post_reset(struct ata_port *ap, unsigned int devmask)
1797{
1798 struct ata_ioports *ioaddr = &ap->ioaddr;
1799 unsigned int dev0 = devmask & (1 << 0);
1800 unsigned int dev1 = devmask & (1 << 1);
1801 unsigned long timeout;
1802
1803 /* if device 0 was found in ata_devchk, wait for its
1804 * BSY bit to clear
1805 */
1806 if (dev0)
1807 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
1808
1809 /* if device 1 was found in ata_devchk, wait for
1810 * register access, then wait for BSY to clear
1811 */
1812 timeout = jiffies + ATA_TMOUT_BOOT;
1813 while (dev1) {
1814 u8 nsect, lbal;
1815
1816 ap->ops->dev_select(ap, 1);
1817 if (ap->flags & ATA_FLAG_MMIO) {
1818 nsect = readb((void __iomem *) ioaddr->nsect_addr);
1819 lbal = readb((void __iomem *) ioaddr->lbal_addr);
1820 } else {
1821 nsect = inb(ioaddr->nsect_addr);
1822 lbal = inb(ioaddr->lbal_addr);
1823 }
1824 if ((nsect == 1) && (lbal == 1))
1825 break;
1826 if (time_after(jiffies, timeout)) {
1827 dev1 = 0;
1828 break;
1829 }
1830 msleep(50); /* give drive a breather */
1831 }
1832 if (dev1)
1833 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
1834
1835 /* is all this really necessary? */
1836 ap->ops->dev_select(ap, 0);
1837 if (dev1)
1838 ap->ops->dev_select(ap, 1);
1839 if (dev0)
1840 ap->ops->dev_select(ap, 0);
1841}
1842
1843/**
0cba632b
JG		 1844 * ata_bus_edd - Issue EXECUTE DEVICE DIAGNOSTIC command.
1845 * @ap: Port to reset and probe
1846 *
1847 * Use the EXECUTE DEVICE DIAGNOSTIC command to reset and
1848 * probe the bus. Not often used these days.
1da177e4
LT		 1849 *
1850 * LOCKING:
0cba632b 1851 * PCI/etc. bus probe sem.
e5338254 1852 * Obtains host_set lock.
1da177e4
LT		 1853 *
1854 */
1855
1856static unsigned int ata_bus_edd(struct ata_port *ap)
1857{
1858 struct ata_taskfile tf;
e5338254 1859 unsigned long flags;
1da177e4
LT		 1860
1861 /* set up execute-device-diag (bus reset) taskfile */
1862 /* also, take interrupts to a known state (disabled) */
1863 DPRINTK("execute-device-diag\n");
1864 ata_tf_init(ap, &tf, 0);
1865 tf.ctl |= ATA_NIEN;
1866 tf.command = ATA_CMD_EDD;
1867 tf.protocol = ATA_PROT_NODATA;
1868
1869 /* do bus reset */
e5338254 1870 spin_lock_irqsave(&ap->host_set->lock, flags);
1da177e4 1871 ata_tf_to_host(ap, &tf);
e5338254 1872 spin_unlock_irqrestore(&ap->host_set->lock, flags);
1da177e4
LT		 1873
1874 /* spec says at least 2ms. but who knows with those
1875 * crazy ATAPI devices...
1876 */
1877 msleep(150);
1878
1879 return ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
1880}
1881
1882static unsigned int ata_bus_softreset(struct ata_port *ap,
1883 unsigned int devmask)
1884{
1885 struct ata_ioports *ioaddr = &ap->ioaddr;
1886
1887 DPRINTK("ata%u: bus reset via SRST\n", ap->id);
1888
1889 /* software reset. causes dev0 to be selected */
1890 if (ap->flags & ATA_FLAG_MMIO) {
1891 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
1892 udelay(20); /* FIXME: flush */
1893 writeb(ap->ctl | ATA_SRST, (void __iomem *) ioaddr->ctl_addr);
1894 udelay(20); /* FIXME: flush */
1895 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
1896 } else {
1897 outb(ap->ctl, ioaddr->ctl_addr);
1898 udelay(10);
1899 outb(ap->ctl | ATA_SRST, ioaddr->ctl_addr);
1900 udelay(10);
1901 outb(ap->ctl, ioaddr->ctl_addr);
1902 }
1903
1904 /* spec mandates ">= 2ms" before checking status.
1905 * We wait 150ms, because that was the magic delay used for
1906 * ATAPI devices in Hale Landis's ATADRVR, for the period of time
1907 * between when the ATA command register is written, and then
1908 * status is checked. Because waiting for "a while" before
1909 * checking status is fine, post SRST, we perform this magic
1910 * delay here as well.
1911 */
1912 msleep(150);
1913
1914 ata_bus_post_reset(ap, devmask);
1915
1916 return 0;
1917}
1918
1919/**
1920 * ata_bus_reset - reset host port and associated ATA channel
1921 * @ap: port to reset
1922 *
1923 * This is typically the first time we actually start issuing
1924 * commands to the ATA channel. We wait for BSY to clear, then
1925 * issue EXECUTE DEVICE DIAGNOSTIC command, polling for its
1926 * result. Determine what devices, if any, are on the channel
1927 * by looking at the device 0/1 error register. Look at the signature
1928 * stored in each device's taskfile registers, to determine if
1929 * the device is ATA or ATAPI.
1930 *
1931 * LOCKING:
0cba632b
JG		 1932 * PCI/etc. bus probe sem.
1933 * Obtains host_set lock.
1da177e4
LT		 1934 *
1935 * SIDE EFFECTS:
1936 * Sets ATA_FLAG_PORT_DISABLED if bus reset fails.
1937 */
1938
1939void ata_bus_reset(struct ata_port *ap)
1940{
1941 struct ata_ioports *ioaddr = &ap->ioaddr;
1942 unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
1943 u8 err;
1944 unsigned int dev0, dev1 = 0, rc = 0, devmask = 0;
1945
1946 DPRINTK("ENTER, host %u, port %u\n", ap->id, ap->port_no);
1947
1948 /* determine if device 0/1 are present */
1949 if (ap->flags & ATA_FLAG_SATA_RESET)
1950 dev0 = 1;
1951 else {
1952 dev0 = ata_devchk(ap, 0);
1953 if (slave_possible)
1954 dev1 = ata_devchk(ap, 1);
1955 }
1956
1957 if (dev0)
1958 devmask |= (1 << 0);
1959 if (dev1)
1960 devmask |= (1 << 1);
1961
1962 /* select device 0 again */
1963 ap->ops->dev_select(ap, 0);
1964
1965 /* issue bus reset */
1966 if (ap->flags & ATA_FLAG_SRST)
1967 rc = ata_bus_softreset(ap, devmask);
1968 else if ((ap->flags & ATA_FLAG_SATA_RESET) == 0) {
1969 /* set up device control */
1970 if (ap->flags & ATA_FLAG_MMIO)
1971 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
1972 else
1973 outb(ap->ctl, ioaddr->ctl_addr);
1974 rc = ata_bus_edd(ap);
1975 }
1976
1977 if (rc)
1978 goto err_out;
1979
1980 /*
1981 * determine by signature whether we have ATA or ATAPI devices
1982 */
b4dc7623 1983 ap->device[0].class = ata_dev_try_classify(ap, 0, &err);
1da177e4 1984 if ((slave_possible) && (err != 0x81))
b4dc7623 1985 ap->device[1].class = ata_dev_try_classify(ap, 1, &err);
1da177e4
LT		 1986
1987 /* re-enable interrupts */
1988 if (ap->ioaddr.ctl_addr) /* FIXME: hack. create a hook instead */
1989 ata_irq_on(ap);
1990
1991 /* is double-select really necessary? */
1992 if (ap->device[1].class != ATA_DEV_NONE)
1993 ap->ops->dev_select(ap, 1);
1994 if (ap->device[0].class != ATA_DEV_NONE)
1995 ap->ops->dev_select(ap, 0);
1996
1997 /* if no devices were detected, disable this port */
1998 if ((ap->device[0].class == ATA_DEV_NONE) &&
1999 (ap->device[1].class == ATA_DEV_NONE))
2000 goto err_out;
2001
2002 if (ap->flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST)) {
2003 /* set up device control for ATA_FLAG_SATA_RESET */
2004 if (ap->flags & ATA_FLAG_MMIO)
2005 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
2006 else
2007 outb(ap->ctl, ioaddr->ctl_addr);
2008 }
2009
2010 DPRINTK("EXIT\n");
2011 return;
2012
2013err_out:
2014 printk(KERN_ERR "ata%u: disabling port\n", ap->id);
2015 ap->ops->port_disable(ap);
2016
2017 DPRINTK("EXIT\n");
2018}
2019
7a7921e8
TH		 2020static int sata_phy_resume(struct ata_port *ap)
2021{
2022 unsigned long timeout = jiffies + (HZ * 5);
2023 u32 sstatus;
2024
2025 scr_write_flush(ap, SCR_CONTROL, 0x300);
2026
2027 /* Wait for phy to become ready, if necessary. */
2028 do {
2029 msleep(200);
2030 sstatus = scr_read(ap, SCR_STATUS);
2031 if ((sstatus & 0xf) != 1)
2032 return 0;
2033 } while (time_before(jiffies, timeout));
2034
2035 return -1;
2036}
2037
8a19ac89
TH		 2038/**
2039 * ata_std_probeinit - initialize probing
2040 * @ap: port to be probed
2041 *
2042 * @ap is about to be probed. Initialize it. This function is
2043 * to be used as standard callback for ata_drive_probe_reset().
3a39746a
TH		 2044 *
2045 * NOTE!!! Do not use this function as probeinit if a low level
2046 * driver implements only hardreset. Just pass NULL as probeinit
2047 * in that case. Using this function is probably okay but doing
2048 * so makes reset sequence different from the original
2049 * ->phy_reset implementation and Jeff nervous. :-P
8a19ac89
TH		 2050 */
2051extern void ata_std_probeinit(struct ata_port *ap)
2052{
3a39746a 2053 if (ap->flags & ATA_FLAG_SATA && ap->ops->scr_read) {
8a19ac89 2054 sata_phy_resume(ap);
3a39746a
TH		 2055 if (sata_dev_present(ap))
2056 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
2057 }
8a19ac89
TH		 2058}
2059
c2bd5804
TH		 2060/**
2061 * ata_std_softreset - reset host port via ATA SRST
2062 * @ap: port to reset
2063 * @verbose: fail verbosely
2064 * @classes: resulting classes of attached devices
2065 *
2066 * Reset host port using ATA SRST. This function is to be used
2067 * as standard callback for ata_drive_*_reset() functions.
2068 *
2069 * LOCKING:
2070 * Kernel thread context (may sleep)
2071 *
2072 * RETURNS:
2073 * 0 on success, -errno otherwise.
2074 */
2075int ata_std_softreset(struct ata_port *ap, int verbose, unsigned int *classes)
2076{
2077 unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
2078 unsigned int devmask = 0, err_mask;
2079 u8 err;
2080
2081 DPRINTK("ENTER\n");
2082
3a39746a
TH		 2083 if (ap->ops->scr_read && !sata_dev_present(ap)) {
2084 classes[0] = ATA_DEV_NONE;
2085 goto out;
2086 }
2087
c2bd5804
TH		 2088 /* determine if device 0/1 are present */
2089 if (ata_devchk(ap, 0))
2090 devmask |= (1 << 0);
2091 if (slave_possible && ata_devchk(ap, 1))
2092 devmask |= (1 << 1);
2093
c2bd5804
TH		 2094 /* select device 0 again */
2095 ap->ops->dev_select(ap, 0);
2096
2097 /* issue bus reset */
2098 DPRINTK("about to softreset, devmask=%x\n", devmask);
2099 err_mask = ata_bus_softreset(ap, devmask);
2100 if (err_mask) {
2101 if (verbose)
2102 printk(KERN_ERR "ata%u: SRST failed (err_mask=0x%x)\n",
2103 ap->id, err_mask);
2104 else
2105 DPRINTK("EXIT, softreset failed (err_mask=0x%x)\n",
2106 err_mask);
2107 return -EIO;
2108 }
2109
2110 /* determine by signature whether we have ATA or ATAPI devices */
2111 classes[0] = ata_dev_try_classify(ap, 0, &err);
2112 if (slave_possible && err != 0x81)
2113 classes[1] = ata_dev_try_classify(ap, 1, &err);
2114
3a39746a 2115 out:
c2bd5804
TH		 2116 DPRINTK("EXIT, classes[0]=%u [1]=%u\n", classes[0], classes[1]);
2117 return 0;
2118}
2119
2120/**
2121 * sata_std_hardreset - reset host port via SATA phy reset
2122 * @ap: port to reset
2123 * @verbose: fail verbosely
2124 * @class: resulting class of attached device
2125 *
2126 * SATA phy-reset host port using DET bits of SControl register.
2127 * This function is to be used as standard callback for
2128 * ata_drive_*_reset().
2129 *
2130 * LOCKING:
2131 * Kernel thread context (may sleep)
2132 *
2133 * RETURNS:
2134 * 0 on success, -errno otherwise.
2135 */
2136int sata_std_hardreset(struct ata_port *ap, int verbose, unsigned int *class)
2137{
c2bd5804
TH		 2138 DPRINTK("ENTER\n");
2139
2140 /* Issue phy wake/reset */
2141 scr_write_flush(ap, SCR_CONTROL, 0x301);
2142
2143 /*
2144 * Couldn't find anything in SATA I/II specs, but AHCI-1.1
2145 * 10.4.2 says at least 1 ms.
2146 */
2147 msleep(1);
2148
7a7921e8
TH		 2149 /* Bring phy back */
2150 sata_phy_resume(ap);
c2bd5804 2151
c2bd5804
TH		 2152 /* TODO: phy layer with polling, timeouts, etc. */
2153 if (!sata_dev_present(ap)) {
2154 *class = ATA_DEV_NONE;
2155 DPRINTK("EXIT, link offline\n");
2156 return 0;
2157 }
2158
2159 if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) {
2160 if (verbose)
2161 printk(KERN_ERR "ata%u: COMRESET failed "
2162 "(device not ready)\n", ap->id);
2163 else
2164 DPRINTK("EXIT, device not ready\n");
2165 return -EIO;
2166 }
2167
3a39746a
TH		 2168 ap->ops->dev_select(ap, 0); /* probably unnecessary */
2169
c2bd5804
TH		 2170 *class = ata_dev_try_classify(ap, 0, NULL);
2171
2172 DPRINTK("EXIT, class=%u\n", *class);
2173 return 0;
2174}
2175
2176/**
2177 * ata_std_postreset - standard postreset callback
2178 * @ap: the target ata_port
2179 * @classes: classes of attached devices
2180 *
2181 * This function is invoked after a successful reset. Note that
2182 * the device might have been reset more than once using
2183 * different reset methods before postreset is invoked.
c2bd5804
TH		 2184 *
2185 * This function is to be used as standard callback for
2186 * ata_drive_*_reset().
2187 *
2188 * LOCKING:
2189 * Kernel thread context (may sleep)
2190 */
2191void ata_std_postreset(struct ata_port *ap, unsigned int *classes)
2192{
2193 DPRINTK("ENTER\n");
2194
56497bd5 2195 /* set cable type if it isn't already set */
c2bd5804
TH		 2196 if (ap->cbl == ATA_CBL_NONE && ap->flags & ATA_FLAG_SATA)
2197 ap->cbl = ATA_CBL_SATA;
2198
2199 /* print link status */
2200 if (ap->cbl == ATA_CBL_SATA)
2201 sata_print_link_status(ap);
2202
3a39746a
TH		 2203 /* re-enable interrupts */
2204 if (ap->ioaddr.ctl_addr) /* FIXME: hack. create a hook instead */
2205 ata_irq_on(ap);
c2bd5804
TH		 2206
2207 /* is double-select really necessary? */
2208 if (classes[0] != ATA_DEV_NONE)
2209 ap->ops->dev_select(ap, 1);
2210 if (classes[1] != ATA_DEV_NONE)
2211 ap->ops->dev_select(ap, 0);
2212
3a39746a
TH		 2213 /* bail out if no device is present */
2214 if (classes[0] == ATA_DEV_NONE && classes[1] == ATA_DEV_NONE) {
2215 DPRINTK("EXIT, no device\n");
2216 return;
2217 }
2218
2219 /* set up device control */
2220 if (ap->ioaddr.ctl_addr) {
2221 if (ap->flags & ATA_FLAG_MMIO)
2222 writeb(ap->ctl, (void __iomem *) ap->ioaddr.ctl_addr);
2223 else
2224 outb(ap->ctl, ap->ioaddr.ctl_addr);
2225 }
c2bd5804
TH		 2226
2227 DPRINTK("EXIT\n");
2228}
2229
2230/**
2231 * ata_std_probe_reset - standard probe reset method
2232 * @ap: prot to perform probe-reset
2233 * @classes: resulting classes of attached devices
2234 *
2235 * The stock off-the-shelf ->probe_reset method.
2236 *
2237 * LOCKING:
2238 * Kernel thread context (may sleep)
2239 *
2240 * RETURNS:
2241 * 0 on success, -errno otherwise.
2242 */
2243int ata_std_probe_reset(struct ata_port *ap, unsigned int *classes)
2244{
2245 ata_reset_fn_t hardreset;
2246
2247 hardreset = NULL;
b911fc3a 2248 if (ap->flags & ATA_FLAG_SATA && ap->ops->scr_read)
c2bd5804
TH		 2249 hardreset = sata_std_hardreset;
2250
8a19ac89 2251 return ata_drive_probe_reset(ap, ata_std_probeinit,
7944ea95 2252 ata_std_softreset, hardreset,
c2bd5804
TH		 2253 ata_std_postreset, classes);
2254}
2255
a62c0fc5
TH		 2256static int do_probe_reset(struct ata_port *ap, ata_reset_fn_t reset,
2257 ata_postreset_fn_t postreset,
2258 unsigned int *classes)
2259{
2260 int i, rc;
2261
2262 for (i = 0; i < ATA_MAX_DEVICES; i++)
2263 classes[i] = ATA_DEV_UNKNOWN;
2264
2265 rc = reset(ap, 0, classes);
2266 if (rc)
2267 return rc;
2268
2269 /* If any class isn't ATA_DEV_UNKNOWN, consider classification
2270 * is complete and convert all ATA_DEV_UNKNOWN to
2271 * ATA_DEV_NONE.
2272 */
2273 for (i = 0; i < ATA_MAX_DEVICES; i++)
2274 if (classes[i] != ATA_DEV_UNKNOWN)
2275 break;
2276
2277 if (i < ATA_MAX_DEVICES)
2278 for (i = 0; i < ATA_MAX_DEVICES; i++)
2279 if (classes[i] == ATA_DEV_UNKNOWN)
2280 classes[i] = ATA_DEV_NONE;
2281
2282 if (postreset)
2283 postreset(ap, classes);
2284
2285 return classes[0] != ATA_DEV_UNKNOWN ? 0 : -ENODEV;
2286}
2287
2288/**
2289 * ata_drive_probe_reset - Perform probe reset with given methods
2290 * @ap: port to reset
7944ea95 2291 * @probeinit: probeinit method (can be NULL)
a62c0fc5
TH		 2292 * @softreset: softreset method (can be NULL)
2293 * @hardreset: hardreset method (can be NULL)
2294 * @postreset: postreset method (can be NULL)
2295 * @classes: resulting classes of attached devices
2296 *
2297 * Reset the specified port and classify attached devices using
2298 * given methods. This function prefers softreset but tries all
2299 * possible reset sequences to reset and classify devices. This
2300 * function is intended to be used for constructing ->probe_reset
2301 * callback by low level drivers.
2302 *
2303 * Reset methods should follow the following rules.
2304 *
2305 * - Return 0 on sucess, -errno on failure.
2306 * - If classification is supported, fill classes[] with
2307 * recognized class codes.
2308 * - If classification is not supported, leave classes[] alone.
2309 * - If verbose is non-zero, print error message on failure;
2310 * otherwise, shut up.
2311 *
2312 * LOCKING:
2313 * Kernel thread context (may sleep)
2314 *
2315 * RETURNS:
2316 * 0 on success, -EINVAL if no reset method is avaliable, -ENODEV
2317 * if classification fails, and any error code from reset
2318 * methods.
2319 */
7944ea95 2320int ata_drive_probe_reset(struct ata_port *ap, ata_probeinit_fn_t probeinit,
a62c0fc5
TH		 2321 ata_reset_fn_t softreset, ata_reset_fn_t hardreset,
2322 ata_postreset_fn_t postreset, unsigned int *classes)
2323{
2324 int rc = -EINVAL;
2325
7944ea95
TH		 2326 if (probeinit)
2327 probeinit(ap);
2328
a62c0fc5
TH		 2329 if (softreset) {
2330 rc = do_probe_reset(ap, softreset, postreset, classes);
2331 if (rc == 0)
2332 return 0;
2333 }
2334
2335 if (!hardreset)
2336 return rc;
2337
2338 rc = do_probe_reset(ap, hardreset, postreset, classes);
2339 if (rc == 0 || rc != -ENODEV)
2340 return rc;
2341
2342 if (softreset)
2343 rc = do_probe_reset(ap, softreset, postreset, classes);
2344
2345 return rc;
2346}
2347
623a3128
TH		 2348/**
2349 * ata_dev_same_device - Determine whether new ID matches configured device
2350 * @ap: port on which the device to compare against resides
2351 * @dev: device to compare against
2352 * @new_class: class of the new device
2353 * @new_id: IDENTIFY page of the new device
2354 *
2355 * Compare @new_class and @new_id against @dev and determine
2356 * whether @dev is the device indicated by @new_class and
2357 * @new_id.
2358 *
2359 * LOCKING:
2360 * None.
2361 *
2362 * RETURNS:
2363 * 1 if @dev matches @new_class and @new_id, 0 otherwise.
2364 */
2365static int ata_dev_same_device(struct ata_port *ap, struct ata_device *dev,
2366 unsigned int new_class, const u16 *new_id)
2367{
2368 const u16 *old_id = dev->id;
2369 unsigned char model[2][41], serial[2][21];
2370 u64 new_n_sectors;
2371
2372 if (dev->class != new_class) {
2373 printk(KERN_INFO
2374 "ata%u: dev %u class mismatch %d != %d\n",
2375 ap->id, dev->devno, dev->class, new_class);
2376 return 0;
2377 }
2378
2379 ata_id_c_string(old_id, model[0], ATA_ID_PROD_OFS, sizeof(model[0]));
2380 ata_id_c_string(new_id, model[1], ATA_ID_PROD_OFS, sizeof(model[1]));
2381 ata_id_c_string(old_id, serial[0], ATA_ID_SERNO_OFS, sizeof(serial[0]));
2382 ata_id_c_string(new_id, serial[1], ATA_ID_SERNO_OFS, sizeof(serial[1]));
2383 new_n_sectors = ata_id_n_sectors(new_id);
2384
2385 if (strcmp(model[0], model[1])) {
2386 printk(KERN_INFO
2387 "ata%u: dev %u model number mismatch '%s' != '%s'\n",
2388 ap->id, dev->devno, model[0], model[1]);
2389 return 0;
2390 }
2391
2392 if (strcmp(serial[0], serial[1])) {
2393 printk(KERN_INFO
2394 "ata%u: dev %u serial number mismatch '%s' != '%s'\n",
2395 ap->id, dev->devno, serial[0], serial[1]);
2396 return 0;
2397 }
2398
2399 if (dev->class == ATA_DEV_ATA && dev->n_sectors != new_n_sectors) {
2400 printk(KERN_INFO
2401 "ata%u: dev %u n_sectors mismatch %llu != %llu\n",
2402 ap->id, dev->devno, (unsigned long long)dev->n_sectors,
2403 (unsigned long long)new_n_sectors);
2404 return 0;
2405 }
2406
2407 return 1;
2408}
2409
2410/**
2411 * ata_dev_revalidate - Revalidate ATA device
2412 * @ap: port on which the device to revalidate resides
2413 * @dev: device to revalidate
2414 * @post_reset: is this revalidation after reset?
2415 *
2416 * Re-read IDENTIFY page and make sure @dev is still attached to
2417 * the port.
2418 *
2419 * LOCKING:
2420 * Kernel thread context (may sleep)
2421 *
2422 * RETURNS:
2423 * 0 on success, negative errno otherwise
2424 */
2425int ata_dev_revalidate(struct ata_port *ap, struct ata_device *dev,
2426 int post_reset)
2427{
2428 unsigned int class;
2429 u16 *id;
2430 int rc;
2431
2432 if (!ata_dev_present(dev))
2433 return -ENODEV;
2434
2435 class = dev->class;
2436 id = NULL;
2437
2438 /* allocate & read ID data */
2439 rc = ata_dev_read_id(ap, dev, &class, post_reset, &id);
2440 if (rc)
2441 goto fail;
2442
2443 /* is the device still there? */
2444 if (!ata_dev_same_device(ap, dev, class, id)) {
2445 rc = -ENODEV;
2446 goto fail;
2447 }
2448
2449 kfree(dev->id);
2450 dev->id = id;
2451
2452 /* configure device according to the new ID */
2453 return ata_dev_configure(ap, dev, 0);
2454
2455 fail:
2456 printk(KERN_ERR "ata%u: dev %u revalidation failed (errno=%d)\n",
2457 ap->id, dev->devno, rc);
2458 kfree(id);
2459 return rc;
2460}
2461
057ace5e
JG		 2462static void ata_pr_blacklisted(const struct ata_port *ap,
2463 const struct ata_device *dev)
1da177e4
LT		 2464{
2465 printk(KERN_WARNING "ata%u: dev %u is on DMA blacklist, disabling DMA\n",
2466 ap->id, dev->devno);
2467}
2468
98ac62de 2469static const char * const ata_dma_blacklist [] = {
1da177e4
LT		 2470 "WDC AC11000H",
2471 "WDC AC22100H",
2472 "WDC AC32500H",
2473 "WDC AC33100H",
2474 "WDC AC31600H",
2475 "WDC AC32100H",
2476 "WDC AC23200L",
2477 "Compaq CRD-8241B",
2478 "CRD-8400B",
2479 "CRD-8480B",
2480 "CRD-8482B",
2481 "CRD-84",
2482 "SanDisk SDP3B",
2483 "SanDisk SDP3B-64",
2484 "SANYO CD-ROM CRD",
2485 "HITACHI CDR-8",
2486 "HITACHI CDR-8335",
2487 "HITACHI CDR-8435",
2488 "Toshiba CD-ROM XM-6202B",
e922256a 2489 "TOSHIBA CD-ROM XM-1702BC",
1da177e4
LT		 2490 "CD-532E-A",
2491 "E-IDE CD-ROM CR-840",
2492 "CD-ROM Drive/F5A",
2493 "WPI CDD-820",
2494 "SAMSUNG CD-ROM SC-148C",
2495 "SAMSUNG CD-ROM SC",
2496 "SanDisk SDP3B-64",
1da177e4
LT		 2497 "ATAPI CD-ROM DRIVE 40X MAXIMUM",
2498 "_NEC DV5800A",
2499};
2500
057ace5e 2501static int ata_dma_blacklisted(const struct ata_device *dev)
1da177e4 2502{
2e02671d 2503 unsigned char model_num[41];
1da177e4
LT		 2504 int i;
2505
6a62a04d 2506 ata_id_c_string(dev->id, model_num, ATA_ID_PROD_OFS, sizeof(model_num));
1da177e4
LT		 2507
2508 for (i = 0; i < ARRAY_SIZE(ata_dma_blacklist); i++)
2e02671d 2509 if (!strcmp(ata_dma_blacklist[i], model_num))
1da177e4
LT		 2510 return 1;
2511
2512 return 0;
2513}
2514
057ace5e 2515static unsigned int ata_get_mode_mask(const struct ata_port *ap, int shift)
1da177e4 2516{
057ace5e 2517 const struct ata_device *master, *slave;
1da177e4
LT		 2518 unsigned int mask;
2519
2520 master = &ap->device[0];
2521 slave = &ap->device[1];
2522
a4631474 2523 WARN_ON(!ata_dev_present(master) && !ata_dev_present(slave));
1da177e4
LT		 2524
2525 if (shift == ATA_SHIFT_UDMA) {
2526 mask = ap->udma_mask;
2527 if (ata_dev_present(master)) {
2528 mask &= (master->id[ATA_ID_UDMA_MODES] & 0xff);
057ace5e 2529 if (ata_dma_blacklisted(master)) {
1da177e4
LT		 2530 mask = 0;
2531 ata_pr_blacklisted(ap, master);
2532 }
2533 }
2534 if (ata_dev_present(slave)) {
2535 mask &= (slave->id[ATA_ID_UDMA_MODES] & 0xff);
057ace5e 2536 if (ata_dma_blacklisted(slave)) {
1da177e4
LT		 2537 mask = 0;
2538 ata_pr_blacklisted(ap, slave);
2539 }
2540 }
2541 }
2542 else if (shift == ATA_SHIFT_MWDMA) {
2543 mask = ap->mwdma_mask;
2544 if (ata_dev_present(master)) {
2545 mask &= (master->id[ATA_ID_MWDMA_MODES] & 0x07);
057ace5e 2546 if (ata_dma_blacklisted(master)) {
1da177e4
LT		 2547 mask = 0;
2548 ata_pr_blacklisted(ap, master);
2549 }
2550 }
2551 if (ata_dev_present(slave)) {
2552 mask &= (slave->id[ATA_ID_MWDMA_MODES] & 0x07);
057ace5e 2553 if (ata_dma_blacklisted(slave)) {
1da177e4
LT		 2554 mask = 0;
2555 ata_pr_blacklisted(ap, slave);
2556 }
2557 }
2558 }
2559 else if (shift == ATA_SHIFT_PIO) {
2560 mask = ap->pio_mask;
2561 if (ata_dev_present(master)) {
2562 /* spec doesn't return explicit support for
2563 * PIO0-2, so we fake it
2564 */
2565 u16 tmp_mode = master->id[ATA_ID_PIO_MODES] & 0x03;
2566 tmp_mode <<= 3;
2567 tmp_mode |= 0x7;
2568 mask &= tmp_mode;
2569 }
2570 if (ata_dev_present(slave)) {
2571 /* spec doesn't return explicit support for
2572 * PIO0-2, so we fake it
2573 */
2574 u16 tmp_mode = slave->id[ATA_ID_PIO_MODES] & 0x03;
2575 tmp_mode <<= 3;
2576 tmp_mode |= 0x7;
2577 mask &= tmp_mode;
2578 }
2579 }
2580 else {
2581 mask = 0xffffffff; /* shut up compiler warning */
2582 BUG();
2583 }
2584
2585 return mask;
2586}
2587
2588/* find greatest bit */
2589static int fgb(u32 bitmap)
2590{
2591 unsigned int i;
2592 int x = -1;
2593
2594 for (i = 0; i < 32; i++)
2595 if (bitmap & (1 << i))
2596 x = i;
2597
2598 return x;
2599}
2600
2601/**
2602 * ata_choose_xfer_mode - attempt to find best transfer mode
2603 * @ap: Port for which an xfer mode will be selected
2604 * @xfer_mode_out: (output) SET FEATURES - XFER MODE code
2605 * @xfer_shift_out: (output) bit shift that selects this mode
2606 *
0cba632b
JG		 2607 * Based on host and device capabilities, determine the
2608 * maximum transfer mode that is amenable to all.
2609 *
1da177e4 2610 * LOCKING:
0cba632b 2611 * PCI/etc. bus probe sem.
1da177e4
LT		 2612 *
2613 * RETURNS:
2614 * Zero on success, negative on error.
2615 */
2616
057ace5e 2617static int ata_choose_xfer_mode(const struct ata_port *ap,
1da177e4
LT		 2618 u8 *xfer_mode_out,
2619 unsigned int *xfer_shift_out)
2620{
2621 unsigned int mask, shift;
2622 int x, i;
2623
2624 for (i = 0; i < ARRAY_SIZE(xfer_mode_classes); i++) {
2625 shift = xfer_mode_classes[i].shift;
2626 mask = ata_get_mode_mask(ap, shift);
2627
2628 x = fgb(mask);
2629 if (x >= 0) {
2630 *xfer_mode_out = xfer_mode_classes[i].base + x;
2631 *xfer_shift_out = shift;
2632 return 0;
2633 }
2634 }
2635
2636 return -1;
2637}
2638
2639/**
2640 * ata_dev_set_xfermode - Issue SET FEATURES - XFER MODE command
2641 * @ap: Port associated with device @dev
2642 * @dev: Device to which command will be sent
2643 *
780a87f7
JG		 2644 * Issue SET FEATURES - XFER MODE command to device @dev
2645 * on port @ap.
2646 *
1da177e4 2647 * LOCKING:
0cba632b 2648 * PCI/etc. bus probe sem.
1da177e4
LT		 2649 */
2650
2651static void ata_dev_set_xfermode(struct ata_port *ap, struct ata_device *dev)
2652{
a0123703 2653 struct ata_taskfile tf;
1da177e4
LT		 2654
2655 /* set up set-features taskfile */
2656 DPRINTK("set features - xfer mode\n");
2657
a0123703
TH		 2658 ata_tf_init(ap, &tf, dev->devno);
2659 tf.command = ATA_CMD_SET_FEATURES;
2660 tf.feature = SETFEATURES_XFER;
2661 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
2662 tf.protocol = ATA_PROT_NODATA;
2663 tf.nsect = dev->xfer_mode;
1da177e4 2664
a0123703
TH		 2665 if (ata_exec_internal(ap, dev, &tf, DMA_NONE, NULL, 0)) {
2666 printk(KERN_ERR "ata%u: failed to set xfermode, disabled\n",
2667 ap->id);
1da177e4 2668 ata_port_disable(ap);
a0123703 2669 }
1da177e4
LT		 2670
2671 DPRINTK("EXIT\n");
2672}
2673
8bf62ece
AL		 2674/**
2675 * ata_dev_init_params - Issue INIT DEV PARAMS command
2676 * @ap: Port associated with device @dev
2677 * @dev: Device to which command will be sent
2678 *
2679 * LOCKING:
6aff8f1f
TH		 2680 * Kernel thread context (may sleep)
2681 *
2682 * RETURNS:
2683 * 0 on success, AC_ERR_* mask otherwise.
8bf62ece
AL		 2684 */
2685
6aff8f1f
TH		 2686static unsigned int ata_dev_init_params(struct ata_port *ap,
2687 struct ata_device *dev)
8bf62ece 2688{
a0123703 2689 struct ata_taskfile tf;
6aff8f1f 2690 unsigned int err_mask;
8bf62ece
AL		 2691 u16 sectors = dev->id[6];
2692 u16 heads = dev->id[3];
2693
2694 /* Number of sectors per track 1-255. Number of heads 1-16 */
2695 if (sectors < 1 || sectors > 255 || heads < 1 || heads > 16)
6aff8f1f 2696 return 0;
8bf62ece
AL		 2697
2698 /* set up init dev params taskfile */
2699 DPRINTK("init dev params \n");
2700
a0123703
TH		 2701 ata_tf_init(ap, &tf, dev->devno);
2702 tf.command = ATA_CMD_INIT_DEV_PARAMS;
2703 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
2704 tf.protocol = ATA_PROT_NODATA;
2705 tf.nsect = sectors;
2706 tf.device |= (heads - 1) & 0x0f; /* max head = num. of heads - 1 */
8bf62ece 2707
6aff8f1f 2708 err_mask = ata_exec_internal(ap, dev, &tf, DMA_NONE, NULL, 0);
8bf62ece 2709
6aff8f1f
TH		 2710 DPRINTK("EXIT, err_mask=%x\n", err_mask);
2711 return err_mask;
8bf62ece
AL		 2712}
2713
1da177e4 2714/**
0cba632b
JG		 2715 * ata_sg_clean - Unmap DMA memory associated with command
2716 * @qc: Command containing DMA memory to be released
2717 *
2718 * Unmap all mapped DMA memory associated with this command.
1da177e4
LT		 2719 *
2720 * LOCKING:
0cba632b 2721 * spin_lock_irqsave(host_set lock)
1da177e4
LT		 2722 */
2723
2724static void ata_sg_clean(struct ata_queued_cmd *qc)
2725{
2726 struct ata_port *ap = qc->ap;
cedc9a47 2727 struct scatterlist *sg = qc->__sg;
1da177e4 2728 int dir = qc->dma_dir;
cedc9a47 2729 void *pad_buf = NULL;
1da177e4 2730
a4631474
TH		 2731 WARN_ON(!(qc->flags & ATA_QCFLAG_DMAMAP));
2732 WARN_ON(sg == NULL);
1da177e4
LT		 2733
2734 if (qc->flags & ATA_QCFLAG_SINGLE)
f131883e 2735 WARN_ON(qc->n_elem > 1);
1da177e4 2736
2c13b7ce 2737 VPRINTK("unmapping %u sg elements\n", qc->n_elem);
1da177e4 2738
cedc9a47
JG		 2739 /* if we padded the buffer out to 32-bit bound, and data
2740 * xfer direction is from-device, we must copy from the
2741 * pad buffer back into the supplied buffer
2742 */
2743 if (qc->pad_len && !(qc->tf.flags & ATA_TFLAG_WRITE))
2744 pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
2745
2746 if (qc->flags & ATA_QCFLAG_SG) {
e1410f2d
JG		 2747 if (qc->n_elem)
2748 dma_unmap_sg(ap->host_set->dev, sg, qc->n_elem, dir);
cedc9a47
JG		 2749 /* restore last sg */
2750 sg[qc->orig_n_elem - 1].length += qc->pad_len;
2751 if (pad_buf) {
2752 struct scatterlist *psg = &qc->pad_sgent;
2753 void *addr = kmap_atomic(psg->page, KM_IRQ0);
2754 memcpy(addr + psg->offset, pad_buf, qc->pad_len);
dfa15988 2755 kunmap_atomic(addr, KM_IRQ0);
cedc9a47
JG		 2756 }
2757 } else {
2e242fa9 2758 if (qc->n_elem)
e1410f2d
JG		 2759 dma_unmap_single(ap->host_set->dev,
2760 sg_dma_address(&sg[0]), sg_dma_len(&sg[0]),
2761 dir);
cedc9a47
JG		 2762 /* restore sg */
2763 sg->length += qc->pad_len;
2764 if (pad_buf)
2765 memcpy(qc->buf_virt + sg->length - qc->pad_len,
2766 pad_buf, qc->pad_len);
2767 }
1da177e4
LT		 2768
2769 qc->flags &= ~ATA_QCFLAG_DMAMAP;
cedc9a47 2770 qc->__sg = NULL;
1da177e4
LT		 2771}
2772
2773/**
2774 * ata_fill_sg - Fill PCI IDE PRD table
2775 * @qc: Metadata associated with taskfile to be transferred
2776 *
780a87f7
JG		 2777 * Fill PCI IDE PRD (scatter-gather) table with segments
2778 * associated with the current disk command.
2779 *
1da177e4 2780 * LOCKING:
780a87f7 2781 * spin_lock_irqsave(host_set lock)
1da177e4
LT		 2782 *
2783 */
2784static void ata_fill_sg(struct ata_queued_cmd *qc)
2785{
1da177e4 2786 struct ata_port *ap = qc->ap;
cedc9a47
JG		 2787 struct scatterlist *sg;
2788 unsigned int idx;
1da177e4 2789
a4631474 2790 WARN_ON(qc->__sg == NULL);
f131883e 2791 WARN_ON(qc->n_elem == 0 && qc->pad_len == 0);
1da177e4
LT		 2792
2793 idx = 0;
cedc9a47 2794 ata_for_each_sg(sg, qc) {
1da177e4
LT		 2795 u32 addr, offset;
2796 u32 sg_len, len;
2797
2798 /* determine if physical DMA addr spans 64K boundary.
2799 * Note h/w doesn't support 64-bit, so we unconditionally
2800 * truncate dma_addr_t to u32.
2801 */
2802 addr = (u32) sg_dma_address(sg);
2803 sg_len = sg_dma_len(sg);
2804
2805 while (sg_len) {
2806 offset = addr & 0xffff;
2807 len = sg_len;
2808 if ((offset + sg_len) > 0x10000)
2809 len = 0x10000 - offset;
2810
2811 ap->prd[idx].addr = cpu_to_le32(addr);
2812 ap->prd[idx].flags_len = cpu_to_le32(len & 0xffff);
2813 VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", idx, addr, len);
2814
2815 idx++;
2816 sg_len -= len;
2817 addr += len;
2818 }
2819 }
2820
2821 if (idx)
2822 ap->prd[idx - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT);
2823}
2824/**
2825 * ata_check_atapi_dma - Check whether ATAPI DMA can be supported
2826 * @qc: Metadata associated with taskfile to check
2827 *
780a87f7
JG		 2828 * Allow low-level driver to filter ATA PACKET commands, returning
2829 * a status indicating whether or not it is OK to use DMA for the
2830 * supplied PACKET command.
2831 *
1da177e4 2832 * LOCKING:
0cba632b
JG		 2833 * spin_lock_irqsave(host_set lock)
2834 *
1da177e4
LT		 2835 * RETURNS: 0 when ATAPI DMA can be used
2836 * nonzero otherwise
2837 */
2838int ata_check_atapi_dma(struct ata_queued_cmd *qc)
2839{
2840 struct ata_port *ap = qc->ap;
2841 int rc = 0; /* Assume ATAPI DMA is OK by default */
2842
2843 if (ap->ops->check_atapi_dma)
2844 rc = ap->ops->check_atapi_dma(qc);
2845
2846 return rc;
2847}
2848/**
2849 * ata_qc_prep - Prepare taskfile for submission
2850 * @qc: Metadata associated with taskfile to be prepared
2851 *
780a87f7
JG		 2852 * Prepare ATA taskfile for submission.
2853 *
1da177e4
LT		 2854 * LOCKING:
2855 * spin_lock_irqsave(host_set lock)
2856 */
2857void ata_qc_prep(struct ata_queued_cmd *qc)
2858{
2859 if (!(qc->flags & ATA_QCFLAG_DMAMAP))
2860 return;
2861
2862 ata_fill_sg(qc);
2863}
2864
0cba632b
JG		 2865/**
2866 * ata_sg_init_one - Associate command with memory buffer
2867 * @qc: Command to be associated
2868 * @buf: Memory buffer
2869 * @buflen: Length of memory buffer, in bytes.
2870 *
2871 * Initialize the data-related elements of queued_cmd @qc
2872 * to point to a single memory buffer, @buf of byte length @buflen.
2873 *
2874 * LOCKING:
2875 * spin_lock_irqsave(host_set lock)
2876 */
2877
1da177e4
LT		 2878void ata_sg_init_one(struct ata_queued_cmd *qc, void *buf, unsigned int buflen)
2879{
2880 struct scatterlist *sg;
2881
2882 qc->flags |= ATA_QCFLAG_SINGLE;
2883
2884 memset(&qc->sgent, 0, sizeof(qc->sgent));
cedc9a47 2885 qc->__sg = &qc->sgent;
1da177e4 2886 qc->n_elem = 1;
cedc9a47 2887 qc->orig_n_elem = 1;
1da177e4
LT		 2888 qc->buf_virt = buf;
2889
cedc9a47 2890 sg = qc->__sg;
f0612bbc 2891 sg_init_one(sg, buf, buflen);
1da177e4
LT		 2892}
2893
0cba632b
JG		 2894/**
2895 * ata_sg_init - Associate command with scatter-gather table.
2896 * @qc: Command to be associated
2897 * @sg: Scatter-gather table.
2898 * @n_elem: Number of elements in s/g table.
2899 *
2900 * Initialize the data-related elements of queued_cmd @qc
2901 * to point to a scatter-gather table @sg, containing @n_elem
2902 * elements.
2903 *
2904 * LOCKING:
2905 * spin_lock_irqsave(host_set lock)
2906 */
2907
1da177e4
LT		 2908void ata_sg_init(struct ata_queued_cmd *qc, struct scatterlist *sg,
2909 unsigned int n_elem)
2910{
2911 qc->flags |= ATA_QCFLAG_SG;
cedc9a47 2912 qc->__sg = sg;
1da177e4 2913 qc->n_elem = n_elem;
cedc9a47 2914 qc->orig_n_elem = n_elem;
1da177e4
LT		 2915}
2916
2917/**
0cba632b
JG		 2918 * ata_sg_setup_one - DMA-map the memory buffer associated with a command.
2919 * @qc: Command with memory buffer to be mapped.
2920 *
2921 * DMA-map the memory buffer associated with queued_cmd @qc.
1da177e4
LT		 2922 *
2923 * LOCKING:
2924 * spin_lock_irqsave(host_set lock)
2925 *
2926 * RETURNS:
0cba632b 2927 * Zero on success, negative on error.
1da177e4
LT		 2928 */
2929
2930static int ata_sg_setup_one(struct ata_queued_cmd *qc)
2931{
2932 struct ata_port *ap = qc->ap;
2933 int dir = qc->dma_dir;
cedc9a47 2934 struct scatterlist *sg = qc->__sg;
1da177e4 2935 dma_addr_t dma_address;
2e242fa9 2936 int trim_sg = 0;
1da177e4 2937
cedc9a47
JG		 2938 /* we must lengthen transfers to end on a 32-bit boundary */
2939 qc->pad_len = sg->length & 3;
2940 if (qc->pad_len) {
2941 void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
2942 struct scatterlist *psg = &qc->pad_sgent;
2943
a4631474 2944 WARN_ON(qc->dev->class != ATA_DEV_ATAPI);
cedc9a47
JG		 2945
2946 memset(pad_buf, 0, ATA_DMA_PAD_SZ);
2947
2948 if (qc->tf.flags & ATA_TFLAG_WRITE)
2949 memcpy(pad_buf, qc->buf_virt + sg->length - qc->pad_len,
2950 qc->pad_len);
2951
2952 sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ);
2953 sg_dma_len(psg) = ATA_DMA_PAD_SZ;
2954 /* trim sg */
2955 sg->length -= qc->pad_len;
2e242fa9
TH		 2956 if (sg->length == 0)
2957 trim_sg = 1;
cedc9a47
JG		 2958
2959 DPRINTK("padding done, sg->length=%u pad_len=%u\n",
2960 sg->length, qc->pad_len);
2961 }
2962
2e242fa9
TH		 2963 if (trim_sg) {
2964 qc->n_elem--;
e1410f2d
JG		 2965 goto skip_map;
2966 }
2967
1da177e4 2968 dma_address = dma_map_single(ap->host_set->dev, qc->buf_virt,
32529e01 2969 sg->length, dir);
537a95d9
TH		 2970 if (dma_mapping_error(dma_address)) {
2971 /* restore sg */
2972 sg->length += qc->pad_len;
1da177e4 2973 return -1;
537a95d9 2974 }
1da177e4
LT		 2975
2976 sg_dma_address(sg) = dma_address;
32529e01 2977 sg_dma_len(sg) = sg->length;
1da177e4 2978
2e242fa9 2979skip_map:
1da177e4
LT		 2980 DPRINTK("mapped buffer of %d bytes for %s\n", sg_dma_len(sg),
2981 qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
2982
2983 return 0;
2984}
2985
2986/**
0cba632b
JG		 2987 * ata_sg_setup - DMA-map the scatter-gather table associated with a command.
2988 * @qc: Command with scatter-gather table to be mapped.
2989 *
2990 * DMA-map the scatter-gather table associated with queued_cmd @qc.
1da177e4
LT		 2991 *
2992 * LOCKING:
2993 * spin_lock_irqsave(host_set lock)
2994 *
2995 * RETURNS:
0cba632b 2996 * Zero on success, negative on error.
1da177e4
LT		 2997 *
2998 */
2999
3000static int ata_sg_setup(struct ata_queued_cmd *qc)
3001{
3002 struct ata_port *ap = qc->ap;
cedc9a47
JG		 3003 struct scatterlist *sg = qc->__sg;
3004 struct scatterlist *lsg = &sg[qc->n_elem - 1];
e1410f2d 3005 int n_elem, pre_n_elem, dir, trim_sg = 0;
1da177e4
LT		 3006
3007 VPRINTK("ENTER, ata%u\n", ap->id);
a4631474 3008 WARN_ON(!(qc->flags & ATA_QCFLAG_SG));
1da177e4 3009
cedc9a47
JG		 3010 /* we must lengthen transfers to end on a 32-bit boundary */
3011 qc->pad_len = lsg->length & 3;
3012 if (qc->pad_len) {
3013 void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
3014 struct scatterlist *psg = &qc->pad_sgent;
3015 unsigned int offset;
3016
a4631474 3017 WARN_ON(qc->dev->class != ATA_DEV_ATAPI);
cedc9a47
JG		 3018
3019 memset(pad_buf, 0, ATA_DMA_PAD_SZ);
3020
3021 /*
3022 * psg->page/offset are used to copy to-be-written
3023 * data in this function or read data in ata_sg_clean.
3024 */
3025 offset = lsg->offset + lsg->length - qc->pad_len;
3026 psg->page = nth_page(lsg->page, offset >> PAGE_SHIFT);
3027 psg->offset = offset_in_page(offset);
3028
3029 if (qc->tf.flags & ATA_TFLAG_WRITE) {
3030 void *addr = kmap_atomic(psg->page, KM_IRQ0);
3031 memcpy(pad_buf, addr + psg->offset, qc->pad_len);
dfa15988 3032 kunmap_atomic(addr, KM_IRQ0);
cedc9a47
JG		 3033 }
3034
3035 sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ);
3036 sg_dma_len(psg) = ATA_DMA_PAD_SZ;
3037 /* trim last sg */
3038 lsg->length -= qc->pad_len;
e1410f2d
JG		 3039 if (lsg->length == 0)
3040 trim_sg = 1;
cedc9a47
JG		 3041
3042 DPRINTK("padding done, sg[%d].length=%u pad_len=%u\n",
3043 qc->n_elem - 1, lsg->length, qc->pad_len);
3044 }
3045
e1410f2d
JG		 3046 pre_n_elem = qc->n_elem;
3047 if (trim_sg && pre_n_elem)
3048 pre_n_elem--;
3049
3050 if (!pre_n_elem) {
3051 n_elem = 0;
3052 goto skip_map;
3053 }
3054
1da177e4 3055 dir = qc->dma_dir;
e1410f2d 3056 n_elem = dma_map_sg(ap->host_set->dev, sg, pre_n_elem, dir);
537a95d9
TH		 3057 if (n_elem < 1) {
3058 /* restore last sg */
3059 lsg->length += qc->pad_len;
1da177e4 3060 return -1;
537a95d9 3061 }
1da177e4
LT		 3062
3063 DPRINTK("%d sg elements mapped\n", n_elem);
3064
e1410f2d 3065skip_map:
1da177e4
LT		 3066 qc->n_elem = n_elem;
3067
3068 return 0;
3069}
3070
40e8c82c
TH		 3071/**
3072 * ata_poll_qc_complete - turn irq back on and finish qc
3073 * @qc: Command to complete
8e8b77dd 3074 * @err_mask: ATA status register content
40e8c82c
TH		 3075 *
3076 * LOCKING:
3077 * None. (grabs host lock)
3078 */
3079
a22e2eb0 3080void ata_poll_qc_complete(struct ata_queued_cmd *qc)
40e8c82c
TH		 3081{
3082 struct ata_port *ap = qc->ap;
b8f6153e 3083 unsigned long flags;
40e8c82c 3084
b8f6153e 3085 spin_lock_irqsave(&ap->host_set->lock, flags);
40e8c82c
TH		 3086 ap->flags &= ~ATA_FLAG_NOINTR;
3087 ata_irq_on(ap);
a22e2eb0 3088 ata_qc_complete(qc);
b8f6153e 3089 spin_unlock_irqrestore(&ap->host_set->lock, flags);
40e8c82c
TH		 3090}
3091
1da177e4 3092/**
c893a3ae 3093 * ata_pio_poll - poll using PIO, depending on current state
6f0ef4fa 3094 * @ap: the target ata_port
1da177e4
LT		 3095 *
3096 * LOCKING:
0cba632b 3097 * None. (executing in kernel thread context)
1da177e4
LT		 3098 *
3099 * RETURNS:
6f0ef4fa 3100 * timeout value to use
1da177e4
LT		 3101 */
3102
3103static unsigned long ata_pio_poll(struct ata_port *ap)
3104{
c14b8331 3105 struct ata_queued_cmd *qc;
1da177e4 3106 u8 status;
14be71f4
AL		 3107 unsigned int poll_state = HSM_ST_UNKNOWN;
3108 unsigned int reg_state = HSM_ST_UNKNOWN;
14be71f4 3109
c14b8331 3110 qc = ata_qc_from_tag(ap, ap->active_tag);
a4631474 3111 WARN_ON(qc == NULL);
c14b8331 3112
14be71f4
AL		 3113 switch (ap->hsm_task_state) {
3114 case HSM_ST:
3115 case HSM_ST_POLL:
3116 poll_state = HSM_ST_POLL;
3117 reg_state = HSM_ST;
1da177e4 3118 break;
14be71f4
AL		 3119 case HSM_ST_LAST:
3120 case HSM_ST_LAST_POLL:
3121 poll_state = HSM_ST_LAST_POLL;
3122 reg_state = HSM_ST_LAST;
1da177e4
LT		 3123 break;
3124 default:
3125 BUG();
3126 break;
3127 }
3128
3129 status = ata_chk_status(ap);
3130 if (status & ATA_BUSY) {
3131 if (time_after(jiffies, ap->pio_task_timeout)) {
11a56d24 3132 qc->err_mask |= AC_ERR_TIMEOUT;
7c398335 3133 ap->hsm_task_state = HSM_ST_TMOUT;
1da177e4
LT		 3134 return 0;
3135 }
14be71f4 3136 ap->hsm_task_state = poll_state;
1da177e4
LT		 3137 return ATA_SHORT_PAUSE;
3138 }
3139
14be71f4 3140 ap->hsm_task_state = reg_state;
1da177e4
LT		 3141 return 0;
3142}
3143
3144/**
6f0ef4fa
RD		 3145 * ata_pio_complete - check if drive is busy or idle
3146 * @ap: the target ata_port
1da177e4
LT		 3147 *
3148 * LOCKING:
0cba632b 3149 * None. (executing in kernel thread context)
7fb6ec28
JG		 3150 *
3151 * RETURNS:
3152 * Non-zero if qc completed, zero otherwise.
1da177e4
LT		 3153 */
3154
7fb6ec28 3155static int ata_pio_complete (struct ata_port *ap)
1da177e4
LT		 3156{
3157 struct ata_queued_cmd *qc;
3158 u8 drv_stat;
3159
3160 /*
31433ea3
AC		 3161 * This is purely heuristic. This is a fast path. Sometimes when
3162 * we enter, BSY will be cleared in a chk-status or two. If not,
3163 * the drive is probably seeking or something. Snooze for a couple
3164 * msecs, then chk-status again. If still busy, fall back to
14be71f4 3165 * HSM_ST_POLL state.
1da177e4 3166 */
fe79e683
AL		 3167 drv_stat = ata_busy_wait(ap, ATA_BUSY, 10);
3168 if (drv_stat & ATA_BUSY) {
1da177e4 3169 msleep(2);
fe79e683
AL		 3170 drv_stat = ata_busy_wait(ap, ATA_BUSY, 10);
3171 if (drv_stat & ATA_BUSY) {
14be71f4 3172 ap->hsm_task_state = HSM_ST_LAST_POLL;
1da177e4 3173 ap->pio_task_timeout = jiffies + ATA_TMOUT_PIO;
7fb6ec28 3174 return 0;
1da177e4
LT		 3175 }
3176 }
3177
c14b8331 3178 qc = ata_qc_from_tag(ap, ap->active_tag);
a4631474 3179 WARN_ON(qc == NULL);
c14b8331 3180
1da177e4
LT		 3181 drv_stat = ata_wait_idle(ap);
3182 if (!ata_ok(drv_stat)) {
1c848984 3183 qc->err_mask |= __ac_err_mask(drv_stat);
14be71f4 3184 ap->hsm_task_state = HSM_ST_ERR;
7fb6ec28 3185 return 0;
1da177e4
LT		 3186 }
3187
14be71f4 3188 ap->hsm_task_state = HSM_ST_IDLE;
1da177e4 3189
a4631474 3190 WARN_ON(qc->err_mask);
a22e2eb0 3191 ata_poll_qc_complete(qc);
7fb6ec28
JG		 3192
3193 /* another command may start at this point */
3194
3195 return 1;
1da177e4
LT		 3196}
3197
0baab86b
EF		 3198
3199/**
c893a3ae 3200 * swap_buf_le16 - swap halves of 16-bit words in place
0baab86b
EF		 3201 * @buf: Buffer to swap
3202 * @buf_words: Number of 16-bit words in buffer.
3203 *
3204 * Swap halves of 16-bit words if needed to convert from
3205 * little-endian byte order to native cpu byte order, or
3206 * vice-versa.
3207 *
3208 * LOCKING:
6f0ef4fa 3209 * Inherited from caller.
0baab86b 3210 */
1da177e4
LT		 3211void swap_buf_le16(u16 *buf, unsigned int buf_words)
3212{
3213#ifdef __BIG_ENDIAN
3214 unsigned int i;
3215
3216 for (i = 0; i < buf_words; i++)
3217 buf[i] = le16_to_cpu(buf[i]);
3218#endif /* __BIG_ENDIAN */
3219}
3220
6ae4cfb5
AL		 3221/**
3222 * ata_mmio_data_xfer - Transfer data by MMIO
3223 * @ap: port to read/write
3224 * @buf: data buffer
3225 * @buflen: buffer length
344babaa 3226 * @write_data: read/write
6ae4cfb5
AL		 3227 *
3228 * Transfer data from/to the device data register by MMIO.
3229 *
3230 * LOCKING:
3231 * Inherited from caller.
6ae4cfb5
AL		 3232 */
3233
1da177e4
LT		 3234static void ata_mmio_data_xfer(struct ata_port *ap, unsigned char *buf,
3235 unsigned int buflen, int write_data)
3236{
3237 unsigned int i;
3238 unsigned int words = buflen >> 1;
3239 u16 *buf16 = (u16 *) buf;
3240 void __iomem *mmio = (void __iomem *)ap->ioaddr.data_addr;
3241
6ae4cfb5 3242 /* Transfer multiple of 2 bytes */
1da177e4
LT		 3243 if (write_data) {
3244 for (i = 0; i < words; i++)
3245 writew(le16_to_cpu(buf16[i]), mmio);
3246 } else {
3247 for (i = 0; i < words; i++)
3248 buf16[i] = cpu_to_le16(readw(mmio));
3249 }
6ae4cfb5
AL		 3250
3251 /* Transfer trailing 1 byte, if any. */
3252 if (unlikely(buflen & 0x01)) {
3253 u16 align_buf[1] = { 0 };
3254 unsigned char *trailing_buf = buf + buflen - 1;
3255
3256 if (write_data) {
3257 memcpy(align_buf, trailing_buf, 1);
3258 writew(le16_to_cpu(align_buf[0]), mmio);
3259 } else {
3260 align_buf[0] = cpu_to_le16(readw(mmio));
3261 memcpy(trailing_buf, align_buf, 1);
3262 }
3263 }
1da177e4
LT		 3264}
3265
6ae4cfb5
AL		 3266/**
3267 * ata_pio_data_xfer - Transfer data by PIO
3268 * @ap: port to read/write
3269 * @buf: data buffer
3270 * @buflen: buffer length
344babaa 3271 * @write_data: read/write
6ae4cfb5
AL		 3272 *
3273 * Transfer data from/to the device data register by PIO.
3274 *
3275 * LOCKING:
3276 * Inherited from caller.
6ae4cfb5
AL		 3277 */
3278
1da177e4
LT		 3279static void ata_pio_data_xfer(struct ata_port *ap, unsigned char *buf,
3280 unsigned int buflen, int write_data)
3281{
6ae4cfb5 3282 unsigned int words = buflen >> 1;
1da177e4 3283
6ae4cfb5 3284 /* Transfer multiple of 2 bytes */
1da177e4 3285 if (write_data)
6ae4cfb5 3286 outsw(ap->ioaddr.data_addr, buf, words);
1da177e4 3287 else
6ae4cfb5
AL		 3288 insw(ap->ioaddr.data_addr, buf, words);
3289
3290 /* Transfer trailing 1 byte, if any. */
3291 if (unlikely(buflen & 0x01)) {
3292 u16 align_buf[1] = { 0 };
3293 unsigned char *trailing_buf = buf + buflen - 1;
3294
3295 if (write_data) {
3296 memcpy(align_buf, trailing_buf, 1);
3297 outw(le16_to_cpu(align_buf[0]), ap->ioaddr.data_addr);
3298 } else {
3299 align_buf[0] = cpu_to_le16(inw(ap->ioaddr.data_addr));
3300 memcpy(trailing_buf, align_buf, 1);
3301 }
3302 }
1da177e4
LT		 3303}
3304
6ae4cfb5
AL		 3305/**
3306 * ata_data_xfer - Transfer data from/to the data register.
3307 * @ap: port to read/write
3308 * @buf: data buffer
3309 * @buflen: buffer length
3310 * @do_write: read/write
3311 *
3312 * Transfer data from/to the device data register.
3313 *
3314 * LOCKING:
3315 * Inherited from caller.
6ae4cfb5
AL		 3316 */
3317
1da177e4
LT		 3318static void ata_data_xfer(struct ata_port *ap, unsigned char *buf,
3319 unsigned int buflen, int do_write)
3320{
a1bd9e68
AC		 3321 /* Make the crap hardware pay the costs not the good stuff */
3322 if (unlikely(ap->flags & ATA_FLAG_IRQ_MASK)) {
3323 unsigned long flags;
3324 local_irq_save(flags);
3325 if (ap->flags & ATA_FLAG_MMIO)
3326 ata_mmio_data_xfer(ap, buf, buflen, do_write);
3327 else
3328 ata_pio_data_xfer(ap, buf, buflen, do_write);
3329 local_irq_restore(flags);
3330 } else {
3331 if (ap->flags & ATA_FLAG_MMIO)
3332 ata_mmio_data_xfer(ap, buf, buflen, do_write);
3333 else
3334 ata_pio_data_xfer(ap, buf, buflen, do_write);
3335 }
1da177e4
LT		 3336}
3337
6ae4cfb5
AL		 3338/**
3339 * ata_pio_sector - Transfer ATA_SECT_SIZE (512 bytes) of data.
3340 * @qc: Command on going
3341 *
3342 * Transfer ATA_SECT_SIZE of data from/to the ATA device.
3343 *
3344 * LOCKING:
3345 * Inherited from caller.
3346 */
3347
1da177e4
LT		 3348static void ata_pio_sector(struct ata_queued_cmd *qc)
3349{
3350 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
cedc9a47 3351 struct scatterlist *sg = qc->__sg;
1da177e4
LT		 3352 struct ata_port *ap = qc->ap;
3353 struct page *page;
3354 unsigned int offset;
3355 unsigned char *buf;
3356
3357 if (qc->cursect == (qc->nsect - 1))
14be71f4 3358 ap->hsm_task_state = HSM_ST_LAST;
1da177e4
LT		 3359
3360 page = sg[qc->cursg].page;
3361 offset = sg[qc->cursg].offset + qc->cursg_ofs * ATA_SECT_SIZE;
3362
3363 /* get the current page and offset */
3364 page = nth_page(page, (offset >> PAGE_SHIFT));
3365 offset %= PAGE_SIZE;
3366
3367 buf = kmap(page) + offset;
3368
3369 qc->cursect++;
3370 qc->cursg_ofs++;
3371
32529e01 3372 if ((qc->cursg_ofs * ATA_SECT_SIZE) == (&sg[qc->cursg])->length) {
1da177e4
LT		 3373 qc->cursg++;
3374 qc->cursg_ofs = 0;
3375 }
3376
3377 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
3378
3379 /* do the actual data transfer */
3380 do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
3381 ata_data_xfer(ap, buf, ATA_SECT_SIZE, do_write);
3382
3383 kunmap(page);
3384}
3385
6ae4cfb5
AL		 3386/**
3387 * __atapi_pio_bytes - Transfer data from/to the ATAPI device.
3388 * @qc: Command on going
3389 * @bytes: number of bytes
3390 *
3391 * Transfer Transfer data from/to the ATAPI device.
3392 *
3393 * LOCKING:
3394 * Inherited from caller.
3395 *
3396 */
3397
1da177e4
LT		 3398static void __atapi_pio_bytes(struct ata_queued_cmd *qc, unsigned int bytes)
3399{
3400 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
cedc9a47 3401 struct scatterlist *sg = qc->__sg;
1da177e4
LT		 3402 struct ata_port *ap = qc->ap;
3403 struct page *page;
3404 unsigned char *buf;
3405 unsigned int offset, count;
3406
563a6e1f 3407 if (qc->curbytes + bytes >= qc->nbytes)
14be71f4 3408 ap->hsm_task_state = HSM_ST_LAST;
1da177e4
LT		 3409
3410next_sg:
563a6e1f 3411 if (unlikely(qc->cursg >= qc->n_elem)) {
7fb6ec28 3412 /*
563a6e1f
AL		 3413 * The end of qc->sg is reached and the device expects
3414 * more data to transfer. In order not to overrun qc->sg
3415 * and fulfill length specified in the byte count register,
3416 * - for read case, discard trailing data from the device
3417 * - for write case, padding zero data to the device
3418 */
3419 u16 pad_buf[1] = { 0 };
3420 unsigned int words = bytes >> 1;
3421 unsigned int i;
3422
3423 if (words) /* warning if bytes > 1 */
7fb6ec28 3424 printk(KERN_WARNING "ata%u: %u bytes trailing data\n",
563a6e1f
AL		 3425 ap->id, bytes);
3426
3427 for (i = 0; i < words; i++)
3428 ata_data_xfer(ap, (unsigned char*)pad_buf, 2, do_write);
3429
14be71f4 3430 ap->hsm_task_state = HSM_ST_LAST;
563a6e1f
AL		 3431 return;
3432 }
3433
cedc9a47 3434 sg = &qc->__sg[qc->cursg];
1da177e4 3435
1da177e4
LT		 3436 page = sg->page;
3437 offset = sg->offset + qc->cursg_ofs;
3438
3439 /* get the current page and offset */
3440 page = nth_page(page, (offset >> PAGE_SHIFT));
3441 offset %= PAGE_SIZE;
3442
6952df03 3443 /* don't overrun current sg */
32529e01 3444 count = min(sg->length - qc->cursg_ofs, bytes);
1da177e4
LT		 3445
3446 /* don't cross page boundaries */
3447 count = min(count, (unsigned int)PAGE_SIZE - offset);
3448
3449 buf = kmap(page) + offset;
3450
3451 bytes -= count;
3452 qc->curbytes += count;
3453 qc->cursg_ofs += count;
3454
32529e01 3455 if (qc->cursg_ofs == sg->length) {
1da177e4
LT		 3456 qc->cursg++;
3457 qc->cursg_ofs = 0;
3458 }
3459
3460 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
3461
3462 /* do the actual data transfer */
3463 ata_data_xfer(ap, buf, count, do_write);
3464
3465 kunmap(page);
3466
563a6e1f 3467 if (bytes)
1da177e4 3468 goto next_sg;
1da177e4
LT		 3469}
3470
6ae4cfb5
AL		 3471/**
3472 * atapi_pio_bytes - Transfer data from/to the ATAPI device.
3473 * @qc: Command on going
3474 *
3475 * Transfer Transfer data from/to the ATAPI device.
3476 *
3477 * LOCKING:
3478 * Inherited from caller.
6ae4cfb5
AL		 3479 */
3480
1da177e4
LT		 3481static void atapi_pio_bytes(struct ata_queued_cmd *qc)
3482{
3483 struct ata_port *ap = qc->ap;
3484 struct ata_device *dev = qc->dev;
3485 unsigned int ireason, bc_lo, bc_hi, bytes;
3486 int i_write, do_write = (qc->tf.flags & ATA_TFLAG_WRITE) ? 1 : 0;
3487
3488 ap->ops->tf_read(ap, &qc->tf);
3489 ireason = qc->tf.nsect;
3490 bc_lo = qc->tf.lbam;
3491 bc_hi = qc->tf.lbah;
3492 bytes = (bc_hi << 8) | bc_lo;
3493
3494 /* shall be cleared to zero, indicating xfer of data */
3495 if (ireason & (1 << 0))
3496 goto err_out;
3497
3498 /* make sure transfer direction matches expected */
3499 i_write = ((ireason & (1 << 1)) == 0) ? 1 : 0;
3500 if (do_write != i_write)
3501 goto err_out;
3502
3503 __atapi_pio_bytes(qc, bytes);
3504
3505 return;
3506
3507err_out:
3508 printk(KERN_INFO "ata%u: dev %u: ATAPI check failed\n",
3509 ap->id, dev->devno);
11a56d24 3510 qc->err_mask |= AC_ERR_HSM;
14be71f4 3511 ap->hsm_task_state = HSM_ST_ERR;
1da177e4
LT		 3512}
3513
3514/**
6f0ef4fa
RD		 3515 * ata_pio_block - start PIO on a block
3516 * @ap: the target ata_port
1da177e4
LT		 3517 *
3518 * LOCKING:
0cba632b 3519 * None. (executing in kernel thread context)
1da177e4
LT		 3520 */
3521
3522static void ata_pio_block(struct ata_port *ap)
3523{
3524 struct ata_queued_cmd *qc;
3525 u8 status;
3526
3527 /*
6f0ef4fa 3528 * This is purely heuristic. This is a fast path.
1da177e4
LT		 3529 * Sometimes when we enter, BSY will be cleared in
3530 * a chk-status or two. If not, the drive is probably seeking
3531 * or something. Snooze for a couple msecs, then
3532 * chk-status again. If still busy, fall back to
14be71f4 3533 * HSM_ST_POLL state.
1da177e4
LT		 3534 */
3535 status = ata_busy_wait(ap, ATA_BUSY, 5);
3536 if (status & ATA_BUSY) {
3537 msleep(2);
3538 status = ata_busy_wait(ap, ATA_BUSY, 10);
3539 if (status & ATA_BUSY) {
14be71f4 3540 ap->hsm_task_state = HSM_ST_POLL;
1da177e4
LT		 3541 ap->pio_task_timeout = jiffies + ATA_TMOUT_PIO;
3542 return;
3543 }
3544 }
3545
3546 qc = ata_qc_from_tag(ap, ap->active_tag);
a4631474 3547 WARN_ON(qc == NULL);
1da177e4 3548
fe79e683
AL		 3549 /* check error */
3550 if (status & (ATA_ERR | ATA_DF)) {
3551 qc->err_mask |= AC_ERR_DEV;
3552 ap->hsm_task_state = HSM_ST_ERR;
3553 return;
3554 }
3555
3556 /* transfer data if any */
1da177e4 3557 if (is_atapi_taskfile(&qc->tf)) {
fe79e683 3558 /* DRQ=0 means no more data to transfer */
1da177e4 3559 if ((status & ATA_DRQ) == 0) {
14be71f4 3560 ap->hsm_task_state = HSM_ST_LAST;
1da177e4
LT		 3561 return;
3562 }
3563
3564 atapi_pio_bytes(qc);
3565 } else {
3566 /* handle BSY=0, DRQ=0 as error */
3567 if ((status & ATA_DRQ) == 0) {
11a56d24 3568 qc->err_mask |= AC_ERR_HSM;
14be71f4 3569 ap->hsm_task_state = HSM_ST_ERR;
1da177e4
LT		 3570 return;
3571 }
3572
3573 ata_pio_sector(qc);
3574 }
3575}
3576
3577static void ata_pio_error(struct ata_port *ap)
3578{
3579 struct ata_queued_cmd *qc;
a7dac447 3580
1da177e4 3581 qc = ata_qc_from_tag(ap, ap->active_tag);
a4631474 3582 WARN_ON(qc == NULL);
1da177e4 3583
0565c26d
AL		 3584 if (qc->tf.command != ATA_CMD_PACKET)
3585 printk(KERN_WARNING "ata%u: PIO error\n", ap->id);
3586
1c848984
AL		 3587 /* make sure qc->err_mask is available to
3588 * know what's wrong and recover
3589 */
a4631474 3590 WARN_ON(qc->err_mask == 0);
1c848984 3591
14be71f4 3592 ap->hsm_task_state = HSM_ST_IDLE;
1da177e4 3593
a22e2eb0 3594 ata_poll_qc_complete(qc);
1da177e4
LT		 3595}
3596
3597static void ata_pio_task(void *_data)
3598{
3599 struct ata_port *ap = _data;
7fb6ec28
JG		 3600 unsigned long timeout;
3601 int qc_completed;
3602
3603fsm_start:
3604 timeout = 0;
3605 qc_completed = 0;
1da177e4 3606
14be71f4
AL		 3607 switch (ap->hsm_task_state) {
3608 case HSM_ST_IDLE:
1da177e4
LT		 3609 return;
3610
14be71f4 3611 case HSM_ST:
1da177e4
LT		 3612 ata_pio_block(ap);
3613 break;
3614
14be71f4 3615 case HSM_ST_LAST:
7fb6ec28 3616 qc_completed = ata_pio_complete(ap);
1da177e4
LT		 3617 break;
3618
14be71f4
AL		 3619 case HSM_ST_POLL:
3620 case HSM_ST_LAST_POLL:
1da177e4
LT		 3621 timeout = ata_pio_poll(ap);
3622 break;
3623
14be71f4
AL		 3624 case HSM_ST_TMOUT:
3625 case HSM_ST_ERR:
1da177e4
LT		 3626 ata_pio_error(ap);
3627 return;
3628 }
3629
3630 if (timeout)
95064379 3631 ata_queue_delayed_pio_task(ap, timeout);
7fb6ec28
JG		 3632 else if (!qc_completed)
3633 goto fsm_start;
1da177e4
LT		 3634}
3635
1da177e4
LT		 3636/**
3637 * ata_qc_timeout - Handle timeout of queued command
3638 * @qc: Command that timed out
3639 *
3640 * Some part of the kernel (currently, only the SCSI layer)
3641 * has noticed that the active command on port @ap has not
3642 * completed after a specified length of time. Handle this
3643 * condition by disabling DMA (if necessary) and completing
3644 * transactions, with error if necessary.
3645 *
3646 * This also handles the case of the "lost interrupt", where
3647 * for some reason (possibly hardware bug, possibly driver bug)
3648 * an interrupt was not delivered to the driver, even though the
3649 * transaction completed successfully.
3650 *
3651 * LOCKING:
0cba632b 3652 * Inherited from SCSI layer (none, can sleep)
1da177e4
LT		 3653 */
3654
3655static void ata_qc_timeout(struct ata_queued_cmd *qc)
3656{
3657 struct ata_port *ap = qc->ap;
b8f6153e 3658 struct ata_host_set *host_set = ap->host_set;
1da177e4 3659 u8 host_stat = 0, drv_stat;
b8f6153e 3660 unsigned long flags;
1da177e4
LT		 3661
3662 DPRINTK("ENTER\n");
3663
c18d06f8
TH		 3664 ata_flush_pio_tasks(ap);
3665 ap->hsm_task_state = HSM_ST_IDLE;
3666
b8f6153e
JG		 3667 spin_lock_irqsave(&host_set->lock, flags);
3668
1da177e4
LT		 3669 switch (qc->tf.protocol) {
3670
3671 case ATA_PROT_DMA:
3672 case ATA_PROT_ATAPI_DMA:
3673 host_stat = ap->ops->bmdma_status(ap);
3674
3675 /* before we do anything else, clear DMA-Start bit */
b73fc89f 3676 ap->ops->bmdma_stop(qc);
1da177e4
LT		 3677
3678 /* fall through */
3679
3680 default:
3681 ata_altstatus(ap);
3682 drv_stat = ata_chk_status(ap);
3683
3684 /* ack bmdma irq events */
3685 ap->ops->irq_clear(ap);
3686
3687 printk(KERN_ERR "ata%u: command 0x%x timeout, stat 0x%x host_stat 0x%x\n",
3688 ap->id, qc->tf.command, drv_stat, host_stat);
3689
3690 /* complete taskfile transaction */
a22e2eb0 3691 qc->err_mask |= ac_err_mask(drv_stat);
1da177e4
LT		 3692 break;
3693 }
b8f6153e
JG		 3694
3695 spin_unlock_irqrestore(&host_set->lock, flags);
3696
a72ec4ce
TH		 3697 ata_eh_qc_complete(qc);
3698
1da177e4
LT		 3699 DPRINTK("EXIT\n");
3700}
3701
3702/**
3703 * ata_eng_timeout - Handle timeout of queued command
3704 * @ap: Port on which timed-out command is active
3705 *
3706 * Some part of the kernel (currently, only the SCSI layer)
3707 * has noticed that the active command on port @ap has not
3708 * completed after a specified length of time. Handle this
3709 * condition by disabling DMA (if necessary) and completing
3710 * transactions, with error if necessary.
3711 *
3712 * This also handles the case of the "lost interrupt", where
3713 * for some reason (possibly hardware bug, possibly driver bug)
3714 * an interrupt was not delivered to the driver, even though the
3715 * transaction completed successfully.
3716 *
3717 * LOCKING:
3718 * Inherited from SCSI layer (none, can sleep)
3719 */
3720
3721void ata_eng_timeout(struct ata_port *ap)
3722{
1da177e4
LT		 3723 DPRINTK("ENTER\n");
3724
f6379020 3725 ata_qc_timeout(ata_qc_from_tag(ap, ap->active_tag));
1da177e4 3726
1da177e4
LT		 3727 DPRINTK("EXIT\n");
3728}
3729
3730/**
3731 * ata_qc_new - Request an available ATA command, for queueing
3732 * @ap: Port associated with device @dev
3733 * @dev: Device from whom we request an available command structure
3734 *
3735 * LOCKING:
0cba632b 3736 * None.
1da177e4
LT		 3737 */
3738
3739static struct ata_queued_cmd *ata_qc_new(struct ata_port *ap)
3740{
3741 struct ata_queued_cmd *qc = NULL;
3742 unsigned int i;
3743
3744 for (i = 0; i < ATA_MAX_QUEUE; i++)
3745 if (!test_and_set_bit(i, &ap->qactive)) {
3746 qc = ata_qc_from_tag(ap, i);
3747 break;
3748 }
3749
3750 if (qc)
3751 qc->tag = i;
3752
3753 return qc;
3754}
3755
3756/**
3757 * ata_qc_new_init - Request an available ATA command, and initialize it
3758 * @ap: Port associated with device @dev
3759 * @dev: Device from whom we request an available command structure
3760 *
3761 * LOCKING:
0cba632b 3762 * None.
1da177e4
LT		 3763 */
3764
3765struct ata_queued_cmd *ata_qc_new_init(struct ata_port *ap,
3766 struct ata_device *dev)
3767{
3768 struct ata_queued_cmd *qc;
3769
3770 qc = ata_qc_new(ap);
3771 if (qc) {
1da177e4
LT		 3772 qc->scsicmd = NULL;
3773 qc->ap = ap;
3774 qc->dev = dev;
1da177e4 3775
2c13b7ce 3776 ata_qc_reinit(qc);
1da177e4
LT		 3777 }
3778
3779 return qc;
3780}
3781
1da177e4
LT		 3782/**
3783 * ata_qc_free - free unused ata_queued_cmd
3784 * @qc: Command to complete
3785 *
3786 * Designed to free unused ata_queued_cmd object
3787 * in case something prevents using it.
3788 *
3789 * LOCKING:
0cba632b 3790 * spin_lock_irqsave(host_set lock)
1da177e4
LT		 3791 */
3792void ata_qc_free(struct ata_queued_cmd *qc)
3793{
4ba946e9
TH		 3794 struct ata_port *ap = qc->ap;
3795 unsigned int tag;
3796
a4631474 3797 WARN_ON(qc == NULL); /* ata_qc_from_tag _might_ return NULL */
1da177e4 3798
4ba946e9
TH		 3799 qc->flags = 0;
3800 tag = qc->tag;
3801 if (likely(ata_tag_valid(tag))) {
3802 if (tag == ap->active_tag)
3803 ap->active_tag = ATA_TAG_POISON;
3804 qc->tag = ATA_TAG_POISON;
3805 clear_bit(tag, &ap->qactive);
3806 }
1da177e4
LT		 3807}
3808
76014427 3809void __ata_qc_complete(struct ata_queued_cmd *qc)
1da177e4 3810{
a4631474
TH		 3811 WARN_ON(qc == NULL); /* ata_qc_from_tag _might_ return NULL */
3812 WARN_ON(!(qc->flags & ATA_QCFLAG_ACTIVE));
1da177e4
LT		 3813
3814 if (likely(qc->flags & ATA_QCFLAG_DMAMAP))
3815 ata_sg_clean(qc);
3816
3f3791d3
AL		 3817 /* atapi: mark qc as inactive to prevent the interrupt handler
3818 * from completing the command twice later, before the error handler
3819 * is called. (when rc != 0 and atapi request sense is needed)
3820 */
3821 qc->flags &= ~ATA_QCFLAG_ACTIVE;
3822
1da177e4 3823 /* call completion callback */
77853bf2 3824 qc->complete_fn(qc);
1da177e4
LT		 3825}
3826
3827static inline int ata_should_dma_map(struct ata_queued_cmd *qc)
3828{
3829 struct ata_port *ap = qc->ap;
3830
3831 switch (qc->tf.protocol) {
3832 case ATA_PROT_DMA:
3833 case ATA_PROT_ATAPI_DMA:
3834 return 1;
3835
3836 case ATA_PROT_ATAPI:
3837 case ATA_PROT_PIO:
3838 case ATA_PROT_PIO_MULT:
3839 if (ap->flags & ATA_FLAG_PIO_DMA)
3840 return 1;
3841
3842 /* fall through */
3843
3844 default:
3845 return 0;
3846 }
3847
3848 /* never reached */
3849}
3850
3851/**
3852 * ata_qc_issue - issue taskfile to device
3853 * @qc: command to issue to device
3854 *
3855 * Prepare an ATA command to submission to device.
3856 * This includes mapping the data into a DMA-able
3857 * area, filling in the S/G table, and finally
3858 * writing the taskfile to hardware, starting the command.
3859 *
3860 * LOCKING:
3861 * spin_lock_irqsave(host_set lock)
3862 *
3863 * RETURNS:
9a3d9eb0 3864 * Zero on success, AC_ERR_* mask on failure
1da177e4
LT		 3865 */
3866
9a3d9eb0 3867unsigned int ata_qc_issue(struct ata_queued_cmd *qc)
1da177e4
LT		 3868{
3869 struct ata_port *ap = qc->ap;
3870
3871 if (ata_should_dma_map(qc)) {
3872 if (qc->flags & ATA_QCFLAG_SG) {
3873 if (ata_sg_setup(qc))
8e436af9 3874 goto sg_err;
1da177e4
LT		 3875 } else if (qc->flags & ATA_QCFLAG_SINGLE) {
3876 if (ata_sg_setup_one(qc))
8e436af9 3877 goto sg_err;
1da177e4
LT		 3878 }
3879 } else {
3880 qc->flags &= ~ATA_QCFLAG_DMAMAP;
3881 }
3882
3883 ap->ops->qc_prep(qc);
3884
3885 qc->ap->active_tag = qc->tag;
3886 qc->flags |= ATA_QCFLAG_ACTIVE;
3887
3888 return ap->ops->qc_issue(qc);
3889
8e436af9
TH		 3890sg_err:
3891 qc->flags &= ~ATA_QCFLAG_DMAMAP;
9a3d9eb0 3892 return AC_ERR_SYSTEM;
1da177e4
LT		 3893}
3894
0baab86b 3895
1da177e4
LT		 3896/**
3897 * ata_qc_issue_prot - issue taskfile to device in proto-dependent manner
3898 * @qc: command to issue to device
3899 *
3900 * Using various libata functions and hooks, this function
3901 * starts an ATA command. ATA commands are grouped into
3902 * classes called "protocols", and issuing each type of protocol
3903 * is slightly different.
3904 *
0baab86b
EF		 3905 * May be used as the qc_issue() entry in ata_port_operations.
3906 *
1da177e4
LT		 3907 * LOCKING:
3908 * spin_lock_irqsave(host_set lock)
3909 *
3910 * RETURNS:
9a3d9eb0 3911 * Zero on success, AC_ERR_* mask on failure
1da177e4
LT		 3912 */
3913
9a3d9eb0 3914unsigned int ata_qc_issue_prot(struct ata_queued_cmd *qc)
1da177e4
LT		 3915{
3916 struct ata_port *ap = qc->ap;
3917
3918 ata_dev_select(ap, qc->dev->devno, 1, 0);
3919
3920 switch (qc->tf.protocol) {
3921 case ATA_PROT_NODATA:
e5338254 3922 ata_tf_to_host(ap, &qc->tf);
1da177e4
LT		 3923 break;
3924
3925 case ATA_PROT_DMA:
3926 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
3927 ap->ops->bmdma_setup(qc); /* set up bmdma */
3928 ap->ops->bmdma_start(qc); /* initiate bmdma */
3929 break;
3930
3931 case ATA_PROT_PIO: /* load tf registers, initiate polling pio */
3932 ata_qc_set_polling(qc);
e5338254 3933 ata_tf_to_host(ap, &qc->tf);
14be71f4 3934 ap->hsm_task_state = HSM_ST;
95064379 3935 ata_queue_pio_task(ap);
1da177e4
LT		 3936 break;
3937
3938 case ATA_PROT_ATAPI:
3939 ata_qc_set_polling(qc);
e5338254 3940 ata_tf_to_host(ap, &qc->tf);
95064379 3941 ata_queue_packet_task(ap);
1da177e4
LT		 3942 break;
3943
3944 case ATA_PROT_ATAPI_NODATA:
c1389503 3945 ap->flags |= ATA_FLAG_NOINTR;
e5338254 3946 ata_tf_to_host(ap, &qc->tf);
95064379 3947 ata_queue_packet_task(ap);
1da177e4
LT		 3948 break;
3949
3950 case ATA_PROT_ATAPI_DMA:
c1389503 3951 ap->flags |= ATA_FLAG_NOINTR;
1da177e4
LT		 3952 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
3953 ap->ops->bmdma_setup(qc); /* set up bmdma */
95064379 3954 ata_queue_packet_task(ap);
1da177e4
LT		 3955 break;
3956
3957 default:
3958 WARN_ON(1);
9a3d9eb0 3959 return AC_ERR_SYSTEM;
1da177e4
LT		 3960 }
3961
3962 return 0;
3963}
3964
3965/**
0baab86b 3966 * ata_bmdma_setup_mmio - Set up PCI IDE BMDMA transaction
1da177e4
LT		 3967 * @qc: Info associated with this ATA transaction.
3968 *
3969 * LOCKING:
3970 * spin_lock_irqsave(host_set lock)
3971 */
3972
3973static void ata_bmdma_setup_mmio (struct ata_queued_cmd *qc)
3974{
3975 struct ata_port *ap = qc->ap;
3976 unsigned int rw = (qc->tf.flags & ATA_TFLAG_WRITE);
3977 u8 dmactl;
3978 void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr;
3979
3980 /* load PRD table addr. */
3981 mb(); /* make sure PRD table writes are visible to controller */
3982 writel(ap->prd_dma, mmio + ATA_DMA_TABLE_OFS);
3983
3984 /* specify data direction, triple-check start bit is clear */
3985 dmactl = readb(mmio + ATA_DMA_CMD);
3986 dmactl &= ~(ATA_DMA_WR | ATA_DMA_START);
3987 if (!rw)
3988 dmactl |= ATA_DMA_WR;
3989 writeb(dmactl, mmio + ATA_DMA_CMD);
3990
3991 /* issue r/w command */
3992 ap->ops->exec_command(ap, &qc->tf);
3993}
3994
3995/**
b73fc89f 3996 * ata_bmdma_start_mmio - Start a PCI IDE BMDMA transaction
1da177e4
LT		 3997 * @qc: Info associated with this ATA transaction.
3998 *
3999 * LOCKING:
4000 * spin_lock_irqsave(host_set lock)
4001 */
4002
4003static void ata_bmdma_start_mmio (struct ata_queued_cmd *qc)
4004{
4005 struct ata_port *ap = qc->ap;
4006 void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr;
4007 u8 dmactl;
4008
4009 /* start host DMA transaction */
4010 dmactl = readb(mmio + ATA_DMA_CMD);
4011 writeb(dmactl | ATA_DMA_START, mmio + ATA_DMA_CMD);
4012
4013 /* Strictly, one may wish to issue a readb() here, to
4014 * flush the mmio write. However, control also passes
4015 * to the hardware at this point, and it will interrupt
4016 * us when we are to resume control. So, in effect,
4017 * we don't care when the mmio write flushes.
4018 * Further, a read of the DMA status register _immediately_
4019 * following the write may not be what certain flaky hardware
4020 * is expected, so I think it is best to not add a readb()
4021 * without first all the MMIO ATA cards/mobos.
4022 * Or maybe I'm just being paranoid.
4023 */
4024}
4025
4026/**
4027 * ata_bmdma_setup_pio - Set up PCI IDE BMDMA transaction (PIO)
4028 * @qc: Info associated with this ATA transaction.
4029 *
4030 * LOCKING:
4031 * spin_lock_irqsave(host_set lock)
4032 */
4033
4034static void ata_bmdma_setup_pio (struct ata_queued_cmd *qc)
4035{
4036 struct ata_port *ap = qc->ap;
4037 unsigned int rw = (qc->tf.flags & ATA_TFLAG_WRITE);
4038 u8 dmactl;
4039
4040 /* load PRD table addr. */
4041 outl(ap->prd_dma, ap->ioaddr.bmdma_addr + ATA_DMA_TABLE_OFS);
4042
4043 /* specify data direction, triple-check start bit is clear */
4044 dmactl = inb(ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
4045 dmactl &= ~(ATA_DMA_WR | ATA_DMA_START);
4046 if (!rw)
4047 dmactl |= ATA_DMA_WR;
4048 outb(dmactl, ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
4049
4050 /* issue r/w command */
4051 ap->ops->exec_command(ap, &qc->tf);
4052}
4053
4054/**
4055 * ata_bmdma_start_pio - Start a PCI IDE BMDMA transaction (PIO)
4056 * @qc: Info associated with this ATA transaction.
4057 *
4058 * LOCKING:
4059 * spin_lock_irqsave(host_set lock)
4060 */
4061
4062static void ata_bmdma_start_pio (struct ata_queued_cmd *qc)
4063{
4064 struct ata_port *ap = qc->ap;
4065 u8 dmactl;
4066
4067 /* start host DMA transaction */
4068 dmactl = inb(ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
4069 outb(dmactl | ATA_DMA_START,
4070 ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
4071}
4072
0baab86b
EF		 4073
4074/**
4075 * ata_bmdma_start - Start a PCI IDE BMDMA transaction
4076 * @qc: Info associated with this ATA transaction.
4077 *
4078 * Writes the ATA_DMA_START flag to the DMA command register.
4079 *
4080 * May be used as the bmdma_start() entry in ata_port_operations.
4081 *
4082 * LOCKING:
4083 * spin_lock_irqsave(host_set lock)
4084 */
1da177e4
LT		 4085void ata_bmdma_start(struct ata_queued_cmd *qc)
4086{
4087 if (qc->ap->flags & ATA_FLAG_MMIO)
4088 ata_bmdma_start_mmio(qc);
4089 else
4090 ata_bmdma_start_pio(qc);
4091}
4092
0baab86b
EF		 4093
4094/**
4095 * ata_bmdma_setup - Set up PCI IDE BMDMA transaction
4096 * @qc: Info associated with this ATA transaction.
4097 *
4098 * Writes address of PRD table to device's PRD Table Address
4099 * register, sets the DMA control register, and calls
4100 * ops->exec_command() to start the transfer.
4101 *
4102 * May be used as the bmdma_setup() entry in ata_port_operations.
4103 *
4104 * LOCKING:
4105 * spin_lock_irqsave(host_set lock)
4106 */
1da177e4
LT		 4107void ata_bmdma_setup(struct ata_queued_cmd *qc)
4108{
4109 if (qc->ap->flags & ATA_FLAG_MMIO)
4110 ata_bmdma_setup_mmio(qc);
4111 else
4112 ata_bmdma_setup_pio(qc);
4113}
4114
0baab86b
EF		 4115
4116/**
4117 * ata_bmdma_irq_clear - Clear PCI IDE BMDMA interrupt.
decc6d0b 4118 * @ap: Port associated with this ATA transaction.
0baab86b
EF		 4119 *
4120 * Clear interrupt and error flags in DMA status register.
4121 *
4122 * May be used as the irq_clear() entry in ata_port_operations.
4123 *
4124 * LOCKING:
4125 * spin_lock_irqsave(host_set lock)
4126 */
4127
1da177e4
LT		 4128void ata_bmdma_irq_clear(struct ata_port *ap)
4129{
4130 if (ap->flags & ATA_FLAG_MMIO) {
4131 void __iomem *mmio = ((void __iomem *) ap->ioaddr.bmdma_addr) + ATA_DMA_STATUS;
4132 writeb(readb(mmio), mmio);
4133 } else {
4134 unsigned long addr = ap->ioaddr.bmdma_addr + ATA_DMA_STATUS;
4135 outb(inb(addr), addr);
4136 }
4137
4138}
4139
0baab86b
EF		 4140
4141/**
4142 * ata_bmdma_status - Read PCI IDE BMDMA status
decc6d0b 4143 * @ap: Port associated with this ATA transaction.
0baab86b
EF		 4144 *
4145 * Read and return BMDMA status register.
4146 *
4147 * May be used as the bmdma_status() entry in ata_port_operations.
4148 *
4149 * LOCKING:
4150 * spin_lock_irqsave(host_set lock)
4151 */
4152
1da177e4
LT		 4153u8 ata_bmdma_status(struct ata_port *ap)
4154{
4155 u8 host_stat;
4156 if (ap->flags & ATA_FLAG_MMIO) {
4157 void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr;
4158 host_stat = readb(mmio + ATA_DMA_STATUS);
4159 } else
ee500aab 4160 host_stat = inb(ap->ioaddr.bmdma_addr + ATA_DMA_STATUS);
1da177e4
LT		 4161 return host_stat;
4162}
4163
0baab86b
EF		 4164
4165/**
4166 * ata_bmdma_stop - Stop PCI IDE BMDMA transfer
b73fc89f 4167 * @qc: Command we are ending DMA for
0baab86b
EF		 4168 *
4169 * Clears the ATA_DMA_START flag in the dma control register
4170 *
4171 * May be used as the bmdma_stop() entry in ata_port_operations.
4172 *
4173 * LOCKING:
4174 * spin_lock_irqsave(host_set lock)
4175 */
4176
b73fc89f 4177void ata_bmdma_stop(struct ata_queued_cmd *qc)
1da177e4 4178{
b73fc89f 4179 struct ata_port *ap = qc->ap;
1da177e4
LT		 4180 if (ap->flags & ATA_FLAG_MMIO) {
4181 void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr;
4182
4183 /* clear start/stop bit */
4184 writeb(readb(mmio + ATA_DMA_CMD) & ~ATA_DMA_START,
4185 mmio + ATA_DMA_CMD);
4186 } else {
4187 /* clear start/stop bit */
4188 outb(inb(ap->ioaddr.bmdma_addr + ATA_DMA_CMD) & ~ATA_DMA_START,
4189 ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
4190 }
4191
4192 /* one-PIO-cycle guaranteed wait, per spec, for HDMA1:0 transition */
4193 ata_altstatus(ap); /* dummy read */
4194}
4195
4196/**
4197 * ata_host_intr - Handle host interrupt for given (port, task)
4198 * @ap: Port on which interrupt arrived (possibly...)
4199 * @qc: Taskfile currently active in engine
4200 *
4201 * Handle host interrupt for given queued command. Currently,
4202 * only DMA interrupts are handled. All other commands are
4203 * handled via polling with interrupts disabled (nIEN bit).
4204 *
4205 * LOCKING:
4206 * spin_lock_irqsave(host_set lock)
4207 *
4208 * RETURNS:
4209 * One if interrupt was handled, zero if not (shared irq).
4210 */
4211
4212inline unsigned int ata_host_intr (struct ata_port *ap,
4213 struct ata_queued_cmd *qc)
4214{
4215 u8 status, host_stat;
4216
4217 switch (qc->tf.protocol) {
4218
4219 case ATA_PROT_DMA:
4220 case ATA_PROT_ATAPI_DMA:
4221 case ATA_PROT_ATAPI:
4222 /* check status of DMA engine */
4223 host_stat = ap->ops->bmdma_status(ap);
4224 VPRINTK("ata%u: host_stat 0x%X\n", ap->id, host_stat);
4225
4226 /* if it's not our irq... */
4227 if (!(host_stat & ATA_DMA_INTR))
4228 goto idle_irq;
4229
4230 /* before we do anything else, clear DMA-Start bit */
b73fc89f 4231 ap->ops->bmdma_stop(qc);
1da177e4
LT		 4232
4233 /* fall through */
4234
4235 case ATA_PROT_ATAPI_NODATA:
4236 case ATA_PROT_NODATA:
4237 /* check altstatus */
4238 status = ata_altstatus(ap);
4239 if (status & ATA_BUSY)
4240 goto idle_irq;
4241
4242 /* check main status, clearing INTRQ */
4243 status = ata_chk_status(ap);
4244 if (unlikely(status & ATA_BUSY))
4245 goto idle_irq;
4246 DPRINTK("ata%u: protocol %d (dev_stat 0x%X)\n",
4247 ap->id, qc->tf.protocol, status);
4248
4249 /* ack bmdma irq events */
4250 ap->ops->irq_clear(ap);
4251
4252 /* complete taskfile transaction */
a22e2eb0
AL		 4253 qc->err_mask |= ac_err_mask(status);
4254 ata_qc_complete(qc);
1da177e4
LT		 4255 break;
4256
4257 default:
4258 goto idle_irq;
4259 }
4260
4261 return 1; /* irq handled */
4262
4263idle_irq:
4264 ap->stats.idle_irq++;
4265
4266#ifdef ATA_IRQ_TRAP
4267 if ((ap->stats.idle_irq % 1000) == 0) {
4268 handled = 1;
4269 ata_irq_ack(ap, 0); /* debug trap */
4270 printk(KERN_WARNING "ata%d: irq trap\n", ap->id);
4271 }
4272#endif
4273 return 0; /* irq not handled */
4274}
4275
4276/**
4277 * ata_interrupt - Default ATA host interrupt handler
0cba632b
JG		 4278 * @irq: irq line (unused)
4279 * @dev_instance: pointer to our ata_host_set information structure
1da177e4
LT		 4280 * @regs: unused
4281 *
0cba632b
JG		 4282 * Default interrupt handler for PCI IDE devices. Calls
4283 * ata_host_intr() for each port that is not disabled.
4284 *
1da177e4 4285 * LOCKING:
0cba632b 4286 * Obtains host_set lock during operation.
1da177e4
LT		 4287 *
4288 * RETURNS:
0cba632b 4289 * IRQ_NONE or IRQ_HANDLED.
1da177e4
LT		 4290 */
4291
4292irqreturn_t ata_interrupt (int irq, void *dev_instance, struct pt_regs *regs)
4293{
4294 struct ata_host_set *host_set = dev_instance;
4295 unsigned int i;
4296 unsigned int handled = 0;
4297 unsigned long flags;
4298
4299 /* TODO: make _irqsave conditional on x86 PCI IDE legacy mode */
4300 spin_lock_irqsave(&host_set->lock, flags);
4301
4302 for (i = 0; i < host_set->n_ports; i++) {
4303 struct ata_port *ap;
4304
4305 ap = host_set->ports[i];
c1389503
TH		 4306 if (ap &&
4307 !(ap->flags & (ATA_FLAG_PORT_DISABLED | ATA_FLAG_NOINTR))) {
1da177e4
LT		 4308 struct ata_queued_cmd *qc;
4309
4310 qc = ata_qc_from_tag(ap, ap->active_tag);
21b1ed74
AL		 4311 if (qc && (!(qc->tf.ctl & ATA_NIEN)) &&
4312 (qc->flags & ATA_QCFLAG_ACTIVE))
1da177e4
LT		 4313 handled |= ata_host_intr(ap, qc);
4314 }
4315 }
4316
4317 spin_unlock_irqrestore(&host_set->lock, flags);
4318
4319 return IRQ_RETVAL(handled);
4320}
4321
4322/**
4323 * atapi_packet_task - Write CDB bytes to hardware
4324 * @_data: Port to which ATAPI device is attached.
4325 *
4326 * When device has indicated its readiness to accept
4327 * a CDB, this function is called. Send the CDB.
4328 * If DMA is to be performed, exit immediately.
4329 * Otherwise, we are in polling mode, so poll
4330 * status under operation succeeds or fails.
4331 *
4332 * LOCKING:
4333 * Kernel thread context (may sleep)
4334 */
4335
4336static void atapi_packet_task(void *_data)
4337{
4338 struct ata_port *ap = _data;
4339 struct ata_queued_cmd *qc;
4340 u8 status;
4341
4342 qc = ata_qc_from_tag(ap, ap->active_tag);
a4631474
TH		 4343 WARN_ON(qc == NULL);
4344 WARN_ON(!(qc->flags & ATA_QCFLAG_ACTIVE));
1da177e4
LT		 4345
4346 /* sleep-wait for BSY to clear */
4347 DPRINTK("busy wait\n");
d8fe452b 4348 if (ata_busy_sleep(ap, ATA_TMOUT_CDB_QUICK, ATA_TMOUT_CDB)) {
11a56d24 4349 qc->err_mask |= AC_ERR_TIMEOUT;
d8fe452b
AL		 4350 goto err_out;
4351 }
1da177e4
LT		 4352
4353 /* make sure DRQ is set */
4354 status = ata_chk_status(ap);
d8fe452b 4355 if ((status & (ATA_BUSY | ATA_DRQ)) != ATA_DRQ) {
11a56d24 4356 qc->err_mask |= AC_ERR_HSM;
1da177e4 4357 goto err_out;
d8fe452b 4358 }
1da177e4
LT		 4359
4360 /* send SCSI cdb */
4361 DPRINTK("send cdb\n");
6e7846e9 4362 WARN_ON(qc->dev->cdb_len < 12);
1da177e4 4363
c1389503
TH		 4364 if (qc->tf.protocol == ATA_PROT_ATAPI_DMA ||
4365 qc->tf.protocol == ATA_PROT_ATAPI_NODATA) {
4366 unsigned long flags;
1da177e4 4367
c1389503
TH		 4368 /* Once we're done issuing command and kicking bmdma,
4369 * irq handler takes over. To not lose irq, we need
4370 * to clear NOINTR flag before sending cdb, but
4371 * interrupt handler shouldn't be invoked before we're
4372 * finished. Hence, the following locking.
4373 */
4374 spin_lock_irqsave(&ap->host_set->lock, flags);
4375 ap->flags &= ~ATA_FLAG_NOINTR;
6e7846e9 4376 ata_data_xfer(ap, qc->cdb, qc->dev->cdb_len, 1);
c1389503
TH		 4377 if (qc->tf.protocol == ATA_PROT_ATAPI_DMA)
4378 ap->ops->bmdma_start(qc); /* initiate bmdma */
4379 spin_unlock_irqrestore(&ap->host_set->lock, flags);
4380 } else {
6e7846e9 4381 ata_data_xfer(ap, qc->cdb, qc->dev->cdb_len, 1);
1da177e4 4382
c1389503 4383 /* PIO commands are handled by polling */
14be71f4 4384 ap->hsm_task_state = HSM_ST;
95064379 4385 ata_queue_pio_task(ap);
1da177e4
LT		 4386 }
4387
4388 return;
4389
4390err_out:
a22e2eb0 4391 ata_poll_qc_complete(qc);
1da177e4
LT		 4392}
4393
0baab86b 4394
9b847548
JA		 4395/*
4396 * Execute a 'simple' command, that only consists of the opcode 'cmd' itself,
4397 * without filling any other registers
4398 */
4399static int ata_do_simple_cmd(struct ata_port *ap, struct ata_device *dev,
4400 u8 cmd)
4401{
4402 struct ata_taskfile tf;
4403 int err;
4404
4405 ata_tf_init(ap, &tf, dev->devno);
4406
4407 tf.command = cmd;
4408 tf.flags |= ATA_TFLAG_DEVICE;
4409 tf.protocol = ATA_PROT_NODATA;
4410
4411 err = ata_exec_internal(ap, dev, &tf, DMA_NONE, NULL, 0);
4412 if (err)
4413 printk(KERN_ERR "%s: ata command failed: %d\n",
4414 __FUNCTION__, err);
4415
4416 return err;
4417}
4418
4419static int ata_flush_cache(struct ata_port *ap, struct ata_device *dev)
4420{
4421 u8 cmd;
4422
4423 if (!ata_try_flush_cache(dev))
4424 return 0;
4425
4426 if (ata_id_has_flush_ext(dev->id))
4427 cmd = ATA_CMD_FLUSH_EXT;
4428 else
4429 cmd = ATA_CMD_FLUSH;
4430
4431 return ata_do_simple_cmd(ap, dev, cmd);
4432}
4433
4434static int ata_standby_drive(struct ata_port *ap, struct ata_device *dev)
4435{
4436 return ata_do_simple_cmd(ap, dev, ATA_CMD_STANDBYNOW1);
4437}
4438
4439static int ata_start_drive(struct ata_port *ap, struct ata_device *dev)
4440{
4441 return ata_do_simple_cmd(ap, dev, ATA_CMD_IDLEIMMEDIATE);
4442}
4443
4444/**
4445 * ata_device_resume - wakeup a previously suspended devices
c893a3ae
RD		 4446 * @ap: port the device is connected to
4447 * @dev: the device to resume
9b847548
JA		 4448 *
4449 * Kick the drive back into action, by sending it an idle immediate
4450 * command and making sure its transfer mode matches between drive
4451 * and host.
4452 *
4453 */
4454int ata_device_resume(struct ata_port *ap, struct ata_device *dev)
4455{
4456 if (ap->flags & ATA_FLAG_SUSPENDED) {
4457 ap->flags &= ~ATA_FLAG_SUSPENDED;
4458 ata_set_mode(ap);
4459 }
4460 if (!ata_dev_present(dev))
4461 return 0;
4462 if (dev->class == ATA_DEV_ATA)
4463 ata_start_drive(ap, dev);
4464
4465 return 0;
4466}
4467
4468/**
4469 * ata_device_suspend - prepare a device for suspend
c893a3ae
RD		 4470 * @ap: port the device is connected to
4471 * @dev: the device to suspend
9b847548
JA		 4472 *
4473 * Flush the cache on the drive, if appropriate, then issue a
4474 * standbynow command.
9b847548
JA		 4475 */
4476int ata_device_suspend(struct ata_port *ap, struct ata_device *dev)
4477{
4478 if (!ata_dev_present(dev))
4479 return 0;
4480 if (dev->class == ATA_DEV_ATA)
4481 ata_flush_cache(ap, dev);
4482
4483 ata_standby_drive(ap, dev);
4484 ap->flags |= ATA_FLAG_SUSPENDED;
4485 return 0;
4486}
4487
c893a3ae
RD		 4488/**
4489 * ata_port_start - Set port up for dma.
4490 * @ap: Port to initialize
4491 *
4492 * Called just after data structures for each port are
4493 * initialized. Allocates space for PRD table.
4494 *
4495 * May be used as the port_start() entry in ata_port_operations.
4496 *
4497 * LOCKING:
4498 * Inherited from caller.
4499 */
4500
1da177e4
LT		 4501int ata_port_start (struct ata_port *ap)
4502{
4503 struct device *dev = ap->host_set->dev;
6037d6bb 4504 int rc;
1da177e4
LT		 4505
4506 ap->prd = dma_alloc_coherent(dev, ATA_PRD_TBL_SZ, &ap->prd_dma, GFP_KERNEL);
4507 if (!ap->prd)
4508 return -ENOMEM;
4509
6037d6bb
JG		 4510 rc = ata_pad_alloc(ap, dev);
4511 if (rc) {
cedc9a47 4512 dma_free_coherent(dev, ATA_PRD_TBL_SZ, ap->prd, ap->prd_dma);
6037d6bb 4513 return rc;
cedc9a47
JG		 4514 }
4515
1da177e4
LT		 4516 DPRINTK("prd alloc, virt %p, dma %llx\n", ap->prd, (unsigned long long) ap->prd_dma);
4517
4518 return 0;
4519}
4520
0baab86b
EF		 4521
4522/**
4523 * ata_port_stop - Undo ata_port_start()
4524 * @ap: Port to shut down
4525 *
4526 * Frees the PRD table.
4527 *
4528 * May be used as the port_stop() entry in ata_port_operations.
4529 *
4530 * LOCKING:
6f0ef4fa 4531 * Inherited from caller.
0baab86b
EF		 4532 */
4533
1da177e4
LT		 4534void ata_port_stop (struct ata_port *ap)
4535{
4536 struct device *dev = ap->host_set->dev;
4537
4538 dma_free_coherent(dev, ATA_PRD_TBL_SZ, ap->prd, ap->prd_dma);
6037d6bb 4539 ata_pad_free(ap, dev);
1da177e4
LT		 4540}
4541
aa8f0dc6
JG		 4542void ata_host_stop (struct ata_host_set *host_set)
4543{
4544 if (host_set->mmio_base)
4545 iounmap(host_set->mmio_base);
4546}
4547
4548
1da177e4
LT		 4549/**
4550 * ata_host_remove - Unregister SCSI host structure with upper layers
4551 * @ap: Port to unregister
4552 * @do_unregister: 1 if we fully unregister, 0 to just stop the port
4553 *
4554 * LOCKING:
6f0ef4fa 4555 * Inherited from caller.
1da177e4
LT		 4556 */
4557
4558static void ata_host_remove(struct ata_port *ap, unsigned int do_unregister)
4559{
4560 struct Scsi_Host *sh = ap->host;
4561
4562 DPRINTK("ENTER\n");
4563
4564 if (do_unregister)
4565 scsi_remove_host(sh);
4566
4567 ap->ops->port_stop(ap);
4568}
4569
4570/**
4571 * ata_host_init - Initialize an ata_port structure
4572 * @ap: Structure to initialize
4573 * @host: associated SCSI mid-layer structure
4574 * @host_set: Collection of hosts to which @ap belongs
4575 * @ent: Probe information provided by low-level driver
4576 * @port_no: Port number associated with this ata_port
4577 *
0cba632b
JG		 4578 * Initialize a new ata_port structure, and its associated
4579 * scsi_host.
4580 *
1da177e4 4581 * LOCKING:
0cba632b 4582 * Inherited from caller.
1da177e4
LT		 4583 */
4584
4585static void ata_host_init(struct ata_port *ap, struct Scsi_Host *host,
4586 struct ata_host_set *host_set,
057ace5e 4587 const struct ata_probe_ent *ent, unsigned int port_no)
1da177e4
LT		 4588{
4589 unsigned int i;
4590
4591 host->max_id = 16;
4592 host->max_lun = 1;
4593 host->max_channel = 1;
4594 host->unique_id = ata_unique_id++;
4595 host->max_cmd_len = 12;
12413197 4596
1da177e4
LT		 4597 ap->flags = ATA_FLAG_PORT_DISABLED;
4598 ap->id = host->unique_id;
4599 ap->host = host;
4600 ap->ctl = ATA_DEVCTL_OBS;
4601 ap->host_set = host_set;
4602 ap->port_no = port_no;
4603 ap->hard_port_no =
4604 ent->legacy_mode ? ent->hard_port_no : port_no;
4605 ap->pio_mask = ent->pio_mask;
4606 ap->mwdma_mask = ent->mwdma_mask;
4607 ap->udma_mask = ent->udma_mask;
4608 ap->flags |= ent->host_flags;
4609 ap->ops = ent->port_ops;
4610 ap->cbl = ATA_CBL_NONE;
4611 ap->active_tag = ATA_TAG_POISON;
4612 ap->last_ctl = 0xFF;
4613
4614 INIT_WORK(&ap->packet_task, atapi_packet_task, ap);
4615 INIT_WORK(&ap->pio_task, ata_pio_task, ap);
a72ec4ce 4616 INIT_LIST_HEAD(&ap->eh_done_q);
1da177e4
LT		 4617
4618 for (i = 0; i < ATA_MAX_DEVICES; i++)
4619 ap->device[i].devno = i;
4620
4621#ifdef ATA_IRQ_TRAP
4622 ap->stats.unhandled_irq = 1;
4623 ap->stats.idle_irq = 1;
4624#endif
4625
4626 memcpy(&ap->ioaddr, &ent->port[port_no], sizeof(struct ata_ioports));
4627}
4628
4629/**
4630 * ata_host_add - Attach low-level ATA driver to system
4631 * @ent: Information provided by low-level driver
4632 * @host_set: Collections of ports to which we add
4633 * @port_no: Port number associated with this host
4634 *
0cba632b
JG		 4635 * Attach low-level ATA driver to system.
4636 *
1da177e4 4637 * LOCKING:
0cba632b 4638 * PCI/etc. bus probe sem.
1da177e4
LT		 4639 *
4640 * RETURNS:
0cba632b 4641 * New ata_port on success, for NULL on error.
1da177e4
LT		 4642 */
4643
057ace5e 4644static struct ata_port * ata_host_add(const struct ata_probe_ent *ent,
1da177e4
LT		 4645 struct ata_host_set *host_set,
4646 unsigned int port_no)
4647{
4648 struct Scsi_Host *host;
4649 struct ata_port *ap;
4650 int rc;
4651
4652 DPRINTK("ENTER\n");
4653 host = scsi_host_alloc(ent->sht, sizeof(struct ata_port));
4654 if (!host)
4655 return NULL;
4656
4657 ap = (struct ata_port *) &host->hostdata[0];
4658
4659 ata_host_init(ap, host, host_set, ent, port_no);
4660
4661 rc = ap->ops->port_start(ap);
4662 if (rc)
4663 goto err_out;
4664
4665 return ap;
4666
4667err_out:
4668 scsi_host_put(host);
4669 return NULL;
4670}
4671
4672/**
0cba632b
JG		 4673 * ata_device_add - Register hardware device with ATA and SCSI layers
4674 * @ent: Probe information describing hardware device to be registered
4675 *
4676 * This function processes the information provided in the probe
4677 * information struct @ent, allocates the necessary ATA and SCSI
4678 * host information structures, initializes them, and registers
4679 * everything with requisite kernel subsystems.
4680 *
4681 * This function requests irqs, probes the ATA bus, and probes
4682 * the SCSI bus.
1da177e4
LT		 4683 *
4684 * LOCKING:
0cba632b 4685 * PCI/etc. bus probe sem.
1da177e4
LT		 4686 *
4687 * RETURNS:
0cba632b 4688 * Number of ports registered. Zero on error (no ports registered).
1da177e4
LT		 4689 */
4690
057ace5e 4691int ata_device_add(const struct ata_probe_ent *ent)
1da177e4
LT		 4692{
4693 unsigned int count = 0, i;
4694 struct device *dev = ent->dev;
4695 struct ata_host_set *host_set;
4696
4697 DPRINTK("ENTER\n");
4698 /* alloc a container for our list of ATA ports (buses) */
57f3bda8 4699 host_set = kzalloc(sizeof(struct ata_host_set) +
1da177e4
LT		 4700 (ent->n_ports * sizeof(void *)), GFP_KERNEL);
4701 if (!host_set)
4702 return 0;
1da177e4
LT		 4703 spin_lock_init(&host_set->lock);
4704
4705 host_set->dev = dev;
4706 host_set->n_ports = ent->n_ports;
4707 host_set->irq = ent->irq;
4708 host_set->mmio_base = ent->mmio_base;
4709 host_set->private_data = ent->private_data;
4710 host_set->ops = ent->port_ops;
4711
4712 /* register each port bound to this device */
4713 for (i = 0; i < ent->n_ports; i++) {
4714 struct ata_port *ap;
4715 unsigned long xfer_mode_mask;
4716
4717 ap = ata_host_add(ent, host_set, i);
4718 if (!ap)
4719 goto err_out;
4720
4721 host_set->ports[i] = ap;
4722 xfer_mode_mask =(ap->udma_mask << ATA_SHIFT_UDMA) |
4723 (ap->mwdma_mask << ATA_SHIFT_MWDMA) |
4724 (ap->pio_mask << ATA_SHIFT_PIO);
4725
4726 /* print per-port info to dmesg */
4727 printk(KERN_INFO "ata%u: %cATA max %s cmd 0x%lX ctl 0x%lX "
4728 "bmdma 0x%lX irq %lu\n",
4729 ap->id,
4730 ap->flags & ATA_FLAG_SATA ? 'S' : 'P',
4731 ata_mode_string(xfer_mode_mask),
4732 ap->ioaddr.cmd_addr,
4733 ap->ioaddr.ctl_addr,
4734 ap->ioaddr.bmdma_addr,
4735 ent->irq);
4736
4737 ata_chk_status(ap);
4738 host_set->ops->irq_clear(ap);
4739 count++;
4740 }
4741
57f3bda8
RD		 4742 if (!count)
4743 goto err_free_ret;
1da177e4
LT		 4744
4745 /* obtain irq, that is shared between channels */
4746 if (request_irq(ent->irq, ent->port_ops->irq_handler, ent->irq_flags,
4747 DRV_NAME, host_set))
4748 goto err_out;
4749
4750 /* perform each probe synchronously */
4751 DPRINTK("probe begin\n");
4752 for (i = 0; i < count; i++) {
4753 struct ata_port *ap;
4754 int rc;
4755
4756 ap = host_set->ports[i];
4757
c893a3ae 4758 DPRINTK("ata%u: bus probe begin\n", ap->id);
1da177e4 4759 rc = ata_bus_probe(ap);
c893a3ae 4760 DPRINTK("ata%u: bus probe end\n", ap->id);
1da177e4
LT		 4761
4762 if (rc) {
4763 /* FIXME: do something useful here?
4764 * Current libata behavior will
4765 * tear down everything when
4766 * the module is removed
4767 * or the h/w is unplugged.
4768 */
4769 }
4770
4771 rc = scsi_add_host(ap->host, dev);
4772 if (rc) {
4773 printk(KERN_ERR "ata%u: scsi_add_host failed\n",
4774 ap->id);
4775 /* FIXME: do something useful here */
4776 /* FIXME: handle unconditional calls to
4777 * scsi_scan_host and ata_host_remove, below,
4778 * at the very least
4779 */
4780 }
4781 }
4782
4783 /* probes are done, now scan each port's disk(s) */
c893a3ae 4784 DPRINTK("host probe begin\n");
1da177e4
LT		 4785 for (i = 0; i < count; i++) {
4786 struct ata_port *ap = host_set->ports[i];
4787
644dd0cc 4788 ata_scsi_scan_host(ap);
1da177e4
LT		 4789 }
4790
4791 dev_set_drvdata(dev, host_set);
4792
4793 VPRINTK("EXIT, returning %u\n", ent->n_ports);
4794 return ent->n_ports; /* success */
4795
4796err_out:
4797 for (i = 0; i < count; i++) {
4798 ata_host_remove(host_set->ports[i], 1);
4799 scsi_host_put(host_set->ports[i]->host);
4800 }
57f3bda8 4801err_free_ret:
1da177e4
LT		 4802 kfree(host_set);
4803 VPRINTK("EXIT, returning 0\n");
4804 return 0;
4805}
4806
17b14451
AC		 4807/**
4808 * ata_host_set_remove - PCI layer callback for device removal
4809 * @host_set: ATA host set that was removed
4810 *
4811 * Unregister all objects associated with this host set. Free those
4812 * objects.
4813 *
4814 * LOCKING:
4815 * Inherited from calling layer (may sleep).
4816 */
4817
17b14451
AC		 4818void ata_host_set_remove(struct ata_host_set *host_set)
4819{
4820 struct ata_port *ap;
4821 unsigned int i;
4822
4823 for (i = 0; i < host_set->n_ports; i++) {
4824 ap = host_set->ports[i];
4825 scsi_remove_host(ap->host);
4826 }
4827
4828 free_irq(host_set->irq, host_set);
4829
4830 for (i = 0; i < host_set->n_ports; i++) {
4831 ap = host_set->ports[i];
4832
4833 ata_scsi_release(ap->host);
4834
4835 if ((ap->flags & ATA_FLAG_NO_LEGACY) == 0) {
4836 struct ata_ioports *ioaddr = &ap->ioaddr;
4837
4838 if (ioaddr->cmd_addr == 0x1f0)
4839 release_region(0x1f0, 8);
4840 else if (ioaddr->cmd_addr == 0x170)
4841 release_region(0x170, 8);
4842 }
4843
4844 scsi_host_put(ap->host);
4845 }
4846
4847 if (host_set->ops->host_stop)
4848 host_set->ops->host_stop(host_set);
4849
4850 kfree(host_set);
4851}
4852
1da177e4
LT		 4853/**
4854 * ata_scsi_release - SCSI layer callback hook for host unload
4855 * @host: libata host to be unloaded
4856 *
4857 * Performs all duties necessary to shut down a libata port...
4858 * Kill port kthread, disable port, and release resources.
4859 *
4860 * LOCKING:
4861 * Inherited from SCSI layer.
4862 *
4863 * RETURNS:
4864 * One.
4865 */
4866
4867int ata_scsi_release(struct Scsi_Host *host)
4868{
4869 struct ata_port *ap = (struct ata_port *) &host->hostdata[0];
d9572b1d 4870 int i;
1da177e4
LT		 4871
4872 DPRINTK("ENTER\n");
4873
4874 ap->ops->port_disable(ap);
4875 ata_host_remove(ap, 0);
d9572b1d
TH		 4876 for (i = 0; i < ATA_MAX_DEVICES; i++)
4877 kfree(ap->device[i].id);
1da177e4
LT		 4878
4879 DPRINTK("EXIT\n");
4880 return 1;
4881}
4882
4883/**
4884 * ata_std_ports - initialize ioaddr with standard port offsets.
4885 * @ioaddr: IO address structure to be initialized
0baab86b
EF		 4886 *
4887 * Utility function which initializes data_addr, error_addr,
4888 * feature_addr, nsect_addr, lbal_addr, lbam_addr, lbah_addr,
4889 * device_addr, status_addr, and command_addr to standard offsets
4890 * relative to cmd_addr.
4891 *
4892 * Does not set ctl_addr, altstatus_addr, bmdma_addr, or scr_addr.
1da177e4 4893 */
0baab86b 4894
1da177e4
LT		 4895void ata_std_ports(struct ata_ioports *ioaddr)
4896{
4897 ioaddr->data_addr = ioaddr->cmd_addr + ATA_REG_DATA;
4898 ioaddr->error_addr = ioaddr->cmd_addr + ATA_REG_ERR;
4899 ioaddr->feature_addr = ioaddr->cmd_addr + ATA_REG_FEATURE;
4900 ioaddr->nsect_addr = ioaddr->cmd_addr + ATA_REG_NSECT;
4901 ioaddr->lbal_addr = ioaddr->cmd_addr + ATA_REG_LBAL;
4902 ioaddr->lbam_addr = ioaddr->cmd_addr + ATA_REG_LBAM;
4903 ioaddr->lbah_addr = ioaddr->cmd_addr + ATA_REG_LBAH;
4904 ioaddr->device_addr = ioaddr->cmd_addr + ATA_REG_DEVICE;
4905 ioaddr->status_addr = ioaddr->cmd_addr + ATA_REG_STATUS;
4906 ioaddr->command_addr = ioaddr->cmd_addr + ATA_REG_CMD;
4907}
4908
0baab86b 4909
374b1873
JG		 4910#ifdef CONFIG_PCI
4911
4912void ata_pci_host_stop (struct ata_host_set *host_set)
4913{
4914 struct pci_dev *pdev = to_pci_dev(host_set->dev);
4915
4916 pci_iounmap(pdev, host_set->mmio_base);
4917}
4918
1da177e4
LT		 4919/**
4920 * ata_pci_remove_one - PCI layer callback for device removal
4921 * @pdev: PCI device that was removed
4922 *
4923 * PCI layer indicates to libata via this hook that
6f0ef4fa 4924 * hot-unplug or module unload event has occurred.
1da177e4
LT		 4925 * Handle this by unregistering all objects associated
4926 * with this PCI device. Free those objects. Then finally
4927 * release PCI resources and disable device.
4928 *
4929 * LOCKING:
4930 * Inherited from PCI layer (may sleep).
4931 */
4932
4933void ata_pci_remove_one (struct pci_dev *pdev)
4934{
4935 struct device *dev = pci_dev_to_dev(pdev);
4936 struct ata_host_set *host_set = dev_get_drvdata(dev);
1da177e4 4937
17b14451 4938 ata_host_set_remove(host_set);
1da177e4
LT		 4939 pci_release_regions(pdev);
4940 pci_disable_device(pdev);
4941 dev_set_drvdata(dev, NULL);
4942}
4943
4944/* move to PCI subsystem */
057ace5e 4945int pci_test_config_bits(struct pci_dev *pdev, const struct pci_bits *bits)
1da177e4
LT		 4946{
4947 unsigned long tmp = 0;
4948
4949 switch (bits->width) {
4950 case 1: {
4951 u8 tmp8 = 0;
4952 pci_read_config_byte(pdev, bits->reg, &tmp8);
4953 tmp = tmp8;
4954 break;
4955 }
4956 case 2: {
4957 u16 tmp16 = 0;
4958 pci_read_config_word(pdev, bits->reg, &tmp16);
4959 tmp = tmp16;
4960 break;
4961 }
4962 case 4: {
4963 u32 tmp32 = 0;
4964 pci_read_config_dword(pdev, bits->reg, &tmp32);
4965 tmp = tmp32;
4966 break;
4967 }
4968
4969 default:
4970 return -EINVAL;
4971 }
4972
4973 tmp &= bits->mask;
4974
4975 return (tmp == bits->val) ? 1 : 0;
4976}
9b847548
JA		 4977
4978int ata_pci_device_suspend(struct pci_dev *pdev, pm_message_t state)
4979{
4980 pci_save_state(pdev);
4981 pci_disable_device(pdev);
4982 pci_set_power_state(pdev, PCI_D3hot);
4983 return 0;
4984}
4985
4986int ata_pci_device_resume(struct pci_dev *pdev)
4987{
4988 pci_set_power_state(pdev, PCI_D0);
4989 pci_restore_state(pdev);
4990 pci_enable_device(pdev);
4991 pci_set_master(pdev);
4992 return 0;
4993}
1da177e4
LT		 4994#endif /* CONFIG_PCI */
4995
4996
1da177e4
LT		 4997static int __init ata_init(void)
4998{
4999 ata_wq = create_workqueue("ata");
5000 if (!ata_wq)
5001 return -ENOMEM;
5002
5003 printk(KERN_DEBUG "libata version " DRV_VERSION " loaded.\n");
5004 return 0;
5005}
5006
5007static void __exit ata_exit(void)
5008{
5009 destroy_workqueue(ata_wq);
5010}
5011
5012module_init(ata_init);
5013module_exit(ata_exit);
5014
67846b30
JG		 5015static unsigned long ratelimit_time;
5016static spinlock_t ata_ratelimit_lock = SPIN_LOCK_UNLOCKED;
5017
5018int ata_ratelimit(void)
5019{
5020 int rc;
5021 unsigned long flags;
5022
5023 spin_lock_irqsave(&ata_ratelimit_lock, flags);
5024
5025 if (time_after(jiffies, ratelimit_time)) {
5026 rc = 1;
5027 ratelimit_time = jiffies + (HZ/5);
5028 } else
5029 rc = 0;
5030
5031 spin_unlock_irqrestore(&ata_ratelimit_lock, flags);
5032
5033 return rc;
5034}
5035
1da177e4
LT		 5036/*
5037 * libata is essentially a library of internal helper functions for
5038 * low-level ATA host controller drivers. As such, the API/ABI is
5039 * likely to change as new drivers are added and updated.
5040 * Do not depend on ABI/API stability.
5041 */
5042
5043EXPORT_SYMBOL_GPL(ata_std_bios_param);
5044EXPORT_SYMBOL_GPL(ata_std_ports);
5045EXPORT_SYMBOL_GPL(ata_device_add);
17b14451 5046EXPORT_SYMBOL_GPL(ata_host_set_remove);
1da177e4
LT		 5047EXPORT_SYMBOL_GPL(ata_sg_init);
5048EXPORT_SYMBOL_GPL(ata_sg_init_one);
76014427 5049EXPORT_SYMBOL_GPL(__ata_qc_complete);
1da177e4
LT		 5050EXPORT_SYMBOL_GPL(ata_qc_issue_prot);
5051EXPORT_SYMBOL_GPL(ata_eng_timeout);
5052EXPORT_SYMBOL_GPL(ata_tf_load);
5053EXPORT_SYMBOL_GPL(ata_tf_read);
5054EXPORT_SYMBOL_GPL(ata_noop_dev_select);
5055EXPORT_SYMBOL_GPL(ata_std_dev_select);
5056EXPORT_SYMBOL_GPL(ata_tf_to_fis);
5057EXPORT_SYMBOL_GPL(ata_tf_from_fis);
5058EXPORT_SYMBOL_GPL(ata_check_status);
5059EXPORT_SYMBOL_GPL(ata_altstatus);
1da177e4
LT		 5060EXPORT_SYMBOL_GPL(ata_exec_command);
5061EXPORT_SYMBOL_GPL(ata_port_start);
5062EXPORT_SYMBOL_GPL(ata_port_stop);
aa8f0dc6 5063EXPORT_SYMBOL_GPL(ata_host_stop);
1da177e4
LT		 5064EXPORT_SYMBOL_GPL(ata_interrupt);
5065EXPORT_SYMBOL_GPL(ata_qc_prep);
5066EXPORT_SYMBOL_GPL(ata_bmdma_setup);
5067EXPORT_SYMBOL_GPL(ata_bmdma_start);
5068EXPORT_SYMBOL_GPL(ata_bmdma_irq_clear);
5069EXPORT_SYMBOL_GPL(ata_bmdma_status);
5070EXPORT_SYMBOL_GPL(ata_bmdma_stop);
5071EXPORT_SYMBOL_GPL(ata_port_probe);
5072EXPORT_SYMBOL_GPL(sata_phy_reset);
5073EXPORT_SYMBOL_GPL(__sata_phy_reset);
5074EXPORT_SYMBOL_GPL(ata_bus_reset);
8a19ac89 5075EXPORT_SYMBOL_GPL(ata_std_probeinit);
c2bd5804
TH		 5076EXPORT_SYMBOL_GPL(ata_std_softreset);
5077EXPORT_SYMBOL_GPL(sata_std_hardreset);
5078EXPORT_SYMBOL_GPL(ata_std_postreset);
5079EXPORT_SYMBOL_GPL(ata_std_probe_reset);
a62c0fc5 5080EXPORT_SYMBOL_GPL(ata_drive_probe_reset);
623a3128 5081EXPORT_SYMBOL_GPL(ata_dev_revalidate);
1da177e4 5082EXPORT_SYMBOL_GPL(ata_port_disable);
67846b30 5083EXPORT_SYMBOL_GPL(ata_ratelimit);
6f8b9958 5084EXPORT_SYMBOL_GPL(ata_busy_sleep);
1da177e4
LT		 5085EXPORT_SYMBOL_GPL(ata_scsi_ioctl);
5086EXPORT_SYMBOL_GPL(ata_scsi_queuecmd);
f29841e0 5087EXPORT_SYMBOL_GPL(ata_scsi_timed_out);
1da177e4
LT		 5088EXPORT_SYMBOL_GPL(ata_scsi_error);
5089EXPORT_SYMBOL_GPL(ata_scsi_slave_config);
5090EXPORT_SYMBOL_GPL(ata_scsi_release);
5091EXPORT_SYMBOL_GPL(ata_host_intr);
5092EXPORT_SYMBOL_GPL(ata_dev_classify);
6a62a04d
TH		 5093EXPORT_SYMBOL_GPL(ata_id_string);
5094EXPORT_SYMBOL_GPL(ata_id_c_string);
1da177e4 5095EXPORT_SYMBOL_GPL(ata_scsi_simulate);
a72ec4ce
TH		 5096EXPORT_SYMBOL_GPL(ata_eh_qc_complete);
5097EXPORT_SYMBOL_GPL(ata_eh_qc_retry);
1da177e4 5098
1bc4ccff 5099EXPORT_SYMBOL_GPL(ata_pio_need_iordy);
452503f9
AC		 5100EXPORT_SYMBOL_GPL(ata_timing_compute);
5101EXPORT_SYMBOL_GPL(ata_timing_merge);
5102
1da177e4
LT		 5103#ifdef CONFIG_PCI
5104EXPORT_SYMBOL_GPL(pci_test_config_bits);
374b1873 5105EXPORT_SYMBOL_GPL(ata_pci_host_stop);
1da177e4
LT		 5106EXPORT_SYMBOL_GPL(ata_pci_init_native_mode);
5107EXPORT_SYMBOL_GPL(ata_pci_init_one);
5108EXPORT_SYMBOL_GPL(ata_pci_remove_one);
9b847548
JA		 5109EXPORT_SYMBOL_GPL(ata_pci_device_suspend);
5110EXPORT_SYMBOL_GPL(ata_pci_device_resume);
1da177e4 5111#endif /* CONFIG_PCI */
9b847548
JA		 5112
5113EXPORT_SYMBOL_GPL(ata_device_suspend);
5114EXPORT_SYMBOL_GPL(ata_device_resume);
5115EXPORT_SYMBOL_GPL(ata_scsi_device_suspend);
5116EXPORT_SYMBOL_GPL(ata_scsi_device_resume);
Linux 6.x block layer and io_uring tree(s)