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[PATCH] libata: use ata_dev_id_c_string()
[linux-2.6-block.git] / drivers / scsi / libata-core.c
CommitLineData
1da177e4 1/*
af36d7f0
JG		 2 * libata-core.c - helper library for ATA
3 *
4 * Maintained by: Jeff Garzik <jgarzik@pobox.com>
5 * Please ALWAYS copy linux-ide@vger.kernel.org
6 * on emails.
7 *
8 * Copyright 2003-2004 Red Hat, Inc. All rights reserved.
9 * Copyright 2003-2004 Jeff Garzik
10 *
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2, or (at your option)
15 * any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; see the file COPYING. If not, write to
24 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
25 *
26 *
27 * libata documentation is available via 'make {ps|pdf}docs',
28 * as Documentation/DocBook/libata.*
29 *
30 * Hardware documentation available from http://www.t13.org/ and
31 * http://www.sata-io.org/
32 *
1da177e4
LT		 33 */
34
35#include <linux/config.h>
36#include <linux/kernel.h>
37#include <linux/module.h>
38#include <linux/pci.h>
39#include <linux/init.h>
40#include <linux/list.h>
41#include <linux/mm.h>
42#include <linux/highmem.h>
43#include <linux/spinlock.h>
44#include <linux/blkdev.h>
45#include <linux/delay.h>
46#include <linux/timer.h>
47#include <linux/interrupt.h>
48#include <linux/completion.h>
49#include <linux/suspend.h>
50#include <linux/workqueue.h>
67846b30 51#include <linux/jiffies.h>
378f058c 52#include <linux/scatterlist.h>
1da177e4 53#include <scsi/scsi.h>
1da177e4 54#include "scsi_priv.h"
193515d5 55#include <scsi/scsi_cmnd.h>
1da177e4
LT		 56#include <scsi/scsi_host.h>
57#include <linux/libata.h>
58#include <asm/io.h>
59#include <asm/semaphore.h>
60#include <asm/byteorder.h>
61
62#include "libata.h"
63
59a10b17 64static void ata_dev_reread_id(struct ata_port *ap, struct ata_device *dev);
8bf62ece 65static void ata_dev_init_params(struct ata_port *ap, struct ata_device *dev);
1da177e4
LT		 66static void ata_set_mode(struct ata_port *ap);
67static void ata_dev_set_xfermode(struct ata_port *ap, struct ata_device *dev);
057ace5e 68static unsigned int ata_get_mode_mask(const struct ata_port *ap, int shift);
1da177e4 69static int fgb(u32 bitmap);
057ace5e 70static int ata_choose_xfer_mode(const struct ata_port *ap,
1da177e4
LT		 71 u8 *xfer_mode_out,
72 unsigned int *xfer_shift_out);
1da177e4
LT		 73
74static unsigned int ata_unique_id = 1;
75static struct workqueue_struct *ata_wq;
76
1623c81e
JG		 77int atapi_enabled = 0;
78module_param(atapi_enabled, int, 0444);
79MODULE_PARM_DESC(atapi_enabled, "Enable discovery of ATAPI devices (0=off, 1=on)");
80
1da177e4
LT		 81MODULE_AUTHOR("Jeff Garzik");
82MODULE_DESCRIPTION("Library module for ATA devices");
83MODULE_LICENSE("GPL");
84MODULE_VERSION(DRV_VERSION);
85
0baab86b 86
1da177e4
LT		 87/**
88 * ata_tf_to_fis - Convert ATA taskfile to SATA FIS structure
89 * @tf: Taskfile to convert
90 * @fis: Buffer into which data will output
91 * @pmp: Port multiplier port
92 *
93 * Converts a standard ATA taskfile to a Serial ATA
94 * FIS structure (Register - Host to Device).
95 *
96 * LOCKING:
97 * Inherited from caller.
98 */
99
057ace5e 100void ata_tf_to_fis(const struct ata_taskfile *tf, u8 *fis, u8 pmp)
1da177e4
LT		 101{
102 fis[0] = 0x27; /* Register - Host to Device FIS */
103 fis[1] = (pmp & 0xf) | (1 << 7); /* Port multiplier number,
104 bit 7 indicates Command FIS */
105 fis[2] = tf->command;
106 fis[3] = tf->feature;
107
108 fis[4] = tf->lbal;
109 fis[5] = tf->lbam;
110 fis[6] = tf->lbah;
111 fis[7] = tf->device;
112
113 fis[8] = tf->hob_lbal;
114 fis[9] = tf->hob_lbam;
115 fis[10] = tf->hob_lbah;
116 fis[11] = tf->hob_feature;
117
118 fis[12] = tf->nsect;
119 fis[13] = tf->hob_nsect;
120 fis[14] = 0;
121 fis[15] = tf->ctl;
122
123 fis[16] = 0;
124 fis[17] = 0;
125 fis[18] = 0;
126 fis[19] = 0;
127}
128
129/**
130 * ata_tf_from_fis - Convert SATA FIS to ATA taskfile
131 * @fis: Buffer from which data will be input
132 * @tf: Taskfile to output
133 *
e12a1be6 134 * Converts a serial ATA FIS structure to a standard ATA taskfile.
1da177e4
LT		 135 *
136 * LOCKING:
137 * Inherited from caller.
138 */
139
057ace5e 140void ata_tf_from_fis(const u8 *fis, struct ata_taskfile *tf)
1da177e4
LT		 141{
142 tf->command = fis[2]; /* status */
143 tf->feature = fis[3]; /* error */
144
145 tf->lbal = fis[4];
146 tf->lbam = fis[5];
147 tf->lbah = fis[6];
148 tf->device = fis[7];
149
150 tf->hob_lbal = fis[8];
151 tf->hob_lbam = fis[9];
152 tf->hob_lbah = fis[10];
153
154 tf->nsect = fis[12];
155 tf->hob_nsect = fis[13];
156}
157
8cbd6df1
AL		 158static const u8 ata_rw_cmds[] = {
159 /* pio multi */
160 ATA_CMD_READ_MULTI,
161 ATA_CMD_WRITE_MULTI,
162 ATA_CMD_READ_MULTI_EXT,
163 ATA_CMD_WRITE_MULTI_EXT,
9a3dccc4
TH		 164 0,
165 0,
166 0,
167 ATA_CMD_WRITE_MULTI_FUA_EXT,
8cbd6df1
AL		 168 /* pio */
169 ATA_CMD_PIO_READ,
170 ATA_CMD_PIO_WRITE,
171 ATA_CMD_PIO_READ_EXT,
172 ATA_CMD_PIO_WRITE_EXT,
9a3dccc4
TH		 173 0,
174 0,
175 0,
176 0,
8cbd6df1
AL		 177 /* dma */
178 ATA_CMD_READ,
179 ATA_CMD_WRITE,
180 ATA_CMD_READ_EXT,
9a3dccc4
TH		 181 ATA_CMD_WRITE_EXT,
182 0,
183 0,
184 0,
185 ATA_CMD_WRITE_FUA_EXT
8cbd6df1 186};
1da177e4
LT		 187
188/**
8cbd6df1
AL		 189 * ata_rwcmd_protocol - set taskfile r/w commands and protocol
190 * @qc: command to examine and configure
1da177e4 191 *
8cbd6df1
AL		 192 * Examine the device configuration and tf->flags to calculate
193 * the proper read/write commands and protocol to use.
1da177e4
LT		 194 *
195 * LOCKING:
196 * caller.
197 */
9a3dccc4 198int ata_rwcmd_protocol(struct ata_queued_cmd *qc)
1da177e4 199{
8cbd6df1
AL		 200 struct ata_taskfile *tf = &qc->tf;
201 struct ata_device *dev = qc->dev;
9a3dccc4 202 u8 cmd;
1da177e4 203
9a3dccc4 204 int index, fua, lba48, write;
8cbd6df1 205
9a3dccc4 206 fua = (tf->flags & ATA_TFLAG_FUA) ? 4 : 0;
8cbd6df1
AL		 207 lba48 = (tf->flags & ATA_TFLAG_LBA48) ? 2 : 0;
208 write = (tf->flags & ATA_TFLAG_WRITE) ? 1 : 0;
1da177e4 209
8cbd6df1
AL		 210 if (dev->flags & ATA_DFLAG_PIO) {
211 tf->protocol = ATA_PROT_PIO;
9a3dccc4 212 index = dev->multi_count ? 0 : 8;
8d238e01
AC		 213 } else if (lba48 && (qc->ap->flags & ATA_FLAG_PIO_LBA48)) {
214 /* Unable to use DMA due to host limitation */
215 tf->protocol = ATA_PROT_PIO;
216 index = dev->multi_count ? 0 : 4;
8cbd6df1
AL		 217 } else {
218 tf->protocol = ATA_PROT_DMA;
9a3dccc4 219 index = 16;
8cbd6df1 220 }
1da177e4 221
9a3dccc4
TH		 222 cmd = ata_rw_cmds[index + fua + lba48 + write];
223 if (cmd) {
224 tf->command = cmd;
225 return 0;
226 }
227 return -1;
1da177e4
LT		 228}
229
98ac62de 230static const char * const xfer_mode_str[] = {
1da177e4
LT		 231 "UDMA/16",
232 "UDMA/25",
233 "UDMA/33",
234 "UDMA/44",
235 "UDMA/66",
236 "UDMA/100",
237 "UDMA/133",
238 "UDMA7",
239 "MWDMA0",
240 "MWDMA1",
241 "MWDMA2",
242 "PIO0",
243 "PIO1",
244 "PIO2",
245 "PIO3",
246 "PIO4",
247};
248
249/**
250 * ata_udma_string - convert UDMA bit offset to string
251 * @mask: mask of bits supported; only highest bit counts.
252 *
253 * Determine string which represents the highest speed
254 * (highest bit in @udma_mask).
255 *
256 * LOCKING:
257 * None.
258 *
259 * RETURNS:
260 * Constant C string representing highest speed listed in
261 * @udma_mask, or the constant C string "<n/a>".
262 */
263
264static const char *ata_mode_string(unsigned int mask)
265{
266 int i;
267
268 for (i = 7; i >= 0; i--)
269 if (mask & (1 << i))
270 goto out;
271 for (i = ATA_SHIFT_MWDMA + 2; i >= ATA_SHIFT_MWDMA; i--)
272 if (mask & (1 << i))
273 goto out;
274 for (i = ATA_SHIFT_PIO + 4; i >= ATA_SHIFT_PIO; i--)
275 if (mask & (1 << i))
276 goto out;
277
278 return "<n/a>";
279
280out:
281 return xfer_mode_str[i];
282}
283
284/**
285 * ata_pio_devchk - PATA device presence detection
286 * @ap: ATA channel to examine
287 * @device: Device to examine (starting at zero)
288 *
289 * This technique was originally described in
290 * Hale Landis's ATADRVR (www.ata-atapi.com), and
291 * later found its way into the ATA/ATAPI spec.
292 *
293 * Write a pattern to the ATA shadow registers,
294 * and if a device is present, it will respond by
295 * correctly storing and echoing back the
296 * ATA shadow register contents.
297 *
298 * LOCKING:
299 * caller.
300 */
301
302static unsigned int ata_pio_devchk(struct ata_port *ap,
303 unsigned int device)
304{
305 struct ata_ioports *ioaddr = &ap->ioaddr;
306 u8 nsect, lbal;
307
308 ap->ops->dev_select(ap, device);
309
310 outb(0x55, ioaddr->nsect_addr);
311 outb(0xaa, ioaddr->lbal_addr);
312
313 outb(0xaa, ioaddr->nsect_addr);
314 outb(0x55, ioaddr->lbal_addr);
315
316 outb(0x55, ioaddr->nsect_addr);
317 outb(0xaa, ioaddr->lbal_addr);
318
319 nsect = inb(ioaddr->nsect_addr);
320 lbal = inb(ioaddr->lbal_addr);
321
322 if ((nsect == 0x55) && (lbal == 0xaa))
323 return 1; /* we found a device */
324
325 return 0; /* nothing found */
326}
327
328/**
329 * ata_mmio_devchk - PATA device presence detection
330 * @ap: ATA channel to examine
331 * @device: Device to examine (starting at zero)
332 *
333 * This technique was originally described in
334 * Hale Landis's ATADRVR (www.ata-atapi.com), and
335 * later found its way into the ATA/ATAPI spec.
336 *
337 * Write a pattern to the ATA shadow registers,
338 * and if a device is present, it will respond by
339 * correctly storing and echoing back the
340 * ATA shadow register contents.
341 *
342 * LOCKING:
343 * caller.
344 */
345
346static unsigned int ata_mmio_devchk(struct ata_port *ap,
347 unsigned int device)
348{
349 struct ata_ioports *ioaddr = &ap->ioaddr;
350 u8 nsect, lbal;
351
352 ap->ops->dev_select(ap, device);
353
354 writeb(0x55, (void __iomem *) ioaddr->nsect_addr);
355 writeb(0xaa, (void __iomem *) ioaddr->lbal_addr);
356
357 writeb(0xaa, (void __iomem *) ioaddr->nsect_addr);
358 writeb(0x55, (void __iomem *) ioaddr->lbal_addr);
359
360 writeb(0x55, (void __iomem *) ioaddr->nsect_addr);
361 writeb(0xaa, (void __iomem *) ioaddr->lbal_addr);
362
363 nsect = readb((void __iomem *) ioaddr->nsect_addr);
364 lbal = readb((void __iomem *) ioaddr->lbal_addr);
365
366 if ((nsect == 0x55) && (lbal == 0xaa))
367 return 1; /* we found a device */
368
369 return 0; /* nothing found */
370}
371
372/**
373 * ata_devchk - PATA device presence detection
374 * @ap: ATA channel to examine
375 * @device: Device to examine (starting at zero)
376 *
377 * Dispatch ATA device presence detection, depending
378 * on whether we are using PIO or MMIO to talk to the
379 * ATA shadow registers.
380 *
381 * LOCKING:
382 * caller.
383 */
384
385static unsigned int ata_devchk(struct ata_port *ap,
386 unsigned int device)
387{
388 if (ap->flags & ATA_FLAG_MMIO)
389 return ata_mmio_devchk(ap, device);
390 return ata_pio_devchk(ap, device);
391}
392
393/**
394 * ata_dev_classify - determine device type based on ATA-spec signature
395 * @tf: ATA taskfile register set for device to be identified
396 *
397 * Determine from taskfile register contents whether a device is
398 * ATA or ATAPI, as per "Signature and persistence" section
399 * of ATA/PI spec (volume 1, sect 5.14).
400 *
401 * LOCKING:
402 * None.
403 *
404 * RETURNS:
405 * Device type, %ATA_DEV_ATA, %ATA_DEV_ATAPI, or %ATA_DEV_UNKNOWN
406 * the event of failure.
407 */
408
057ace5e 409unsigned int ata_dev_classify(const struct ata_taskfile *tf)
1da177e4
LT		 410{
411 /* Apple's open source Darwin code hints that some devices only
412 * put a proper signature into the LBA mid/high registers,
413 * So, we only check those. It's sufficient for uniqueness.
414 */
415
416 if (((tf->lbam == 0) && (tf->lbah == 0)) ||
417 ((tf->lbam == 0x3c) && (tf->lbah == 0xc3))) {
418 DPRINTK("found ATA device by sig\n");
419 return ATA_DEV_ATA;
420 }
421
422 if (((tf->lbam == 0x14) && (tf->lbah == 0xeb)) ||
423 ((tf->lbam == 0x69) && (tf->lbah == 0x96))) {
424 DPRINTK("found ATAPI device by sig\n");
425 return ATA_DEV_ATAPI;
426 }
427
428 DPRINTK("unknown device\n");
429 return ATA_DEV_UNKNOWN;
430}
431
432/**
433 * ata_dev_try_classify - Parse returned ATA device signature
434 * @ap: ATA channel to examine
435 * @device: Device to examine (starting at zero)
b4dc7623 436 * @r_err: Value of error register on completion
1da177e4
LT		 437 *
438 * After an event -- SRST, E.D.D., or SATA COMRESET -- occurs,
439 * an ATA/ATAPI-defined set of values is placed in the ATA
440 * shadow registers, indicating the results of device detection
441 * and diagnostics.
442 *
443 * Select the ATA device, and read the values from the ATA shadow
444 * registers. Then parse according to the Error register value,
445 * and the spec-defined values examined by ata_dev_classify().
446 *
447 * LOCKING:
448 * caller.
b4dc7623
TH		 449 *
450 * RETURNS:
451 * Device type - %ATA_DEV_ATA, %ATA_DEV_ATAPI or %ATA_DEV_NONE.
1da177e4
LT		 452 */
453
b4dc7623
TH		 454static unsigned int
455ata_dev_try_classify(struct ata_port *ap, unsigned int device, u8 *r_err)
1da177e4 456{
1da177e4
LT		 457 struct ata_taskfile tf;
458 unsigned int class;
459 u8 err;
460
461 ap->ops->dev_select(ap, device);
462
463 memset(&tf, 0, sizeof(tf));
464
1da177e4 465 ap->ops->tf_read(ap, &tf);
0169e284 466 err = tf.feature;
b4dc7623
TH		 467 if (r_err)
468 *r_err = err;
1da177e4
LT		 469
470 /* see if device passed diags */
471 if (err == 1)
472 /* do nothing */ ;
473 else if ((device == 0) && (err == 0x81))
474 /* do nothing */ ;
475 else
b4dc7623 476 return ATA_DEV_NONE;
1da177e4 477
b4dc7623 478 /* determine if device is ATA or ATAPI */
1da177e4 479 class = ata_dev_classify(&tf);
b4dc7623 480
1da177e4 481 if (class == ATA_DEV_UNKNOWN)
b4dc7623 482 return ATA_DEV_NONE;
1da177e4 483 if ((class == ATA_DEV_ATA) && (ata_chk_status(ap) == 0))
b4dc7623
TH		 484 return ATA_DEV_NONE;
485 return class;
1da177e4
LT		 486}
487
488/**
489 * ata_dev_id_string - Convert IDENTIFY DEVICE page into string
490 * @id: IDENTIFY DEVICE results we will examine
491 * @s: string into which data is output
492 * @ofs: offset into identify device page
493 * @len: length of string to return. must be an even number.
494 *
495 * The strings in the IDENTIFY DEVICE page are broken up into
496 * 16-bit chunks. Run through the string, and output each
497 * 8-bit chunk linearly, regardless of platform.
498 *
499 * LOCKING:
500 * caller.
501 */
502
057ace5e 503void ata_dev_id_string(const u16 *id, unsigned char *s,
1da177e4
LT		 504 unsigned int ofs, unsigned int len)
505{
506 unsigned int c;
507
508 while (len > 0) {
509 c = id[ofs] >> 8;
510 *s = c;
511 s++;
512
513 c = id[ofs] & 0xff;
514 *s = c;
515 s++;
516
517 ofs++;
518 len -= 2;
519 }
520}
521
0e949ff3
TH		 522/**
523 * ata_dev_id_c_string - Convert IDENTIFY DEVICE page into C string
524 * @id: IDENTIFY DEVICE results we will examine
525 * @s: string into which data is output
526 * @ofs: offset into identify device page
527 * @len: length of string to return. must be an odd number.
528 *
529 * This function is identical to ata_dev_id_string except that it
530 * trims trailing spaces and terminates the resulting string with
531 * null. @len must be actual maximum length (even number) + 1.
532 *
533 * LOCKING:
534 * caller.
535 */
536void ata_dev_id_c_string(const u16 *id, unsigned char *s,
537 unsigned int ofs, unsigned int len)
538{
539 unsigned char *p;
540
541 WARN_ON(!(len & 1));
542
543 ata_dev_id_string(id, s, ofs, len - 1);
544
545 p = s + strnlen(s, len - 1);
546 while (p > s && p[-1] == ' ')
547 p--;
548 *p = '\0';
549}
0baab86b
EF		 550
551/**
552 * ata_noop_dev_select - Select device 0/1 on ATA bus
553 * @ap: ATA channel to manipulate
554 * @device: ATA device (numbered from zero) to select
555 *
556 * This function performs no actual function.
557 *
558 * May be used as the dev_select() entry in ata_port_operations.
559 *
560 * LOCKING:
561 * caller.
562 */
1da177e4
LT		 563void ata_noop_dev_select (struct ata_port *ap, unsigned int device)
564{
565}
566
0baab86b 567
1da177e4
LT		 568/**
569 * ata_std_dev_select - Select device 0/1 on ATA bus
570 * @ap: ATA channel to manipulate
571 * @device: ATA device (numbered from zero) to select
572 *
573 * Use the method defined in the ATA specification to
574 * make either device 0, or device 1, active on the
0baab86b
EF		 575 * ATA channel. Works with both PIO and MMIO.
576 *
577 * May be used as the dev_select() entry in ata_port_operations.
1da177e4
LT		 578 *
579 * LOCKING:
580 * caller.
581 */
582
583void ata_std_dev_select (struct ata_port *ap, unsigned int device)
584{
585 u8 tmp;
586
587 if (device == 0)
588 tmp = ATA_DEVICE_OBS;
589 else
590 tmp = ATA_DEVICE_OBS | ATA_DEV1;
591
592 if (ap->flags & ATA_FLAG_MMIO) {
593 writeb(tmp, (void __iomem *) ap->ioaddr.device_addr);
594 } else {
595 outb(tmp, ap->ioaddr.device_addr);
596 }
597 ata_pause(ap); /* needed; also flushes, for mmio */
598}
599
600/**
601 * ata_dev_select - Select device 0/1 on ATA bus
602 * @ap: ATA channel to manipulate
603 * @device: ATA device (numbered from zero) to select
604 * @wait: non-zero to wait for Status register BSY bit to clear
605 * @can_sleep: non-zero if context allows sleeping
606 *
607 * Use the method defined in the ATA specification to
608 * make either device 0, or device 1, active on the
609 * ATA channel.
610 *
611 * This is a high-level version of ata_std_dev_select(),
612 * which additionally provides the services of inserting
613 * the proper pauses and status polling, where needed.
614 *
615 * LOCKING:
616 * caller.
617 */
618
619void ata_dev_select(struct ata_port *ap, unsigned int device,
620 unsigned int wait, unsigned int can_sleep)
621{
622 VPRINTK("ENTER, ata%u: device %u, wait %u\n",
623 ap->id, device, wait);
624
625 if (wait)
626 ata_wait_idle(ap);
627
628 ap->ops->dev_select(ap, device);
629
630 if (wait) {
631 if (can_sleep && ap->device[device].class == ATA_DEV_ATAPI)
632 msleep(150);
633 ata_wait_idle(ap);
634 }
635}
636
637/**
638 * ata_dump_id - IDENTIFY DEVICE info debugging output
639 * @dev: Device whose IDENTIFY DEVICE page we will dump
640 *
641 * Dump selected 16-bit words from a detected device's
642 * IDENTIFY PAGE page.
643 *
644 * LOCKING:
645 * caller.
646 */
647
057ace5e 648static inline void ata_dump_id(const struct ata_device *dev)
1da177e4
LT		 649{
650 DPRINTK("49==0x%04x "
651 "53==0x%04x "
652 "63==0x%04x "
653 "64==0x%04x "
654 "75==0x%04x \n",
655 dev->id[49],
656 dev->id[53],
657 dev->id[63],
658 dev->id[64],
659 dev->id[75]);
660 DPRINTK("80==0x%04x "
661 "81==0x%04x "
662 "82==0x%04x "
663 "83==0x%04x "
664 "84==0x%04x \n",
665 dev->id[80],
666 dev->id[81],
667 dev->id[82],
668 dev->id[83],
669 dev->id[84]);
670 DPRINTK("88==0x%04x "
671 "93==0x%04x\n",
672 dev->id[88],
673 dev->id[93]);
674}
675
11e29e21
AC		 676/*
677 * Compute the PIO modes available for this device. This is not as
678 * trivial as it seems if we must consider early devices correctly.
679 *
680 * FIXME: pre IDE drive timing (do we care ?).
681 */
682
057ace5e 683static unsigned int ata_pio_modes(const struct ata_device *adev)
11e29e21
AC		 684{
685 u16 modes;
686
ffa29456
AC		 687 /* Usual case. Word 53 indicates word 64 is valid */
688 if (adev->id[ATA_ID_FIELD_VALID] & (1 << 1)) {
11e29e21
AC		 689 modes = adev->id[ATA_ID_PIO_MODES] & 0x03;
690 modes <<= 3;
691 modes |= 0x7;
692 return modes;
693 }
694
ffa29456
AC		 695 /* If word 64 isn't valid then Word 51 high byte holds the PIO timing
696 number for the maximum. Turn it into a mask and return it */
697 modes = (2 << ((adev->id[ATA_ID_OLD_PIO_MODES] >> 8) & 0xFF)) - 1 ;
11e29e21 698 return modes;
ffa29456
AC		 699 /* But wait.. there's more. Design your standards by committee and
700 you too can get a free iordy field to process. However its the
701 speeds not the modes that are supported... Note drivers using the
702 timing API will get this right anyway */
11e29e21
AC		 703}
704
95064379
TH		 705static inline void
706ata_queue_packet_task(struct ata_port *ap)
707{
c18d06f8
TH		 708 if (!(ap->flags & ATA_FLAG_FLUSH_PIO_TASK))
709 queue_work(ata_wq, &ap->packet_task);
95064379
TH		 710}
711
712static inline void
713ata_queue_pio_task(struct ata_port *ap)
714{
c18d06f8
TH		 715 if (!(ap->flags & ATA_FLAG_FLUSH_PIO_TASK))
716 queue_work(ata_wq, &ap->pio_task);
95064379
TH		 717}
718
719static inline void
720ata_queue_delayed_pio_task(struct ata_port *ap, unsigned long delay)
721{
c18d06f8
TH		 722 if (!(ap->flags & ATA_FLAG_FLUSH_PIO_TASK))
723 queue_delayed_work(ata_wq, &ap->pio_task, delay);
724}
725
726/**
727 * ata_flush_pio_tasks - Flush pio_task and packet_task
728 * @ap: the target ata_port
729 *
730 * After this function completes, pio_task and packet_task are
731 * guranteed not to be running or scheduled.
732 *
733 * LOCKING:
734 * Kernel thread context (may sleep)
735 */
736
737static void ata_flush_pio_tasks(struct ata_port *ap)
738{
739 int tmp = 0;
740 unsigned long flags;
741
742 DPRINTK("ENTER\n");
743
744 spin_lock_irqsave(&ap->host_set->lock, flags);
745 ap->flags |= ATA_FLAG_FLUSH_PIO_TASK;
746 spin_unlock_irqrestore(&ap->host_set->lock, flags);
747
748 DPRINTK("flush #1\n");
749 flush_workqueue(ata_wq);
750
751 /*
752 * At this point, if a task is running, it's guaranteed to see
753 * the FLUSH flag; thus, it will never queue pio tasks again.
754 * Cancel and flush.
755 */
756 tmp |= cancel_delayed_work(&ap->pio_task);
757 tmp |= cancel_delayed_work(&ap->packet_task);
758 if (!tmp) {
759 DPRINTK("flush #2\n");
760 flush_workqueue(ata_wq);
761 }
762
763 spin_lock_irqsave(&ap->host_set->lock, flags);
764 ap->flags &= ~ATA_FLAG_FLUSH_PIO_TASK;
765 spin_unlock_irqrestore(&ap->host_set->lock, flags);
766
767 DPRINTK("EXIT\n");
95064379
TH		 768}
769
77853bf2 770void ata_qc_complete_internal(struct ata_queued_cmd *qc)
a2a7a662 771{
77853bf2 772 struct completion *waiting = qc->private_data;
a2a7a662 773
77853bf2 774 qc->ap->ops->tf_read(qc->ap, &qc->tf);
a2a7a662 775 complete(waiting);
a2a7a662
TH		 776}
777
778/**
779 * ata_exec_internal - execute libata internal command
780 * @ap: Port to which the command is sent
781 * @dev: Device to which the command is sent
782 * @tf: Taskfile registers for the command and the result
783 * @dma_dir: Data tranfer direction of the command
784 * @buf: Data buffer of the command
785 * @buflen: Length of data buffer
786 *
787 * Executes libata internal command with timeout. @tf contains
788 * command on entry and result on return. Timeout and error
789 * conditions are reported via return value. No recovery action
790 * is taken after a command times out. It's caller's duty to
791 * clean up after timeout.
792 *
793 * LOCKING:
794 * None. Should be called with kernel context, might sleep.
795 */
796
797static unsigned
798ata_exec_internal(struct ata_port *ap, struct ata_device *dev,
799 struct ata_taskfile *tf,
800 int dma_dir, void *buf, unsigned int buflen)
801{
802 u8 command = tf->command;
803 struct ata_queued_cmd *qc;
804 DECLARE_COMPLETION(wait);
805 unsigned long flags;
77853bf2 806 unsigned int err_mask;
a2a7a662
TH		 807
808 spin_lock_irqsave(&ap->host_set->lock, flags);
809
810 qc = ata_qc_new_init(ap, dev);
811 BUG_ON(qc == NULL);
812
813 qc->tf = *tf;
814 qc->dma_dir = dma_dir;
815 if (dma_dir != DMA_NONE) {
816 ata_sg_init_one(qc, buf, buflen);
817 qc->nsect = buflen / ATA_SECT_SIZE;
818 }
819
77853bf2 820 qc->private_data = &wait;
a2a7a662
TH		 821 qc->complete_fn = ata_qc_complete_internal;
822
9a3d9eb0
TH		 823 qc->err_mask = ata_qc_issue(qc);
824 if (qc->err_mask)
8e436af9 825 ata_qc_complete(qc);
a2a7a662
TH		 826
827 spin_unlock_irqrestore(&ap->host_set->lock, flags);
828
829 if (!wait_for_completion_timeout(&wait, ATA_TMOUT_INTERNAL)) {
830 spin_lock_irqsave(&ap->host_set->lock, flags);
831
832 /* We're racing with irq here. If we lose, the
833 * following test prevents us from completing the qc
834 * again. If completion irq occurs after here but
835 * before the caller cleans up, it will result in a
836 * spurious interrupt. We can live with that.
837 */
77853bf2 838 if (qc->flags & ATA_QCFLAG_ACTIVE) {
11a56d24 839 qc->err_mask = AC_ERR_TIMEOUT;
a2a7a662
TH		 840 ata_qc_complete(qc);
841 printk(KERN_WARNING "ata%u: qc timeout (cmd 0x%x)\n",
842 ap->id, command);
843 }
844
845 spin_unlock_irqrestore(&ap->host_set->lock, flags);
846 }
847
77853bf2
TH		 848 *tf = qc->tf;
849 err_mask = qc->err_mask;
850
851 ata_qc_free(qc);
852
853 return err_mask;
a2a7a662
TH		 854}
855
1bc4ccff
AC		 856/**
857 * ata_pio_need_iordy - check if iordy needed
858 * @adev: ATA device
859 *
860 * Check if the current speed of the device requires IORDY. Used
861 * by various controllers for chip configuration.
862 */
863
864unsigned int ata_pio_need_iordy(const struct ata_device *adev)
865{
866 int pio;
867 int speed = adev->pio_mode - XFER_PIO_0;
868
869 if (speed < 2)
870 return 0;
871 if (speed > 2)
872 return 1;
873
874 /* If we have no drive specific rule, then PIO 2 is non IORDY */
875
876 if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE */
877 pio = adev->id[ATA_ID_EIDE_PIO];
878 /* Is the speed faster than the drive allows non IORDY ? */
879 if (pio) {
880 /* This is cycle times not frequency - watch the logic! */
881 if (pio > 240) /* PIO2 is 240nS per cycle */
882 return 1;
883 return 0;
884 }
885 }
886 return 0;
887}
888
1da177e4
LT		 889/**
890 * ata_dev_identify - obtain IDENTIFY x DEVICE page
891 * @ap: port on which device we wish to probe resides
892 * @device: device bus address, starting at zero
893 *
894 * Following bus reset, we issue the IDENTIFY [PACKET] DEVICE
895 * command, and read back the 512-byte device information page.
896 * The device information page is fed to us via the standard
897 * PIO-IN protocol, but we hand-code it here. (TODO: investigate
898 * using standard PIO-IN paths)
899 *
900 * After reading the device information page, we use several
901 * bits of information from it to initialize data structures
902 * that will be used during the lifetime of the ata_device.
903 * Other data from the info page is used to disqualify certain
904 * older ATA devices we do not wish to support.
905 *
906 * LOCKING:
907 * Inherited from caller. Some functions called by this function
908 * obtain the host_set lock.
909 */
910
911static void ata_dev_identify(struct ata_port *ap, unsigned int device)
912{
913 struct ata_device *dev = &ap->device[device];
8bf62ece 914 unsigned int major_version;
1da177e4
LT		 915 u16 tmp;
916 unsigned long xfer_modes;
1da177e4 917 unsigned int using_edd;
a0123703
TH		 918 struct ata_taskfile tf;
919 unsigned int err_mask;
1da177e4
LT		 920 int rc;
921
922 if (!ata_dev_present(dev)) {
923 DPRINTK("ENTER/EXIT (host %u, dev %u) -- nodev\n",
924 ap->id, device);
925 return;
926 }
927
928 if (ap->flags & (ATA_FLAG_SRST | ATA_FLAG_SATA_RESET))
929 using_edd = 0;
930 else
931 using_edd = 1;
932
933 DPRINTK("ENTER, host %u, dev %u\n", ap->id, device);
934
a4631474
TH		 935 WARN_ON(dev->class != ATA_DEV_ATA && dev->class != ATA_DEV_ATAPI &&
936 dev->class != ATA_DEV_NONE);
1da177e4
LT		 937
938 ata_dev_select(ap, device, 1, 1); /* select device 0/1 */
939
1da177e4 940retry:
a0123703
TH		 941 ata_tf_init(ap, &tf, device);
942
1da177e4 943 if (dev->class == ATA_DEV_ATA) {
a0123703 944 tf.command = ATA_CMD_ID_ATA;
1da177e4
LT		 945 DPRINTK("do ATA identify\n");
946 } else {
a0123703 947 tf.command = ATA_CMD_ID_ATAPI;
1da177e4
LT		 948 DPRINTK("do ATAPI identify\n");
949 }
950
a0123703 951 tf.protocol = ATA_PROT_PIO;
1da177e4 952
a0123703
TH		 953 err_mask = ata_exec_internal(ap, dev, &tf, DMA_FROM_DEVICE,
954 dev->id, sizeof(dev->id));
1da177e4 955
a0123703
TH		 956 if (err_mask) {
957 if (err_mask & ~AC_ERR_DEV)
958 goto err_out;
0169e284 959
1da177e4
LT		 960 /*
961 * arg! EDD works for all test cases, but seems to return
962 * the ATA signature for some ATAPI devices. Until the
963 * reason for this is found and fixed, we fix up the mess
964 * here. If IDENTIFY DEVICE returns command aborted
965 * (as ATAPI devices do), then we issue an
966 * IDENTIFY PACKET DEVICE.
967 *
968 * ATA software reset (SRST, the default) does not appear
969 * to have this problem.
970 */
7c398335 971 if ((using_edd) && (dev->class == ATA_DEV_ATA)) {
a0123703 972 u8 err = tf.feature;
1da177e4
LT		 973 if (err & ATA_ABORTED) {
974 dev->class = ATA_DEV_ATAPI;
1da177e4
LT		 975 goto retry;
976 }
977 }
978 goto err_out;
979 }
980
981 swap_buf_le16(dev->id, ATA_ID_WORDS);
982
983 /* print device capabilities */
984 printk(KERN_DEBUG "ata%u: dev %u cfg "
985 "49:%04x 82:%04x 83:%04x 84:%04x 85:%04x 86:%04x 87:%04x 88:%04x\n",
986 ap->id, device, dev->id[49],
987 dev->id[82], dev->id[83], dev->id[84],
988 dev->id[85], dev->id[86], dev->id[87],
989 dev->id[88]);
990
991 /*
992 * common ATA, ATAPI feature tests
993 */
994
8bf62ece
AL		 995 /* we require DMA support (bits 8 of word 49) */
996 if (!ata_id_has_dma(dev->id)) {
997 printk(KERN_DEBUG "ata%u: no dma\n", ap->id);
1da177e4
LT		 998 goto err_out_nosup;
999 }
1000
1001 /* quick-n-dirty find max transfer mode; for printk only */
1002 xfer_modes = dev->id[ATA_ID_UDMA_MODES];
1003 if (!xfer_modes)
1004 xfer_modes = (dev->id[ATA_ID_MWDMA_MODES]) << ATA_SHIFT_MWDMA;
11e29e21
AC		 1005 if (!xfer_modes)
1006 xfer_modes = ata_pio_modes(dev);
1da177e4
LT		 1007
1008 ata_dump_id(dev);
1009
1010 /* ATA-specific feature tests */
1011 if (dev->class == ATA_DEV_ATA) {
1012 if (!ata_id_is_ata(dev->id)) /* sanity check */
1013 goto err_out_nosup;
1014
8bf62ece 1015 /* get major version */
1da177e4 1016 tmp = dev->id[ATA_ID_MAJOR_VER];
8bf62ece
AL		 1017 for (major_version = 14; major_version >= 1; major_version--)
1018 if (tmp & (1 << major_version))
1da177e4
LT		 1019 break;
1020
8bf62ece
AL		 1021 /*
1022 * The exact sequence expected by certain pre-ATA4 drives is:
1023 * SRST RESET
1024 * IDENTIFY
1025 * INITIALIZE DEVICE PARAMETERS
1026 * anything else..
1027 * Some drives were very specific about that exact sequence.
1028 */
59a10b17 1029 if (major_version < 4 || (!ata_id_has_lba(dev->id))) {
8bf62ece
AL		 1030 ata_dev_init_params(ap, dev);
1031
59a10b17
AL		 1032 /* current CHS translation info (id[53-58]) might be
1033 * changed. reread the identify device info.
1034 */
1035 ata_dev_reread_id(ap, dev);
1036 }
1037
8bf62ece
AL		 1038 if (ata_id_has_lba(dev->id)) {
1039 dev->flags |= ATA_DFLAG_LBA;
1040
1041 if (ata_id_has_lba48(dev->id)) {
1042 dev->flags |= ATA_DFLAG_LBA48;
1043 dev->n_sectors = ata_id_u64(dev->id, 100);
1044 } else {
1045 dev->n_sectors = ata_id_u32(dev->id, 60);
1046 }
1047
1048 /* print device info to dmesg */
1049 printk(KERN_INFO "ata%u: dev %u ATA-%d, max %s, %Lu sectors:%s\n",
1050 ap->id, device,
1051 major_version,
1052 ata_mode_string(xfer_modes),
1053 (unsigned long long)dev->n_sectors,
1054 dev->flags & ATA_DFLAG_LBA48 ? " LBA48" : " LBA");
1055 } else {
1056 /* CHS */
1057
1058 /* Default translation */
1059 dev->cylinders = dev->id[1];
1060 dev->heads = dev->id[3];
1061 dev->sectors = dev->id[6];
1062 dev->n_sectors = dev->cylinders * dev->heads * dev->sectors;
1063
1064 if (ata_id_current_chs_valid(dev->id)) {
1065 /* Current CHS translation is valid. */
1066 dev->cylinders = dev->id[54];
1067 dev->heads = dev->id[55];
1068 dev->sectors = dev->id[56];
1069
1070 dev->n_sectors = ata_id_u32(dev->id, 57);
1071 }
1072
1073 /* print device info to dmesg */
1074 printk(KERN_INFO "ata%u: dev %u ATA-%d, max %s, %Lu sectors: CHS %d/%d/%d\n",
1075 ap->id, device,
1076 major_version,
1077 ata_mode_string(xfer_modes),
1078 (unsigned long long)dev->n_sectors,
1079 (int)dev->cylinders, (int)dev->heads, (int)dev->sectors);
1da177e4 1080
1da177e4
LT		 1081 }
1082
1083 ap->host->max_cmd_len = 16;
1da177e4
LT		 1084 }
1085
1086 /* ATAPI-specific feature tests */
2c13b7ce 1087 else if (dev->class == ATA_DEV_ATAPI) {
1da177e4
LT		 1088 if (ata_id_is_ata(dev->id)) /* sanity check */
1089 goto err_out_nosup;
1090
1091 rc = atapi_cdb_len(dev->id);
1092 if ((rc < 12) || (rc > ATAPI_CDB_LEN)) {
1093 printk(KERN_WARNING "ata%u: unsupported CDB len\n", ap->id);
1094 goto err_out_nosup;
1095 }
1096 ap->cdb_len = (unsigned int) rc;
1097 ap->host->max_cmd_len = (unsigned char) ap->cdb_len;
1098
1099 /* print device info to dmesg */
1100 printk(KERN_INFO "ata%u: dev %u ATAPI, max %s\n",
1101 ap->id, device,
1102 ata_mode_string(xfer_modes));
1103 }
1104
1105 DPRINTK("EXIT, drv_stat = 0x%x\n", ata_chk_status(ap));
1106 return;
1107
1108err_out_nosup:
1109 printk(KERN_WARNING "ata%u: dev %u not supported, ignoring\n",
1110 ap->id, device);
1111err_out:
1112 dev->class++; /* converts ATA_DEV_xxx into ATA_DEV_xxx_UNSUP */
1113 DPRINTK("EXIT, err\n");
1114}
1115
6f2f3812 1116
057ace5e 1117static inline u8 ata_dev_knobble(const struct ata_port *ap)
6f2f3812
BC		 1118{
1119 return ((ap->cbl == ATA_CBL_SATA) && (!ata_id_is_sata(ap->device->id)));
1120}
1121
1122/**
c893a3ae
RD		 1123 * ata_dev_config - Run device specific handlers & check for SATA->PATA bridges
1124 * @ap: Bus
1125 * @i: Device
6f2f3812 1126 *
c893a3ae 1127 * LOCKING:
6f2f3812 1128 */
8a60a071 1129
6f2f3812
BC		 1130void ata_dev_config(struct ata_port *ap, unsigned int i)
1131{
1132 /* limit bridge transfers to udma5, 200 sectors */
1133 if (ata_dev_knobble(ap)) {
1134 printk(KERN_INFO "ata%u(%u): applying bridge limits\n",
1135 ap->id, ap->device->devno);
1136 ap->udma_mask &= ATA_UDMA5;
1137 ap->host->max_sectors = ATA_MAX_SECTORS;
1138 ap->host->hostt->max_sectors = ATA_MAX_SECTORS;
9d824d07 1139 ap->device[i].flags |= ATA_DFLAG_LOCK_SECTORS;
6f2f3812
BC		 1140 }
1141
1142 if (ap->ops->dev_config)
1143 ap->ops->dev_config(ap, &ap->device[i]);
1144}
1145
1da177e4
LT		 1146/**
1147 * ata_bus_probe - Reset and probe ATA bus
1148 * @ap: Bus to probe
1149 *
0cba632b
JG		 1150 * Master ATA bus probing function. Initiates a hardware-dependent
1151 * bus reset, then attempts to identify any devices found on
1152 * the bus.
1153 *
1da177e4 1154 * LOCKING:
0cba632b 1155 * PCI/etc. bus probe sem.
1da177e4
LT		 1156 *
1157 * RETURNS:
1158 * Zero on success, non-zero on error.
1159 */
1160
1161static int ata_bus_probe(struct ata_port *ap)
1162{
1163 unsigned int i, found = 0;
1164
c19ba8af
TH		 1165 if (ap->ops->probe_reset) {
1166 unsigned int classes[ATA_MAX_DEVICES];
1167 int rc;
1168
1169 ata_port_probe(ap);
1170
1171 rc = ap->ops->probe_reset(ap, classes);
1172 if (rc == 0) {
06ab7822
TH		 1173 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1174 if (classes[i] == ATA_DEV_UNKNOWN)
1175 classes[i] = ATA_DEV_NONE;
c19ba8af 1176 ap->device[i].class = classes[i];
06ab7822 1177 }
c19ba8af
TH		 1178 } else {
1179 printk(KERN_ERR "ata%u: probe reset failed, "
1180 "disabling port\n", ap->id);
1181 ata_port_disable(ap);
1182 }
1183 } else
1184 ap->ops->phy_reset(ap);
1185
1da177e4
LT		 1186 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1187 goto err_out;
1188
1189 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1190 ata_dev_identify(ap, i);
1191 if (ata_dev_present(&ap->device[i])) {
1192 found = 1;
6f2f3812 1193 ata_dev_config(ap,i);
1da177e4
LT		 1194 }
1195 }
1196
1197 if ((!found) || (ap->flags & ATA_FLAG_PORT_DISABLED))
1198 goto err_out_disable;
1199
1200 ata_set_mode(ap);
1201 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1202 goto err_out_disable;
1203
1204 return 0;
1205
1206err_out_disable:
1207 ap->ops->port_disable(ap);
1208err_out:
1209 return -1;
1210}
1211
1212/**
0cba632b
JG		 1213 * ata_port_probe - Mark port as enabled
1214 * @ap: Port for which we indicate enablement
1da177e4 1215 *
0cba632b
JG		 1216 * Modify @ap data structure such that the system
1217 * thinks that the entire port is enabled.
1218 *
1219 * LOCKING: host_set lock, or some other form of
1220 * serialization.
1da177e4
LT		 1221 */
1222
1223void ata_port_probe(struct ata_port *ap)
1224{
1225 ap->flags &= ~ATA_FLAG_PORT_DISABLED;
1226}
1227
3be680b7
TH		 1228/**
1229 * sata_print_link_status - Print SATA link status
1230 * @ap: SATA port to printk link status about
1231 *
1232 * This function prints link speed and status of a SATA link.
1233 *
1234 * LOCKING:
1235 * None.
1236 */
1237static void sata_print_link_status(struct ata_port *ap)
1238{
1239 u32 sstatus, tmp;
1240 const char *speed;
1241
1242 if (!ap->ops->scr_read)
1243 return;
1244
1245 sstatus = scr_read(ap, SCR_STATUS);
1246
1247 if (sata_dev_present(ap)) {
1248 tmp = (sstatus >> 4) & 0xf;
1249 if (tmp & (1 << 0))
1250 speed = "1.5";
1251 else if (tmp & (1 << 1))
1252 speed = "3.0";
1253 else
1254 speed = "<unknown>";
1255 printk(KERN_INFO "ata%u: SATA link up %s Gbps (SStatus %X)\n",
1256 ap->id, speed, sstatus);
1257 } else {
1258 printk(KERN_INFO "ata%u: SATA link down (SStatus %X)\n",
1259 ap->id, sstatus);
1260 }
1261}
1262
1da177e4 1263/**
780a87f7
JG		 1264 * __sata_phy_reset - Wake/reset a low-level SATA PHY
1265 * @ap: SATA port associated with target SATA PHY.
1da177e4 1266 *
780a87f7
JG		 1267 * This function issues commands to standard SATA Sxxx
1268 * PHY registers, to wake up the phy (and device), and
1269 * clear any reset condition.
1da177e4
LT		 1270 *
1271 * LOCKING:
0cba632b 1272 * PCI/etc. bus probe sem.
1da177e4
LT		 1273 *
1274 */
1275void __sata_phy_reset(struct ata_port *ap)
1276{
1277 u32 sstatus;
1278 unsigned long timeout = jiffies + (HZ * 5);
1279
1280 if (ap->flags & ATA_FLAG_SATA_RESET) {
cdcca89e
BR		 1281 /* issue phy wake/reset */
1282 scr_write_flush(ap, SCR_CONTROL, 0x301);
62ba2841
TH		 1283 /* Couldn't find anything in SATA I/II specs, but
1284 * AHCI-1.1 10.4.2 says at least 1 ms. */
1285 mdelay(1);
1da177e4 1286 }
cdcca89e 1287 scr_write_flush(ap, SCR_CONTROL, 0x300); /* phy wake/clear reset */
1da177e4
LT		 1288
1289 /* wait for phy to become ready, if necessary */
1290 do {
1291 msleep(200);
1292 sstatus = scr_read(ap, SCR_STATUS);
1293 if ((sstatus & 0xf) != 1)
1294 break;
1295 } while (time_before(jiffies, timeout));
1296
3be680b7
TH		 1297 /* print link status */
1298 sata_print_link_status(ap);
656563e3 1299
3be680b7
TH		 1300 /* TODO: phy layer with polling, timeouts, etc. */
1301 if (sata_dev_present(ap))
1da177e4 1302 ata_port_probe(ap);
3be680b7 1303 else
1da177e4 1304 ata_port_disable(ap);
1da177e4
LT		 1305
1306 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1307 return;
1308
1309 if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) {
1310 ata_port_disable(ap);
1311 return;
1312 }
1313
1314 ap->cbl = ATA_CBL_SATA;
1315}
1316
1317/**
780a87f7
JG		 1318 * sata_phy_reset - Reset SATA bus.
1319 * @ap: SATA port associated with target SATA PHY.
1da177e4 1320 *
780a87f7
JG		 1321 * This function resets the SATA bus, and then probes
1322 * the bus for devices.
1da177e4
LT		 1323 *
1324 * LOCKING:
0cba632b 1325 * PCI/etc. bus probe sem.
1da177e4
LT		 1326 *
1327 */
1328void sata_phy_reset(struct ata_port *ap)
1329{
1330 __sata_phy_reset(ap);
1331 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1332 return;
1333 ata_bus_reset(ap);
1334}
1335
1336/**
780a87f7
JG		 1337 * ata_port_disable - Disable port.
1338 * @ap: Port to be disabled.
1da177e4 1339 *
780a87f7
JG		 1340 * Modify @ap data structure such that the system
1341 * thinks that the entire port is disabled, and should
1342 * never attempt to probe or communicate with devices
1343 * on this port.
1344 *
1345 * LOCKING: host_set lock, or some other form of
1346 * serialization.
1da177e4
LT		 1347 */
1348
1349void ata_port_disable(struct ata_port *ap)
1350{
1351 ap->device[0].class = ATA_DEV_NONE;
1352 ap->device[1].class = ATA_DEV_NONE;
1353 ap->flags |= ATA_FLAG_PORT_DISABLED;
1354}
1355
452503f9
AC		 1356/*
1357 * This mode timing computation functionality is ported over from
1358 * drivers/ide/ide-timing.h and was originally written by Vojtech Pavlik
1359 */
1360/*
1361 * PIO 0-5, MWDMA 0-2 and UDMA 0-6 timings (in nanoseconds).
1362 * These were taken from ATA/ATAPI-6 standard, rev 0a, except
1363 * for PIO 5, which is a nonstandard extension and UDMA6, which
1364 * is currently supported only by Maxtor drives.
1365 */
1366
1367static const struct ata_timing ata_timing[] = {
1368
1369 { XFER_UDMA_6, 0, 0, 0, 0, 0, 0, 0, 15 },
1370 { XFER_UDMA_5, 0, 0, 0, 0, 0, 0, 0, 20 },
1371 { XFER_UDMA_4, 0, 0, 0, 0, 0, 0, 0, 30 },
1372 { XFER_UDMA_3, 0, 0, 0, 0, 0, 0, 0, 45 },
1373
1374 { XFER_UDMA_2, 0, 0, 0, 0, 0, 0, 0, 60 },
1375 { XFER_UDMA_1, 0, 0, 0, 0, 0, 0, 0, 80 },
1376 { XFER_UDMA_0, 0, 0, 0, 0, 0, 0, 0, 120 },
1377
1378/* { XFER_UDMA_SLOW, 0, 0, 0, 0, 0, 0, 0, 150 }, */
1379
1380 { XFER_MW_DMA_2, 25, 0, 0, 0, 70, 25, 120, 0 },
1381 { XFER_MW_DMA_1, 45, 0, 0, 0, 80, 50, 150, 0 },
1382 { XFER_MW_DMA_0, 60, 0, 0, 0, 215, 215, 480, 0 },
1383
1384 { XFER_SW_DMA_2, 60, 0, 0, 0, 120, 120, 240, 0 },
1385 { XFER_SW_DMA_1, 90, 0, 0, 0, 240, 240, 480, 0 },
1386 { XFER_SW_DMA_0, 120, 0, 0, 0, 480, 480, 960, 0 },
1387
1388/* { XFER_PIO_5, 20, 50, 30, 100, 50, 30, 100, 0 }, */
1389 { XFER_PIO_4, 25, 70, 25, 120, 70, 25, 120, 0 },
1390 { XFER_PIO_3, 30, 80, 70, 180, 80, 70, 180, 0 },
1391
1392 { XFER_PIO_2, 30, 290, 40, 330, 100, 90, 240, 0 },
1393 { XFER_PIO_1, 50, 290, 93, 383, 125, 100, 383, 0 },
1394 { XFER_PIO_0, 70, 290, 240, 600, 165, 150, 600, 0 },
1395
1396/* { XFER_PIO_SLOW, 120, 290, 240, 960, 290, 240, 960, 0 }, */
1397
1398 { 0xFF }
1399};
1400
1401#define ENOUGH(v,unit) (((v)-1)/(unit)+1)
1402#define EZ(v,unit) ((v)?ENOUGH(v,unit):0)
1403
1404static void ata_timing_quantize(const struct ata_timing *t, struct ata_timing *q, int T, int UT)
1405{
1406 q->setup = EZ(t->setup * 1000, T);
1407 q->act8b = EZ(t->act8b * 1000, T);
1408 q->rec8b = EZ(t->rec8b * 1000, T);
1409 q->cyc8b = EZ(t->cyc8b * 1000, T);
1410 q->active = EZ(t->active * 1000, T);
1411 q->recover = EZ(t->recover * 1000, T);
1412 q->cycle = EZ(t->cycle * 1000, T);
1413 q->udma = EZ(t->udma * 1000, UT);
1414}
1415
1416void ata_timing_merge(const struct ata_timing *a, const struct ata_timing *b,
1417 struct ata_timing *m, unsigned int what)
1418{
1419 if (what & ATA_TIMING_SETUP ) m->setup = max(a->setup, b->setup);
1420 if (what & ATA_TIMING_ACT8B ) m->act8b = max(a->act8b, b->act8b);
1421 if (what & ATA_TIMING_REC8B ) m->rec8b = max(a->rec8b, b->rec8b);
1422 if (what & ATA_TIMING_CYC8B ) m->cyc8b = max(a->cyc8b, b->cyc8b);
1423 if (what & ATA_TIMING_ACTIVE ) m->active = max(a->active, b->active);
1424 if (what & ATA_TIMING_RECOVER) m->recover = max(a->recover, b->recover);
1425 if (what & ATA_TIMING_CYCLE ) m->cycle = max(a->cycle, b->cycle);
1426 if (what & ATA_TIMING_UDMA ) m->udma = max(a->udma, b->udma);
1427}
1428
1429static const struct ata_timing* ata_timing_find_mode(unsigned short speed)
1430{
1431 const struct ata_timing *t;
1432
1433 for (t = ata_timing; t->mode != speed; t++)
91190758 1434 if (t->mode == 0xFF)
452503f9
AC		 1435 return NULL;
1436 return t;
1437}
1438
1439int ata_timing_compute(struct ata_device *adev, unsigned short speed,
1440 struct ata_timing *t, int T, int UT)
1441{
1442 const struct ata_timing *s;
1443 struct ata_timing p;
1444
1445 /*
1446 * Find the mode.
75b1f2f8 1447 */
452503f9
AC		 1448
1449 if (!(s = ata_timing_find_mode(speed)))
1450 return -EINVAL;
1451
75b1f2f8
AL		 1452 memcpy(t, s, sizeof(*s));
1453
452503f9
AC		 1454 /*
1455 * If the drive is an EIDE drive, it can tell us it needs extended
1456 * PIO/MW_DMA cycle timing.
1457 */
1458
1459 if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE drive */
1460 memset(&p, 0, sizeof(p));
1461 if(speed >= XFER_PIO_0 && speed <= XFER_SW_DMA_0) {
1462 if (speed <= XFER_PIO_2) p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO];
1463 else p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO_IORDY];
1464 } else if(speed >= XFER_MW_DMA_0 && speed <= XFER_MW_DMA_2) {
1465 p.cycle = adev->id[ATA_ID_EIDE_DMA_MIN];
1466 }
1467 ata_timing_merge(&p, t, t, ATA_TIMING_CYCLE | ATA_TIMING_CYC8B);
1468 }
1469
1470 /*
1471 * Convert the timing to bus clock counts.
1472 */
1473
75b1f2f8 1474 ata_timing_quantize(t, t, T, UT);
452503f9
AC		 1475
1476 /*
c893a3ae
RD		 1477 * Even in DMA/UDMA modes we still use PIO access for IDENTIFY,
1478 * S.M.A.R.T * and some other commands. We have to ensure that the
1479 * DMA cycle timing is slower/equal than the fastest PIO timing.
452503f9
AC		 1480 */
1481
1482 if (speed > XFER_PIO_4) {
1483 ata_timing_compute(adev, adev->pio_mode, &p, T, UT);
1484 ata_timing_merge(&p, t, t, ATA_TIMING_ALL);
1485 }
1486
1487 /*
c893a3ae 1488 * Lengthen active & recovery time so that cycle time is correct.
452503f9
AC		 1489 */
1490
1491 if (t->act8b + t->rec8b < t->cyc8b) {
1492 t->act8b += (t->cyc8b - (t->act8b + t->rec8b)) / 2;
1493 t->rec8b = t->cyc8b - t->act8b;
1494 }
1495
1496 if (t->active + t->recover < t->cycle) {
1497 t->active += (t->cycle - (t->active + t->recover)) / 2;
1498 t->recover = t->cycle - t->active;
1499 }
1500
1501 return 0;
1502}
1503
057ace5e 1504static const struct {
1da177e4
LT		 1505 unsigned int shift;
1506 u8 base;
1507} xfer_mode_classes[] = {
1508 { ATA_SHIFT_UDMA, XFER_UDMA_0 },
1509 { ATA_SHIFT_MWDMA, XFER_MW_DMA_0 },
1510 { ATA_SHIFT_PIO, XFER_PIO_0 },
1511};
1512
858119e1 1513static u8 base_from_shift(unsigned int shift)
1da177e4
LT		 1514{
1515 int i;
1516
1517 for (i = 0; i < ARRAY_SIZE(xfer_mode_classes); i++)
1518 if (xfer_mode_classes[i].shift == shift)
1519 return xfer_mode_classes[i].base;
1520
1521 return 0xff;
1522}
1523
1524static void ata_dev_set_mode(struct ata_port *ap, struct ata_device *dev)
1525{
1526 int ofs, idx;
1527 u8 base;
1528
1529 if (!ata_dev_present(dev) || (ap->flags & ATA_FLAG_PORT_DISABLED))
1530 return;
1531
1532 if (dev->xfer_shift == ATA_SHIFT_PIO)
1533 dev->flags |= ATA_DFLAG_PIO;
1534
1535 ata_dev_set_xfermode(ap, dev);
1536
1537 base = base_from_shift(dev->xfer_shift);
1538 ofs = dev->xfer_mode - base;
1539 idx = ofs + dev->xfer_shift;
1540 WARN_ON(idx >= ARRAY_SIZE(xfer_mode_str));
1541
1542 DPRINTK("idx=%d xfer_shift=%u, xfer_mode=0x%x, base=0x%x, offset=%d\n",
1543 idx, dev->xfer_shift, (int)dev->xfer_mode, (int)base, ofs);
1544
1545 printk(KERN_INFO "ata%u: dev %u configured for %s\n",
1546 ap->id, dev->devno, xfer_mode_str[idx]);
1547}
1548
1549static int ata_host_set_pio(struct ata_port *ap)
1550{
1551 unsigned int mask;
1552 int x, i;
1553 u8 base, xfer_mode;
1554
1555 mask = ata_get_mode_mask(ap, ATA_SHIFT_PIO);
1556 x = fgb(mask);
1557 if (x < 0) {
1558 printk(KERN_WARNING "ata%u: no PIO support\n", ap->id);
1559 return -1;
1560 }
1561
1562 base = base_from_shift(ATA_SHIFT_PIO);
1563 xfer_mode = base + x;
1564
1565 DPRINTK("base 0x%x xfer_mode 0x%x mask 0x%x x %d\n",
1566 (int)base, (int)xfer_mode, mask, x);
1567
1568 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1569 struct ata_device *dev = &ap->device[i];
1570 if (ata_dev_present(dev)) {
1571 dev->pio_mode = xfer_mode;
1572 dev->xfer_mode = xfer_mode;
1573 dev->xfer_shift = ATA_SHIFT_PIO;
1574 if (ap->ops->set_piomode)
1575 ap->ops->set_piomode(ap, dev);
1576 }
1577 }
1578
1579 return 0;
1580}
1581
1582static void ata_host_set_dma(struct ata_port *ap, u8 xfer_mode,
1583 unsigned int xfer_shift)
1584{
1585 int i;
1586
1587 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1588 struct ata_device *dev = &ap->device[i];
1589 if (ata_dev_present(dev)) {
1590 dev->dma_mode = xfer_mode;
1591 dev->xfer_mode = xfer_mode;
1592 dev->xfer_shift = xfer_shift;
1593 if (ap->ops->set_dmamode)
1594 ap->ops->set_dmamode(ap, dev);
1595 }
1596 }
1597}
1598
1599/**
1600 * ata_set_mode - Program timings and issue SET FEATURES - XFER
1601 * @ap: port on which timings will be programmed
1602 *
780a87f7
JG		 1603 * Set ATA device disk transfer mode (PIO3, UDMA6, etc.).
1604 *
1da177e4 1605 * LOCKING:
0cba632b 1606 * PCI/etc. bus probe sem.
1da177e4
LT		 1607 */
1608static void ata_set_mode(struct ata_port *ap)
1609{
8cbd6df1 1610 unsigned int xfer_shift;
1da177e4
LT		 1611 u8 xfer_mode;
1612 int rc;
1613
1614 /* step 1: always set host PIO timings */
1615 rc = ata_host_set_pio(ap);
1616 if (rc)
1617 goto err_out;
1618
1619 /* step 2: choose the best data xfer mode */
1620 xfer_mode = xfer_shift = 0;
1621 rc = ata_choose_xfer_mode(ap, &xfer_mode, &xfer_shift);
1622 if (rc)
1623 goto err_out;
1624
1625 /* step 3: if that xfer mode isn't PIO, set host DMA timings */
1626 if (xfer_shift != ATA_SHIFT_PIO)
1627 ata_host_set_dma(ap, xfer_mode, xfer_shift);
1628
1629 /* step 4: update devices' xfer mode */
1630 ata_dev_set_mode(ap, &ap->device[0]);
1631 ata_dev_set_mode(ap, &ap->device[1]);
1632
1633 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1634 return;
1635
1636 if (ap->ops->post_set_mode)
1637 ap->ops->post_set_mode(ap);
1638
1da177e4
LT		 1639 return;
1640
1641err_out:
1642 ata_port_disable(ap);
1643}
1644
1fdffbce
JG		 1645/**
1646 * ata_tf_to_host - issue ATA taskfile to host controller
1647 * @ap: port to which command is being issued
1648 * @tf: ATA taskfile register set
1649 *
1650 * Issues ATA taskfile register set to ATA host controller,
1651 * with proper synchronization with interrupt handler and
1652 * other threads.
1653 *
1654 * LOCKING:
1655 * spin_lock_irqsave(host_set lock)
1656 */
1657
1658static inline void ata_tf_to_host(struct ata_port *ap,
1659 const struct ata_taskfile *tf)
1660{
1661 ap->ops->tf_load(ap, tf);
1662 ap->ops->exec_command(ap, tf);
1663}
1664
1da177e4
LT		 1665/**
1666 * ata_busy_sleep - sleep until BSY clears, or timeout
1667 * @ap: port containing status register to be polled
1668 * @tmout_pat: impatience timeout
1669 * @tmout: overall timeout
1670 *
780a87f7
JG		 1671 * Sleep until ATA Status register bit BSY clears,
1672 * or a timeout occurs.
1673 *
1674 * LOCKING: None.
1da177e4
LT		 1675 */
1676
6f8b9958
TH		 1677unsigned int ata_busy_sleep (struct ata_port *ap,
1678 unsigned long tmout_pat, unsigned long tmout)
1da177e4
LT		 1679{
1680 unsigned long timer_start, timeout;
1681 u8 status;
1682
1683 status = ata_busy_wait(ap, ATA_BUSY, 300);
1684 timer_start = jiffies;
1685 timeout = timer_start + tmout_pat;
1686 while ((status & ATA_BUSY) && (time_before(jiffies, timeout))) {
1687 msleep(50);
1688 status = ata_busy_wait(ap, ATA_BUSY, 3);
1689 }
1690
1691 if (status & ATA_BUSY)
1692 printk(KERN_WARNING "ata%u is slow to respond, "
1693 "please be patient\n", ap->id);
1694
1695 timeout = timer_start + tmout;
1696 while ((status & ATA_BUSY) && (time_before(jiffies, timeout))) {
1697 msleep(50);
1698 status = ata_chk_status(ap);
1699 }
1700
1701 if (status & ATA_BUSY) {
1702 printk(KERN_ERR "ata%u failed to respond (%lu secs)\n",
1703 ap->id, tmout / HZ);
1704 return 1;
1705 }
1706
1707 return 0;
1708}
1709
1710static void ata_bus_post_reset(struct ata_port *ap, unsigned int devmask)
1711{
1712 struct ata_ioports *ioaddr = &ap->ioaddr;
1713 unsigned int dev0 = devmask & (1 << 0);
1714 unsigned int dev1 = devmask & (1 << 1);
1715 unsigned long timeout;
1716
1717 /* if device 0 was found in ata_devchk, wait for its
1718 * BSY bit to clear
1719 */
1720 if (dev0)
1721 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
1722
1723 /* if device 1 was found in ata_devchk, wait for
1724 * register access, then wait for BSY to clear
1725 */
1726 timeout = jiffies + ATA_TMOUT_BOOT;
1727 while (dev1) {
1728 u8 nsect, lbal;
1729
1730 ap->ops->dev_select(ap, 1);
1731 if (ap->flags & ATA_FLAG_MMIO) {
1732 nsect = readb((void __iomem *) ioaddr->nsect_addr);
1733 lbal = readb((void __iomem *) ioaddr->lbal_addr);
1734 } else {
1735 nsect = inb(ioaddr->nsect_addr);
1736 lbal = inb(ioaddr->lbal_addr);
1737 }
1738 if ((nsect == 1) && (lbal == 1))
1739 break;
1740 if (time_after(jiffies, timeout)) {
1741 dev1 = 0;
1742 break;
1743 }
1744 msleep(50); /* give drive a breather */
1745 }
1746 if (dev1)
1747 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
1748
1749 /* is all this really necessary? */
1750 ap->ops->dev_select(ap, 0);
1751 if (dev1)
1752 ap->ops->dev_select(ap, 1);
1753 if (dev0)
1754 ap->ops->dev_select(ap, 0);
1755}
1756
1757/**
0cba632b
JG		 1758 * ata_bus_edd - Issue EXECUTE DEVICE DIAGNOSTIC command.
1759 * @ap: Port to reset and probe
1760 *
1761 * Use the EXECUTE DEVICE DIAGNOSTIC command to reset and
1762 * probe the bus. Not often used these days.
1da177e4
LT		 1763 *
1764 * LOCKING:
0cba632b 1765 * PCI/etc. bus probe sem.
e5338254 1766 * Obtains host_set lock.
1da177e4
LT		 1767 *
1768 */
1769
1770static unsigned int ata_bus_edd(struct ata_port *ap)
1771{
1772 struct ata_taskfile tf;
e5338254 1773 unsigned long flags;
1da177e4
LT		 1774
1775 /* set up execute-device-diag (bus reset) taskfile */
1776 /* also, take interrupts to a known state (disabled) */
1777 DPRINTK("execute-device-diag\n");
1778 ata_tf_init(ap, &tf, 0);
1779 tf.ctl |= ATA_NIEN;
1780 tf.command = ATA_CMD_EDD;
1781 tf.protocol = ATA_PROT_NODATA;
1782
1783 /* do bus reset */
e5338254 1784 spin_lock_irqsave(&ap->host_set->lock, flags);
1da177e4 1785 ata_tf_to_host(ap, &tf);
e5338254 1786 spin_unlock_irqrestore(&ap->host_set->lock, flags);
1da177e4
LT		 1787
1788 /* spec says at least 2ms. but who knows with those
1789 * crazy ATAPI devices...
1790 */
1791 msleep(150);
1792
1793 return ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
1794}
1795
1796static unsigned int ata_bus_softreset(struct ata_port *ap,
1797 unsigned int devmask)
1798{
1799 struct ata_ioports *ioaddr = &ap->ioaddr;
1800
1801 DPRINTK("ata%u: bus reset via SRST\n", ap->id);
1802
1803 /* software reset. causes dev0 to be selected */
1804 if (ap->flags & ATA_FLAG_MMIO) {
1805 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
1806 udelay(20); /* FIXME: flush */
1807 writeb(ap->ctl | ATA_SRST, (void __iomem *) ioaddr->ctl_addr);
1808 udelay(20); /* FIXME: flush */
1809 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
1810 } else {
1811 outb(ap->ctl, ioaddr->ctl_addr);
1812 udelay(10);
1813 outb(ap->ctl | ATA_SRST, ioaddr->ctl_addr);
1814 udelay(10);
1815 outb(ap->ctl, ioaddr->ctl_addr);
1816 }
1817
1818 /* spec mandates ">= 2ms" before checking status.
1819 * We wait 150ms, because that was the magic delay used for
1820 * ATAPI devices in Hale Landis's ATADRVR, for the period of time
1821 * between when the ATA command register is written, and then
1822 * status is checked. Because waiting for "a while" before
1823 * checking status is fine, post SRST, we perform this magic
1824 * delay here as well.
1825 */
1826 msleep(150);
1827
1828 ata_bus_post_reset(ap, devmask);
1829
1830 return 0;
1831}
1832
1833/**
1834 * ata_bus_reset - reset host port and associated ATA channel
1835 * @ap: port to reset
1836 *
1837 * This is typically the first time we actually start issuing
1838 * commands to the ATA channel. We wait for BSY to clear, then
1839 * issue EXECUTE DEVICE DIAGNOSTIC command, polling for its
1840 * result. Determine what devices, if any, are on the channel
1841 * by looking at the device 0/1 error register. Look at the signature
1842 * stored in each device's taskfile registers, to determine if
1843 * the device is ATA or ATAPI.
1844 *
1845 * LOCKING:
0cba632b
JG		 1846 * PCI/etc. bus probe sem.
1847 * Obtains host_set lock.
1da177e4
LT		 1848 *
1849 * SIDE EFFECTS:
1850 * Sets ATA_FLAG_PORT_DISABLED if bus reset fails.
1851 */
1852
1853void ata_bus_reset(struct ata_port *ap)
1854{
1855 struct ata_ioports *ioaddr = &ap->ioaddr;
1856 unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
1857 u8 err;
1858 unsigned int dev0, dev1 = 0, rc = 0, devmask = 0;
1859
1860 DPRINTK("ENTER, host %u, port %u\n", ap->id, ap->port_no);
1861
1862 /* determine if device 0/1 are present */
1863 if (ap->flags & ATA_FLAG_SATA_RESET)
1864 dev0 = 1;
1865 else {
1866 dev0 = ata_devchk(ap, 0);
1867 if (slave_possible)
1868 dev1 = ata_devchk(ap, 1);
1869 }
1870
1871 if (dev0)
1872 devmask |= (1 << 0);
1873 if (dev1)
1874 devmask |= (1 << 1);
1875
1876 /* select device 0 again */
1877 ap->ops->dev_select(ap, 0);
1878
1879 /* issue bus reset */
1880 if (ap->flags & ATA_FLAG_SRST)
1881 rc = ata_bus_softreset(ap, devmask);
1882 else if ((ap->flags & ATA_FLAG_SATA_RESET) == 0) {
1883 /* set up device control */
1884 if (ap->flags & ATA_FLAG_MMIO)
1885 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
1886 else
1887 outb(ap->ctl, ioaddr->ctl_addr);
1888 rc = ata_bus_edd(ap);
1889 }
1890
1891 if (rc)
1892 goto err_out;
1893
1894 /*
1895 * determine by signature whether we have ATA or ATAPI devices
1896 */
b4dc7623 1897 ap->device[0].class = ata_dev_try_classify(ap, 0, &err);
1da177e4 1898 if ((slave_possible) && (err != 0x81))
b4dc7623 1899 ap->device[1].class = ata_dev_try_classify(ap, 1, &err);
1da177e4
LT		 1900
1901 /* re-enable interrupts */
1902 if (ap->ioaddr.ctl_addr) /* FIXME: hack. create a hook instead */
1903 ata_irq_on(ap);
1904
1905 /* is double-select really necessary? */
1906 if (ap->device[1].class != ATA_DEV_NONE)
1907 ap->ops->dev_select(ap, 1);
1908 if (ap->device[0].class != ATA_DEV_NONE)
1909 ap->ops->dev_select(ap, 0);
1910
1911 /* if no devices were detected, disable this port */
1912 if ((ap->device[0].class == ATA_DEV_NONE) &&
1913 (ap->device[1].class == ATA_DEV_NONE))
1914 goto err_out;
1915
1916 if (ap->flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST)) {
1917 /* set up device control for ATA_FLAG_SATA_RESET */
1918 if (ap->flags & ATA_FLAG_MMIO)
1919 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
1920 else
1921 outb(ap->ctl, ioaddr->ctl_addr);
1922 }
1923
1924 DPRINTK("EXIT\n");
1925 return;
1926
1927err_out:
1928 printk(KERN_ERR "ata%u: disabling port\n", ap->id);
1929 ap->ops->port_disable(ap);
1930
1931 DPRINTK("EXIT\n");
1932}
1933
7a7921e8
TH		 1934static int sata_phy_resume(struct ata_port *ap)
1935{
1936 unsigned long timeout = jiffies + (HZ * 5);
1937 u32 sstatus;
1938
1939 scr_write_flush(ap, SCR_CONTROL, 0x300);
1940
1941 /* Wait for phy to become ready, if necessary. */
1942 do {
1943 msleep(200);
1944 sstatus = scr_read(ap, SCR_STATUS);
1945 if ((sstatus & 0xf) != 1)
1946 return 0;
1947 } while (time_before(jiffies, timeout));
1948
1949 return -1;
1950}
1951
8a19ac89
TH		 1952/**
1953 * ata_std_probeinit - initialize probing
1954 * @ap: port to be probed
1955 *
1956 * @ap is about to be probed. Initialize it. This function is
1957 * to be used as standard callback for ata_drive_probe_reset().
3a39746a
TH		 1958 *
1959 * NOTE!!! Do not use this function as probeinit if a low level
1960 * driver implements only hardreset. Just pass NULL as probeinit
1961 * in that case. Using this function is probably okay but doing
1962 * so makes reset sequence different from the original
1963 * ->phy_reset implementation and Jeff nervous. :-P
8a19ac89
TH		 1964 */
1965extern void ata_std_probeinit(struct ata_port *ap)
1966{
3a39746a 1967 if (ap->flags & ATA_FLAG_SATA && ap->ops->scr_read) {
8a19ac89 1968 sata_phy_resume(ap);
3a39746a
TH		 1969 if (sata_dev_present(ap))
1970 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
1971 }
8a19ac89
TH		 1972}
1973
c2bd5804
TH		 1974/**
1975 * ata_std_softreset - reset host port via ATA SRST
1976 * @ap: port to reset
1977 * @verbose: fail verbosely
1978 * @classes: resulting classes of attached devices
1979 *
1980 * Reset host port using ATA SRST. This function is to be used
1981 * as standard callback for ata_drive_*_reset() functions.
1982 *
1983 * LOCKING:
1984 * Kernel thread context (may sleep)
1985 *
1986 * RETURNS:
1987 * 0 on success, -errno otherwise.
1988 */
1989int ata_std_softreset(struct ata_port *ap, int verbose, unsigned int *classes)
1990{
1991 unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
1992 unsigned int devmask = 0, err_mask;
1993 u8 err;
1994
1995 DPRINTK("ENTER\n");
1996
3a39746a
TH		 1997 if (ap->ops->scr_read && !sata_dev_present(ap)) {
1998 classes[0] = ATA_DEV_NONE;
1999 goto out;
2000 }
2001
c2bd5804
TH		 2002 /* determine if device 0/1 are present */
2003 if (ata_devchk(ap, 0))
2004 devmask |= (1 << 0);
2005 if (slave_possible && ata_devchk(ap, 1))
2006 devmask |= (1 << 1);
2007
c2bd5804
TH		 2008 /* select device 0 again */
2009 ap->ops->dev_select(ap, 0);
2010
2011 /* issue bus reset */
2012 DPRINTK("about to softreset, devmask=%x\n", devmask);
2013 err_mask = ata_bus_softreset(ap, devmask);
2014 if (err_mask) {
2015 if (verbose)
2016 printk(KERN_ERR "ata%u: SRST failed (err_mask=0x%x)\n",
2017 ap->id, err_mask);
2018 else
2019 DPRINTK("EXIT, softreset failed (err_mask=0x%x)\n",
2020 err_mask);
2021 return -EIO;
2022 }
2023
2024 /* determine by signature whether we have ATA or ATAPI devices */
2025 classes[0] = ata_dev_try_classify(ap, 0, &err);
2026 if (slave_possible && err != 0x81)
2027 classes[1] = ata_dev_try_classify(ap, 1, &err);
2028
3a39746a 2029 out:
c2bd5804
TH		 2030 DPRINTK("EXIT, classes[0]=%u [1]=%u\n", classes[0], classes[1]);
2031 return 0;
2032}
2033
2034/**
2035 * sata_std_hardreset - reset host port via SATA phy reset
2036 * @ap: port to reset
2037 * @verbose: fail verbosely
2038 * @class: resulting class of attached device
2039 *
2040 * SATA phy-reset host port using DET bits of SControl register.
2041 * This function is to be used as standard callback for
2042 * ata_drive_*_reset().
2043 *
2044 * LOCKING:
2045 * Kernel thread context (may sleep)
2046 *
2047 * RETURNS:
2048 * 0 on success, -errno otherwise.
2049 */
2050int sata_std_hardreset(struct ata_port *ap, int verbose, unsigned int *class)
2051{
c2bd5804
TH		 2052 DPRINTK("ENTER\n");
2053
2054 /* Issue phy wake/reset */
2055 scr_write_flush(ap, SCR_CONTROL, 0x301);
2056
2057 /*
2058 * Couldn't find anything in SATA I/II specs, but AHCI-1.1
2059 * 10.4.2 says at least 1 ms.
2060 */
2061 msleep(1);
2062
7a7921e8
TH		 2063 /* Bring phy back */
2064 sata_phy_resume(ap);
c2bd5804 2065
c2bd5804
TH		 2066 /* TODO: phy layer with polling, timeouts, etc. */
2067 if (!sata_dev_present(ap)) {
2068 *class = ATA_DEV_NONE;
2069 DPRINTK("EXIT, link offline\n");
2070 return 0;
2071 }
2072
2073 if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) {
2074 if (verbose)
2075 printk(KERN_ERR "ata%u: COMRESET failed "
2076 "(device not ready)\n", ap->id);
2077 else
2078 DPRINTK("EXIT, device not ready\n");
2079 return -EIO;
2080 }
2081
3a39746a
TH		 2082 ap->ops->dev_select(ap, 0); /* probably unnecessary */
2083
c2bd5804
TH		 2084 *class = ata_dev_try_classify(ap, 0, NULL);
2085
2086 DPRINTK("EXIT, class=%u\n", *class);
2087 return 0;
2088}
2089
2090/**
2091 * ata_std_postreset - standard postreset callback
2092 * @ap: the target ata_port
2093 * @classes: classes of attached devices
2094 *
2095 * This function is invoked after a successful reset. Note that
2096 * the device might have been reset more than once using
2097 * different reset methods before postreset is invoked.
2098 * postreset is also reponsible for setting cable type.
2099 *
2100 * This function is to be used as standard callback for
2101 * ata_drive_*_reset().
2102 *
2103 * LOCKING:
2104 * Kernel thread context (may sleep)
2105 */
2106void ata_std_postreset(struct ata_port *ap, unsigned int *classes)
2107{
2108 DPRINTK("ENTER\n");
2109
2110 /* set cable type */
2111 if (ap->cbl == ATA_CBL_NONE && ap->flags & ATA_FLAG_SATA)
2112 ap->cbl = ATA_CBL_SATA;
2113
2114 /* print link status */
2115 if (ap->cbl == ATA_CBL_SATA)
2116 sata_print_link_status(ap);
2117
3a39746a
TH		 2118 /* re-enable interrupts */
2119 if (ap->ioaddr.ctl_addr) /* FIXME: hack. create a hook instead */
2120 ata_irq_on(ap);
c2bd5804
TH		 2121
2122 /* is double-select really necessary? */
2123 if (classes[0] != ATA_DEV_NONE)
2124 ap->ops->dev_select(ap, 1);
2125 if (classes[1] != ATA_DEV_NONE)
2126 ap->ops->dev_select(ap, 0);
2127
3a39746a
TH		 2128 /* bail out if no device is present */
2129 if (classes[0] == ATA_DEV_NONE && classes[1] == ATA_DEV_NONE) {
2130 DPRINTK("EXIT, no device\n");
2131 return;
2132 }
2133
2134 /* set up device control */
2135 if (ap->ioaddr.ctl_addr) {
2136 if (ap->flags & ATA_FLAG_MMIO)
2137 writeb(ap->ctl, (void __iomem *) ap->ioaddr.ctl_addr);
2138 else
2139 outb(ap->ctl, ap->ioaddr.ctl_addr);
2140 }
c2bd5804
TH		 2141
2142 DPRINTK("EXIT\n");
2143}
2144
2145/**
2146 * ata_std_probe_reset - standard probe reset method
2147 * @ap: prot to perform probe-reset
2148 * @classes: resulting classes of attached devices
2149 *
2150 * The stock off-the-shelf ->probe_reset method.
2151 *
2152 * LOCKING:
2153 * Kernel thread context (may sleep)
2154 *
2155 * RETURNS:
2156 * 0 on success, -errno otherwise.
2157 */
2158int ata_std_probe_reset(struct ata_port *ap, unsigned int *classes)
2159{
2160 ata_reset_fn_t hardreset;
2161
2162 hardreset = NULL;
b911fc3a 2163 if (ap->flags & ATA_FLAG_SATA && ap->ops->scr_read)
c2bd5804
TH		 2164 hardreset = sata_std_hardreset;
2165
8a19ac89 2166 return ata_drive_probe_reset(ap, ata_std_probeinit,
7944ea95 2167 ata_std_softreset, hardreset,
c2bd5804
TH		 2168 ata_std_postreset, classes);
2169}
2170
a62c0fc5
TH		 2171static int do_probe_reset(struct ata_port *ap, ata_reset_fn_t reset,
2172 ata_postreset_fn_t postreset,
2173 unsigned int *classes)
2174{
2175 int i, rc;
2176
2177 for (i = 0; i < ATA_MAX_DEVICES; i++)
2178 classes[i] = ATA_DEV_UNKNOWN;
2179
2180 rc = reset(ap, 0, classes);
2181 if (rc)
2182 return rc;
2183
2184 /* If any class isn't ATA_DEV_UNKNOWN, consider classification
2185 * is complete and convert all ATA_DEV_UNKNOWN to
2186 * ATA_DEV_NONE.
2187 */
2188 for (i = 0; i < ATA_MAX_DEVICES; i++)
2189 if (classes[i] != ATA_DEV_UNKNOWN)
2190 break;
2191
2192 if (i < ATA_MAX_DEVICES)
2193 for (i = 0; i < ATA_MAX_DEVICES; i++)
2194 if (classes[i] == ATA_DEV_UNKNOWN)
2195 classes[i] = ATA_DEV_NONE;
2196
2197 if (postreset)
2198 postreset(ap, classes);
2199
2200 return classes[0] != ATA_DEV_UNKNOWN ? 0 : -ENODEV;
2201}
2202
2203/**
2204 * ata_drive_probe_reset - Perform probe reset with given methods
2205 * @ap: port to reset
7944ea95 2206 * @probeinit: probeinit method (can be NULL)
a62c0fc5
TH		 2207 * @softreset: softreset method (can be NULL)
2208 * @hardreset: hardreset method (can be NULL)
2209 * @postreset: postreset method (can be NULL)
2210 * @classes: resulting classes of attached devices
2211 *
2212 * Reset the specified port and classify attached devices using
2213 * given methods. This function prefers softreset but tries all
2214 * possible reset sequences to reset and classify devices. This
2215 * function is intended to be used for constructing ->probe_reset
2216 * callback by low level drivers.
2217 *
2218 * Reset methods should follow the following rules.
2219 *
2220 * - Return 0 on sucess, -errno on failure.
2221 * - If classification is supported, fill classes[] with
2222 * recognized class codes.
2223 * - If classification is not supported, leave classes[] alone.
2224 * - If verbose is non-zero, print error message on failure;
2225 * otherwise, shut up.
2226 *
2227 * LOCKING:
2228 * Kernel thread context (may sleep)
2229 *
2230 * RETURNS:
2231 * 0 on success, -EINVAL if no reset method is avaliable, -ENODEV
2232 * if classification fails, and any error code from reset
2233 * methods.
2234 */
7944ea95 2235int ata_drive_probe_reset(struct ata_port *ap, ata_probeinit_fn_t probeinit,
a62c0fc5
TH		 2236 ata_reset_fn_t softreset, ata_reset_fn_t hardreset,
2237 ata_postreset_fn_t postreset, unsigned int *classes)
2238{
2239 int rc = -EINVAL;
2240
7944ea95
TH		 2241 if (probeinit)
2242 probeinit(ap);
2243
a62c0fc5
TH		 2244 if (softreset) {
2245 rc = do_probe_reset(ap, softreset, postreset, classes);
2246 if (rc == 0)
2247 return 0;
2248 }
2249
2250 if (!hardreset)
2251 return rc;
2252
2253 rc = do_probe_reset(ap, hardreset, postreset, classes);
2254 if (rc == 0 || rc != -ENODEV)
2255 return rc;
2256
2257 if (softreset)
2258 rc = do_probe_reset(ap, softreset, postreset, classes);
2259
2260 return rc;
2261}
2262
057ace5e
JG		 2263static void ata_pr_blacklisted(const struct ata_port *ap,
2264 const struct ata_device *dev)
1da177e4
LT		 2265{
2266 printk(KERN_WARNING "ata%u: dev %u is on DMA blacklist, disabling DMA\n",
2267 ap->id, dev->devno);
2268}
2269
98ac62de 2270static const char * const ata_dma_blacklist [] = {
1da177e4
LT		 2271 "WDC AC11000H",
2272 "WDC AC22100H",
2273 "WDC AC32500H",
2274 "WDC AC33100H",
2275 "WDC AC31600H",
2276 "WDC AC32100H",
2277 "WDC AC23200L",
2278 "Compaq CRD-8241B",
2279 "CRD-8400B",
2280 "CRD-8480B",
2281 "CRD-8482B",
2282 "CRD-84",
2283 "SanDisk SDP3B",
2284 "SanDisk SDP3B-64",
2285 "SANYO CD-ROM CRD",
2286 "HITACHI CDR-8",
2287 "HITACHI CDR-8335",
2288 "HITACHI CDR-8435",
2289 "Toshiba CD-ROM XM-6202B",
e922256a 2290 "TOSHIBA CD-ROM XM-1702BC",
1da177e4
LT		 2291 "CD-532E-A",
2292 "E-IDE CD-ROM CR-840",
2293 "CD-ROM Drive/F5A",
2294 "WPI CDD-820",
2295 "SAMSUNG CD-ROM SC-148C",
2296 "SAMSUNG CD-ROM SC",
2297 "SanDisk SDP3B-64",
1da177e4
LT		 2298 "ATAPI CD-ROM DRIVE 40X MAXIMUM",
2299 "_NEC DV5800A",
2300};
2301
057ace5e 2302static int ata_dma_blacklisted(const struct ata_device *dev)
1da177e4 2303{
2e02671d 2304 unsigned char model_num[41];
1da177e4
LT		 2305 int i;
2306
2e02671d
TH		 2307 ata_dev_id_c_string(dev->id, model_num, ATA_ID_PROD_OFS,
2308 sizeof(model_num));
1da177e4
LT		 2309
2310 for (i = 0; i < ARRAY_SIZE(ata_dma_blacklist); i++)
2e02671d 2311 if (!strcmp(ata_dma_blacklist[i], model_num))
1da177e4
LT		 2312 return 1;
2313
2314 return 0;
2315}
2316
057ace5e 2317static unsigned int ata_get_mode_mask(const struct ata_port *ap, int shift)
1da177e4 2318{
057ace5e 2319 const struct ata_device *master, *slave;
1da177e4
LT		 2320 unsigned int mask;
2321
2322 master = &ap->device[0];
2323 slave = &ap->device[1];
2324
a4631474 2325 WARN_ON(!ata_dev_present(master) && !ata_dev_present(slave));
1da177e4
LT		 2326
2327 if (shift == ATA_SHIFT_UDMA) {
2328 mask = ap->udma_mask;
2329 if (ata_dev_present(master)) {
2330 mask &= (master->id[ATA_ID_UDMA_MODES] & 0xff);
057ace5e 2331 if (ata_dma_blacklisted(master)) {
1da177e4
LT		 2332 mask = 0;
2333 ata_pr_blacklisted(ap, master);
2334 }
2335 }
2336 if (ata_dev_present(slave)) {
2337 mask &= (slave->id[ATA_ID_UDMA_MODES] & 0xff);
057ace5e 2338 if (ata_dma_blacklisted(slave)) {
1da177e4
LT		 2339 mask = 0;
2340 ata_pr_blacklisted(ap, slave);
2341 }
2342 }
2343 }
2344 else if (shift == ATA_SHIFT_MWDMA) {
2345 mask = ap->mwdma_mask;
2346 if (ata_dev_present(master)) {
2347 mask &= (master->id[ATA_ID_MWDMA_MODES] & 0x07);
057ace5e 2348 if (ata_dma_blacklisted(master)) {
1da177e4
LT		 2349 mask = 0;
2350 ata_pr_blacklisted(ap, master);
2351 }
2352 }
2353 if (ata_dev_present(slave)) {
2354 mask &= (slave->id[ATA_ID_MWDMA_MODES] & 0x07);
057ace5e 2355 if (ata_dma_blacklisted(slave)) {
1da177e4
LT		 2356 mask = 0;
2357 ata_pr_blacklisted(ap, slave);
2358 }
2359 }
2360 }
2361 else if (shift == ATA_SHIFT_PIO) {
2362 mask = ap->pio_mask;
2363 if (ata_dev_present(master)) {
2364 /* spec doesn't return explicit support for
2365 * PIO0-2, so we fake it
2366 */
2367 u16 tmp_mode = master->id[ATA_ID_PIO_MODES] & 0x03;
2368 tmp_mode <<= 3;
2369 tmp_mode |= 0x7;
2370 mask &= tmp_mode;
2371 }
2372 if (ata_dev_present(slave)) {
2373 /* spec doesn't return explicit support for
2374 * PIO0-2, so we fake it
2375 */
2376 u16 tmp_mode = slave->id[ATA_ID_PIO_MODES] & 0x03;
2377 tmp_mode <<= 3;
2378 tmp_mode |= 0x7;
2379 mask &= tmp_mode;
2380 }
2381 }
2382 else {
2383 mask = 0xffffffff; /* shut up compiler warning */
2384 BUG();
2385 }
2386
2387 return mask;
2388}
2389
2390/* find greatest bit */
2391static int fgb(u32 bitmap)
2392{
2393 unsigned int i;
2394 int x = -1;
2395
2396 for (i = 0; i < 32; i++)
2397 if (bitmap & (1 << i))
2398 x = i;
2399
2400 return x;
2401}
2402
2403/**
2404 * ata_choose_xfer_mode - attempt to find best transfer mode
2405 * @ap: Port for which an xfer mode will be selected
2406 * @xfer_mode_out: (output) SET FEATURES - XFER MODE code
2407 * @xfer_shift_out: (output) bit shift that selects this mode
2408 *
0cba632b
JG		 2409 * Based on host and device capabilities, determine the
2410 * maximum transfer mode that is amenable to all.
2411 *
1da177e4 2412 * LOCKING:
0cba632b 2413 * PCI/etc. bus probe sem.
1da177e4
LT		 2414 *
2415 * RETURNS:
2416 * Zero on success, negative on error.
2417 */
2418
057ace5e 2419static int ata_choose_xfer_mode(const struct ata_port *ap,
1da177e4
LT		 2420 u8 *xfer_mode_out,
2421 unsigned int *xfer_shift_out)
2422{
2423 unsigned int mask, shift;
2424 int x, i;
2425
2426 for (i = 0; i < ARRAY_SIZE(xfer_mode_classes); i++) {
2427 shift = xfer_mode_classes[i].shift;
2428 mask = ata_get_mode_mask(ap, shift);
2429
2430 x = fgb(mask);
2431 if (x >= 0) {
2432 *xfer_mode_out = xfer_mode_classes[i].base + x;
2433 *xfer_shift_out = shift;
2434 return 0;
2435 }
2436 }
2437
2438 return -1;
2439}
2440
2441/**
2442 * ata_dev_set_xfermode - Issue SET FEATURES - XFER MODE command
2443 * @ap: Port associated with device @dev
2444 * @dev: Device to which command will be sent
2445 *
780a87f7
JG		 2446 * Issue SET FEATURES - XFER MODE command to device @dev
2447 * on port @ap.
2448 *
1da177e4 2449 * LOCKING:
0cba632b 2450 * PCI/etc. bus probe sem.
1da177e4
LT		 2451 */
2452
2453static void ata_dev_set_xfermode(struct ata_port *ap, struct ata_device *dev)
2454{
a0123703 2455 struct ata_taskfile tf;
1da177e4
LT		 2456
2457 /* set up set-features taskfile */
2458 DPRINTK("set features - xfer mode\n");
2459
a0123703
TH		 2460 ata_tf_init(ap, &tf, dev->devno);
2461 tf.command = ATA_CMD_SET_FEATURES;
2462 tf.feature = SETFEATURES_XFER;
2463 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
2464 tf.protocol = ATA_PROT_NODATA;
2465 tf.nsect = dev->xfer_mode;
1da177e4 2466
a0123703
TH		 2467 if (ata_exec_internal(ap, dev, &tf, DMA_NONE, NULL, 0)) {
2468 printk(KERN_ERR "ata%u: failed to set xfermode, disabled\n",
2469 ap->id);
1da177e4 2470 ata_port_disable(ap);
a0123703 2471 }
1da177e4
LT		 2472
2473 DPRINTK("EXIT\n");
2474}
2475
59a10b17
AL		 2476/**
2477 * ata_dev_reread_id - Reread the device identify device info
2478 * @ap: port where the device is
2479 * @dev: device to reread the identify device info
2480 *
2481 * LOCKING:
2482 */
2483
2484static void ata_dev_reread_id(struct ata_port *ap, struct ata_device *dev)
2485{
a0123703 2486 struct ata_taskfile tf;
59a10b17 2487
a0123703 2488 ata_tf_init(ap, &tf, dev->devno);
59a10b17
AL		 2489
2490 if (dev->class == ATA_DEV_ATA) {
a0123703 2491 tf.command = ATA_CMD_ID_ATA;
59a10b17
AL		 2492 DPRINTK("do ATA identify\n");
2493 } else {
a0123703 2494 tf.command = ATA_CMD_ID_ATAPI;
59a10b17
AL		 2495 DPRINTK("do ATAPI identify\n");
2496 }
2497
a0123703
TH		 2498 tf.flags |= ATA_TFLAG_DEVICE;
2499 tf.protocol = ATA_PROT_PIO;
59a10b17 2500
a0123703
TH		 2501 if (ata_exec_internal(ap, dev, &tf, DMA_FROM_DEVICE,
2502 dev->id, sizeof(dev->id)))
59a10b17
AL		 2503 goto err_out;
2504
59a10b17
AL		 2505 swap_buf_le16(dev->id, ATA_ID_WORDS);
2506
2507 ata_dump_id(dev);
2508
2509 DPRINTK("EXIT\n");
2510
2511 return;
2512err_out:
a0123703 2513 printk(KERN_ERR "ata%u: failed to reread ID, disabled\n", ap->id);
59a10b17
AL		 2514 ata_port_disable(ap);
2515}
2516
8bf62ece
AL		 2517/**
2518 * ata_dev_init_params - Issue INIT DEV PARAMS command
2519 * @ap: Port associated with device @dev
2520 * @dev: Device to which command will be sent
2521 *
2522 * LOCKING:
2523 */
2524
2525static void ata_dev_init_params(struct ata_port *ap, struct ata_device *dev)
2526{
a0123703 2527 struct ata_taskfile tf;
8bf62ece
AL		 2528 u16 sectors = dev->id[6];
2529 u16 heads = dev->id[3];
2530
2531 /* Number of sectors per track 1-255. Number of heads 1-16 */
2532 if (sectors < 1 || sectors > 255 || heads < 1 || heads > 16)
2533 return;
2534
2535 /* set up init dev params taskfile */
2536 DPRINTK("init dev params \n");
2537
a0123703
TH		 2538 ata_tf_init(ap, &tf, dev->devno);
2539 tf.command = ATA_CMD_INIT_DEV_PARAMS;
2540 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
2541 tf.protocol = ATA_PROT_NODATA;
2542 tf.nsect = sectors;
2543 tf.device |= (heads - 1) & 0x0f; /* max head = num. of heads - 1 */
8bf62ece 2544
a0123703
TH		 2545 if (ata_exec_internal(ap, dev, &tf, DMA_NONE, NULL, 0)) {
2546 printk(KERN_ERR "ata%u: failed to init parameters, disabled\n",
2547 ap->id);
8bf62ece 2548 ata_port_disable(ap);
a0123703 2549 }
8bf62ece
AL		 2550
2551 DPRINTK("EXIT\n");
2552}
2553
1da177e4 2554/**
0cba632b
JG		 2555 * ata_sg_clean - Unmap DMA memory associated with command
2556 * @qc: Command containing DMA memory to be released
2557 *
2558 * Unmap all mapped DMA memory associated with this command.
1da177e4
LT		 2559 *
2560 * LOCKING:
0cba632b 2561 * spin_lock_irqsave(host_set lock)
1da177e4
LT		 2562 */
2563
2564static void ata_sg_clean(struct ata_queued_cmd *qc)
2565{
2566 struct ata_port *ap = qc->ap;
cedc9a47 2567 struct scatterlist *sg = qc->__sg;
1da177e4 2568 int dir = qc->dma_dir;
cedc9a47 2569 void *pad_buf = NULL;
1da177e4 2570
a4631474
TH		 2571 WARN_ON(!(qc->flags & ATA_QCFLAG_DMAMAP));
2572 WARN_ON(sg == NULL);
1da177e4
LT		 2573
2574 if (qc->flags & ATA_QCFLAG_SINGLE)
a4631474 2575 WARN_ON(qc->n_elem != 1);
1da177e4 2576
2c13b7ce 2577 VPRINTK("unmapping %u sg elements\n", qc->n_elem);
1da177e4 2578
cedc9a47
JG		 2579 /* if we padded the buffer out to 32-bit bound, and data
2580 * xfer direction is from-device, we must copy from the
2581 * pad buffer back into the supplied buffer
2582 */
2583 if (qc->pad_len && !(qc->tf.flags & ATA_TFLAG_WRITE))
2584 pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
2585
2586 if (qc->flags & ATA_QCFLAG_SG) {
e1410f2d
JG		 2587 if (qc->n_elem)
2588 dma_unmap_sg(ap->host_set->dev, sg, qc->n_elem, dir);
cedc9a47
JG		 2589 /* restore last sg */
2590 sg[qc->orig_n_elem - 1].length += qc->pad_len;
2591 if (pad_buf) {
2592 struct scatterlist *psg = &qc->pad_sgent;
2593 void *addr = kmap_atomic(psg->page, KM_IRQ0);
2594 memcpy(addr + psg->offset, pad_buf, qc->pad_len);
dfa15988 2595 kunmap_atomic(addr, KM_IRQ0);
cedc9a47
JG		 2596 }
2597 } else {
e1410f2d
JG		 2598 if (sg_dma_len(&sg[0]) > 0)
2599 dma_unmap_single(ap->host_set->dev,
2600 sg_dma_address(&sg[0]), sg_dma_len(&sg[0]),
2601 dir);
cedc9a47
JG		 2602 /* restore sg */
2603 sg->length += qc->pad_len;
2604 if (pad_buf)
2605 memcpy(qc->buf_virt + sg->length - qc->pad_len,
2606 pad_buf, qc->pad_len);
2607 }
1da177e4
LT		 2608
2609 qc->flags &= ~ATA_QCFLAG_DMAMAP;
cedc9a47 2610 qc->__sg = NULL;
1da177e4
LT		 2611}
2612
2613/**
2614 * ata_fill_sg - Fill PCI IDE PRD table
2615 * @qc: Metadata associated with taskfile to be transferred
2616 *
780a87f7
JG		 2617 * Fill PCI IDE PRD (scatter-gather) table with segments
2618 * associated with the current disk command.
2619 *
1da177e4 2620 * LOCKING:
780a87f7 2621 * spin_lock_irqsave(host_set lock)
1da177e4
LT		 2622 *
2623 */
2624static void ata_fill_sg(struct ata_queued_cmd *qc)
2625{
1da177e4 2626 struct ata_port *ap = qc->ap;
cedc9a47
JG		 2627 struct scatterlist *sg;
2628 unsigned int idx;
1da177e4 2629
a4631474
TH		 2630 WARN_ON(qc->__sg == NULL);
2631 WARN_ON(qc->n_elem == 0);
1da177e4
LT		 2632
2633 idx = 0;
cedc9a47 2634 ata_for_each_sg(sg, qc) {
1da177e4
LT		 2635 u32 addr, offset;
2636 u32 sg_len, len;
2637
2638 /* determine if physical DMA addr spans 64K boundary.
2639 * Note h/w doesn't support 64-bit, so we unconditionally
2640 * truncate dma_addr_t to u32.
2641 */
2642 addr = (u32) sg_dma_address(sg);
2643 sg_len = sg_dma_len(sg);
2644
2645 while (sg_len) {
2646 offset = addr & 0xffff;
2647 len = sg_len;
2648 if ((offset + sg_len) > 0x10000)
2649 len = 0x10000 - offset;
2650
2651 ap->prd[idx].addr = cpu_to_le32(addr);
2652 ap->prd[idx].flags_len = cpu_to_le32(len & 0xffff);
2653 VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", idx, addr, len);
2654
2655 idx++;
2656 sg_len -= len;
2657 addr += len;
2658 }
2659 }
2660
2661 if (idx)
2662 ap->prd[idx - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT);
2663}
2664/**
2665 * ata_check_atapi_dma - Check whether ATAPI DMA can be supported
2666 * @qc: Metadata associated with taskfile to check
2667 *
780a87f7
JG		 2668 * Allow low-level driver to filter ATA PACKET commands, returning
2669 * a status indicating whether or not it is OK to use DMA for the
2670 * supplied PACKET command.
2671 *
1da177e4 2672 * LOCKING:
0cba632b
JG		 2673 * spin_lock_irqsave(host_set lock)
2674 *
1da177e4
LT		 2675 * RETURNS: 0 when ATAPI DMA can be used
2676 * nonzero otherwise
2677 */
2678int ata_check_atapi_dma(struct ata_queued_cmd *qc)
2679{
2680 struct ata_port *ap = qc->ap;
2681 int rc = 0; /* Assume ATAPI DMA is OK by default */
2682
2683 if (ap->ops->check_atapi_dma)
2684 rc = ap->ops->check_atapi_dma(qc);
2685
2686 return rc;
2687}
2688/**
2689 * ata_qc_prep - Prepare taskfile for submission
2690 * @qc: Metadata associated with taskfile to be prepared
2691 *
780a87f7
JG		 2692 * Prepare ATA taskfile for submission.
2693 *
1da177e4
LT		 2694 * LOCKING:
2695 * spin_lock_irqsave(host_set lock)
2696 */
2697void ata_qc_prep(struct ata_queued_cmd *qc)
2698{
2699 if (!(qc->flags & ATA_QCFLAG_DMAMAP))
2700 return;
2701
2702 ata_fill_sg(qc);
2703}
2704
0cba632b
JG		 2705/**
2706 * ata_sg_init_one - Associate command with memory buffer
2707 * @qc: Command to be associated
2708 * @buf: Memory buffer
2709 * @buflen: Length of memory buffer, in bytes.
2710 *
2711 * Initialize the data-related elements of queued_cmd @qc
2712 * to point to a single memory buffer, @buf of byte length @buflen.
2713 *
2714 * LOCKING:
2715 * spin_lock_irqsave(host_set lock)
2716 */
2717
1da177e4
LT		 2718void ata_sg_init_one(struct ata_queued_cmd *qc, void *buf, unsigned int buflen)
2719{
2720 struct scatterlist *sg;
2721
2722 qc->flags |= ATA_QCFLAG_SINGLE;
2723
2724 memset(&qc->sgent, 0, sizeof(qc->sgent));
cedc9a47 2725 qc->__sg = &qc->sgent;
1da177e4 2726 qc->n_elem = 1;
cedc9a47 2727 qc->orig_n_elem = 1;
1da177e4
LT		 2728 qc->buf_virt = buf;
2729
cedc9a47 2730 sg = qc->__sg;
f0612bbc 2731 sg_init_one(sg, buf, buflen);
1da177e4
LT		 2732}
2733
0cba632b
JG		 2734/**
2735 * ata_sg_init - Associate command with scatter-gather table.
2736 * @qc: Command to be associated
2737 * @sg: Scatter-gather table.
2738 * @n_elem: Number of elements in s/g table.
2739 *
2740 * Initialize the data-related elements of queued_cmd @qc
2741 * to point to a scatter-gather table @sg, containing @n_elem
2742 * elements.
2743 *
2744 * LOCKING:
2745 * spin_lock_irqsave(host_set lock)
2746 */
2747
1da177e4
LT		 2748void ata_sg_init(struct ata_queued_cmd *qc, struct scatterlist *sg,
2749 unsigned int n_elem)
2750{
2751 qc->flags |= ATA_QCFLAG_SG;
cedc9a47 2752 qc->__sg = sg;
1da177e4 2753 qc->n_elem = n_elem;
cedc9a47 2754 qc->orig_n_elem = n_elem;
1da177e4
LT		 2755}
2756
2757/**
0cba632b
JG		 2758 * ata_sg_setup_one - DMA-map the memory buffer associated with a command.
2759 * @qc: Command with memory buffer to be mapped.
2760 *
2761 * DMA-map the memory buffer associated with queued_cmd @qc.
1da177e4
LT		 2762 *
2763 * LOCKING:
2764 * spin_lock_irqsave(host_set lock)
2765 *
2766 * RETURNS:
0cba632b 2767 * Zero on success, negative on error.
1da177e4
LT		 2768 */
2769
2770static int ata_sg_setup_one(struct ata_queued_cmd *qc)
2771{
2772 struct ata_port *ap = qc->ap;
2773 int dir = qc->dma_dir;
cedc9a47 2774 struct scatterlist *sg = qc->__sg;
1da177e4
LT		 2775 dma_addr_t dma_address;
2776
cedc9a47
JG		 2777 /* we must lengthen transfers to end on a 32-bit boundary */
2778 qc->pad_len = sg->length & 3;
2779 if (qc->pad_len) {
2780 void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
2781 struct scatterlist *psg = &qc->pad_sgent;
2782
a4631474 2783 WARN_ON(qc->dev->class != ATA_DEV_ATAPI);
cedc9a47
JG		 2784
2785 memset(pad_buf, 0, ATA_DMA_PAD_SZ);
2786
2787 if (qc->tf.flags & ATA_TFLAG_WRITE)
2788 memcpy(pad_buf, qc->buf_virt + sg->length - qc->pad_len,
2789 qc->pad_len);
2790
2791 sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ);
2792 sg_dma_len(psg) = ATA_DMA_PAD_SZ;
2793 /* trim sg */
2794 sg->length -= qc->pad_len;
2795
2796 DPRINTK("padding done, sg->length=%u pad_len=%u\n",
2797 sg->length, qc->pad_len);
2798 }
2799
e1410f2d
JG		 2800 if (!sg->length) {
2801 sg_dma_address(sg) = 0;
2802 goto skip_map;
2803 }
2804
1da177e4 2805 dma_address = dma_map_single(ap->host_set->dev, qc->buf_virt,
32529e01 2806 sg->length, dir);
537a95d9
TH		 2807 if (dma_mapping_error(dma_address)) {
2808 /* restore sg */
2809 sg->length += qc->pad_len;
1da177e4 2810 return -1;
537a95d9 2811 }
1da177e4
LT		 2812
2813 sg_dma_address(sg) = dma_address;
e1410f2d 2814skip_map:
32529e01 2815 sg_dma_len(sg) = sg->length;
1da177e4
LT		 2816
2817 DPRINTK("mapped buffer of %d bytes for %s\n", sg_dma_len(sg),
2818 qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
2819
2820 return 0;
2821}
2822
2823/**
0cba632b
JG		 2824 * ata_sg_setup - DMA-map the scatter-gather table associated with a command.
2825 * @qc: Command with scatter-gather table to be mapped.
2826 *
2827 * DMA-map the scatter-gather table associated with queued_cmd @qc.
1da177e4
LT		 2828 *
2829 * LOCKING:
2830 * spin_lock_irqsave(host_set lock)
2831 *
2832 * RETURNS:
0cba632b 2833 * Zero on success, negative on error.
1da177e4
LT		 2834 *
2835 */
2836
2837static int ata_sg_setup(struct ata_queued_cmd *qc)
2838{
2839 struct ata_port *ap = qc->ap;
cedc9a47
JG		 2840 struct scatterlist *sg = qc->__sg;
2841 struct scatterlist *lsg = &sg[qc->n_elem - 1];
e1410f2d 2842 int n_elem, pre_n_elem, dir, trim_sg = 0;
1da177e4
LT		 2843
2844 VPRINTK("ENTER, ata%u\n", ap->id);
a4631474 2845 WARN_ON(!(qc->flags & ATA_QCFLAG_SG));
1da177e4 2846
cedc9a47
JG		 2847 /* we must lengthen transfers to end on a 32-bit boundary */
2848 qc->pad_len = lsg->length & 3;
2849 if (qc->pad_len) {
2850 void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
2851 struct scatterlist *psg = &qc->pad_sgent;
2852 unsigned int offset;
2853
a4631474 2854 WARN_ON(qc->dev->class != ATA_DEV_ATAPI);
cedc9a47
JG		 2855
2856 memset(pad_buf, 0, ATA_DMA_PAD_SZ);
2857
2858 /*
2859 * psg->page/offset are used to copy to-be-written
2860 * data in this function or read data in ata_sg_clean.
2861 */
2862 offset = lsg->offset + lsg->length - qc->pad_len;
2863 psg->page = nth_page(lsg->page, offset >> PAGE_SHIFT);
2864 psg->offset = offset_in_page(offset);
2865
2866 if (qc->tf.flags & ATA_TFLAG_WRITE) {
2867 void *addr = kmap_atomic(psg->page, KM_IRQ0);
2868 memcpy(pad_buf, addr + psg->offset, qc->pad_len);
dfa15988 2869 kunmap_atomic(addr, KM_IRQ0);
cedc9a47
JG		 2870 }
2871
2872 sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ);
2873 sg_dma_len(psg) = ATA_DMA_PAD_SZ;
2874 /* trim last sg */
2875 lsg->length -= qc->pad_len;
e1410f2d
JG		 2876 if (lsg->length == 0)
2877 trim_sg = 1;
cedc9a47
JG		 2878
2879 DPRINTK("padding done, sg[%d].length=%u pad_len=%u\n",
2880 qc->n_elem - 1, lsg->length, qc->pad_len);
2881 }
2882
e1410f2d
JG		 2883 pre_n_elem = qc->n_elem;
2884 if (trim_sg && pre_n_elem)
2885 pre_n_elem--;
2886
2887 if (!pre_n_elem) {
2888 n_elem = 0;
2889 goto skip_map;
2890 }
2891
1da177e4 2892 dir = qc->dma_dir;
e1410f2d 2893 n_elem = dma_map_sg(ap->host_set->dev, sg, pre_n_elem, dir);
537a95d9
TH		 2894 if (n_elem < 1) {
2895 /* restore last sg */
2896 lsg->length += qc->pad_len;
1da177e4 2897 return -1;
537a95d9 2898 }
1da177e4
LT		 2899
2900 DPRINTK("%d sg elements mapped\n", n_elem);
2901
e1410f2d 2902skip_map:
1da177e4
LT		 2903 qc->n_elem = n_elem;
2904
2905 return 0;
2906}
2907
40e8c82c
TH		 2908/**
2909 * ata_poll_qc_complete - turn irq back on and finish qc
2910 * @qc: Command to complete
8e8b77dd 2911 * @err_mask: ATA status register content
40e8c82c
TH		 2912 *
2913 * LOCKING:
2914 * None. (grabs host lock)
2915 */
2916
a22e2eb0 2917void ata_poll_qc_complete(struct ata_queued_cmd *qc)
40e8c82c
TH		 2918{
2919 struct ata_port *ap = qc->ap;
b8f6153e 2920 unsigned long flags;
40e8c82c 2921
b8f6153e 2922 spin_lock_irqsave(&ap->host_set->lock, flags);
40e8c82c
TH		 2923 ap->flags &= ~ATA_FLAG_NOINTR;
2924 ata_irq_on(ap);
a22e2eb0 2925 ata_qc_complete(qc);
b8f6153e 2926 spin_unlock_irqrestore(&ap->host_set->lock, flags);
40e8c82c
TH		 2927}
2928
1da177e4 2929/**
c893a3ae 2930 * ata_pio_poll - poll using PIO, depending on current state
6f0ef4fa 2931 * @ap: the target ata_port
1da177e4
LT		 2932 *
2933 * LOCKING:
0cba632b 2934 * None. (executing in kernel thread context)
1da177e4
LT		 2935 *
2936 * RETURNS:
6f0ef4fa 2937 * timeout value to use
1da177e4
LT		 2938 */
2939
2940static unsigned long ata_pio_poll(struct ata_port *ap)
2941{
c14b8331 2942 struct ata_queued_cmd *qc;
1da177e4 2943 u8 status;
14be71f4
AL		 2944 unsigned int poll_state = HSM_ST_UNKNOWN;
2945 unsigned int reg_state = HSM_ST_UNKNOWN;
14be71f4 2946
c14b8331 2947 qc = ata_qc_from_tag(ap, ap->active_tag);
a4631474 2948 WARN_ON(qc == NULL);
c14b8331 2949
14be71f4
AL		 2950 switch (ap->hsm_task_state) {
2951 case HSM_ST:
2952 case HSM_ST_POLL:
2953 poll_state = HSM_ST_POLL;
2954 reg_state = HSM_ST;
1da177e4 2955 break;
14be71f4
AL		 2956 case HSM_ST_LAST:
2957 case HSM_ST_LAST_POLL:
2958 poll_state = HSM_ST_LAST_POLL;
2959 reg_state = HSM_ST_LAST;
1da177e4
LT		 2960 break;
2961 default:
2962 BUG();
2963 break;
2964 }
2965
2966 status = ata_chk_status(ap);
2967 if (status & ATA_BUSY) {
2968 if (time_after(jiffies, ap->pio_task_timeout)) {
11a56d24 2969 qc->err_mask |= AC_ERR_TIMEOUT;
7c398335 2970 ap->hsm_task_state = HSM_ST_TMOUT;
1da177e4
LT		 2971 return 0;
2972 }
14be71f4 2973 ap->hsm_task_state = poll_state;
1da177e4
LT		 2974 return ATA_SHORT_PAUSE;
2975 }
2976
14be71f4 2977 ap->hsm_task_state = reg_state;
1da177e4
LT		 2978 return 0;
2979}
2980
2981/**
6f0ef4fa
RD		 2982 * ata_pio_complete - check if drive is busy or idle
2983 * @ap: the target ata_port
1da177e4
LT		 2984 *
2985 * LOCKING:
0cba632b 2986 * None. (executing in kernel thread context)
7fb6ec28
JG		 2987 *
2988 * RETURNS:
2989 * Non-zero if qc completed, zero otherwise.
1da177e4
LT		 2990 */
2991
7fb6ec28 2992static int ata_pio_complete (struct ata_port *ap)
1da177e4
LT		 2993{
2994 struct ata_queued_cmd *qc;
2995 u8 drv_stat;
2996
2997 /*
31433ea3
AC		 2998 * This is purely heuristic. This is a fast path. Sometimes when
2999 * we enter, BSY will be cleared in a chk-status or two. If not,
3000 * the drive is probably seeking or something. Snooze for a couple
3001 * msecs, then chk-status again. If still busy, fall back to
14be71f4 3002 * HSM_ST_POLL state.
1da177e4 3003 */
fe79e683
AL		 3004 drv_stat = ata_busy_wait(ap, ATA_BUSY, 10);
3005 if (drv_stat & ATA_BUSY) {
1da177e4 3006 msleep(2);
fe79e683
AL		 3007 drv_stat = ata_busy_wait(ap, ATA_BUSY, 10);
3008 if (drv_stat & ATA_BUSY) {
14be71f4 3009 ap->hsm_task_state = HSM_ST_LAST_POLL;
1da177e4 3010 ap->pio_task_timeout = jiffies + ATA_TMOUT_PIO;
7fb6ec28 3011 return 0;
1da177e4
LT		 3012 }
3013 }
3014
c14b8331 3015 qc = ata_qc_from_tag(ap, ap->active_tag);
a4631474 3016 WARN_ON(qc == NULL);
c14b8331 3017
1da177e4
LT		 3018 drv_stat = ata_wait_idle(ap);
3019 if (!ata_ok(drv_stat)) {
1c848984 3020 qc->err_mask |= __ac_err_mask(drv_stat);
14be71f4 3021 ap->hsm_task_state = HSM_ST_ERR;
7fb6ec28 3022 return 0;
1da177e4
LT		 3023 }
3024
14be71f4 3025 ap->hsm_task_state = HSM_ST_IDLE;
1da177e4 3026
a4631474 3027 WARN_ON(qc->err_mask);
a22e2eb0 3028 ata_poll_qc_complete(qc);
7fb6ec28
JG		 3029
3030 /* another command may start at this point */
3031
3032 return 1;
1da177e4
LT		 3033}
3034
0baab86b
EF		 3035
3036/**
c893a3ae 3037 * swap_buf_le16 - swap halves of 16-bit words in place
0baab86b
EF		 3038 * @buf: Buffer to swap
3039 * @buf_words: Number of 16-bit words in buffer.
3040 *
3041 * Swap halves of 16-bit words if needed to convert from
3042 * little-endian byte order to native cpu byte order, or
3043 * vice-versa.
3044 *
3045 * LOCKING:
6f0ef4fa 3046 * Inherited from caller.
0baab86b 3047 */
1da177e4
LT		 3048void swap_buf_le16(u16 *buf, unsigned int buf_words)
3049{
3050#ifdef __BIG_ENDIAN
3051 unsigned int i;
3052
3053 for (i = 0; i < buf_words; i++)
3054 buf[i] = le16_to_cpu(buf[i]);
3055#endif /* __BIG_ENDIAN */
3056}
3057
6ae4cfb5
AL		 3058/**
3059 * ata_mmio_data_xfer - Transfer data by MMIO
3060 * @ap: port to read/write
3061 * @buf: data buffer
3062 * @buflen: buffer length
344babaa 3063 * @write_data: read/write
6ae4cfb5
AL		 3064 *
3065 * Transfer data from/to the device data register by MMIO.
3066 *
3067 * LOCKING:
3068 * Inherited from caller.
6ae4cfb5
AL		 3069 */
3070
1da177e4
LT		 3071static void ata_mmio_data_xfer(struct ata_port *ap, unsigned char *buf,
3072 unsigned int buflen, int write_data)
3073{
3074 unsigned int i;
3075 unsigned int words = buflen >> 1;
3076 u16 *buf16 = (u16 *) buf;
3077 void __iomem *mmio = (void __iomem *)ap->ioaddr.data_addr;
3078
6ae4cfb5 3079 /* Transfer multiple of 2 bytes */
1da177e4
LT		 3080 if (write_data) {
3081 for (i = 0; i < words; i++)
3082 writew(le16_to_cpu(buf16[i]), mmio);
3083 } else {
3084 for (i = 0; i < words; i++)
3085 buf16[i] = cpu_to_le16(readw(mmio));
3086 }
6ae4cfb5
AL		 3087
3088 /* Transfer trailing 1 byte, if any. */
3089 if (unlikely(buflen & 0x01)) {
3090 u16 align_buf[1] = { 0 };
3091 unsigned char *trailing_buf = buf + buflen - 1;
3092
3093 if (write_data) {
3094 memcpy(align_buf, trailing_buf, 1);
3095 writew(le16_to_cpu(align_buf[0]), mmio);
3096 } else {
3097 align_buf[0] = cpu_to_le16(readw(mmio));
3098 memcpy(trailing_buf, align_buf, 1);
3099 }
3100 }
1da177e4
LT		 3101}
3102
6ae4cfb5
AL		 3103/**
3104 * ata_pio_data_xfer - Transfer data by PIO
3105 * @ap: port to read/write
3106 * @buf: data buffer
3107 * @buflen: buffer length
344babaa 3108 * @write_data: read/write
6ae4cfb5
AL		 3109 *
3110 * Transfer data from/to the device data register by PIO.
3111 *
3112 * LOCKING:
3113 * Inherited from caller.
6ae4cfb5
AL		 3114 */
3115
1da177e4
LT		 3116static void ata_pio_data_xfer(struct ata_port *ap, unsigned char *buf,
3117 unsigned int buflen, int write_data)
3118{
6ae4cfb5 3119 unsigned int words = buflen >> 1;
1da177e4 3120
6ae4cfb5 3121 /* Transfer multiple of 2 bytes */
1da177e4 3122 if (write_data)
6ae4cfb5 3123 outsw(ap->ioaddr.data_addr, buf, words);
1da177e4 3124 else
6ae4cfb5
AL		 3125 insw(ap->ioaddr.data_addr, buf, words);
3126
3127 /* Transfer trailing 1 byte, if any. */
3128 if (unlikely(buflen & 0x01)) {
3129 u16 align_buf[1] = { 0 };
3130 unsigned char *trailing_buf = buf + buflen - 1;
3131
3132 if (write_data) {
3133 memcpy(align_buf, trailing_buf, 1);
3134 outw(le16_to_cpu(align_buf[0]), ap->ioaddr.data_addr);
3135 } else {
3136 align_buf[0] = cpu_to_le16(inw(ap->ioaddr.data_addr));
3137 memcpy(trailing_buf, align_buf, 1);
3138 }
3139 }
1da177e4
LT		 3140}
3141
6ae4cfb5
AL		 3142/**
3143 * ata_data_xfer - Transfer data from/to the data register.
3144 * @ap: port to read/write
3145 * @buf: data buffer
3146 * @buflen: buffer length
3147 * @do_write: read/write
3148 *
3149 * Transfer data from/to the device data register.
3150 *
3151 * LOCKING:
3152 * Inherited from caller.
6ae4cfb5
AL		 3153 */
3154
1da177e4
LT		 3155static void ata_data_xfer(struct ata_port *ap, unsigned char *buf,
3156 unsigned int buflen, int do_write)
3157{
a1bd9e68
AC		 3158 /* Make the crap hardware pay the costs not the good stuff */
3159 if (unlikely(ap->flags & ATA_FLAG_IRQ_MASK)) {
3160 unsigned long flags;
3161 local_irq_save(flags);
3162 if (ap->flags & ATA_FLAG_MMIO)
3163 ata_mmio_data_xfer(ap, buf, buflen, do_write);
3164 else
3165 ata_pio_data_xfer(ap, buf, buflen, do_write);
3166 local_irq_restore(flags);
3167 } else {
3168 if (ap->flags & ATA_FLAG_MMIO)
3169 ata_mmio_data_xfer(ap, buf, buflen, do_write);
3170 else
3171 ata_pio_data_xfer(ap, buf, buflen, do_write);
3172 }
1da177e4
LT		 3173}
3174
6ae4cfb5
AL		 3175/**
3176 * ata_pio_sector - Transfer ATA_SECT_SIZE (512 bytes) of data.
3177 * @qc: Command on going
3178 *
3179 * Transfer ATA_SECT_SIZE of data from/to the ATA device.
3180 *
3181 * LOCKING:
3182 * Inherited from caller.
3183 */
3184
1da177e4
LT		 3185static void ata_pio_sector(struct ata_queued_cmd *qc)
3186{
3187 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
cedc9a47 3188 struct scatterlist *sg = qc->__sg;
1da177e4
LT		 3189 struct ata_port *ap = qc->ap;
3190 struct page *page;
3191 unsigned int offset;
3192 unsigned char *buf;
3193
3194 if (qc->cursect == (qc->nsect - 1))
14be71f4 3195 ap->hsm_task_state = HSM_ST_LAST;
1da177e4
LT		 3196
3197 page = sg[qc->cursg].page;
3198 offset = sg[qc->cursg].offset + qc->cursg_ofs * ATA_SECT_SIZE;
3199
3200 /* get the current page and offset */
3201 page = nth_page(page, (offset >> PAGE_SHIFT));
3202 offset %= PAGE_SIZE;
3203
3204 buf = kmap(page) + offset;
3205
3206 qc->cursect++;
3207 qc->cursg_ofs++;
3208
32529e01 3209 if ((qc->cursg_ofs * ATA_SECT_SIZE) == (&sg[qc->cursg])->length) {
1da177e4
LT		 3210 qc->cursg++;
3211 qc->cursg_ofs = 0;
3212 }
3213
3214 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
3215
3216 /* do the actual data transfer */
3217 do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
3218 ata_data_xfer(ap, buf, ATA_SECT_SIZE, do_write);
3219
3220 kunmap(page);
3221}
3222
6ae4cfb5
AL		 3223/**
3224 * __atapi_pio_bytes - Transfer data from/to the ATAPI device.
3225 * @qc: Command on going
3226 * @bytes: number of bytes
3227 *
3228 * Transfer Transfer data from/to the ATAPI device.
3229 *
3230 * LOCKING:
3231 * Inherited from caller.
3232 *
3233 */
3234
1da177e4
LT		 3235static void __atapi_pio_bytes(struct ata_queued_cmd *qc, unsigned int bytes)
3236{
3237 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
cedc9a47 3238 struct scatterlist *sg = qc->__sg;
1da177e4
LT		 3239 struct ata_port *ap = qc->ap;
3240 struct page *page;
3241 unsigned char *buf;
3242 unsigned int offset, count;
3243
563a6e1f 3244 if (qc->curbytes + bytes >= qc->nbytes)
14be71f4 3245 ap->hsm_task_state = HSM_ST_LAST;
1da177e4
LT		 3246
3247next_sg:
563a6e1f 3248 if (unlikely(qc->cursg >= qc->n_elem)) {
7fb6ec28 3249 /*
563a6e1f
AL		 3250 * The end of qc->sg is reached and the device expects
3251 * more data to transfer. In order not to overrun qc->sg
3252 * and fulfill length specified in the byte count register,
3253 * - for read case, discard trailing data from the device
3254 * - for write case, padding zero data to the device
3255 */
3256 u16 pad_buf[1] = { 0 };
3257 unsigned int words = bytes >> 1;
3258 unsigned int i;
3259
3260 if (words) /* warning if bytes > 1 */
7fb6ec28 3261 printk(KERN_WARNING "ata%u: %u bytes trailing data\n",
563a6e1f
AL		 3262 ap->id, bytes);
3263
3264 for (i = 0; i < words; i++)
3265 ata_data_xfer(ap, (unsigned char*)pad_buf, 2, do_write);
3266
14be71f4 3267 ap->hsm_task_state = HSM_ST_LAST;
563a6e1f
AL		 3268 return;
3269 }
3270
cedc9a47 3271 sg = &qc->__sg[qc->cursg];
1da177e4 3272
1da177e4
LT		 3273 page = sg->page;
3274 offset = sg->offset + qc->cursg_ofs;
3275
3276 /* get the current page and offset */
3277 page = nth_page(page, (offset >> PAGE_SHIFT));
3278 offset %= PAGE_SIZE;
3279
6952df03 3280 /* don't overrun current sg */
32529e01 3281 count = min(sg->length - qc->cursg_ofs, bytes);
1da177e4
LT		 3282
3283 /* don't cross page boundaries */
3284 count = min(count, (unsigned int)PAGE_SIZE - offset);
3285
3286 buf = kmap(page) + offset;
3287
3288 bytes -= count;
3289 qc->curbytes += count;
3290 qc->cursg_ofs += count;
3291
32529e01 3292 if (qc->cursg_ofs == sg->length) {
1da177e4
LT		 3293 qc->cursg++;
3294 qc->cursg_ofs = 0;
3295 }
3296
3297 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
3298
3299 /* do the actual data transfer */
3300 ata_data_xfer(ap, buf, count, do_write);
3301
3302 kunmap(page);
3303
563a6e1f 3304 if (bytes)
1da177e4 3305 goto next_sg;
1da177e4
LT		 3306}
3307
6ae4cfb5
AL		 3308/**
3309 * atapi_pio_bytes - Transfer data from/to the ATAPI device.
3310 * @qc: Command on going
3311 *
3312 * Transfer Transfer data from/to the ATAPI device.
3313 *
3314 * LOCKING:
3315 * Inherited from caller.
6ae4cfb5
AL		 3316 */
3317
1da177e4
LT		 3318static void atapi_pio_bytes(struct ata_queued_cmd *qc)
3319{
3320 struct ata_port *ap = qc->ap;
3321 struct ata_device *dev = qc->dev;
3322 unsigned int ireason, bc_lo, bc_hi, bytes;
3323 int i_write, do_write = (qc->tf.flags & ATA_TFLAG_WRITE) ? 1 : 0;
3324
3325 ap->ops->tf_read(ap, &qc->tf);
3326 ireason = qc->tf.nsect;
3327 bc_lo = qc->tf.lbam;
3328 bc_hi = qc->tf.lbah;
3329 bytes = (bc_hi << 8) | bc_lo;
3330
3331 /* shall be cleared to zero, indicating xfer of data */
3332 if (ireason & (1 << 0))
3333 goto err_out;
3334
3335 /* make sure transfer direction matches expected */
3336 i_write = ((ireason & (1 << 1)) == 0) ? 1 : 0;
3337 if (do_write != i_write)
3338 goto err_out;
3339
3340 __atapi_pio_bytes(qc, bytes);
3341
3342 return;
3343
3344err_out:
3345 printk(KERN_INFO "ata%u: dev %u: ATAPI check failed\n",
3346 ap->id, dev->devno);
11a56d24 3347 qc->err_mask |= AC_ERR_HSM;
14be71f4 3348 ap->hsm_task_state = HSM_ST_ERR;
1da177e4
LT		 3349}
3350
3351/**
6f0ef4fa
RD		 3352 * ata_pio_block - start PIO on a block
3353 * @ap: the target ata_port
1da177e4
LT		 3354 *
3355 * LOCKING:
0cba632b 3356 * None. (executing in kernel thread context)
1da177e4
LT		 3357 */
3358
3359static void ata_pio_block(struct ata_port *ap)
3360{
3361 struct ata_queued_cmd *qc;
3362 u8 status;
3363
3364 /*
6f0ef4fa 3365 * This is purely heuristic. This is a fast path.
1da177e4
LT		 3366 * Sometimes when we enter, BSY will be cleared in
3367 * a chk-status or two. If not, the drive is probably seeking
3368 * or something. Snooze for a couple msecs, then
3369 * chk-status again. If still busy, fall back to
14be71f4 3370 * HSM_ST_POLL state.
1da177e4
LT		 3371 */
3372 status = ata_busy_wait(ap, ATA_BUSY, 5);
3373 if (status & ATA_BUSY) {
3374 msleep(2);
3375 status = ata_busy_wait(ap, ATA_BUSY, 10);
3376 if (status & ATA_BUSY) {
14be71f4 3377 ap->hsm_task_state = HSM_ST_POLL;
1da177e4
LT		 3378 ap->pio_task_timeout = jiffies + ATA_TMOUT_PIO;
3379 return;
3380 }
3381 }
3382
3383 qc = ata_qc_from_tag(ap, ap->active_tag);
a4631474 3384 WARN_ON(qc == NULL);
1da177e4 3385
fe79e683
AL		 3386 /* check error */
3387 if (status & (ATA_ERR | ATA_DF)) {
3388 qc->err_mask |= AC_ERR_DEV;
3389 ap->hsm_task_state = HSM_ST_ERR;
3390 return;
3391 }
3392
3393 /* transfer data if any */
1da177e4 3394 if (is_atapi_taskfile(&qc->tf)) {
fe79e683 3395 /* DRQ=0 means no more data to transfer */
1da177e4 3396 if ((status & ATA_DRQ) == 0) {
14be71f4 3397 ap->hsm_task_state = HSM_ST_LAST;
1da177e4
LT		 3398 return;
3399 }
3400
3401 atapi_pio_bytes(qc);
3402 } else {
3403 /* handle BSY=0, DRQ=0 as error */
3404 if ((status & ATA_DRQ) == 0) {
11a56d24 3405 qc->err_mask |= AC_ERR_HSM;
14be71f4 3406 ap->hsm_task_state = HSM_ST_ERR;
1da177e4
LT		 3407 return;
3408 }
3409
3410 ata_pio_sector(qc);
3411 }
3412}
3413
3414static void ata_pio_error(struct ata_port *ap)
3415{
3416 struct ata_queued_cmd *qc;
a7dac447
JG		 3417
3418 printk(KERN_WARNING "ata%u: PIO error\n", ap->id);
1da177e4
LT		 3419
3420 qc = ata_qc_from_tag(ap, ap->active_tag);
a4631474 3421 WARN_ON(qc == NULL);
1da177e4 3422
1c848984
AL		 3423 /* make sure qc->err_mask is available to
3424 * know what's wrong and recover
3425 */
a4631474 3426 WARN_ON(qc->err_mask == 0);
1c848984 3427
14be71f4 3428 ap->hsm_task_state = HSM_ST_IDLE;
1da177e4 3429
a22e2eb0 3430 ata_poll_qc_complete(qc);
1da177e4
LT		 3431}
3432
3433static void ata_pio_task(void *_data)
3434{
3435 struct ata_port *ap = _data;
7fb6ec28
JG		 3436 unsigned long timeout;
3437 int qc_completed;
3438
3439fsm_start:
3440 timeout = 0;
3441 qc_completed = 0;
1da177e4 3442
14be71f4
AL		 3443 switch (ap->hsm_task_state) {
3444 case HSM_ST_IDLE:
1da177e4
LT		 3445 return;
3446
14be71f4 3447 case HSM_ST:
1da177e4
LT		 3448 ata_pio_block(ap);
3449 break;
3450
14be71f4 3451 case HSM_ST_LAST:
7fb6ec28 3452 qc_completed = ata_pio_complete(ap);
1da177e4
LT		 3453 break;
3454
14be71f4
AL		 3455 case HSM_ST_POLL:
3456 case HSM_ST_LAST_POLL:
1da177e4
LT		 3457 timeout = ata_pio_poll(ap);
3458 break;
3459
14be71f4
AL		 3460 case HSM_ST_TMOUT:
3461 case HSM_ST_ERR:
1da177e4
LT		 3462 ata_pio_error(ap);
3463 return;
3464 }
3465
3466 if (timeout)
95064379 3467 ata_queue_delayed_pio_task(ap, timeout);
7fb6ec28
JG		 3468 else if (!qc_completed)
3469 goto fsm_start;
1da177e4
LT		 3470}
3471
1da177e4
LT		 3472/**
3473 * ata_qc_timeout - Handle timeout of queued command
3474 * @qc: Command that timed out
3475 *
3476 * Some part of the kernel (currently, only the SCSI layer)
3477 * has noticed that the active command on port @ap has not
3478 * completed after a specified length of time. Handle this
3479 * condition by disabling DMA (if necessary) and completing
3480 * transactions, with error if necessary.
3481 *
3482 * This also handles the case of the "lost interrupt", where
3483 * for some reason (possibly hardware bug, possibly driver bug)
3484 * an interrupt was not delivered to the driver, even though the
3485 * transaction completed successfully.
3486 *
3487 * LOCKING:
0cba632b 3488 * Inherited from SCSI layer (none, can sleep)
1da177e4
LT		 3489 */
3490
3491static void ata_qc_timeout(struct ata_queued_cmd *qc)
3492{
3493 struct ata_port *ap = qc->ap;
b8f6153e 3494 struct ata_host_set *host_set = ap->host_set;
1da177e4 3495 u8 host_stat = 0, drv_stat;
b8f6153e 3496 unsigned long flags;
1da177e4
LT		 3497
3498 DPRINTK("ENTER\n");
3499
c18d06f8
TH		 3500 ata_flush_pio_tasks(ap);
3501 ap->hsm_task_state = HSM_ST_IDLE;
3502
b8f6153e
JG		 3503 spin_lock_irqsave(&host_set->lock, flags);
3504
1da177e4
LT		 3505 switch (qc->tf.protocol) {
3506
3507 case ATA_PROT_DMA:
3508 case ATA_PROT_ATAPI_DMA:
3509 host_stat = ap->ops->bmdma_status(ap);
3510
3511 /* before we do anything else, clear DMA-Start bit */
b73fc89f 3512 ap->ops->bmdma_stop(qc);
1da177e4
LT		 3513
3514 /* fall through */
3515
3516 default:
3517 ata_altstatus(ap);
3518 drv_stat = ata_chk_status(ap);
3519
3520 /* ack bmdma irq events */
3521 ap->ops->irq_clear(ap);
3522
3523 printk(KERN_ERR "ata%u: command 0x%x timeout, stat 0x%x host_stat 0x%x\n",
3524 ap->id, qc->tf.command, drv_stat, host_stat);
3525
3526 /* complete taskfile transaction */
a22e2eb0 3527 qc->err_mask |= ac_err_mask(drv_stat);
1da177e4
LT		 3528 break;
3529 }
b8f6153e
JG		 3530
3531 spin_unlock_irqrestore(&host_set->lock, flags);
3532
a72ec4ce
TH		 3533 ata_eh_qc_complete(qc);
3534
1da177e4
LT		 3535 DPRINTK("EXIT\n");
3536}
3537
3538/**
3539 * ata_eng_timeout - Handle timeout of queued command
3540 * @ap: Port on which timed-out command is active
3541 *
3542 * Some part of the kernel (currently, only the SCSI layer)
3543 * has noticed that the active command on port @ap has not
3544 * completed after a specified length of time. Handle this
3545 * condition by disabling DMA (if necessary) and completing
3546 * transactions, with error if necessary.
3547 *
3548 * This also handles the case of the "lost interrupt", where
3549 * for some reason (possibly hardware bug, possibly driver bug)
3550 * an interrupt was not delivered to the driver, even though the
3551 * transaction completed successfully.
3552 *
3553 * LOCKING:
3554 * Inherited from SCSI layer (none, can sleep)
3555 */
3556
3557void ata_eng_timeout(struct ata_port *ap)
3558{
1da177e4
LT		 3559 DPRINTK("ENTER\n");
3560
f6379020 3561 ata_qc_timeout(ata_qc_from_tag(ap, ap->active_tag));
1da177e4 3562
1da177e4
LT		 3563 DPRINTK("EXIT\n");
3564}
3565
3566/**
3567 * ata_qc_new - Request an available ATA command, for queueing
3568 * @ap: Port associated with device @dev
3569 * @dev: Device from whom we request an available command structure
3570 *
3571 * LOCKING:
0cba632b 3572 * None.
1da177e4
LT		 3573 */
3574
3575static struct ata_queued_cmd *ata_qc_new(struct ata_port *ap)
3576{
3577 struct ata_queued_cmd *qc = NULL;
3578 unsigned int i;
3579
3580 for (i = 0; i < ATA_MAX_QUEUE; i++)
3581 if (!test_and_set_bit(i, &ap->qactive)) {
3582 qc = ata_qc_from_tag(ap, i);
3583 break;
3584 }
3585
3586 if (qc)
3587 qc->tag = i;
3588
3589 return qc;
3590}
3591
3592/**
3593 * ata_qc_new_init - Request an available ATA command, and initialize it
3594 * @ap: Port associated with device @dev
3595 * @dev: Device from whom we request an available command structure
3596 *
3597 * LOCKING:
0cba632b 3598 * None.
1da177e4
LT		 3599 */
3600
3601struct ata_queued_cmd *ata_qc_new_init(struct ata_port *ap,
3602 struct ata_device *dev)
3603{
3604 struct ata_queued_cmd *qc;
3605
3606 qc = ata_qc_new(ap);
3607 if (qc) {
1da177e4
LT		 3608 qc->scsicmd = NULL;
3609 qc->ap = ap;
3610 qc->dev = dev;
1da177e4 3611
2c13b7ce 3612 ata_qc_reinit(qc);
1da177e4
LT		 3613 }
3614
3615 return qc;
3616}
3617
1da177e4
LT		 3618/**
3619 * ata_qc_free - free unused ata_queued_cmd
3620 * @qc: Command to complete
3621 *
3622 * Designed to free unused ata_queued_cmd object
3623 * in case something prevents using it.
3624 *
3625 * LOCKING:
0cba632b 3626 * spin_lock_irqsave(host_set lock)
1da177e4
LT		 3627 */
3628void ata_qc_free(struct ata_queued_cmd *qc)
3629{
4ba946e9
TH		 3630 struct ata_port *ap = qc->ap;
3631 unsigned int tag;
3632
a4631474 3633 WARN_ON(qc == NULL); /* ata_qc_from_tag _might_ return NULL */
1da177e4 3634
4ba946e9
TH		 3635 qc->flags = 0;
3636 tag = qc->tag;
3637 if (likely(ata_tag_valid(tag))) {
3638 if (tag == ap->active_tag)
3639 ap->active_tag = ATA_TAG_POISON;
3640 qc->tag = ATA_TAG_POISON;
3641 clear_bit(tag, &ap->qactive);
3642 }
1da177e4
LT		 3643}
3644
76014427 3645void __ata_qc_complete(struct ata_queued_cmd *qc)
1da177e4 3646{
a4631474
TH		 3647 WARN_ON(qc == NULL); /* ata_qc_from_tag _might_ return NULL */
3648 WARN_ON(!(qc->flags & ATA_QCFLAG_ACTIVE));
1da177e4
LT		 3649
3650 if (likely(qc->flags & ATA_QCFLAG_DMAMAP))
3651 ata_sg_clean(qc);
3652
3f3791d3
AL		 3653 /* atapi: mark qc as inactive to prevent the interrupt handler
3654 * from completing the command twice later, before the error handler
3655 * is called. (when rc != 0 and atapi request sense is needed)
3656 */
3657 qc->flags &= ~ATA_QCFLAG_ACTIVE;
3658
1da177e4 3659 /* call completion callback */
77853bf2 3660 qc->complete_fn(qc);
1da177e4
LT		 3661}
3662
3663static inline int ata_should_dma_map(struct ata_queued_cmd *qc)
3664{
3665 struct ata_port *ap = qc->ap;
3666
3667 switch (qc->tf.protocol) {
3668 case ATA_PROT_DMA:
3669 case ATA_PROT_ATAPI_DMA:
3670 return 1;
3671
3672 case ATA_PROT_ATAPI:
3673 case ATA_PROT_PIO:
3674 case ATA_PROT_PIO_MULT:
3675 if (ap->flags & ATA_FLAG_PIO_DMA)
3676 return 1;
3677
3678 /* fall through */
3679
3680 default:
3681 return 0;
3682 }
3683
3684 /* never reached */
3685}
3686
3687/**
3688 * ata_qc_issue - issue taskfile to device
3689 * @qc: command to issue to device
3690 *
3691 * Prepare an ATA command to submission to device.
3692 * This includes mapping the data into a DMA-able
3693 * area, filling in the S/G table, and finally
3694 * writing the taskfile to hardware, starting the command.
3695 *
3696 * LOCKING:
3697 * spin_lock_irqsave(host_set lock)
3698 *
3699 * RETURNS:
9a3d9eb0 3700 * Zero on success, AC_ERR_* mask on failure
1da177e4
LT		 3701 */
3702
9a3d9eb0 3703unsigned int ata_qc_issue(struct ata_queued_cmd *qc)
1da177e4
LT		 3704{
3705 struct ata_port *ap = qc->ap;
3706
3707 if (ata_should_dma_map(qc)) {
3708 if (qc->flags & ATA_QCFLAG_SG) {
3709 if (ata_sg_setup(qc))
8e436af9 3710 goto sg_err;
1da177e4
LT		 3711 } else if (qc->flags & ATA_QCFLAG_SINGLE) {
3712 if (ata_sg_setup_one(qc))
8e436af9 3713 goto sg_err;
1da177e4
LT		 3714 }
3715 } else {
3716 qc->flags &= ~ATA_QCFLAG_DMAMAP;
3717 }
3718
3719 ap->ops->qc_prep(qc);
3720
3721 qc->ap->active_tag = qc->tag;
3722 qc->flags |= ATA_QCFLAG_ACTIVE;
3723
3724 return ap->ops->qc_issue(qc);
3725
8e436af9
TH		 3726sg_err:
3727 qc->flags &= ~ATA_QCFLAG_DMAMAP;
9a3d9eb0 3728 return AC_ERR_SYSTEM;
1da177e4
LT		 3729}
3730
0baab86b 3731
1da177e4
LT		 3732/**
3733 * ata_qc_issue_prot - issue taskfile to device in proto-dependent manner
3734 * @qc: command to issue to device
3735 *
3736 * Using various libata functions and hooks, this function
3737 * starts an ATA command. ATA commands are grouped into
3738 * classes called "protocols", and issuing each type of protocol
3739 * is slightly different.
3740 *
0baab86b
EF		 3741 * May be used as the qc_issue() entry in ata_port_operations.
3742 *
1da177e4
LT		 3743 * LOCKING:
3744 * spin_lock_irqsave(host_set lock)
3745 *
3746 * RETURNS:
9a3d9eb0 3747 * Zero on success, AC_ERR_* mask on failure
1da177e4
LT		 3748 */
3749
9a3d9eb0 3750unsigned int ata_qc_issue_prot(struct ata_queued_cmd *qc)
1da177e4
LT		 3751{
3752 struct ata_port *ap = qc->ap;
3753
3754 ata_dev_select(ap, qc->dev->devno, 1, 0);
3755
3756 switch (qc->tf.protocol) {
3757 case ATA_PROT_NODATA:
e5338254 3758 ata_tf_to_host(ap, &qc->tf);
1da177e4
LT		 3759 break;
3760
3761 case ATA_PROT_DMA:
3762 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
3763 ap->ops->bmdma_setup(qc); /* set up bmdma */
3764 ap->ops->bmdma_start(qc); /* initiate bmdma */
3765 break;
3766
3767 case ATA_PROT_PIO: /* load tf registers, initiate polling pio */
3768 ata_qc_set_polling(qc);
e5338254 3769 ata_tf_to_host(ap, &qc->tf);
14be71f4 3770 ap->hsm_task_state = HSM_ST;
95064379 3771 ata_queue_pio_task(ap);
1da177e4
LT		 3772 break;
3773
3774 case ATA_PROT_ATAPI:
3775 ata_qc_set_polling(qc);
e5338254 3776 ata_tf_to_host(ap, &qc->tf);
95064379 3777 ata_queue_packet_task(ap);
1da177e4
LT		 3778 break;
3779
3780 case ATA_PROT_ATAPI_NODATA:
c1389503 3781 ap->flags |= ATA_FLAG_NOINTR;
e5338254 3782 ata_tf_to_host(ap, &qc->tf);
95064379 3783 ata_queue_packet_task(ap);
1da177e4
LT		 3784 break;
3785
3786 case ATA_PROT_ATAPI_DMA:
c1389503 3787 ap->flags |= ATA_FLAG_NOINTR;
1da177e4
LT		 3788 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
3789 ap->ops->bmdma_setup(qc); /* set up bmdma */
95064379 3790 ata_queue_packet_task(ap);
1da177e4
LT		 3791 break;
3792
3793 default:
3794 WARN_ON(1);
9a3d9eb0 3795 return AC_ERR_SYSTEM;
1da177e4
LT		 3796 }
3797
3798 return 0;
3799}
3800
3801/**
0baab86b 3802 * ata_bmdma_setup_mmio - Set up PCI IDE BMDMA transaction
1da177e4
LT		 3803 * @qc: Info associated with this ATA transaction.
3804 *
3805 * LOCKING:
3806 * spin_lock_irqsave(host_set lock)
3807 */
3808
3809static void ata_bmdma_setup_mmio (struct ata_queued_cmd *qc)
3810{
3811 struct ata_port *ap = qc->ap;
3812 unsigned int rw = (qc->tf.flags & ATA_TFLAG_WRITE);
3813 u8 dmactl;
3814 void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr;
3815
3816 /* load PRD table addr. */
3817 mb(); /* make sure PRD table writes are visible to controller */
3818 writel(ap->prd_dma, mmio + ATA_DMA_TABLE_OFS);
3819
3820 /* specify data direction, triple-check start bit is clear */
3821 dmactl = readb(mmio + ATA_DMA_CMD);
3822 dmactl &= ~(ATA_DMA_WR | ATA_DMA_START);
3823 if (!rw)
3824 dmactl |= ATA_DMA_WR;
3825 writeb(dmactl, mmio + ATA_DMA_CMD);
3826
3827 /* issue r/w command */
3828 ap->ops->exec_command(ap, &qc->tf);
3829}
3830
3831/**
b73fc89f 3832 * ata_bmdma_start_mmio - Start a PCI IDE BMDMA transaction
1da177e4
LT		 3833 * @qc: Info associated with this ATA transaction.
3834 *
3835 * LOCKING:
3836 * spin_lock_irqsave(host_set lock)
3837 */
3838
3839static void ata_bmdma_start_mmio (struct ata_queued_cmd *qc)
3840{
3841 struct ata_port *ap = qc->ap;
3842 void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr;
3843 u8 dmactl;
3844
3845 /* start host DMA transaction */
3846 dmactl = readb(mmio + ATA_DMA_CMD);
3847 writeb(dmactl | ATA_DMA_START, mmio + ATA_DMA_CMD);
3848
3849 /* Strictly, one may wish to issue a readb() here, to
3850 * flush the mmio write. However, control also passes
3851 * to the hardware at this point, and it will interrupt
3852 * us when we are to resume control. So, in effect,
3853 * we don't care when the mmio write flushes.
3854 * Further, a read of the DMA status register _immediately_
3855 * following the write may not be what certain flaky hardware
3856 * is expected, so I think it is best to not add a readb()
3857 * without first all the MMIO ATA cards/mobos.
3858 * Or maybe I'm just being paranoid.
3859 */
3860}
3861
3862/**
3863 * ata_bmdma_setup_pio - Set up PCI IDE BMDMA transaction (PIO)
3864 * @qc: Info associated with this ATA transaction.
3865 *
3866 * LOCKING:
3867 * spin_lock_irqsave(host_set lock)
3868 */
3869
3870static void ata_bmdma_setup_pio (struct ata_queued_cmd *qc)
3871{
3872 struct ata_port *ap = qc->ap;
3873 unsigned int rw = (qc->tf.flags & ATA_TFLAG_WRITE);
3874 u8 dmactl;
3875
3876 /* load PRD table addr. */
3877 outl(ap->prd_dma, ap->ioaddr.bmdma_addr + ATA_DMA_TABLE_OFS);
3878
3879 /* specify data direction, triple-check start bit is clear */
3880 dmactl = inb(ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
3881 dmactl &= ~(ATA_DMA_WR | ATA_DMA_START);
3882 if (!rw)
3883 dmactl |= ATA_DMA_WR;
3884 outb(dmactl, ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
3885
3886 /* issue r/w command */
3887 ap->ops->exec_command(ap, &qc->tf);
3888}
3889
3890/**
3891 * ata_bmdma_start_pio - Start a PCI IDE BMDMA transaction (PIO)
3892 * @qc: Info associated with this ATA transaction.
3893 *
3894 * LOCKING:
3895 * spin_lock_irqsave(host_set lock)
3896 */
3897
3898static void ata_bmdma_start_pio (struct ata_queued_cmd *qc)
3899{
3900 struct ata_port *ap = qc->ap;
3901 u8 dmactl;
3902
3903 /* start host DMA transaction */
3904 dmactl = inb(ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
3905 outb(dmactl | ATA_DMA_START,
3906 ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
3907}
3908
0baab86b
EF		 3909
3910/**
3911 * ata_bmdma_start - Start a PCI IDE BMDMA transaction
3912 * @qc: Info associated with this ATA transaction.
3913 *
3914 * Writes the ATA_DMA_START flag to the DMA command register.
3915 *
3916 * May be used as the bmdma_start() entry in ata_port_operations.
3917 *
3918 * LOCKING:
3919 * spin_lock_irqsave(host_set lock)
3920 */
1da177e4
LT		 3921void ata_bmdma_start(struct ata_queued_cmd *qc)
3922{
3923 if (qc->ap->flags & ATA_FLAG_MMIO)
3924 ata_bmdma_start_mmio(qc);
3925 else
3926 ata_bmdma_start_pio(qc);
3927}
3928
0baab86b
EF		 3929
3930/**
3931 * ata_bmdma_setup - Set up PCI IDE BMDMA transaction
3932 * @qc: Info associated with this ATA transaction.
3933 *
3934 * Writes address of PRD table to device's PRD Table Address
3935 * register, sets the DMA control register, and calls
3936 * ops->exec_command() to start the transfer.
3937 *
3938 * May be used as the bmdma_setup() entry in ata_port_operations.
3939 *
3940 * LOCKING:
3941 * spin_lock_irqsave(host_set lock)
3942 */
1da177e4
LT		 3943void ata_bmdma_setup(struct ata_queued_cmd *qc)
3944{
3945 if (qc->ap->flags & ATA_FLAG_MMIO)
3946 ata_bmdma_setup_mmio(qc);
3947 else
3948 ata_bmdma_setup_pio(qc);
3949}
3950
0baab86b
EF		 3951
3952/**
3953 * ata_bmdma_irq_clear - Clear PCI IDE BMDMA interrupt.
decc6d0b 3954 * @ap: Port associated with this ATA transaction.
0baab86b
EF		 3955 *
3956 * Clear interrupt and error flags in DMA status register.
3957 *
3958 * May be used as the irq_clear() entry in ata_port_operations.
3959 *
3960 * LOCKING:
3961 * spin_lock_irqsave(host_set lock)
3962 */
3963
1da177e4
LT		 3964void ata_bmdma_irq_clear(struct ata_port *ap)
3965{
3966 if (ap->flags & ATA_FLAG_MMIO) {
3967 void __iomem *mmio = ((void __iomem *) ap->ioaddr.bmdma_addr) + ATA_DMA_STATUS;
3968 writeb(readb(mmio), mmio);
3969 } else {
3970 unsigned long addr = ap->ioaddr.bmdma_addr + ATA_DMA_STATUS;
3971 outb(inb(addr), addr);
3972 }
3973
3974}
3975
0baab86b
EF		 3976
3977/**
3978 * ata_bmdma_status - Read PCI IDE BMDMA status
decc6d0b 3979 * @ap: Port associated with this ATA transaction.
0baab86b
EF		 3980 *
3981 * Read and return BMDMA status register.
3982 *
3983 * May be used as the bmdma_status() entry in ata_port_operations.
3984 *
3985 * LOCKING:
3986 * spin_lock_irqsave(host_set lock)
3987 */
3988
1da177e4
LT		 3989u8 ata_bmdma_status(struct ata_port *ap)
3990{
3991 u8 host_stat;
3992 if (ap->flags & ATA_FLAG_MMIO) {
3993 void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr;
3994 host_stat = readb(mmio + ATA_DMA_STATUS);
3995 } else
ee500aab 3996 host_stat = inb(ap->ioaddr.bmdma_addr + ATA_DMA_STATUS);
1da177e4
LT		 3997 return host_stat;
3998}
3999
0baab86b
EF		 4000
4001/**
4002 * ata_bmdma_stop - Stop PCI IDE BMDMA transfer
b73fc89f 4003 * @qc: Command we are ending DMA for
0baab86b
EF		 4004 *
4005 * Clears the ATA_DMA_START flag in the dma control register
4006 *
4007 * May be used as the bmdma_stop() entry in ata_port_operations.
4008 *
4009 * LOCKING:
4010 * spin_lock_irqsave(host_set lock)
4011 */
4012
b73fc89f 4013void ata_bmdma_stop(struct ata_queued_cmd *qc)
1da177e4 4014{
b73fc89f 4015 struct ata_port *ap = qc->ap;
1da177e4
LT		 4016 if (ap->flags & ATA_FLAG_MMIO) {
4017 void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr;
4018
4019 /* clear start/stop bit */
4020 writeb(readb(mmio + ATA_DMA_CMD) & ~ATA_DMA_START,
4021 mmio + ATA_DMA_CMD);
4022 } else {
4023 /* clear start/stop bit */
4024 outb(inb(ap->ioaddr.bmdma_addr + ATA_DMA_CMD) & ~ATA_DMA_START,
4025 ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
4026 }
4027
4028 /* one-PIO-cycle guaranteed wait, per spec, for HDMA1:0 transition */
4029 ata_altstatus(ap); /* dummy read */
4030}
4031
4032/**
4033 * ata_host_intr - Handle host interrupt for given (port, task)
4034 * @ap: Port on which interrupt arrived (possibly...)
4035 * @qc: Taskfile currently active in engine
4036 *
4037 * Handle host interrupt for given queued command. Currently,
4038 * only DMA interrupts are handled. All other commands are
4039 * handled via polling with interrupts disabled (nIEN bit).
4040 *
4041 * LOCKING:
4042 * spin_lock_irqsave(host_set lock)
4043 *
4044 * RETURNS:
4045 * One if interrupt was handled, zero if not (shared irq).
4046 */
4047
4048inline unsigned int ata_host_intr (struct ata_port *ap,
4049 struct ata_queued_cmd *qc)
4050{
4051 u8 status, host_stat;
4052
4053 switch (qc->tf.protocol) {
4054
4055 case ATA_PROT_DMA:
4056 case ATA_PROT_ATAPI_DMA:
4057 case ATA_PROT_ATAPI:
4058 /* check status of DMA engine */
4059 host_stat = ap->ops->bmdma_status(ap);
4060 VPRINTK("ata%u: host_stat 0x%X\n", ap->id, host_stat);
4061
4062 /* if it's not our irq... */
4063 if (!(host_stat & ATA_DMA_INTR))
4064 goto idle_irq;
4065
4066 /* before we do anything else, clear DMA-Start bit */
b73fc89f 4067 ap->ops->bmdma_stop(qc);
1da177e4
LT		 4068
4069 /* fall through */
4070
4071 case ATA_PROT_ATAPI_NODATA:
4072 case ATA_PROT_NODATA:
4073 /* check altstatus */
4074 status = ata_altstatus(ap);
4075 if (status & ATA_BUSY)
4076 goto idle_irq;
4077
4078 /* check main status, clearing INTRQ */
4079 status = ata_chk_status(ap);
4080 if (unlikely(status & ATA_BUSY))
4081 goto idle_irq;
4082 DPRINTK("ata%u: protocol %d (dev_stat 0x%X)\n",
4083 ap->id, qc->tf.protocol, status);
4084
4085 /* ack bmdma irq events */
4086 ap->ops->irq_clear(ap);
4087
4088 /* complete taskfile transaction */
a22e2eb0
AL		 4089 qc->err_mask |= ac_err_mask(status);
4090 ata_qc_complete(qc);
1da177e4
LT		 4091 break;
4092
4093 default:
4094 goto idle_irq;
4095 }
4096
4097 return 1; /* irq handled */
4098
4099idle_irq:
4100 ap->stats.idle_irq++;
4101
4102#ifdef ATA_IRQ_TRAP
4103 if ((ap->stats.idle_irq % 1000) == 0) {
4104 handled = 1;
4105 ata_irq_ack(ap, 0); /* debug trap */
4106 printk(KERN_WARNING "ata%d: irq trap\n", ap->id);
4107 }
4108#endif
4109 return 0; /* irq not handled */
4110}
4111
4112/**
4113 * ata_interrupt - Default ATA host interrupt handler
0cba632b
JG		 4114 * @irq: irq line (unused)
4115 * @dev_instance: pointer to our ata_host_set information structure
1da177e4
LT		 4116 * @regs: unused
4117 *
0cba632b
JG		 4118 * Default interrupt handler for PCI IDE devices. Calls
4119 * ata_host_intr() for each port that is not disabled.
4120 *
1da177e4 4121 * LOCKING:
0cba632b 4122 * Obtains host_set lock during operation.
1da177e4
LT		 4123 *
4124 * RETURNS:
0cba632b 4125 * IRQ_NONE or IRQ_HANDLED.
1da177e4
LT		 4126 */
4127
4128irqreturn_t ata_interrupt (int irq, void *dev_instance, struct pt_regs *regs)
4129{
4130 struct ata_host_set *host_set = dev_instance;
4131 unsigned int i;
4132 unsigned int handled = 0;
4133 unsigned long flags;
4134
4135 /* TODO: make _irqsave conditional on x86 PCI IDE legacy mode */
4136 spin_lock_irqsave(&host_set->lock, flags);
4137
4138 for (i = 0; i < host_set->n_ports; i++) {
4139 struct ata_port *ap;
4140
4141 ap = host_set->ports[i];
c1389503
TH		 4142 if (ap &&
4143 !(ap->flags & (ATA_FLAG_PORT_DISABLED | ATA_FLAG_NOINTR))) {
1da177e4
LT		 4144 struct ata_queued_cmd *qc;
4145
4146 qc = ata_qc_from_tag(ap, ap->active_tag);
21b1ed74
AL		 4147 if (qc && (!(qc->tf.ctl & ATA_NIEN)) &&
4148 (qc->flags & ATA_QCFLAG_ACTIVE))
1da177e4
LT		 4149 handled |= ata_host_intr(ap, qc);
4150 }
4151 }
4152
4153 spin_unlock_irqrestore(&host_set->lock, flags);
4154
4155 return IRQ_RETVAL(handled);
4156}
4157
4158/**
4159 * atapi_packet_task - Write CDB bytes to hardware
4160 * @_data: Port to which ATAPI device is attached.
4161 *
4162 * When device has indicated its readiness to accept
4163 * a CDB, this function is called. Send the CDB.
4164 * If DMA is to be performed, exit immediately.
4165 * Otherwise, we are in polling mode, so poll
4166 * status under operation succeeds or fails.
4167 *
4168 * LOCKING:
4169 * Kernel thread context (may sleep)
4170 */
4171
4172static void atapi_packet_task(void *_data)
4173{
4174 struct ata_port *ap = _data;
4175 struct ata_queued_cmd *qc;
4176 u8 status;
4177
4178 qc = ata_qc_from_tag(ap, ap->active_tag);
a4631474
TH		 4179 WARN_ON(qc == NULL);
4180 WARN_ON(!(qc->flags & ATA_QCFLAG_ACTIVE));
1da177e4
LT		 4181
4182 /* sleep-wait for BSY to clear */
4183 DPRINTK("busy wait\n");
d8fe452b 4184 if (ata_busy_sleep(ap, ATA_TMOUT_CDB_QUICK, ATA_TMOUT_CDB)) {
11a56d24 4185 qc->err_mask |= AC_ERR_TIMEOUT;
d8fe452b
AL		 4186 goto err_out;
4187 }
1da177e4
LT		 4188
4189 /* make sure DRQ is set */
4190 status = ata_chk_status(ap);
d8fe452b 4191 if ((status & (ATA_BUSY | ATA_DRQ)) != ATA_DRQ) {
11a56d24 4192 qc->err_mask |= AC_ERR_HSM;
1da177e4 4193 goto err_out;
d8fe452b 4194 }
1da177e4
LT		 4195
4196 /* send SCSI cdb */
4197 DPRINTK("send cdb\n");
a4631474 4198 WARN_ON(ap->cdb_len < 12);
1da177e4 4199
c1389503
TH		 4200 if (qc->tf.protocol == ATA_PROT_ATAPI_DMA ||
4201 qc->tf.protocol == ATA_PROT_ATAPI_NODATA) {
4202 unsigned long flags;
1da177e4 4203
c1389503
TH		 4204 /* Once we're done issuing command and kicking bmdma,
4205 * irq handler takes over. To not lose irq, we need
4206 * to clear NOINTR flag before sending cdb, but
4207 * interrupt handler shouldn't be invoked before we're
4208 * finished. Hence, the following locking.
4209 */
4210 spin_lock_irqsave(&ap->host_set->lock, flags);
4211 ap->flags &= ~ATA_FLAG_NOINTR;
4212 ata_data_xfer(ap, qc->cdb, ap->cdb_len, 1);
4213 if (qc->tf.protocol == ATA_PROT_ATAPI_DMA)
4214 ap->ops->bmdma_start(qc); /* initiate bmdma */
4215 spin_unlock_irqrestore(&ap->host_set->lock, flags);
4216 } else {
4217 ata_data_xfer(ap, qc->cdb, ap->cdb_len, 1);
1da177e4 4218
c1389503 4219 /* PIO commands are handled by polling */
14be71f4 4220 ap->hsm_task_state = HSM_ST;
95064379 4221 ata_queue_pio_task(ap);
1da177e4
LT		 4222 }
4223
4224 return;
4225
4226err_out:
a22e2eb0 4227 ata_poll_qc_complete(qc);
1da177e4
LT		 4228}
4229
0baab86b 4230
9b847548
JA		 4231/*
4232 * Execute a 'simple' command, that only consists of the opcode 'cmd' itself,
4233 * without filling any other registers
4234 */
4235static int ata_do_simple_cmd(struct ata_port *ap, struct ata_device *dev,
4236 u8 cmd)
4237{
4238 struct ata_taskfile tf;
4239 int err;
4240
4241 ata_tf_init(ap, &tf, dev->devno);
4242
4243 tf.command = cmd;
4244 tf.flags |= ATA_TFLAG_DEVICE;
4245 tf.protocol = ATA_PROT_NODATA;
4246
4247 err = ata_exec_internal(ap, dev, &tf, DMA_NONE, NULL, 0);
4248 if (err)
4249 printk(KERN_ERR "%s: ata command failed: %d\n",
4250 __FUNCTION__, err);
4251
4252 return err;
4253}
4254
4255static int ata_flush_cache(struct ata_port *ap, struct ata_device *dev)
4256{
4257 u8 cmd;
4258
4259 if (!ata_try_flush_cache(dev))
4260 return 0;
4261
4262 if (ata_id_has_flush_ext(dev->id))
4263 cmd = ATA_CMD_FLUSH_EXT;
4264 else
4265 cmd = ATA_CMD_FLUSH;
4266
4267 return ata_do_simple_cmd(ap, dev, cmd);
4268}
4269
4270static int ata_standby_drive(struct ata_port *ap, struct ata_device *dev)
4271{
4272 return ata_do_simple_cmd(ap, dev, ATA_CMD_STANDBYNOW1);
4273}
4274
4275static int ata_start_drive(struct ata_port *ap, struct ata_device *dev)
4276{
4277 return ata_do_simple_cmd(ap, dev, ATA_CMD_IDLEIMMEDIATE);
4278}
4279
4280/**
4281 * ata_device_resume - wakeup a previously suspended devices
c893a3ae
RD		 4282 * @ap: port the device is connected to
4283 * @dev: the device to resume
9b847548
JA		 4284 *
4285 * Kick the drive back into action, by sending it an idle immediate
4286 * command and making sure its transfer mode matches between drive
4287 * and host.
4288 *
4289 */
4290int ata_device_resume(struct ata_port *ap, struct ata_device *dev)
4291{
4292 if (ap->flags & ATA_FLAG_SUSPENDED) {
4293 ap->flags &= ~ATA_FLAG_SUSPENDED;
4294 ata_set_mode(ap);
4295 }
4296 if (!ata_dev_present(dev))
4297 return 0;
4298 if (dev->class == ATA_DEV_ATA)
4299 ata_start_drive(ap, dev);
4300
4301 return 0;
4302}
4303
4304/**
4305 * ata_device_suspend - prepare a device for suspend
c893a3ae
RD		 4306 * @ap: port the device is connected to
4307 * @dev: the device to suspend
9b847548
JA		 4308 *
4309 * Flush the cache on the drive, if appropriate, then issue a
4310 * standbynow command.
9b847548
JA		 4311 */
4312int ata_device_suspend(struct ata_port *ap, struct ata_device *dev)
4313{
4314 if (!ata_dev_present(dev))
4315 return 0;
4316 if (dev->class == ATA_DEV_ATA)
4317 ata_flush_cache(ap, dev);
4318
4319 ata_standby_drive(ap, dev);
4320 ap->flags |= ATA_FLAG_SUSPENDED;
4321 return 0;
4322}
4323
c893a3ae
RD		 4324/**
4325 * ata_port_start - Set port up for dma.
4326 * @ap: Port to initialize
4327 *
4328 * Called just after data structures for each port are
4329 * initialized. Allocates space for PRD table.
4330 *
4331 * May be used as the port_start() entry in ata_port_operations.
4332 *
4333 * LOCKING:
4334 * Inherited from caller.
4335 */
4336
1da177e4
LT		 4337int ata_port_start (struct ata_port *ap)
4338{
4339 struct device *dev = ap->host_set->dev;
6037d6bb 4340 int rc;
1da177e4
LT		 4341
4342 ap->prd = dma_alloc_coherent(dev, ATA_PRD_TBL_SZ, &ap->prd_dma, GFP_KERNEL);
4343 if (!ap->prd)
4344 return -ENOMEM;
4345
6037d6bb
JG		 4346 rc = ata_pad_alloc(ap, dev);
4347 if (rc) {
cedc9a47 4348 dma_free_coherent(dev, ATA_PRD_TBL_SZ, ap->prd, ap->prd_dma);
6037d6bb 4349 return rc;
cedc9a47
JG		 4350 }
4351
1da177e4
LT		 4352 DPRINTK("prd alloc, virt %p, dma %llx\n", ap->prd, (unsigned long long) ap->prd_dma);
4353
4354 return 0;
4355}
4356
0baab86b
EF		 4357
4358/**
4359 * ata_port_stop - Undo ata_port_start()
4360 * @ap: Port to shut down
4361 *
4362 * Frees the PRD table.
4363 *
4364 * May be used as the port_stop() entry in ata_port_operations.
4365 *
4366 * LOCKING:
6f0ef4fa 4367 * Inherited from caller.
0baab86b
EF		 4368 */
4369
1da177e4
LT		 4370void ata_port_stop (struct ata_port *ap)
4371{
4372 struct device *dev = ap->host_set->dev;
4373
4374 dma_free_coherent(dev, ATA_PRD_TBL_SZ, ap->prd, ap->prd_dma);
6037d6bb 4375 ata_pad_free(ap, dev);
1da177e4
LT		 4376}
4377
aa8f0dc6
JG		 4378void ata_host_stop (struct ata_host_set *host_set)
4379{
4380 if (host_set->mmio_base)
4381 iounmap(host_set->mmio_base);
4382}
4383
4384
1da177e4
LT		 4385/**
4386 * ata_host_remove - Unregister SCSI host structure with upper layers
4387 * @ap: Port to unregister
4388 * @do_unregister: 1 if we fully unregister, 0 to just stop the port
4389 *
4390 * LOCKING:
6f0ef4fa 4391 * Inherited from caller.
1da177e4
LT		 4392 */
4393
4394static void ata_host_remove(struct ata_port *ap, unsigned int do_unregister)
4395{
4396 struct Scsi_Host *sh = ap->host;
4397
4398 DPRINTK("ENTER\n");
4399
4400 if (do_unregister)
4401 scsi_remove_host(sh);
4402
4403 ap->ops->port_stop(ap);
4404}
4405
4406/**
4407 * ata_host_init - Initialize an ata_port structure
4408 * @ap: Structure to initialize
4409 * @host: associated SCSI mid-layer structure
4410 * @host_set: Collection of hosts to which @ap belongs
4411 * @ent: Probe information provided by low-level driver
4412 * @port_no: Port number associated with this ata_port
4413 *
0cba632b
JG		 4414 * Initialize a new ata_port structure, and its associated
4415 * scsi_host.
4416 *
1da177e4 4417 * LOCKING:
0cba632b 4418 * Inherited from caller.
1da177e4
LT		 4419 */
4420
4421static void ata_host_init(struct ata_port *ap, struct Scsi_Host *host,
4422 struct ata_host_set *host_set,
057ace5e 4423 const struct ata_probe_ent *ent, unsigned int port_no)
1da177e4
LT		 4424{
4425 unsigned int i;
4426
4427 host->max_id = 16;
4428 host->max_lun = 1;
4429 host->max_channel = 1;
4430 host->unique_id = ata_unique_id++;
4431 host->max_cmd_len = 12;
12413197 4432
1da177e4
LT		 4433 ap->flags = ATA_FLAG_PORT_DISABLED;
4434 ap->id = host->unique_id;
4435 ap->host = host;
4436 ap->ctl = ATA_DEVCTL_OBS;
4437 ap->host_set = host_set;
4438 ap->port_no = port_no;
4439 ap->hard_port_no =
4440 ent->legacy_mode ? ent->hard_port_no : port_no;
4441 ap->pio_mask = ent->pio_mask;
4442 ap->mwdma_mask = ent->mwdma_mask;
4443 ap->udma_mask = ent->udma_mask;
4444 ap->flags |= ent->host_flags;
4445 ap->ops = ent->port_ops;
4446 ap->cbl = ATA_CBL_NONE;
4447 ap->active_tag = ATA_TAG_POISON;
4448 ap->last_ctl = 0xFF;
4449
4450 INIT_WORK(&ap->packet_task, atapi_packet_task, ap);
4451 INIT_WORK(&ap->pio_task, ata_pio_task, ap);
a72ec4ce 4452 INIT_LIST_HEAD(&ap->eh_done_q);
1da177e4
LT		 4453
4454 for (i = 0; i < ATA_MAX_DEVICES; i++)
4455 ap->device[i].devno = i;
4456
4457#ifdef ATA_IRQ_TRAP
4458 ap->stats.unhandled_irq = 1;
4459 ap->stats.idle_irq = 1;
4460#endif
4461
4462 memcpy(&ap->ioaddr, &ent->port[port_no], sizeof(struct ata_ioports));
4463}
4464
4465/**
4466 * ata_host_add - Attach low-level ATA driver to system
4467 * @ent: Information provided by low-level driver
4468 * @host_set: Collections of ports to which we add
4469 * @port_no: Port number associated with this host
4470 *
0cba632b
JG		 4471 * Attach low-level ATA driver to system.
4472 *
1da177e4 4473 * LOCKING:
0cba632b 4474 * PCI/etc. bus probe sem.
1da177e4
LT		 4475 *
4476 * RETURNS:
0cba632b 4477 * New ata_port on success, for NULL on error.
1da177e4
LT		 4478 */
4479
057ace5e 4480static struct ata_port * ata_host_add(const struct ata_probe_ent *ent,
1da177e4
LT		 4481 struct ata_host_set *host_set,
4482 unsigned int port_no)
4483{
4484 struct Scsi_Host *host;
4485 struct ata_port *ap;
4486 int rc;
4487
4488 DPRINTK("ENTER\n");
4489 host = scsi_host_alloc(ent->sht, sizeof(struct ata_port));
4490 if (!host)
4491 return NULL;
4492
4493 ap = (struct ata_port *) &host->hostdata[0];
4494
4495 ata_host_init(ap, host, host_set, ent, port_no);
4496
4497 rc = ap->ops->port_start(ap);
4498 if (rc)
4499 goto err_out;
4500
4501 return ap;
4502
4503err_out:
4504 scsi_host_put(host);
4505 return NULL;
4506}
4507
4508/**
0cba632b
JG		 4509 * ata_device_add - Register hardware device with ATA and SCSI layers
4510 * @ent: Probe information describing hardware device to be registered
4511 *
4512 * This function processes the information provided in the probe
4513 * information struct @ent, allocates the necessary ATA and SCSI
4514 * host information structures, initializes them, and registers
4515 * everything with requisite kernel subsystems.
4516 *
4517 * This function requests irqs, probes the ATA bus, and probes
4518 * the SCSI bus.
1da177e4
LT		 4519 *
4520 * LOCKING:
0cba632b 4521 * PCI/etc. bus probe sem.
1da177e4
LT		 4522 *
4523 * RETURNS:
0cba632b 4524 * Number of ports registered. Zero on error (no ports registered).
1da177e4
LT		 4525 */
4526
057ace5e 4527int ata_device_add(const struct ata_probe_ent *ent)
1da177e4
LT		 4528{
4529 unsigned int count = 0, i;
4530 struct device *dev = ent->dev;
4531 struct ata_host_set *host_set;
4532
4533 DPRINTK("ENTER\n");
4534 /* alloc a container for our list of ATA ports (buses) */
57f3bda8 4535 host_set = kzalloc(sizeof(struct ata_host_set) +
1da177e4
LT		 4536 (ent->n_ports * sizeof(void *)), GFP_KERNEL);
4537 if (!host_set)
4538 return 0;
1da177e4
LT		 4539 spin_lock_init(&host_set->lock);
4540
4541 host_set->dev = dev;
4542 host_set->n_ports = ent->n_ports;
4543 host_set->irq = ent->irq;
4544 host_set->mmio_base = ent->mmio_base;
4545 host_set->private_data = ent->private_data;
4546 host_set->ops = ent->port_ops;
4547
4548 /* register each port bound to this device */
4549 for (i = 0; i < ent->n_ports; i++) {
4550 struct ata_port *ap;
4551 unsigned long xfer_mode_mask;
4552
4553 ap = ata_host_add(ent, host_set, i);
4554 if (!ap)
4555 goto err_out;
4556
4557 host_set->ports[i] = ap;
4558 xfer_mode_mask =(ap->udma_mask << ATA_SHIFT_UDMA) |
4559 (ap->mwdma_mask << ATA_SHIFT_MWDMA) |
4560 (ap->pio_mask << ATA_SHIFT_PIO);
4561
4562 /* print per-port info to dmesg */
4563 printk(KERN_INFO "ata%u: %cATA max %s cmd 0x%lX ctl 0x%lX "
4564 "bmdma 0x%lX irq %lu\n",
4565 ap->id,
4566 ap->flags & ATA_FLAG_SATA ? 'S' : 'P',
4567 ata_mode_string(xfer_mode_mask),
4568 ap->ioaddr.cmd_addr,
4569 ap->ioaddr.ctl_addr,
4570 ap->ioaddr.bmdma_addr,
4571 ent->irq);
4572
4573 ata_chk_status(ap);
4574 host_set->ops->irq_clear(ap);
4575 count++;
4576 }
4577
57f3bda8
RD		 4578 if (!count)
4579 goto err_free_ret;
1da177e4
LT		 4580
4581 /* obtain irq, that is shared between channels */
4582 if (request_irq(ent->irq, ent->port_ops->irq_handler, ent->irq_flags,
4583 DRV_NAME, host_set))
4584 goto err_out;
4585
4586 /* perform each probe synchronously */
4587 DPRINTK("probe begin\n");
4588 for (i = 0; i < count; i++) {
4589 struct ata_port *ap;
4590 int rc;
4591
4592 ap = host_set->ports[i];
4593
c893a3ae 4594 DPRINTK("ata%u: bus probe begin\n", ap->id);
1da177e4 4595 rc = ata_bus_probe(ap);
c893a3ae 4596 DPRINTK("ata%u: bus probe end\n", ap->id);
1da177e4
LT		 4597
4598 if (rc) {
4599 /* FIXME: do something useful here?
4600 * Current libata behavior will
4601 * tear down everything when
4602 * the module is removed
4603 * or the h/w is unplugged.
4604 */
4605 }
4606
4607 rc = scsi_add_host(ap->host, dev);
4608 if (rc) {
4609 printk(KERN_ERR "ata%u: scsi_add_host failed\n",
4610 ap->id);
4611 /* FIXME: do something useful here */
4612 /* FIXME: handle unconditional calls to
4613 * scsi_scan_host and ata_host_remove, below,
4614 * at the very least
4615 */
4616 }
4617 }
4618
4619 /* probes are done, now scan each port's disk(s) */
c893a3ae 4620 DPRINTK("host probe begin\n");
1da177e4
LT		 4621 for (i = 0; i < count; i++) {
4622 struct ata_port *ap = host_set->ports[i];
4623
644dd0cc 4624 ata_scsi_scan_host(ap);
1da177e4
LT		 4625 }
4626
4627 dev_set_drvdata(dev, host_set);
4628
4629 VPRINTK("EXIT, returning %u\n", ent->n_ports);
4630 return ent->n_ports; /* success */
4631
4632err_out:
4633 for (i = 0; i < count; i++) {
4634 ata_host_remove(host_set->ports[i], 1);
4635 scsi_host_put(host_set->ports[i]->host);
4636 }
57f3bda8 4637err_free_ret:
1da177e4
LT		 4638 kfree(host_set);
4639 VPRINTK("EXIT, returning 0\n");
4640 return 0;
4641}
4642
17b14451
AC		 4643/**
4644 * ata_host_set_remove - PCI layer callback for device removal
4645 * @host_set: ATA host set that was removed
4646 *
4647 * Unregister all objects associated with this host set. Free those
4648 * objects.
4649 *
4650 * LOCKING:
4651 * Inherited from calling layer (may sleep).
4652 */
4653
17b14451
AC		 4654void ata_host_set_remove(struct ata_host_set *host_set)
4655{
4656 struct ata_port *ap;
4657 unsigned int i;
4658
4659 for (i = 0; i < host_set->n_ports; i++) {
4660 ap = host_set->ports[i];
4661 scsi_remove_host(ap->host);
4662 }
4663
4664 free_irq(host_set->irq, host_set);
4665
4666 for (i = 0; i < host_set->n_ports; i++) {
4667 ap = host_set->ports[i];
4668
4669 ata_scsi_release(ap->host);
4670
4671 if ((ap->flags & ATA_FLAG_NO_LEGACY) == 0) {
4672 struct ata_ioports *ioaddr = &ap->ioaddr;
4673
4674 if (ioaddr->cmd_addr == 0x1f0)
4675 release_region(0x1f0, 8);
4676 else if (ioaddr->cmd_addr == 0x170)
4677 release_region(0x170, 8);
4678 }
4679
4680 scsi_host_put(ap->host);
4681 }
4682
4683 if (host_set->ops->host_stop)
4684 host_set->ops->host_stop(host_set);
4685
4686 kfree(host_set);
4687}
4688
1da177e4
LT		 4689/**
4690 * ata_scsi_release - SCSI layer callback hook for host unload
4691 * @host: libata host to be unloaded
4692 *
4693 * Performs all duties necessary to shut down a libata port...
4694 * Kill port kthread, disable port, and release resources.
4695 *
4696 * LOCKING:
4697 * Inherited from SCSI layer.
4698 *
4699 * RETURNS:
4700 * One.
4701 */
4702
4703int ata_scsi_release(struct Scsi_Host *host)
4704{
4705 struct ata_port *ap = (struct ata_port *) &host->hostdata[0];
4706
4707 DPRINTK("ENTER\n");
4708
4709 ap->ops->port_disable(ap);
4710 ata_host_remove(ap, 0);
4711
4712 DPRINTK("EXIT\n");
4713 return 1;
4714}
4715
4716/**
4717 * ata_std_ports - initialize ioaddr with standard port offsets.
4718 * @ioaddr: IO address structure to be initialized
0baab86b
EF		 4719 *
4720 * Utility function which initializes data_addr, error_addr,
4721 * feature_addr, nsect_addr, lbal_addr, lbam_addr, lbah_addr,
4722 * device_addr, status_addr, and command_addr to standard offsets
4723 * relative to cmd_addr.
4724 *
4725 * Does not set ctl_addr, altstatus_addr, bmdma_addr, or scr_addr.
1da177e4 4726 */
0baab86b 4727
1da177e4
LT		 4728void ata_std_ports(struct ata_ioports *ioaddr)
4729{
4730 ioaddr->data_addr = ioaddr->cmd_addr + ATA_REG_DATA;
4731 ioaddr->error_addr = ioaddr->cmd_addr + ATA_REG_ERR;
4732 ioaddr->feature_addr = ioaddr->cmd_addr + ATA_REG_FEATURE;
4733 ioaddr->nsect_addr = ioaddr->cmd_addr + ATA_REG_NSECT;
4734 ioaddr->lbal_addr = ioaddr->cmd_addr + ATA_REG_LBAL;
4735 ioaddr->lbam_addr = ioaddr->cmd_addr + ATA_REG_LBAM;
4736 ioaddr->lbah_addr = ioaddr->cmd_addr + ATA_REG_LBAH;
4737 ioaddr->device_addr = ioaddr->cmd_addr + ATA_REG_DEVICE;
4738 ioaddr->status_addr = ioaddr->cmd_addr + ATA_REG_STATUS;
4739 ioaddr->command_addr = ioaddr->cmd_addr + ATA_REG_CMD;
4740}
4741
0baab86b 4742
374b1873
JG		 4743#ifdef CONFIG_PCI
4744
4745void ata_pci_host_stop (struct ata_host_set *host_set)
4746{
4747 struct pci_dev *pdev = to_pci_dev(host_set->dev);
4748
4749 pci_iounmap(pdev, host_set->mmio_base);
4750}
4751
1da177e4
LT		 4752/**
4753 * ata_pci_remove_one - PCI layer callback for device removal
4754 * @pdev: PCI device that was removed
4755 *
4756 * PCI layer indicates to libata via this hook that
6f0ef4fa 4757 * hot-unplug or module unload event has occurred.
1da177e4
LT		 4758 * Handle this by unregistering all objects associated
4759 * with this PCI device. Free those objects. Then finally
4760 * release PCI resources and disable device.
4761 *
4762 * LOCKING:
4763 * Inherited from PCI layer (may sleep).
4764 */
4765
4766void ata_pci_remove_one (struct pci_dev *pdev)
4767{
4768 struct device *dev = pci_dev_to_dev(pdev);
4769 struct ata_host_set *host_set = dev_get_drvdata(dev);
1da177e4 4770
17b14451 4771 ata_host_set_remove(host_set);
1da177e4
LT		 4772 pci_release_regions(pdev);
4773 pci_disable_device(pdev);
4774 dev_set_drvdata(dev, NULL);
4775}
4776
4777/* move to PCI subsystem */
057ace5e 4778int pci_test_config_bits(struct pci_dev *pdev, const struct pci_bits *bits)
1da177e4
LT		 4779{
4780 unsigned long tmp = 0;
4781
4782 switch (bits->width) {
4783 case 1: {
4784 u8 tmp8 = 0;
4785 pci_read_config_byte(pdev, bits->reg, &tmp8);
4786 tmp = tmp8;
4787 break;
4788 }
4789 case 2: {
4790 u16 tmp16 = 0;
4791 pci_read_config_word(pdev, bits->reg, &tmp16);
4792 tmp = tmp16;
4793 break;
4794 }
4795 case 4: {
4796 u32 tmp32 = 0;
4797 pci_read_config_dword(pdev, bits->reg, &tmp32);
4798 tmp = tmp32;
4799 break;
4800 }
4801
4802 default:
4803 return -EINVAL;
4804 }
4805
4806 tmp &= bits->mask;
4807
4808 return (tmp == bits->val) ? 1 : 0;
4809}
9b847548
JA		 4810
4811int ata_pci_device_suspend(struct pci_dev *pdev, pm_message_t state)
4812{
4813 pci_save_state(pdev);
4814 pci_disable_device(pdev);
4815 pci_set_power_state(pdev, PCI_D3hot);
4816 return 0;
4817}
4818
4819int ata_pci_device_resume(struct pci_dev *pdev)
4820{
4821 pci_set_power_state(pdev, PCI_D0);
4822 pci_restore_state(pdev);
4823 pci_enable_device(pdev);
4824 pci_set_master(pdev);
4825 return 0;
4826}
1da177e4
LT		 4827#endif /* CONFIG_PCI */
4828
4829
1da177e4
LT		 4830static int __init ata_init(void)
4831{
4832 ata_wq = create_workqueue("ata");
4833 if (!ata_wq)
4834 return -ENOMEM;
4835
4836 printk(KERN_DEBUG "libata version " DRV_VERSION " loaded.\n");
4837 return 0;
4838}
4839
4840static void __exit ata_exit(void)
4841{
4842 destroy_workqueue(ata_wq);
4843}
4844
4845module_init(ata_init);
4846module_exit(ata_exit);
4847
67846b30
JG		 4848static unsigned long ratelimit_time;
4849static spinlock_t ata_ratelimit_lock = SPIN_LOCK_UNLOCKED;
4850
4851int ata_ratelimit(void)
4852{
4853 int rc;
4854 unsigned long flags;
4855
4856 spin_lock_irqsave(&ata_ratelimit_lock, flags);
4857
4858 if (time_after(jiffies, ratelimit_time)) {
4859 rc = 1;
4860 ratelimit_time = jiffies + (HZ/5);
4861 } else
4862 rc = 0;
4863
4864 spin_unlock_irqrestore(&ata_ratelimit_lock, flags);
4865
4866 return rc;
4867}
4868
1da177e4
LT		 4869/*
4870 * libata is essentially a library of internal helper functions for
4871 * low-level ATA host controller drivers. As such, the API/ABI is
4872 * likely to change as new drivers are added and updated.
4873 * Do not depend on ABI/API stability.
4874 */
4875
4876EXPORT_SYMBOL_GPL(ata_std_bios_param);
4877EXPORT_SYMBOL_GPL(ata_std_ports);
4878EXPORT_SYMBOL_GPL(ata_device_add);
17b14451 4879EXPORT_SYMBOL_GPL(ata_host_set_remove);
1da177e4
LT		 4880EXPORT_SYMBOL_GPL(ata_sg_init);
4881EXPORT_SYMBOL_GPL(ata_sg_init_one);
76014427 4882EXPORT_SYMBOL_GPL(__ata_qc_complete);
1da177e4
LT		 4883EXPORT_SYMBOL_GPL(ata_qc_issue_prot);
4884EXPORT_SYMBOL_GPL(ata_eng_timeout);
4885EXPORT_SYMBOL_GPL(ata_tf_load);
4886EXPORT_SYMBOL_GPL(ata_tf_read);
4887EXPORT_SYMBOL_GPL(ata_noop_dev_select);
4888EXPORT_SYMBOL_GPL(ata_std_dev_select);
4889EXPORT_SYMBOL_GPL(ata_tf_to_fis);
4890EXPORT_SYMBOL_GPL(ata_tf_from_fis);
4891EXPORT_SYMBOL_GPL(ata_check_status);
4892EXPORT_SYMBOL_GPL(ata_altstatus);
1da177e4
LT		 4893EXPORT_SYMBOL_GPL(ata_exec_command);
4894EXPORT_SYMBOL_GPL(ata_port_start);
4895EXPORT_SYMBOL_GPL(ata_port_stop);
aa8f0dc6 4896EXPORT_SYMBOL_GPL(ata_host_stop);
1da177e4
LT		 4897EXPORT_SYMBOL_GPL(ata_interrupt);
4898EXPORT_SYMBOL_GPL(ata_qc_prep);
4899EXPORT_SYMBOL_GPL(ata_bmdma_setup);
4900EXPORT_SYMBOL_GPL(ata_bmdma_start);
4901EXPORT_SYMBOL_GPL(ata_bmdma_irq_clear);
4902EXPORT_SYMBOL_GPL(ata_bmdma_status);
4903EXPORT_SYMBOL_GPL(ata_bmdma_stop);
4904EXPORT_SYMBOL_GPL(ata_port_probe);
4905EXPORT_SYMBOL_GPL(sata_phy_reset);
4906EXPORT_SYMBOL_GPL(__sata_phy_reset);
4907EXPORT_SYMBOL_GPL(ata_bus_reset);
8a19ac89 4908EXPORT_SYMBOL_GPL(ata_std_probeinit);
c2bd5804
TH		 4909EXPORT_SYMBOL_GPL(ata_std_softreset);
4910EXPORT_SYMBOL_GPL(sata_std_hardreset);
4911EXPORT_SYMBOL_GPL(ata_std_postreset);
4912EXPORT_SYMBOL_GPL(ata_std_probe_reset);
a62c0fc5 4913EXPORT_SYMBOL_GPL(ata_drive_probe_reset);
1da177e4 4914EXPORT_SYMBOL_GPL(ata_port_disable);
67846b30 4915EXPORT_SYMBOL_GPL(ata_ratelimit);
6f8b9958 4916EXPORT_SYMBOL_GPL(ata_busy_sleep);
1da177e4
LT		 4917EXPORT_SYMBOL_GPL(ata_scsi_ioctl);
4918EXPORT_SYMBOL_GPL(ata_scsi_queuecmd);
f29841e0 4919EXPORT_SYMBOL_GPL(ata_scsi_timed_out);
1da177e4
LT		 4920EXPORT_SYMBOL_GPL(ata_scsi_error);
4921EXPORT_SYMBOL_GPL(ata_scsi_slave_config);
4922EXPORT_SYMBOL_GPL(ata_scsi_release);
4923EXPORT_SYMBOL_GPL(ata_host_intr);
4924EXPORT_SYMBOL_GPL(ata_dev_classify);
4925EXPORT_SYMBOL_GPL(ata_dev_id_string);
0e949ff3 4926EXPORT_SYMBOL_GPL(ata_dev_id_c_string);
6f2f3812 4927EXPORT_SYMBOL_GPL(ata_dev_config);
1da177e4 4928EXPORT_SYMBOL_GPL(ata_scsi_simulate);
a72ec4ce
TH		 4929EXPORT_SYMBOL_GPL(ata_eh_qc_complete);
4930EXPORT_SYMBOL_GPL(ata_eh_qc_retry);
1da177e4 4931
1bc4ccff 4932EXPORT_SYMBOL_GPL(ata_pio_need_iordy);
452503f9
AC		 4933EXPORT_SYMBOL_GPL(ata_timing_compute);
4934EXPORT_SYMBOL_GPL(ata_timing_merge);
4935
1da177e4
LT		 4936#ifdef CONFIG_PCI
4937EXPORT_SYMBOL_GPL(pci_test_config_bits);
374b1873 4938EXPORT_SYMBOL_GPL(ata_pci_host_stop);
1da177e4
LT		 4939EXPORT_SYMBOL_GPL(ata_pci_init_native_mode);
4940EXPORT_SYMBOL_GPL(ata_pci_init_one);
4941EXPORT_SYMBOL_GPL(ata_pci_remove_one);
9b847548
JA		 4942EXPORT_SYMBOL_GPL(ata_pci_device_suspend);
4943EXPORT_SYMBOL_GPL(ata_pci_device_resume);
1da177e4 4944#endif /* CONFIG_PCI */
9b847548
JA		 4945
4946EXPORT_SYMBOL_GPL(ata_device_suspend);
4947EXPORT_SYMBOL_GPL(ata_device_resume);
4948EXPORT_SYMBOL_GPL(ata_scsi_device_suspend);
4949EXPORT_SYMBOL_GPL(ata_scsi_device_resume);
Linux 6.x block layer and io_uring tree(s)