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[PATCH] libata: hold host_set lock while finishing internal qc
[linux-2.6-block.git] / drivers / scsi / libata-core.c
CommitLineData
1da177e4 1/*
af36d7f0
JG		 2 * libata-core.c - helper library for ATA
3 *
4 * Maintained by: Jeff Garzik <jgarzik@pobox.com>
5 * Please ALWAYS copy linux-ide@vger.kernel.org
6 * on emails.
7 *
8 * Copyright 2003-2004 Red Hat, Inc. All rights reserved.
9 * Copyright 2003-2004 Jeff Garzik
10 *
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2, or (at your option)
15 * any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; see the file COPYING. If not, write to
24 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
25 *
26 *
27 * libata documentation is available via 'make {ps|pdf}docs',
28 * as Documentation/DocBook/libata.*
29 *
30 * Hardware documentation available from http://www.t13.org/ and
31 * http://www.sata-io.org/
32 *
1da177e4
LT		 33 */
34
35#include <linux/config.h>
36#include <linux/kernel.h>
37#include <linux/module.h>
38#include <linux/pci.h>
39#include <linux/init.h>
40#include <linux/list.h>
41#include <linux/mm.h>
42#include <linux/highmem.h>
43#include <linux/spinlock.h>
44#include <linux/blkdev.h>
45#include <linux/delay.h>
46#include <linux/timer.h>
47#include <linux/interrupt.h>
48#include <linux/completion.h>
49#include <linux/suspend.h>
50#include <linux/workqueue.h>
67846b30 51#include <linux/jiffies.h>
378f058c 52#include <linux/scatterlist.h>
1da177e4 53#include <scsi/scsi.h>
1da177e4 54#include "scsi_priv.h"
193515d5 55#include <scsi/scsi_cmnd.h>
1da177e4
LT		 56#include <scsi/scsi_host.h>
57#include <linux/libata.h>
58#include <asm/io.h>
59#include <asm/semaphore.h>
60#include <asm/byteorder.h>
61
62#include "libata.h"
63
6aff8f1f 64static unsigned int ata_dev_init_params(struct ata_port *ap,
00b6f5e9
AL		 65 struct ata_device *dev,
66 u16 heads,
67 u16 sectors);
83206a29
TH		 68static unsigned int ata_dev_set_xfermode(struct ata_port *ap,
69 struct ata_device *dev);
acf356b1 70static void ata_dev_xfermask(struct ata_port *ap, struct ata_device *dev);
1da177e4
LT		 71
72static unsigned int ata_unique_id = 1;
73static struct workqueue_struct *ata_wq;
74
418dc1f5 75int atapi_enabled = 1;
1623c81e
JG		 76module_param(atapi_enabled, int, 0444);
77MODULE_PARM_DESC(atapi_enabled, "Enable discovery of ATAPI devices (0=off, 1=on)");
78
95de719a
AL		 79int atapi_dmadir = 0;
80module_param(atapi_dmadir, int, 0444);
81MODULE_PARM_DESC(atapi_dmadir, "Enable ATAPI DMADIR bridge support (0=off, 1=on)");
82
c3c013a2
JG		 83int libata_fua = 0;
84module_param_named(fua, libata_fua, int, 0444);
85MODULE_PARM_DESC(fua, "FUA support (0=off, 1=on)");
86
1da177e4
LT		 87MODULE_AUTHOR("Jeff Garzik");
88MODULE_DESCRIPTION("Library module for ATA devices");
89MODULE_LICENSE("GPL");
90MODULE_VERSION(DRV_VERSION);
91
0baab86b 92
1da177e4
LT		 93/**
94 * ata_tf_to_fis - Convert ATA taskfile to SATA FIS structure
95 * @tf: Taskfile to convert
96 * @fis: Buffer into which data will output
97 * @pmp: Port multiplier port
98 *
99 * Converts a standard ATA taskfile to a Serial ATA
100 * FIS structure (Register - Host to Device).
101 *
102 * LOCKING:
103 * Inherited from caller.
104 */
105
057ace5e 106void ata_tf_to_fis(const struct ata_taskfile *tf, u8 *fis, u8 pmp)
1da177e4
LT		 107{
108 fis[0] = 0x27; /* Register - Host to Device FIS */
109 fis[1] = (pmp & 0xf) | (1 << 7); /* Port multiplier number,
110 bit 7 indicates Command FIS */
111 fis[2] = tf->command;
112 fis[3] = tf->feature;
113
114 fis[4] = tf->lbal;
115 fis[5] = tf->lbam;
116 fis[6] = tf->lbah;
117 fis[7] = tf->device;
118
119 fis[8] = tf->hob_lbal;
120 fis[9] = tf->hob_lbam;
121 fis[10] = tf->hob_lbah;
122 fis[11] = tf->hob_feature;
123
124 fis[12] = tf->nsect;
125 fis[13] = tf->hob_nsect;
126 fis[14] = 0;
127 fis[15] = tf->ctl;
128
129 fis[16] = 0;
130 fis[17] = 0;
131 fis[18] = 0;
132 fis[19] = 0;
133}
134
135/**
136 * ata_tf_from_fis - Convert SATA FIS to ATA taskfile
137 * @fis: Buffer from which data will be input
138 * @tf: Taskfile to output
139 *
e12a1be6 140 * Converts a serial ATA FIS structure to a standard ATA taskfile.
1da177e4
LT		 141 *
142 * LOCKING:
143 * Inherited from caller.
144 */
145
057ace5e 146void ata_tf_from_fis(const u8 *fis, struct ata_taskfile *tf)
1da177e4
LT		 147{
148 tf->command = fis[2]; /* status */
149 tf->feature = fis[3]; /* error */
150
151 tf->lbal = fis[4];
152 tf->lbam = fis[5];
153 tf->lbah = fis[6];
154 tf->device = fis[7];
155
156 tf->hob_lbal = fis[8];
157 tf->hob_lbam = fis[9];
158 tf->hob_lbah = fis[10];
159
160 tf->nsect = fis[12];
161 tf->hob_nsect = fis[13];
162}
163
8cbd6df1
AL		 164static const u8 ata_rw_cmds[] = {
165 /* pio multi */
166 ATA_CMD_READ_MULTI,
167 ATA_CMD_WRITE_MULTI,
168 ATA_CMD_READ_MULTI_EXT,
169 ATA_CMD_WRITE_MULTI_EXT,
9a3dccc4
TH		 170 0,
171 0,
172 0,
173 ATA_CMD_WRITE_MULTI_FUA_EXT,
8cbd6df1
AL		 174 /* pio */
175 ATA_CMD_PIO_READ,
176 ATA_CMD_PIO_WRITE,
177 ATA_CMD_PIO_READ_EXT,
178 ATA_CMD_PIO_WRITE_EXT,
9a3dccc4
TH		 179 0,
180 0,
181 0,
182 0,
8cbd6df1
AL		 183 /* dma */
184 ATA_CMD_READ,
185 ATA_CMD_WRITE,
186 ATA_CMD_READ_EXT,
9a3dccc4
TH		 187 ATA_CMD_WRITE_EXT,
188 0,
189 0,
190 0,
191 ATA_CMD_WRITE_FUA_EXT
8cbd6df1 192};
1da177e4
LT		 193
194/**
8cbd6df1
AL		 195 * ata_rwcmd_protocol - set taskfile r/w commands and protocol
196 * @qc: command to examine and configure
1da177e4 197 *
2e9edbf8 198 * Examine the device configuration and tf->flags to calculate
8cbd6df1 199 * the proper read/write commands and protocol to use.
1da177e4
LT		 200 *
201 * LOCKING:
202 * caller.
203 */
9a3dccc4 204int ata_rwcmd_protocol(struct ata_queued_cmd *qc)
1da177e4 205{
8cbd6df1
AL		 206 struct ata_taskfile *tf = &qc->tf;
207 struct ata_device *dev = qc->dev;
9a3dccc4 208 u8 cmd;
1da177e4 209
9a3dccc4 210 int index, fua, lba48, write;
2e9edbf8 211
9a3dccc4 212 fua = (tf->flags & ATA_TFLAG_FUA) ? 4 : 0;
8cbd6df1
AL		 213 lba48 = (tf->flags & ATA_TFLAG_LBA48) ? 2 : 0;
214 write = (tf->flags & ATA_TFLAG_WRITE) ? 1 : 0;
1da177e4 215
8cbd6df1
AL		 216 if (dev->flags & ATA_DFLAG_PIO) {
217 tf->protocol = ATA_PROT_PIO;
9a3dccc4 218 index = dev->multi_count ? 0 : 8;
8d238e01
AC		 219 } else if (lba48 && (qc->ap->flags & ATA_FLAG_PIO_LBA48)) {
220 /* Unable to use DMA due to host limitation */
221 tf->protocol = ATA_PROT_PIO;
0565c26d 222 index = dev->multi_count ? 0 : 8;
8cbd6df1
AL		 223 } else {
224 tf->protocol = ATA_PROT_DMA;
9a3dccc4 225 index = 16;
8cbd6df1 226 }
1da177e4 227
9a3dccc4
TH		 228 cmd = ata_rw_cmds[index + fua + lba48 + write];
229 if (cmd) {
230 tf->command = cmd;
231 return 0;
232 }
233 return -1;
1da177e4
LT		 234}
235
cb95d562
TH		 236/**
237 * ata_pack_xfermask - Pack pio, mwdma and udma masks into xfer_mask
238 * @pio_mask: pio_mask
239 * @mwdma_mask: mwdma_mask
240 * @udma_mask: udma_mask
241 *
242 * Pack @pio_mask, @mwdma_mask and @udma_mask into a single
243 * unsigned int xfer_mask.
244 *
245 * LOCKING:
246 * None.
247 *
248 * RETURNS:
249 * Packed xfer_mask.
250 */
251static unsigned int ata_pack_xfermask(unsigned int pio_mask,
252 unsigned int mwdma_mask,
253 unsigned int udma_mask)
254{
255 return ((pio_mask << ATA_SHIFT_PIO) & ATA_MASK_PIO) |
256 ((mwdma_mask << ATA_SHIFT_MWDMA) & ATA_MASK_MWDMA) |
257 ((udma_mask << ATA_SHIFT_UDMA) & ATA_MASK_UDMA);
258}
259
c0489e4e
TH		 260/**
261 * ata_unpack_xfermask - Unpack xfer_mask into pio, mwdma and udma masks
262 * @xfer_mask: xfer_mask to unpack
263 * @pio_mask: resulting pio_mask
264 * @mwdma_mask: resulting mwdma_mask
265 * @udma_mask: resulting udma_mask
266 *
267 * Unpack @xfer_mask into @pio_mask, @mwdma_mask and @udma_mask.
268 * Any NULL distination masks will be ignored.
269 */
270static void ata_unpack_xfermask(unsigned int xfer_mask,
271 unsigned int *pio_mask,
272 unsigned int *mwdma_mask,
273 unsigned int *udma_mask)
274{
275 if (pio_mask)
276 *pio_mask = (xfer_mask & ATA_MASK_PIO) >> ATA_SHIFT_PIO;
277 if (mwdma_mask)
278 *mwdma_mask = (xfer_mask & ATA_MASK_MWDMA) >> ATA_SHIFT_MWDMA;
279 if (udma_mask)
280 *udma_mask = (xfer_mask & ATA_MASK_UDMA) >> ATA_SHIFT_UDMA;
281}
282
cb95d562 283static const struct ata_xfer_ent {
be9a50c8 284 int shift, bits;
cb95d562
TH		 285 u8 base;
286} ata_xfer_tbl[] = {
287 { ATA_SHIFT_PIO, ATA_BITS_PIO, XFER_PIO_0 },
288 { ATA_SHIFT_MWDMA, ATA_BITS_MWDMA, XFER_MW_DMA_0 },
289 { ATA_SHIFT_UDMA, ATA_BITS_UDMA, XFER_UDMA_0 },
290 { -1, },
291};
292
293/**
294 * ata_xfer_mask2mode - Find matching XFER_* for the given xfer_mask
295 * @xfer_mask: xfer_mask of interest
296 *
297 * Return matching XFER_* value for @xfer_mask. Only the highest
298 * bit of @xfer_mask is considered.
299 *
300 * LOCKING:
301 * None.
302 *
303 * RETURNS:
304 * Matching XFER_* value, 0 if no match found.
305 */
306static u8 ata_xfer_mask2mode(unsigned int xfer_mask)
307{
308 int highbit = fls(xfer_mask) - 1;
309 const struct ata_xfer_ent *ent;
310
311 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
312 if (highbit >= ent->shift && highbit < ent->shift + ent->bits)
313 return ent->base + highbit - ent->shift;
314 return 0;
315}
316
317/**
318 * ata_xfer_mode2mask - Find matching xfer_mask for XFER_*
319 * @xfer_mode: XFER_* of interest
320 *
321 * Return matching xfer_mask for @xfer_mode.
322 *
323 * LOCKING:
324 * None.
325 *
326 * RETURNS:
327 * Matching xfer_mask, 0 if no match found.
328 */
329static unsigned int ata_xfer_mode2mask(u8 xfer_mode)
330{
331 const struct ata_xfer_ent *ent;
332
333 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
334 if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits)
335 return 1 << (ent->shift + xfer_mode - ent->base);
336 return 0;
337}
338
339/**
340 * ata_xfer_mode2shift - Find matching xfer_shift for XFER_*
341 * @xfer_mode: XFER_* of interest
342 *
343 * Return matching xfer_shift for @xfer_mode.
344 *
345 * LOCKING:
346 * None.
347 *
348 * RETURNS:
349 * Matching xfer_shift, -1 if no match found.
350 */
351static int ata_xfer_mode2shift(unsigned int xfer_mode)
352{
353 const struct ata_xfer_ent *ent;
354
355 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
356 if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits)
357 return ent->shift;
358 return -1;
359}
360
1da177e4 361/**
1da7b0d0
TH		 362 * ata_mode_string - convert xfer_mask to string
363 * @xfer_mask: mask of bits supported; only highest bit counts.
1da177e4
LT		 364 *
365 * Determine string which represents the highest speed
1da7b0d0 366 * (highest bit in @modemask).
1da177e4
LT		 367 *
368 * LOCKING:
369 * None.
370 *
371 * RETURNS:
372 * Constant C string representing highest speed listed in
1da7b0d0 373 * @mode_mask, or the constant C string "<n/a>".
1da177e4 374 */
1da7b0d0 375static const char *ata_mode_string(unsigned int xfer_mask)
1da177e4 376{
75f554bc
TH		 377 static const char * const xfer_mode_str[] = {
378 "PIO0",
379 "PIO1",
380 "PIO2",
381 "PIO3",
382 "PIO4",
383 "MWDMA0",
384 "MWDMA1",
385 "MWDMA2",
386 "UDMA/16",
387 "UDMA/25",
388 "UDMA/33",
389 "UDMA/44",
390 "UDMA/66",
391 "UDMA/100",
392 "UDMA/133",
393 "UDMA7",
394 };
1da7b0d0 395 int highbit;
1da177e4 396
1da7b0d0
TH		 397 highbit = fls(xfer_mask) - 1;
398 if (highbit >= 0 && highbit < ARRAY_SIZE(xfer_mode_str))
399 return xfer_mode_str[highbit];
1da177e4 400 return "<n/a>";
1da177e4
LT		 401}
402
4c360c81
TH		 403static const char *sata_spd_string(unsigned int spd)
404{
405 static const char * const spd_str[] = {
406 "1.5 Gbps",
407 "3.0 Gbps",
408 };
409
410 if (spd == 0 || (spd - 1) >= ARRAY_SIZE(spd_str))
411 return "<unknown>";
412 return spd_str[spd - 1];
413}
414
1ad8e7f9 415void ata_dev_disable(struct ata_port *ap, struct ata_device *dev)
0b8efb0a 416{
e1211e3f 417 if (ata_dev_enabled(dev)) {
0b8efb0a
TH		 418 printk(KERN_WARNING "ata%u: dev %u disabled\n",
419 ap->id, dev->devno);
420 dev->class++;
421 }
422}
423
1da177e4
LT		 424/**
425 * ata_pio_devchk - PATA device presence detection
426 * @ap: ATA channel to examine
427 * @device: Device to examine (starting at zero)
428 *
429 * This technique was originally described in
430 * Hale Landis's ATADRVR (www.ata-atapi.com), and
431 * later found its way into the ATA/ATAPI spec.
432 *
433 * Write a pattern to the ATA shadow registers,
434 * and if a device is present, it will respond by
435 * correctly storing and echoing back the
436 * ATA shadow register contents.
437 *
438 * LOCKING:
439 * caller.
440 */
441
442static unsigned int ata_pio_devchk(struct ata_port *ap,
443 unsigned int device)
444{
445 struct ata_ioports *ioaddr = &ap->ioaddr;
446 u8 nsect, lbal;
447
448 ap->ops->dev_select(ap, device);
449
450 outb(0x55, ioaddr->nsect_addr);
451 outb(0xaa, ioaddr->lbal_addr);
452
453 outb(0xaa, ioaddr->nsect_addr);
454 outb(0x55, ioaddr->lbal_addr);
455
456 outb(0x55, ioaddr->nsect_addr);
457 outb(0xaa, ioaddr->lbal_addr);
458
459 nsect = inb(ioaddr->nsect_addr);
460 lbal = inb(ioaddr->lbal_addr);
461
462 if ((nsect == 0x55) && (lbal == 0xaa))
463 return 1; /* we found a device */
464
465 return 0; /* nothing found */
466}
467
468/**
469 * ata_mmio_devchk - PATA device presence detection
470 * @ap: ATA channel to examine
471 * @device: Device to examine (starting at zero)
472 *
473 * This technique was originally described in
474 * Hale Landis's ATADRVR (www.ata-atapi.com), and
475 * later found its way into the ATA/ATAPI spec.
476 *
477 * Write a pattern to the ATA shadow registers,
478 * and if a device is present, it will respond by
479 * correctly storing and echoing back the
480 * ATA shadow register contents.
481 *
482 * LOCKING:
483 * caller.
484 */
485
486static unsigned int ata_mmio_devchk(struct ata_port *ap,
487 unsigned int device)
488{
489 struct ata_ioports *ioaddr = &ap->ioaddr;
490 u8 nsect, lbal;
491
492 ap->ops->dev_select(ap, device);
493
494 writeb(0x55, (void __iomem *) ioaddr->nsect_addr);
495 writeb(0xaa, (void __iomem *) ioaddr->lbal_addr);
496
497 writeb(0xaa, (void __iomem *) ioaddr->nsect_addr);
498 writeb(0x55, (void __iomem *) ioaddr->lbal_addr);
499
500 writeb(0x55, (void __iomem *) ioaddr->nsect_addr);
501 writeb(0xaa, (void __iomem *) ioaddr->lbal_addr);
502
503 nsect = readb((void __iomem *) ioaddr->nsect_addr);
504 lbal = readb((void __iomem *) ioaddr->lbal_addr);
505
506 if ((nsect == 0x55) && (lbal == 0xaa))
507 return 1; /* we found a device */
508
509 return 0; /* nothing found */
510}
511
512/**
513 * ata_devchk - PATA device presence detection
514 * @ap: ATA channel to examine
515 * @device: Device to examine (starting at zero)
516 *
517 * Dispatch ATA device presence detection, depending
518 * on whether we are using PIO or MMIO to talk to the
519 * ATA shadow registers.
520 *
521 * LOCKING:
522 * caller.
523 */
524
525static unsigned int ata_devchk(struct ata_port *ap,
526 unsigned int device)
527{
528 if (ap->flags & ATA_FLAG_MMIO)
529 return ata_mmio_devchk(ap, device);
530 return ata_pio_devchk(ap, device);
531}
532
533/**
534 * ata_dev_classify - determine device type based on ATA-spec signature
535 * @tf: ATA taskfile register set for device to be identified
536 *
537 * Determine from taskfile register contents whether a device is
538 * ATA or ATAPI, as per "Signature and persistence" section
539 * of ATA/PI spec (volume 1, sect 5.14).
540 *
541 * LOCKING:
542 * None.
543 *
544 * RETURNS:
545 * Device type, %ATA_DEV_ATA, %ATA_DEV_ATAPI, or %ATA_DEV_UNKNOWN
546 * the event of failure.
547 */
548
057ace5e 549unsigned int ata_dev_classify(const struct ata_taskfile *tf)
1da177e4
LT		 550{
551 /* Apple's open source Darwin code hints that some devices only
552 * put a proper signature into the LBA mid/high registers,
553 * So, we only check those. It's sufficient for uniqueness.
554 */
555
556 if (((tf->lbam == 0) && (tf->lbah == 0)) ||
557 ((tf->lbam == 0x3c) && (tf->lbah == 0xc3))) {
558 DPRINTK("found ATA device by sig\n");
559 return ATA_DEV_ATA;
560 }
561
562 if (((tf->lbam == 0x14) && (tf->lbah == 0xeb)) ||
563 ((tf->lbam == 0x69) && (tf->lbah == 0x96))) {
564 DPRINTK("found ATAPI device by sig\n");
565 return ATA_DEV_ATAPI;
566 }
567
568 DPRINTK("unknown device\n");
569 return ATA_DEV_UNKNOWN;
570}
571
572/**
573 * ata_dev_try_classify - Parse returned ATA device signature
574 * @ap: ATA channel to examine
575 * @device: Device to examine (starting at zero)
b4dc7623 576 * @r_err: Value of error register on completion
1da177e4
LT		 577 *
578 * After an event -- SRST, E.D.D., or SATA COMRESET -- occurs,
579 * an ATA/ATAPI-defined set of values is placed in the ATA
580 * shadow registers, indicating the results of device detection
581 * and diagnostics.
582 *
583 * Select the ATA device, and read the values from the ATA shadow
584 * registers. Then parse according to the Error register value,
585 * and the spec-defined values examined by ata_dev_classify().
586 *
587 * LOCKING:
588 * caller.
b4dc7623
TH		 589 *
590 * RETURNS:
591 * Device type - %ATA_DEV_ATA, %ATA_DEV_ATAPI or %ATA_DEV_NONE.
1da177e4
LT		 592 */
593
b4dc7623
TH		 594static unsigned int
595ata_dev_try_classify(struct ata_port *ap, unsigned int device, u8 *r_err)
1da177e4 596{
1da177e4
LT		 597 struct ata_taskfile tf;
598 unsigned int class;
599 u8 err;
600
601 ap->ops->dev_select(ap, device);
602
603 memset(&tf, 0, sizeof(tf));
604
1da177e4 605 ap->ops->tf_read(ap, &tf);
0169e284 606 err = tf.feature;
b4dc7623
TH		 607 if (r_err)
608 *r_err = err;
1da177e4
LT		 609
610 /* see if device passed diags */
611 if (err == 1)
612 /* do nothing */ ;
613 else if ((device == 0) && (err == 0x81))
614 /* do nothing */ ;
615 else
b4dc7623 616 return ATA_DEV_NONE;
1da177e4 617
b4dc7623 618 /* determine if device is ATA or ATAPI */
1da177e4 619 class = ata_dev_classify(&tf);
b4dc7623 620
1da177e4 621 if (class == ATA_DEV_UNKNOWN)
b4dc7623 622 return ATA_DEV_NONE;
1da177e4 623 if ((class == ATA_DEV_ATA) && (ata_chk_status(ap) == 0))
b4dc7623
TH		 624 return ATA_DEV_NONE;
625 return class;
1da177e4
LT		 626}
627
628/**
6a62a04d 629 * ata_id_string - Convert IDENTIFY DEVICE page into string
1da177e4
LT		 630 * @id: IDENTIFY DEVICE results we will examine
631 * @s: string into which data is output
632 * @ofs: offset into identify device page
633 * @len: length of string to return. must be an even number.
634 *
635 * The strings in the IDENTIFY DEVICE page are broken up into
636 * 16-bit chunks. Run through the string, and output each
637 * 8-bit chunk linearly, regardless of platform.
638 *
639 * LOCKING:
640 * caller.
641 */
642
6a62a04d
TH		 643void ata_id_string(const u16 *id, unsigned char *s,
644 unsigned int ofs, unsigned int len)
1da177e4
LT		 645{
646 unsigned int c;
647
648 while (len > 0) {
649 c = id[ofs] >> 8;
650 *s = c;
651 s++;
652
653 c = id[ofs] & 0xff;
654 *s = c;
655 s++;
656
657 ofs++;
658 len -= 2;
659 }
660}
661
0e949ff3 662/**
6a62a04d 663 * ata_id_c_string - Convert IDENTIFY DEVICE page into C string
0e949ff3
TH		 664 * @id: IDENTIFY DEVICE results we will examine
665 * @s: string into which data is output
666 * @ofs: offset into identify device page
667 * @len: length of string to return. must be an odd number.
668 *
6a62a04d 669 * This function is identical to ata_id_string except that it
0e949ff3
TH		 670 * trims trailing spaces and terminates the resulting string with
671 * null. @len must be actual maximum length (even number) + 1.
672 *
673 * LOCKING:
674 * caller.
675 */
6a62a04d
TH		 676void ata_id_c_string(const u16 *id, unsigned char *s,
677 unsigned int ofs, unsigned int len)
0e949ff3
TH		 678{
679 unsigned char *p;
680
681 WARN_ON(!(len & 1));
682
6a62a04d 683 ata_id_string(id, s, ofs, len - 1);
0e949ff3
TH		 684
685 p = s + strnlen(s, len - 1);
686 while (p > s && p[-1] == ' ')
687 p--;
688 *p = '\0';
689}
0baab86b 690
2940740b
TH		 691static u64 ata_id_n_sectors(const u16 *id)
692{
693 if (ata_id_has_lba(id)) {
694 if (ata_id_has_lba48(id))
695 return ata_id_u64(id, 100);
696 else
697 return ata_id_u32(id, 60);
698 } else {
699 if (ata_id_current_chs_valid(id))
700 return ata_id_u32(id, 57);
701 else
702 return id[1] * id[3] * id[6];
703 }
704}
705
0baab86b
EF		 706/**
707 * ata_noop_dev_select - Select device 0/1 on ATA bus
708 * @ap: ATA channel to manipulate
709 * @device: ATA device (numbered from zero) to select
710 *
711 * This function performs no actual function.
712 *
713 * May be used as the dev_select() entry in ata_port_operations.
714 *
715 * LOCKING:
716 * caller.
717 */
1da177e4
LT		 718void ata_noop_dev_select (struct ata_port *ap, unsigned int device)
719{
720}
721
0baab86b 722
1da177e4
LT		 723/**
724 * ata_std_dev_select - Select device 0/1 on ATA bus
725 * @ap: ATA channel to manipulate
726 * @device: ATA device (numbered from zero) to select
727 *
728 * Use the method defined in the ATA specification to
729 * make either device 0, or device 1, active on the
0baab86b
EF		 730 * ATA channel. Works with both PIO and MMIO.
731 *
732 * May be used as the dev_select() entry in ata_port_operations.
1da177e4
LT		 733 *
734 * LOCKING:
735 * caller.
736 */
737
738void ata_std_dev_select (struct ata_port *ap, unsigned int device)
739{
740 u8 tmp;
741
742 if (device == 0)
743 tmp = ATA_DEVICE_OBS;
744 else
745 tmp = ATA_DEVICE_OBS | ATA_DEV1;
746
747 if (ap->flags & ATA_FLAG_MMIO) {
748 writeb(tmp, (void __iomem *) ap->ioaddr.device_addr);
749 } else {
750 outb(tmp, ap->ioaddr.device_addr);
751 }
752 ata_pause(ap); /* needed; also flushes, for mmio */
753}
754
755/**
756 * ata_dev_select - Select device 0/1 on ATA bus
757 * @ap: ATA channel to manipulate
758 * @device: ATA device (numbered from zero) to select
759 * @wait: non-zero to wait for Status register BSY bit to clear
760 * @can_sleep: non-zero if context allows sleeping
761 *
762 * Use the method defined in the ATA specification to
763 * make either device 0, or device 1, active on the
764 * ATA channel.
765 *
766 * This is a high-level version of ata_std_dev_select(),
767 * which additionally provides the services of inserting
768 * the proper pauses and status polling, where needed.
769 *
770 * LOCKING:
771 * caller.
772 */
773
774void ata_dev_select(struct ata_port *ap, unsigned int device,
775 unsigned int wait, unsigned int can_sleep)
776{
777 VPRINTK("ENTER, ata%u: device %u, wait %u\n",
778 ap->id, device, wait);
779
780 if (wait)
781 ata_wait_idle(ap);
782
783 ap->ops->dev_select(ap, device);
784
785 if (wait) {
786 if (can_sleep && ap->device[device].class == ATA_DEV_ATAPI)
787 msleep(150);
788 ata_wait_idle(ap);
789 }
790}
791
792/**
793 * ata_dump_id - IDENTIFY DEVICE info debugging output
0bd3300a 794 * @id: IDENTIFY DEVICE page to dump
1da177e4 795 *
0bd3300a
TH		 796 * Dump selected 16-bit words from the given IDENTIFY DEVICE
797 * page.
1da177e4
LT		 798 *
799 * LOCKING:
800 * caller.
801 */
802
0bd3300a 803static inline void ata_dump_id(const u16 *id)
1da177e4
LT		 804{
805 DPRINTK("49==0x%04x "
806 "53==0x%04x "
807 "63==0x%04x "
808 "64==0x%04x "
809 "75==0x%04x \n",
0bd3300a
TH		 810 id[49],
811 id[53],
812 id[63],
813 id[64],
814 id[75]);
1da177e4
LT		 815 DPRINTK("80==0x%04x "
816 "81==0x%04x "
817 "82==0x%04x "
818 "83==0x%04x "
819 "84==0x%04x \n",
0bd3300a
TH		 820 id[80],
821 id[81],
822 id[82],
823 id[83],
824 id[84]);
1da177e4
LT		 825 DPRINTK("88==0x%04x "
826 "93==0x%04x\n",
0bd3300a
TH		 827 id[88],
828 id[93]);
1da177e4
LT		 829}
830
cb95d562
TH		 831/**
832 * ata_id_xfermask - Compute xfermask from the given IDENTIFY data
833 * @id: IDENTIFY data to compute xfer mask from
834 *
835 * Compute the xfermask for this device. This is not as trivial
836 * as it seems if we must consider early devices correctly.
837 *
838 * FIXME: pre IDE drive timing (do we care ?).
839 *
840 * LOCKING:
841 * None.
842 *
843 * RETURNS:
844 * Computed xfermask
845 */
846static unsigned int ata_id_xfermask(const u16 *id)
847{
848 unsigned int pio_mask, mwdma_mask, udma_mask;
849
850 /* Usual case. Word 53 indicates word 64 is valid */
851 if (id[ATA_ID_FIELD_VALID] & (1 << 1)) {
852 pio_mask = id[ATA_ID_PIO_MODES] & 0x03;
853 pio_mask <<= 3;
854 pio_mask |= 0x7;
855 } else {
856 /* If word 64 isn't valid then Word 51 high byte holds
857 * the PIO timing number for the maximum. Turn it into
858 * a mask.
859 */
860 pio_mask = (2 << (id[ATA_ID_OLD_PIO_MODES] & 0xFF)) - 1 ;
861
862 /* But wait.. there's more. Design your standards by
863 * committee and you too can get a free iordy field to
864 * process. However its the speeds not the modes that
865 * are supported... Note drivers using the timing API
866 * will get this right anyway
867 */
868 }
869
870 mwdma_mask = id[ATA_ID_MWDMA_MODES] & 0x07;
fb21f0d0
TH		 871
872 udma_mask = 0;
873 if (id[ATA_ID_FIELD_VALID] & (1 << 2))
874 udma_mask = id[ATA_ID_UDMA_MODES] & 0xff;
cb95d562
TH		 875
876 return ata_pack_xfermask(pio_mask, mwdma_mask, udma_mask);
877}
878
86e45b6b
TH		 879/**
880 * ata_port_queue_task - Queue port_task
881 * @ap: The ata_port to queue port_task for
882 *
883 * Schedule @fn(@data) for execution after @delay jiffies using
884 * port_task. There is one port_task per port and it's the
885 * user(low level driver)'s responsibility to make sure that only
886 * one task is active at any given time.
887 *
888 * libata core layer takes care of synchronization between
889 * port_task and EH. ata_port_queue_task() may be ignored for EH
890 * synchronization.
891 *
892 * LOCKING:
893 * Inherited from caller.
894 */
895void ata_port_queue_task(struct ata_port *ap, void (*fn)(void *), void *data,
896 unsigned long delay)
897{
898 int rc;
899
2e755f68 900 if (ap->flags & ATA_FLAG_FLUSH_PORT_TASK)
86e45b6b
TH		 901 return;
902
903 PREPARE_WORK(&ap->port_task, fn, data);
904
905 if (!delay)
906 rc = queue_work(ata_wq, &ap->port_task);
907 else
908 rc = queue_delayed_work(ata_wq, &ap->port_task, delay);
909
910 /* rc == 0 means that another user is using port task */
911 WARN_ON(rc == 0);
912}
913
914/**
915 * ata_port_flush_task - Flush port_task
916 * @ap: The ata_port to flush port_task for
917 *
918 * After this function completes, port_task is guranteed not to
919 * be running or scheduled.
920 *
921 * LOCKING:
922 * Kernel thread context (may sleep)
923 */
924void ata_port_flush_task(struct ata_port *ap)
925{
926 unsigned long flags;
927
928 DPRINTK("ENTER\n");
929
930 spin_lock_irqsave(&ap->host_set->lock, flags);
2e755f68 931 ap->flags |= ATA_FLAG_FLUSH_PORT_TASK;
86e45b6b
TH		 932 spin_unlock_irqrestore(&ap->host_set->lock, flags);
933
934 DPRINTK("flush #1\n");
935 flush_workqueue(ata_wq);
936
937 /*
938 * At this point, if a task is running, it's guaranteed to see
939 * the FLUSH flag; thus, it will never queue pio tasks again.
940 * Cancel and flush.
941 */
942 if (!cancel_delayed_work(&ap->port_task)) {
943 DPRINTK("flush #2\n");
944 flush_workqueue(ata_wq);
945 }
946
947 spin_lock_irqsave(&ap->host_set->lock, flags);
2e755f68 948 ap->flags &= ~ATA_FLAG_FLUSH_PORT_TASK;
86e45b6b
TH		 949 spin_unlock_irqrestore(&ap->host_set->lock, flags);
950
951 DPRINTK("EXIT\n");
952}
953
77853bf2 954void ata_qc_complete_internal(struct ata_queued_cmd *qc)
a2a7a662 955{
77853bf2 956 struct completion *waiting = qc->private_data;
a2a7a662 957
77853bf2 958 qc->ap->ops->tf_read(qc->ap, &qc->tf);
a2a7a662 959 complete(waiting);
a2a7a662
TH		 960}
961
962/**
963 * ata_exec_internal - execute libata internal command
964 * @ap: Port to which the command is sent
965 * @dev: Device to which the command is sent
966 * @tf: Taskfile registers for the command and the result
d69cf37d 967 * @cdb: CDB for packet command
a2a7a662
TH		 968 * @dma_dir: Data tranfer direction of the command
969 * @buf: Data buffer of the command
970 * @buflen: Length of data buffer
971 *
972 * Executes libata internal command with timeout. @tf contains
973 * command on entry and result on return. Timeout and error
974 * conditions are reported via return value. No recovery action
975 * is taken after a command times out. It's caller's duty to
976 * clean up after timeout.
977 *
978 * LOCKING:
979 * None. Should be called with kernel context, might sleep.
980 */
981
1ad8e7f9
TH		 982unsigned ata_exec_internal(struct ata_port *ap, struct ata_device *dev,
983 struct ata_taskfile *tf, const u8 *cdb,
984 int dma_dir, void *buf, unsigned int buflen)
a2a7a662
TH		 985{
986 u8 command = tf->command;
987 struct ata_queued_cmd *qc;
988 DECLARE_COMPLETION(wait);
989 unsigned long flags;
77853bf2 990 unsigned int err_mask;
a2a7a662
TH		 991
992 spin_lock_irqsave(&ap->host_set->lock, flags);
993
994 qc = ata_qc_new_init(ap, dev);
995 BUG_ON(qc == NULL);
996
997 qc->tf = *tf;
d69cf37d
TH		 998 if (cdb)
999 memcpy(qc->cdb, cdb, ATAPI_CDB_LEN);
a2a7a662
TH		 1000 qc->dma_dir = dma_dir;
1001 if (dma_dir != DMA_NONE) {
1002 ata_sg_init_one(qc, buf, buflen);
1003 qc->nsect = buflen / ATA_SECT_SIZE;
1004 }
1005
77853bf2 1006 qc->private_data = &wait;
a2a7a662
TH		 1007 qc->complete_fn = ata_qc_complete_internal;
1008
8e0e694a 1009 ata_qc_issue(qc);
a2a7a662
TH		 1010
1011 spin_unlock_irqrestore(&ap->host_set->lock, flags);
1012
1013 if (!wait_for_completion_timeout(&wait, ATA_TMOUT_INTERNAL)) {
41ade50c
AL		 1014 ata_port_flush_task(ap);
1015
a2a7a662
TH		 1016 spin_lock_irqsave(&ap->host_set->lock, flags);
1017
1018 /* We're racing with irq here. If we lose, the
1019 * following test prevents us from completing the qc
1020 * again. If completion irq occurs after here but
1021 * before the caller cleans up, it will result in a
1022 * spurious interrupt. We can live with that.
1023 */
77853bf2 1024 if (qc->flags & ATA_QCFLAG_ACTIVE) {
11a56d24 1025 qc->err_mask = AC_ERR_TIMEOUT;
a2a7a662
TH		 1026 ata_qc_complete(qc);
1027 printk(KERN_WARNING "ata%u: qc timeout (cmd 0x%x)\n",
1028 ap->id, command);
1029 }
1030
1031 spin_unlock_irqrestore(&ap->host_set->lock, flags);
1032 }
1033
15869303
TH		 1034 /* finish up */
1035 spin_lock_irqsave(&ap->host_set->lock, flags);
1036
77853bf2
TH		 1037 *tf = qc->tf;
1038 err_mask = qc->err_mask;
1039
1040 ata_qc_free(qc);
1041
1f7dd3e9
TH		 1042 /* XXX - Some LLDDs (sata_mv) disable port on command failure.
1043 * Until those drivers are fixed, we detect the condition
1044 * here, fail the command with AC_ERR_SYSTEM and reenable the
1045 * port.
1046 *
1047 * Note that this doesn't change any behavior as internal
1048 * command failure results in disabling the device in the
1049 * higher layer for LLDDs without new reset/EH callbacks.
1050 *
1051 * Kill the following code as soon as those drivers are fixed.
1052 */
198e0fed 1053 if (ap->flags & ATA_FLAG_DISABLED) {
1f7dd3e9
TH		 1054 err_mask |= AC_ERR_SYSTEM;
1055 ata_port_probe(ap);
1056 }
1057
15869303
TH		 1058 spin_unlock_irqrestore(&ap->host_set->lock, flags);
1059
77853bf2 1060 return err_mask;
a2a7a662
TH		 1061}
1062
1bc4ccff
AC		 1063/**
1064 * ata_pio_need_iordy - check if iordy needed
1065 * @adev: ATA device
1066 *
1067 * Check if the current speed of the device requires IORDY. Used
1068 * by various controllers for chip configuration.
1069 */
1070
1071unsigned int ata_pio_need_iordy(const struct ata_device *adev)
1072{
1073 int pio;
1074 int speed = adev->pio_mode - XFER_PIO_0;
1075
1076 if (speed < 2)
1077 return 0;
1078 if (speed > 2)
1079 return 1;
2e9edbf8 1080
1bc4ccff
AC		 1081 /* If we have no drive specific rule, then PIO 2 is non IORDY */
1082
1083 if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE */
1084 pio = adev->id[ATA_ID_EIDE_PIO];
1085 /* Is the speed faster than the drive allows non IORDY ? */
1086 if (pio) {
1087 /* This is cycle times not frequency - watch the logic! */
1088 if (pio > 240) /* PIO2 is 240nS per cycle */
1089 return 1;
1090 return 0;
1091 }
1092 }
1093 return 0;
1094}
1095
1da177e4 1096/**
49016aca
TH		 1097 * ata_dev_read_id - Read ID data from the specified device
1098 * @ap: port on which target device resides
1099 * @dev: target device
1100 * @p_class: pointer to class of the target device (may be changed)
1101 * @post_reset: is this read ID post-reset?
d9572b1d 1102 * @p_id: read IDENTIFY page (newly allocated)
1da177e4 1103 *
49016aca
TH		 1104 * Read ID data from the specified device. ATA_CMD_ID_ATA is
1105 * performed on ATA devices and ATA_CMD_ID_ATAPI on ATAPI
aec5c3c1
TH		 1106 * devices. This function also issues ATA_CMD_INIT_DEV_PARAMS
1107 * for pre-ATA4 drives.
1da177e4
LT		 1108 *
1109 * LOCKING:
49016aca
TH		 1110 * Kernel thread context (may sleep)
1111 *
1112 * RETURNS:
1113 * 0 on success, -errno otherwise.
1da177e4 1114 */
49016aca 1115static int ata_dev_read_id(struct ata_port *ap, struct ata_device *dev,
d9572b1d 1116 unsigned int *p_class, int post_reset, u16 **p_id)
1da177e4 1117{
49016aca 1118 unsigned int class = *p_class;
a0123703 1119 struct ata_taskfile tf;
49016aca 1120 unsigned int err_mask = 0;
d9572b1d 1121 u16 *id;
49016aca
TH		 1122 const char *reason;
1123 int rc;
1da177e4 1124
49016aca 1125 DPRINTK("ENTER, host %u, dev %u\n", ap->id, dev->devno);
1da177e4 1126
49016aca 1127 ata_dev_select(ap, dev->devno, 1, 1); /* select device 0/1 */
1da177e4 1128
d9572b1d
TH		 1129 id = kmalloc(sizeof(id[0]) * ATA_ID_WORDS, GFP_KERNEL);
1130 if (id == NULL) {
1131 rc = -ENOMEM;
1132 reason = "out of memory";
1133 goto err_out;
1134 }
1135
49016aca
TH		 1136 retry:
1137 ata_tf_init(ap, &tf, dev->devno);
a0123703 1138
49016aca
TH		 1139 switch (class) {
1140 case ATA_DEV_ATA:
a0123703 1141 tf.command = ATA_CMD_ID_ATA;
49016aca
TH		 1142 break;
1143 case ATA_DEV_ATAPI:
a0123703 1144 tf.command = ATA_CMD_ID_ATAPI;
49016aca
TH		 1145 break;
1146 default:
1147 rc = -ENODEV;
1148 reason = "unsupported class";
1149 goto err_out;
1da177e4
LT		 1150 }
1151
a0123703 1152 tf.protocol = ATA_PROT_PIO;
1da177e4 1153
d69cf37d 1154 err_mask = ata_exec_internal(ap, dev, &tf, NULL, DMA_FROM_DEVICE,
49016aca 1155 id, sizeof(id[0]) * ATA_ID_WORDS);
a0123703 1156 if (err_mask) {
49016aca
TH		 1157 rc = -EIO;
1158 reason = "I/O error";
1da177e4
LT		 1159 goto err_out;
1160 }
1161
49016aca 1162 swap_buf_le16(id, ATA_ID_WORDS);
1da177e4 1163
49016aca 1164 /* sanity check */
692785e7 1165 if ((class == ATA_DEV_ATA) != (ata_id_is_ata(id) | ata_id_is_cfa(id))) {
49016aca
TH		 1166 rc = -EINVAL;
1167 reason = "device reports illegal type";
1168 goto err_out;
1169 }
1170
1171 if (post_reset && class == ATA_DEV_ATA) {
1172 /*
1173 * The exact sequence expected by certain pre-ATA4 drives is:
1174 * SRST RESET
1175 * IDENTIFY
1176 * INITIALIZE DEVICE PARAMETERS
1177 * anything else..
1178 * Some drives were very specific about that exact sequence.
1179 */
1180 if (ata_id_major_version(id) < 4 || !ata_id_has_lba(id)) {
00b6f5e9 1181 err_mask = ata_dev_init_params(ap, dev, id[3], id[6]);
49016aca
TH		 1182 if (err_mask) {
1183 rc = -EIO;
1184 reason = "INIT_DEV_PARAMS failed";
1185 goto err_out;
1186 }
1187
1188 /* current CHS translation info (id[53-58]) might be
1189 * changed. reread the identify device info.
1190 */
1191 post_reset = 0;
1192 goto retry;
1193 }
1194 }
1195
1196 *p_class = class;
d9572b1d 1197 *p_id = id;
49016aca
TH		 1198 return 0;
1199
1200 err_out:
1201 printk(KERN_WARNING "ata%u: dev %u failed to IDENTIFY (%s)\n",
1202 ap->id, dev->devno, reason);
d9572b1d 1203 kfree(id);
49016aca
TH		 1204 return rc;
1205}
1206
4b2f3ede
TH		 1207static inline u8 ata_dev_knobble(const struct ata_port *ap,
1208 struct ata_device *dev)
1209{
1210 return ((ap->cbl == ATA_CBL_SATA) && (!ata_id_is_sata(dev->id)));
1211}
1212
49016aca 1213/**
ffeae418
TH		 1214 * ata_dev_configure - Configure the specified ATA/ATAPI device
1215 * @ap: Port on which target device resides
1216 * @dev: Target device to configure
4c2d721a 1217 * @print_info: Enable device info printout
ffeae418
TH		 1218 *
1219 * Configure @dev according to @dev->id. Generic and low-level
1220 * driver specific fixups are also applied.
49016aca
TH		 1221 *
1222 * LOCKING:
ffeae418
TH		 1223 * Kernel thread context (may sleep)
1224 *
1225 * RETURNS:
1226 * 0 on success, -errno otherwise
49016aca 1227 */
4c2d721a
TH		 1228static int ata_dev_configure(struct ata_port *ap, struct ata_device *dev,
1229 int print_info)
49016aca 1230{
1148c3a7 1231 const u16 *id = dev->id;
ff8854b2 1232 unsigned int xfer_mask;
49016aca
TH		 1233 int i, rc;
1234
e1211e3f 1235 if (!ata_dev_enabled(dev)) {
49016aca 1236 DPRINTK("ENTER/EXIT (host %u, dev %u) -- nodev\n",
ffeae418
TH		 1237 ap->id, dev->devno);
1238 return 0;
49016aca
TH		 1239 }
1240
ffeae418 1241 DPRINTK("ENTER, host %u, dev %u\n", ap->id, dev->devno);
1da177e4 1242
c39f5ebe
TH		 1243 /* print device capabilities */
1244 if (print_info)
1245 printk(KERN_DEBUG "ata%u: dev %u cfg 49:%04x 82:%04x 83:%04x "
1246 "84:%04x 85:%04x 86:%04x 87:%04x 88:%04x\n",
1247 ap->id, dev->devno, id[49], id[82], id[83],
1248 id[84], id[85], id[86], id[87], id[88]);
1249
208a9933 1250 /* initialize to-be-configured parameters */
ea1dd4e1 1251 dev->flags &= ~ATA_DFLAG_CFG_MASK;
208a9933
TH		 1252 dev->max_sectors = 0;
1253 dev->cdb_len = 0;
1254 dev->n_sectors = 0;
1255 dev->cylinders = 0;
1256 dev->heads = 0;
1257 dev->sectors = 0;
1258
1da177e4
LT		 1259 /*
1260 * common ATA, ATAPI feature tests
1261 */
1262
ff8854b2 1263 /* find max transfer mode; for printk only */
1148c3a7 1264 xfer_mask = ata_id_xfermask(id);
1da177e4 1265
1148c3a7 1266 ata_dump_id(id);
1da177e4
LT		 1267
1268 /* ATA-specific feature tests */
1269 if (dev->class == ATA_DEV_ATA) {
1148c3a7 1270 dev->n_sectors = ata_id_n_sectors(id);
2940740b 1271
1148c3a7 1272 if (ata_id_has_lba(id)) {
4c2d721a 1273 const char *lba_desc;
8bf62ece 1274
4c2d721a
TH		 1275 lba_desc = "LBA";
1276 dev->flags |= ATA_DFLAG_LBA;
1148c3a7 1277 if (ata_id_has_lba48(id)) {
8bf62ece 1278 dev->flags |= ATA_DFLAG_LBA48;
4c2d721a
TH		 1279 lba_desc = "LBA48";
1280 }
8bf62ece
AL		 1281
1282 /* print device info to dmesg */
4c2d721a
TH		 1283 if (print_info)
1284 printk(KERN_INFO "ata%u: dev %u ATA-%d, "
1285 "max %s, %Lu sectors: %s\n",
1286 ap->id, dev->devno,
1148c3a7 1287 ata_id_major_version(id),
ff8854b2 1288 ata_mode_string(xfer_mask),
4c2d721a
TH		 1289 (unsigned long long)dev->n_sectors,
1290 lba_desc);
ffeae418 1291 } else {
8bf62ece
AL		 1292 /* CHS */
1293
1294 /* Default translation */
1148c3a7
TH		 1295 dev->cylinders = id[1];
1296 dev->heads = id[3];
1297 dev->sectors = id[6];
8bf62ece 1298
1148c3a7 1299 if (ata_id_current_chs_valid(id)) {
8bf62ece 1300 /* Current CHS translation is valid. */
1148c3a7
TH		 1301 dev->cylinders = id[54];
1302 dev->heads = id[55];
1303 dev->sectors = id[56];
8bf62ece
AL		 1304 }
1305
1306 /* print device info to dmesg */
4c2d721a
TH		 1307 if (print_info)
1308 printk(KERN_INFO "ata%u: dev %u ATA-%d, "
1309 "max %s, %Lu sectors: CHS %u/%u/%u\n",
1310 ap->id, dev->devno,
1148c3a7 1311 ata_id_major_version(id),
ff8854b2 1312 ata_mode_string(xfer_mask),
4c2d721a
TH		 1313 (unsigned long long)dev->n_sectors,
1314 dev->cylinders, dev->heads, dev->sectors);
1da177e4
LT		 1315 }
1316
6e7846e9 1317 dev->cdb_len = 16;
1da177e4
LT		 1318 }
1319
1320 /* ATAPI-specific feature tests */
2c13b7ce 1321 else if (dev->class == ATA_DEV_ATAPI) {
1148c3a7 1322 rc = atapi_cdb_len(id);
1da177e4
LT		 1323 if ((rc < 12) || (rc > ATAPI_CDB_LEN)) {
1324 printk(KERN_WARNING "ata%u: unsupported CDB len\n", ap->id);
ffeae418 1325 rc = -EINVAL;
1da177e4
LT		 1326 goto err_out_nosup;
1327 }
6e7846e9 1328 dev->cdb_len = (unsigned int) rc;
1da177e4
LT		 1329
1330 /* print device info to dmesg */
4c2d721a
TH		 1331 if (print_info)
1332 printk(KERN_INFO "ata%u: dev %u ATAPI, max %s\n",
ff8854b2 1333 ap->id, dev->devno, ata_mode_string(xfer_mask));
1da177e4
LT		 1334 }
1335
6e7846e9
TH		 1336 ap->host->max_cmd_len = 0;
1337 for (i = 0; i < ATA_MAX_DEVICES; i++)
1338 ap->host->max_cmd_len = max_t(unsigned int,
1339 ap->host->max_cmd_len,
1340 ap->device[i].cdb_len);
1341
4b2f3ede
TH		 1342 /* limit bridge transfers to udma5, 200 sectors */
1343 if (ata_dev_knobble(ap, dev)) {
4c2d721a
TH		 1344 if (print_info)
1345 printk(KERN_INFO "ata%u(%u): applying bridge limits\n",
1346 ap->id, dev->devno);
5a529139 1347 dev->udma_mask &= ATA_UDMA5;
4b2f3ede
TH		 1348 dev->max_sectors = ATA_MAX_SECTORS;
1349 }
1350
1351 if (ap->ops->dev_config)
1352 ap->ops->dev_config(ap, dev);
1353
1da177e4 1354 DPRINTK("EXIT, drv_stat = 0x%x\n", ata_chk_status(ap));
ffeae418 1355 return 0;
1da177e4
LT		 1356
1357err_out_nosup:
1da177e4 1358 DPRINTK("EXIT, err\n");
ffeae418 1359 return rc;
1da177e4
LT		 1360}
1361
1362/**
1363 * ata_bus_probe - Reset and probe ATA bus
1364 * @ap: Bus to probe
1365 *
0cba632b
JG		 1366 * Master ATA bus probing function. Initiates a hardware-dependent
1367 * bus reset, then attempts to identify any devices found on
1368 * the bus.
1369 *
1da177e4 1370 * LOCKING:
0cba632b 1371 * PCI/etc. bus probe sem.
1da177e4
LT		 1372 *
1373 * RETURNS:
96072e69 1374 * Zero on success, negative errno otherwise.
1da177e4
LT		 1375 */
1376
1377static int ata_bus_probe(struct ata_port *ap)
1378{
28ca5c57 1379 unsigned int classes[ATA_MAX_DEVICES];
14d2bac1
TH		 1380 int tries[ATA_MAX_DEVICES];
1381 int i, rc, down_xfermask;
e82cbdb9 1382 struct ata_device *dev;
1da177e4 1383
28ca5c57 1384 ata_port_probe(ap);
c19ba8af 1385
14d2bac1
TH		 1386 for (i = 0; i < ATA_MAX_DEVICES; i++)
1387 tries[i] = ATA_PROBE_MAX_TRIES;
1388
1389 retry:
1390 down_xfermask = 0;
1391
2044470c
TH		 1392 /* reset and determine device classes */
1393 for (i = 0; i < ATA_MAX_DEVICES; i++)
1394 classes[i] = ATA_DEV_UNKNOWN;
2061a47a 1395
2044470c 1396 if (ap->ops->probe_reset) {
c19ba8af 1397 rc = ap->ops->probe_reset(ap, classes);
28ca5c57
TH		 1398 if (rc) {
1399 printk("ata%u: reset failed (errno=%d)\n", ap->id, rc);
1400 return rc;
c19ba8af 1401 }
28ca5c57 1402 } else {
c19ba8af
TH		 1403 ap->ops->phy_reset(ap);
1404
f8c2c420
TH		 1405 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1406 if (!(ap->flags & ATA_FLAG_DISABLED))
28ca5c57 1407 classes[i] = ap->device[i].class;
f8c2c420
TH		 1408 ap->device[i].class = ATA_DEV_UNKNOWN;
1409 }
2044470c 1410
28ca5c57
TH		 1411 ata_port_probe(ap);
1412 }
1da177e4 1413
2044470c
TH		 1414 for (i = 0; i < ATA_MAX_DEVICES; i++)
1415 if (classes[i] == ATA_DEV_UNKNOWN)
1416 classes[i] = ATA_DEV_NONE;
1417
28ca5c57 1418 /* read IDENTIFY page and configure devices */
1da177e4 1419 for (i = 0; i < ATA_MAX_DEVICES; i++) {
e82cbdb9 1420 dev = &ap->device[i];
28ca5c57 1421
ec573755
TH		 1422 if (tries[i])
1423 dev->class = classes[i];
ffeae418 1424
14d2bac1 1425 if (!ata_dev_enabled(dev))
ffeae418 1426 continue;
ffeae418 1427
14d2bac1
TH		 1428 kfree(dev->id);
1429 dev->id = NULL;
1430 rc = ata_dev_read_id(ap, dev, &dev->class, 1, &dev->id);
1431 if (rc)
1432 goto fail;
1433
1434 rc = ata_dev_configure(ap, dev, 1);
1435 if (rc)
1436 goto fail;
1da177e4
LT		 1437 }
1438
e82cbdb9
TH		 1439 /* configure transfer mode */
1440 if (ap->ops->set_mode) {
1441 /* FIXME: make ->set_mode handle no device case and
1442 * return error code and failing device on failure as
1443 * ata_set_mode() does.
1444 */
14d2bac1
TH		 1445 for (i = 0; i < ATA_MAX_DEVICES; i++)
1446 if (ata_dev_enabled(&ap->device[i])) {
1447 ap->ops->set_mode(ap);
1448 break;
1449 }
e82cbdb9 1450 rc = 0;
51713d35 1451 } else
14d2bac1 1452 rc = ata_set_mode(ap, &dev);
51713d35
TH		 1453
1454 if (rc) {
1455 down_xfermask = 1;
1456 goto fail;
e82cbdb9 1457 }
1da177e4 1458
e82cbdb9
TH		 1459 for (i = 0; i < ATA_MAX_DEVICES; i++)
1460 if (ata_dev_enabled(&ap->device[i]))
1461 return 0;
1da177e4 1462
e82cbdb9
TH		 1463 /* no device present, disable port */
1464 ata_port_disable(ap);
1da177e4 1465 ap->ops->port_disable(ap);
96072e69 1466 return -ENODEV;
14d2bac1
TH		 1467
1468 fail:
1469 switch (rc) {
1470 case -EINVAL:
1471 case -ENODEV:
1472 tries[dev->devno] = 0;
1473 break;
1474 case -EIO:
3c567b7d 1475 sata_down_spd_limit(ap);
14d2bac1
TH		 1476 /* fall through */
1477 default:
1478 tries[dev->devno]--;
1479 if (down_xfermask &&
1480 ata_down_xfermask_limit(ap, dev, tries[dev->devno] == 1))
1481 tries[dev->devno] = 0;
1482 }
1483
ec573755
TH		 1484 if (!tries[dev->devno]) {
1485 ata_down_xfermask_limit(ap, dev, 1);
1486 ata_dev_disable(ap, dev);
1487 }
1488
14d2bac1 1489 goto retry;
1da177e4
LT		 1490}
1491
1492/**
0cba632b
JG		 1493 * ata_port_probe - Mark port as enabled
1494 * @ap: Port for which we indicate enablement
1da177e4 1495 *
0cba632b
JG		 1496 * Modify @ap data structure such that the system
1497 * thinks that the entire port is enabled.
1498 *
1499 * LOCKING: host_set lock, or some other form of
1500 * serialization.
1da177e4
LT		 1501 */
1502
1503void ata_port_probe(struct ata_port *ap)
1504{
198e0fed 1505 ap->flags &= ~ATA_FLAG_DISABLED;
1da177e4
LT		 1506}
1507
3be680b7
TH		 1508/**
1509 * sata_print_link_status - Print SATA link status
1510 * @ap: SATA port to printk link status about
1511 *
1512 * This function prints link speed and status of a SATA link.
1513 *
1514 * LOCKING:
1515 * None.
1516 */
1517static void sata_print_link_status(struct ata_port *ap)
1518{
6d5f9732 1519 u32 sstatus, scontrol, tmp;
3be680b7
TH		 1520
1521 if (!ap->ops->scr_read)
1522 return;
1523
1524 sstatus = scr_read(ap, SCR_STATUS);
6d5f9732 1525 scontrol = scr_read(ap, SCR_CONTROL);
3be680b7
TH		 1526
1527 if (sata_dev_present(ap)) {
1528 tmp = (sstatus >> 4) & 0xf;
6d5f9732
TH		 1529 printk(KERN_INFO
1530 "ata%u: SATA link up %s (SStatus %X SControl %X)\n",
1531 ap->id, sata_spd_string(tmp), sstatus, scontrol);
3be680b7 1532 } else {
6d5f9732
TH		 1533 printk(KERN_INFO
1534 "ata%u: SATA link down (SStatus %X SControl %X)\n",
1535 ap->id, sstatus, scontrol);
3be680b7
TH		 1536 }
1537}
1538
1da177e4 1539/**
780a87f7
JG		 1540 * __sata_phy_reset - Wake/reset a low-level SATA PHY
1541 * @ap: SATA port associated with target SATA PHY.
1da177e4 1542 *
780a87f7
JG		 1543 * This function issues commands to standard SATA Sxxx
1544 * PHY registers, to wake up the phy (and device), and
1545 * clear any reset condition.
1da177e4
LT		 1546 *
1547 * LOCKING:
0cba632b 1548 * PCI/etc. bus probe sem.
1da177e4
LT		 1549 *
1550 */
1551void __sata_phy_reset(struct ata_port *ap)
1552{
1553 u32 sstatus;
1554 unsigned long timeout = jiffies + (HZ * 5);
1555
1556 if (ap->flags & ATA_FLAG_SATA_RESET) {
cdcca89e
BR		 1557 /* issue phy wake/reset */
1558 scr_write_flush(ap, SCR_CONTROL, 0x301);
62ba2841
TH		 1559 /* Couldn't find anything in SATA I/II specs, but
1560 * AHCI-1.1 10.4.2 says at least 1 ms. */
1561 mdelay(1);
1da177e4 1562 }
cdcca89e 1563 scr_write_flush(ap, SCR_CONTROL, 0x300); /* phy wake/clear reset */
1da177e4
LT		 1564
1565 /* wait for phy to become ready, if necessary */
1566 do {
1567 msleep(200);
1568 sstatus = scr_read(ap, SCR_STATUS);
1569 if ((sstatus & 0xf) != 1)
1570 break;
1571 } while (time_before(jiffies, timeout));
1572
3be680b7
TH		 1573 /* print link status */
1574 sata_print_link_status(ap);
656563e3 1575
3be680b7
TH		 1576 /* TODO: phy layer with polling, timeouts, etc. */
1577 if (sata_dev_present(ap))
1da177e4 1578 ata_port_probe(ap);
3be680b7 1579 else
1da177e4 1580 ata_port_disable(ap);
1da177e4 1581
198e0fed 1582 if (ap->flags & ATA_FLAG_DISABLED)
1da177e4
LT		 1583 return;
1584
1585 if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) {
1586 ata_port_disable(ap);
1587 return;
1588 }
1589
1590 ap->cbl = ATA_CBL_SATA;
1591}
1592
1593/**
780a87f7
JG		 1594 * sata_phy_reset - Reset SATA bus.
1595 * @ap: SATA port associated with target SATA PHY.
1da177e4 1596 *
780a87f7
JG		 1597 * This function resets the SATA bus, and then probes
1598 * the bus for devices.
1da177e4
LT		 1599 *
1600 * LOCKING:
0cba632b 1601 * PCI/etc. bus probe sem.
1da177e4
LT		 1602 *
1603 */
1604void sata_phy_reset(struct ata_port *ap)
1605{
1606 __sata_phy_reset(ap);
198e0fed 1607 if (ap->flags & ATA_FLAG_DISABLED)
1da177e4
LT		 1608 return;
1609 ata_bus_reset(ap);
1610}
1611
ebdfca6e
AC		 1612/**
1613 * ata_dev_pair - return other device on cable
1614 * @ap: port
1615 * @adev: device
1616 *
1617 * Obtain the other device on the same cable, or if none is
1618 * present NULL is returned
1619 */
2e9edbf8 1620
ebdfca6e
AC		 1621struct ata_device *ata_dev_pair(struct ata_port *ap, struct ata_device *adev)
1622{
1623 struct ata_device *pair = &ap->device[1 - adev->devno];
e1211e3f 1624 if (!ata_dev_enabled(pair))
ebdfca6e
AC		 1625 return NULL;
1626 return pair;
1627}
1628
1da177e4 1629/**
780a87f7
JG		 1630 * ata_port_disable - Disable port.
1631 * @ap: Port to be disabled.
1da177e4 1632 *
780a87f7
JG		 1633 * Modify @ap data structure such that the system
1634 * thinks that the entire port is disabled, and should
1635 * never attempt to probe or communicate with devices
1636 * on this port.
1637 *
1638 * LOCKING: host_set lock, or some other form of
1639 * serialization.
1da177e4
LT		 1640 */
1641
1642void ata_port_disable(struct ata_port *ap)
1643{
1644 ap->device[0].class = ATA_DEV_NONE;
1645 ap->device[1].class = ATA_DEV_NONE;
198e0fed 1646 ap->flags |= ATA_FLAG_DISABLED;
1da177e4
LT		 1647}
1648
1c3fae4d 1649/**
3c567b7d 1650 * sata_down_spd_limit - adjust SATA spd limit downward
1c3fae4d
TH		 1651 * @ap: Port to adjust SATA spd limit for
1652 *
1653 * Adjust SATA spd limit of @ap downward. Note that this
1654 * function only adjusts the limit. The change must be applied
3c567b7d 1655 * using sata_set_spd().
1c3fae4d
TH		 1656 *
1657 * LOCKING:
1658 * Inherited from caller.
1659 *
1660 * RETURNS:
1661 * 0 on success, negative errno on failure
1662 */
3c567b7d 1663int sata_down_spd_limit(struct ata_port *ap)
1c3fae4d
TH		 1664{
1665 u32 spd, mask;
1666 int highbit;
1667
1668 if (ap->cbl != ATA_CBL_SATA || !ap->ops->scr_read)
1669 return -EOPNOTSUPP;
1670
1671 mask = ap->sata_spd_limit;
1672 if (mask <= 1)
1673 return -EINVAL;
1674 highbit = fls(mask) - 1;
1675 mask &= ~(1 << highbit);
1676
1677 spd = (scr_read(ap, SCR_STATUS) >> 4) & 0xf;
1678 if (spd <= 1)
1679 return -EINVAL;
1680 spd--;
1681 mask &= (1 << spd) - 1;
1682 if (!mask)
1683 return -EINVAL;
1684
1685 ap->sata_spd_limit = mask;
1686
1687 printk(KERN_WARNING "ata%u: limiting SATA link speed to %s\n",
1688 ap->id, sata_spd_string(fls(mask)));
1689
1690 return 0;
1691}
1692
3c567b7d 1693static int __sata_set_spd_needed(struct ata_port *ap, u32 *scontrol)
1c3fae4d
TH		 1694{
1695 u32 spd, limit;
1696
1697 if (ap->sata_spd_limit == UINT_MAX)
1698 limit = 0;
1699 else
1700 limit = fls(ap->sata_spd_limit);
1701
1702 spd = (*scontrol >> 4) & 0xf;
1703 *scontrol = (*scontrol & ~0xf0) | ((limit & 0xf) << 4);
1704
1705 return spd != limit;
1706}
1707
1708/**
3c567b7d 1709 * sata_set_spd_needed - is SATA spd configuration needed
1c3fae4d
TH		 1710 * @ap: Port in question
1711 *
1712 * Test whether the spd limit in SControl matches
1713 * @ap->sata_spd_limit. This function is used to determine
1714 * whether hardreset is necessary to apply SATA spd
1715 * configuration.
1716 *
1717 * LOCKING:
1718 * Inherited from caller.
1719 *
1720 * RETURNS:
1721 * 1 if SATA spd configuration is needed, 0 otherwise.
1722 */
3c567b7d 1723int sata_set_spd_needed(struct ata_port *ap)
1c3fae4d
TH		 1724{
1725 u32 scontrol;
1726
1727 if (ap->cbl != ATA_CBL_SATA || !ap->ops->scr_read)
1728 return 0;
1729
1730 scontrol = scr_read(ap, SCR_CONTROL);
1731
3c567b7d 1732 return __sata_set_spd_needed(ap, &scontrol);
1c3fae4d
TH		 1733}
1734
1735/**
3c567b7d 1736 * sata_set_spd - set SATA spd according to spd limit
1c3fae4d
TH		 1737 * @ap: Port to set SATA spd for
1738 *
1739 * Set SATA spd of @ap according to sata_spd_limit.
1740 *
1741 * LOCKING:
1742 * Inherited from caller.
1743 *
1744 * RETURNS:
1745 * 0 if spd doesn't need to be changed, 1 if spd has been
1746 * changed. -EOPNOTSUPP if SCR registers are inaccessible.
1747 */
3c567b7d 1748int sata_set_spd(struct ata_port *ap)
1c3fae4d
TH		 1749{
1750 u32 scontrol;
1751
1752 if (ap->cbl != ATA_CBL_SATA || !ap->ops->scr_read)
1753 return -EOPNOTSUPP;
1754
1755 scontrol = scr_read(ap, SCR_CONTROL);
3c567b7d 1756 if (!__sata_set_spd_needed(ap, &scontrol))
1c3fae4d
TH		 1757 return 0;
1758
1759 scr_write(ap, SCR_CONTROL, scontrol);
1760 return 1;
1761}
1762
452503f9
AC		 1763/*
1764 * This mode timing computation functionality is ported over from
1765 * drivers/ide/ide-timing.h and was originally written by Vojtech Pavlik
1766 */
1767/*
1768 * PIO 0-5, MWDMA 0-2 and UDMA 0-6 timings (in nanoseconds).
1769 * These were taken from ATA/ATAPI-6 standard, rev 0a, except
1770 * for PIO 5, which is a nonstandard extension and UDMA6, which
2e9edbf8 1771 * is currently supported only by Maxtor drives.
452503f9
AC		 1772 */
1773
1774static const struct ata_timing ata_timing[] = {
1775
1776 { XFER_UDMA_6, 0, 0, 0, 0, 0, 0, 0, 15 },
1777 { XFER_UDMA_5, 0, 0, 0, 0, 0, 0, 0, 20 },
1778 { XFER_UDMA_4, 0, 0, 0, 0, 0, 0, 0, 30 },
1779 { XFER_UDMA_3, 0, 0, 0, 0, 0, 0, 0, 45 },
1780
1781 { XFER_UDMA_2, 0, 0, 0, 0, 0, 0, 0, 60 },
1782 { XFER_UDMA_1, 0, 0, 0, 0, 0, 0, 0, 80 },
1783 { XFER_UDMA_0, 0, 0, 0, 0, 0, 0, 0, 120 },
1784
1785/* { XFER_UDMA_SLOW, 0, 0, 0, 0, 0, 0, 0, 150 }, */
2e9edbf8 1786
452503f9
AC		 1787 { XFER_MW_DMA_2, 25, 0, 0, 0, 70, 25, 120, 0 },
1788 { XFER_MW_DMA_1, 45, 0, 0, 0, 80, 50, 150, 0 },
1789 { XFER_MW_DMA_0, 60, 0, 0, 0, 215, 215, 480, 0 },
2e9edbf8 1790
452503f9
AC		 1791 { XFER_SW_DMA_2, 60, 0, 0, 0, 120, 120, 240, 0 },
1792 { XFER_SW_DMA_1, 90, 0, 0, 0, 240, 240, 480, 0 },
1793 { XFER_SW_DMA_0, 120, 0, 0, 0, 480, 480, 960, 0 },
1794
1795/* { XFER_PIO_5, 20, 50, 30, 100, 50, 30, 100, 0 }, */
1796 { XFER_PIO_4, 25, 70, 25, 120, 70, 25, 120, 0 },
1797 { XFER_PIO_3, 30, 80, 70, 180, 80, 70, 180, 0 },
1798
1799 { XFER_PIO_2, 30, 290, 40, 330, 100, 90, 240, 0 },
1800 { XFER_PIO_1, 50, 290, 93, 383, 125, 100, 383, 0 },
1801 { XFER_PIO_0, 70, 290, 240, 600, 165, 150, 600, 0 },
1802
1803/* { XFER_PIO_SLOW, 120, 290, 240, 960, 290, 240, 960, 0 }, */
1804
1805 { 0xFF }
1806};
1807
1808#define ENOUGH(v,unit) (((v)-1)/(unit)+1)
1809#define EZ(v,unit) ((v)?ENOUGH(v,unit):0)
1810
1811static void ata_timing_quantize(const struct ata_timing *t, struct ata_timing *q, int T, int UT)
1812{
1813 q->setup = EZ(t->setup * 1000, T);
1814 q->act8b = EZ(t->act8b * 1000, T);
1815 q->rec8b = EZ(t->rec8b * 1000, T);
1816 q->cyc8b = EZ(t->cyc8b * 1000, T);
1817 q->active = EZ(t->active * 1000, T);
1818 q->recover = EZ(t->recover * 1000, T);
1819 q->cycle = EZ(t->cycle * 1000, T);
1820 q->udma = EZ(t->udma * 1000, UT);
1821}
1822
1823void ata_timing_merge(const struct ata_timing *a, const struct ata_timing *b,
1824 struct ata_timing *m, unsigned int what)
1825{
1826 if (what & ATA_TIMING_SETUP ) m->setup = max(a->setup, b->setup);
1827 if (what & ATA_TIMING_ACT8B ) m->act8b = max(a->act8b, b->act8b);
1828 if (what & ATA_TIMING_REC8B ) m->rec8b = max(a->rec8b, b->rec8b);
1829 if (what & ATA_TIMING_CYC8B ) m->cyc8b = max(a->cyc8b, b->cyc8b);
1830 if (what & ATA_TIMING_ACTIVE ) m->active = max(a->active, b->active);
1831 if (what & ATA_TIMING_RECOVER) m->recover = max(a->recover, b->recover);
1832 if (what & ATA_TIMING_CYCLE ) m->cycle = max(a->cycle, b->cycle);
1833 if (what & ATA_TIMING_UDMA ) m->udma = max(a->udma, b->udma);
1834}
1835
1836static const struct ata_timing* ata_timing_find_mode(unsigned short speed)
1837{
1838 const struct ata_timing *t;
1839
1840 for (t = ata_timing; t->mode != speed; t++)
91190758 1841 if (t->mode == 0xFF)
452503f9 1842 return NULL;
2e9edbf8 1843 return t;
452503f9
AC		 1844}
1845
1846int ata_timing_compute(struct ata_device *adev, unsigned short speed,
1847 struct ata_timing *t, int T, int UT)
1848{
1849 const struct ata_timing *s;
1850 struct ata_timing p;
1851
1852 /*
2e9edbf8 1853 * Find the mode.
75b1f2f8 1854 */
452503f9
AC		 1855
1856 if (!(s = ata_timing_find_mode(speed)))
1857 return -EINVAL;
1858
75b1f2f8
AL		 1859 memcpy(t, s, sizeof(*s));
1860
452503f9
AC		 1861 /*
1862 * If the drive is an EIDE drive, it can tell us it needs extended
1863 * PIO/MW_DMA cycle timing.
1864 */
1865
1866 if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE drive */
1867 memset(&p, 0, sizeof(p));
1868 if(speed >= XFER_PIO_0 && speed <= XFER_SW_DMA_0) {
1869 if (speed <= XFER_PIO_2) p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO];
1870 else p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO_IORDY];
1871 } else if(speed >= XFER_MW_DMA_0 && speed <= XFER_MW_DMA_2) {
1872 p.cycle = adev->id[ATA_ID_EIDE_DMA_MIN];
1873 }
1874 ata_timing_merge(&p, t, t, ATA_TIMING_CYCLE | ATA_TIMING_CYC8B);
1875 }
1876
1877 /*
1878 * Convert the timing to bus clock counts.
1879 */
1880
75b1f2f8 1881 ata_timing_quantize(t, t, T, UT);
452503f9
AC		 1882
1883 /*
c893a3ae
RD		 1884 * Even in DMA/UDMA modes we still use PIO access for IDENTIFY,
1885 * S.M.A.R.T * and some other commands. We have to ensure that the
1886 * DMA cycle timing is slower/equal than the fastest PIO timing.
452503f9
AC		 1887 */
1888
1889 if (speed > XFER_PIO_4) {
1890 ata_timing_compute(adev, adev->pio_mode, &p, T, UT);
1891 ata_timing_merge(&p, t, t, ATA_TIMING_ALL);
1892 }
1893
1894 /*
c893a3ae 1895 * Lengthen active & recovery time so that cycle time is correct.
452503f9
AC		 1896 */
1897
1898 if (t->act8b + t->rec8b < t->cyc8b) {
1899 t->act8b += (t->cyc8b - (t->act8b + t->rec8b)) / 2;
1900 t->rec8b = t->cyc8b - t->act8b;
1901 }
1902
1903 if (t->active + t->recover < t->cycle) {
1904 t->active += (t->cycle - (t->active + t->recover)) / 2;
1905 t->recover = t->cycle - t->active;
1906 }
1907
1908 return 0;
1909}
1910
cf176e1a
TH		 1911/**
1912 * ata_down_xfermask_limit - adjust dev xfer masks downward
1913 * @ap: Port associated with device @dev
1914 * @dev: Device to adjust xfer masks
1915 * @force_pio0: Force PIO0
1916 *
1917 * Adjust xfer masks of @dev downward. Note that this function
1918 * does not apply the change. Invoking ata_set_mode() afterwards
1919 * will apply the limit.
1920 *
1921 * LOCKING:
1922 * Inherited from caller.
1923 *
1924 * RETURNS:
1925 * 0 on success, negative errno on failure
1926 */
1ad8e7f9
TH		 1927int ata_down_xfermask_limit(struct ata_port *ap, struct ata_device *dev,
1928 int force_pio0)
cf176e1a
TH		 1929{
1930 unsigned long xfer_mask;
1931 int highbit;
1932
1933 xfer_mask = ata_pack_xfermask(dev->pio_mask, dev->mwdma_mask,
1934 dev->udma_mask);
1935
1936 if (!xfer_mask)
1937 goto fail;
1938 /* don't gear down to MWDMA from UDMA, go directly to PIO */
1939 if (xfer_mask & ATA_MASK_UDMA)
1940 xfer_mask &= ~ATA_MASK_MWDMA;
1941
1942 highbit = fls(xfer_mask) - 1;
1943 xfer_mask &= ~(1 << highbit);
1944 if (force_pio0)
1945 xfer_mask &= 1 << ATA_SHIFT_PIO;
1946 if (!xfer_mask)
1947 goto fail;
1948
1949 ata_unpack_xfermask(xfer_mask, &dev->pio_mask, &dev->mwdma_mask,
1950 &dev->udma_mask);
1951
1952 printk(KERN_WARNING "ata%u: dev %u limiting speed to %s\n",
1953 ap->id, dev->devno, ata_mode_string(xfer_mask));
1954
1955 return 0;
1956
1957 fail:
1958 return -EINVAL;
1959}
1960
83206a29 1961static int ata_dev_set_mode(struct ata_port *ap, struct ata_device *dev)
1da177e4 1962{
83206a29
TH		 1963 unsigned int err_mask;
1964 int rc;
1da177e4 1965
e8384607 1966 dev->flags &= ~ATA_DFLAG_PIO;
1da177e4
LT		 1967 if (dev->xfer_shift == ATA_SHIFT_PIO)
1968 dev->flags |= ATA_DFLAG_PIO;
1969
83206a29
TH		 1970 err_mask = ata_dev_set_xfermode(ap, dev);
1971 if (err_mask) {
1972 printk(KERN_ERR
1973 "ata%u: failed to set xfermode (err_mask=0x%x)\n",
1974 ap->id, err_mask);
1975 return -EIO;
1976 }
1da177e4 1977
83206a29 1978 rc = ata_dev_revalidate(ap, dev, 0);
5eb45c02 1979 if (rc)
83206a29 1980 return rc;
48a8a14f 1981
23e71c3d
TH		 1982 DPRINTK("xfer_shift=%u, xfer_mode=0x%x\n",
1983 dev->xfer_shift, (int)dev->xfer_mode);
1da177e4
LT		 1984
1985 printk(KERN_INFO "ata%u: dev %u configured for %s\n",
23e71c3d
TH		 1986 ap->id, dev->devno,
1987 ata_mode_string(ata_xfer_mode2mask(dev->xfer_mode)));
83206a29 1988 return 0;
1da177e4
LT		 1989}
1990
1da177e4
LT		 1991/**
1992 * ata_set_mode - Program timings and issue SET FEATURES - XFER
1993 * @ap: port on which timings will be programmed
e82cbdb9 1994 * @r_failed_dev: out paramter for failed device
1da177e4 1995 *
e82cbdb9
TH		 1996 * Set ATA device disk transfer mode (PIO3, UDMA6, etc.). If
1997 * ata_set_mode() fails, pointer to the failing device is
1998 * returned in @r_failed_dev.
780a87f7 1999 *
1da177e4 2000 * LOCKING:
0cba632b 2001 * PCI/etc. bus probe sem.
e82cbdb9
TH		 2002 *
2003 * RETURNS:
2004 * 0 on success, negative errno otherwise
1da177e4 2005 */
1ad8e7f9 2006int ata_set_mode(struct ata_port *ap, struct ata_device **r_failed_dev)
1da177e4 2007{
e8e0619f 2008 struct ata_device *dev;
e82cbdb9 2009 int i, rc = 0, used_dma = 0, found = 0;
1da177e4 2010
a6d5a51c
TH		 2011 /* step 1: calculate xfer_mask */
2012 for (i = 0; i < ATA_MAX_DEVICES; i++) {
acf356b1 2013 unsigned int pio_mask, dma_mask;
a6d5a51c 2014
e8e0619f
TH		 2015 dev = &ap->device[i];
2016
e1211e3f 2017 if (!ata_dev_enabled(dev))
a6d5a51c
TH		 2018 continue;
2019
acf356b1 2020 ata_dev_xfermask(ap, dev);
1da177e4 2021
acf356b1
TH		 2022 pio_mask = ata_pack_xfermask(dev->pio_mask, 0, 0);
2023 dma_mask = ata_pack_xfermask(0, dev->mwdma_mask, dev->udma_mask);
2024 dev->pio_mode = ata_xfer_mask2mode(pio_mask);
2025 dev->dma_mode = ata_xfer_mask2mode(dma_mask);
5444a6f4 2026
4f65977d 2027 found = 1;
5444a6f4
AC		 2028 if (dev->dma_mode)
2029 used_dma = 1;
a6d5a51c 2030 }
4f65977d 2031 if (!found)
e82cbdb9 2032 goto out;
a6d5a51c
TH		 2033
2034 /* step 2: always set host PIO timings */
e8e0619f
TH		 2035 for (i = 0; i < ATA_MAX_DEVICES; i++) {
2036 dev = &ap->device[i];
2037 if (!ata_dev_enabled(dev))
2038 continue;
2039
2040 if (!dev->pio_mode) {
2041 printk(KERN_WARNING "ata%u: dev %u no PIO support\n",
2042 ap->id, dev->devno);
2043 rc = -EINVAL;
e82cbdb9 2044 goto out;
e8e0619f
TH		 2045 }
2046
2047 dev->xfer_mode = dev->pio_mode;
2048 dev->xfer_shift = ATA_SHIFT_PIO;
2049 if (ap->ops->set_piomode)
2050 ap->ops->set_piomode(ap, dev);
2051 }
1da177e4 2052
a6d5a51c 2053 /* step 3: set host DMA timings */
e8e0619f
TH		 2054 for (i = 0; i < ATA_MAX_DEVICES; i++) {
2055 dev = &ap->device[i];
2056
2057 if (!ata_dev_enabled(dev) || !dev->dma_mode)
2058 continue;
2059
2060 dev->xfer_mode = dev->dma_mode;
2061 dev->xfer_shift = ata_xfer_mode2shift(dev->dma_mode);
2062 if (ap->ops->set_dmamode)
2063 ap->ops->set_dmamode(ap, dev);
2064 }
1da177e4
LT		 2065
2066 /* step 4: update devices' xfer mode */
83206a29 2067 for (i = 0; i < ATA_MAX_DEVICES; i++) {
e8e0619f 2068 dev = &ap->device[i];
1da177e4 2069
e1211e3f 2070 if (!ata_dev_enabled(dev))
83206a29
TH		 2071 continue;
2072
5bbc53f4
TH		 2073 rc = ata_dev_set_mode(ap, dev);
2074 if (rc)
e82cbdb9 2075 goto out;
83206a29 2076 }
1da177e4 2077
e8e0619f
TH		 2078 /* Record simplex status. If we selected DMA then the other
2079 * host channels are not permitted to do so.
5444a6f4 2080 */
5444a6f4
AC		 2081 if (used_dma && (ap->host_set->flags & ATA_HOST_SIMPLEX))
2082 ap->host_set->simplex_claimed = 1;
2083
e8e0619f 2084 /* step5: chip specific finalisation */
1da177e4
LT		 2085 if (ap->ops->post_set_mode)
2086 ap->ops->post_set_mode(ap);
2087
e82cbdb9
TH		 2088 out:
2089 if (rc)
2090 *r_failed_dev = dev;
2091 return rc;
1da177e4
LT		 2092}
2093
1fdffbce
JG		 2094/**
2095 * ata_tf_to_host - issue ATA taskfile to host controller
2096 * @ap: port to which command is being issued
2097 * @tf: ATA taskfile register set
2098 *
2099 * Issues ATA taskfile register set to ATA host controller,
2100 * with proper synchronization with interrupt handler and
2101 * other threads.
2102 *
2103 * LOCKING:
2104 * spin_lock_irqsave(host_set lock)
2105 */
2106
2107static inline void ata_tf_to_host(struct ata_port *ap,
2108 const struct ata_taskfile *tf)
2109{
2110 ap->ops->tf_load(ap, tf);
2111 ap->ops->exec_command(ap, tf);
2112}
2113
1da177e4
LT		 2114/**
2115 * ata_busy_sleep - sleep until BSY clears, or timeout
2116 * @ap: port containing status register to be polled
2117 * @tmout_pat: impatience timeout
2118 * @tmout: overall timeout
2119 *
780a87f7
JG		 2120 * Sleep until ATA Status register bit BSY clears,
2121 * or a timeout occurs.
2122 *
2123 * LOCKING: None.
1da177e4
LT		 2124 */
2125
6f8b9958
TH		 2126unsigned int ata_busy_sleep (struct ata_port *ap,
2127 unsigned long tmout_pat, unsigned long tmout)
1da177e4
LT		 2128{
2129 unsigned long timer_start, timeout;
2130 u8 status;
2131
2132 status = ata_busy_wait(ap, ATA_BUSY, 300);
2133 timer_start = jiffies;
2134 timeout = timer_start + tmout_pat;
2135 while ((status & ATA_BUSY) && (time_before(jiffies, timeout))) {
2136 msleep(50);
2137 status = ata_busy_wait(ap, ATA_BUSY, 3);
2138 }
2139
2140 if (status & ATA_BUSY)
2141 printk(KERN_WARNING "ata%u is slow to respond, "
2142 "please be patient\n", ap->id);
2143
2144 timeout = timer_start + tmout;
2145 while ((status & ATA_BUSY) && (time_before(jiffies, timeout))) {
2146 msleep(50);
2147 status = ata_chk_status(ap);
2148 }
2149
2150 if (status & ATA_BUSY) {
2151 printk(KERN_ERR "ata%u failed to respond (%lu secs)\n",
2152 ap->id, tmout / HZ);
2153 return 1;
2154 }
2155
2156 return 0;
2157}
2158
2159static void ata_bus_post_reset(struct ata_port *ap, unsigned int devmask)
2160{
2161 struct ata_ioports *ioaddr = &ap->ioaddr;
2162 unsigned int dev0 = devmask & (1 << 0);
2163 unsigned int dev1 = devmask & (1 << 1);
2164 unsigned long timeout;
2165
2166 /* if device 0 was found in ata_devchk, wait for its
2167 * BSY bit to clear
2168 */
2169 if (dev0)
2170 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
2171
2172 /* if device 1 was found in ata_devchk, wait for
2173 * register access, then wait for BSY to clear
2174 */
2175 timeout = jiffies + ATA_TMOUT_BOOT;
2176 while (dev1) {
2177 u8 nsect, lbal;
2178
2179 ap->ops->dev_select(ap, 1);
2180 if (ap->flags & ATA_FLAG_MMIO) {
2181 nsect = readb((void __iomem *) ioaddr->nsect_addr);
2182 lbal = readb((void __iomem *) ioaddr->lbal_addr);
2183 } else {
2184 nsect = inb(ioaddr->nsect_addr);
2185 lbal = inb(ioaddr->lbal_addr);
2186 }
2187 if ((nsect == 1) && (lbal == 1))
2188 break;
2189 if (time_after(jiffies, timeout)) {
2190 dev1 = 0;
2191 break;
2192 }
2193 msleep(50); /* give drive a breather */
2194 }
2195 if (dev1)
2196 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
2197
2198 /* is all this really necessary? */
2199 ap->ops->dev_select(ap, 0);
2200 if (dev1)
2201 ap->ops->dev_select(ap, 1);
2202 if (dev0)
2203 ap->ops->dev_select(ap, 0);
2204}
2205
1da177e4
LT		 2206static unsigned int ata_bus_softreset(struct ata_port *ap,
2207 unsigned int devmask)
2208{
2209 struct ata_ioports *ioaddr = &ap->ioaddr;
2210
2211 DPRINTK("ata%u: bus reset via SRST\n", ap->id);
2212
2213 /* software reset. causes dev0 to be selected */
2214 if (ap->flags & ATA_FLAG_MMIO) {
2215 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
2216 udelay(20); /* FIXME: flush */
2217 writeb(ap->ctl | ATA_SRST, (void __iomem *) ioaddr->ctl_addr);
2218 udelay(20); /* FIXME: flush */
2219 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
2220 } else {
2221 outb(ap->ctl, ioaddr->ctl_addr);
2222 udelay(10);
2223 outb(ap->ctl | ATA_SRST, ioaddr->ctl_addr);
2224 udelay(10);
2225 outb(ap->ctl, ioaddr->ctl_addr);
2226 }
2227
2228 /* spec mandates ">= 2ms" before checking status.
2229 * We wait 150ms, because that was the magic delay used for
2230 * ATAPI devices in Hale Landis's ATADRVR, for the period of time
2231 * between when the ATA command register is written, and then
2232 * status is checked. Because waiting for "a while" before
2233 * checking status is fine, post SRST, we perform this magic
2234 * delay here as well.
09c7ad79
AC		 2235 *
2236 * Old drivers/ide uses the 2mS rule and then waits for ready
1da177e4
LT		 2237 */
2238 msleep(150);
2239
2e9edbf8 2240 /* Before we perform post reset processing we want to see if
298a41ca
TH		 2241 * the bus shows 0xFF because the odd clown forgets the D7
2242 * pulldown resistor.
2243 */
987d2f05
TH		 2244 if (ata_check_status(ap) == 0xFF) {
2245 printk(KERN_ERR "ata%u: SRST failed (status 0xFF)\n", ap->id);
298a41ca 2246 return AC_ERR_OTHER;
987d2f05 2247 }
09c7ad79 2248
1da177e4
LT		 2249 ata_bus_post_reset(ap, devmask);
2250
2251 return 0;
2252}
2253
2254/**
2255 * ata_bus_reset - reset host port and associated ATA channel
2256 * @ap: port to reset
2257 *
2258 * This is typically the first time we actually start issuing
2259 * commands to the ATA channel. We wait for BSY to clear, then
2260 * issue EXECUTE DEVICE DIAGNOSTIC command, polling for its
2261 * result. Determine what devices, if any, are on the channel
2262 * by looking at the device 0/1 error register. Look at the signature
2263 * stored in each device's taskfile registers, to determine if
2264 * the device is ATA or ATAPI.
2265 *
2266 * LOCKING:
0cba632b
JG		 2267 * PCI/etc. bus probe sem.
2268 * Obtains host_set lock.
1da177e4
LT		 2269 *
2270 * SIDE EFFECTS:
198e0fed 2271 * Sets ATA_FLAG_DISABLED if bus reset fails.
1da177e4
LT		 2272 */
2273
2274void ata_bus_reset(struct ata_port *ap)
2275{
2276 struct ata_ioports *ioaddr = &ap->ioaddr;
2277 unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
2278 u8 err;
aec5c3c1 2279 unsigned int dev0, dev1 = 0, devmask = 0;
1da177e4
LT		 2280
2281 DPRINTK("ENTER, host %u, port %u\n", ap->id, ap->port_no);
2282
2283 /* determine if device 0/1 are present */
2284 if (ap->flags & ATA_FLAG_SATA_RESET)
2285 dev0 = 1;
2286 else {
2287 dev0 = ata_devchk(ap, 0);
2288 if (slave_possible)
2289 dev1 = ata_devchk(ap, 1);
2290 }
2291
2292 if (dev0)
2293 devmask |= (1 << 0);
2294 if (dev1)
2295 devmask |= (1 << 1);
2296
2297 /* select device 0 again */
2298 ap->ops->dev_select(ap, 0);
2299
2300 /* issue bus reset */
2301 if (ap->flags & ATA_FLAG_SRST)
aec5c3c1
TH		 2302 if (ata_bus_softreset(ap, devmask))
2303 goto err_out;
1da177e4
LT		 2304
2305 /*
2306 * determine by signature whether we have ATA or ATAPI devices
2307 */
b4dc7623 2308 ap->device[0].class = ata_dev_try_classify(ap, 0, &err);
1da177e4 2309 if ((slave_possible) && (err != 0x81))
b4dc7623 2310 ap->device[1].class = ata_dev_try_classify(ap, 1, &err);
1da177e4
LT		 2311
2312 /* re-enable interrupts */
2313 if (ap->ioaddr.ctl_addr) /* FIXME: hack. create a hook instead */
2314 ata_irq_on(ap);
2315
2316 /* is double-select really necessary? */
2317 if (ap->device[1].class != ATA_DEV_NONE)
2318 ap->ops->dev_select(ap, 1);
2319 if (ap->device[0].class != ATA_DEV_NONE)
2320 ap->ops->dev_select(ap, 0);
2321
2322 /* if no devices were detected, disable this port */
2323 if ((ap->device[0].class == ATA_DEV_NONE) &&
2324 (ap->device[1].class == ATA_DEV_NONE))
2325 goto err_out;
2326
2327 if (ap->flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST)) {
2328 /* set up device control for ATA_FLAG_SATA_RESET */
2329 if (ap->flags & ATA_FLAG_MMIO)
2330 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
2331 else
2332 outb(ap->ctl, ioaddr->ctl_addr);
2333 }
2334
2335 DPRINTK("EXIT\n");
2336 return;
2337
2338err_out:
2339 printk(KERN_ERR "ata%u: disabling port\n", ap->id);
2340 ap->ops->port_disable(ap);
2341
2342 DPRINTK("EXIT\n");
2343}
2344
7a7921e8
TH		 2345static int sata_phy_resume(struct ata_port *ap)
2346{
2347 unsigned long timeout = jiffies + (HZ * 5);
852ee16a 2348 u32 scontrol, sstatus;
7a7921e8 2349
852ee16a
TH		 2350 scontrol = scr_read(ap, SCR_CONTROL);
2351 scontrol = (scontrol & 0x0f0) | 0x300;
2352 scr_write_flush(ap, SCR_CONTROL, scontrol);
7a7921e8
TH		 2353
2354 /* Wait for phy to become ready, if necessary. */
2355 do {
2356 msleep(200);
2357 sstatus = scr_read(ap, SCR_STATUS);
2358 if ((sstatus & 0xf) != 1)
2359 return 0;
2360 } while (time_before(jiffies, timeout));
2361
2362 return -1;
2363}
2364
8a19ac89
TH		 2365/**
2366 * ata_std_probeinit - initialize probing
2367 * @ap: port to be probed
2368 *
2369 * @ap is about to be probed. Initialize it. This function is
2370 * to be used as standard callback for ata_drive_probe_reset().
3a39746a
TH		 2371 *
2372 * NOTE!!! Do not use this function as probeinit if a low level
2373 * driver implements only hardreset. Just pass NULL as probeinit
2374 * in that case. Using this function is probably okay but doing
2375 * so makes reset sequence different from the original
2376 * ->phy_reset implementation and Jeff nervous. :-P
8a19ac89 2377 */
17efc5f7 2378void ata_std_probeinit(struct ata_port *ap)
8a19ac89 2379{
17efc5f7 2380 if ((ap->flags & ATA_FLAG_SATA) && ap->ops->scr_read) {
1c3fae4d
TH		 2381 u32 spd;
2382
db70fef0
TH		 2383 /* set cable type and resume link */
2384 ap->cbl = ATA_CBL_SATA;
8a19ac89 2385 sata_phy_resume(ap);
1c3fae4d 2386
db70fef0 2387 /* init sata_spd_limit to the current value */
1c3fae4d
TH		 2388 spd = (scr_read(ap, SCR_CONTROL) & 0xf0) >> 4;
2389 if (spd)
2390 ap->sata_spd_limit &= (1 << spd) - 1;
2391
db70fef0 2392 /* wait for device */
3a39746a
TH		 2393 if (sata_dev_present(ap))
2394 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
2395 }
8a19ac89
TH		 2396}
2397
c2bd5804
TH		 2398/**
2399 * ata_std_softreset - reset host port via ATA SRST
2400 * @ap: port to reset
c2bd5804
TH		 2401 * @classes: resulting classes of attached devices
2402 *
2403 * Reset host port using ATA SRST. This function is to be used
2404 * as standard callback for ata_drive_*_reset() functions.
2405 *
2406 * LOCKING:
2407 * Kernel thread context (may sleep)
2408 *
2409 * RETURNS:
2410 * 0 on success, -errno otherwise.
2411 */
2bf2cb26 2412int ata_std_softreset(struct ata_port *ap, unsigned int *classes)
c2bd5804
TH		 2413{
2414 unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
2415 unsigned int devmask = 0, err_mask;
2416 u8 err;
2417
2418 DPRINTK("ENTER\n");
2419
3a39746a
TH		 2420 if (ap->ops->scr_read && !sata_dev_present(ap)) {
2421 classes[0] = ATA_DEV_NONE;
2422 goto out;
2423 }
2424
c2bd5804
TH		 2425 /* determine if device 0/1 are present */
2426 if (ata_devchk(ap, 0))
2427 devmask |= (1 << 0);
2428 if (slave_possible && ata_devchk(ap, 1))
2429 devmask |= (1 << 1);
2430
c2bd5804
TH		 2431 /* select device 0 again */
2432 ap->ops->dev_select(ap, 0);
2433
2434 /* issue bus reset */
2435 DPRINTK("about to softreset, devmask=%x\n", devmask);
2436 err_mask = ata_bus_softreset(ap, devmask);
2437 if (err_mask) {
2bf2cb26
TH		 2438 printk(KERN_ERR "ata%u: SRST failed (err_mask=0x%x)\n",
2439 ap->id, err_mask);
c2bd5804
TH		 2440 return -EIO;
2441 }
2442
2443 /* determine by signature whether we have ATA or ATAPI devices */
2444 classes[0] = ata_dev_try_classify(ap, 0, &err);
2445 if (slave_possible && err != 0x81)
2446 classes[1] = ata_dev_try_classify(ap, 1, &err);
2447
3a39746a 2448 out:
c2bd5804
TH		 2449 DPRINTK("EXIT, classes[0]=%u [1]=%u\n", classes[0], classes[1]);
2450 return 0;
2451}
2452
2453/**
2454 * sata_std_hardreset - reset host port via SATA phy reset
2455 * @ap: port to reset
c2bd5804
TH		 2456 * @class: resulting class of attached device
2457 *
2458 * SATA phy-reset host port using DET bits of SControl register.
2459 * This function is to be used as standard callback for
2460 * ata_drive_*_reset().
2461 *
2462 * LOCKING:
2463 * Kernel thread context (may sleep)
2464 *
2465 * RETURNS:
2466 * 0 on success, -errno otherwise.
2467 */
2bf2cb26 2468int sata_std_hardreset(struct ata_port *ap, unsigned int *class)
c2bd5804 2469{
852ee16a
TH		 2470 u32 scontrol;
2471
c2bd5804
TH		 2472 DPRINTK("ENTER\n");
2473
3c567b7d 2474 if (sata_set_spd_needed(ap)) {
1c3fae4d
TH		 2475 /* SATA spec says nothing about how to reconfigure
2476 * spd. To be on the safe side, turn off phy during
2477 * reconfiguration. This works for at least ICH7 AHCI
2478 * and Sil3124.
2479 */
2480 scontrol = scr_read(ap, SCR_CONTROL);
2481 scontrol = (scontrol & 0x0f0) | 0x302;
2482 scr_write_flush(ap, SCR_CONTROL, scontrol);
2483
3c567b7d 2484 sata_set_spd(ap);
1c3fae4d
TH		 2485 }
2486
2487 /* issue phy wake/reset */
852ee16a
TH		 2488 scontrol = scr_read(ap, SCR_CONTROL);
2489 scontrol = (scontrol & 0x0f0) | 0x301;
2490 scr_write_flush(ap, SCR_CONTROL, scontrol);
c2bd5804 2491
1c3fae4d 2492 /* Couldn't find anything in SATA I/II specs, but AHCI-1.1
c2bd5804
TH		 2493 * 10.4.2 says at least 1 ms.
2494 */
2495 msleep(1);
2496
1c3fae4d 2497 /* bring phy back */
7a7921e8 2498 sata_phy_resume(ap);
c2bd5804 2499
c2bd5804
TH		 2500 /* TODO: phy layer with polling, timeouts, etc. */
2501 if (!sata_dev_present(ap)) {
2502 *class = ATA_DEV_NONE;
2503 DPRINTK("EXIT, link offline\n");
2504 return 0;
2505 }
2506
2507 if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) {
987d2f05
TH		 2508 printk(KERN_ERR
2509 "ata%u: COMRESET failed (device not ready)\n", ap->id);
c2bd5804
TH		 2510 return -EIO;
2511 }
2512
3a39746a
TH		 2513 ap->ops->dev_select(ap, 0); /* probably unnecessary */
2514
c2bd5804
TH		 2515 *class = ata_dev_try_classify(ap, 0, NULL);
2516
2517 DPRINTK("EXIT, class=%u\n", *class);
2518 return 0;
2519}
2520
2521/**
2522 * ata_std_postreset - standard postreset callback
2523 * @ap: the target ata_port
2524 * @classes: classes of attached devices
2525 *
2526 * This function is invoked after a successful reset. Note that
2527 * the device might have been reset more than once using
2528 * different reset methods before postreset is invoked.
c2bd5804
TH		 2529 *
2530 * This function is to be used as standard callback for
2531 * ata_drive_*_reset().
2532 *
2533 * LOCKING:
2534 * Kernel thread context (may sleep)
2535 */
2536void ata_std_postreset(struct ata_port *ap, unsigned int *classes)
2537{
2538 DPRINTK("ENTER\n");
2539
c2bd5804
TH		 2540 /* print link status */
2541 if (ap->cbl == ATA_CBL_SATA)
2542 sata_print_link_status(ap);
2543
3a39746a
TH		 2544 /* re-enable interrupts */
2545 if (ap->ioaddr.ctl_addr) /* FIXME: hack. create a hook instead */
2546 ata_irq_on(ap);
c2bd5804
TH		 2547
2548 /* is double-select really necessary? */
2549 if (classes[0] != ATA_DEV_NONE)
2550 ap->ops->dev_select(ap, 1);
2551 if (classes[1] != ATA_DEV_NONE)
2552 ap->ops->dev_select(ap, 0);
2553
3a39746a
TH		 2554 /* bail out if no device is present */
2555 if (classes[0] == ATA_DEV_NONE && classes[1] == ATA_DEV_NONE) {
2556 DPRINTK("EXIT, no device\n");
2557 return;
2558 }
2559
2560 /* set up device control */
2561 if (ap->ioaddr.ctl_addr) {
2562 if (ap->flags & ATA_FLAG_MMIO)
2563 writeb(ap->ctl, (void __iomem *) ap->ioaddr.ctl_addr);
2564 else
2565 outb(ap->ctl, ap->ioaddr.ctl_addr);
2566 }
c2bd5804
TH		 2567
2568 DPRINTK("EXIT\n");
2569}
2570
2571/**
2572 * ata_std_probe_reset - standard probe reset method
2573 * @ap: prot to perform probe-reset
2574 * @classes: resulting classes of attached devices
2575 *
2576 * The stock off-the-shelf ->probe_reset method.
2577 *
2578 * LOCKING:
2579 * Kernel thread context (may sleep)
2580 *
2581 * RETURNS:
2582 * 0 on success, -errno otherwise.
2583 */
2584int ata_std_probe_reset(struct ata_port *ap, unsigned int *classes)
2585{
2586 ata_reset_fn_t hardreset;
2587
2588 hardreset = NULL;
db70fef0 2589 if (ap->cbl == ATA_CBL_SATA && ap->ops->scr_read)
c2bd5804
TH		 2590 hardreset = sata_std_hardreset;
2591
8a19ac89 2592 return ata_drive_probe_reset(ap, ata_std_probeinit,
7944ea95 2593 ata_std_softreset, hardreset,
c2bd5804
TH		 2594 ata_std_postreset, classes);
2595}
2596
2bf2cb26
TH		 2597int ata_do_reset(struct ata_port *ap, ata_reset_fn_t reset,
2598 ata_postreset_fn_t postreset, unsigned int *classes)
a62c0fc5
TH		 2599{
2600 int i, rc;
2601
2602 for (i = 0; i < ATA_MAX_DEVICES; i++)
2603 classes[i] = ATA_DEV_UNKNOWN;
2604
2bf2cb26 2605 rc = reset(ap, classes);
a62c0fc5
TH		 2606 if (rc)
2607 return rc;
2608
2609 /* If any class isn't ATA_DEV_UNKNOWN, consider classification
2610 * is complete and convert all ATA_DEV_UNKNOWN to
2611 * ATA_DEV_NONE.
2612 */
2613 for (i = 0; i < ATA_MAX_DEVICES; i++)
2614 if (classes[i] != ATA_DEV_UNKNOWN)
2615 break;
2616
2617 if (i < ATA_MAX_DEVICES)
2618 for (i = 0; i < ATA_MAX_DEVICES; i++)
2619 if (classes[i] == ATA_DEV_UNKNOWN)
2620 classes[i] = ATA_DEV_NONE;
2621
2622 if (postreset)
2623 postreset(ap, classes);
2624
9974e7cc 2625 return 0;
a62c0fc5
TH		 2626}
2627
2628/**
2629 * ata_drive_probe_reset - Perform probe reset with given methods
2630 * @ap: port to reset
7944ea95 2631 * @probeinit: probeinit method (can be NULL)
a62c0fc5
TH		 2632 * @softreset: softreset method (can be NULL)
2633 * @hardreset: hardreset method (can be NULL)
2634 * @postreset: postreset method (can be NULL)
2635 * @classes: resulting classes of attached devices
2636 *
2637 * Reset the specified port and classify attached devices using
2638 * given methods. This function prefers softreset but tries all
2639 * possible reset sequences to reset and classify devices. This
2640 * function is intended to be used for constructing ->probe_reset
2641 * callback by low level drivers.
2642 *
2643 * Reset methods should follow the following rules.
2644 *
2645 * - Return 0 on sucess, -errno on failure.
2646 * - If classification is supported, fill classes[] with
2647 * recognized class codes.
2648 * - If classification is not supported, leave classes[] alone.
a62c0fc5
TH		 2649 *
2650 * LOCKING:
2651 * Kernel thread context (may sleep)
2652 *
2653 * RETURNS:
2654 * 0 on success, -EINVAL if no reset method is avaliable, -ENODEV
2655 * if classification fails, and any error code from reset
2656 * methods.
2657 */
7944ea95 2658int ata_drive_probe_reset(struct ata_port *ap, ata_probeinit_fn_t probeinit,
a62c0fc5
TH		 2659 ata_reset_fn_t softreset, ata_reset_fn_t hardreset,
2660 ata_postreset_fn_t postreset, unsigned int *classes)
2661{
2662 int rc = -EINVAL;
2663
7944ea95
TH		 2664 if (probeinit)
2665 probeinit(ap);
2666
3c567b7d 2667 if (softreset && !sata_set_spd_needed(ap)) {
2bf2cb26 2668 rc = ata_do_reset(ap, softreset, postreset, classes);
9974e7cc
TH		 2669 if (rc == 0 && classes[0] != ATA_DEV_UNKNOWN)
2670 goto done;
edbabd86
TH		 2671 printk(KERN_INFO "ata%u: softreset failed, will try "
2672 "hardreset in 5 secs\n", ap->id);
2673 ssleep(5);
a62c0fc5
TH		 2674 }
2675
2676 if (!hardreset)
9974e7cc 2677 goto done;
a62c0fc5 2678
90dac02c 2679 while (1) {
2bf2cb26 2680 rc = ata_do_reset(ap, hardreset, postreset, classes);
90dac02c
TH		 2681 if (rc == 0) {
2682 if (classes[0] != ATA_DEV_UNKNOWN)
2683 goto done;
2684 break;
2685 }
2686
3c567b7d 2687 if (sata_down_spd_limit(ap))
90dac02c 2688 goto done;
edbabd86
TH		 2689
2690 printk(KERN_INFO "ata%u: hardreset failed, will retry "
2691 "in 5 secs\n", ap->id);
2692 ssleep(5);
90dac02c 2693 }
a62c0fc5 2694
edbabd86
TH		 2695 if (softreset) {
2696 printk(KERN_INFO "ata%u: hardreset succeeded without "
2697 "classification, will retry softreset in 5 secs\n",
2698 ap->id);
2699 ssleep(5);
2700
2bf2cb26 2701 rc = ata_do_reset(ap, softreset, postreset, classes);
edbabd86 2702 }
a62c0fc5 2703
9974e7cc
TH		 2704 done:
2705 if (rc == 0 && classes[0] == ATA_DEV_UNKNOWN)
2706 rc = -ENODEV;
a62c0fc5
TH		 2707 return rc;
2708}
2709
623a3128
TH		 2710/**
2711 * ata_dev_same_device - Determine whether new ID matches configured device
2712 * @ap: port on which the device to compare against resides
2713 * @dev: device to compare against
2714 * @new_class: class of the new device
2715 * @new_id: IDENTIFY page of the new device
2716 *
2717 * Compare @new_class and @new_id against @dev and determine
2718 * whether @dev is the device indicated by @new_class and
2719 * @new_id.
2720 *
2721 * LOCKING:
2722 * None.
2723 *
2724 * RETURNS:
2725 * 1 if @dev matches @new_class and @new_id, 0 otherwise.
2726 */
2727static int ata_dev_same_device(struct ata_port *ap, struct ata_device *dev,
2728 unsigned int new_class, const u16 *new_id)
2729{
2730 const u16 *old_id = dev->id;
2731 unsigned char model[2][41], serial[2][21];
2732 u64 new_n_sectors;
2733
2734 if (dev->class != new_class) {
2735 printk(KERN_INFO
2736 "ata%u: dev %u class mismatch %d != %d\n",
2737 ap->id, dev->devno, dev->class, new_class);
2738 return 0;
2739 }
2740
2741 ata_id_c_string(old_id, model[0], ATA_ID_PROD_OFS, sizeof(model[0]));
2742 ata_id_c_string(new_id, model[1], ATA_ID_PROD_OFS, sizeof(model[1]));
2743 ata_id_c_string(old_id, serial[0], ATA_ID_SERNO_OFS, sizeof(serial[0]));
2744 ata_id_c_string(new_id, serial[1], ATA_ID_SERNO_OFS, sizeof(serial[1]));
2745 new_n_sectors = ata_id_n_sectors(new_id);
2746
2747 if (strcmp(model[0], model[1])) {
2748 printk(KERN_INFO
2749 "ata%u: dev %u model number mismatch '%s' != '%s'\n",
2750 ap->id, dev->devno, model[0], model[1]);
2751 return 0;
2752 }
2753
2754 if (strcmp(serial[0], serial[1])) {
2755 printk(KERN_INFO
2756 "ata%u: dev %u serial number mismatch '%s' != '%s'\n",
2757 ap->id, dev->devno, serial[0], serial[1]);
2758 return 0;
2759 }
2760
2761 if (dev->class == ATA_DEV_ATA && dev->n_sectors != new_n_sectors) {
2762 printk(KERN_INFO
2763 "ata%u: dev %u n_sectors mismatch %llu != %llu\n",
2764 ap->id, dev->devno, (unsigned long long)dev->n_sectors,
2765 (unsigned long long)new_n_sectors);
2766 return 0;
2767 }
2768
2769 return 1;
2770}
2771
2772/**
2773 * ata_dev_revalidate - Revalidate ATA device
2774 * @ap: port on which the device to revalidate resides
2775 * @dev: device to revalidate
2776 * @post_reset: is this revalidation after reset?
2777 *
2778 * Re-read IDENTIFY page and make sure @dev is still attached to
2779 * the port.
2780 *
2781 * LOCKING:
2782 * Kernel thread context (may sleep)
2783 *
2784 * RETURNS:
2785 * 0 on success, negative errno otherwise
2786 */
2787int ata_dev_revalidate(struct ata_port *ap, struct ata_device *dev,
2788 int post_reset)
2789{
5eb45c02
TH		 2790 unsigned int class = dev->class;
2791 u16 *id = NULL;
623a3128
TH		 2792 int rc;
2793
5eb45c02
TH		 2794 if (!ata_dev_enabled(dev)) {
2795 rc = -ENODEV;
2796 goto fail;
2797 }
623a3128
TH		 2798
2799 /* allocate & read ID data */
2800 rc = ata_dev_read_id(ap, dev, &class, post_reset, &id);
2801 if (rc)
2802 goto fail;
2803
2804 /* is the device still there? */
2805 if (!ata_dev_same_device(ap, dev, class, id)) {
2806 rc = -ENODEV;
2807 goto fail;
2808 }
2809
2810 kfree(dev->id);
2811 dev->id = id;
2812
2813 /* configure device according to the new ID */
5eb45c02
TH		 2814 rc = ata_dev_configure(ap, dev, 0);
2815 if (rc == 0)
2816 return 0;
623a3128
TH		 2817
2818 fail:
2819 printk(KERN_ERR "ata%u: dev %u revalidation failed (errno=%d)\n",
2820 ap->id, dev->devno, rc);
2821 kfree(id);
2822 return rc;
2823}
2824
98ac62de 2825static const char * const ata_dma_blacklist [] = {
f4b15fef
AC		 2826 "WDC AC11000H", NULL,
2827 "WDC AC22100H", NULL,
2828 "WDC AC32500H", NULL,
2829 "WDC AC33100H", NULL,
2830 "WDC AC31600H", NULL,
2831 "WDC AC32100H", "24.09P07",
2832 "WDC AC23200L", "21.10N21",
2833 "Compaq CRD-8241B", NULL,
2834 "CRD-8400B", NULL,
2835 "CRD-8480B", NULL,
2836 "CRD-8482B", NULL,
2837 "CRD-84", NULL,
2838 "SanDisk SDP3B", NULL,
2839 "SanDisk SDP3B-64", NULL,
2840 "SANYO CD-ROM CRD", NULL,
2841 "HITACHI CDR-8", NULL,
2e9edbf8 2842 "HITACHI CDR-8335", NULL,
f4b15fef 2843 "HITACHI CDR-8435", NULL,
2e9edbf8
JG		 2844 "Toshiba CD-ROM XM-6202B", NULL,
2845 "TOSHIBA CD-ROM XM-1702BC", NULL,
2846 "CD-532E-A", NULL,
2847 "E-IDE CD-ROM CR-840", NULL,
2848 "CD-ROM Drive/F5A", NULL,
2849 "WPI CDD-820", NULL,
f4b15fef 2850 "SAMSUNG CD-ROM SC-148C", NULL,
2e9edbf8 2851 "SAMSUNG CD-ROM SC", NULL,
f4b15fef
AC		 2852 "SanDisk SDP3B-64", NULL,
2853 "ATAPI CD-ROM DRIVE 40X MAXIMUM",NULL,
2854 "_NEC DV5800A", NULL,
2855 "SAMSUNG CD-ROM SN-124", "N001"
1da177e4 2856};
2e9edbf8 2857
f4b15fef
AC		 2858static int ata_strim(char *s, size_t len)
2859{
2860 len = strnlen(s, len);
2861
2862 /* ATAPI specifies that empty space is blank-filled; remove blanks */
2863 while ((len > 0) && (s[len - 1] == ' ')) {
2864 len--;
2865 s[len] = 0;
2866 }
2867 return len;
2868}
1da177e4 2869
057ace5e 2870static int ata_dma_blacklisted(const struct ata_device *dev)
1da177e4 2871{
f4b15fef
AC		 2872 unsigned char model_num[40];
2873 unsigned char model_rev[16];
2874 unsigned int nlen, rlen;
1da177e4
LT		 2875 int i;
2876
f4b15fef
AC		 2877 ata_id_string(dev->id, model_num, ATA_ID_PROD_OFS,
2878 sizeof(model_num));
2879 ata_id_string(dev->id, model_rev, ATA_ID_FW_REV_OFS,
2880 sizeof(model_rev));
2881 nlen = ata_strim(model_num, sizeof(model_num));
2882 rlen = ata_strim(model_rev, sizeof(model_rev));
1da177e4 2883
f4b15fef
AC		 2884 for (i = 0; i < ARRAY_SIZE(ata_dma_blacklist); i += 2) {
2885 if (!strncmp(ata_dma_blacklist[i], model_num, nlen)) {
2886 if (ata_dma_blacklist[i+1] == NULL)
2887 return 1;
2888 if (!strncmp(ata_dma_blacklist[i], model_rev, rlen))
2889 return 1;
2890 }
2891 }
1da177e4
LT		 2892 return 0;
2893}
2894
a6d5a51c
TH		 2895/**
2896 * ata_dev_xfermask - Compute supported xfermask of the given device
2897 * @ap: Port on which the device to compute xfermask for resides
2898 * @dev: Device to compute xfermask for
2899 *
acf356b1
TH		 2900 * Compute supported xfermask of @dev and store it in
2901 * dev->*_mask. This function is responsible for applying all
2902 * known limits including host controller limits, device
2903 * blacklist, etc...
a6d5a51c 2904 *
600511e8
TH		 2905 * FIXME: The current implementation limits all transfer modes to
2906 * the fastest of the lowested device on the port. This is not
05c8e0ac 2907 * required on most controllers.
600511e8 2908 *
a6d5a51c
TH		 2909 * LOCKING:
2910 * None.
a6d5a51c 2911 */
acf356b1 2912static void ata_dev_xfermask(struct ata_port *ap, struct ata_device *dev)
1da177e4 2913{
5444a6f4 2914 struct ata_host_set *hs = ap->host_set;
a6d5a51c
TH		 2915 unsigned long xfer_mask;
2916 int i;
1da177e4 2917
565083e1
TH		 2918 xfer_mask = ata_pack_xfermask(ap->pio_mask,
2919 ap->mwdma_mask, ap->udma_mask);
2920
2921 /* Apply cable rule here. Don't apply it early because when
2922 * we handle hot plug the cable type can itself change.
2923 */
2924 if (ap->cbl == ATA_CBL_PATA40)
2925 xfer_mask &= ~(0xF8 << ATA_SHIFT_UDMA);
1da177e4 2926
5444a6f4 2927 /* FIXME: Use port-wide xfermask for now */
a6d5a51c
TH		 2928 for (i = 0; i < ATA_MAX_DEVICES; i++) {
2929 struct ata_device *d = &ap->device[i];
565083e1
TH		 2930
2931 if (ata_dev_absent(d))
2932 continue;
2933
2934 if (ata_dev_disabled(d)) {
2935 /* to avoid violating device selection timing */
2936 xfer_mask &= ata_pack_xfermask(d->pio_mask,
2937 UINT_MAX, UINT_MAX);
a6d5a51c 2938 continue;
565083e1
TH		 2939 }
2940
2941 xfer_mask &= ata_pack_xfermask(d->pio_mask,
2942 d->mwdma_mask, d->udma_mask);
a6d5a51c
TH		 2943 xfer_mask &= ata_id_xfermask(d->id);
2944 if (ata_dma_blacklisted(d))
2945 xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA);
1da177e4
LT		 2946 }
2947
a6d5a51c
TH		 2948 if (ata_dma_blacklisted(dev))
2949 printk(KERN_WARNING "ata%u: dev %u is on DMA blacklist, "
2950 "disabling DMA\n", ap->id, dev->devno);
2951
5444a6f4
AC		 2952 if (hs->flags & ATA_HOST_SIMPLEX) {
2953 if (hs->simplex_claimed)
2954 xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA);
2955 }
565083e1 2956
5444a6f4
AC		 2957 if (ap->ops->mode_filter)
2958 xfer_mask = ap->ops->mode_filter(ap, dev, xfer_mask);
2959
565083e1
TH		 2960 ata_unpack_xfermask(xfer_mask, &dev->pio_mask,
2961 &dev->mwdma_mask, &dev->udma_mask);
1da177e4
LT		 2962}
2963
1da177e4
LT		 2964/**
2965 * ata_dev_set_xfermode - Issue SET FEATURES - XFER MODE command
2966 * @ap: Port associated with device @dev
2967 * @dev: Device to which command will be sent
2968 *
780a87f7
JG		 2969 * Issue SET FEATURES - XFER MODE command to device @dev
2970 * on port @ap.
2971 *
1da177e4 2972 * LOCKING:
0cba632b 2973 * PCI/etc. bus probe sem.
83206a29
TH		 2974 *
2975 * RETURNS:
2976 * 0 on success, AC_ERR_* mask otherwise.
1da177e4
LT		 2977 */
2978
83206a29
TH		 2979static unsigned int ata_dev_set_xfermode(struct ata_port *ap,
2980 struct ata_device *dev)
1da177e4 2981{
a0123703 2982 struct ata_taskfile tf;
83206a29 2983 unsigned int err_mask;
1da177e4
LT		 2984
2985 /* set up set-features taskfile */
2986 DPRINTK("set features - xfer mode\n");
2987
a0123703
TH		 2988 ata_tf_init(ap, &tf, dev->devno);
2989 tf.command = ATA_CMD_SET_FEATURES;
2990 tf.feature = SETFEATURES_XFER;
2991 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
2992 tf.protocol = ATA_PROT_NODATA;
2993 tf.nsect = dev->xfer_mode;
1da177e4 2994
d69cf37d 2995 err_mask = ata_exec_internal(ap, dev, &tf, NULL, DMA_NONE, NULL, 0);
1da177e4 2996
83206a29
TH		 2997 DPRINTK("EXIT, err_mask=%x\n", err_mask);
2998 return err_mask;
1da177e4
LT		 2999}
3000
8bf62ece
AL		 3001/**
3002 * ata_dev_init_params - Issue INIT DEV PARAMS command
3003 * @ap: Port associated with device @dev
3004 * @dev: Device to which command will be sent
3005 *
3006 * LOCKING:
6aff8f1f
TH		 3007 * Kernel thread context (may sleep)
3008 *
3009 * RETURNS:
3010 * 0 on success, AC_ERR_* mask otherwise.
8bf62ece
AL		 3011 */
3012
6aff8f1f 3013static unsigned int ata_dev_init_params(struct ata_port *ap,
00b6f5e9
AL		 3014 struct ata_device *dev,
3015 u16 heads,
3016 u16 sectors)
8bf62ece 3017{
a0123703 3018 struct ata_taskfile tf;
6aff8f1f 3019 unsigned int err_mask;
8bf62ece
AL		 3020
3021 /* Number of sectors per track 1-255. Number of heads 1-16 */
3022 if (sectors < 1 || sectors > 255 || heads < 1 || heads > 16)
00b6f5e9 3023 return AC_ERR_INVALID;
8bf62ece
AL		 3024
3025 /* set up init dev params taskfile */
3026 DPRINTK("init dev params \n");
3027
a0123703
TH		 3028 ata_tf_init(ap, &tf, dev->devno);
3029 tf.command = ATA_CMD_INIT_DEV_PARAMS;
3030 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
3031 tf.protocol = ATA_PROT_NODATA;
3032 tf.nsect = sectors;
3033 tf.device |= (heads - 1) & 0x0f; /* max head = num. of heads - 1 */
8bf62ece 3034
d69cf37d 3035 err_mask = ata_exec_internal(ap, dev, &tf, NULL, DMA_NONE, NULL, 0);
8bf62ece 3036
6aff8f1f
TH		 3037 DPRINTK("EXIT, err_mask=%x\n", err_mask);
3038 return err_mask;
8bf62ece
AL		 3039}
3040
1da177e4 3041/**
0cba632b
JG		 3042 * ata_sg_clean - Unmap DMA memory associated with command
3043 * @qc: Command containing DMA memory to be released
3044 *
3045 * Unmap all mapped DMA memory associated with this command.
1da177e4
LT		 3046 *
3047 * LOCKING:
0cba632b 3048 * spin_lock_irqsave(host_set lock)
1da177e4
LT		 3049 */
3050
3051static void ata_sg_clean(struct ata_queued_cmd *qc)
3052{
3053 struct ata_port *ap = qc->ap;
cedc9a47 3054 struct scatterlist *sg = qc->__sg;
1da177e4 3055 int dir = qc->dma_dir;
cedc9a47 3056 void *pad_buf = NULL;
1da177e4 3057
a4631474
TH		 3058 WARN_ON(!(qc->flags & ATA_QCFLAG_DMAMAP));
3059 WARN_ON(sg == NULL);
1da177e4
LT		 3060
3061 if (qc->flags & ATA_QCFLAG_SINGLE)
f131883e 3062 WARN_ON(qc->n_elem > 1);
1da177e4 3063
2c13b7ce 3064 VPRINTK("unmapping %u sg elements\n", qc->n_elem);
1da177e4 3065
cedc9a47
JG		 3066 /* if we padded the buffer out to 32-bit bound, and data
3067 * xfer direction is from-device, we must copy from the
3068 * pad buffer back into the supplied buffer
3069 */
3070 if (qc->pad_len && !(qc->tf.flags & ATA_TFLAG_WRITE))
3071 pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
3072
3073 if (qc->flags & ATA_QCFLAG_SG) {
e1410f2d 3074 if (qc->n_elem)
2f1f610b 3075 dma_unmap_sg(ap->dev, sg, qc->n_elem, dir);
cedc9a47
JG		 3076 /* restore last sg */
3077 sg[qc->orig_n_elem - 1].length += qc->pad_len;
3078 if (pad_buf) {
3079 struct scatterlist *psg = &qc->pad_sgent;
3080 void *addr = kmap_atomic(psg->page, KM_IRQ0);
3081 memcpy(addr + psg->offset, pad_buf, qc->pad_len);
dfa15988 3082 kunmap_atomic(addr, KM_IRQ0);
cedc9a47
JG		 3083 }
3084 } else {
2e242fa9 3085 if (qc->n_elem)
2f1f610b 3086 dma_unmap_single(ap->dev,
e1410f2d
JG		 3087 sg_dma_address(&sg[0]), sg_dma_len(&sg[0]),
3088 dir);
cedc9a47
JG		 3089 /* restore sg */
3090 sg->length += qc->pad_len;
3091 if (pad_buf)
3092 memcpy(qc->buf_virt + sg->length - qc->pad_len,
3093 pad_buf, qc->pad_len);
3094 }
1da177e4
LT		 3095
3096 qc->flags &= ~ATA_QCFLAG_DMAMAP;
cedc9a47 3097 qc->__sg = NULL;
1da177e4
LT		 3098}
3099
3100/**
3101 * ata_fill_sg - Fill PCI IDE PRD table
3102 * @qc: Metadata associated with taskfile to be transferred
3103 *
780a87f7
JG		 3104 * Fill PCI IDE PRD (scatter-gather) table with segments
3105 * associated with the current disk command.
3106 *
1da177e4 3107 * LOCKING:
780a87f7 3108 * spin_lock_irqsave(host_set lock)
1da177e4
LT		 3109 *
3110 */
3111static void ata_fill_sg(struct ata_queued_cmd *qc)
3112{
1da177e4 3113 struct ata_port *ap = qc->ap;
cedc9a47
JG		 3114 struct scatterlist *sg;
3115 unsigned int idx;
1da177e4 3116
a4631474 3117 WARN_ON(qc->__sg == NULL);
f131883e 3118 WARN_ON(qc->n_elem == 0 && qc->pad_len == 0);
1da177e4
LT		 3119
3120 idx = 0;
cedc9a47 3121 ata_for_each_sg(sg, qc) {
1da177e4
LT		 3122 u32 addr, offset;
3123 u32 sg_len, len;
3124
3125 /* determine if physical DMA addr spans 64K boundary.
3126 * Note h/w doesn't support 64-bit, so we unconditionally
3127 * truncate dma_addr_t to u32.
3128 */
3129 addr = (u32) sg_dma_address(sg);
3130 sg_len = sg_dma_len(sg);
3131
3132 while (sg_len) {
3133 offset = addr & 0xffff;
3134 len = sg_len;
3135 if ((offset + sg_len) > 0x10000)
3136 len = 0x10000 - offset;
3137
3138 ap->prd[idx].addr = cpu_to_le32(addr);
3139 ap->prd[idx].flags_len = cpu_to_le32(len & 0xffff);
3140 VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", idx, addr, len);
3141
3142 idx++;
3143 sg_len -= len;
3144 addr += len;
3145 }
3146 }
3147
3148 if (idx)
3149 ap->prd[idx - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT);
3150}
3151/**
3152 * ata_check_atapi_dma - Check whether ATAPI DMA can be supported
3153 * @qc: Metadata associated with taskfile to check
3154 *
780a87f7
JG		 3155 * Allow low-level driver to filter ATA PACKET commands, returning
3156 * a status indicating whether or not it is OK to use DMA for the
3157 * supplied PACKET command.
3158 *
1da177e4 3159 * LOCKING:
0cba632b
JG		 3160 * spin_lock_irqsave(host_set lock)
3161 *
1da177e4
LT		 3162 * RETURNS: 0 when ATAPI DMA can be used
3163 * nonzero otherwise
3164 */
3165int ata_check_atapi_dma(struct ata_queued_cmd *qc)
3166{
3167 struct ata_port *ap = qc->ap;
3168 int rc = 0; /* Assume ATAPI DMA is OK by default */
3169
3170 if (ap->ops->check_atapi_dma)
3171 rc = ap->ops->check_atapi_dma(qc);
3172
3173 return rc;
3174}
3175/**
3176 * ata_qc_prep - Prepare taskfile for submission
3177 * @qc: Metadata associated with taskfile to be prepared
3178 *
780a87f7
JG		 3179 * Prepare ATA taskfile for submission.
3180 *
1da177e4
LT		 3181 * LOCKING:
3182 * spin_lock_irqsave(host_set lock)
3183 */
3184void ata_qc_prep(struct ata_queued_cmd *qc)
3185{
3186 if (!(qc->flags & ATA_QCFLAG_DMAMAP))
3187 return;
3188
3189 ata_fill_sg(qc);
3190}
3191
e46834cd
BK		 3192void ata_noop_qc_prep(struct ata_queued_cmd *qc) { }
3193
0cba632b
JG		 3194/**
3195 * ata_sg_init_one - Associate command with memory buffer
3196 * @qc: Command to be associated
3197 * @buf: Memory buffer
3198 * @buflen: Length of memory buffer, in bytes.
3199 *
3200 * Initialize the data-related elements of queued_cmd @qc
3201 * to point to a single memory buffer, @buf of byte length @buflen.
3202 *
3203 * LOCKING:
3204 * spin_lock_irqsave(host_set lock)
3205 */
3206
1da177e4
LT		 3207void ata_sg_init_one(struct ata_queued_cmd *qc, void *buf, unsigned int buflen)
3208{
3209 struct scatterlist *sg;
3210
3211 qc->flags |= ATA_QCFLAG_SINGLE;
3212
3213 memset(&qc->sgent, 0, sizeof(qc->sgent));
cedc9a47 3214 qc->__sg = &qc->sgent;
1da177e4 3215 qc->n_elem = 1;
cedc9a47 3216 qc->orig_n_elem = 1;
1da177e4
LT		 3217 qc->buf_virt = buf;
3218
cedc9a47 3219 sg = qc->__sg;
f0612bbc 3220 sg_init_one(sg, buf, buflen);
1da177e4
LT		 3221}
3222
0cba632b
JG		 3223/**
3224 * ata_sg_init - Associate command with scatter-gather table.
3225 * @qc: Command to be associated
3226 * @sg: Scatter-gather table.
3227 * @n_elem: Number of elements in s/g table.
3228 *
3229 * Initialize the data-related elements of queued_cmd @qc
3230 * to point to a scatter-gather table @sg, containing @n_elem
3231 * elements.
3232 *
3233 * LOCKING:
3234 * spin_lock_irqsave(host_set lock)
3235 */
3236
1da177e4
LT		 3237void ata_sg_init(struct ata_queued_cmd *qc, struct scatterlist *sg,
3238 unsigned int n_elem)
3239{
3240 qc->flags |= ATA_QCFLAG_SG;
cedc9a47 3241 qc->__sg = sg;
1da177e4 3242 qc->n_elem = n_elem;
cedc9a47 3243 qc->orig_n_elem = n_elem;
1da177e4
LT		 3244}
3245
3246/**
0cba632b
JG		 3247 * ata_sg_setup_one - DMA-map the memory buffer associated with a command.
3248 * @qc: Command with memory buffer to be mapped.
3249 *
3250 * DMA-map the memory buffer associated with queued_cmd @qc.
1da177e4
LT		 3251 *
3252 * LOCKING:
3253 * spin_lock_irqsave(host_set lock)
3254 *
3255 * RETURNS:
0cba632b 3256 * Zero on success, negative on error.
1da177e4
LT		 3257 */
3258
3259static int ata_sg_setup_one(struct ata_queued_cmd *qc)
3260{
3261 struct ata_port *ap = qc->ap;
3262 int dir = qc->dma_dir;
cedc9a47 3263 struct scatterlist *sg = qc->__sg;
1da177e4 3264 dma_addr_t dma_address;
2e242fa9 3265 int trim_sg = 0;
1da177e4 3266
cedc9a47
JG		 3267 /* we must lengthen transfers to end on a 32-bit boundary */
3268 qc->pad_len = sg->length & 3;
3269 if (qc->pad_len) {
3270 void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
3271 struct scatterlist *psg = &qc->pad_sgent;
3272
a4631474 3273 WARN_ON(qc->dev->class != ATA_DEV_ATAPI);
cedc9a47
JG		 3274
3275 memset(pad_buf, 0, ATA_DMA_PAD_SZ);
3276
3277 if (qc->tf.flags & ATA_TFLAG_WRITE)
3278 memcpy(pad_buf, qc->buf_virt + sg->length - qc->pad_len,
3279 qc->pad_len);
3280
3281 sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ);
3282 sg_dma_len(psg) = ATA_DMA_PAD_SZ;
3283 /* trim sg */
3284 sg->length -= qc->pad_len;
2e242fa9
TH		 3285 if (sg->length == 0)
3286 trim_sg = 1;
cedc9a47
JG		 3287
3288 DPRINTK("padding done, sg->length=%u pad_len=%u\n",
3289 sg->length, qc->pad_len);
3290 }
3291
2e242fa9
TH		 3292 if (trim_sg) {
3293 qc->n_elem--;
e1410f2d
JG		 3294 goto skip_map;
3295 }
3296
2f1f610b 3297 dma_address = dma_map_single(ap->dev, qc->buf_virt,
32529e01 3298 sg->length, dir);
537a95d9
TH		 3299 if (dma_mapping_error(dma_address)) {
3300 /* restore sg */
3301 sg->length += qc->pad_len;
1da177e4 3302 return -1;
537a95d9 3303 }
1da177e4
LT		 3304
3305 sg_dma_address(sg) = dma_address;
32529e01 3306 sg_dma_len(sg) = sg->length;
1da177e4 3307
2e242fa9 3308skip_map:
1da177e4
LT		 3309 DPRINTK("mapped buffer of %d bytes for %s\n", sg_dma_len(sg),
3310 qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
3311
3312 return 0;
3313}
3314
3315/**
0cba632b
JG		 3316 * ata_sg_setup - DMA-map the scatter-gather table associated with a command.
3317 * @qc: Command with scatter-gather table to be mapped.
3318 *
3319 * DMA-map the scatter-gather table associated with queued_cmd @qc.
1da177e4
LT		 3320 *
3321 * LOCKING:
3322 * spin_lock_irqsave(host_set lock)
3323 *
3324 * RETURNS:
0cba632b 3325 * Zero on success, negative on error.
1da177e4
LT		 3326 *
3327 */
3328
3329static int ata_sg_setup(struct ata_queued_cmd *qc)
3330{
3331 struct ata_port *ap = qc->ap;
cedc9a47
JG		 3332 struct scatterlist *sg = qc->__sg;
3333 struct scatterlist *lsg = &sg[qc->n_elem - 1];
e1410f2d 3334 int n_elem, pre_n_elem, dir, trim_sg = 0;
1da177e4
LT		 3335
3336 VPRINTK("ENTER, ata%u\n", ap->id);
a4631474 3337 WARN_ON(!(qc->flags & ATA_QCFLAG_SG));
1da177e4 3338
cedc9a47
JG		 3339 /* we must lengthen transfers to end on a 32-bit boundary */
3340 qc->pad_len = lsg->length & 3;
3341 if (qc->pad_len) {
3342 void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
3343 struct scatterlist *psg = &qc->pad_sgent;
3344 unsigned int offset;
3345
a4631474 3346 WARN_ON(qc->dev->class != ATA_DEV_ATAPI);
cedc9a47
JG		 3347
3348 memset(pad_buf, 0, ATA_DMA_PAD_SZ);
3349
3350 /*
3351 * psg->page/offset are used to copy to-be-written
3352 * data in this function or read data in ata_sg_clean.
3353 */
3354 offset = lsg->offset + lsg->length - qc->pad_len;
3355 psg->page = nth_page(lsg->page, offset >> PAGE_SHIFT);
3356 psg->offset = offset_in_page(offset);
3357
3358 if (qc->tf.flags & ATA_TFLAG_WRITE) {
3359 void *addr = kmap_atomic(psg->page, KM_IRQ0);
3360 memcpy(pad_buf, addr + psg->offset, qc->pad_len);
dfa15988 3361 kunmap_atomic(addr, KM_IRQ0);
cedc9a47
JG		 3362 }
3363
3364 sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ);
3365 sg_dma_len(psg) = ATA_DMA_PAD_SZ;
3366 /* trim last sg */
3367 lsg->length -= qc->pad_len;
e1410f2d
JG		 3368 if (lsg->length == 0)
3369 trim_sg = 1;
cedc9a47
JG		 3370
3371 DPRINTK("padding done, sg[%d].length=%u pad_len=%u\n",
3372 qc->n_elem - 1, lsg->length, qc->pad_len);
3373 }
3374
e1410f2d
JG		 3375 pre_n_elem = qc->n_elem;
3376 if (trim_sg && pre_n_elem)
3377 pre_n_elem--;
3378
3379 if (!pre_n_elem) {
3380 n_elem = 0;
3381 goto skip_map;
3382 }
3383
1da177e4 3384 dir = qc->dma_dir;
2f1f610b 3385 n_elem = dma_map_sg(ap->dev, sg, pre_n_elem, dir);
537a95d9
TH		 3386 if (n_elem < 1) {
3387 /* restore last sg */
3388 lsg->length += qc->pad_len;
1da177e4 3389 return -1;
537a95d9 3390 }
1da177e4
LT		 3391
3392 DPRINTK("%d sg elements mapped\n", n_elem);
3393
e1410f2d 3394skip_map:
1da177e4
LT		 3395 qc->n_elem = n_elem;
3396
3397 return 0;
3398}
3399
40e8c82c
TH		 3400/**
3401 * ata_poll_qc_complete - turn irq back on and finish qc
3402 * @qc: Command to complete
8e8b77dd 3403 * @err_mask: ATA status register content
40e8c82c
TH		 3404 *
3405 * LOCKING:
3406 * None. (grabs host lock)
3407 */
3408
a22e2eb0 3409void ata_poll_qc_complete(struct ata_queued_cmd *qc)
40e8c82c
TH		 3410{
3411 struct ata_port *ap = qc->ap;
b8f6153e 3412 unsigned long flags;
40e8c82c 3413
b8f6153e 3414 spin_lock_irqsave(&ap->host_set->lock, flags);
40e8c82c
TH		 3415 ap->flags &= ~ATA_FLAG_NOINTR;
3416 ata_irq_on(ap);
a22e2eb0 3417 ata_qc_complete(qc);
b8f6153e 3418 spin_unlock_irqrestore(&ap->host_set->lock, flags);
40e8c82c
TH		 3419}
3420
1da177e4 3421/**
c893a3ae 3422 * ata_pio_poll - poll using PIO, depending on current state
c91af2c8 3423 * @qc: qc in progress
1da177e4
LT		 3424 *
3425 * LOCKING:
0cba632b 3426 * None. (executing in kernel thread context)
1da177e4
LT		 3427 *
3428 * RETURNS:
6f0ef4fa 3429 * timeout value to use
1da177e4 3430 */
c91af2c8 3431static unsigned long ata_pio_poll(struct ata_queued_cmd *qc)
1da177e4 3432{
c91af2c8 3433 struct ata_port *ap = qc->ap;
1da177e4 3434 u8 status;
14be71f4
AL		 3435 unsigned int poll_state = HSM_ST_UNKNOWN;
3436 unsigned int reg_state = HSM_ST_UNKNOWN;
14be71f4
AL		 3437
3438 switch (ap->hsm_task_state) {
3439 case HSM_ST:
3440 case HSM_ST_POLL:
3441 poll_state = HSM_ST_POLL;
3442 reg_state = HSM_ST;
1da177e4 3443 break;
14be71f4
AL		 3444 case HSM_ST_LAST:
3445 case HSM_ST_LAST_POLL:
3446 poll_state = HSM_ST_LAST_POLL;
3447 reg_state = HSM_ST_LAST;
1da177e4
LT		 3448 break;
3449 default:
3450 BUG();
3451 break;
3452 }
3453
3454 status = ata_chk_status(ap);
3455 if (status & ATA_BUSY) {
3456 if (time_after(jiffies, ap->pio_task_timeout)) {
11a56d24 3457 qc->err_mask |= AC_ERR_TIMEOUT;
7c398335 3458 ap->hsm_task_state = HSM_ST_TMOUT;
1da177e4
LT		 3459 return 0;
3460 }
14be71f4 3461 ap->hsm_task_state = poll_state;
1da177e4
LT		 3462 return ATA_SHORT_PAUSE;
3463 }
3464
14be71f4 3465 ap->hsm_task_state = reg_state;
1da177e4
LT		 3466 return 0;
3467}
3468
3469/**
6f0ef4fa 3470 * ata_pio_complete - check if drive is busy or idle
c91af2c8 3471 * @qc: qc to complete
1da177e4
LT		 3472 *
3473 * LOCKING:
0cba632b 3474 * None. (executing in kernel thread context)
7fb6ec28
JG		 3475 *
3476 * RETURNS:
3477 * Non-zero if qc completed, zero otherwise.
1da177e4 3478 */
c91af2c8 3479static int ata_pio_complete(struct ata_queued_cmd *qc)
1da177e4 3480{
c91af2c8 3481 struct ata_port *ap = qc->ap;
1da177e4
LT		 3482 u8 drv_stat;
3483
3484 /*
31433ea3
AC		 3485 * This is purely heuristic. This is a fast path. Sometimes when
3486 * we enter, BSY will be cleared in a chk-status or two. If not,
3487 * the drive is probably seeking or something. Snooze for a couple
3488 * msecs, then chk-status again. If still busy, fall back to
14be71f4 3489 * HSM_ST_POLL state.
1da177e4 3490 */
fe79e683
AL		 3491 drv_stat = ata_busy_wait(ap, ATA_BUSY, 10);
3492 if (drv_stat & ATA_BUSY) {
1da177e4 3493 msleep(2);
fe79e683
AL		 3494 drv_stat = ata_busy_wait(ap, ATA_BUSY, 10);
3495 if (drv_stat & ATA_BUSY) {
14be71f4 3496 ap->hsm_task_state = HSM_ST_LAST_POLL;
1da177e4 3497 ap->pio_task_timeout = jiffies + ATA_TMOUT_PIO;
7fb6ec28 3498 return 0;
1da177e4
LT		 3499 }
3500 }
3501
3502 drv_stat = ata_wait_idle(ap);
3503 if (!ata_ok(drv_stat)) {
1c848984 3504 qc->err_mask |= __ac_err_mask(drv_stat);
14be71f4 3505 ap->hsm_task_state = HSM_ST_ERR;
7fb6ec28 3506 return 0;
1da177e4
LT		 3507 }
3508
14be71f4 3509 ap->hsm_task_state = HSM_ST_IDLE;
1da177e4 3510
a4631474 3511 WARN_ON(qc->err_mask);
a22e2eb0 3512 ata_poll_qc_complete(qc);
7fb6ec28
JG		 3513
3514 /* another command may start at this point */
3515
3516 return 1;
1da177e4
LT		 3517}
3518
0baab86b
EF		 3519
3520/**
c893a3ae 3521 * swap_buf_le16 - swap halves of 16-bit words in place
0baab86b
EF		 3522 * @buf: Buffer to swap
3523 * @buf_words: Number of 16-bit words in buffer.
3524 *
3525 * Swap halves of 16-bit words if needed to convert from
3526 * little-endian byte order to native cpu byte order, or
3527 * vice-versa.
3528 *
3529 * LOCKING:
6f0ef4fa 3530 * Inherited from caller.
0baab86b 3531 */
1da177e4
LT		 3532void swap_buf_le16(u16 *buf, unsigned int buf_words)
3533{
3534#ifdef __BIG_ENDIAN
3535 unsigned int i;
3536
3537 for (i = 0; i < buf_words; i++)
3538 buf[i] = le16_to_cpu(buf[i]);
3539#endif /* __BIG_ENDIAN */
3540}
3541
6ae4cfb5
AL		 3542/**
3543 * ata_mmio_data_xfer - Transfer data by MMIO
3544 * @ap: port to read/write
3545 * @buf: data buffer
3546 * @buflen: buffer length
344babaa 3547 * @write_data: read/write
6ae4cfb5
AL		 3548 *
3549 * Transfer data from/to the device data register by MMIO.
3550 *
3551 * LOCKING:
3552 * Inherited from caller.
6ae4cfb5
AL		 3553 */
3554
1da177e4
LT		 3555static void ata_mmio_data_xfer(struct ata_port *ap, unsigned char *buf,
3556 unsigned int buflen, int write_data)
3557{
3558 unsigned int i;
3559 unsigned int words = buflen >> 1;
3560 u16 *buf16 = (u16 *) buf;
3561 void __iomem *mmio = (void __iomem *)ap->ioaddr.data_addr;
3562
6ae4cfb5 3563 /* Transfer multiple of 2 bytes */
1da177e4
LT		 3564 if (write_data) {
3565 for (i = 0; i < words; i++)
3566 writew(le16_to_cpu(buf16[i]), mmio);
3567 } else {
3568 for (i = 0; i < words; i++)
3569 buf16[i] = cpu_to_le16(readw(mmio));
3570 }
6ae4cfb5
AL		 3571
3572 /* Transfer trailing 1 byte, if any. */
3573 if (unlikely(buflen & 0x01)) {
3574 u16 align_buf[1] = { 0 };
3575 unsigned char *trailing_buf = buf + buflen - 1;
3576
3577 if (write_data) {
3578 memcpy(align_buf, trailing_buf, 1);
3579 writew(le16_to_cpu(align_buf[0]), mmio);
3580 } else {
3581 align_buf[0] = cpu_to_le16(readw(mmio));
3582 memcpy(trailing_buf, align_buf, 1);
3583 }
3584 }
1da177e4
LT		 3585}
3586
6ae4cfb5
AL		 3587/**
3588 * ata_pio_data_xfer - Transfer data by PIO
3589 * @ap: port to read/write
3590 * @buf: data buffer
3591 * @buflen: buffer length
344babaa 3592 * @write_data: read/write
6ae4cfb5
AL		 3593 *
3594 * Transfer data from/to the device data register by PIO.
3595 *
3596 * LOCKING:
3597 * Inherited from caller.
6ae4cfb5
AL		 3598 */
3599
1da177e4
LT		 3600static void ata_pio_data_xfer(struct ata_port *ap, unsigned char *buf,
3601 unsigned int buflen, int write_data)
3602{
6ae4cfb5 3603 unsigned int words = buflen >> 1;
1da177e4 3604
6ae4cfb5 3605 /* Transfer multiple of 2 bytes */
1da177e4 3606 if (write_data)
6ae4cfb5 3607 outsw(ap->ioaddr.data_addr, buf, words);
1da177e4 3608 else
6ae4cfb5
AL		 3609 insw(ap->ioaddr.data_addr, buf, words);
3610
3611 /* Transfer trailing 1 byte, if any. */
3612 if (unlikely(buflen & 0x01)) {
3613 u16 align_buf[1] = { 0 };
3614 unsigned char *trailing_buf = buf + buflen - 1;
3615
3616 if (write_data) {
3617 memcpy(align_buf, trailing_buf, 1);
3618 outw(le16_to_cpu(align_buf[0]), ap->ioaddr.data_addr);
3619 } else {
3620 align_buf[0] = cpu_to_le16(inw(ap->ioaddr.data_addr));
3621 memcpy(trailing_buf, align_buf, 1);
3622 }
3623 }
1da177e4
LT		 3624}
3625
6ae4cfb5
AL		 3626/**
3627 * ata_data_xfer - Transfer data from/to the data register.
3628 * @ap: port to read/write
3629 * @buf: data buffer
3630 * @buflen: buffer length
3631 * @do_write: read/write
3632 *
3633 * Transfer data from/to the device data register.
3634 *
3635 * LOCKING:
3636 * Inherited from caller.
6ae4cfb5
AL		 3637 */
3638
1da177e4
LT		 3639static void ata_data_xfer(struct ata_port *ap, unsigned char *buf,
3640 unsigned int buflen, int do_write)
3641{
a1bd9e68
AC		 3642 /* Make the crap hardware pay the costs not the good stuff */
3643 if (unlikely(ap->flags & ATA_FLAG_IRQ_MASK)) {
3644 unsigned long flags;
3645 local_irq_save(flags);
3646 if (ap->flags & ATA_FLAG_MMIO)
3647 ata_mmio_data_xfer(ap, buf, buflen, do_write);
3648 else
3649 ata_pio_data_xfer(ap, buf, buflen, do_write);
3650 local_irq_restore(flags);
3651 } else {
3652 if (ap->flags & ATA_FLAG_MMIO)
3653 ata_mmio_data_xfer(ap, buf, buflen, do_write);
3654 else
3655 ata_pio_data_xfer(ap, buf, buflen, do_write);
3656 }
1da177e4
LT		 3657}
3658
6ae4cfb5
AL		 3659/**
3660 * ata_pio_sector - Transfer ATA_SECT_SIZE (512 bytes) of data.
3661 * @qc: Command on going
3662 *
3663 * Transfer ATA_SECT_SIZE of data from/to the ATA device.
3664 *
3665 * LOCKING:
3666 * Inherited from caller.
3667 */
3668
1da177e4
LT		 3669static void ata_pio_sector(struct ata_queued_cmd *qc)
3670{
3671 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
cedc9a47 3672 struct scatterlist *sg = qc->__sg;
1da177e4
LT		 3673 struct ata_port *ap = qc->ap;
3674 struct page *page;
3675 unsigned int offset;
3676 unsigned char *buf;
3677
3678 if (qc->cursect == (qc->nsect - 1))
14be71f4 3679 ap->hsm_task_state = HSM_ST_LAST;
1da177e4
LT		 3680
3681 page = sg[qc->cursg].page;
3682 offset = sg[qc->cursg].offset + qc->cursg_ofs * ATA_SECT_SIZE;
3683
3684 /* get the current page and offset */
3685 page = nth_page(page, (offset >> PAGE_SHIFT));
3686 offset %= PAGE_SIZE;
3687
3688 buf = kmap(page) + offset;
3689
3690 qc->cursect++;
3691 qc->cursg_ofs++;
3692
32529e01 3693 if ((qc->cursg_ofs * ATA_SECT_SIZE) == (&sg[qc->cursg])->length) {
1da177e4
LT		 3694 qc->cursg++;
3695 qc->cursg_ofs = 0;
3696 }
3697
3698 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
3699
3700 /* do the actual data transfer */
3701 do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
3702 ata_data_xfer(ap, buf, ATA_SECT_SIZE, do_write);
3703
3704 kunmap(page);
3705}
3706
6ae4cfb5
AL		 3707/**
3708 * __atapi_pio_bytes - Transfer data from/to the ATAPI device.
3709 * @qc: Command on going
3710 * @bytes: number of bytes
3711 *
3712 * Transfer Transfer data from/to the ATAPI device.
3713 *
3714 * LOCKING:
3715 * Inherited from caller.
3716 *
3717 */
3718
1da177e4
LT		 3719static void __atapi_pio_bytes(struct ata_queued_cmd *qc, unsigned int bytes)
3720{
3721 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
cedc9a47 3722 struct scatterlist *sg = qc->__sg;
1da177e4
LT		 3723 struct ata_port *ap = qc->ap;
3724 struct page *page;
3725 unsigned char *buf;
3726 unsigned int offset, count;
3727
563a6e1f 3728 if (qc->curbytes + bytes >= qc->nbytes)
14be71f4 3729 ap->hsm_task_state = HSM_ST_LAST;
1da177e4
LT		 3730
3731next_sg:
563a6e1f 3732 if (unlikely(qc->cursg >= qc->n_elem)) {
7fb6ec28 3733 /*
563a6e1f
AL		 3734 * The end of qc->sg is reached and the device expects
3735 * more data to transfer. In order not to overrun qc->sg
3736 * and fulfill length specified in the byte count register,
3737 * - for read case, discard trailing data from the device
3738 * - for write case, padding zero data to the device
3739 */
3740 u16 pad_buf[1] = { 0 };
3741 unsigned int words = bytes >> 1;
3742 unsigned int i;
3743
3744 if (words) /* warning if bytes > 1 */
7fb6ec28 3745 printk(KERN_WARNING "ata%u: %u bytes trailing data\n",
563a6e1f
AL		 3746 ap->id, bytes);
3747
3748 for (i = 0; i < words; i++)
3749 ata_data_xfer(ap, (unsigned char*)pad_buf, 2, do_write);
3750
14be71f4 3751 ap->hsm_task_state = HSM_ST_LAST;
563a6e1f
AL		 3752 return;
3753 }
3754
cedc9a47 3755 sg = &qc->__sg[qc->cursg];
1da177e4 3756
1da177e4
LT		 3757 page = sg->page;
3758 offset = sg->offset + qc->cursg_ofs;
3759
3760 /* get the current page and offset */
3761 page = nth_page(page, (offset >> PAGE_SHIFT));
3762 offset %= PAGE_SIZE;
3763
6952df03 3764 /* don't overrun current sg */
32529e01 3765 count = min(sg->length - qc->cursg_ofs, bytes);
1da177e4
LT		 3766
3767 /* don't cross page boundaries */
3768 count = min(count, (unsigned int)PAGE_SIZE - offset);
3769
3770 buf = kmap(page) + offset;
3771
3772 bytes -= count;
3773 qc->curbytes += count;
3774 qc->cursg_ofs += count;
3775
32529e01 3776 if (qc->cursg_ofs == sg->length) {
1da177e4
LT		 3777 qc->cursg++;
3778 qc->cursg_ofs = 0;
3779 }
3780
3781 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
3782
3783 /* do the actual data transfer */
3784 ata_data_xfer(ap, buf, count, do_write);
3785
3786 kunmap(page);
3787
563a6e1f 3788 if (bytes)
1da177e4 3789 goto next_sg;
1da177e4
LT		 3790}
3791
6ae4cfb5
AL		 3792/**
3793 * atapi_pio_bytes - Transfer data from/to the ATAPI device.
3794 * @qc: Command on going
3795 *
3796 * Transfer Transfer data from/to the ATAPI device.
3797 *
3798 * LOCKING:
3799 * Inherited from caller.
6ae4cfb5
AL		 3800 */
3801
1da177e4
LT		 3802static void atapi_pio_bytes(struct ata_queued_cmd *qc)
3803{
3804 struct ata_port *ap = qc->ap;
3805 struct ata_device *dev = qc->dev;
3806 unsigned int ireason, bc_lo, bc_hi, bytes;
3807 int i_write, do_write = (qc->tf.flags & ATA_TFLAG_WRITE) ? 1 : 0;
3808
3809 ap->ops->tf_read(ap, &qc->tf);
3810 ireason = qc->tf.nsect;
3811 bc_lo = qc->tf.lbam;
3812 bc_hi = qc->tf.lbah;
3813 bytes = (bc_hi << 8) | bc_lo;
3814
3815 /* shall be cleared to zero, indicating xfer of data */
3816 if (ireason & (1 << 0))
3817 goto err_out;
3818
3819 /* make sure transfer direction matches expected */
3820 i_write = ((ireason & (1 << 1)) == 0) ? 1 : 0;
3821 if (do_write != i_write)
3822 goto err_out;
3823
3824 __atapi_pio_bytes(qc, bytes);
3825
3826 return;
3827
3828err_out:
3829 printk(KERN_INFO "ata%u: dev %u: ATAPI check failed\n",
3830 ap->id, dev->devno);
11a56d24 3831 qc->err_mask |= AC_ERR_HSM;
14be71f4 3832 ap->hsm_task_state = HSM_ST_ERR;
1da177e4
LT		 3833}
3834
3835/**
6f0ef4fa 3836 * ata_pio_block - start PIO on a block
c91af2c8 3837 * @qc: qc to transfer block for
1da177e4
LT		 3838 *
3839 * LOCKING:
0cba632b 3840 * None. (executing in kernel thread context)
1da177e4 3841 */
c91af2c8 3842static void ata_pio_block(struct ata_queued_cmd *qc)
1da177e4 3843{
c91af2c8 3844 struct ata_port *ap = qc->ap;
1da177e4
LT		 3845 u8 status;
3846
3847 /*
6f0ef4fa 3848 * This is purely heuristic. This is a fast path.
1da177e4
LT		 3849 * Sometimes when we enter, BSY will be cleared in
3850 * a chk-status or two. If not, the drive is probably seeking
3851 * or something. Snooze for a couple msecs, then
3852 * chk-status again. If still busy, fall back to
14be71f4 3853 * HSM_ST_POLL state.
1da177e4
LT		 3854 */
3855 status = ata_busy_wait(ap, ATA_BUSY, 5);
3856 if (status & ATA_BUSY) {
3857 msleep(2);
3858 status = ata_busy_wait(ap, ATA_BUSY, 10);
3859 if (status & ATA_BUSY) {
14be71f4 3860 ap->hsm_task_state = HSM_ST_POLL;
1da177e4
LT		 3861 ap->pio_task_timeout = jiffies + ATA_TMOUT_PIO;
3862 return;
3863 }
3864 }
3865
fe79e683
AL		 3866 /* check error */
3867 if (status & (ATA_ERR | ATA_DF)) {
3868 qc->err_mask |= AC_ERR_DEV;
3869 ap->hsm_task_state = HSM_ST_ERR;
3870 return;
3871 }
3872
3873 /* transfer data if any */
1da177e4 3874 if (is_atapi_taskfile(&qc->tf)) {
fe79e683 3875 /* DRQ=0 means no more data to transfer */
1da177e4 3876 if ((status & ATA_DRQ) == 0) {
14be71f4 3877 ap->hsm_task_state = HSM_ST_LAST;
1da177e4
LT		 3878 return;
3879 }
3880
3881 atapi_pio_bytes(qc);
3882 } else {
3883 /* handle BSY=0, DRQ=0 as error */
3884 if ((status & ATA_DRQ) == 0) {
11a56d24 3885 qc->err_mask |= AC_ERR_HSM;
14be71f4 3886 ap->hsm_task_state = HSM_ST_ERR;
1da177e4
LT		 3887 return;
3888 }
3889
3890 ata_pio_sector(qc);
3891 }
3892}
3893
c91af2c8 3894static void ata_pio_error(struct ata_queued_cmd *qc)
1da177e4 3895{
c91af2c8 3896 struct ata_port *ap = qc->ap;
1da177e4 3897
0565c26d 3898 if (qc->tf.command != ATA_CMD_PACKET)
d63cb4a6
TH		 3899 printk(KERN_WARNING "ata%u: dev %u PIO error\n",
3900 ap->id, qc->dev->devno);
0565c26d 3901
2e9edbf8 3902 /* make sure qc->err_mask is available to
1c848984
AL		 3903 * know what's wrong and recover
3904 */
a4631474 3905 WARN_ON(qc->err_mask == 0);
1c848984 3906
14be71f4 3907 ap->hsm_task_state = HSM_ST_IDLE;
1da177e4 3908
a22e2eb0 3909 ata_poll_qc_complete(qc);
1da177e4
LT		 3910}
3911
3912static void ata_pio_task(void *_data)
3913{
c91af2c8
TH		 3914 struct ata_queued_cmd *qc = _data;
3915 struct ata_port *ap = qc->ap;
7fb6ec28
JG		 3916 unsigned long timeout;
3917 int qc_completed;
3918
3919fsm_start:
3920 timeout = 0;
3921 qc_completed = 0;
1da177e4 3922
14be71f4
AL		 3923 switch (ap->hsm_task_state) {
3924 case HSM_ST_IDLE:
1da177e4
LT		 3925 return;
3926
14be71f4 3927 case HSM_ST:
c91af2c8 3928 ata_pio_block(qc);
1da177e4
LT		 3929 break;
3930
14be71f4 3931 case HSM_ST_LAST:
c91af2c8 3932 qc_completed = ata_pio_complete(qc);
1da177e4
LT		 3933 break;
3934
14be71f4
AL		 3935 case HSM_ST_POLL:
3936 case HSM_ST_LAST_POLL:
c91af2c8 3937 timeout = ata_pio_poll(qc);
1da177e4
LT		 3938 break;
3939
14be71f4
AL		 3940 case HSM_ST_TMOUT:
3941 case HSM_ST_ERR:
c91af2c8 3942 ata_pio_error(qc);
1da177e4
LT		 3943 return;
3944 }
3945
3946 if (timeout)
c91af2c8 3947 ata_port_queue_task(ap, ata_pio_task, qc, timeout);
7fb6ec28
JG		 3948 else if (!qc_completed)
3949 goto fsm_start;
1da177e4
LT		 3950}
3951
8061f5f0
TH		 3952/**
3953 * atapi_packet_task - Write CDB bytes to hardware
c91af2c8 3954 * @_data: qc in progress
8061f5f0
TH		 3955 *
3956 * When device has indicated its readiness to accept
3957 * a CDB, this function is called. Send the CDB.
3958 * If DMA is to be performed, exit immediately.
3959 * Otherwise, we are in polling mode, so poll
3960 * status under operation succeeds or fails.
3961 *
3962 * LOCKING:
3963 * Kernel thread context (may sleep)
3964 */
8061f5f0
TH		 3965static void atapi_packet_task(void *_data)
3966{
c91af2c8
TH		 3967 struct ata_queued_cmd *qc = _data;
3968 struct ata_port *ap = qc->ap;
8061f5f0
TH		 3969 u8 status;
3970
8061f5f0
TH		 3971 /* sleep-wait for BSY to clear */
3972 DPRINTK("busy wait\n");
3973 if (ata_busy_sleep(ap, ATA_TMOUT_CDB_QUICK, ATA_TMOUT_CDB)) {
3974 qc->err_mask |= AC_ERR_TIMEOUT;
3975 goto err_out;
3976 }
3977
3978 /* make sure DRQ is set */
3979 status = ata_chk_status(ap);
3980 if ((status & (ATA_BUSY | ATA_DRQ)) != ATA_DRQ) {
3981 qc->err_mask |= AC_ERR_HSM;
3982 goto err_out;
3983 }
3984
3985 /* send SCSI cdb */
3986 DPRINTK("send cdb\n");
3987 WARN_ON(qc->dev->cdb_len < 12);
3988
3989 if (qc->tf.protocol == ATA_PROT_ATAPI_DMA ||
3990 qc->tf.protocol == ATA_PROT_ATAPI_NODATA) {
3991 unsigned long flags;
3992
3993 /* Once we're done issuing command and kicking bmdma,
3994 * irq handler takes over. To not lose irq, we need
3995 * to clear NOINTR flag before sending cdb, but
3996 * interrupt handler shouldn't be invoked before we're
3997 * finished. Hence, the following locking.
3998 */
3999 spin_lock_irqsave(&ap->host_set->lock, flags);
4000 ap->flags &= ~ATA_FLAG_NOINTR;
4001 ata_data_xfer(ap, qc->cdb, qc->dev->cdb_len, 1);
4002 if (qc->tf.protocol == ATA_PROT_ATAPI_DMA)
4003 ap->ops->bmdma_start(qc); /* initiate bmdma */
4004 spin_unlock_irqrestore(&ap->host_set->lock, flags);
4005 } else {
4006 ata_data_xfer(ap, qc->cdb, qc->dev->cdb_len, 1);
4007
4008 /* PIO commands are handled by polling */
4009 ap->hsm_task_state = HSM_ST;
c91af2c8 4010 ata_port_queue_task(ap, ata_pio_task, qc, 0);
8061f5f0
TH		 4011 }
4012
4013 return;
4014
4015err_out:
4016 ata_poll_qc_complete(qc);
4017}
4018
1da177e4
LT		 4019/**
4020 * ata_qc_new - Request an available ATA command, for queueing
4021 * @ap: Port associated with device @dev
4022 * @dev: Device from whom we request an available command structure
4023 *
4024 * LOCKING:
0cba632b 4025 * None.
1da177e4
LT		 4026 */
4027
4028static struct ata_queued_cmd *ata_qc_new(struct ata_port *ap)
4029{
4030 struct ata_queued_cmd *qc = NULL;
4031 unsigned int i;
4032
4033 for (i = 0; i < ATA_MAX_QUEUE; i++)
4034 if (!test_and_set_bit(i, &ap->qactive)) {
4035 qc = ata_qc_from_tag(ap, i);
4036 break;
4037 }
4038
4039 if (qc)
4040 qc->tag = i;
4041
4042 return qc;
4043}
4044
4045/**
4046 * ata_qc_new_init - Request an available ATA command, and initialize it
4047 * @ap: Port associated with device @dev
4048 * @dev: Device from whom we request an available command structure
4049 *
4050 * LOCKING:
0cba632b 4051 * None.
1da177e4
LT		 4052 */
4053
4054struct ata_queued_cmd *ata_qc_new_init(struct ata_port *ap,
4055 struct ata_device *dev)
4056{
4057 struct ata_queued_cmd *qc;
4058
4059 qc = ata_qc_new(ap);
4060 if (qc) {
1da177e4
LT		 4061 qc->scsicmd = NULL;
4062 qc->ap = ap;
4063 qc->dev = dev;
1da177e4 4064
2c13b7ce 4065 ata_qc_reinit(qc);
1da177e4
LT		 4066 }
4067
4068 return qc;
4069}
4070
1da177e4
LT		 4071/**
4072 * ata_qc_free - free unused ata_queued_cmd
4073 * @qc: Command to complete
4074 *
4075 * Designed to free unused ata_queued_cmd object
4076 * in case something prevents using it.
4077 *
4078 * LOCKING:
0cba632b 4079 * spin_lock_irqsave(host_set lock)
1da177e4
LT		 4080 */
4081void ata_qc_free(struct ata_queued_cmd *qc)
4082{
4ba946e9
TH		 4083 struct ata_port *ap = qc->ap;
4084 unsigned int tag;
4085
a4631474 4086 WARN_ON(qc == NULL); /* ata_qc_from_tag _might_ return NULL */
1da177e4 4087
4ba946e9
TH		 4088 qc->flags = 0;
4089 tag = qc->tag;
4090 if (likely(ata_tag_valid(tag))) {
4ba946e9
TH		 4091 qc->tag = ATA_TAG_POISON;
4092 clear_bit(tag, &ap->qactive);
4093 }
1da177e4
LT		 4094}
4095
76014427 4096void __ata_qc_complete(struct ata_queued_cmd *qc)
1da177e4 4097{
a4631474
TH		 4098 WARN_ON(qc == NULL); /* ata_qc_from_tag _might_ return NULL */
4099 WARN_ON(!(qc->flags & ATA_QCFLAG_ACTIVE));
1da177e4
LT		 4100
4101 if (likely(qc->flags & ATA_QCFLAG_DMAMAP))
4102 ata_sg_clean(qc);
4103
7401abf2
TH		 4104 /* command should be marked inactive atomically with qc completion */
4105 qc->ap->active_tag = ATA_TAG_POISON;
4106
3f3791d3
AL		 4107 /* atapi: mark qc as inactive to prevent the interrupt handler
4108 * from completing the command twice later, before the error handler
4109 * is called. (when rc != 0 and atapi request sense is needed)
4110 */
4111 qc->flags &= ~ATA_QCFLAG_ACTIVE;
4112
1da177e4 4113 /* call completion callback */
77853bf2 4114 qc->complete_fn(qc);
1da177e4
LT		 4115}
4116
4117static inline int ata_should_dma_map(struct ata_queued_cmd *qc)
4118{
4119 struct ata_port *ap = qc->ap;
4120
4121 switch (qc->tf.protocol) {
4122 case ATA_PROT_DMA:
4123 case ATA_PROT_ATAPI_DMA:
4124 return 1;
4125
4126 case ATA_PROT_ATAPI:
4127 case ATA_PROT_PIO:
1da177e4
LT		 4128 if (ap->flags & ATA_FLAG_PIO_DMA)
4129 return 1;
4130
4131 /* fall through */
4132
4133 default:
4134 return 0;
4135 }
4136
4137 /* never reached */
4138}
4139
4140/**
4141 * ata_qc_issue - issue taskfile to device
4142 * @qc: command to issue to device
4143 *
4144 * Prepare an ATA command to submission to device.
4145 * This includes mapping the data into a DMA-able
4146 * area, filling in the S/G table, and finally
4147 * writing the taskfile to hardware, starting the command.
4148 *
4149 * LOCKING:
4150 * spin_lock_irqsave(host_set lock)
1da177e4 4151 */
8e0e694a 4152void ata_qc_issue(struct ata_queued_cmd *qc)
1da177e4
LT		 4153{
4154 struct ata_port *ap = qc->ap;
4155
e4a70e76
TH		 4156 qc->ap->active_tag = qc->tag;
4157 qc->flags |= ATA_QCFLAG_ACTIVE;
4158
1da177e4
LT		 4159 if (ata_should_dma_map(qc)) {
4160 if (qc->flags & ATA_QCFLAG_SG) {
4161 if (ata_sg_setup(qc))
8e436af9 4162 goto sg_err;
1da177e4
LT		 4163 } else if (qc->flags & ATA_QCFLAG_SINGLE) {
4164 if (ata_sg_setup_one(qc))
8e436af9 4165 goto sg_err;
1da177e4
LT		 4166 }
4167 } else {
4168 qc->flags &= ~ATA_QCFLAG_DMAMAP;
4169 }
4170
4171 ap->ops->qc_prep(qc);
4172
8e0e694a
TH		 4173 qc->err_mask |= ap->ops->qc_issue(qc);
4174 if (unlikely(qc->err_mask))
4175 goto err;
4176 return;
1da177e4 4177
8e436af9
TH		 4178sg_err:
4179 qc->flags &= ~ATA_QCFLAG_DMAMAP;
8e0e694a
TH		 4180 qc->err_mask |= AC_ERR_SYSTEM;
4181err:
4182 ata_qc_complete(qc);
1da177e4
LT		 4183}
4184
4185/**
4186 * ata_qc_issue_prot - issue taskfile to device in proto-dependent manner
4187 * @qc: command to issue to device
4188 *
4189 * Using various libata functions and hooks, this function
4190 * starts an ATA command. ATA commands are grouped into
4191 * classes called "protocols", and issuing each type of protocol
4192 * is slightly different.
4193 *
0baab86b
EF		 4194 * May be used as the qc_issue() entry in ata_port_operations.
4195 *
1da177e4
LT		 4196 * LOCKING:
4197 * spin_lock_irqsave(host_set lock)
4198 *
4199 * RETURNS:
9a3d9eb0 4200 * Zero on success, AC_ERR_* mask on failure
1da177e4
LT		 4201 */
4202
9a3d9eb0 4203unsigned int ata_qc_issue_prot(struct ata_queued_cmd *qc)
1da177e4
LT		 4204{
4205 struct ata_port *ap = qc->ap;
4206
4207 ata_dev_select(ap, qc->dev->devno, 1, 0);
4208
4209 switch (qc->tf.protocol) {
4210 case ATA_PROT_NODATA:
e5338254 4211 ata_tf_to_host(ap, &qc->tf);
1da177e4
LT		 4212 break;
4213
4214 case ATA_PROT_DMA:
4215 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
4216 ap->ops->bmdma_setup(qc); /* set up bmdma */
4217 ap->ops->bmdma_start(qc); /* initiate bmdma */
4218 break;
4219
4220 case ATA_PROT_PIO: /* load tf registers, initiate polling pio */
4221 ata_qc_set_polling(qc);
e5338254 4222 ata_tf_to_host(ap, &qc->tf);
14be71f4 4223 ap->hsm_task_state = HSM_ST;
c91af2c8 4224 ata_port_queue_task(ap, ata_pio_task, qc, 0);
1da177e4
LT		 4225 break;
4226
4227 case ATA_PROT_ATAPI:
4228 ata_qc_set_polling(qc);
e5338254 4229 ata_tf_to_host(ap, &qc->tf);
c91af2c8 4230 ata_port_queue_task(ap, atapi_packet_task, qc, 0);
1da177e4
LT		 4231 break;
4232
4233 case ATA_PROT_ATAPI_NODATA:
c1389503 4234 ap->flags |= ATA_FLAG_NOINTR;
e5338254 4235 ata_tf_to_host(ap, &qc->tf);
c91af2c8 4236 ata_port_queue_task(ap, atapi_packet_task, qc, 0);
1da177e4
LT		 4237 break;
4238
4239 case ATA_PROT_ATAPI_DMA:
c1389503 4240 ap->flags |= ATA_FLAG_NOINTR;
1da177e4
LT		 4241 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
4242 ap->ops->bmdma_setup(qc); /* set up bmdma */
c91af2c8 4243 ata_port_queue_task(ap, atapi_packet_task, qc, 0);
1da177e4
LT		 4244 break;
4245
4246 default:
4247 WARN_ON(1);
9a3d9eb0 4248 return AC_ERR_SYSTEM;
1da177e4
LT		 4249 }
4250
4251 return 0;
4252}
4253
1da177e4
LT		 4254/**
4255 * ata_host_intr - Handle host interrupt for given (port, task)
4256 * @ap: Port on which interrupt arrived (possibly...)
4257 * @qc: Taskfile currently active in engine
4258 *
4259 * Handle host interrupt for given queued command. Currently,
4260 * only DMA interrupts are handled. All other commands are
4261 * handled via polling with interrupts disabled (nIEN bit).
4262 *
4263 * LOCKING:
4264 * spin_lock_irqsave(host_set lock)
4265 *
4266 * RETURNS:
4267 * One if interrupt was handled, zero if not (shared irq).
4268 */
4269
4270inline unsigned int ata_host_intr (struct ata_port *ap,
4271 struct ata_queued_cmd *qc)
4272{
4273 u8 status, host_stat;
4274
4275 switch (qc->tf.protocol) {
4276
4277 case ATA_PROT_DMA:
4278 case ATA_PROT_ATAPI_DMA:
4279 case ATA_PROT_ATAPI:
4280 /* check status of DMA engine */
4281 host_stat = ap->ops->bmdma_status(ap);
4282 VPRINTK("ata%u: host_stat 0x%X\n", ap->id, host_stat);
4283
4284 /* if it's not our irq... */
4285 if (!(host_stat & ATA_DMA_INTR))
4286 goto idle_irq;
4287
4288 /* before we do anything else, clear DMA-Start bit */
b73fc89f 4289 ap->ops->bmdma_stop(qc);
1da177e4
LT		 4290
4291 /* fall through */
4292
4293 case ATA_PROT_ATAPI_NODATA:
4294 case ATA_PROT_NODATA:
4295 /* check altstatus */
4296 status = ata_altstatus(ap);
4297 if (status & ATA_BUSY)
4298 goto idle_irq;
4299
4300 /* check main status, clearing INTRQ */
4301 status = ata_chk_status(ap);
4302 if (unlikely(status & ATA_BUSY))
4303 goto idle_irq;
4304 DPRINTK("ata%u: protocol %d (dev_stat 0x%X)\n",
4305 ap->id, qc->tf.protocol, status);
4306
4307 /* ack bmdma irq events */
4308 ap->ops->irq_clear(ap);
4309
4310 /* complete taskfile transaction */
a22e2eb0
AL		 4311 qc->err_mask |= ac_err_mask(status);
4312 ata_qc_complete(qc);
1da177e4
LT		 4313 break;
4314
4315 default:
4316 goto idle_irq;
4317 }
4318
4319 return 1; /* irq handled */
4320
4321idle_irq:
4322 ap->stats.idle_irq++;
4323
4324#ifdef ATA_IRQ_TRAP
4325 if ((ap->stats.idle_irq % 1000) == 0) {
1da177e4
LT		 4326 ata_irq_ack(ap, 0); /* debug trap */
4327 printk(KERN_WARNING "ata%d: irq trap\n", ap->id);
23cfce89 4328 return 1;
1da177e4
LT		 4329 }
4330#endif
4331 return 0; /* irq not handled */
4332}
4333
4334/**
4335 * ata_interrupt - Default ATA host interrupt handler
0cba632b
JG		 4336 * @irq: irq line (unused)
4337 * @dev_instance: pointer to our ata_host_set information structure
1da177e4
LT		 4338 * @regs: unused
4339 *
0cba632b
JG		 4340 * Default interrupt handler for PCI IDE devices. Calls
4341 * ata_host_intr() for each port that is not disabled.
4342 *
1da177e4 4343 * LOCKING:
0cba632b 4344 * Obtains host_set lock during operation.
1da177e4
LT		 4345 *
4346 * RETURNS:
0cba632b 4347 * IRQ_NONE or IRQ_HANDLED.
1da177e4
LT		 4348 */
4349
4350irqreturn_t ata_interrupt (int irq, void *dev_instance, struct pt_regs *regs)
4351{
4352 struct ata_host_set *host_set = dev_instance;
4353 unsigned int i;
4354 unsigned int handled = 0;
4355 unsigned long flags;
4356
4357 /* TODO: make _irqsave conditional on x86 PCI IDE legacy mode */
4358 spin_lock_irqsave(&host_set->lock, flags);
4359
4360 for (i = 0; i < host_set->n_ports; i++) {
4361 struct ata_port *ap;
4362
4363 ap = host_set->ports[i];
c1389503 4364 if (ap &&
198e0fed 4365 !(ap->flags & (ATA_FLAG_DISABLED | ATA_FLAG_NOINTR))) {
1da177e4
LT		 4366 struct ata_queued_cmd *qc;
4367
4368 qc = ata_qc_from_tag(ap, ap->active_tag);
21b1ed74
AL		 4369 if (qc && (!(qc->tf.ctl & ATA_NIEN)) &&
4370 (qc->flags & ATA_QCFLAG_ACTIVE))
1da177e4
LT		 4371 handled |= ata_host_intr(ap, qc);
4372 }
4373 }
4374
4375 spin_unlock_irqrestore(&host_set->lock, flags);
4376
4377 return IRQ_RETVAL(handled);
4378}
4379
0baab86b 4380
9b847548
JA		 4381/*
4382 * Execute a 'simple' command, that only consists of the opcode 'cmd' itself,
4383 * without filling any other registers
4384 */
4385static int ata_do_simple_cmd(struct ata_port *ap, struct ata_device *dev,
4386 u8 cmd)
4387{
4388 struct ata_taskfile tf;
4389 int err;
4390
4391 ata_tf_init(ap, &tf, dev->devno);
4392
4393 tf.command = cmd;
4394 tf.flags |= ATA_TFLAG_DEVICE;
4395 tf.protocol = ATA_PROT_NODATA;
4396
d69cf37d 4397 err = ata_exec_internal(ap, dev, &tf, NULL, DMA_NONE, NULL, 0);
9b847548
JA		 4398 if (err)
4399 printk(KERN_ERR "%s: ata command failed: %d\n",
4400 __FUNCTION__, err);
4401
4402 return err;
4403}
4404
4405static int ata_flush_cache(struct ata_port *ap, struct ata_device *dev)
4406{
4407 u8 cmd;
4408
4409 if (!ata_try_flush_cache(dev))
4410 return 0;
4411
4412 if (ata_id_has_flush_ext(dev->id))
4413 cmd = ATA_CMD_FLUSH_EXT;
4414 else
4415 cmd = ATA_CMD_FLUSH;
4416
4417 return ata_do_simple_cmd(ap, dev, cmd);
4418}
4419
4420static int ata_standby_drive(struct ata_port *ap, struct ata_device *dev)
4421{
4422 return ata_do_simple_cmd(ap, dev, ATA_CMD_STANDBYNOW1);
4423}
4424
4425static int ata_start_drive(struct ata_port *ap, struct ata_device *dev)
4426{
4427 return ata_do_simple_cmd(ap, dev, ATA_CMD_IDLEIMMEDIATE);
4428}
4429
4430/**
4431 * ata_device_resume - wakeup a previously suspended devices
c893a3ae
RD		 4432 * @ap: port the device is connected to
4433 * @dev: the device to resume
9b847548
JA		 4434 *
4435 * Kick the drive back into action, by sending it an idle immediate
4436 * command and making sure its transfer mode matches between drive
4437 * and host.
4438 *
4439 */
4440int ata_device_resume(struct ata_port *ap, struct ata_device *dev)
4441{
4442 if (ap->flags & ATA_FLAG_SUSPENDED) {
e82cbdb9 4443 struct ata_device *failed_dev;
9b847548 4444 ap->flags &= ~ATA_FLAG_SUSPENDED;
e82cbdb9
TH		 4445 while (ata_set_mode(ap, &failed_dev))
4446 ata_dev_disable(ap, failed_dev);
9b847548 4447 }
e1211e3f 4448 if (!ata_dev_enabled(dev))
9b847548
JA		 4449 return 0;
4450 if (dev->class == ATA_DEV_ATA)
4451 ata_start_drive(ap, dev);
4452
4453 return 0;
4454}
4455
4456/**
4457 * ata_device_suspend - prepare a device for suspend
c893a3ae
RD		 4458 * @ap: port the device is connected to
4459 * @dev: the device to suspend
9b847548
JA		 4460 *
4461 * Flush the cache on the drive, if appropriate, then issue a
4462 * standbynow command.
9b847548 4463 */
082776e4 4464int ata_device_suspend(struct ata_port *ap, struct ata_device *dev, pm_message_t state)
9b847548 4465{
e1211e3f 4466 if (!ata_dev_enabled(dev))
9b847548
JA		 4467 return 0;
4468 if (dev->class == ATA_DEV_ATA)
4469 ata_flush_cache(ap, dev);
4470
082776e4
NC		 4471 if (state.event != PM_EVENT_FREEZE)
4472 ata_standby_drive(ap, dev);
9b847548
JA		 4473 ap->flags |= ATA_FLAG_SUSPENDED;
4474 return 0;
4475}
4476
c893a3ae
RD		 4477/**
4478 * ata_port_start - Set port up for dma.
4479 * @ap: Port to initialize
4480 *
4481 * Called just after data structures for each port are
4482 * initialized. Allocates space for PRD table.
4483 *
4484 * May be used as the port_start() entry in ata_port_operations.
4485 *
4486 * LOCKING:
4487 * Inherited from caller.
4488 */
4489
1da177e4
LT		 4490int ata_port_start (struct ata_port *ap)
4491{
2f1f610b 4492 struct device *dev = ap->dev;
6037d6bb 4493 int rc;
1da177e4
LT		 4494
4495 ap->prd = dma_alloc_coherent(dev, ATA_PRD_TBL_SZ, &ap->prd_dma, GFP_KERNEL);
4496 if (!ap->prd)
4497 return -ENOMEM;
4498
6037d6bb
JG		 4499 rc = ata_pad_alloc(ap, dev);
4500 if (rc) {
cedc9a47 4501 dma_free_coherent(dev, ATA_PRD_TBL_SZ, ap->prd, ap->prd_dma);
6037d6bb 4502 return rc;
cedc9a47
JG		 4503 }
4504
1da177e4
LT		 4505 DPRINTK("prd alloc, virt %p, dma %llx\n", ap->prd, (unsigned long long) ap->prd_dma);
4506
4507 return 0;
4508}
4509
0baab86b
EF		 4510
4511/**
4512 * ata_port_stop - Undo ata_port_start()
4513 * @ap: Port to shut down
4514 *
4515 * Frees the PRD table.
4516 *
4517 * May be used as the port_stop() entry in ata_port_operations.
4518 *
4519 * LOCKING:
6f0ef4fa 4520 * Inherited from caller.
0baab86b
EF		 4521 */
4522
1da177e4
LT		 4523void ata_port_stop (struct ata_port *ap)
4524{
2f1f610b 4525 struct device *dev = ap->dev;
1da177e4
LT		 4526
4527 dma_free_coherent(dev, ATA_PRD_TBL_SZ, ap->prd, ap->prd_dma);
6037d6bb 4528 ata_pad_free(ap, dev);
1da177e4
LT		 4529}
4530
aa8f0dc6
JG		 4531void ata_host_stop (struct ata_host_set *host_set)
4532{
4533 if (host_set->mmio_base)
4534 iounmap(host_set->mmio_base);
4535}
4536
4537
1da177e4
LT		 4538/**
4539 * ata_host_remove - Unregister SCSI host structure with upper layers
4540 * @ap: Port to unregister
4541 * @do_unregister: 1 if we fully unregister, 0 to just stop the port
4542 *
4543 * LOCKING:
6f0ef4fa 4544 * Inherited from caller.
1da177e4
LT		 4545 */
4546
4547static void ata_host_remove(struct ata_port *ap, unsigned int do_unregister)
4548{
4549 struct Scsi_Host *sh = ap->host;
4550
4551 DPRINTK("ENTER\n");
4552
4553 if (do_unregister)
4554 scsi_remove_host(sh);
4555
4556 ap->ops->port_stop(ap);
4557}
4558
4559/**
4560 * ata_host_init - Initialize an ata_port structure
4561 * @ap: Structure to initialize
4562 * @host: associated SCSI mid-layer structure
4563 * @host_set: Collection of hosts to which @ap belongs
4564 * @ent: Probe information provided by low-level driver
4565 * @port_no: Port number associated with this ata_port
4566 *
0cba632b
JG		 4567 * Initialize a new ata_port structure, and its associated
4568 * scsi_host.
4569 *
1da177e4 4570 * LOCKING:
0cba632b 4571 * Inherited from caller.
1da177e4
LT		 4572 */
4573
4574static void ata_host_init(struct ata_port *ap, struct Scsi_Host *host,
4575 struct ata_host_set *host_set,
057ace5e 4576 const struct ata_probe_ent *ent, unsigned int port_no)
1da177e4
LT		 4577{
4578 unsigned int i;
4579
4580 host->max_id = 16;
4581 host->max_lun = 1;
4582 host->max_channel = 1;
4583 host->unique_id = ata_unique_id++;
4584 host->max_cmd_len = 12;
12413197 4585
198e0fed 4586 ap->flags = ATA_FLAG_DISABLED;
1da177e4
LT		 4587 ap->id = host->unique_id;
4588 ap->host = host;
4589 ap->ctl = ATA_DEVCTL_OBS;
4590 ap->host_set = host_set;
2f1f610b 4591 ap->dev = ent->dev;
1da177e4
LT		 4592 ap->port_no = port_no;
4593 ap->hard_port_no =
4594 ent->legacy_mode ? ent->hard_port_no : port_no;
4595 ap->pio_mask = ent->pio_mask;
4596 ap->mwdma_mask = ent->mwdma_mask;
4597 ap->udma_mask = ent->udma_mask;
4598 ap->flags |= ent->host_flags;
4599 ap->ops = ent->port_ops;
4600 ap->cbl = ATA_CBL_NONE;
1c3fae4d 4601 ap->sata_spd_limit = UINT_MAX;
1da177e4
LT		 4602 ap->active_tag = ATA_TAG_POISON;
4603 ap->last_ctl = 0xFF;
4604
86e45b6b 4605 INIT_WORK(&ap->port_task, NULL, NULL);
a72ec4ce 4606 INIT_LIST_HEAD(&ap->eh_done_q);
1da177e4 4607
acf356b1
TH		 4608 for (i = 0; i < ATA_MAX_DEVICES; i++) {
4609 struct ata_device *dev = &ap->device[i];
4610 dev->devno = i;
4611 dev->pio_mask = UINT_MAX;
4612 dev->mwdma_mask = UINT_MAX;
4613 dev->udma_mask = UINT_MAX;
4614 }
1da177e4
LT		 4615
4616#ifdef ATA_IRQ_TRAP
4617 ap->stats.unhandled_irq = 1;
4618 ap->stats.idle_irq = 1;
4619#endif
4620
4621 memcpy(&ap->ioaddr, &ent->port[port_no], sizeof(struct ata_ioports));
4622}
4623
4624/**
4625 * ata_host_add - Attach low-level ATA driver to system
4626 * @ent: Information provided by low-level driver
4627 * @host_set: Collections of ports to which we add
4628 * @port_no: Port number associated with this host
4629 *
0cba632b
JG		 4630 * Attach low-level ATA driver to system.
4631 *
1da177e4 4632 * LOCKING:
0cba632b 4633 * PCI/etc. bus probe sem.
1da177e4
LT		 4634 *
4635 * RETURNS:
0cba632b 4636 * New ata_port on success, for NULL on error.
1da177e4
LT		 4637 */
4638
057ace5e 4639static struct ata_port * ata_host_add(const struct ata_probe_ent *ent,
1da177e4
LT		 4640 struct ata_host_set *host_set,
4641 unsigned int port_no)
4642{
4643 struct Scsi_Host *host;
4644 struct ata_port *ap;
4645 int rc;
4646
4647 DPRINTK("ENTER\n");
aec5c3c1
TH		 4648
4649 if (!ent->port_ops->probe_reset &&
4650 !(ent->host_flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST))) {
4651 printk(KERN_ERR "ata%u: no reset mechanism available\n",
4652 port_no);
4653 return NULL;
4654 }
4655
1da177e4
LT		 4656 host = scsi_host_alloc(ent->sht, sizeof(struct ata_port));
4657 if (!host)
4658 return NULL;
4659
30afc84c
TH		 4660 host->transportt = &ata_scsi_transport_template;
4661
35bb94b1 4662 ap = ata_shost_to_port(host);
1da177e4
LT		 4663
4664 ata_host_init(ap, host, host_set, ent, port_no);
4665
4666 rc = ap->ops->port_start(ap);
4667 if (rc)
4668 goto err_out;
4669
4670 return ap;
4671
4672err_out:
4673 scsi_host_put(host);
4674 return NULL;
4675}
4676
4677/**
0cba632b
JG		 4678 * ata_device_add - Register hardware device with ATA and SCSI layers
4679 * @ent: Probe information describing hardware device to be registered
4680 *
4681 * This function processes the information provided in the probe
4682 * information struct @ent, allocates the necessary ATA and SCSI
4683 * host information structures, initializes them, and registers
4684 * everything with requisite kernel subsystems.
4685 *
4686 * This function requests irqs, probes the ATA bus, and probes
4687 * the SCSI bus.
1da177e4
LT		 4688 *
4689 * LOCKING:
0cba632b 4690 * PCI/etc. bus probe sem.
1da177e4
LT		 4691 *
4692 * RETURNS:
0cba632b 4693 * Number of ports registered. Zero on error (no ports registered).
1da177e4
LT		 4694 */
4695
057ace5e 4696int ata_device_add(const struct ata_probe_ent *ent)
1da177e4
LT		 4697{
4698 unsigned int count = 0, i;
4699 struct device *dev = ent->dev;
4700 struct ata_host_set *host_set;
4701
4702 DPRINTK("ENTER\n");
4703 /* alloc a container for our list of ATA ports (buses) */
57f3bda8 4704 host_set = kzalloc(sizeof(struct ata_host_set) +
1da177e4
LT		 4705 (ent->n_ports * sizeof(void *)), GFP_KERNEL);
4706 if (!host_set)
4707 return 0;
1da177e4
LT		 4708 spin_lock_init(&host_set->lock);
4709
4710 host_set->dev = dev;
4711 host_set->n_ports = ent->n_ports;
4712 host_set->irq = ent->irq;
4713 host_set->mmio_base = ent->mmio_base;
4714 host_set->private_data = ent->private_data;
4715 host_set->ops = ent->port_ops;
5444a6f4 4716 host_set->flags = ent->host_set_flags;
1da177e4
LT		 4717
4718 /* register each port bound to this device */
4719 for (i = 0; i < ent->n_ports; i++) {
4720 struct ata_port *ap;
4721 unsigned long xfer_mode_mask;
4722
4723 ap = ata_host_add(ent, host_set, i);
4724 if (!ap)
4725 goto err_out;
4726
4727 host_set->ports[i] = ap;
4728 xfer_mode_mask =(ap->udma_mask << ATA_SHIFT_UDMA) |
4729 (ap->mwdma_mask << ATA_SHIFT_MWDMA) |
4730 (ap->pio_mask << ATA_SHIFT_PIO);
4731
4732 /* print per-port info to dmesg */
4733 printk(KERN_INFO "ata%u: %cATA max %s cmd 0x%lX ctl 0x%lX "
4734 "bmdma 0x%lX irq %lu\n",
4735 ap->id,
4736 ap->flags & ATA_FLAG_SATA ? 'S' : 'P',
4737 ata_mode_string(xfer_mode_mask),
4738 ap->ioaddr.cmd_addr,
4739 ap->ioaddr.ctl_addr,
4740 ap->ioaddr.bmdma_addr,
4741 ent->irq);
4742
4743 ata_chk_status(ap);
4744 host_set->ops->irq_clear(ap);
4745 count++;
4746 }
4747
57f3bda8
RD		 4748 if (!count)
4749 goto err_free_ret;
1da177e4
LT		 4750
4751 /* obtain irq, that is shared between channels */
4752 if (request_irq(ent->irq, ent->port_ops->irq_handler, ent->irq_flags,
4753 DRV_NAME, host_set))
4754 goto err_out;
4755
4756 /* perform each probe synchronously */
4757 DPRINTK("probe begin\n");
4758 for (i = 0; i < count; i++) {
4759 struct ata_port *ap;
4760 int rc;
4761
4762 ap = host_set->ports[i];
4763
c893a3ae 4764 DPRINTK("ata%u: bus probe begin\n", ap->id);
1da177e4 4765 rc = ata_bus_probe(ap);
c893a3ae 4766 DPRINTK("ata%u: bus probe end\n", ap->id);
1da177e4
LT		 4767
4768 if (rc) {
4769 /* FIXME: do something useful here?
4770 * Current libata behavior will
4771 * tear down everything when
4772 * the module is removed
4773 * or the h/w is unplugged.
4774 */
4775 }
4776
4777 rc = scsi_add_host(ap->host, dev);
4778 if (rc) {
4779 printk(KERN_ERR "ata%u: scsi_add_host failed\n",
4780 ap->id);
4781 /* FIXME: do something useful here */
4782 /* FIXME: handle unconditional calls to
4783 * scsi_scan_host and ata_host_remove, below,
4784 * at the very least
4785 */
4786 }
4787 }
4788
4789 /* probes are done, now scan each port's disk(s) */
c893a3ae 4790 DPRINTK("host probe begin\n");
1da177e4
LT		 4791 for (i = 0; i < count; i++) {
4792 struct ata_port *ap = host_set->ports[i];
4793
644dd0cc 4794 ata_scsi_scan_host(ap);
1da177e4
LT		 4795 }
4796
4797 dev_set_drvdata(dev, host_set);
4798
4799 VPRINTK("EXIT, returning %u\n", ent->n_ports);
4800 return ent->n_ports; /* success */
4801
4802err_out:
4803 for (i = 0; i < count; i++) {
4804 ata_host_remove(host_set->ports[i], 1);
4805 scsi_host_put(host_set->ports[i]->host);
4806 }
57f3bda8 4807err_free_ret:
1da177e4
LT		 4808 kfree(host_set);
4809 VPRINTK("EXIT, returning 0\n");
4810 return 0;
4811}
4812
17b14451
AC		 4813/**
4814 * ata_host_set_remove - PCI layer callback for device removal
4815 * @host_set: ATA host set that was removed
4816 *
2e9edbf8 4817 * Unregister all objects associated with this host set. Free those
17b14451
AC		 4818 * objects.
4819 *
4820 * LOCKING:
4821 * Inherited from calling layer (may sleep).
4822 */
4823
17b14451
AC		 4824void ata_host_set_remove(struct ata_host_set *host_set)
4825{
4826 struct ata_port *ap;
4827 unsigned int i;
4828
4829 for (i = 0; i < host_set->n_ports; i++) {
4830 ap = host_set->ports[i];
4831 scsi_remove_host(ap->host);
4832 }
4833
4834 free_irq(host_set->irq, host_set);
4835
4836 for (i = 0; i < host_set->n_ports; i++) {
4837 ap = host_set->ports[i];
4838
4839 ata_scsi_release(ap->host);
4840
4841 if ((ap->flags & ATA_FLAG_NO_LEGACY) == 0) {
4842 struct ata_ioports *ioaddr = &ap->ioaddr;
4843
4844 if (ioaddr->cmd_addr == 0x1f0)
4845 release_region(0x1f0, 8);
4846 else if (ioaddr->cmd_addr == 0x170)
4847 release_region(0x170, 8);
4848 }
4849
4850 scsi_host_put(ap->host);
4851 }
4852
4853 if (host_set->ops->host_stop)
4854 host_set->ops->host_stop(host_set);
4855
4856 kfree(host_set);
4857}
4858
1da177e4
LT		 4859/**
4860 * ata_scsi_release - SCSI layer callback hook for host unload
4861 * @host: libata host to be unloaded
4862 *
4863 * Performs all duties necessary to shut down a libata port...
4864 * Kill port kthread, disable port, and release resources.
4865 *
4866 * LOCKING:
4867 * Inherited from SCSI layer.
4868 *
4869 * RETURNS:
4870 * One.
4871 */
4872
4873int ata_scsi_release(struct Scsi_Host *host)
4874{
35bb94b1 4875 struct ata_port *ap = ata_shost_to_port(host);
d9572b1d 4876 int i;
1da177e4
LT		 4877
4878 DPRINTK("ENTER\n");
4879
4880 ap->ops->port_disable(ap);
4881 ata_host_remove(ap, 0);
d9572b1d
TH		 4882 for (i = 0; i < ATA_MAX_DEVICES; i++)
4883 kfree(ap->device[i].id);
1da177e4
LT		 4884
4885 DPRINTK("EXIT\n");
4886 return 1;
4887}
4888
4889/**
4890 * ata_std_ports - initialize ioaddr with standard port offsets.
4891 * @ioaddr: IO address structure to be initialized
0baab86b
EF		 4892 *
4893 * Utility function which initializes data_addr, error_addr,
4894 * feature_addr, nsect_addr, lbal_addr, lbam_addr, lbah_addr,
4895 * device_addr, status_addr, and command_addr to standard offsets
4896 * relative to cmd_addr.
4897 *
4898 * Does not set ctl_addr, altstatus_addr, bmdma_addr, or scr_addr.
1da177e4 4899 */
0baab86b 4900
1da177e4
LT		 4901void ata_std_ports(struct ata_ioports *ioaddr)
4902{
4903 ioaddr->data_addr = ioaddr->cmd_addr + ATA_REG_DATA;
4904 ioaddr->error_addr = ioaddr->cmd_addr + ATA_REG_ERR;
4905 ioaddr->feature_addr = ioaddr->cmd_addr + ATA_REG_FEATURE;
4906 ioaddr->nsect_addr = ioaddr->cmd_addr + ATA_REG_NSECT;
4907 ioaddr->lbal_addr = ioaddr->cmd_addr + ATA_REG_LBAL;
4908 ioaddr->lbam_addr = ioaddr->cmd_addr + ATA_REG_LBAM;
4909 ioaddr->lbah_addr = ioaddr->cmd_addr + ATA_REG_LBAH;
4910 ioaddr->device_addr = ioaddr->cmd_addr + ATA_REG_DEVICE;
4911 ioaddr->status_addr = ioaddr->cmd_addr + ATA_REG_STATUS;
4912 ioaddr->command_addr = ioaddr->cmd_addr + ATA_REG_CMD;
4913}
4914
0baab86b 4915
374b1873
JG		 4916#ifdef CONFIG_PCI
4917
4918void ata_pci_host_stop (struct ata_host_set *host_set)
4919{
4920 struct pci_dev *pdev = to_pci_dev(host_set->dev);
4921
4922 pci_iounmap(pdev, host_set->mmio_base);
4923}
4924
1da177e4
LT		 4925/**
4926 * ata_pci_remove_one - PCI layer callback for device removal
4927 * @pdev: PCI device that was removed
4928 *
4929 * PCI layer indicates to libata via this hook that
6f0ef4fa 4930 * hot-unplug or module unload event has occurred.
1da177e4
LT		 4931 * Handle this by unregistering all objects associated
4932 * with this PCI device. Free those objects. Then finally
4933 * release PCI resources and disable device.
4934 *
4935 * LOCKING:
4936 * Inherited from PCI layer (may sleep).
4937 */
4938
4939void ata_pci_remove_one (struct pci_dev *pdev)
4940{
4941 struct device *dev = pci_dev_to_dev(pdev);
4942 struct ata_host_set *host_set = dev_get_drvdata(dev);
1da177e4 4943
17b14451 4944 ata_host_set_remove(host_set);
1da177e4
LT		 4945 pci_release_regions(pdev);
4946 pci_disable_device(pdev);
4947 dev_set_drvdata(dev, NULL);
4948}
4949
4950/* move to PCI subsystem */
057ace5e 4951int pci_test_config_bits(struct pci_dev *pdev, const struct pci_bits *bits)
1da177e4
LT		 4952{
4953 unsigned long tmp = 0;
4954
4955 switch (bits->width) {
4956 case 1: {
4957 u8 tmp8 = 0;
4958 pci_read_config_byte(pdev, bits->reg, &tmp8);
4959 tmp = tmp8;
4960 break;
4961 }
4962 case 2: {
4963 u16 tmp16 = 0;
4964 pci_read_config_word(pdev, bits->reg, &tmp16);
4965 tmp = tmp16;
4966 break;
4967 }
4968 case 4: {
4969 u32 tmp32 = 0;
4970 pci_read_config_dword(pdev, bits->reg, &tmp32);
4971 tmp = tmp32;
4972 break;
4973 }
4974
4975 default:
4976 return -EINVAL;
4977 }
4978
4979 tmp &= bits->mask;
4980
4981 return (tmp == bits->val) ? 1 : 0;
4982}
9b847548
JA		 4983
4984int ata_pci_device_suspend(struct pci_dev *pdev, pm_message_t state)
4985{
4986 pci_save_state(pdev);
4987 pci_disable_device(pdev);
4988 pci_set_power_state(pdev, PCI_D3hot);
4989 return 0;
4990}
4991
4992int ata_pci_device_resume(struct pci_dev *pdev)
4993{
4994 pci_set_power_state(pdev, PCI_D0);
4995 pci_restore_state(pdev);
4996 pci_enable_device(pdev);
4997 pci_set_master(pdev);
4998 return 0;
4999}
1da177e4
LT		 5000#endif /* CONFIG_PCI */
5001
5002
1da177e4
LT		 5003static int __init ata_init(void)
5004{
5005 ata_wq = create_workqueue("ata");
5006 if (!ata_wq)
5007 return -ENOMEM;
5008
5009 printk(KERN_DEBUG "libata version " DRV_VERSION " loaded.\n");
5010 return 0;
5011}
5012
5013static void __exit ata_exit(void)
5014{
5015 destroy_workqueue(ata_wq);
5016}
5017
5018module_init(ata_init);
5019module_exit(ata_exit);
5020
67846b30
JG		 5021static unsigned long ratelimit_time;
5022static spinlock_t ata_ratelimit_lock = SPIN_LOCK_UNLOCKED;
5023
5024int ata_ratelimit(void)
5025{
5026 int rc;
5027 unsigned long flags;
5028
5029 spin_lock_irqsave(&ata_ratelimit_lock, flags);
5030
5031 if (time_after(jiffies, ratelimit_time)) {
5032 rc = 1;
5033 ratelimit_time = jiffies + (HZ/5);
5034 } else
5035 rc = 0;
5036
5037 spin_unlock_irqrestore(&ata_ratelimit_lock, flags);
5038
5039 return rc;
5040}
5041
c22daff4
TH		 5042/**
5043 * ata_wait_register - wait until register value changes
5044 * @reg: IO-mapped register
5045 * @mask: Mask to apply to read register value
5046 * @val: Wait condition
5047 * @interval_msec: polling interval in milliseconds
5048 * @timeout_msec: timeout in milliseconds
5049 *
5050 * Waiting for some bits of register to change is a common
5051 * operation for ATA controllers. This function reads 32bit LE
5052 * IO-mapped register @reg and tests for the following condition.
5053 *
5054 * (*@reg & mask) != val
5055 *
5056 * If the condition is met, it returns; otherwise, the process is
5057 * repeated after @interval_msec until timeout.
5058 *
5059 * LOCKING:
5060 * Kernel thread context (may sleep)
5061 *
5062 * RETURNS:
5063 * The final register value.
5064 */
5065u32 ata_wait_register(void __iomem *reg, u32 mask, u32 val,
5066 unsigned long interval_msec,
5067 unsigned long timeout_msec)
5068{
5069 unsigned long timeout;
5070 u32 tmp;
5071
5072 tmp = ioread32(reg);
5073
5074 /* Calculate timeout _after_ the first read to make sure
5075 * preceding writes reach the controller before starting to
5076 * eat away the timeout.
5077 */
5078 timeout = jiffies + (timeout_msec * HZ) / 1000;
5079
5080 while ((tmp & mask) == val && time_before(jiffies, timeout)) {
5081 msleep(interval_msec);
5082 tmp = ioread32(reg);
5083 }
5084
5085 return tmp;
5086}
5087
1da177e4
LT		 5088/*
5089 * libata is essentially a library of internal helper functions for
5090 * low-level ATA host controller drivers. As such, the API/ABI is
5091 * likely to change as new drivers are added and updated.
5092 * Do not depend on ABI/API stability.
5093 */
5094
5095EXPORT_SYMBOL_GPL(ata_std_bios_param);
5096EXPORT_SYMBOL_GPL(ata_std_ports);
5097EXPORT_SYMBOL_GPL(ata_device_add);
17b14451 5098EXPORT_SYMBOL_GPL(ata_host_set_remove);
1da177e4
LT		 5099EXPORT_SYMBOL_GPL(ata_sg_init);
5100EXPORT_SYMBOL_GPL(ata_sg_init_one);
76014427 5101EXPORT_SYMBOL_GPL(__ata_qc_complete);
1da177e4 5102EXPORT_SYMBOL_GPL(ata_qc_issue_prot);
1da177e4
LT		 5103EXPORT_SYMBOL_GPL(ata_tf_load);
5104EXPORT_SYMBOL_GPL(ata_tf_read);
5105EXPORT_SYMBOL_GPL(ata_noop_dev_select);
5106EXPORT_SYMBOL_GPL(ata_std_dev_select);
5107EXPORT_SYMBOL_GPL(ata_tf_to_fis);
5108EXPORT_SYMBOL_GPL(ata_tf_from_fis);
5109EXPORT_SYMBOL_GPL(ata_check_status);
5110EXPORT_SYMBOL_GPL(ata_altstatus);
1da177e4
LT		 5111EXPORT_SYMBOL_GPL(ata_exec_command);
5112EXPORT_SYMBOL_GPL(ata_port_start);
5113EXPORT_SYMBOL_GPL(ata_port_stop);
aa8f0dc6 5114EXPORT_SYMBOL_GPL(ata_host_stop);
1da177e4
LT		 5115EXPORT_SYMBOL_GPL(ata_interrupt);
5116EXPORT_SYMBOL_GPL(ata_qc_prep);
e46834cd 5117EXPORT_SYMBOL_GPL(ata_noop_qc_prep);
1da177e4
LT		 5118EXPORT_SYMBOL_GPL(ata_bmdma_setup);
5119EXPORT_SYMBOL_GPL(ata_bmdma_start);
5120EXPORT_SYMBOL_GPL(ata_bmdma_irq_clear);
5121EXPORT_SYMBOL_GPL(ata_bmdma_status);
5122EXPORT_SYMBOL_GPL(ata_bmdma_stop);
5123EXPORT_SYMBOL_GPL(ata_port_probe);
3c567b7d 5124EXPORT_SYMBOL_GPL(sata_set_spd);
1da177e4
LT		 5125EXPORT_SYMBOL_GPL(sata_phy_reset);
5126EXPORT_SYMBOL_GPL(__sata_phy_reset);
5127EXPORT_SYMBOL_GPL(ata_bus_reset);
8a19ac89 5128EXPORT_SYMBOL_GPL(ata_std_probeinit);
c2bd5804
TH		 5129EXPORT_SYMBOL_GPL(ata_std_softreset);
5130EXPORT_SYMBOL_GPL(sata_std_hardreset);
5131EXPORT_SYMBOL_GPL(ata_std_postreset);
5132EXPORT_SYMBOL_GPL(ata_std_probe_reset);
a62c0fc5 5133EXPORT_SYMBOL_GPL(ata_drive_probe_reset);
623a3128 5134EXPORT_SYMBOL_GPL(ata_dev_revalidate);
2e9edbf8
JG		 5135EXPORT_SYMBOL_GPL(ata_dev_classify);
5136EXPORT_SYMBOL_GPL(ata_dev_pair);
1da177e4 5137EXPORT_SYMBOL_GPL(ata_port_disable);
67846b30 5138EXPORT_SYMBOL_GPL(ata_ratelimit);
c22daff4 5139EXPORT_SYMBOL_GPL(ata_wait_register);
6f8b9958 5140EXPORT_SYMBOL_GPL(ata_busy_sleep);
86e45b6b 5141EXPORT_SYMBOL_GPL(ata_port_queue_task);
1da177e4
LT		 5142EXPORT_SYMBOL_GPL(ata_scsi_ioctl);
5143EXPORT_SYMBOL_GPL(ata_scsi_queuecmd);
1da177e4
LT		 5144EXPORT_SYMBOL_GPL(ata_scsi_slave_config);
5145EXPORT_SYMBOL_GPL(ata_scsi_release);
5146EXPORT_SYMBOL_GPL(ata_host_intr);
6a62a04d
TH		 5147EXPORT_SYMBOL_GPL(ata_id_string);
5148EXPORT_SYMBOL_GPL(ata_id_c_string);
1da177e4
LT		 5149EXPORT_SYMBOL_GPL(ata_scsi_simulate);
5150
1bc4ccff 5151EXPORT_SYMBOL_GPL(ata_pio_need_iordy);
452503f9
AC		 5152EXPORT_SYMBOL_GPL(ata_timing_compute);
5153EXPORT_SYMBOL_GPL(ata_timing_merge);
5154
1da177e4
LT		 5155#ifdef CONFIG_PCI
5156EXPORT_SYMBOL_GPL(pci_test_config_bits);
374b1873 5157EXPORT_SYMBOL_GPL(ata_pci_host_stop);
1da177e4
LT		 5158EXPORT_SYMBOL_GPL(ata_pci_init_native_mode);
5159EXPORT_SYMBOL_GPL(ata_pci_init_one);
5160EXPORT_SYMBOL_GPL(ata_pci_remove_one);
9b847548
JA		 5161EXPORT_SYMBOL_GPL(ata_pci_device_suspend);
5162EXPORT_SYMBOL_GPL(ata_pci_device_resume);
67951ade
AC		 5163EXPORT_SYMBOL_GPL(ata_pci_default_filter);
5164EXPORT_SYMBOL_GPL(ata_pci_clear_simplex);
1da177e4 5165#endif /* CONFIG_PCI */
9b847548
JA		 5166
5167EXPORT_SYMBOL_GPL(ata_device_suspend);
5168EXPORT_SYMBOL_GPL(ata_device_resume);
5169EXPORT_SYMBOL_GPL(ata_scsi_device_suspend);
5170EXPORT_SYMBOL_GPL(ata_scsi_device_resume);
ece1d636 5171
ece1d636
TH		 5172EXPORT_SYMBOL_GPL(ata_eng_timeout);
5173EXPORT_SYMBOL_GPL(ata_eh_qc_complete);
5174EXPORT_SYMBOL_GPL(ata_eh_qc_retry);
Linux 6.x block layer and io_uring tree(s)