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[PATCH] libata: use local *id instead of dev->id in ata_dev_configure()
[linux-2.6-block.git] / drivers / scsi / libata-core.c
CommitLineData
1da177e4 1/*
af36d7f0
JG		 2 * libata-core.c - helper library for ATA
3 *
4 * Maintained by: Jeff Garzik <jgarzik@pobox.com>
5 * Please ALWAYS copy linux-ide@vger.kernel.org
6 * on emails.
7 *
8 * Copyright 2003-2004 Red Hat, Inc. All rights reserved.
9 * Copyright 2003-2004 Jeff Garzik
10 *
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2, or (at your option)
15 * any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; see the file COPYING. If not, write to
24 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
25 *
26 *
27 * libata documentation is available via 'make {ps|pdf}docs',
28 * as Documentation/DocBook/libata.*
29 *
30 * Hardware documentation available from http://www.t13.org/ and
31 * http://www.sata-io.org/
32 *
1da177e4
LT		 33 */
34
35#include <linux/config.h>
36#include <linux/kernel.h>
37#include <linux/module.h>
38#include <linux/pci.h>
39#include <linux/init.h>
40#include <linux/list.h>
41#include <linux/mm.h>
42#include <linux/highmem.h>
43#include <linux/spinlock.h>
44#include <linux/blkdev.h>
45#include <linux/delay.h>
46#include <linux/timer.h>
47#include <linux/interrupt.h>
48#include <linux/completion.h>
49#include <linux/suspend.h>
50#include <linux/workqueue.h>
67846b30 51#include <linux/jiffies.h>
378f058c 52#include <linux/scatterlist.h>
1da177e4 53#include <scsi/scsi.h>
1da177e4 54#include "scsi_priv.h"
193515d5 55#include <scsi/scsi_cmnd.h>
1da177e4
LT		 56#include <scsi/scsi_host.h>
57#include <linux/libata.h>
58#include <asm/io.h>
59#include <asm/semaphore.h>
60#include <asm/byteorder.h>
61
62#include "libata.h"
63
6aff8f1f
TH		 64static unsigned int ata_dev_init_params(struct ata_port *ap,
65 struct ata_device *dev);
1da177e4
LT		 66static void ata_set_mode(struct ata_port *ap);
67static void ata_dev_set_xfermode(struct ata_port *ap, struct ata_device *dev);
a6d5a51c
TH		 68static unsigned int ata_dev_xfermask(struct ata_port *ap,
69 struct ata_device *dev);
1da177e4
LT		 70
71static unsigned int ata_unique_id = 1;
72static struct workqueue_struct *ata_wq;
73
418dc1f5 74int atapi_enabled = 1;
1623c81e
JG		 75module_param(atapi_enabled, int, 0444);
76MODULE_PARM_DESC(atapi_enabled, "Enable discovery of ATAPI devices (0=off, 1=on)");
77
c3c013a2
JG		 78int libata_fua = 0;
79module_param_named(fua, libata_fua, int, 0444);
80MODULE_PARM_DESC(fua, "FUA support (0=off, 1=on)");
81
1da177e4
LT		 82MODULE_AUTHOR("Jeff Garzik");
83MODULE_DESCRIPTION("Library module for ATA devices");
84MODULE_LICENSE("GPL");
85MODULE_VERSION(DRV_VERSION);
86
0baab86b 87
1da177e4
LT		 88/**
89 * ata_tf_to_fis - Convert ATA taskfile to SATA FIS structure
90 * @tf: Taskfile to convert
91 * @fis: Buffer into which data will output
92 * @pmp: Port multiplier port
93 *
94 * Converts a standard ATA taskfile to a Serial ATA
95 * FIS structure (Register - Host to Device).
96 *
97 * LOCKING:
98 * Inherited from caller.
99 */
100
057ace5e 101void ata_tf_to_fis(const struct ata_taskfile *tf, u8 *fis, u8 pmp)
1da177e4
LT		 102{
103 fis[0] = 0x27; /* Register - Host to Device FIS */
104 fis[1] = (pmp & 0xf) | (1 << 7); /* Port multiplier number,
105 bit 7 indicates Command FIS */
106 fis[2] = tf->command;
107 fis[3] = tf->feature;
108
109 fis[4] = tf->lbal;
110 fis[5] = tf->lbam;
111 fis[6] = tf->lbah;
112 fis[7] = tf->device;
113
114 fis[8] = tf->hob_lbal;
115 fis[9] = tf->hob_lbam;
116 fis[10] = tf->hob_lbah;
117 fis[11] = tf->hob_feature;
118
119 fis[12] = tf->nsect;
120 fis[13] = tf->hob_nsect;
121 fis[14] = 0;
122 fis[15] = tf->ctl;
123
124 fis[16] = 0;
125 fis[17] = 0;
126 fis[18] = 0;
127 fis[19] = 0;
128}
129
130/**
131 * ata_tf_from_fis - Convert SATA FIS to ATA taskfile
132 * @fis: Buffer from which data will be input
133 * @tf: Taskfile to output
134 *
e12a1be6 135 * Converts a serial ATA FIS structure to a standard ATA taskfile.
1da177e4
LT		 136 *
137 * LOCKING:
138 * Inherited from caller.
139 */
140
057ace5e 141void ata_tf_from_fis(const u8 *fis, struct ata_taskfile *tf)
1da177e4
LT		 142{
143 tf->command = fis[2]; /* status */
144 tf->feature = fis[3]; /* error */
145
146 tf->lbal = fis[4];
147 tf->lbam = fis[5];
148 tf->lbah = fis[6];
149 tf->device = fis[7];
150
151 tf->hob_lbal = fis[8];
152 tf->hob_lbam = fis[9];
153 tf->hob_lbah = fis[10];
154
155 tf->nsect = fis[12];
156 tf->hob_nsect = fis[13];
157}
158
8cbd6df1
AL		 159static const u8 ata_rw_cmds[] = {
160 /* pio multi */
161 ATA_CMD_READ_MULTI,
162 ATA_CMD_WRITE_MULTI,
163 ATA_CMD_READ_MULTI_EXT,
164 ATA_CMD_WRITE_MULTI_EXT,
9a3dccc4
TH		 165 0,
166 0,
167 0,
168 ATA_CMD_WRITE_MULTI_FUA_EXT,
8cbd6df1
AL		 169 /* pio */
170 ATA_CMD_PIO_READ,
171 ATA_CMD_PIO_WRITE,
172 ATA_CMD_PIO_READ_EXT,
173 ATA_CMD_PIO_WRITE_EXT,
9a3dccc4
TH		 174 0,
175 0,
176 0,
177 0,
8cbd6df1
AL		 178 /* dma */
179 ATA_CMD_READ,
180 ATA_CMD_WRITE,
181 ATA_CMD_READ_EXT,
9a3dccc4
TH		 182 ATA_CMD_WRITE_EXT,
183 0,
184 0,
185 0,
186 ATA_CMD_WRITE_FUA_EXT
8cbd6df1 187};
1da177e4
LT		 188
189/**
8cbd6df1
AL		 190 * ata_rwcmd_protocol - set taskfile r/w commands and protocol
191 * @qc: command to examine and configure
1da177e4 192 *
8cbd6df1
AL		 193 * Examine the device configuration and tf->flags to calculate
194 * the proper read/write commands and protocol to use.
1da177e4
LT		 195 *
196 * LOCKING:
197 * caller.
198 */
9a3dccc4 199int ata_rwcmd_protocol(struct ata_queued_cmd *qc)
1da177e4 200{
8cbd6df1
AL		 201 struct ata_taskfile *tf = &qc->tf;
202 struct ata_device *dev = qc->dev;
9a3dccc4 203 u8 cmd;
1da177e4 204
9a3dccc4 205 int index, fua, lba48, write;
8cbd6df1 206
9a3dccc4 207 fua = (tf->flags & ATA_TFLAG_FUA) ? 4 : 0;
8cbd6df1
AL		 208 lba48 = (tf->flags & ATA_TFLAG_LBA48) ? 2 : 0;
209 write = (tf->flags & ATA_TFLAG_WRITE) ? 1 : 0;
1da177e4 210
8cbd6df1
AL		 211 if (dev->flags & ATA_DFLAG_PIO) {
212 tf->protocol = ATA_PROT_PIO;
9a3dccc4 213 index = dev->multi_count ? 0 : 8;
8d238e01
AC		 214 } else if (lba48 && (qc->ap->flags & ATA_FLAG_PIO_LBA48)) {
215 /* Unable to use DMA due to host limitation */
216 tf->protocol = ATA_PROT_PIO;
0565c26d 217 index = dev->multi_count ? 0 : 8;
8cbd6df1
AL		 218 } else {
219 tf->protocol = ATA_PROT_DMA;
9a3dccc4 220 index = 16;
8cbd6df1 221 }
1da177e4 222
9a3dccc4
TH		 223 cmd = ata_rw_cmds[index + fua + lba48 + write];
224 if (cmd) {
225 tf->command = cmd;
226 return 0;
227 }
228 return -1;
1da177e4
LT		 229}
230
cb95d562
TH		 231/**
232 * ata_pack_xfermask - Pack pio, mwdma and udma masks into xfer_mask
233 * @pio_mask: pio_mask
234 * @mwdma_mask: mwdma_mask
235 * @udma_mask: udma_mask
236 *
237 * Pack @pio_mask, @mwdma_mask and @udma_mask into a single
238 * unsigned int xfer_mask.
239 *
240 * LOCKING:
241 * None.
242 *
243 * RETURNS:
244 * Packed xfer_mask.
245 */
246static unsigned int ata_pack_xfermask(unsigned int pio_mask,
247 unsigned int mwdma_mask,
248 unsigned int udma_mask)
249{
250 return ((pio_mask << ATA_SHIFT_PIO) & ATA_MASK_PIO) |
251 ((mwdma_mask << ATA_SHIFT_MWDMA) & ATA_MASK_MWDMA) |
252 ((udma_mask << ATA_SHIFT_UDMA) & ATA_MASK_UDMA);
253}
254
255static const struct ata_xfer_ent {
256 unsigned int shift, bits;
257 u8 base;
258} ata_xfer_tbl[] = {
259 { ATA_SHIFT_PIO, ATA_BITS_PIO, XFER_PIO_0 },
260 { ATA_SHIFT_MWDMA, ATA_BITS_MWDMA, XFER_MW_DMA_0 },
261 { ATA_SHIFT_UDMA, ATA_BITS_UDMA, XFER_UDMA_0 },
262 { -1, },
263};
264
265/**
266 * ata_xfer_mask2mode - Find matching XFER_* for the given xfer_mask
267 * @xfer_mask: xfer_mask of interest
268 *
269 * Return matching XFER_* value for @xfer_mask. Only the highest
270 * bit of @xfer_mask is considered.
271 *
272 * LOCKING:
273 * None.
274 *
275 * RETURNS:
276 * Matching XFER_* value, 0 if no match found.
277 */
278static u8 ata_xfer_mask2mode(unsigned int xfer_mask)
279{
280 int highbit = fls(xfer_mask) - 1;
281 const struct ata_xfer_ent *ent;
282
283 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
284 if (highbit >= ent->shift && highbit < ent->shift + ent->bits)
285 return ent->base + highbit - ent->shift;
286 return 0;
287}
288
289/**
290 * ata_xfer_mode2mask - Find matching xfer_mask for XFER_*
291 * @xfer_mode: XFER_* of interest
292 *
293 * Return matching xfer_mask for @xfer_mode.
294 *
295 * LOCKING:
296 * None.
297 *
298 * RETURNS:
299 * Matching xfer_mask, 0 if no match found.
300 */
301static unsigned int ata_xfer_mode2mask(u8 xfer_mode)
302{
303 const struct ata_xfer_ent *ent;
304
305 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
306 if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits)
307 return 1 << (ent->shift + xfer_mode - ent->base);
308 return 0;
309}
310
311/**
312 * ata_xfer_mode2shift - Find matching xfer_shift for XFER_*
313 * @xfer_mode: XFER_* of interest
314 *
315 * Return matching xfer_shift for @xfer_mode.
316 *
317 * LOCKING:
318 * None.
319 *
320 * RETURNS:
321 * Matching xfer_shift, -1 if no match found.
322 */
323static int ata_xfer_mode2shift(unsigned int xfer_mode)
324{
325 const struct ata_xfer_ent *ent;
326
327 for (ent = ata_xfer_tbl; ent->shift >= 0; ent++)
328 if (xfer_mode >= ent->base && xfer_mode < ent->base + ent->bits)
329 return ent->shift;
330 return -1;
331}
332
1da177e4 333/**
1da7b0d0
TH		 334 * ata_mode_string - convert xfer_mask to string
335 * @xfer_mask: mask of bits supported; only highest bit counts.
1da177e4
LT		 336 *
337 * Determine string which represents the highest speed
1da7b0d0 338 * (highest bit in @modemask).
1da177e4
LT		 339 *
340 * LOCKING:
341 * None.
342 *
343 * RETURNS:
344 * Constant C string representing highest speed listed in
1da7b0d0 345 * @mode_mask, or the constant C string "<n/a>".
1da177e4 346 */
1da7b0d0 347static const char *ata_mode_string(unsigned int xfer_mask)
1da177e4 348{
75f554bc
TH		 349 static const char * const xfer_mode_str[] = {
350 "PIO0",
351 "PIO1",
352 "PIO2",
353 "PIO3",
354 "PIO4",
355 "MWDMA0",
356 "MWDMA1",
357 "MWDMA2",
358 "UDMA/16",
359 "UDMA/25",
360 "UDMA/33",
361 "UDMA/44",
362 "UDMA/66",
363 "UDMA/100",
364 "UDMA/133",
365 "UDMA7",
366 };
1da7b0d0 367 int highbit;
1da177e4 368
1da7b0d0
TH		 369 highbit = fls(xfer_mask) - 1;
370 if (highbit >= 0 && highbit < ARRAY_SIZE(xfer_mode_str))
371 return xfer_mode_str[highbit];
1da177e4 372 return "<n/a>";
1da177e4
LT		 373}
374
375/**
376 * ata_pio_devchk - PATA device presence detection
377 * @ap: ATA channel to examine
378 * @device: Device to examine (starting at zero)
379 *
380 * This technique was originally described in
381 * Hale Landis's ATADRVR (www.ata-atapi.com), and
382 * later found its way into the ATA/ATAPI spec.
383 *
384 * Write a pattern to the ATA shadow registers,
385 * and if a device is present, it will respond by
386 * correctly storing and echoing back the
387 * ATA shadow register contents.
388 *
389 * LOCKING:
390 * caller.
391 */
392
393static unsigned int ata_pio_devchk(struct ata_port *ap,
394 unsigned int device)
395{
396 struct ata_ioports *ioaddr = &ap->ioaddr;
397 u8 nsect, lbal;
398
399 ap->ops->dev_select(ap, device);
400
401 outb(0x55, ioaddr->nsect_addr);
402 outb(0xaa, ioaddr->lbal_addr);
403
404 outb(0xaa, ioaddr->nsect_addr);
405 outb(0x55, ioaddr->lbal_addr);
406
407 outb(0x55, ioaddr->nsect_addr);
408 outb(0xaa, ioaddr->lbal_addr);
409
410 nsect = inb(ioaddr->nsect_addr);
411 lbal = inb(ioaddr->lbal_addr);
412
413 if ((nsect == 0x55) && (lbal == 0xaa))
414 return 1; /* we found a device */
415
416 return 0; /* nothing found */
417}
418
419/**
420 * ata_mmio_devchk - PATA device presence detection
421 * @ap: ATA channel to examine
422 * @device: Device to examine (starting at zero)
423 *
424 * This technique was originally described in
425 * Hale Landis's ATADRVR (www.ata-atapi.com), and
426 * later found its way into the ATA/ATAPI spec.
427 *
428 * Write a pattern to the ATA shadow registers,
429 * and if a device is present, it will respond by
430 * correctly storing and echoing back the
431 * ATA shadow register contents.
432 *
433 * LOCKING:
434 * caller.
435 */
436
437static unsigned int ata_mmio_devchk(struct ata_port *ap,
438 unsigned int device)
439{
440 struct ata_ioports *ioaddr = &ap->ioaddr;
441 u8 nsect, lbal;
442
443 ap->ops->dev_select(ap, device);
444
445 writeb(0x55, (void __iomem *) ioaddr->nsect_addr);
446 writeb(0xaa, (void __iomem *) ioaddr->lbal_addr);
447
448 writeb(0xaa, (void __iomem *) ioaddr->nsect_addr);
449 writeb(0x55, (void __iomem *) ioaddr->lbal_addr);
450
451 writeb(0x55, (void __iomem *) ioaddr->nsect_addr);
452 writeb(0xaa, (void __iomem *) ioaddr->lbal_addr);
453
454 nsect = readb((void __iomem *) ioaddr->nsect_addr);
455 lbal = readb((void __iomem *) ioaddr->lbal_addr);
456
457 if ((nsect == 0x55) && (lbal == 0xaa))
458 return 1; /* we found a device */
459
460 return 0; /* nothing found */
461}
462
463/**
464 * ata_devchk - PATA device presence detection
465 * @ap: ATA channel to examine
466 * @device: Device to examine (starting at zero)
467 *
468 * Dispatch ATA device presence detection, depending
469 * on whether we are using PIO or MMIO to talk to the
470 * ATA shadow registers.
471 *
472 * LOCKING:
473 * caller.
474 */
475
476static unsigned int ata_devchk(struct ata_port *ap,
477 unsigned int device)
478{
479 if (ap->flags & ATA_FLAG_MMIO)
480 return ata_mmio_devchk(ap, device);
481 return ata_pio_devchk(ap, device);
482}
483
484/**
485 * ata_dev_classify - determine device type based on ATA-spec signature
486 * @tf: ATA taskfile register set for device to be identified
487 *
488 * Determine from taskfile register contents whether a device is
489 * ATA or ATAPI, as per "Signature and persistence" section
490 * of ATA/PI spec (volume 1, sect 5.14).
491 *
492 * LOCKING:
493 * None.
494 *
495 * RETURNS:
496 * Device type, %ATA_DEV_ATA, %ATA_DEV_ATAPI, or %ATA_DEV_UNKNOWN
497 * the event of failure.
498 */
499
057ace5e 500unsigned int ata_dev_classify(const struct ata_taskfile *tf)
1da177e4
LT		 501{
502 /* Apple's open source Darwin code hints that some devices only
503 * put a proper signature into the LBA mid/high registers,
504 * So, we only check those. It's sufficient for uniqueness.
505 */
506
507 if (((tf->lbam == 0) && (tf->lbah == 0)) ||
508 ((tf->lbam == 0x3c) && (tf->lbah == 0xc3))) {
509 DPRINTK("found ATA device by sig\n");
510 return ATA_DEV_ATA;
511 }
512
513 if (((tf->lbam == 0x14) && (tf->lbah == 0xeb)) ||
514 ((tf->lbam == 0x69) && (tf->lbah == 0x96))) {
515 DPRINTK("found ATAPI device by sig\n");
516 return ATA_DEV_ATAPI;
517 }
518
519 DPRINTK("unknown device\n");
520 return ATA_DEV_UNKNOWN;
521}
522
523/**
524 * ata_dev_try_classify - Parse returned ATA device signature
525 * @ap: ATA channel to examine
526 * @device: Device to examine (starting at zero)
b4dc7623 527 * @r_err: Value of error register on completion
1da177e4
LT		 528 *
529 * After an event -- SRST, E.D.D., or SATA COMRESET -- occurs,
530 * an ATA/ATAPI-defined set of values is placed in the ATA
531 * shadow registers, indicating the results of device detection
532 * and diagnostics.
533 *
534 * Select the ATA device, and read the values from the ATA shadow
535 * registers. Then parse according to the Error register value,
536 * and the spec-defined values examined by ata_dev_classify().
537 *
538 * LOCKING:
539 * caller.
b4dc7623
TH		 540 *
541 * RETURNS:
542 * Device type - %ATA_DEV_ATA, %ATA_DEV_ATAPI or %ATA_DEV_NONE.
1da177e4
LT		 543 */
544
b4dc7623
TH		 545static unsigned int
546ata_dev_try_classify(struct ata_port *ap, unsigned int device, u8 *r_err)
1da177e4 547{
1da177e4
LT		 548 struct ata_taskfile tf;
549 unsigned int class;
550 u8 err;
551
552 ap->ops->dev_select(ap, device);
553
554 memset(&tf, 0, sizeof(tf));
555
1da177e4 556 ap->ops->tf_read(ap, &tf);
0169e284 557 err = tf.feature;
b4dc7623
TH		 558 if (r_err)
559 *r_err = err;
1da177e4
LT		 560
561 /* see if device passed diags */
562 if (err == 1)
563 /* do nothing */ ;
564 else if ((device == 0) && (err == 0x81))
565 /* do nothing */ ;
566 else
b4dc7623 567 return ATA_DEV_NONE;
1da177e4 568
b4dc7623 569 /* determine if device is ATA or ATAPI */
1da177e4 570 class = ata_dev_classify(&tf);
b4dc7623 571
1da177e4 572 if (class == ATA_DEV_UNKNOWN)
b4dc7623 573 return ATA_DEV_NONE;
1da177e4 574 if ((class == ATA_DEV_ATA) && (ata_chk_status(ap) == 0))
b4dc7623
TH		 575 return ATA_DEV_NONE;
576 return class;
1da177e4
LT		 577}
578
579/**
6a62a04d 580 * ata_id_string - Convert IDENTIFY DEVICE page into string
1da177e4
LT		 581 * @id: IDENTIFY DEVICE results we will examine
582 * @s: string into which data is output
583 * @ofs: offset into identify device page
584 * @len: length of string to return. must be an even number.
585 *
586 * The strings in the IDENTIFY DEVICE page are broken up into
587 * 16-bit chunks. Run through the string, and output each
588 * 8-bit chunk linearly, regardless of platform.
589 *
590 * LOCKING:
591 * caller.
592 */
593
6a62a04d
TH		 594void ata_id_string(const u16 *id, unsigned char *s,
595 unsigned int ofs, unsigned int len)
1da177e4
LT		 596{
597 unsigned int c;
598
599 while (len > 0) {
600 c = id[ofs] >> 8;
601 *s = c;
602 s++;
603
604 c = id[ofs] & 0xff;
605 *s = c;
606 s++;
607
608 ofs++;
609 len -= 2;
610 }
611}
612
0e949ff3 613/**
6a62a04d 614 * ata_id_c_string - Convert IDENTIFY DEVICE page into C string
0e949ff3
TH		 615 * @id: IDENTIFY DEVICE results we will examine
616 * @s: string into which data is output
617 * @ofs: offset into identify device page
618 * @len: length of string to return. must be an odd number.
619 *
6a62a04d 620 * This function is identical to ata_id_string except that it
0e949ff3
TH		 621 * trims trailing spaces and terminates the resulting string with
622 * null. @len must be actual maximum length (even number) + 1.
623 *
624 * LOCKING:
625 * caller.
626 */
6a62a04d
TH		 627void ata_id_c_string(const u16 *id, unsigned char *s,
628 unsigned int ofs, unsigned int len)
0e949ff3
TH		 629{
630 unsigned char *p;
631
632 WARN_ON(!(len & 1));
633
6a62a04d 634 ata_id_string(id, s, ofs, len - 1);
0e949ff3
TH		 635
636 p = s + strnlen(s, len - 1);
637 while (p > s && p[-1] == ' ')
638 p--;
639 *p = '\0';
640}
0baab86b 641
2940740b
TH		 642static u64 ata_id_n_sectors(const u16 *id)
643{
644 if (ata_id_has_lba(id)) {
645 if (ata_id_has_lba48(id))
646 return ata_id_u64(id, 100);
647 else
648 return ata_id_u32(id, 60);
649 } else {
650 if (ata_id_current_chs_valid(id))
651 return ata_id_u32(id, 57);
652 else
653 return id[1] * id[3] * id[6];
654 }
655}
656
0baab86b
EF		 657/**
658 * ata_noop_dev_select - Select device 0/1 on ATA bus
659 * @ap: ATA channel to manipulate
660 * @device: ATA device (numbered from zero) to select
661 *
662 * This function performs no actual function.
663 *
664 * May be used as the dev_select() entry in ata_port_operations.
665 *
666 * LOCKING:
667 * caller.
668 */
1da177e4
LT		 669void ata_noop_dev_select (struct ata_port *ap, unsigned int device)
670{
671}
672
0baab86b 673
1da177e4
LT		 674/**
675 * ata_std_dev_select - Select device 0/1 on ATA bus
676 * @ap: ATA channel to manipulate
677 * @device: ATA device (numbered from zero) to select
678 *
679 * Use the method defined in the ATA specification to
680 * make either device 0, or device 1, active on the
0baab86b
EF		 681 * ATA channel. Works with both PIO and MMIO.
682 *
683 * May be used as the dev_select() entry in ata_port_operations.
1da177e4
LT		 684 *
685 * LOCKING:
686 * caller.
687 */
688
689void ata_std_dev_select (struct ata_port *ap, unsigned int device)
690{
691 u8 tmp;
692
693 if (device == 0)
694 tmp = ATA_DEVICE_OBS;
695 else
696 tmp = ATA_DEVICE_OBS | ATA_DEV1;
697
698 if (ap->flags & ATA_FLAG_MMIO) {
699 writeb(tmp, (void __iomem *) ap->ioaddr.device_addr);
700 } else {
701 outb(tmp, ap->ioaddr.device_addr);
702 }
703 ata_pause(ap); /* needed; also flushes, for mmio */
704}
705
706/**
707 * ata_dev_select - Select device 0/1 on ATA bus
708 * @ap: ATA channel to manipulate
709 * @device: ATA device (numbered from zero) to select
710 * @wait: non-zero to wait for Status register BSY bit to clear
711 * @can_sleep: non-zero if context allows sleeping
712 *
713 * Use the method defined in the ATA specification to
714 * make either device 0, or device 1, active on the
715 * ATA channel.
716 *
717 * This is a high-level version of ata_std_dev_select(),
718 * which additionally provides the services of inserting
719 * the proper pauses and status polling, where needed.
720 *
721 * LOCKING:
722 * caller.
723 */
724
725void ata_dev_select(struct ata_port *ap, unsigned int device,
726 unsigned int wait, unsigned int can_sleep)
727{
728 VPRINTK("ENTER, ata%u: device %u, wait %u\n",
729 ap->id, device, wait);
730
731 if (wait)
732 ata_wait_idle(ap);
733
734 ap->ops->dev_select(ap, device);
735
736 if (wait) {
737 if (can_sleep && ap->device[device].class == ATA_DEV_ATAPI)
738 msleep(150);
739 ata_wait_idle(ap);
740 }
741}
742
743/**
744 * ata_dump_id - IDENTIFY DEVICE info debugging output
0bd3300a 745 * @id: IDENTIFY DEVICE page to dump
1da177e4 746 *
0bd3300a
TH		 747 * Dump selected 16-bit words from the given IDENTIFY DEVICE
748 * page.
1da177e4
LT		 749 *
750 * LOCKING:
751 * caller.
752 */
753
0bd3300a 754static inline void ata_dump_id(const u16 *id)
1da177e4
LT		 755{
756 DPRINTK("49==0x%04x "
757 "53==0x%04x "
758 "63==0x%04x "
759 "64==0x%04x "
760 "75==0x%04x \n",
0bd3300a
TH		 761 id[49],
762 id[53],
763 id[63],
764 id[64],
765 id[75]);
1da177e4
LT		 766 DPRINTK("80==0x%04x "
767 "81==0x%04x "
768 "82==0x%04x "
769 "83==0x%04x "
770 "84==0x%04x \n",
0bd3300a
TH		 771 id[80],
772 id[81],
773 id[82],
774 id[83],
775 id[84]);
1da177e4
LT		 776 DPRINTK("88==0x%04x "
777 "93==0x%04x\n",
0bd3300a
TH		 778 id[88],
779 id[93]);
1da177e4
LT		 780}
781
cb95d562
TH		 782/**
783 * ata_id_xfermask - Compute xfermask from the given IDENTIFY data
784 * @id: IDENTIFY data to compute xfer mask from
785 *
786 * Compute the xfermask for this device. This is not as trivial
787 * as it seems if we must consider early devices correctly.
788 *
789 * FIXME: pre IDE drive timing (do we care ?).
790 *
791 * LOCKING:
792 * None.
793 *
794 * RETURNS:
795 * Computed xfermask
796 */
797static unsigned int ata_id_xfermask(const u16 *id)
798{
799 unsigned int pio_mask, mwdma_mask, udma_mask;
800
801 /* Usual case. Word 53 indicates word 64 is valid */
802 if (id[ATA_ID_FIELD_VALID] & (1 << 1)) {
803 pio_mask = id[ATA_ID_PIO_MODES] & 0x03;
804 pio_mask <<= 3;
805 pio_mask |= 0x7;
806 } else {
807 /* If word 64 isn't valid then Word 51 high byte holds
808 * the PIO timing number for the maximum. Turn it into
809 * a mask.
810 */
811 pio_mask = (2 << (id[ATA_ID_OLD_PIO_MODES] & 0xFF)) - 1 ;
812
813 /* But wait.. there's more. Design your standards by
814 * committee and you too can get a free iordy field to
815 * process. However its the speeds not the modes that
816 * are supported... Note drivers using the timing API
817 * will get this right anyway
818 */
819 }
820
821 mwdma_mask = id[ATA_ID_MWDMA_MODES] & 0x07;
fb21f0d0
TH		 822
823 udma_mask = 0;
824 if (id[ATA_ID_FIELD_VALID] & (1 << 2))
825 udma_mask = id[ATA_ID_UDMA_MODES] & 0xff;
cb95d562
TH		 826
827 return ata_pack_xfermask(pio_mask, mwdma_mask, udma_mask);
828}
829
86e45b6b
TH		 830/**
831 * ata_port_queue_task - Queue port_task
832 * @ap: The ata_port to queue port_task for
833 *
834 * Schedule @fn(@data) for execution after @delay jiffies using
835 * port_task. There is one port_task per port and it's the
836 * user(low level driver)'s responsibility to make sure that only
837 * one task is active at any given time.
838 *
839 * libata core layer takes care of synchronization between
840 * port_task and EH. ata_port_queue_task() may be ignored for EH
841 * synchronization.
842 *
843 * LOCKING:
844 * Inherited from caller.
845 */
846void ata_port_queue_task(struct ata_port *ap, void (*fn)(void *), void *data,
847 unsigned long delay)
848{
849 int rc;
850
2e755f68 851 if (ap->flags & ATA_FLAG_FLUSH_PORT_TASK)
86e45b6b
TH		 852 return;
853
854 PREPARE_WORK(&ap->port_task, fn, data);
855
856 if (!delay)
857 rc = queue_work(ata_wq, &ap->port_task);
858 else
859 rc = queue_delayed_work(ata_wq, &ap->port_task, delay);
860
861 /* rc == 0 means that another user is using port task */
862 WARN_ON(rc == 0);
863}
864
865/**
866 * ata_port_flush_task - Flush port_task
867 * @ap: The ata_port to flush port_task for
868 *
869 * After this function completes, port_task is guranteed not to
870 * be running or scheduled.
871 *
872 * LOCKING:
873 * Kernel thread context (may sleep)
874 */
875void ata_port_flush_task(struct ata_port *ap)
876{
877 unsigned long flags;
878
879 DPRINTK("ENTER\n");
880
881 spin_lock_irqsave(&ap->host_set->lock, flags);
2e755f68 882 ap->flags |= ATA_FLAG_FLUSH_PORT_TASK;
86e45b6b
TH		 883 spin_unlock_irqrestore(&ap->host_set->lock, flags);
884
885 DPRINTK("flush #1\n");
886 flush_workqueue(ata_wq);
887
888 /*
889 * At this point, if a task is running, it's guaranteed to see
890 * the FLUSH flag; thus, it will never queue pio tasks again.
891 * Cancel and flush.
892 */
893 if (!cancel_delayed_work(&ap->port_task)) {
894 DPRINTK("flush #2\n");
895 flush_workqueue(ata_wq);
896 }
897
898 spin_lock_irqsave(&ap->host_set->lock, flags);
2e755f68 899 ap->flags &= ~ATA_FLAG_FLUSH_PORT_TASK;
86e45b6b
TH		 900 spin_unlock_irqrestore(&ap->host_set->lock, flags);
901
902 DPRINTK("EXIT\n");
903}
904
77853bf2 905void ata_qc_complete_internal(struct ata_queued_cmd *qc)
a2a7a662 906{
77853bf2 907 struct completion *waiting = qc->private_data;
a2a7a662 908
77853bf2 909 qc->ap->ops->tf_read(qc->ap, &qc->tf);
a2a7a662 910 complete(waiting);
a2a7a662
TH		 911}
912
913/**
914 * ata_exec_internal - execute libata internal command
915 * @ap: Port to which the command is sent
916 * @dev: Device to which the command is sent
917 * @tf: Taskfile registers for the command and the result
918 * @dma_dir: Data tranfer direction of the command
919 * @buf: Data buffer of the command
920 * @buflen: Length of data buffer
921 *
922 * Executes libata internal command with timeout. @tf contains
923 * command on entry and result on return. Timeout and error
924 * conditions are reported via return value. No recovery action
925 * is taken after a command times out. It's caller's duty to
926 * clean up after timeout.
927 *
928 * LOCKING:
929 * None. Should be called with kernel context, might sleep.
930 */
931
932static unsigned
933ata_exec_internal(struct ata_port *ap, struct ata_device *dev,
934 struct ata_taskfile *tf,
935 int dma_dir, void *buf, unsigned int buflen)
936{
937 u8 command = tf->command;
938 struct ata_queued_cmd *qc;
939 DECLARE_COMPLETION(wait);
940 unsigned long flags;
77853bf2 941 unsigned int err_mask;
a2a7a662
TH		 942
943 spin_lock_irqsave(&ap->host_set->lock, flags);
944
945 qc = ata_qc_new_init(ap, dev);
946 BUG_ON(qc == NULL);
947
948 qc->tf = *tf;
949 qc->dma_dir = dma_dir;
950 if (dma_dir != DMA_NONE) {
951 ata_sg_init_one(qc, buf, buflen);
952 qc->nsect = buflen / ATA_SECT_SIZE;
953 }
954
77853bf2 955 qc->private_data = &wait;
a2a7a662
TH		 956 qc->complete_fn = ata_qc_complete_internal;
957
9a3d9eb0
TH		 958 qc->err_mask = ata_qc_issue(qc);
959 if (qc->err_mask)
8e436af9 960 ata_qc_complete(qc);
a2a7a662
TH		 961
962 spin_unlock_irqrestore(&ap->host_set->lock, flags);
963
964 if (!wait_for_completion_timeout(&wait, ATA_TMOUT_INTERNAL)) {
965 spin_lock_irqsave(&ap->host_set->lock, flags);
966
967 /* We're racing with irq here. If we lose, the
968 * following test prevents us from completing the qc
969 * again. If completion irq occurs after here but
970 * before the caller cleans up, it will result in a
971 * spurious interrupt. We can live with that.
972 */
77853bf2 973 if (qc->flags & ATA_QCFLAG_ACTIVE) {
11a56d24 974 qc->err_mask = AC_ERR_TIMEOUT;
a2a7a662
TH		 975 ata_qc_complete(qc);
976 printk(KERN_WARNING "ata%u: qc timeout (cmd 0x%x)\n",
977 ap->id, command);
978 }
979
980 spin_unlock_irqrestore(&ap->host_set->lock, flags);
981 }
982
77853bf2
TH		 983 *tf = qc->tf;
984 err_mask = qc->err_mask;
985
986 ata_qc_free(qc);
987
988 return err_mask;
a2a7a662
TH		 989}
990
1bc4ccff
AC		 991/**
992 * ata_pio_need_iordy - check if iordy needed
993 * @adev: ATA device
994 *
995 * Check if the current speed of the device requires IORDY. Used
996 * by various controllers for chip configuration.
997 */
998
999unsigned int ata_pio_need_iordy(const struct ata_device *adev)
1000{
1001 int pio;
1002 int speed = adev->pio_mode - XFER_PIO_0;
1003
1004 if (speed < 2)
1005 return 0;
1006 if (speed > 2)
1007 return 1;
1008
1009 /* If we have no drive specific rule, then PIO 2 is non IORDY */
1010
1011 if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE */
1012 pio = adev->id[ATA_ID_EIDE_PIO];
1013 /* Is the speed faster than the drive allows non IORDY ? */
1014 if (pio) {
1015 /* This is cycle times not frequency - watch the logic! */
1016 if (pio > 240) /* PIO2 is 240nS per cycle */
1017 return 1;
1018 return 0;
1019 }
1020 }
1021 return 0;
1022}
1023
1da177e4 1024/**
49016aca
TH		 1025 * ata_dev_read_id - Read ID data from the specified device
1026 * @ap: port on which target device resides
1027 * @dev: target device
1028 * @p_class: pointer to class of the target device (may be changed)
1029 * @post_reset: is this read ID post-reset?
d9572b1d 1030 * @p_id: read IDENTIFY page (newly allocated)
1da177e4 1031 *
49016aca
TH		 1032 * Read ID data from the specified device. ATA_CMD_ID_ATA is
1033 * performed on ATA devices and ATA_CMD_ID_ATAPI on ATAPI
1034 * devices. This function also takes care of EDD signature
1035 * misreporting (to be removed once EDD support is gone) and
1036 * issues ATA_CMD_INIT_DEV_PARAMS for pre-ATA4 drives.
1da177e4
LT		 1037 *
1038 * LOCKING:
49016aca
TH		 1039 * Kernel thread context (may sleep)
1040 *
1041 * RETURNS:
1042 * 0 on success, -errno otherwise.
1da177e4 1043 */
49016aca 1044static int ata_dev_read_id(struct ata_port *ap, struct ata_device *dev,
d9572b1d 1045 unsigned int *p_class, int post_reset, u16 **p_id)
1da177e4 1046{
49016aca 1047 unsigned int class = *p_class;
1da177e4 1048 unsigned int using_edd;
a0123703 1049 struct ata_taskfile tf;
49016aca 1050 unsigned int err_mask = 0;
d9572b1d 1051 u16 *id;
49016aca
TH		 1052 const char *reason;
1053 int rc;
1da177e4 1054
49016aca 1055 DPRINTK("ENTER, host %u, dev %u\n", ap->id, dev->devno);
1da177e4 1056
61eb066a
TH		 1057 if (ap->ops->probe_reset ||
1058 ap->flags & (ATA_FLAG_SRST | ATA_FLAG_SATA_RESET))
1da177e4
LT		 1059 using_edd = 0;
1060 else
1061 using_edd = 1;
1062
49016aca 1063 ata_dev_select(ap, dev->devno, 1, 1); /* select device 0/1 */
1da177e4 1064
d9572b1d
TH		 1065 id = kmalloc(sizeof(id[0]) * ATA_ID_WORDS, GFP_KERNEL);
1066 if (id == NULL) {
1067 rc = -ENOMEM;
1068 reason = "out of memory";
1069 goto err_out;
1070 }
1071
49016aca
TH		 1072 retry:
1073 ata_tf_init(ap, &tf, dev->devno);
a0123703 1074
49016aca
TH		 1075 switch (class) {
1076 case ATA_DEV_ATA:
a0123703 1077 tf.command = ATA_CMD_ID_ATA;
49016aca
TH		 1078 break;
1079 case ATA_DEV_ATAPI:
a0123703 1080 tf.command = ATA_CMD_ID_ATAPI;
49016aca
TH		 1081 break;
1082 default:
1083 rc = -ENODEV;
1084 reason = "unsupported class";
1085 goto err_out;
1da177e4
LT		 1086 }
1087
a0123703 1088 tf.protocol = ATA_PROT_PIO;
1da177e4 1089
a0123703 1090 err_mask = ata_exec_internal(ap, dev, &tf, DMA_FROM_DEVICE,
49016aca 1091 id, sizeof(id[0]) * ATA_ID_WORDS);
1da177e4 1092
a0123703 1093 if (err_mask) {
49016aca
TH		 1094 rc = -EIO;
1095 reason = "I/O error";
1096
a0123703
TH		 1097 if (err_mask & ~AC_ERR_DEV)
1098 goto err_out;
0169e284 1099
1da177e4
LT		 1100 /*
1101 * arg! EDD works for all test cases, but seems to return
1102 * the ATA signature for some ATAPI devices. Until the
1103 * reason for this is found and fixed, we fix up the mess
1104 * here. If IDENTIFY DEVICE returns command aborted
1105 * (as ATAPI devices do), then we issue an
1106 * IDENTIFY PACKET DEVICE.
1107 *
1108 * ATA software reset (SRST, the default) does not appear
1109 * to have this problem.
1110 */
49016aca 1111 if ((using_edd) && (class == ATA_DEV_ATA)) {
a0123703 1112 u8 err = tf.feature;
1da177e4 1113 if (err & ATA_ABORTED) {
49016aca 1114 class = ATA_DEV_ATAPI;
1da177e4
LT		 1115 goto retry;
1116 }
1117 }
1118 goto err_out;
1119 }
1120
49016aca 1121 swap_buf_le16(id, ATA_ID_WORDS);
1da177e4
LT		 1122
1123 /* print device capabilities */
1124 printk(KERN_DEBUG "ata%u: dev %u cfg "
1125 "49:%04x 82:%04x 83:%04x 84:%04x 85:%04x 86:%04x 87:%04x 88:%04x\n",
49016aca
TH		 1126 ap->id, dev->devno,
1127 id[49], id[82], id[83], id[84], id[85], id[86], id[87], id[88]);
1128
1129 /* sanity check */
1130 if ((class == ATA_DEV_ATA) != ata_id_is_ata(id)) {
1131 rc = -EINVAL;
1132 reason = "device reports illegal type";
1133 goto err_out;
1134 }
1135
1136 if (post_reset && class == ATA_DEV_ATA) {
1137 /*
1138 * The exact sequence expected by certain pre-ATA4 drives is:
1139 * SRST RESET
1140 * IDENTIFY
1141 * INITIALIZE DEVICE PARAMETERS
1142 * anything else..
1143 * Some drives were very specific about that exact sequence.
1144 */
1145 if (ata_id_major_version(id) < 4 || !ata_id_has_lba(id)) {
1146 err_mask = ata_dev_init_params(ap, dev);
1147 if (err_mask) {
1148 rc = -EIO;
1149 reason = "INIT_DEV_PARAMS failed";
1150 goto err_out;
1151 }
1152
1153 /* current CHS translation info (id[53-58]) might be
1154 * changed. reread the identify device info.
1155 */
1156 post_reset = 0;
1157 goto retry;
1158 }
1159 }
1160
1161 *p_class = class;
d9572b1d 1162 *p_id = id;
49016aca
TH		 1163 return 0;
1164
1165 err_out:
1166 printk(KERN_WARNING "ata%u: dev %u failed to IDENTIFY (%s)\n",
1167 ap->id, dev->devno, reason);
d9572b1d 1168 kfree(id);
49016aca
TH		 1169 return rc;
1170}
1171
4b2f3ede
TH		 1172static inline u8 ata_dev_knobble(const struct ata_port *ap,
1173 struct ata_device *dev)
1174{
1175 return ((ap->cbl == ATA_CBL_SATA) && (!ata_id_is_sata(dev->id)));
1176}
1177
49016aca 1178/**
ffeae418
TH		 1179 * ata_dev_configure - Configure the specified ATA/ATAPI device
1180 * @ap: Port on which target device resides
1181 * @dev: Target device to configure
4c2d721a 1182 * @print_info: Enable device info printout
ffeae418
TH		 1183 *
1184 * Configure @dev according to @dev->id. Generic and low-level
1185 * driver specific fixups are also applied.
49016aca
TH		 1186 *
1187 * LOCKING:
ffeae418
TH		 1188 * Kernel thread context (may sleep)
1189 *
1190 * RETURNS:
1191 * 0 on success, -errno otherwise
49016aca 1192 */
4c2d721a
TH		 1193static int ata_dev_configure(struct ata_port *ap, struct ata_device *dev,
1194 int print_info)
49016aca 1195{
1148c3a7 1196 const u16 *id = dev->id;
ff8854b2 1197 unsigned int xfer_mask;
49016aca
TH		 1198 int i, rc;
1199
1200 if (!ata_dev_present(dev)) {
1201 DPRINTK("ENTER/EXIT (host %u, dev %u) -- nodev\n",
ffeae418
TH		 1202 ap->id, dev->devno);
1203 return 0;
49016aca
TH		 1204 }
1205
ffeae418 1206 DPRINTK("ENTER, host %u, dev %u\n", ap->id, dev->devno);
1da177e4 1207
208a9933
TH		 1208 /* initialize to-be-configured parameters */
1209 dev->flags = 0;
1210 dev->max_sectors = 0;
1211 dev->cdb_len = 0;
1212 dev->n_sectors = 0;
1213 dev->cylinders = 0;
1214 dev->heads = 0;
1215 dev->sectors = 0;
1216
1da177e4
LT		 1217 /*
1218 * common ATA, ATAPI feature tests
1219 */
1220
8bf62ece 1221 /* we require DMA support (bits 8 of word 49) */
1148c3a7 1222 if (!ata_id_has_dma(id)) {
8bf62ece 1223 printk(KERN_DEBUG "ata%u: no dma\n", ap->id);
ffeae418 1224 rc = -EINVAL;
1da177e4
LT		 1225 goto err_out_nosup;
1226 }
1227
ff8854b2 1228 /* find max transfer mode; for printk only */
1148c3a7 1229 xfer_mask = ata_id_xfermask(id);
1da177e4 1230
1148c3a7 1231 ata_dump_id(id);
1da177e4
LT		 1232
1233 /* ATA-specific feature tests */
1234 if (dev->class == ATA_DEV_ATA) {
1148c3a7 1235 dev->n_sectors = ata_id_n_sectors(id);
2940740b 1236
1148c3a7 1237 if (ata_id_has_lba(id)) {
4c2d721a 1238 const char *lba_desc;
8bf62ece 1239
4c2d721a
TH		 1240 lba_desc = "LBA";
1241 dev->flags |= ATA_DFLAG_LBA;
1148c3a7 1242 if (ata_id_has_lba48(id)) {
8bf62ece 1243 dev->flags |= ATA_DFLAG_LBA48;
4c2d721a
TH		 1244 lba_desc = "LBA48";
1245 }
8bf62ece
AL		 1246
1247 /* print device info to dmesg */
4c2d721a
TH		 1248 if (print_info)
1249 printk(KERN_INFO "ata%u: dev %u ATA-%d, "
1250 "max %s, %Lu sectors: %s\n",
1251 ap->id, dev->devno,
1148c3a7 1252 ata_id_major_version(id),
ff8854b2 1253 ata_mode_string(xfer_mask),
4c2d721a
TH		 1254 (unsigned long long)dev->n_sectors,
1255 lba_desc);
ffeae418 1256 } else {
8bf62ece
AL		 1257 /* CHS */
1258
1259 /* Default translation */
1148c3a7
TH		 1260 dev->cylinders = id[1];
1261 dev->heads = id[3];
1262 dev->sectors = id[6];
8bf62ece 1263
1148c3a7 1264 if (ata_id_current_chs_valid(id)) {
8bf62ece 1265 /* Current CHS translation is valid. */
1148c3a7
TH		 1266 dev->cylinders = id[54];
1267 dev->heads = id[55];
1268 dev->sectors = id[56];
8bf62ece
AL		 1269 }
1270
1271 /* print device info to dmesg */
4c2d721a
TH		 1272 if (print_info)
1273 printk(KERN_INFO "ata%u: dev %u ATA-%d, "
1274 "max %s, %Lu sectors: CHS %u/%u/%u\n",
1275 ap->id, dev->devno,
1148c3a7 1276 ata_id_major_version(id),
ff8854b2 1277 ata_mode_string(xfer_mask),
4c2d721a
TH		 1278 (unsigned long long)dev->n_sectors,
1279 dev->cylinders, dev->heads, dev->sectors);
1da177e4
LT		 1280 }
1281
6e7846e9 1282 dev->cdb_len = 16;
1da177e4
LT		 1283 }
1284
1285 /* ATAPI-specific feature tests */
2c13b7ce 1286 else if (dev->class == ATA_DEV_ATAPI) {
1148c3a7 1287 rc = atapi_cdb_len(id);
1da177e4
LT		 1288 if ((rc < 12) || (rc > ATAPI_CDB_LEN)) {
1289 printk(KERN_WARNING "ata%u: unsupported CDB len\n", ap->id);
ffeae418 1290 rc = -EINVAL;
1da177e4
LT		 1291 goto err_out_nosup;
1292 }
6e7846e9 1293 dev->cdb_len = (unsigned int) rc;
1da177e4
LT		 1294
1295 /* print device info to dmesg */
4c2d721a
TH		 1296 if (print_info)
1297 printk(KERN_INFO "ata%u: dev %u ATAPI, max %s\n",
ff8854b2 1298 ap->id, dev->devno, ata_mode_string(xfer_mask));
1da177e4
LT		 1299 }
1300
6e7846e9
TH		 1301 ap->host->max_cmd_len = 0;
1302 for (i = 0; i < ATA_MAX_DEVICES; i++)
1303 ap->host->max_cmd_len = max_t(unsigned int,
1304 ap->host->max_cmd_len,
1305 ap->device[i].cdb_len);
1306
4b2f3ede
TH		 1307 /* limit bridge transfers to udma5, 200 sectors */
1308 if (ata_dev_knobble(ap, dev)) {
4c2d721a
TH		 1309 if (print_info)
1310 printk(KERN_INFO "ata%u(%u): applying bridge limits\n",
1311 ap->id, dev->devno);
4b2f3ede
TH		 1312 ap->udma_mask &= ATA_UDMA5;
1313 dev->max_sectors = ATA_MAX_SECTORS;
1314 }
1315
1316 if (ap->ops->dev_config)
1317 ap->ops->dev_config(ap, dev);
1318
1da177e4 1319 DPRINTK("EXIT, drv_stat = 0x%x\n", ata_chk_status(ap));
ffeae418 1320 return 0;
1da177e4
LT		 1321
1322err_out_nosup:
1323 printk(KERN_WARNING "ata%u: dev %u not supported, ignoring\n",
ffeae418 1324 ap->id, dev->devno);
1da177e4 1325 DPRINTK("EXIT, err\n");
ffeae418 1326 return rc;
1da177e4
LT		 1327}
1328
1329/**
1330 * ata_bus_probe - Reset and probe ATA bus
1331 * @ap: Bus to probe
1332 *
0cba632b
JG		 1333 * Master ATA bus probing function. Initiates a hardware-dependent
1334 * bus reset, then attempts to identify any devices found on
1335 * the bus.
1336 *
1da177e4 1337 * LOCKING:
0cba632b 1338 * PCI/etc. bus probe sem.
1da177e4
LT		 1339 *
1340 * RETURNS:
1341 * Zero on success, non-zero on error.
1342 */
1343
1344static int ata_bus_probe(struct ata_port *ap)
1345{
28ca5c57
TH		 1346 unsigned int classes[ATA_MAX_DEVICES];
1347 unsigned int i, rc, found = 0;
1da177e4 1348
28ca5c57 1349 ata_port_probe(ap);
c19ba8af 1350
2044470c
TH		 1351 /* reset and determine device classes */
1352 for (i = 0; i < ATA_MAX_DEVICES; i++)
1353 classes[i] = ATA_DEV_UNKNOWN;
2061a47a 1354
2044470c 1355 if (ap->ops->probe_reset) {
c19ba8af 1356 rc = ap->ops->probe_reset(ap, classes);
28ca5c57
TH		 1357 if (rc) {
1358 printk("ata%u: reset failed (errno=%d)\n", ap->id, rc);
1359 return rc;
c19ba8af 1360 }
28ca5c57 1361 } else {
c19ba8af
TH		 1362 ap->ops->phy_reset(ap);
1363
2044470c
TH		 1364 if (!(ap->flags & ATA_FLAG_PORT_DISABLED))
1365 for (i = 0; i < ATA_MAX_DEVICES; i++)
28ca5c57 1366 classes[i] = ap->device[i].class;
2044470c 1367
28ca5c57
TH		 1368 ata_port_probe(ap);
1369 }
1da177e4 1370
2044470c
TH		 1371 for (i = 0; i < ATA_MAX_DEVICES; i++)
1372 if (classes[i] == ATA_DEV_UNKNOWN)
1373 classes[i] = ATA_DEV_NONE;
1374
28ca5c57 1375 /* read IDENTIFY page and configure devices */
1da177e4 1376 for (i = 0; i < ATA_MAX_DEVICES; i++) {
ffeae418
TH		 1377 struct ata_device *dev = &ap->device[i];
1378
28ca5c57
TH		 1379 dev->class = classes[i];
1380
ffeae418
TH		 1381 if (!ata_dev_present(dev))
1382 continue;
1383
1384 WARN_ON(dev->id != NULL);
1385 if (ata_dev_read_id(ap, dev, &dev->class, 1, &dev->id)) {
1386 dev->class = ATA_DEV_NONE;
1387 continue;
1388 }
1389
4c2d721a 1390 if (ata_dev_configure(ap, dev, 1)) {
ffeae418
TH		 1391 dev->class++; /* disable device */
1392 continue;
1da177e4 1393 }
ffeae418 1394
ffeae418 1395 found = 1;
1da177e4
LT		 1396 }
1397
28ca5c57 1398 if (!found)
1da177e4
LT		 1399 goto err_out_disable;
1400
1401 ata_set_mode(ap);
1402 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1403 goto err_out_disable;
1404
1405 return 0;
1406
1407err_out_disable:
1408 ap->ops->port_disable(ap);
1da177e4
LT		 1409 return -1;
1410}
1411
1412/**
0cba632b
JG		 1413 * ata_port_probe - Mark port as enabled
1414 * @ap: Port for which we indicate enablement
1da177e4 1415 *
0cba632b
JG		 1416 * Modify @ap data structure such that the system
1417 * thinks that the entire port is enabled.
1418 *
1419 * LOCKING: host_set lock, or some other form of
1420 * serialization.
1da177e4
LT		 1421 */
1422
1423void ata_port_probe(struct ata_port *ap)
1424{
1425 ap->flags &= ~ATA_FLAG_PORT_DISABLED;
1426}
1427
3be680b7
TH		 1428/**
1429 * sata_print_link_status - Print SATA link status
1430 * @ap: SATA port to printk link status about
1431 *
1432 * This function prints link speed and status of a SATA link.
1433 *
1434 * LOCKING:
1435 * None.
1436 */
1437static void sata_print_link_status(struct ata_port *ap)
1438{
1439 u32 sstatus, tmp;
1440 const char *speed;
1441
1442 if (!ap->ops->scr_read)
1443 return;
1444
1445 sstatus = scr_read(ap, SCR_STATUS);
1446
1447 if (sata_dev_present(ap)) {
1448 tmp = (sstatus >> 4) & 0xf;
1449 if (tmp & (1 << 0))
1450 speed = "1.5";
1451 else if (tmp & (1 << 1))
1452 speed = "3.0";
1453 else
1454 speed = "<unknown>";
1455 printk(KERN_INFO "ata%u: SATA link up %s Gbps (SStatus %X)\n",
1456 ap->id, speed, sstatus);
1457 } else {
1458 printk(KERN_INFO "ata%u: SATA link down (SStatus %X)\n",
1459 ap->id, sstatus);
1460 }
1461}
1462
1da177e4 1463/**
780a87f7
JG		 1464 * __sata_phy_reset - Wake/reset a low-level SATA PHY
1465 * @ap: SATA port associated with target SATA PHY.
1da177e4 1466 *
780a87f7
JG		 1467 * This function issues commands to standard SATA Sxxx
1468 * PHY registers, to wake up the phy (and device), and
1469 * clear any reset condition.
1da177e4
LT		 1470 *
1471 * LOCKING:
0cba632b 1472 * PCI/etc. bus probe sem.
1da177e4
LT		 1473 *
1474 */
1475void __sata_phy_reset(struct ata_port *ap)
1476{
1477 u32 sstatus;
1478 unsigned long timeout = jiffies + (HZ * 5);
1479
1480 if (ap->flags & ATA_FLAG_SATA_RESET) {
cdcca89e
BR		 1481 /* issue phy wake/reset */
1482 scr_write_flush(ap, SCR_CONTROL, 0x301);
62ba2841
TH		 1483 /* Couldn't find anything in SATA I/II specs, but
1484 * AHCI-1.1 10.4.2 says at least 1 ms. */
1485 mdelay(1);
1da177e4 1486 }
cdcca89e 1487 scr_write_flush(ap, SCR_CONTROL, 0x300); /* phy wake/clear reset */
1da177e4
LT		 1488
1489 /* wait for phy to become ready, if necessary */
1490 do {
1491 msleep(200);
1492 sstatus = scr_read(ap, SCR_STATUS);
1493 if ((sstatus & 0xf) != 1)
1494 break;
1495 } while (time_before(jiffies, timeout));
1496
3be680b7
TH		 1497 /* print link status */
1498 sata_print_link_status(ap);
656563e3 1499
3be680b7
TH		 1500 /* TODO: phy layer with polling, timeouts, etc. */
1501 if (sata_dev_present(ap))
1da177e4 1502 ata_port_probe(ap);
3be680b7 1503 else
1da177e4 1504 ata_port_disable(ap);
1da177e4
LT		 1505
1506 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1507 return;
1508
1509 if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) {
1510 ata_port_disable(ap);
1511 return;
1512 }
1513
1514 ap->cbl = ATA_CBL_SATA;
1515}
1516
1517/**
780a87f7
JG		 1518 * sata_phy_reset - Reset SATA bus.
1519 * @ap: SATA port associated with target SATA PHY.
1da177e4 1520 *
780a87f7
JG		 1521 * This function resets the SATA bus, and then probes
1522 * the bus for devices.
1da177e4
LT		 1523 *
1524 * LOCKING:
0cba632b 1525 * PCI/etc. bus probe sem.
1da177e4
LT		 1526 *
1527 */
1528void sata_phy_reset(struct ata_port *ap)
1529{
1530 __sata_phy_reset(ap);
1531 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1532 return;
1533 ata_bus_reset(ap);
1534}
1535
1536/**
780a87f7
JG		 1537 * ata_port_disable - Disable port.
1538 * @ap: Port to be disabled.
1da177e4 1539 *
780a87f7
JG		 1540 * Modify @ap data structure such that the system
1541 * thinks that the entire port is disabled, and should
1542 * never attempt to probe or communicate with devices
1543 * on this port.
1544 *
1545 * LOCKING: host_set lock, or some other form of
1546 * serialization.
1da177e4
LT		 1547 */
1548
1549void ata_port_disable(struct ata_port *ap)
1550{
1551 ap->device[0].class = ATA_DEV_NONE;
1552 ap->device[1].class = ATA_DEV_NONE;
1553 ap->flags |= ATA_FLAG_PORT_DISABLED;
1554}
1555
452503f9
AC		 1556/*
1557 * This mode timing computation functionality is ported over from
1558 * drivers/ide/ide-timing.h and was originally written by Vojtech Pavlik
1559 */
1560/*
1561 * PIO 0-5, MWDMA 0-2 and UDMA 0-6 timings (in nanoseconds).
1562 * These were taken from ATA/ATAPI-6 standard, rev 0a, except
1563 * for PIO 5, which is a nonstandard extension and UDMA6, which
1564 * is currently supported only by Maxtor drives.
1565 */
1566
1567static const struct ata_timing ata_timing[] = {
1568
1569 { XFER_UDMA_6, 0, 0, 0, 0, 0, 0, 0, 15 },
1570 { XFER_UDMA_5, 0, 0, 0, 0, 0, 0, 0, 20 },
1571 { XFER_UDMA_4, 0, 0, 0, 0, 0, 0, 0, 30 },
1572 { XFER_UDMA_3, 0, 0, 0, 0, 0, 0, 0, 45 },
1573
1574 { XFER_UDMA_2, 0, 0, 0, 0, 0, 0, 0, 60 },
1575 { XFER_UDMA_1, 0, 0, 0, 0, 0, 0, 0, 80 },
1576 { XFER_UDMA_0, 0, 0, 0, 0, 0, 0, 0, 120 },
1577
1578/* { XFER_UDMA_SLOW, 0, 0, 0, 0, 0, 0, 0, 150 }, */
1579
1580 { XFER_MW_DMA_2, 25, 0, 0, 0, 70, 25, 120, 0 },
1581 { XFER_MW_DMA_1, 45, 0, 0, 0, 80, 50, 150, 0 },
1582 { XFER_MW_DMA_0, 60, 0, 0, 0, 215, 215, 480, 0 },
1583
1584 { XFER_SW_DMA_2, 60, 0, 0, 0, 120, 120, 240, 0 },
1585 { XFER_SW_DMA_1, 90, 0, 0, 0, 240, 240, 480, 0 },
1586 { XFER_SW_DMA_0, 120, 0, 0, 0, 480, 480, 960, 0 },
1587
1588/* { XFER_PIO_5, 20, 50, 30, 100, 50, 30, 100, 0 }, */
1589 { XFER_PIO_4, 25, 70, 25, 120, 70, 25, 120, 0 },
1590 { XFER_PIO_3, 30, 80, 70, 180, 80, 70, 180, 0 },
1591
1592 { XFER_PIO_2, 30, 290, 40, 330, 100, 90, 240, 0 },
1593 { XFER_PIO_1, 50, 290, 93, 383, 125, 100, 383, 0 },
1594 { XFER_PIO_0, 70, 290, 240, 600, 165, 150, 600, 0 },
1595
1596/* { XFER_PIO_SLOW, 120, 290, 240, 960, 290, 240, 960, 0 }, */
1597
1598 { 0xFF }
1599};
1600
1601#define ENOUGH(v,unit) (((v)-1)/(unit)+1)
1602#define EZ(v,unit) ((v)?ENOUGH(v,unit):0)
1603
1604static void ata_timing_quantize(const struct ata_timing *t, struct ata_timing *q, int T, int UT)
1605{
1606 q->setup = EZ(t->setup * 1000, T);
1607 q->act8b = EZ(t->act8b * 1000, T);
1608 q->rec8b = EZ(t->rec8b * 1000, T);
1609 q->cyc8b = EZ(t->cyc8b * 1000, T);
1610 q->active = EZ(t->active * 1000, T);
1611 q->recover = EZ(t->recover * 1000, T);
1612 q->cycle = EZ(t->cycle * 1000, T);
1613 q->udma = EZ(t->udma * 1000, UT);
1614}
1615
1616void ata_timing_merge(const struct ata_timing *a, const struct ata_timing *b,
1617 struct ata_timing *m, unsigned int what)
1618{
1619 if (what & ATA_TIMING_SETUP ) m->setup = max(a->setup, b->setup);
1620 if (what & ATA_TIMING_ACT8B ) m->act8b = max(a->act8b, b->act8b);
1621 if (what & ATA_TIMING_REC8B ) m->rec8b = max(a->rec8b, b->rec8b);
1622 if (what & ATA_TIMING_CYC8B ) m->cyc8b = max(a->cyc8b, b->cyc8b);
1623 if (what & ATA_TIMING_ACTIVE ) m->active = max(a->active, b->active);
1624 if (what & ATA_TIMING_RECOVER) m->recover = max(a->recover, b->recover);
1625 if (what & ATA_TIMING_CYCLE ) m->cycle = max(a->cycle, b->cycle);
1626 if (what & ATA_TIMING_UDMA ) m->udma = max(a->udma, b->udma);
1627}
1628
1629static const struct ata_timing* ata_timing_find_mode(unsigned short speed)
1630{
1631 const struct ata_timing *t;
1632
1633 for (t = ata_timing; t->mode != speed; t++)
91190758 1634 if (t->mode == 0xFF)
452503f9
AC		 1635 return NULL;
1636 return t;
1637}
1638
1639int ata_timing_compute(struct ata_device *adev, unsigned short speed,
1640 struct ata_timing *t, int T, int UT)
1641{
1642 const struct ata_timing *s;
1643 struct ata_timing p;
1644
1645 /*
1646 * Find the mode.
75b1f2f8 1647 */
452503f9
AC		 1648
1649 if (!(s = ata_timing_find_mode(speed)))
1650 return -EINVAL;
1651
75b1f2f8
AL		 1652 memcpy(t, s, sizeof(*s));
1653
452503f9
AC		 1654 /*
1655 * If the drive is an EIDE drive, it can tell us it needs extended
1656 * PIO/MW_DMA cycle timing.
1657 */
1658
1659 if (adev->id[ATA_ID_FIELD_VALID] & 2) { /* EIDE drive */
1660 memset(&p, 0, sizeof(p));
1661 if(speed >= XFER_PIO_0 && speed <= XFER_SW_DMA_0) {
1662 if (speed <= XFER_PIO_2) p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO];
1663 else p.cycle = p.cyc8b = adev->id[ATA_ID_EIDE_PIO_IORDY];
1664 } else if(speed >= XFER_MW_DMA_0 && speed <= XFER_MW_DMA_2) {
1665 p.cycle = adev->id[ATA_ID_EIDE_DMA_MIN];
1666 }
1667 ata_timing_merge(&p, t, t, ATA_TIMING_CYCLE | ATA_TIMING_CYC8B);
1668 }
1669
1670 /*
1671 * Convert the timing to bus clock counts.
1672 */
1673
75b1f2f8 1674 ata_timing_quantize(t, t, T, UT);
452503f9
AC		 1675
1676 /*
c893a3ae
RD		 1677 * Even in DMA/UDMA modes we still use PIO access for IDENTIFY,
1678 * S.M.A.R.T * and some other commands. We have to ensure that the
1679 * DMA cycle timing is slower/equal than the fastest PIO timing.
452503f9
AC		 1680 */
1681
1682 if (speed > XFER_PIO_4) {
1683 ata_timing_compute(adev, adev->pio_mode, &p, T, UT);
1684 ata_timing_merge(&p, t, t, ATA_TIMING_ALL);
1685 }
1686
1687 /*
c893a3ae 1688 * Lengthen active & recovery time so that cycle time is correct.
452503f9
AC		 1689 */
1690
1691 if (t->act8b + t->rec8b < t->cyc8b) {
1692 t->act8b += (t->cyc8b - (t->act8b + t->rec8b)) / 2;
1693 t->rec8b = t->cyc8b - t->act8b;
1694 }
1695
1696 if (t->active + t->recover < t->cycle) {
1697 t->active += (t->cycle - (t->active + t->recover)) / 2;
1698 t->recover = t->cycle - t->active;
1699 }
1700
1701 return 0;
1702}
1703
1da177e4
LT		 1704static void ata_dev_set_mode(struct ata_port *ap, struct ata_device *dev)
1705{
1da177e4
LT		 1706 if (!ata_dev_present(dev) || (ap->flags & ATA_FLAG_PORT_DISABLED))
1707 return;
1708
1709 if (dev->xfer_shift == ATA_SHIFT_PIO)
1710 dev->flags |= ATA_DFLAG_PIO;
1711
1712 ata_dev_set_xfermode(ap, dev);
1713
48a8a14f
TH		 1714 if (ata_dev_revalidate(ap, dev, 0)) {
1715 printk(KERN_ERR "ata%u: failed to revalidate after set "
1716 "xfermode, disabled\n", ap->id);
1717 ata_port_disable(ap);
1718 }
1719
23e71c3d
TH		 1720 DPRINTK("xfer_shift=%u, xfer_mode=0x%x\n",
1721 dev->xfer_shift, (int)dev->xfer_mode);
1da177e4
LT		 1722
1723 printk(KERN_INFO "ata%u: dev %u configured for %s\n",
23e71c3d
TH		 1724 ap->id, dev->devno,
1725 ata_mode_string(ata_xfer_mode2mask(dev->xfer_mode)));
1da177e4
LT		 1726}
1727
1728static int ata_host_set_pio(struct ata_port *ap)
1729{
a6d5a51c 1730 int i;
1da177e4
LT		 1731
1732 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1733 struct ata_device *dev = &ap->device[i];
a6d5a51c
TH		 1734
1735 if (!ata_dev_present(dev))
1736 continue;
1737
1738 if (!dev->pio_mode) {
1739 printk(KERN_WARNING "ata%u: no PIO support\n", ap->id);
1740 return -1;
1da177e4 1741 }
a6d5a51c
TH		 1742
1743 dev->xfer_mode = dev->pio_mode;
1744 dev->xfer_shift = ATA_SHIFT_PIO;
1745 if (ap->ops->set_piomode)
1746 ap->ops->set_piomode(ap, dev);
1da177e4
LT		 1747 }
1748
1749 return 0;
1750}
1751
a6d5a51c 1752static void ata_host_set_dma(struct ata_port *ap)
1da177e4
LT		 1753{
1754 int i;
1755
1756 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1757 struct ata_device *dev = &ap->device[i];
a6d5a51c
TH		 1758
1759 if (!ata_dev_present(dev) || !dev->dma_mode)
1760 continue;
1761
1762 dev->xfer_mode = dev->dma_mode;
1763 dev->xfer_shift = ata_xfer_mode2shift(dev->dma_mode);
1764 if (ap->ops->set_dmamode)
1765 ap->ops->set_dmamode(ap, dev);
1da177e4
LT		 1766 }
1767}
1768
1769/**
1770 * ata_set_mode - Program timings and issue SET FEATURES - XFER
1771 * @ap: port on which timings will be programmed
1772 *
780a87f7
JG		 1773 * Set ATA device disk transfer mode (PIO3, UDMA6, etc.).
1774 *
1da177e4 1775 * LOCKING:
0cba632b 1776 * PCI/etc. bus probe sem.
1da177e4
LT		 1777 */
1778static void ata_set_mode(struct ata_port *ap)
1779{
a6d5a51c 1780 int i, rc;
1da177e4 1781
a6d5a51c
TH		 1782 /* step 1: calculate xfer_mask */
1783 for (i = 0; i < ATA_MAX_DEVICES; i++) {
1784 struct ata_device *dev = &ap->device[i];
1785 unsigned int xfer_mask;
1786
1787 if (!ata_dev_present(dev))
1788 continue;
1789
1790 xfer_mask = ata_dev_xfermask(ap, dev);
1da177e4 1791
a6d5a51c
TH		 1792 dev->pio_mode = ata_xfer_mask2mode(xfer_mask & ATA_MASK_PIO);
1793 dev->dma_mode = ata_xfer_mask2mode(xfer_mask & (ATA_MASK_MWDMA |
1794 ATA_MASK_UDMA));
1795 }
1796
1797 /* step 2: always set host PIO timings */
1798 rc = ata_host_set_pio(ap);
1da177e4
LT		 1799 if (rc)
1800 goto err_out;
1801
a6d5a51c
TH		 1802 /* step 3: set host DMA timings */
1803 ata_host_set_dma(ap);
1da177e4
LT		 1804
1805 /* step 4: update devices' xfer mode */
a6d5a51c
TH		 1806 for (i = 0; i < ATA_MAX_DEVICES; i++)
1807 ata_dev_set_mode(ap, &ap->device[i]);
1da177e4
LT		 1808
1809 if (ap->flags & ATA_FLAG_PORT_DISABLED)
1810 return;
1811
1812 if (ap->ops->post_set_mode)
1813 ap->ops->post_set_mode(ap);
1814
1da177e4
LT		 1815 return;
1816
1817err_out:
1818 ata_port_disable(ap);
1819}
1820
1fdffbce
JG		 1821/**
1822 * ata_tf_to_host - issue ATA taskfile to host controller
1823 * @ap: port to which command is being issued
1824 * @tf: ATA taskfile register set
1825 *
1826 * Issues ATA taskfile register set to ATA host controller,
1827 * with proper synchronization with interrupt handler and
1828 * other threads.
1829 *
1830 * LOCKING:
1831 * spin_lock_irqsave(host_set lock)
1832 */
1833
1834static inline void ata_tf_to_host(struct ata_port *ap,
1835 const struct ata_taskfile *tf)
1836{
1837 ap->ops->tf_load(ap, tf);
1838 ap->ops->exec_command(ap, tf);
1839}
1840
1da177e4
LT		 1841/**
1842 * ata_busy_sleep - sleep until BSY clears, or timeout
1843 * @ap: port containing status register to be polled
1844 * @tmout_pat: impatience timeout
1845 * @tmout: overall timeout
1846 *
780a87f7
JG		 1847 * Sleep until ATA Status register bit BSY clears,
1848 * or a timeout occurs.
1849 *
1850 * LOCKING: None.
1da177e4
LT		 1851 */
1852
6f8b9958
TH		 1853unsigned int ata_busy_sleep (struct ata_port *ap,
1854 unsigned long tmout_pat, unsigned long tmout)
1da177e4
LT		 1855{
1856 unsigned long timer_start, timeout;
1857 u8 status;
1858
1859 status = ata_busy_wait(ap, ATA_BUSY, 300);
1860 timer_start = jiffies;
1861 timeout = timer_start + tmout_pat;
1862 while ((status & ATA_BUSY) && (time_before(jiffies, timeout))) {
1863 msleep(50);
1864 status = ata_busy_wait(ap, ATA_BUSY, 3);
1865 }
1866
1867 if (status & ATA_BUSY)
1868 printk(KERN_WARNING "ata%u is slow to respond, "
1869 "please be patient\n", ap->id);
1870
1871 timeout = timer_start + tmout;
1872 while ((status & ATA_BUSY) && (time_before(jiffies, timeout))) {
1873 msleep(50);
1874 status = ata_chk_status(ap);
1875 }
1876
1877 if (status & ATA_BUSY) {
1878 printk(KERN_ERR "ata%u failed to respond (%lu secs)\n",
1879 ap->id, tmout / HZ);
1880 return 1;
1881 }
1882
1883 return 0;
1884}
1885
1886static void ata_bus_post_reset(struct ata_port *ap, unsigned int devmask)
1887{
1888 struct ata_ioports *ioaddr = &ap->ioaddr;
1889 unsigned int dev0 = devmask & (1 << 0);
1890 unsigned int dev1 = devmask & (1 << 1);
1891 unsigned long timeout;
1892
1893 /* if device 0 was found in ata_devchk, wait for its
1894 * BSY bit to clear
1895 */
1896 if (dev0)
1897 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
1898
1899 /* if device 1 was found in ata_devchk, wait for
1900 * register access, then wait for BSY to clear
1901 */
1902 timeout = jiffies + ATA_TMOUT_BOOT;
1903 while (dev1) {
1904 u8 nsect, lbal;
1905
1906 ap->ops->dev_select(ap, 1);
1907 if (ap->flags & ATA_FLAG_MMIO) {
1908 nsect = readb((void __iomem *) ioaddr->nsect_addr);
1909 lbal = readb((void __iomem *) ioaddr->lbal_addr);
1910 } else {
1911 nsect = inb(ioaddr->nsect_addr);
1912 lbal = inb(ioaddr->lbal_addr);
1913 }
1914 if ((nsect == 1) && (lbal == 1))
1915 break;
1916 if (time_after(jiffies, timeout)) {
1917 dev1 = 0;
1918 break;
1919 }
1920 msleep(50); /* give drive a breather */
1921 }
1922 if (dev1)
1923 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
1924
1925 /* is all this really necessary? */
1926 ap->ops->dev_select(ap, 0);
1927 if (dev1)
1928 ap->ops->dev_select(ap, 1);
1929 if (dev0)
1930 ap->ops->dev_select(ap, 0);
1931}
1932
1933/**
0cba632b
JG		 1934 * ata_bus_edd - Issue EXECUTE DEVICE DIAGNOSTIC command.
1935 * @ap: Port to reset and probe
1936 *
1937 * Use the EXECUTE DEVICE DIAGNOSTIC command to reset and
1938 * probe the bus. Not often used these days.
1da177e4
LT		 1939 *
1940 * LOCKING:
0cba632b 1941 * PCI/etc. bus probe sem.
e5338254 1942 * Obtains host_set lock.
1da177e4
LT		 1943 *
1944 */
1945
1946static unsigned int ata_bus_edd(struct ata_port *ap)
1947{
1948 struct ata_taskfile tf;
e5338254 1949 unsigned long flags;
1da177e4
LT		 1950
1951 /* set up execute-device-diag (bus reset) taskfile */
1952 /* also, take interrupts to a known state (disabled) */
1953 DPRINTK("execute-device-diag\n");
1954 ata_tf_init(ap, &tf, 0);
1955 tf.ctl |= ATA_NIEN;
1956 tf.command = ATA_CMD_EDD;
1957 tf.protocol = ATA_PROT_NODATA;
1958
1959 /* do bus reset */
e5338254 1960 spin_lock_irqsave(&ap->host_set->lock, flags);
1da177e4 1961 ata_tf_to_host(ap, &tf);
e5338254 1962 spin_unlock_irqrestore(&ap->host_set->lock, flags);
1da177e4
LT		 1963
1964 /* spec says at least 2ms. but who knows with those
1965 * crazy ATAPI devices...
1966 */
1967 msleep(150);
1968
1969 return ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
1970}
1971
1972static unsigned int ata_bus_softreset(struct ata_port *ap,
1973 unsigned int devmask)
1974{
1975 struct ata_ioports *ioaddr = &ap->ioaddr;
1976
1977 DPRINTK("ata%u: bus reset via SRST\n", ap->id);
1978
1979 /* software reset. causes dev0 to be selected */
1980 if (ap->flags & ATA_FLAG_MMIO) {
1981 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
1982 udelay(20); /* FIXME: flush */
1983 writeb(ap->ctl | ATA_SRST, (void __iomem *) ioaddr->ctl_addr);
1984 udelay(20); /* FIXME: flush */
1985 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
1986 } else {
1987 outb(ap->ctl, ioaddr->ctl_addr);
1988 udelay(10);
1989 outb(ap->ctl | ATA_SRST, ioaddr->ctl_addr);
1990 udelay(10);
1991 outb(ap->ctl, ioaddr->ctl_addr);
1992 }
1993
1994 /* spec mandates ">= 2ms" before checking status.
1995 * We wait 150ms, because that was the magic delay used for
1996 * ATAPI devices in Hale Landis's ATADRVR, for the period of time
1997 * between when the ATA command register is written, and then
1998 * status is checked. Because waiting for "a while" before
1999 * checking status is fine, post SRST, we perform this magic
2000 * delay here as well.
2001 */
2002 msleep(150);
2003
2004 ata_bus_post_reset(ap, devmask);
2005
2006 return 0;
2007}
2008
2009/**
2010 * ata_bus_reset - reset host port and associated ATA channel
2011 * @ap: port to reset
2012 *
2013 * This is typically the first time we actually start issuing
2014 * commands to the ATA channel. We wait for BSY to clear, then
2015 * issue EXECUTE DEVICE DIAGNOSTIC command, polling for its
2016 * result. Determine what devices, if any, are on the channel
2017 * by looking at the device 0/1 error register. Look at the signature
2018 * stored in each device's taskfile registers, to determine if
2019 * the device is ATA or ATAPI.
2020 *
2021 * LOCKING:
0cba632b
JG		 2022 * PCI/etc. bus probe sem.
2023 * Obtains host_set lock.
1da177e4
LT		 2024 *
2025 * SIDE EFFECTS:
2026 * Sets ATA_FLAG_PORT_DISABLED if bus reset fails.
2027 */
2028
2029void ata_bus_reset(struct ata_port *ap)
2030{
2031 struct ata_ioports *ioaddr = &ap->ioaddr;
2032 unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
2033 u8 err;
2034 unsigned int dev0, dev1 = 0, rc = 0, devmask = 0;
2035
2036 DPRINTK("ENTER, host %u, port %u\n", ap->id, ap->port_no);
2037
2038 /* determine if device 0/1 are present */
2039 if (ap->flags & ATA_FLAG_SATA_RESET)
2040 dev0 = 1;
2041 else {
2042 dev0 = ata_devchk(ap, 0);
2043 if (slave_possible)
2044 dev1 = ata_devchk(ap, 1);
2045 }
2046
2047 if (dev0)
2048 devmask |= (1 << 0);
2049 if (dev1)
2050 devmask |= (1 << 1);
2051
2052 /* select device 0 again */
2053 ap->ops->dev_select(ap, 0);
2054
2055 /* issue bus reset */
2056 if (ap->flags & ATA_FLAG_SRST)
2057 rc = ata_bus_softreset(ap, devmask);
2058 else if ((ap->flags & ATA_FLAG_SATA_RESET) == 0) {
2059 /* set up device control */
2060 if (ap->flags & ATA_FLAG_MMIO)
2061 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
2062 else
2063 outb(ap->ctl, ioaddr->ctl_addr);
2064 rc = ata_bus_edd(ap);
2065 }
2066
2067 if (rc)
2068 goto err_out;
2069
2070 /*
2071 * determine by signature whether we have ATA or ATAPI devices
2072 */
b4dc7623 2073 ap->device[0].class = ata_dev_try_classify(ap, 0, &err);
1da177e4 2074 if ((slave_possible) && (err != 0x81))
b4dc7623 2075 ap->device[1].class = ata_dev_try_classify(ap, 1, &err);
1da177e4
LT		 2076
2077 /* re-enable interrupts */
2078 if (ap->ioaddr.ctl_addr) /* FIXME: hack. create a hook instead */
2079 ata_irq_on(ap);
2080
2081 /* is double-select really necessary? */
2082 if (ap->device[1].class != ATA_DEV_NONE)
2083 ap->ops->dev_select(ap, 1);
2084 if (ap->device[0].class != ATA_DEV_NONE)
2085 ap->ops->dev_select(ap, 0);
2086
2087 /* if no devices were detected, disable this port */
2088 if ((ap->device[0].class == ATA_DEV_NONE) &&
2089 (ap->device[1].class == ATA_DEV_NONE))
2090 goto err_out;
2091
2092 if (ap->flags & (ATA_FLAG_SATA_RESET | ATA_FLAG_SRST)) {
2093 /* set up device control for ATA_FLAG_SATA_RESET */
2094 if (ap->flags & ATA_FLAG_MMIO)
2095 writeb(ap->ctl, (void __iomem *) ioaddr->ctl_addr);
2096 else
2097 outb(ap->ctl, ioaddr->ctl_addr);
2098 }
2099
2100 DPRINTK("EXIT\n");
2101 return;
2102
2103err_out:
2104 printk(KERN_ERR "ata%u: disabling port\n", ap->id);
2105 ap->ops->port_disable(ap);
2106
2107 DPRINTK("EXIT\n");
2108}
2109
7a7921e8
TH		 2110static int sata_phy_resume(struct ata_port *ap)
2111{
2112 unsigned long timeout = jiffies + (HZ * 5);
2113 u32 sstatus;
2114
2115 scr_write_flush(ap, SCR_CONTROL, 0x300);
2116
2117 /* Wait for phy to become ready, if necessary. */
2118 do {
2119 msleep(200);
2120 sstatus = scr_read(ap, SCR_STATUS);
2121 if ((sstatus & 0xf) != 1)
2122 return 0;
2123 } while (time_before(jiffies, timeout));
2124
2125 return -1;
2126}
2127
8a19ac89
TH		 2128/**
2129 * ata_std_probeinit - initialize probing
2130 * @ap: port to be probed
2131 *
2132 * @ap is about to be probed. Initialize it. This function is
2133 * to be used as standard callback for ata_drive_probe_reset().
3a39746a
TH		 2134 *
2135 * NOTE!!! Do not use this function as probeinit if a low level
2136 * driver implements only hardreset. Just pass NULL as probeinit
2137 * in that case. Using this function is probably okay but doing
2138 * so makes reset sequence different from the original
2139 * ->phy_reset implementation and Jeff nervous. :-P
8a19ac89
TH		 2140 */
2141extern void ata_std_probeinit(struct ata_port *ap)
2142{
3a39746a 2143 if (ap->flags & ATA_FLAG_SATA && ap->ops->scr_read) {
8a19ac89 2144 sata_phy_resume(ap);
3a39746a
TH		 2145 if (sata_dev_present(ap))
2146 ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT);
2147 }
8a19ac89
TH		 2148}
2149
c2bd5804
TH		 2150/**
2151 * ata_std_softreset - reset host port via ATA SRST
2152 * @ap: port to reset
2153 * @verbose: fail verbosely
2154 * @classes: resulting classes of attached devices
2155 *
2156 * Reset host port using ATA SRST. This function is to be used
2157 * as standard callback for ata_drive_*_reset() functions.
2158 *
2159 * LOCKING:
2160 * Kernel thread context (may sleep)
2161 *
2162 * RETURNS:
2163 * 0 on success, -errno otherwise.
2164 */
2165int ata_std_softreset(struct ata_port *ap, int verbose, unsigned int *classes)
2166{
2167 unsigned int slave_possible = ap->flags & ATA_FLAG_SLAVE_POSS;
2168 unsigned int devmask = 0, err_mask;
2169 u8 err;
2170
2171 DPRINTK("ENTER\n");
2172
3a39746a
TH		 2173 if (ap->ops->scr_read && !sata_dev_present(ap)) {
2174 classes[0] = ATA_DEV_NONE;
2175 goto out;
2176 }
2177
c2bd5804
TH		 2178 /* determine if device 0/1 are present */
2179 if (ata_devchk(ap, 0))
2180 devmask |= (1 << 0);
2181 if (slave_possible && ata_devchk(ap, 1))
2182 devmask |= (1 << 1);
2183
c2bd5804
TH		 2184 /* select device 0 again */
2185 ap->ops->dev_select(ap, 0);
2186
2187 /* issue bus reset */
2188 DPRINTK("about to softreset, devmask=%x\n", devmask);
2189 err_mask = ata_bus_softreset(ap, devmask);
2190 if (err_mask) {
2191 if (verbose)
2192 printk(KERN_ERR "ata%u: SRST failed (err_mask=0x%x)\n",
2193 ap->id, err_mask);
2194 else
2195 DPRINTK("EXIT, softreset failed (err_mask=0x%x)\n",
2196 err_mask);
2197 return -EIO;
2198 }
2199
2200 /* determine by signature whether we have ATA or ATAPI devices */
2201 classes[0] = ata_dev_try_classify(ap, 0, &err);
2202 if (slave_possible && err != 0x81)
2203 classes[1] = ata_dev_try_classify(ap, 1, &err);
2204
3a39746a 2205 out:
c2bd5804
TH		 2206 DPRINTK("EXIT, classes[0]=%u [1]=%u\n", classes[0], classes[1]);
2207 return 0;
2208}
2209
2210/**
2211 * sata_std_hardreset - reset host port via SATA phy reset
2212 * @ap: port to reset
2213 * @verbose: fail verbosely
2214 * @class: resulting class of attached device
2215 *
2216 * SATA phy-reset host port using DET bits of SControl register.
2217 * This function is to be used as standard callback for
2218 * ata_drive_*_reset().
2219 *
2220 * LOCKING:
2221 * Kernel thread context (may sleep)
2222 *
2223 * RETURNS:
2224 * 0 on success, -errno otherwise.
2225 */
2226int sata_std_hardreset(struct ata_port *ap, int verbose, unsigned int *class)
2227{
c2bd5804
TH		 2228 DPRINTK("ENTER\n");
2229
2230 /* Issue phy wake/reset */
2231 scr_write_flush(ap, SCR_CONTROL, 0x301);
2232
2233 /*
2234 * Couldn't find anything in SATA I/II specs, but AHCI-1.1
2235 * 10.4.2 says at least 1 ms.
2236 */
2237 msleep(1);
2238
7a7921e8
TH		 2239 /* Bring phy back */
2240 sata_phy_resume(ap);
c2bd5804 2241
c2bd5804
TH		 2242 /* TODO: phy layer with polling, timeouts, etc. */
2243 if (!sata_dev_present(ap)) {
2244 *class = ATA_DEV_NONE;
2245 DPRINTK("EXIT, link offline\n");
2246 return 0;
2247 }
2248
2249 if (ata_busy_sleep(ap, ATA_TMOUT_BOOT_QUICK, ATA_TMOUT_BOOT)) {
2250 if (verbose)
2251 printk(KERN_ERR "ata%u: COMRESET failed "
2252 "(device not ready)\n", ap->id);
2253 else
2254 DPRINTK("EXIT, device not ready\n");
2255 return -EIO;
2256 }
2257
3a39746a
TH		 2258 ap->ops->dev_select(ap, 0); /* probably unnecessary */
2259
c2bd5804
TH		 2260 *class = ata_dev_try_classify(ap, 0, NULL);
2261
2262 DPRINTK("EXIT, class=%u\n", *class);
2263 return 0;
2264}
2265
2266/**
2267 * ata_std_postreset - standard postreset callback
2268 * @ap: the target ata_port
2269 * @classes: classes of attached devices
2270 *
2271 * This function is invoked after a successful reset. Note that
2272 * the device might have been reset more than once using
2273 * different reset methods before postreset is invoked.
c2bd5804
TH		 2274 *
2275 * This function is to be used as standard callback for
2276 * ata_drive_*_reset().
2277 *
2278 * LOCKING:
2279 * Kernel thread context (may sleep)
2280 */
2281void ata_std_postreset(struct ata_port *ap, unsigned int *classes)
2282{
2283 DPRINTK("ENTER\n");
2284
56497bd5 2285 /* set cable type if it isn't already set */
c2bd5804
TH		 2286 if (ap->cbl == ATA_CBL_NONE && ap->flags & ATA_FLAG_SATA)
2287 ap->cbl = ATA_CBL_SATA;
2288
2289 /* print link status */
2290 if (ap->cbl == ATA_CBL_SATA)
2291 sata_print_link_status(ap);
2292
3a39746a
TH		 2293 /* re-enable interrupts */
2294 if (ap->ioaddr.ctl_addr) /* FIXME: hack. create a hook instead */
2295 ata_irq_on(ap);
c2bd5804
TH		 2296
2297 /* is double-select really necessary? */
2298 if (classes[0] != ATA_DEV_NONE)
2299 ap->ops->dev_select(ap, 1);
2300 if (classes[1] != ATA_DEV_NONE)
2301 ap->ops->dev_select(ap, 0);
2302
3a39746a
TH		 2303 /* bail out if no device is present */
2304 if (classes[0] == ATA_DEV_NONE && classes[1] == ATA_DEV_NONE) {
2305 DPRINTK("EXIT, no device\n");
2306 return;
2307 }
2308
2309 /* set up device control */
2310 if (ap->ioaddr.ctl_addr) {
2311 if (ap->flags & ATA_FLAG_MMIO)
2312 writeb(ap->ctl, (void __iomem *) ap->ioaddr.ctl_addr);
2313 else
2314 outb(ap->ctl, ap->ioaddr.ctl_addr);
2315 }
c2bd5804
TH		 2316
2317 DPRINTK("EXIT\n");
2318}
2319
2320/**
2321 * ata_std_probe_reset - standard probe reset method
2322 * @ap: prot to perform probe-reset
2323 * @classes: resulting classes of attached devices
2324 *
2325 * The stock off-the-shelf ->probe_reset method.
2326 *
2327 * LOCKING:
2328 * Kernel thread context (may sleep)
2329 *
2330 * RETURNS:
2331 * 0 on success, -errno otherwise.
2332 */
2333int ata_std_probe_reset(struct ata_port *ap, unsigned int *classes)
2334{
2335 ata_reset_fn_t hardreset;
2336
2337 hardreset = NULL;
b911fc3a 2338 if (ap->flags & ATA_FLAG_SATA && ap->ops->scr_read)
c2bd5804
TH		 2339 hardreset = sata_std_hardreset;
2340
8a19ac89 2341 return ata_drive_probe_reset(ap, ata_std_probeinit,
7944ea95 2342 ata_std_softreset, hardreset,
c2bd5804
TH		 2343 ata_std_postreset, classes);
2344}
2345
a62c0fc5
TH		 2346static int do_probe_reset(struct ata_port *ap, ata_reset_fn_t reset,
2347 ata_postreset_fn_t postreset,
2348 unsigned int *classes)
2349{
2350 int i, rc;
2351
2352 for (i = 0; i < ATA_MAX_DEVICES; i++)
2353 classes[i] = ATA_DEV_UNKNOWN;
2354
2355 rc = reset(ap, 0, classes);
2356 if (rc)
2357 return rc;
2358
2359 /* If any class isn't ATA_DEV_UNKNOWN, consider classification
2360 * is complete and convert all ATA_DEV_UNKNOWN to
2361 * ATA_DEV_NONE.
2362 */
2363 for (i = 0; i < ATA_MAX_DEVICES; i++)
2364 if (classes[i] != ATA_DEV_UNKNOWN)
2365 break;
2366
2367 if (i < ATA_MAX_DEVICES)
2368 for (i = 0; i < ATA_MAX_DEVICES; i++)
2369 if (classes[i] == ATA_DEV_UNKNOWN)
2370 classes[i] = ATA_DEV_NONE;
2371
2372 if (postreset)
2373 postreset(ap, classes);
2374
2375 return classes[0] != ATA_DEV_UNKNOWN ? 0 : -ENODEV;
2376}
2377
2378/**
2379 * ata_drive_probe_reset - Perform probe reset with given methods
2380 * @ap: port to reset
7944ea95 2381 * @probeinit: probeinit method (can be NULL)
a62c0fc5
TH		 2382 * @softreset: softreset method (can be NULL)
2383 * @hardreset: hardreset method (can be NULL)
2384 * @postreset: postreset method (can be NULL)
2385 * @classes: resulting classes of attached devices
2386 *
2387 * Reset the specified port and classify attached devices using
2388 * given methods. This function prefers softreset but tries all
2389 * possible reset sequences to reset and classify devices. This
2390 * function is intended to be used for constructing ->probe_reset
2391 * callback by low level drivers.
2392 *
2393 * Reset methods should follow the following rules.
2394 *
2395 * - Return 0 on sucess, -errno on failure.
2396 * - If classification is supported, fill classes[] with
2397 * recognized class codes.
2398 * - If classification is not supported, leave classes[] alone.
2399 * - If verbose is non-zero, print error message on failure;
2400 * otherwise, shut up.
2401 *
2402 * LOCKING:
2403 * Kernel thread context (may sleep)
2404 *
2405 * RETURNS:
2406 * 0 on success, -EINVAL if no reset method is avaliable, -ENODEV
2407 * if classification fails, and any error code from reset
2408 * methods.
2409 */
7944ea95 2410int ata_drive_probe_reset(struct ata_port *ap, ata_probeinit_fn_t probeinit,
a62c0fc5
TH		 2411 ata_reset_fn_t softreset, ata_reset_fn_t hardreset,
2412 ata_postreset_fn_t postreset, unsigned int *classes)
2413{
2414 int rc = -EINVAL;
2415
7944ea95
TH		 2416 if (probeinit)
2417 probeinit(ap);
2418
a62c0fc5
TH		 2419 if (softreset) {
2420 rc = do_probe_reset(ap, softreset, postreset, classes);
2421 if (rc == 0)
2422 return 0;
2423 }
2424
2425 if (!hardreset)
2426 return rc;
2427
2428 rc = do_probe_reset(ap, hardreset, postreset, classes);
2429 if (rc == 0 || rc != -ENODEV)
2430 return rc;
2431
2432 if (softreset)
2433 rc = do_probe_reset(ap, softreset, postreset, classes);
2434
2435 return rc;
2436}
2437
623a3128
TH		 2438/**
2439 * ata_dev_same_device - Determine whether new ID matches configured device
2440 * @ap: port on which the device to compare against resides
2441 * @dev: device to compare against
2442 * @new_class: class of the new device
2443 * @new_id: IDENTIFY page of the new device
2444 *
2445 * Compare @new_class and @new_id against @dev and determine
2446 * whether @dev is the device indicated by @new_class and
2447 * @new_id.
2448 *
2449 * LOCKING:
2450 * None.
2451 *
2452 * RETURNS:
2453 * 1 if @dev matches @new_class and @new_id, 0 otherwise.
2454 */
2455static int ata_dev_same_device(struct ata_port *ap, struct ata_device *dev,
2456 unsigned int new_class, const u16 *new_id)
2457{
2458 const u16 *old_id = dev->id;
2459 unsigned char model[2][41], serial[2][21];
2460 u64 new_n_sectors;
2461
2462 if (dev->class != new_class) {
2463 printk(KERN_INFO
2464 "ata%u: dev %u class mismatch %d != %d\n",
2465 ap->id, dev->devno, dev->class, new_class);
2466 return 0;
2467 }
2468
2469 ata_id_c_string(old_id, model[0], ATA_ID_PROD_OFS, sizeof(model[0]));
2470 ata_id_c_string(new_id, model[1], ATA_ID_PROD_OFS, sizeof(model[1]));
2471 ata_id_c_string(old_id, serial[0], ATA_ID_SERNO_OFS, sizeof(serial[0]));
2472 ata_id_c_string(new_id, serial[1], ATA_ID_SERNO_OFS, sizeof(serial[1]));
2473 new_n_sectors = ata_id_n_sectors(new_id);
2474
2475 if (strcmp(model[0], model[1])) {
2476 printk(KERN_INFO
2477 "ata%u: dev %u model number mismatch '%s' != '%s'\n",
2478 ap->id, dev->devno, model[0], model[1]);
2479 return 0;
2480 }
2481
2482 if (strcmp(serial[0], serial[1])) {
2483 printk(KERN_INFO
2484 "ata%u: dev %u serial number mismatch '%s' != '%s'\n",
2485 ap->id, dev->devno, serial[0], serial[1]);
2486 return 0;
2487 }
2488
2489 if (dev->class == ATA_DEV_ATA && dev->n_sectors != new_n_sectors) {
2490 printk(KERN_INFO
2491 "ata%u: dev %u n_sectors mismatch %llu != %llu\n",
2492 ap->id, dev->devno, (unsigned long long)dev->n_sectors,
2493 (unsigned long long)new_n_sectors);
2494 return 0;
2495 }
2496
2497 return 1;
2498}
2499
2500/**
2501 * ata_dev_revalidate - Revalidate ATA device
2502 * @ap: port on which the device to revalidate resides
2503 * @dev: device to revalidate
2504 * @post_reset: is this revalidation after reset?
2505 *
2506 * Re-read IDENTIFY page and make sure @dev is still attached to
2507 * the port.
2508 *
2509 * LOCKING:
2510 * Kernel thread context (may sleep)
2511 *
2512 * RETURNS:
2513 * 0 on success, negative errno otherwise
2514 */
2515int ata_dev_revalidate(struct ata_port *ap, struct ata_device *dev,
2516 int post_reset)
2517{
2518 unsigned int class;
2519 u16 *id;
2520 int rc;
2521
2522 if (!ata_dev_present(dev))
2523 return -ENODEV;
2524
2525 class = dev->class;
2526 id = NULL;
2527
2528 /* allocate & read ID data */
2529 rc = ata_dev_read_id(ap, dev, &class, post_reset, &id);
2530 if (rc)
2531 goto fail;
2532
2533 /* is the device still there? */
2534 if (!ata_dev_same_device(ap, dev, class, id)) {
2535 rc = -ENODEV;
2536 goto fail;
2537 }
2538
2539 kfree(dev->id);
2540 dev->id = id;
2541
2542 /* configure device according to the new ID */
2543 return ata_dev_configure(ap, dev, 0);
2544
2545 fail:
2546 printk(KERN_ERR "ata%u: dev %u revalidation failed (errno=%d)\n",
2547 ap->id, dev->devno, rc);
2548 kfree(id);
2549 return rc;
2550}
2551
98ac62de 2552static const char * const ata_dma_blacklist [] = {
1da177e4
LT		 2553 "WDC AC11000H",
2554 "WDC AC22100H",
2555 "WDC AC32500H",
2556 "WDC AC33100H",
2557 "WDC AC31600H",
2558 "WDC AC32100H",
2559 "WDC AC23200L",
2560 "Compaq CRD-8241B",
2561 "CRD-8400B",
2562 "CRD-8480B",
2563 "CRD-8482B",
2564 "CRD-84",
2565 "SanDisk SDP3B",
2566 "SanDisk SDP3B-64",
2567 "SANYO CD-ROM CRD",
2568 "HITACHI CDR-8",
2569 "HITACHI CDR-8335",
2570 "HITACHI CDR-8435",
2571 "Toshiba CD-ROM XM-6202B",
e922256a 2572 "TOSHIBA CD-ROM XM-1702BC",
1da177e4
LT		 2573 "CD-532E-A",
2574 "E-IDE CD-ROM CR-840",
2575 "CD-ROM Drive/F5A",
2576 "WPI CDD-820",
2577 "SAMSUNG CD-ROM SC-148C",
2578 "SAMSUNG CD-ROM SC",
2579 "SanDisk SDP3B-64",
1da177e4
LT		 2580 "ATAPI CD-ROM DRIVE 40X MAXIMUM",
2581 "_NEC DV5800A",
2582};
2583
057ace5e 2584static int ata_dma_blacklisted(const struct ata_device *dev)
1da177e4 2585{
2e02671d 2586 unsigned char model_num[41];
1da177e4
LT		 2587 int i;
2588
6a62a04d 2589 ata_id_c_string(dev->id, model_num, ATA_ID_PROD_OFS, sizeof(model_num));
1da177e4
LT		 2590
2591 for (i = 0; i < ARRAY_SIZE(ata_dma_blacklist); i++)
2e02671d 2592 if (!strcmp(ata_dma_blacklist[i], model_num))
1da177e4
LT		 2593 return 1;
2594
2595 return 0;
2596}
2597
a6d5a51c
TH		 2598/**
2599 * ata_dev_xfermask - Compute supported xfermask of the given device
2600 * @ap: Port on which the device to compute xfermask for resides
2601 * @dev: Device to compute xfermask for
2602 *
2603 * Compute supported xfermask of @dev. This function is
2604 * responsible for applying all known limits including host
2605 * controller limits, device blacklist, etc...
2606 *
2607 * LOCKING:
2608 * None.
2609 *
2610 * RETURNS:
2611 * Computed xfermask.
2612 */
2613static unsigned int ata_dev_xfermask(struct ata_port *ap,
2614 struct ata_device *dev)
1da177e4 2615{
a6d5a51c
TH		 2616 unsigned long xfer_mask;
2617 int i;
1da177e4 2618
a6d5a51c
TH		 2619 xfer_mask = ata_pack_xfermask(ap->pio_mask, ap->mwdma_mask,
2620 ap->udma_mask);
1da177e4 2621
a6d5a51c
TH		 2622 /* use port-wide xfermask for now */
2623 for (i = 0; i < ATA_MAX_DEVICES; i++) {
2624 struct ata_device *d = &ap->device[i];
2625 if (!ata_dev_present(d))
2626 continue;
2627 xfer_mask &= ata_id_xfermask(d->id);
2628 if (ata_dma_blacklisted(d))
2629 xfer_mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA);
1da177e4
LT		 2630 }
2631
a6d5a51c
TH		 2632 if (ata_dma_blacklisted(dev))
2633 printk(KERN_WARNING "ata%u: dev %u is on DMA blacklist, "
2634 "disabling DMA\n", ap->id, dev->devno);
2635
2636 return xfer_mask;
1da177e4
LT		 2637}
2638
1da177e4
LT		 2639/**
2640 * ata_dev_set_xfermode - Issue SET FEATURES - XFER MODE command
2641 * @ap: Port associated with device @dev
2642 * @dev: Device to which command will be sent
2643 *
780a87f7
JG		 2644 * Issue SET FEATURES - XFER MODE command to device @dev
2645 * on port @ap.
2646 *
1da177e4 2647 * LOCKING:
0cba632b 2648 * PCI/etc. bus probe sem.
1da177e4
LT		 2649 */
2650
2651static void ata_dev_set_xfermode(struct ata_port *ap, struct ata_device *dev)
2652{
a0123703 2653 struct ata_taskfile tf;
1da177e4
LT		 2654
2655 /* set up set-features taskfile */
2656 DPRINTK("set features - xfer mode\n");
2657
a0123703
TH		 2658 ata_tf_init(ap, &tf, dev->devno);
2659 tf.command = ATA_CMD_SET_FEATURES;
2660 tf.feature = SETFEATURES_XFER;
2661 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
2662 tf.protocol = ATA_PROT_NODATA;
2663 tf.nsect = dev->xfer_mode;
1da177e4 2664
a0123703
TH		 2665 if (ata_exec_internal(ap, dev, &tf, DMA_NONE, NULL, 0)) {
2666 printk(KERN_ERR "ata%u: failed to set xfermode, disabled\n",
2667 ap->id);
1da177e4 2668 ata_port_disable(ap);
a0123703 2669 }
1da177e4
LT		 2670
2671 DPRINTK("EXIT\n");
2672}
2673
8bf62ece
AL		 2674/**
2675 * ata_dev_init_params - Issue INIT DEV PARAMS command
2676 * @ap: Port associated with device @dev
2677 * @dev: Device to which command will be sent
2678 *
2679 * LOCKING:
6aff8f1f
TH		 2680 * Kernel thread context (may sleep)
2681 *
2682 * RETURNS:
2683 * 0 on success, AC_ERR_* mask otherwise.
8bf62ece
AL		 2684 */
2685
6aff8f1f
TH		 2686static unsigned int ata_dev_init_params(struct ata_port *ap,
2687 struct ata_device *dev)
8bf62ece 2688{
a0123703 2689 struct ata_taskfile tf;
6aff8f1f 2690 unsigned int err_mask;
8bf62ece
AL		 2691 u16 sectors = dev->id[6];
2692 u16 heads = dev->id[3];
2693
2694 /* Number of sectors per track 1-255. Number of heads 1-16 */
2695 if (sectors < 1 || sectors > 255 || heads < 1 || heads > 16)
6aff8f1f 2696 return 0;
8bf62ece
AL		 2697
2698 /* set up init dev params taskfile */
2699 DPRINTK("init dev params \n");
2700
a0123703
TH		 2701 ata_tf_init(ap, &tf, dev->devno);
2702 tf.command = ATA_CMD_INIT_DEV_PARAMS;
2703 tf.flags |= ATA_TFLAG_ISADDR | ATA_TFLAG_DEVICE;
2704 tf.protocol = ATA_PROT_NODATA;
2705 tf.nsect = sectors;
2706 tf.device |= (heads - 1) & 0x0f; /* max head = num. of heads - 1 */
8bf62ece 2707
6aff8f1f 2708 err_mask = ata_exec_internal(ap, dev, &tf, DMA_NONE, NULL, 0);
8bf62ece 2709
6aff8f1f
TH		 2710 DPRINTK("EXIT, err_mask=%x\n", err_mask);
2711 return err_mask;
8bf62ece
AL		 2712}
2713
1da177e4 2714/**
0cba632b
JG		 2715 * ata_sg_clean - Unmap DMA memory associated with command
2716 * @qc: Command containing DMA memory to be released
2717 *
2718 * Unmap all mapped DMA memory associated with this command.
1da177e4
LT		 2719 *
2720 * LOCKING:
0cba632b 2721 * spin_lock_irqsave(host_set lock)
1da177e4
LT		 2722 */
2723
2724static void ata_sg_clean(struct ata_queued_cmd *qc)
2725{
2726 struct ata_port *ap = qc->ap;
cedc9a47 2727 struct scatterlist *sg = qc->__sg;
1da177e4 2728 int dir = qc->dma_dir;
cedc9a47 2729 void *pad_buf = NULL;
1da177e4 2730
a4631474
TH		 2731 WARN_ON(!(qc->flags & ATA_QCFLAG_DMAMAP));
2732 WARN_ON(sg == NULL);
1da177e4
LT		 2733
2734 if (qc->flags & ATA_QCFLAG_SINGLE)
f131883e 2735 WARN_ON(qc->n_elem > 1);
1da177e4 2736
2c13b7ce 2737 VPRINTK("unmapping %u sg elements\n", qc->n_elem);
1da177e4 2738
cedc9a47
JG		 2739 /* if we padded the buffer out to 32-bit bound, and data
2740 * xfer direction is from-device, we must copy from the
2741 * pad buffer back into the supplied buffer
2742 */
2743 if (qc->pad_len && !(qc->tf.flags & ATA_TFLAG_WRITE))
2744 pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
2745
2746 if (qc->flags & ATA_QCFLAG_SG) {
e1410f2d
JG		 2747 if (qc->n_elem)
2748 dma_unmap_sg(ap->host_set->dev, sg, qc->n_elem, dir);
cedc9a47
JG		 2749 /* restore last sg */
2750 sg[qc->orig_n_elem - 1].length += qc->pad_len;
2751 if (pad_buf) {
2752 struct scatterlist *psg = &qc->pad_sgent;
2753 void *addr = kmap_atomic(psg->page, KM_IRQ0);
2754 memcpy(addr + psg->offset, pad_buf, qc->pad_len);
dfa15988 2755 kunmap_atomic(addr, KM_IRQ0);
cedc9a47
JG		 2756 }
2757 } else {
2e242fa9 2758 if (qc->n_elem)
e1410f2d
JG		 2759 dma_unmap_single(ap->host_set->dev,
2760 sg_dma_address(&sg[0]), sg_dma_len(&sg[0]),
2761 dir);
cedc9a47
JG		 2762 /* restore sg */
2763 sg->length += qc->pad_len;
2764 if (pad_buf)
2765 memcpy(qc->buf_virt + sg->length - qc->pad_len,
2766 pad_buf, qc->pad_len);
2767 }
1da177e4
LT		 2768
2769 qc->flags &= ~ATA_QCFLAG_DMAMAP;
cedc9a47 2770 qc->__sg = NULL;
1da177e4
LT		 2771}
2772
2773/**
2774 * ata_fill_sg - Fill PCI IDE PRD table
2775 * @qc: Metadata associated with taskfile to be transferred
2776 *
780a87f7
JG		 2777 * Fill PCI IDE PRD (scatter-gather) table with segments
2778 * associated with the current disk command.
2779 *
1da177e4 2780 * LOCKING:
780a87f7 2781 * spin_lock_irqsave(host_set lock)
1da177e4
LT		 2782 *
2783 */
2784static void ata_fill_sg(struct ata_queued_cmd *qc)
2785{
1da177e4 2786 struct ata_port *ap = qc->ap;
cedc9a47
JG		 2787 struct scatterlist *sg;
2788 unsigned int idx;
1da177e4 2789
a4631474 2790 WARN_ON(qc->__sg == NULL);
f131883e 2791 WARN_ON(qc->n_elem == 0 && qc->pad_len == 0);
1da177e4
LT		 2792
2793 idx = 0;
cedc9a47 2794 ata_for_each_sg(sg, qc) {
1da177e4
LT		 2795 u32 addr, offset;
2796 u32 sg_len, len;
2797
2798 /* determine if physical DMA addr spans 64K boundary.
2799 * Note h/w doesn't support 64-bit, so we unconditionally
2800 * truncate dma_addr_t to u32.
2801 */
2802 addr = (u32) sg_dma_address(sg);
2803 sg_len = sg_dma_len(sg);
2804
2805 while (sg_len) {
2806 offset = addr & 0xffff;
2807 len = sg_len;
2808 if ((offset + sg_len) > 0x10000)
2809 len = 0x10000 - offset;
2810
2811 ap->prd[idx].addr = cpu_to_le32(addr);
2812 ap->prd[idx].flags_len = cpu_to_le32(len & 0xffff);
2813 VPRINTK("PRD[%u] = (0x%X, 0x%X)\n", idx, addr, len);
2814
2815 idx++;
2816 sg_len -= len;
2817 addr += len;
2818 }
2819 }
2820
2821 if (idx)
2822 ap->prd[idx - 1].flags_len |= cpu_to_le32(ATA_PRD_EOT);
2823}
2824/**
2825 * ata_check_atapi_dma - Check whether ATAPI DMA can be supported
2826 * @qc: Metadata associated with taskfile to check
2827 *
780a87f7
JG		 2828 * Allow low-level driver to filter ATA PACKET commands, returning
2829 * a status indicating whether or not it is OK to use DMA for the
2830 * supplied PACKET command.
2831 *
1da177e4 2832 * LOCKING:
0cba632b
JG		 2833 * spin_lock_irqsave(host_set lock)
2834 *
1da177e4
LT		 2835 * RETURNS: 0 when ATAPI DMA can be used
2836 * nonzero otherwise
2837 */
2838int ata_check_atapi_dma(struct ata_queued_cmd *qc)
2839{
2840 struct ata_port *ap = qc->ap;
2841 int rc = 0; /* Assume ATAPI DMA is OK by default */
2842
2843 if (ap->ops->check_atapi_dma)
2844 rc = ap->ops->check_atapi_dma(qc);
2845
2846 return rc;
2847}
2848/**
2849 * ata_qc_prep - Prepare taskfile for submission
2850 * @qc: Metadata associated with taskfile to be prepared
2851 *
780a87f7
JG		 2852 * Prepare ATA taskfile for submission.
2853 *
1da177e4
LT		 2854 * LOCKING:
2855 * spin_lock_irqsave(host_set lock)
2856 */
2857void ata_qc_prep(struct ata_queued_cmd *qc)
2858{
2859 if (!(qc->flags & ATA_QCFLAG_DMAMAP))
2860 return;
2861
2862 ata_fill_sg(qc);
2863}
2864
0cba632b
JG		 2865/**
2866 * ata_sg_init_one - Associate command with memory buffer
2867 * @qc: Command to be associated
2868 * @buf: Memory buffer
2869 * @buflen: Length of memory buffer, in bytes.
2870 *
2871 * Initialize the data-related elements of queued_cmd @qc
2872 * to point to a single memory buffer, @buf of byte length @buflen.
2873 *
2874 * LOCKING:
2875 * spin_lock_irqsave(host_set lock)
2876 */
2877
1da177e4
LT		 2878void ata_sg_init_one(struct ata_queued_cmd *qc, void *buf, unsigned int buflen)
2879{
2880 struct scatterlist *sg;
2881
2882 qc->flags |= ATA_QCFLAG_SINGLE;
2883
2884 memset(&qc->sgent, 0, sizeof(qc->sgent));
cedc9a47 2885 qc->__sg = &qc->sgent;
1da177e4 2886 qc->n_elem = 1;
cedc9a47 2887 qc->orig_n_elem = 1;
1da177e4
LT		 2888 qc->buf_virt = buf;
2889
cedc9a47 2890 sg = qc->__sg;
f0612bbc 2891 sg_init_one(sg, buf, buflen);
1da177e4
LT		 2892}
2893
0cba632b
JG		 2894/**
2895 * ata_sg_init - Associate command with scatter-gather table.
2896 * @qc: Command to be associated
2897 * @sg: Scatter-gather table.
2898 * @n_elem: Number of elements in s/g table.
2899 *
2900 * Initialize the data-related elements of queued_cmd @qc
2901 * to point to a scatter-gather table @sg, containing @n_elem
2902 * elements.
2903 *
2904 * LOCKING:
2905 * spin_lock_irqsave(host_set lock)
2906 */
2907
1da177e4
LT		 2908void ata_sg_init(struct ata_queued_cmd *qc, struct scatterlist *sg,
2909 unsigned int n_elem)
2910{
2911 qc->flags |= ATA_QCFLAG_SG;
cedc9a47 2912 qc->__sg = sg;
1da177e4 2913 qc->n_elem = n_elem;
cedc9a47 2914 qc->orig_n_elem = n_elem;
1da177e4
LT		 2915}
2916
2917/**
0cba632b
JG		 2918 * ata_sg_setup_one - DMA-map the memory buffer associated with a command.
2919 * @qc: Command with memory buffer to be mapped.
2920 *
2921 * DMA-map the memory buffer associated with queued_cmd @qc.
1da177e4
LT		 2922 *
2923 * LOCKING:
2924 * spin_lock_irqsave(host_set lock)
2925 *
2926 * RETURNS:
0cba632b 2927 * Zero on success, negative on error.
1da177e4
LT		 2928 */
2929
2930static int ata_sg_setup_one(struct ata_queued_cmd *qc)
2931{
2932 struct ata_port *ap = qc->ap;
2933 int dir = qc->dma_dir;
cedc9a47 2934 struct scatterlist *sg = qc->__sg;
1da177e4 2935 dma_addr_t dma_address;
2e242fa9 2936 int trim_sg = 0;
1da177e4 2937
cedc9a47
JG		 2938 /* we must lengthen transfers to end on a 32-bit boundary */
2939 qc->pad_len = sg->length & 3;
2940 if (qc->pad_len) {
2941 void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
2942 struct scatterlist *psg = &qc->pad_sgent;
2943
a4631474 2944 WARN_ON(qc->dev->class != ATA_DEV_ATAPI);
cedc9a47
JG		 2945
2946 memset(pad_buf, 0, ATA_DMA_PAD_SZ);
2947
2948 if (qc->tf.flags & ATA_TFLAG_WRITE)
2949 memcpy(pad_buf, qc->buf_virt + sg->length - qc->pad_len,
2950 qc->pad_len);
2951
2952 sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ);
2953 sg_dma_len(psg) = ATA_DMA_PAD_SZ;
2954 /* trim sg */
2955 sg->length -= qc->pad_len;
2e242fa9
TH		 2956 if (sg->length == 0)
2957 trim_sg = 1;
cedc9a47
JG		 2958
2959 DPRINTK("padding done, sg->length=%u pad_len=%u\n",
2960 sg->length, qc->pad_len);
2961 }
2962
2e242fa9
TH		 2963 if (trim_sg) {
2964 qc->n_elem--;
e1410f2d
JG		 2965 goto skip_map;
2966 }
2967
1da177e4 2968 dma_address = dma_map_single(ap->host_set->dev, qc->buf_virt,
32529e01 2969 sg->length, dir);
537a95d9
TH		 2970 if (dma_mapping_error(dma_address)) {
2971 /* restore sg */
2972 sg->length += qc->pad_len;
1da177e4 2973 return -1;
537a95d9 2974 }
1da177e4
LT		 2975
2976 sg_dma_address(sg) = dma_address;
32529e01 2977 sg_dma_len(sg) = sg->length;
1da177e4 2978
2e242fa9 2979skip_map:
1da177e4
LT		 2980 DPRINTK("mapped buffer of %d bytes for %s\n", sg_dma_len(sg),
2981 qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
2982
2983 return 0;
2984}
2985
2986/**
0cba632b
JG		 2987 * ata_sg_setup - DMA-map the scatter-gather table associated with a command.
2988 * @qc: Command with scatter-gather table to be mapped.
2989 *
2990 * DMA-map the scatter-gather table associated with queued_cmd @qc.
1da177e4
LT		 2991 *
2992 * LOCKING:
2993 * spin_lock_irqsave(host_set lock)
2994 *
2995 * RETURNS:
0cba632b 2996 * Zero on success, negative on error.
1da177e4
LT		 2997 *
2998 */
2999
3000static int ata_sg_setup(struct ata_queued_cmd *qc)
3001{
3002 struct ata_port *ap = qc->ap;
cedc9a47
JG		 3003 struct scatterlist *sg = qc->__sg;
3004 struct scatterlist *lsg = &sg[qc->n_elem - 1];
e1410f2d 3005 int n_elem, pre_n_elem, dir, trim_sg = 0;
1da177e4
LT		 3006
3007 VPRINTK("ENTER, ata%u\n", ap->id);
a4631474 3008 WARN_ON(!(qc->flags & ATA_QCFLAG_SG));
1da177e4 3009
cedc9a47
JG		 3010 /* we must lengthen transfers to end on a 32-bit boundary */
3011 qc->pad_len = lsg->length & 3;
3012 if (qc->pad_len) {
3013 void *pad_buf = ap->pad + (qc->tag * ATA_DMA_PAD_SZ);
3014 struct scatterlist *psg = &qc->pad_sgent;
3015 unsigned int offset;
3016
a4631474 3017 WARN_ON(qc->dev->class != ATA_DEV_ATAPI);
cedc9a47
JG		 3018
3019 memset(pad_buf, 0, ATA_DMA_PAD_SZ);
3020
3021 /*
3022 * psg->page/offset are used to copy to-be-written
3023 * data in this function or read data in ata_sg_clean.
3024 */
3025 offset = lsg->offset + lsg->length - qc->pad_len;
3026 psg->page = nth_page(lsg->page, offset >> PAGE_SHIFT);
3027 psg->offset = offset_in_page(offset);
3028
3029 if (qc->tf.flags & ATA_TFLAG_WRITE) {
3030 void *addr = kmap_atomic(psg->page, KM_IRQ0);
3031 memcpy(pad_buf, addr + psg->offset, qc->pad_len);
dfa15988 3032 kunmap_atomic(addr, KM_IRQ0);
cedc9a47
JG		 3033 }
3034
3035 sg_dma_address(psg) = ap->pad_dma + (qc->tag * ATA_DMA_PAD_SZ);
3036 sg_dma_len(psg) = ATA_DMA_PAD_SZ;
3037 /* trim last sg */
3038 lsg->length -= qc->pad_len;
e1410f2d
JG		 3039 if (lsg->length == 0)
3040 trim_sg = 1;
cedc9a47
JG		 3041
3042 DPRINTK("padding done, sg[%d].length=%u pad_len=%u\n",
3043 qc->n_elem - 1, lsg->length, qc->pad_len);
3044 }
3045
e1410f2d
JG		 3046 pre_n_elem = qc->n_elem;
3047 if (trim_sg && pre_n_elem)
3048 pre_n_elem--;
3049
3050 if (!pre_n_elem) {
3051 n_elem = 0;
3052 goto skip_map;
3053 }
3054
1da177e4 3055 dir = qc->dma_dir;
e1410f2d 3056 n_elem = dma_map_sg(ap->host_set->dev, sg, pre_n_elem, dir);
537a95d9
TH		 3057 if (n_elem < 1) {
3058 /* restore last sg */
3059 lsg->length += qc->pad_len;
1da177e4 3060 return -1;
537a95d9 3061 }
1da177e4
LT		 3062
3063 DPRINTK("%d sg elements mapped\n", n_elem);
3064
e1410f2d 3065skip_map:
1da177e4
LT		 3066 qc->n_elem = n_elem;
3067
3068 return 0;
3069}
3070
40e8c82c
TH		 3071/**
3072 * ata_poll_qc_complete - turn irq back on and finish qc
3073 * @qc: Command to complete
8e8b77dd 3074 * @err_mask: ATA status register content
40e8c82c
TH		 3075 *
3076 * LOCKING:
3077 * None. (grabs host lock)
3078 */
3079
a22e2eb0 3080void ata_poll_qc_complete(struct ata_queued_cmd *qc)
40e8c82c
TH		 3081{
3082 struct ata_port *ap = qc->ap;
b8f6153e 3083 unsigned long flags;
40e8c82c 3084
b8f6153e 3085 spin_lock_irqsave(&ap->host_set->lock, flags);
40e8c82c
TH		 3086 ap->flags &= ~ATA_FLAG_NOINTR;
3087 ata_irq_on(ap);
a22e2eb0 3088 ata_qc_complete(qc);
b8f6153e 3089 spin_unlock_irqrestore(&ap->host_set->lock, flags);
40e8c82c
TH		 3090}
3091
1da177e4 3092/**
c893a3ae 3093 * ata_pio_poll - poll using PIO, depending on current state
6f0ef4fa 3094 * @ap: the target ata_port
1da177e4
LT		 3095 *
3096 * LOCKING:
0cba632b 3097 * None. (executing in kernel thread context)
1da177e4
LT		 3098 *
3099 * RETURNS:
6f0ef4fa 3100 * timeout value to use
1da177e4
LT		 3101 */
3102
3103static unsigned long ata_pio_poll(struct ata_port *ap)
3104{
c14b8331 3105 struct ata_queued_cmd *qc;
1da177e4 3106 u8 status;
14be71f4
AL		 3107 unsigned int poll_state = HSM_ST_UNKNOWN;
3108 unsigned int reg_state = HSM_ST_UNKNOWN;
14be71f4 3109
c14b8331 3110 qc = ata_qc_from_tag(ap, ap->active_tag);
a4631474 3111 WARN_ON(qc == NULL);
c14b8331 3112
14be71f4
AL		 3113 switch (ap->hsm_task_state) {
3114 case HSM_ST:
3115 case HSM_ST_POLL:
3116 poll_state = HSM_ST_POLL;
3117 reg_state = HSM_ST;
1da177e4 3118 break;
14be71f4
AL		 3119 case HSM_ST_LAST:
3120 case HSM_ST_LAST_POLL:
3121 poll_state = HSM_ST_LAST_POLL;
3122 reg_state = HSM_ST_LAST;
1da177e4
LT		 3123 break;
3124 default:
3125 BUG();
3126 break;
3127 }
3128
3129 status = ata_chk_status(ap);
3130 if (status & ATA_BUSY) {
3131 if (time_after(jiffies, ap->pio_task_timeout)) {
11a56d24 3132 qc->err_mask |= AC_ERR_TIMEOUT;
7c398335 3133 ap->hsm_task_state = HSM_ST_TMOUT;
1da177e4
LT		 3134 return 0;
3135 }
14be71f4 3136 ap->hsm_task_state = poll_state;
1da177e4
LT		 3137 return ATA_SHORT_PAUSE;
3138 }
3139
14be71f4 3140 ap->hsm_task_state = reg_state;
1da177e4
LT		 3141 return 0;
3142}
3143
3144/**
6f0ef4fa
RD		 3145 * ata_pio_complete - check if drive is busy or idle
3146 * @ap: the target ata_port
1da177e4
LT		 3147 *
3148 * LOCKING:
0cba632b 3149 * None. (executing in kernel thread context)
7fb6ec28
JG		 3150 *
3151 * RETURNS:
3152 * Non-zero if qc completed, zero otherwise.
1da177e4
LT		 3153 */
3154
7fb6ec28 3155static int ata_pio_complete (struct ata_port *ap)
1da177e4
LT		 3156{
3157 struct ata_queued_cmd *qc;
3158 u8 drv_stat;
3159
3160 /*
31433ea3
AC		 3161 * This is purely heuristic. This is a fast path. Sometimes when
3162 * we enter, BSY will be cleared in a chk-status or two. If not,
3163 * the drive is probably seeking or something. Snooze for a couple
3164 * msecs, then chk-status again. If still busy, fall back to
14be71f4 3165 * HSM_ST_POLL state.
1da177e4 3166 */
fe79e683
AL		 3167 drv_stat = ata_busy_wait(ap, ATA_BUSY, 10);
3168 if (drv_stat & ATA_BUSY) {
1da177e4 3169 msleep(2);
fe79e683
AL		 3170 drv_stat = ata_busy_wait(ap, ATA_BUSY, 10);
3171 if (drv_stat & ATA_BUSY) {
14be71f4 3172 ap->hsm_task_state = HSM_ST_LAST_POLL;
1da177e4 3173 ap->pio_task_timeout = jiffies + ATA_TMOUT_PIO;
7fb6ec28 3174 return 0;
1da177e4
LT		 3175 }
3176 }
3177
c14b8331 3178 qc = ata_qc_from_tag(ap, ap->active_tag);
a4631474 3179 WARN_ON(qc == NULL);
c14b8331 3180
1da177e4
LT		 3181 drv_stat = ata_wait_idle(ap);
3182 if (!ata_ok(drv_stat)) {
1c848984 3183 qc->err_mask |= __ac_err_mask(drv_stat);
14be71f4 3184 ap->hsm_task_state = HSM_ST_ERR;
7fb6ec28 3185 return 0;
1da177e4
LT		 3186 }
3187
14be71f4 3188 ap->hsm_task_state = HSM_ST_IDLE;
1da177e4 3189
a4631474 3190 WARN_ON(qc->err_mask);
a22e2eb0 3191 ata_poll_qc_complete(qc);
7fb6ec28
JG		 3192
3193 /* another command may start at this point */
3194
3195 return 1;
1da177e4
LT		 3196}
3197
0baab86b
EF		 3198
3199/**
c893a3ae 3200 * swap_buf_le16 - swap halves of 16-bit words in place
0baab86b
EF		 3201 * @buf: Buffer to swap
3202 * @buf_words: Number of 16-bit words in buffer.
3203 *
3204 * Swap halves of 16-bit words if needed to convert from
3205 * little-endian byte order to native cpu byte order, or
3206 * vice-versa.
3207 *
3208 * LOCKING:
6f0ef4fa 3209 * Inherited from caller.
0baab86b 3210 */
1da177e4
LT		 3211void swap_buf_le16(u16 *buf, unsigned int buf_words)
3212{
3213#ifdef __BIG_ENDIAN
3214 unsigned int i;
3215
3216 for (i = 0; i < buf_words; i++)
3217 buf[i] = le16_to_cpu(buf[i]);
3218#endif /* __BIG_ENDIAN */
3219}
3220
6ae4cfb5
AL		 3221/**
3222 * ata_mmio_data_xfer - Transfer data by MMIO
3223 * @ap: port to read/write
3224 * @buf: data buffer
3225 * @buflen: buffer length
344babaa 3226 * @write_data: read/write
6ae4cfb5
AL		 3227 *
3228 * Transfer data from/to the device data register by MMIO.
3229 *
3230 * LOCKING:
3231 * Inherited from caller.
6ae4cfb5
AL		 3232 */
3233
1da177e4
LT		 3234static void ata_mmio_data_xfer(struct ata_port *ap, unsigned char *buf,
3235 unsigned int buflen, int write_data)
3236{
3237 unsigned int i;
3238 unsigned int words = buflen >> 1;
3239 u16 *buf16 = (u16 *) buf;
3240 void __iomem *mmio = (void __iomem *)ap->ioaddr.data_addr;
3241
6ae4cfb5 3242 /* Transfer multiple of 2 bytes */
1da177e4
LT		 3243 if (write_data) {
3244 for (i = 0; i < words; i++)
3245 writew(le16_to_cpu(buf16[i]), mmio);
3246 } else {
3247 for (i = 0; i < words; i++)
3248 buf16[i] = cpu_to_le16(readw(mmio));
3249 }
6ae4cfb5
AL		 3250
3251 /* Transfer trailing 1 byte, if any. */
3252 if (unlikely(buflen & 0x01)) {
3253 u16 align_buf[1] = { 0 };
3254 unsigned char *trailing_buf = buf + buflen - 1;
3255
3256 if (write_data) {
3257 memcpy(align_buf, trailing_buf, 1);
3258 writew(le16_to_cpu(align_buf[0]), mmio);
3259 } else {
3260 align_buf[0] = cpu_to_le16(readw(mmio));
3261 memcpy(trailing_buf, align_buf, 1);
3262 }
3263 }
1da177e4
LT		 3264}
3265
6ae4cfb5
AL		 3266/**
3267 * ata_pio_data_xfer - Transfer data by PIO
3268 * @ap: port to read/write
3269 * @buf: data buffer
3270 * @buflen: buffer length
344babaa 3271 * @write_data: read/write
6ae4cfb5
AL		 3272 *
3273 * Transfer data from/to the device data register by PIO.
3274 *
3275 * LOCKING:
3276 * Inherited from caller.
6ae4cfb5
AL		 3277 */
3278
1da177e4
LT		 3279static void ata_pio_data_xfer(struct ata_port *ap, unsigned char *buf,
3280 unsigned int buflen, int write_data)
3281{
6ae4cfb5 3282 unsigned int words = buflen >> 1;
1da177e4 3283
6ae4cfb5 3284 /* Transfer multiple of 2 bytes */
1da177e4 3285 if (write_data)
6ae4cfb5 3286 outsw(ap->ioaddr.data_addr, buf, words);
1da177e4 3287 else
6ae4cfb5
AL		 3288 insw(ap->ioaddr.data_addr, buf, words);
3289
3290 /* Transfer trailing 1 byte, if any. */
3291 if (unlikely(buflen & 0x01)) {
3292 u16 align_buf[1] = { 0 };
3293 unsigned char *trailing_buf = buf + buflen - 1;
3294
3295 if (write_data) {
3296 memcpy(align_buf, trailing_buf, 1);
3297 outw(le16_to_cpu(align_buf[0]), ap->ioaddr.data_addr);
3298 } else {
3299 align_buf[0] = cpu_to_le16(inw(ap->ioaddr.data_addr));
3300 memcpy(trailing_buf, align_buf, 1);
3301 }
3302 }
1da177e4
LT		 3303}
3304
6ae4cfb5
AL		 3305/**
3306 * ata_data_xfer - Transfer data from/to the data register.
3307 * @ap: port to read/write
3308 * @buf: data buffer
3309 * @buflen: buffer length
3310 * @do_write: read/write
3311 *
3312 * Transfer data from/to the device data register.
3313 *
3314 * LOCKING:
3315 * Inherited from caller.
6ae4cfb5
AL		 3316 */
3317
1da177e4
LT		 3318static void ata_data_xfer(struct ata_port *ap, unsigned char *buf,
3319 unsigned int buflen, int do_write)
3320{
a1bd9e68
AC		 3321 /* Make the crap hardware pay the costs not the good stuff */
3322 if (unlikely(ap->flags & ATA_FLAG_IRQ_MASK)) {
3323 unsigned long flags;
3324 local_irq_save(flags);
3325 if (ap->flags & ATA_FLAG_MMIO)
3326 ata_mmio_data_xfer(ap, buf, buflen, do_write);
3327 else
3328 ata_pio_data_xfer(ap, buf, buflen, do_write);
3329 local_irq_restore(flags);
3330 } else {
3331 if (ap->flags & ATA_FLAG_MMIO)
3332 ata_mmio_data_xfer(ap, buf, buflen, do_write);
3333 else
3334 ata_pio_data_xfer(ap, buf, buflen, do_write);
3335 }
1da177e4
LT		 3336}
3337
6ae4cfb5
AL		 3338/**
3339 * ata_pio_sector - Transfer ATA_SECT_SIZE (512 bytes) of data.
3340 * @qc: Command on going
3341 *
3342 * Transfer ATA_SECT_SIZE of data from/to the ATA device.
3343 *
3344 * LOCKING:
3345 * Inherited from caller.
3346 */
3347
1da177e4
LT		 3348static void ata_pio_sector(struct ata_queued_cmd *qc)
3349{
3350 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
cedc9a47 3351 struct scatterlist *sg = qc->__sg;
1da177e4
LT		 3352 struct ata_port *ap = qc->ap;
3353 struct page *page;
3354 unsigned int offset;
3355 unsigned char *buf;
3356
3357 if (qc->cursect == (qc->nsect - 1))
14be71f4 3358 ap->hsm_task_state = HSM_ST_LAST;
1da177e4
LT		 3359
3360 page = sg[qc->cursg].page;
3361 offset = sg[qc->cursg].offset + qc->cursg_ofs * ATA_SECT_SIZE;
3362
3363 /* get the current page and offset */
3364 page = nth_page(page, (offset >> PAGE_SHIFT));
3365 offset %= PAGE_SIZE;
3366
3367 buf = kmap(page) + offset;
3368
3369 qc->cursect++;
3370 qc->cursg_ofs++;
3371
32529e01 3372 if ((qc->cursg_ofs * ATA_SECT_SIZE) == (&sg[qc->cursg])->length) {
1da177e4
LT		 3373 qc->cursg++;
3374 qc->cursg_ofs = 0;
3375 }
3376
3377 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
3378
3379 /* do the actual data transfer */
3380 do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
3381 ata_data_xfer(ap, buf, ATA_SECT_SIZE, do_write);
3382
3383 kunmap(page);
3384}
3385
6ae4cfb5
AL		 3386/**
3387 * __atapi_pio_bytes - Transfer data from/to the ATAPI device.
3388 * @qc: Command on going
3389 * @bytes: number of bytes
3390 *
3391 * Transfer Transfer data from/to the ATAPI device.
3392 *
3393 * LOCKING:
3394 * Inherited from caller.
3395 *
3396 */
3397
1da177e4
LT		 3398static void __atapi_pio_bytes(struct ata_queued_cmd *qc, unsigned int bytes)
3399{
3400 int do_write = (qc->tf.flags & ATA_TFLAG_WRITE);
cedc9a47 3401 struct scatterlist *sg = qc->__sg;
1da177e4
LT		 3402 struct ata_port *ap = qc->ap;
3403 struct page *page;
3404 unsigned char *buf;
3405 unsigned int offset, count;
3406
563a6e1f 3407 if (qc->curbytes + bytes >= qc->nbytes)
14be71f4 3408 ap->hsm_task_state = HSM_ST_LAST;
1da177e4
LT		 3409
3410next_sg:
563a6e1f 3411 if (unlikely(qc->cursg >= qc->n_elem)) {
7fb6ec28 3412 /*
563a6e1f
AL		 3413 * The end of qc->sg is reached and the device expects
3414 * more data to transfer. In order not to overrun qc->sg
3415 * and fulfill length specified in the byte count register,
3416 * - for read case, discard trailing data from the device
3417 * - for write case, padding zero data to the device
3418 */
3419 u16 pad_buf[1] = { 0 };
3420 unsigned int words = bytes >> 1;
3421 unsigned int i;
3422
3423 if (words) /* warning if bytes > 1 */
7fb6ec28 3424 printk(KERN_WARNING "ata%u: %u bytes trailing data\n",
563a6e1f
AL		 3425 ap->id, bytes);
3426
3427 for (i = 0; i < words; i++)
3428 ata_data_xfer(ap, (unsigned char*)pad_buf, 2, do_write);
3429
14be71f4 3430 ap->hsm_task_state = HSM_ST_LAST;
563a6e1f
AL		 3431 return;
3432 }
3433
cedc9a47 3434 sg = &qc->__sg[qc->cursg];
1da177e4 3435
1da177e4
LT		 3436 page = sg->page;
3437 offset = sg->offset + qc->cursg_ofs;
3438
3439 /* get the current page and offset */
3440 page = nth_page(page, (offset >> PAGE_SHIFT));
3441 offset %= PAGE_SIZE;
3442
6952df03 3443 /* don't overrun current sg */
32529e01 3444 count = min(sg->length - qc->cursg_ofs, bytes);
1da177e4
LT		 3445
3446 /* don't cross page boundaries */
3447 count = min(count, (unsigned int)PAGE_SIZE - offset);
3448
3449 buf = kmap(page) + offset;
3450
3451 bytes -= count;
3452 qc->curbytes += count;
3453 qc->cursg_ofs += count;
3454
32529e01 3455 if (qc->cursg_ofs == sg->length) {
1da177e4
LT		 3456 qc->cursg++;
3457 qc->cursg_ofs = 0;
3458 }
3459
3460 DPRINTK("data %s\n", qc->tf.flags & ATA_TFLAG_WRITE ? "write" : "read");
3461
3462 /* do the actual data transfer */
3463 ata_data_xfer(ap, buf, count, do_write);
3464
3465 kunmap(page);
3466
563a6e1f 3467 if (bytes)
1da177e4 3468 goto next_sg;
1da177e4
LT		 3469}
3470
6ae4cfb5
AL		 3471/**
3472 * atapi_pio_bytes - Transfer data from/to the ATAPI device.
3473 * @qc: Command on going
3474 *
3475 * Transfer Transfer data from/to the ATAPI device.
3476 *
3477 * LOCKING:
3478 * Inherited from caller.
6ae4cfb5
AL		 3479 */
3480
1da177e4
LT		 3481static void atapi_pio_bytes(struct ata_queued_cmd *qc)
3482{
3483 struct ata_port *ap = qc->ap;
3484 struct ata_device *dev = qc->dev;
3485 unsigned int ireason, bc_lo, bc_hi, bytes;
3486 int i_write, do_write = (qc->tf.flags & ATA_TFLAG_WRITE) ? 1 : 0;
3487
3488 ap->ops->tf_read(ap, &qc->tf);
3489 ireason = qc->tf.nsect;
3490 bc_lo = qc->tf.lbam;
3491 bc_hi = qc->tf.lbah;
3492 bytes = (bc_hi << 8) | bc_lo;
3493
3494 /* shall be cleared to zero, indicating xfer of data */
3495 if (ireason & (1 << 0))
3496 goto err_out;
3497
3498 /* make sure transfer direction matches expected */
3499 i_write = ((ireason & (1 << 1)) == 0) ? 1 : 0;
3500 if (do_write != i_write)
3501 goto err_out;
3502
3503 __atapi_pio_bytes(qc, bytes);
3504
3505 return;
3506
3507err_out:
3508 printk(KERN_INFO "ata%u: dev %u: ATAPI check failed\n",
3509 ap->id, dev->devno);
11a56d24 3510 qc->err_mask |= AC_ERR_HSM;
14be71f4 3511 ap->hsm_task_state = HSM_ST_ERR;
1da177e4
LT		 3512}
3513
3514/**
6f0ef4fa
RD		 3515 * ata_pio_block - start PIO on a block
3516 * @ap: the target ata_port
1da177e4
LT		 3517 *
3518 * LOCKING:
0cba632b 3519 * None. (executing in kernel thread context)
1da177e4
LT		 3520 */
3521
3522static void ata_pio_block(struct ata_port *ap)
3523{
3524 struct ata_queued_cmd *qc;
3525 u8 status;
3526
3527 /*
6f0ef4fa 3528 * This is purely heuristic. This is a fast path.
1da177e4
LT		 3529 * Sometimes when we enter, BSY will be cleared in
3530 * a chk-status or two. If not, the drive is probably seeking
3531 * or something. Snooze for a couple msecs, then
3532 * chk-status again. If still busy, fall back to
14be71f4 3533 * HSM_ST_POLL state.
1da177e4
LT		 3534 */
3535 status = ata_busy_wait(ap, ATA_BUSY, 5);
3536 if (status & ATA_BUSY) {
3537 msleep(2);
3538 status = ata_busy_wait(ap, ATA_BUSY, 10);
3539 if (status & ATA_BUSY) {
14be71f4 3540 ap->hsm_task_state = HSM_ST_POLL;
1da177e4
LT		 3541 ap->pio_task_timeout = jiffies + ATA_TMOUT_PIO;
3542 return;
3543 }
3544 }
3545
3546 qc = ata_qc_from_tag(ap, ap->active_tag);
a4631474 3547 WARN_ON(qc == NULL);
1da177e4 3548
fe79e683
AL		 3549 /* check error */
3550 if (status & (ATA_ERR | ATA_DF)) {
3551 qc->err_mask |= AC_ERR_DEV;
3552 ap->hsm_task_state = HSM_ST_ERR;
3553 return;
3554 }
3555
3556 /* transfer data if any */
1da177e4 3557 if (is_atapi_taskfile(&qc->tf)) {
fe79e683 3558 /* DRQ=0 means no more data to transfer */
1da177e4 3559 if ((status & ATA_DRQ) == 0) {
14be71f4 3560 ap->hsm_task_state = HSM_ST_LAST;
1da177e4
LT		 3561 return;
3562 }
3563
3564 atapi_pio_bytes(qc);
3565 } else {
3566 /* handle BSY=0, DRQ=0 as error */
3567 if ((status & ATA_DRQ) == 0) {
11a56d24 3568 qc->err_mask |= AC_ERR_HSM;
14be71f4 3569 ap->hsm_task_state = HSM_ST_ERR;
1da177e4
LT		 3570 return;
3571 }
3572
3573 ata_pio_sector(qc);
3574 }
3575}
3576
3577static void ata_pio_error(struct ata_port *ap)
3578{
3579 struct ata_queued_cmd *qc;
a7dac447 3580
1da177e4 3581 qc = ata_qc_from_tag(ap, ap->active_tag);
a4631474 3582 WARN_ON(qc == NULL);
1da177e4 3583
0565c26d
AL		 3584 if (qc->tf.command != ATA_CMD_PACKET)
3585 printk(KERN_WARNING "ata%u: PIO error\n", ap->id);
3586
1c848984
AL		 3587 /* make sure qc->err_mask is available to
3588 * know what's wrong and recover
3589 */
a4631474 3590 WARN_ON(qc->err_mask == 0);
1c848984 3591
14be71f4 3592 ap->hsm_task_state = HSM_ST_IDLE;
1da177e4 3593
a22e2eb0 3594 ata_poll_qc_complete(qc);
1da177e4
LT		 3595}
3596
3597static void ata_pio_task(void *_data)
3598{
3599 struct ata_port *ap = _data;
7fb6ec28
JG		 3600 unsigned long timeout;
3601 int qc_completed;
3602
3603fsm_start:
3604 timeout = 0;
3605 qc_completed = 0;
1da177e4 3606
14be71f4
AL		 3607 switch (ap->hsm_task_state) {
3608 case HSM_ST_IDLE:
1da177e4
LT		 3609 return;
3610
14be71f4 3611 case HSM_ST:
1da177e4
LT		 3612 ata_pio_block(ap);
3613 break;
3614
14be71f4 3615 case HSM_ST_LAST:
7fb6ec28 3616 qc_completed = ata_pio_complete(ap);
1da177e4
LT		 3617 break;
3618
14be71f4
AL		 3619 case HSM_ST_POLL:
3620 case HSM_ST_LAST_POLL:
1da177e4
LT		 3621 timeout = ata_pio_poll(ap);
3622 break;
3623
14be71f4
AL		 3624 case HSM_ST_TMOUT:
3625 case HSM_ST_ERR:
1da177e4
LT		 3626 ata_pio_error(ap);
3627 return;
3628 }
3629
3630 if (timeout)
8061f5f0 3631 ata_port_queue_task(ap, ata_pio_task, ap, timeout);
7fb6ec28
JG		 3632 else if (!qc_completed)
3633 goto fsm_start;
1da177e4
LT		 3634}
3635
8061f5f0
TH		 3636/**
3637 * atapi_packet_task - Write CDB bytes to hardware
3638 * @_data: Port to which ATAPI device is attached.
3639 *
3640 * When device has indicated its readiness to accept
3641 * a CDB, this function is called. Send the CDB.
3642 * If DMA is to be performed, exit immediately.
3643 * Otherwise, we are in polling mode, so poll
3644 * status under operation succeeds or fails.
3645 *
3646 * LOCKING:
3647 * Kernel thread context (may sleep)
3648 */
3649
3650static void atapi_packet_task(void *_data)
3651{
3652 struct ata_port *ap = _data;
3653 struct ata_queued_cmd *qc;
3654 u8 status;
3655
3656 qc = ata_qc_from_tag(ap, ap->active_tag);
3657 WARN_ON(qc == NULL);
3658 WARN_ON(!(qc->flags & ATA_QCFLAG_ACTIVE));
3659
3660 /* sleep-wait for BSY to clear */
3661 DPRINTK("busy wait\n");
3662 if (ata_busy_sleep(ap, ATA_TMOUT_CDB_QUICK, ATA_TMOUT_CDB)) {
3663 qc->err_mask |= AC_ERR_TIMEOUT;
3664 goto err_out;
3665 }
3666
3667 /* make sure DRQ is set */
3668 status = ata_chk_status(ap);
3669 if ((status & (ATA_BUSY | ATA_DRQ)) != ATA_DRQ) {
3670 qc->err_mask |= AC_ERR_HSM;
3671 goto err_out;
3672 }
3673
3674 /* send SCSI cdb */
3675 DPRINTK("send cdb\n");
3676 WARN_ON(qc->dev->cdb_len < 12);
3677
3678 if (qc->tf.protocol == ATA_PROT_ATAPI_DMA ||
3679 qc->tf.protocol == ATA_PROT_ATAPI_NODATA) {
3680 unsigned long flags;
3681
3682 /* Once we're done issuing command and kicking bmdma,
3683 * irq handler takes over. To not lose irq, we need
3684 * to clear NOINTR flag before sending cdb, but
3685 * interrupt handler shouldn't be invoked before we're
3686 * finished. Hence, the following locking.
3687 */
3688 spin_lock_irqsave(&ap->host_set->lock, flags);
3689 ap->flags &= ~ATA_FLAG_NOINTR;
3690 ata_data_xfer(ap, qc->cdb, qc->dev->cdb_len, 1);
3691 if (qc->tf.protocol == ATA_PROT_ATAPI_DMA)
3692 ap->ops->bmdma_start(qc); /* initiate bmdma */
3693 spin_unlock_irqrestore(&ap->host_set->lock, flags);
3694 } else {
3695 ata_data_xfer(ap, qc->cdb, qc->dev->cdb_len, 1);
3696
3697 /* PIO commands are handled by polling */
3698 ap->hsm_task_state = HSM_ST;
3699 ata_port_queue_task(ap, ata_pio_task, ap, 0);
3700 }
3701
3702 return;
3703
3704err_out:
3705 ata_poll_qc_complete(qc);
3706}
3707
1da177e4
LT		 3708/**
3709 * ata_qc_timeout - Handle timeout of queued command
3710 * @qc: Command that timed out
3711 *
3712 * Some part of the kernel (currently, only the SCSI layer)
3713 * has noticed that the active command on port @ap has not
3714 * completed after a specified length of time. Handle this
3715 * condition by disabling DMA (if necessary) and completing
3716 * transactions, with error if necessary.
3717 *
3718 * This also handles the case of the "lost interrupt", where
3719 * for some reason (possibly hardware bug, possibly driver bug)
3720 * an interrupt was not delivered to the driver, even though the
3721 * transaction completed successfully.
3722 *
3723 * LOCKING:
0cba632b 3724 * Inherited from SCSI layer (none, can sleep)
1da177e4
LT		 3725 */
3726
3727static void ata_qc_timeout(struct ata_queued_cmd *qc)
3728{
3729 struct ata_port *ap = qc->ap;
b8f6153e 3730 struct ata_host_set *host_set = ap->host_set;
1da177e4 3731 u8 host_stat = 0, drv_stat;
b8f6153e 3732 unsigned long flags;
1da177e4
LT		 3733
3734 DPRINTK("ENTER\n");
3735
c18d06f8
TH		 3736 ap->hsm_task_state = HSM_ST_IDLE;
3737
b8f6153e
JG		 3738 spin_lock_irqsave(&host_set->lock, flags);
3739
1da177e4
LT		 3740 switch (qc->tf.protocol) {
3741
3742 case ATA_PROT_DMA:
3743 case ATA_PROT_ATAPI_DMA:
3744 host_stat = ap->ops->bmdma_status(ap);
3745
3746 /* before we do anything else, clear DMA-Start bit */
b73fc89f 3747 ap->ops->bmdma_stop(qc);
1da177e4
LT		 3748
3749 /* fall through */
3750
3751 default:
3752 ata_altstatus(ap);
3753 drv_stat = ata_chk_status(ap);
3754
3755 /* ack bmdma irq events */
3756 ap->ops->irq_clear(ap);
3757
3758 printk(KERN_ERR "ata%u: command 0x%x timeout, stat 0x%x host_stat 0x%x\n",
3759 ap->id, qc->tf.command, drv_stat, host_stat);
3760
3761 /* complete taskfile transaction */
a22e2eb0 3762 qc->err_mask |= ac_err_mask(drv_stat);
1da177e4
LT		 3763 break;
3764 }
b8f6153e
JG		 3765
3766 spin_unlock_irqrestore(&host_set->lock, flags);
3767
a72ec4ce
TH		 3768 ata_eh_qc_complete(qc);
3769
1da177e4
LT		 3770 DPRINTK("EXIT\n");
3771}
3772
3773/**
3774 * ata_eng_timeout - Handle timeout of queued command
3775 * @ap: Port on which timed-out command is active
3776 *
3777 * Some part of the kernel (currently, only the SCSI layer)
3778 * has noticed that the active command on port @ap has not
3779 * completed after a specified length of time. Handle this
3780 * condition by disabling DMA (if necessary) and completing
3781 * transactions, with error if necessary.
3782 *
3783 * This also handles the case of the "lost interrupt", where
3784 * for some reason (possibly hardware bug, possibly driver bug)
3785 * an interrupt was not delivered to the driver, even though the
3786 * transaction completed successfully.
3787 *
3788 * LOCKING:
3789 * Inherited from SCSI layer (none, can sleep)
3790 */
3791
3792void ata_eng_timeout(struct ata_port *ap)
3793{
1da177e4
LT		 3794 DPRINTK("ENTER\n");
3795
f6379020 3796 ata_qc_timeout(ata_qc_from_tag(ap, ap->active_tag));
1da177e4 3797
1da177e4
LT		 3798 DPRINTK("EXIT\n");
3799}
3800
3801/**
3802 * ata_qc_new - Request an available ATA command, for queueing
3803 * @ap: Port associated with device @dev
3804 * @dev: Device from whom we request an available command structure
3805 *
3806 * LOCKING:
0cba632b 3807 * None.
1da177e4
LT		 3808 */
3809
3810static struct ata_queued_cmd *ata_qc_new(struct ata_port *ap)
3811{
3812 struct ata_queued_cmd *qc = NULL;
3813 unsigned int i;
3814
3815 for (i = 0; i < ATA_MAX_QUEUE; i++)
3816 if (!test_and_set_bit(i, &ap->qactive)) {
3817 qc = ata_qc_from_tag(ap, i);
3818 break;
3819 }
3820
3821 if (qc)
3822 qc->tag = i;
3823
3824 return qc;
3825}
3826
3827/**
3828 * ata_qc_new_init - Request an available ATA command, and initialize it
3829 * @ap: Port associated with device @dev
3830 * @dev: Device from whom we request an available command structure
3831 *
3832 * LOCKING:
0cba632b 3833 * None.
1da177e4
LT		 3834 */
3835
3836struct ata_queued_cmd *ata_qc_new_init(struct ata_port *ap,
3837 struct ata_device *dev)
3838{
3839 struct ata_queued_cmd *qc;
3840
3841 qc = ata_qc_new(ap);
3842 if (qc) {
1da177e4
LT		 3843 qc->scsicmd = NULL;
3844 qc->ap = ap;
3845 qc->dev = dev;
1da177e4 3846
2c13b7ce 3847 ata_qc_reinit(qc);
1da177e4
LT		 3848 }
3849
3850 return qc;
3851}
3852
1da177e4
LT		 3853/**
3854 * ata_qc_free - free unused ata_queued_cmd
3855 * @qc: Command to complete
3856 *
3857 * Designed to free unused ata_queued_cmd object
3858 * in case something prevents using it.
3859 *
3860 * LOCKING:
0cba632b 3861 * spin_lock_irqsave(host_set lock)
1da177e4
LT		 3862 */
3863void ata_qc_free(struct ata_queued_cmd *qc)
3864{
4ba946e9
TH		 3865 struct ata_port *ap = qc->ap;
3866 unsigned int tag;
3867
a4631474 3868 WARN_ON(qc == NULL); /* ata_qc_from_tag _might_ return NULL */
1da177e4 3869
4ba946e9
TH		 3870 qc->flags = 0;
3871 tag = qc->tag;
3872 if (likely(ata_tag_valid(tag))) {
3873 if (tag == ap->active_tag)
3874 ap->active_tag = ATA_TAG_POISON;
3875 qc->tag = ATA_TAG_POISON;
3876 clear_bit(tag, &ap->qactive);
3877 }
1da177e4
LT		 3878}
3879
76014427 3880void __ata_qc_complete(struct ata_queued_cmd *qc)
1da177e4 3881{
a4631474
TH		 3882 WARN_ON(qc == NULL); /* ata_qc_from_tag _might_ return NULL */
3883 WARN_ON(!(qc->flags & ATA_QCFLAG_ACTIVE));
1da177e4
LT		 3884
3885 if (likely(qc->flags & ATA_QCFLAG_DMAMAP))
3886 ata_sg_clean(qc);
3887
3f3791d3
AL		 3888 /* atapi: mark qc as inactive to prevent the interrupt handler
3889 * from completing the command twice later, before the error handler
3890 * is called. (when rc != 0 and atapi request sense is needed)
3891 */
3892 qc->flags &= ~ATA_QCFLAG_ACTIVE;
3893
1da177e4 3894 /* call completion callback */
77853bf2 3895 qc->complete_fn(qc);
1da177e4
LT		 3896}
3897
3898static inline int ata_should_dma_map(struct ata_queued_cmd *qc)
3899{
3900 struct ata_port *ap = qc->ap;
3901
3902 switch (qc->tf.protocol) {
3903 case ATA_PROT_DMA:
3904 case ATA_PROT_ATAPI_DMA:
3905 return 1;
3906
3907 case ATA_PROT_ATAPI:
3908 case ATA_PROT_PIO:
3909 case ATA_PROT_PIO_MULT:
3910 if (ap->flags & ATA_FLAG_PIO_DMA)
3911 return 1;
3912
3913 /* fall through */
3914
3915 default:
3916 return 0;
3917 }
3918
3919 /* never reached */
3920}
3921
3922/**
3923 * ata_qc_issue - issue taskfile to device
3924 * @qc: command to issue to device
3925 *
3926 * Prepare an ATA command to submission to device.
3927 * This includes mapping the data into a DMA-able
3928 * area, filling in the S/G table, and finally
3929 * writing the taskfile to hardware, starting the command.
3930 *
3931 * LOCKING:
3932 * spin_lock_irqsave(host_set lock)
3933 *
3934 * RETURNS:
9a3d9eb0 3935 * Zero on success, AC_ERR_* mask on failure
1da177e4
LT		 3936 */
3937
9a3d9eb0 3938unsigned int ata_qc_issue(struct ata_queued_cmd *qc)
1da177e4
LT		 3939{
3940 struct ata_port *ap = qc->ap;
3941
3942 if (ata_should_dma_map(qc)) {
3943 if (qc->flags & ATA_QCFLAG_SG) {
3944 if (ata_sg_setup(qc))
8e436af9 3945 goto sg_err;
1da177e4
LT		 3946 } else if (qc->flags & ATA_QCFLAG_SINGLE) {
3947 if (ata_sg_setup_one(qc))
8e436af9 3948 goto sg_err;
1da177e4
LT		 3949 }
3950 } else {
3951 qc->flags &= ~ATA_QCFLAG_DMAMAP;
3952 }
3953
3954 ap->ops->qc_prep(qc);
3955
3956 qc->ap->active_tag = qc->tag;
3957 qc->flags |= ATA_QCFLAG_ACTIVE;
3958
3959 return ap->ops->qc_issue(qc);
3960
8e436af9
TH		 3961sg_err:
3962 qc->flags &= ~ATA_QCFLAG_DMAMAP;
9a3d9eb0 3963 return AC_ERR_SYSTEM;
1da177e4
LT		 3964}
3965
0baab86b 3966
1da177e4
LT		 3967/**
3968 * ata_qc_issue_prot - issue taskfile to device in proto-dependent manner
3969 * @qc: command to issue to device
3970 *
3971 * Using various libata functions and hooks, this function
3972 * starts an ATA command. ATA commands are grouped into
3973 * classes called "protocols", and issuing each type of protocol
3974 * is slightly different.
3975 *
0baab86b
EF		 3976 * May be used as the qc_issue() entry in ata_port_operations.
3977 *
1da177e4
LT		 3978 * LOCKING:
3979 * spin_lock_irqsave(host_set lock)
3980 *
3981 * RETURNS:
9a3d9eb0 3982 * Zero on success, AC_ERR_* mask on failure
1da177e4
LT		 3983 */
3984
9a3d9eb0 3985unsigned int ata_qc_issue_prot(struct ata_queued_cmd *qc)
1da177e4
LT		 3986{
3987 struct ata_port *ap = qc->ap;
3988
3989 ata_dev_select(ap, qc->dev->devno, 1, 0);
3990
3991 switch (qc->tf.protocol) {
3992 case ATA_PROT_NODATA:
e5338254 3993 ata_tf_to_host(ap, &qc->tf);
1da177e4
LT		 3994 break;
3995
3996 case ATA_PROT_DMA:
3997 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
3998 ap->ops->bmdma_setup(qc); /* set up bmdma */
3999 ap->ops->bmdma_start(qc); /* initiate bmdma */
4000 break;
4001
4002 case ATA_PROT_PIO: /* load tf registers, initiate polling pio */
4003 ata_qc_set_polling(qc);
e5338254 4004 ata_tf_to_host(ap, &qc->tf);
14be71f4 4005 ap->hsm_task_state = HSM_ST;
8061f5f0 4006 ata_port_queue_task(ap, ata_pio_task, ap, 0);
1da177e4
LT		 4007 break;
4008
4009 case ATA_PROT_ATAPI:
4010 ata_qc_set_polling(qc);
e5338254 4011 ata_tf_to_host(ap, &qc->tf);
8061f5f0 4012 ata_port_queue_task(ap, atapi_packet_task, ap, 0);
1da177e4
LT		 4013 break;
4014
4015 case ATA_PROT_ATAPI_NODATA:
c1389503 4016 ap->flags |= ATA_FLAG_NOINTR;
e5338254 4017 ata_tf_to_host(ap, &qc->tf);
8061f5f0 4018 ata_port_queue_task(ap, atapi_packet_task, ap, 0);
1da177e4
LT		 4019 break;
4020
4021 case ATA_PROT_ATAPI_DMA:
c1389503 4022 ap->flags |= ATA_FLAG_NOINTR;
1da177e4
LT		 4023 ap->ops->tf_load(ap, &qc->tf); /* load tf registers */
4024 ap->ops->bmdma_setup(qc); /* set up bmdma */
8061f5f0 4025 ata_port_queue_task(ap, atapi_packet_task, ap, 0);
1da177e4
LT		 4026 break;
4027
4028 default:
4029 WARN_ON(1);
9a3d9eb0 4030 return AC_ERR_SYSTEM;
1da177e4
LT		 4031 }
4032
4033 return 0;
4034}
4035
4036/**
0baab86b 4037 * ata_bmdma_setup_mmio - Set up PCI IDE BMDMA transaction
1da177e4
LT		 4038 * @qc: Info associated with this ATA transaction.
4039 *
4040 * LOCKING:
4041 * spin_lock_irqsave(host_set lock)
4042 */
4043
4044static void ata_bmdma_setup_mmio (struct ata_queued_cmd *qc)
4045{
4046 struct ata_port *ap = qc->ap;
4047 unsigned int rw = (qc->tf.flags & ATA_TFLAG_WRITE);
4048 u8 dmactl;
4049 void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr;
4050
4051 /* load PRD table addr. */
4052 mb(); /* make sure PRD table writes are visible to controller */
4053 writel(ap->prd_dma, mmio + ATA_DMA_TABLE_OFS);
4054
4055 /* specify data direction, triple-check start bit is clear */
4056 dmactl = readb(mmio + ATA_DMA_CMD);
4057 dmactl &= ~(ATA_DMA_WR | ATA_DMA_START);
4058 if (!rw)
4059 dmactl |= ATA_DMA_WR;
4060 writeb(dmactl, mmio + ATA_DMA_CMD);
4061
4062 /* issue r/w command */
4063 ap->ops->exec_command(ap, &qc->tf);
4064}
4065
4066/**
b73fc89f 4067 * ata_bmdma_start_mmio - Start a PCI IDE BMDMA transaction
1da177e4
LT		 4068 * @qc: Info associated with this ATA transaction.
4069 *
4070 * LOCKING:
4071 * spin_lock_irqsave(host_set lock)
4072 */
4073
4074static void ata_bmdma_start_mmio (struct ata_queued_cmd *qc)
4075{
4076 struct ata_port *ap = qc->ap;
4077 void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr;
4078 u8 dmactl;
4079
4080 /* start host DMA transaction */
4081 dmactl = readb(mmio + ATA_DMA_CMD);
4082 writeb(dmactl | ATA_DMA_START, mmio + ATA_DMA_CMD);
4083
4084 /* Strictly, one may wish to issue a readb() here, to
4085 * flush the mmio write. However, control also passes
4086 * to the hardware at this point, and it will interrupt
4087 * us when we are to resume control. So, in effect,
4088 * we don't care when the mmio write flushes.
4089 * Further, a read of the DMA status register _immediately_
4090 * following the write may not be what certain flaky hardware
4091 * is expected, so I think it is best to not add a readb()
4092 * without first all the MMIO ATA cards/mobos.
4093 * Or maybe I'm just being paranoid.
4094 */
4095}
4096
4097/**
4098 * ata_bmdma_setup_pio - Set up PCI IDE BMDMA transaction (PIO)
4099 * @qc: Info associated with this ATA transaction.
4100 *
4101 * LOCKING:
4102 * spin_lock_irqsave(host_set lock)
4103 */
4104
4105static void ata_bmdma_setup_pio (struct ata_queued_cmd *qc)
4106{
4107 struct ata_port *ap = qc->ap;
4108 unsigned int rw = (qc->tf.flags & ATA_TFLAG_WRITE);
4109 u8 dmactl;
4110
4111 /* load PRD table addr. */
4112 outl(ap->prd_dma, ap->ioaddr.bmdma_addr + ATA_DMA_TABLE_OFS);
4113
4114 /* specify data direction, triple-check start bit is clear */
4115 dmactl = inb(ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
4116 dmactl &= ~(ATA_DMA_WR | ATA_DMA_START);
4117 if (!rw)
4118 dmactl |= ATA_DMA_WR;
4119 outb(dmactl, ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
4120
4121 /* issue r/w command */
4122 ap->ops->exec_command(ap, &qc->tf);
4123}
4124
4125/**
4126 * ata_bmdma_start_pio - Start a PCI IDE BMDMA transaction (PIO)
4127 * @qc: Info associated with this ATA transaction.
4128 *
4129 * LOCKING:
4130 * spin_lock_irqsave(host_set lock)
4131 */
4132
4133static void ata_bmdma_start_pio (struct ata_queued_cmd *qc)
4134{
4135 struct ata_port *ap = qc->ap;
4136 u8 dmactl;
4137
4138 /* start host DMA transaction */
4139 dmactl = inb(ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
4140 outb(dmactl | ATA_DMA_START,
4141 ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
4142}
4143
0baab86b
EF		 4144
4145/**
4146 * ata_bmdma_start - Start a PCI IDE BMDMA transaction
4147 * @qc: Info associated with this ATA transaction.
4148 *
4149 * Writes the ATA_DMA_START flag to the DMA command register.
4150 *
4151 * May be used as the bmdma_start() entry in ata_port_operations.
4152 *
4153 * LOCKING:
4154 * spin_lock_irqsave(host_set lock)
4155 */
1da177e4
LT		 4156void ata_bmdma_start(struct ata_queued_cmd *qc)
4157{
4158 if (qc->ap->flags & ATA_FLAG_MMIO)
4159 ata_bmdma_start_mmio(qc);
4160 else
4161 ata_bmdma_start_pio(qc);
4162}
4163
0baab86b
EF		 4164
4165/**
4166 * ata_bmdma_setup - Set up PCI IDE BMDMA transaction
4167 * @qc: Info associated with this ATA transaction.
4168 *
4169 * Writes address of PRD table to device's PRD Table Address
4170 * register, sets the DMA control register, and calls
4171 * ops->exec_command() to start the transfer.
4172 *
4173 * May be used as the bmdma_setup() entry in ata_port_operations.
4174 *
4175 * LOCKING:
4176 * spin_lock_irqsave(host_set lock)
4177 */
1da177e4
LT		 4178void ata_bmdma_setup(struct ata_queued_cmd *qc)
4179{
4180 if (qc->ap->flags & ATA_FLAG_MMIO)
4181 ata_bmdma_setup_mmio(qc);
4182 else
4183 ata_bmdma_setup_pio(qc);
4184}
4185
0baab86b
EF		 4186
4187/**
4188 * ata_bmdma_irq_clear - Clear PCI IDE BMDMA interrupt.
decc6d0b 4189 * @ap: Port associated with this ATA transaction.
0baab86b
EF		 4190 *
4191 * Clear interrupt and error flags in DMA status register.
4192 *
4193 * May be used as the irq_clear() entry in ata_port_operations.
4194 *
4195 * LOCKING:
4196 * spin_lock_irqsave(host_set lock)
4197 */
4198
1da177e4
LT		 4199void ata_bmdma_irq_clear(struct ata_port *ap)
4200{
4201 if (ap->flags & ATA_FLAG_MMIO) {
4202 void __iomem *mmio = ((void __iomem *) ap->ioaddr.bmdma_addr) + ATA_DMA_STATUS;
4203 writeb(readb(mmio), mmio);
4204 } else {
4205 unsigned long addr = ap->ioaddr.bmdma_addr + ATA_DMA_STATUS;
4206 outb(inb(addr), addr);
4207 }
4208
4209}
4210
0baab86b
EF		 4211
4212/**
4213 * ata_bmdma_status - Read PCI IDE BMDMA status
decc6d0b 4214 * @ap: Port associated with this ATA transaction.
0baab86b
EF		 4215 *
4216 * Read and return BMDMA status register.
4217 *
4218 * May be used as the bmdma_status() entry in ata_port_operations.
4219 *
4220 * LOCKING:
4221 * spin_lock_irqsave(host_set lock)
4222 */
4223
1da177e4
LT		 4224u8 ata_bmdma_status(struct ata_port *ap)
4225{
4226 u8 host_stat;
4227 if (ap->flags & ATA_FLAG_MMIO) {
4228 void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr;
4229 host_stat = readb(mmio + ATA_DMA_STATUS);
4230 } else
ee500aab 4231 host_stat = inb(ap->ioaddr.bmdma_addr + ATA_DMA_STATUS);
1da177e4
LT		 4232 return host_stat;
4233}
4234
0baab86b
EF		 4235
4236/**
4237 * ata_bmdma_stop - Stop PCI IDE BMDMA transfer
b73fc89f 4238 * @qc: Command we are ending DMA for
0baab86b
EF		 4239 *
4240 * Clears the ATA_DMA_START flag in the dma control register
4241 *
4242 * May be used as the bmdma_stop() entry in ata_port_operations.
4243 *
4244 * LOCKING:
4245 * spin_lock_irqsave(host_set lock)
4246 */
4247
b73fc89f 4248void ata_bmdma_stop(struct ata_queued_cmd *qc)
1da177e4 4249{
b73fc89f 4250 struct ata_port *ap = qc->ap;
1da177e4
LT		 4251 if (ap->flags & ATA_FLAG_MMIO) {
4252 void __iomem *mmio = (void __iomem *) ap->ioaddr.bmdma_addr;
4253
4254 /* clear start/stop bit */
4255 writeb(readb(mmio + ATA_DMA_CMD) & ~ATA_DMA_START,
4256 mmio + ATA_DMA_CMD);
4257 } else {
4258 /* clear start/stop bit */
4259 outb(inb(ap->ioaddr.bmdma_addr + ATA_DMA_CMD) & ~ATA_DMA_START,
4260 ap->ioaddr.bmdma_addr + ATA_DMA_CMD);
4261 }
4262
4263 /* one-PIO-cycle guaranteed wait, per spec, for HDMA1:0 transition */
4264 ata_altstatus(ap); /* dummy read */
4265}
4266
4267/**
4268 * ata_host_intr - Handle host interrupt for given (port, task)
4269 * @ap: Port on which interrupt arrived (possibly...)
4270 * @qc: Taskfile currently active in engine
4271 *
4272 * Handle host interrupt for given queued command. Currently,
4273 * only DMA interrupts are handled. All other commands are
4274 * handled via polling with interrupts disabled (nIEN bit).
4275 *
4276 * LOCKING:
4277 * spin_lock_irqsave(host_set lock)
4278 *
4279 * RETURNS:
4280 * One if interrupt was handled, zero if not (shared irq).
4281 */
4282
4283inline unsigned int ata_host_intr (struct ata_port *ap,
4284 struct ata_queued_cmd *qc)
4285{
4286 u8 status, host_stat;
4287
4288 switch (qc->tf.protocol) {
4289
4290 case ATA_PROT_DMA:
4291 case ATA_PROT_ATAPI_DMA:
4292 case ATA_PROT_ATAPI:
4293 /* check status of DMA engine */
4294 host_stat = ap->ops->bmdma_status(ap);
4295 VPRINTK("ata%u: host_stat 0x%X\n", ap->id, host_stat);
4296
4297 /* if it's not our irq... */
4298 if (!(host_stat & ATA_DMA_INTR))
4299 goto idle_irq;
4300
4301 /* before we do anything else, clear DMA-Start bit */
b73fc89f 4302 ap->ops->bmdma_stop(qc);
1da177e4
LT		 4303
4304 /* fall through */
4305
4306 case ATA_PROT_ATAPI_NODATA:
4307 case ATA_PROT_NODATA:
4308 /* check altstatus */
4309 status = ata_altstatus(ap);
4310 if (status & ATA_BUSY)
4311 goto idle_irq;
4312
4313 /* check main status, clearing INTRQ */
4314 status = ata_chk_status(ap);
4315 if (unlikely(status & ATA_BUSY))
4316 goto idle_irq;
4317 DPRINTK("ata%u: protocol %d (dev_stat 0x%X)\n",
4318 ap->id, qc->tf.protocol, status);
4319
4320 /* ack bmdma irq events */
4321 ap->ops->irq_clear(ap);
4322
4323 /* complete taskfile transaction */
a22e2eb0
AL		 4324 qc->err_mask |= ac_err_mask(status);
4325 ata_qc_complete(qc);
1da177e4
LT		 4326 break;
4327
4328 default:
4329 goto idle_irq;
4330 }
4331
4332 return 1; /* irq handled */
4333
4334idle_irq:
4335 ap->stats.idle_irq++;
4336
4337#ifdef ATA_IRQ_TRAP
4338 if ((ap->stats.idle_irq % 1000) == 0) {
4339 handled = 1;
4340 ata_irq_ack(ap, 0); /* debug trap */
4341 printk(KERN_WARNING "ata%d: irq trap\n", ap->id);
4342 }
4343#endif
4344 return 0; /* irq not handled */
4345}
4346
4347/**
4348 * ata_interrupt - Default ATA host interrupt handler
0cba632b
JG		 4349 * @irq: irq line (unused)
4350 * @dev_instance: pointer to our ata_host_set information structure
1da177e4
LT		 4351 * @regs: unused
4352 *
0cba632b
JG		 4353 * Default interrupt handler for PCI IDE devices. Calls
4354 * ata_host_intr() for each port that is not disabled.
4355 *
1da177e4 4356 * LOCKING:
0cba632b 4357 * Obtains host_set lock during operation.
1da177e4
LT		 4358 *
4359 * RETURNS:
0cba632b 4360 * IRQ_NONE or IRQ_HANDLED.
1da177e4
LT		 4361 */
4362
4363irqreturn_t ata_interrupt (int irq, void *dev_instance, struct pt_regs *regs)
4364{
4365 struct ata_host_set *host_set = dev_instance;
4366 unsigned int i;
4367 unsigned int handled = 0;
4368 unsigned long flags;
4369
4370 /* TODO: make _irqsave conditional on x86 PCI IDE legacy mode */
4371 spin_lock_irqsave(&host_set->lock, flags);
4372
4373 for (i = 0; i < host_set->n_ports; i++) {
4374 struct ata_port *ap;
4375
4376 ap = host_set->ports[i];
c1389503
TH		 4377 if (ap &&
4378 !(ap->flags & (ATA_FLAG_PORT_DISABLED | ATA_FLAG_NOINTR))) {
1da177e4
LT		 4379 struct ata_queued_cmd *qc;
4380
4381 qc = ata_qc_from_tag(ap, ap->active_tag);
21b1ed74
AL		 4382 if (qc && (!(qc->tf.ctl & ATA_NIEN)) &&
4383 (qc->flags & ATA_QCFLAG_ACTIVE))
1da177e4
LT		 4384 handled |= ata_host_intr(ap, qc);
4385 }
4386 }
4387
4388 spin_unlock_irqrestore(&host_set->lock, flags);
4389
4390 return IRQ_RETVAL(handled);
4391}
4392
0baab86b 4393
9b847548
JA		 4394/*
4395 * Execute a 'simple' command, that only consists of the opcode 'cmd' itself,
4396 * without filling any other registers
4397 */
4398static int ata_do_simple_cmd(struct ata_port *ap, struct ata_device *dev,
4399 u8 cmd)
4400{
4401 struct ata_taskfile tf;
4402 int err;
4403
4404 ata_tf_init(ap, &tf, dev->devno);
4405
4406 tf.command = cmd;
4407 tf.flags |= ATA_TFLAG_DEVICE;
4408 tf.protocol = ATA_PROT_NODATA;
4409
4410 err = ata_exec_internal(ap, dev, &tf, DMA_NONE, NULL, 0);
4411 if (err)
4412 printk(KERN_ERR "%s: ata command failed: %d\n",
4413 __FUNCTION__, err);
4414
4415 return err;
4416}
4417
4418static int ata_flush_cache(struct ata_port *ap, struct ata_device *dev)
4419{
4420 u8 cmd;
4421
4422 if (!ata_try_flush_cache(dev))
4423 return 0;
4424
4425 if (ata_id_has_flush_ext(dev->id))
4426 cmd = ATA_CMD_FLUSH_EXT;
4427 else
4428 cmd = ATA_CMD_FLUSH;
4429
4430 return ata_do_simple_cmd(ap, dev, cmd);
4431}
4432
4433static int ata_standby_drive(struct ata_port *ap, struct ata_device *dev)
4434{
4435 return ata_do_simple_cmd(ap, dev, ATA_CMD_STANDBYNOW1);
4436}
4437
4438static int ata_start_drive(struct ata_port *ap, struct ata_device *dev)
4439{
4440 return ata_do_simple_cmd(ap, dev, ATA_CMD_IDLEIMMEDIATE);
4441}
4442
4443/**
4444 * ata_device_resume - wakeup a previously suspended devices
c893a3ae
RD		 4445 * @ap: port the device is connected to
4446 * @dev: the device to resume
9b847548
JA		 4447 *
4448 * Kick the drive back into action, by sending it an idle immediate
4449 * command and making sure its transfer mode matches between drive
4450 * and host.
4451 *
4452 */
4453int ata_device_resume(struct ata_port *ap, struct ata_device *dev)
4454{
4455 if (ap->flags & ATA_FLAG_SUSPENDED) {
4456 ap->flags &= ~ATA_FLAG_SUSPENDED;
4457 ata_set_mode(ap);
4458 }
4459 if (!ata_dev_present(dev))
4460 return 0;
4461 if (dev->class == ATA_DEV_ATA)
4462 ata_start_drive(ap, dev);
4463
4464 return 0;
4465}
4466
4467/**
4468 * ata_device_suspend - prepare a device for suspend
c893a3ae
RD		 4469 * @ap: port the device is connected to
4470 * @dev: the device to suspend
9b847548
JA		 4471 *
4472 * Flush the cache on the drive, if appropriate, then issue a
4473 * standbynow command.
9b847548
JA		 4474 */
4475int ata_device_suspend(struct ata_port *ap, struct ata_device *dev)
4476{
4477 if (!ata_dev_present(dev))
4478 return 0;
4479 if (dev->class == ATA_DEV_ATA)
4480 ata_flush_cache(ap, dev);
4481
4482 ata_standby_drive(ap, dev);
4483 ap->flags |= ATA_FLAG_SUSPENDED;
4484 return 0;
4485}
4486
c893a3ae
RD		 4487/**
4488 * ata_port_start - Set port up for dma.
4489 * @ap: Port to initialize
4490 *
4491 * Called just after data structures for each port are
4492 * initialized. Allocates space for PRD table.
4493 *
4494 * May be used as the port_start() entry in ata_port_operations.
4495 *
4496 * LOCKING:
4497 * Inherited from caller.
4498 */
4499
1da177e4
LT		 4500int ata_port_start (struct ata_port *ap)
4501{
4502 struct device *dev = ap->host_set->dev;
6037d6bb 4503 int rc;
1da177e4
LT		 4504
4505 ap->prd = dma_alloc_coherent(dev, ATA_PRD_TBL_SZ, &ap->prd_dma, GFP_KERNEL);
4506 if (!ap->prd)
4507 return -ENOMEM;
4508
6037d6bb
JG		 4509 rc = ata_pad_alloc(ap, dev);
4510 if (rc) {
cedc9a47 4511 dma_free_coherent(dev, ATA_PRD_TBL_SZ, ap->prd, ap->prd_dma);
6037d6bb 4512 return rc;
cedc9a47
JG		 4513 }
4514
1da177e4
LT		 4515 DPRINTK("prd alloc, virt %p, dma %llx\n", ap->prd, (unsigned long long) ap->prd_dma);
4516
4517 return 0;
4518}
4519
0baab86b
EF		 4520
4521/**
4522 * ata_port_stop - Undo ata_port_start()
4523 * @ap: Port to shut down
4524 *
4525 * Frees the PRD table.
4526 *
4527 * May be used as the port_stop() entry in ata_port_operations.
4528 *
4529 * LOCKING:
6f0ef4fa 4530 * Inherited from caller.
0baab86b
EF		 4531 */
4532
1da177e4
LT		 4533void ata_port_stop (struct ata_port *ap)
4534{
4535 struct device *dev = ap->host_set->dev;
4536
4537 dma_free_coherent(dev, ATA_PRD_TBL_SZ, ap->prd, ap->prd_dma);
6037d6bb 4538 ata_pad_free(ap, dev);
1da177e4
LT		 4539}
4540
aa8f0dc6
JG		 4541void ata_host_stop (struct ata_host_set *host_set)
4542{
4543 if (host_set->mmio_base)
4544 iounmap(host_set->mmio_base);
4545}
4546
4547
1da177e4
LT		 4548/**
4549 * ata_host_remove - Unregister SCSI host structure with upper layers
4550 * @ap: Port to unregister
4551 * @do_unregister: 1 if we fully unregister, 0 to just stop the port
4552 *
4553 * LOCKING:
6f0ef4fa 4554 * Inherited from caller.
1da177e4
LT		 4555 */
4556
4557static void ata_host_remove(struct ata_port *ap, unsigned int do_unregister)
4558{
4559 struct Scsi_Host *sh = ap->host;
4560
4561 DPRINTK("ENTER\n");
4562
4563 if (do_unregister)
4564 scsi_remove_host(sh);
4565
4566 ap->ops->port_stop(ap);
4567}
4568
4569/**
4570 * ata_host_init - Initialize an ata_port structure
4571 * @ap: Structure to initialize
4572 * @host: associated SCSI mid-layer structure
4573 * @host_set: Collection of hosts to which @ap belongs
4574 * @ent: Probe information provided by low-level driver
4575 * @port_no: Port number associated with this ata_port
4576 *
0cba632b
JG		 4577 * Initialize a new ata_port structure, and its associated
4578 * scsi_host.
4579 *
1da177e4 4580 * LOCKING:
0cba632b 4581 * Inherited from caller.
1da177e4
LT		 4582 */
4583
4584static void ata_host_init(struct ata_port *ap, struct Scsi_Host *host,
4585 struct ata_host_set *host_set,
057ace5e 4586 const struct ata_probe_ent *ent, unsigned int port_no)
1da177e4
LT		 4587{
4588 unsigned int i;
4589
4590 host->max_id = 16;
4591 host->max_lun = 1;
4592 host->max_channel = 1;
4593 host->unique_id = ata_unique_id++;
4594 host->max_cmd_len = 12;
12413197 4595
1da177e4
LT		 4596 ap->flags = ATA_FLAG_PORT_DISABLED;
4597 ap->id = host->unique_id;
4598 ap->host = host;
4599 ap->ctl = ATA_DEVCTL_OBS;
4600 ap->host_set = host_set;
4601 ap->port_no = port_no;
4602 ap->hard_port_no =
4603 ent->legacy_mode ? ent->hard_port_no : port_no;
4604 ap->pio_mask = ent->pio_mask;
4605 ap->mwdma_mask = ent->mwdma_mask;
4606 ap->udma_mask = ent->udma_mask;
4607 ap->flags |= ent->host_flags;
4608 ap->ops = ent->port_ops;
4609 ap->cbl = ATA_CBL_NONE;
4610 ap->active_tag = ATA_TAG_POISON;
4611 ap->last_ctl = 0xFF;
4612
86e45b6b 4613 INIT_WORK(&ap->port_task, NULL, NULL);
a72ec4ce 4614 INIT_LIST_HEAD(&ap->eh_done_q);
1da177e4
LT		 4615
4616 for (i = 0; i < ATA_MAX_DEVICES; i++)
4617 ap->device[i].devno = i;
4618
4619#ifdef ATA_IRQ_TRAP
4620 ap->stats.unhandled_irq = 1;
4621 ap->stats.idle_irq = 1;
4622#endif
4623
4624 memcpy(&ap->ioaddr, &ent->port[port_no], sizeof(struct ata_ioports));
4625}
4626
4627/**
4628 * ata_host_add - Attach low-level ATA driver to system
4629 * @ent: Information provided by low-level driver
4630 * @host_set: Collections of ports to which we add
4631 * @port_no: Port number associated with this host
4632 *
0cba632b
JG		 4633 * Attach low-level ATA driver to system.
4634 *
1da177e4 4635 * LOCKING:
0cba632b 4636 * PCI/etc. bus probe sem.
1da177e4
LT		 4637 *
4638 * RETURNS:
0cba632b 4639 * New ata_port on success, for NULL on error.
1da177e4
LT		 4640 */
4641
057ace5e 4642static struct ata_port * ata_host_add(const struct ata_probe_ent *ent,
1da177e4
LT		 4643 struct ata_host_set *host_set,
4644 unsigned int port_no)
4645{
4646 struct Scsi_Host *host;
4647 struct ata_port *ap;
4648 int rc;
4649
4650 DPRINTK("ENTER\n");
4651 host = scsi_host_alloc(ent->sht, sizeof(struct ata_port));
4652 if (!host)
4653 return NULL;
4654
4655 ap = (struct ata_port *) &host->hostdata[0];
4656
4657 ata_host_init(ap, host, host_set, ent, port_no);
4658
4659 rc = ap->ops->port_start(ap);
4660 if (rc)
4661 goto err_out;
4662
4663 return ap;
4664
4665err_out:
4666 scsi_host_put(host);
4667 return NULL;
4668}
4669
4670/**
0cba632b
JG		 4671 * ata_device_add - Register hardware device with ATA and SCSI layers
4672 * @ent: Probe information describing hardware device to be registered
4673 *
4674 * This function processes the information provided in the probe
4675 * information struct @ent, allocates the necessary ATA and SCSI
4676 * host information structures, initializes them, and registers
4677 * everything with requisite kernel subsystems.
4678 *
4679 * This function requests irqs, probes the ATA bus, and probes
4680 * the SCSI bus.
1da177e4
LT		 4681 *
4682 * LOCKING:
0cba632b 4683 * PCI/etc. bus probe sem.
1da177e4
LT		 4684 *
4685 * RETURNS:
0cba632b 4686 * Number of ports registered. Zero on error (no ports registered).
1da177e4
LT		 4687 */
4688
057ace5e 4689int ata_device_add(const struct ata_probe_ent *ent)
1da177e4
LT		 4690{
4691 unsigned int count = 0, i;
4692 struct device *dev = ent->dev;
4693 struct ata_host_set *host_set;
4694
4695 DPRINTK("ENTER\n");
4696 /* alloc a container for our list of ATA ports (buses) */
57f3bda8 4697 host_set = kzalloc(sizeof(struct ata_host_set) +
1da177e4
LT		 4698 (ent->n_ports * sizeof(void *)), GFP_KERNEL);
4699 if (!host_set)
4700 return 0;
1da177e4
LT		 4701 spin_lock_init(&host_set->lock);
4702
4703 host_set->dev = dev;
4704 host_set->n_ports = ent->n_ports;
4705 host_set->irq = ent->irq;
4706 host_set->mmio_base = ent->mmio_base;
4707 host_set->private_data = ent->private_data;
4708 host_set->ops = ent->port_ops;
4709
4710 /* register each port bound to this device */
4711 for (i = 0; i < ent->n_ports; i++) {
4712 struct ata_port *ap;
4713 unsigned long xfer_mode_mask;
4714
4715 ap = ata_host_add(ent, host_set, i);
4716 if (!ap)
4717 goto err_out;
4718
4719 host_set->ports[i] = ap;
4720 xfer_mode_mask =(ap->udma_mask << ATA_SHIFT_UDMA) |
4721 (ap->mwdma_mask << ATA_SHIFT_MWDMA) |
4722 (ap->pio_mask << ATA_SHIFT_PIO);
4723
4724 /* print per-port info to dmesg */
4725 printk(KERN_INFO "ata%u: %cATA max %s cmd 0x%lX ctl 0x%lX "
4726 "bmdma 0x%lX irq %lu\n",
4727 ap->id,
4728 ap->flags & ATA_FLAG_SATA ? 'S' : 'P',
4729 ata_mode_string(xfer_mode_mask),
4730 ap->ioaddr.cmd_addr,
4731 ap->ioaddr.ctl_addr,
4732 ap->ioaddr.bmdma_addr,
4733 ent->irq);
4734
4735 ata_chk_status(ap);
4736 host_set->ops->irq_clear(ap);
4737 count++;
4738 }
4739
57f3bda8
RD		 4740 if (!count)
4741 goto err_free_ret;
1da177e4
LT		 4742
4743 /* obtain irq, that is shared between channels */
4744 if (request_irq(ent->irq, ent->port_ops->irq_handler, ent->irq_flags,
4745 DRV_NAME, host_set))
4746 goto err_out;
4747
4748 /* perform each probe synchronously */
4749 DPRINTK("probe begin\n");
4750 for (i = 0; i < count; i++) {
4751 struct ata_port *ap;
4752 int rc;
4753
4754 ap = host_set->ports[i];
4755
c893a3ae 4756 DPRINTK("ata%u: bus probe begin\n", ap->id);
1da177e4 4757 rc = ata_bus_probe(ap);
c893a3ae 4758 DPRINTK("ata%u: bus probe end\n", ap->id);
1da177e4
LT		 4759
4760 if (rc) {
4761 /* FIXME: do something useful here?
4762 * Current libata behavior will
4763 * tear down everything when
4764 * the module is removed
4765 * or the h/w is unplugged.
4766 */
4767 }
4768
4769 rc = scsi_add_host(ap->host, dev);
4770 if (rc) {
4771 printk(KERN_ERR "ata%u: scsi_add_host failed\n",
4772 ap->id);
4773 /* FIXME: do something useful here */
4774 /* FIXME: handle unconditional calls to
4775 * scsi_scan_host and ata_host_remove, below,
4776 * at the very least
4777 */
4778 }
4779 }
4780
4781 /* probes are done, now scan each port's disk(s) */
c893a3ae 4782 DPRINTK("host probe begin\n");
1da177e4
LT		 4783 for (i = 0; i < count; i++) {
4784 struct ata_port *ap = host_set->ports[i];
4785
644dd0cc 4786 ata_scsi_scan_host(ap);
1da177e4
LT		 4787 }
4788
4789 dev_set_drvdata(dev, host_set);
4790
4791 VPRINTK("EXIT, returning %u\n", ent->n_ports);
4792 return ent->n_ports; /* success */
4793
4794err_out:
4795 for (i = 0; i < count; i++) {
4796 ata_host_remove(host_set->ports[i], 1);
4797 scsi_host_put(host_set->ports[i]->host);
4798 }
57f3bda8 4799err_free_ret:
1da177e4
LT		 4800 kfree(host_set);
4801 VPRINTK("EXIT, returning 0\n");
4802 return 0;
4803}
4804
17b14451
AC		 4805/**
4806 * ata_host_set_remove - PCI layer callback for device removal
4807 * @host_set: ATA host set that was removed
4808 *
4809 * Unregister all objects associated with this host set. Free those
4810 * objects.
4811 *
4812 * LOCKING:
4813 * Inherited from calling layer (may sleep).
4814 */
4815
17b14451
AC		 4816void ata_host_set_remove(struct ata_host_set *host_set)
4817{
4818 struct ata_port *ap;
4819 unsigned int i;
4820
4821 for (i = 0; i < host_set->n_ports; i++) {
4822 ap = host_set->ports[i];
4823 scsi_remove_host(ap->host);
4824 }
4825
4826 free_irq(host_set->irq, host_set);
4827
4828 for (i = 0; i < host_set->n_ports; i++) {
4829 ap = host_set->ports[i];
4830
4831 ata_scsi_release(ap->host);
4832
4833 if ((ap->flags & ATA_FLAG_NO_LEGACY) == 0) {
4834 struct ata_ioports *ioaddr = &ap->ioaddr;
4835
4836 if (ioaddr->cmd_addr == 0x1f0)
4837 release_region(0x1f0, 8);
4838 else if (ioaddr->cmd_addr == 0x170)
4839 release_region(0x170, 8);
4840 }
4841
4842 scsi_host_put(ap->host);
4843 }
4844
4845 if (host_set->ops->host_stop)
4846 host_set->ops->host_stop(host_set);
4847
4848 kfree(host_set);
4849}
4850
1da177e4
LT		 4851/**
4852 * ata_scsi_release - SCSI layer callback hook for host unload
4853 * @host: libata host to be unloaded
4854 *
4855 * Performs all duties necessary to shut down a libata port...
4856 * Kill port kthread, disable port, and release resources.
4857 *
4858 * LOCKING:
4859 * Inherited from SCSI layer.
4860 *
4861 * RETURNS:
4862 * One.
4863 */
4864
4865int ata_scsi_release(struct Scsi_Host *host)
4866{
4867 struct ata_port *ap = (struct ata_port *) &host->hostdata[0];
d9572b1d 4868 int i;
1da177e4
LT		 4869
4870 DPRINTK("ENTER\n");
4871
4872 ap->ops->port_disable(ap);
4873 ata_host_remove(ap, 0);
d9572b1d
TH		 4874 for (i = 0; i < ATA_MAX_DEVICES; i++)
4875 kfree(ap->device[i].id);
1da177e4
LT		 4876
4877 DPRINTK("EXIT\n");
4878 return 1;
4879}
4880
4881/**
4882 * ata_std_ports - initialize ioaddr with standard port offsets.
4883 * @ioaddr: IO address structure to be initialized
0baab86b
EF		 4884 *
4885 * Utility function which initializes data_addr, error_addr,
4886 * feature_addr, nsect_addr, lbal_addr, lbam_addr, lbah_addr,
4887 * device_addr, status_addr, and command_addr to standard offsets
4888 * relative to cmd_addr.
4889 *
4890 * Does not set ctl_addr, altstatus_addr, bmdma_addr, or scr_addr.
1da177e4 4891 */
0baab86b 4892
1da177e4
LT		 4893void ata_std_ports(struct ata_ioports *ioaddr)
4894{
4895 ioaddr->data_addr = ioaddr->cmd_addr + ATA_REG_DATA;
4896 ioaddr->error_addr = ioaddr->cmd_addr + ATA_REG_ERR;
4897 ioaddr->feature_addr = ioaddr->cmd_addr + ATA_REG_FEATURE;
4898 ioaddr->nsect_addr = ioaddr->cmd_addr + ATA_REG_NSECT;
4899 ioaddr->lbal_addr = ioaddr->cmd_addr + ATA_REG_LBAL;
4900 ioaddr->lbam_addr = ioaddr->cmd_addr + ATA_REG_LBAM;
4901 ioaddr->lbah_addr = ioaddr->cmd_addr + ATA_REG_LBAH;
4902 ioaddr->device_addr = ioaddr->cmd_addr + ATA_REG_DEVICE;
4903 ioaddr->status_addr = ioaddr->cmd_addr + ATA_REG_STATUS;
4904 ioaddr->command_addr = ioaddr->cmd_addr + ATA_REG_CMD;
4905}
4906
0baab86b 4907
374b1873
JG		 4908#ifdef CONFIG_PCI
4909
4910void ata_pci_host_stop (struct ata_host_set *host_set)
4911{
4912 struct pci_dev *pdev = to_pci_dev(host_set->dev);
4913
4914 pci_iounmap(pdev, host_set->mmio_base);
4915}
4916
1da177e4
LT		 4917/**
4918 * ata_pci_remove_one - PCI layer callback for device removal
4919 * @pdev: PCI device that was removed
4920 *
4921 * PCI layer indicates to libata via this hook that
6f0ef4fa 4922 * hot-unplug or module unload event has occurred.
1da177e4
LT		 4923 * Handle this by unregistering all objects associated
4924 * with this PCI device. Free those objects. Then finally
4925 * release PCI resources and disable device.
4926 *
4927 * LOCKING:
4928 * Inherited from PCI layer (may sleep).
4929 */
4930
4931void ata_pci_remove_one (struct pci_dev *pdev)
4932{
4933 struct device *dev = pci_dev_to_dev(pdev);
4934 struct ata_host_set *host_set = dev_get_drvdata(dev);
1da177e4 4935
17b14451 4936 ata_host_set_remove(host_set);
1da177e4
LT		 4937 pci_release_regions(pdev);
4938 pci_disable_device(pdev);
4939 dev_set_drvdata(dev, NULL);
4940}
4941
4942/* move to PCI subsystem */
057ace5e 4943int pci_test_config_bits(struct pci_dev *pdev, const struct pci_bits *bits)
1da177e4
LT		 4944{
4945 unsigned long tmp = 0;
4946
4947 switch (bits->width) {
4948 case 1: {
4949 u8 tmp8 = 0;
4950 pci_read_config_byte(pdev, bits->reg, &tmp8);
4951 tmp = tmp8;
4952 break;
4953 }
4954 case 2: {
4955 u16 tmp16 = 0;
4956 pci_read_config_word(pdev, bits->reg, &tmp16);
4957 tmp = tmp16;
4958 break;
4959 }
4960 case 4: {
4961 u32 tmp32 = 0;
4962 pci_read_config_dword(pdev, bits->reg, &tmp32);
4963 tmp = tmp32;
4964 break;
4965 }
4966
4967 default:
4968 return -EINVAL;
4969 }
4970
4971 tmp &= bits->mask;
4972
4973 return (tmp == bits->val) ? 1 : 0;
4974}
9b847548
JA		 4975
4976int ata_pci_device_suspend(struct pci_dev *pdev, pm_message_t state)
4977{
4978 pci_save_state(pdev);
4979 pci_disable_device(pdev);
4980 pci_set_power_state(pdev, PCI_D3hot);
4981 return 0;
4982}
4983
4984int ata_pci_device_resume(struct pci_dev *pdev)
4985{
4986 pci_set_power_state(pdev, PCI_D0);
4987 pci_restore_state(pdev);
4988 pci_enable_device(pdev);
4989 pci_set_master(pdev);
4990 return 0;
4991}
1da177e4
LT		 4992#endif /* CONFIG_PCI */
4993
4994
1da177e4
LT		 4995static int __init ata_init(void)
4996{
4997 ata_wq = create_workqueue("ata");
4998 if (!ata_wq)
4999 return -ENOMEM;
5000
5001 printk(KERN_DEBUG "libata version " DRV_VERSION " loaded.\n");
5002 return 0;
5003}
5004
5005static void __exit ata_exit(void)
5006{
5007 destroy_workqueue(ata_wq);
5008}
5009
5010module_init(ata_init);
5011module_exit(ata_exit);
5012
67846b30
JG		 5013static unsigned long ratelimit_time;
5014static spinlock_t ata_ratelimit_lock = SPIN_LOCK_UNLOCKED;
5015
5016int ata_ratelimit(void)
5017{
5018 int rc;
5019 unsigned long flags;
5020
5021 spin_lock_irqsave(&ata_ratelimit_lock, flags);
5022
5023 if (time_after(jiffies, ratelimit_time)) {
5024 rc = 1;
5025 ratelimit_time = jiffies + (HZ/5);
5026 } else
5027 rc = 0;
5028
5029 spin_unlock_irqrestore(&ata_ratelimit_lock, flags);
5030
5031 return rc;
5032}
5033
1da177e4
LT		 5034/*
5035 * libata is essentially a library of internal helper functions for
5036 * low-level ATA host controller drivers. As such, the API/ABI is
5037 * likely to change as new drivers are added and updated.
5038 * Do not depend on ABI/API stability.
5039 */
5040
5041EXPORT_SYMBOL_GPL(ata_std_bios_param);
5042EXPORT_SYMBOL_GPL(ata_std_ports);
5043EXPORT_SYMBOL_GPL(ata_device_add);
17b14451 5044EXPORT_SYMBOL_GPL(ata_host_set_remove);
1da177e4
LT		 5045EXPORT_SYMBOL_GPL(ata_sg_init);
5046EXPORT_SYMBOL_GPL(ata_sg_init_one);
76014427 5047EXPORT_SYMBOL_GPL(__ata_qc_complete);
1da177e4
LT		 5048EXPORT_SYMBOL_GPL(ata_qc_issue_prot);
5049EXPORT_SYMBOL_GPL(ata_eng_timeout);
5050EXPORT_SYMBOL_GPL(ata_tf_load);
5051EXPORT_SYMBOL_GPL(ata_tf_read);
5052EXPORT_SYMBOL_GPL(ata_noop_dev_select);
5053EXPORT_SYMBOL_GPL(ata_std_dev_select);
5054EXPORT_SYMBOL_GPL(ata_tf_to_fis);
5055EXPORT_SYMBOL_GPL(ata_tf_from_fis);
5056EXPORT_SYMBOL_GPL(ata_check_status);
5057EXPORT_SYMBOL_GPL(ata_altstatus);
1da177e4
LT		 5058EXPORT_SYMBOL_GPL(ata_exec_command);
5059EXPORT_SYMBOL_GPL(ata_port_start);
5060EXPORT_SYMBOL_GPL(ata_port_stop);
aa8f0dc6 5061EXPORT_SYMBOL_GPL(ata_host_stop);
1da177e4
LT		 5062EXPORT_SYMBOL_GPL(ata_interrupt);
5063EXPORT_SYMBOL_GPL(ata_qc_prep);
5064EXPORT_SYMBOL_GPL(ata_bmdma_setup);
5065EXPORT_SYMBOL_GPL(ata_bmdma_start);
5066EXPORT_SYMBOL_GPL(ata_bmdma_irq_clear);
5067EXPORT_SYMBOL_GPL(ata_bmdma_status);
5068EXPORT_SYMBOL_GPL(ata_bmdma_stop);
5069EXPORT_SYMBOL_GPL(ata_port_probe);
5070EXPORT_SYMBOL_GPL(sata_phy_reset);
5071EXPORT_SYMBOL_GPL(__sata_phy_reset);
5072EXPORT_SYMBOL_GPL(ata_bus_reset);
8a19ac89 5073EXPORT_SYMBOL_GPL(ata_std_probeinit);
c2bd5804
TH		 5074EXPORT_SYMBOL_GPL(ata_std_softreset);
5075EXPORT_SYMBOL_GPL(sata_std_hardreset);
5076EXPORT_SYMBOL_GPL(ata_std_postreset);
5077EXPORT_SYMBOL_GPL(ata_std_probe_reset);
a62c0fc5 5078EXPORT_SYMBOL_GPL(ata_drive_probe_reset);
623a3128 5079EXPORT_SYMBOL_GPL(ata_dev_revalidate);
1da177e4 5080EXPORT_SYMBOL_GPL(ata_port_disable);
67846b30 5081EXPORT_SYMBOL_GPL(ata_ratelimit);
6f8b9958 5082EXPORT_SYMBOL_GPL(ata_busy_sleep);
86e45b6b 5083EXPORT_SYMBOL_GPL(ata_port_queue_task);
1da177e4
LT		 5084EXPORT_SYMBOL_GPL(ata_scsi_ioctl);
5085EXPORT_SYMBOL_GPL(ata_scsi_queuecmd);
f29841e0 5086EXPORT_SYMBOL_GPL(ata_scsi_timed_out);
1da177e4
LT		 5087EXPORT_SYMBOL_GPL(ata_scsi_error);
5088EXPORT_SYMBOL_GPL(ata_scsi_slave_config);
5089EXPORT_SYMBOL_GPL(ata_scsi_release);
5090EXPORT_SYMBOL_GPL(ata_host_intr);
5091EXPORT_SYMBOL_GPL(ata_dev_classify);
6a62a04d
TH		 5092EXPORT_SYMBOL_GPL(ata_id_string);
5093EXPORT_SYMBOL_GPL(ata_id_c_string);
1da177e4 5094EXPORT_SYMBOL_GPL(ata_scsi_simulate);
a72ec4ce
TH		 5095EXPORT_SYMBOL_GPL(ata_eh_qc_complete);
5096EXPORT_SYMBOL_GPL(ata_eh_qc_retry);
1da177e4 5097
1bc4ccff 5098EXPORT_SYMBOL_GPL(ata_pio_need_iordy);
452503f9
AC		 5099EXPORT_SYMBOL_GPL(ata_timing_compute);
5100EXPORT_SYMBOL_GPL(ata_timing_merge);
5101
1da177e4
LT		 5102#ifdef CONFIG_PCI
5103EXPORT_SYMBOL_GPL(pci_test_config_bits);
374b1873 5104EXPORT_SYMBOL_GPL(ata_pci_host_stop);
1da177e4
LT		 5105EXPORT_SYMBOL_GPL(ata_pci_init_native_mode);
5106EXPORT_SYMBOL_GPL(ata_pci_init_one);
5107EXPORT_SYMBOL_GPL(ata_pci_remove_one);
9b847548
JA		 5108EXPORT_SYMBOL_GPL(ata_pci_device_suspend);
5109EXPORT_SYMBOL_GPL(ata_pci_device_resume);
1da177e4 5110#endif /* CONFIG_PCI */
9b847548
JA		 5111
5112EXPORT_SYMBOL_GPL(ata_device_suspend);
5113EXPORT_SYMBOL_GPL(ata_device_resume);
5114EXPORT_SYMBOL_GPL(ata_scsi_device_suspend);
5115EXPORT_SYMBOL_GPL(ata_scsi_device_resume);
Linux 6.x block layer and io_uring tree(s)