Commit | Line | Data |
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2874c5fd | 1 | // SPDX-License-Identifier: GPL-2.0-or-later |
c21e0bbf MO |
2 | /* |
3 | * CXL Flash Device Driver | |
4 | * | |
5 | * Written by: Manoj N. Kumar <manoj@linux.vnet.ibm.com>, IBM Corporation | |
6 | * Matthew R. Ochs <mrochs@linux.vnet.ibm.com>, IBM Corporation | |
7 | * | |
8 | * Copyright (C) 2015 IBM Corporation | |
c21e0bbf MO |
9 | */ |
10 | ||
11 | #include <linux/delay.h> | |
12 | #include <linux/list.h> | |
13 | #include <linux/module.h> | |
14 | #include <linux/pci.h> | |
15 | ||
16 | #include <asm/unaligned.h> | |
17 | ||
c21e0bbf MO |
18 | #include <scsi/scsi_cmnd.h> |
19 | #include <scsi/scsi_host.h> | |
65be2c79 | 20 | #include <uapi/scsi/cxlflash_ioctl.h> |
c21e0bbf MO |
21 | |
22 | #include "main.h" | |
23 | #include "sislite.h" | |
24 | #include "common.h" | |
25 | ||
26 | MODULE_DESCRIPTION(CXLFLASH_ADAPTER_NAME); | |
27 | MODULE_AUTHOR("Manoj N. Kumar <manoj@linux.vnet.ibm.com>"); | |
28 | MODULE_AUTHOR("Matthew R. Ochs <mrochs@linux.vnet.ibm.com>"); | |
29 | MODULE_LICENSE("GPL"); | |
30 | ||
a08f0eb0 RM |
31 | static char *cxlflash_devnode(const struct device *dev, umode_t *mode); |
32 | static const struct class cxlflash_class = { | |
33 | .name = "cxlflash", | |
34 | .devnode = cxlflash_devnode, | |
35 | }; | |
36 | ||
a834a36b UK |
37 | static u32 cxlflash_major; |
38 | static DECLARE_BITMAP(cxlflash_minor, CXLFLASH_MAX_ADAPTERS); | |
39 | ||
c21e0bbf MO |
40 | /** |
41 | * process_cmd_err() - command error handler | |
42 | * @cmd: AFU command that experienced the error. | |
43 | * @scp: SCSI command associated with the AFU command in error. | |
44 | * | |
45 | * Translates error bits from AFU command to SCSI command results. | |
46 | */ | |
47 | static void process_cmd_err(struct afu_cmd *cmd, struct scsi_cmnd *scp) | |
48 | { | |
fb67d44d MO |
49 | struct afu *afu = cmd->parent; |
50 | struct cxlflash_cfg *cfg = afu->parent; | |
51 | struct device *dev = &cfg->dev->dev; | |
c21e0bbf | 52 | struct sisl_ioasa *ioasa; |
8396012f | 53 | u32 resid; |
c21e0bbf | 54 | |
c21e0bbf MO |
55 | ioasa = &(cmd->sa); |
56 | ||
57 | if (ioasa->rc.flags & SISL_RC_FLAGS_UNDERRUN) { | |
8396012f MO |
58 | resid = ioasa->resid; |
59 | scsi_set_resid(scp, resid); | |
fb67d44d MO |
60 | dev_dbg(dev, "%s: cmd underrun cmd = %p scp = %p, resid = %d\n", |
61 | __func__, cmd, scp, resid); | |
c21e0bbf MO |
62 | } |
63 | ||
64 | if (ioasa->rc.flags & SISL_RC_FLAGS_OVERRUN) { | |
fb67d44d MO |
65 | dev_dbg(dev, "%s: cmd underrun cmd = %p scp = %p\n", |
66 | __func__, cmd, scp); | |
c21e0bbf MO |
67 | scp->result = (DID_ERROR << 16); |
68 | } | |
69 | ||
fb67d44d MO |
70 | dev_dbg(dev, "%s: cmd failed afu_rc=%02x scsi_rc=%02x fc_rc=%02x " |
71 | "afu_extra=%02x scsi_extra=%02x fc_extra=%02x\n", __func__, | |
72 | ioasa->rc.afu_rc, ioasa->rc.scsi_rc, ioasa->rc.fc_rc, | |
73 | ioasa->afu_extra, ioasa->scsi_extra, ioasa->fc_extra); | |
c21e0bbf MO |
74 | |
75 | if (ioasa->rc.scsi_rc) { | |
76 | /* We have a SCSI status */ | |
77 | if (ioasa->rc.flags & SISL_RC_FLAGS_SENSE_VALID) { | |
78 | memcpy(scp->sense_buffer, ioasa->sense_data, | |
79 | SISL_SENSE_DATA_LEN); | |
80 | scp->result = ioasa->rc.scsi_rc; | |
81 | } else | |
82 | scp->result = ioasa->rc.scsi_rc | (DID_ERROR << 16); | |
83 | } | |
84 | ||
85 | /* | |
86 | * We encountered an error. Set scp->result based on nature | |
87 | * of error. | |
88 | */ | |
89 | if (ioasa->rc.fc_rc) { | |
90 | /* We have an FC status */ | |
91 | switch (ioasa->rc.fc_rc) { | |
92 | case SISL_FC_RC_LINKDOWN: | |
93 | scp->result = (DID_REQUEUE << 16); | |
94 | break; | |
95 | case SISL_FC_RC_RESID: | |
96 | /* This indicates an FCP resid underrun */ | |
97 | if (!(ioasa->rc.flags & SISL_RC_FLAGS_OVERRUN)) { | |
98 | /* If the SISL_RC_FLAGS_OVERRUN flag was set, | |
99 | * then we will handle this error else where. | |
100 | * If not then we must handle it here. | |
8396012f | 101 | * This is probably an AFU bug. |
c21e0bbf MO |
102 | */ |
103 | scp->result = (DID_ERROR << 16); | |
104 | } | |
105 | break; | |
106 | case SISL_FC_RC_RESIDERR: | |
107 | /* Resid mismatch between adapter and device */ | |
108 | case SISL_FC_RC_TGTABORT: | |
109 | case SISL_FC_RC_ABORTOK: | |
110 | case SISL_FC_RC_ABORTFAIL: | |
111 | case SISL_FC_RC_NOLOGI: | |
112 | case SISL_FC_RC_ABORTPEND: | |
113 | case SISL_FC_RC_WRABORTPEND: | |
114 | case SISL_FC_RC_NOEXP: | |
115 | case SISL_FC_RC_INUSE: | |
116 | scp->result = (DID_ERROR << 16); | |
117 | break; | |
118 | } | |
119 | } | |
120 | ||
121 | if (ioasa->rc.afu_rc) { | |
122 | /* We have an AFU error */ | |
123 | switch (ioasa->rc.afu_rc) { | |
124 | case SISL_AFU_RC_NO_CHANNELS: | |
8396012f | 125 | scp->result = (DID_NO_CONNECT << 16); |
c21e0bbf MO |
126 | break; |
127 | case SISL_AFU_RC_DATA_DMA_ERR: | |
128 | switch (ioasa->afu_extra) { | |
129 | case SISL_AFU_DMA_ERR_PAGE_IN: | |
130 | /* Retry */ | |
131 | scp->result = (DID_IMM_RETRY << 16); | |
132 | break; | |
133 | case SISL_AFU_DMA_ERR_INVALID_EA: | |
134 | default: | |
135 | scp->result = (DID_ERROR << 16); | |
136 | } | |
137 | break; | |
138 | case SISL_AFU_RC_OUT_OF_DATA_BUFS: | |
139 | /* Retry */ | |
ebb54b20 | 140 | scp->result = (DID_ERROR << 16); |
c21e0bbf MO |
141 | break; |
142 | default: | |
143 | scp->result = (DID_ERROR << 16); | |
144 | } | |
145 | } | |
146 | } | |
147 | ||
148 | /** | |
149 | * cmd_complete() - command completion handler | |
150 | * @cmd: AFU command that has completed. | |
151 | * | |
8ba1ddb3 MO |
152 | * For SCSI commands this routine prepares and submits commands that have |
153 | * either completed or timed out to the SCSI stack. For internal commands | |
154 | * (TMF or AFU), this routine simply notifies the originator that the | |
155 | * command has completed. | |
c21e0bbf MO |
156 | */ |
157 | static void cmd_complete(struct afu_cmd *cmd) | |
158 | { | |
159 | struct scsi_cmnd *scp; | |
c21e0bbf MO |
160 | ulong lock_flags; |
161 | struct afu *afu = cmd->parent; | |
162 | struct cxlflash_cfg *cfg = afu->parent; | |
fb67d44d | 163 | struct device *dev = &cfg->dev->dev; |
a002bf83 | 164 | struct hwq *hwq = get_hwq(afu, cmd->hwq_index); |
c21e0bbf | 165 | |
a002bf83 UK |
166 | spin_lock_irqsave(&hwq->hsq_slock, lock_flags); |
167 | list_del(&cmd->list); | |
168 | spin_unlock_irqrestore(&hwq->hsq_slock, lock_flags); | |
169 | ||
fe7f9698 MO |
170 | if (cmd->scp) { |
171 | scp = cmd->scp; | |
8396012f | 172 | if (unlikely(cmd->sa.ioasc)) |
c21e0bbf MO |
173 | process_cmd_err(cmd, scp); |
174 | else | |
175 | scp->result = (DID_OK << 16); | |
176 | ||
fb67d44d MO |
177 | dev_dbg_ratelimited(dev, "%s:scp=%p result=%08x ioasc=%08x\n", |
178 | __func__, scp, scp->result, cmd->sa.ioasc); | |
e82d6b17 | 179 | scsi_done(scp); |
8ba1ddb3 MO |
180 | } else if (cmd->cmd_tmf) { |
181 | spin_lock_irqsave(&cfg->tmf_slock, lock_flags); | |
182 | cfg->tmf_active = false; | |
183 | wake_up_all_locked(&cfg->tmf_waitq); | |
184 | spin_unlock_irqrestore(&cfg->tmf_slock, lock_flags); | |
c21e0bbf MO |
185 | } else |
186 | complete(&cmd->cevent); | |
187 | } | |
188 | ||
a1ea04b3 UK |
189 | /** |
190 | * flush_pending_cmds() - flush all pending commands on this hardware queue | |
191 | * @hwq: Hardware queue to flush. | |
192 | * | |
193 | * The hardware send queue lock associated with this hardware queue must be | |
194 | * held when calling this routine. | |
195 | */ | |
196 | static void flush_pending_cmds(struct hwq *hwq) | |
197 | { | |
8ba1ddb3 | 198 | struct cxlflash_cfg *cfg = hwq->afu->parent; |
a1ea04b3 UK |
199 | struct afu_cmd *cmd, *tmp; |
200 | struct scsi_cmnd *scp; | |
8ba1ddb3 | 201 | ulong lock_flags; |
a1ea04b3 UK |
202 | |
203 | list_for_each_entry_safe(cmd, tmp, &hwq->pending_cmds, list) { | |
204 | /* Bypass command when on a doneq, cmd_complete() will handle */ | |
205 | if (!list_empty(&cmd->queue)) | |
206 | continue; | |
207 | ||
208 | list_del(&cmd->list); | |
209 | ||
210 | if (cmd->scp) { | |
211 | scp = cmd->scp; | |
212 | scp->result = (DID_IMM_RETRY << 16); | |
e82d6b17 | 213 | scsi_done(scp); |
a1ea04b3 UK |
214 | } else { |
215 | cmd->cmd_aborted = true; | |
8ba1ddb3 MO |
216 | |
217 | if (cmd->cmd_tmf) { | |
218 | spin_lock_irqsave(&cfg->tmf_slock, lock_flags); | |
219 | cfg->tmf_active = false; | |
220 | wake_up_all_locked(&cfg->tmf_waitq); | |
221 | spin_unlock_irqrestore(&cfg->tmf_slock, | |
222 | lock_flags); | |
223 | } else | |
224 | complete(&cmd->cevent); | |
a1ea04b3 UK |
225 | } |
226 | } | |
227 | } | |
228 | ||
15305514 | 229 | /** |
a96851d3 UK |
230 | * context_reset() - reset context via specified register |
231 | * @hwq: Hardware queue owning the context to be reset. | |
9c7d1ee5 | 232 | * @reset_reg: MMIO register to perform reset. |
a96851d3 | 233 | * |
7c4c41f1 UK |
234 | * When the reset is successful, the SISLite specification guarantees that |
235 | * the AFU has aborted all currently pending I/O. Accordingly, these commands | |
236 | * must be flushed. | |
237 | * | |
a96851d3 | 238 | * Return: 0 on success, -errno on failure |
15305514 | 239 | */ |
a96851d3 | 240 | static int context_reset(struct hwq *hwq, __be64 __iomem *reset_reg) |
15305514 | 241 | { |
a96851d3 | 242 | struct cxlflash_cfg *cfg = hwq->afu->parent; |
3d2f617d | 243 | struct device *dev = &cfg->dev->dev; |
a96851d3 UK |
244 | int rc = -ETIMEDOUT; |
245 | int nretry = 0; | |
246 | u64 val = 0x1; | |
7c4c41f1 | 247 | ulong lock_flags; |
15305514 | 248 | |
a96851d3 | 249 | dev_dbg(dev, "%s: hwq=%p\n", __func__, hwq); |
15305514 | 250 | |
7c4c41f1 UK |
251 | spin_lock_irqsave(&hwq->hsq_slock, lock_flags); |
252 | ||
a96851d3 | 253 | writeq_be(val, reset_reg); |
15305514 | 254 | do { |
a96851d3 UK |
255 | val = readq_be(reset_reg); |
256 | if ((val & 0x1) == 0x0) { | |
257 | rc = 0; | |
15305514 | 258 | break; |
a96851d3 UK |
259 | } |
260 | ||
15305514 | 261 | /* Double delay each time */ |
ea765431 | 262 | udelay(1 << nretry); |
15305514 | 263 | } while (nretry++ < MC_ROOM_RETRY_CNT); |
3d2f617d | 264 | |
7c4c41f1 UK |
265 | if (!rc) |
266 | flush_pending_cmds(hwq); | |
267 | ||
268 | spin_unlock_irqrestore(&hwq->hsq_slock, lock_flags); | |
269 | ||
a96851d3 UK |
270 | dev_dbg(dev, "%s: returning rc=%d, val=%016llx nretry=%d\n", |
271 | __func__, rc, val, nretry); | |
272 | return rc; | |
15305514 MO |
273 | } |
274 | ||
9c7d1ee5 | 275 | /** |
a96851d3 UK |
276 | * context_reset_ioarrin() - reset context via IOARRIN register |
277 | * @hwq: Hardware queue owning the context to be reset. | |
278 | * | |
279 | * Return: 0 on success, -errno on failure | |
9c7d1ee5 | 280 | */ |
a96851d3 | 281 | static int context_reset_ioarrin(struct hwq *hwq) |
9c7d1ee5 | 282 | { |
a96851d3 | 283 | return context_reset(hwq, &hwq->host_map->ioarrin); |
9c7d1ee5 MO |
284 | } |
285 | ||
696d0b0c | 286 | /** |
a96851d3 UK |
287 | * context_reset_sq() - reset context via SQ_CONTEXT_RESET register |
288 | * @hwq: Hardware queue owning the context to be reset. | |
289 | * | |
290 | * Return: 0 on success, -errno on failure | |
696d0b0c | 291 | */ |
a96851d3 | 292 | static int context_reset_sq(struct hwq *hwq) |
696d0b0c | 293 | { |
a96851d3 | 294 | return context_reset(hwq, &hwq->host_map->sq_ctx_reset); |
696d0b0c MO |
295 | } |
296 | ||
15305514 | 297 | /** |
48b4be36 | 298 | * send_cmd_ioarrin() - sends an AFU command via IOARRIN register |
15305514 MO |
299 | * @afu: AFU associated with the host. |
300 | * @cmd: AFU command to send. | |
301 | * | |
302 | * Return: | |
1284fb0c | 303 | * 0 on success, SCSI_MLQUEUE_HOST_BUSY on failure |
15305514 | 304 | */ |
48b4be36 | 305 | static int send_cmd_ioarrin(struct afu *afu, struct afu_cmd *cmd) |
15305514 MO |
306 | { |
307 | struct cxlflash_cfg *cfg = afu->parent; | |
308 | struct device *dev = &cfg->dev->dev; | |
bfc0bab1 | 309 | struct hwq *hwq = get_hwq(afu, cmd->hwq_index); |
15305514 | 310 | int rc = 0; |
11f7b184 UK |
311 | s64 room; |
312 | ulong lock_flags; | |
15305514 MO |
313 | |
314 | /* | |
11f7b184 UK |
315 | * To avoid the performance penalty of MMIO, spread the update of |
316 | * 'room' over multiple commands. | |
15305514 | 317 | */ |
66ea9bcc | 318 | spin_lock_irqsave(&hwq->hsq_slock, lock_flags); |
bfc0bab1 UK |
319 | if (--hwq->room < 0) { |
320 | room = readq_be(&hwq->host_map->cmd_room); | |
11f7b184 UK |
321 | if (room <= 0) { |
322 | dev_dbg_ratelimited(dev, "%s: no cmd_room to send " | |
323 | "0x%02X, room=0x%016llX\n", | |
324 | __func__, cmd->rcb.cdb[0], room); | |
bfc0bab1 | 325 | hwq->room = 0; |
11f7b184 UK |
326 | rc = SCSI_MLQUEUE_HOST_BUSY; |
327 | goto out; | |
15305514 | 328 | } |
bfc0bab1 | 329 | hwq->room = room - 1; |
15305514 MO |
330 | } |
331 | ||
a002bf83 | 332 | list_add(&cmd->list, &hwq->pending_cmds); |
bfc0bab1 | 333 | writeq_be((u64)&cmd->rcb, &hwq->host_map->ioarrin); |
15305514 | 334 | out: |
66ea9bcc | 335 | spin_unlock_irqrestore(&hwq->hsq_slock, lock_flags); |
d58188c3 UK |
336 | dev_dbg_ratelimited(dev, "%s: cmd=%p len=%u ea=%016llx rc=%d\n", |
337 | __func__, cmd, cmd->rcb.data_len, cmd->rcb.data_ea, rc); | |
15305514 | 338 | return rc; |
15305514 MO |
339 | } |
340 | ||
696d0b0c MO |
341 | /** |
342 | * send_cmd_sq() - sends an AFU command via SQ ring | |
343 | * @afu: AFU associated with the host. | |
344 | * @cmd: AFU command to send. | |
345 | * | |
346 | * Return: | |
347 | * 0 on success, SCSI_MLQUEUE_HOST_BUSY on failure | |
348 | */ | |
349 | static int send_cmd_sq(struct afu *afu, struct afu_cmd *cmd) | |
350 | { | |
351 | struct cxlflash_cfg *cfg = afu->parent; | |
352 | struct device *dev = &cfg->dev->dev; | |
bfc0bab1 | 353 | struct hwq *hwq = get_hwq(afu, cmd->hwq_index); |
696d0b0c MO |
354 | int rc = 0; |
355 | int newval; | |
356 | ulong lock_flags; | |
357 | ||
bfc0bab1 | 358 | newval = atomic_dec_if_positive(&hwq->hsq_credits); |
696d0b0c MO |
359 | if (newval <= 0) { |
360 | rc = SCSI_MLQUEUE_HOST_BUSY; | |
361 | goto out; | |
362 | } | |
363 | ||
364 | cmd->rcb.ioasa = &cmd->sa; | |
365 | ||
bfc0bab1 | 366 | spin_lock_irqsave(&hwq->hsq_slock, lock_flags); |
696d0b0c | 367 | |
bfc0bab1 UK |
368 | *hwq->hsq_curr = cmd->rcb; |
369 | if (hwq->hsq_curr < hwq->hsq_end) | |
370 | hwq->hsq_curr++; | |
696d0b0c | 371 | else |
bfc0bab1 | 372 | hwq->hsq_curr = hwq->hsq_start; |
a002bf83 UK |
373 | |
374 | list_add(&cmd->list, &hwq->pending_cmds); | |
bfc0bab1 | 375 | writeq_be((u64)hwq->hsq_curr, &hwq->host_map->sq_tail); |
696d0b0c | 376 | |
bfc0bab1 | 377 | spin_unlock_irqrestore(&hwq->hsq_slock, lock_flags); |
696d0b0c | 378 | out: |
fb67d44d MO |
379 | dev_dbg(dev, "%s: cmd=%p len=%u ea=%016llx ioasa=%p rc=%d curr=%p " |
380 | "head=%016llx tail=%016llx\n", __func__, cmd, cmd->rcb.data_len, | |
bfc0bab1 UK |
381 | cmd->rcb.data_ea, cmd->rcb.ioasa, rc, hwq->hsq_curr, |
382 | readq_be(&hwq->host_map->sq_head), | |
383 | readq_be(&hwq->host_map->sq_tail)); | |
696d0b0c MO |
384 | return rc; |
385 | } | |
386 | ||
15305514 MO |
387 | /** |
388 | * wait_resp() - polls for a response or timeout to a sent AFU command | |
389 | * @afu: AFU associated with the host. | |
390 | * @cmd: AFU command that was sent. | |
9ba848ac | 391 | * |
a96851d3 | 392 | * Return: 0 on success, -errno on failure |
15305514 | 393 | */ |
9ba848ac | 394 | static int wait_resp(struct afu *afu, struct afu_cmd *cmd) |
15305514 | 395 | { |
fb67d44d MO |
396 | struct cxlflash_cfg *cfg = afu->parent; |
397 | struct device *dev = &cfg->dev->dev; | |
9ba848ac | 398 | int rc = 0; |
15305514 MO |
399 | ulong timeout = msecs_to_jiffies(cmd->rcb.timeout * 2 * 1000); |
400 | ||
401 | timeout = wait_for_completion_timeout(&cmd->cevent, timeout); | |
a96851d3 UK |
402 | if (!timeout) |
403 | rc = -ETIMEDOUT; | |
15305514 | 404 | |
a1ea04b3 UK |
405 | if (cmd->cmd_aborted) |
406 | rc = -EAGAIN; | |
407 | ||
9ba848ac | 408 | if (unlikely(cmd->sa.ioasc != 0)) { |
fb67d44d MO |
409 | dev_err(dev, "%s: cmd %02x failed, ioasc=%08x\n", |
410 | __func__, cmd->rcb.cdb[0], cmd->sa.ioasc); | |
a96851d3 | 411 | rc = -EIO; |
9ba848ac MO |
412 | } |
413 | ||
414 | return rc; | |
15305514 MO |
415 | } |
416 | ||
1dd0c0e4 MO |
417 | /** |
418 | * cmd_to_target_hwq() - selects a target hardware queue for a SCSI command | |
419 | * @host: SCSI host associated with device. | |
420 | * @scp: SCSI command to send. | |
421 | * @afu: SCSI command to send. | |
422 | * | |
423 | * Hashes a command based upon the hardware queue mode. | |
424 | * | |
425 | * Return: Trusted index of target hardware queue | |
426 | */ | |
427 | static u32 cmd_to_target_hwq(struct Scsi_Host *host, struct scsi_cmnd *scp, | |
428 | struct afu *afu) | |
429 | { | |
430 | u32 tag; | |
431 | u32 hwq = 0; | |
432 | ||
433 | if (afu->num_hwqs == 1) | |
434 | return 0; | |
435 | ||
436 | switch (afu->hwq_mode) { | |
437 | case HWQ_MODE_RR: | |
438 | hwq = afu->hwq_rr_count++ % afu->num_hwqs; | |
439 | break; | |
440 | case HWQ_MODE_TAG: | |
d3e16aec | 441 | tag = blk_mq_unique_tag(scsi_cmd_to_rq(scp)); |
1dd0c0e4 MO |
442 | hwq = blk_mq_unique_tag_to_hwq(tag); |
443 | break; | |
444 | case HWQ_MODE_CPU: | |
445 | hwq = smp_processor_id() % afu->num_hwqs; | |
446 | break; | |
447 | default: | |
448 | WARN_ON_ONCE(1); | |
449 | } | |
450 | ||
451 | return hwq; | |
452 | } | |
453 | ||
c21e0bbf MO |
454 | /** |
455 | * send_tmf() - sends a Task Management Function (TMF) | |
32abbeda MO |
456 | * @cfg: Internal structure associated with the host. |
457 | * @sdev: SCSI device destined for TMF. | |
c21e0bbf MO |
458 | * @tmfcmd: TMF command to send. |
459 | * | |
460 | * Return: | |
8ba1ddb3 | 461 | * 0 on success, SCSI_MLQUEUE_HOST_BUSY or -errno on failure |
c21e0bbf | 462 | */ |
32abbeda MO |
463 | static int send_tmf(struct cxlflash_cfg *cfg, struct scsi_device *sdev, |
464 | u64 tmfcmd) | |
c21e0bbf | 465 | { |
32abbeda | 466 | struct afu *afu = cfg->afu; |
8ba1ddb3 | 467 | struct afu_cmd *cmd = NULL; |
4392ba49 | 468 | struct device *dev = &cfg->dev->dev; |
32abbeda | 469 | struct hwq *hwq = get_hwq(afu, PRIMARY_HWQ); |
9a597cd4 | 470 | bool needs_deletion = false; |
8ba1ddb3 | 471 | char *buf = NULL; |
c21e0bbf MO |
472 | ulong lock_flags; |
473 | int rc = 0; | |
018d1dc9 | 474 | ulong to; |
c21e0bbf | 475 | |
8ba1ddb3 MO |
476 | buf = kzalloc(sizeof(*cmd) + __alignof__(*cmd) - 1, GFP_KERNEL); |
477 | if (unlikely(!buf)) { | |
478 | dev_err(dev, "%s: no memory for command\n", __func__); | |
479 | rc = -ENOMEM; | |
480 | goto out; | |
481 | } | |
482 | ||
483 | cmd = (struct afu_cmd *)PTR_ALIGN(buf, __alignof__(*cmd)); | |
484 | INIT_LIST_HEAD(&cmd->queue); | |
485 | ||
018d1dc9 MO |
486 | /* When Task Management Function is active do not send another */ |
487 | spin_lock_irqsave(&cfg->tmf_slock, lock_flags); | |
c21e0bbf | 488 | if (cfg->tmf_active) |
018d1dc9 MO |
489 | wait_event_interruptible_lock_irq(cfg->tmf_waitq, |
490 | !cfg->tmf_active, | |
491 | cfg->tmf_slock); | |
c21e0bbf | 492 | cfg->tmf_active = true; |
018d1dc9 | 493 | spin_unlock_irqrestore(&cfg->tmf_slock, lock_flags); |
c21e0bbf | 494 | |
d4ace351 MO |
495 | cmd->parent = afu; |
496 | cmd->cmd_tmf = true; | |
32abbeda | 497 | cmd->hwq_index = hwq->index; |
d4ace351 | 498 | |
bfc0bab1 | 499 | cmd->rcb.ctx_id = hwq->ctx_hndl; |
5fbb96c8 | 500 | cmd->rcb.msi = SISL_MSI_RRQ_UPDATED; |
32abbeda MO |
501 | cmd->rcb.port_sel = CHAN2PORTMASK(sdev->channel); |
502 | cmd->rcb.lun_id = lun_to_lunid(sdev->lun); | |
c21e0bbf | 503 | cmd->rcb.req_flags = (SISL_REQ_FLAGS_PORT_LUN_ID | |
d4ace351 MO |
504 | SISL_REQ_FLAGS_SUP_UNDERRUN | |
505 | SISL_REQ_FLAGS_TMF_CMD); | |
c21e0bbf MO |
506 | memcpy(cmd->rcb.cdb, &tmfcmd, sizeof(tmfcmd)); |
507 | ||
48b4be36 | 508 | rc = afu->send_cmd(afu, cmd); |
c21e0bbf | 509 | if (unlikely(rc)) { |
018d1dc9 | 510 | spin_lock_irqsave(&cfg->tmf_slock, lock_flags); |
c21e0bbf | 511 | cfg->tmf_active = false; |
018d1dc9 | 512 | spin_unlock_irqrestore(&cfg->tmf_slock, lock_flags); |
c21e0bbf MO |
513 | goto out; |
514 | } | |
515 | ||
018d1dc9 MO |
516 | spin_lock_irqsave(&cfg->tmf_slock, lock_flags); |
517 | to = msecs_to_jiffies(5000); | |
518 | to = wait_event_interruptible_lock_irq_timeout(cfg->tmf_waitq, | |
519 | !cfg->tmf_active, | |
520 | cfg->tmf_slock, | |
521 | to); | |
522 | if (!to) { | |
fb67d44d | 523 | dev_err(dev, "%s: TMF timed out\n", __func__); |
8ba1ddb3 | 524 | rc = -ETIMEDOUT; |
9a597cd4 | 525 | needs_deletion = true; |
8ba1ddb3 MO |
526 | } else if (cmd->cmd_aborted) { |
527 | dev_err(dev, "%s: TMF aborted\n", __func__); | |
528 | rc = -EAGAIN; | |
529 | } else if (cmd->sa.ioasc) { | |
530 | dev_err(dev, "%s: TMF failed ioasc=%08x\n", | |
531 | __func__, cmd->sa.ioasc); | |
532 | rc = -EIO; | |
018d1dc9 | 533 | } |
8ba1ddb3 | 534 | cfg->tmf_active = false; |
018d1dc9 | 535 | spin_unlock_irqrestore(&cfg->tmf_slock, lock_flags); |
9a597cd4 UK |
536 | |
537 | if (needs_deletion) { | |
538 | spin_lock_irqsave(&hwq->hsq_slock, lock_flags); | |
539 | list_del(&cmd->list); | |
540 | spin_unlock_irqrestore(&hwq->hsq_slock, lock_flags); | |
541 | } | |
c21e0bbf | 542 | out: |
8ba1ddb3 | 543 | kfree(buf); |
c21e0bbf MO |
544 | return rc; |
545 | } | |
546 | ||
547 | /** | |
548 | * cxlflash_driver_info() - information handler for this host driver | |
549 | * @host: SCSI host associated with device. | |
550 | * | |
551 | * Return: A string describing the device. | |
552 | */ | |
553 | static const char *cxlflash_driver_info(struct Scsi_Host *host) | |
554 | { | |
555 | return CXLFLASH_ADAPTER_NAME; | |
556 | } | |
557 | ||
558 | /** | |
559 | * cxlflash_queuecommand() - sends a mid-layer request | |
560 | * @host: SCSI host associated with device. | |
561 | * @scp: SCSI command to send. | |
562 | * | |
1284fb0c | 563 | * Return: 0 on success, SCSI_MLQUEUE_HOST_BUSY on failure |
c21e0bbf MO |
564 | */ |
565 | static int cxlflash_queuecommand(struct Scsi_Host *host, struct scsi_cmnd *scp) | |
566 | { | |
fb67d44d | 567 | struct cxlflash_cfg *cfg = shost_priv(host); |
c21e0bbf | 568 | struct afu *afu = cfg->afu; |
4392ba49 | 569 | struct device *dev = &cfg->dev->dev; |
479ad8e9 | 570 | struct afu_cmd *cmd = sc_to_afuci(scp); |
9d89326c | 571 | struct scatterlist *sg = scsi_sglist(scp); |
1dd0c0e4 MO |
572 | int hwq_index = cmd_to_target_hwq(host, scp, afu); |
573 | struct hwq *hwq = get_hwq(afu, hwq_index); | |
9d89326c | 574 | u16 req_flags = SISL_REQ_FLAGS_SUP_UNDERRUN; |
c21e0bbf | 575 | ulong lock_flags; |
c21e0bbf MO |
576 | int rc = 0; |
577 | ||
4392ba49 | 578 | dev_dbg_ratelimited(dev, "%s: (scp=%p) %d/%d/%d/%llu " |
fb67d44d | 579 | "cdb=(%08x-%08x-%08x-%08x)\n", |
4392ba49 MO |
580 | __func__, scp, host->host_no, scp->device->channel, |
581 | scp->device->id, scp->device->lun, | |
582 | get_unaligned_be32(&((u32 *)scp->cmnd)[0]), | |
583 | get_unaligned_be32(&((u32 *)scp->cmnd)[1]), | |
584 | get_unaligned_be32(&((u32 *)scp->cmnd)[2]), | |
585 | get_unaligned_be32(&((u32 *)scp->cmnd)[3])); | |
c21e0bbf | 586 | |
018d1dc9 MO |
587 | /* |
588 | * If a Task Management Function is active, wait for it to complete | |
c21e0bbf MO |
589 | * before continuing with regular commands. |
590 | */ | |
018d1dc9 | 591 | spin_lock_irqsave(&cfg->tmf_slock, lock_flags); |
c21e0bbf | 592 | if (cfg->tmf_active) { |
018d1dc9 | 593 | spin_unlock_irqrestore(&cfg->tmf_slock, lock_flags); |
c21e0bbf MO |
594 | rc = SCSI_MLQUEUE_HOST_BUSY; |
595 | goto out; | |
596 | } | |
018d1dc9 | 597 | spin_unlock_irqrestore(&cfg->tmf_slock, lock_flags); |
c21e0bbf | 598 | |
5cdac81a | 599 | switch (cfg->state) { |
323e3342 MO |
600 | case STATE_PROBING: |
601 | case STATE_PROBED: | |
439e85c1 | 602 | case STATE_RESET: |
fb67d44d | 603 | dev_dbg_ratelimited(dev, "%s: device is in reset\n", __func__); |
5cdac81a MO |
604 | rc = SCSI_MLQUEUE_HOST_BUSY; |
605 | goto out; | |
606 | case STATE_FAILTERM: | |
fb67d44d | 607 | dev_dbg_ratelimited(dev, "%s: device has failed\n", __func__); |
5cdac81a | 608 | scp->result = (DID_NO_CONNECT << 16); |
e82d6b17 | 609 | scsi_done(scp); |
5cdac81a MO |
610 | rc = 0; |
611 | goto out; | |
612 | default: | |
e0f76ad1 | 613 | atomic_inc(&afu->cmds_active); |
5cdac81a MO |
614 | break; |
615 | } | |
616 | ||
9d89326c | 617 | if (likely(sg)) { |
50b787f7 MO |
618 | cmd->rcb.data_len = sg->length; |
619 | cmd->rcb.data_ea = (uintptr_t)sg_virt(sg); | |
9d89326c | 620 | } |
c21e0bbf | 621 | |
fe7f9698 | 622 | cmd->scp = scp; |
5fbb96c8 | 623 | cmd->parent = afu; |
1dd0c0e4 | 624 | cmd->hwq_index = hwq_index; |
c21e0bbf | 625 | |
96cf727f | 626 | cmd->sa.ioasc = 0; |
bfc0bab1 | 627 | cmd->rcb.ctx_id = hwq->ctx_hndl; |
9d89326c | 628 | cmd->rcb.msi = SISL_MSI_RRQ_UPDATED; |
8fa4f177 | 629 | cmd->rcb.port_sel = CHAN2PORTMASK(scp->device->channel); |
9d89326c | 630 | cmd->rcb.lun_id = lun_to_lunid(scp->device->lun); |
c21e0bbf | 631 | |
9d89326c MO |
632 | if (scp->sc_data_direction == DMA_TO_DEVICE) |
633 | req_flags |= SISL_REQ_FLAGS_HOST_WRITE; | |
c21e0bbf | 634 | |
9d89326c | 635 | cmd->rcb.req_flags = req_flags; |
c21e0bbf MO |
636 | memcpy(cmd->rcb.cdb, scp->cmnd, sizeof(cmd->rcb.cdb)); |
637 | ||
48b4be36 | 638 | rc = afu->send_cmd(afu, cmd); |
e0f76ad1 | 639 | atomic_dec(&afu->cmds_active); |
c21e0bbf MO |
640 | out: |
641 | return rc; | |
642 | } | |
643 | ||
644 | /** | |
15305514 | 645 | * cxlflash_wait_for_pci_err_recovery() - wait for error recovery during probe |
1284fb0c | 646 | * @cfg: Internal structure associated with the host. |
c21e0bbf | 647 | */ |
15305514 | 648 | static void cxlflash_wait_for_pci_err_recovery(struct cxlflash_cfg *cfg) |
c21e0bbf | 649 | { |
15305514 | 650 | struct pci_dev *pdev = cfg->dev; |
c21e0bbf | 651 | |
15305514 MO |
652 | if (pci_channel_offline(pdev)) |
653 | wait_event_timeout(cfg->reset_waitq, | |
654 | !pci_channel_offline(pdev), | |
655 | CXLFLASH_PCI_ERROR_RECOVERY_TIMEOUT); | |
c21e0bbf MO |
656 | } |
657 | ||
658 | /** | |
15305514 | 659 | * free_mem() - free memory associated with the AFU |
1284fb0c | 660 | * @cfg: Internal structure associated with the host. |
c21e0bbf | 661 | */ |
15305514 | 662 | static void free_mem(struct cxlflash_cfg *cfg) |
c21e0bbf | 663 | { |
15305514 | 664 | struct afu *afu = cfg->afu; |
c21e0bbf | 665 | |
15305514 | 666 | if (cfg->afu) { |
15305514 MO |
667 | free_pages((ulong)afu, get_order(sizeof(struct afu))); |
668 | cfg->afu = NULL; | |
5cdac81a | 669 | } |
c21e0bbf MO |
670 | } |
671 | ||
0b09e711 UK |
672 | /** |
673 | * cxlflash_reset_sync() - synchronizing point for asynchronous resets | |
674 | * @cfg: Internal structure associated with the host. | |
675 | */ | |
676 | static void cxlflash_reset_sync(struct cxlflash_cfg *cfg) | |
677 | { | |
678 | if (cfg->async_reset_cookie == 0) | |
679 | return; | |
680 | ||
681 | /* Wait until all async calls prior to this cookie have completed */ | |
682 | async_synchronize_cookie(cfg->async_reset_cookie + 1); | |
683 | cfg->async_reset_cookie = 0; | |
684 | } | |
685 | ||
c21e0bbf | 686 | /** |
15305514 | 687 | * stop_afu() - stops the AFU command timers and unmaps the MMIO space |
1284fb0c | 688 | * @cfg: Internal structure associated with the host. |
c21e0bbf | 689 | * |
15305514 | 690 | * Safe to call with AFU in a partially allocated/initialized state. |
ee91e332 | 691 | * |
0df5bef7 | 692 | * Cancels scheduled worker threads, waits for any active internal AFU |
cba06e6d | 693 | * commands to timeout, disables IRQ polling and then unmaps the MMIO space. |
c21e0bbf | 694 | */ |
15305514 | 695 | static void stop_afu(struct cxlflash_cfg *cfg) |
c21e0bbf | 696 | { |
15305514 | 697 | struct afu *afu = cfg->afu; |
bfc0bab1 UK |
698 | struct hwq *hwq; |
699 | int i; | |
c21e0bbf | 700 | |
0df5bef7 | 701 | cancel_work_sync(&cfg->work_q); |
0b09e711 UK |
702 | if (!current_is_async()) |
703 | cxlflash_reset_sync(cfg); | |
0df5bef7 | 704 | |
15305514 | 705 | if (likely(afu)) { |
de01283b MO |
706 | while (atomic_read(&afu->cmds_active)) |
707 | ssleep(1); | |
bfc0bab1 UK |
708 | |
709 | if (afu_is_irqpoll_enabled(afu)) { | |
3065267a | 710 | for (i = 0; i < afu->num_hwqs; i++) { |
bfc0bab1 UK |
711 | hwq = get_hwq(afu, i); |
712 | ||
713 | irq_poll_disable(&hwq->irqpoll); | |
714 | } | |
715 | } | |
716 | ||
c21e0bbf | 717 | if (likely(afu->afu_map)) { |
25b8e08e | 718 | cfg->ops->psa_unmap(afu->afu_map); |
c21e0bbf MO |
719 | afu->afu_map = NULL; |
720 | } | |
721 | } | |
722 | } | |
723 | ||
724 | /** | |
9526f360 | 725 | * term_intr() - disables all AFU interrupts |
1284fb0c | 726 | * @cfg: Internal structure associated with the host. |
c21e0bbf | 727 | * @level: Depth of allocation, where to begin waterfall tear down. |
bfc0bab1 | 728 | * @index: Index of the hardware queue. |
c21e0bbf MO |
729 | * |
730 | * Safe to call with AFU/MC in partially allocated/initialized state. | |
731 | */ | |
bfc0bab1 UK |
732 | static void term_intr(struct cxlflash_cfg *cfg, enum undo_level level, |
733 | u32 index) | |
c21e0bbf | 734 | { |
c21e0bbf | 735 | struct afu *afu = cfg->afu; |
4392ba49 | 736 | struct device *dev = &cfg->dev->dev; |
bfc0bab1 | 737 | struct hwq *hwq; |
c21e0bbf | 738 | |
bfc0bab1 UK |
739 | if (!afu) { |
740 | dev_err(dev, "%s: returning with NULL afu\n", __func__); | |
741 | return; | |
742 | } | |
743 | ||
744 | hwq = get_hwq(afu, index); | |
745 | ||
b070545d | 746 | if (!hwq->ctx_cookie) { |
bfc0bab1 | 747 | dev_err(dev, "%s: returning with NULL MC\n", __func__); |
c21e0bbf MO |
748 | return; |
749 | } | |
750 | ||
751 | switch (level) { | |
c21e0bbf | 752 | case UNMAP_THREE: |
bfc0bab1 UK |
753 | /* SISL_MSI_ASYNC_ERROR is setup only for the primary HWQ */ |
754 | if (index == PRIMARY_HWQ) | |
25b8e08e | 755 | cfg->ops->unmap_afu_irq(hwq->ctx_cookie, 3, hwq); |
df561f66 | 756 | fallthrough; |
c21e0bbf | 757 | case UNMAP_TWO: |
25b8e08e | 758 | cfg->ops->unmap_afu_irq(hwq->ctx_cookie, 2, hwq); |
df561f66 | 759 | fallthrough; |
c21e0bbf | 760 | case UNMAP_ONE: |
25b8e08e | 761 | cfg->ops->unmap_afu_irq(hwq->ctx_cookie, 1, hwq); |
df561f66 | 762 | fallthrough; |
c21e0bbf | 763 | case FREE_IRQ: |
25b8e08e | 764 | cfg->ops->free_afu_irqs(hwq->ctx_cookie); |
df561f66 | 765 | fallthrough; |
9526f360 MK |
766 | case UNDO_NOOP: |
767 | /* No action required */ | |
768 | break; | |
769 | } | |
770 | } | |
771 | ||
772 | /** | |
773 | * term_mc() - terminates the master context | |
774 | * @cfg: Internal structure associated with the host. | |
bfc0bab1 | 775 | * @index: Index of the hardware queue. |
9526f360 MK |
776 | * |
777 | * Safe to call with AFU/MC in partially allocated/initialized state. | |
778 | */ | |
bfc0bab1 | 779 | static void term_mc(struct cxlflash_cfg *cfg, u32 index) |
9526f360 | 780 | { |
9526f360 MK |
781 | struct afu *afu = cfg->afu; |
782 | struct device *dev = &cfg->dev->dev; | |
bfc0bab1 | 783 | struct hwq *hwq; |
a1ea04b3 | 784 | ulong lock_flags; |
9526f360 | 785 | |
bfc0bab1 UK |
786 | if (!afu) { |
787 | dev_err(dev, "%s: returning with NULL afu\n", __func__); | |
9526f360 | 788 | return; |
c21e0bbf | 789 | } |
9526f360 | 790 | |
bfc0bab1 UK |
791 | hwq = get_hwq(afu, index); |
792 | ||
b070545d | 793 | if (!hwq->ctx_cookie) { |
bfc0bab1 UK |
794 | dev_err(dev, "%s: returning with NULL MC\n", __func__); |
795 | return; | |
796 | } | |
797 | ||
25b8e08e | 798 | WARN_ON(cfg->ops->stop_context(hwq->ctx_cookie)); |
bfc0bab1 | 799 | if (index != PRIMARY_HWQ) |
25b8e08e | 800 | WARN_ON(cfg->ops->release_context(hwq->ctx_cookie)); |
b070545d | 801 | hwq->ctx_cookie = NULL; |
a1ea04b3 | 802 | |
d2d354a6 UK |
803 | spin_lock_irqsave(&hwq->hrrq_slock, lock_flags); |
804 | hwq->hrrq_online = false; | |
805 | spin_unlock_irqrestore(&hwq->hrrq_slock, lock_flags); | |
806 | ||
a1ea04b3 UK |
807 | spin_lock_irqsave(&hwq->hsq_slock, lock_flags); |
808 | flush_pending_cmds(hwq); | |
809 | spin_unlock_irqrestore(&hwq->hsq_slock, lock_flags); | |
c21e0bbf MO |
810 | } |
811 | ||
812 | /** | |
813 | * term_afu() - terminates the AFU | |
1284fb0c | 814 | * @cfg: Internal structure associated with the host. |
c21e0bbf MO |
815 | * |
816 | * Safe to call with AFU/MC in partially allocated/initialized state. | |
817 | */ | |
818 | static void term_afu(struct cxlflash_cfg *cfg) | |
819 | { | |
fb67d44d | 820 | struct device *dev = &cfg->dev->dev; |
bfc0bab1 | 821 | int k; |
fb67d44d | 822 | |
9526f360 MK |
823 | /* |
824 | * Tear down is carefully orchestrated to ensure | |
825 | * no interrupts can come in when the problem state | |
826 | * area is unmapped. | |
827 | * | |
bfc0bab1 | 828 | * 1) Disable all AFU interrupts for each master |
9526f360 | 829 | * 2) Unmap the problem state area |
bfc0bab1 | 830 | * 3) Stop each master context |
9526f360 | 831 | */ |
3065267a | 832 | for (k = cfg->afu->num_hwqs - 1; k >= 0; k--) |
bfc0bab1 UK |
833 | term_intr(cfg, UNMAP_THREE, k); |
834 | ||
48a17ad5 | 835 | stop_afu(cfg); |
c21e0bbf | 836 | |
3065267a | 837 | for (k = cfg->afu->num_hwqs - 1; k >= 0; k--) |
bfc0bab1 | 838 | term_mc(cfg, k); |
6ded8b3c | 839 | |
fb67d44d | 840 | dev_dbg(dev, "%s: returning\n", __func__); |
c21e0bbf MO |
841 | } |
842 | ||
704c4b0d UK |
843 | /** |
844 | * notify_shutdown() - notifies device of pending shutdown | |
845 | * @cfg: Internal structure associated with the host. | |
846 | * @wait: Whether to wait for shutdown processing to complete. | |
847 | * | |
848 | * This function will notify the AFU that the adapter is being shutdown | |
849 | * and will wait for shutdown processing to complete if wait is true. | |
850 | * This notification should flush pending I/Os to the device and halt | |
851 | * further I/Os until the next AFU reset is issued and device restarted. | |
852 | */ | |
853 | static void notify_shutdown(struct cxlflash_cfg *cfg, bool wait) | |
854 | { | |
855 | struct afu *afu = cfg->afu; | |
856 | struct device *dev = &cfg->dev->dev; | |
704c4b0d | 857 | struct dev_dependent_vals *ddv; |
0aa14887 | 858 | __be64 __iomem *fc_port_regs; |
704c4b0d UK |
859 | u64 reg, status; |
860 | int i, retry_cnt = 0; | |
861 | ||
862 | ddv = (struct dev_dependent_vals *)cfg->dev_id->driver_data; | |
863 | if (!(ddv->flags & CXLFLASH_NOTIFY_SHUTDOWN)) | |
864 | return; | |
865 | ||
1bd2b282 | 866 | if (!afu || !afu->afu_map) { |
fb67d44d | 867 | dev_dbg(dev, "%s: Problem state area not mapped\n", __func__); |
1bd2b282 UK |
868 | return; |
869 | } | |
870 | ||
704c4b0d | 871 | /* Notify AFU */ |
78ae028e | 872 | for (i = 0; i < cfg->num_fc_ports; i++) { |
0aa14887 MO |
873 | fc_port_regs = get_fc_port_regs(cfg, i); |
874 | ||
875 | reg = readq_be(&fc_port_regs[FC_CONFIG2 / 8]); | |
704c4b0d | 876 | reg |= SISL_FC_SHUTDOWN_NORMAL; |
0aa14887 | 877 | writeq_be(reg, &fc_port_regs[FC_CONFIG2 / 8]); |
704c4b0d UK |
878 | } |
879 | ||
880 | if (!wait) | |
881 | return; | |
882 | ||
883 | /* Wait up to 1.5 seconds for shutdown processing to complete */ | |
78ae028e | 884 | for (i = 0; i < cfg->num_fc_ports; i++) { |
0aa14887 | 885 | fc_port_regs = get_fc_port_regs(cfg, i); |
704c4b0d | 886 | retry_cnt = 0; |
0aa14887 | 887 | |
704c4b0d | 888 | while (true) { |
0aa14887 | 889 | status = readq_be(&fc_port_regs[FC_STATUS / 8]); |
704c4b0d UK |
890 | if (status & SISL_STATUS_SHUTDOWN_COMPLETE) |
891 | break; | |
892 | if (++retry_cnt >= MC_RETRY_CNT) { | |
893 | dev_dbg(dev, "%s: port %d shutdown processing " | |
894 | "not yet completed\n", __func__, i); | |
895 | break; | |
896 | } | |
897 | msleep(100 * retry_cnt); | |
898 | } | |
899 | } | |
900 | } | |
901 | ||
a834a36b UK |
902 | /** |
903 | * cxlflash_get_minor() - gets the first available minor number | |
904 | * | |
905 | * Return: Unique minor number that can be used to create the character device. | |
906 | */ | |
907 | static int cxlflash_get_minor(void) | |
908 | { | |
909 | int minor; | |
910 | long bit; | |
911 | ||
912 | bit = find_first_zero_bit(cxlflash_minor, CXLFLASH_MAX_ADAPTERS); | |
913 | if (bit >= CXLFLASH_MAX_ADAPTERS) | |
914 | return -1; | |
915 | ||
916 | minor = bit & MINORMASK; | |
917 | set_bit(minor, cxlflash_minor); | |
918 | return minor; | |
919 | } | |
920 | ||
921 | /** | |
922 | * cxlflash_put_minor() - releases the minor number | |
923 | * @minor: Minor number that is no longer needed. | |
924 | */ | |
925 | static void cxlflash_put_minor(int minor) | |
926 | { | |
927 | clear_bit(minor, cxlflash_minor); | |
928 | } | |
929 | ||
930 | /** | |
931 | * cxlflash_release_chrdev() - release the character device for the host | |
932 | * @cfg: Internal structure associated with the host. | |
933 | */ | |
934 | static void cxlflash_release_chrdev(struct cxlflash_cfg *cfg) | |
935 | { | |
a834a36b UK |
936 | device_unregister(cfg->chardev); |
937 | cfg->chardev = NULL; | |
938 | cdev_del(&cfg->cdev); | |
939 | cxlflash_put_minor(MINOR(cfg->cdev.dev)); | |
940 | } | |
941 | ||
c21e0bbf MO |
942 | /** |
943 | * cxlflash_remove() - PCI entry point to tear down host | |
944 | * @pdev: PCI device associated with the host. | |
945 | * | |
323e3342 MO |
946 | * Safe to use as a cleanup in partially allocated/initialized state. Note that |
947 | * the reset_waitq is flushed as part of the stop/termination of user contexts. | |
c21e0bbf MO |
948 | */ |
949 | static void cxlflash_remove(struct pci_dev *pdev) | |
950 | { | |
951 | struct cxlflash_cfg *cfg = pci_get_drvdata(pdev); | |
fb67d44d | 952 | struct device *dev = &pdev->dev; |
c21e0bbf MO |
953 | ulong lock_flags; |
954 | ||
babf985d | 955 | if (!pci_is_enabled(pdev)) { |
fb67d44d | 956 | dev_dbg(dev, "%s: Device is disabled\n", __func__); |
babf985d UK |
957 | return; |
958 | } | |
959 | ||
a3feb6ef UK |
960 | /* Yield to running recovery threads before continuing with remove */ |
961 | wait_event(cfg->reset_waitq, cfg->state != STATE_RESET && | |
962 | cfg->state != STATE_PROBING); | |
018d1dc9 | 963 | spin_lock_irqsave(&cfg->tmf_slock, lock_flags); |
c21e0bbf | 964 | if (cfg->tmf_active) |
018d1dc9 MO |
965 | wait_event_interruptible_lock_irq(cfg->tmf_waitq, |
966 | !cfg->tmf_active, | |
967 | cfg->tmf_slock); | |
968 | spin_unlock_irqrestore(&cfg->tmf_slock, lock_flags); | |
c21e0bbf | 969 | |
704c4b0d UK |
970 | /* Notify AFU and wait for shutdown processing to complete */ |
971 | notify_shutdown(cfg, true); | |
972 | ||
5cdac81a | 973 | cfg->state = STATE_FAILTERM; |
65be2c79 | 974 | cxlflash_stop_term_user_contexts(cfg); |
5cdac81a | 975 | |
c21e0bbf | 976 | switch (cfg->init_state) { |
a834a36b UK |
977 | case INIT_STATE_CDEV: |
978 | cxlflash_release_chrdev(cfg); | |
df561f66 | 979 | fallthrough; |
c21e0bbf | 980 | case INIT_STATE_SCSI: |
65be2c79 | 981 | cxlflash_term_local_luns(cfg); |
c21e0bbf | 982 | scsi_remove_host(cfg->host); |
df561f66 | 983 | fallthrough; |
c21e0bbf | 984 | case INIT_STATE_AFU: |
b45cdbaf | 985 | term_afu(cfg); |
df561f66 | 986 | fallthrough; |
c21e0bbf | 987 | case INIT_STATE_PCI: |
48e077db | 988 | cfg->ops->destroy_afu(cfg->afu_cookie); |
c21e0bbf | 989 | pci_disable_device(pdev); |
df561f66 | 990 | fallthrough; |
c21e0bbf | 991 | case INIT_STATE_NONE: |
c21e0bbf | 992 | free_mem(cfg); |
8b5b1e87 | 993 | scsi_host_put(cfg->host); |
c21e0bbf MO |
994 | break; |
995 | } | |
996 | ||
fb67d44d | 997 | dev_dbg(dev, "%s: returning\n", __func__); |
c21e0bbf MO |
998 | } |
999 | ||
1000 | /** | |
1001 | * alloc_mem() - allocates the AFU and its command pool | |
1284fb0c | 1002 | * @cfg: Internal structure associated with the host. |
c21e0bbf MO |
1003 | * |
1004 | * A partially allocated state remains on failure. | |
1005 | * | |
1006 | * Return: | |
1007 | * 0 on success | |
1008 | * -ENOMEM on failure to allocate memory | |
1009 | */ | |
1010 | static int alloc_mem(struct cxlflash_cfg *cfg) | |
1011 | { | |
1012 | int rc = 0; | |
4392ba49 | 1013 | struct device *dev = &cfg->dev->dev; |
c21e0bbf | 1014 | |
696d0b0c | 1015 | /* AFU is ~28k, i.e. only one 64k page or up to seven 4k pages */ |
c21e0bbf MO |
1016 | cfg->afu = (void *)__get_free_pages(GFP_KERNEL | __GFP_ZERO, |
1017 | get_order(sizeof(struct afu))); | |
1018 | if (unlikely(!cfg->afu)) { | |
4392ba49 MO |
1019 | dev_err(dev, "%s: cannot get %d free pages\n", |
1020 | __func__, get_order(sizeof(struct afu))); | |
c21e0bbf MO |
1021 | rc = -ENOMEM; |
1022 | goto out; | |
1023 | } | |
1024 | cfg->afu->parent = cfg; | |
3065267a | 1025 | cfg->afu->desired_hwqs = CXLFLASH_DEF_HWQS; |
c21e0bbf | 1026 | cfg->afu->afu_map = NULL; |
c21e0bbf MO |
1027 | out: |
1028 | return rc; | |
1029 | } | |
1030 | ||
1031 | /** | |
1032 | * init_pci() - initializes the host as a PCI device | |
1284fb0c | 1033 | * @cfg: Internal structure associated with the host. |
c21e0bbf | 1034 | * |
1284fb0c | 1035 | * Return: 0 on success, -errno on failure |
c21e0bbf MO |
1036 | */ |
1037 | static int init_pci(struct cxlflash_cfg *cfg) | |
1038 | { | |
1039 | struct pci_dev *pdev = cfg->dev; | |
fb67d44d | 1040 | struct device *dev = &cfg->dev->dev; |
c21e0bbf MO |
1041 | int rc = 0; |
1042 | ||
c21e0bbf MO |
1043 | rc = pci_enable_device(pdev); |
1044 | if (rc || pci_channel_offline(pdev)) { | |
1045 | if (pci_channel_offline(pdev)) { | |
1046 | cxlflash_wait_for_pci_err_recovery(cfg); | |
1047 | rc = pci_enable_device(pdev); | |
1048 | } | |
1049 | ||
1050 | if (rc) { | |
fb67d44d | 1051 | dev_err(dev, "%s: Cannot enable adapter\n", __func__); |
c21e0bbf | 1052 | cxlflash_wait_for_pci_err_recovery(cfg); |
961487e4 | 1053 | goto out; |
c21e0bbf MO |
1054 | } |
1055 | } | |
1056 | ||
c21e0bbf | 1057 | out: |
fb67d44d | 1058 | dev_dbg(dev, "%s: returning rc=%d\n", __func__, rc); |
c21e0bbf | 1059 | return rc; |
c21e0bbf MO |
1060 | } |
1061 | ||
1062 | /** | |
1063 | * init_scsi() - adds the host to the SCSI stack and kicks off host scan | |
1284fb0c | 1064 | * @cfg: Internal structure associated with the host. |
c21e0bbf | 1065 | * |
1284fb0c | 1066 | * Return: 0 on success, -errno on failure |
c21e0bbf MO |
1067 | */ |
1068 | static int init_scsi(struct cxlflash_cfg *cfg) | |
1069 | { | |
1070 | struct pci_dev *pdev = cfg->dev; | |
fb67d44d | 1071 | struct device *dev = &cfg->dev->dev; |
c21e0bbf MO |
1072 | int rc = 0; |
1073 | ||
1074 | rc = scsi_add_host(cfg->host, &pdev->dev); | |
1075 | if (rc) { | |
fb67d44d | 1076 | dev_err(dev, "%s: scsi_add_host failed rc=%d\n", __func__, rc); |
c21e0bbf MO |
1077 | goto out; |
1078 | } | |
1079 | ||
1080 | scsi_scan_host(cfg->host); | |
1081 | ||
1082 | out: | |
fb67d44d | 1083 | dev_dbg(dev, "%s: returning rc=%d\n", __func__, rc); |
c21e0bbf MO |
1084 | return rc; |
1085 | } | |
1086 | ||
1087 | /** | |
1088 | * set_port_online() - transitions the specified host FC port to online state | |
1089 | * @fc_regs: Top of MMIO region defined for specified port. | |
1090 | * | |
1091 | * The provided MMIO region must be mapped prior to call. Online state means | |
1092 | * that the FC link layer has synced, completed the handshaking process, and | |
1093 | * is ready for login to start. | |
1094 | */ | |
1786f4a0 | 1095 | static void set_port_online(__be64 __iomem *fc_regs) |
c21e0bbf MO |
1096 | { |
1097 | u64 cmdcfg; | |
1098 | ||
1099 | cmdcfg = readq_be(&fc_regs[FC_MTIP_CMDCONFIG / 8]); | |
1100 | cmdcfg &= (~FC_MTIP_CMDCONFIG_OFFLINE); /* clear OFF_LINE */ | |
1101 | cmdcfg |= (FC_MTIP_CMDCONFIG_ONLINE); /* set ON_LINE */ | |
1102 | writeq_be(cmdcfg, &fc_regs[FC_MTIP_CMDCONFIG / 8]); | |
1103 | } | |
1104 | ||
1105 | /** | |
1106 | * set_port_offline() - transitions the specified host FC port to offline state | |
1107 | * @fc_regs: Top of MMIO region defined for specified port. | |
1108 | * | |
1109 | * The provided MMIO region must be mapped prior to call. | |
1110 | */ | |
1786f4a0 | 1111 | static void set_port_offline(__be64 __iomem *fc_regs) |
c21e0bbf MO |
1112 | { |
1113 | u64 cmdcfg; | |
1114 | ||
1115 | cmdcfg = readq_be(&fc_regs[FC_MTIP_CMDCONFIG / 8]); | |
1116 | cmdcfg &= (~FC_MTIP_CMDCONFIG_ONLINE); /* clear ON_LINE */ | |
1117 | cmdcfg |= (FC_MTIP_CMDCONFIG_OFFLINE); /* set OFF_LINE */ | |
1118 | writeq_be(cmdcfg, &fc_regs[FC_MTIP_CMDCONFIG / 8]); | |
1119 | } | |
1120 | ||
1121 | /** | |
1122 | * wait_port_online() - waits for the specified host FC port come online | |
1123 | * @fc_regs: Top of MMIO region defined for specified port. | |
1124 | * @delay_us: Number of microseconds to delay between reading port status. | |
1125 | * @nretry: Number of cycles to retry reading port status. | |
1126 | * | |
1127 | * The provided MMIO region must be mapped prior to call. This will timeout | |
1128 | * when the cable is not plugged in. | |
1129 | * | |
1130 | * Return: | |
1131 | * TRUE (1) when the specified port is online | |
1132 | * FALSE (0) when the specified port fails to come online after timeout | |
c21e0bbf | 1133 | */ |
fb67d44d | 1134 | static bool wait_port_online(__be64 __iomem *fc_regs, u32 delay_us, u32 nretry) |
c21e0bbf MO |
1135 | { |
1136 | u64 status; | |
1137 | ||
fb67d44d | 1138 | WARN_ON(delay_us < 1000); |
c21e0bbf MO |
1139 | |
1140 | do { | |
1141 | msleep(delay_us / 1000); | |
1142 | status = readq_be(&fc_regs[FC_MTIP_STATUS / 8]); | |
05dab432 MO |
1143 | if (status == U64_MAX) |
1144 | nretry /= 2; | |
c21e0bbf MO |
1145 | } while ((status & FC_MTIP_STATUS_MASK) != FC_MTIP_STATUS_ONLINE && |
1146 | nretry--); | |
1147 | ||
1148 | return ((status & FC_MTIP_STATUS_MASK) == FC_MTIP_STATUS_ONLINE); | |
1149 | } | |
1150 | ||
1151 | /** | |
1152 | * wait_port_offline() - waits for the specified host FC port go offline | |
1153 | * @fc_regs: Top of MMIO region defined for specified port. | |
1154 | * @delay_us: Number of microseconds to delay between reading port status. | |
1155 | * @nretry: Number of cycles to retry reading port status. | |
1156 | * | |
1157 | * The provided MMIO region must be mapped prior to call. | |
1158 | * | |
1159 | * Return: | |
1160 | * TRUE (1) when the specified port is offline | |
1161 | * FALSE (0) when the specified port fails to go offline after timeout | |
c21e0bbf | 1162 | */ |
fb67d44d | 1163 | static bool wait_port_offline(__be64 __iomem *fc_regs, u32 delay_us, u32 nretry) |
c21e0bbf MO |
1164 | { |
1165 | u64 status; | |
1166 | ||
fb67d44d | 1167 | WARN_ON(delay_us < 1000); |
c21e0bbf MO |
1168 | |
1169 | do { | |
1170 | msleep(delay_us / 1000); | |
1171 | status = readq_be(&fc_regs[FC_MTIP_STATUS / 8]); | |
05dab432 MO |
1172 | if (status == U64_MAX) |
1173 | nretry /= 2; | |
c21e0bbf MO |
1174 | } while ((status & FC_MTIP_STATUS_MASK) != FC_MTIP_STATUS_OFFLINE && |
1175 | nretry--); | |
1176 | ||
1177 | return ((status & FC_MTIP_STATUS_MASK) == FC_MTIP_STATUS_OFFLINE); | |
1178 | } | |
1179 | ||
1180 | /** | |
1181 | * afu_set_wwpn() - configures the WWPN for the specified host FC port | |
1182 | * @afu: AFU associated with the host that owns the specified FC port. | |
1183 | * @port: Port number being configured. | |
1184 | * @fc_regs: Top of MMIO region defined for specified port. | |
1185 | * @wwpn: The world-wide-port-number previously discovered for port. | |
1186 | * | |
1187 | * The provided MMIO region must be mapped prior to call. As part of the | |
1188 | * sequence to configure the WWPN, the port is toggled offline and then back | |
1189 | * online. This toggling action can cause this routine to delay up to a few | |
1190 | * seconds. When configured to use the internal LUN feature of the AFU, a | |
1191 | * failure to come online is overridden. | |
c21e0bbf | 1192 | */ |
f8013261 MO |
1193 | static void afu_set_wwpn(struct afu *afu, int port, __be64 __iomem *fc_regs, |
1194 | u64 wwpn) | |
c21e0bbf | 1195 | { |
fb67d44d MO |
1196 | struct cxlflash_cfg *cfg = afu->parent; |
1197 | struct device *dev = &cfg->dev->dev; | |
1198 | ||
c21e0bbf | 1199 | set_port_offline(fc_regs); |
c21e0bbf MO |
1200 | if (!wait_port_offline(fc_regs, FC_PORT_STATUS_RETRY_INTERVAL_US, |
1201 | FC_PORT_STATUS_RETRY_CNT)) { | |
fb67d44d MO |
1202 | dev_dbg(dev, "%s: wait on port %d to go offline timed out\n", |
1203 | __func__, port); | |
c21e0bbf MO |
1204 | } |
1205 | ||
f8013261 | 1206 | writeq_be(wwpn, &fc_regs[FC_PNAME / 8]); |
964497b3 | 1207 | |
c21e0bbf | 1208 | set_port_online(fc_regs); |
c21e0bbf MO |
1209 | if (!wait_port_online(fc_regs, FC_PORT_STATUS_RETRY_INTERVAL_US, |
1210 | FC_PORT_STATUS_RETRY_CNT)) { | |
fb67d44d MO |
1211 | dev_dbg(dev, "%s: wait on port %d to go online timed out\n", |
1212 | __func__, port); | |
c21e0bbf | 1213 | } |
c21e0bbf MO |
1214 | } |
1215 | ||
1216 | /** | |
1217 | * afu_link_reset() - resets the specified host FC port | |
1218 | * @afu: AFU associated with the host that owns the specified FC port. | |
1219 | * @port: Port number being configured. | |
1220 | * @fc_regs: Top of MMIO region defined for specified port. | |
1221 | * | |
1222 | * The provided MMIO region must be mapped prior to call. The sequence to | |
1223 | * reset the port involves toggling it offline and then back online. This | |
1224 | * action can cause this routine to delay up to a few seconds. An effort | |
1225 | * is made to maintain link with the device by switching to host to use | |
1226 | * the alternate port exclusively while the reset takes place. | |
1227 | * failure to come online is overridden. | |
1228 | */ | |
1786f4a0 | 1229 | static void afu_link_reset(struct afu *afu, int port, __be64 __iomem *fc_regs) |
c21e0bbf | 1230 | { |
fb67d44d MO |
1231 | struct cxlflash_cfg *cfg = afu->parent; |
1232 | struct device *dev = &cfg->dev->dev; | |
c21e0bbf MO |
1233 | u64 port_sel; |
1234 | ||
1235 | /* first switch the AFU to the other links, if any */ | |
1236 | port_sel = readq_be(&afu->afu_map->global.regs.afu_port_sel); | |
4da74db0 | 1237 | port_sel &= ~(1ULL << port); |
c21e0bbf MO |
1238 | writeq_be(port_sel, &afu->afu_map->global.regs.afu_port_sel); |
1239 | cxlflash_afu_sync(afu, 0, 0, AFU_GSYNC); | |
1240 | ||
1241 | set_port_offline(fc_regs); | |
1242 | if (!wait_port_offline(fc_regs, FC_PORT_STATUS_RETRY_INTERVAL_US, | |
1243 | FC_PORT_STATUS_RETRY_CNT)) | |
fb67d44d MO |
1244 | dev_err(dev, "%s: wait on port %d to go offline timed out\n", |
1245 | __func__, port); | |
c21e0bbf MO |
1246 | |
1247 | set_port_online(fc_regs); | |
1248 | if (!wait_port_online(fc_regs, FC_PORT_STATUS_RETRY_INTERVAL_US, | |
1249 | FC_PORT_STATUS_RETRY_CNT)) | |
fb67d44d MO |
1250 | dev_err(dev, "%s: wait on port %d to go online timed out\n", |
1251 | __func__, port); | |
c21e0bbf MO |
1252 | |
1253 | /* switch back to include this port */ | |
4da74db0 | 1254 | port_sel |= (1ULL << port); |
c21e0bbf MO |
1255 | writeq_be(port_sel, &afu->afu_map->global.regs.afu_port_sel); |
1256 | cxlflash_afu_sync(afu, 0, 0, AFU_GSYNC); | |
1257 | ||
fb67d44d | 1258 | dev_dbg(dev, "%s: returning port_sel=%016llx\n", __func__, port_sel); |
c21e0bbf MO |
1259 | } |
1260 | ||
c21e0bbf MO |
1261 | /** |
1262 | * afu_err_intr_init() - clears and initializes the AFU for error interrupts | |
1263 | * @afu: AFU associated with the host. | |
1264 | */ | |
1265 | static void afu_err_intr_init(struct afu *afu) | |
1266 | { | |
78ae028e | 1267 | struct cxlflash_cfg *cfg = afu->parent; |
0aa14887 | 1268 | __be64 __iomem *fc_port_regs; |
c21e0bbf | 1269 | int i; |
bfc0bab1 | 1270 | struct hwq *hwq = get_hwq(afu, PRIMARY_HWQ); |
c21e0bbf MO |
1271 | u64 reg; |
1272 | ||
1273 | /* global async interrupts: AFU clears afu_ctrl on context exit | |
1274 | * if async interrupts were sent to that context. This prevents | |
1275 | * the AFU form sending further async interrupts when | |
1276 | * there is | |
1277 | * nobody to receive them. | |
1278 | */ | |
1279 | ||
1280 | /* mask all */ | |
1281 | writeq_be(-1ULL, &afu->afu_map->global.regs.aintr_mask); | |
bfc0bab1 UK |
1282 | /* set LISN# to send and point to primary master context */ |
1283 | reg = ((u64) (((hwq->ctx_hndl << 8) | SISL_MSI_ASYNC_ERROR)) << 40); | |
c21e0bbf MO |
1284 | |
1285 | if (afu->internal_lun) | |
1286 | reg |= 1; /* Bit 63 indicates local lun */ | |
1287 | writeq_be(reg, &afu->afu_map->global.regs.afu_ctrl); | |
1288 | /* clear all */ | |
1289 | writeq_be(-1ULL, &afu->afu_map->global.regs.aintr_clear); | |
1290 | /* unmask bits that are of interest */ | |
1291 | /* note: afu can send an interrupt after this step */ | |
1292 | writeq_be(SISL_ASTATUS_MASK, &afu->afu_map->global.regs.aintr_mask); | |
1293 | /* clear again in case a bit came on after previous clear but before */ | |
1294 | /* unmask */ | |
1295 | writeq_be(-1ULL, &afu->afu_map->global.regs.aintr_clear); | |
1296 | ||
1297 | /* Clear/Set internal lun bits */ | |
0aa14887 MO |
1298 | fc_port_regs = get_fc_port_regs(cfg, 0); |
1299 | reg = readq_be(&fc_port_regs[FC_CONFIG2 / 8]); | |
c21e0bbf MO |
1300 | reg &= SISL_FC_INTERNAL_MASK; |
1301 | if (afu->internal_lun) | |
1302 | reg |= ((u64)(afu->internal_lun - 1) << SISL_FC_INTERNAL_SHIFT); | |
0aa14887 | 1303 | writeq_be(reg, &fc_port_regs[FC_CONFIG2 / 8]); |
c21e0bbf MO |
1304 | |
1305 | /* now clear FC errors */ | |
78ae028e | 1306 | for (i = 0; i < cfg->num_fc_ports; i++) { |
0aa14887 MO |
1307 | fc_port_regs = get_fc_port_regs(cfg, i); |
1308 | ||
1309 | writeq_be(0xFFFFFFFFU, &fc_port_regs[FC_ERROR / 8]); | |
1310 | writeq_be(0, &fc_port_regs[FC_ERRCAP / 8]); | |
c21e0bbf MO |
1311 | } |
1312 | ||
1313 | /* sync interrupts for master's IOARRIN write */ | |
1314 | /* note that unlike asyncs, there can be no pending sync interrupts */ | |
1315 | /* at this time (this is a fresh context and master has not written */ | |
1316 | /* IOARRIN yet), so there is nothing to clear. */ | |
1317 | ||
1318 | /* set LISN#, it is always sent to the context that wrote IOARRIN */ | |
3065267a | 1319 | for (i = 0; i < afu->num_hwqs; i++) { |
bfc0bab1 UK |
1320 | hwq = get_hwq(afu, i); |
1321 | ||
465891fe MO |
1322 | reg = readq_be(&hwq->host_map->ctx_ctrl); |
1323 | WARN_ON((reg & SISL_CTX_CTRL_LISN_MASK) != 0); | |
1324 | reg |= SISL_MSI_SYNC_ERROR; | |
1325 | writeq_be(reg, &hwq->host_map->ctx_ctrl); | |
bfc0bab1 UK |
1326 | writeq_be(SISL_ISTATUS_MASK, &hwq->host_map->intr_mask); |
1327 | } | |
c21e0bbf MO |
1328 | } |
1329 | ||
1330 | /** | |
1331 | * cxlflash_sync_err_irq() - interrupt handler for synchronous errors | |
1332 | * @irq: Interrupt number. | |
1333 | * @data: Private data provided at interrupt registration, the AFU. | |
1334 | * | |
1335 | * Return: Always return IRQ_HANDLED. | |
1336 | */ | |
1337 | static irqreturn_t cxlflash_sync_err_irq(int irq, void *data) | |
1338 | { | |
bfc0bab1 UK |
1339 | struct hwq *hwq = (struct hwq *)data; |
1340 | struct cxlflash_cfg *cfg = hwq->afu->parent; | |
fb67d44d | 1341 | struct device *dev = &cfg->dev->dev; |
c21e0bbf MO |
1342 | u64 reg; |
1343 | u64 reg_unmasked; | |
1344 | ||
bfc0bab1 | 1345 | reg = readq_be(&hwq->host_map->intr_status); |
c21e0bbf MO |
1346 | reg_unmasked = (reg & SISL_ISTATUS_UNMASK); |
1347 | ||
1348 | if (reg_unmasked == 0UL) { | |
fb67d44d MO |
1349 | dev_err(dev, "%s: spurious interrupt, intr_status=%016llx\n", |
1350 | __func__, reg); | |
c21e0bbf MO |
1351 | goto cxlflash_sync_err_irq_exit; |
1352 | } | |
1353 | ||
fb67d44d MO |
1354 | dev_err(dev, "%s: unexpected interrupt, intr_status=%016llx\n", |
1355 | __func__, reg); | |
c21e0bbf | 1356 | |
bfc0bab1 | 1357 | writeq_be(reg_unmasked, &hwq->host_map->intr_clear); |
c21e0bbf MO |
1358 | |
1359 | cxlflash_sync_err_irq_exit: | |
c21e0bbf MO |
1360 | return IRQ_HANDLED; |
1361 | } | |
1362 | ||
1363 | /** | |
76a6ebbe | 1364 | * process_hrrq() - process the read-response queue |
cf0ad7a1 | 1365 | * @hwq: HWQ associated with the host. |
f918b4a8 | 1366 | * @doneq: Queue of commands harvested from the RRQ. |
cba06e6d | 1367 | * @budget: Threshold of RRQ entries to process. |
f918b4a8 MO |
1368 | * |
1369 | * This routine must be called holding the disabled RRQ spin lock. | |
c21e0bbf | 1370 | * |
76a6ebbe | 1371 | * Return: The number of entries processed. |
c21e0bbf | 1372 | */ |
bfc0bab1 | 1373 | static int process_hrrq(struct hwq *hwq, struct list_head *doneq, int budget) |
c21e0bbf | 1374 | { |
bfc0bab1 | 1375 | struct afu *afu = hwq->afu; |
c21e0bbf | 1376 | struct afu_cmd *cmd; |
696d0b0c MO |
1377 | struct sisl_ioasa *ioasa; |
1378 | struct sisl_ioarcb *ioarcb; | |
bfc0bab1 | 1379 | bool toggle = hwq->toggle; |
76a6ebbe | 1380 | int num_hrrq = 0; |
c21e0bbf | 1381 | u64 entry, |
bfc0bab1 UK |
1382 | *hrrq_start = hwq->hrrq_start, |
1383 | *hrrq_end = hwq->hrrq_end, | |
1384 | *hrrq_curr = hwq->hrrq_curr; | |
c21e0bbf | 1385 | |
cba06e6d | 1386 | /* Process ready RRQ entries up to the specified budget (if any) */ |
c21e0bbf MO |
1387 | while (true) { |
1388 | entry = *hrrq_curr; | |
1389 | ||
1390 | if ((entry & SISL_RESP_HANDLE_T_BIT) != toggle) | |
1391 | break; | |
1392 | ||
696d0b0c MO |
1393 | entry &= ~SISL_RESP_HANDLE_T_BIT; |
1394 | ||
1395 | if (afu_is_sq_cmd_mode(afu)) { | |
1396 | ioasa = (struct sisl_ioasa *)entry; | |
1397 | cmd = container_of(ioasa, struct afu_cmd, sa); | |
1398 | } else { | |
1399 | ioarcb = (struct sisl_ioarcb *)entry; | |
1400 | cmd = container_of(ioarcb, struct afu_cmd, rcb); | |
1401 | } | |
1402 | ||
f918b4a8 | 1403 | list_add_tail(&cmd->queue, doneq); |
c21e0bbf MO |
1404 | |
1405 | /* Advance to next entry or wrap and flip the toggle bit */ | |
1406 | if (hrrq_curr < hrrq_end) | |
1407 | hrrq_curr++; | |
1408 | else { | |
1409 | hrrq_curr = hrrq_start; | |
1410 | toggle ^= SISL_RESP_HANDLE_T_BIT; | |
1411 | } | |
696d0b0c | 1412 | |
bfc0bab1 | 1413 | atomic_inc(&hwq->hsq_credits); |
76a6ebbe | 1414 | num_hrrq++; |
cba06e6d MO |
1415 | |
1416 | if (budget > 0 && num_hrrq >= budget) | |
1417 | break; | |
c21e0bbf MO |
1418 | } |
1419 | ||
bfc0bab1 UK |
1420 | hwq->hrrq_curr = hrrq_curr; |
1421 | hwq->toggle = toggle; | |
c21e0bbf | 1422 | |
76a6ebbe MO |
1423 | return num_hrrq; |
1424 | } | |
1425 | ||
f918b4a8 MO |
1426 | /** |
1427 | * process_cmd_doneq() - process a queue of harvested RRQ commands | |
1428 | * @doneq: Queue of completed commands. | |
1429 | * | |
1430 | * Note that upon return the queue can no longer be trusted. | |
1431 | */ | |
1432 | static void process_cmd_doneq(struct list_head *doneq) | |
1433 | { | |
1434 | struct afu_cmd *cmd, *tmp; | |
1435 | ||
1436 | WARN_ON(list_empty(doneq)); | |
1437 | ||
1438 | list_for_each_entry_safe(cmd, tmp, doneq, queue) | |
1439 | cmd_complete(cmd); | |
1440 | } | |
1441 | ||
cba06e6d MO |
1442 | /** |
1443 | * cxlflash_irqpoll() - process a queue of harvested RRQ commands | |
1444 | * @irqpoll: IRQ poll structure associated with queue to poll. | |
1445 | * @budget: Threshold of RRQ entries to process per poll. | |
1446 | * | |
1447 | * Return: The number of entries processed. | |
1448 | */ | |
1449 | static int cxlflash_irqpoll(struct irq_poll *irqpoll, int budget) | |
1450 | { | |
bfc0bab1 | 1451 | struct hwq *hwq = container_of(irqpoll, struct hwq, irqpoll); |
cba06e6d MO |
1452 | unsigned long hrrq_flags; |
1453 | LIST_HEAD(doneq); | |
1454 | int num_entries = 0; | |
1455 | ||
bfc0bab1 | 1456 | spin_lock_irqsave(&hwq->hrrq_slock, hrrq_flags); |
cba06e6d | 1457 | |
bfc0bab1 | 1458 | num_entries = process_hrrq(hwq, &doneq, budget); |
cba06e6d MO |
1459 | if (num_entries < budget) |
1460 | irq_poll_complete(irqpoll); | |
1461 | ||
bfc0bab1 | 1462 | spin_unlock_irqrestore(&hwq->hrrq_slock, hrrq_flags); |
cba06e6d MO |
1463 | |
1464 | process_cmd_doneq(&doneq); | |
1465 | return num_entries; | |
1466 | } | |
1467 | ||
76a6ebbe MO |
1468 | /** |
1469 | * cxlflash_rrq_irq() - interrupt handler for read-response queue (normal path) | |
1470 | * @irq: Interrupt number. | |
1471 | * @data: Private data provided at interrupt registration, the AFU. | |
1472 | * | |
f918b4a8 | 1473 | * Return: IRQ_HANDLED or IRQ_NONE when no ready entries found. |
76a6ebbe MO |
1474 | */ |
1475 | static irqreturn_t cxlflash_rrq_irq(int irq, void *data) | |
1476 | { | |
bfc0bab1 UK |
1477 | struct hwq *hwq = (struct hwq *)data; |
1478 | struct afu *afu = hwq->afu; | |
f918b4a8 MO |
1479 | unsigned long hrrq_flags; |
1480 | LIST_HEAD(doneq); | |
1481 | int num_entries = 0; | |
76a6ebbe | 1482 | |
bfc0bab1 | 1483 | spin_lock_irqsave(&hwq->hrrq_slock, hrrq_flags); |
cba06e6d | 1484 | |
d2d354a6 UK |
1485 | /* Silently drop spurious interrupts when queue is not online */ |
1486 | if (!hwq->hrrq_online) { | |
1487 | spin_unlock_irqrestore(&hwq->hrrq_slock, hrrq_flags); | |
1488 | return IRQ_HANDLED; | |
1489 | } | |
1490 | ||
cba06e6d | 1491 | if (afu_is_irqpoll_enabled(afu)) { |
bfc0bab1 UK |
1492 | irq_poll_sched(&hwq->irqpoll); |
1493 | spin_unlock_irqrestore(&hwq->hrrq_slock, hrrq_flags); | |
cba06e6d MO |
1494 | return IRQ_HANDLED; |
1495 | } | |
1496 | ||
bfc0bab1 UK |
1497 | num_entries = process_hrrq(hwq, &doneq, -1); |
1498 | spin_unlock_irqrestore(&hwq->hrrq_slock, hrrq_flags); | |
f918b4a8 MO |
1499 | |
1500 | if (num_entries == 0) | |
1501 | return IRQ_NONE; | |
1502 | ||
1503 | process_cmd_doneq(&doneq); | |
c21e0bbf MO |
1504 | return IRQ_HANDLED; |
1505 | } | |
1506 | ||
e2ef33fa MO |
1507 | /* |
1508 | * Asynchronous interrupt information table | |
1509 | * | |
1510 | * NOTE: | |
1511 | * - Order matters here as this array is indexed by bit position. | |
1512 | * | |
1513 | * - The checkpatch script considers the BUILD_SISL_ASTATUS_FC_PORT macro | |
1514 | * as complex and complains due to a lack of parentheses/braces. | |
1515 | */ | |
1516 | #define ASTATUS_FC(_a, _b, _c, _d) \ | |
1517 | { SISL_ASTATUS_FC##_a##_##_b, _c, _a, (_d) } | |
1518 | ||
1519 | #define BUILD_SISL_ASTATUS_FC_PORT(_a) \ | |
1520 | ASTATUS_FC(_a, LINK_UP, "link up", 0), \ | |
1521 | ASTATUS_FC(_a, LINK_DN, "link down", 0), \ | |
1522 | ASTATUS_FC(_a, LOGI_S, "login succeeded", SCAN_HOST), \ | |
1523 | ASTATUS_FC(_a, LOGI_F, "login failed", CLR_FC_ERROR), \ | |
1524 | ASTATUS_FC(_a, LOGI_R, "login timed out, retrying", LINK_RESET), \ | |
1525 | ASTATUS_FC(_a, CRC_T, "CRC threshold exceeded", LINK_RESET), \ | |
1526 | ASTATUS_FC(_a, LOGO, "target initiated LOGO", 0), \ | |
1527 | ASTATUS_FC(_a, OTHER, "other error", CLR_FC_ERROR | LINK_RESET) | |
1528 | ||
1529 | static const struct asyc_intr_info ainfo[] = { | |
1530 | BUILD_SISL_ASTATUS_FC_PORT(1), | |
1531 | BUILD_SISL_ASTATUS_FC_PORT(0), | |
1532 | BUILD_SISL_ASTATUS_FC_PORT(3), | |
1533 | BUILD_SISL_ASTATUS_FC_PORT(2) | |
1534 | }; | |
1535 | ||
c21e0bbf MO |
1536 | /** |
1537 | * cxlflash_async_err_irq() - interrupt handler for asynchronous errors | |
1538 | * @irq: Interrupt number. | |
1539 | * @data: Private data provided at interrupt registration, the AFU. | |
1540 | * | |
1541 | * Return: Always return IRQ_HANDLED. | |
1542 | */ | |
1543 | static irqreturn_t cxlflash_async_err_irq(int irq, void *data) | |
1544 | { | |
bfc0bab1 UK |
1545 | struct hwq *hwq = (struct hwq *)data; |
1546 | struct afu *afu = hwq->afu; | |
4392ba49 MO |
1547 | struct cxlflash_cfg *cfg = afu->parent; |
1548 | struct device *dev = &cfg->dev->dev; | |
c21e0bbf | 1549 | const struct asyc_intr_info *info; |
1786f4a0 | 1550 | struct sisl_global_map __iomem *global = &afu->afu_map->global; |
0aa14887 | 1551 | __be64 __iomem *fc_port_regs; |
e2ef33fa | 1552 | u64 reg_unmasked; |
c21e0bbf | 1553 | u64 reg; |
e2ef33fa | 1554 | u64 bit; |
c21e0bbf | 1555 | u8 port; |
c21e0bbf | 1556 | |
c21e0bbf MO |
1557 | reg = readq_be(&global->regs.aintr_status); |
1558 | reg_unmasked = (reg & SISL_ASTATUS_UNMASK); | |
1559 | ||
e2ef33fa | 1560 | if (unlikely(reg_unmasked == 0)) { |
fb67d44d | 1561 | dev_err(dev, "%s: spurious interrupt, aintr_status=%016llx\n", |
4392ba49 | 1562 | __func__, reg); |
c21e0bbf MO |
1563 | goto out; |
1564 | } | |
1565 | ||
f15fbf8d | 1566 | /* FYI, it is 'okay' to clear AFU status before FC_ERROR */ |
c21e0bbf MO |
1567 | writeq_be(reg_unmasked, &global->regs.aintr_clear); |
1568 | ||
f15fbf8d | 1569 | /* Check each bit that is on */ |
e2ef33fa MO |
1570 | for_each_set_bit(bit, (ulong *)®_unmasked, BITS_PER_LONG) { |
1571 | if (unlikely(bit >= ARRAY_SIZE(ainfo))) { | |
1572 | WARN_ON_ONCE(1); | |
c21e0bbf | 1573 | continue; |
e2ef33fa MO |
1574 | } |
1575 | ||
1576 | info = &ainfo[bit]; | |
1577 | if (unlikely(info->status != 1ULL << bit)) { | |
1578 | WARN_ON_ONCE(1); | |
1579 | continue; | |
1580 | } | |
c21e0bbf MO |
1581 | |
1582 | port = info->port; | |
0aa14887 | 1583 | fc_port_regs = get_fc_port_regs(cfg, port); |
c21e0bbf | 1584 | |
fb67d44d | 1585 | dev_err(dev, "%s: FC Port %d -> %s, fc_status=%016llx\n", |
4392ba49 | 1586 | __func__, port, info->desc, |
0aa14887 | 1587 | readq_be(&fc_port_regs[FC_STATUS / 8])); |
c21e0bbf MO |
1588 | |
1589 | /* | |
f15fbf8d | 1590 | * Do link reset first, some OTHER errors will set FC_ERROR |
c21e0bbf MO |
1591 | * again if cleared before or w/o a reset |
1592 | */ | |
1593 | if (info->action & LINK_RESET) { | |
4392ba49 MO |
1594 | dev_err(dev, "%s: FC Port %d: resetting link\n", |
1595 | __func__, port); | |
c21e0bbf MO |
1596 | cfg->lr_state = LINK_RESET_REQUIRED; |
1597 | cfg->lr_port = port; | |
1598 | schedule_work(&cfg->work_q); | |
1599 | } | |
1600 | ||
1601 | if (info->action & CLR_FC_ERROR) { | |
0aa14887 | 1602 | reg = readq_be(&fc_port_regs[FC_ERROR / 8]); |
c21e0bbf MO |
1603 | |
1604 | /* | |
f15fbf8d | 1605 | * Since all errors are unmasked, FC_ERROR and FC_ERRCAP |
c21e0bbf MO |
1606 | * should be the same and tracing one is sufficient. |
1607 | */ | |
1608 | ||
fb67d44d | 1609 | dev_err(dev, "%s: fc %d: clearing fc_error=%016llx\n", |
4392ba49 | 1610 | __func__, port, reg); |
c21e0bbf | 1611 | |
0aa14887 MO |
1612 | writeq_be(reg, &fc_port_regs[FC_ERROR / 8]); |
1613 | writeq_be(0, &fc_port_regs[FC_ERRCAP / 8]); | |
c21e0bbf | 1614 | } |
ef51074a MO |
1615 | |
1616 | if (info->action & SCAN_HOST) { | |
1617 | atomic_inc(&cfg->scan_host_needed); | |
1618 | schedule_work(&cfg->work_q); | |
1619 | } | |
c21e0bbf MO |
1620 | } |
1621 | ||
1622 | out: | |
c21e0bbf MO |
1623 | return IRQ_HANDLED; |
1624 | } | |
1625 | ||
c21e0bbf MO |
1626 | /** |
1627 | * read_vpd() - obtains the WWPNs from VPD | |
1284fb0c | 1628 | * @cfg: Internal structure associated with the host. |
78ae028e | 1629 | * @wwpn: Array of size MAX_FC_PORTS to pass back WWPNs |
c21e0bbf | 1630 | * |
1284fb0c | 1631 | * Return: 0 on success, -errno on failure |
c21e0bbf MO |
1632 | */ |
1633 | static int read_vpd(struct cxlflash_cfg *cfg, u64 wwpn[]) | |
1634 | { | |
fb67d44d MO |
1635 | struct device *dev = &cfg->dev->dev; |
1636 | struct pci_dev *pdev = cfg->dev; | |
89031795 HK |
1637 | int i, k, rc = 0; |
1638 | unsigned int kw_size; | |
c21e0bbf MO |
1639 | ssize_t vpd_size; |
1640 | char vpd_data[CXLFLASH_VPD_LEN]; | |
1641 | char tmp_buf[WWPN_BUF_LEN] = { 0 }; | |
0d419130 MO |
1642 | const struct dev_dependent_vals *ddv = (struct dev_dependent_vals *) |
1643 | cfg->dev_id->driver_data; | |
1644 | const bool wwpn_vpd_required = ddv->flags & CXLFLASH_WWPN_VPD_REQUIRED; | |
1645 | const char *wwpn_vpd_tags[MAX_FC_PORTS] = { "V5", "V6", "V7", "V8" }; | |
c21e0bbf MO |
1646 | |
1647 | /* Get the VPD data from the device */ | |
25b8e08e | 1648 | vpd_size = cfg->ops->read_adapter_vpd(pdev, vpd_data, sizeof(vpd_data)); |
c21e0bbf | 1649 | if (unlikely(vpd_size <= 0)) { |
fb67d44d MO |
1650 | dev_err(dev, "%s: Unable to read VPD (size = %ld)\n", |
1651 | __func__, vpd_size); | |
c21e0bbf MO |
1652 | rc = -ENODEV; |
1653 | goto out; | |
1654 | } | |
1655 | ||
c21e0bbf MO |
1656 | /* |
1657 | * Find the offset of the WWPN tag within the read only | |
1658 | * VPD data and validate the found field (partials are | |
1659 | * no good to us). Convert the ASCII data to an integer | |
1660 | * value. Note that we must copy to a temporary buffer | |
1661 | * because the conversion service requires that the ASCII | |
1662 | * string be terminated. | |
0d419130 MO |
1663 | * |
1664 | * Allow for WWPN not being found for all devices, setting | |
1665 | * the returned WWPN to zero when not found. Notify with a | |
1666 | * log error for cards that should have had WWPN keywords | |
1667 | * in the VPD - cards requiring WWPN will not have their | |
1668 | * ports programmed and operate in an undefined state. | |
c21e0bbf | 1669 | */ |
78ae028e | 1670 | for (k = 0; k < cfg->num_fc_ports; k++) { |
89031795 HK |
1671 | i = pci_vpd_find_ro_info_keyword(vpd_data, vpd_size, |
1672 | wwpn_vpd_tags[k], &kw_size); | |
1673 | if (i == -ENOENT) { | |
0d419130 MO |
1674 | if (wwpn_vpd_required) |
1675 | dev_err(dev, "%s: Port %d WWPN not found\n", | |
1676 | __func__, k); | |
1677 | wwpn[k] = 0ULL; | |
1678 | continue; | |
c21e0bbf MO |
1679 | } |
1680 | ||
89031795 | 1681 | if (i < 0 || kw_size != WWPN_LEN) { |
fb67d44d MO |
1682 | dev_err(dev, "%s: Port %d WWPN incomplete or bad VPD\n", |
1683 | __func__, k); | |
c21e0bbf MO |
1684 | rc = -ENODEV; |
1685 | goto out; | |
1686 | } | |
1687 | ||
1688 | memcpy(tmp_buf, &vpd_data[i], WWPN_LEN); | |
1689 | rc = kstrtoul(tmp_buf, WWPN_LEN, (ulong *)&wwpn[k]); | |
1690 | if (unlikely(rc)) { | |
fb67d44d MO |
1691 | dev_err(dev, "%s: WWPN conversion failed for port %d\n", |
1692 | __func__, k); | |
c21e0bbf MO |
1693 | rc = -ENODEV; |
1694 | goto out; | |
1695 | } | |
78ae028e MO |
1696 | |
1697 | dev_dbg(dev, "%s: wwpn%d=%016llx\n", __func__, k, wwpn[k]); | |
c21e0bbf MO |
1698 | } |
1699 | ||
1700 | out: | |
fb67d44d | 1701 | dev_dbg(dev, "%s: returning rc=%d\n", __func__, rc); |
c21e0bbf MO |
1702 | return rc; |
1703 | } | |
1704 | ||
1705 | /** | |
15305514 | 1706 | * init_pcr() - initialize the provisioning and control registers |
1284fb0c | 1707 | * @cfg: Internal structure associated with the host. |
c21e0bbf | 1708 | * |
15305514 MO |
1709 | * Also sets up fast access to the mapped registers and initializes AFU |
1710 | * command fields that never change. | |
c21e0bbf | 1711 | */ |
15305514 | 1712 | static void init_pcr(struct cxlflash_cfg *cfg) |
c21e0bbf MO |
1713 | { |
1714 | struct afu *afu = cfg->afu; | |
1786f4a0 | 1715 | struct sisl_ctrl_map __iomem *ctrl_map; |
bfc0bab1 | 1716 | struct hwq *hwq; |
25b8e08e | 1717 | void *cookie; |
c21e0bbf MO |
1718 | int i; |
1719 | ||
1720 | for (i = 0; i < MAX_CONTEXT; i++) { | |
1721 | ctrl_map = &afu->afu_map->ctrls[i].ctrl; | |
f15fbf8d MO |
1722 | /* Disrupt any clients that could be running */ |
1723 | /* e.g. clients that survived a master restart */ | |
c21e0bbf MO |
1724 | writeq_be(0, &ctrl_map->rht_start); |
1725 | writeq_be(0, &ctrl_map->rht_cnt_id); | |
1726 | writeq_be(0, &ctrl_map->ctx_cap); | |
1727 | } | |
1728 | ||
bfc0bab1 | 1729 | /* Copy frequently used fields into hwq */ |
3065267a | 1730 | for (i = 0; i < afu->num_hwqs; i++) { |
bfc0bab1 | 1731 | hwq = get_hwq(afu, i); |
25b8e08e | 1732 | cookie = hwq->ctx_cookie; |
bfc0bab1 | 1733 | |
25b8e08e | 1734 | hwq->ctx_hndl = (u16) cfg->ops->process_element(cookie); |
bfc0bab1 UK |
1735 | hwq->host_map = &afu->afu_map->hosts[hwq->ctx_hndl].host; |
1736 | hwq->ctrl_map = &afu->afu_map->ctrls[hwq->ctx_hndl].ctrl; | |
c21e0bbf | 1737 | |
bfc0bab1 UK |
1738 | /* Program the Endian Control for the master context */ |
1739 | writeq_be(SISL_ENDIAN_CTRL, &hwq->host_map->endian_ctrl); | |
1740 | } | |
c21e0bbf MO |
1741 | } |
1742 | ||
1743 | /** | |
1744 | * init_global() - initialize AFU global registers | |
1284fb0c | 1745 | * @cfg: Internal structure associated with the host. |
c21e0bbf | 1746 | */ |
15305514 | 1747 | static int init_global(struct cxlflash_cfg *cfg) |
c21e0bbf MO |
1748 | { |
1749 | struct afu *afu = cfg->afu; | |
4392ba49 | 1750 | struct device *dev = &cfg->dev->dev; |
bfc0bab1 UK |
1751 | struct hwq *hwq; |
1752 | struct sisl_host_map __iomem *hmap; | |
0aa14887 | 1753 | __be64 __iomem *fc_port_regs; |
78ae028e | 1754 | u64 wwpn[MAX_FC_PORTS]; /* wwpn of AFU ports */ |
c21e0bbf MO |
1755 | int i = 0, num_ports = 0; |
1756 | int rc = 0; | |
d44af4b0 UK |
1757 | int j; |
1758 | void *ctx; | |
c21e0bbf MO |
1759 | u64 reg; |
1760 | ||
1761 | rc = read_vpd(cfg, &wwpn[0]); | |
1762 | if (rc) { | |
4392ba49 | 1763 | dev_err(dev, "%s: could not read vpd rc=%d\n", __func__, rc); |
c21e0bbf MO |
1764 | goto out; |
1765 | } | |
1766 | ||
bfc0bab1 | 1767 | /* Set up RRQ and SQ in HWQ for master issued cmds */ |
3065267a | 1768 | for (i = 0; i < afu->num_hwqs; i++) { |
bfc0bab1 UK |
1769 | hwq = get_hwq(afu, i); |
1770 | hmap = hwq->host_map; | |
c21e0bbf | 1771 | |
bfc0bab1 UK |
1772 | writeq_be((u64) hwq->hrrq_start, &hmap->rrq_start); |
1773 | writeq_be((u64) hwq->hrrq_end, &hmap->rrq_end); | |
d2d354a6 | 1774 | hwq->hrrq_online = true; |
bfc0bab1 UK |
1775 | |
1776 | if (afu_is_sq_cmd_mode(afu)) { | |
1777 | writeq_be((u64)hwq->hsq_start, &hmap->sq_start); | |
1778 | writeq_be((u64)hwq->hsq_end, &hmap->sq_end); | |
1779 | } | |
696d0b0c MO |
1780 | } |
1781 | ||
c21e0bbf MO |
1782 | /* AFU configuration */ |
1783 | reg = readq_be(&afu->afu_map->global.regs.afu_config); | |
1784 | reg |= SISL_AFUCONF_AR_ALL|SISL_AFUCONF_ENDIAN; | |
1785 | /* enable all auto retry options and control endianness */ | |
1786 | /* leave others at default: */ | |
1787 | /* CTX_CAP write protected, mbox_r does not clear on read and */ | |
1788 | /* checker on if dual afu */ | |
1789 | writeq_be(reg, &afu->afu_map->global.regs.afu_config); | |
1790 | ||
f15fbf8d | 1791 | /* Global port select: select either port */ |
c21e0bbf | 1792 | if (afu->internal_lun) { |
f15fbf8d | 1793 | /* Only use port 0 */ |
c21e0bbf | 1794 | writeq_be(PORT0, &afu->afu_map->global.regs.afu_port_sel); |
78ae028e | 1795 | num_ports = 0; |
c21e0bbf | 1796 | } else { |
8fa4f177 MO |
1797 | writeq_be(PORT_MASK(cfg->num_fc_ports), |
1798 | &afu->afu_map->global.regs.afu_port_sel); | |
78ae028e | 1799 | num_ports = cfg->num_fc_ports; |
c21e0bbf MO |
1800 | } |
1801 | ||
1802 | for (i = 0; i < num_ports; i++) { | |
0aa14887 MO |
1803 | fc_port_regs = get_fc_port_regs(cfg, i); |
1804 | ||
f15fbf8d | 1805 | /* Unmask all errors (but they are still masked at AFU) */ |
0aa14887 | 1806 | writeq_be(0, &fc_port_regs[FC_ERRMSK / 8]); |
f15fbf8d | 1807 | /* Clear CRC error cnt & set a threshold */ |
0aa14887 MO |
1808 | (void)readq_be(&fc_port_regs[FC_CNT_CRCERR / 8]); |
1809 | writeq_be(MC_CRC_THRESH, &fc_port_regs[FC_CRC_THRESH / 8]); | |
c21e0bbf | 1810 | |
f15fbf8d | 1811 | /* Set WWPNs. If already programmed, wwpn[i] is 0 */ |
f8013261 | 1812 | if (wwpn[i] != 0) |
0aa14887 | 1813 | afu_set_wwpn(afu, i, &fc_port_regs[0], wwpn[i]); |
c21e0bbf MO |
1814 | /* Programming WWPN back to back causes additional |
1815 | * offline/online transitions and a PLOGI | |
1816 | */ | |
1817 | msleep(100); | |
c21e0bbf MO |
1818 | } |
1819 | ||
d44af4b0 UK |
1820 | if (afu_is_ocxl_lisn(afu)) { |
1821 | /* Set up the LISN effective address for each master */ | |
1822 | for (i = 0; i < afu->num_hwqs; i++) { | |
1823 | hwq = get_hwq(afu, i); | |
1824 | ctx = hwq->ctx_cookie; | |
1825 | ||
1826 | for (j = 0; j < hwq->num_irqs; j++) { | |
1827 | reg = cfg->ops->get_irq_objhndl(ctx, j); | |
1828 | writeq_be(reg, &hwq->ctrl_map->lisn_ea[j]); | |
1829 | } | |
1830 | ||
1831 | reg = hwq->ctx_hndl; | |
1832 | writeq_be(SISL_LISN_PASID(reg, reg), | |
1833 | &hwq->ctrl_map->lisn_pasid[0]); | |
1834 | writeq_be(SISL_LISN_PASID(0UL, reg), | |
1835 | &hwq->ctrl_map->lisn_pasid[1]); | |
1836 | } | |
1837 | } | |
1838 | ||
f15fbf8d MO |
1839 | /* Set up master's own CTX_CAP to allow real mode, host translation */ |
1840 | /* tables, afu cmds and read/write GSCSI cmds. */ | |
c21e0bbf | 1841 | /* First, unlock ctx_cap write by reading mbox */ |
3065267a | 1842 | for (i = 0; i < afu->num_hwqs; i++) { |
bfc0bab1 UK |
1843 | hwq = get_hwq(afu, i); |
1844 | ||
1845 | (void)readq_be(&hwq->ctrl_map->mbox_r); /* unlock ctx_cap */ | |
1846 | writeq_be((SISL_CTX_CAP_REAL_MODE | SISL_CTX_CAP_HOST_XLATE | | |
1847 | SISL_CTX_CAP_READ_CMD | SISL_CTX_CAP_WRITE_CMD | | |
1848 | SISL_CTX_CAP_AFU_CMD | SISL_CTX_CAP_GSCSI_CMD), | |
1849 | &hwq->ctrl_map->ctx_cap); | |
1850 | } | |
3223c01a MO |
1851 | |
1852 | /* | |
1853 | * Determine write-same unmap support for host by evaluating the unmap | |
1854 | * sector support bit of the context control register associated with | |
1855 | * the primary hardware queue. Note that while this status is reflected | |
1856 | * in a context register, the outcome can be assumed to be host-wide. | |
1857 | */ | |
1858 | hwq = get_hwq(afu, PRIMARY_HWQ); | |
1859 | reg = readq_be(&hwq->host_map->ctx_ctrl); | |
1860 | if (reg & SISL_CTX_CTRL_UNMAP_SECTOR) | |
1861 | cfg->ws_unmap = true; | |
1862 | ||
f15fbf8d | 1863 | /* Initialize heartbeat */ |
c21e0bbf | 1864 | afu->hb = readq_be(&afu->afu_map->global.regs.afu_hb); |
c21e0bbf MO |
1865 | out: |
1866 | return rc; | |
1867 | } | |
1868 | ||
1869 | /** | |
1870 | * start_afu() - initializes and starts the AFU | |
1284fb0c | 1871 | * @cfg: Internal structure associated with the host. |
c21e0bbf MO |
1872 | */ |
1873 | static int start_afu(struct cxlflash_cfg *cfg) | |
1874 | { | |
1875 | struct afu *afu = cfg->afu; | |
fb67d44d | 1876 | struct device *dev = &cfg->dev->dev; |
bfc0bab1 | 1877 | struct hwq *hwq; |
c21e0bbf | 1878 | int rc = 0; |
bfc0bab1 | 1879 | int i; |
c21e0bbf | 1880 | |
c21e0bbf MO |
1881 | init_pcr(cfg); |
1882 | ||
bfc0bab1 | 1883 | /* Initialize each HWQ */ |
3065267a | 1884 | for (i = 0; i < afu->num_hwqs; i++) { |
bfc0bab1 | 1885 | hwq = get_hwq(afu, i); |
c21e0bbf | 1886 | |
bfc0bab1 UK |
1887 | /* After an AFU reset, RRQ entries are stale, clear them */ |
1888 | memset(&hwq->rrq_entry, 0, sizeof(hwq->rrq_entry)); | |
696d0b0c | 1889 | |
bfc0bab1 UK |
1890 | /* Initialize RRQ pointers */ |
1891 | hwq->hrrq_start = &hwq->rrq_entry[0]; | |
1892 | hwq->hrrq_end = &hwq->rrq_entry[NUM_RRQ_ENTRY - 1]; | |
1893 | hwq->hrrq_curr = hwq->hrrq_start; | |
1894 | hwq->toggle = 1; | |
66ea9bcc UK |
1895 | |
1896 | /* Initialize spin locks */ | |
bfc0bab1 | 1897 | spin_lock_init(&hwq->hrrq_slock); |
66ea9bcc | 1898 | spin_lock_init(&hwq->hsq_slock); |
696d0b0c | 1899 | |
bfc0bab1 UK |
1900 | /* Initialize SQ */ |
1901 | if (afu_is_sq_cmd_mode(afu)) { | |
1902 | memset(&hwq->sq, 0, sizeof(hwq->sq)); | |
1903 | hwq->hsq_start = &hwq->sq[0]; | |
1904 | hwq->hsq_end = &hwq->sq[NUM_SQ_ENTRY - 1]; | |
1905 | hwq->hsq_curr = hwq->hsq_start; | |
1906 | ||
bfc0bab1 UK |
1907 | atomic_set(&hwq->hsq_credits, NUM_SQ_ENTRY - 1); |
1908 | } | |
1909 | ||
1910 | /* Initialize IRQ poll */ | |
1911 | if (afu_is_irqpoll_enabled(afu)) | |
1912 | irq_poll_init(&hwq->irqpoll, afu->irqpoll_weight, | |
1913 | cxlflash_irqpoll); | |
1914 | ||
1915 | } | |
cba06e6d | 1916 | |
c21e0bbf MO |
1917 | rc = init_global(cfg); |
1918 | ||
fb67d44d | 1919 | dev_dbg(dev, "%s: returning rc=%d\n", __func__, rc); |
c21e0bbf MO |
1920 | return rc; |
1921 | } | |
1922 | ||
1923 | /** | |
9526f360 | 1924 | * init_intr() - setup interrupt handlers for the master context |
1284fb0c | 1925 | * @cfg: Internal structure associated with the host. |
bfc0bab1 | 1926 | * @hwq: Hardware queue to initialize. |
c21e0bbf | 1927 | * |
1284fb0c | 1928 | * Return: 0 on success, -errno on failure |
c21e0bbf | 1929 | */ |
9526f360 | 1930 | static enum undo_level init_intr(struct cxlflash_cfg *cfg, |
bfc0bab1 | 1931 | struct hwq *hwq) |
c21e0bbf | 1932 | { |
9526f360 | 1933 | struct device *dev = &cfg->dev->dev; |
b070545d | 1934 | void *ctx = hwq->ctx_cookie; |
c21e0bbf | 1935 | int rc = 0; |
9526f360 | 1936 | enum undo_level level = UNDO_NOOP; |
bfc0bab1 | 1937 | bool is_primary_hwq = (hwq->index == PRIMARY_HWQ); |
e11e0ff8 | 1938 | int num_irqs = hwq->num_irqs; |
c21e0bbf | 1939 | |
25b8e08e | 1940 | rc = cfg->ops->allocate_afu_irqs(ctx, num_irqs); |
c21e0bbf | 1941 | if (unlikely(rc)) { |
fb67d44d | 1942 | dev_err(dev, "%s: allocate_afu_irqs failed rc=%d\n", |
c21e0bbf | 1943 | __func__, rc); |
9526f360 | 1944 | level = UNDO_NOOP; |
c21e0bbf MO |
1945 | goto out; |
1946 | } | |
1947 | ||
25b8e08e MO |
1948 | rc = cfg->ops->map_afu_irq(ctx, 1, cxlflash_sync_err_irq, hwq, |
1949 | "SISL_MSI_SYNC_ERROR"); | |
c21e0bbf | 1950 | if (unlikely(rc <= 0)) { |
fb67d44d | 1951 | dev_err(dev, "%s: SISL_MSI_SYNC_ERROR map failed\n", __func__); |
c21e0bbf MO |
1952 | level = FREE_IRQ; |
1953 | goto out; | |
1954 | } | |
1955 | ||
25b8e08e MO |
1956 | rc = cfg->ops->map_afu_irq(ctx, 2, cxlflash_rrq_irq, hwq, |
1957 | "SISL_MSI_RRQ_UPDATED"); | |
c21e0bbf | 1958 | if (unlikely(rc <= 0)) { |
fb67d44d | 1959 | dev_err(dev, "%s: SISL_MSI_RRQ_UPDATED map failed\n", __func__); |
c21e0bbf MO |
1960 | level = UNMAP_ONE; |
1961 | goto out; | |
1962 | } | |
1963 | ||
bfc0bab1 UK |
1964 | /* SISL_MSI_ASYNC_ERROR is setup only for the primary HWQ */ |
1965 | if (!is_primary_hwq) | |
1966 | goto out; | |
1967 | ||
25b8e08e MO |
1968 | rc = cfg->ops->map_afu_irq(ctx, 3, cxlflash_async_err_irq, hwq, |
1969 | "SISL_MSI_ASYNC_ERROR"); | |
c21e0bbf | 1970 | if (unlikely(rc <= 0)) { |
fb67d44d | 1971 | dev_err(dev, "%s: SISL_MSI_ASYNC_ERROR map failed\n", __func__); |
c21e0bbf MO |
1972 | level = UNMAP_TWO; |
1973 | goto out; | |
1974 | } | |
9526f360 MK |
1975 | out: |
1976 | return level; | |
1977 | } | |
c21e0bbf | 1978 | |
9526f360 MK |
1979 | /** |
1980 | * init_mc() - create and register as the master context | |
1981 | * @cfg: Internal structure associated with the host. | |
cf0ad7a1 | 1982 | * @index: HWQ Index of the master context. |
9526f360 MK |
1983 | * |
1984 | * Return: 0 on success, -errno on failure | |
1985 | */ | |
bfc0bab1 | 1986 | static int init_mc(struct cxlflash_cfg *cfg, u32 index) |
9526f360 | 1987 | { |
b070545d | 1988 | void *ctx; |
9526f360 | 1989 | struct device *dev = &cfg->dev->dev; |
bfc0bab1 | 1990 | struct hwq *hwq = get_hwq(cfg->afu, index); |
9526f360 | 1991 | int rc = 0; |
e11e0ff8 | 1992 | int num_irqs; |
9526f360 MK |
1993 | enum undo_level level; |
1994 | ||
bfc0bab1 UK |
1995 | hwq->afu = cfg->afu; |
1996 | hwq->index = index; | |
a002bf83 | 1997 | INIT_LIST_HEAD(&hwq->pending_cmds); |
bfc0bab1 | 1998 | |
e11e0ff8 | 1999 | if (index == PRIMARY_HWQ) { |
25b8e08e | 2000 | ctx = cfg->ops->get_context(cfg->dev, cfg->afu_cookie); |
e11e0ff8 UK |
2001 | num_irqs = 3; |
2002 | } else { | |
25b8e08e | 2003 | ctx = cfg->ops->dev_context_init(cfg->dev, cfg->afu_cookie); |
e11e0ff8 UK |
2004 | num_irqs = 2; |
2005 | } | |
0df69c60 | 2006 | if (IS_ERR_OR_NULL(ctx)) { |
9526f360 | 2007 | rc = -ENOMEM; |
bfc0bab1 | 2008 | goto err1; |
9526f360 | 2009 | } |
bfc0bab1 | 2010 | |
b070545d UK |
2011 | WARN_ON(hwq->ctx_cookie); |
2012 | hwq->ctx_cookie = ctx; | |
e11e0ff8 | 2013 | hwq->num_irqs = num_irqs; |
9526f360 MK |
2014 | |
2015 | /* Set it up as a master with the CXL */ | |
25b8e08e | 2016 | cfg->ops->set_master(ctx); |
9526f360 | 2017 | |
bfc0bab1 UK |
2018 | /* Reset AFU when initializing primary context */ |
2019 | if (index == PRIMARY_HWQ) { | |
25b8e08e | 2020 | rc = cfg->ops->afu_reset(ctx); |
bfc0bab1 UK |
2021 | if (unlikely(rc)) { |
2022 | dev_err(dev, "%s: AFU reset failed rc=%d\n", | |
2023 | __func__, rc); | |
2024 | goto err1; | |
2025 | } | |
9526f360 MK |
2026 | } |
2027 | ||
bfc0bab1 | 2028 | level = init_intr(cfg, hwq); |
9526f360 | 2029 | if (unlikely(level)) { |
fb67d44d | 2030 | dev_err(dev, "%s: interrupt init failed rc=%d\n", __func__, rc); |
bfc0bab1 | 2031 | goto err2; |
9526f360 | 2032 | } |
c21e0bbf | 2033 | |
25b8e08e MO |
2034 | /* Finally, activate the context by starting it */ |
2035 | rc = cfg->ops->start_context(hwq->ctx_cookie); | |
c21e0bbf MO |
2036 | if (unlikely(rc)) { |
2037 | dev_err(dev, "%s: start context failed rc=%d\n", __func__, rc); | |
2038 | level = UNMAP_THREE; | |
bfc0bab1 | 2039 | goto err2; |
c21e0bbf | 2040 | } |
bfc0bab1 UK |
2041 | |
2042 | out: | |
fb67d44d | 2043 | dev_dbg(dev, "%s: returning rc=%d\n", __func__, rc); |
c21e0bbf | 2044 | return rc; |
bfc0bab1 UK |
2045 | err2: |
2046 | term_intr(cfg, level, index); | |
2047 | if (index != PRIMARY_HWQ) | |
25b8e08e | 2048 | cfg->ops->release_context(ctx); |
bfc0bab1 | 2049 | err1: |
b070545d | 2050 | hwq->ctx_cookie = NULL; |
bfc0bab1 | 2051 | goto out; |
c21e0bbf MO |
2052 | } |
2053 | ||
56518072 MO |
2054 | /** |
2055 | * get_num_afu_ports() - determines and configures the number of AFU ports | |
2056 | * @cfg: Internal structure associated with the host. | |
2057 | * | |
2058 | * This routine determines the number of AFU ports by converting the global | |
2059 | * port selection mask. The converted value is only valid following an AFU | |
2060 | * reset (explicit or power-on). This routine must be invoked shortly after | |
2061 | * mapping as other routines are dependent on the number of ports during the | |
2062 | * initialization sequence. | |
2063 | * | |
2064 | * To support legacy AFUs that might not have reflected an initial global | |
2065 | * port mask (value read is 0), default to the number of ports originally | |
2066 | * supported by the cxlflash driver (2) before hardware with other port | |
2067 | * offerings was introduced. | |
2068 | */ | |
2069 | static void get_num_afu_ports(struct cxlflash_cfg *cfg) | |
2070 | { | |
2071 | struct afu *afu = cfg->afu; | |
2072 | struct device *dev = &cfg->dev->dev; | |
2073 | u64 port_mask; | |
2074 | int num_fc_ports = LEGACY_FC_PORTS; | |
2075 | ||
2076 | port_mask = readq_be(&afu->afu_map->global.regs.afu_port_sel); | |
2077 | if (port_mask != 0ULL) | |
2078 | num_fc_ports = min(ilog2(port_mask) + 1, MAX_FC_PORTS); | |
2079 | ||
2080 | dev_dbg(dev, "%s: port_mask=%016llx num_fc_ports=%d\n", | |
2081 | __func__, port_mask, num_fc_ports); | |
2082 | ||
2083 | cfg->num_fc_ports = num_fc_ports; | |
2084 | cfg->host->max_channel = PORTNUM2CHAN(num_fc_ports); | |
2085 | } | |
2086 | ||
c21e0bbf MO |
2087 | /** |
2088 | * init_afu() - setup as master context and start AFU | |
1284fb0c | 2089 | * @cfg: Internal structure associated with the host. |
c21e0bbf MO |
2090 | * |
2091 | * This routine is a higher level of control for configuring the | |
2092 | * AFU on probe and reset paths. | |
2093 | * | |
1284fb0c | 2094 | * Return: 0 on success, -errno on failure |
c21e0bbf MO |
2095 | */ |
2096 | static int init_afu(struct cxlflash_cfg *cfg) | |
2097 | { | |
2098 | u64 reg; | |
2099 | int rc = 0; | |
2100 | struct afu *afu = cfg->afu; | |
2101 | struct device *dev = &cfg->dev->dev; | |
bfc0bab1 UK |
2102 | struct hwq *hwq; |
2103 | int i; | |
c21e0bbf | 2104 | |
25b8e08e | 2105 | cfg->ops->perst_reloads_same_image(cfg->afu_cookie, true); |
5cdac81a | 2106 | |
e63a8d88 | 2107 | mutex_init(&afu->sync_active); |
3065267a MO |
2108 | afu->num_hwqs = afu->desired_hwqs; |
2109 | for (i = 0; i < afu->num_hwqs; i++) { | |
bfc0bab1 UK |
2110 | rc = init_mc(cfg, i); |
2111 | if (rc) { | |
2112 | dev_err(dev, "%s: init_mc failed rc=%d index=%d\n", | |
2113 | __func__, rc, i); | |
2114 | goto err1; | |
2115 | } | |
c21e0bbf MO |
2116 | } |
2117 | ||
bfc0bab1 UK |
2118 | /* Map the entire MMIO space of the AFU using the first context */ |
2119 | hwq = get_hwq(afu, PRIMARY_HWQ); | |
25b8e08e | 2120 | afu->afu_map = cfg->ops->psa_map(hwq->ctx_cookie); |
c21e0bbf | 2121 | if (!afu->afu_map) { |
25b8e08e | 2122 | dev_err(dev, "%s: psa_map failed\n", __func__); |
ee3491ba | 2123 | rc = -ENOMEM; |
c21e0bbf MO |
2124 | goto err1; |
2125 | } | |
2126 | ||
e5ce067b MO |
2127 | /* No byte reverse on reading afu_version or string will be backwards */ |
2128 | reg = readq(&afu->afu_map->global.regs.afu_version); | |
2129 | memcpy(afu->version, ®, sizeof(reg)); | |
c21e0bbf MO |
2130 | afu->interface_version = |
2131 | readq_be(&afu->afu_map->global.regs.interface_version); | |
e5ce067b | 2132 | if ((afu->interface_version + 1) == 0) { |
fb67d44d MO |
2133 | dev_err(dev, "Back level AFU, please upgrade. AFU version %s " |
2134 | "interface version %016llx\n", afu->version, | |
e5ce067b MO |
2135 | afu->interface_version); |
2136 | rc = -EINVAL; | |
0df5bef7 | 2137 | goto err1; |
ee3491ba MO |
2138 | } |
2139 | ||
696d0b0c MO |
2140 | if (afu_is_sq_cmd_mode(afu)) { |
2141 | afu->send_cmd = send_cmd_sq; | |
2142 | afu->context_reset = context_reset_sq; | |
2143 | } else { | |
2144 | afu->send_cmd = send_cmd_ioarrin; | |
2145 | afu->context_reset = context_reset_ioarrin; | |
2146 | } | |
48b4be36 | 2147 | |
fb67d44d MO |
2148 | dev_dbg(dev, "%s: afu_ver=%s interface_ver=%016llx\n", __func__, |
2149 | afu->version, afu->interface_version); | |
c21e0bbf | 2150 | |
56518072 MO |
2151 | get_num_afu_ports(cfg); |
2152 | ||
c21e0bbf MO |
2153 | rc = start_afu(cfg); |
2154 | if (rc) { | |
fb67d44d | 2155 | dev_err(dev, "%s: start_afu failed, rc=%d\n", __func__, rc); |
0df5bef7 | 2156 | goto err1; |
c21e0bbf MO |
2157 | } |
2158 | ||
2159 | afu_err_intr_init(cfg->afu); | |
3065267a | 2160 | for (i = 0; i < afu->num_hwqs; i++) { |
bfc0bab1 UK |
2161 | hwq = get_hwq(afu, i); |
2162 | ||
bfc0bab1 UK |
2163 | hwq->room = readq_be(&hwq->host_map->cmd_room); |
2164 | } | |
c21e0bbf | 2165 | |
2cb79266 MO |
2166 | /* Restore the LUN mappings */ |
2167 | cxlflash_restore_luntable(cfg); | |
ee3491ba | 2168 | out: |
fb67d44d | 2169 | dev_dbg(dev, "%s: returning rc=%d\n", __func__, rc); |
c21e0bbf | 2170 | return rc; |
ee3491ba | 2171 | |
ee3491ba | 2172 | err1: |
3065267a | 2173 | for (i = afu->num_hwqs - 1; i >= 0; i--) { |
bfc0bab1 UK |
2174 | term_intr(cfg, UNMAP_THREE, i); |
2175 | term_mc(cfg, i); | |
2176 | } | |
ee3491ba | 2177 | goto out; |
c21e0bbf MO |
2178 | } |
2179 | ||
0b09e711 UK |
2180 | /** |
2181 | * afu_reset() - resets the AFU | |
2182 | * @cfg: Internal structure associated with the host. | |
2183 | * | |
2184 | * Return: 0 on success, -errno on failure | |
2185 | */ | |
2186 | static int afu_reset(struct cxlflash_cfg *cfg) | |
2187 | { | |
2188 | struct device *dev = &cfg->dev->dev; | |
2189 | int rc = 0; | |
2190 | ||
2191 | /* Stop the context before the reset. Since the context is | |
2192 | * no longer available restart it after the reset is complete | |
2193 | */ | |
2194 | term_afu(cfg); | |
2195 | ||
2196 | rc = init_afu(cfg); | |
2197 | ||
2198 | dev_dbg(dev, "%s: returning rc=%d\n", __func__, rc); | |
2199 | return rc; | |
2200 | } | |
2201 | ||
2202 | /** | |
2203 | * drain_ioctls() - wait until all currently executing ioctls have completed | |
2204 | * @cfg: Internal structure associated with the host. | |
2205 | * | |
2206 | * Obtain write access to read/write semaphore that wraps ioctl | |
2207 | * handling to 'drain' ioctls currently executing. | |
2208 | */ | |
2209 | static void drain_ioctls(struct cxlflash_cfg *cfg) | |
2210 | { | |
2211 | down_write(&cfg->ioctl_rwsem); | |
2212 | up_write(&cfg->ioctl_rwsem); | |
2213 | } | |
2214 | ||
2215 | /** | |
2216 | * cxlflash_async_reset_host() - asynchronous host reset handler | |
2217 | * @data: Private data provided while scheduling reset. | |
2218 | * @cookie: Cookie that can be used for checkpointing. | |
2219 | */ | |
2220 | static void cxlflash_async_reset_host(void *data, async_cookie_t cookie) | |
2221 | { | |
2222 | struct cxlflash_cfg *cfg = data; | |
2223 | struct device *dev = &cfg->dev->dev; | |
2224 | int rc = 0; | |
2225 | ||
2226 | if (cfg->state != STATE_RESET) { | |
2227 | dev_dbg(dev, "%s: Not performing a reset, state=%d\n", | |
2228 | __func__, cfg->state); | |
2229 | goto out; | |
2230 | } | |
2231 | ||
2232 | drain_ioctls(cfg); | |
2233 | cxlflash_mark_contexts_error(cfg); | |
2234 | rc = afu_reset(cfg); | |
2235 | if (rc) | |
2236 | cfg->state = STATE_FAILTERM; | |
2237 | else | |
2238 | cfg->state = STATE_NORMAL; | |
2239 | wake_up_all(&cfg->reset_waitq); | |
2240 | ||
2241 | out: | |
2242 | scsi_unblock_requests(cfg->host); | |
2243 | } | |
2244 | ||
2245 | /** | |
2246 | * cxlflash_schedule_async_reset() - schedule an asynchronous host reset | |
2247 | * @cfg: Internal structure associated with the host. | |
2248 | */ | |
2249 | static void cxlflash_schedule_async_reset(struct cxlflash_cfg *cfg) | |
2250 | { | |
2251 | struct device *dev = &cfg->dev->dev; | |
2252 | ||
2253 | if (cfg->state != STATE_NORMAL) { | |
2254 | dev_dbg(dev, "%s: Not performing reset state=%d\n", | |
2255 | __func__, cfg->state); | |
2256 | return; | |
2257 | } | |
2258 | ||
2259 | cfg->state = STATE_RESET; | |
2260 | scsi_block_requests(cfg->host); | |
2261 | cfg->async_reset_cookie = async_schedule(cxlflash_async_reset_host, | |
2262 | cfg); | |
2263 | } | |
2264 | ||
c21e0bbf | 2265 | /** |
cf243027 | 2266 | * send_afu_cmd() - builds and sends an internal AFU command |
c21e0bbf | 2267 | * @afu: AFU associated with the host. |
cf243027 | 2268 | * @rcb: Pre-populated IOARCB describing command to send. |
c21e0bbf | 2269 | * |
cf243027 MO |
2270 | * The AFU can only take one internal AFU command at a time. This limitation is |
2271 | * enforced by using a mutex to provide exclusive access to the AFU during the | |
2272 | * operation. This design point requires calling threads to not be on interrupt | |
2273 | * context due to the possibility of sleeping during concurrent AFU operations. | |
c21e0bbf | 2274 | * |
cf243027 MO |
2275 | * The command status is optionally passed back to the caller when the caller |
2276 | * populates the IOASA field of the IOARCB with a pointer to an IOASA structure. | |
5cdac81a | 2277 | * |
c21e0bbf | 2278 | * Return: |
539d890c | 2279 | * 0 on success, -errno on failure |
c21e0bbf | 2280 | */ |
cf243027 | 2281 | static int send_afu_cmd(struct afu *afu, struct sisl_ioarcb *rcb) |
c21e0bbf | 2282 | { |
5cdac81a | 2283 | struct cxlflash_cfg *cfg = afu->parent; |
4392ba49 | 2284 | struct device *dev = &cfg->dev->dev; |
c21e0bbf | 2285 | struct afu_cmd *cmd = NULL; |
bfc0bab1 | 2286 | struct hwq *hwq = get_hwq(afu, PRIMARY_HWQ); |
9a597cd4 | 2287 | ulong lock_flags; |
350bb478 | 2288 | char *buf = NULL; |
c21e0bbf | 2289 | int rc = 0; |
a96851d3 | 2290 | int nretry = 0; |
c21e0bbf | 2291 | |
5cdac81a | 2292 | if (cfg->state != STATE_NORMAL) { |
fb67d44d MO |
2293 | dev_dbg(dev, "%s: Sync not required state=%u\n", |
2294 | __func__, cfg->state); | |
5cdac81a MO |
2295 | return 0; |
2296 | } | |
2297 | ||
e63a8d88 | 2298 | mutex_lock(&afu->sync_active); |
de01283b | 2299 | atomic_inc(&afu->cmds_active); |
a1ea04b3 | 2300 | buf = kmalloc(sizeof(*cmd) + __alignof__(*cmd) - 1, GFP_KERNEL); |
350bb478 MO |
2301 | if (unlikely(!buf)) { |
2302 | dev_err(dev, "%s: no memory for command\n", __func__); | |
539d890c | 2303 | rc = -ENOMEM; |
c21e0bbf MO |
2304 | goto out; |
2305 | } | |
2306 | ||
350bb478 | 2307 | cmd = (struct afu_cmd *)PTR_ALIGN(buf, __alignof__(*cmd)); |
a96851d3 UK |
2308 | |
2309 | retry: | |
a1ea04b3 | 2310 | memset(cmd, 0, sizeof(*cmd)); |
cf243027 | 2311 | memcpy(&cmd->rcb, rcb, sizeof(*rcb)); |
a1ea04b3 | 2312 | INIT_LIST_HEAD(&cmd->queue); |
350bb478 | 2313 | init_completion(&cmd->cevent); |
350bb478 | 2314 | cmd->parent = afu; |
bfc0bab1 | 2315 | cmd->hwq_index = hwq->index; |
bfc0bab1 | 2316 | cmd->rcb.ctx_id = hwq->ctx_hndl; |
c21e0bbf | 2317 | |
cf243027 MO |
2318 | dev_dbg(dev, "%s: afu=%p cmd=%p type=%02x nretry=%d\n", |
2319 | __func__, afu, cmd, cmd->rcb.cdb[0], nretry); | |
c21e0bbf | 2320 | |
48b4be36 | 2321 | rc = afu->send_cmd(afu, cmd); |
539d890c UK |
2322 | if (unlikely(rc)) { |
2323 | rc = -ENOBUFS; | |
c21e0bbf | 2324 | goto out; |
539d890c | 2325 | } |
c21e0bbf | 2326 | |
9ba848ac | 2327 | rc = wait_resp(afu, cmd); |
a1ea04b3 UK |
2328 | switch (rc) { |
2329 | case -ETIMEDOUT: | |
a96851d3 | 2330 | rc = afu->context_reset(hwq); |
a1ea04b3 | 2331 | if (rc) { |
9a597cd4 UK |
2332 | /* Delete the command from pending_cmds list */ |
2333 | spin_lock_irqsave(&hwq->hsq_slock, lock_flags); | |
2334 | list_del(&cmd->list); | |
2335 | spin_unlock_irqrestore(&hwq->hsq_slock, lock_flags); | |
2336 | ||
a1ea04b3 UK |
2337 | cxlflash_schedule_async_reset(cfg); |
2338 | break; | |
2339 | } | |
df561f66 | 2340 | fallthrough; /* to retry */ |
a1ea04b3 UK |
2341 | case -EAGAIN: |
2342 | if (++nretry < 2) | |
a96851d3 | 2343 | goto retry; |
df561f66 | 2344 | fallthrough; /* to exit */ |
a1ea04b3 UK |
2345 | default: |
2346 | break; | |
a96851d3 UK |
2347 | } |
2348 | ||
cf243027 MO |
2349 | if (rcb->ioasa) |
2350 | *rcb->ioasa = cmd->sa; | |
c21e0bbf | 2351 | out: |
de01283b | 2352 | atomic_dec(&afu->cmds_active); |
e63a8d88 | 2353 | mutex_unlock(&afu->sync_active); |
350bb478 | 2354 | kfree(buf); |
fb67d44d | 2355 | dev_dbg(dev, "%s: returning rc=%d\n", __func__, rc); |
c21e0bbf MO |
2356 | return rc; |
2357 | } | |
2358 | ||
cf243027 MO |
2359 | /** |
2360 | * cxlflash_afu_sync() - builds and sends an AFU sync command | |
2361 | * @afu: AFU associated with the host. | |
2362 | * @ctx: Identifies context requesting sync. | |
2363 | * @res: Identifies resource requesting sync. | |
2364 | * @mode: Type of sync to issue (lightweight, heavyweight, global). | |
2365 | * | |
2366 | * AFU sync operations are only necessary and allowed when the device is | |
2367 | * operating normally. When not operating normally, sync requests can occur as | |
2368 | * part of cleaning up resources associated with an adapter prior to removal. | |
2369 | * In this scenario, these requests are simply ignored (safe due to the AFU | |
2370 | * going away). | |
2371 | * | |
2372 | * Return: | |
2373 | * 0 on success, -errno on failure | |
2374 | */ | |
2375 | int cxlflash_afu_sync(struct afu *afu, ctx_hndl_t ctx, res_hndl_t res, u8 mode) | |
2376 | { | |
2377 | struct cxlflash_cfg *cfg = afu->parent; | |
2378 | struct device *dev = &cfg->dev->dev; | |
2379 | struct sisl_ioarcb rcb = { 0 }; | |
2380 | ||
2381 | dev_dbg(dev, "%s: afu=%p ctx=%u res=%u mode=%u\n", | |
2382 | __func__, afu, ctx, res, mode); | |
2383 | ||
2384 | rcb.req_flags = SISL_REQ_FLAGS_AFU_CMD; | |
2385 | rcb.msi = SISL_MSI_RRQ_UPDATED; | |
2386 | rcb.timeout = MC_AFU_SYNC_TIMEOUT; | |
2387 | ||
2388 | rcb.cdb[0] = SISL_AFU_CMD_SYNC; | |
2389 | rcb.cdb[1] = mode; | |
2390 | put_unaligned_be16(ctx, &rcb.cdb[2]); | |
2391 | put_unaligned_be32(res, &rcb.cdb[4]); | |
2392 | ||
2393 | return send_afu_cmd(afu, &rcb); | |
2394 | } | |
2395 | ||
7c4c41f1 UK |
2396 | /** |
2397 | * cxlflash_eh_abort_handler() - abort a SCSI command | |
2398 | * @scp: SCSI command to abort. | |
2399 | * | |
2400 | * CXL Flash devices do not support a single command abort. Reset the context | |
2401 | * as per SISLite specification. Flush any pending commands in the hardware | |
2402 | * queue before the reset. | |
2403 | * | |
2404 | * Return: SUCCESS/FAILED as defined in scsi/scsi.h | |
2405 | */ | |
2406 | static int cxlflash_eh_abort_handler(struct scsi_cmnd *scp) | |
2407 | { | |
2408 | int rc = FAILED; | |
2409 | struct Scsi_Host *host = scp->device->host; | |
2410 | struct cxlflash_cfg *cfg = shost_priv(host); | |
2411 | struct afu_cmd *cmd = sc_to_afuc(scp); | |
2412 | struct device *dev = &cfg->dev->dev; | |
2413 | struct afu *afu = cfg->afu; | |
2414 | struct hwq *hwq = get_hwq(afu, cmd->hwq_index); | |
2415 | ||
2416 | dev_dbg(dev, "%s: (scp=%p) %d/%d/%d/%llu " | |
2417 | "cdb=(%08x-%08x-%08x-%08x)\n", __func__, scp, host->host_no, | |
2418 | scp->device->channel, scp->device->id, scp->device->lun, | |
2419 | get_unaligned_be32(&((u32 *)scp->cmnd)[0]), | |
2420 | get_unaligned_be32(&((u32 *)scp->cmnd)[1]), | |
2421 | get_unaligned_be32(&((u32 *)scp->cmnd)[2]), | |
2422 | get_unaligned_be32(&((u32 *)scp->cmnd)[3])); | |
2423 | ||
2424 | /* When the state is not normal, another reset/reload is in progress. | |
2425 | * Return failed and the mid-layer will invoke host reset handler. | |
2426 | */ | |
2427 | if (cfg->state != STATE_NORMAL) { | |
2428 | dev_dbg(dev, "%s: Invalid state for abort, state=%d\n", | |
2429 | __func__, cfg->state); | |
2430 | goto out; | |
2431 | } | |
2432 | ||
2433 | rc = afu->context_reset(hwq); | |
2434 | if (unlikely(rc)) | |
2435 | goto out; | |
2436 | ||
2437 | rc = SUCCESS; | |
2438 | ||
2439 | out: | |
2440 | dev_dbg(dev, "%s: returning rc=%d\n", __func__, rc); | |
2441 | return rc; | |
2442 | } | |
2443 | ||
15305514 MO |
2444 | /** |
2445 | * cxlflash_eh_device_reset_handler() - reset a single LUN | |
2446 | * @scp: SCSI command to send. | |
2447 | * | |
2448 | * Return: | |
2449 | * SUCCESS as defined in scsi/scsi.h | |
2450 | * FAILED as defined in scsi/scsi.h | |
2451 | */ | |
2452 | static int cxlflash_eh_device_reset_handler(struct scsi_cmnd *scp) | |
2453 | { | |
2454 | int rc = SUCCESS; | |
32abbeda MO |
2455 | struct scsi_device *sdev = scp->device; |
2456 | struct Scsi_Host *host = sdev->host; | |
fb67d44d MO |
2457 | struct cxlflash_cfg *cfg = shost_priv(host); |
2458 | struct device *dev = &cfg->dev->dev; | |
15305514 MO |
2459 | int rcr = 0; |
2460 | ||
5a4d9d77 MO |
2461 | dev_dbg(dev, "%s: %d/%d/%d/%llu\n", __func__, |
2462 | host->host_no, sdev->channel, sdev->id, sdev->lun); | |
ed486daa | 2463 | retry: |
15305514 MO |
2464 | switch (cfg->state) { |
2465 | case STATE_NORMAL: | |
32abbeda | 2466 | rcr = send_tmf(cfg, sdev, TMF_LUN_RESET); |
15305514 MO |
2467 | if (unlikely(rcr)) |
2468 | rc = FAILED; | |
2469 | break; | |
2470 | case STATE_RESET: | |
2471 | wait_event(cfg->reset_waitq, cfg->state != STATE_RESET); | |
ed486daa | 2472 | goto retry; |
15305514 MO |
2473 | default: |
2474 | rc = FAILED; | |
2475 | break; | |
2476 | } | |
2477 | ||
fb67d44d | 2478 | dev_dbg(dev, "%s: returning rc=%d\n", __func__, rc); |
15305514 MO |
2479 | return rc; |
2480 | } | |
2481 | ||
2482 | /** | |
2483 | * cxlflash_eh_host_reset_handler() - reset the host adapter | |
2484 | * @scp: SCSI command from stack identifying host. | |
2485 | * | |
1d3324c3 MO |
2486 | * Following a reset, the state is evaluated again in case an EEH occurred |
2487 | * during the reset. In such a scenario, the host reset will either yield | |
2488 | * until the EEH recovery is complete or return success or failure based | |
2489 | * upon the current device state. | |
2490 | * | |
15305514 MO |
2491 | * Return: |
2492 | * SUCCESS as defined in scsi/scsi.h | |
2493 | * FAILED as defined in scsi/scsi.h | |
2494 | */ | |
2495 | static int cxlflash_eh_host_reset_handler(struct scsi_cmnd *scp) | |
2496 | { | |
2497 | int rc = SUCCESS; | |
2498 | int rcr = 0; | |
2499 | struct Scsi_Host *host = scp->device->host; | |
fb67d44d MO |
2500 | struct cxlflash_cfg *cfg = shost_priv(host); |
2501 | struct device *dev = &cfg->dev->dev; | |
15305514 | 2502 | |
5a4d9d77 | 2503 | dev_dbg(dev, "%s: %d\n", __func__, host->host_no); |
15305514 MO |
2504 | |
2505 | switch (cfg->state) { | |
2506 | case STATE_NORMAL: | |
2507 | cfg->state = STATE_RESET; | |
f411396d | 2508 | drain_ioctls(cfg); |
15305514 MO |
2509 | cxlflash_mark_contexts_error(cfg); |
2510 | rcr = afu_reset(cfg); | |
2511 | if (rcr) { | |
2512 | rc = FAILED; | |
2513 | cfg->state = STATE_FAILTERM; | |
2514 | } else | |
2515 | cfg->state = STATE_NORMAL; | |
2516 | wake_up_all(&cfg->reset_waitq); | |
1d3324c3 | 2517 | ssleep(1); |
df561f66 | 2518 | fallthrough; |
15305514 MO |
2519 | case STATE_RESET: |
2520 | wait_event(cfg->reset_waitq, cfg->state != STATE_RESET); | |
2521 | if (cfg->state == STATE_NORMAL) | |
2522 | break; | |
df561f66 | 2523 | fallthrough; |
15305514 MO |
2524 | default: |
2525 | rc = FAILED; | |
2526 | break; | |
2527 | } | |
2528 | ||
fb67d44d | 2529 | dev_dbg(dev, "%s: returning rc=%d\n", __func__, rc); |
15305514 MO |
2530 | return rc; |
2531 | } | |
2532 | ||
2533 | /** | |
2534 | * cxlflash_change_queue_depth() - change the queue depth for the device | |
2535 | * @sdev: SCSI device destined for queue depth change. | |
2536 | * @qdepth: Requested queue depth value to set. | |
2537 | * | |
2538 | * The requested queue depth is capped to the maximum supported value. | |
2539 | * | |
2540 | * Return: The actual queue depth set. | |
2541 | */ | |
2542 | static int cxlflash_change_queue_depth(struct scsi_device *sdev, int qdepth) | |
2543 | { | |
2544 | ||
2545 | if (qdepth > CXLFLASH_MAX_CMDS_PER_LUN) | |
2546 | qdepth = CXLFLASH_MAX_CMDS_PER_LUN; | |
2547 | ||
2548 | scsi_change_queue_depth(sdev, qdepth); | |
2549 | return sdev->queue_depth; | |
2550 | } | |
2551 | ||
2552 | /** | |
2553 | * cxlflash_show_port_status() - queries and presents the current port status | |
e0f01a21 | 2554 | * @port: Desired port for status reporting. |
3b225cd3 | 2555 | * @cfg: Internal structure associated with the host. |
15305514 MO |
2556 | * @buf: Buffer of length PAGE_SIZE to report back port status in ASCII. |
2557 | * | |
78ae028e | 2558 | * Return: The size of the ASCII string returned in @buf or -EINVAL. |
15305514 | 2559 | */ |
3b225cd3 MO |
2560 | static ssize_t cxlflash_show_port_status(u32 port, |
2561 | struct cxlflash_cfg *cfg, | |
2562 | char *buf) | |
15305514 | 2563 | { |
78ae028e | 2564 | struct device *dev = &cfg->dev->dev; |
15305514 | 2565 | char *disp_status; |
15305514 | 2566 | u64 status; |
0aa14887 | 2567 | __be64 __iomem *fc_port_regs; |
15305514 | 2568 | |
78ae028e MO |
2569 | WARN_ON(port >= MAX_FC_PORTS); |
2570 | ||
2571 | if (port >= cfg->num_fc_ports) { | |
2572 | dev_info(dev, "%s: Port %d not supported on this card.\n", | |
2573 | __func__, port); | |
2574 | return -EINVAL; | |
2575 | } | |
15305514 | 2576 | |
0aa14887 MO |
2577 | fc_port_regs = get_fc_port_regs(cfg, port); |
2578 | status = readq_be(&fc_port_regs[FC_MTIP_STATUS / 8]); | |
e0f01a21 | 2579 | status &= FC_MTIP_STATUS_MASK; |
15305514 MO |
2580 | |
2581 | if (status == FC_MTIP_STATUS_ONLINE) | |
2582 | disp_status = "online"; | |
2583 | else if (status == FC_MTIP_STATUS_OFFLINE) | |
2584 | disp_status = "offline"; | |
2585 | else | |
2586 | disp_status = "unknown"; | |
2587 | ||
e0f01a21 MO |
2588 | return scnprintf(buf, PAGE_SIZE, "%s\n", disp_status); |
2589 | } | |
2590 | ||
2591 | /** | |
2592 | * port0_show() - queries and presents the current status of port 0 | |
2593 | * @dev: Generic device associated with the host owning the port. | |
2594 | * @attr: Device attribute representing the port. | |
2595 | * @buf: Buffer of length PAGE_SIZE to report back port status in ASCII. | |
2596 | * | |
2597 | * Return: The size of the ASCII string returned in @buf. | |
2598 | */ | |
2599 | static ssize_t port0_show(struct device *dev, | |
2600 | struct device_attribute *attr, | |
2601 | char *buf) | |
2602 | { | |
fb67d44d | 2603 | struct cxlflash_cfg *cfg = shost_priv(class_to_shost(dev)); |
e0f01a21 | 2604 | |
3b225cd3 | 2605 | return cxlflash_show_port_status(0, cfg, buf); |
15305514 MO |
2606 | } |
2607 | ||
2608 | /** | |
e0f01a21 MO |
2609 | * port1_show() - queries and presents the current status of port 1 |
2610 | * @dev: Generic device associated with the host owning the port. | |
2611 | * @attr: Device attribute representing the port. | |
2612 | * @buf: Buffer of length PAGE_SIZE to report back port status in ASCII. | |
2613 | * | |
2614 | * Return: The size of the ASCII string returned in @buf. | |
2615 | */ | |
2616 | static ssize_t port1_show(struct device *dev, | |
2617 | struct device_attribute *attr, | |
2618 | char *buf) | |
2619 | { | |
fb67d44d | 2620 | struct cxlflash_cfg *cfg = shost_priv(class_to_shost(dev)); |
e0f01a21 | 2621 | |
3b225cd3 | 2622 | return cxlflash_show_port_status(1, cfg, buf); |
e0f01a21 MO |
2623 | } |
2624 | ||
1cd7fabc MO |
2625 | /** |
2626 | * port2_show() - queries and presents the current status of port 2 | |
2627 | * @dev: Generic device associated with the host owning the port. | |
2628 | * @attr: Device attribute representing the port. | |
2629 | * @buf: Buffer of length PAGE_SIZE to report back port status in ASCII. | |
2630 | * | |
2631 | * Return: The size of the ASCII string returned in @buf. | |
2632 | */ | |
2633 | static ssize_t port2_show(struct device *dev, | |
2634 | struct device_attribute *attr, | |
2635 | char *buf) | |
2636 | { | |
2637 | struct cxlflash_cfg *cfg = shost_priv(class_to_shost(dev)); | |
2638 | ||
2639 | return cxlflash_show_port_status(2, cfg, buf); | |
2640 | } | |
2641 | ||
2642 | /** | |
2643 | * port3_show() - queries and presents the current status of port 3 | |
2644 | * @dev: Generic device associated with the host owning the port. | |
2645 | * @attr: Device attribute representing the port. | |
2646 | * @buf: Buffer of length PAGE_SIZE to report back port status in ASCII. | |
2647 | * | |
2648 | * Return: The size of the ASCII string returned in @buf. | |
2649 | */ | |
2650 | static ssize_t port3_show(struct device *dev, | |
2651 | struct device_attribute *attr, | |
2652 | char *buf) | |
2653 | { | |
2654 | struct cxlflash_cfg *cfg = shost_priv(class_to_shost(dev)); | |
2655 | ||
2656 | return cxlflash_show_port_status(3, cfg, buf); | |
2657 | } | |
2658 | ||
e0f01a21 MO |
2659 | /** |
2660 | * lun_mode_show() - presents the current LUN mode of the host | |
15305514 | 2661 | * @dev: Generic device associated with the host. |
e0f01a21 | 2662 | * @attr: Device attribute representing the LUN mode. |
15305514 MO |
2663 | * @buf: Buffer of length PAGE_SIZE to report back the LUN mode in ASCII. |
2664 | * | |
2665 | * Return: The size of the ASCII string returned in @buf. | |
2666 | */ | |
e0f01a21 MO |
2667 | static ssize_t lun_mode_show(struct device *dev, |
2668 | struct device_attribute *attr, char *buf) | |
15305514 | 2669 | { |
fb67d44d | 2670 | struct cxlflash_cfg *cfg = shost_priv(class_to_shost(dev)); |
15305514 MO |
2671 | struct afu *afu = cfg->afu; |
2672 | ||
e0f01a21 | 2673 | return scnprintf(buf, PAGE_SIZE, "%u\n", afu->internal_lun); |
15305514 MO |
2674 | } |
2675 | ||
2676 | /** | |
e0f01a21 | 2677 | * lun_mode_store() - sets the LUN mode of the host |
15305514 | 2678 | * @dev: Generic device associated with the host. |
e0f01a21 | 2679 | * @attr: Device attribute representing the LUN mode. |
15305514 MO |
2680 | * @buf: Buffer of length PAGE_SIZE containing the LUN mode in ASCII. |
2681 | * @count: Length of data resizing in @buf. | |
2682 | * | |
2683 | * The CXL Flash AFU supports a dummy LUN mode where the external | |
2684 | * links and storage are not required. Space on the FPGA is used | |
2685 | * to create 1 or 2 small LUNs which are presented to the system | |
2686 | * as if they were a normal storage device. This feature is useful | |
2687 | * during development and also provides manufacturing with a way | |
2688 | * to test the AFU without an actual device. | |
2689 | * | |
2690 | * 0 = external LUN[s] (default) | |
2691 | * 1 = internal LUN (1 x 64K, 512B blocks, id 0) | |
2692 | * 2 = internal LUN (1 x 64K, 4K blocks, id 0) | |
2693 | * 3 = internal LUN (2 x 32K, 512B blocks, ids 0,1) | |
2694 | * 4 = internal LUN (2 x 32K, 4K blocks, ids 0,1) | |
2695 | * | |
2696 | * Return: The size of the ASCII string returned in @buf. | |
2697 | */ | |
e0f01a21 MO |
2698 | static ssize_t lun_mode_store(struct device *dev, |
2699 | struct device_attribute *attr, | |
2700 | const char *buf, size_t count) | |
15305514 MO |
2701 | { |
2702 | struct Scsi_Host *shost = class_to_shost(dev); | |
fb67d44d | 2703 | struct cxlflash_cfg *cfg = shost_priv(shost); |
15305514 MO |
2704 | struct afu *afu = cfg->afu; |
2705 | int rc; | |
2706 | u32 lun_mode; | |
2707 | ||
2708 | rc = kstrtouint(buf, 10, &lun_mode); | |
2709 | if (!rc && (lun_mode < 5) && (lun_mode != afu->internal_lun)) { | |
2710 | afu->internal_lun = lun_mode; | |
603ecce9 MK |
2711 | |
2712 | /* | |
2713 | * When configured for internal LUN, there is only one channel, | |
78ae028e MO |
2714 | * channel number 0, else there will be one less than the number |
2715 | * of fc ports for this card. | |
603ecce9 MK |
2716 | */ |
2717 | if (afu->internal_lun) | |
2718 | shost->max_channel = 0; | |
2719 | else | |
8fa4f177 | 2720 | shost->max_channel = PORTNUM2CHAN(cfg->num_fc_ports); |
603ecce9 | 2721 | |
15305514 MO |
2722 | afu_reset(cfg); |
2723 | scsi_scan_host(cfg->host); | |
2724 | } | |
2725 | ||
2726 | return count; | |
2727 | } | |
2728 | ||
2729 | /** | |
e0f01a21 | 2730 | * ioctl_version_show() - presents the current ioctl version of the host |
15305514 MO |
2731 | * @dev: Generic device associated with the host. |
2732 | * @attr: Device attribute representing the ioctl version. | |
2733 | * @buf: Buffer of length PAGE_SIZE to report back the ioctl version. | |
2734 | * | |
2735 | * Return: The size of the ASCII string returned in @buf. | |
2736 | */ | |
e0f01a21 MO |
2737 | static ssize_t ioctl_version_show(struct device *dev, |
2738 | struct device_attribute *attr, char *buf) | |
15305514 | 2739 | { |
d6e32f53 MO |
2740 | ssize_t bytes = 0; |
2741 | ||
2742 | bytes = scnprintf(buf, PAGE_SIZE, | |
2743 | "disk: %u\n", DK_CXLFLASH_VERSION_0); | |
2744 | bytes += scnprintf(buf + bytes, PAGE_SIZE - bytes, | |
2745 | "host: %u\n", HT_CXLFLASH_VERSION_0); | |
2746 | ||
2747 | return bytes; | |
15305514 MO |
2748 | } |
2749 | ||
2750 | /** | |
e0f01a21 MO |
2751 | * cxlflash_show_port_lun_table() - queries and presents the port LUN table |
2752 | * @port: Desired port for status reporting. | |
3b225cd3 | 2753 | * @cfg: Internal structure associated with the host. |
e0f01a21 MO |
2754 | * @buf: Buffer of length PAGE_SIZE to report back port status in ASCII. |
2755 | * | |
78ae028e | 2756 | * Return: The size of the ASCII string returned in @buf or -EINVAL. |
e0f01a21 MO |
2757 | */ |
2758 | static ssize_t cxlflash_show_port_lun_table(u32 port, | |
3b225cd3 | 2759 | struct cxlflash_cfg *cfg, |
e0f01a21 MO |
2760 | char *buf) |
2761 | { | |
78ae028e | 2762 | struct device *dev = &cfg->dev->dev; |
0aa14887 | 2763 | __be64 __iomem *fc_port_luns; |
e0f01a21 MO |
2764 | int i; |
2765 | ssize_t bytes = 0; | |
e0f01a21 | 2766 | |
78ae028e MO |
2767 | WARN_ON(port >= MAX_FC_PORTS); |
2768 | ||
2769 | if (port >= cfg->num_fc_ports) { | |
2770 | dev_info(dev, "%s: Port %d not supported on this card.\n", | |
2771 | __func__, port); | |
2772 | return -EINVAL; | |
2773 | } | |
e0f01a21 | 2774 | |
0aa14887 | 2775 | fc_port_luns = get_fc_port_luns(cfg, port); |
e0f01a21 MO |
2776 | |
2777 | for (i = 0; i < CXLFLASH_NUM_VLUNS; i++) | |
2778 | bytes += scnprintf(buf + bytes, PAGE_SIZE - bytes, | |
0aa14887 MO |
2779 | "%03d: %016llx\n", |
2780 | i, readq_be(&fc_port_luns[i])); | |
e0f01a21 MO |
2781 | return bytes; |
2782 | } | |
2783 | ||
2784 | /** | |
2785 | * port0_lun_table_show() - presents the current LUN table of port 0 | |
2786 | * @dev: Generic device associated with the host owning the port. | |
2787 | * @attr: Device attribute representing the port. | |
2788 | * @buf: Buffer of length PAGE_SIZE to report back port status in ASCII. | |
2789 | * | |
2790 | * Return: The size of the ASCII string returned in @buf. | |
2791 | */ | |
2792 | static ssize_t port0_lun_table_show(struct device *dev, | |
2793 | struct device_attribute *attr, | |
2794 | char *buf) | |
2795 | { | |
fb67d44d | 2796 | struct cxlflash_cfg *cfg = shost_priv(class_to_shost(dev)); |
e0f01a21 | 2797 | |
3b225cd3 | 2798 | return cxlflash_show_port_lun_table(0, cfg, buf); |
e0f01a21 MO |
2799 | } |
2800 | ||
2801 | /** | |
2802 | * port1_lun_table_show() - presents the current LUN table of port 1 | |
2803 | * @dev: Generic device associated with the host owning the port. | |
2804 | * @attr: Device attribute representing the port. | |
2805 | * @buf: Buffer of length PAGE_SIZE to report back port status in ASCII. | |
2806 | * | |
2807 | * Return: The size of the ASCII string returned in @buf. | |
2808 | */ | |
2809 | static ssize_t port1_lun_table_show(struct device *dev, | |
2810 | struct device_attribute *attr, | |
2811 | char *buf) | |
2812 | { | |
fb67d44d | 2813 | struct cxlflash_cfg *cfg = shost_priv(class_to_shost(dev)); |
e0f01a21 | 2814 | |
3b225cd3 | 2815 | return cxlflash_show_port_lun_table(1, cfg, buf); |
e0f01a21 MO |
2816 | } |
2817 | ||
1cd7fabc MO |
2818 | /** |
2819 | * port2_lun_table_show() - presents the current LUN table of port 2 | |
2820 | * @dev: Generic device associated with the host owning the port. | |
2821 | * @attr: Device attribute representing the port. | |
2822 | * @buf: Buffer of length PAGE_SIZE to report back port status in ASCII. | |
2823 | * | |
2824 | * Return: The size of the ASCII string returned in @buf. | |
2825 | */ | |
2826 | static ssize_t port2_lun_table_show(struct device *dev, | |
2827 | struct device_attribute *attr, | |
2828 | char *buf) | |
2829 | { | |
2830 | struct cxlflash_cfg *cfg = shost_priv(class_to_shost(dev)); | |
2831 | ||
2832 | return cxlflash_show_port_lun_table(2, cfg, buf); | |
2833 | } | |
2834 | ||
2835 | /** | |
2836 | * port3_lun_table_show() - presents the current LUN table of port 3 | |
2837 | * @dev: Generic device associated with the host owning the port. | |
2838 | * @attr: Device attribute representing the port. | |
2839 | * @buf: Buffer of length PAGE_SIZE to report back port status in ASCII. | |
2840 | * | |
2841 | * Return: The size of the ASCII string returned in @buf. | |
2842 | */ | |
2843 | static ssize_t port3_lun_table_show(struct device *dev, | |
2844 | struct device_attribute *attr, | |
2845 | char *buf) | |
2846 | { | |
2847 | struct cxlflash_cfg *cfg = shost_priv(class_to_shost(dev)); | |
2848 | ||
2849 | return cxlflash_show_port_lun_table(3, cfg, buf); | |
2850 | } | |
2851 | ||
cba06e6d MO |
2852 | /** |
2853 | * irqpoll_weight_show() - presents the current IRQ poll weight for the host | |
2854 | * @dev: Generic device associated with the host. | |
2855 | * @attr: Device attribute representing the IRQ poll weight. | |
2856 | * @buf: Buffer of length PAGE_SIZE to report back the current IRQ poll | |
2857 | * weight in ASCII. | |
2858 | * | |
2859 | * An IRQ poll weight of 0 indicates polling is disabled. | |
2860 | * | |
2861 | * Return: The size of the ASCII string returned in @buf. | |
2862 | */ | |
2863 | static ssize_t irqpoll_weight_show(struct device *dev, | |
2864 | struct device_attribute *attr, char *buf) | |
2865 | { | |
2866 | struct cxlflash_cfg *cfg = shost_priv(class_to_shost(dev)); | |
2867 | struct afu *afu = cfg->afu; | |
2868 | ||
2869 | return scnprintf(buf, PAGE_SIZE, "%u\n", afu->irqpoll_weight); | |
2870 | } | |
2871 | ||
2872 | /** | |
2873 | * irqpoll_weight_store() - sets the current IRQ poll weight for the host | |
2874 | * @dev: Generic device associated with the host. | |
2875 | * @attr: Device attribute representing the IRQ poll weight. | |
2876 | * @buf: Buffer of length PAGE_SIZE containing the desired IRQ poll | |
2877 | * weight in ASCII. | |
2878 | * @count: Length of data resizing in @buf. | |
2879 | * | |
2880 | * An IRQ poll weight of 0 indicates polling is disabled. | |
2881 | * | |
2882 | * Return: The size of the ASCII string returned in @buf. | |
2883 | */ | |
2884 | static ssize_t irqpoll_weight_store(struct device *dev, | |
2885 | struct device_attribute *attr, | |
2886 | const char *buf, size_t count) | |
2887 | { | |
2888 | struct cxlflash_cfg *cfg = shost_priv(class_to_shost(dev)); | |
2889 | struct device *cfgdev = &cfg->dev->dev; | |
2890 | struct afu *afu = cfg->afu; | |
bfc0bab1 | 2891 | struct hwq *hwq; |
cba06e6d | 2892 | u32 weight; |
bfc0bab1 | 2893 | int rc, i; |
cba06e6d MO |
2894 | |
2895 | rc = kstrtouint(buf, 10, &weight); | |
2896 | if (rc) | |
2897 | return -EINVAL; | |
2898 | ||
2899 | if (weight > 256) { | |
2900 | dev_info(cfgdev, | |
2901 | "Invalid IRQ poll weight. It must be 256 or less.\n"); | |
2902 | return -EINVAL; | |
2903 | } | |
2904 | ||
2905 | if (weight == afu->irqpoll_weight) { | |
2906 | dev_info(cfgdev, | |
2907 | "Current IRQ poll weight has the same weight.\n"); | |
2908 | return -EINVAL; | |
2909 | } | |
2910 | ||
bfc0bab1 | 2911 | if (afu_is_irqpoll_enabled(afu)) { |
3065267a | 2912 | for (i = 0; i < afu->num_hwqs; i++) { |
bfc0bab1 UK |
2913 | hwq = get_hwq(afu, i); |
2914 | ||
2915 | irq_poll_disable(&hwq->irqpoll); | |
2916 | } | |
2917 | } | |
cba06e6d MO |
2918 | |
2919 | afu->irqpoll_weight = weight; | |
2920 | ||
bfc0bab1 | 2921 | if (weight > 0) { |
3065267a | 2922 | for (i = 0; i < afu->num_hwqs; i++) { |
bfc0bab1 UK |
2923 | hwq = get_hwq(afu, i); |
2924 | ||
2925 | irq_poll_init(&hwq->irqpoll, weight, cxlflash_irqpoll); | |
2926 | } | |
2927 | } | |
cba06e6d MO |
2928 | |
2929 | return count; | |
2930 | } | |
2931 | ||
3065267a MO |
2932 | /** |
2933 | * num_hwqs_show() - presents the number of hardware queues for the host | |
2934 | * @dev: Generic device associated with the host. | |
2935 | * @attr: Device attribute representing the number of hardware queues. | |
2936 | * @buf: Buffer of length PAGE_SIZE to report back the number of hardware | |
2937 | * queues in ASCII. | |
2938 | * | |
2939 | * Return: The size of the ASCII string returned in @buf. | |
2940 | */ | |
2941 | static ssize_t num_hwqs_show(struct device *dev, | |
2942 | struct device_attribute *attr, char *buf) | |
2943 | { | |
2944 | struct cxlflash_cfg *cfg = shost_priv(class_to_shost(dev)); | |
2945 | struct afu *afu = cfg->afu; | |
2946 | ||
2947 | return scnprintf(buf, PAGE_SIZE, "%u\n", afu->num_hwqs); | |
2948 | } | |
2949 | ||
2950 | /** | |
2951 | * num_hwqs_store() - sets the number of hardware queues for the host | |
2952 | * @dev: Generic device associated with the host. | |
2953 | * @attr: Device attribute representing the number of hardware queues. | |
2954 | * @buf: Buffer of length PAGE_SIZE containing the number of hardware | |
2955 | * queues in ASCII. | |
2956 | * @count: Length of data resizing in @buf. | |
2957 | * | |
2958 | * n > 0: num_hwqs = n | |
2959 | * n = 0: num_hwqs = num_online_cpus() | |
2960 | * n < 0: num_online_cpus() / abs(n) | |
2961 | * | |
2962 | * Return: The size of the ASCII string returned in @buf. | |
2963 | */ | |
2964 | static ssize_t num_hwqs_store(struct device *dev, | |
2965 | struct device_attribute *attr, | |
2966 | const char *buf, size_t count) | |
2967 | { | |
2968 | struct cxlflash_cfg *cfg = shost_priv(class_to_shost(dev)); | |
2969 | struct afu *afu = cfg->afu; | |
2970 | int rc; | |
2971 | int nhwqs, num_hwqs; | |
2972 | ||
2973 | rc = kstrtoint(buf, 10, &nhwqs); | |
2974 | if (rc) | |
2975 | return -EINVAL; | |
2976 | ||
2977 | if (nhwqs >= 1) | |
2978 | num_hwqs = nhwqs; | |
2979 | else if (nhwqs == 0) | |
2980 | num_hwqs = num_online_cpus(); | |
2981 | else | |
2982 | num_hwqs = num_online_cpus() / abs(nhwqs); | |
2983 | ||
2984 | afu->desired_hwqs = min(num_hwqs, CXLFLASH_MAX_HWQS); | |
2985 | WARN_ON_ONCE(afu->desired_hwqs == 0); | |
2986 | ||
2987 | retry: | |
2988 | switch (cfg->state) { | |
2989 | case STATE_NORMAL: | |
2990 | cfg->state = STATE_RESET; | |
2991 | drain_ioctls(cfg); | |
2992 | cxlflash_mark_contexts_error(cfg); | |
2993 | rc = afu_reset(cfg); | |
2994 | if (rc) | |
2995 | cfg->state = STATE_FAILTERM; | |
2996 | else | |
2997 | cfg->state = STATE_NORMAL; | |
2998 | wake_up_all(&cfg->reset_waitq); | |
2999 | break; | |
3000 | case STATE_RESET: | |
3001 | wait_event(cfg->reset_waitq, cfg->state != STATE_RESET); | |
3002 | if (cfg->state == STATE_NORMAL) | |
3003 | goto retry; | |
df561f66 | 3004 | fallthrough; |
3065267a MO |
3005 | default: |
3006 | /* Ideally should not happen */ | |
3007 | dev_err(dev, "%s: Device is not ready, state=%d\n", | |
3008 | __func__, cfg->state); | |
3009 | break; | |
3010 | } | |
3011 | ||
3012 | return count; | |
3013 | } | |
3014 | ||
1dd0c0e4 MO |
3015 | static const char *hwq_mode_name[MAX_HWQ_MODE] = { "rr", "tag", "cpu" }; |
3016 | ||
3017 | /** | |
3018 | * hwq_mode_show() - presents the HWQ steering mode for the host | |
3019 | * @dev: Generic device associated with the host. | |
3020 | * @attr: Device attribute representing the HWQ steering mode. | |
3021 | * @buf: Buffer of length PAGE_SIZE to report back the HWQ steering mode | |
3022 | * as a character string. | |
3023 | * | |
3024 | * Return: The size of the ASCII string returned in @buf. | |
3025 | */ | |
3026 | static ssize_t hwq_mode_show(struct device *dev, | |
3027 | struct device_attribute *attr, char *buf) | |
3028 | { | |
3029 | struct cxlflash_cfg *cfg = shost_priv(class_to_shost(dev)); | |
3030 | struct afu *afu = cfg->afu; | |
3031 | ||
3032 | return scnprintf(buf, PAGE_SIZE, "%s\n", hwq_mode_name[afu->hwq_mode]); | |
3033 | } | |
3034 | ||
3035 | /** | |
3036 | * hwq_mode_store() - sets the HWQ steering mode for the host | |
3037 | * @dev: Generic device associated with the host. | |
3038 | * @attr: Device attribute representing the HWQ steering mode. | |
3039 | * @buf: Buffer of length PAGE_SIZE containing the HWQ steering mode | |
3040 | * as a character string. | |
3041 | * @count: Length of data resizing in @buf. | |
3042 | * | |
3043 | * rr = Round-Robin | |
3044 | * tag = Block MQ Tagging | |
3045 | * cpu = CPU Affinity | |
3046 | * | |
3047 | * Return: The size of the ASCII string returned in @buf. | |
3048 | */ | |
3049 | static ssize_t hwq_mode_store(struct device *dev, | |
3050 | struct device_attribute *attr, | |
3051 | const char *buf, size_t count) | |
3052 | { | |
3053 | struct Scsi_Host *shost = class_to_shost(dev); | |
3054 | struct cxlflash_cfg *cfg = shost_priv(shost); | |
3055 | struct device *cfgdev = &cfg->dev->dev; | |
3056 | struct afu *afu = cfg->afu; | |
3057 | int i; | |
3058 | u32 mode = MAX_HWQ_MODE; | |
3059 | ||
3060 | for (i = 0; i < MAX_HWQ_MODE; i++) { | |
3061 | if (!strncmp(hwq_mode_name[i], buf, strlen(hwq_mode_name[i]))) { | |
3062 | mode = i; | |
3063 | break; | |
3064 | } | |
3065 | } | |
3066 | ||
3067 | if (mode >= MAX_HWQ_MODE) { | |
3068 | dev_info(cfgdev, "Invalid HWQ steering mode.\n"); | |
3069 | return -EINVAL; | |
3070 | } | |
3071 | ||
1dd0c0e4 MO |
3072 | afu->hwq_mode = mode; |
3073 | ||
3074 | return count; | |
3075 | } | |
3076 | ||
e0f01a21 MO |
3077 | /** |
3078 | * mode_show() - presents the current mode of the device | |
15305514 MO |
3079 | * @dev: Generic device associated with the device. |
3080 | * @attr: Device attribute representing the device mode. | |
3081 | * @buf: Buffer of length PAGE_SIZE to report back the dev mode in ASCII. | |
3082 | * | |
3083 | * Return: The size of the ASCII string returned in @buf. | |
3084 | */ | |
e0f01a21 MO |
3085 | static ssize_t mode_show(struct device *dev, |
3086 | struct device_attribute *attr, char *buf) | |
15305514 MO |
3087 | { |
3088 | struct scsi_device *sdev = to_scsi_device(dev); | |
3089 | ||
e0f01a21 MO |
3090 | return scnprintf(buf, PAGE_SIZE, "%s\n", |
3091 | sdev->hostdata ? "superpipe" : "legacy"); | |
15305514 MO |
3092 | } |
3093 | ||
3094 | /* | |
3095 | * Host attributes | |
3096 | */ | |
e0f01a21 MO |
3097 | static DEVICE_ATTR_RO(port0); |
3098 | static DEVICE_ATTR_RO(port1); | |
1cd7fabc MO |
3099 | static DEVICE_ATTR_RO(port2); |
3100 | static DEVICE_ATTR_RO(port3); | |
e0f01a21 MO |
3101 | static DEVICE_ATTR_RW(lun_mode); |
3102 | static DEVICE_ATTR_RO(ioctl_version); | |
3103 | static DEVICE_ATTR_RO(port0_lun_table); | |
3104 | static DEVICE_ATTR_RO(port1_lun_table); | |
1cd7fabc MO |
3105 | static DEVICE_ATTR_RO(port2_lun_table); |
3106 | static DEVICE_ATTR_RO(port3_lun_table); | |
cba06e6d | 3107 | static DEVICE_ATTR_RW(irqpoll_weight); |
3065267a | 3108 | static DEVICE_ATTR_RW(num_hwqs); |
1dd0c0e4 | 3109 | static DEVICE_ATTR_RW(hwq_mode); |
15305514 | 3110 | |
780c6789 BVA |
3111 | static struct attribute *cxlflash_host_attrs[] = { |
3112 | &dev_attr_port0.attr, | |
3113 | &dev_attr_port1.attr, | |
3114 | &dev_attr_port2.attr, | |
3115 | &dev_attr_port3.attr, | |
3116 | &dev_attr_lun_mode.attr, | |
3117 | &dev_attr_ioctl_version.attr, | |
3118 | &dev_attr_port0_lun_table.attr, | |
3119 | &dev_attr_port1_lun_table.attr, | |
3120 | &dev_attr_port2_lun_table.attr, | |
3121 | &dev_attr_port3_lun_table.attr, | |
3122 | &dev_attr_irqpoll_weight.attr, | |
3123 | &dev_attr_num_hwqs.attr, | |
3124 | &dev_attr_hwq_mode.attr, | |
15305514 MO |
3125 | NULL |
3126 | }; | |
3127 | ||
780c6789 BVA |
3128 | ATTRIBUTE_GROUPS(cxlflash_host); |
3129 | ||
15305514 MO |
3130 | /* |
3131 | * Device attributes | |
3132 | */ | |
e0f01a21 | 3133 | static DEVICE_ATTR_RO(mode); |
15305514 | 3134 | |
780c6789 BVA |
3135 | static struct attribute *cxlflash_dev_attrs[] = { |
3136 | &dev_attr_mode.attr, | |
15305514 MO |
3137 | NULL |
3138 | }; | |
3139 | ||
780c6789 BVA |
3140 | ATTRIBUTE_GROUPS(cxlflash_dev); |
3141 | ||
15305514 MO |
3142 | /* |
3143 | * Host template | |
3144 | */ | |
3145 | static struct scsi_host_template driver_template = { | |
3146 | .module = THIS_MODULE, | |
3147 | .name = CXLFLASH_ADAPTER_NAME, | |
3148 | .info = cxlflash_driver_info, | |
3149 | .ioctl = cxlflash_ioctl, | |
3150 | .proc_name = CXLFLASH_NAME, | |
3151 | .queuecommand = cxlflash_queuecommand, | |
7c4c41f1 | 3152 | .eh_abort_handler = cxlflash_eh_abort_handler, |
15305514 MO |
3153 | .eh_device_reset_handler = cxlflash_eh_device_reset_handler, |
3154 | .eh_host_reset_handler = cxlflash_eh_host_reset_handler, | |
3155 | .change_queue_depth = cxlflash_change_queue_depth, | |
83430833 | 3156 | .cmd_per_lun = CXLFLASH_MAX_CMDS_PER_LUN, |
15305514 | 3157 | .can_queue = CXLFLASH_MAX_CMDS, |
5fbb96c8 | 3158 | .cmd_size = sizeof(struct afu_cmd) + __alignof__(struct afu_cmd) - 1, |
15305514 | 3159 | .this_id = -1, |
68ab2d76 | 3160 | .sg_tablesize = 1, /* No scatter gather support */ |
15305514 | 3161 | .max_sectors = CXLFLASH_MAX_SECTORS, |
780c6789 BVA |
3162 | .shost_groups = cxlflash_host_groups, |
3163 | .sdev_groups = cxlflash_dev_groups, | |
15305514 MO |
3164 | }; |
3165 | ||
3166 | /* | |
3167 | * Device dependent values | |
3168 | */ | |
96e1b660 | 3169 | static struct dev_dependent_vals dev_corsa_vals = { CXLFLASH_MAX_SECTORS, |
0d419130 | 3170 | CXLFLASH_WWPN_VPD_REQUIRED }; |
96e1b660 | 3171 | static struct dev_dependent_vals dev_flash_gt_vals = { CXLFLASH_MAX_SECTORS, |
704c4b0d | 3172 | CXLFLASH_NOTIFY_SHUTDOWN }; |
94344520 | 3173 | static struct dev_dependent_vals dev_briard_vals = { CXLFLASH_MAX_SECTORS, |
07d0c52f UK |
3174 | (CXLFLASH_NOTIFY_SHUTDOWN | |
3175 | CXLFLASH_OCXL_DEV) }; | |
15305514 MO |
3176 | |
3177 | /* | |
3178 | * PCI device binding table | |
3179 | */ | |
3180 | static struct pci_device_id cxlflash_pci_table[] = { | |
3181 | {PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CORSA, | |
3182 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, (kernel_ulong_t)&dev_corsa_vals}, | |
a2746fb1 MK |
3183 | {PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_FLASH_GT, |
3184 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, (kernel_ulong_t)&dev_flash_gt_vals}, | |
94344520 MO |
3185 | {PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_BRIARD, |
3186 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, (kernel_ulong_t)&dev_briard_vals}, | |
15305514 MO |
3187 | {} |
3188 | }; | |
3189 | ||
3190 | MODULE_DEVICE_TABLE(pci, cxlflash_pci_table); | |
3191 | ||
c21e0bbf MO |
3192 | /** |
3193 | * cxlflash_worker_thread() - work thread handler for the AFU | |
3194 | * @work: Work structure contained within cxlflash associated with host. | |
3195 | * | |
3196 | * Handles the following events: | |
3197 | * - Link reset which cannot be performed on interrupt context due to | |
3198 | * blocking up to a few seconds | |
ef51074a | 3199 | * - Rescan the host |
c21e0bbf MO |
3200 | */ |
3201 | static void cxlflash_worker_thread(struct work_struct *work) | |
3202 | { | |
5cdac81a MO |
3203 | struct cxlflash_cfg *cfg = container_of(work, struct cxlflash_cfg, |
3204 | work_q); | |
c21e0bbf | 3205 | struct afu *afu = cfg->afu; |
4392ba49 | 3206 | struct device *dev = &cfg->dev->dev; |
0aa14887 | 3207 | __be64 __iomem *fc_port_regs; |
c21e0bbf MO |
3208 | int port; |
3209 | ulong lock_flags; | |
3210 | ||
5cdac81a MO |
3211 | /* Avoid MMIO if the device has failed */ |
3212 | ||
3213 | if (cfg->state != STATE_NORMAL) | |
3214 | return; | |
3215 | ||
c21e0bbf MO |
3216 | spin_lock_irqsave(cfg->host->host_lock, lock_flags); |
3217 | ||
3218 | if (cfg->lr_state == LINK_RESET_REQUIRED) { | |
3219 | port = cfg->lr_port; | |
3220 | if (port < 0) | |
4392ba49 MO |
3221 | dev_err(dev, "%s: invalid port index %d\n", |
3222 | __func__, port); | |
c21e0bbf MO |
3223 | else { |
3224 | spin_unlock_irqrestore(cfg->host->host_lock, | |
3225 | lock_flags); | |
3226 | ||
3227 | /* The reset can block... */ | |
0aa14887 MO |
3228 | fc_port_regs = get_fc_port_regs(cfg, port); |
3229 | afu_link_reset(afu, port, fc_port_regs); | |
c21e0bbf MO |
3230 | spin_lock_irqsave(cfg->host->host_lock, lock_flags); |
3231 | } | |
3232 | ||
3233 | cfg->lr_state = LINK_RESET_COMPLETE; | |
3234 | } | |
3235 | ||
c21e0bbf | 3236 | spin_unlock_irqrestore(cfg->host->host_lock, lock_flags); |
ef51074a MO |
3237 | |
3238 | if (atomic_dec_if_positive(&cfg->scan_host_needed) >= 0) | |
3239 | scsi_scan_host(cfg->host); | |
c21e0bbf MO |
3240 | } |
3241 | ||
a834a36b UK |
3242 | /** |
3243 | * cxlflash_chr_open() - character device open handler | |
3244 | * @inode: Device inode associated with this character device. | |
3245 | * @file: File pointer for this device. | |
3246 | * | |
3247 | * Only users with admin privileges are allowed to open the character device. | |
3248 | * | |
3249 | * Return: 0 on success, -errno on failure | |
3250 | */ | |
3251 | static int cxlflash_chr_open(struct inode *inode, struct file *file) | |
3252 | { | |
3253 | struct cxlflash_cfg *cfg; | |
3254 | ||
3255 | if (!capable(CAP_SYS_ADMIN)) | |
3256 | return -EACCES; | |
3257 | ||
3258 | cfg = container_of(inode->i_cdev, struct cxlflash_cfg, cdev); | |
3259 | file->private_data = cfg; | |
3260 | ||
3261 | return 0; | |
3262 | } | |
3263 | ||
d6e32f53 MO |
3264 | /** |
3265 | * decode_hioctl() - translates encoded host ioctl to easily identifiable string | |
3266 | * @cmd: The host ioctl command to decode. | |
3267 | * | |
3268 | * Return: A string identifying the decoded host ioctl. | |
3269 | */ | |
6f4e626f | 3270 | static char *decode_hioctl(unsigned int cmd) |
d6e32f53 MO |
3271 | { |
3272 | switch (cmd) { | |
9cf43a36 MO |
3273 | case HT_CXLFLASH_LUN_PROVISION: |
3274 | return __stringify_1(HT_CXLFLASH_LUN_PROVISION); | |
d6e32f53 MO |
3275 | } |
3276 | ||
3277 | return "UNKNOWN"; | |
3278 | } | |
3279 | ||
9cf43a36 MO |
3280 | /** |
3281 | * cxlflash_lun_provision() - host LUN provisioning handler | |
3282 | * @cfg: Internal structure associated with the host. | |
28fc2bd2 | 3283 | * @arg: Kernel copy of userspace ioctl data structure. |
9cf43a36 MO |
3284 | * |
3285 | * Return: 0 on success, -errno on failure | |
3286 | */ | |
28fc2bd2 | 3287 | static int cxlflash_lun_provision(struct cxlflash_cfg *cfg, void *arg) |
9cf43a36 | 3288 | { |
28fc2bd2 | 3289 | struct ht_cxlflash_lun_provision *lunprov = arg; |
9cf43a36 MO |
3290 | struct afu *afu = cfg->afu; |
3291 | struct device *dev = &cfg->dev->dev; | |
3292 | struct sisl_ioarcb rcb; | |
3293 | struct sisl_ioasa asa; | |
3294 | __be64 __iomem *fc_port_regs; | |
3295 | u16 port = lunprov->port; | |
3296 | u16 scmd = lunprov->hdr.subcmd; | |
3297 | u16 type; | |
3298 | u64 reg; | |
3299 | u64 size; | |
3300 | u64 lun_id; | |
3301 | int rc = 0; | |
3302 | ||
3303 | if (!afu_is_lun_provision(afu)) { | |
3304 | rc = -ENOTSUPP; | |
3305 | goto out; | |
3306 | } | |
3307 | ||
3308 | if (port >= cfg->num_fc_ports) { | |
3309 | rc = -EINVAL; | |
3310 | goto out; | |
3311 | } | |
3312 | ||
3313 | switch (scmd) { | |
3314 | case HT_CXLFLASH_LUN_PROVISION_SUBCMD_CREATE_LUN: | |
3315 | type = SISL_AFU_LUN_PROVISION_CREATE; | |
3316 | size = lunprov->size; | |
3317 | lun_id = 0; | |
3318 | break; | |
3319 | case HT_CXLFLASH_LUN_PROVISION_SUBCMD_DELETE_LUN: | |
3320 | type = SISL_AFU_LUN_PROVISION_DELETE; | |
3321 | size = 0; | |
3322 | lun_id = lunprov->lun_id; | |
3323 | break; | |
3324 | case HT_CXLFLASH_LUN_PROVISION_SUBCMD_QUERY_PORT: | |
3325 | fc_port_regs = get_fc_port_regs(cfg, port); | |
3326 | ||
3327 | reg = readq_be(&fc_port_regs[FC_MAX_NUM_LUNS / 8]); | |
3328 | lunprov->max_num_luns = reg; | |
3329 | reg = readq_be(&fc_port_regs[FC_CUR_NUM_LUNS / 8]); | |
3330 | lunprov->cur_num_luns = reg; | |
3331 | reg = readq_be(&fc_port_regs[FC_MAX_CAP_PORT / 8]); | |
3332 | lunprov->max_cap_port = reg; | |
3333 | reg = readq_be(&fc_port_regs[FC_CUR_CAP_PORT / 8]); | |
3334 | lunprov->cur_cap_port = reg; | |
3335 | ||
3336 | goto out; | |
3337 | default: | |
3338 | rc = -EINVAL; | |
3339 | goto out; | |
3340 | } | |
3341 | ||
3342 | memset(&rcb, 0, sizeof(rcb)); | |
3343 | memset(&asa, 0, sizeof(asa)); | |
3344 | rcb.req_flags = SISL_REQ_FLAGS_AFU_CMD; | |
3345 | rcb.lun_id = lun_id; | |
3346 | rcb.msi = SISL_MSI_RRQ_UPDATED; | |
3347 | rcb.timeout = MC_LUN_PROV_TIMEOUT; | |
3348 | rcb.ioasa = &asa; | |
3349 | ||
3350 | rcb.cdb[0] = SISL_AFU_CMD_LUN_PROVISION; | |
3351 | rcb.cdb[1] = type; | |
3352 | rcb.cdb[2] = port; | |
3353 | put_unaligned_be64(size, &rcb.cdb[8]); | |
3354 | ||
3355 | rc = send_afu_cmd(afu, &rcb); | |
3356 | if (rc) { | |
3357 | dev_err(dev, "%s: send_afu_cmd failed rc=%d asc=%08x afux=%x\n", | |
3358 | __func__, rc, asa.ioasc, asa.afu_extra); | |
3359 | goto out; | |
3360 | } | |
3361 | ||
3362 | if (scmd == HT_CXLFLASH_LUN_PROVISION_SUBCMD_CREATE_LUN) { | |
3363 | lunprov->lun_id = (u64)asa.lunid_hi << 32 | asa.lunid_lo; | |
3364 | memcpy(lunprov->wwid, asa.wwid, sizeof(lunprov->wwid)); | |
3365 | } | |
3366 | out: | |
3367 | dev_dbg(dev, "%s: returning rc=%d\n", __func__, rc); | |
3368 | return rc; | |
3369 | } | |
3370 | ||
bc88ac47 MO |
3371 | /** |
3372 | * cxlflash_afu_debug() - host AFU debug handler | |
3373 | * @cfg: Internal structure associated with the host. | |
28fc2bd2 | 3374 | * @arg: Kernel copy of userspace ioctl data structure. |
bc88ac47 MO |
3375 | * |
3376 | * For debug requests requiring a data buffer, always provide an aligned | |
3377 | * (cache line) buffer to the AFU to appease any alignment requirements. | |
3378 | * | |
3379 | * Return: 0 on success, -errno on failure | |
3380 | */ | |
28fc2bd2 | 3381 | static int cxlflash_afu_debug(struct cxlflash_cfg *cfg, void *arg) |
bc88ac47 | 3382 | { |
28fc2bd2 | 3383 | struct ht_cxlflash_afu_debug *afu_dbg = arg; |
bc88ac47 MO |
3384 | struct afu *afu = cfg->afu; |
3385 | struct device *dev = &cfg->dev->dev; | |
3386 | struct sisl_ioarcb rcb; | |
3387 | struct sisl_ioasa asa; | |
3388 | char *buf = NULL; | |
3389 | char *kbuf = NULL; | |
3390 | void __user *ubuf = (__force void __user *)afu_dbg->data_ea; | |
3391 | u16 req_flags = SISL_REQ_FLAGS_AFU_CMD; | |
3392 | u32 ulen = afu_dbg->data_len; | |
3393 | bool is_write = afu_dbg->hdr.flags & HT_CXLFLASH_HOST_WRITE; | |
3394 | int rc = 0; | |
3395 | ||
3396 | if (!afu_is_afu_debug(afu)) { | |
3397 | rc = -ENOTSUPP; | |
3398 | goto out; | |
3399 | } | |
3400 | ||
3401 | if (ulen) { | |
3402 | req_flags |= SISL_REQ_FLAGS_SUP_UNDERRUN; | |
3403 | ||
3404 | if (ulen > HT_CXLFLASH_AFU_DEBUG_MAX_DATA_LEN) { | |
3405 | rc = -EINVAL; | |
3406 | goto out; | |
3407 | } | |
3408 | ||
bc88ac47 MO |
3409 | buf = kmalloc(ulen + cache_line_size() - 1, GFP_KERNEL); |
3410 | if (unlikely(!buf)) { | |
3411 | rc = -ENOMEM; | |
3412 | goto out; | |
3413 | } | |
3414 | ||
3415 | kbuf = PTR_ALIGN(buf, cache_line_size()); | |
3416 | ||
3417 | if (is_write) { | |
3418 | req_flags |= SISL_REQ_FLAGS_HOST_WRITE; | |
3419 | ||
eeac8cda DC |
3420 | if (copy_from_user(kbuf, ubuf, ulen)) { |
3421 | rc = -EFAULT; | |
bc88ac47 | 3422 | goto out; |
eeac8cda | 3423 | } |
bc88ac47 MO |
3424 | } |
3425 | } | |
3426 | ||
3427 | memset(&rcb, 0, sizeof(rcb)); | |
3428 | memset(&asa, 0, sizeof(asa)); | |
3429 | ||
3430 | rcb.req_flags = req_flags; | |
3431 | rcb.msi = SISL_MSI_RRQ_UPDATED; | |
3432 | rcb.timeout = MC_AFU_DEBUG_TIMEOUT; | |
3433 | rcb.ioasa = &asa; | |
3434 | ||
3435 | if (ulen) { | |
3436 | rcb.data_len = ulen; | |
3437 | rcb.data_ea = (uintptr_t)kbuf; | |
3438 | } | |
3439 | ||
3440 | rcb.cdb[0] = SISL_AFU_CMD_DEBUG; | |
3441 | memcpy(&rcb.cdb[4], afu_dbg->afu_subcmd, | |
3442 | HT_CXLFLASH_AFU_DEBUG_SUBCMD_LEN); | |
3443 | ||
3444 | rc = send_afu_cmd(afu, &rcb); | |
3445 | if (rc) { | |
3446 | dev_err(dev, "%s: send_afu_cmd failed rc=%d asc=%08x afux=%x\n", | |
3447 | __func__, rc, asa.ioasc, asa.afu_extra); | |
3448 | goto out; | |
3449 | } | |
3450 | ||
eeac8cda DC |
3451 | if (ulen && !is_write) { |
3452 | if (copy_to_user(ubuf, kbuf, ulen)) | |
3453 | rc = -EFAULT; | |
3454 | } | |
bc88ac47 MO |
3455 | out: |
3456 | kfree(buf); | |
3457 | dev_dbg(dev, "%s: returning rc=%d\n", __func__, rc); | |
3458 | return rc; | |
3459 | } | |
3460 | ||
d6e32f53 MO |
3461 | /** |
3462 | * cxlflash_chr_ioctl() - character device IOCTL handler | |
3463 | * @file: File pointer for this device. | |
3464 | * @cmd: IOCTL command. | |
3465 | * @arg: Userspace ioctl data structure. | |
3466 | * | |
3467 | * A read/write semaphore is used to implement a 'drain' of currently | |
3468 | * running ioctls. The read semaphore is taken at the beginning of each | |
3469 | * ioctl thread and released upon concluding execution. Additionally the | |
3470 | * semaphore should be released and then reacquired in any ioctl execution | |
3471 | * path which will wait for an event to occur that is outside the scope of | |
3472 | * the ioctl (i.e. an adapter reset). To drain the ioctls currently running, | |
3473 | * a thread simply needs to acquire the write semaphore. | |
3474 | * | |
3475 | * Return: 0 on success, -errno on failure | |
3476 | */ | |
3477 | static long cxlflash_chr_ioctl(struct file *file, unsigned int cmd, | |
3478 | unsigned long arg) | |
3479 | { | |
3480 | typedef int (*hioctl) (struct cxlflash_cfg *, void *); | |
3481 | ||
3482 | struct cxlflash_cfg *cfg = file->private_data; | |
3483 | struct device *dev = &cfg->dev->dev; | |
3484 | char buf[sizeof(union cxlflash_ht_ioctls)]; | |
3485 | void __user *uarg = (void __user *)arg; | |
3486 | struct ht_cxlflash_hdr *hdr; | |
3487 | size_t size = 0; | |
3488 | bool known_ioctl = false; | |
3489 | int idx = 0; | |
3490 | int rc = 0; | |
3491 | hioctl do_ioctl = NULL; | |
3492 | ||
3493 | static const struct { | |
3494 | size_t size; | |
3495 | hioctl ioctl; | |
3496 | } ioctl_tbl[] = { /* NOTE: order matters here */ | |
28fc2bd2 AB |
3497 | { sizeof(struct ht_cxlflash_lun_provision), cxlflash_lun_provision }, |
3498 | { sizeof(struct ht_cxlflash_afu_debug), cxlflash_afu_debug }, | |
d6e32f53 MO |
3499 | }; |
3500 | ||
3501 | /* Hold read semaphore so we can drain if needed */ | |
3502 | down_read(&cfg->ioctl_rwsem); | |
3503 | ||
3504 | dev_dbg(dev, "%s: cmd=%u idx=%d tbl_size=%lu\n", | |
3505 | __func__, cmd, idx, sizeof(ioctl_tbl)); | |
3506 | ||
3507 | switch (cmd) { | |
9cf43a36 | 3508 | case HT_CXLFLASH_LUN_PROVISION: |
bc88ac47 | 3509 | case HT_CXLFLASH_AFU_DEBUG: |
9cf43a36 MO |
3510 | known_ioctl = true; |
3511 | idx = _IOC_NR(HT_CXLFLASH_LUN_PROVISION) - _IOC_NR(cmd); | |
3512 | size = ioctl_tbl[idx].size; | |
3513 | do_ioctl = ioctl_tbl[idx].ioctl; | |
3514 | ||
3515 | if (likely(do_ioctl)) | |
3516 | break; | |
3517 | ||
df561f66 | 3518 | fallthrough; |
d6e32f53 MO |
3519 | default: |
3520 | rc = -EINVAL; | |
3521 | goto out; | |
3522 | } | |
3523 | ||
3524 | if (unlikely(copy_from_user(&buf, uarg, size))) { | |
3525 | dev_err(dev, "%s: copy_from_user() fail " | |
3526 | "size=%lu cmd=%d (%s) uarg=%p\n", | |
3527 | __func__, size, cmd, decode_hioctl(cmd), uarg); | |
3528 | rc = -EFAULT; | |
3529 | goto out; | |
3530 | } | |
3531 | ||
3532 | hdr = (struct ht_cxlflash_hdr *)&buf; | |
3533 | if (hdr->version != HT_CXLFLASH_VERSION_0) { | |
3534 | dev_dbg(dev, "%s: Version %u not supported for %s\n", | |
3535 | __func__, hdr->version, decode_hioctl(cmd)); | |
3536 | rc = -EINVAL; | |
3537 | goto out; | |
3538 | } | |
3539 | ||
3540 | if (hdr->rsvd[0] || hdr->rsvd[1] || hdr->return_flags) { | |
3541 | dev_dbg(dev, "%s: Reserved/rflags populated\n", __func__); | |
3542 | rc = -EINVAL; | |
3543 | goto out; | |
3544 | } | |
3545 | ||
3546 | rc = do_ioctl(cfg, (void *)&buf); | |
3547 | if (likely(!rc)) | |
3548 | if (unlikely(copy_to_user(uarg, &buf, size))) { | |
3549 | dev_err(dev, "%s: copy_to_user() fail " | |
3550 | "size=%lu cmd=%d (%s) uarg=%p\n", | |
3551 | __func__, size, cmd, decode_hioctl(cmd), uarg); | |
3552 | rc = -EFAULT; | |
3553 | } | |
3554 | ||
3555 | /* fall through to exit */ | |
3556 | ||
3557 | out: | |
3558 | up_read(&cfg->ioctl_rwsem); | |
3559 | if (unlikely(rc && known_ioctl)) | |
3560 | dev_err(dev, "%s: ioctl %s (%08X) returned rc=%d\n", | |
3561 | __func__, decode_hioctl(cmd), cmd, rc); | |
3562 | else | |
3563 | dev_dbg(dev, "%s: ioctl %s (%08X) returned rc=%d\n", | |
3564 | __func__, decode_hioctl(cmd), cmd, rc); | |
3565 | return rc; | |
3566 | } | |
3567 | ||
a834a36b UK |
3568 | /* |
3569 | * Character device file operations | |
3570 | */ | |
3571 | static const struct file_operations cxlflash_chr_fops = { | |
3572 | .owner = THIS_MODULE, | |
3573 | .open = cxlflash_chr_open, | |
d6e32f53 | 3574 | .unlocked_ioctl = cxlflash_chr_ioctl, |
1832f2d8 | 3575 | .compat_ioctl = compat_ptr_ioctl, |
a834a36b UK |
3576 | }; |
3577 | ||
3578 | /** | |
3579 | * init_chrdev() - initialize the character device for the host | |
3580 | * @cfg: Internal structure associated with the host. | |
3581 | * | |
3582 | * Return: 0 on success, -errno on failure | |
3583 | */ | |
3584 | static int init_chrdev(struct cxlflash_cfg *cfg) | |
3585 | { | |
3586 | struct device *dev = &cfg->dev->dev; | |
3587 | struct device *char_dev; | |
3588 | dev_t devno; | |
3589 | int minor; | |
3590 | int rc = 0; | |
3591 | ||
3592 | minor = cxlflash_get_minor(); | |
3593 | if (unlikely(minor < 0)) { | |
3594 | dev_err(dev, "%s: Exhausted allowed adapters\n", __func__); | |
3595 | rc = -ENOSPC; | |
3596 | goto out; | |
3597 | } | |
3598 | ||
3599 | devno = MKDEV(cxlflash_major, minor); | |
3600 | cdev_init(&cfg->cdev, &cxlflash_chr_fops); | |
3601 | ||
3602 | rc = cdev_add(&cfg->cdev, devno, 1); | |
3603 | if (rc) { | |
3604 | dev_err(dev, "%s: cdev_add failed rc=%d\n", __func__, rc); | |
3605 | goto err1; | |
3606 | } | |
3607 | ||
a08f0eb0 | 3608 | char_dev = device_create(&cxlflash_class, NULL, devno, |
a834a36b UK |
3609 | NULL, "cxlflash%d", minor); |
3610 | if (IS_ERR(char_dev)) { | |
3611 | rc = PTR_ERR(char_dev); | |
3612 | dev_err(dev, "%s: device_create failed rc=%d\n", | |
3613 | __func__, rc); | |
3614 | goto err2; | |
3615 | } | |
3616 | ||
3617 | cfg->chardev = char_dev; | |
3618 | out: | |
3619 | dev_dbg(dev, "%s: returning rc=%d\n", __func__, rc); | |
3620 | return rc; | |
3621 | err2: | |
3622 | cdev_del(&cfg->cdev); | |
3623 | err1: | |
3624 | cxlflash_put_minor(minor); | |
3625 | goto out; | |
3626 | } | |
3627 | ||
c21e0bbf MO |
3628 | /** |
3629 | * cxlflash_probe() - PCI entry point to add host | |
3630 | * @pdev: PCI device associated with the host. | |
3631 | * @dev_id: PCI device id associated with device. | |
3632 | * | |
323e3342 MO |
3633 | * The device will initially start out in a 'probing' state and |
3634 | * transition to the 'normal' state at the end of a successful | |
3635 | * probe. Should an EEH event occur during probe, the notification | |
3636 | * thread (error_detected()) will wait until the probe handler | |
3637 | * is nearly complete. At that time, the device will be moved to | |
3638 | * a 'probed' state and the EEH thread woken up to drive the slot | |
3639 | * reset and recovery (device moves to 'normal' state). Meanwhile, | |
3640 | * the probe will be allowed to exit successfully. | |
3641 | * | |
1284fb0c | 3642 | * Return: 0 on success, -errno on failure |
c21e0bbf MO |
3643 | */ |
3644 | static int cxlflash_probe(struct pci_dev *pdev, | |
3645 | const struct pci_device_id *dev_id) | |
3646 | { | |
3647 | struct Scsi_Host *host; | |
3648 | struct cxlflash_cfg *cfg = NULL; | |
fb67d44d | 3649 | struct device *dev = &pdev->dev; |
c21e0bbf MO |
3650 | struct dev_dependent_vals *ddv; |
3651 | int rc = 0; | |
78ae028e | 3652 | int k; |
c21e0bbf MO |
3653 | |
3654 | dev_dbg(&pdev->dev, "%s: Found CXLFLASH with IRQ: %d\n", | |
3655 | __func__, pdev->irq); | |
3656 | ||
3657 | ddv = (struct dev_dependent_vals *)dev_id->driver_data; | |
3658 | driver_template.max_sectors = ddv->max_sectors; | |
3659 | ||
3660 | host = scsi_host_alloc(&driver_template, sizeof(struct cxlflash_cfg)); | |
3661 | if (!host) { | |
fb67d44d | 3662 | dev_err(dev, "%s: scsi_host_alloc failed\n", __func__); |
c21e0bbf MO |
3663 | rc = -ENOMEM; |
3664 | goto out; | |
3665 | } | |
3666 | ||
3667 | host->max_id = CXLFLASH_MAX_NUM_TARGETS_PER_BUS; | |
3668 | host->max_lun = CXLFLASH_MAX_NUM_LUNS_PER_TARGET; | |
c21e0bbf MO |
3669 | host->unique_id = host->host_no; |
3670 | host->max_cmd_len = CXLFLASH_MAX_CDB_LEN; | |
3671 | ||
fb67d44d | 3672 | cfg = shost_priv(host); |
bb61b843 | 3673 | cfg->state = STATE_PROBING; |
c21e0bbf MO |
3674 | cfg->host = host; |
3675 | rc = alloc_mem(cfg); | |
3676 | if (rc) { | |
fb67d44d | 3677 | dev_err(dev, "%s: alloc_mem failed\n", __func__); |
c21e0bbf | 3678 | rc = -ENOMEM; |
8b5b1e87 | 3679 | scsi_host_put(cfg->host); |
c21e0bbf MO |
3680 | goto out; |
3681 | } | |
3682 | ||
3683 | cfg->init_state = INIT_STATE_NONE; | |
3684 | cfg->dev = pdev; | |
17ead26f | 3685 | cfg->cxl_fops = cxlflash_cxl_fops; |
de5d35af UK |
3686 | cfg->ops = cxlflash_assign_ops(ddv); |
3687 | WARN_ON_ONCE(!cfg->ops); | |
07d0c52f | 3688 | |
2cb79266 | 3689 | /* |
78ae028e MO |
3690 | * Promoted LUNs move to the top of the LUN table. The rest stay on |
3691 | * the bottom half. The bottom half grows from the end (index = 255), | |
3692 | * whereas the top half grows from the beginning (index = 0). | |
3693 | * | |
3694 | * Initialize the last LUN index for all possible ports. | |
2cb79266 | 3695 | */ |
78ae028e MO |
3696 | cfg->promote_lun_index = 0; |
3697 | ||
3698 | for (k = 0; k < MAX_FC_PORTS; k++) | |
3699 | cfg->last_lun_index[k] = CXLFLASH_NUM_VLUNS/2 - 1; | |
2cb79266 | 3700 | |
c21e0bbf | 3701 | cfg->dev_id = (struct pci_device_id *)dev_id; |
c21e0bbf MO |
3702 | |
3703 | init_waitqueue_head(&cfg->tmf_waitq); | |
439e85c1 | 3704 | init_waitqueue_head(&cfg->reset_waitq); |
c21e0bbf MO |
3705 | |
3706 | INIT_WORK(&cfg->work_q, cxlflash_worker_thread); | |
3707 | cfg->lr_state = LINK_RESET_INVALID; | |
3708 | cfg->lr_port = -1; | |
0d73122c | 3709 | spin_lock_init(&cfg->tmf_slock); |
65be2c79 MO |
3710 | mutex_init(&cfg->ctx_tbl_list_mutex); |
3711 | mutex_init(&cfg->ctx_recovery_mutex); | |
0a27ae51 | 3712 | init_rwsem(&cfg->ioctl_rwsem); |
65be2c79 MO |
3713 | INIT_LIST_HEAD(&cfg->ctx_err_recovery); |
3714 | INIT_LIST_HEAD(&cfg->lluns); | |
c21e0bbf MO |
3715 | |
3716 | pci_set_drvdata(pdev, cfg); | |
3717 | ||
c21e0bbf MO |
3718 | rc = init_pci(cfg); |
3719 | if (rc) { | |
fb67d44d | 3720 | dev_err(dev, "%s: init_pci failed rc=%d\n", __func__, rc); |
c21e0bbf MO |
3721 | goto out_remove; |
3722 | } | |
3723 | cfg->init_state = INIT_STATE_PCI; | |
3724 | ||
48e077db UK |
3725 | cfg->afu_cookie = cfg->ops->create_afu(pdev); |
3726 | if (unlikely(!cfg->afu_cookie)) { | |
3727 | dev_err(dev, "%s: create_afu failed\n", __func__); | |
d0b1e4a6 | 3728 | rc = -ENOMEM; |
48e077db UK |
3729 | goto out_remove; |
3730 | } | |
3731 | ||
c21e0bbf | 3732 | rc = init_afu(cfg); |
323e3342 | 3733 | if (rc && !wq_has_sleeper(&cfg->reset_waitq)) { |
fb67d44d | 3734 | dev_err(dev, "%s: init_afu failed rc=%d\n", __func__, rc); |
c21e0bbf MO |
3735 | goto out_remove; |
3736 | } | |
3737 | cfg->init_state = INIT_STATE_AFU; | |
3738 | ||
c21e0bbf MO |
3739 | rc = init_scsi(cfg); |
3740 | if (rc) { | |
fb67d44d | 3741 | dev_err(dev, "%s: init_scsi failed rc=%d\n", __func__, rc); |
c21e0bbf MO |
3742 | goto out_remove; |
3743 | } | |
3744 | cfg->init_state = INIT_STATE_SCSI; | |
3745 | ||
a834a36b UK |
3746 | rc = init_chrdev(cfg); |
3747 | if (rc) { | |
3748 | dev_err(dev, "%s: init_chrdev failed rc=%d\n", __func__, rc); | |
3749 | goto out_remove; | |
3750 | } | |
3751 | cfg->init_state = INIT_STATE_CDEV; | |
3752 | ||
323e3342 MO |
3753 | if (wq_has_sleeper(&cfg->reset_waitq)) { |
3754 | cfg->state = STATE_PROBED; | |
3755 | wake_up_all(&cfg->reset_waitq); | |
3756 | } else | |
3757 | cfg->state = STATE_NORMAL; | |
c21e0bbf | 3758 | out: |
fb67d44d | 3759 | dev_dbg(dev, "%s: returning rc=%d\n", __func__, rc); |
c21e0bbf MO |
3760 | return rc; |
3761 | ||
3762 | out_remove: | |
bb61b843 | 3763 | cfg->state = STATE_PROBED; |
c21e0bbf MO |
3764 | cxlflash_remove(pdev); |
3765 | goto out; | |
3766 | } | |
3767 | ||
5cdac81a MO |
3768 | /** |
3769 | * cxlflash_pci_error_detected() - called when a PCI error is detected | |
3770 | * @pdev: PCI device struct. | |
3771 | * @state: PCI channel state. | |
3772 | * | |
1d3324c3 MO |
3773 | * When an EEH occurs during an active reset, wait until the reset is |
3774 | * complete and then take action based upon the device state. | |
3775 | * | |
5cdac81a MO |
3776 | * Return: PCI_ERS_RESULT_NEED_RESET or PCI_ERS_RESULT_DISCONNECT |
3777 | */ | |
3778 | static pci_ers_result_t cxlflash_pci_error_detected(struct pci_dev *pdev, | |
3779 | pci_channel_state_t state) | |
3780 | { | |
65be2c79 | 3781 | int rc = 0; |
5cdac81a MO |
3782 | struct cxlflash_cfg *cfg = pci_get_drvdata(pdev); |
3783 | struct device *dev = &cfg->dev->dev; | |
3784 | ||
3785 | dev_dbg(dev, "%s: pdev=%p state=%u\n", __func__, pdev, state); | |
3786 | ||
3787 | switch (state) { | |
3788 | case pci_channel_io_frozen: | |
323e3342 MO |
3789 | wait_event(cfg->reset_waitq, cfg->state != STATE_RESET && |
3790 | cfg->state != STATE_PROBING); | |
1d3324c3 MO |
3791 | if (cfg->state == STATE_FAILTERM) |
3792 | return PCI_ERS_RESULT_DISCONNECT; | |
3793 | ||
439e85c1 | 3794 | cfg->state = STATE_RESET; |
5cdac81a | 3795 | scsi_block_requests(cfg->host); |
0a27ae51 | 3796 | drain_ioctls(cfg); |
65be2c79 MO |
3797 | rc = cxlflash_mark_contexts_error(cfg); |
3798 | if (unlikely(rc)) | |
fb67d44d | 3799 | dev_err(dev, "%s: Failed to mark user contexts rc=%d\n", |
65be2c79 | 3800 | __func__, rc); |
9526f360 | 3801 | term_afu(cfg); |
5cdac81a MO |
3802 | return PCI_ERS_RESULT_NEED_RESET; |
3803 | case pci_channel_io_perm_failure: | |
3804 | cfg->state = STATE_FAILTERM; | |
439e85c1 | 3805 | wake_up_all(&cfg->reset_waitq); |
5cdac81a MO |
3806 | scsi_unblock_requests(cfg->host); |
3807 | return PCI_ERS_RESULT_DISCONNECT; | |
3808 | default: | |
3809 | break; | |
3810 | } | |
3811 | return PCI_ERS_RESULT_NEED_RESET; | |
3812 | } | |
3813 | ||
3814 | /** | |
3815 | * cxlflash_pci_slot_reset() - called when PCI slot has been reset | |
3816 | * @pdev: PCI device struct. | |
3817 | * | |
3818 | * This routine is called by the pci error recovery code after the PCI | |
3819 | * slot has been reset, just before we should resume normal operations. | |
3820 | * | |
3821 | * Return: PCI_ERS_RESULT_RECOVERED or PCI_ERS_RESULT_DISCONNECT | |
3822 | */ | |
3823 | static pci_ers_result_t cxlflash_pci_slot_reset(struct pci_dev *pdev) | |
3824 | { | |
3825 | int rc = 0; | |
3826 | struct cxlflash_cfg *cfg = pci_get_drvdata(pdev); | |
3827 | struct device *dev = &cfg->dev->dev; | |
3828 | ||
3829 | dev_dbg(dev, "%s: pdev=%p\n", __func__, pdev); | |
3830 | ||
3831 | rc = init_afu(cfg); | |
3832 | if (unlikely(rc)) { | |
fb67d44d | 3833 | dev_err(dev, "%s: EEH recovery failed rc=%d\n", __func__, rc); |
5cdac81a MO |
3834 | return PCI_ERS_RESULT_DISCONNECT; |
3835 | } | |
3836 | ||
3837 | return PCI_ERS_RESULT_RECOVERED; | |
3838 | } | |
3839 | ||
3840 | /** | |
3841 | * cxlflash_pci_resume() - called when normal operation can resume | |
3842 | * @pdev: PCI device struct | |
3843 | */ | |
3844 | static void cxlflash_pci_resume(struct pci_dev *pdev) | |
3845 | { | |
3846 | struct cxlflash_cfg *cfg = pci_get_drvdata(pdev); | |
3847 | struct device *dev = &cfg->dev->dev; | |
3848 | ||
3849 | dev_dbg(dev, "%s: pdev=%p\n", __func__, pdev); | |
3850 | ||
3851 | cfg->state = STATE_NORMAL; | |
439e85c1 | 3852 | wake_up_all(&cfg->reset_waitq); |
5cdac81a MO |
3853 | scsi_unblock_requests(cfg->host); |
3854 | } | |
3855 | ||
a834a36b UK |
3856 | /** |
3857 | * cxlflash_devnode() - provides devtmpfs for devices in the cxlflash class | |
3858 | * @dev: Character device. | |
3859 | * @mode: Mode that can be used to verify access. | |
3860 | * | |
3861 | * Return: Allocated string describing the devtmpfs structure. | |
3862 | */ | |
69b14fde | 3863 | static char *cxlflash_devnode(const struct device *dev, umode_t *mode) |
a834a36b UK |
3864 | { |
3865 | return kasprintf(GFP_KERNEL, "cxlflash/%s", dev_name(dev)); | |
3866 | } | |
3867 | ||
3868 | /** | |
3869 | * cxlflash_class_init() - create character device class | |
3870 | * | |
3871 | * Return: 0 on success, -errno on failure | |
3872 | */ | |
3873 | static int cxlflash_class_init(void) | |
3874 | { | |
3875 | dev_t devno; | |
3876 | int rc = 0; | |
3877 | ||
3878 | rc = alloc_chrdev_region(&devno, 0, CXLFLASH_MAX_ADAPTERS, "cxlflash"); | |
3879 | if (unlikely(rc)) { | |
3880 | pr_err("%s: alloc_chrdev_region failed rc=%d\n", __func__, rc); | |
3881 | goto out; | |
3882 | } | |
3883 | ||
3884 | cxlflash_major = MAJOR(devno); | |
3885 | ||
a08f0eb0 RM |
3886 | rc = class_register(&cxlflash_class); |
3887 | if (rc) { | |
a834a36b UK |
3888 | pr_err("%s: class_create failed rc=%d\n", __func__, rc); |
3889 | goto err; | |
3890 | } | |
3891 | ||
a834a36b UK |
3892 | out: |
3893 | pr_debug("%s: returning rc=%d\n", __func__, rc); | |
3894 | return rc; | |
3895 | err: | |
3896 | unregister_chrdev_region(devno, CXLFLASH_MAX_ADAPTERS); | |
3897 | goto out; | |
3898 | } | |
3899 | ||
3900 | /** | |
3901 | * cxlflash_class_exit() - destroy character device class | |
3902 | */ | |
3903 | static void cxlflash_class_exit(void) | |
3904 | { | |
3905 | dev_t devno = MKDEV(cxlflash_major, 0); | |
3906 | ||
a08f0eb0 | 3907 | class_unregister(&cxlflash_class); |
a834a36b UK |
3908 | unregister_chrdev_region(devno, CXLFLASH_MAX_ADAPTERS); |
3909 | } | |
3910 | ||
5cdac81a MO |
3911 | static const struct pci_error_handlers cxlflash_err_handler = { |
3912 | .error_detected = cxlflash_pci_error_detected, | |
3913 | .slot_reset = cxlflash_pci_slot_reset, | |
3914 | .resume = cxlflash_pci_resume, | |
3915 | }; | |
3916 | ||
c21e0bbf MO |
3917 | /* |
3918 | * PCI device structure | |
3919 | */ | |
3920 | static struct pci_driver cxlflash_driver = { | |
3921 | .name = CXLFLASH_NAME, | |
3922 | .id_table = cxlflash_pci_table, | |
3923 | .probe = cxlflash_probe, | |
3924 | .remove = cxlflash_remove, | |
babf985d | 3925 | .shutdown = cxlflash_remove, |
5cdac81a | 3926 | .err_handler = &cxlflash_err_handler, |
c21e0bbf MO |
3927 | }; |
3928 | ||
3929 | /** | |
3930 | * init_cxlflash() - module entry point | |
3931 | * | |
1284fb0c | 3932 | * Return: 0 on success, -errno on failure |
c21e0bbf MO |
3933 | */ |
3934 | static int __init init_cxlflash(void) | |
3935 | { | |
a834a36b UK |
3936 | int rc; |
3937 | ||
cd41e18d | 3938 | check_sizes(); |
65be2c79 | 3939 | cxlflash_list_init(); |
a834a36b UK |
3940 | rc = cxlflash_class_init(); |
3941 | if (unlikely(rc)) | |
3942 | goto out; | |
65be2c79 | 3943 | |
a834a36b UK |
3944 | rc = pci_register_driver(&cxlflash_driver); |
3945 | if (unlikely(rc)) | |
3946 | goto err; | |
3947 | out: | |
3948 | pr_debug("%s: returning rc=%d\n", __func__, rc); | |
3949 | return rc; | |
3950 | err: | |
3951 | cxlflash_class_exit(); | |
3952 | goto out; | |
c21e0bbf MO |
3953 | } |
3954 | ||
3955 | /** | |
3956 | * exit_cxlflash() - module exit point | |
3957 | */ | |
3958 | static void __exit exit_cxlflash(void) | |
3959 | { | |
65be2c79 MO |
3960 | cxlflash_term_global_luns(); |
3961 | cxlflash_free_errpage(); | |
3962 | ||
c21e0bbf | 3963 | pci_unregister_driver(&cxlflash_driver); |
a834a36b | 3964 | cxlflash_class_exit(); |
c21e0bbf MO |
3965 | } |
3966 | ||
3967 | module_init(init_cxlflash); | |
3968 | module_exit(exit_cxlflash); |