cxlflash: Base error recovery support
[linux-2.6-block.git] / drivers / scsi / cxlflash / main.c
CommitLineData
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1/*
2 * CXL Flash Device Driver
3 *
4 * Written by: Manoj N. Kumar <manoj@linux.vnet.ibm.com>, IBM Corporation
5 * Matthew R. Ochs <mrochs@linux.vnet.ibm.com>, IBM Corporation
6 *
7 * Copyright (C) 2015 IBM Corporation
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License
11 * as published by the Free Software Foundation; either version
12 * 2 of the License, or (at your option) any later version.
13 */
14
15#include <linux/delay.h>
16#include <linux/list.h>
17#include <linux/module.h>
18#include <linux/pci.h>
19
20#include <asm/unaligned.h>
21
22#include <misc/cxl.h>
23
24#include <scsi/scsi_cmnd.h>
25#include <scsi/scsi_host.h>
26
27#include "main.h"
28#include "sislite.h"
29#include "common.h"
30
31MODULE_DESCRIPTION(CXLFLASH_ADAPTER_NAME);
32MODULE_AUTHOR("Manoj N. Kumar <manoj@linux.vnet.ibm.com>");
33MODULE_AUTHOR("Matthew R. Ochs <mrochs@linux.vnet.ibm.com>");
34MODULE_LICENSE("GPL");
35
36
37/**
38 * cxlflash_cmd_checkout() - checks out an AFU command
39 * @afu: AFU to checkout from.
40 *
41 * Commands are checked out in a round-robin fashion. Note that since
42 * the command pool is larger than the hardware queue, the majority of
43 * times we will only loop once or twice before getting a command. The
44 * buffer and CDB within the command are initialized (zeroed) prior to
45 * returning.
46 *
47 * Return: The checked out command or NULL when command pool is empty.
48 */
49struct afu_cmd *cxlflash_cmd_checkout(struct afu *afu)
50{
51 int k, dec = CXLFLASH_NUM_CMDS;
52 struct afu_cmd *cmd;
53
54 while (dec--) {
55 k = (afu->cmd_couts++ & (CXLFLASH_NUM_CMDS - 1));
56
57 cmd = &afu->cmd[k];
58
59 if (!atomic_dec_if_positive(&cmd->free)) {
60 pr_debug("%s: returning found index=%d\n",
61 __func__, cmd->slot);
62 memset(cmd->buf, 0, CMD_BUFSIZE);
63 memset(cmd->rcb.cdb, 0, sizeof(cmd->rcb.cdb));
64 return cmd;
65 }
66 }
67
68 return NULL;
69}
70
71/**
72 * cxlflash_cmd_checkin() - checks in an AFU command
73 * @cmd: AFU command to checkin.
74 *
75 * Safe to pass commands that have already been checked in. Several
76 * internal tracking fields are reset as part of the checkin. Note
77 * that these are intentionally reset prior to toggling the free bit
78 * to avoid clobbering values in the event that the command is checked
79 * out right away.
80 */
81void cxlflash_cmd_checkin(struct afu_cmd *cmd)
82{
83 cmd->rcb.scp = NULL;
84 cmd->rcb.timeout = 0;
85 cmd->sa.ioasc = 0;
86 cmd->cmd_tmf = false;
87 cmd->sa.host_use[0] = 0; /* clears both completion and retry bytes */
88
89 if (unlikely(atomic_inc_return(&cmd->free) != 1)) {
90 pr_err("%s: Freeing cmd (%d) that is not in use!\n",
91 __func__, cmd->slot);
92 return;
93 }
94
95 pr_debug("%s: released cmd %p index=%d\n", __func__, cmd, cmd->slot);
96}
97
98/**
99 * process_cmd_err() - command error handler
100 * @cmd: AFU command that experienced the error.
101 * @scp: SCSI command associated with the AFU command in error.
102 *
103 * Translates error bits from AFU command to SCSI command results.
104 */
105static void process_cmd_err(struct afu_cmd *cmd, struct scsi_cmnd *scp)
106{
107 struct sisl_ioarcb *ioarcb;
108 struct sisl_ioasa *ioasa;
109
110 if (unlikely(!cmd))
111 return;
112
113 ioarcb = &(cmd->rcb);
114 ioasa = &(cmd->sa);
115
116 if (ioasa->rc.flags & SISL_RC_FLAGS_UNDERRUN) {
117 pr_debug("%s: cmd underrun cmd = %p scp = %p\n",
118 __func__, cmd, scp);
119 scp->result = (DID_ERROR << 16);
120 }
121
122 if (ioasa->rc.flags & SISL_RC_FLAGS_OVERRUN) {
123 pr_debug("%s: cmd underrun cmd = %p scp = %p\n",
124 __func__, cmd, scp);
125 scp->result = (DID_ERROR << 16);
126 }
127
128 pr_debug("%s: cmd failed afu_rc=%d scsi_rc=%d fc_rc=%d "
129 "afu_extra=0x%X, scsi_entra=0x%X, fc_extra=0x%X\n",
130 __func__, ioasa->rc.afu_rc, ioasa->rc.scsi_rc,
131 ioasa->rc.fc_rc, ioasa->afu_extra, ioasa->scsi_extra,
132 ioasa->fc_extra);
133
134 if (ioasa->rc.scsi_rc) {
135 /* We have a SCSI status */
136 if (ioasa->rc.flags & SISL_RC_FLAGS_SENSE_VALID) {
137 memcpy(scp->sense_buffer, ioasa->sense_data,
138 SISL_SENSE_DATA_LEN);
139 scp->result = ioasa->rc.scsi_rc;
140 } else
141 scp->result = ioasa->rc.scsi_rc | (DID_ERROR << 16);
142 }
143
144 /*
145 * We encountered an error. Set scp->result based on nature
146 * of error.
147 */
148 if (ioasa->rc.fc_rc) {
149 /* We have an FC status */
150 switch (ioasa->rc.fc_rc) {
151 case SISL_FC_RC_LINKDOWN:
152 scp->result = (DID_REQUEUE << 16);
153 break;
154 case SISL_FC_RC_RESID:
155 /* This indicates an FCP resid underrun */
156 if (!(ioasa->rc.flags & SISL_RC_FLAGS_OVERRUN)) {
157 /* If the SISL_RC_FLAGS_OVERRUN flag was set,
158 * then we will handle this error else where.
159 * If not then we must handle it here.
160 * This is probably an AFU bug. We will
161 * attempt a retry to see if that resolves it.
162 */
163 scp->result = (DID_ERROR << 16);
164 }
165 break;
166 case SISL_FC_RC_RESIDERR:
167 /* Resid mismatch between adapter and device */
168 case SISL_FC_RC_TGTABORT:
169 case SISL_FC_RC_ABORTOK:
170 case SISL_FC_RC_ABORTFAIL:
171 case SISL_FC_RC_NOLOGI:
172 case SISL_FC_RC_ABORTPEND:
173 case SISL_FC_RC_WRABORTPEND:
174 case SISL_FC_RC_NOEXP:
175 case SISL_FC_RC_INUSE:
176 scp->result = (DID_ERROR << 16);
177 break;
178 }
179 }
180
181 if (ioasa->rc.afu_rc) {
182 /* We have an AFU error */
183 switch (ioasa->rc.afu_rc) {
184 case SISL_AFU_RC_NO_CHANNELS:
185 scp->result = (DID_MEDIUM_ERROR << 16);
186 break;
187 case SISL_AFU_RC_DATA_DMA_ERR:
188 switch (ioasa->afu_extra) {
189 case SISL_AFU_DMA_ERR_PAGE_IN:
190 /* Retry */
191 scp->result = (DID_IMM_RETRY << 16);
192 break;
193 case SISL_AFU_DMA_ERR_INVALID_EA:
194 default:
195 scp->result = (DID_ERROR << 16);
196 }
197 break;
198 case SISL_AFU_RC_OUT_OF_DATA_BUFS:
199 /* Retry */
200 scp->result = (DID_ALLOC_FAILURE << 16);
201 break;
202 default:
203 scp->result = (DID_ERROR << 16);
204 }
205 }
206}
207
208/**
209 * cmd_complete() - command completion handler
210 * @cmd: AFU command that has completed.
211 *
212 * Prepares and submits command that has either completed or timed out to
213 * the SCSI stack. Checks AFU command back into command pool for non-internal
214 * (rcb.scp populated) commands.
215 */
216static void cmd_complete(struct afu_cmd *cmd)
217{
218 struct scsi_cmnd *scp;
219 u32 resid;
220 ulong lock_flags;
221 struct afu *afu = cmd->parent;
222 struct cxlflash_cfg *cfg = afu->parent;
223 bool cmd_is_tmf;
224
225 spin_lock_irqsave(&cmd->slock, lock_flags);
226 cmd->sa.host_use_b[0] |= B_DONE;
227 spin_unlock_irqrestore(&cmd->slock, lock_flags);
228
229 if (cmd->rcb.scp) {
230 scp = cmd->rcb.scp;
231 if (unlikely(cmd->sa.rc.afu_rc ||
232 cmd->sa.rc.scsi_rc ||
233 cmd->sa.rc.fc_rc))
234 process_cmd_err(cmd, scp);
235 else
236 scp->result = (DID_OK << 16);
237
238 resid = cmd->sa.resid;
239 cmd_is_tmf = cmd->cmd_tmf;
240 cxlflash_cmd_checkin(cmd); /* Don't use cmd after here */
241
242 pr_debug("%s: calling scsi_set_resid, scp=%p "
243 "result=%X resid=%d\n", __func__,
244 scp, scp->result, resid);
245
246 scsi_set_resid(scp, resid);
247 scsi_dma_unmap(scp);
248 scp->scsi_done(scp);
249
250 if (cmd_is_tmf) {
251 spin_lock_irqsave(&cfg->tmf_waitq.lock, lock_flags);
252 cfg->tmf_active = false;
253 wake_up_all_locked(&cfg->tmf_waitq);
254 spin_unlock_irqrestore(&cfg->tmf_waitq.lock,
255 lock_flags);
256 }
257 } else
258 complete(&cmd->cevent);
259}
260
261/**
262 * send_tmf() - sends a Task Management Function (TMF)
263 * @afu: AFU to checkout from.
264 * @scp: SCSI command from stack.
265 * @tmfcmd: TMF command to send.
266 *
267 * Return:
268 * 0 on success
269 * SCSI_MLQUEUE_HOST_BUSY when host is busy
270 */
271static int send_tmf(struct afu *afu, struct scsi_cmnd *scp, u64 tmfcmd)
272{
273 struct afu_cmd *cmd;
274
275 u32 port_sel = scp->device->channel + 1;
276 short lflag = 0;
277 struct Scsi_Host *host = scp->device->host;
278 struct cxlflash_cfg *cfg = (struct cxlflash_cfg *)host->hostdata;
279 ulong lock_flags;
280 int rc = 0;
281
282 cmd = cxlflash_cmd_checkout(afu);
283 if (unlikely(!cmd)) {
284 pr_err("%s: could not get a free command\n", __func__);
285 rc = SCSI_MLQUEUE_HOST_BUSY;
286 goto out;
287 }
288
289 /* If a Task Management Function is active, do not send one more.
290 */
291 spin_lock_irqsave(&cfg->tmf_waitq.lock, lock_flags);
292 if (cfg->tmf_active)
293 wait_event_interruptible_locked_irq(cfg->tmf_waitq,
294 !cfg->tmf_active);
295 cfg->tmf_active = true;
296 cmd->cmd_tmf = true;
297 spin_unlock_irqrestore(&cfg->tmf_waitq.lock, lock_flags);
298
299 cmd->rcb.ctx_id = afu->ctx_hndl;
300 cmd->rcb.port_sel = port_sel;
301 cmd->rcb.lun_id = lun_to_lunid(scp->device->lun);
302
303 lflag = SISL_REQ_FLAGS_TMF_CMD;
304
305 cmd->rcb.req_flags = (SISL_REQ_FLAGS_PORT_LUN_ID |
306 SISL_REQ_FLAGS_SUP_UNDERRUN | lflag);
307
308 /* Stash the scp in the reserved field, for reuse during interrupt */
309 cmd->rcb.scp = scp;
310
311 /* Copy the CDB from the cmd passed in */
312 memcpy(cmd->rcb.cdb, &tmfcmd, sizeof(tmfcmd));
313
314 /* Send the command */
315 rc = cxlflash_send_cmd(afu, cmd);
316 if (unlikely(rc)) {
317 cxlflash_cmd_checkin(cmd);
318 spin_lock_irqsave(&cfg->tmf_waitq.lock, lock_flags);
319 cfg->tmf_active = false;
320 spin_unlock_irqrestore(&cfg->tmf_waitq.lock, lock_flags);
321 goto out;
322 }
323
324 spin_lock_irqsave(&cfg->tmf_waitq.lock, lock_flags);
325 wait_event_interruptible_locked_irq(cfg->tmf_waitq, !cfg->tmf_active);
326 spin_unlock_irqrestore(&cfg->tmf_waitq.lock, lock_flags);
327out:
328 return rc;
329}
330
331/**
332 * cxlflash_driver_info() - information handler for this host driver
333 * @host: SCSI host associated with device.
334 *
335 * Return: A string describing the device.
336 */
337static const char *cxlflash_driver_info(struct Scsi_Host *host)
338{
339 return CXLFLASH_ADAPTER_NAME;
340}
341
342/**
343 * cxlflash_queuecommand() - sends a mid-layer request
344 * @host: SCSI host associated with device.
345 * @scp: SCSI command to send.
346 *
347 * Return:
348 * 0 on success
349 * SCSI_MLQUEUE_HOST_BUSY when host is busy
350 */
351static int cxlflash_queuecommand(struct Scsi_Host *host, struct scsi_cmnd *scp)
352{
353 struct cxlflash_cfg *cfg = (struct cxlflash_cfg *)host->hostdata;
354 struct afu *afu = cfg->afu;
355 struct pci_dev *pdev = cfg->dev;
5cdac81a 356 struct device *dev = &cfg->dev->dev;
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357 struct afu_cmd *cmd;
358 u32 port_sel = scp->device->channel + 1;
359 int nseg, i, ncount;
360 struct scatterlist *sg;
361 ulong lock_flags;
362 short lflag = 0;
363 int rc = 0;
364
365 pr_debug("%s: (scp=%p) %d/%d/%d/%llu cdb=(%08X-%08X-%08X-%08X)\n",
366 __func__, scp, host->host_no, scp->device->channel,
367 scp->device->id, scp->device->lun,
368 get_unaligned_be32(&((u32 *)scp->cmnd)[0]),
369 get_unaligned_be32(&((u32 *)scp->cmnd)[1]),
370 get_unaligned_be32(&((u32 *)scp->cmnd)[2]),
371 get_unaligned_be32(&((u32 *)scp->cmnd)[3]));
372
373 /* If a Task Management Function is active, wait for it to complete
374 * before continuing with regular commands.
375 */
376 spin_lock_irqsave(&cfg->tmf_waitq.lock, lock_flags);
377 if (cfg->tmf_active) {
378 spin_unlock_irqrestore(&cfg->tmf_waitq.lock, lock_flags);
379 rc = SCSI_MLQUEUE_HOST_BUSY;
380 goto out;
381 }
382 spin_unlock_irqrestore(&cfg->tmf_waitq.lock, lock_flags);
383
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384 switch (cfg->state) {
385 case STATE_LIMBO:
386 dev_dbg_ratelimited(dev, "%s: device in limbo!\n", __func__);
387 rc = SCSI_MLQUEUE_HOST_BUSY;
388 goto out;
389 case STATE_FAILTERM:
390 dev_dbg_ratelimited(dev, "%s: device has failed!\n", __func__);
391 scp->result = (DID_NO_CONNECT << 16);
392 scp->scsi_done(scp);
393 rc = 0;
394 goto out;
395 default:
396 break;
397 }
398
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399 cmd = cxlflash_cmd_checkout(afu);
400 if (unlikely(!cmd)) {
401 pr_err("%s: could not get a free command\n", __func__);
402 rc = SCSI_MLQUEUE_HOST_BUSY;
403 goto out;
404 }
405
406 cmd->rcb.ctx_id = afu->ctx_hndl;
407 cmd->rcb.port_sel = port_sel;
408 cmd->rcb.lun_id = lun_to_lunid(scp->device->lun);
409
410 if (scp->sc_data_direction == DMA_TO_DEVICE)
411 lflag = SISL_REQ_FLAGS_HOST_WRITE;
412 else
413 lflag = SISL_REQ_FLAGS_HOST_READ;
414
415 cmd->rcb.req_flags = (SISL_REQ_FLAGS_PORT_LUN_ID |
416 SISL_REQ_FLAGS_SUP_UNDERRUN | lflag);
417
418 /* Stash the scp in the reserved field, for reuse during interrupt */
419 cmd->rcb.scp = scp;
420
421 nseg = scsi_dma_map(scp);
422 if (unlikely(nseg < 0)) {
423 dev_err(&pdev->dev, "%s: Fail DMA map! nseg=%d\n",
424 __func__, nseg);
425 rc = SCSI_MLQUEUE_HOST_BUSY;
426 goto out;
427 }
428
429 ncount = scsi_sg_count(scp);
430 scsi_for_each_sg(scp, sg, ncount, i) {
431 cmd->rcb.data_len = sg_dma_len(sg);
432 cmd->rcb.data_ea = sg_dma_address(sg);
433 }
434
435 /* Copy the CDB from the scsi_cmnd passed in */
436 memcpy(cmd->rcb.cdb, scp->cmnd, sizeof(cmd->rcb.cdb));
437
438 /* Send the command */
439 rc = cxlflash_send_cmd(afu, cmd);
440 if (unlikely(rc)) {
441 cxlflash_cmd_checkin(cmd);
442 scsi_dma_unmap(scp);
443 }
444
445out:
446 return rc;
447}
448
449/**
450 * cxlflash_eh_device_reset_handler() - reset a single LUN
451 * @scp: SCSI command to send.
452 *
453 * Return:
454 * SUCCESS as defined in scsi/scsi.h
455 * FAILED as defined in scsi/scsi.h
456 */
457static int cxlflash_eh_device_reset_handler(struct scsi_cmnd *scp)
458{
459 int rc = SUCCESS;
460 struct Scsi_Host *host = scp->device->host;
461 struct cxlflash_cfg *cfg = (struct cxlflash_cfg *)host->hostdata;
462 struct afu *afu = cfg->afu;
463 int rcr = 0;
464
465 pr_debug("%s: (scp=%p) %d/%d/%d/%llu "
466 "cdb=(%08X-%08X-%08X-%08X)\n", __func__, scp,
467 host->host_no, scp->device->channel,
468 scp->device->id, scp->device->lun,
469 get_unaligned_be32(&((u32 *)scp->cmnd)[0]),
470 get_unaligned_be32(&((u32 *)scp->cmnd)[1]),
471 get_unaligned_be32(&((u32 *)scp->cmnd)[2]),
472 get_unaligned_be32(&((u32 *)scp->cmnd)[3]));
473
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474 switch (cfg->state) {
475 case STATE_NORMAL:
476 rcr = send_tmf(afu, scp, TMF_LUN_RESET);
477 if (unlikely(rcr))
478 rc = FAILED;
479 break;
480 case STATE_LIMBO:
481 wait_event(cfg->limbo_waitq, cfg->state != STATE_LIMBO);
482 if (cfg->state == STATE_NORMAL)
483 break;
484 /* fall through */
485 default:
c21e0bbf 486 rc = FAILED;
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487 break;
488 }
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489
490 pr_debug("%s: returning rc=%d\n", __func__, rc);
491 return rc;
492}
493
494/**
495 * cxlflash_eh_host_reset_handler() - reset the host adapter
496 * @scp: SCSI command from stack identifying host.
497 *
498 * Return:
499 * SUCCESS as defined in scsi/scsi.h
500 * FAILED as defined in scsi/scsi.h
501 */
502static int cxlflash_eh_host_reset_handler(struct scsi_cmnd *scp)
503{
504 int rc = SUCCESS;
505 int rcr = 0;
506 struct Scsi_Host *host = scp->device->host;
507 struct cxlflash_cfg *cfg = (struct cxlflash_cfg *)host->hostdata;
508
509 pr_debug("%s: (scp=%p) %d/%d/%d/%llu "
510 "cdb=(%08X-%08X-%08X-%08X)\n", __func__, scp,
511 host->host_no, scp->device->channel,
512 scp->device->id, scp->device->lun,
513 get_unaligned_be32(&((u32 *)scp->cmnd)[0]),
514 get_unaligned_be32(&((u32 *)scp->cmnd)[1]),
515 get_unaligned_be32(&((u32 *)scp->cmnd)[2]),
516 get_unaligned_be32(&((u32 *)scp->cmnd)[3]));
517
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518 switch (cfg->state) {
519 case STATE_NORMAL:
520 cfg->state = STATE_LIMBO;
521 scsi_block_requests(cfg->host);
522
523 rcr = cxlflash_afu_reset(cfg);
524 if (rcr) {
525 rc = FAILED;
526 cfg->state = STATE_FAILTERM;
527 } else
528 cfg->state = STATE_NORMAL;
529 wake_up_all(&cfg->limbo_waitq);
530 scsi_unblock_requests(cfg->host);
531 break;
532 case STATE_LIMBO:
533 wait_event(cfg->limbo_waitq, cfg->state != STATE_LIMBO);
534 if (cfg->state == STATE_NORMAL)
535 break;
536 /* fall through */
537 default:
c21e0bbf 538 rc = FAILED;
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539 break;
540 }
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541
542 pr_debug("%s: returning rc=%d\n", __func__, rc);
543 return rc;
544}
545
546/**
547 * cxlflash_change_queue_depth() - change the queue depth for the device
548 * @sdev: SCSI device destined for queue depth change.
549 * @qdepth: Requested queue depth value to set.
550 *
551 * The requested queue depth is capped to the maximum supported value.
552 *
553 * Return: The actual queue depth set.
554 */
555static int cxlflash_change_queue_depth(struct scsi_device *sdev, int qdepth)
556{
557
558 if (qdepth > CXLFLASH_MAX_CMDS_PER_LUN)
559 qdepth = CXLFLASH_MAX_CMDS_PER_LUN;
560
561 scsi_change_queue_depth(sdev, qdepth);
562 return sdev->queue_depth;
563}
564
565/**
566 * cxlflash_show_port_status() - queries and presents the current port status
567 * @dev: Generic device associated with the host owning the port.
568 * @attr: Device attribute representing the port.
569 * @buf: Buffer of length PAGE_SIZE to report back port status in ASCII.
570 *
571 * Return: The size of the ASCII string returned in @buf.
572 */
573static ssize_t cxlflash_show_port_status(struct device *dev,
574 struct device_attribute *attr,
575 char *buf)
576{
577 struct Scsi_Host *shost = class_to_shost(dev);
578 struct cxlflash_cfg *cfg = (struct cxlflash_cfg *)shost->hostdata;
579 struct afu *afu = cfg->afu;
580
581 char *disp_status;
582 int rc;
583 u32 port;
584 u64 status;
585 u64 *fc_regs;
586
587 rc = kstrtouint((attr->attr.name + 4), 10, &port);
588 if (rc || (port > NUM_FC_PORTS))
589 return 0;
590
591 fc_regs = &afu->afu_map->global.fc_regs[port][0];
592 status =
593 (readq_be(&fc_regs[FC_MTIP_STATUS / 8]) & FC_MTIP_STATUS_MASK);
594
595 if (status == FC_MTIP_STATUS_ONLINE)
596 disp_status = "online";
597 else if (status == FC_MTIP_STATUS_OFFLINE)
598 disp_status = "offline";
599 else
600 disp_status = "unknown";
601
602 return snprintf(buf, PAGE_SIZE, "%s\n", disp_status);
603}
604
605/**
606 * cxlflash_show_lun_mode() - presents the current LUN mode of the host
607 * @dev: Generic device associated with the host.
608 * @attr: Device attribute representing the lun mode.
609 * @buf: Buffer of length PAGE_SIZE to report back the LUN mode in ASCII.
610 *
611 * Return: The size of the ASCII string returned in @buf.
612 */
613static ssize_t cxlflash_show_lun_mode(struct device *dev,
614 struct device_attribute *attr, char *buf)
615{
616 struct Scsi_Host *shost = class_to_shost(dev);
617 struct cxlflash_cfg *cfg = (struct cxlflash_cfg *)shost->hostdata;
618 struct afu *afu = cfg->afu;
619
620 return snprintf(buf, PAGE_SIZE, "%u\n", afu->internal_lun);
621}
622
623/**
624 * cxlflash_store_lun_mode() - sets the LUN mode of the host
625 * @dev: Generic device associated with the host.
626 * @attr: Device attribute representing the lun mode.
627 * @buf: Buffer of length PAGE_SIZE containing the LUN mode in ASCII.
628 * @count: Length of data resizing in @buf.
629 *
630 * The CXL Flash AFU supports a dummy LUN mode where the external
631 * links and storage are not required. Space on the FPGA is used
632 * to create 1 or 2 small LUNs which are presented to the system
633 * as if they were a normal storage device. This feature is useful
634 * during development and also provides manufacturing with a way
635 * to test the AFU without an actual device.
636 *
637 * 0 = external LUN[s] (default)
638 * 1 = internal LUN (1 x 64K, 512B blocks, id 0)
639 * 2 = internal LUN (1 x 64K, 4K blocks, id 0)
640 * 3 = internal LUN (2 x 32K, 512B blocks, ids 0,1)
641 * 4 = internal LUN (2 x 32K, 4K blocks, ids 0,1)
642 *
643 * Return: The size of the ASCII string returned in @buf.
644 */
645static ssize_t cxlflash_store_lun_mode(struct device *dev,
646 struct device_attribute *attr,
647 const char *buf, size_t count)
648{
649 struct Scsi_Host *shost = class_to_shost(dev);
650 struct cxlflash_cfg *cfg = (struct cxlflash_cfg *)shost->hostdata;
651 struct afu *afu = cfg->afu;
652 int rc;
653 u32 lun_mode;
654
655 rc = kstrtouint(buf, 10, &lun_mode);
656 if (!rc && (lun_mode < 5) && (lun_mode != afu->internal_lun)) {
657 afu->internal_lun = lun_mode;
658 cxlflash_afu_reset(cfg);
659 scsi_scan_host(cfg->host);
660 }
661
662 return count;
663}
664
665/**
666 * cxlflash_show_dev_mode() - presents the current mode of the device
667 * @dev: Generic device associated with the device.
668 * @attr: Device attribute representing the device mode.
669 * @buf: Buffer of length PAGE_SIZE to report back the dev mode in ASCII.
670 *
671 * Return: The size of the ASCII string returned in @buf.
672 */
673static ssize_t cxlflash_show_dev_mode(struct device *dev,
674 struct device_attribute *attr, char *buf)
675{
676 struct scsi_device *sdev = to_scsi_device(dev);
677
678 return snprintf(buf, PAGE_SIZE, "%s\n",
679 sdev->hostdata ? "superpipe" : "legacy");
680}
681
682/**
683 * cxlflash_wait_for_pci_err_recovery() - wait for error recovery during probe
684 * @cxlflash: Internal structure associated with the host.
685 */
686static void cxlflash_wait_for_pci_err_recovery(struct cxlflash_cfg *cfg)
687{
688 struct pci_dev *pdev = cfg->dev;
689
690 if (pci_channel_offline(pdev))
5cdac81a 691 wait_event_timeout(cfg->limbo_waitq,
c21e0bbf
MO
692 !pci_channel_offline(pdev),
693 CXLFLASH_PCI_ERROR_RECOVERY_TIMEOUT);
694}
695
696/*
697 * Host attributes
698 */
699static DEVICE_ATTR(port0, S_IRUGO, cxlflash_show_port_status, NULL);
700static DEVICE_ATTR(port1, S_IRUGO, cxlflash_show_port_status, NULL);
701static DEVICE_ATTR(lun_mode, S_IRUGO | S_IWUSR, cxlflash_show_lun_mode,
702 cxlflash_store_lun_mode);
703
704static struct device_attribute *cxlflash_host_attrs[] = {
705 &dev_attr_port0,
706 &dev_attr_port1,
707 &dev_attr_lun_mode,
708 NULL
709};
710
711/*
712 * Device attributes
713 */
714static DEVICE_ATTR(mode, S_IRUGO, cxlflash_show_dev_mode, NULL);
715
716static struct device_attribute *cxlflash_dev_attrs[] = {
717 &dev_attr_mode,
718 NULL
719};
720
721/*
722 * Host template
723 */
724static struct scsi_host_template driver_template = {
725 .module = THIS_MODULE,
726 .name = CXLFLASH_ADAPTER_NAME,
727 .info = cxlflash_driver_info,
728 .proc_name = CXLFLASH_NAME,
729 .queuecommand = cxlflash_queuecommand,
730 .eh_device_reset_handler = cxlflash_eh_device_reset_handler,
731 .eh_host_reset_handler = cxlflash_eh_host_reset_handler,
732 .change_queue_depth = cxlflash_change_queue_depth,
733 .cmd_per_lun = 16,
734 .can_queue = CXLFLASH_MAX_CMDS,
735 .this_id = -1,
736 .sg_tablesize = SG_NONE, /* No scatter gather support. */
737 .max_sectors = CXLFLASH_MAX_SECTORS,
738 .use_clustering = ENABLE_CLUSTERING,
739 .shost_attrs = cxlflash_host_attrs,
740 .sdev_attrs = cxlflash_dev_attrs,
741};
742
743/*
744 * Device dependent values
745 */
746static struct dev_dependent_vals dev_corsa_vals = { CXLFLASH_MAX_SECTORS };
747
748/*
749 * PCI device binding table
750 */
751static struct pci_device_id cxlflash_pci_table[] = {
752 {PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_IBM_CORSA,
753 PCI_ANY_ID, PCI_ANY_ID, 0, 0, (kernel_ulong_t)&dev_corsa_vals},
754 {}
755};
756
757MODULE_DEVICE_TABLE(pci, cxlflash_pci_table);
758
759/**
760 * free_mem() - free memory associated with the AFU
761 * @cxlflash: Internal structure associated with the host.
762 */
763static void free_mem(struct cxlflash_cfg *cfg)
764{
765 int i;
766 char *buf = NULL;
767 struct afu *afu = cfg->afu;
768
769 if (cfg->afu) {
770 for (i = 0; i < CXLFLASH_NUM_CMDS; i++) {
771 buf = afu->cmd[i].buf;
772 if (!((u64)buf & (PAGE_SIZE - 1)))
773 free_page((ulong)buf);
774 }
775
776 free_pages((ulong)afu, get_order(sizeof(struct afu)));
777 cfg->afu = NULL;
778 }
779}
780
781/**
782 * stop_afu() - stops the AFU command timers and unmaps the MMIO space
783 * @cxlflash: Internal structure associated with the host.
784 *
785 * Safe to call with AFU in a partially allocated/initialized state.
786 */
787static void stop_afu(struct cxlflash_cfg *cfg)
788{
789 int i;
790 struct afu *afu = cfg->afu;
791
792 if (likely(afu)) {
793 for (i = 0; i < CXLFLASH_NUM_CMDS; i++)
794 complete(&afu->cmd[i].cevent);
795
796 if (likely(afu->afu_map)) {
797 cxl_psa_unmap((void *)afu->afu_map);
798 afu->afu_map = NULL;
799 }
800 }
801}
802
803/**
804 * term_mc() - terminates the master context
805 * @cxlflash: Internal structure associated with the host.
806 * @level: Depth of allocation, where to begin waterfall tear down.
807 *
808 * Safe to call with AFU/MC in partially allocated/initialized state.
809 */
810static void term_mc(struct cxlflash_cfg *cfg, enum undo_level level)
811{
812 int rc = 0;
813 struct afu *afu = cfg->afu;
814
815 if (!afu || !cfg->mcctx) {
816 pr_err("%s: returning from term_mc with NULL afu or MC\n",
817 __func__);
818 return;
819 }
820
821 switch (level) {
822 case UNDO_START:
823 rc = cxl_stop_context(cfg->mcctx);
824 BUG_ON(rc);
825 case UNMAP_THREE:
826 cxl_unmap_afu_irq(cfg->mcctx, 3, afu);
827 case UNMAP_TWO:
828 cxl_unmap_afu_irq(cfg->mcctx, 2, afu);
829 case UNMAP_ONE:
830 cxl_unmap_afu_irq(cfg->mcctx, 1, afu);
831 case FREE_IRQ:
832 cxl_free_afu_irqs(cfg->mcctx);
833 case RELEASE_CONTEXT:
834 cfg->mcctx = NULL;
835 }
836}
837
838/**
839 * term_afu() - terminates the AFU
840 * @cxlflash: Internal structure associated with the host.
841 *
842 * Safe to call with AFU/MC in partially allocated/initialized state.
843 */
844static void term_afu(struct cxlflash_cfg *cfg)
845{
846 term_mc(cfg, UNDO_START);
847
848 if (cfg->afu)
849 stop_afu(cfg);
850
851 pr_debug("%s: returning\n", __func__);
852}
853
854/**
855 * cxlflash_remove() - PCI entry point to tear down host
856 * @pdev: PCI device associated with the host.
857 *
858 * Safe to use as a cleanup in partially allocated/initialized state.
859 */
860static void cxlflash_remove(struct pci_dev *pdev)
861{
862 struct cxlflash_cfg *cfg = pci_get_drvdata(pdev);
863 ulong lock_flags;
864
865 /* If a Task Management Function is active, wait for it to complete
866 * before continuing with remove.
867 */
868 spin_lock_irqsave(&cfg->tmf_waitq.lock, lock_flags);
869 if (cfg->tmf_active)
870 wait_event_interruptible_locked_irq(cfg->tmf_waitq,
871 !cfg->tmf_active);
872 spin_unlock_irqrestore(&cfg->tmf_waitq.lock, lock_flags);
873
5cdac81a
MO
874 cfg->state = STATE_FAILTERM;
875
c21e0bbf
MO
876 switch (cfg->init_state) {
877 case INIT_STATE_SCSI:
878 scsi_remove_host(cfg->host);
879 scsi_host_put(cfg->host);
880 /* Fall through */
881 case INIT_STATE_AFU:
882 term_afu(cfg);
883 case INIT_STATE_PCI:
884 pci_release_regions(cfg->dev);
885 pci_disable_device(pdev);
886 case INIT_STATE_NONE:
887 flush_work(&cfg->work_q);
888 free_mem(cfg);
889 break;
890 }
891
892 pr_debug("%s: returning\n", __func__);
893}
894
895/**
896 * alloc_mem() - allocates the AFU and its command pool
897 * @cxlflash: Internal structure associated with the host.
898 *
899 * A partially allocated state remains on failure.
900 *
901 * Return:
902 * 0 on success
903 * -ENOMEM on failure to allocate memory
904 */
905static int alloc_mem(struct cxlflash_cfg *cfg)
906{
907 int rc = 0;
908 int i;
909 char *buf = NULL;
910
911 /* This allocation is about 12K, i.e. only 1 64k page
912 * and upto 4 4k pages
913 */
914 cfg->afu = (void *)__get_free_pages(GFP_KERNEL | __GFP_ZERO,
915 get_order(sizeof(struct afu)));
916 if (unlikely(!cfg->afu)) {
917 pr_err("%s: cannot get %d free pages\n",
918 __func__, get_order(sizeof(struct afu)));
919 rc = -ENOMEM;
920 goto out;
921 }
922 cfg->afu->parent = cfg;
923 cfg->afu->afu_map = NULL;
924
925 for (i = 0; i < CXLFLASH_NUM_CMDS; buf += CMD_BUFSIZE, i++) {
926 if (!((u64)buf & (PAGE_SIZE - 1))) {
927 buf = (void *)__get_free_page(GFP_KERNEL | __GFP_ZERO);
928 if (unlikely(!buf)) {
929 pr_err("%s: Allocate command buffers fail!\n",
930 __func__);
931 rc = -ENOMEM;
932 free_mem(cfg);
933 goto out;
934 }
935 }
936
937 cfg->afu->cmd[i].buf = buf;
938 atomic_set(&cfg->afu->cmd[i].free, 1);
939 cfg->afu->cmd[i].slot = i;
940 }
941
942out:
943 return rc;
944}
945
946/**
947 * init_pci() - initializes the host as a PCI device
948 * @cxlflash: Internal structure associated with the host.
949 *
950 * Return:
951 * 0 on success
952 * -EIO on unable to communicate with device
953 * A return code from the PCI sub-routines
954 */
955static int init_pci(struct cxlflash_cfg *cfg)
956{
957 struct pci_dev *pdev = cfg->dev;
958 int rc = 0;
959
960 cfg->cxlflash_regs_pci = pci_resource_start(pdev, 0);
961 rc = pci_request_regions(pdev, CXLFLASH_NAME);
962 if (rc < 0) {
963 dev_err(&pdev->dev,
964 "%s: Couldn't register memory range of registers\n",
965 __func__);
966 goto out;
967 }
968
969 rc = pci_enable_device(pdev);
970 if (rc || pci_channel_offline(pdev)) {
971 if (pci_channel_offline(pdev)) {
972 cxlflash_wait_for_pci_err_recovery(cfg);
973 rc = pci_enable_device(pdev);
974 }
975
976 if (rc) {
977 dev_err(&pdev->dev, "%s: Cannot enable adapter\n",
978 __func__);
979 cxlflash_wait_for_pci_err_recovery(cfg);
980 goto out_release_regions;
981 }
982 }
983
984 rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
985 if (rc < 0) {
986 dev_dbg(&pdev->dev, "%s: Failed to set 64 bit PCI DMA mask\n",
987 __func__);
988 rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
989 }
990
991 if (rc < 0) {
992 dev_err(&pdev->dev, "%s: Failed to set PCI DMA mask\n",
993 __func__);
994 goto out_disable;
995 }
996
997 pci_set_master(pdev);
998
999 if (pci_channel_offline(pdev)) {
1000 cxlflash_wait_for_pci_err_recovery(cfg);
1001 if (pci_channel_offline(pdev)) {
1002 rc = -EIO;
1003 goto out_msi_disable;
1004 }
1005 }
1006
1007 rc = pci_save_state(pdev);
1008
1009 if (rc != PCIBIOS_SUCCESSFUL) {
1010 dev_err(&pdev->dev, "%s: Failed to save PCI config space\n",
1011 __func__);
1012 rc = -EIO;
1013 goto cleanup_nolog;
1014 }
1015
1016out:
1017 pr_debug("%s: returning rc=%d\n", __func__, rc);
1018 return rc;
1019
1020cleanup_nolog:
1021out_msi_disable:
1022 cxlflash_wait_for_pci_err_recovery(cfg);
1023out_disable:
1024 pci_disable_device(pdev);
1025out_release_regions:
1026 pci_release_regions(pdev);
1027 goto out;
1028
1029}
1030
1031/**
1032 * init_scsi() - adds the host to the SCSI stack and kicks off host scan
1033 * @cxlflash: Internal structure associated with the host.
1034 *
1035 * Return:
1036 * 0 on success
1037 * A return code from adding the host
1038 */
1039static int init_scsi(struct cxlflash_cfg *cfg)
1040{
1041 struct pci_dev *pdev = cfg->dev;
1042 int rc = 0;
1043
1044 rc = scsi_add_host(cfg->host, &pdev->dev);
1045 if (rc) {
1046 dev_err(&pdev->dev, "%s: scsi_add_host failed (rc=%d)\n",
1047 __func__, rc);
1048 goto out;
1049 }
1050
1051 scsi_scan_host(cfg->host);
1052
1053out:
1054 pr_debug("%s: returning rc=%d\n", __func__, rc);
1055 return rc;
1056}
1057
1058/**
1059 * set_port_online() - transitions the specified host FC port to online state
1060 * @fc_regs: Top of MMIO region defined for specified port.
1061 *
1062 * The provided MMIO region must be mapped prior to call. Online state means
1063 * that the FC link layer has synced, completed the handshaking process, and
1064 * is ready for login to start.
1065 */
1066static void set_port_online(u64 *fc_regs)
1067{
1068 u64 cmdcfg;
1069
1070 cmdcfg = readq_be(&fc_regs[FC_MTIP_CMDCONFIG / 8]);
1071 cmdcfg &= (~FC_MTIP_CMDCONFIG_OFFLINE); /* clear OFF_LINE */
1072 cmdcfg |= (FC_MTIP_CMDCONFIG_ONLINE); /* set ON_LINE */
1073 writeq_be(cmdcfg, &fc_regs[FC_MTIP_CMDCONFIG / 8]);
1074}
1075
1076/**
1077 * set_port_offline() - transitions the specified host FC port to offline state
1078 * @fc_regs: Top of MMIO region defined for specified port.
1079 *
1080 * The provided MMIO region must be mapped prior to call.
1081 */
1082static void set_port_offline(u64 *fc_regs)
1083{
1084 u64 cmdcfg;
1085
1086 cmdcfg = readq_be(&fc_regs[FC_MTIP_CMDCONFIG / 8]);
1087 cmdcfg &= (~FC_MTIP_CMDCONFIG_ONLINE); /* clear ON_LINE */
1088 cmdcfg |= (FC_MTIP_CMDCONFIG_OFFLINE); /* set OFF_LINE */
1089 writeq_be(cmdcfg, &fc_regs[FC_MTIP_CMDCONFIG / 8]);
1090}
1091
1092/**
1093 * wait_port_online() - waits for the specified host FC port come online
1094 * @fc_regs: Top of MMIO region defined for specified port.
1095 * @delay_us: Number of microseconds to delay between reading port status.
1096 * @nretry: Number of cycles to retry reading port status.
1097 *
1098 * The provided MMIO region must be mapped prior to call. This will timeout
1099 * when the cable is not plugged in.
1100 *
1101 * Return:
1102 * TRUE (1) when the specified port is online
1103 * FALSE (0) when the specified port fails to come online after timeout
1104 * -EINVAL when @delay_us is less than 1000
1105 */
1106static int wait_port_online(u64 *fc_regs, u32 delay_us, u32 nretry)
1107{
1108 u64 status;
1109
1110 if (delay_us < 1000) {
1111 pr_err("%s: invalid delay specified %d\n", __func__, delay_us);
1112 return -EINVAL;
1113 }
1114
1115 do {
1116 msleep(delay_us / 1000);
1117 status = readq_be(&fc_regs[FC_MTIP_STATUS / 8]);
1118 } while ((status & FC_MTIP_STATUS_MASK) != FC_MTIP_STATUS_ONLINE &&
1119 nretry--);
1120
1121 return ((status & FC_MTIP_STATUS_MASK) == FC_MTIP_STATUS_ONLINE);
1122}
1123
1124/**
1125 * wait_port_offline() - waits for the specified host FC port go offline
1126 * @fc_regs: Top of MMIO region defined for specified port.
1127 * @delay_us: Number of microseconds to delay between reading port status.
1128 * @nretry: Number of cycles to retry reading port status.
1129 *
1130 * The provided MMIO region must be mapped prior to call.
1131 *
1132 * Return:
1133 * TRUE (1) when the specified port is offline
1134 * FALSE (0) when the specified port fails to go offline after timeout
1135 * -EINVAL when @delay_us is less than 1000
1136 */
1137static int wait_port_offline(u64 *fc_regs, u32 delay_us, u32 nretry)
1138{
1139 u64 status;
1140
1141 if (delay_us < 1000) {
1142 pr_err("%s: invalid delay specified %d\n", __func__, delay_us);
1143 return -EINVAL;
1144 }
1145
1146 do {
1147 msleep(delay_us / 1000);
1148 status = readq_be(&fc_regs[FC_MTIP_STATUS / 8]);
1149 } while ((status & FC_MTIP_STATUS_MASK) != FC_MTIP_STATUS_OFFLINE &&
1150 nretry--);
1151
1152 return ((status & FC_MTIP_STATUS_MASK) == FC_MTIP_STATUS_OFFLINE);
1153}
1154
1155/**
1156 * afu_set_wwpn() - configures the WWPN for the specified host FC port
1157 * @afu: AFU associated with the host that owns the specified FC port.
1158 * @port: Port number being configured.
1159 * @fc_regs: Top of MMIO region defined for specified port.
1160 * @wwpn: The world-wide-port-number previously discovered for port.
1161 *
1162 * The provided MMIO region must be mapped prior to call. As part of the
1163 * sequence to configure the WWPN, the port is toggled offline and then back
1164 * online. This toggling action can cause this routine to delay up to a few
1165 * seconds. When configured to use the internal LUN feature of the AFU, a
1166 * failure to come online is overridden.
1167 *
1168 * Return:
1169 * 0 when the WWPN is successfully written and the port comes back online
1170 * -1 when the port fails to go offline or come back up online
1171 */
1172static int afu_set_wwpn(struct afu *afu, int port, u64 *fc_regs, u64 wwpn)
1173{
1174 int ret = 0;
1175
1176 set_port_offline(fc_regs);
1177
1178 if (!wait_port_offline(fc_regs, FC_PORT_STATUS_RETRY_INTERVAL_US,
1179 FC_PORT_STATUS_RETRY_CNT)) {
1180 pr_debug("%s: wait on port %d to go offline timed out\n",
1181 __func__, port);
1182 ret = -1; /* but continue on to leave the port back online */
1183 }
1184
1185 if (ret == 0)
1186 writeq_be(wwpn, &fc_regs[FC_PNAME / 8]);
1187
1188 set_port_online(fc_regs);
1189
1190 if (!wait_port_online(fc_regs, FC_PORT_STATUS_RETRY_INTERVAL_US,
1191 FC_PORT_STATUS_RETRY_CNT)) {
1192 pr_debug("%s: wait on port %d to go online timed out\n",
1193 __func__, port);
1194 ret = -1;
1195
1196 /*
1197 * Override for internal lun!!!
1198 */
1199 if (afu->internal_lun) {
1200 pr_debug("%s: Overriding port %d online timeout!!!\n",
1201 __func__, port);
1202 ret = 0;
1203 }
1204 }
1205
1206 pr_debug("%s: returning rc=%d\n", __func__, ret);
1207
1208 return ret;
1209}
1210
1211/**
1212 * afu_link_reset() - resets the specified host FC port
1213 * @afu: AFU associated with the host that owns the specified FC port.
1214 * @port: Port number being configured.
1215 * @fc_regs: Top of MMIO region defined for specified port.
1216 *
1217 * The provided MMIO region must be mapped prior to call. The sequence to
1218 * reset the port involves toggling it offline and then back online. This
1219 * action can cause this routine to delay up to a few seconds. An effort
1220 * is made to maintain link with the device by switching to host to use
1221 * the alternate port exclusively while the reset takes place.
1222 * failure to come online is overridden.
1223 */
1224static void afu_link_reset(struct afu *afu, int port, u64 *fc_regs)
1225{
1226 u64 port_sel;
1227
1228 /* first switch the AFU to the other links, if any */
1229 port_sel = readq_be(&afu->afu_map->global.regs.afu_port_sel);
1230 port_sel &= ~(1 << port);
1231 writeq_be(port_sel, &afu->afu_map->global.regs.afu_port_sel);
1232 cxlflash_afu_sync(afu, 0, 0, AFU_GSYNC);
1233
1234 set_port_offline(fc_regs);
1235 if (!wait_port_offline(fc_regs, FC_PORT_STATUS_RETRY_INTERVAL_US,
1236 FC_PORT_STATUS_RETRY_CNT))
1237 pr_err("%s: wait on port %d to go offline timed out\n",
1238 __func__, port);
1239
1240 set_port_online(fc_regs);
1241 if (!wait_port_online(fc_regs, FC_PORT_STATUS_RETRY_INTERVAL_US,
1242 FC_PORT_STATUS_RETRY_CNT))
1243 pr_err("%s: wait on port %d to go online timed out\n",
1244 __func__, port);
1245
1246 /* switch back to include this port */
1247 port_sel |= (1 << port);
1248 writeq_be(port_sel, &afu->afu_map->global.regs.afu_port_sel);
1249 cxlflash_afu_sync(afu, 0, 0, AFU_GSYNC);
1250
1251 pr_debug("%s: returning port_sel=%lld\n", __func__, port_sel);
1252}
1253
1254/*
1255 * Asynchronous interrupt information table
1256 */
1257static const struct asyc_intr_info ainfo[] = {
1258 {SISL_ASTATUS_FC0_OTHER, "other error", 0, CLR_FC_ERROR | LINK_RESET},
1259 {SISL_ASTATUS_FC0_LOGO, "target initiated LOGO", 0, 0},
1260 {SISL_ASTATUS_FC0_CRC_T, "CRC threshold exceeded", 0, LINK_RESET},
1261 {SISL_ASTATUS_FC0_LOGI_R, "login timed out, retrying", 0, 0},
1262 {SISL_ASTATUS_FC0_LOGI_F, "login failed", 0, CLR_FC_ERROR},
1263 {SISL_ASTATUS_FC0_LOGI_S, "login succeeded", 0, 0},
1264 {SISL_ASTATUS_FC0_LINK_DN, "link down", 0, 0},
1265 {SISL_ASTATUS_FC0_LINK_UP, "link up", 0, 0},
1266 {SISL_ASTATUS_FC1_OTHER, "other error", 1, CLR_FC_ERROR | LINK_RESET},
1267 {SISL_ASTATUS_FC1_LOGO, "target initiated LOGO", 1, 0},
1268 {SISL_ASTATUS_FC1_CRC_T, "CRC threshold exceeded", 1, LINK_RESET},
1269 {SISL_ASTATUS_FC1_LOGI_R, "login timed out, retrying", 1, 0},
1270 {SISL_ASTATUS_FC1_LOGI_F, "login failed", 1, CLR_FC_ERROR},
1271 {SISL_ASTATUS_FC1_LOGI_S, "login succeeded", 1, 0},
1272 {SISL_ASTATUS_FC1_LINK_DN, "link down", 1, 0},
1273 {SISL_ASTATUS_FC1_LINK_UP, "link up", 1, 0},
1274 {0x0, "", 0, 0} /* terminator */
1275};
1276
1277/**
1278 * find_ainfo() - locates and returns asynchronous interrupt information
1279 * @status: Status code set by AFU on error.
1280 *
1281 * Return: The located information or NULL when the status code is invalid.
1282 */
1283static const struct asyc_intr_info *find_ainfo(u64 status)
1284{
1285 const struct asyc_intr_info *info;
1286
1287 for (info = &ainfo[0]; info->status; info++)
1288 if (info->status == status)
1289 return info;
1290
1291 return NULL;
1292}
1293
1294/**
1295 * afu_err_intr_init() - clears and initializes the AFU for error interrupts
1296 * @afu: AFU associated with the host.
1297 */
1298static void afu_err_intr_init(struct afu *afu)
1299{
1300 int i;
1301 u64 reg;
1302
1303 /* global async interrupts: AFU clears afu_ctrl on context exit
1304 * if async interrupts were sent to that context. This prevents
1305 * the AFU form sending further async interrupts when
1306 * there is
1307 * nobody to receive them.
1308 */
1309
1310 /* mask all */
1311 writeq_be(-1ULL, &afu->afu_map->global.regs.aintr_mask);
1312 /* set LISN# to send and point to master context */
1313 reg = ((u64) (((afu->ctx_hndl << 8) | SISL_MSI_ASYNC_ERROR)) << 40);
1314
1315 if (afu->internal_lun)
1316 reg |= 1; /* Bit 63 indicates local lun */
1317 writeq_be(reg, &afu->afu_map->global.regs.afu_ctrl);
1318 /* clear all */
1319 writeq_be(-1ULL, &afu->afu_map->global.regs.aintr_clear);
1320 /* unmask bits that are of interest */
1321 /* note: afu can send an interrupt after this step */
1322 writeq_be(SISL_ASTATUS_MASK, &afu->afu_map->global.regs.aintr_mask);
1323 /* clear again in case a bit came on after previous clear but before */
1324 /* unmask */
1325 writeq_be(-1ULL, &afu->afu_map->global.regs.aintr_clear);
1326
1327 /* Clear/Set internal lun bits */
1328 reg = readq_be(&afu->afu_map->global.fc_regs[0][FC_CONFIG2 / 8]);
1329 reg &= SISL_FC_INTERNAL_MASK;
1330 if (afu->internal_lun)
1331 reg |= ((u64)(afu->internal_lun - 1) << SISL_FC_INTERNAL_SHIFT);
1332 writeq_be(reg, &afu->afu_map->global.fc_regs[0][FC_CONFIG2 / 8]);
1333
1334 /* now clear FC errors */
1335 for (i = 0; i < NUM_FC_PORTS; i++) {
1336 writeq_be(0xFFFFFFFFU,
1337 &afu->afu_map->global.fc_regs[i][FC_ERROR / 8]);
1338 writeq_be(0, &afu->afu_map->global.fc_regs[i][FC_ERRCAP / 8]);
1339 }
1340
1341 /* sync interrupts for master's IOARRIN write */
1342 /* note that unlike asyncs, there can be no pending sync interrupts */
1343 /* at this time (this is a fresh context and master has not written */
1344 /* IOARRIN yet), so there is nothing to clear. */
1345
1346 /* set LISN#, it is always sent to the context that wrote IOARRIN */
1347 writeq_be(SISL_MSI_SYNC_ERROR, &afu->host_map->ctx_ctrl);
1348 writeq_be(SISL_ISTATUS_MASK, &afu->host_map->intr_mask);
1349}
1350
1351/**
1352 * cxlflash_sync_err_irq() - interrupt handler for synchronous errors
1353 * @irq: Interrupt number.
1354 * @data: Private data provided at interrupt registration, the AFU.
1355 *
1356 * Return: Always return IRQ_HANDLED.
1357 */
1358static irqreturn_t cxlflash_sync_err_irq(int irq, void *data)
1359{
1360 struct afu *afu = (struct afu *)data;
1361 u64 reg;
1362 u64 reg_unmasked;
1363
1364 reg = readq_be(&afu->host_map->intr_status);
1365 reg_unmasked = (reg & SISL_ISTATUS_UNMASK);
1366
1367 if (reg_unmasked == 0UL) {
1368 pr_err("%s: %llX: spurious interrupt, intr_status %016llX\n",
1369 __func__, (u64)afu, reg);
1370 goto cxlflash_sync_err_irq_exit;
1371 }
1372
1373 pr_err("%s: %llX: unexpected interrupt, intr_status %016llX\n",
1374 __func__, (u64)afu, reg);
1375
1376 writeq_be(reg_unmasked, &afu->host_map->intr_clear);
1377
1378cxlflash_sync_err_irq_exit:
1379 pr_debug("%s: returning rc=%d\n", __func__, IRQ_HANDLED);
1380 return IRQ_HANDLED;
1381}
1382
1383/**
1384 * cxlflash_rrq_irq() - interrupt handler for read-response queue (normal path)
1385 * @irq: Interrupt number.
1386 * @data: Private data provided at interrupt registration, the AFU.
1387 *
1388 * Return: Always return IRQ_HANDLED.
1389 */
1390static irqreturn_t cxlflash_rrq_irq(int irq, void *data)
1391{
1392 struct afu *afu = (struct afu *)data;
1393 struct afu_cmd *cmd;
1394 bool toggle = afu->toggle;
1395 u64 entry,
1396 *hrrq_start = afu->hrrq_start,
1397 *hrrq_end = afu->hrrq_end,
1398 *hrrq_curr = afu->hrrq_curr;
1399
1400 /* Process however many RRQ entries that are ready */
1401 while (true) {
1402 entry = *hrrq_curr;
1403
1404 if ((entry & SISL_RESP_HANDLE_T_BIT) != toggle)
1405 break;
1406
1407 cmd = (struct afu_cmd *)(entry & ~SISL_RESP_HANDLE_T_BIT);
1408 cmd_complete(cmd);
1409
1410 /* Advance to next entry or wrap and flip the toggle bit */
1411 if (hrrq_curr < hrrq_end)
1412 hrrq_curr++;
1413 else {
1414 hrrq_curr = hrrq_start;
1415 toggle ^= SISL_RESP_HANDLE_T_BIT;
1416 }
1417 }
1418
1419 afu->hrrq_curr = hrrq_curr;
1420 afu->toggle = toggle;
1421
1422 return IRQ_HANDLED;
1423}
1424
1425/**
1426 * cxlflash_async_err_irq() - interrupt handler for asynchronous errors
1427 * @irq: Interrupt number.
1428 * @data: Private data provided at interrupt registration, the AFU.
1429 *
1430 * Return: Always return IRQ_HANDLED.
1431 */
1432static irqreturn_t cxlflash_async_err_irq(int irq, void *data)
1433{
1434 struct afu *afu = (struct afu *)data;
1435 struct cxlflash_cfg *cfg;
1436 u64 reg_unmasked;
1437 const struct asyc_intr_info *info;
1438 struct sisl_global_map *global = &afu->afu_map->global;
1439 u64 reg;
1440 u8 port;
1441 int i;
1442
1443 cfg = afu->parent;
1444
1445 reg = readq_be(&global->regs.aintr_status);
1446 reg_unmasked = (reg & SISL_ASTATUS_UNMASK);
1447
1448 if (reg_unmasked == 0) {
1449 pr_err("%s: spurious interrupt, aintr_status 0x%016llX\n",
1450 __func__, reg);
1451 goto out;
1452 }
1453
1454 /* it is OK to clear AFU status before FC_ERROR */
1455 writeq_be(reg_unmasked, &global->regs.aintr_clear);
1456
1457 /* check each bit that is on */
1458 for (i = 0; reg_unmasked; i++, reg_unmasked = (reg_unmasked >> 1)) {
1459 info = find_ainfo(1ULL << i);
1460 if ((reg_unmasked & 0x1) || !info)
1461 continue;
1462
1463 port = info->port;
1464
1465 pr_err("%s: FC Port %d -> %s, fc_status 0x%08llX\n",
1466 __func__, port, info->desc,
1467 readq_be(&global->fc_regs[port][FC_STATUS / 8]));
1468
1469 /*
1470 * do link reset first, some OTHER errors will set FC_ERROR
1471 * again if cleared before or w/o a reset
1472 */
1473 if (info->action & LINK_RESET) {
1474 pr_err("%s: FC Port %d: resetting link\n",
1475 __func__, port);
1476 cfg->lr_state = LINK_RESET_REQUIRED;
1477 cfg->lr_port = port;
1478 schedule_work(&cfg->work_q);
1479 }
1480
1481 if (info->action & CLR_FC_ERROR) {
1482 reg = readq_be(&global->fc_regs[port][FC_ERROR / 8]);
1483
1484 /*
1485 * since all errors are unmasked, FC_ERROR and FC_ERRCAP
1486 * should be the same and tracing one is sufficient.
1487 */
1488
1489 pr_err("%s: fc %d: clearing fc_error 0x%08llX\n",
1490 __func__, port, reg);
1491
1492 writeq_be(reg, &global->fc_regs[port][FC_ERROR / 8]);
1493 writeq_be(0, &global->fc_regs[port][FC_ERRCAP / 8]);
1494 }
1495 }
1496
1497out:
1498 pr_debug("%s: returning rc=%d, afu=%p\n", __func__, IRQ_HANDLED, afu);
1499 return IRQ_HANDLED;
1500}
1501
1502/**
1503 * start_context() - starts the master context
1504 * @cxlflash: Internal structure associated with the host.
1505 *
1506 * Return: A success or failure value from CXL services.
1507 */
1508static int start_context(struct cxlflash_cfg *cfg)
1509{
1510 int rc = 0;
1511
1512 rc = cxl_start_context(cfg->mcctx,
1513 cfg->afu->work.work_element_descriptor,
1514 NULL);
1515
1516 pr_debug("%s: returning rc=%d\n", __func__, rc);
1517 return rc;
1518}
1519
1520/**
1521 * read_vpd() - obtains the WWPNs from VPD
1522 * @cxlflash: Internal structure associated with the host.
1523 * @wwpn: Array of size NUM_FC_PORTS to pass back WWPNs
1524 *
1525 * Return:
1526 * 0 on success
1527 * -ENODEV when VPD or WWPN keywords not found
1528 */
1529static int read_vpd(struct cxlflash_cfg *cfg, u64 wwpn[])
1530{
1531 struct pci_dev *dev = cfg->parent_dev;
1532 int rc = 0;
1533 int ro_start, ro_size, i, j, k;
1534 ssize_t vpd_size;
1535 char vpd_data[CXLFLASH_VPD_LEN];
1536 char tmp_buf[WWPN_BUF_LEN] = { 0 };
1537 char *wwpn_vpd_tags[NUM_FC_PORTS] = { "V5", "V6" };
1538
1539 /* Get the VPD data from the device */
1540 vpd_size = pci_read_vpd(dev, 0, sizeof(vpd_data), vpd_data);
1541 if (unlikely(vpd_size <= 0)) {
1542 pr_err("%s: Unable to read VPD (size = %ld)\n",
1543 __func__, vpd_size);
1544 rc = -ENODEV;
1545 goto out;
1546 }
1547
1548 /* Get the read only section offset */
1549 ro_start = pci_vpd_find_tag(vpd_data, 0, vpd_size,
1550 PCI_VPD_LRDT_RO_DATA);
1551 if (unlikely(ro_start < 0)) {
1552 pr_err("%s: VPD Read-only data not found\n", __func__);
1553 rc = -ENODEV;
1554 goto out;
1555 }
1556
1557 /* Get the read only section size, cap when extends beyond read VPD */
1558 ro_size = pci_vpd_lrdt_size(&vpd_data[ro_start]);
1559 j = ro_size;
1560 i = ro_start + PCI_VPD_LRDT_TAG_SIZE;
1561 if (unlikely((i + j) > vpd_size)) {
1562 pr_debug("%s: Might need to read more VPD (%d > %ld)\n",
1563 __func__, (i + j), vpd_size);
1564 ro_size = vpd_size - i;
1565 }
1566
1567 /*
1568 * Find the offset of the WWPN tag within the read only
1569 * VPD data and validate the found field (partials are
1570 * no good to us). Convert the ASCII data to an integer
1571 * value. Note that we must copy to a temporary buffer
1572 * because the conversion service requires that the ASCII
1573 * string be terminated.
1574 */
1575 for (k = 0; k < NUM_FC_PORTS; k++) {
1576 j = ro_size;
1577 i = ro_start + PCI_VPD_LRDT_TAG_SIZE;
1578
1579 i = pci_vpd_find_info_keyword(vpd_data, i, j, wwpn_vpd_tags[k]);
1580 if (unlikely(i < 0)) {
1581 pr_err("%s: Port %d WWPN not found in VPD\n",
1582 __func__, k);
1583 rc = -ENODEV;
1584 goto out;
1585 }
1586
1587 j = pci_vpd_info_field_size(&vpd_data[i]);
1588 i += PCI_VPD_INFO_FLD_HDR_SIZE;
1589 if (unlikely((i + j > vpd_size) || (j != WWPN_LEN))) {
1590 pr_err("%s: Port %d WWPN incomplete or VPD corrupt\n",
1591 __func__, k);
1592 rc = -ENODEV;
1593 goto out;
1594 }
1595
1596 memcpy(tmp_buf, &vpd_data[i], WWPN_LEN);
1597 rc = kstrtoul(tmp_buf, WWPN_LEN, (ulong *)&wwpn[k]);
1598 if (unlikely(rc)) {
1599 pr_err("%s: Fail to convert port %d WWPN to integer\n",
1600 __func__, k);
1601 rc = -ENODEV;
1602 goto out;
1603 }
1604 }
1605
1606out:
1607 pr_debug("%s: returning rc=%d\n", __func__, rc);
1608 return rc;
1609}
1610
1611/**
1612 * cxlflash_context_reset() - timeout handler for AFU commands
1613 * @cmd: AFU command that timed out.
1614 *
1615 * Sends a reset to the AFU.
1616 */
1617void cxlflash_context_reset(struct afu_cmd *cmd)
1618{
1619 int nretry = 0;
1620 u64 rrin = 0x1;
1621 u64 room = 0;
1622 struct afu *afu = cmd->parent;
1623 ulong lock_flags;
1624
1625 pr_debug("%s: cmd=%p\n", __func__, cmd);
1626
1627 spin_lock_irqsave(&cmd->slock, lock_flags);
1628
1629 /* Already completed? */
1630 if (cmd->sa.host_use_b[0] & B_DONE) {
1631 spin_unlock_irqrestore(&cmd->slock, lock_flags);
1632 return;
1633 }
1634
1635 cmd->sa.host_use_b[0] |= (B_DONE | B_ERROR | B_TIMEOUT);
1636 spin_unlock_irqrestore(&cmd->slock, lock_flags);
1637
1638 /*
1639 * We really want to send this reset at all costs, so spread
1640 * out wait time on successive retries for available room.
1641 */
1642 do {
1643 room = readq_be(&afu->host_map->cmd_room);
1644 atomic64_set(&afu->room, room);
1645 if (room)
1646 goto write_rrin;
1647 udelay(nretry);
1648 } while (nretry++ < MC_ROOM_RETRY_CNT);
1649
1650 pr_err("%s: no cmd_room to send reset\n", __func__);
1651 return;
1652
1653write_rrin:
1654 nretry = 0;
1655 writeq_be(rrin, &afu->host_map->ioarrin);
1656 do {
1657 rrin = readq_be(&afu->host_map->ioarrin);
1658 if (rrin != 0x1)
1659 break;
1660 /* Double delay each time */
1661 udelay(2 ^ nretry);
1662 } while (nretry++ < MC_ROOM_RETRY_CNT);
1663}
1664
1665/**
1666 * init_pcr() - initialize the provisioning and control registers
1667 * @cxlflash: Internal structure associated with the host.
1668 *
1669 * Also sets up fast access to the mapped registers and initializes AFU
1670 * command fields that never change.
1671 */
1672void init_pcr(struct cxlflash_cfg *cfg)
1673{
1674 struct afu *afu = cfg->afu;
1675 struct sisl_ctrl_map *ctrl_map;
1676 int i;
1677
1678 for (i = 0; i < MAX_CONTEXT; i++) {
1679 ctrl_map = &afu->afu_map->ctrls[i].ctrl;
1680 /* disrupt any clients that could be running */
1681 /* e. g. clients that survived a master restart */
1682 writeq_be(0, &ctrl_map->rht_start);
1683 writeq_be(0, &ctrl_map->rht_cnt_id);
1684 writeq_be(0, &ctrl_map->ctx_cap);
1685 }
1686
1687 /* copy frequently used fields into afu */
1688 afu->ctx_hndl = (u16) cxl_process_element(cfg->mcctx);
1689 /* ctx_hndl is 16 bits in CAIA */
1690 afu->host_map = &afu->afu_map->hosts[afu->ctx_hndl].host;
1691 afu->ctrl_map = &afu->afu_map->ctrls[afu->ctx_hndl].ctrl;
1692
1693 /* Program the Endian Control for the master context */
1694 writeq_be(SISL_ENDIAN_CTRL, &afu->host_map->endian_ctrl);
1695
1696 /* initialize cmd fields that never change */
1697 for (i = 0; i < CXLFLASH_NUM_CMDS; i++) {
1698 afu->cmd[i].rcb.ctx_id = afu->ctx_hndl;
1699 afu->cmd[i].rcb.msi = SISL_MSI_RRQ_UPDATED;
1700 afu->cmd[i].rcb.rrq = 0x0;
1701 }
1702}
1703
1704/**
1705 * init_global() - initialize AFU global registers
1706 * @cxlflash: Internal structure associated with the host.
1707 */
1708int init_global(struct cxlflash_cfg *cfg)
1709{
1710 struct afu *afu = cfg->afu;
1711 u64 wwpn[NUM_FC_PORTS]; /* wwpn of AFU ports */
1712 int i = 0, num_ports = 0;
1713 int rc = 0;
1714 u64 reg;
1715
1716 rc = read_vpd(cfg, &wwpn[0]);
1717 if (rc) {
1718 pr_err("%s: could not read vpd rc=%d\n", __func__, rc);
1719 goto out;
1720 }
1721
1722 pr_debug("%s: wwpn0=0x%llX wwpn1=0x%llX\n", __func__, wwpn[0], wwpn[1]);
1723
1724 /* set up RRQ in AFU for master issued cmds */
1725 writeq_be((u64) afu->hrrq_start, &afu->host_map->rrq_start);
1726 writeq_be((u64) afu->hrrq_end, &afu->host_map->rrq_end);
1727
1728 /* AFU configuration */
1729 reg = readq_be(&afu->afu_map->global.regs.afu_config);
1730 reg |= SISL_AFUCONF_AR_ALL|SISL_AFUCONF_ENDIAN;
1731 /* enable all auto retry options and control endianness */
1732 /* leave others at default: */
1733 /* CTX_CAP write protected, mbox_r does not clear on read and */
1734 /* checker on if dual afu */
1735 writeq_be(reg, &afu->afu_map->global.regs.afu_config);
1736
1737 /* global port select: select either port */
1738 if (afu->internal_lun) {
1739 /* only use port 0 */
1740 writeq_be(PORT0, &afu->afu_map->global.regs.afu_port_sel);
1741 num_ports = NUM_FC_PORTS - 1;
1742 } else {
1743 writeq_be(BOTH_PORTS, &afu->afu_map->global.regs.afu_port_sel);
1744 num_ports = NUM_FC_PORTS;
1745 }
1746
1747 for (i = 0; i < num_ports; i++) {
1748 /* unmask all errors (but they are still masked at AFU) */
1749 writeq_be(0, &afu->afu_map->global.fc_regs[i][FC_ERRMSK / 8]);
1750 /* clear CRC error cnt & set a threshold */
1751 (void)readq_be(&afu->afu_map->global.
1752 fc_regs[i][FC_CNT_CRCERR / 8]);
1753 writeq_be(MC_CRC_THRESH, &afu->afu_map->global.fc_regs[i]
1754 [FC_CRC_THRESH / 8]);
1755
1756 /* set WWPNs. If already programmed, wwpn[i] is 0 */
1757 if (wwpn[i] != 0 &&
1758 afu_set_wwpn(afu, i,
1759 &afu->afu_map->global.fc_regs[i][0],
1760 wwpn[i])) {
1761 pr_err("%s: failed to set WWPN on port %d\n",
1762 __func__, i);
1763 rc = -EIO;
1764 goto out;
1765 }
1766 /* Programming WWPN back to back causes additional
1767 * offline/online transitions and a PLOGI
1768 */
1769 msleep(100);
1770
1771 }
1772
1773 /* set up master's own CTX_CAP to allow real mode, host translation */
1774 /* tbls, afu cmds and read/write GSCSI cmds. */
1775 /* First, unlock ctx_cap write by reading mbox */
1776 (void)readq_be(&afu->ctrl_map->mbox_r); /* unlock ctx_cap */
1777 writeq_be((SISL_CTX_CAP_REAL_MODE | SISL_CTX_CAP_HOST_XLATE |
1778 SISL_CTX_CAP_READ_CMD | SISL_CTX_CAP_WRITE_CMD |
1779 SISL_CTX_CAP_AFU_CMD | SISL_CTX_CAP_GSCSI_CMD),
1780 &afu->ctrl_map->ctx_cap);
1781 /* init heartbeat */
1782 afu->hb = readq_be(&afu->afu_map->global.regs.afu_hb);
1783
1784out:
1785 return rc;
1786}
1787
1788/**
1789 * start_afu() - initializes and starts the AFU
1790 * @cxlflash: Internal structure associated with the host.
1791 */
1792static int start_afu(struct cxlflash_cfg *cfg)
1793{
1794 struct afu *afu = cfg->afu;
1795 struct afu_cmd *cmd;
1796
1797 int i = 0;
1798 int rc = 0;
1799
1800 for (i = 0; i < CXLFLASH_NUM_CMDS; i++) {
1801 cmd = &afu->cmd[i];
1802
1803 init_completion(&cmd->cevent);
1804 spin_lock_init(&cmd->slock);
1805 cmd->parent = afu;
1806 }
1807
1808 init_pcr(cfg);
1809
1810 /* initialize RRQ pointers */
1811 afu->hrrq_start = &afu->rrq_entry[0];
1812 afu->hrrq_end = &afu->rrq_entry[NUM_RRQ_ENTRY - 1];
1813 afu->hrrq_curr = afu->hrrq_start;
1814 afu->toggle = 1;
1815
1816 rc = init_global(cfg);
1817
1818 pr_debug("%s: returning rc=%d\n", __func__, rc);
1819 return rc;
1820}
1821
1822/**
1823 * init_mc() - create and register as the master context
1824 * @cxlflash: Internal structure associated with the host.
1825 *
1826 * Return:
1827 * 0 on success
1828 * -ENOMEM when unable to obtain a context from CXL services
1829 * A failure value from CXL services.
1830 */
1831static int init_mc(struct cxlflash_cfg *cfg)
1832{
1833 struct cxl_context *ctx;
1834 struct device *dev = &cfg->dev->dev;
1835 struct afu *afu = cfg->afu;
1836 int rc = 0;
1837 enum undo_level level;
1838
1839 ctx = cxl_get_context(cfg->dev);
1840 if (unlikely(!ctx))
1841 return -ENOMEM;
1842 cfg->mcctx = ctx;
1843
1844 /* Set it up as a master with the CXL */
1845 cxl_set_master(ctx);
1846
1847 /* During initialization reset the AFU to start from a clean slate */
1848 rc = cxl_afu_reset(cfg->mcctx);
1849 if (unlikely(rc)) {
1850 dev_err(dev, "%s: initial AFU reset failed rc=%d\n",
1851 __func__, rc);
1852 level = RELEASE_CONTEXT;
1853 goto out;
1854 }
1855
1856 rc = cxl_allocate_afu_irqs(ctx, 3);
1857 if (unlikely(rc)) {
1858 dev_err(dev, "%s: call to allocate_afu_irqs failed rc=%d!\n",
1859 __func__, rc);
1860 level = RELEASE_CONTEXT;
1861 goto out;
1862 }
1863
1864 rc = cxl_map_afu_irq(ctx, 1, cxlflash_sync_err_irq, afu,
1865 "SISL_MSI_SYNC_ERROR");
1866 if (unlikely(rc <= 0)) {
1867 dev_err(dev, "%s: IRQ 1 (SISL_MSI_SYNC_ERROR) map failed!\n",
1868 __func__);
1869 level = FREE_IRQ;
1870 goto out;
1871 }
1872
1873 rc = cxl_map_afu_irq(ctx, 2, cxlflash_rrq_irq, afu,
1874 "SISL_MSI_RRQ_UPDATED");
1875 if (unlikely(rc <= 0)) {
1876 dev_err(dev, "%s: IRQ 2 (SISL_MSI_RRQ_UPDATED) map failed!\n",
1877 __func__);
1878 level = UNMAP_ONE;
1879 goto out;
1880 }
1881
1882 rc = cxl_map_afu_irq(ctx, 3, cxlflash_async_err_irq, afu,
1883 "SISL_MSI_ASYNC_ERROR");
1884 if (unlikely(rc <= 0)) {
1885 dev_err(dev, "%s: IRQ 3 (SISL_MSI_ASYNC_ERROR) map failed!\n",
1886 __func__);
1887 level = UNMAP_TWO;
1888 goto out;
1889 }
1890
1891 rc = 0;
1892
1893 /* This performs the equivalent of the CXL_IOCTL_START_WORK.
1894 * The CXL_IOCTL_GET_PROCESS_ELEMENT is implicit in the process
1895 * element (pe) that is embedded in the context (ctx)
1896 */
1897 rc = start_context(cfg);
1898 if (unlikely(rc)) {
1899 dev_err(dev, "%s: start context failed rc=%d\n", __func__, rc);
1900 level = UNMAP_THREE;
1901 goto out;
1902 }
1903ret:
1904 pr_debug("%s: returning rc=%d\n", __func__, rc);
1905 return rc;
1906out:
1907 term_mc(cfg, level);
1908 goto ret;
1909}
1910
1911/**
1912 * init_afu() - setup as master context and start AFU
1913 * @cxlflash: Internal structure associated with the host.
1914 *
1915 * This routine is a higher level of control for configuring the
1916 * AFU on probe and reset paths.
1917 *
1918 * Return:
1919 * 0 on success
1920 * -ENOMEM when unable to map the AFU MMIO space
1921 * A failure value from internal services.
1922 */
1923static int init_afu(struct cxlflash_cfg *cfg)
1924{
1925 u64 reg;
1926 int rc = 0;
1927 struct afu *afu = cfg->afu;
1928 struct device *dev = &cfg->dev->dev;
1929
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1930 cxl_perst_reloads_same_image(cfg->cxl_afu, true);
1931
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1932 rc = init_mc(cfg);
1933 if (rc) {
1934 dev_err(dev, "%s: call to init_mc failed, rc=%d!\n",
1935 __func__, rc);
1936 goto err1;
1937 }
1938
1939 /* Map the entire MMIO space of the AFU.
1940 */
1941 afu->afu_map = cxl_psa_map(cfg->mcctx);
1942 if (!afu->afu_map) {
1943 rc = -ENOMEM;
1944 term_mc(cfg, UNDO_START);
1945 dev_err(dev, "%s: call to cxl_psa_map failed!\n", __func__);
1946 goto err1;
1947 }
1948
1949 /* don't byte reverse on reading afu_version, else the string form */
1950 /* will be backwards */
1951 reg = afu->afu_map->global.regs.afu_version;
1952 memcpy(afu->version, &reg, 8);
1953 afu->interface_version =
1954 readq_be(&afu->afu_map->global.regs.interface_version);
1955 pr_debug("%s: afu version %s, interface version 0x%llX\n",
1956 __func__, afu->version, afu->interface_version);
1957
1958 rc = start_afu(cfg);
1959 if (rc) {
1960 dev_err(dev, "%s: call to start_afu failed, rc=%d!\n",
1961 __func__, rc);
1962 term_mc(cfg, UNDO_START);
1963 cxl_psa_unmap((void *)afu->afu_map);
1964 afu->afu_map = NULL;
1965 goto err1;
1966 }
1967
1968 afu_err_intr_init(cfg->afu);
1969 atomic64_set(&afu->room, readq_be(&afu->host_map->cmd_room));
1970
1971err1:
1972 pr_debug("%s: returning rc=%d\n", __func__, rc);
1973 return rc;
1974}
1975
1976/**
1977 * cxlflash_send_cmd() - sends an AFU command
1978 * @afu: AFU associated with the host.
1979 * @cmd: AFU command to send.
1980 *
1981 * Return:
1982 * 0 on success
1983 * -1 on failure
1984 */
1985int cxlflash_send_cmd(struct afu *afu, struct afu_cmd *cmd)
1986{
1987 struct cxlflash_cfg *cfg = afu->parent;
1988 int nretry = 0;
1989 int rc = 0;
1990 u64 room;
1991 long newval;
1992
1993 /*
1994 * This routine is used by critical users such an AFU sync and to
1995 * send a task management function (TMF). Thus we want to retry a
1996 * bit before returning an error. To avoid the performance penalty
1997 * of MMIO, we spread the update of 'room' over multiple commands.
1998 */
1999retry:
2000 newval = atomic64_dec_if_positive(&afu->room);
2001 if (!newval) {
2002 do {
2003 room = readq_be(&afu->host_map->cmd_room);
2004 atomic64_set(&afu->room, room);
2005 if (room)
2006 goto write_ioarrin;
2007 udelay(nretry);
2008 } while (nretry++ < MC_ROOM_RETRY_CNT);
2009
2010 pr_err("%s: no cmd_room to send 0x%X\n",
2011 __func__, cmd->rcb.cdb[0]);
2012
2013 goto no_room;
2014 } else if (unlikely(newval < 0)) {
2015 /* This should be rare. i.e. Only if two threads race and
2016 * decrement before the MMIO read is done. In this case
2017 * just benefit from the other thread having updated
2018 * afu->room.
2019 */
2020 if (nretry++ < MC_ROOM_RETRY_CNT) {
2021 udelay(nretry);
2022 goto retry;
2023 }
2024
2025 goto no_room;
2026 }
2027
2028write_ioarrin:
2029 writeq_be((u64)&cmd->rcb, &afu->host_map->ioarrin);
2030out:
2031 pr_debug("%s: cmd=%p len=%d ea=%p rc=%d\n", __func__, cmd,
2032 cmd->rcb.data_len, (void *)cmd->rcb.data_ea, rc);
2033 return rc;
2034
2035no_room:
2036 afu->read_room = true;
2037 schedule_work(&cfg->work_q);
2038 rc = SCSI_MLQUEUE_HOST_BUSY;
2039 goto out;
2040}
2041
2042/**
2043 * cxlflash_wait_resp() - polls for a response or timeout to a sent AFU command
2044 * @afu: AFU associated with the host.
2045 * @cmd: AFU command that was sent.
2046 */
2047void cxlflash_wait_resp(struct afu *afu, struct afu_cmd *cmd)
2048{
2049 ulong timeout = jiffies + (cmd->rcb.timeout * 2 * HZ);
2050
2051 timeout = wait_for_completion_timeout(&cmd->cevent, timeout);
2052 if (!timeout)
2053 cxlflash_context_reset(cmd);
2054
2055 if (unlikely(cmd->sa.ioasc != 0))
2056 pr_err("%s: CMD 0x%X failed, IOASC: flags 0x%X, afu_rc 0x%X, "
2057 "scsi_rc 0x%X, fc_rc 0x%X\n", __func__, cmd->rcb.cdb[0],
2058 cmd->sa.rc.flags, cmd->sa.rc.afu_rc, cmd->sa.rc.scsi_rc,
2059 cmd->sa.rc.fc_rc);
2060}
2061
2062/**
2063 * cxlflash_afu_sync() - builds and sends an AFU sync command
2064 * @afu: AFU associated with the host.
2065 * @ctx_hndl_u: Identifies context requesting sync.
2066 * @res_hndl_u: Identifies resource requesting sync.
2067 * @mode: Type of sync to issue (lightweight, heavyweight, global).
2068 *
2069 * The AFU can only take 1 sync command at a time. This routine enforces this
2070 * limitation by using a mutex to provide exlusive access to the AFU during
2071 * the sync. This design point requires calling threads to not be on interrupt
2072 * context due to the possibility of sleeping during concurrent sync operations.
2073 *
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2074 * AFU sync operations are only necessary and allowed when the device is
2075 * operating normally. When not operating normally, sync requests can occur as
2076 * part of cleaning up resources associated with an adapter prior to removal.
2077 * In this scenario, these requests are simply ignored (safe due to the AFU
2078 * going away).
2079 *
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2080 * Return:
2081 * 0 on success
2082 * -1 on failure
2083 */
2084int cxlflash_afu_sync(struct afu *afu, ctx_hndl_t ctx_hndl_u,
2085 res_hndl_t res_hndl_u, u8 mode)
2086{
5cdac81a 2087 struct cxlflash_cfg *cfg = afu->parent;
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MO
2088 struct afu_cmd *cmd = NULL;
2089 int rc = 0;
2090 int retry_cnt = 0;
2091 static DEFINE_MUTEX(sync_active);
2092
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MO
2093 if (cfg->state != STATE_NORMAL) {
2094 pr_debug("%s: Sync not required! (%u)\n", __func__, cfg->state);
2095 return 0;
2096 }
2097
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MO
2098 mutex_lock(&sync_active);
2099retry:
2100 cmd = cxlflash_cmd_checkout(afu);
2101 if (unlikely(!cmd)) {
2102 retry_cnt++;
2103 udelay(1000 * retry_cnt);
2104 if (retry_cnt < MC_RETRY_CNT)
2105 goto retry;
2106 pr_err("%s: could not get a free command\n", __func__);
2107 rc = -1;
2108 goto out;
2109 }
2110
2111 pr_debug("%s: afu=%p cmd=%p %d\n", __func__, afu, cmd, ctx_hndl_u);
2112
2113 memset(cmd->rcb.cdb, 0, sizeof(cmd->rcb.cdb));
2114
2115 cmd->rcb.req_flags = SISL_REQ_FLAGS_AFU_CMD;
2116 cmd->rcb.port_sel = 0x0; /* NA */
2117 cmd->rcb.lun_id = 0x0; /* NA */
2118 cmd->rcb.data_len = 0x0;
2119 cmd->rcb.data_ea = 0x0;
2120 cmd->rcb.timeout = MC_AFU_SYNC_TIMEOUT;
2121
2122 cmd->rcb.cdb[0] = 0xC0; /* AFU Sync */
2123 cmd->rcb.cdb[1] = mode;
2124
2125 /* The cdb is aligned, no unaligned accessors required */
2126 *((u16 *)&cmd->rcb.cdb[2]) = swab16(ctx_hndl_u);
2127 *((u32 *)&cmd->rcb.cdb[4]) = swab32(res_hndl_u);
2128
2129 rc = cxlflash_send_cmd(afu, cmd);
2130 if (unlikely(rc))
2131 goto out;
2132
2133 cxlflash_wait_resp(afu, cmd);
2134
2135 /* set on timeout */
2136 if (unlikely((cmd->sa.ioasc != 0) ||
2137 (cmd->sa.host_use_b[0] & B_ERROR)))
2138 rc = -1;
2139out:
2140 mutex_unlock(&sync_active);
2141 if (cmd)
2142 cxlflash_cmd_checkin(cmd);
2143 pr_debug("%s: returning rc=%d\n", __func__, rc);
2144 return rc;
2145}
2146
2147/**
2148 * cxlflash_afu_reset() - resets the AFU
2149 * @cxlflash: Internal structure associated with the host.
2150 *
2151 * Return:
2152 * 0 on success
2153 * A failure value from internal services.
2154 */
2155int cxlflash_afu_reset(struct cxlflash_cfg *cfg)
2156{
2157 int rc = 0;
2158 /* Stop the context before the reset. Since the context is
2159 * no longer available restart it after the reset is complete
2160 */
2161
2162 term_afu(cfg);
2163
2164 rc = init_afu(cfg);
2165
2166 pr_debug("%s: returning rc=%d\n", __func__, rc);
2167 return rc;
2168}
2169
2170/**
2171 * cxlflash_worker_thread() - work thread handler for the AFU
2172 * @work: Work structure contained within cxlflash associated with host.
2173 *
2174 * Handles the following events:
2175 * - Link reset which cannot be performed on interrupt context due to
2176 * blocking up to a few seconds
2177 * - Read AFU command room
2178 */
2179static void cxlflash_worker_thread(struct work_struct *work)
2180{
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MO
2181 struct cxlflash_cfg *cfg = container_of(work, struct cxlflash_cfg,
2182 work_q);
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MO
2183 struct afu *afu = cfg->afu;
2184 int port;
2185 ulong lock_flags;
2186
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2187 /* Avoid MMIO if the device has failed */
2188
2189 if (cfg->state != STATE_NORMAL)
2190 return;
2191
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2192 spin_lock_irqsave(cfg->host->host_lock, lock_flags);
2193
2194 if (cfg->lr_state == LINK_RESET_REQUIRED) {
2195 port = cfg->lr_port;
2196 if (port < 0)
2197 pr_err("%s: invalid port index %d\n", __func__, port);
2198 else {
2199 spin_unlock_irqrestore(cfg->host->host_lock,
2200 lock_flags);
2201
2202 /* The reset can block... */
2203 afu_link_reset(afu, port,
2204 &afu->afu_map->
2205 global.fc_regs[port][0]);
2206 spin_lock_irqsave(cfg->host->host_lock, lock_flags);
2207 }
2208
2209 cfg->lr_state = LINK_RESET_COMPLETE;
2210 }
2211
2212 if (afu->read_room) {
2213 atomic64_set(&afu->room, readq_be(&afu->host_map->cmd_room));
2214 afu->read_room = false;
2215 }
2216
2217 spin_unlock_irqrestore(cfg->host->host_lock, lock_flags);
2218}
2219
2220/**
2221 * cxlflash_probe() - PCI entry point to add host
2222 * @pdev: PCI device associated with the host.
2223 * @dev_id: PCI device id associated with device.
2224 *
2225 * Return: 0 on success / non-zero on failure
2226 */
2227static int cxlflash_probe(struct pci_dev *pdev,
2228 const struct pci_device_id *dev_id)
2229{
2230 struct Scsi_Host *host;
2231 struct cxlflash_cfg *cfg = NULL;
2232 struct device *phys_dev;
2233 struct dev_dependent_vals *ddv;
2234 int rc = 0;
2235
2236 dev_dbg(&pdev->dev, "%s: Found CXLFLASH with IRQ: %d\n",
2237 __func__, pdev->irq);
2238
2239 ddv = (struct dev_dependent_vals *)dev_id->driver_data;
2240 driver_template.max_sectors = ddv->max_sectors;
2241
2242 host = scsi_host_alloc(&driver_template, sizeof(struct cxlflash_cfg));
2243 if (!host) {
2244 dev_err(&pdev->dev, "%s: call to scsi_host_alloc failed!\n",
2245 __func__);
2246 rc = -ENOMEM;
2247 goto out;
2248 }
2249
2250 host->max_id = CXLFLASH_MAX_NUM_TARGETS_PER_BUS;
2251 host->max_lun = CXLFLASH_MAX_NUM_LUNS_PER_TARGET;
2252 host->max_channel = NUM_FC_PORTS - 1;
2253 host->unique_id = host->host_no;
2254 host->max_cmd_len = CXLFLASH_MAX_CDB_LEN;
2255
2256 cfg = (struct cxlflash_cfg *)host->hostdata;
2257 cfg->host = host;
2258 rc = alloc_mem(cfg);
2259 if (rc) {
2260 dev_err(&pdev->dev, "%s: call to scsi_host_alloc failed!\n",
2261 __func__);
2262 rc = -ENOMEM;
2263 goto out;
2264 }
2265
2266 cfg->init_state = INIT_STATE_NONE;
2267 cfg->dev = pdev;
2268 cfg->dev_id = (struct pci_device_id *)dev_id;
2269 cfg->mcctx = NULL;
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MO
2270
2271 init_waitqueue_head(&cfg->tmf_waitq);
5cdac81a 2272 init_waitqueue_head(&cfg->limbo_waitq);
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MO
2273
2274 INIT_WORK(&cfg->work_q, cxlflash_worker_thread);
2275 cfg->lr_state = LINK_RESET_INVALID;
2276 cfg->lr_port = -1;
2277
2278 pci_set_drvdata(pdev, cfg);
2279
2280 /* Use the special service provided to look up the physical
2281 * PCI device, since we are called on the probe of the virtual
2282 * PCI host bus (vphb)
2283 */
2284 phys_dev = cxl_get_phys_dev(pdev);
2285 if (!dev_is_pci(phys_dev)) {
2286 pr_err("%s: not a pci dev\n", __func__);
2287 rc = -ENODEV;
2288 goto out_remove;
2289 }
2290 cfg->parent_dev = to_pci_dev(phys_dev);
2291
2292 cfg->cxl_afu = cxl_pci_to_afu(pdev);
2293
2294 rc = init_pci(cfg);
2295 if (rc) {
2296 dev_err(&pdev->dev, "%s: call to init_pci "
2297 "failed rc=%d!\n", __func__, rc);
2298 goto out_remove;
2299 }
2300 cfg->init_state = INIT_STATE_PCI;
2301
2302 rc = init_afu(cfg);
2303 if (rc) {
2304 dev_err(&pdev->dev, "%s: call to init_afu "
2305 "failed rc=%d!\n", __func__, rc);
2306 goto out_remove;
2307 }
2308 cfg->init_state = INIT_STATE_AFU;
2309
2310
2311 rc = init_scsi(cfg);
2312 if (rc) {
2313 dev_err(&pdev->dev, "%s: call to init_scsi "
2314 "failed rc=%d!\n", __func__, rc);
2315 goto out_remove;
2316 }
2317 cfg->init_state = INIT_STATE_SCSI;
2318
2319out:
2320 pr_debug("%s: returning rc=%d\n", __func__, rc);
2321 return rc;
2322
2323out_remove:
2324 cxlflash_remove(pdev);
2325 goto out;
2326}
2327
5cdac81a
MO
2328/**
2329 * cxlflash_pci_error_detected() - called when a PCI error is detected
2330 * @pdev: PCI device struct.
2331 * @state: PCI channel state.
2332 *
2333 * Return: PCI_ERS_RESULT_NEED_RESET or PCI_ERS_RESULT_DISCONNECT
2334 */
2335static pci_ers_result_t cxlflash_pci_error_detected(struct pci_dev *pdev,
2336 pci_channel_state_t state)
2337{
2338 struct cxlflash_cfg *cfg = pci_get_drvdata(pdev);
2339 struct device *dev = &cfg->dev->dev;
2340
2341 dev_dbg(dev, "%s: pdev=%p state=%u\n", __func__, pdev, state);
2342
2343 switch (state) {
2344 case pci_channel_io_frozen:
2345 cfg->state = STATE_LIMBO;
2346
2347 /* Turn off legacy I/O */
2348 scsi_block_requests(cfg->host);
2349
2350 term_mc(cfg, UNDO_START);
2351 stop_afu(cfg);
2352
2353 return PCI_ERS_RESULT_NEED_RESET;
2354 case pci_channel_io_perm_failure:
2355 cfg->state = STATE_FAILTERM;
2356 wake_up_all(&cfg->limbo_waitq);
2357 scsi_unblock_requests(cfg->host);
2358 return PCI_ERS_RESULT_DISCONNECT;
2359 default:
2360 break;
2361 }
2362 return PCI_ERS_RESULT_NEED_RESET;
2363}
2364
2365/**
2366 * cxlflash_pci_slot_reset() - called when PCI slot has been reset
2367 * @pdev: PCI device struct.
2368 *
2369 * This routine is called by the pci error recovery code after the PCI
2370 * slot has been reset, just before we should resume normal operations.
2371 *
2372 * Return: PCI_ERS_RESULT_RECOVERED or PCI_ERS_RESULT_DISCONNECT
2373 */
2374static pci_ers_result_t cxlflash_pci_slot_reset(struct pci_dev *pdev)
2375{
2376 int rc = 0;
2377 struct cxlflash_cfg *cfg = pci_get_drvdata(pdev);
2378 struct device *dev = &cfg->dev->dev;
2379
2380 dev_dbg(dev, "%s: pdev=%p\n", __func__, pdev);
2381
2382 rc = init_afu(cfg);
2383 if (unlikely(rc)) {
2384 dev_err(dev, "%s: EEH recovery failed! (%d)\n", __func__, rc);
2385 return PCI_ERS_RESULT_DISCONNECT;
2386 }
2387
2388 return PCI_ERS_RESULT_RECOVERED;
2389}
2390
2391/**
2392 * cxlflash_pci_resume() - called when normal operation can resume
2393 * @pdev: PCI device struct
2394 */
2395static void cxlflash_pci_resume(struct pci_dev *pdev)
2396{
2397 struct cxlflash_cfg *cfg = pci_get_drvdata(pdev);
2398 struct device *dev = &cfg->dev->dev;
2399
2400 dev_dbg(dev, "%s: pdev=%p\n", __func__, pdev);
2401
2402 cfg->state = STATE_NORMAL;
2403 wake_up_all(&cfg->limbo_waitq);
2404 scsi_unblock_requests(cfg->host);
2405}
2406
2407static const struct pci_error_handlers cxlflash_err_handler = {
2408 .error_detected = cxlflash_pci_error_detected,
2409 .slot_reset = cxlflash_pci_slot_reset,
2410 .resume = cxlflash_pci_resume,
2411};
2412
c21e0bbf
MO
2413/*
2414 * PCI device structure
2415 */
2416static struct pci_driver cxlflash_driver = {
2417 .name = CXLFLASH_NAME,
2418 .id_table = cxlflash_pci_table,
2419 .probe = cxlflash_probe,
2420 .remove = cxlflash_remove,
5cdac81a 2421 .err_handler = &cxlflash_err_handler,
c21e0bbf
MO
2422};
2423
2424/**
2425 * init_cxlflash() - module entry point
2426 *
2427 * Return: 0 on success / non-zero on failure
2428 */
2429static int __init init_cxlflash(void)
2430{
2431 pr_info("%s: IBM Power CXL Flash Adapter: %s\n",
2432 __func__, CXLFLASH_DRIVER_DATE);
2433
2434 return pci_register_driver(&cxlflash_driver);
2435}
2436
2437/**
2438 * exit_cxlflash() - module exit point
2439 */
2440static void __exit exit_cxlflash(void)
2441{
2442 pci_unregister_driver(&cxlflash_driver);
2443}
2444
2445module_init(init_cxlflash);
2446module_exit(exit_cxlflash);