[SCSI] arcmsr: Fix hardware wait loops
[linux-2.6-block.git] / drivers / scsi / arcmsr / arcmsr_hba.c
CommitLineData
1c57e86d
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1/*
2*******************************************************************************
3** O.S : Linux
4** FILE NAME : arcmsr_hba.c
5** BY : Erich Chen
6** Description: SCSI RAID Device Driver for
7** ARECA RAID Host adapter
8*******************************************************************************
9** Copyright (C) 2002 - 2005, Areca Technology Corporation All rights reserved
10**
11** Web site: www.areca.com.tw
1a4f550a 12** E-mail: support@areca.com.tw
1c57e86d
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13**
14** This program is free software; you can redistribute it and/or modify
15** it under the terms of the GNU General Public License version 2 as
16** published by the Free Software Foundation.
17** This program is distributed in the hope that it will be useful,
18** but WITHOUT ANY WARRANTY; without even the implied warranty of
19** MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20** GNU General Public License for more details.
21*******************************************************************************
22** Redistribution and use in source and binary forms, with or without
23** modification, are permitted provided that the following conditions
24** are met:
25** 1. Redistributions of source code must retain the above copyright
26** notice, this list of conditions and the following disclaimer.
27** 2. Redistributions in binary form must reproduce the above copyright
28** notice, this list of conditions and the following disclaimer in the
29** documentation and/or other materials provided with the distribution.
30** 3. The name of the author may not be used to endorse or promote products
31** derived from this software without specific prior written permission.
32**
33** THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
34** IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
35** OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
36** IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
37** INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES(INCLUDING,BUT
38** NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
39** DATA, OR PROFITS; OR BUSINESS INTERRUPTION)HOWEVER CAUSED AND ON ANY
40** THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
41** (INCLUDING NEGLIGENCE OR OTHERWISE)ARISING IN ANY WAY OUT OF THE USE OF
42** THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
43*******************************************************************************
44** For history of changes, see Documentation/scsi/ChangeLog.arcmsr
45** Firmware Specification, see Documentation/scsi/arcmsr_spec.txt
46*******************************************************************************
47*/
48#include <linux/module.h>
49#include <linux/reboot.h>
50#include <linux/spinlock.h>
51#include <linux/pci_ids.h>
52#include <linux/interrupt.h>
53#include <linux/moduleparam.h>
54#include <linux/errno.h>
55#include <linux/types.h>
56#include <linux/delay.h>
57#include <linux/dma-mapping.h>
58#include <linux/timer.h>
59#include <linux/pci.h>
a1f6e021 60#include <linux/aer.h>
1c57e86d
EC
61#include <asm/dma.h>
62#include <asm/io.h>
63#include <asm/system.h>
64#include <asm/uaccess.h>
65#include <scsi/scsi_host.h>
66#include <scsi/scsi.h>
67#include <scsi/scsi_cmnd.h>
68#include <scsi/scsi_tcq.h>
69#include <scsi/scsi_device.h>
70#include <scsi/scsi_transport.h>
71#include <scsi/scsicam.h>
72#include "arcmsr.h"
73
1a4f550a 74MODULE_AUTHOR("Erich Chen <support@areca.com.tw>");
a1f6e021 75MODULE_DESCRIPTION("ARECA (ARC11xx/12xx/13xx/16xx) SATA/SAS RAID HOST Adapter");
1c57e86d
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76MODULE_LICENSE("Dual BSD/GPL");
77MODULE_VERSION(ARCMSR_DRIVER_VERSION);
78
1a4f550a
NC
79static int arcmsr_iop_message_xfer(struct AdapterControlBlock *acb,
80 struct scsi_cmnd *cmd);
81static int arcmsr_iop_confirm(struct AdapterControlBlock *acb);
1c57e86d
EC
82static int arcmsr_abort(struct scsi_cmnd *);
83static int arcmsr_bus_reset(struct scsi_cmnd *);
84static int arcmsr_bios_param(struct scsi_device *sdev,
1a4f550a
NC
85 struct block_device *bdev, sector_t capacity, int *info);
86static int arcmsr_queue_command(struct scsi_cmnd *cmd,
87 void (*done) (struct scsi_cmnd *));
1c57e86d
EC
88static int arcmsr_probe(struct pci_dev *pdev,
89 const struct pci_device_id *id);
90static void arcmsr_remove(struct pci_dev *pdev);
91static void arcmsr_shutdown(struct pci_dev *pdev);
92static void arcmsr_iop_init(struct AdapterControlBlock *acb);
93static void arcmsr_free_ccb_pool(struct AdapterControlBlock *acb);
1a4f550a 94static u32 arcmsr_disable_outbound_ints(struct AdapterControlBlock *acb);
1c57e86d 95static void arcmsr_stop_adapter_bgrb(struct AdapterControlBlock *acb);
1a4f550a
NC
96static void arcmsr_flush_hba_cache(struct AdapterControlBlock *acb);
97static void arcmsr_flush_hbb_cache(struct AdapterControlBlock *acb);
1c57e86d
EC
98static const char *arcmsr_info(struct Scsi_Host *);
99static irqreturn_t arcmsr_interrupt(struct AdapterControlBlock *acb);
1a4f550a
NC
100static int arcmsr_adjust_disk_queue_depth(struct scsi_device *sdev,
101 int queue_depth)
1c57e86d
EC
102{
103 if (queue_depth > ARCMSR_MAX_CMD_PERLUN)
104 queue_depth = ARCMSR_MAX_CMD_PERLUN;
105 scsi_adjust_queue_depth(sdev, MSG_ORDERED_TAG, queue_depth);
106 return queue_depth;
107}
108
109static struct scsi_host_template arcmsr_scsi_host_template = {
110 .module = THIS_MODULE,
a1f6e021 111 .name = "ARCMSR ARECA SATA/SAS RAID HOST Adapter"
112 ARCMSR_DRIVER_VERSION,
1c57e86d
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113 .info = arcmsr_info,
114 .queuecommand = arcmsr_queue_command,
115 .eh_abort_handler = arcmsr_abort,
116 .eh_bus_reset_handler = arcmsr_bus_reset,
117 .bios_param = arcmsr_bios_param,
118 .change_queue_depth = arcmsr_adjust_disk_queue_depth,
119 .can_queue = ARCMSR_MAX_OUTSTANDING_CMD,
120 .this_id = ARCMSR_SCSI_INITIATOR_ID,
121 .sg_tablesize = ARCMSR_MAX_SG_ENTRIES,
122 .max_sectors = ARCMSR_MAX_XFER_SECTORS,
123 .cmd_per_lun = ARCMSR_MAX_CMD_PERLUN,
124 .use_clustering = ENABLE_CLUSTERING,
125 .shost_attrs = arcmsr_host_attrs,
126};
1a4f550a 127#ifdef CONFIG_SCSI_ARCMSR_AER
a1f6e021 128static struct pci_error_handlers arcmsr_pci_error_handlers = {
129 .error_detected = arcmsr_pci_error_detected,
130 .slot_reset = arcmsr_pci_slot_reset,
131};
1a4f550a 132#endif
1c57e86d
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133static struct pci_device_id arcmsr_device_id_table[] = {
134 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1110)},
135 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1120)},
136 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1130)},
137 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1160)},
138 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1170)},
1a4f550a
NC
139 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1200)},
140 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1201)},
141 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1202)},
1c57e86d
EC
142 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1210)},
143 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1220)},
144 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1230)},
145 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1260)},
146 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1270)},
147 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1280)},
148 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1380)},
149 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1381)},
150 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1680)},
151 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1681)},
152 {0, 0}, /* Terminating entry */
153};
154MODULE_DEVICE_TABLE(pci, arcmsr_device_id_table);
155static struct pci_driver arcmsr_pci_driver = {
156 .name = "arcmsr",
157 .id_table = arcmsr_device_id_table,
158 .probe = arcmsr_probe,
159 .remove = arcmsr_remove,
a1f6e021 160 .shutdown = arcmsr_shutdown,
1a4f550a 161 #ifdef CONFIG_SCSI_ARCMSR_AER
a1f6e021 162 .err_handler = &arcmsr_pci_error_handlers,
1a4f550a 163 #endif
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164};
165
7d12e780 166static irqreturn_t arcmsr_do_interrupt(int irq, void *dev_id)
1c57e86d
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167{
168 irqreturn_t handle_state;
1a4f550a 169 struct AdapterControlBlock *acb = dev_id;
1c57e86d 170
1a4f550a 171 spin_lock(acb->host->host_lock);
1c57e86d 172 handle_state = arcmsr_interrupt(acb);
1a4f550a
NC
173 spin_unlock(acb->host->host_lock);
174
1c57e86d
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175 return handle_state;
176}
177
178static int arcmsr_bios_param(struct scsi_device *sdev,
179 struct block_device *bdev, sector_t capacity, int *geom)
180{
181 int ret, heads, sectors, cylinders, total_capacity;
182 unsigned char *buffer;/* return copy of block device's partition table */
183
184 buffer = scsi_bios_ptable(bdev);
185 if (buffer) {
186 ret = scsi_partsize(buffer, capacity, &geom[2], &geom[0], &geom[1]);
187 kfree(buffer);
188 if (ret != -1)
189 return ret;
190 }
191 total_capacity = capacity;
192 heads = 64;
193 sectors = 32;
194 cylinders = total_capacity / (heads * sectors);
195 if (cylinders > 1024) {
196 heads = 255;
197 sectors = 63;
198 cylinders = total_capacity / (heads * sectors);
199 }
200 geom[0] = heads;
201 geom[1] = sectors;
202 geom[2] = cylinders;
203 return 0;
204}
205
1a4f550a 206static void arcmsr_define_adapter_type(struct AdapterControlBlock *acb)
1c57e86d
EC
207{
208 struct pci_dev *pdev = acb->pdev;
1a4f550a
NC
209 u16 dev_id;
210 pci_read_config_word(pdev, PCI_DEVICE_ID, &dev_id);
211 switch (dev_id) {
212 case 0x1201 : {
213 acb->adapter_type = ACB_ADAPTER_TYPE_B;
214 }
215 break;
216
217 default : acb->adapter_type = ACB_ADAPTER_TYPE_A;
218 }
219}
220
221static int arcmsr_alloc_ccb_pool(struct AdapterControlBlock *acb)
222{
223
224 switch (acb->adapter_type) {
1c57e86d 225
1a4f550a
NC
226 case ACB_ADAPTER_TYPE_A: {
227 struct pci_dev *pdev = acb->pdev;
228 void *dma_coherent;
229 dma_addr_t dma_coherent_handle, dma_addr;
230 struct CommandControlBlock *ccb_tmp;
231 uint32_t intmask_org;
232 int i, j;
233
234 acb->pmu = ioremap(pci_resource_start(pdev, 0), pci_resource_len(pdev, 0));
235 if (!acb->pmu) {
236 printk(KERN_NOTICE "arcmsr%d: memory mapping region fail \n",
237 acb->host->host_no);
238 }
239
240 dma_coherent = dma_alloc_coherent(&pdev->dev,
1c57e86d
EC
241 ARCMSR_MAX_FREECCB_NUM *
242 sizeof (struct CommandControlBlock) + 0x20,
243 &dma_coherent_handle, GFP_KERNEL);
1a4f550a
NC
244 if (!dma_coherent)
245 return -ENOMEM;
1c57e86d 246
1a4f550a
NC
247 acb->dma_coherent = dma_coherent;
248 acb->dma_coherent_handle = dma_coherent_handle;
1c57e86d 249
1a4f550a
NC
250 if (((unsigned long)dma_coherent & 0x1F)) {
251 dma_coherent = dma_coherent +
252 (0x20 - ((unsigned long)dma_coherent & 0x1F));
253 dma_coherent_handle = dma_coherent_handle +
254 (0x20 - ((unsigned long)dma_coherent_handle & 0x1F));
255 }
1c57e86d 256
1a4f550a
NC
257 dma_addr = dma_coherent_handle;
258 ccb_tmp = (struct CommandControlBlock *)dma_coherent;
259 for (i = 0; i < ARCMSR_MAX_FREECCB_NUM; i++) {
260 ccb_tmp->cdb_shifted_phyaddr = dma_addr >> 5;
261 ccb_tmp->acb = acb;
262 acb->pccb_pool[i] = ccb_tmp;
263 list_add_tail(&ccb_tmp->list, &acb->ccb_free_list);
264 dma_addr = dma_addr + sizeof(struct CommandControlBlock);
265 ccb_tmp++;
266 }
1c57e86d 267
1a4f550a
NC
268 acb->vir2phy_offset = (unsigned long)ccb_tmp -(unsigned long)dma_addr;
269 for (i = 0; i < ARCMSR_MAX_TARGETID; i++)
270 for (j = 0; j < ARCMSR_MAX_TARGETLUN; j++)
271 acb->devstate[i][j] = ARECA_RAID_GONE;
1c57e86d 272
1a4f550a
NC
273 /*
274 ** here we need to tell iop 331 our ccb_tmp.HighPart
275 ** if ccb_tmp.HighPart is not zero
276 */
277 intmask_org = arcmsr_disable_outbound_ints(acb);
278 }
279 break;
280
281 case ACB_ADAPTER_TYPE_B: {
282
283 struct pci_dev *pdev = acb->pdev;
284 struct MessageUnit_B *reg;
285 void *mem_base0, *mem_base1;
286 void *dma_coherent;
287 dma_addr_t dma_coherent_handle, dma_addr;
288 uint32_t intmask_org;
289 struct CommandControlBlock *ccb_tmp;
290 int i, j;
291
292 dma_coherent = dma_alloc_coherent(&pdev->dev,
293 ((ARCMSR_MAX_FREECCB_NUM *
294 sizeof(struct CommandControlBlock) + 0x20) +
295 sizeof(struct MessageUnit_B)),
296 &dma_coherent_handle, GFP_KERNEL);
297 if (!dma_coherent)
298 return -ENOMEM;
299
300 acb->dma_coherent = dma_coherent;
301 acb->dma_coherent_handle = dma_coherent_handle;
302
303 if (((unsigned long)dma_coherent & 0x1F)) {
304 dma_coherent = dma_coherent +
305 (0x20 - ((unsigned long)dma_coherent & 0x1F));
306 dma_coherent_handle = dma_coherent_handle +
307 (0x20 - ((unsigned long)dma_coherent_handle & 0x1F));
308 }
309
310 reg = (struct MessageUnit_B *)(dma_coherent +
311 ARCMSR_MAX_FREECCB_NUM * sizeof(struct CommandControlBlock));
312
313 dma_addr = dma_coherent_handle;
314 ccb_tmp = (struct CommandControlBlock *)dma_coherent;
315 for (i = 0; i < ARCMSR_MAX_FREECCB_NUM; i++) {
316 ccb_tmp->cdb_shifted_phyaddr = dma_addr >> 5;
317 ccb_tmp->acb = acb;
318 acb->pccb_pool[i] = ccb_tmp;
319 list_add_tail(&ccb_tmp->list, &acb->ccb_free_list);
320 dma_addr = dma_addr + sizeof(struct CommandControlBlock);
321 ccb_tmp++;
322 }
323
324 reg = (struct MessageUnit_B *)(dma_coherent +
325 ARCMSR_MAX_FREECCB_NUM * sizeof(struct CommandControlBlock));
685b9e02 326 acb->pmu = (struct MessageUnit *)reg;
1a4f550a
NC
327 mem_base0 = ioremap(pci_resource_start(pdev, 0),
328 pci_resource_len(pdev, 0));
329 mem_base1 = ioremap(pci_resource_start(pdev, 2),
330 pci_resource_len(pdev, 2));
331 reg->drv2iop_doorbell_reg = (uint32_t *)((char *)mem_base0 +
332 ARCMSR_DRV2IOP_DOORBELL);
333 reg->drv2iop_doorbell_mask_reg = (uint32_t *)((char *)mem_base0 +
334 ARCMSR_DRV2IOP_DOORBELL_MASK);
335 reg->iop2drv_doorbell_reg = (uint32_t *)((char *)mem_base0 +
336 ARCMSR_IOP2DRV_DOORBELL);
337 reg->iop2drv_doorbell_mask_reg = (uint32_t *)((char *)mem_base0 +
338 ARCMSR_IOP2DRV_DOORBELL_MASK);
339 reg->ioctl_wbuffer_reg = (uint32_t *)((char *)mem_base1 +
340 ARCMSR_IOCTL_WBUFFER);
341 reg->ioctl_rbuffer_reg = (uint32_t *)((char *)mem_base1 +
342 ARCMSR_IOCTL_RBUFFER);
343 reg->msgcode_rwbuffer_reg = (uint32_t *)((char *)mem_base1 +
344 ARCMSR_MSGCODE_RWBUFFER);
345
346 acb->vir2phy_offset = (unsigned long)ccb_tmp -(unsigned long)dma_addr;
347 for (i = 0; i < ARCMSR_MAX_TARGETID; i++)
348 for (j = 0; j < ARCMSR_MAX_TARGETLUN; j++)
349 acb->devstate[i][j] = ARECA_RAID_GOOD;
1c57e86d 350
1a4f550a
NC
351 /*
352 ** here we need to tell iop 331 our ccb_tmp.HighPart
353 ** if ccb_tmp.HighPart is not zero
354 */
355 intmask_org = arcmsr_disable_outbound_ints(acb);
356 }
357 break;
358 }
1c57e86d
EC
359 return 0;
360}
361
362static int arcmsr_probe(struct pci_dev *pdev,
363 const struct pci_device_id *id)
364{
365 struct Scsi_Host *host;
366 struct AdapterControlBlock *acb;
367 uint8_t bus, dev_fun;
368 int error;
369
370 error = pci_enable_device(pdev);
371 if (error)
372 goto out;
373 pci_set_master(pdev);
374
375 host = scsi_host_alloc(&arcmsr_scsi_host_template,
376 sizeof(struct AdapterControlBlock));
377 if (!host) {
378 error = -ENOMEM;
379 goto out_disable_device;
380 }
381 acb = (struct AdapterControlBlock *)host->hostdata;
382 memset(acb, 0, sizeof (struct AdapterControlBlock));
383
384 error = pci_set_dma_mask(pdev, DMA_64BIT_MASK);
385 if (error) {
386 error = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
387 if (error) {
388 printk(KERN_WARNING
389 "scsi%d: No suitable DMA mask available\n",
390 host->host_no);
391 goto out_host_put;
392 }
393 }
394 bus = pdev->bus->number;
395 dev_fun = pdev->devfn;
396 acb->host = host;
397 acb->pdev = pdev;
398 host->max_sectors = ARCMSR_MAX_XFER_SECTORS;
399 host->max_lun = ARCMSR_MAX_TARGETLUN;
400 host->max_id = ARCMSR_MAX_TARGETID;/*16:8*/
401 host->max_cmd_len = 16; /*this is issue of 64bit LBA, over 2T byte*/
402 host->sg_tablesize = ARCMSR_MAX_SG_ENTRIES;
403 host->can_queue = ARCMSR_MAX_FREECCB_NUM; /* max simultaneous cmds */
404 host->cmd_per_lun = ARCMSR_MAX_CMD_PERLUN;
405 host->this_id = ARCMSR_SCSI_INITIATOR_ID;
406 host->unique_id = (bus << 8) | dev_fun;
407 host->irq = pdev->irq;
408 error = pci_request_regions(pdev, "arcmsr");
1a4f550a 409 if (error) {
1c57e86d 410 goto out_host_put;
1c57e86d 411 }
1a4f550a
NC
412 arcmsr_define_adapter_type(acb);
413
1c57e86d
EC
414 acb->acb_flags |= (ACB_F_MESSAGE_WQBUFFER_CLEARED |
415 ACB_F_MESSAGE_RQBUFFER_CLEARED |
416 ACB_F_MESSAGE_WQBUFFER_READED);
417 acb->acb_flags &= ~ACB_F_SCSISTOPADAPTER;
418 INIT_LIST_HEAD(&acb->ccb_free_list);
419
420 error = arcmsr_alloc_ccb_pool(acb);
421 if (error)
1a4f550a 422 goto out_release_regions;
1c57e86d
EC
423
424 error = request_irq(pdev->irq, arcmsr_do_interrupt,
1a4f550a 425 IRQF_SHARED, "arcmsr", acb);
1c57e86d
EC
426 if (error)
427 goto out_free_ccb_pool;
428
429 arcmsr_iop_init(acb);
430 pci_set_drvdata(pdev, host);
a1f6e021 431 if (strncmp(acb->firm_version, "V1.42", 5) >= 0)
432 host->max_sectors= ARCMSR_MAX_XFER_SECTORS_B;
1c57e86d
EC
433
434 error = scsi_add_host(host, &pdev->dev);
435 if (error)
436 goto out_free_irq;
437
438 error = arcmsr_alloc_sysfs_attr(acb);
439 if (error)
440 goto out_free_sysfs;
441
442 scsi_scan_host(host);
1a4f550a 443 #ifdef CONFIG_SCSI_ARCMSR_AER
a1f6e021 444 pci_enable_pcie_error_reporting(pdev);
1a4f550a 445 #endif
1c57e86d
EC
446 return 0;
447 out_free_sysfs:
448 out_free_irq:
449 free_irq(pdev->irq, acb);
450 out_free_ccb_pool:
451 arcmsr_free_ccb_pool(acb);
1c57e86d
EC
452 iounmap(acb->pmu);
453 out_release_regions:
454 pci_release_regions(pdev);
455 out_host_put:
456 scsi_host_put(host);
457 out_disable_device:
458 pci_disable_device(pdev);
459 out:
460 return error;
461}
462
1a4f550a
NC
463static uint8_t arcmsr_hba_wait_msgint_ready(struct AdapterControlBlock *acb)
464{
465 struct MessageUnit_A __iomem *reg = (struct MessageUnit_A *)acb->pmu;
466 uint32_t Index;
467 uint8_t Retries = 0x00;
468
469 do {
470 for (Index = 0; Index < 100; Index++) {
471 if (readl(&reg->outbound_intstatus) &
472 ARCMSR_MU_OUTBOUND_MESSAGE0_INT) {
473 writel(ARCMSR_MU_OUTBOUND_MESSAGE0_INT,
474 &reg->outbound_intstatus);
475 return 0x00;
476 }
477 msleep(10);
478 }/*max 1 seconds*/
479
480 } while (Retries++ < 20);/*max 20 sec*/
481 return 0xff;
482}
483
484static uint8_t arcmsr_hbb_wait_msgint_ready(struct AdapterControlBlock *acb)
485{
486 struct MessageUnit_B *reg = (struct MessageUnit_B *)acb->pmu;
487 uint32_t Index;
488 uint8_t Retries = 0x00;
489
490 do {
491 for (Index = 0; Index < 100; Index++) {
492 if (readl(reg->iop2drv_doorbell_reg)
493 & ARCMSR_IOP2DRV_MESSAGE_CMD_DONE) {
494 writel(ARCMSR_MESSAGE_INT_CLEAR_PATTERN
495 , reg->iop2drv_doorbell_reg);
496 return 0x00;
497 }
498 msleep(10);
499 }/*max 1 seconds*/
500
501 } while (Retries++ < 20);/*max 20 sec*/
502 return 0xff;
503}
504
505static void arcmsr_abort_hba_allcmd(struct AdapterControlBlock *acb)
1c57e86d 506{
1a4f550a 507 struct MessageUnit_A __iomem *reg = (struct MessageUnit_A *)acb->pmu;
1c57e86d
EC
508
509 writel(ARCMSR_INBOUND_MESG0_ABORT_CMD, &reg->inbound_msgaddr0);
1a4f550a
NC
510 if (arcmsr_hba_wait_msgint_ready(acb))
511 printk(KERN_NOTICE
512 "arcmsr%d: wait 'abort all outstanding command' timeout \n"
513 , acb->host->host_no);
514}
515
516static void arcmsr_abort_hbb_allcmd(struct AdapterControlBlock *acb)
517{
518 struct MessageUnit_B *reg = (struct MessageUnit_B *)acb->pmu;
519
520 writel(ARCMSR_MESSAGE_ABORT_CMD, reg->drv2iop_doorbell_reg);
521 if (arcmsr_hbb_wait_msgint_ready(acb))
1c57e86d
EC
522 printk(KERN_NOTICE
523 "arcmsr%d: wait 'abort all outstanding command' timeout \n"
524 , acb->host->host_no);
525}
526
1a4f550a
NC
527static void arcmsr_abort_allcmd(struct AdapterControlBlock *acb)
528{
529 switch (acb->adapter_type) {
530 case ACB_ADAPTER_TYPE_A: {
531 arcmsr_abort_hba_allcmd(acb);
532 }
533 break;
534
535 case ACB_ADAPTER_TYPE_B: {
536 arcmsr_abort_hbb_allcmd(acb);
537 }
538 }
539}
540
1c57e86d
EC
541static void arcmsr_pci_unmap_dma(struct CommandControlBlock *ccb)
542{
1c57e86d
EC
543 struct scsi_cmnd *pcmd = ccb->pcmd;
544
deff2627 545 scsi_dma_unmap(pcmd);
1c57e86d
EC
546}
547
548static void arcmsr_ccb_complete(struct CommandControlBlock *ccb, int stand_flag)
549{
550 struct AdapterControlBlock *acb = ccb->acb;
551 struct scsi_cmnd *pcmd = ccb->pcmd;
552
553 arcmsr_pci_unmap_dma(ccb);
554 if (stand_flag == 1)
555 atomic_dec(&acb->ccboutstandingcount);
556 ccb->startdone = ARCMSR_CCB_DONE;
557 ccb->ccb_flags = 0;
558 list_add_tail(&ccb->list, &acb->ccb_free_list);
559 pcmd->scsi_done(pcmd);
560}
561
1a4f550a
NC
562static void arcmsr_flush_hba_cache(struct AdapterControlBlock *acb)
563{
564 struct MessageUnit_A __iomem *reg = (struct MessageUnit_A *)acb->pmu;
565 int retry_count = 30;
566
567 writel(ARCMSR_INBOUND_MESG0_FLUSH_CACHE, &reg->inbound_msgaddr0);
568 do {
569 if (!arcmsr_hba_wait_msgint_ready(acb))
570 break;
571 else {
572 retry_count--;
573 printk(KERN_NOTICE "arcmsr%d: wait 'flush adapter cache' \
574 timeout, retry count down = %d \n", acb->host->host_no, retry_count);
575 }
576 } while (retry_count != 0);
577}
578
579static void arcmsr_flush_hbb_cache(struct AdapterControlBlock *acb)
580{
581 struct MessageUnit_B *reg = (struct MessageUnit_B *)acb->pmu;
582 int retry_count = 30;
583
584 writel(ARCMSR_MESSAGE_FLUSH_CACHE, reg->drv2iop_doorbell_reg);
585 do {
586 if (!arcmsr_hbb_wait_msgint_ready(acb))
587 break;
588 else {
589 retry_count--;
590 printk(KERN_NOTICE "arcmsr%d: wait 'flush adapter cache' \
591 timeout,retry count down = %d \n", acb->host->host_no, retry_count);
592 }
593 } while (retry_count != 0);
594}
595
596static void arcmsr_flush_adapter_cache(struct AdapterControlBlock *acb)
597{
598 switch (acb->adapter_type) {
599
600 case ACB_ADAPTER_TYPE_A: {
601 arcmsr_flush_hba_cache(acb);
602 }
603 break;
604
605 case ACB_ADAPTER_TYPE_B: {
606 arcmsr_flush_hbb_cache(acb);
607 }
608 }
609}
610
611static void arcmsr_report_sense_info(struct CommandControlBlock *ccb)
612{
613
614 struct scsi_cmnd *pcmd = ccb->pcmd;
615 struct SENSE_DATA *sensebuffer = (struct SENSE_DATA *)pcmd->sense_buffer;
616
617 pcmd->result = DID_OK << 16;
618 if (sensebuffer) {
619 int sense_data_length =
620 sizeof(struct SENSE_DATA) < sizeof(pcmd->sense_buffer)
621 ? sizeof(struct SENSE_DATA) : sizeof(pcmd->sense_buffer);
622 memset(sensebuffer, 0, sizeof(pcmd->sense_buffer));
623 memcpy(sensebuffer, ccb->arcmsr_cdb.SenseData, sense_data_length);
624 sensebuffer->ErrorCode = SCSI_SENSE_CURRENT_ERRORS;
625 sensebuffer->Valid = 1;
626 }
627}
628
629static u32 arcmsr_disable_outbound_ints(struct AdapterControlBlock *acb)
630{
631 u32 orig_mask = 0;
632 switch (acb->adapter_type) {
633
634 case ACB_ADAPTER_TYPE_A : {
635 struct MessageUnit_A __iomem *reg = (struct MessageUnit_A *)acb->pmu;
636 orig_mask = readl(&reg->outbound_intmask)|\
637 ARCMSR_MU_OUTBOUND_MESSAGE0_INTMASKENABLE;
638 writel(orig_mask|ARCMSR_MU_OUTBOUND_ALL_INTMASKENABLE, \
639 &reg->outbound_intmask);
640 }
641 break;
642
643 case ACB_ADAPTER_TYPE_B : {
644 struct MessageUnit_B *reg = (struct MessageUnit_B *)acb->pmu;
645 orig_mask = readl(reg->iop2drv_doorbell_mask_reg) & \
646 (~ARCMSR_IOP2DRV_MESSAGE_CMD_DONE);
647 writel(0, reg->iop2drv_doorbell_mask_reg);
648 }
649 break;
650 }
651 return orig_mask;
652}
653
654static void arcmsr_report_ccb_state(struct AdapterControlBlock *acb, \
655 struct CommandControlBlock *ccb, uint32_t flag_ccb)
656{
657
658 uint8_t id, lun;
659 id = ccb->pcmd->device->id;
660 lun = ccb->pcmd->device->lun;
661 if (!(flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR)) {
662 if (acb->devstate[id][lun] == ARECA_RAID_GONE)
663 acb->devstate[id][lun] = ARECA_RAID_GOOD;
664 ccb->pcmd->result = DID_OK << 16;
665 arcmsr_ccb_complete(ccb, 1);
666 } else {
667 switch (ccb->arcmsr_cdb.DeviceStatus) {
668 case ARCMSR_DEV_SELECT_TIMEOUT: {
669 acb->devstate[id][lun] = ARECA_RAID_GONE;
670 ccb->pcmd->result = DID_NO_CONNECT << 16;
671 arcmsr_ccb_complete(ccb, 1);
672 }
673 break;
674
675 case ARCMSR_DEV_ABORTED:
676
677 case ARCMSR_DEV_INIT_FAIL: {
678 acb->devstate[id][lun] = ARECA_RAID_GONE;
679 ccb->pcmd->result = DID_BAD_TARGET << 16;
680 arcmsr_ccb_complete(ccb, 1);
681 }
682 break;
683
684 case ARCMSR_DEV_CHECK_CONDITION: {
685 acb->devstate[id][lun] = ARECA_RAID_GOOD;
686 arcmsr_report_sense_info(ccb);
687 arcmsr_ccb_complete(ccb, 1);
688 }
689 break;
690
691 default:
692 printk(KERN_NOTICE
693 "arcmsr%d: scsi id = %d lun = %d"
694 " isr get command error done, "
695 "but got unknown DeviceStatus = 0x%x \n"
696 , acb->host->host_no
697 , id
698 , lun
699 , ccb->arcmsr_cdb.DeviceStatus);
700 acb->devstate[id][lun] = ARECA_RAID_GONE;
701 ccb->pcmd->result = DID_NO_CONNECT << 16;
702 arcmsr_ccb_complete(ccb, 1);
703 break;
704 }
705 }
706}
707
708static void arcmsr_drain_donequeue(struct AdapterControlBlock *acb, uint32_t flag_ccb)
709
710{
711 struct CommandControlBlock *ccb;
712
713 ccb = (struct CommandControlBlock *)(acb->vir2phy_offset + (flag_ccb << 5));
714 if ((ccb->acb != acb) || (ccb->startdone != ARCMSR_CCB_START)) {
715 if (ccb->startdone == ARCMSR_CCB_ABORTED) {
716 struct scsi_cmnd *abortcmd = ccb->pcmd;
717 if (abortcmd) {
718 abortcmd->result |= DID_ABORT << 16;
719 arcmsr_ccb_complete(ccb, 1);
720 printk(KERN_NOTICE "arcmsr%d: ccb ='0x%p' \
721 isr got aborted command \n", acb->host->host_no, ccb);
722 }
723 }
724 printk(KERN_NOTICE "arcmsr%d: isr get an illegal ccb command \
725 done acb = '0x%p'"
726 "ccb = '0x%p' ccbacb = '0x%p' startdone = 0x%x"
727 " ccboutstandingcount = %d \n"
728 , acb->host->host_no
729 , acb
730 , ccb
731 , ccb->acb
732 , ccb->startdone
733 , atomic_read(&acb->ccboutstandingcount));
734 }
735 arcmsr_report_ccb_state(acb, ccb, flag_ccb);
736}
737
738static void arcmsr_done4abort_postqueue(struct AdapterControlBlock *acb)
739{
740 int i = 0;
741 uint32_t flag_ccb;
742
743 switch (acb->adapter_type) {
744
745 case ACB_ADAPTER_TYPE_A: {
746 struct MessageUnit_A __iomem *reg = \
747 (struct MessageUnit_A *)acb->pmu;
748 uint32_t outbound_intstatus;
749 outbound_intstatus = readl(&reg->outbound_intstatus) & \
750 acb->outbound_int_enable;
751 /*clear and abort all outbound posted Q*/
752 writel(outbound_intstatus, &reg->outbound_intstatus);/*clear interrupt*/
753 while (((flag_ccb = readl(&reg->outbound_queueport)) != 0xFFFFFFFF) \
754 && (i++ < ARCMSR_MAX_OUTSTANDING_CMD)) {
755 arcmsr_drain_donequeue(acb, flag_ccb);
756 }
757 }
758 break;
759
760 case ACB_ADAPTER_TYPE_B: {
761 struct MessageUnit_B *reg = (struct MessageUnit_B *)acb->pmu;
762 /*clear all outbound posted Q*/
763 for (i = 0; i < ARCMSR_MAX_HBB_POSTQUEUE; i++) {
764 if ((flag_ccb = readl(&reg->done_qbuffer[i])) != 0) {
765 writel(0, &reg->done_qbuffer[i]);
766 arcmsr_drain_donequeue(acb, flag_ccb);
767 }
768 writel(0, &reg->post_qbuffer[i]);
769 }
770 reg->doneq_index = 0;
771 reg->postq_index = 0;
772 }
773 break;
774 }
775}
1c57e86d
EC
776static void arcmsr_remove(struct pci_dev *pdev)
777{
778 struct Scsi_Host *host = pci_get_drvdata(pdev);
779 struct AdapterControlBlock *acb =
780 (struct AdapterControlBlock *) host->hostdata;
1c57e86d
EC
781 int poll_count = 0;
782
783 arcmsr_free_sysfs_attr(acb);
784 scsi_remove_host(host);
785 arcmsr_stop_adapter_bgrb(acb);
786 arcmsr_flush_adapter_cache(acb);
1a4f550a 787 arcmsr_disable_outbound_ints(acb);
1c57e86d
EC
788 acb->acb_flags |= ACB_F_SCSISTOPADAPTER;
789 acb->acb_flags &= ~ACB_F_IOP_INITED;
790
1a4f550a 791 for (poll_count = 0; poll_count < ARCMSR_MAX_OUTSTANDING_CMD; poll_count++) {
1c57e86d
EC
792 if (!atomic_read(&acb->ccboutstandingcount))
793 break;
1a4f550a 794 arcmsr_interrupt(acb);/* FIXME: need spinlock */
1c57e86d
EC
795 msleep(25);
796 }
797
798 if (atomic_read(&acb->ccboutstandingcount)) {
799 int i;
800
801 arcmsr_abort_allcmd(acb);
1a4f550a 802 arcmsr_done4abort_postqueue(acb);
1c57e86d
EC
803 for (i = 0; i < ARCMSR_MAX_FREECCB_NUM; i++) {
804 struct CommandControlBlock *ccb = acb->pccb_pool[i];
805 if (ccb->startdone == ARCMSR_CCB_START) {
806 ccb->startdone = ARCMSR_CCB_ABORTED;
807 ccb->pcmd->result = DID_ABORT << 16;
808 arcmsr_ccb_complete(ccb, 1);
809 }
810 }
811 }
812
813 free_irq(pdev->irq, acb);
814 iounmap(acb->pmu);
815 arcmsr_free_ccb_pool(acb);
816 pci_release_regions(pdev);
817
818 scsi_host_put(host);
819
820 pci_disable_device(pdev);
821 pci_set_drvdata(pdev, NULL);
822}
823
824static void arcmsr_shutdown(struct pci_dev *pdev)
825{
826 struct Scsi_Host *host = pci_get_drvdata(pdev);
827 struct AdapterControlBlock *acb =
828 (struct AdapterControlBlock *)host->hostdata;
829
830 arcmsr_stop_adapter_bgrb(acb);
831 arcmsr_flush_adapter_cache(acb);
832}
833
834static int arcmsr_module_init(void)
835{
836 int error = 0;
837
838 error = pci_register_driver(&arcmsr_pci_driver);
839 return error;
840}
841
842static void arcmsr_module_exit(void)
843{
844 pci_unregister_driver(&arcmsr_pci_driver);
845}
846module_init(arcmsr_module_init);
847module_exit(arcmsr_module_exit);
848
1a4f550a
NC
849static void arcmsr_enable_outbound_ints(struct AdapterControlBlock *acb, \
850 u32 intmask_org)
1c57e86d 851{
1c57e86d
EC
852 u32 mask;
853
1a4f550a 854 switch (acb->adapter_type) {
1c57e86d 855
1a4f550a
NC
856 case ACB_ADAPTER_TYPE_A : {
857 struct MessageUnit_A __iomem *reg = (struct MessageUnit_A *)acb->pmu;
858 mask = intmask_org & ~(ARCMSR_MU_OUTBOUND_POSTQUEUE_INTMASKENABLE |
859 ARCMSR_MU_OUTBOUND_DOORBELL_INTMASKENABLE);
860 writel(mask, &reg->outbound_intmask);
861 acb->outbound_int_enable = ~(intmask_org & mask) & 0x000000ff;
862 }
863 break;
1c57e86d 864
1a4f550a
NC
865 case ACB_ADAPTER_TYPE_B : {
866 struct MessageUnit_B *reg = (struct MessageUnit_B *)acb->pmu;
867 mask = intmask_org | (ARCMSR_IOP2DRV_DATA_WRITE_OK | \
868 ARCMSR_IOP2DRV_DATA_READ_OK | ARCMSR_IOP2DRV_CDB_DONE);
869 writel(mask, reg->iop2drv_doorbell_mask_reg);
870 acb->outbound_int_enable = (intmask_org | mask) & 0x0000000f;
871 }
1c57e86d
EC
872 }
873}
874
1a4f550a
NC
875static void arcmsr_build_ccb(struct AdapterControlBlock *acb,
876 struct CommandControlBlock *ccb, struct scsi_cmnd *pcmd)
1c57e86d 877{
1a4f550a
NC
878 struct ARCMSR_CDB *arcmsr_cdb = (struct ARCMSR_CDB *)&ccb->arcmsr_cdb;
879 int8_t *psge = (int8_t *)&arcmsr_cdb->u;
880 uint32_t address_lo, address_hi;
881 int arccdbsize = 0x30;
882 int nseg;
1c57e86d
EC
883
884 ccb->pcmd = pcmd;
1a4f550a 885 memset(arcmsr_cdb, 0, sizeof(struct ARCMSR_CDB));
1c57e86d
EC
886 arcmsr_cdb->Bus = 0;
887 arcmsr_cdb->TargetID = pcmd->device->id;
888 arcmsr_cdb->LUN = pcmd->device->lun;
889 arcmsr_cdb->Function = 1;
890 arcmsr_cdb->CdbLength = (uint8_t)pcmd->cmd_len;
891 arcmsr_cdb->Context = (unsigned long)arcmsr_cdb;
892 memcpy(arcmsr_cdb->Cdb, pcmd->cmnd, pcmd->cmd_len);
deff2627
FT
893
894 nseg = scsi_dma_map(pcmd);
895 BUG_ON(nseg < 0);
896
897 if (nseg) {
898 int length, i, cdb_sgcount = 0;
899 struct scatterlist *sg;
900
1c57e86d 901 /* map stor port SG list to our iop SG List. */
deff2627 902 scsi_for_each_sg(pcmd, sg, nseg, i) {
1c57e86d 903 /* Get the physical address of the current data pointer */
deff2627
FT
904 length = cpu_to_le32(sg_dma_len(sg));
905 address_lo = cpu_to_le32(dma_addr_lo32(sg_dma_address(sg)));
906 address_hi = cpu_to_le32(dma_addr_hi32(sg_dma_address(sg)));
1c57e86d
EC
907 if (address_hi == 0) {
908 struct SG32ENTRY *pdma_sg = (struct SG32ENTRY *)psge;
909
910 pdma_sg->address = address_lo;
911 pdma_sg->length = length;
912 psge += sizeof (struct SG32ENTRY);
913 arccdbsize += sizeof (struct SG32ENTRY);
914 } else {
915 struct SG64ENTRY *pdma_sg = (struct SG64ENTRY *)psge;
916
917 pdma_sg->addresshigh = address_hi;
918 pdma_sg->address = address_lo;
919 pdma_sg->length = length|IS_SG64_ADDR;
920 psge += sizeof (struct SG64ENTRY);
921 arccdbsize += sizeof (struct SG64ENTRY);
922 }
1c57e86d
EC
923 cdb_sgcount++;
924 }
925 arcmsr_cdb->sgcount = (uint8_t)cdb_sgcount;
deff2627 926 arcmsr_cdb->DataLength = scsi_bufflen(pcmd);
1c57e86d
EC
927 if ( arccdbsize > 256)
928 arcmsr_cdb->Flags |= ARCMSR_CDB_FLAG_SGL_BSIZE;
1c57e86d
EC
929 }
930 if (pcmd->sc_data_direction == DMA_TO_DEVICE ) {
931 arcmsr_cdb->Flags |= ARCMSR_CDB_FLAG_WRITE;
932 ccb->ccb_flags |= CCB_FLAG_WRITE;
933 }
934}
935
936static void arcmsr_post_ccb(struct AdapterControlBlock *acb, struct CommandControlBlock *ccb)
937{
1c57e86d
EC
938 uint32_t cdb_shifted_phyaddr = ccb->cdb_shifted_phyaddr;
939 struct ARCMSR_CDB *arcmsr_cdb = (struct ARCMSR_CDB *)&ccb->arcmsr_cdb;
1c57e86d
EC
940 atomic_inc(&acb->ccboutstandingcount);
941 ccb->startdone = ARCMSR_CCB_START;
1a4f550a
NC
942
943 switch (acb->adapter_type) {
944 case ACB_ADAPTER_TYPE_A: {
945 struct MessageUnit_A *reg = (struct MessageUnit_A *)acb->pmu;
946
947 if (arcmsr_cdb->Flags & ARCMSR_CDB_FLAG_SGL_BSIZE)
948 writel(cdb_shifted_phyaddr | ARCMSR_CCBPOST_FLAG_SGL_BSIZE,
1c57e86d 949 &reg->inbound_queueport);
1a4f550a
NC
950 else {
951 writel(cdb_shifted_phyaddr, &reg->inbound_queueport);
952 }
953 }
954 break;
1c57e86d 955
1a4f550a
NC
956 case ACB_ADAPTER_TYPE_B: {
957 struct MessageUnit_B *reg = (struct MessageUnit_B *)acb->pmu;
958 uint32_t ending_index, index = reg->postq_index;
1c57e86d 959
1a4f550a
NC
960 ending_index = ((index + 1) % ARCMSR_MAX_HBB_POSTQUEUE);
961 writel(0, &reg->post_qbuffer[ending_index]);
962 if (arcmsr_cdb->Flags & ARCMSR_CDB_FLAG_SGL_BSIZE) {
963 writel(cdb_shifted_phyaddr | ARCMSR_CCBPOST_FLAG_SGL_BSIZE,\
964 &reg->post_qbuffer[index]);
965 }
966 else {
967 writel(cdb_shifted_phyaddr, &reg->post_qbuffer[index]);
968 }
969 index++;
970 index %= ARCMSR_MAX_HBB_POSTQUEUE;/*if last index number set it to 0 */
971 reg->postq_index = index;
972 writel(ARCMSR_DRV2IOP_CDB_POSTED, reg->drv2iop_doorbell_reg);
1c57e86d 973 }
1a4f550a 974 break;
1c57e86d
EC
975 }
976}
977
1a4f550a 978static void arcmsr_stop_hba_bgrb(struct AdapterControlBlock *acb)
1c57e86d 979{
1a4f550a 980 struct MessageUnit_A __iomem *reg = (struct MessageUnit_A *)acb->pmu;
1c57e86d
EC
981 acb->acb_flags &= ~ACB_F_MSG_START_BGRB;
982 writel(ARCMSR_INBOUND_MESG0_STOP_BGRB, &reg->inbound_msgaddr0);
1a4f550a
NC
983
984 if (arcmsr_hba_wait_msgint_ready(acb)) {
985 printk(KERN_NOTICE
986 "arcmsr%d: wait 'stop adapter background rebulid' timeout \n"
987 , acb->host->host_no);
988 }
989}
990
991static void arcmsr_stop_hbb_bgrb(struct AdapterControlBlock *acb)
992{
993 struct MessageUnit_B *reg = (struct MessageUnit_B *)acb->pmu;
994 acb->acb_flags &= ~ACB_F_MSG_START_BGRB;
995 writel(ARCMSR_MESSAGE_STOP_BGRB, reg->drv2iop_doorbell_reg);
996
997 if (arcmsr_hbb_wait_msgint_ready(acb)) {
1c57e86d
EC
998 printk(KERN_NOTICE
999 "arcmsr%d: wait 'stop adapter background rebulid' timeout \n"
1000 , acb->host->host_no);
1a4f550a
NC
1001 }
1002}
1003
1004static void arcmsr_stop_adapter_bgrb(struct AdapterControlBlock *acb)
1005{
1006 switch (acb->adapter_type) {
1007 case ACB_ADAPTER_TYPE_A: {
1008 arcmsr_stop_hba_bgrb(acb);
1009 }
1010 break;
1011
1012 case ACB_ADAPTER_TYPE_B: {
1013 arcmsr_stop_hbb_bgrb(acb);
1014 }
1015 break;
1016 }
1c57e86d
EC
1017}
1018
1019static void arcmsr_free_ccb_pool(struct AdapterControlBlock *acb)
1020{
1021 dma_free_coherent(&acb->pdev->dev,
1022 ARCMSR_MAX_FREECCB_NUM * sizeof (struct CommandControlBlock) + 0x20,
1023 acb->dma_coherent,
1024 acb->dma_coherent_handle);
1025}
1026
1a4f550a 1027void arcmsr_iop_message_read(struct AdapterControlBlock *acb)
1c57e86d 1028{
1a4f550a
NC
1029 switch (acb->adapter_type) {
1030 case ACB_ADAPTER_TYPE_A: {
1031 struct MessageUnit_A __iomem *reg = (struct MessageUnit_A *)acb->pmu;
1032 writel(ARCMSR_INBOUND_DRIVER_DATA_READ_OK, &reg->inbound_doorbell);
1033 }
1034 break;
1c57e86d 1035
1a4f550a
NC
1036 case ACB_ADAPTER_TYPE_B: {
1037 struct MessageUnit_B *reg = (struct MessageUnit_B *)acb->pmu;
1038 writel(ARCMSR_DRV2IOP_DATA_READ_OK, reg->drv2iop_doorbell_reg);
1c57e86d 1039 }
1a4f550a 1040 break;
1c57e86d 1041 }
1a4f550a
NC
1042}
1043
1044static void arcmsr_iop_message_wrote(struct AdapterControlBlock *acb)
1045{
1046 switch (acb->adapter_type) {
1047 case ACB_ADAPTER_TYPE_A: {
1048 struct MessageUnit_A __iomem *reg = (struct MessageUnit_A *)acb->pmu;
1c57e86d 1049 /*
1a4f550a
NC
1050 ** push inbound doorbell tell iop, driver data write ok
1051 ** and wait reply on next hwinterrupt for next Qbuffer post
1c57e86d 1052 */
1a4f550a
NC
1053 writel(ARCMSR_INBOUND_DRIVER_DATA_WRITE_OK, &reg->inbound_doorbell);
1054 }
1055 break;
1056
1057 case ACB_ADAPTER_TYPE_B: {
1058 struct MessageUnit_B *reg = (struct MessageUnit_B *)acb->pmu;
1059 /*
1060 ** push inbound doorbell tell iop, driver data write ok
1061 ** and wait reply on next hwinterrupt for next Qbuffer post
1062 */
1063 writel(ARCMSR_DRV2IOP_DATA_WRITE_OK, reg->drv2iop_doorbell_reg);
1064 }
1065 break;
1066 }
1067}
1068
1069struct QBUFFER *arcmsr_get_iop_rqbuffer(struct AdapterControlBlock *acb)
1070{
1071 static struct QBUFFER *qbuffer;
1072
1073 switch (acb->adapter_type) {
1074
1075 case ACB_ADAPTER_TYPE_A: {
1076 struct MessageUnit_A __iomem *reg = (struct MessageUnit_A *)acb->pmu;
1077 qbuffer = (struct QBUFFER __iomem *) &reg->message_rbuffer;
1078 }
1079 break;
1080
1081 case ACB_ADAPTER_TYPE_B: {
1082 struct MessageUnit_B *reg = (struct MessageUnit_B *)acb->pmu;
1083 qbuffer = (struct QBUFFER __iomem *) reg->ioctl_rbuffer_reg;
1084 }
1085 break;
1086 }
1087 return qbuffer;
1088}
1089
1090static struct QBUFFER *arcmsr_get_iop_wqbuffer(struct AdapterControlBlock *acb)
1091{
1092 static struct QBUFFER *pqbuffer;
1093
1094 switch (acb->adapter_type) {
1095
1096 case ACB_ADAPTER_TYPE_A: {
1097 struct MessageUnit_A __iomem *reg = (struct MessageUnit_A *)acb->pmu;
1098 pqbuffer = (struct QBUFFER *) &reg->message_wbuffer;
1099 }
1100 break;
1101
1102 case ACB_ADAPTER_TYPE_B: {
1103 struct MessageUnit_B *reg = (struct MessageUnit_B *)acb->pmu;
1104 pqbuffer = (struct QBUFFER __iomem *)reg->ioctl_wbuffer_reg;
1105 }
1106 break;
1107 }
1108 return pqbuffer;
1109}
1110
1111static void arcmsr_iop2drv_data_wrote_handle(struct AdapterControlBlock *acb)
1112{
1113 struct QBUFFER *prbuffer;
1114 struct QBUFFER *pQbuffer;
1115 uint8_t *iop_data;
1116 int32_t my_empty_len, iop_len, rqbuf_firstindex, rqbuf_lastindex;
1117
1118 rqbuf_lastindex = acb->rqbuf_lastindex;
1119 rqbuf_firstindex = acb->rqbuf_firstindex;
1120 prbuffer = arcmsr_get_iop_rqbuffer(acb);
1121 iop_data = (uint8_t *)prbuffer->data;
1122 iop_len = prbuffer->data_len;
1123 my_empty_len = (rqbuf_firstindex - rqbuf_lastindex -1)&(ARCMSR_MAX_QBUFFER -1);
1124
1125 if (my_empty_len >= iop_len)
1126 {
1127 while (iop_len > 0) {
1128 pQbuffer = (struct QBUFFER *)&acb->rqbuffer[rqbuf_lastindex];
1129 memcpy(pQbuffer, iop_data,1);
1130 rqbuf_lastindex++;
1131 rqbuf_lastindex %= ARCMSR_MAX_QBUFFER;
1132 iop_data++;
1133 iop_len--;
1134 }
1135 acb->rqbuf_lastindex = rqbuf_lastindex;
1136 arcmsr_iop_message_read(acb);
1137 }
1138
1139 else {
1140 acb->acb_flags |= ACB_F_IOPDATA_OVERFLOW;
1141 }
1142}
1143
1144static void arcmsr_iop2drv_data_read_handle(struct AdapterControlBlock *acb)
1145{
1146 acb->acb_flags |= ACB_F_MESSAGE_WQBUFFER_READED;
1147 if (acb->wqbuf_firstindex != acb->wqbuf_lastindex) {
1148 uint8_t *pQbuffer;
1149 struct QBUFFER *pwbuffer;
1150 uint8_t *iop_data;
1151 int32_t allxfer_len = 0;
1152
1153 acb->acb_flags &= (~ACB_F_MESSAGE_WQBUFFER_READED);
1154 pwbuffer = arcmsr_get_iop_wqbuffer(acb);
1155 iop_data = (uint8_t __iomem *)pwbuffer->data;
1156
1157 while ((acb->wqbuf_firstindex != acb->wqbuf_lastindex) && \
1158 (allxfer_len < 124)) {
1159 pQbuffer = &acb->wqbuffer[acb->wqbuf_firstindex];
1160 memcpy(iop_data, pQbuffer, 1);
1161 acb->wqbuf_firstindex++;
1162 acb->wqbuf_firstindex %= ARCMSR_MAX_QBUFFER;
1163 iop_data++;
1164 allxfer_len++;
1165 }
1166 pwbuffer->data_len = allxfer_len;
1167
1168 arcmsr_iop_message_wrote(acb);
1169 }
1170
1171 if (acb->wqbuf_firstindex == acb->wqbuf_lastindex) {
1172 acb->acb_flags |= ACB_F_MESSAGE_WQBUFFER_CLEARED;
1173 }
1174}
1175
1176static void arcmsr_hba_doorbell_isr(struct AdapterControlBlock *acb)
1177{
1178 uint32_t outbound_doorbell;
1179 struct MessageUnit_A __iomem *reg = (struct MessageUnit_A *)acb->pmu;
1180
1181 outbound_doorbell = readl(&reg->outbound_doorbell);
1182 writel(outbound_doorbell, &reg->outbound_doorbell);
1183 if (outbound_doorbell & ARCMSR_OUTBOUND_IOP331_DATA_WRITE_OK) {
1184 arcmsr_iop2drv_data_wrote_handle(acb);
1185 }
1186
1187 if (outbound_doorbell & ARCMSR_OUTBOUND_IOP331_DATA_READ_OK) {
1188 arcmsr_iop2drv_data_read_handle(acb);
1189 }
1190}
1191
1192static void arcmsr_hba_postqueue_isr(struct AdapterControlBlock *acb)
1193{
1194 uint32_t flag_ccb;
1195 struct MessageUnit_A __iomem *reg = (struct MessageUnit_A *)acb->pmu;
1196
1197 while ((flag_ccb = readl(&reg->outbound_queueport)) != 0xFFFFFFFF) {
1198 arcmsr_drain_donequeue(acb, flag_ccb);
1199 }
1200}
1201
1202static void arcmsr_hbb_postqueue_isr(struct AdapterControlBlock *acb)
1203{
1204 uint32_t index;
1205 uint32_t flag_ccb;
1206 struct MessageUnit_B *reg = (struct MessageUnit_B *)acb->pmu;
1207
1208 index = reg->doneq_index;
1209
1210 while ((flag_ccb = readl(&reg->done_qbuffer[index])) != 0) {
1211 writel(0, &reg->done_qbuffer[index]);
1212 arcmsr_drain_donequeue(acb, flag_ccb);
1213 index++;
1214 index %= ARCMSR_MAX_HBB_POSTQUEUE;
1215 reg->doneq_index = index;
1216 }
1217}
1218
1219static int arcmsr_handle_hba_isr(struct AdapterControlBlock *acb)
1220{
1221 uint32_t outbound_intstatus;
1222 struct MessageUnit_A __iomem *reg = (struct MessageUnit_A *)acb->pmu;
1223
1224 outbound_intstatus = readl(&reg->outbound_intstatus) & \
1225 acb->outbound_int_enable;
1226 if (!(outbound_intstatus & ARCMSR_MU_OUTBOUND_HANDLE_INT)) {
1227 return 1;
1228 }
1229 writel(outbound_intstatus, &reg->outbound_intstatus);
1230 if (outbound_intstatus & ARCMSR_MU_OUTBOUND_DOORBELL_INT) {
1231 arcmsr_hba_doorbell_isr(acb);
1232 }
1233 if (outbound_intstatus & ARCMSR_MU_OUTBOUND_POSTQUEUE_INT) {
1234 arcmsr_hba_postqueue_isr(acb);
1235 }
1236 return 0;
1237}
1238
1239static int arcmsr_handle_hbb_isr(struct AdapterControlBlock *acb)
1240{
1241 uint32_t outbound_doorbell;
1242 struct MessageUnit_B *reg = (struct MessageUnit_B *)acb->pmu;
1243
1244 outbound_doorbell = readl(reg->iop2drv_doorbell_reg) & \
1245 acb->outbound_int_enable;
1246 if (!outbound_doorbell)
1247 return 1;
1248
1249 writel(~outbound_doorbell, reg->iop2drv_doorbell_reg);
1250
1251 if (outbound_doorbell & ARCMSR_IOP2DRV_DATA_WRITE_OK) {
1252 arcmsr_iop2drv_data_wrote_handle(acb);
1253 }
1254 if (outbound_doorbell & ARCMSR_IOP2DRV_DATA_READ_OK) {
1255 arcmsr_iop2drv_data_read_handle(acb);
1256 }
1257 if (outbound_doorbell & ARCMSR_IOP2DRV_CDB_DONE) {
1258 arcmsr_hbb_postqueue_isr(acb);
1259 }
1260
1261 return 0;
1262}
1263
1264static irqreturn_t arcmsr_interrupt(struct AdapterControlBlock *acb)
1265{
1266 switch (acb->adapter_type) {
1267 case ACB_ADAPTER_TYPE_A: {
1268 if (arcmsr_handle_hba_isr(acb)) {
1269 return IRQ_NONE;
1270 }
1271 }
1272 break;
1273
1274 case ACB_ADAPTER_TYPE_B: {
1275 if (arcmsr_handle_hbb_isr(acb)) {
1276 return IRQ_NONE;
1277 }
1278 }
1279 break;
1c57e86d 1280 }
1c57e86d
EC
1281 return IRQ_HANDLED;
1282}
1283
1284static void arcmsr_iop_parking(struct AdapterControlBlock *acb)
1285{
1286 if (acb) {
1287 /* stop adapter background rebuild */
1288 if (acb->acb_flags & ACB_F_MSG_START_BGRB) {
1a4f550a 1289 uint32_t intmask_org;
1c57e86d 1290 acb->acb_flags &= ~ACB_F_MSG_START_BGRB;
1a4f550a 1291 intmask_org = arcmsr_disable_outbound_ints(acb);
1c57e86d
EC
1292 arcmsr_stop_adapter_bgrb(acb);
1293 arcmsr_flush_adapter_cache(acb);
1a4f550a
NC
1294 arcmsr_enable_outbound_ints(acb, intmask_org);
1295 }
1296 }
1297}
1298
1299void arcmsr_post_ioctldata2iop(struct AdapterControlBlock *acb)
1300{
1301 int32_t wqbuf_firstindex, wqbuf_lastindex;
1302 uint8_t *pQbuffer;
1303 struct QBUFFER *pwbuffer;
1304 uint8_t *iop_data;
1305 int32_t allxfer_len = 0;
1306
1307 pwbuffer = arcmsr_get_iop_wqbuffer(acb);
1308 iop_data = (uint8_t __iomem *)pwbuffer->data;
1309 if (acb->acb_flags & ACB_F_MESSAGE_WQBUFFER_READED) {
1310 acb->acb_flags &= (~ACB_F_MESSAGE_WQBUFFER_READED);
1311 wqbuf_firstindex = acb->wqbuf_firstindex;
1312 wqbuf_lastindex = acb->wqbuf_lastindex;
1313 while ((wqbuf_firstindex != wqbuf_lastindex) && (allxfer_len < 124)) {
1314 pQbuffer = &acb->wqbuffer[wqbuf_firstindex];
1315 memcpy(iop_data, pQbuffer, 1);
1316 wqbuf_firstindex++;
1317 wqbuf_firstindex %= ARCMSR_MAX_QBUFFER;
1318 iop_data++;
1319 allxfer_len++;
1c57e86d 1320 }
1a4f550a
NC
1321 acb->wqbuf_firstindex = wqbuf_firstindex;
1322 pwbuffer->data_len = allxfer_len;
1323 arcmsr_iop_message_wrote(acb);
1c57e86d
EC
1324 }
1325}
1326
1a4f550a
NC
1327static int arcmsr_iop_message_xfer(struct AdapterControlBlock *acb, \
1328 struct scsi_cmnd *cmd)
1c57e86d 1329{
1c57e86d
EC
1330 struct CMD_MESSAGE_FIELD *pcmdmessagefld;
1331 int retvalue = 0, transfer_len = 0;
1332 char *buffer;
deff2627 1333 struct scatterlist *sg;
1c57e86d
EC
1334 uint32_t controlcode = (uint32_t ) cmd->cmnd[5] << 24 |
1335 (uint32_t ) cmd->cmnd[6] << 16 |
1336 (uint32_t ) cmd->cmnd[7] << 8 |
1337 (uint32_t ) cmd->cmnd[8];
1a4f550a 1338 /* 4 bytes: Areca io control code */
1c57e86d 1339
deff2627
FT
1340 sg = scsi_sglist(cmd);
1341 buffer = kmap_atomic(sg->page, KM_IRQ0) + sg->offset;
1342 if (scsi_sg_count(cmd) > 1) {
1343 retvalue = ARCMSR_MESSAGE_FAIL;
1344 goto message_out;
1c57e86d 1345 }
deff2627
FT
1346 transfer_len += sg->length;
1347
1c57e86d
EC
1348 if (transfer_len > sizeof(struct CMD_MESSAGE_FIELD)) {
1349 retvalue = ARCMSR_MESSAGE_FAIL;
1350 goto message_out;
1351 }
1352 pcmdmessagefld = (struct CMD_MESSAGE_FIELD *) buffer;
1353 switch(controlcode) {
1a4f550a 1354
1c57e86d 1355 case ARCMSR_MESSAGE_READ_RQBUFFER: {
1a4f550a
NC
1356 unsigned long *ver_addr;
1357 dma_addr_t buf_handle;
1358 uint8_t *pQbuffer, *ptmpQbuffer;
1359 int32_t allxfer_len = 0;
1360
1361 ver_addr = pci_alloc_consistent(acb->pdev, 1032, &buf_handle);
1362 if (!ver_addr) {
1363 retvalue = ARCMSR_MESSAGE_FAIL;
1364 goto message_out;
1365 }
1366 ptmpQbuffer = (uint8_t *) ver_addr;
1367 while ((acb->rqbuf_firstindex != acb->rqbuf_lastindex)
1368 && (allxfer_len < 1031)) {
1369 pQbuffer = &acb->rqbuffer[acb->rqbuf_firstindex];
1370 memcpy(ptmpQbuffer, pQbuffer, 1);
1371 acb->rqbuf_firstindex++;
1372 acb->rqbuf_firstindex %= ARCMSR_MAX_QBUFFER;
1373 ptmpQbuffer++;
1374 allxfer_len++;
1375 }
1376 if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) {
1c57e86d 1377
1a4f550a
NC
1378 struct QBUFFER *prbuffer;
1379 uint8_t *iop_data;
1380 int32_t iop_len;
1381
1382 acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW;
1383 prbuffer = arcmsr_get_iop_rqbuffer(acb);
1384 iop_data = (uint8_t *)prbuffer->data;
1385 iop_len = readl(&prbuffer->data_len);
1386 while (iop_len > 0) {
1387 acb->rqbuffer[acb->rqbuf_lastindex] = readb(iop_data);
1388 acb->rqbuf_lastindex++;
1389 acb->rqbuf_lastindex %= ARCMSR_MAX_QBUFFER;
1390 iop_data++;
1391 iop_len--;
1c57e86d 1392 }
1a4f550a
NC
1393 arcmsr_iop_message_read(acb);
1394 }
1395 memcpy(pcmdmessagefld->messagedatabuffer, (uint8_t *)ver_addr, allxfer_len);
1396 pcmdmessagefld->cmdmessage.Length = allxfer_len;
1397 pcmdmessagefld->cmdmessage.ReturnCode = ARCMSR_MESSAGE_RETURNCODE_OK;
1398 pci_free_consistent(acb->pdev, 1032, ver_addr, buf_handle);
1c57e86d
EC
1399 }
1400 break;
1c57e86d 1401
1a4f550a
NC
1402 case ARCMSR_MESSAGE_WRITE_WQBUFFER: {
1403 unsigned long *ver_addr;
1404 dma_addr_t buf_handle;
1405 int32_t my_empty_len, user_len, wqbuf_firstindex, wqbuf_lastindex;
1406 uint8_t *pQbuffer, *ptmpuserbuffer;
1407
1408 ver_addr = pci_alloc_consistent(acb->pdev, 1032, &buf_handle);
1409 if (!ver_addr) {
1410 retvalue = ARCMSR_MESSAGE_FAIL;
1411 goto message_out;
1412 }
1413 ptmpuserbuffer = (uint8_t *)ver_addr;
1414 user_len = pcmdmessagefld->cmdmessage.Length;
1415 memcpy(ptmpuserbuffer, pcmdmessagefld->messagedatabuffer, user_len);
1416 wqbuf_lastindex = acb->wqbuf_lastindex;
1417 wqbuf_firstindex = acb->wqbuf_firstindex;
1418 if (wqbuf_lastindex != wqbuf_firstindex) {
1419 struct SENSE_DATA *sensebuffer =
1420 (struct SENSE_DATA *)cmd->sense_buffer;
1421 arcmsr_post_ioctldata2iop(acb);
1422 /* has error report sensedata */
1423 sensebuffer->ErrorCode = 0x70;
1424 sensebuffer->SenseKey = ILLEGAL_REQUEST;
1425 sensebuffer->AdditionalSenseLength = 0x0A;
1426 sensebuffer->AdditionalSenseCode = 0x20;
1427 sensebuffer->Valid = 1;
1428 retvalue = ARCMSR_MESSAGE_FAIL;
1429 } else {
1430 my_empty_len = (wqbuf_firstindex-wqbuf_lastindex - 1)
1431 &(ARCMSR_MAX_QBUFFER - 1);
1432 if (my_empty_len >= user_len) {
1433 while (user_len > 0) {
1434 pQbuffer =
1435 &acb->wqbuffer[acb->wqbuf_lastindex];
1436 memcpy(pQbuffer, ptmpuserbuffer, 1);
1437 acb->wqbuf_lastindex++;
1438 acb->wqbuf_lastindex %= ARCMSR_MAX_QBUFFER;
1439 ptmpuserbuffer++;
1440 user_len--;
1441 }
1442 if (acb->acb_flags & ACB_F_MESSAGE_WQBUFFER_CLEARED) {
1443 acb->acb_flags &=
1444 ~ACB_F_MESSAGE_WQBUFFER_CLEARED;
1445 arcmsr_post_ioctldata2iop(acb);
1446 }
1447 } else {
1448 /* has error report sensedata */
1c57e86d
EC
1449 struct SENSE_DATA *sensebuffer =
1450 (struct SENSE_DATA *)cmd->sense_buffer;
1c57e86d
EC
1451 sensebuffer->ErrorCode = 0x70;
1452 sensebuffer->SenseKey = ILLEGAL_REQUEST;
1453 sensebuffer->AdditionalSenseLength = 0x0A;
1454 sensebuffer->AdditionalSenseCode = 0x20;
1455 sensebuffer->Valid = 1;
1456 retvalue = ARCMSR_MESSAGE_FAIL;
1a4f550a 1457 }
1c57e86d
EC
1458 }
1459 pci_free_consistent(acb->pdev, 1032, ver_addr, buf_handle);
1460 }
1461 break;
1a4f550a 1462
1c57e86d 1463 case ARCMSR_MESSAGE_CLEAR_RQBUFFER: {
1a4f550a 1464 uint8_t *pQbuffer = acb->rqbuffer;
1c57e86d 1465
1a4f550a
NC
1466 if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) {
1467 acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW;
1468 arcmsr_iop_message_read(acb);
1469 }
1470 acb->acb_flags |= ACB_F_MESSAGE_RQBUFFER_CLEARED;
1471 acb->rqbuf_firstindex = 0;
1472 acb->rqbuf_lastindex = 0;
1473 memset(pQbuffer, 0, ARCMSR_MAX_QBUFFER);
1474 pcmdmessagefld->cmdmessage.ReturnCode = ARCMSR_MESSAGE_RETURNCODE_OK;
1c57e86d
EC
1475 }
1476 break;
1a4f550a 1477
1c57e86d 1478 case ARCMSR_MESSAGE_CLEAR_WQBUFFER: {
1a4f550a 1479 uint8_t *pQbuffer = acb->wqbuffer;
1c57e86d 1480
1a4f550a
NC
1481 if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) {
1482 acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW;
1483 arcmsr_iop_message_read(acb);
1484 }
1485 acb->acb_flags |=
1486 (ACB_F_MESSAGE_WQBUFFER_CLEARED |
1487 ACB_F_MESSAGE_WQBUFFER_READED);
1488 acb->wqbuf_firstindex = 0;
1489 acb->wqbuf_lastindex = 0;
1490 memset(pQbuffer, 0, ARCMSR_MAX_QBUFFER);
1491 pcmdmessagefld->cmdmessage.ReturnCode =
1492 ARCMSR_MESSAGE_RETURNCODE_OK;
1c57e86d
EC
1493 }
1494 break;
1a4f550a 1495
1c57e86d 1496 case ARCMSR_MESSAGE_CLEAR_ALLQBUFFER: {
1a4f550a 1497 uint8_t *pQbuffer;
1c57e86d 1498
1a4f550a
NC
1499 if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) {
1500 acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW;
1501 arcmsr_iop_message_read(acb);
1502 }
1503 acb->acb_flags |=
1504 (ACB_F_MESSAGE_WQBUFFER_CLEARED
1505 | ACB_F_MESSAGE_RQBUFFER_CLEARED
1506 | ACB_F_MESSAGE_WQBUFFER_READED);
1507 acb->rqbuf_firstindex = 0;
1508 acb->rqbuf_lastindex = 0;
1509 acb->wqbuf_firstindex = 0;
1510 acb->wqbuf_lastindex = 0;
1511 pQbuffer = acb->rqbuffer;
1512 memset(pQbuffer, 0, sizeof(struct QBUFFER));
1513 pQbuffer = acb->wqbuffer;
1514 memset(pQbuffer, 0, sizeof(struct QBUFFER));
1515 pcmdmessagefld->cmdmessage.ReturnCode = ARCMSR_MESSAGE_RETURNCODE_OK;
1c57e86d
EC
1516 }
1517 break;
1a4f550a 1518
1c57e86d 1519 case ARCMSR_MESSAGE_RETURN_CODE_3F: {
1a4f550a 1520 pcmdmessagefld->cmdmessage.ReturnCode = ARCMSR_MESSAGE_RETURNCODE_3F;
1c57e86d
EC
1521 }
1522 break;
1a4f550a 1523
1c57e86d 1524 case ARCMSR_MESSAGE_SAY_HELLO: {
1a4f550a 1525 int8_t *hello_string = "Hello! I am ARCMSR";
1c57e86d 1526
1a4f550a
NC
1527 memcpy(pcmdmessagefld->messagedatabuffer, hello_string
1528 , (int16_t)strlen(hello_string));
1529 pcmdmessagefld->cmdmessage.ReturnCode = ARCMSR_MESSAGE_RETURNCODE_OK;
1c57e86d
EC
1530 }
1531 break;
1a4f550a 1532
1c57e86d
EC
1533 case ARCMSR_MESSAGE_SAY_GOODBYE:
1534 arcmsr_iop_parking(acb);
1535 break;
1a4f550a 1536
1c57e86d
EC
1537 case ARCMSR_MESSAGE_FLUSH_ADAPTER_CACHE:
1538 arcmsr_flush_adapter_cache(acb);
1539 break;
1a4f550a 1540
1c57e86d
EC
1541 default:
1542 retvalue = ARCMSR_MESSAGE_FAIL;
1543 }
1a4f550a 1544 message_out:
deff2627
FT
1545 sg = scsi_sglist(cmd);
1546 kunmap_atomic(buffer - sg->offset, KM_IRQ0);
1c57e86d
EC
1547 return retvalue;
1548}
1549
1550static struct CommandControlBlock *arcmsr_get_freeccb(struct AdapterControlBlock *acb)
1551{
1552 struct list_head *head = &acb->ccb_free_list;
1553 struct CommandControlBlock *ccb = NULL;
1554
1555 if (!list_empty(head)) {
1556 ccb = list_entry(head->next, struct CommandControlBlock, list);
1557 list_del(head->next);
1558 }
1559 return ccb;
1560}
1561
1562static void arcmsr_handle_virtual_command(struct AdapterControlBlock *acb,
1563 struct scsi_cmnd *cmd)
1564{
1565 switch (cmd->cmnd[0]) {
1566 case INQUIRY: {
1567 unsigned char inqdata[36];
1568 char *buffer;
deff2627 1569 struct scatterlist *sg;
1c57e86d
EC
1570
1571 if (cmd->device->lun) {
1572 cmd->result = (DID_TIME_OUT << 16);
1573 cmd->scsi_done(cmd);
1574 return;
1575 }
1576 inqdata[0] = TYPE_PROCESSOR;
1577 /* Periph Qualifier & Periph Dev Type */
1578 inqdata[1] = 0;
1579 /* rem media bit & Dev Type Modifier */
1580 inqdata[2] = 0;
a1f6e021 1581 /* ISO, ECMA, & ANSI versions */
1c57e86d
EC
1582 inqdata[4] = 31;
1583 /* length of additional data */
1584 strncpy(&inqdata[8], "Areca ", 8);
1585 /* Vendor Identification */
1586 strncpy(&inqdata[16], "RAID controller ", 16);
1587 /* Product Identification */
1588 strncpy(&inqdata[32], "R001", 4); /* Product Revision */
1c57e86d 1589
deff2627
FT
1590 sg = scsi_sglist(cmd);
1591 buffer = kmap_atomic(sg->page, KM_IRQ0) + sg->offset;
1592
1c57e86d 1593 memcpy(buffer, inqdata, sizeof(inqdata));
deff2627
FT
1594 sg = scsi_sglist(cmd);
1595 kunmap_atomic(buffer - sg->offset, KM_IRQ0);
1c57e86d 1596
1c57e86d
EC
1597 cmd->scsi_done(cmd);
1598 }
1599 break;
1600 case WRITE_BUFFER:
1601 case READ_BUFFER: {
1602 if (arcmsr_iop_message_xfer(acb, cmd))
1603 cmd->result = (DID_ERROR << 16);
1604 cmd->scsi_done(cmd);
1605 }
1606 break;
1607 default:
1608 cmd->scsi_done(cmd);
1609 }
1610}
1611
1612static int arcmsr_queue_command(struct scsi_cmnd *cmd,
1613 void (* done)(struct scsi_cmnd *))
1614{
1615 struct Scsi_Host *host = cmd->device->host;
1a4f550a 1616 struct AdapterControlBlock *acb = (struct AdapterControlBlock *) host->hostdata;
1c57e86d
EC
1617 struct CommandControlBlock *ccb;
1618 int target = cmd->device->id;
1619 int lun = cmd->device->lun;
1620
1621 cmd->scsi_done = done;
1622 cmd->host_scribble = NULL;
1623 cmd->result = 0;
1624 if (acb->acb_flags & ACB_F_BUS_RESET) {
1625 printk(KERN_NOTICE "arcmsr%d: bus reset"
1626 " and return busy \n"
1627 , acb->host->host_no);
1628 return SCSI_MLQUEUE_HOST_BUSY;
1629 }
a1f6e021 1630 if (target == 16) {
1c57e86d
EC
1631 /* virtual device for iop message transfer */
1632 arcmsr_handle_virtual_command(acb, cmd);
1633 return 0;
1634 }
1635 if (acb->devstate[target][lun] == ARECA_RAID_GONE) {
1636 uint8_t block_cmd;
1637
1638 block_cmd = cmd->cmnd[0] & 0x0f;
1639 if (block_cmd == 0x08 || block_cmd == 0x0a) {
1640 printk(KERN_NOTICE
1641 "arcmsr%d: block 'read/write'"
1642 "command with gone raid volume"
a1f6e021 1643 " Cmd = %2x, TargetId = %d, Lun = %d \n"
1c57e86d
EC
1644 , acb->host->host_no
1645 , cmd->cmnd[0]
1646 , target, lun);
1647 cmd->result = (DID_NO_CONNECT << 16);
1648 cmd->scsi_done(cmd);
1649 return 0;
1650 }
1651 }
1652 if (atomic_read(&acb->ccboutstandingcount) >=
1653 ARCMSR_MAX_OUTSTANDING_CMD)
1654 return SCSI_MLQUEUE_HOST_BUSY;
1655
1656 ccb = arcmsr_get_freeccb(acb);
1657 if (!ccb)
1658 return SCSI_MLQUEUE_HOST_BUSY;
1a4f550a 1659
1c57e86d
EC
1660 arcmsr_build_ccb(acb, ccb, cmd);
1661 arcmsr_post_ccb(acb, ccb);
1662 return 0;
1663}
1664
1a4f550a 1665static void arcmsr_get_hba_config(struct AdapterControlBlock *acb)
1c57e86d 1666{
1a4f550a 1667 struct MessageUnit_A __iomem *reg = (struct MessageUnit_A *)acb->pmu;
1c57e86d
EC
1668 char *acb_firm_model = acb->firm_model;
1669 char *acb_firm_version = acb->firm_version;
1a4f550a
NC
1670 char *iop_firm_model = (char *) (&reg->message_rwbuffer[15]);
1671 char *iop_firm_version = (char *) (&reg->message_rwbuffer[17]);
1c57e86d
EC
1672 int count;
1673
1674 writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, &reg->inbound_msgaddr0);
1a4f550a
NC
1675 if (arcmsr_hba_wait_msgint_ready(acb)) {
1676 printk(KERN_NOTICE "arcmsr%d: wait 'get adapter firmware \
1677 miscellaneous data' timeout \n", acb->host->host_no);
1678 }
1679
1c57e86d
EC
1680 count = 8;
1681 while (count) {
1682 *acb_firm_model = readb(iop_firm_model);
1683 acb_firm_model++;
1684 iop_firm_model++;
1685 count--;
1686 }
1a4f550a 1687
1c57e86d
EC
1688 count = 16;
1689 while (count) {
1690 *acb_firm_version = readb(iop_firm_version);
1691 acb_firm_version++;
1692 iop_firm_version++;
1693 count--;
1694 }
1a4f550a
NC
1695
1696 printk(KERN_INFO "ARECA RAID ADAPTER%d: FIRMWARE VERSION %s \n"
1c57e86d
EC
1697 , acb->host->host_no
1698 , acb->firm_version);
1a4f550a 1699
1c57e86d
EC
1700 acb->firm_request_len = readl(&reg->message_rwbuffer[1]);
1701 acb->firm_numbers_queue = readl(&reg->message_rwbuffer[2]);
1702 acb->firm_sdram_size = readl(&reg->message_rwbuffer[3]);
1703 acb->firm_hd_channels = readl(&reg->message_rwbuffer[4]);
1704}
1705
1a4f550a
NC
1706static void arcmsr_get_hbb_config(struct AdapterControlBlock *acb)
1707{
1708 struct MessageUnit_B *reg = (struct MessageUnit_B *)acb->pmu;
1709 uint32_t *lrwbuffer = reg->msgcode_rwbuffer_reg;
1710 char *acb_firm_model = acb->firm_model;
1711 char *acb_firm_version = acb->firm_version;
1712 char *iop_firm_model = (char *) (&lrwbuffer[15]);
1713 /*firm_model,15,60-67*/
1714 char *iop_firm_version = (char *) (&lrwbuffer[17]);
1715 /*firm_version,17,68-83*/
1716 int count;
1717
1718 writel(ARCMSR_MESSAGE_GET_CONFIG, reg->drv2iop_doorbell_reg);
1719 if (arcmsr_hbb_wait_msgint_ready(acb)) {
1720 printk(KERN_NOTICE "arcmsr%d: wait 'get adapter firmware \
1721 miscellaneous data' timeout \n", acb->host->host_no);
1722 }
1723
1724 count = 8;
1725 while (count)
1726 {
1727 *acb_firm_model = readb(iop_firm_model);
1728 acb_firm_model++;
1729 iop_firm_model++;
1730 count--;
1731 }
1732
1733 count = 16;
1734 while (count)
1735 {
1736 *acb_firm_version = readb(iop_firm_version);
1737 acb_firm_version++;
1738 iop_firm_version++;
1739 count--;
1740 }
1741
1742 printk(KERN_INFO "ARECA RAID ADAPTER%d: FIRMWARE VERSION %s \n",
1743 acb->host->host_no,
1744 acb->firm_version);
1745
1746 lrwbuffer++;
1747 acb->firm_request_len = readl(lrwbuffer++);
1748 /*firm_request_len,1,04-07*/
1749 acb->firm_numbers_queue = readl(lrwbuffer++);
1750 /*firm_numbers_queue,2,08-11*/
1751 acb->firm_sdram_size = readl(lrwbuffer++);
1752 /*firm_sdram_size,3,12-15*/
1753 acb->firm_hd_channels = readl(lrwbuffer);
1754 /*firm_ide_channels,4,16-19*/
1755}
1756
1757static void arcmsr_get_firmware_spec(struct AdapterControlBlock *acb)
1758{
1759 switch (acb->adapter_type) {
1760 case ACB_ADAPTER_TYPE_A: {
1761 arcmsr_get_hba_config(acb);
1762 }
1763 break;
1764
1765 case ACB_ADAPTER_TYPE_B: {
1766 arcmsr_get_hbb_config(acb);
1767 }
1768 break;
1769 }
1770}
1771
1772static void arcmsr_polling_hba_ccbdone(struct AdapterControlBlock *acb,
1c57e86d
EC
1773 struct CommandControlBlock *poll_ccb)
1774{
1a4f550a 1775 struct MessageUnit_A __iomem *reg = (struct MessageUnit_A *)acb->pmu;
1c57e86d
EC
1776 struct CommandControlBlock *ccb;
1777 uint32_t flag_ccb, outbound_intstatus, poll_ccb_done = 0, poll_count = 0;
1c57e86d 1778
1a4f550a 1779 polling_hba_ccb_retry:
1c57e86d 1780 poll_count++;
1a4f550a 1781 outbound_intstatus = readl(&reg->outbound_intstatus) & acb->outbound_int_enable;
1c57e86d
EC
1782 writel(outbound_intstatus, &reg->outbound_intstatus);/*clear interrupt*/
1783 while (1) {
1784 if ((flag_ccb = readl(&reg->outbound_queueport)) == 0xFFFFFFFF) {
1785 if (poll_ccb_done)
1786 break;
1787 else {
1788 msleep(25);
1789 if (poll_count > 100)
1790 break;
1a4f550a 1791 goto polling_hba_ccb_retry;
1c57e86d
EC
1792 }
1793 }
1a4f550a
NC
1794 ccb = (struct CommandControlBlock *)(acb->vir2phy_offset + (flag_ccb << 5));
1795 poll_ccb_done = (ccb == poll_ccb) ? 1:0;
1796 if ((ccb->acb != acb) || (ccb->startdone != ARCMSR_CCB_START)) {
1797 if ((ccb->startdone == ARCMSR_CCB_ABORTED) || (ccb == poll_ccb)) {
1798 printk(KERN_NOTICE "arcmsr%d: scsi id = %d lun = %d ccb = '0x%p'"
1c57e86d
EC
1799 " poll command abort successfully \n"
1800 , acb->host->host_no
1801 , ccb->pcmd->device->id
1802 , ccb->pcmd->device->lun
1803 , ccb);
1804 ccb->pcmd->result = DID_ABORT << 16;
1805 arcmsr_ccb_complete(ccb, 1);
1806 poll_ccb_done = 1;
1807 continue;
1808 }
1a4f550a
NC
1809 printk(KERN_NOTICE "arcmsr%d: polling get an illegal ccb"
1810 " command done ccb = '0x%p'"
a1f6e021 1811 "ccboutstandingcount = %d \n"
1c57e86d
EC
1812 , acb->host->host_no
1813 , ccb
1814 , atomic_read(&acb->ccboutstandingcount));
1815 continue;
1816 }
1a4f550a
NC
1817 arcmsr_report_ccb_state(acb, ccb, flag_ccb);
1818 }
1819}
1820
1821static void arcmsr_polling_hbb_ccbdone(struct AdapterControlBlock *acb, \
1822 struct CommandControlBlock *poll_ccb)
1823{
1824 struct MessageUnit_B *reg = (struct MessageUnit_B *)acb->pmu;
1825 struct CommandControlBlock *ccb;
1826 uint32_t flag_ccb, poll_ccb_done = 0, poll_count = 0;
1827 int index;
1828
1829 polling_hbb_ccb_retry:
1830 poll_count++;
1831 /* clear doorbell interrupt */
1832 writel(ARCMSR_DOORBELL_INT_CLEAR_PATTERN, reg->iop2drv_doorbell_reg);
1833 while (1) {
1834 index = reg->doneq_index;
1835 if ((flag_ccb = readl(&reg->done_qbuffer[index])) == 0) {
1836 if (poll_ccb_done)
1837 break;
1838 else {
1839 msleep(25);
1840 if (poll_count > 100)
1841 break;
1842 goto polling_hbb_ccb_retry;
1c57e86d 1843 }
1a4f550a
NC
1844 }
1845 writel(0, &reg->done_qbuffer[index]);
1846 index++;
1847 /*if last index number set it to 0 */
1848 index %= ARCMSR_MAX_HBB_POSTQUEUE;
1849 reg->doneq_index = index;
1850 /* check ifcommand done with no error*/
1851 ccb = (struct CommandControlBlock *)\
1852 (acb->vir2phy_offset + (flag_ccb << 5));/*frame must be 32 bytes aligned*/
1853 poll_ccb_done = (ccb == poll_ccb) ? 1:0;
1854 if ((ccb->acb != acb) || (ccb->startdone != ARCMSR_CCB_START)) {
1855 if (ccb->startdone == ARCMSR_CCB_ABORTED) {
1856 printk(KERN_NOTICE "arcmsr%d: \
1857 scsi id = %d lun = %d ccb = '0x%p' poll command abort successfully \n"
1858 ,acb->host->host_no
1859 ,ccb->pcmd->device->id
1860 ,ccb->pcmd->device->lun
1861 ,ccb);
1862 ccb->pcmd->result = DID_ABORT << 16;
1c57e86d 1863 arcmsr_ccb_complete(ccb, 1);
1a4f550a 1864 continue;
1c57e86d 1865 }
1a4f550a
NC
1866 printk(KERN_NOTICE "arcmsr%d: polling get an illegal ccb"
1867 " command done ccb = '0x%p'"
1868 "ccboutstandingcount = %d \n"
1c57e86d 1869 , acb->host->host_no
1a4f550a
NC
1870 , ccb
1871 , atomic_read(&acb->ccboutstandingcount));
1872 continue;
1c57e86d 1873 }
1a4f550a
NC
1874 arcmsr_report_ccb_state(acb, ccb, flag_ccb);
1875 } /*drain reply FIFO*/
1876}
1877
1878static void arcmsr_polling_ccbdone(struct AdapterControlBlock *acb, \
1879 struct CommandControlBlock *poll_ccb)
1880{
1881 switch (acb->adapter_type) {
1882
1883 case ACB_ADAPTER_TYPE_A: {
1884 arcmsr_polling_hba_ccbdone(acb,poll_ccb);
1885 }
1886 break;
1887
1888 case ACB_ADAPTER_TYPE_B: {
1889 arcmsr_polling_hbb_ccbdone(acb,poll_ccb);
1c57e86d
EC
1890 }
1891 }
1892}
1a4f550a
NC
1893
1894static int arcmsr_iop_confirm(struct AdapterControlBlock *acb)
a1f6e021 1895{
1a4f550a
NC
1896 uint32_t cdb_phyaddr, ccb_phyaddr_hi32;
1897 dma_addr_t dma_coherent_handle;
1898 /*
1899 ********************************************************************
1900 ** here we need to tell iop 331 our freeccb.HighPart
1901 ** if freeccb.HighPart is not zero
1902 ********************************************************************
1903 */
1904 dma_coherent_handle = acb->dma_coherent_handle;
1905 cdb_phyaddr = (uint32_t)(dma_coherent_handle);
1906 ccb_phyaddr_hi32 = (uint32_t)((cdb_phyaddr >> 16) >> 16);
1907 /*
1908 ***********************************************************************
1909 ** if adapter type B, set window of "post command Q"
1910 ***********************************************************************
1911 */
1912 switch (acb->adapter_type) {
1913
1914 case ACB_ADAPTER_TYPE_A: {
1915 if (ccb_phyaddr_hi32 != 0) {
1916 struct MessageUnit_A __iomem *reg = \
1917 (struct MessageUnit_A *)acb->pmu;
1918 uint32_t intmask_org;
1919 intmask_org = arcmsr_disable_outbound_ints(acb);
1920 writel(ARCMSR_SIGNATURE_SET_CONFIG, \
1921 &reg->message_rwbuffer[0]);
1922 writel(ccb_phyaddr_hi32, &reg->message_rwbuffer[1]);
1923 writel(ARCMSR_INBOUND_MESG0_SET_CONFIG, \
1924 &reg->inbound_msgaddr0);
1925 if (arcmsr_hba_wait_msgint_ready(acb)) {
1926 printk(KERN_NOTICE "arcmsr%d: ""set ccb high \
1927 part physical address timeout\n",
1928 acb->host->host_no);
1929 return 1;
a1f6e021 1930 }
1a4f550a
NC
1931 arcmsr_enable_outbound_ints(acb, intmask_org);
1932 }
1933 }
1934 break;
a1f6e021 1935
1a4f550a
NC
1936 case ACB_ADAPTER_TYPE_B: {
1937 unsigned long post_queue_phyaddr;
1938 uint32_t *rwbuffer;
a1f6e021 1939
1a4f550a
NC
1940 struct MessageUnit_B *reg = (struct MessageUnit_B *)acb->pmu;
1941 uint32_t intmask_org;
1942 intmask_org = arcmsr_disable_outbound_ints(acb);
1943 reg->postq_index = 0;
1944 reg->doneq_index = 0;
1945 writel(ARCMSR_MESSAGE_SET_POST_WINDOW, reg->drv2iop_doorbell_reg);
1946 if (arcmsr_hbb_wait_msgint_ready(acb)) {
1947 printk(KERN_NOTICE "arcmsr%d:can not set diver mode\n", \
1948 acb->host->host_no);
1949 return 1;
1950 }
1951 post_queue_phyaddr = cdb_phyaddr + ARCMSR_MAX_FREECCB_NUM * \
1952 sizeof(struct CommandControlBlock) + offsetof(struct MessageUnit_B, post_qbuffer) ;
1953 rwbuffer = reg->msgcode_rwbuffer_reg;
1954 /* driver "set config" signature */
1955 writel(ARCMSR_SIGNATURE_SET_CONFIG, rwbuffer++);
1956 /* normal should be zero */
1957 writel(ccb_phyaddr_hi32, rwbuffer++);
1958 /* postQ size (256 + 8)*4 */
1959 writel(post_queue_phyaddr, rwbuffer++);
1960 /* doneQ size (256 + 8)*4 */
1961 writel(post_queue_phyaddr + 1056, rwbuffer++);
1962 /* ccb maxQ size must be --> [(256 + 8)*4]*/
1963 writel(1056, rwbuffer);
1964
1965 writel(ARCMSR_MESSAGE_SET_CONFIG, reg->drv2iop_doorbell_reg);
1966 if (arcmsr_hbb_wait_msgint_ready(acb)) {
1967 printk(KERN_NOTICE "arcmsr%d: 'set command Q window' \
1968 timeout \n",acb->host->host_no);
1969 return 1;
1970 }
a1f6e021 1971
1a4f550a
NC
1972 writel(ARCMSR_MESSAGE_START_DRIVER_MODE, reg->drv2iop_doorbell_reg);
1973 if (arcmsr_hbb_wait_msgint_ready(acb)) {
1974 printk(KERN_NOTICE "arcmsr%d: 'can not set diver mode \n"\
1975 ,acb->host->host_no);
1976 return 1;
1977 }
1978 arcmsr_enable_outbound_ints(acb, intmask_org);
1979 }
1980 break;
1981 }
1982 return 0;
1983}
a1f6e021 1984
1a4f550a
NC
1985static void arcmsr_wait_firmware_ready(struct AdapterControlBlock *acb)
1986{
1987 uint32_t firmware_state = 0;
a1f6e021 1988
1a4f550a
NC
1989 switch (acb->adapter_type) {
1990
1991 case ACB_ADAPTER_TYPE_A: {
1992 struct MessageUnit_A __iomem *reg = (struct MessageUnit_A *)acb->pmu;
1993 do {
1994 firmware_state = readl(&reg->outbound_msgaddr1);
1995 } while ((firmware_state & ARCMSR_OUTBOUND_MESG1_FIRMWARE_OK) == 0);
1996 }
1997 break;
1998
1999 case ACB_ADAPTER_TYPE_B: {
2000 struct MessageUnit_B *reg = (struct MessageUnit_B *)acb->pmu;
2001 do {
2002 firmware_state = readl(reg->iop2drv_doorbell_reg);
2003 } while ((firmware_state & ARCMSR_MESSAGE_FIRMWARE_OK) == 0);
2004 }
2005 break;
a1f6e021 2006 }
1a4f550a
NC
2007}
2008
2009static void arcmsr_start_hba_bgrb(struct AdapterControlBlock *acb)
2010{
2011 struct MessageUnit_A __iomem *reg = (struct MessageUnit_A *)acb->pmu;
2012 acb->acb_flags |= ACB_F_MSG_START_BGRB;
2013 writel(ARCMSR_INBOUND_MESG0_START_BGRB, &reg->inbound_msgaddr0);
2014 if (arcmsr_hba_wait_msgint_ready(acb)) {
2015 printk(KERN_NOTICE "arcmsr%d: wait 'start adapter background \
2016 rebulid' timeout \n", acb->host->host_no);
a1f6e021 2017 }
a1f6e021 2018}
2019
1a4f550a
NC
2020static void arcmsr_start_hbb_bgrb(struct AdapterControlBlock *acb)
2021{
2022 struct MessageUnit_B *reg = (struct MessageUnit_B *)acb->pmu;
2023 acb->acb_flags |= ACB_F_MSG_START_BGRB;
2024 writel(ARCMSR_MESSAGE_START_BGRB, reg->drv2iop_doorbell_reg);
2025 if (arcmsr_hbb_wait_msgint_ready(acb)) {
2026 printk(KERN_NOTICE "arcmsr%d: wait 'start adapter background \
2027 rebulid' timeout \n",acb->host->host_no);
2028 }
2029}
1c57e86d 2030
1a4f550a 2031static void arcmsr_start_adapter_bgrb(struct AdapterControlBlock *acb)
1c57e86d 2032{
1a4f550a
NC
2033 switch (acb->adapter_type) {
2034 case ACB_ADAPTER_TYPE_A:
2035 arcmsr_start_hba_bgrb(acb);
2036 break;
2037 case ACB_ADAPTER_TYPE_B:
2038 arcmsr_start_hbb_bgrb(acb);
2039 break;
2040 }
2041}
1c57e86d 2042
1a4f550a
NC
2043static void arcmsr_clear_doorbell_queue_buffer(struct AdapterControlBlock *acb)
2044{
2045 switch (acb->adapter_type) {
2046 case ACB_ADAPTER_TYPE_A: {
2047 struct MessageUnit_A *reg = (struct MessageUnit_A *)acb->pmu;
2048 uint32_t outbound_doorbell;
2049 /* empty doorbell Qbuffer if door bell ringed */
2050 outbound_doorbell = readl(&reg->outbound_doorbell);
2051 /*clear doorbell interrupt */
2052 writel(outbound_doorbell, &reg->outbound_doorbell);
2053 writel(ARCMSR_INBOUND_DRIVER_DATA_READ_OK, &reg->inbound_doorbell);
2054 }
2055 break;
1c57e86d 2056
1a4f550a
NC
2057 case ACB_ADAPTER_TYPE_B: {
2058 struct MessageUnit_B *reg = (struct MessageUnit_B *)acb->pmu;
2059 /*clear interrupt and message state*/
2060 writel(ARCMSR_MESSAGE_INT_CLEAR_PATTERN, reg->iop2drv_doorbell_reg);
2061 writel(ARCMSR_DRV2IOP_DATA_READ_OK, reg->drv2iop_doorbell_reg);
2062 /* let IOP know data has been read */
2063 }
2064 break;
1c57e86d 2065 }
1a4f550a 2066}
1c57e86d 2067
1a4f550a
NC
2068static void arcmsr_iop_init(struct AdapterControlBlock *acb)
2069{
2070 uint32_t intmask_org;
2071
2072 arcmsr_wait_firmware_ready(acb);
2073 arcmsr_iop_confirm(acb);
2074 /* disable all outbound interrupt */
2075 intmask_org = arcmsr_disable_outbound_ints(acb);
2076 arcmsr_get_firmware_spec(acb);
2077 /*start background rebuild*/
2078 arcmsr_start_adapter_bgrb(acb);
2079 /* empty doorbell Qbuffer if door bell ringed */
2080 arcmsr_clear_doorbell_queue_buffer(acb);
2081 /* enable outbound Post Queue,outbound doorbell Interrupt */
2082 arcmsr_enable_outbound_ints(acb, intmask_org);
1c57e86d
EC
2083 acb->acb_flags |= ACB_F_IOP_INITED;
2084}
2085
2086static void arcmsr_iop_reset(struct AdapterControlBlock *acb)
2087{
1c57e86d
EC
2088 struct CommandControlBlock *ccb;
2089 uint32_t intmask_org;
2090 int i = 0;
2091
2092 if (atomic_read(&acb->ccboutstandingcount) != 0) {
2093 /* talk to iop 331 outstanding command aborted */
2094 arcmsr_abort_allcmd(acb);
24430458 2095
1c57e86d 2096 /* wait for 3 sec for all command aborted*/
1a4f550a 2097 ssleep(3);
24430458 2098
1c57e86d
EC
2099 /* disable all outbound interrupt */
2100 intmask_org = arcmsr_disable_outbound_ints(acb);
2101 /* clear all outbound posted Q */
1a4f550a 2102 arcmsr_done4abort_postqueue(acb);
1c57e86d
EC
2103 for (i = 0; i < ARCMSR_MAX_FREECCB_NUM; i++) {
2104 ccb = acb->pccb_pool[i];
a1f6e021 2105 if (ccb->startdone == ARCMSR_CCB_START) {
1c57e86d 2106 ccb->startdone = ARCMSR_CCB_ABORTED;
1a4f550a 2107 arcmsr_ccb_complete(ccb, 1);
1c57e86d
EC
2108 }
2109 }
2110 /* enable all outbound interrupt */
2111 arcmsr_enable_outbound_ints(acb, intmask_org);
2112 }
1c57e86d
EC
2113}
2114
2115static int arcmsr_bus_reset(struct scsi_cmnd *cmd)
2116{
2117 struct AdapterControlBlock *acb =
2118 (struct AdapterControlBlock *)cmd->device->host->hostdata;
2119 int i;
2120
2121 acb->num_resets++;
2122 acb->acb_flags |= ACB_F_BUS_RESET;
2123 for (i = 0; i < 400; i++) {
2124 if (!atomic_read(&acb->ccboutstandingcount))
2125 break;
1a4f550a 2126 arcmsr_interrupt(acb);/* FIXME: need spinlock */
1c57e86d
EC
2127 msleep(25);
2128 }
2129 arcmsr_iop_reset(acb);
2130 acb->acb_flags &= ~ACB_F_BUS_RESET;
2131 return SUCCESS;
2132}
2133
2134static void arcmsr_abort_one_cmd(struct AdapterControlBlock *acb,
2135 struct CommandControlBlock *ccb)
2136{
2137 u32 intmask;
2138
2139 ccb->startdone = ARCMSR_CCB_ABORTED;
2140
2141 /*
2142 ** Wait for 3 sec for all command done.
2143 */
1a4f550a 2144 ssleep(3);
1c57e86d
EC
2145
2146 intmask = arcmsr_disable_outbound_ints(acb);
2147 arcmsr_polling_ccbdone(acb, ccb);
2148 arcmsr_enable_outbound_ints(acb, intmask);
2149}
2150
2151static int arcmsr_abort(struct scsi_cmnd *cmd)
2152{
2153 struct AdapterControlBlock *acb =
2154 (struct AdapterControlBlock *)cmd->device->host->hostdata;
2155 int i = 0;
2156
2157 printk(KERN_NOTICE
a1f6e021 2158 "arcmsr%d: abort device command of scsi id = %d lun = %d \n",
1c57e86d
EC
2159 acb->host->host_no, cmd->device->id, cmd->device->lun);
2160 acb->num_aborts++;
1c57e86d
EC
2161 /*
2162 ************************************************
2163 ** the all interrupt service routine is locked
2164 ** we need to handle it as soon as possible and exit
2165 ************************************************
2166 */
2167 if (!atomic_read(&acb->ccboutstandingcount))
2168 return SUCCESS;
2169
2170 for (i = 0; i < ARCMSR_MAX_FREECCB_NUM; i++) {
2171 struct CommandControlBlock *ccb = acb->pccb_pool[i];
2172 if (ccb->startdone == ARCMSR_CCB_START && ccb->pcmd == cmd) {
2173 arcmsr_abort_one_cmd(acb, ccb);
2174 break;
2175 }
2176 }
2177
2178 return SUCCESS;
2179}
2180
2181static const char *arcmsr_info(struct Scsi_Host *host)
2182{
2183 struct AdapterControlBlock *acb =
2184 (struct AdapterControlBlock *) host->hostdata;
2185 static char buf[256];
2186 char *type;
2187 int raid6 = 1;
2188
2189 switch (acb->pdev->device) {
2190 case PCI_DEVICE_ID_ARECA_1110:
1a4f550a
NC
2191 case PCI_DEVICE_ID_ARECA_1200:
2192 case PCI_DEVICE_ID_ARECA_1202:
1c57e86d
EC
2193 case PCI_DEVICE_ID_ARECA_1210:
2194 raid6 = 0;
2195 /*FALLTHRU*/
2196 case PCI_DEVICE_ID_ARECA_1120:
2197 case PCI_DEVICE_ID_ARECA_1130:
2198 case PCI_DEVICE_ID_ARECA_1160:
2199 case PCI_DEVICE_ID_ARECA_1170:
1a4f550a 2200 case PCI_DEVICE_ID_ARECA_1201:
1c57e86d
EC
2201 case PCI_DEVICE_ID_ARECA_1220:
2202 case PCI_DEVICE_ID_ARECA_1230:
2203 case PCI_DEVICE_ID_ARECA_1260:
2204 case PCI_DEVICE_ID_ARECA_1270:
2205 case PCI_DEVICE_ID_ARECA_1280:
2206 type = "SATA";
2207 break;
2208 case PCI_DEVICE_ID_ARECA_1380:
2209 case PCI_DEVICE_ID_ARECA_1381:
2210 case PCI_DEVICE_ID_ARECA_1680:
2211 case PCI_DEVICE_ID_ARECA_1681:
2212 type = "SAS";
2213 break;
2214 default:
2215 type = "X-TYPE";
2216 break;
2217 }
a1f6e021 2218 sprintf(buf, "Areca %s Host Adapter RAID Controller%s\n %s",
1c57e86d
EC
2219 type, raid6 ? "( RAID6 capable)" : "",
2220 ARCMSR_DRIVER_VERSION);
2221 return buf;
2222}
1a4f550a 2223#ifdef CONFIG_SCSI_ARCMSR_AER
a1f6e021 2224static pci_ers_result_t arcmsr_pci_slot_reset(struct pci_dev *pdev)
2225{
1a4f550a
NC
2226 struct Scsi_Host *host = pci_get_drvdata(pdev);
2227 struct AdapterControlBlock *acb =
2228 (struct AdapterControlBlock *) host->hostdata;
2229 uint32_t intmask_org;
2230 int i, j;
a1f6e021 2231
1a4f550a 2232 if (pci_enable_device(pdev)) {
a1f6e021 2233 return PCI_ERS_RESULT_DISCONNECT;
2234 }
1a4f550a
NC
2235 pci_set_master(pdev);
2236 intmask_org = arcmsr_disable_outbound_ints(acb);
a1f6e021 2237 acb->acb_flags |= (ACB_F_MESSAGE_WQBUFFER_CLEARED |
2238 ACB_F_MESSAGE_RQBUFFER_CLEARED |
2239 ACB_F_MESSAGE_WQBUFFER_READED);
2240 acb->acb_flags &= ~ACB_F_SCSISTOPADAPTER;
1a4f550a
NC
2241 for (i = 0; i < ARCMSR_MAX_TARGETID; i++)
2242 for (j = 0; j < ARCMSR_MAX_TARGETLUN; j++)
2243 acb->devstate[i][j] = ARECA_RAID_GONE;
a1f6e021 2244
1a4f550a
NC
2245 arcmsr_wait_firmware_ready(acb);
2246 arcmsr_iop_confirm(acb);
2247 /* disable all outbound interrupt */
2248 arcmsr_get_firmware_spec(acb);
2249 /*start background rebuild*/
2250 arcmsr_start_adapter_bgrb(acb);
2251 /* empty doorbell Qbuffer if door bell ringed */
2252 arcmsr_clear_doorbell_queue_buffer(acb);
2253 /* enable outbound Post Queue,outbound doorbell Interrupt */
2254 arcmsr_enable_outbound_ints(acb, intmask_org);
2255 acb->acb_flags |= ACB_F_IOP_INITED;
a1f6e021 2256
1a4f550a 2257 pci_enable_pcie_error_reporting(pdev);
a1f6e021 2258 return PCI_ERS_RESULT_RECOVERED;
2259}
2260
2261static void arcmsr_pci_ers_need_reset_forepart(struct pci_dev *pdev)
2262{
2263 struct Scsi_Host *host = pci_get_drvdata(pdev);
1a4f550a 2264 struct AdapterControlBlock *acb = (struct AdapterControlBlock *)host->hostdata;
a1f6e021 2265 struct CommandControlBlock *ccb;
1a4f550a
NC
2266 uint32_t intmask_org;
2267 int i = 0;
a1f6e021 2268
1a4f550a
NC
2269 if (atomic_read(&acb->ccboutstandingcount) != 0) {
2270 /* talk to iop 331 outstanding command aborted */
2271 arcmsr_abort_allcmd(acb);
2272 /* wait for 3 sec for all command aborted*/
2273 ssleep(3);
2274 /* disable all outbound interrupt */
2275 intmask_org = arcmsr_disable_outbound_ints(acb);
2276 /* clear all outbound posted Q */
2277 arcmsr_done4abort_postqueue(acb);
2278 for (i = 0; i < ARCMSR_MAX_FREECCB_NUM; i++) {
2279 ccb = acb->pccb_pool[i];
2280 if (ccb->startdone == ARCMSR_CCB_START) {
2281 ccb->startdone = ARCMSR_CCB_ABORTED;
2282 arcmsr_ccb_complete(ccb, 1);
a1f6e021 2283 }
2284 }
1a4f550a
NC
2285 /* enable all outbound interrupt */
2286 arcmsr_enable_outbound_ints(acb, intmask_org);
2287 }
2288 pci_disable_device(pdev);
a1f6e021 2289}
2290
a1f6e021 2291static void arcmsr_pci_ers_disconnect_forepart(struct pci_dev *pdev)
2292{
1a4f550a
NC
2293 struct Scsi_Host *host = pci_get_drvdata(pdev);
2294 struct AdapterControlBlock *acb = \
2295 (struct AdapterControlBlock *)host->hostdata;
a1f6e021 2296
1a4f550a
NC
2297 arcmsr_stop_adapter_bgrb(acb);
2298 arcmsr_flush_adapter_cache(acb);
a1f6e021 2299}
2300
2301static pci_ers_result_t arcmsr_pci_error_detected(struct pci_dev *pdev,
2302 pci_channel_state_t state)
2303{
2304 switch (state) {
2305 case pci_channel_io_frozen:
2306 arcmsr_pci_ers_need_reset_forepart(pdev);
2307 return PCI_ERS_RESULT_NEED_RESET;
2308 case pci_channel_io_perm_failure:
2309 arcmsr_pci_ers_disconnect_forepart(pdev);
2310 return PCI_ERS_RESULT_DISCONNECT;
2311 break;
2312 default:
2313 return PCI_ERS_RESULT_NEED_RESET;
1a4f550a 2314 }
a1f6e021 2315}
1a4f550a 2316#endif