[linux-2.6-block.git] / drivers / scsi / a3000.h

/* SPDX-License-Identifier: GPL-2.0 */
#ifndef A3000_H
#define A3000_H

/* $Id: a3000.h,v 1.4 1997/01/19 23:07:10 davem Exp $
 *
 * Header file for the Amiga 3000 built-in SCSI controller for Linux
 *
 * Written and (C) 1993, Hamish Macdonald, see a3000.c for more info
 *
 */

#include <linux/types.h>

#ifndef CMD_PER_LUN
#define CMD_PER_LUN		2
#endif

#ifndef CAN_QUEUE
#define CAN_QUEUE		16
#endif

/*
 * if the transfer address ANDed with this results in a non-zero
 * result, then we can't use DMA.
 */
#define A3000_XFER_MASK		(0x00000003)

struct a3000_scsiregs {
		 unsigned char	pad1[2];
	volatile unsigned short	DAWR;
	volatile unsigned int	WTC;
		 unsigned char	pad2[2];
	volatile unsigned short	CNTR;
	volatile unsigned long	ACR;
		 unsigned char	pad3[2];
	volatile unsigned short	ST_DMA;
		 unsigned char	pad4[2];
	volatile unsigned short	FLUSH;
		 unsigned char	pad5[2];
	volatile unsigned short	CINT;
		 unsigned char	pad6[2];
	volatile unsigned short	ISTR;
		 unsigned char	pad7[30];
	volatile unsigned short	SP_DMA;
		 unsigned char	pad8;
	volatile unsigned char	SASR;
		 unsigned char	pad9;
	volatile unsigned char	SCMD;
};

#define DAWR_A3000		(3)

/* CNTR bits. */
#define CNTR_TCEN		(1<<5)
#define CNTR_PREST		(1<<4)
#define CNTR_PDMD		(1<<3)
#define CNTR_INTEN		(1<<2)
#define CNTR_DDIR		(1<<1)
#define CNTR_IO_DX		(1<<0)

/* ISTR bits. */
#define ISTR_INTX		(1<<8)
#define ISTR_INT_F		(1<<7)
#define ISTR_INTS		(1<<6)
#define ISTR_E_INT		(1<<5)
#define ISTR_INT_P		(1<<4)
#define ISTR_UE_INT		(1<<3)
#define ISTR_OE_INT		(1<<2)
#define ISTR_FF_FLG		(1<<1)
#define ISTR_FE_FLG		(1<<0)

#endif /* A3000_H */
Commit	Line	Data
b2441318	1	/* SPDX-License-Identifier: GPL-2.0 */
1da177e4 LT	2	#ifndef A3000_H
	3	#define A3000_H
	4
	5	/* $Id: a3000.h,v 1.4 1997/01/19 23:07:10 davem Exp $
	6	*
	7	* Header file for the Amiga 3000 built-in SCSI controller for Linux
	8	*
	9	* Written and (C) 1993, Hamish Macdonald, see a3000.c for more info
	10	*
	11	*/
	12
	13	#include <linux/types.h>
	14
1da177e4	15	#ifndef CMD_PER_LUN
21351013	16	#define CMD_PER_LUN 2
1da177e4 LT	17	#endif
	18
	19	#ifndef CAN_QUEUE
21351013	20	#define CAN_QUEUE 16
1da177e4 LT	21	#endif
	22
	23	/*
	24	* if the transfer address ANDed with this results in a non-zero
	25	* result, then we can't use DMA.
	26	*/
21351013	27	#define A3000_XFER_MASK (0x00000003)
1da177e4	28
c57c1cab	29	struct a3000_scsiregs {
21351013 GU	30	unsigned char pad1[2];
	31	volatile unsigned short DAWR;
	32	volatile unsigned int WTC;
	33	unsigned char pad2[2];
	34	volatile unsigned short CNTR;
	35	volatile unsigned long ACR;
	36	unsigned char pad3[2];
	37	volatile unsigned short ST_DMA;
	38	unsigned char pad4[2];
	39	volatile unsigned short FLUSH;
	40	unsigned char pad5[2];
	41	volatile unsigned short CINT;
	42	unsigned char pad6[2];
	43	volatile unsigned short ISTR;
	44	unsigned char pad7[30];
	45	volatile unsigned short SP_DMA;
	46	unsigned char pad8;
	47	volatile unsigned char SASR;
	48	unsigned char pad9;
	49	volatile unsigned char SCMD;
c57c1cab	50	};
1da177e4 LT	51
	52	#define DAWR_A3000 (3)
	53
	54	/* CNTR bits. */
	55	#define CNTR_TCEN (1<<5)
	56	#define CNTR_PREST (1<<4)
	57	#define CNTR_PDMD (1<<3)
	58	#define CNTR_INTEN (1<<2)
	59	#define CNTR_DDIR (1<<1)
	60	#define CNTR_IO_DX (1<<0)
	61
	62	/* ISTR bits. */
	63	#define ISTR_INTX (1<<8)
	64	#define ISTR_INT_F (1<<7)
	65	#define ISTR_INTS (1<<6)
	66	#define ISTR_E_INT (1<<5)
	67	#define ISTR_INT_P (1<<4)
	68	#define ISTR_UE_INT (1<<3)
	69	#define ISTR_OE_INT (1<<2)
	70	#define ISTR_FF_FLG (1<<1)
	71	#define ISTR_FE_FLG (1<<0)
	72
	73	#endif /* A3000_H */