rtc: pcf8523: don't return invalid date when battery is low
[linux-2.6-block.git] / drivers / remoteproc / da8xx_remoteproc.c
CommitLineData
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1/*
2 * Remote processor machine-specific module for DA8XX
3 *
4 * Copyright (C) 2013 Texas Instruments, Inc.
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * version 2 as published by the Free Software Foundation.
9 */
10
11#include <linux/bitops.h>
12#include <linux/clk.h>
b2201ee5 13#include <linux/reset.h>
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14#include <linux/err.h>
15#include <linux/interrupt.h>
16#include <linux/io.h>
17#include <linux/irq.h>
18#include <linux/kernel.h>
19#include <linux/module.h>
61696580 20#include <linux/of_reserved_mem.h>
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21#include <linux/platform_device.h>
22#include <linux/remoteproc.h>
23
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24#include "remoteproc_internal.h"
25
26static char *da8xx_fw_name;
24ff1417 27module_param(da8xx_fw_name, charp, 0444);
13be5432 28MODULE_PARM_DESC(da8xx_fw_name,
e17aee37 29 "Name of DSP firmware file in /lib/firmware (if not specified defaults to 'rproc-dsp-fw')");
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30
31/*
32 * OMAP-L138 Technical References:
33 * http://www.ti.com/product/omap-l138
34 */
35#define SYSCFG_CHIPSIG0 BIT(0)
36#define SYSCFG_CHIPSIG1 BIT(1)
37#define SYSCFG_CHIPSIG2 BIT(2)
38#define SYSCFG_CHIPSIG3 BIT(3)
39#define SYSCFG_CHIPSIG4 BIT(4)
40
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41#define DA8XX_RPROC_LOCAL_ADDRESS_MASK (SZ_16M - 1)
42
43/**
44 * struct da8xx_rproc_mem - internal memory structure
45 * @cpu_addr: MPU virtual address of the memory region
46 * @bus_addr: Bus address used to access the memory region
47 * @dev_addr: Device address of the memory region from DSP view
48 * @size: Size of the memory region
49 */
50struct da8xx_rproc_mem {
51 void __iomem *cpu_addr;
52 phys_addr_t bus_addr;
53 u32 dev_addr;
54 size_t size;
55};
56
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57/**
58 * struct da8xx_rproc - da8xx remote processor instance state
59 * @rproc: rproc handle
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60 * @mem: internal memory regions data
61 * @num_mems: number of internal memory regions
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62 * @dsp_clk: placeholder for platform's DSP clk
63 * @ack_fxn: chip-specific ack function for ack'ing irq
64 * @irq_data: ack_fxn function parameter
65 * @chipsig: virt ptr to DSP interrupt registers (CHIPSIG & CHIPSIG_CLR)
66 * @bootreg: virt ptr to DSP boot address register (HOST1CFG)
67 * @irq: irq # used by this instance
68 */
69struct da8xx_rproc {
70 struct rproc *rproc;
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71 struct da8xx_rproc_mem *mem;
72 int num_mems;
13be5432 73 struct clk *dsp_clk;
b2201ee5 74 struct reset_control *dsp_reset;
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75 void (*ack_fxn)(struct irq_data *data);
76 struct irq_data *irq_data;
77 void __iomem *chipsig;
78 void __iomem *bootreg;
79 int irq;
80};
81
82/**
83 * handle_event() - inbound virtqueue message workqueue function
84 *
85 * This function is registered as a kernel thread and is scheduled by the
86 * kernel handler.
87 */
88static irqreturn_t handle_event(int irq, void *p)
89{
90 struct rproc *rproc = (struct rproc *)p;
91
92 /* Process incoming buffers on all our vrings */
93 rproc_vq_interrupt(rproc, 0);
94 rproc_vq_interrupt(rproc, 1);
95
96 return IRQ_HANDLED;
97}
98
99/**
100 * da8xx_rproc_callback() - inbound virtqueue message handler
101 *
102 * This handler is invoked directly by the kernel whenever the remote
103 * core (DSP) has modified the state of a virtqueue. There is no
104 * "payload" message indicating the virtqueue index as is the case with
105 * mailbox-based implementations on OMAP4. As such, this handler "polls"
106 * each known virtqueue index for every invocation.
107 */
108static irqreturn_t da8xx_rproc_callback(int irq, void *p)
109{
110 struct rproc *rproc = (struct rproc *)p;
111 struct da8xx_rproc *drproc = (struct da8xx_rproc *)rproc->priv;
112 u32 chipsig;
113
114 chipsig = readl(drproc->chipsig);
115 if (chipsig & SYSCFG_CHIPSIG0) {
116 /* Clear interrupt level source */
117 writel(SYSCFG_CHIPSIG0, drproc->chipsig + 4);
118
119 /*
120 * ACK intr to AINTC.
121 *
122 * It has already been ack'ed by the kernel before calling
123 * this function, but since the ARM<->DSP interrupts in the
124 * CHIPSIG register are "level" instead of "pulse" variety,
125 * we need to ack it after taking down the level else we'll
126 * be called again immediately after returning.
127 */
128 drproc->ack_fxn(drproc->irq_data);
129
130 return IRQ_WAKE_THREAD;
131 }
132
133 return IRQ_HANDLED;
134}
135
136static int da8xx_rproc_start(struct rproc *rproc)
137{
138 struct device *dev = rproc->dev.parent;
139 struct da8xx_rproc *drproc = (struct da8xx_rproc *)rproc->priv;
140 struct clk *dsp_clk = drproc->dsp_clk;
b2201ee5 141 struct reset_control *dsp_reset = drproc->dsp_reset;
2310eae9 142 int ret;
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143
144 /* hw requires the start (boot) address be on 1KB boundary */
145 if (rproc->bootaddr & 0x3ff) {
146 dev_err(dev, "invalid boot address: must be aligned to 1KB\n");
147
148 return -EINVAL;
149 }
150
151 writel(rproc->bootaddr, drproc->bootreg);
152
5d26f068 153 ret = clk_prepare_enable(dsp_clk);
2310eae9 154 if (ret) {
5d26f068 155 dev_err(dev, "clk_prepare_enable() failed: %d\n", ret);
2310eae9
BG
156 return ret;
157 }
158
b2201ee5
BG
159 ret = reset_control_deassert(dsp_reset);
160 if (ret) {
161 dev_err(dev, "reset_control_deassert() failed: %d\n", ret);
162 clk_disable_unprepare(dsp_clk);
163 return ret;
164 }
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165
166 return 0;
167}
168
169static int da8xx_rproc_stop(struct rproc *rproc)
170{
171 struct da8xx_rproc *drproc = rproc->priv;
b2201ee5
BG
172 struct device *dev = rproc->dev.parent;
173 int ret;
174
175 ret = reset_control_assert(drproc->dsp_reset);
176 if (ret) {
177 dev_err(dev, "reset_control_assert() failed: %d\n", ret);
178 return ret;
179 }
13be5432 180
5d26f068 181 clk_disable_unprepare(drproc->dsp_clk);
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182
183 return 0;
184}
185
186/* kick a virtqueue */
187static void da8xx_rproc_kick(struct rproc *rproc, int vqid)
188{
189 struct da8xx_rproc *drproc = (struct da8xx_rproc *)rproc->priv;
190
56324d7a 191 /* Interrupt remote proc */
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192 writel(SYSCFG_CHIPSIG2, drproc->chipsig);
193}
194
c008fad2 195static const struct rproc_ops da8xx_rproc_ops = {
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196 .start = da8xx_rproc_start,
197 .stop = da8xx_rproc_stop,
198 .kick = da8xx_rproc_kick,
199};
200
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201static int da8xx_rproc_get_internal_memories(struct platform_device *pdev,
202 struct da8xx_rproc *drproc)
203{
204 static const char * const mem_names[] = {"l2sram", "l1pram", "l1dram"};
205 int num_mems = ARRAY_SIZE(mem_names);
206 struct device *dev = &pdev->dev;
207 struct resource *res;
208 int i;
209
210 drproc->mem = devm_kcalloc(dev, num_mems, sizeof(*drproc->mem),
211 GFP_KERNEL);
212 if (!drproc->mem)
213 return -ENOMEM;
214
215 for (i = 0; i < num_mems; i++) {
216 res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
217 mem_names[i]);
218 drproc->mem[i].cpu_addr = devm_ioremap_resource(dev, res);
219 if (IS_ERR(drproc->mem[i].cpu_addr)) {
220 dev_err(dev, "failed to parse and map %s memory\n",
221 mem_names[i]);
222 return PTR_ERR(drproc->mem[i].cpu_addr);
223 }
224 drproc->mem[i].bus_addr = res->start;
225 drproc->mem[i].dev_addr =
226 res->start & DA8XX_RPROC_LOCAL_ADDRESS_MASK;
227 drproc->mem[i].size = resource_size(res);
228
1e28dbbe 229 dev_dbg(dev, "memory %8s: bus addr %pa size 0x%zx va %p da 0x%x\n",
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230 mem_names[i], &drproc->mem[i].bus_addr,
231 drproc->mem[i].size, drproc->mem[i].cpu_addr,
232 drproc->mem[i].dev_addr);
233 }
234 drproc->num_mems = num_mems;
235
236 return 0;
237}
238
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239static int da8xx_rproc_probe(struct platform_device *pdev)
240{
241 struct device *dev = &pdev->dev;
242 struct da8xx_rproc *drproc;
243 struct rproc *rproc;
244 struct irq_data *irq_data;
245 struct resource *bootreg_res;
246 struct resource *chipsig_res;
247 struct clk *dsp_clk;
b2201ee5 248 struct reset_control *dsp_reset;
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249 void __iomem *chipsig;
250 void __iomem *bootreg;
251 int irq;
252 int ret;
253
254 irq = platform_get_irq(pdev, 0);
255 if (irq < 0) {
256 dev_err(dev, "platform_get_irq(pdev, 0) error: %d\n", irq);
257 return irq;
258 }
259
260 irq_data = irq_get_irq_data(irq);
261 if (!irq_data) {
262 dev_err(dev, "irq_get_irq_data(%d): NULL\n", irq);
263 return -EINVAL;
264 }
265
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266 bootreg_res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
267 "host1cfg");
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268 bootreg = devm_ioremap_resource(dev, bootreg_res);
269 if (IS_ERR(bootreg))
270 return PTR_ERR(bootreg);
271
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272 chipsig_res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
273 "chipsig");
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274 chipsig = devm_ioremap_resource(dev, chipsig_res);
275 if (IS_ERR(chipsig))
276 return PTR_ERR(chipsig);
277
278 dsp_clk = devm_clk_get(dev, NULL);
279 if (IS_ERR(dsp_clk)) {
280 dev_err(dev, "clk_get error: %ld\n", PTR_ERR(dsp_clk));
281
282 return PTR_ERR(dsp_clk);
283 }
284
b2201ee5
BG
285 dsp_reset = devm_reset_control_get_exclusive(dev, NULL);
286 if (IS_ERR(dsp_reset)) {
287 if (PTR_ERR(dsp_reset) != -EPROBE_DEFER)
288 dev_err(dev, "unable to get reset control: %ld\n",
289 PTR_ERR(dsp_reset));
290
291 return PTR_ERR(dsp_reset);
292 }
293
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294 if (dev->of_node) {
295 ret = of_reserved_mem_device_init(dev);
296 if (ret) {
297 dev_err(dev, "device does not have specific CMA pool: %d\n",
298 ret);
299 return ret;
300 }
301 }
302
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303 rproc = rproc_alloc(dev, "dsp", &da8xx_rproc_ops, da8xx_fw_name,
304 sizeof(*drproc));
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SA
305 if (!rproc) {
306 ret = -ENOMEM;
307 goto free_mem;
308 }
13be5432 309
491278b6
SA
310 /* error recovery is not supported at present */
311 rproc->recovery_disabled = true;
312
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313 drproc = rproc->priv;
314 drproc->rproc = rproc;
470ac62f 315 drproc->dsp_clk = dsp_clk;
b2201ee5 316 drproc->dsp_reset = dsp_reset;
315491e5 317 rproc->has_iommu = false;
13be5432 318
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SA
319 ret = da8xx_rproc_get_internal_memories(pdev, drproc);
320 if (ret)
321 goto free_rproc;
322
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323 platform_set_drvdata(pdev, rproc);
324
325 /* everything the ISR needs is now setup, so hook it up */
326 ret = devm_request_threaded_irq(dev, irq, da8xx_rproc_callback,
327 handle_event, 0, "da8xx-remoteproc",
328 rproc);
329 if (ret) {
330 dev_err(dev, "devm_request_threaded_irq error: %d\n", ret);
331 goto free_rproc;
332 }
333
334 /*
335 * rproc_add() can end up enabling the DSP's clk with the DSP
336 * *not* in reset, but da8xx_rproc_start() needs the DSP to be
337 * held in reset at the time it is called.
338 */
b2201ee5 339 ret = reset_control_assert(dsp_reset);
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340 if (ret)
341 goto free_rproc;
342
343 drproc->chipsig = chipsig;
344 drproc->bootreg = bootreg;
345 drproc->ack_fxn = irq_data->chip->irq_ack;
346 drproc->irq_data = irq_data;
347 drproc->irq = irq;
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348
349 ret = rproc_add(rproc);
350 if (ret) {
351 dev_err(dev, "rproc_add failed: %d\n", ret);
352 goto free_rproc;
353 }
354
355 return 0;
356
357free_rproc:
433c0e04 358 rproc_free(rproc);
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SA
359free_mem:
360 if (dev->of_node)
361 of_reserved_mem_device_release(dev);
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362 return ret;
363}
364
365static int da8xx_rproc_remove(struct platform_device *pdev)
366{
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367 struct rproc *rproc = platform_get_drvdata(pdev);
368 struct da8xx_rproc *drproc = (struct da8xx_rproc *)rproc->priv;
61696580 369 struct device *dev = &pdev->dev;
13be5432 370
13be5432
RT
371 /*
372 * The devm subsystem might end up releasing things before
373 * freeing the irq, thus allowing an interrupt to sneak in while
374 * the device is being removed. This should prevent that.
375 */
376 disable_irq(drproc->irq);
377
13be5432 378 rproc_del(rproc);
433c0e04 379 rproc_free(rproc);
61696580
SA
380 if (dev->of_node)
381 of_reserved_mem_device_release(dev);
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382
383 return 0;
384}
385
61696580
SA
386static const struct of_device_id davinci_rproc_of_match[] __maybe_unused = {
387 { .compatible = "ti,da850-dsp", },
388 { /* sentinel */ },
389};
390MODULE_DEVICE_TABLE(of, davinci_rproc_of_match);
391
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RT
392static struct platform_driver da8xx_rproc_driver = {
393 .probe = da8xx_rproc_probe,
394 .remove = da8xx_rproc_remove,
395 .driver = {
396 .name = "davinci-rproc",
61696580 397 .of_match_table = of_match_ptr(davinci_rproc_of_match),
13be5432
RT
398 },
399};
400
401module_platform_driver(da8xx_rproc_driver);
402
403MODULE_LICENSE("GPL v2");
404MODULE_DESCRIPTION("DA8XX Remote Processor control driver");