power_supply: max17040: Use system efficient workqueues
[linux-2.6-block.git] / drivers / power / max17042_battery.c
CommitLineData
359ab9f5
MH
1/*
2 * Fuel gauge driver for Maxim 17042 / 8966 / 8997
3 * Note that Maxim 8966 and 8997 are mfd and this is its subdevice.
4 *
5 * Copyright (C) 2011 Samsung Electronics
6 * MyungJoo Ham <myungjoo.ham@samsung.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21 *
22 * This driver is based on max17040_battery.c
23 */
24
25#include <linux/init.h>
7e6d62db 26#include <linux/module.h>
359ab9f5
MH
27#include <linux/slab.h>
28#include <linux/i2c.h>
f3a71a6e 29#include <linux/delay.h>
e5f3872d 30#include <linux/interrupt.h>
48bc1774 31#include <linux/pm.h>
359ab9f5
MH
32#include <linux/mod_devicetable.h>
33#include <linux/power_supply.h>
34#include <linux/power/max17042_battery.h>
3832246d 35#include <linux/of.h>
39e7213e 36#include <linux/regmap.h>
359ab9f5 37
f3a71a6e
RP
38/* Status register bits */
39#define STATUS_POR_BIT (1 << 1)
40#define STATUS_BST_BIT (1 << 3)
41#define STATUS_VMN_BIT (1 << 8)
42#define STATUS_TMN_BIT (1 << 9)
43#define STATUS_SMN_BIT (1 << 10)
44#define STATUS_BI_BIT (1 << 11)
45#define STATUS_VMX_BIT (1 << 12)
46#define STATUS_TMX_BIT (1 << 13)
47#define STATUS_SMX_BIT (1 << 14)
48#define STATUS_BR_BIT (1 << 15)
49
e5f3872d
RP
50/* Interrupt mask bits */
51#define CONFIG_ALRT_BIT_ENBL (1 << 2)
5cdd4d7f
RP
52#define STATUS_INTR_SOCMIN_BIT (1 << 10)
53#define STATUS_INTR_SOCMAX_BIT (1 << 14)
e5f3872d 54
f3a71a6e
RP
55#define VFSOC0_LOCK 0x0000
56#define VFSOC0_UNLOCK 0x0080
57#define MODEL_UNLOCK1 0X0059
58#define MODEL_UNLOCK2 0X00C4
59#define MODEL_LOCK1 0X0000
60#define MODEL_LOCK2 0X0000
61
62#define dQ_ACC_DIV 0x4
63#define dP_ACC_100 0x1900
64#define dP_ACC_200 0x3200
65
9a8422d2
RP
66#define MAX17042_IC_VERSION 0x0092
67#define MAX17047_IC_VERSION 0x00AC /* same for max17050 */
68
359ab9f5
MH
69struct max17042_chip {
70 struct i2c_client *client;
39e7213e 71 struct regmap *regmap;
359ab9f5 72 struct power_supply battery;
9a8422d2 73 enum max170xx_chip_type chip_type;
359ab9f5 74 struct max17042_platform_data *pdata;
f3a71a6e
RP
75 struct work_struct work;
76 int init_complete;
359ab9f5
MH
77};
78
359ab9f5 79static enum power_supply_property max17042_battery_props[] = {
086ef502
DK
80 POWER_SUPPLY_PROP_PRESENT,
81 POWER_SUPPLY_PROP_CYCLE_COUNT,
82 POWER_SUPPLY_PROP_VOLTAGE_MAX,
83 POWER_SUPPLY_PROP_VOLTAGE_MIN_DESIGN,
359ab9f5
MH
84 POWER_SUPPLY_PROP_VOLTAGE_NOW,
85 POWER_SUPPLY_PROP_VOLTAGE_AVG,
a2ebfe2f 86 POWER_SUPPLY_PROP_VOLTAGE_OCV,
359ab9f5 87 POWER_SUPPLY_PROP_CAPACITY,
086ef502 88 POWER_SUPPLY_PROP_CHARGE_FULL,
5fc55bc8 89 POWER_SUPPLY_PROP_CHARGE_COUNTER,
086ef502
DK
90 POWER_SUPPLY_PROP_TEMP,
91 POWER_SUPPLY_PROP_CURRENT_NOW,
92 POWER_SUPPLY_PROP_CURRENT_AVG,
359ab9f5
MH
93};
94
95static int max17042_get_property(struct power_supply *psy,
96 enum power_supply_property psp,
97 union power_supply_propval *val)
98{
99 struct max17042_chip *chip = container_of(psy,
100 struct max17042_chip, battery);
39e7213e 101 struct regmap *map = chip->regmap;
60a1f6e4 102 int ret;
39e7213e 103 u32 data;
359ab9f5 104
f3a71a6e
RP
105 if (!chip->init_complete)
106 return -EAGAIN;
107
359ab9f5 108 switch (psp) {
086ef502 109 case POWER_SUPPLY_PROP_PRESENT:
39e7213e 110 ret = regmap_read(map, MAX17042_STATUS, &data);
60a1f6e4
RP
111 if (ret < 0)
112 return ret;
113
39e7213e 114 if (data & MAX17042_STATUS_BattAbsent)
086ef502
DK
115 val->intval = 0;
116 else
117 val->intval = 1;
118 break;
119 case POWER_SUPPLY_PROP_CYCLE_COUNT:
39e7213e 120 ret = regmap_read(map, MAX17042_Cycles, &data);
60a1f6e4
RP
121 if (ret < 0)
122 return ret;
123
39e7213e 124 val->intval = data;
086ef502
DK
125 break;
126 case POWER_SUPPLY_PROP_VOLTAGE_MAX:
39e7213e 127 ret = regmap_read(map, MAX17042_MinMaxVolt, &data);
60a1f6e4
RP
128 if (ret < 0)
129 return ret;
130
39e7213e 131 val->intval = data >> 8;
086ef502
DK
132 val->intval *= 20000; /* Units of LSB = 20mV */
133 break;
134 case POWER_SUPPLY_PROP_VOLTAGE_MIN_DESIGN:
9a8422d2 135 if (chip->chip_type == MAX17042)
39e7213e 136 ret = regmap_read(map, MAX17042_V_empty, &data);
9a8422d2 137 else
39e7213e 138 ret = regmap_read(map, MAX17047_V_empty, &data);
60a1f6e4
RP
139 if (ret < 0)
140 return ret;
141
39e7213e 142 val->intval = data >> 7;
086ef502
DK
143 val->intval *= 10000; /* Units of LSB = 10mV */
144 break;
359ab9f5 145 case POWER_SUPPLY_PROP_VOLTAGE_NOW:
39e7213e 146 ret = regmap_read(map, MAX17042_VCELL, &data);
60a1f6e4
RP
147 if (ret < 0)
148 return ret;
149
39e7213e 150 val->intval = data * 625 / 8;
359ab9f5
MH
151 break;
152 case POWER_SUPPLY_PROP_VOLTAGE_AVG:
39e7213e 153 ret = regmap_read(map, MAX17042_AvgVCELL, &data);
60a1f6e4
RP
154 if (ret < 0)
155 return ret;
156
39e7213e 157 val->intval = data * 625 / 8;
a2ebfe2f
RP
158 break;
159 case POWER_SUPPLY_PROP_VOLTAGE_OCV:
39e7213e 160 ret = regmap_read(map, MAX17042_OCVInternal, &data);
a2ebfe2f
RP
161 if (ret < 0)
162 return ret;
163
39e7213e 164 val->intval = data * 625 / 8;
359ab9f5
MH
165 break;
166 case POWER_SUPPLY_PROP_CAPACITY:
39e7213e 167 ret = regmap_read(map, MAX17042_RepSOC, &data);
60a1f6e4
RP
168 if (ret < 0)
169 return ret;
170
39e7213e 171 val->intval = data >> 8;
359ab9f5 172 break;
086ef502 173 case POWER_SUPPLY_PROP_CHARGE_FULL:
39e7213e 174 ret = regmap_read(map, MAX17042_FullCAP, &data);
60a1f6e4
RP
175 if (ret < 0)
176 return ret;
177
39e7213e 178 val->intval = data * 1000 / 2;
5fc55bc8
RP
179 break;
180 case POWER_SUPPLY_PROP_CHARGE_COUNTER:
39e7213e 181 ret = regmap_read(map, MAX17042_QH, &data);
5fc55bc8
RP
182 if (ret < 0)
183 return ret;
184
39e7213e 185 val->intval = data * 1000 / 2;
086ef502
DK
186 break;
187 case POWER_SUPPLY_PROP_TEMP:
39e7213e 188 ret = regmap_read(map, MAX17042_TEMP, &data);
60a1f6e4
RP
189 if (ret < 0)
190 return ret;
191
39e7213e 192 val->intval = data;
086ef502
DK
193 /* The value is signed. */
194 if (val->intval & 0x8000) {
195 val->intval = (0x7fff & ~val->intval) + 1;
196 val->intval *= -1;
197 }
198 /* The value is converted into deci-centigrade scale */
199 /* Units of LSB = 1 / 256 degree Celsius */
200 val->intval = val->intval * 10 / 256;
201 break;
202 case POWER_SUPPLY_PROP_CURRENT_NOW:
203 if (chip->pdata->enable_current_sense) {
39e7213e 204 ret = regmap_read(map, MAX17042_Current, &data);
60a1f6e4
RP
205 if (ret < 0)
206 return ret;
207
39e7213e 208 val->intval = data;
086ef502
DK
209 if (val->intval & 0x8000) {
210 /* Negative */
211 val->intval = ~val->intval & 0x7fff;
212 val->intval++;
213 val->intval *= -1;
214 }
91d8b0d6 215 val->intval *= 1562500 / chip->pdata->r_sns;
086ef502
DK
216 } else {
217 return -EINVAL;
218 }
219 break;
220 case POWER_SUPPLY_PROP_CURRENT_AVG:
221 if (chip->pdata->enable_current_sense) {
39e7213e 222 ret = regmap_read(map, MAX17042_AvgCurrent, &data);
60a1f6e4
RP
223 if (ret < 0)
224 return ret;
225
39e7213e 226 val->intval = data;
086ef502
DK
227 if (val->intval & 0x8000) {
228 /* Negative */
229 val->intval = ~val->intval & 0x7fff;
230 val->intval++;
231 val->intval *= -1;
232 }
233 val->intval *= 1562500 / chip->pdata->r_sns;
234 } else {
235 return -EINVAL;
236 }
237 break;
359ab9f5
MH
238 default:
239 return -EINVAL;
240 }
241 return 0;
242}
243
39e7213e 244static int max17042_write_verify_reg(struct regmap *map, u8 reg, u32 value)
f3a71a6e
RP
245{
246 int retries = 8;
247 int ret;
39e7213e 248 u32 read_value;
f3a71a6e
RP
249
250 do {
39e7213e
JL
251 ret = regmap_write(map, reg, value);
252 regmap_read(map, reg, &read_value);
f3a71a6e
RP
253 if (read_value != value) {
254 ret = -EIO;
255 retries--;
256 }
257 } while (retries && read_value != value);
258
259 if (ret < 0)
39e7213e 260 pr_err("%s: err %d\n", __func__, ret);
f3a71a6e
RP
261
262 return ret;
263}
264
39e7213e
JL
265static inline void max17042_override_por(struct regmap *map,
266 u8 reg, u16 value)
f3a71a6e
RP
267{
268 if (value)
39e7213e 269 regmap_write(map, reg, value);
f3a71a6e
RP
270}
271
272static inline void max10742_unlock_model(struct max17042_chip *chip)
273{
39e7213e
JL
274 struct regmap *map = chip->regmap;
275 regmap_write(map, MAX17042_MLOCKReg1, MODEL_UNLOCK1);
276 regmap_write(map, MAX17042_MLOCKReg2, MODEL_UNLOCK2);
f3a71a6e
RP
277}
278
279static inline void max10742_lock_model(struct max17042_chip *chip)
280{
39e7213e
JL
281 struct regmap *map = chip->regmap;
282
283 regmap_write(map, MAX17042_MLOCKReg1, MODEL_LOCK1);
284 regmap_write(map, MAX17042_MLOCKReg2, MODEL_LOCK2);
f3a71a6e
RP
285}
286
287static inline void max17042_write_model_data(struct max17042_chip *chip,
288 u8 addr, int size)
289{
39e7213e 290 struct regmap *map = chip->regmap;
f3a71a6e
RP
291 int i;
292 for (i = 0; i < size; i++)
39e7213e
JL
293 regmap_write(map, addr + i,
294 chip->pdata->config_data->cell_char_tbl[i]);
f3a71a6e
RP
295}
296
297static inline void max17042_read_model_data(struct max17042_chip *chip,
39e7213e 298 u8 addr, u32 *data, int size)
f3a71a6e 299{
39e7213e 300 struct regmap *map = chip->regmap;
f3a71a6e
RP
301 int i;
302
303 for (i = 0; i < size; i++)
39e7213e 304 regmap_read(map, addr + i, &data[i]);
f3a71a6e
RP
305}
306
307static inline int max17042_model_data_compare(struct max17042_chip *chip,
308 u16 *data1, u16 *data2, int size)
309{
310 int i;
311
312 if (memcmp(data1, data2, size)) {
313 dev_err(&chip->client->dev, "%s compare failed\n", __func__);
314 for (i = 0; i < size; i++)
315 dev_info(&chip->client->dev, "0x%x, 0x%x",
316 data1[i], data2[i]);
317 dev_info(&chip->client->dev, "\n");
318 return -EINVAL;
319 }
320 return 0;
321}
322
323static int max17042_init_model(struct max17042_chip *chip)
324{
325 int ret;
1ef3d8fb 326 int table_size = ARRAY_SIZE(chip->pdata->config_data->cell_char_tbl);
39e7213e 327 u32 *temp_data;
f3a71a6e 328
1ef3d8fb 329 temp_data = kcalloc(table_size, sizeof(*temp_data), GFP_KERNEL);
f3a71a6e
RP
330 if (!temp_data)
331 return -ENOMEM;
332
333 max10742_unlock_model(chip);
334 max17042_write_model_data(chip, MAX17042_MODELChrTbl,
335 table_size);
336 max17042_read_model_data(chip, MAX17042_MODELChrTbl, temp_data,
337 table_size);
338
339 ret = max17042_model_data_compare(
340 chip,
341 chip->pdata->config_data->cell_char_tbl,
39e7213e 342 (u16 *)temp_data,
f3a71a6e
RP
343 table_size);
344
345 max10742_lock_model(chip);
346 kfree(temp_data);
347
348 return ret;
349}
350
351static int max17042_verify_model_lock(struct max17042_chip *chip)
352{
353 int i;
1ef3d8fb 354 int table_size = ARRAY_SIZE(chip->pdata->config_data->cell_char_tbl);
39e7213e 355 u32 *temp_data;
f3a71a6e
RP
356 int ret = 0;
357
1ef3d8fb 358 temp_data = kcalloc(table_size, sizeof(*temp_data), GFP_KERNEL);
f3a71a6e
RP
359 if (!temp_data)
360 return -ENOMEM;
361
362 max17042_read_model_data(chip, MAX17042_MODELChrTbl, temp_data,
363 table_size);
364 for (i = 0; i < table_size; i++)
365 if (temp_data[i])
366 ret = -EINVAL;
367
368 kfree(temp_data);
369 return ret;
370}
371
372static void max17042_write_config_regs(struct max17042_chip *chip)
373{
374 struct max17042_config_data *config = chip->pdata->config_data;
39e7213e 375 struct regmap *map = chip->regmap;
f3a71a6e 376
39e7213e
JL
377 regmap_write(map, MAX17042_CONFIG, config->config);
378 regmap_write(map, MAX17042_LearnCFG, config->learn_cfg);
379 regmap_write(map, MAX17042_FilterCFG,
f3a71a6e 380 config->filter_cfg);
39e7213e 381 regmap_write(map, MAX17042_RelaxCFG, config->relax_cfg);
9a8422d2 382 if (chip->chip_type == MAX17047)
39e7213e 383 regmap_write(map, MAX17047_FullSOCThr,
9a8422d2 384 config->full_soc_thresh);
f3a71a6e
RP
385}
386
387static void max17042_write_custom_regs(struct max17042_chip *chip)
388{
389 struct max17042_config_data *config = chip->pdata->config_data;
39e7213e 390 struct regmap *map = chip->regmap;
f3a71a6e 391
39e7213e
JL
392 max17042_write_verify_reg(map, MAX17042_RCOMP0, config->rcomp0);
393 max17042_write_verify_reg(map, MAX17042_TempCo, config->tcompc0);
394 max17042_write_verify_reg(map, MAX17042_ICHGTerm, config->ichgt_term);
9a8422d2 395 if (chip->chip_type == MAX17042) {
39e7213e
JL
396 regmap_write(map, MAX17042_EmptyTempCo, config->empty_tempco);
397 max17042_write_verify_reg(map, MAX17042_K_empty0,
9a8422d2
RP
398 config->kempty0);
399 } else {
39e7213e 400 max17042_write_verify_reg(map, MAX17047_QRTbl00,
9a8422d2 401 config->qrtbl00);
39e7213e 402 max17042_write_verify_reg(map, MAX17047_QRTbl10,
9a8422d2 403 config->qrtbl10);
39e7213e 404 max17042_write_verify_reg(map, MAX17047_QRTbl20,
9a8422d2 405 config->qrtbl20);
39e7213e 406 max17042_write_verify_reg(map, MAX17047_QRTbl30,
9a8422d2
RP
407 config->qrtbl30);
408 }
f3a71a6e
RP
409}
410
411static void max17042_update_capacity_regs(struct max17042_chip *chip)
412{
413 struct max17042_config_data *config = chip->pdata->config_data;
39e7213e 414 struct regmap *map = chip->regmap;
f3a71a6e 415
39e7213e 416 max17042_write_verify_reg(map, MAX17042_FullCAP,
f3a71a6e 417 config->fullcap);
39e7213e
JL
418 regmap_write(map, MAX17042_DesignCap, config->design_cap);
419 max17042_write_verify_reg(map, MAX17042_FullCAPNom,
f3a71a6e
RP
420 config->fullcapnom);
421}
422
423static void max17042_reset_vfsoc0_reg(struct max17042_chip *chip)
424{
39e7213e
JL
425 unsigned int vfSoc;
426 struct regmap *map = chip->regmap;
f3a71a6e 427
39e7213e
JL
428 regmap_read(map, MAX17042_VFSOC, &vfSoc);
429 regmap_write(map, MAX17042_VFSOC0Enable, VFSOC0_UNLOCK);
430 max17042_write_verify_reg(map, MAX17042_VFSOC0, vfSoc);
431 regmap_write(map, MAX17042_VFSOC0Enable, VFSOC0_LOCK);
f3a71a6e
RP
432}
433
434static void max17042_load_new_capacity_params(struct max17042_chip *chip)
435{
39e7213e 436 u32 full_cap0, rep_cap, dq_acc, vfSoc;
f3a71a6e
RP
437 u32 rem_cap;
438
439 struct max17042_config_data *config = chip->pdata->config_data;
39e7213e 440 struct regmap *map = chip->regmap;
f3a71a6e 441
39e7213e
JL
442 regmap_read(map, MAX17042_FullCAP0, &full_cap0);
443 regmap_read(map, MAX17042_VFSOC, &vfSoc);
f3a71a6e
RP
444
445 /* fg_vfSoc needs to shifted by 8 bits to get the
446 * perc in 1% accuracy, to get the right rem_cap multiply
447 * full_cap0, fg_vfSoc and devide by 100
448 */
449 rem_cap = ((vfSoc >> 8) * full_cap0) / 100;
39e7213e 450 max17042_write_verify_reg(map, MAX17042_RemCap, rem_cap);
f3a71a6e 451
39e7213e
JL
452 rep_cap = rem_cap;
453 max17042_write_verify_reg(map, MAX17042_RepCap, rep_cap);
f3a71a6e
RP
454
455 /* Write dQ_acc to 200% of Capacity and dP_acc to 200% */
456 dq_acc = config->fullcap / dQ_ACC_DIV;
39e7213e
JL
457 max17042_write_verify_reg(map, MAX17042_dQacc, dq_acc);
458 max17042_write_verify_reg(map, MAX17042_dPacc, dP_ACC_200);
f3a71a6e 459
39e7213e 460 max17042_write_verify_reg(map, MAX17042_FullCAP,
f3a71a6e 461 config->fullcap);
39e7213e 462 regmap_write(map, MAX17042_DesignCap,
f3a71a6e 463 config->design_cap);
39e7213e 464 max17042_write_verify_reg(map, MAX17042_FullCAPNom,
f3a71a6e 465 config->fullcapnom);
9a8422d2 466 /* Update SOC register with new SOC */
39e7213e 467 regmap_write(map, MAX17042_RepSOC, vfSoc);
f3a71a6e
RP
468}
469
470/*
471 * Block write all the override values coming from platform data.
472 * This function MUST be called before the POR initialization proceedure
473 * specified by maxim.
474 */
475static inline void max17042_override_por_values(struct max17042_chip *chip)
476{
39e7213e 477 struct regmap *map = chip->regmap;
f3a71a6e
RP
478 struct max17042_config_data *config = chip->pdata->config_data;
479
39e7213e
JL
480 max17042_override_por(map, MAX17042_TGAIN, config->tgain);
481 max17042_override_por(map, MAx17042_TOFF, config->toff);
482 max17042_override_por(map, MAX17042_CGAIN, config->cgain);
483 max17042_override_por(map, MAX17042_COFF, config->coff);
484
485 max17042_override_por(map, MAX17042_VALRT_Th, config->valrt_thresh);
486 max17042_override_por(map, MAX17042_TALRT_Th, config->talrt_thresh);
487 max17042_override_por(map, MAX17042_SALRT_Th,
488 config->soc_alrt_thresh);
489 max17042_override_por(map, MAX17042_CONFIG, config->config);
490 max17042_override_por(map, MAX17042_SHDNTIMER, config->shdntimer);
491
492 max17042_override_por(map, MAX17042_DesignCap, config->design_cap);
493 max17042_override_por(map, MAX17042_ICHGTerm, config->ichgt_term);
494
495 max17042_override_por(map, MAX17042_AtRate, config->at_rate);
496 max17042_override_por(map, MAX17042_LearnCFG, config->learn_cfg);
497 max17042_override_por(map, MAX17042_FilterCFG, config->filter_cfg);
498 max17042_override_por(map, MAX17042_RelaxCFG, config->relax_cfg);
499 max17042_override_por(map, MAX17042_MiscCFG, config->misc_cfg);
500 max17042_override_por(map, MAX17042_MaskSOC, config->masksoc);
501
502 max17042_override_por(map, MAX17042_FullCAP, config->fullcap);
503 max17042_override_por(map, MAX17042_FullCAPNom, config->fullcapnom);
9a8422d2 504 if (chip->chip_type == MAX17042)
39e7213e 505 max17042_override_por(map, MAX17042_SOC_empty,
9a8422d2 506 config->socempty);
39e7213e
JL
507 max17042_override_por(map, MAX17042_LAvg_empty, config->lavg_empty);
508 max17042_override_por(map, MAX17042_dQacc, config->dqacc);
509 max17042_override_por(map, MAX17042_dPacc, config->dpacc);
f3a71a6e 510
9a8422d2 511 if (chip->chip_type == MAX17042)
39e7213e 512 max17042_override_por(map, MAX17042_V_empty, config->vempty);
9a8422d2 513 else
39e7213e
JL
514 max17042_override_por(map, MAX17047_V_empty, config->vempty);
515 max17042_override_por(map, MAX17042_TempNom, config->temp_nom);
516 max17042_override_por(map, MAX17042_TempLim, config->temp_lim);
517 max17042_override_por(map, MAX17042_FCTC, config->fctc);
518 max17042_override_por(map, MAX17042_RCOMP0, config->rcomp0);
519 max17042_override_por(map, MAX17042_TempCo, config->tcompc0);
9a8422d2 520 if (chip->chip_type) {
39e7213e
JL
521 max17042_override_por(map, MAX17042_EmptyTempCo,
522 config->empty_tempco);
523 max17042_override_por(map, MAX17042_K_empty0,
524 config->kempty0);
9a8422d2 525 }
f3a71a6e
RP
526}
527
528static int max17042_init_chip(struct max17042_chip *chip)
529{
39e7213e 530 struct regmap *map = chip->regmap;
f3a71a6e
RP
531 int ret;
532 int val;
533
534 max17042_override_por_values(chip);
535 /* After Power up, the MAX17042 requires 500mS in order
536 * to perform signal debouncing and initial SOC reporting
537 */
538 msleep(500);
539
540 /* Initialize configaration */
541 max17042_write_config_regs(chip);
542
543 /* write cell characterization data */
544 ret = max17042_init_model(chip);
545 if (ret) {
546 dev_err(&chip->client->dev, "%s init failed\n",
547 __func__);
548 return -EIO;
549 }
a879f19f
AC
550
551 ret = max17042_verify_model_lock(chip);
f3a71a6e
RP
552 if (ret) {
553 dev_err(&chip->client->dev, "%s lock verify failed\n",
554 __func__);
555 return -EIO;
556 }
557 /* write custom parameters */
558 max17042_write_custom_regs(chip);
559
560 /* update capacity params */
561 max17042_update_capacity_regs(chip);
562
563 /* delay must be atleast 350mS to allow VFSOC
564 * to be calculated from the new configuration
565 */
566 msleep(350);
567
568 /* reset vfsoc0 reg */
569 max17042_reset_vfsoc0_reg(chip);
570
571 /* load new capacity params */
572 max17042_load_new_capacity_params(chip);
573
574 /* Init complete, Clear the POR bit */
39e7213e
JL
575 regmap_read(map, MAX17042_STATUS, &val);
576 regmap_write(map, MAX17042_STATUS, val & (~STATUS_POR_BIT));
f3a71a6e
RP
577 return 0;
578}
579
e5f3872d
RP
580static void max17042_set_soc_threshold(struct max17042_chip *chip, u16 off)
581{
39e7213e
JL
582 struct regmap *map = chip->regmap;
583 u32 soc, soc_tr;
e5f3872d
RP
584
585 /* program interrupt thesholds such that we should
586 * get interrupt for every 'off' perc change in the soc
587 */
39e7213e
JL
588 regmap_read(map, MAX17042_RepSOC, &soc);
589 soc >>= 8;
e5f3872d
RP
590 soc_tr = (soc + off) << 8;
591 soc_tr |= (soc - off);
39e7213e 592 regmap_write(map, MAX17042_SALRT_Th, soc_tr);
e5f3872d
RP
593}
594
e5f3872d
RP
595static irqreturn_t max17042_thread_handler(int id, void *dev)
596{
597 struct max17042_chip *chip = dev;
39e7213e 598 u32 val;
e5f3872d 599
39e7213e 600 regmap_read(chip->regmap, MAX17042_STATUS, &val);
5cdd4d7f
RP
601 if ((val & STATUS_INTR_SOCMIN_BIT) ||
602 (val & STATUS_INTR_SOCMAX_BIT)) {
e5f3872d
RP
603 dev_info(&chip->client->dev, "SOC threshold INTR\n");
604 max17042_set_soc_threshold(chip, 1);
605 }
606
607 power_supply_changed(&chip->battery);
608 return IRQ_HANDLED;
609}
f3a71a6e
RP
610
611static void max17042_init_worker(struct work_struct *work)
612{
613 struct max17042_chip *chip = container_of(work,
614 struct max17042_chip, work);
615 int ret;
616
617 /* Initialize registers according to values from the platform data */
618 if (chip->pdata->enable_por_init && chip->pdata->config_data) {
619 ret = max17042_init_chip(chip);
620 if (ret)
621 return;
622 }
623
624 chip->init_complete = 1;
625}
626
3832246d
KL
627#ifdef CONFIG_OF
628static struct max17042_platform_data *
629max17042_get_pdata(struct device *dev)
630{
631 struct device_node *np = dev->of_node;
632 u32 prop;
633 struct max17042_platform_data *pdata;
634
635 if (!np)
636 return dev->platform_data;
637
638 pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL);
639 if (!pdata)
640 return NULL;
641
642 /*
643 * Require current sense resistor value to be specified for
644 * current-sense functionality to be enabled at all.
645 */
646 if (of_property_read_u32(np, "maxim,rsns-microohm", &prop) == 0) {
647 pdata->r_sns = prop;
648 pdata->enable_current_sense = true;
649 }
650
651 return pdata;
652}
653#else
654static struct max17042_platform_data *
655max17042_get_pdata(struct device *dev)
656{
657 return dev->platform_data;
658}
659#endif
660
e0291285 661static const struct regmap_config max17042_regmap_config = {
39e7213e
JL
662 .reg_bits = 8,
663 .val_bits = 16,
664 .val_format_endian = REGMAP_ENDIAN_NATIVE,
665};
666
c8afa640 667static int max17042_probe(struct i2c_client *client,
359ab9f5
MH
668 const struct i2c_device_id *id)
669{
670 struct i2c_adapter *adapter = to_i2c_adapter(client->dev.parent);
671 struct max17042_chip *chip;
672 int ret;
39e7213e
JL
673 int i;
674 u32 val;
359ab9f5
MH
675
676 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_WORD_DATA))
677 return -EIO;
678
2f3b4342 679 chip = devm_kzalloc(&client->dev, sizeof(*chip), GFP_KERNEL);
359ab9f5
MH
680 if (!chip)
681 return -ENOMEM;
682
683 chip->client = client;
39e7213e
JL
684 chip->regmap = devm_regmap_init_i2c(client, &max17042_regmap_config);
685 if (IS_ERR(chip->regmap)) {
686 dev_err(&client->dev, "Failed to initialize regmap\n");
687 return -EINVAL;
688 }
689
3832246d
KL
690 chip->pdata = max17042_get_pdata(&client->dev);
691 if (!chip->pdata) {
692 dev_err(&client->dev, "no platform data provided\n");
693 return -EINVAL;
694 }
359ab9f5
MH
695
696 i2c_set_clientdata(client, chip);
697
39e7213e
JL
698 regmap_read(chip->regmap, MAX17042_DevName, &val);
699 if (val == MAX17042_IC_VERSION) {
9a8422d2
RP
700 dev_dbg(&client->dev, "chip type max17042 detected\n");
701 chip->chip_type = MAX17042;
39e7213e 702 } else if (val == MAX17047_IC_VERSION) {
9a8422d2
RP
703 dev_dbg(&client->dev, "chip type max17047/50 detected\n");
704 chip->chip_type = MAX17047;
705 } else {
39e7213e 706 dev_err(&client->dev, "device version mismatch: %x\n", val);
9a8422d2
RP
707 return -EIO;
708 }
709
710 chip->battery.name = "max170xx_battery";
359ab9f5
MH
711 chip->battery.type = POWER_SUPPLY_TYPE_BATTERY;
712 chip->battery.get_property = max17042_get_property;
713 chip->battery.properties = max17042_battery_props;
714 chip->battery.num_properties = ARRAY_SIZE(max17042_battery_props);
715
086ef502
DK
716 /* When current is not measured,
717 * CURRENT_NOW and CURRENT_AVG properties should be invisible. */
718 if (!chip->pdata->enable_current_sense)
719 chip->battery.num_properties -= 2;
720
4cfa892c
PR
721 if (chip->pdata->r_sns == 0)
722 chip->pdata->r_sns = MAX17042_DEFAULT_SNS_RESISTOR;
723
086ef502 724 if (chip->pdata->init_data)
39e7213e
JL
725 for (i = 0; i < chip->pdata->num_init_data; i++)
726 regmap_write(chip->regmap,
727 chip->pdata->init_data[i].addr,
728 chip->pdata->init_data[i].data);
086ef502 729
359ab9f5 730 if (!chip->pdata->enable_current_sense) {
39e7213e
JL
731 regmap_write(chip->regmap, MAX17042_CGAIN, 0x0000);
732 regmap_write(chip->regmap, MAX17042_MiscCFG, 0x0003);
733 regmap_write(chip->regmap, MAX17042_LearnCFG, 0x0007);
359ab9f5
MH
734 }
735
243e3527
RP
736 ret = power_supply_register(&client->dev, &chip->battery);
737 if (ret) {
738 dev_err(&client->dev, "failed: power supply register\n");
739 return ret;
740 }
741
e5f3872d 742 if (client->irq) {
5cdd4d7f 743 ret = request_threaded_irq(client->irq, NULL,
26740dbb
JL
744 max17042_thread_handler,
745 IRQF_TRIGGER_FALLING | IRQF_ONESHOT,
746 chip->battery.name, chip);
e5f3872d 747 if (!ret) {
39e7213e
JL
748 regmap_read(chip->regmap, MAX17042_CONFIG, &val);
749 val |= CONFIG_ALRT_BIT_ENBL;
750 regmap_write(chip->regmap, MAX17042_CONFIG, val);
e5f3872d 751 max17042_set_soc_threshold(chip, 1);
e5ba50bc
RP
752 } else {
753 client->irq = 0;
e5f3872d
RP
754 dev_err(&client->dev, "%s(): cannot get IRQ\n",
755 __func__);
e5ba50bc 756 }
e5f3872d
RP
757 }
758
39e7213e
JL
759 regmap_read(chip->regmap, MAX17042_STATUS, &val);
760 if (val & STATUS_POR_BIT) {
f3a71a6e
RP
761 INIT_WORK(&chip->work, max17042_init_worker);
762 schedule_work(&chip->work);
763 } else {
764 chip->init_complete = 1;
765 }
766
243e3527 767 return 0;
359ab9f5
MH
768}
769
415ec69f 770static int max17042_remove(struct i2c_client *client)
359ab9f5
MH
771{
772 struct max17042_chip *chip = i2c_get_clientdata(client);
773
bb28da90
RP
774 if (client->irq)
775 free_irq(client->irq, chip);
359ab9f5 776 power_supply_unregister(&chip->battery);
359ab9f5
MH
777 return 0;
778}
779
3d23c7f4 780#ifdef CONFIG_PM_SLEEP
48bc1774
RP
781static int max17042_suspend(struct device *dev)
782{
783 struct max17042_chip *chip = dev_get_drvdata(dev);
784
48e41c70
AV
785 /*
786 * disable the irq and enable irq_wake
48bc1774
RP
787 * capability to the interrupt line.
788 */
789 if (chip->client->irq) {
790 disable_irq(chip->client->irq);
791 enable_irq_wake(chip->client->irq);
792 }
793
794 return 0;
795}
796
797static int max17042_resume(struct device *dev)
798{
799 struct max17042_chip *chip = dev_get_drvdata(dev);
800
801 if (chip->client->irq) {
802 disable_irq_wake(chip->client->irq);
803 enable_irq(chip->client->irq);
804 /* re-program the SOC thresholds to 1% change */
805 max17042_set_soc_threshold(chip, 1);
806 }
807
808 return 0;
809}
48bc1774
RP
810#endif
811
3d23c7f4
MB
812static SIMPLE_DEV_PM_OPS(max17042_pm_ops, max17042_suspend,
813 max17042_resume);
814
3832246d
KL
815#ifdef CONFIG_OF
816static const struct of_device_id max17042_dt_match[] = {
817 { .compatible = "maxim,max17042" },
9a8422d2
RP
818 { .compatible = "maxim,max17047" },
819 { .compatible = "maxim,max17050" },
3832246d
KL
820 { },
821};
822MODULE_DEVICE_TABLE(of, max17042_dt_match);
823#endif
824
359ab9f5
MH
825static const struct i2c_device_id max17042_id[] = {
826 { "max17042", 0 },
9a8422d2
RP
827 { "max17047", 1 },
828 { "max17050", 2 },
359ab9f5
MH
829 { }
830};
831MODULE_DEVICE_TABLE(i2c, max17042_id);
832
833static struct i2c_driver max17042_i2c_driver = {
834 .driver = {
835 .name = "max17042",
3832246d 836 .of_match_table = of_match_ptr(max17042_dt_match),
3d23c7f4 837 .pm = &max17042_pm_ops,
359ab9f5
MH
838 },
839 .probe = max17042_probe,
28ea73f4 840 .remove = max17042_remove,
359ab9f5
MH
841 .id_table = max17042_id,
842};
5ff92e7a 843module_i2c_driver(max17042_i2c_driver);
359ab9f5
MH
844
845MODULE_AUTHOR("MyungJoo Ham <myungjoo.ham@samsung.com>");
846MODULE_DESCRIPTION("MAX17042 Fuel Gauge");
847MODULE_LICENSE("GPL");