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smb347-charger: Add constant charge and current properties
[linux-2.6-block.git] / drivers / power / max17042_battery.c
CommitLineData
359ab9f5
MH		 1/*
2 * Fuel gauge driver for Maxim 17042 / 8966 / 8997
3 * Note that Maxim 8966 and 8997 are mfd and this is its subdevice.
4 *
5 * Copyright (C) 2011 Samsung Electronics
6 * MyungJoo Ham <myungjoo.ham@samsung.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21 *
22 * This driver is based on max17040_battery.c
23 */
24
25#include <linux/init.h>
7e6d62db 26#include <linux/module.h>
359ab9f5
MH		 27#include <linux/slab.h>
28#include <linux/i2c.h>
f3a71a6e 29#include <linux/delay.h>
e5f3872d 30#include <linux/interrupt.h>
48bc1774 31#include <linux/pm.h>
359ab9f5
MH		 32#include <linux/mod_devicetable.h>
33#include <linux/power_supply.h>
34#include <linux/power/max17042_battery.h>
3832246d 35#include <linux/of.h>
359ab9f5 36
f3a71a6e
RP		 37/* Status register bits */
38#define STATUS_POR_BIT (1 << 1)
39#define STATUS_BST_BIT (1 << 3)
40#define STATUS_VMN_BIT (1 << 8)
41#define STATUS_TMN_BIT (1 << 9)
42#define STATUS_SMN_BIT (1 << 10)
43#define STATUS_BI_BIT (1 << 11)
44#define STATUS_VMX_BIT (1 << 12)
45#define STATUS_TMX_BIT (1 << 13)
46#define STATUS_SMX_BIT (1 << 14)
47#define STATUS_BR_BIT (1 << 15)
48
e5f3872d
RP		 49/* Interrupt mask bits */
50#define CONFIG_ALRT_BIT_ENBL (1 << 2)
5cdd4d7f
RP		 51#define STATUS_INTR_SOCMIN_BIT (1 << 10)
52#define STATUS_INTR_SOCMAX_BIT (1 << 14)
e5f3872d 53
f3a71a6e
RP		 54#define VFSOC0_LOCK 0x0000
55#define VFSOC0_UNLOCK 0x0080
56#define MODEL_UNLOCK1 0X0059
57#define MODEL_UNLOCK2 0X00C4
58#define MODEL_LOCK1 0X0000
59#define MODEL_LOCK2 0X0000
60
61#define dQ_ACC_DIV 0x4
62#define dP_ACC_100 0x1900
63#define dP_ACC_200 0x3200
64
9a8422d2
RP		 65#define MAX17042_IC_VERSION 0x0092
66#define MAX17047_IC_VERSION 0x00AC /* same for max17050 */
67
359ab9f5
MH		 68struct max17042_chip {
69 struct i2c_client *client;
70 struct power_supply battery;
9a8422d2 71 enum max170xx_chip_type chip_type;
359ab9f5 72 struct max17042_platform_data *pdata;
f3a71a6e
RP		 73 struct work_struct work;
74 int init_complete;
359ab9f5
MH		 75};
76
77static int max17042_write_reg(struct i2c_client *client, u8 reg, u16 value)
78{
79 int ret = i2c_smbus_write_word_data(client, reg, value);
80
81 if (ret < 0)
82 dev_err(&client->dev, "%s: err %d\n", __func__, ret);
83
84 return ret;
85}
86
87static int max17042_read_reg(struct i2c_client *client, u8 reg)
88{
89 int ret = i2c_smbus_read_word_data(client, reg);
90
91 if (ret < 0)
92 dev_err(&client->dev, "%s: err %d\n", __func__, ret);
93
94 return ret;
95}
96
086ef502
DK		 97static void max17042_set_reg(struct i2c_client *client,
98 struct max17042_reg_data *data, int size)
99{
100 int i;
101
102 for (i = 0; i < size; i++)
103 max17042_write_reg(client, data[i].addr, data[i].data);
104}
105
359ab9f5 106static enum power_supply_property max17042_battery_props[] = {
086ef502
DK		 107 POWER_SUPPLY_PROP_PRESENT,
108 POWER_SUPPLY_PROP_CYCLE_COUNT,
109 POWER_SUPPLY_PROP_VOLTAGE_MAX,
110 POWER_SUPPLY_PROP_VOLTAGE_MIN_DESIGN,
359ab9f5
MH		 111 POWER_SUPPLY_PROP_VOLTAGE_NOW,
112 POWER_SUPPLY_PROP_VOLTAGE_AVG,
a2ebfe2f 113 POWER_SUPPLY_PROP_VOLTAGE_OCV,
359ab9f5 114 POWER_SUPPLY_PROP_CAPACITY,
086ef502
DK		 115 POWER_SUPPLY_PROP_CHARGE_FULL,
116 POWER_SUPPLY_PROP_TEMP,
117 POWER_SUPPLY_PROP_CURRENT_NOW,
118 POWER_SUPPLY_PROP_CURRENT_AVG,
359ab9f5
MH		 119};
120
121static int max17042_get_property(struct power_supply *psy,
122 enum power_supply_property psp,
123 union power_supply_propval *val)
124{
125 struct max17042_chip *chip = container_of(psy,
126 struct max17042_chip, battery);
60a1f6e4 127 int ret;
359ab9f5 128
f3a71a6e
RP		 129 if (!chip->init_complete)
130 return -EAGAIN;
131
359ab9f5 132 switch (psp) {
086ef502 133 case POWER_SUPPLY_PROP_PRESENT:
60a1f6e4
RP		 134 ret = max17042_read_reg(chip->client, MAX17042_STATUS);
135 if (ret < 0)
136 return ret;
137
138 if (ret & MAX17042_STATUS_BattAbsent)
086ef502
DK		 139 val->intval = 0;
140 else
141 val->intval = 1;
142 break;
143 case POWER_SUPPLY_PROP_CYCLE_COUNT:
60a1f6e4
RP		 144 ret = max17042_read_reg(chip->client, MAX17042_Cycles);
145 if (ret < 0)
146 return ret;
147
148 val->intval = ret;
086ef502
DK		 149 break;
150 case POWER_SUPPLY_PROP_VOLTAGE_MAX:
60a1f6e4
RP		 151 ret = max17042_read_reg(chip->client, MAX17042_MinMaxVolt);
152 if (ret < 0)
153 return ret;
154
155 val->intval = ret >> 8;
086ef502
DK		 156 val->intval *= 20000; /* Units of LSB = 20mV */
157 break;
158 case POWER_SUPPLY_PROP_VOLTAGE_MIN_DESIGN:
9a8422d2
RP		 159 if (chip->chip_type == MAX17042)
160 ret = max17042_read_reg(chip->client, MAX17042_V_empty);
161 else
162 ret = max17042_read_reg(chip->client, MAX17047_V_empty);
60a1f6e4
RP		 163 if (ret < 0)
164 return ret;
165
166 val->intval = ret >> 7;
086ef502
DK		 167 val->intval *= 10000; /* Units of LSB = 10mV */
168 break;
359ab9f5 169 case POWER_SUPPLY_PROP_VOLTAGE_NOW:
60a1f6e4
RP		 170 ret = max17042_read_reg(chip->client, MAX17042_VCELL);
171 if (ret < 0)
172 return ret;
173
174 val->intval = ret * 625 / 8;
359ab9f5
MH		 175 break;
176 case POWER_SUPPLY_PROP_VOLTAGE_AVG:
60a1f6e4
RP		 177 ret = max17042_read_reg(chip->client, MAX17042_AvgVCELL);
178 if (ret < 0)
179 return ret;
180
a2ebfe2f
RP		 181 val->intval = ret * 625 / 8;
182 break;
183 case POWER_SUPPLY_PROP_VOLTAGE_OCV:
184 ret = max17042_read_reg(chip->client, MAX17042_OCVInternal);
185 if (ret < 0)
186 return ret;
187
60a1f6e4 188 val->intval = ret * 625 / 8;
359ab9f5
MH		 189 break;
190 case POWER_SUPPLY_PROP_CAPACITY:
13e0aa46 191 ret = max17042_read_reg(chip->client, MAX17042_RepSOC);
60a1f6e4
RP		 192 if (ret < 0)
193 return ret;
194
195 val->intval = ret >> 8;
359ab9f5 196 break;
086ef502 197 case POWER_SUPPLY_PROP_CHARGE_FULL:
6e0e60cd 198 ret = max17042_read_reg(chip->client, MAX17042_FullCAP);
60a1f6e4
RP		 199 if (ret < 0)
200 return ret;
201
6e0e60cd 202 val->intval = ret * 1000 / 2;
086ef502
DK		 203 break;
204 case POWER_SUPPLY_PROP_TEMP:
60a1f6e4
RP		 205 ret = max17042_read_reg(chip->client, MAX17042_TEMP);
206 if (ret < 0)
207 return ret;
208
209 val->intval = ret;
086ef502
DK		 210 /* The value is signed. */
211 if (val->intval & 0x8000) {
212 val->intval = (0x7fff & ~val->intval) + 1;
213 val->intval *= -1;
214 }
215 /* The value is converted into deci-centigrade scale */
216 /* Units of LSB = 1 / 256 degree Celsius */
217 val->intval = val->intval * 10 / 256;
218 break;
219 case POWER_SUPPLY_PROP_CURRENT_NOW:
220 if (chip->pdata->enable_current_sense) {
60a1f6e4
RP		 221 ret = max17042_read_reg(chip->client, MAX17042_Current);
222 if (ret < 0)
223 return ret;
224
225 val->intval = ret;
086ef502
DK		 226 if (val->intval & 0x8000) {
227 /* Negative */
228 val->intval = ~val->intval & 0x7fff;
229 val->intval++;
230 val->intval *= -1;
231 }
91d8b0d6 232 val->intval *= 1562500 / chip->pdata->r_sns;
086ef502
DK		 233 } else {
234 return -EINVAL;
235 }
236 break;
237 case POWER_SUPPLY_PROP_CURRENT_AVG:
238 if (chip->pdata->enable_current_sense) {
60a1f6e4
RP		 239 ret = max17042_read_reg(chip->client,
240 MAX17042_AvgCurrent);
241 if (ret < 0)
242 return ret;
243
244 val->intval = ret;
086ef502
DK		 245 if (val->intval & 0x8000) {
246 /* Negative */
247 val->intval = ~val->intval & 0x7fff;
248 val->intval++;
249 val->intval *= -1;
250 }
251 val->intval *= 1562500 / chip->pdata->r_sns;
252 } else {
253 return -EINVAL;
254 }
255 break;
359ab9f5
MH		 256 default:
257 return -EINVAL;
258 }
259 return 0;
260}
261
f3a71a6e
RP		 262static int max17042_write_verify_reg(struct i2c_client *client,
263 u8 reg, u16 value)
264{
265 int retries = 8;
266 int ret;
267 u16 read_value;
268
269 do {
270 ret = i2c_smbus_write_word_data(client, reg, value);
271 read_value = max17042_read_reg(client, reg);
272 if (read_value != value) {
273 ret = -EIO;
274 retries--;
275 }
276 } while (retries && read_value != value);
277
278 if (ret < 0)
279 dev_err(&client->dev, "%s: err %d\n", __func__, ret);
280
281 return ret;
282}
283
284static inline void max17042_override_por(
285 struct i2c_client *client, u8 reg, u16 value)
286{
287 if (value)
288 max17042_write_reg(client, reg, value);
289}
290
291static inline void max10742_unlock_model(struct max17042_chip *chip)
292{
293 struct i2c_client *client = chip->client;
294 max17042_write_reg(client, MAX17042_MLOCKReg1, MODEL_UNLOCK1);
295 max17042_write_reg(client, MAX17042_MLOCKReg2, MODEL_UNLOCK2);
296}
297
298static inline void max10742_lock_model(struct max17042_chip *chip)
299{
300 struct i2c_client *client = chip->client;
301 max17042_write_reg(client, MAX17042_MLOCKReg1, MODEL_LOCK1);
302 max17042_write_reg(client, MAX17042_MLOCKReg2, MODEL_LOCK2);
303}
304
305static inline void max17042_write_model_data(struct max17042_chip *chip,
306 u8 addr, int size)
307{
308 struct i2c_client *client = chip->client;
309 int i;
310 for (i = 0; i < size; i++)
311 max17042_write_reg(client, addr + i,
312 chip->pdata->config_data->cell_char_tbl[i]);
313}
314
315static inline void max17042_read_model_data(struct max17042_chip *chip,
316 u8 addr, u16 *data, int size)
317{
318 struct i2c_client *client = chip->client;
319 int i;
320
321 for (i = 0; i < size; i++)
322 data[i] = max17042_read_reg(client, addr + i);
323}
324
325static inline int max17042_model_data_compare(struct max17042_chip *chip,
326 u16 *data1, u16 *data2, int size)
327{
328 int i;
329
330 if (memcmp(data1, data2, size)) {
331 dev_err(&chip->client->dev, "%s compare failed\n", __func__);
332 for (i = 0; i < size; i++)
333 dev_info(&chip->client->dev, "0x%x, 0x%x",
334 data1[i], data2[i]);
335 dev_info(&chip->client->dev, "\n");
336 return -EINVAL;
337 }
338 return 0;
339}
340
341static int max17042_init_model(struct max17042_chip *chip)
342{
343 int ret;
1ef3d8fb 344 int table_size = ARRAY_SIZE(chip->pdata->config_data->cell_char_tbl);
f3a71a6e
RP		 345 u16 *temp_data;
346
1ef3d8fb 347 temp_data = kcalloc(table_size, sizeof(*temp_data), GFP_KERNEL);
f3a71a6e
RP		 348 if (!temp_data)
349 return -ENOMEM;
350
351 max10742_unlock_model(chip);
352 max17042_write_model_data(chip, MAX17042_MODELChrTbl,
353 table_size);
354 max17042_read_model_data(chip, MAX17042_MODELChrTbl, temp_data,
355 table_size);
356
357 ret = max17042_model_data_compare(
358 chip,
359 chip->pdata->config_data->cell_char_tbl,
360 temp_data,
361 table_size);
362
363 max10742_lock_model(chip);
364 kfree(temp_data);
365
366 return ret;
367}
368
369static int max17042_verify_model_lock(struct max17042_chip *chip)
370{
371 int i;
1ef3d8fb 372 int table_size = ARRAY_SIZE(chip->pdata->config_data->cell_char_tbl);
f3a71a6e
RP		 373 u16 *temp_data;
374 int ret = 0;
375
1ef3d8fb 376 temp_data = kcalloc(table_size, sizeof(*temp_data), GFP_KERNEL);
f3a71a6e
RP		 377 if (!temp_data)
378 return -ENOMEM;
379
380 max17042_read_model_data(chip, MAX17042_MODELChrTbl, temp_data,
381 table_size);
382 for (i = 0; i < table_size; i++)
383 if (temp_data[i])
384 ret = -EINVAL;
385
386 kfree(temp_data);
387 return ret;
388}
389
390static void max17042_write_config_regs(struct max17042_chip *chip)
391{
392 struct max17042_config_data *config = chip->pdata->config_data;
393
394 max17042_write_reg(chip->client, MAX17042_CONFIG, config->config);
395 max17042_write_reg(chip->client, MAX17042_LearnCFG, config->learn_cfg);
396 max17042_write_reg(chip->client, MAX17042_FilterCFG,
397 config->filter_cfg);
398 max17042_write_reg(chip->client, MAX17042_RelaxCFG, config->relax_cfg);
9a8422d2
RP		 399 if (chip->chip_type == MAX17047)
400 max17042_write_reg(chip->client, MAX17047_FullSOCThr,
401 config->full_soc_thresh);
f3a71a6e
RP		 402}
403
404static void max17042_write_custom_regs(struct max17042_chip *chip)
405{
406 struct max17042_config_data *config = chip->pdata->config_data;
407
408 max17042_write_verify_reg(chip->client, MAX17042_RCOMP0,
409 config->rcomp0);
410 max17042_write_verify_reg(chip->client, MAX17042_TempCo,
411 config->tcompc0);
f3a71a6e
RP		 412 max17042_write_verify_reg(chip->client, MAX17042_ICHGTerm,
413 config->ichgt_term);
9a8422d2
RP		 414 if (chip->chip_type == MAX17042) {
415 max17042_write_reg(chip->client, MAX17042_EmptyTempCo,
416 config->empty_tempco);
417 max17042_write_verify_reg(chip->client, MAX17042_K_empty0,
418 config->kempty0);
419 } else {
420 max17042_write_verify_reg(chip->client, MAX17047_QRTbl00,
421 config->qrtbl00);
422 max17042_write_verify_reg(chip->client, MAX17047_QRTbl10,
423 config->qrtbl10);
424 max17042_write_verify_reg(chip->client, MAX17047_QRTbl20,
425 config->qrtbl20);
426 max17042_write_verify_reg(chip->client, MAX17047_QRTbl30,
427 config->qrtbl30);
428 }
f3a71a6e
RP		 429}
430
431static void max17042_update_capacity_regs(struct max17042_chip *chip)
432{
433 struct max17042_config_data *config = chip->pdata->config_data;
434
435 max17042_write_verify_reg(chip->client, MAX17042_FullCAP,
436 config->fullcap);
437 max17042_write_reg(chip->client, MAX17042_DesignCap,
438 config->design_cap);
439 max17042_write_verify_reg(chip->client, MAX17042_FullCAPNom,
440 config->fullcapnom);
441}
442
443static void max17042_reset_vfsoc0_reg(struct max17042_chip *chip)
444{
445 u16 vfSoc;
446
447 vfSoc = max17042_read_reg(chip->client, MAX17042_VFSOC);
448 max17042_write_reg(chip->client, MAX17042_VFSOC0Enable, VFSOC0_UNLOCK);
449 max17042_write_verify_reg(chip->client, MAX17042_VFSOC0, vfSoc);
450 max17042_write_reg(chip->client, MAX17042_VFSOC0Enable, VFSOC0_LOCK);
451}
452
453static void max17042_load_new_capacity_params(struct max17042_chip *chip)
454{
455 u16 full_cap0, rep_cap, dq_acc, vfSoc;
456 u32 rem_cap;
457
458 struct max17042_config_data *config = chip->pdata->config_data;
459
460 full_cap0 = max17042_read_reg(chip->client, MAX17042_FullCAP0);
461 vfSoc = max17042_read_reg(chip->client, MAX17042_VFSOC);
462
463 /* fg_vfSoc needs to shifted by 8 bits to get the
464 * perc in 1% accuracy, to get the right rem_cap multiply
465 * full_cap0, fg_vfSoc and devide by 100
466 */
467 rem_cap = ((vfSoc >> 8) * full_cap0) / 100;
468 max17042_write_verify_reg(chip->client, MAX17042_RemCap, (u16)rem_cap);
469
470 rep_cap = (u16)rem_cap;
471 max17042_write_verify_reg(chip->client, MAX17042_RepCap, rep_cap);
472
473 /* Write dQ_acc to 200% of Capacity and dP_acc to 200% */
474 dq_acc = config->fullcap / dQ_ACC_DIV;
475 max17042_write_verify_reg(chip->client, MAX17042_dQacc, dq_acc);
476 max17042_write_verify_reg(chip->client, MAX17042_dPacc, dP_ACC_200);
477
478 max17042_write_verify_reg(chip->client, MAX17042_FullCAP,
479 config->fullcap);
480 max17042_write_reg(chip->client, MAX17042_DesignCap,
481 config->design_cap);
482 max17042_write_verify_reg(chip->client, MAX17042_FullCAPNom,
483 config->fullcapnom);
9a8422d2
RP		 484 /* Update SOC register with new SOC */
485 max17042_write_reg(chip->client, MAX17042_RepSOC, vfSoc);
f3a71a6e
RP		 486}
487
488/*
489 * Block write all the override values coming from platform data.
490 * This function MUST be called before the POR initialization proceedure
491 * specified by maxim.
492 */
493static inline void max17042_override_por_values(struct max17042_chip *chip)
494{
495 struct i2c_client *client = chip->client;
496 struct max17042_config_data *config = chip->pdata->config_data;
497
498 max17042_override_por(client, MAX17042_TGAIN, config->tgain);
499 max17042_override_por(client, MAx17042_TOFF, config->toff);
500 max17042_override_por(client, MAX17042_CGAIN, config->cgain);
501 max17042_override_por(client, MAX17042_COFF, config->coff);
502
503 max17042_override_por(client, MAX17042_VALRT_Th, config->valrt_thresh);
504 max17042_override_por(client, MAX17042_TALRT_Th, config->talrt_thresh);
505 max17042_override_por(client, MAX17042_SALRT_Th,
506 config->soc_alrt_thresh);
507 max17042_override_por(client, MAX17042_CONFIG, config->config);
508 max17042_override_por(client, MAX17042_SHDNTIMER, config->shdntimer);
509
510 max17042_override_por(client, MAX17042_DesignCap, config->design_cap);
511 max17042_override_por(client, MAX17042_ICHGTerm, config->ichgt_term);
512
513 max17042_override_por(client, MAX17042_AtRate, config->at_rate);
514 max17042_override_por(client, MAX17042_LearnCFG, config->learn_cfg);
515 max17042_override_por(client, MAX17042_FilterCFG, config->filter_cfg);
516 max17042_override_por(client, MAX17042_RelaxCFG, config->relax_cfg);
517 max17042_override_por(client, MAX17042_MiscCFG, config->misc_cfg);
518 max17042_override_por(client, MAX17042_MaskSOC, config->masksoc);
519
520 max17042_override_por(client, MAX17042_FullCAP, config->fullcap);
521 max17042_override_por(client, MAX17042_FullCAPNom, config->fullcapnom);
9a8422d2
RP		 522 if (chip->chip_type == MAX17042)
523 max17042_override_por(client, MAX17042_SOC_empty,
524 config->socempty);
f3a71a6e
RP		 525 max17042_override_por(client, MAX17042_LAvg_empty, config->lavg_empty);
526 max17042_override_por(client, MAX17042_dQacc, config->dqacc);
527 max17042_override_por(client, MAX17042_dPacc, config->dpacc);
528
9a8422d2
RP		 529 if (chip->chip_type == MAX17042)
530 max17042_override_por(client, MAX17042_V_empty, config->vempty);
531 else
532 max17042_override_por(client, MAX17047_V_empty, config->vempty);
f3a71a6e
RP		 533 max17042_override_por(client, MAX17042_TempNom, config->temp_nom);
534 max17042_override_por(client, MAX17042_TempLim, config->temp_lim);
535 max17042_override_por(client, MAX17042_FCTC, config->fctc);
536 max17042_override_por(client, MAX17042_RCOMP0, config->rcomp0);
537 max17042_override_por(client, MAX17042_TempCo, config->tcompc0);
9a8422d2
RP		 538 if (chip->chip_type) {
539 max17042_override_por(client, MAX17042_EmptyTempCo,
540 config->empty_tempco);
541 max17042_override_por(client, MAX17042_K_empty0,
542 config->kempty0);
543 }
f3a71a6e
RP		 544}
545
546static int max17042_init_chip(struct max17042_chip *chip)
547{
548 int ret;
549 int val;
550
551 max17042_override_por_values(chip);
552 /* After Power up, the MAX17042 requires 500mS in order
553 * to perform signal debouncing and initial SOC reporting
554 */
555 msleep(500);
556
557 /* Initialize configaration */
558 max17042_write_config_regs(chip);
559
560 /* write cell characterization data */
561 ret = max17042_init_model(chip);
562 if (ret) {
563 dev_err(&chip->client->dev, "%s init failed\n",
564 __func__);
565 return -EIO;
566 }
567 max17042_verify_model_lock(chip);
568 if (ret) {
569 dev_err(&chip->client->dev, "%s lock verify failed\n",
570 __func__);
571 return -EIO;
572 }
573 /* write custom parameters */
574 max17042_write_custom_regs(chip);
575
576 /* update capacity params */
577 max17042_update_capacity_regs(chip);
578
579 /* delay must be atleast 350mS to allow VFSOC
580 * to be calculated from the new configuration
581 */
582 msleep(350);
583
584 /* reset vfsoc0 reg */
585 max17042_reset_vfsoc0_reg(chip);
586
587 /* load new capacity params */
588 max17042_load_new_capacity_params(chip);
589
590 /* Init complete, Clear the POR bit */
591 val = max17042_read_reg(chip->client, MAX17042_STATUS);
592 max17042_write_reg(chip->client, MAX17042_STATUS,
593 val & (~STATUS_POR_BIT));
594 return 0;
595}
596
e5f3872d
RP		 597static void max17042_set_soc_threshold(struct max17042_chip *chip, u16 off)
598{
599 u16 soc, soc_tr;
600
601 /* program interrupt thesholds such that we should
602 * get interrupt for every 'off' perc change in the soc
603 */
604 soc = max17042_read_reg(chip->client, MAX17042_RepSOC) >> 8;
605 soc_tr = (soc + off) << 8;
606 soc_tr |= (soc - off);
607 max17042_write_reg(chip->client, MAX17042_SALRT_Th, soc_tr);
608}
609
e5f3872d
RP		 610static irqreturn_t max17042_thread_handler(int id, void *dev)
611{
612 struct max17042_chip *chip = dev;
613 u16 val;
614
615 val = max17042_read_reg(chip->client, MAX17042_STATUS);
5cdd4d7f
RP		 616 if ((val & STATUS_INTR_SOCMIN_BIT) ||
617 (val & STATUS_INTR_SOCMAX_BIT)) {
e5f3872d
RP		 618 dev_info(&chip->client->dev, "SOC threshold INTR\n");
619 max17042_set_soc_threshold(chip, 1);
620 }
621
622 power_supply_changed(&chip->battery);
623 return IRQ_HANDLED;
624}
f3a71a6e
RP		 625
626static void max17042_init_worker(struct work_struct *work)
627{
628 struct max17042_chip *chip = container_of(work,
629 struct max17042_chip, work);
630 int ret;
631
632 /* Initialize registers according to values from the platform data */
633 if (chip->pdata->enable_por_init && chip->pdata->config_data) {
634 ret = max17042_init_chip(chip);
635 if (ret)
636 return;
637 }
638
639 chip->init_complete = 1;
640}
641
3832246d
KL		 642#ifdef CONFIG_OF
643static struct max17042_platform_data *
644max17042_get_pdata(struct device *dev)
645{
646 struct device_node *np = dev->of_node;
647 u32 prop;
648 struct max17042_platform_data *pdata;
649
650 if (!np)
651 return dev->platform_data;
652
653 pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL);
654 if (!pdata)
655 return NULL;
656
657 /*
658 * Require current sense resistor value to be specified for
659 * current-sense functionality to be enabled at all.
660 */
661 if (of_property_read_u32(np, "maxim,rsns-microohm", &prop) == 0) {
662 pdata->r_sns = prop;
663 pdata->enable_current_sense = true;
664 }
665
666 return pdata;
667}
668#else
669static struct max17042_platform_data *
670max17042_get_pdata(struct device *dev)
671{
672 return dev->platform_data;
673}
674#endif
675
359ab9f5
MH		 676static int __devinit max17042_probe(struct i2c_client *client,
677 const struct i2c_device_id *id)
678{
679 struct i2c_adapter *adapter = to_i2c_adapter(client->dev.parent);
680 struct max17042_chip *chip;
681 int ret;
f3a71a6e 682 int reg;
359ab9f5
MH		 683
684 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_WORD_DATA))
685 return -EIO;
686
2f3b4342 687 chip = devm_kzalloc(&client->dev, sizeof(*chip), GFP_KERNEL);
359ab9f5
MH		 688 if (!chip)
689 return -ENOMEM;
690
691 chip->client = client;
3832246d
KL		 692 chip->pdata = max17042_get_pdata(&client->dev);
693 if (!chip->pdata) {
694 dev_err(&client->dev, "no platform data provided\n");
695 return -EINVAL;
696 }
359ab9f5
MH		 697
698 i2c_set_clientdata(client, chip);
699
9a8422d2
RP		 700 ret = max17042_read_reg(chip->client, MAX17042_DevName);
701 if (ret == MAX17042_IC_VERSION) {
702 dev_dbg(&client->dev, "chip type max17042 detected\n");
703 chip->chip_type = MAX17042;
704 } else if (ret == MAX17047_IC_VERSION) {
705 dev_dbg(&client->dev, "chip type max17047/50 detected\n");
706 chip->chip_type = MAX17047;
707 } else {
708 dev_err(&client->dev, "device version mismatch: %x\n", ret);
709 return -EIO;
710 }
711
712 chip->battery.name = "max170xx_battery";
359ab9f5
MH		 713 chip->battery.type = POWER_SUPPLY_TYPE_BATTERY;
714 chip->battery.get_property = max17042_get_property;
715 chip->battery.properties = max17042_battery_props;
716 chip->battery.num_properties = ARRAY_SIZE(max17042_battery_props);
717
086ef502
DK		 718 /* When current is not measured,
719 * CURRENT_NOW and CURRENT_AVG properties should be invisible. */
720 if (!chip->pdata->enable_current_sense)
721 chip->battery.num_properties -= 2;
722
4cfa892c
PR		 723 if (chip->pdata->r_sns == 0)
724 chip->pdata->r_sns = MAX17042_DEFAULT_SNS_RESISTOR;
725
086ef502
DK		 726 if (chip->pdata->init_data)
727 max17042_set_reg(client, chip->pdata->init_data,
f3a71a6e 728 chip->pdata->num_init_data);
086ef502 729
359ab9f5
MH		 730 if (!chip->pdata->enable_current_sense) {
731 max17042_write_reg(client, MAX17042_CGAIN, 0x0000);
732 max17042_write_reg(client, MAX17042_MiscCFG, 0x0003);
733 max17042_write_reg(client, MAX17042_LearnCFG, 0x0007);
734 }
735
243e3527
RP		 736 ret = power_supply_register(&client->dev, &chip->battery);
737 if (ret) {
738 dev_err(&client->dev, "failed: power supply register\n");
739 return ret;
740 }
741
e5f3872d 742 if (client->irq) {
5cdd4d7f 743 ret = request_threaded_irq(client->irq, NULL,
e5f3872d 744 max17042_thread_handler,
5cdd4d7f
RP		 745 IRQF_TRIGGER_FALLING,
746 chip->battery.name, chip);
e5f3872d
RP		 747 if (!ret) {
748 reg = max17042_read_reg(client, MAX17042_CONFIG);
749 reg |= CONFIG_ALRT_BIT_ENBL;
750 max17042_write_reg(client, MAX17042_CONFIG, reg);
751 max17042_set_soc_threshold(chip, 1);
e5ba50bc
RP		 752 } else {
753 client->irq = 0;
e5f3872d
RP		 754 dev_err(&client->dev, "%s(): cannot get IRQ\n",
755 __func__);
e5ba50bc 756 }
e5f3872d
RP		 757 }
758
f3a71a6e 759 reg = max17042_read_reg(chip->client, MAX17042_STATUS);
f3a71a6e
RP		 760 if (reg & STATUS_POR_BIT) {
761 INIT_WORK(&chip->work, max17042_init_worker);
762 schedule_work(&chip->work);
763 } else {
764 chip->init_complete = 1;
765 }
766
243e3527 767 return 0;
359ab9f5
MH		 768}
769
770static int __devexit max17042_remove(struct i2c_client *client)
771{
772 struct max17042_chip *chip = i2c_get_clientdata(client);
773
bb28da90
RP		 774 if (client->irq)
775 free_irq(client->irq, chip);
359ab9f5 776 power_supply_unregister(&chip->battery);
359ab9f5
MH		 777 return 0;
778}
779
48bc1774
RP		 780#ifdef CONFIG_PM
781static int max17042_suspend(struct device *dev)
782{
783 struct max17042_chip *chip = dev_get_drvdata(dev);
784
48e41c70
AV		 785 /*
786 * disable the irq and enable irq_wake
48bc1774
RP		 787 * capability to the interrupt line.
788 */
789 if (chip->client->irq) {
790 disable_irq(chip->client->irq);
791 enable_irq_wake(chip->client->irq);
792 }
793
794 return 0;
795}
796
797static int max17042_resume(struct device *dev)
798{
799 struct max17042_chip *chip = dev_get_drvdata(dev);
800
801 if (chip->client->irq) {
802 disable_irq_wake(chip->client->irq);
803 enable_irq(chip->client->irq);
804 /* re-program the SOC thresholds to 1% change */
805 max17042_set_soc_threshold(chip, 1);
806 }
807
808 return 0;
809}
48e41c70
AV		 810
811static const struct dev_pm_ops max17042_pm_ops = {
812 .suspend = max17042_suspend,
813 .resume = max17042_resume,
814};
815
816#define MAX17042_PM_OPS (&max17042_pm_ops)
48bc1774 817#else
48e41c70 818#define MAX17042_PM_OPS NULL
48bc1774
RP		 819#endif
820
3832246d
KL		 821#ifdef CONFIG_OF
822static const struct of_device_id max17042_dt_match[] = {
823 { .compatible = "maxim,max17042" },
9a8422d2
RP		 824 { .compatible = "maxim,max17047" },
825 { .compatible = "maxim,max17050" },
3832246d
KL		 826 { },
827};
828MODULE_DEVICE_TABLE(of, max17042_dt_match);
829#endif
830
359ab9f5
MH		 831static const struct i2c_device_id max17042_id[] = {
832 { "max17042", 0 },
9a8422d2
RP		 833 { "max17047", 1 },
834 { "max17050", 2 },
359ab9f5
MH		 835 { }
836};
837MODULE_DEVICE_TABLE(i2c, max17042_id);
838
839static struct i2c_driver max17042_i2c_driver = {
840 .driver = {
841 .name = "max17042",
3832246d 842 .of_match_table = of_match_ptr(max17042_dt_match),
48e41c70 843 .pm = MAX17042_PM_OPS,
359ab9f5
MH		 844 },
845 .probe = max17042_probe,
846 .remove = __devexit_p(max17042_remove),
847 .id_table = max17042_id,
848};
5ff92e7a 849module_i2c_driver(max17042_i2c_driver);
359ab9f5
MH		 850
851MODULE_AUTHOR("MyungJoo Ham <myungjoo.ham@samsung.com>");
852MODULE_DESCRIPTION("MAX17042 Fuel Gauge");
853MODULE_LICENSE("GPL");
Linux 6.x block layer and io_uring tree(s)