iw_cxgb4: gracefully handle unknown CQE status errors
[linux-2.6-block.git] / drivers / pinctrl / samsung / pinctrl-samsung.c
CommitLineData
30574f0d
TA
1/*
2 * pin-controller/pin-mux/pin-config/gpio-driver for Samsung's SoC's.
3 *
4 * Copyright (c) 2012 Samsung Electronics Co., Ltd.
5 * http://www.samsung.com
6 * Copyright (c) 2012 Linaro Ltd
7 * http://www.linaro.org
8 *
9 * Author: Thomas Abraham <thomas.ab@samsung.com>
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
15 *
16 * This driver implements the Samsung pinctrl driver. It supports setting up of
17 * pinmux and pinconf configurations. The gpiolib interface is also included.
18 * External interrupt (gpio and wakeup) support are not included in this driver
19 * but provides extensions to which platform specific implementation of the gpio
20 * and wakeup interrupts can be hooked to.
21 */
22
23#include <linux/module.h>
24#include <linux/platform_device.h>
25#include <linux/io.h>
26#include <linux/slab.h>
27#include <linux/err.h>
28#include <linux/gpio.h>
a19fe2d4 29#include <linux/irqdomain.h>
19846950 30#include <linux/spinlock.h>
d9f99863 31#include <linux/syscore_ops.h>
30574f0d 32
ebe629a3 33#include "../core.h"
30574f0d
TA
34#include "pinctrl-samsung.h"
35
36#define GROUP_SUFFIX "-grp"
37#define GSUFFIX_LEN sizeof(GROUP_SUFFIX)
38#define FUNCTION_SUFFIX "-mux"
39#define FSUFFIX_LEN sizeof(FUNCTION_SUFFIX)
40
41/* list of all possible config options supported */
d5fd5da2 42static struct pin_config {
9a2c1c3b
TF
43 const char *property;
44 enum pincfg_type param;
45} cfg_params[] = {
30574f0d
TA
46 { "samsung,pin-pud", PINCFG_TYPE_PUD },
47 { "samsung,pin-drv", PINCFG_TYPE_DRV },
48 { "samsung,pin-con-pdn", PINCFG_TYPE_CON_PDN },
49 { "samsung,pin-pud-pdn", PINCFG_TYPE_PUD_PDN },
2700bc01 50 { "samsung,pin-val", PINCFG_TYPE_DAT },
30574f0d
TA
51};
52
d9f99863 53/* Global list of devices (struct samsung_pinctrl_drv_data) */
b9408975 54static LIST_HEAD(drvdata_list);
d9f99863 55
6fb6f1ba 56static unsigned int pin_base;
40ba6227 57
d3a7b9e3
TF
58static inline struct samsung_pin_bank *gc_to_pin_bank(struct gpio_chip *gc)
59{
60 return container_of(gc, struct samsung_pin_bank, gpio_chip);
61}
62
30574f0d
TA
63static int samsung_get_group_count(struct pinctrl_dev *pctldev)
64{
9a2c1c3b 65 struct samsung_pinctrl_drv_data *pmx = pinctrl_dev_get_drvdata(pctldev);
30574f0d 66
9a2c1c3b 67 return pmx->nr_groups;
30574f0d
TA
68}
69
30574f0d 70static const char *samsung_get_group_name(struct pinctrl_dev *pctldev,
9a2c1c3b 71 unsigned group)
30574f0d 72{
9a2c1c3b 73 struct samsung_pinctrl_drv_data *pmx = pinctrl_dev_get_drvdata(pctldev);
30574f0d 74
9a2c1c3b 75 return pmx->pin_groups[group].name;
30574f0d
TA
76}
77
30574f0d 78static int samsung_get_group_pins(struct pinctrl_dev *pctldev,
9a2c1c3b
TF
79 unsigned group,
80 const unsigned **pins,
81 unsigned *num_pins)
30574f0d 82{
9a2c1c3b
TF
83 struct samsung_pinctrl_drv_data *pmx = pinctrl_dev_get_drvdata(pctldev);
84
85 *pins = pmx->pin_groups[group].pins;
86 *num_pins = pmx->pin_groups[group].num_pins;
30574f0d 87
30574f0d
TA
88 return 0;
89}
90
9a2c1c3b
TF
91static int reserve_map(struct device *dev, struct pinctrl_map **map,
92 unsigned *reserved_maps, unsigned *num_maps,
93 unsigned reserve)
94{
95 unsigned old_num = *reserved_maps;
96 unsigned new_num = *num_maps + reserve;
97 struct pinctrl_map *new_map;
30574f0d 98
9a2c1c3b
TF
99 if (old_num >= new_num)
100 return 0;
30574f0d 101
9a2c1c3b
TF
102 new_map = krealloc(*map, sizeof(*new_map) * new_num, GFP_KERNEL);
103 if (!new_map) {
104 dev_err(dev, "krealloc(map) failed\n");
30574f0d
TA
105 return -ENOMEM;
106 }
30574f0d 107
9a2c1c3b
TF
108 memset(new_map + old_num, 0, (new_num - old_num) * sizeof(*new_map));
109
110 *map = new_map;
111 *reserved_maps = new_num;
112
113 return 0;
114}
115
116static int add_map_mux(struct pinctrl_map **map, unsigned *reserved_maps,
117 unsigned *num_maps, const char *group,
118 const char *function)
119{
120 if (WARN_ON(*num_maps == *reserved_maps))
121 return -ENOSPC;
122
123 (*map)[*num_maps].type = PIN_MAP_TYPE_MUX_GROUP;
124 (*map)[*num_maps].data.mux.group = group;
125 (*map)[*num_maps].data.mux.function = function;
126 (*num_maps)++;
127
128 return 0;
129}
130
131static int add_map_configs(struct device *dev, struct pinctrl_map **map,
132 unsigned *reserved_maps, unsigned *num_maps,
133 const char *group, unsigned long *configs,
134 unsigned num_configs)
135{
136 unsigned long *dup_configs;
137
138 if (WARN_ON(*num_maps == *reserved_maps))
139 return -ENOSPC;
140
141 dup_configs = kmemdup(configs, num_configs * sizeof(*dup_configs),
142 GFP_KERNEL);
143 if (!dup_configs) {
144 dev_err(dev, "kmemdup(configs) failed\n");
145 return -ENOMEM;
30574f0d 146 }
30574f0d 147
9a2c1c3b
TF
148 (*map)[*num_maps].type = PIN_MAP_TYPE_CONFIGS_GROUP;
149 (*map)[*num_maps].data.configs.group_or_pin = group;
150 (*map)[*num_maps].data.configs.configs = dup_configs;
151 (*map)[*num_maps].data.configs.num_configs = num_configs;
152 (*num_maps)++;
153
154 return 0;
155}
156
157static int add_config(struct device *dev, unsigned long **configs,
158 unsigned *num_configs, unsigned long config)
159{
160 unsigned old_num = *num_configs;
161 unsigned new_num = old_num + 1;
162 unsigned long *new_configs;
163
164 new_configs = krealloc(*configs, sizeof(*new_configs) * new_num,
165 GFP_KERNEL);
166 if (!new_configs) {
167 dev_err(dev, "krealloc(configs) failed\n");
168 return -ENOMEM;
30574f0d
TA
169 }
170
9a2c1c3b
TF
171 new_configs[old_num] = config;
172
173 *configs = new_configs;
174 *num_configs = new_num;
175
176 return 0;
177}
178
179static void samsung_dt_free_map(struct pinctrl_dev *pctldev,
180 struct pinctrl_map *map,
181 unsigned num_maps)
182{
183 int i;
184
185 for (i = 0; i < num_maps; i++)
186 if (map[i].type == PIN_MAP_TYPE_CONFIGS_GROUP)
187 kfree(map[i].data.configs.configs);
188
189 kfree(map);
190}
191
192static int samsung_dt_subnode_to_map(struct samsung_pinctrl_drv_data *drvdata,
193 struct device *dev,
194 struct device_node *np,
195 struct pinctrl_map **map,
196 unsigned *reserved_maps,
197 unsigned *num_maps)
198{
199 int ret, i;
200 u32 val;
201 unsigned long config;
202 unsigned long *configs = NULL;
203 unsigned num_configs = 0;
204 unsigned reserve;
205 struct property *prop;
206 const char *group;
207 bool has_func = false;
208
209 ret = of_property_read_u32(np, "samsung,pin-function", &val);
210 if (!ret)
211 has_func = true;
212
213 for (i = 0; i < ARRAY_SIZE(cfg_params); i++) {
214 ret = of_property_read_u32(np, cfg_params[i].property, &val);
215 if (!ret) {
216 config = PINCFG_PACK(cfg_params[i].param, val);
217 ret = add_config(dev, &configs, &num_configs, config);
218 if (ret < 0)
219 goto exit;
220 /* EINVAL=missing, which is fine since it's optional */
221 } else if (ret != -EINVAL) {
222 dev_err(dev, "could not parse property %s\n",
223 cfg_params[i].property);
224 }
30574f0d
TA
225 }
226
9a2c1c3b
TF
227 reserve = 0;
228 if (has_func)
229 reserve++;
230 if (num_configs)
231 reserve++;
232 ret = of_property_count_strings(np, "samsung,pins");
233 if (ret < 0) {
234 dev_err(dev, "could not parse property samsung,pins\n");
235 goto exit;
236 }
237 reserve *= ret;
238
239 ret = reserve_map(dev, map, reserved_maps, num_maps, reserve);
240 if (ret < 0)
241 goto exit;
242
243 of_property_for_each_string(np, "samsung,pins", prop, group) {
244 if (has_func) {
245 ret = add_map_mux(map, reserved_maps,
246 num_maps, group, np->full_name);
247 if (ret < 0)
248 goto exit;
30574f0d 249 }
30574f0d 250
9a2c1c3b
TF
251 if (num_configs) {
252 ret = add_map_configs(dev, map, reserved_maps,
253 num_maps, group, configs,
254 num_configs);
255 if (ret < 0)
256 goto exit;
257 }
30574f0d
TA
258 }
259
9a2c1c3b 260 ret = 0;
30574f0d 261
9a2c1c3b
TF
262exit:
263 kfree(configs);
264 return ret;
30574f0d
TA
265}
266
9a2c1c3b
TF
267static int samsung_dt_node_to_map(struct pinctrl_dev *pctldev,
268 struct device_node *np_config,
269 struct pinctrl_map **map,
270 unsigned *num_maps)
271{
272 struct samsung_pinctrl_drv_data *drvdata;
273 unsigned reserved_maps;
274 struct device_node *np;
275 int ret;
276
277 drvdata = pinctrl_dev_get_drvdata(pctldev);
278
279 reserved_maps = 0;
280 *map = NULL;
281 *num_maps = 0;
282
283 if (!of_get_child_count(np_config))
284 return samsung_dt_subnode_to_map(drvdata, pctldev->dev,
285 np_config, map,
286 &reserved_maps,
287 num_maps);
288
289 for_each_child_of_node(np_config, np) {
290 ret = samsung_dt_subnode_to_map(drvdata, pctldev->dev, np, map,
291 &reserved_maps, num_maps);
292 if (ret < 0) {
293 samsung_dt_free_map(pctldev, *map, *num_maps);
294 return ret;
30574f0d 295 }
9a2c1c3b 296 }
30574f0d 297
9a2c1c3b 298 return 0;
30574f0d
TA
299}
300
301/* list of pinctrl callbacks for the pinctrl core */
022ab148 302static const struct pinctrl_ops samsung_pctrl_ops = {
30574f0d
TA
303 .get_groups_count = samsung_get_group_count,
304 .get_group_name = samsung_get_group_name,
305 .get_group_pins = samsung_get_group_pins,
306 .dt_node_to_map = samsung_dt_node_to_map,
307 .dt_free_map = samsung_dt_free_map,
308};
309
310/* check if the selector is a valid pin function selector */
311static int samsung_get_functions_count(struct pinctrl_dev *pctldev)
312{
313 struct samsung_pinctrl_drv_data *drvdata;
314
315 drvdata = pinctrl_dev_get_drvdata(pctldev);
316 return drvdata->nr_functions;
317}
318
319/* return the name of the pin function specified */
320static const char *samsung_pinmux_get_fname(struct pinctrl_dev *pctldev,
321 unsigned selector)
322{
323 struct samsung_pinctrl_drv_data *drvdata;
324
325 drvdata = pinctrl_dev_get_drvdata(pctldev);
326 return drvdata->pmx_functions[selector].name;
327}
328
329/* return the groups associated for the specified function selector */
330static int samsung_pinmux_get_groups(struct pinctrl_dev *pctldev,
331 unsigned selector, const char * const **groups,
332 unsigned * const num_groups)
333{
334 struct samsung_pinctrl_drv_data *drvdata;
335
336 drvdata = pinctrl_dev_get_drvdata(pctldev);
337 *groups = drvdata->pmx_functions[selector].groups;
338 *num_groups = drvdata->pmx_functions[selector].num_groups;
339 return 0;
340}
341
342/*
343 * given a pin number that is local to a pin controller, find out the pin bank
344 * and the register base of the pin bank.
345 */
62f14c0e
TF
346static void pin_to_reg_bank(struct samsung_pinctrl_drv_data *drvdata,
347 unsigned pin, void __iomem **reg, u32 *offset,
30574f0d
TA
348 struct samsung_pin_bank **bank)
349{
30574f0d
TA
350 struct samsung_pin_bank *b;
351
1bf00d7a 352 b = drvdata->pin_banks;
30574f0d
TA
353
354 while ((pin >= b->pin_base) &&
355 ((b->pin_base + b->nr_pins - 1) < pin))
356 b++;
357
358 *reg = drvdata->virt_base + b->pctl_offset;
359 *offset = pin - b->pin_base;
360 if (bank)
361 *bank = b;
30574f0d
TA
362}
363
364/* enable or disable a pinmux function */
365static void samsung_pinmux_setup(struct pinctrl_dev *pctldev, unsigned selector,
366 unsigned group, bool enable)
367{
368 struct samsung_pinctrl_drv_data *drvdata;
94ce944b 369 const struct samsung_pin_bank_type *type;
30574f0d
TA
370 struct samsung_pin_bank *bank;
371 void __iomem *reg;
9a2c1c3b 372 u32 mask, shift, data, pin_offset;
19846950 373 unsigned long flags;
9a2c1c3b
TF
374 const struct samsung_pmx_func *func;
375 const struct samsung_pin_group *grp;
30574f0d
TA
376
377 drvdata = pinctrl_dev_get_drvdata(pctldev);
9a2c1c3b
TF
378 func = &drvdata->pmx_functions[selector];
379 grp = &drvdata->pin_groups[group];
30574f0d 380
1bf00d7a 381 pin_to_reg_bank(drvdata, grp->pins[0] - drvdata->pin_base,
9a2c1c3b
TF
382 &reg, &pin_offset, &bank);
383 type = bank->type;
384 mask = (1 << type->fld_width[PINCFG_TYPE_FUNC]) - 1;
385 shift = pin_offset * type->fld_width[PINCFG_TYPE_FUNC];
386 if (shift >= 32) {
387 /* Some banks have two config registers */
388 shift -= 32;
389 reg += 4;
390 }
30574f0d 391
9a2c1c3b 392 spin_lock_irqsave(&bank->slock, flags);
19846950 393
9a2c1c3b
TF
394 data = readl(reg + type->reg_offset[PINCFG_TYPE_FUNC]);
395 data &= ~(mask << shift);
396 if (enable)
397 data |= func->val << shift;
398 writel(data, reg + type->reg_offset[PINCFG_TYPE_FUNC]);
19846950 399
9a2c1c3b 400 spin_unlock_irqrestore(&bank->slock, flags);
30574f0d
TA
401}
402
403/* enable a specified pinmux by writing to registers */
03e9f0ca
LW
404static int samsung_pinmux_set_mux(struct pinctrl_dev *pctldev,
405 unsigned selector,
406 unsigned group)
30574f0d
TA
407{
408 samsung_pinmux_setup(pctldev, selector, group, true);
409 return 0;
410}
411
30574f0d 412/* list of pinmux callbacks for the pinmux vertical in pinctrl core */
022ab148 413static const struct pinmux_ops samsung_pinmux_ops = {
30574f0d
TA
414 .get_functions_count = samsung_get_functions_count,
415 .get_function_name = samsung_pinmux_get_fname,
416 .get_function_groups = samsung_pinmux_get_groups,
03e9f0ca 417 .set_mux = samsung_pinmux_set_mux,
30574f0d
TA
418};
419
420/* set or get the pin config settings for a specified pin */
421static int samsung_pinconf_rw(struct pinctrl_dev *pctldev, unsigned int pin,
422 unsigned long *config, bool set)
423{
424 struct samsung_pinctrl_drv_data *drvdata;
94ce944b 425 const struct samsung_pin_bank_type *type;
30574f0d
TA
426 struct samsung_pin_bank *bank;
427 void __iomem *reg_base;
428 enum pincfg_type cfg_type = PINCFG_UNPACK_TYPE(*config);
429 u32 data, width, pin_offset, mask, shift;
430 u32 cfg_value, cfg_reg;
19846950 431 unsigned long flags;
30574f0d
TA
432
433 drvdata = pinctrl_dev_get_drvdata(pctldev);
1bf00d7a 434 pin_to_reg_bank(drvdata, pin - drvdata->pin_base, &reg_base,
30574f0d 435 &pin_offset, &bank);
499147c9 436 type = bank->type;
30574f0d 437
499147c9 438 if (cfg_type >= PINCFG_TYPE_NUM || !type->fld_width[cfg_type])
7c367d3d
TF
439 return -EINVAL;
440
499147c9 441 width = type->fld_width[cfg_type];
43fc9e7f 442 cfg_reg = type->reg_offset[cfg_type];
499147c9 443
19846950
TF
444 spin_lock_irqsave(&bank->slock, flags);
445
30574f0d
TA
446 mask = (1 << width) - 1;
447 shift = pin_offset * width;
448 data = readl(reg_base + cfg_reg);
449
450 if (set) {
451 cfg_value = PINCFG_UNPACK_VALUE(*config);
452 data &= ~(mask << shift);
453 data |= (cfg_value << shift);
454 writel(data, reg_base + cfg_reg);
455 } else {
456 data >>= shift;
457 data &= mask;
458 *config = PINCFG_PACK(cfg_type, data);
459 }
19846950
TF
460
461 spin_unlock_irqrestore(&bank->slock, flags);
462
30574f0d
TA
463 return 0;
464}
465
466/* set the pin config settings for a specified pin */
467static int samsung_pinconf_set(struct pinctrl_dev *pctldev, unsigned int pin,
03b054e9 468 unsigned long *configs, unsigned num_configs)
30574f0d 469{
03b054e9
SY
470 int i, ret;
471
472 for (i = 0; i < num_configs; i++) {
473 ret = samsung_pinconf_rw(pctldev, pin, &configs[i], true);
474 if (ret < 0)
475 return ret;
476 } /* for each config */
477
478 return 0;
30574f0d
TA
479}
480
481/* get the pin config settings for a specified pin */
482static int samsung_pinconf_get(struct pinctrl_dev *pctldev, unsigned int pin,
483 unsigned long *config)
484{
485 return samsung_pinconf_rw(pctldev, pin, config, false);
486}
487
488/* set the pin config settings for a specified pin group */
489static int samsung_pinconf_group_set(struct pinctrl_dev *pctldev,
03b054e9
SY
490 unsigned group, unsigned long *configs,
491 unsigned num_configs)
30574f0d
TA
492{
493 struct samsung_pinctrl_drv_data *drvdata;
494 const unsigned int *pins;
495 unsigned int cnt;
496
497 drvdata = pinctrl_dev_get_drvdata(pctldev);
498 pins = drvdata->pin_groups[group].pins;
499
500 for (cnt = 0; cnt < drvdata->pin_groups[group].num_pins; cnt++)
03b054e9 501 samsung_pinconf_set(pctldev, pins[cnt], configs, num_configs);
30574f0d
TA
502
503 return 0;
504}
505
506/* get the pin config settings for a specified pin group */
507static int samsung_pinconf_group_get(struct pinctrl_dev *pctldev,
508 unsigned int group, unsigned long *config)
509{
510 struct samsung_pinctrl_drv_data *drvdata;
511 const unsigned int *pins;
512
513 drvdata = pinctrl_dev_get_drvdata(pctldev);
514 pins = drvdata->pin_groups[group].pins;
515 samsung_pinconf_get(pctldev, pins[0], config);
516 return 0;
517}
518
519/* list of pinconfig callbacks for pinconfig vertical in the pinctrl code */
022ab148 520static const struct pinconf_ops samsung_pinconf_ops = {
30574f0d
TA
521 .pin_config_get = samsung_pinconf_get,
522 .pin_config_set = samsung_pinconf_set,
523 .pin_config_group_get = samsung_pinconf_group_get,
524 .pin_config_group_set = samsung_pinconf_group_set,
525};
526
527/* gpiolib gpio_set callback function */
528static void samsung_gpio_set(struct gpio_chip *gc, unsigned offset, int value)
529{
d3a7b9e3 530 struct samsung_pin_bank *bank = gc_to_pin_bank(gc);
94ce944b 531 const struct samsung_pin_bank_type *type = bank->type;
19846950 532 unsigned long flags;
30574f0d 533 void __iomem *reg;
d3a7b9e3 534 u32 data;
30574f0d 535
d3a7b9e3 536 reg = bank->drvdata->virt_base + bank->pctl_offset;
30574f0d 537
19846950
TF
538 spin_lock_irqsave(&bank->slock, flags);
539
43fc9e7f 540 data = readl(reg + type->reg_offset[PINCFG_TYPE_DAT]);
d3a7b9e3 541 data &= ~(1 << offset);
30574f0d 542 if (value)
d3a7b9e3 543 data |= 1 << offset;
43fc9e7f 544 writel(data, reg + type->reg_offset[PINCFG_TYPE_DAT]);
19846950
TF
545
546 spin_unlock_irqrestore(&bank->slock, flags);
30574f0d
TA
547}
548
549/* gpiolib gpio_get callback function */
550static int samsung_gpio_get(struct gpio_chip *gc, unsigned offset)
551{
552 void __iomem *reg;
d3a7b9e3
TF
553 u32 data;
554 struct samsung_pin_bank *bank = gc_to_pin_bank(gc);
94ce944b 555 const struct samsung_pin_bank_type *type = bank->type;
62f14c0e 556
d3a7b9e3 557 reg = bank->drvdata->virt_base + bank->pctl_offset;
30574f0d 558
43fc9e7f 559 data = readl(reg + type->reg_offset[PINCFG_TYPE_DAT]);
d3a7b9e3 560 data >>= offset;
30574f0d
TA
561 data &= 1;
562 return data;
563}
564
565/*
18c28caa
TF
566 * The calls to gpio_direction_output() and gpio_direction_input()
567 * leads to this function call.
30574f0d 568 */
18c28caa
TF
569static int samsung_gpio_set_direction(struct gpio_chip *gc,
570 unsigned offset, bool input)
571{
94ce944b 572 const struct samsung_pin_bank_type *type;
18c28caa
TF
573 struct samsung_pin_bank *bank;
574 struct samsung_pinctrl_drv_data *drvdata;
575 void __iomem *reg;
576 u32 data, mask, shift;
577 unsigned long flags;
578
579 bank = gc_to_pin_bank(gc);
580 type = bank->type;
581 drvdata = bank->drvdata;
582
583 reg = drvdata->virt_base + bank->pctl_offset +
584 type->reg_offset[PINCFG_TYPE_FUNC];
585
586 mask = (1 << type->fld_width[PINCFG_TYPE_FUNC]) - 1;
587 shift = offset * type->fld_width[PINCFG_TYPE_FUNC];
588 if (shift >= 32) {
589 /* Some banks have two config registers */
590 shift -= 32;
591 reg += 4;
592 }
593
594 spin_lock_irqsave(&bank->slock, flags);
595
596 data = readl(reg);
597 data &= ~(mask << shift);
598 if (!input)
599 data |= FUNC_OUTPUT << shift;
600 writel(data, reg);
601
602 spin_unlock_irqrestore(&bank->slock, flags);
603
604 return 0;
605}
606
607/* gpiolib gpio_direction_input callback function. */
30574f0d
TA
608static int samsung_gpio_direction_input(struct gpio_chip *gc, unsigned offset)
609{
18c28caa 610 return samsung_gpio_set_direction(gc, offset, true);
30574f0d
TA
611}
612
18c28caa 613/* gpiolib gpio_direction_output callback function. */
30574f0d
TA
614static int samsung_gpio_direction_output(struct gpio_chip *gc, unsigned offset,
615 int value)
616{
617 samsung_gpio_set(gc, offset, value);
18c28caa 618 return samsung_gpio_set_direction(gc, offset, false);
30574f0d
TA
619}
620
a19fe2d4
TF
621/*
622 * gpiolib gpio_to_irq callback function. Creates a mapping between a GPIO pin
623 * and a virtual IRQ, if not already present.
624 */
625static int samsung_gpio_to_irq(struct gpio_chip *gc, unsigned offset)
626{
627 struct samsung_pin_bank *bank = gc_to_pin_bank(gc);
628 unsigned int virq;
629
630 if (!bank->irq_domain)
631 return -ENXIO;
632
633 virq = irq_create_mapping(bank->irq_domain, offset);
634
635 return (virq) ? : -ENXIO;
636}
637
9a2c1c3b
TF
638static struct samsung_pin_group *samsung_pinctrl_create_groups(
639 struct device *dev,
640 struct samsung_pinctrl_drv_data *drvdata,
641 unsigned int *cnt)
30574f0d 642{
9a2c1c3b
TF
643 struct pinctrl_desc *ctrldesc = &drvdata->pctl;
644 struct samsung_pin_group *groups, *grp;
645 const struct pinctrl_pin_desc *pdesc;
646 int i;
647
648 groups = devm_kzalloc(dev, ctrldesc->npins * sizeof(*groups),
649 GFP_KERNEL);
650 if (!groups)
651 return ERR_PTR(-EINVAL);
652 grp = groups;
653
654 pdesc = ctrldesc->pins;
655 for (i = 0; i < ctrldesc->npins; ++i, ++pdesc, ++grp) {
656 grp->name = pdesc->name;
657 grp->pins = &pdesc->number;
658 grp->num_pins = 1;
659 }
660
661 *cnt = ctrldesc->npins;
662 return groups;
663}
30574f0d 664
9a2c1c3b
TF
665static int samsung_pinctrl_create_function(struct device *dev,
666 struct samsung_pinctrl_drv_data *drvdata,
667 struct device_node *func_np,
668 struct samsung_pmx_func *func)
669{
670 int npins;
671 int ret;
672 int i;
673
674 if (of_property_read_u32(func_np, "samsung,pin-function", &func->val))
675 return 0;
676
677 npins = of_property_count_strings(func_np, "samsung,pins");
678 if (npins < 1) {
679 dev_err(dev, "invalid pin list in %s node", func_np->name);
30574f0d
TA
680 return -EINVAL;
681 }
682
9a2c1c3b
TF
683 func->name = func_np->full_name;
684
685 func->groups = devm_kzalloc(dev, npins * sizeof(char *), GFP_KERNEL);
686 if (!func->groups)
30574f0d 687 return -ENOMEM;
30574f0d 688
9a2c1c3b
TF
689 for (i = 0; i < npins; ++i) {
690 const char *gname;
691
692 ret = of_property_read_string_index(func_np, "samsung,pins",
693 i, &gname);
694 if (ret) {
695 dev_err(dev,
696 "failed to read pin name %d from %s node\n",
697 i, func_np->name);
698 return ret;
30574f0d 699 }
9a2c1c3b
TF
700
701 func->groups[i] = gname;
30574f0d
TA
702 }
703
9a2c1c3b
TF
704 func->num_groups = npins;
705 return 1;
30574f0d
TA
706}
707
9a2c1c3b
TF
708static struct samsung_pmx_func *samsung_pinctrl_create_functions(
709 struct device *dev,
710 struct samsung_pinctrl_drv_data *drvdata,
711 unsigned int *cnt)
30574f0d 712{
9a2c1c3b 713 struct samsung_pmx_func *functions, *func;
30574f0d
TA
714 struct device_node *dev_np = dev->of_node;
715 struct device_node *cfg_np;
9a2c1c3b 716 unsigned int func_cnt = 0;
30574f0d
TA
717 int ret;
718
9a2c1c3b
TF
719 /*
720 * Iterate over all the child nodes of the pin controller node
721 * and create pin groups and pin function lists.
722 */
723 for_each_child_of_node(dev_np, cfg_np) {
724 struct device_node *func_np;
30574f0d 725
9a2c1c3b
TF
726 if (!of_get_child_count(cfg_np)) {
727 if (!of_find_property(cfg_np,
728 "samsung,pin-function", NULL))
729 continue;
730 ++func_cnt;
731 continue;
732 }
733
734 for_each_child_of_node(cfg_np, func_np) {
735 if (!of_find_property(func_np,
736 "samsung,pin-function", NULL))
737 continue;
738 ++func_cnt;
739 }
30574f0d 740 }
30574f0d 741
9a2c1c3b
TF
742 functions = devm_kzalloc(dev, func_cnt * sizeof(*functions),
743 GFP_KERNEL);
30574f0d
TA
744 if (!functions) {
745 dev_err(dev, "failed to allocate memory for function list\n");
9a2c1c3b 746 return ERR_PTR(-EINVAL);
30574f0d
TA
747 }
748 func = functions;
749
750 /*
751 * Iterate over all the child nodes of the pin controller node
752 * and create pin groups and pin function lists.
753 */
9a2c1c3b 754 func_cnt = 0;
30574f0d 755 for_each_child_of_node(dev_np, cfg_np) {
9a2c1c3b
TF
756 struct device_node *func_np;
757
758 if (!of_get_child_count(cfg_np)) {
759 ret = samsung_pinctrl_create_function(dev, drvdata,
760 cfg_np, func);
761 if (ret < 0)
762 return ERR_PTR(ret);
763 if (ret > 0) {
764 ++func;
765 ++func_cnt;
766 }
30574f0d 767 continue;
9a2c1c3b 768 }
30574f0d 769
9a2c1c3b
TF
770 for_each_child_of_node(cfg_np, func_np) {
771 ret = samsung_pinctrl_create_function(dev, drvdata,
772 func_np, func);
773 if (ret < 0)
774 return ERR_PTR(ret);
775 if (ret > 0) {
776 ++func;
777 ++func_cnt;
778 }
30574f0d 779 }
9a2c1c3b 780 }
30574f0d 781
9a2c1c3b
TF
782 *cnt = func_cnt;
783 return functions;
784}
30574f0d 785
9a2c1c3b
TF
786/*
787 * Parse the information about all the available pin groups and pin functions
788 * from device node of the pin-controller. A pin group is formed with all
789 * the pins listed in the "samsung,pins" property.
790 */
30574f0d 791
9a2c1c3b
TF
792static int samsung_pinctrl_parse_dt(struct platform_device *pdev,
793 struct samsung_pinctrl_drv_data *drvdata)
794{
795 struct device *dev = &pdev->dev;
796 struct samsung_pin_group *groups;
797 struct samsung_pmx_func *functions;
798 unsigned int grp_cnt = 0, func_cnt = 0;
799
800 groups = samsung_pinctrl_create_groups(dev, drvdata, &grp_cnt);
801 if (IS_ERR(groups)) {
802 dev_err(dev, "failed to parse pin groups\n");
803 return PTR_ERR(groups);
804 }
805
806 functions = samsung_pinctrl_create_functions(dev, drvdata, &func_cnt);
807 if (IS_ERR(functions)) {
808 dev_err(dev, "failed to parse pin functions\n");
44a074ff 809 return PTR_ERR(functions);
30574f0d
TA
810 }
811
812 drvdata->pin_groups = groups;
813 drvdata->nr_groups = grp_cnt;
814 drvdata->pmx_functions = functions;
9a2c1c3b 815 drvdata->nr_functions = func_cnt;
30574f0d
TA
816
817 return 0;
818}
819
820/* register the pinctrl interface with the pinctrl subsystem */
150632b0
GKH
821static int samsung_pinctrl_register(struct platform_device *pdev,
822 struct samsung_pinctrl_drv_data *drvdata)
30574f0d
TA
823{
824 struct pinctrl_desc *ctrldesc = &drvdata->pctl;
825 struct pinctrl_pin_desc *pindesc, *pdesc;
826 struct samsung_pin_bank *pin_bank;
827 char *pin_names;
828 int pin, bank, ret;
829
830 ctrldesc->name = "samsung-pinctrl";
831 ctrldesc->owner = THIS_MODULE;
832 ctrldesc->pctlops = &samsung_pctrl_ops;
833 ctrldesc->pmxops = &samsung_pinmux_ops;
834 ctrldesc->confops = &samsung_pinconf_ops;
835
836 pindesc = devm_kzalloc(&pdev->dev, sizeof(*pindesc) *
1bf00d7a 837 drvdata->nr_pins, GFP_KERNEL);
30574f0d
TA
838 if (!pindesc) {
839 dev_err(&pdev->dev, "mem alloc for pin descriptors failed\n");
840 return -ENOMEM;
841 }
842 ctrldesc->pins = pindesc;
1bf00d7a 843 ctrldesc->npins = drvdata->nr_pins;
30574f0d
TA
844
845 /* dynamically populate the pin number and pin name for pindesc */
846 for (pin = 0, pdesc = pindesc; pin < ctrldesc->npins; pin++, pdesc++)
1bf00d7a 847 pdesc->number = pin + drvdata->pin_base;
30574f0d
TA
848
849 /*
850 * allocate space for storing the dynamically generated names for all
851 * the pins which belong to this pin-controller.
852 */
853 pin_names = devm_kzalloc(&pdev->dev, sizeof(char) * PIN_NAME_LENGTH *
1bf00d7a 854 drvdata->nr_pins, GFP_KERNEL);
30574f0d
TA
855 if (!pin_names) {
856 dev_err(&pdev->dev, "mem alloc for pin names failed\n");
857 return -ENOMEM;
858 }
859
860 /* for each pin, the name of the pin is pin-bank name + pin number */
1bf00d7a
TF
861 for (bank = 0; bank < drvdata->nr_banks; bank++) {
862 pin_bank = &drvdata->pin_banks[bank];
30574f0d
TA
863 for (pin = 0; pin < pin_bank->nr_pins; pin++) {
864 sprintf(pin_names, "%s-%d", pin_bank->name, pin);
865 pdesc = pindesc + pin_bank->pin_base + pin;
866 pdesc->name = pin_names;
867 pin_names += PIN_NAME_LENGTH;
868 }
869 }
870
529301c1
TF
871 ret = samsung_pinctrl_parse_dt(pdev, drvdata);
872 if (ret)
873 return ret;
874
30574f0d 875 drvdata->pctl_dev = pinctrl_register(ctrldesc, &pdev->dev, drvdata);
323de9ef 876 if (IS_ERR(drvdata->pctl_dev)) {
30574f0d 877 dev_err(&pdev->dev, "could not register pinctrl driver\n");
323de9ef 878 return PTR_ERR(drvdata->pctl_dev);
30574f0d
TA
879 }
880
1bf00d7a
TF
881 for (bank = 0; bank < drvdata->nr_banks; ++bank) {
882 pin_bank = &drvdata->pin_banks[bank];
d3a7b9e3
TF
883 pin_bank->grange.name = pin_bank->name;
884 pin_bank->grange.id = bank;
1bf00d7a 885 pin_bank->grange.pin_base = drvdata->pin_base
6c6ce620 886 + pin_bank->pin_base;
d3a7b9e3
TF
887 pin_bank->grange.base = pin_bank->gpio_chip.base;
888 pin_bank->grange.npins = pin_bank->gpio_chip.ngpio;
889 pin_bank->grange.gc = &pin_bank->gpio_chip;
890 pinctrl_add_gpio_range(drvdata->pctl_dev, &pin_bank->grange);
891 }
30574f0d 892
30574f0d
TA
893 return 0;
894}
895
6c6ce620
TF
896static int samsung_gpio_request(struct gpio_chip *chip, unsigned offset)
897{
898 return pinctrl_request_gpio(chip->base + offset);
899}
900
901static void samsung_gpio_free(struct gpio_chip *chip, unsigned offset)
902{
903 pinctrl_free_gpio(chip->base + offset);
904}
905
d3a7b9e3 906static const struct gpio_chip samsung_gpiolib_chip = {
6c6ce620
TF
907 .request = samsung_gpio_request,
908 .free = samsung_gpio_free,
d3a7b9e3
TF
909 .set = samsung_gpio_set,
910 .get = samsung_gpio_get,
911 .direction_input = samsung_gpio_direction_input,
912 .direction_output = samsung_gpio_direction_output,
a19fe2d4 913 .to_irq = samsung_gpio_to_irq,
d3a7b9e3
TF
914 .owner = THIS_MODULE,
915};
916
30574f0d 917/* register the gpiolib interface with the gpiolib subsystem */
150632b0
GKH
918static int samsung_gpiolib_register(struct platform_device *pdev,
919 struct samsung_pinctrl_drv_data *drvdata)
30574f0d 920{
1bf00d7a 921 struct samsung_pin_bank *bank = drvdata->pin_banks;
30574f0d
TA
922 struct gpio_chip *gc;
923 int ret;
d3a7b9e3
TF
924 int i;
925
1bf00d7a 926 for (i = 0; i < drvdata->nr_banks; ++i, ++bank) {
d3a7b9e3
TF
927 bank->gpio_chip = samsung_gpiolib_chip;
928
929 gc = &bank->gpio_chip;
1bf00d7a 930 gc->base = drvdata->pin_base + bank->pin_base;
d3a7b9e3
TF
931 gc->ngpio = bank->nr_pins;
932 gc->dev = &pdev->dev;
933 gc->of_node = bank->of_node;
934 gc->label = bank->name;
935
936 ret = gpiochip_add(gc);
937 if (ret) {
938 dev_err(&pdev->dev, "failed to register gpio_chip %s, error code: %d\n",
939 gc->label, ret);
940 goto fail;
941 }
30574f0d
TA
942 }
943
944 return 0;
d3a7b9e3
TF
945
946fail:
947 for (--i, --bank; i >= 0; --i, --bank)
2fcea6ce 948 gpiochip_remove(&bank->gpio_chip);
d3a7b9e3 949 return ret;
30574f0d
TA
950}
951
952/* unregister the gpiolib interface with the gpiolib subsystem */
150632b0
GKH
953static int samsung_gpiolib_unregister(struct platform_device *pdev,
954 struct samsung_pinctrl_drv_data *drvdata)
30574f0d 955{
1bf00d7a 956 struct samsung_pin_bank *bank = drvdata->pin_banks;
d3a7b9e3
TF
957 int i;
958
1bf00d7a 959 for (i = 0; i < drvdata->nr_banks; ++i, ++bank)
2fcea6ce 960 gpiochip_remove(&bank->gpio_chip);
1bf00d7a 961
2fcea6ce 962 return 0;
30574f0d
TA
963}
964
965static const struct of_device_id samsung_pinctrl_dt_match[];
966
967/* retrieve the soc specific data */
1bf00d7a
TF
968static const struct samsung_pin_ctrl *
969samsung_pinctrl_get_soc_data(struct samsung_pinctrl_drv_data *d,
970 struct platform_device *pdev)
30574f0d
TA
971{
972 int id;
973 const struct of_device_id *match;
6defe9a0 974 struct device_node *node = pdev->dev.of_node;
ab663789 975 struct device_node *np;
8100cf47 976 const struct samsung_pin_bank_data *bdata;
1bf00d7a 977 const struct samsung_pin_ctrl *ctrl;
40ba6227
TF
978 struct samsung_pin_bank *bank;
979 int i;
30574f0d 980
6defe9a0 981 id = of_alias_get_id(node, "pinctrl");
30574f0d
TA
982 if (id < 0) {
983 dev_err(&pdev->dev, "failed to get alias id\n");
87993273 984 return ERR_PTR(-ENOENT);
30574f0d
TA
985 }
986 match = of_match_node(samsung_pinctrl_dt_match, node);
40ba6227
TF
987 ctrl = (struct samsung_pin_ctrl *)match->data + id;
988
1bf00d7a
TF
989 d->suspend = ctrl->suspend;
990 d->resume = ctrl->resume;
1bf00d7a 991 d->nr_banks = ctrl->nr_banks;
8100cf47
TF
992 d->pin_banks = devm_kcalloc(&pdev->dev, d->nr_banks,
993 sizeof(*d->pin_banks), GFP_KERNEL);
994 if (!d->pin_banks)
995 return ERR_PTR(-ENOMEM);
1bf00d7a
TF
996
997 bank = d->pin_banks;
8100cf47
TF
998 bdata = ctrl->pin_banks;
999 for (i = 0; i < ctrl->nr_banks; ++i, ++bdata, ++bank) {
1000 bank->type = bdata->type;
1001 bank->pctl_offset = bdata->pctl_offset;
1002 bank->nr_pins = bdata->nr_pins;
1003 bank->eint_func = bdata->eint_func;
1004 bank->eint_type = bdata->eint_type;
1005 bank->eint_mask = bdata->eint_mask;
1006 bank->eint_offset = bdata->eint_offset;
1007 bank->name = bdata->name;
1008
19846950 1009 spin_lock_init(&bank->slock);
6defe9a0 1010 bank->drvdata = d;
1bf00d7a
TF
1011 bank->pin_base = d->nr_pins;
1012 d->nr_pins += bank->nr_pins;
40ba6227
TF
1013 }
1014
ab663789
TF
1015 for_each_child_of_node(node, np) {
1016 if (!of_find_property(np, "gpio-controller", NULL))
1017 continue;
1bf00d7a
TF
1018 bank = d->pin_banks;
1019 for (i = 0; i < d->nr_banks; ++i, ++bank) {
ab663789
TF
1020 if (!strcmp(bank->name, np->name)) {
1021 bank->of_node = np;
1022 break;
1023 }
1024 }
1025 }
1026
1bf00d7a
TF
1027 d->pin_base = pin_base;
1028 pin_base += d->nr_pins;
40ba6227
TF
1029
1030 return ctrl;
30574f0d
TA
1031}
1032
150632b0 1033static int samsung_pinctrl_probe(struct platform_device *pdev)
30574f0d
TA
1034{
1035 struct samsung_pinctrl_drv_data *drvdata;
1bf00d7a 1036 const struct samsung_pin_ctrl *ctrl;
30574f0d 1037 struct device *dev = &pdev->dev;
30574f0d
TA
1038 struct resource *res;
1039 int ret;
1040
1041 if (!dev->of_node) {
1042 dev_err(dev, "device tree node not found\n");
1043 return -ENODEV;
1044 }
1045
30574f0d
TA
1046 drvdata = devm_kzalloc(dev, sizeof(*drvdata), GFP_KERNEL);
1047 if (!drvdata) {
1048 dev_err(dev, "failed to allocate memory for driver's "
1049 "private data\n");
1050 return -ENOMEM;
1051 }
6defe9a0
TF
1052
1053 ctrl = samsung_pinctrl_get_soc_data(drvdata, pdev);
87993273 1054 if (IS_ERR(ctrl)) {
6defe9a0 1055 dev_err(&pdev->dev, "driver data not available\n");
87993273 1056 return PTR_ERR(ctrl);
6defe9a0 1057 }
30574f0d
TA
1058 drvdata->dev = dev;
1059
1060 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
9e0c1fb2
TR
1061 drvdata->virt_base = devm_ioremap_resource(&pdev->dev, res);
1062 if (IS_ERR(drvdata->virt_base))
1063 return PTR_ERR(drvdata->virt_base);
30574f0d
TA
1064
1065 res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
1066 if (res)
1067 drvdata->irq = res->start;
1068
1069 ret = samsung_gpiolib_register(pdev, drvdata);
1070 if (ret)
1071 return ret;
1072
1073 ret = samsung_pinctrl_register(pdev, drvdata);
1074 if (ret) {
1075 samsung_gpiolib_unregister(pdev, drvdata);
1076 return ret;
1077 }
1078
1079 if (ctrl->eint_gpio_init)
1080 ctrl->eint_gpio_init(drvdata);
1081 if (ctrl->eint_wkup_init)
1082 ctrl->eint_wkup_init(drvdata);
1083
1084 platform_set_drvdata(pdev, drvdata);
d9f99863
DA
1085
1086 /* Add to the global list */
1087 list_add_tail(&drvdata->node, &drvdata_list);
1088
30574f0d
TA
1089 return 0;
1090}
1091
d9f99863
DA
1092#ifdef CONFIG_PM
1093
1094/**
1095 * samsung_pinctrl_suspend_dev - save pinctrl state for suspend for a device
1096 *
1097 * Save data for all banks handled by this device.
1098 */
1099static void samsung_pinctrl_suspend_dev(
1100 struct samsung_pinctrl_drv_data *drvdata)
1101{
d9f99863
DA
1102 void __iomem *virt_base = drvdata->virt_base;
1103 int i;
1104
1bf00d7a
TF
1105 for (i = 0; i < drvdata->nr_banks; i++) {
1106 struct samsung_pin_bank *bank = &drvdata->pin_banks[i];
d9f99863 1107 void __iomem *reg = virt_base + bank->pctl_offset;
94ce944b
TF
1108 const u8 *offs = bank->type->reg_offset;
1109 const u8 *widths = bank->type->fld_width;
d9f99863
DA
1110 enum pincfg_type type;
1111
1112 /* Registers without a powerdown config aren't lost */
1113 if (!widths[PINCFG_TYPE_CON_PDN])
1114 continue;
1115
1116 for (type = 0; type < PINCFG_TYPE_NUM; type++)
1117 if (widths[type])
1118 bank->pm_save[type] = readl(reg + offs[type]);
1119
1120 if (widths[PINCFG_TYPE_FUNC] * bank->nr_pins > 32) {
1121 /* Some banks have two config registers */
1122 bank->pm_save[PINCFG_TYPE_NUM] =
1123 readl(reg + offs[PINCFG_TYPE_FUNC] + 4);
1124 pr_debug("Save %s @ %p (con %#010x %08x)\n",
1125 bank->name, reg,
1126 bank->pm_save[PINCFG_TYPE_FUNC],
1127 bank->pm_save[PINCFG_TYPE_NUM]);
1128 } else {
1129 pr_debug("Save %s @ %p (con %#010x)\n", bank->name,
1130 reg, bank->pm_save[PINCFG_TYPE_FUNC]);
1131 }
1132 }
21c21993 1133
1bf00d7a
TF
1134 if (drvdata->suspend)
1135 drvdata->suspend(drvdata);
d9f99863
DA
1136}
1137
1138/**
1139 * samsung_pinctrl_resume_dev - restore pinctrl state from suspend for a device
1140 *
1141 * Restore one of the banks that was saved during suspend.
1142 *
1143 * We don't bother doing anything complicated to avoid glitching lines since
1144 * we're called before pad retention is turned off.
1145 */
1146static void samsung_pinctrl_resume_dev(struct samsung_pinctrl_drv_data *drvdata)
1147{
d9f99863
DA
1148 void __iomem *virt_base = drvdata->virt_base;
1149 int i;
1150
1bf00d7a
TF
1151 if (drvdata->resume)
1152 drvdata->resume(drvdata);
21c21993 1153
1bf00d7a
TF
1154 for (i = 0; i < drvdata->nr_banks; i++) {
1155 struct samsung_pin_bank *bank = &drvdata->pin_banks[i];
d9f99863 1156 void __iomem *reg = virt_base + bank->pctl_offset;
94ce944b
TF
1157 const u8 *offs = bank->type->reg_offset;
1158 const u8 *widths = bank->type->fld_width;
d9f99863
DA
1159 enum pincfg_type type;
1160
1161 /* Registers without a powerdown config aren't lost */
1162 if (!widths[PINCFG_TYPE_CON_PDN])
1163 continue;
1164
1165 if (widths[PINCFG_TYPE_FUNC] * bank->nr_pins > 32) {
1166 /* Some banks have two config registers */
1167 pr_debug("%s @ %p (con %#010x %08x => %#010x %08x)\n",
1168 bank->name, reg,
1169 readl(reg + offs[PINCFG_TYPE_FUNC]),
1170 readl(reg + offs[PINCFG_TYPE_FUNC] + 4),
1171 bank->pm_save[PINCFG_TYPE_FUNC],
1172 bank->pm_save[PINCFG_TYPE_NUM]);
1173 writel(bank->pm_save[PINCFG_TYPE_NUM],
1174 reg + offs[PINCFG_TYPE_FUNC] + 4);
1175 } else {
1176 pr_debug("%s @ %p (con %#010x => %#010x)\n", bank->name,
1177 reg, readl(reg + offs[PINCFG_TYPE_FUNC]),
1178 bank->pm_save[PINCFG_TYPE_FUNC]);
1179 }
1180 for (type = 0; type < PINCFG_TYPE_NUM; type++)
1181 if (widths[type])
1182 writel(bank->pm_save[type], reg + offs[type]);
1183 }
1184}
1185
1186/**
1187 * samsung_pinctrl_suspend - save pinctrl state for suspend
1188 *
1189 * Save data for all banks across all devices.
1190 */
1191static int samsung_pinctrl_suspend(void)
1192{
1193 struct samsung_pinctrl_drv_data *drvdata;
1194
1195 list_for_each_entry(drvdata, &drvdata_list, node) {
1196 samsung_pinctrl_suspend_dev(drvdata);
1197 }
1198
1199 return 0;
1200}
1201
1202/**
1203 * samsung_pinctrl_resume - restore pinctrl state for suspend
1204 *
1205 * Restore data for all banks across all devices.
1206 */
1207static void samsung_pinctrl_resume(void)
1208{
1209 struct samsung_pinctrl_drv_data *drvdata;
1210
1211 list_for_each_entry_reverse(drvdata, &drvdata_list, node) {
1212 samsung_pinctrl_resume_dev(drvdata);
1213 }
1214}
1215
1216#else
1217#define samsung_pinctrl_suspend NULL
1218#define samsung_pinctrl_resume NULL
1219#endif
1220
1221static struct syscore_ops samsung_pinctrl_syscore_ops = {
1222 .suspend = samsung_pinctrl_suspend,
1223 .resume = samsung_pinctrl_resume,
1224};
1225
30574f0d 1226static const struct of_device_id samsung_pinctrl_dt_match[] = {
d5517bec 1227#ifdef CONFIG_PINCTRL_EXYNOS
d97f5b98
TF
1228 { .compatible = "samsung,exynos3250-pinctrl",
1229 .data = (void *)exynos3250_pin_ctrl },
b533c868 1230 { .compatible = "samsung,exynos4210-pinctrl",
30574f0d 1231 .data = (void *)exynos4210_pin_ctrl },
b533c868 1232 { .compatible = "samsung,exynos4x12-pinctrl",
6edc794a 1233 .data = (void *)exynos4x12_pin_ctrl },
2891ba29
TF
1234 { .compatible = "samsung,exynos4415-pinctrl",
1235 .data = (void *)exynos4415_pin_ctrl },
f67faf48
TA
1236 { .compatible = "samsung,exynos5250-pinctrl",
1237 .data = (void *)exynos5250_pin_ctrl },
9a8b6079
YGJ
1238 { .compatible = "samsung,exynos5260-pinctrl",
1239 .data = (void *)exynos5260_pin_ctrl },
983dbeb3
LKA
1240 { .compatible = "samsung,exynos5420-pinctrl",
1241 .data = (void *)exynos5420_pin_ctrl },
3c5ecc9e
CC
1242 { .compatible = "samsung,exynos5433-pinctrl",
1243 .data = (void *)exynos5433_pin_ctrl },
608a26a7
MK
1244 { .compatible = "samsung,s5pv210-pinctrl",
1245 .data = (void *)s5pv210_pin_ctrl },
50cea0cf
NKC
1246 { .compatible = "samsung,exynos7-pinctrl",
1247 .data = (void *)exynos7_pin_ctrl },
61dd7261
TF
1248#endif
1249#ifdef CONFIG_PINCTRL_S3C64XX
1250 { .compatible = "samsung,s3c64xx-pinctrl",
1251 .data = s3c64xx_pin_ctrl },
af99a750
HS
1252#endif
1253#ifdef CONFIG_PINCTRL_S3C24XX
1254 { .compatible = "samsung,s3c2412-pinctrl",
1255 .data = s3c2412_pin_ctrl },
1256 { .compatible = "samsung,s3c2416-pinctrl",
1257 .data = s3c2416_pin_ctrl },
1258 { .compatible = "samsung,s3c2440-pinctrl",
1259 .data = s3c2440_pin_ctrl },
1260 { .compatible = "samsung,s3c2450-pinctrl",
1261 .data = s3c2450_pin_ctrl },
d5517bec 1262#endif
30574f0d
TA
1263 {},
1264};
1265MODULE_DEVICE_TABLE(of, samsung_pinctrl_dt_match);
1266
1267static struct platform_driver samsung_pinctrl_driver = {
1268 .probe = samsung_pinctrl_probe,
1269 .driver = {
1270 .name = "samsung-pinctrl",
606fca94 1271 .of_match_table = samsung_pinctrl_dt_match,
30574f0d
TA
1272 },
1273};
1274
1275static int __init samsung_pinctrl_drv_register(void)
1276{
d9f99863
DA
1277 /*
1278 * Register syscore ops for save/restore of registers across suspend.
1279 * It's important to ensure that this driver is running at an earlier
1280 * initcall level than any arch-specific init calls that install syscore
1281 * ops that turn off pad retention (like exynos_pm_resume).
1282 */
1283 register_syscore_ops(&samsung_pinctrl_syscore_ops);
1284
30574f0d
TA
1285 return platform_driver_register(&samsung_pinctrl_driver);
1286}
1287postcore_initcall(samsung_pinctrl_drv_register);
1288
1289static void __exit samsung_pinctrl_drv_unregister(void)
1290{
1291 platform_driver_unregister(&samsung_pinctrl_driver);
1292}
1293module_exit(samsung_pinctrl_drv_unregister);
1294
1295MODULE_AUTHOR("Thomas Abraham <thomas.ab@samsung.com>");
1296MODULE_DESCRIPTION("Samsung pinctrl driver");
1297MODULE_LICENSE("GPL v2");