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License cleanup: add SPDX GPL-2.0 license identifier to files with no license
[linux-2.6-block.git] / drivers / pinctrl / nomadik / pinctrl-nomadik-db8500.c
CommitLineData
b2441318 1// SPDX-License-Identifier: GPL-2.0
e98ea774
LW		 2#include <linux/kernel.h>
3#include <linux/pinctrl/pinctrl.h>
4#include "pinctrl-nomadik.h"
5
6/* All the pins that can be used for GPIO and some other functions */
7#define _GPIO(offset) (offset)
8
9#define DB8500_PIN_AJ5 _GPIO(0)
10#define DB8500_PIN_AJ3 _GPIO(1)
11#define DB8500_PIN_AH4 _GPIO(2)
12#define DB8500_PIN_AH3 _GPIO(3)
13#define DB8500_PIN_AH6 _GPIO(4)
14#define DB8500_PIN_AG6 _GPIO(5)
15#define DB8500_PIN_AF6 _GPIO(6)
16#define DB8500_PIN_AG5 _GPIO(7)
17#define DB8500_PIN_AD5 _GPIO(8)
18#define DB8500_PIN_AE4 _GPIO(9)
19#define DB8500_PIN_AF5 _GPIO(10)
20#define DB8500_PIN_AG4 _GPIO(11)
21#define DB8500_PIN_AC4 _GPIO(12)
22#define DB8500_PIN_AF3 _GPIO(13)
23#define DB8500_PIN_AE3 _GPIO(14)
24#define DB8500_PIN_AC3 _GPIO(15)
25#define DB8500_PIN_AD3 _GPIO(16)
26#define DB8500_PIN_AD4 _GPIO(17)
27#define DB8500_PIN_AC2 _GPIO(18)
28#define DB8500_PIN_AC1 _GPIO(19)
29#define DB8500_PIN_AB4 _GPIO(20)
30#define DB8500_PIN_AB3 _GPIO(21)
31#define DB8500_PIN_AA3 _GPIO(22)
32#define DB8500_PIN_AA4 _GPIO(23)
33#define DB8500_PIN_AB2 _GPIO(24)
34#define DB8500_PIN_Y4 _GPIO(25)
35#define DB8500_PIN_Y2 _GPIO(26)
36#define DB8500_PIN_AA2 _GPIO(27)
37#define DB8500_PIN_AA1 _GPIO(28)
38#define DB8500_PIN_W2 _GPIO(29)
39#define DB8500_PIN_W3 _GPIO(30)
40#define DB8500_PIN_V3 _GPIO(31)
41#define DB8500_PIN_V2 _GPIO(32)
42#define DB8500_PIN_AF2 _GPIO(33)
43#define DB8500_PIN_AE1 _GPIO(34)
44#define DB8500_PIN_AE2 _GPIO(35)
45#define DB8500_PIN_AG2 _GPIO(36)
46/* Hole */
47#define DB8500_PIN_F3 _GPIO(64)
48#define DB8500_PIN_F1 _GPIO(65)
49#define DB8500_PIN_G3 _GPIO(66)
50#define DB8500_PIN_G2 _GPIO(67)
51#define DB8500_PIN_E1 _GPIO(68)
52#define DB8500_PIN_E2 _GPIO(69)
53#define DB8500_PIN_G5 _GPIO(70)
54#define DB8500_PIN_G4 _GPIO(71)
55#define DB8500_PIN_H4 _GPIO(72)
56#define DB8500_PIN_H3 _GPIO(73)
57#define DB8500_PIN_J3 _GPIO(74)
58#define DB8500_PIN_H2 _GPIO(75)
59#define DB8500_PIN_J2 _GPIO(76)
60#define DB8500_PIN_H1 _GPIO(77)
61#define DB8500_PIN_F4 _GPIO(78)
62#define DB8500_PIN_E3 _GPIO(79)
63#define DB8500_PIN_E4 _GPIO(80)
64#define DB8500_PIN_D2 _GPIO(81)
65#define DB8500_PIN_C1 _GPIO(82)
66#define DB8500_PIN_D3 _GPIO(83)
67#define DB8500_PIN_C2 _GPIO(84)
68#define DB8500_PIN_D5 _GPIO(85)
69#define DB8500_PIN_C6 _GPIO(86)
70#define DB8500_PIN_B3 _GPIO(87)
71#define DB8500_PIN_C4 _GPIO(88)
72#define DB8500_PIN_E6 _GPIO(89)
73#define DB8500_PIN_A3 _GPIO(90)
74#define DB8500_PIN_B6 _GPIO(91)
75#define DB8500_PIN_D6 _GPIO(92)
76#define DB8500_PIN_B7 _GPIO(93)
77#define DB8500_PIN_D7 _GPIO(94)
78#define DB8500_PIN_E8 _GPIO(95)
79#define DB8500_PIN_D8 _GPIO(96)
80#define DB8500_PIN_D9 _GPIO(97)
81/* Hole */
82#define DB8500_PIN_A5 _GPIO(128)
83#define DB8500_PIN_B4 _GPIO(129)
84#define DB8500_PIN_C8 _GPIO(130)
85#define DB8500_PIN_A12 _GPIO(131)
86#define DB8500_PIN_C10 _GPIO(132)
87#define DB8500_PIN_B10 _GPIO(133)
88#define DB8500_PIN_B9 _GPIO(134)
89#define DB8500_PIN_A9 _GPIO(135)
90#define DB8500_PIN_C7 _GPIO(136)
91#define DB8500_PIN_A7 _GPIO(137)
92#define DB8500_PIN_C5 _GPIO(138)
93#define DB8500_PIN_C9 _GPIO(139)
94#define DB8500_PIN_B11 _GPIO(140)
95#define DB8500_PIN_C12 _GPIO(141)
96#define DB8500_PIN_C11 _GPIO(142)
97#define DB8500_PIN_D12 _GPIO(143)
98#define DB8500_PIN_B13 _GPIO(144)
99#define DB8500_PIN_C13 _GPIO(145)
100#define DB8500_PIN_D13 _GPIO(146)
101#define DB8500_PIN_C15 _GPIO(147)
102#define DB8500_PIN_B16 _GPIO(148)
103#define DB8500_PIN_B14 _GPIO(149)
104#define DB8500_PIN_C14 _GPIO(150)
105#define DB8500_PIN_D17 _GPIO(151)
106#define DB8500_PIN_D16 _GPIO(152)
107#define DB8500_PIN_B17 _GPIO(153)
108#define DB8500_PIN_C16 _GPIO(154)
109#define DB8500_PIN_C19 _GPIO(155)
110#define DB8500_PIN_C17 _GPIO(156)
111#define DB8500_PIN_A18 _GPIO(157)
112#define DB8500_PIN_C18 _GPIO(158)
113#define DB8500_PIN_B19 _GPIO(159)
114#define DB8500_PIN_B20 _GPIO(160)
115#define DB8500_PIN_D21 _GPIO(161)
116#define DB8500_PIN_D20 _GPIO(162)
117#define DB8500_PIN_C20 _GPIO(163)
118#define DB8500_PIN_B21 _GPIO(164)
119#define DB8500_PIN_C21 _GPIO(165)
120#define DB8500_PIN_A22 _GPIO(166)
121#define DB8500_PIN_B24 _GPIO(167)
122#define DB8500_PIN_C22 _GPIO(168)
123#define DB8500_PIN_D22 _GPIO(169)
124#define DB8500_PIN_C23 _GPIO(170)
125#define DB8500_PIN_D23 _GPIO(171)
126/* Hole */
127#define DB8500_PIN_AJ27 _GPIO(192)
128#define DB8500_PIN_AH27 _GPIO(193)
129#define DB8500_PIN_AF27 _GPIO(194)
130#define DB8500_PIN_AG28 _GPIO(195)
131#define DB8500_PIN_AG26 _GPIO(196)
132#define DB8500_PIN_AH24 _GPIO(197)
133#define DB8500_PIN_AG25 _GPIO(198)
134#define DB8500_PIN_AH23 _GPIO(199)
135#define DB8500_PIN_AH26 _GPIO(200)
136#define DB8500_PIN_AF24 _GPIO(201)
137#define DB8500_PIN_AF25 _GPIO(202)
138#define DB8500_PIN_AE23 _GPIO(203)
139#define DB8500_PIN_AF23 _GPIO(204)
140#define DB8500_PIN_AG23 _GPIO(205)
141#define DB8500_PIN_AG24 _GPIO(206)
142#define DB8500_PIN_AJ23 _GPIO(207)
143#define DB8500_PIN_AH16 _GPIO(208)
144#define DB8500_PIN_AG15 _GPIO(209)
145#define DB8500_PIN_AJ15 _GPIO(210)
146#define DB8500_PIN_AG14 _GPIO(211)
147#define DB8500_PIN_AF13 _GPIO(212)
148#define DB8500_PIN_AG13 _GPIO(213)
149#define DB8500_PIN_AH15 _GPIO(214)
150#define DB8500_PIN_AH13 _GPIO(215)
151#define DB8500_PIN_AG12 _GPIO(216)
152#define DB8500_PIN_AH12 _GPIO(217)
153#define DB8500_PIN_AH11 _GPIO(218)
154#define DB8500_PIN_AG10 _GPIO(219)
155#define DB8500_PIN_AH10 _GPIO(220)
156#define DB8500_PIN_AJ11 _GPIO(221)
157#define DB8500_PIN_AJ9 _GPIO(222)
158#define DB8500_PIN_AH9 _GPIO(223)
159#define DB8500_PIN_AG9 _GPIO(224)
160#define DB8500_PIN_AG8 _GPIO(225)
161#define DB8500_PIN_AF8 _GPIO(226)
162#define DB8500_PIN_AH7 _GPIO(227)
163#define DB8500_PIN_AJ6 _GPIO(228)
164#define DB8500_PIN_AG7 _GPIO(229)
165#define DB8500_PIN_AF7 _GPIO(230)
166/* Hole */
167#define DB8500_PIN_AF28 _GPIO(256)
168#define DB8500_PIN_AE29 _GPIO(257)
169#define DB8500_PIN_AD29 _GPIO(258)
170#define DB8500_PIN_AC29 _GPIO(259)
171#define DB8500_PIN_AD28 _GPIO(260)
172#define DB8500_PIN_AD26 _GPIO(261)
173#define DB8500_PIN_AE26 _GPIO(262)
174#define DB8500_PIN_AG29 _GPIO(263)
175#define DB8500_PIN_AE27 _GPIO(264)
176#define DB8500_PIN_AD27 _GPIO(265)
177#define DB8500_PIN_AC28 _GPIO(266)
178#define DB8500_PIN_AC27 _GPIO(267)
179
180/*
181 * The names of the pins are denoted by GPIO number and ball name, even
182 * though they can be used for other things than GPIO, this is the first
183 * column in the table of the data sheet and often used on schematics and
184 * such.
185 */
186static const struct pinctrl_pin_desc nmk_db8500_pins[] = {
187 PINCTRL_PIN(DB8500_PIN_AJ5, "GPIO0_AJ5"),
188 PINCTRL_PIN(DB8500_PIN_AJ3, "GPIO1_AJ3"),
189 PINCTRL_PIN(DB8500_PIN_AH4, "GPIO2_AH4"),
190 PINCTRL_PIN(DB8500_PIN_AH3, "GPIO3_AH3"),
191 PINCTRL_PIN(DB8500_PIN_AH6, "GPIO4_AH6"),
192 PINCTRL_PIN(DB8500_PIN_AG6, "GPIO5_AG6"),
193 PINCTRL_PIN(DB8500_PIN_AF6, "GPIO6_AF6"),
194 PINCTRL_PIN(DB8500_PIN_AG5, "GPIO7_AG5"),
195 PINCTRL_PIN(DB8500_PIN_AD5, "GPIO8_AD5"),
196 PINCTRL_PIN(DB8500_PIN_AE4, "GPIO9_AE4"),
197 PINCTRL_PIN(DB8500_PIN_AF5, "GPIO10_AF5"),
198 PINCTRL_PIN(DB8500_PIN_AG4, "GPIO11_AG4"),
199 PINCTRL_PIN(DB8500_PIN_AC4, "GPIO12_AC4"),
200 PINCTRL_PIN(DB8500_PIN_AF3, "GPIO13_AF3"),
201 PINCTRL_PIN(DB8500_PIN_AE3, "GPIO14_AE3"),
202 PINCTRL_PIN(DB8500_PIN_AC3, "GPIO15_AC3"),
203 PINCTRL_PIN(DB8500_PIN_AD3, "GPIO16_AD3"),
204 PINCTRL_PIN(DB8500_PIN_AD4, "GPIO17_AD4"),
205 PINCTRL_PIN(DB8500_PIN_AC2, "GPIO18_AC2"),
206 PINCTRL_PIN(DB8500_PIN_AC1, "GPIO19_AC1"),
207 PINCTRL_PIN(DB8500_PIN_AB4, "GPIO20_AB4"),
208 PINCTRL_PIN(DB8500_PIN_AB3, "GPIO21_AB3"),
209 PINCTRL_PIN(DB8500_PIN_AA3, "GPIO22_AA3"),
210 PINCTRL_PIN(DB8500_PIN_AA4, "GPIO23_AA4"),
211 PINCTRL_PIN(DB8500_PIN_AB2, "GPIO24_AB2"),
212 PINCTRL_PIN(DB8500_PIN_Y4, "GPIO25_Y4"),
213 PINCTRL_PIN(DB8500_PIN_Y2, "GPIO26_Y2"),
214 PINCTRL_PIN(DB8500_PIN_AA2, "GPIO27_AA2"),
215 PINCTRL_PIN(DB8500_PIN_AA1, "GPIO28_AA1"),
216 PINCTRL_PIN(DB8500_PIN_W2, "GPIO29_W2"),
217 PINCTRL_PIN(DB8500_PIN_W3, "GPIO30_W3"),
218 PINCTRL_PIN(DB8500_PIN_V3, "GPIO31_V3"),
219 PINCTRL_PIN(DB8500_PIN_V2, "GPIO32_V2"),
220 PINCTRL_PIN(DB8500_PIN_AF2, "GPIO33_AF2"),
221 PINCTRL_PIN(DB8500_PIN_AE1, "GPIO34_AE1"),
222 PINCTRL_PIN(DB8500_PIN_AE2, "GPIO35_AE2"),
223 PINCTRL_PIN(DB8500_PIN_AG2, "GPIO36_AG2"),
224 /* Hole */
225 PINCTRL_PIN(DB8500_PIN_F3, "GPIO64_F3"),
226 PINCTRL_PIN(DB8500_PIN_F1, "GPIO65_F1"),
227 PINCTRL_PIN(DB8500_PIN_G3, "GPIO66_G3"),
228 PINCTRL_PIN(DB8500_PIN_G2, "GPIO67_G2"),
229 PINCTRL_PIN(DB8500_PIN_E1, "GPIO68_E1"),
230 PINCTRL_PIN(DB8500_PIN_E2, "GPIO69_E2"),
231 PINCTRL_PIN(DB8500_PIN_G5, "GPIO70_G5"),
232 PINCTRL_PIN(DB8500_PIN_G4, "GPIO71_G4"),
233 PINCTRL_PIN(DB8500_PIN_H4, "GPIO72_H4"),
234 PINCTRL_PIN(DB8500_PIN_H3, "GPIO73_H3"),
235 PINCTRL_PIN(DB8500_PIN_J3, "GPIO74_J3"),
236 PINCTRL_PIN(DB8500_PIN_H2, "GPIO75_H2"),
237 PINCTRL_PIN(DB8500_PIN_J2, "GPIO76_J2"),
238 PINCTRL_PIN(DB8500_PIN_H1, "GPIO77_H1"),
239 PINCTRL_PIN(DB8500_PIN_F4, "GPIO78_F4"),
240 PINCTRL_PIN(DB8500_PIN_E3, "GPIO79_E3"),
241 PINCTRL_PIN(DB8500_PIN_E4, "GPIO80_E4"),
242 PINCTRL_PIN(DB8500_PIN_D2, "GPIO81_D2"),
243 PINCTRL_PIN(DB8500_PIN_C1, "GPIO82_C1"),
244 PINCTRL_PIN(DB8500_PIN_D3, "GPIO83_D3"),
245 PINCTRL_PIN(DB8500_PIN_C2, "GPIO84_C2"),
246 PINCTRL_PIN(DB8500_PIN_D5, "GPIO85_D5"),
247 PINCTRL_PIN(DB8500_PIN_C6, "GPIO86_C6"),
248 PINCTRL_PIN(DB8500_PIN_B3, "GPIO87_B3"),
249 PINCTRL_PIN(DB8500_PIN_C4, "GPIO88_C4"),
250 PINCTRL_PIN(DB8500_PIN_E6, "GPIO89_E6"),
251 PINCTRL_PIN(DB8500_PIN_A3, "GPIO90_A3"),
252 PINCTRL_PIN(DB8500_PIN_B6, "GPIO91_B6"),
253 PINCTRL_PIN(DB8500_PIN_D6, "GPIO92_D6"),
254 PINCTRL_PIN(DB8500_PIN_B7, "GPIO93_B7"),
255 PINCTRL_PIN(DB8500_PIN_D7, "GPIO94_D7"),
256 PINCTRL_PIN(DB8500_PIN_E8, "GPIO95_E8"),
257 PINCTRL_PIN(DB8500_PIN_D8, "GPIO96_D8"),
258 PINCTRL_PIN(DB8500_PIN_D9, "GPIO97_D9"),
259 /* Hole */
260 PINCTRL_PIN(DB8500_PIN_A5, "GPIO128_A5"),
261 PINCTRL_PIN(DB8500_PIN_B4, "GPIO129_B4"),
262 PINCTRL_PIN(DB8500_PIN_C8, "GPIO130_C8"),
263 PINCTRL_PIN(DB8500_PIN_A12, "GPIO131_A12"),
264 PINCTRL_PIN(DB8500_PIN_C10, "GPIO132_C10"),
265 PINCTRL_PIN(DB8500_PIN_B10, "GPIO133_B10"),
266 PINCTRL_PIN(DB8500_PIN_B9, "GPIO134_B9"),
267 PINCTRL_PIN(DB8500_PIN_A9, "GPIO135_A9"),
268 PINCTRL_PIN(DB8500_PIN_C7, "GPIO136_C7"),
269 PINCTRL_PIN(DB8500_PIN_A7, "GPIO137_A7"),
270 PINCTRL_PIN(DB8500_PIN_C5, "GPIO138_C5"),
271 PINCTRL_PIN(DB8500_PIN_C9, "GPIO139_C9"),
272 PINCTRL_PIN(DB8500_PIN_B11, "GPIO140_B11"),
273 PINCTRL_PIN(DB8500_PIN_C12, "GPIO141_C12"),
274 PINCTRL_PIN(DB8500_PIN_C11, "GPIO142_C11"),
275 PINCTRL_PIN(DB8500_PIN_D12, "GPIO143_D12"),
276 PINCTRL_PIN(DB8500_PIN_B13, "GPIO144_B13"),
277 PINCTRL_PIN(DB8500_PIN_C13, "GPIO145_C13"),
278 PINCTRL_PIN(DB8500_PIN_D13, "GPIO146_D13"),
279 PINCTRL_PIN(DB8500_PIN_C15, "GPIO147_C15"),
280 PINCTRL_PIN(DB8500_PIN_B16, "GPIO148_B16"),
281 PINCTRL_PIN(DB8500_PIN_B14, "GPIO149_B14"),
282 PINCTRL_PIN(DB8500_PIN_C14, "GPIO150_C14"),
283 PINCTRL_PIN(DB8500_PIN_D17, "GPIO151_D17"),
284 PINCTRL_PIN(DB8500_PIN_D16, "GPIO152_D16"),
285 PINCTRL_PIN(DB8500_PIN_B17, "GPIO153_B17"),
286 PINCTRL_PIN(DB8500_PIN_C16, "GPIO154_C16"),
287 PINCTRL_PIN(DB8500_PIN_C19, "GPIO155_C19"),
288 PINCTRL_PIN(DB8500_PIN_C17, "GPIO156_C17"),
289 PINCTRL_PIN(DB8500_PIN_A18, "GPIO157_A18"),
290 PINCTRL_PIN(DB8500_PIN_C18, "GPIO158_C18"),
291 PINCTRL_PIN(DB8500_PIN_B19, "GPIO159_B19"),
292 PINCTRL_PIN(DB8500_PIN_B20, "GPIO160_B20"),
293 PINCTRL_PIN(DB8500_PIN_D21, "GPIO161_D21"),
294 PINCTRL_PIN(DB8500_PIN_D20, "GPIO162_D20"),
295 PINCTRL_PIN(DB8500_PIN_C20, "GPIO163_C20"),
296 PINCTRL_PIN(DB8500_PIN_B21, "GPIO164_B21"),
297 PINCTRL_PIN(DB8500_PIN_C21, "GPIO165_C21"),
298 PINCTRL_PIN(DB8500_PIN_A22, "GPIO166_A22"),
299 PINCTRL_PIN(DB8500_PIN_B24, "GPIO167_B24"),
300 PINCTRL_PIN(DB8500_PIN_C22, "GPIO168_C22"),
301 PINCTRL_PIN(DB8500_PIN_D22, "GPIO169_D22"),
302 PINCTRL_PIN(DB8500_PIN_C23, "GPIO170_C23"),
303 PINCTRL_PIN(DB8500_PIN_D23, "GPIO171_D23"),
304 /* Hole */
305 PINCTRL_PIN(DB8500_PIN_AJ27, "GPIO192_AJ27"),
306 PINCTRL_PIN(DB8500_PIN_AH27, "GPIO193_AH27"),
307 PINCTRL_PIN(DB8500_PIN_AF27, "GPIO194_AF27"),
308 PINCTRL_PIN(DB8500_PIN_AG28, "GPIO195_AG28"),
309 PINCTRL_PIN(DB8500_PIN_AG26, "GPIO196_AG26"),
310 PINCTRL_PIN(DB8500_PIN_AH24, "GPIO197_AH24"),
311 PINCTRL_PIN(DB8500_PIN_AG25, "GPIO198_AG25"),
312 PINCTRL_PIN(DB8500_PIN_AH23, "GPIO199_AH23"),
313 PINCTRL_PIN(DB8500_PIN_AH26, "GPIO200_AH26"),
314 PINCTRL_PIN(DB8500_PIN_AF24, "GPIO201_AF24"),
315 PINCTRL_PIN(DB8500_PIN_AF25, "GPIO202_AF25"),
316 PINCTRL_PIN(DB8500_PIN_AE23, "GPIO203_AE23"),
317 PINCTRL_PIN(DB8500_PIN_AF23, "GPIO204_AF23"),
318 PINCTRL_PIN(DB8500_PIN_AG23, "GPIO205_AG23"),
319 PINCTRL_PIN(DB8500_PIN_AG24, "GPIO206_AG24"),
320 PINCTRL_PIN(DB8500_PIN_AJ23, "GPIO207_AJ23"),
321 PINCTRL_PIN(DB8500_PIN_AH16, "GPIO208_AH16"),
322 PINCTRL_PIN(DB8500_PIN_AG15, "GPIO209_AG15"),
323 PINCTRL_PIN(DB8500_PIN_AJ15, "GPIO210_AJ15"),
324 PINCTRL_PIN(DB8500_PIN_AG14, "GPIO211_AG14"),
325 PINCTRL_PIN(DB8500_PIN_AF13, "GPIO212_AF13"),
326 PINCTRL_PIN(DB8500_PIN_AG13, "GPIO213_AG13"),
327 PINCTRL_PIN(DB8500_PIN_AH15, "GPIO214_AH15"),
328 PINCTRL_PIN(DB8500_PIN_AH13, "GPIO215_AH13"),
329 PINCTRL_PIN(DB8500_PIN_AG12, "GPIO216_AG12"),
330 PINCTRL_PIN(DB8500_PIN_AH12, "GPIO217_AH12"),
331 PINCTRL_PIN(DB8500_PIN_AH11, "GPIO218_AH11"),
332 PINCTRL_PIN(DB8500_PIN_AG10, "GPIO219_AG10"),
333 PINCTRL_PIN(DB8500_PIN_AH10, "GPIO220_AH10"),
334 PINCTRL_PIN(DB8500_PIN_AJ11, "GPIO221_AJ11"),
335 PINCTRL_PIN(DB8500_PIN_AJ9, "GPIO222_AJ9"),
336 PINCTRL_PIN(DB8500_PIN_AH9, "GPIO223_AH9"),
337 PINCTRL_PIN(DB8500_PIN_AG9, "GPIO224_AG9"),
338 PINCTRL_PIN(DB8500_PIN_AG8, "GPIO225_AG8"),
339 PINCTRL_PIN(DB8500_PIN_AF8, "GPIO226_AF8"),
340 PINCTRL_PIN(DB8500_PIN_AH7, "GPIO227_AH7"),
341 PINCTRL_PIN(DB8500_PIN_AJ6, "GPIO228_AJ6"),
342 PINCTRL_PIN(DB8500_PIN_AG7, "GPIO229_AG7"),
343 PINCTRL_PIN(DB8500_PIN_AF7, "GPIO230_AF7"),
344 /* Hole */
345 PINCTRL_PIN(DB8500_PIN_AF28, "GPIO256_AF28"),
346 PINCTRL_PIN(DB8500_PIN_AE29, "GPIO257_AE29"),
347 PINCTRL_PIN(DB8500_PIN_AD29, "GPIO258_AD29"),
348 PINCTRL_PIN(DB8500_PIN_AC29, "GPIO259_AC29"),
349 PINCTRL_PIN(DB8500_PIN_AD28, "GPIO260_AD28"),
350 PINCTRL_PIN(DB8500_PIN_AD26, "GPIO261_AD26"),
351 PINCTRL_PIN(DB8500_PIN_AE26, "GPIO262_AE26"),
352 PINCTRL_PIN(DB8500_PIN_AG29, "GPIO263_AG29"),
353 PINCTRL_PIN(DB8500_PIN_AE27, "GPIO264_AE27"),
354 PINCTRL_PIN(DB8500_PIN_AD27, "GPIO265_AD27"),
355 PINCTRL_PIN(DB8500_PIN_AC28, "GPIO266_AC28"),
356 PINCTRL_PIN(DB8500_PIN_AC27, "GPIO267_AC27"),
357};
358
e98ea774
LW		 359/*
360 * Read the pin group names like this:
361 * u0_a_1 = first groups of pins for uart0 on alt function a
362 * i2c2_b_2 = second group of pins for i2c2 on alt function b
363 *
364 * The groups are arranged as sets per altfunction column, so we can
365 * mux in one group at a time by selecting the same altfunction for them
366 * all. When functions require pins on different altfunctions, you need
367 * to combine several groups.
368 */
369
370/* Altfunction A column */
371static const unsigned u0_a_1_pins[] = { DB8500_PIN_AJ5, DB8500_PIN_AJ3,
372 DB8500_PIN_AH4, DB8500_PIN_AH3 };
373static const unsigned u1rxtx_a_1_pins[] = { DB8500_PIN_AH6, DB8500_PIN_AG6 };
374static const unsigned u1ctsrts_a_1_pins[] = { DB8500_PIN_AF6, DB8500_PIN_AG5 };
375/* Image processor I2C line, this is driven by image processor firmware */
376static const unsigned ipi2c_a_1_pins[] = { DB8500_PIN_AD5, DB8500_PIN_AE4 };
377static const unsigned ipi2c_a_2_pins[] = { DB8500_PIN_AF5, DB8500_PIN_AG4 };
378/* MSP0 can only be on these pins, but TXD and RXD can be flipped */
379static const unsigned msp0txrx_a_1_pins[] = { DB8500_PIN_AC4, DB8500_PIN_AC3 };
380static const unsigned msp0tfstck_a_1_pins[] = { DB8500_PIN_AF3, DB8500_PIN_AE3 };
381static const unsigned msp0rfsrck_a_1_pins[] = { DB8500_PIN_AD3, DB8500_PIN_AD4 };
382/* Basic pins of the MMC/SD card 0 interface */
04d02c7a
LW		 383static const unsigned mc0_a_1_pins[] = { DB8500_PIN_AC2, /* MC0_CMDDIR */
384 DB8500_PIN_AC1, /* MC0_DAT0DIR */
385 DB8500_PIN_AB4, /* MC0_DAT2DIR */
386 DB8500_PIN_AA3, /* MC0_FBCLK */
387 DB8500_PIN_AA4, /* MC0_CLK */
388 DB8500_PIN_AB2, /* MC0_CMD */
389 DB8500_PIN_Y4, /* MC0_DAT0 */
390 DB8500_PIN_Y2, /* MC0_DAT1 */
391 DB8500_PIN_AA2, /* MC0_DAT2 */
392 DB8500_PIN_AA1 /* MC0_DAT3 */
393};
e98ea774 394/* Often only 4 bits are used, then these are not needed (only used for MMC) */
04d02c7a
LW		 395static const unsigned mc0_dat47_a_1_pins[] = { DB8500_PIN_W2, /* MC0_DAT4 */
396 DB8500_PIN_W3, /* MC0_DAT5 */
397 DB8500_PIN_V3, /* MC0_DAT6 */
398 DB8500_PIN_V2 /* MC0_DAT7 */
399};
400static const unsigned mc0dat31dir_a_1_pins[] = { DB8500_PIN_AB3 }; /* MC0_DAT31DIR */
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LW		 401/* MSP1 can only be on these pins, but TXD and RXD can be flipped */
402static const unsigned msp1txrx_a_1_pins[] = { DB8500_PIN_AF2, DB8500_PIN_AG2 };
403static const unsigned msp1_a_1_pins[] = { DB8500_PIN_AE1, DB8500_PIN_AE2 };
404/* LCD interface */
405static const unsigned lcdb_a_1_pins[] = { DB8500_PIN_F3, DB8500_PIN_F1,
406 DB8500_PIN_G3, DB8500_PIN_G2 };
407static const unsigned lcdvsi0_a_1_pins[] = { DB8500_PIN_E1 };
408static const unsigned lcdvsi1_a_1_pins[] = { DB8500_PIN_E2 };
409static const unsigned lcd_d0_d7_a_1_pins[] = {
410 DB8500_PIN_G5, DB8500_PIN_G4, DB8500_PIN_H4, DB8500_PIN_H3,
411 DB8500_PIN_J3, DB8500_PIN_H2, DB8500_PIN_J2, DB8500_PIN_H1 };
412/* D8 thru D11 often used as TVOUT lines */
413static const unsigned lcd_d8_d11_a_1_pins[] = { DB8500_PIN_F4,
414 DB8500_PIN_E3, DB8500_PIN_E4, DB8500_PIN_D2 };
415static const unsigned lcd_d12_d23_a_1_pins[] = {
416 DB8500_PIN_C1, DB8500_PIN_D3, DB8500_PIN_C2, DB8500_PIN_D5,
417 DB8500_PIN_C6, DB8500_PIN_B3, DB8500_PIN_C4, DB8500_PIN_E6,
418 DB8500_PIN_A3, DB8500_PIN_B6, DB8500_PIN_D6, DB8500_PIN_B7 };
419static const unsigned kp_a_1_pins[] = { DB8500_PIN_D7, DB8500_PIN_E8,
420 DB8500_PIN_D8, DB8500_PIN_D9 };
421static const unsigned kpskaskb_a_1_pins[] = { DB8500_PIN_D17, DB8500_PIN_D16 };
422static const unsigned kp_a_2_pins[] = {
423 DB8500_PIN_B17, DB8500_PIN_C16, DB8500_PIN_C19, DB8500_PIN_C17,
424 DB8500_PIN_A18, DB8500_PIN_C18, DB8500_PIN_B19, DB8500_PIN_B20,
425 DB8500_PIN_D21, DB8500_PIN_D20, DB8500_PIN_C20, DB8500_PIN_B21,
426 DB8500_PIN_C21, DB8500_PIN_A22, DB8500_PIN_B24, DB8500_PIN_C22 };
427/* MC2 has 8 data lines and no direction control, so only for (e)MMC */
428static const unsigned mc2_a_1_pins[] = { DB8500_PIN_A5, DB8500_PIN_B4,
429 DB8500_PIN_C8, DB8500_PIN_A12, DB8500_PIN_C10, DB8500_PIN_B10,
430 DB8500_PIN_B9, DB8500_PIN_A9, DB8500_PIN_C7, DB8500_PIN_A7,
431 DB8500_PIN_C5 };
432static const unsigned ssp1_a_1_pins[] = { DB8500_PIN_C9, DB8500_PIN_B11,
433 DB8500_PIN_C12, DB8500_PIN_C11 };
434static const unsigned ssp0_a_1_pins[] = { DB8500_PIN_D12, DB8500_PIN_B13,
435 DB8500_PIN_C13, DB8500_PIN_D13 };
436static const unsigned i2c0_a_1_pins[] = { DB8500_PIN_C15, DB8500_PIN_B16 };
437/*
438 * Image processor GPIO pins are named "ipgpio" and have their own
439 * numberspace
440 */
441static const unsigned ipgpio0_a_1_pins[] = { DB8500_PIN_B14 };
442static const unsigned ipgpio1_a_1_pins[] = { DB8500_PIN_C14 };
443/* Three modem pins named RF_PURn, MODEM_STATE and MODEM_PWREN */
444static const unsigned modem_a_1_pins[] = { DB8500_PIN_D22, DB8500_PIN_C23,
445 DB8500_PIN_D23 };
446/*
447 * This MSP cannot switch RX and TX, SCK in a separate group since this
448 * seems to be optional.
449 */
450static const unsigned msp2sck_a_1_pins[] = { DB8500_PIN_AJ27 };
451static const unsigned msp2_a_1_pins[] = { DB8500_PIN_AH27, DB8500_PIN_AF27,
452 DB8500_PIN_AG28, DB8500_PIN_AG26 };
453static const unsigned mc4_a_1_pins[] = { DB8500_PIN_AH24, DB8500_PIN_AG25,
454 DB8500_PIN_AH23, DB8500_PIN_AH26, DB8500_PIN_AF24, DB8500_PIN_AF25,
455 DB8500_PIN_AE23, DB8500_PIN_AF23, DB8500_PIN_AG23, DB8500_PIN_AG24,
456 DB8500_PIN_AJ23 };
457/* MC1 has only 4 data pins, designed for SD or SDIO exclusively */
458static const unsigned mc1_a_1_pins[] = { DB8500_PIN_AH16, DB8500_PIN_AG15,
459 DB8500_PIN_AJ15, DB8500_PIN_AG14, DB8500_PIN_AF13, DB8500_PIN_AG13,
460 DB8500_PIN_AH15 };
2830c368 461static const unsigned mc1_a_2_pins[] = { DB8500_PIN_AH16, DB8500_PIN_AJ15,
cde6d8dc 462 DB8500_PIN_AG14, DB8500_PIN_AF13, DB8500_PIN_AG13, DB8500_PIN_AH15 };
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LW		 463static const unsigned mc1dir_a_1_pins[] = { DB8500_PIN_AH13, DB8500_PIN_AG12,
464 DB8500_PIN_AH12, DB8500_PIN_AH11 };
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PC		 465static const unsigned hsir_a_1_pins[] = { DB8500_PIN_AG10, DB8500_PIN_AH10,
466 DB8500_PIN_AJ11 };
467static const unsigned hsit_a_1_pins[] = { DB8500_PIN_AJ9, DB8500_PIN_AH9,
468 DB8500_PIN_AG9, DB8500_PIN_AG8, DB8500_PIN_AF8 };
f098e183
PC		 469static const unsigned hsit_a_2_pins[] = { DB8500_PIN_AJ9, DB8500_PIN_AH9,
470 DB8500_PIN_AG9, DB8500_PIN_AG8 };
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PC		 471static const unsigned clkout1_a_1_pins[] = { DB8500_PIN_AH7 };
472static const unsigned clkout1_a_2_pins[] = { DB8500_PIN_AG7 };
473static const unsigned clkout2_a_1_pins[] = { DB8500_PIN_AJ6 };
474static const unsigned clkout2_a_2_pins[] = { DB8500_PIN_AF7 };
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LW		 475static const unsigned usb_a_1_pins[] = { DB8500_PIN_AF28, DB8500_PIN_AE29,
476 DB8500_PIN_AD29, DB8500_PIN_AC29, DB8500_PIN_AD28, DB8500_PIN_AD26,
477 DB8500_PIN_AE26, DB8500_PIN_AG29, DB8500_PIN_AE27, DB8500_PIN_AD27,
478 DB8500_PIN_AC28, DB8500_PIN_AC27 };
479
480/* Altfunction B column */
481static const unsigned trig_b_1_pins[] = { DB8500_PIN_AJ5, DB8500_PIN_AJ3 };
482static const unsigned i2c4_b_1_pins[] = { DB8500_PIN_AH6, DB8500_PIN_AG6 };
483static const unsigned i2c1_b_1_pins[] = { DB8500_PIN_AF6, DB8500_PIN_AG5 };
484static const unsigned i2c2_b_1_pins[] = { DB8500_PIN_AD5, DB8500_PIN_AE4 };
485static const unsigned i2c2_b_2_pins[] = { DB8500_PIN_AF5, DB8500_PIN_AG4 };
486static const unsigned msp0txrx_b_1_pins[] = { DB8500_PIN_AC4, DB8500_PIN_AC3 };
487static const unsigned i2c1_b_2_pins[] = { DB8500_PIN_AD3, DB8500_PIN_AD4 };
488/* Just RX and TX for UART2 */
489static const unsigned u2rxtx_b_1_pins[] = { DB8500_PIN_AC2, DB8500_PIN_AC1 };
490static const unsigned uartmodtx_b_1_pins[] = { DB8500_PIN_AB4 };
491static const unsigned msp0sck_b_1_pins[] = { DB8500_PIN_AB3 };
492static const unsigned uartmodrx_b_1_pins[] = { DB8500_PIN_AA3 };
493static const unsigned stmmod_b_1_pins[] = { DB8500_PIN_AA4, DB8500_PIN_Y4,
494 DB8500_PIN_Y2, DB8500_PIN_AA2, DB8500_PIN_AA1 };
495static const unsigned uartmodrx_b_2_pins[] = { DB8500_PIN_AB2 };
496static const unsigned spi3_b_1_pins[] = { DB8500_PIN_W2, DB8500_PIN_W3,
497 DB8500_PIN_V3, DB8500_PIN_V2 };
498static const unsigned msp1txrx_b_1_pins[] = { DB8500_PIN_AF2, DB8500_PIN_AG2 };
499static const unsigned kp_b_1_pins[] = { DB8500_PIN_F3, DB8500_PIN_F1,
500 DB8500_PIN_G3, DB8500_PIN_G2, DB8500_PIN_E1, DB8500_PIN_E2,
501 DB8500_PIN_G5, DB8500_PIN_G4, DB8500_PIN_H4, DB8500_PIN_H3,
502 DB8500_PIN_J3, DB8500_PIN_H2, DB8500_PIN_J2, DB8500_PIN_H1,
503 DB8500_PIN_F4, DB8500_PIN_E3, DB8500_PIN_E4, DB8500_PIN_D2,
504 DB8500_PIN_C1, DB8500_PIN_D3, DB8500_PIN_C2, DB8500_PIN_D5 };
4c39104d
PC		 505static const unsigned kp_b_2_pins[] = { DB8500_PIN_F3, DB8500_PIN_F1,
506 DB8500_PIN_G3, DB8500_PIN_G2, DB8500_PIN_F4, DB8500_PIN_E3};
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LW		 507static const unsigned sm_b_1_pins[] = { DB8500_PIN_C6, DB8500_PIN_B3,
508 DB8500_PIN_C4, DB8500_PIN_E6, DB8500_PIN_A3, DB8500_PIN_B6,
509 DB8500_PIN_D6, DB8500_PIN_B7, DB8500_PIN_D7, DB8500_PIN_D8,
510 DB8500_PIN_D9, DB8500_PIN_A5, DB8500_PIN_B4, DB8500_PIN_C8,
511 DB8500_PIN_A12, DB8500_PIN_C10, DB8500_PIN_B10, DB8500_PIN_B9,
512 DB8500_PIN_A9, DB8500_PIN_C7, DB8500_PIN_A7, DB8500_PIN_C5,
a3b01057
PC		 513 DB8500_PIN_C9 };
514/* This chip select pin can be "ps0" in alt C so have it separately */
e98ea774 515static const unsigned smcs0_b_1_pins[] = { DB8500_PIN_E8 };
a3b01057
PC		 516/* This chip select pin can be "ps1" in alt C so have it separately */
517static const unsigned smcs1_b_1_pins[] = { DB8500_PIN_B14 };
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LW		 518static const unsigned ipgpio7_b_1_pins[] = { DB8500_PIN_B11 };
519static const unsigned ipgpio2_b_1_pins[] = { DB8500_PIN_C12 };
520static const unsigned ipgpio3_b_1_pins[] = { DB8500_PIN_C11 };
521static const unsigned lcdaclk_b_1_pins[] = { DB8500_PIN_C14 };
522static const unsigned lcda_b_1_pins[] = { DB8500_PIN_D22,
523 DB8500_PIN_C23, DB8500_PIN_D23 };
524static const unsigned lcd_b_1_pins[] = { DB8500_PIN_D17, DB8500_PIN_D16,
525 DB8500_PIN_B17, DB8500_PIN_C16, DB8500_PIN_C19, DB8500_PIN_C17,
526 DB8500_PIN_A18, DB8500_PIN_C18, DB8500_PIN_B19, DB8500_PIN_B20,
527 DB8500_PIN_D21, DB8500_PIN_D20, DB8500_PIN_C20, DB8500_PIN_B21,
528 DB8500_PIN_C21, DB8500_PIN_A22, DB8500_PIN_B24, DB8500_PIN_C22 };
529static const unsigned ddrtrig_b_1_pins[] = { DB8500_PIN_AJ27 };
530static const unsigned pwl_b_1_pins[] = { DB8500_PIN_AF25 };
531static const unsigned spi1_b_1_pins[] = { DB8500_PIN_AG15, DB8500_PIN_AF13,
532 DB8500_PIN_AG13, DB8500_PIN_AH15 };
533static const unsigned mc3_b_1_pins[] = { DB8500_PIN_AH13, DB8500_PIN_AG12,
534 DB8500_PIN_AH12, DB8500_PIN_AH11, DB8500_PIN_AG10, DB8500_PIN_AH10,
535 DB8500_PIN_AJ11, DB8500_PIN_AJ9, DB8500_PIN_AH9, DB8500_PIN_AG9,
536 DB8500_PIN_AG8 };
537static const unsigned pwl_b_2_pins[] = { DB8500_PIN_AF8 };
538static const unsigned pwl_b_3_pins[] = { DB8500_PIN_AG7 };
539static const unsigned pwl_b_4_pins[] = { DB8500_PIN_AF7 };
540
541/* Altfunction C column */
542static const unsigned ipjtag_c_1_pins[] = { DB8500_PIN_AJ5, DB8500_PIN_AJ3,
543 DB8500_PIN_AH4, DB8500_PIN_AH3, DB8500_PIN_AH6 };
544static const unsigned ipgpio6_c_1_pins[] = { DB8500_PIN_AG6 };
545static const unsigned ipgpio0_c_1_pins[] = { DB8500_PIN_AF6 };
546static const unsigned ipgpio1_c_1_pins[] = { DB8500_PIN_AG5 };
547static const unsigned ipgpio3_c_1_pins[] = { DB8500_PIN_AF5 };
548static const unsigned ipgpio2_c_1_pins[] = { DB8500_PIN_AG4 };
549static const unsigned slim0_c_1_pins[] = { DB8500_PIN_AD3, DB8500_PIN_AD4 };
550/* Optional 4-bit Memory Stick interface */
551static const unsigned ms_c_1_pins[] = { DB8500_PIN_AC2, DB8500_PIN_AC1,
552 DB8500_PIN_AB3, DB8500_PIN_AA3, DB8500_PIN_AA4, DB8500_PIN_AB2,
553 DB8500_PIN_Y4, DB8500_PIN_Y2, DB8500_PIN_AA2, DB8500_PIN_AA1 };
554static const unsigned iptrigout_c_1_pins[] = { DB8500_PIN_AB4 };
555static const unsigned u2rxtx_c_1_pins[] = { DB8500_PIN_W2, DB8500_PIN_W3 };
556static const unsigned u2ctsrts_c_1_pins[] = { DB8500_PIN_V3, DB8500_PIN_V2 };
557static const unsigned u0_c_1_pins[] = { DB8500_PIN_AF2, DB8500_PIN_AE1,
558 DB8500_PIN_AE2, DB8500_PIN_AG2 };
559static const unsigned ipgpio4_c_1_pins[] = { DB8500_PIN_F3 };
560static const unsigned ipgpio5_c_1_pins[] = { DB8500_PIN_F1 };
561static const unsigned ipgpio6_c_2_pins[] = { DB8500_PIN_G3 };
562static const unsigned ipgpio7_c_1_pins[] = { DB8500_PIN_G2 };
563static const unsigned smcleale_c_1_pins[] = { DB8500_PIN_E1, DB8500_PIN_E2 };
564static const unsigned stmape_c_1_pins[] = { DB8500_PIN_G5, DB8500_PIN_G4,
565 DB8500_PIN_H4, DB8500_PIN_H3, DB8500_PIN_J3 };
566static const unsigned u2rxtx_c_2_pins[] = { DB8500_PIN_H2, DB8500_PIN_J2 };
567static const unsigned ipgpio2_c_2_pins[] = { DB8500_PIN_F4 };
568static const unsigned ipgpio3_c_2_pins[] = { DB8500_PIN_E3 };
569static const unsigned ipgpio4_c_2_pins[] = { DB8500_PIN_E4 };
570static const unsigned ipgpio5_c_2_pins[] = { DB8500_PIN_D2 };
571static const unsigned mc5_c_1_pins[] = { DB8500_PIN_C6, DB8500_PIN_B3,
572 DB8500_PIN_C4, DB8500_PIN_E6, DB8500_PIN_A3, DB8500_PIN_B6,
573 DB8500_PIN_D6, DB8500_PIN_B7, DB8500_PIN_D7, DB8500_PIN_D8,
574 DB8500_PIN_D9 };
575static const unsigned mc2rstn_c_1_pins[] = { DB8500_PIN_C8 };
576static const unsigned kp_c_1_pins[] = { DB8500_PIN_C9, DB8500_PIN_B11,
577 DB8500_PIN_C12, DB8500_PIN_C11, DB8500_PIN_D17, DB8500_PIN_D16,
578 DB8500_PIN_C23, DB8500_PIN_D23 };
a3b01057 579static const unsigned smps0_c_1_pins[] = { DB8500_PIN_E8 };
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LW		 580static const unsigned smps1_c_1_pins[] = { DB8500_PIN_B14 };
581static const unsigned u2rxtx_c_3_pins[] = { DB8500_PIN_B17, DB8500_PIN_C16 };
582static const unsigned stmape_c_2_pins[] = { DB8500_PIN_C19, DB8500_PIN_C17,
583 DB8500_PIN_A18, DB8500_PIN_C18, DB8500_PIN_B19 };
584static const unsigned uartmodrx_c_1_pins[] = { DB8500_PIN_D21 };
585static const unsigned uartmodtx_c_1_pins[] = { DB8500_PIN_D20 };
586static const unsigned stmmod_c_1_pins[] = { DB8500_PIN_C20, DB8500_PIN_B21,
587 DB8500_PIN_C21, DB8500_PIN_A22, DB8500_PIN_B24 };
588static const unsigned usbsim_c_1_pins[] = { DB8500_PIN_D22 };
589static const unsigned mc4rstn_c_1_pins[] = { DB8500_PIN_AF25 };
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PC		 590static const unsigned clkout1_c_1_pins[] = { DB8500_PIN_AH13 };
591static const unsigned clkout2_c_1_pins[] = { DB8500_PIN_AH12 };
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LW		 592static const unsigned i2c3_c_1_pins[] = { DB8500_PIN_AG12, DB8500_PIN_AH11 };
593static const unsigned spi0_c_1_pins[] = { DB8500_PIN_AH10, DB8500_PIN_AH9,
594 DB8500_PIN_AG9, DB8500_PIN_AG8 };
595static const unsigned usbsim_c_2_pins[] = { DB8500_PIN_AF8 };
596static const unsigned i2c3_c_2_pins[] = { DB8500_PIN_AG7, DB8500_PIN_AF7 };
597
598/* Other C1 column */
d3cd8d0c
JNG		 599static const unsigned u2rx_oc1_1_pins[] = { DB8500_PIN_AB2 };
600static const unsigned stmape_oc1_1_pins[] = { DB8500_PIN_AA4, DB8500_PIN_Y4,
601 DB8500_PIN_Y2, DB8500_PIN_AA2, DB8500_PIN_AA1 };
602static const unsigned remap0_oc1_1_pins[] = { DB8500_PIN_E1 };
603static const unsigned remap1_oc1_1_pins[] = { DB8500_PIN_E2 };
604static const unsigned ptma9_oc1_1_pins[] = { DB8500_PIN_G5, DB8500_PIN_G4,
605 DB8500_PIN_H4, DB8500_PIN_H3, DB8500_PIN_J3, DB8500_PIN_H2,
606 DB8500_PIN_J2, DB8500_PIN_H1 };
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LW		 607static const unsigned kp_oc1_1_pins[] = { DB8500_PIN_C6, DB8500_PIN_B3,
608 DB8500_PIN_C4, DB8500_PIN_E6, DB8500_PIN_A3, DB8500_PIN_B6,
609 DB8500_PIN_D6, DB8500_PIN_B7 };
d3cd8d0c
JNG		 610static const unsigned rf_oc1_1_pins[] = { DB8500_PIN_D8, DB8500_PIN_D9 };
611static const unsigned hxclk_oc1_1_pins[] = { DB8500_PIN_D16 };
612static const unsigned uartmodrx_oc1_1_pins[] = { DB8500_PIN_B17 };
613static const unsigned uartmodtx_oc1_1_pins[] = { DB8500_PIN_C16 };
614static const unsigned stmmod_oc1_1_pins[] = { DB8500_PIN_C19, DB8500_PIN_C17,
615 DB8500_PIN_A18, DB8500_PIN_C18, DB8500_PIN_B19 };
616static const unsigned hxgpio_oc1_1_pins[] = { DB8500_PIN_D21, DB8500_PIN_D20,
617 DB8500_PIN_C20, DB8500_PIN_B21, DB8500_PIN_C21, DB8500_PIN_A22,
618 DB8500_PIN_B24, DB8500_PIN_C22 };
619static const unsigned rf_oc1_2_pins[] = { DB8500_PIN_C23, DB8500_PIN_D23 };
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LW		 620static const unsigned spi2_oc1_1_pins[] = { DB8500_PIN_AH13, DB8500_PIN_AG12,
621 DB8500_PIN_AH12, DB8500_PIN_AH11 };
3923040b
PC		 622static const unsigned spi2_oc1_2_pins[] = { DB8500_PIN_AH13, DB8500_PIN_AH12,
623 DB8500_PIN_AH11 };
e98ea774 624
d3cd8d0c
JNG		 625/* Other C2 column */
626static const unsigned sbag_oc2_1_pins[] = { DB8500_PIN_AA4, DB8500_PIN_AB2,
627 DB8500_PIN_Y4, DB8500_PIN_Y2, DB8500_PIN_AA2, DB8500_PIN_AA1 };
628static const unsigned etmr4_oc2_1_pins[] = { DB8500_PIN_G5, DB8500_PIN_G4,
629 DB8500_PIN_H4, DB8500_PIN_H3, DB8500_PIN_J3, DB8500_PIN_H2,
630 DB8500_PIN_J2, DB8500_PIN_H1 };
631static const unsigned ptma9_oc2_1_pins[] = { DB8500_PIN_D17, DB8500_PIN_D16,
632 DB8500_PIN_B17, DB8500_PIN_C16, DB8500_PIN_C19, DB8500_PIN_C17,
633 DB8500_PIN_A18, DB8500_PIN_C18, DB8500_PIN_B19, DB8500_PIN_B20,
634 DB8500_PIN_D21, DB8500_PIN_D20, DB8500_PIN_C20, DB8500_PIN_B21,
635 DB8500_PIN_C21, DB8500_PIN_A22, DB8500_PIN_B24, DB8500_PIN_C22 };
636
637/* Other C3 column */
638static const unsigned stmmod_oc3_1_pins[] = { DB8500_PIN_AB2, DB8500_PIN_W2,
639 DB8500_PIN_W3, DB8500_PIN_V3, DB8500_PIN_V2 };
640static const unsigned stmmod_oc3_2_pins[] = { DB8500_PIN_G5, DB8500_PIN_G4,
641 DB8500_PIN_H4, DB8500_PIN_H3, DB8500_PIN_J3 };
642static const unsigned uartmodrx_oc3_1_pins[] = { DB8500_PIN_H2 };
643static const unsigned uartmodtx_oc3_1_pins[] = { DB8500_PIN_J2 };
644static const unsigned etmr4_oc3_1_pins[] = { DB8500_PIN_D17, DB8500_PIN_D16,
645 DB8500_PIN_B17, DB8500_PIN_C16, DB8500_PIN_C19, DB8500_PIN_C17,
646 DB8500_PIN_A18, DB8500_PIN_C18, DB8500_PIN_B19, DB8500_PIN_B20,
647 DB8500_PIN_D21, DB8500_PIN_D20, DB8500_PIN_C20, DB8500_PIN_B21,
648 DB8500_PIN_C21, DB8500_PIN_A22, DB8500_PIN_B24, DB8500_PIN_C22 };
649
650/* Other C4 column */
651static const unsigned sbag_oc4_1_pins[] = { DB8500_PIN_G5, DB8500_PIN_G4,
652 DB8500_PIN_H4, DB8500_PIN_H3, DB8500_PIN_J3, DB8500_PIN_H1 };
653static const unsigned hwobs_oc4_1_pins[] = { DB8500_PIN_D17, DB8500_PIN_D16,
654 DB8500_PIN_B17, DB8500_PIN_C16, DB8500_PIN_C19, DB8500_PIN_C17,
655 DB8500_PIN_A18, DB8500_PIN_C18, DB8500_PIN_B19, DB8500_PIN_B20,
656 DB8500_PIN_D21, DB8500_PIN_D20, DB8500_PIN_C20, DB8500_PIN_B21,
657 DB8500_PIN_C21, DB8500_PIN_A22, DB8500_PIN_B24, DB8500_PIN_C22 };
658
cde6d8dc 659#define DB8500_PIN_GROUP(a, b) { .name = #a, .pins = a##_pins, \
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LW		 660 .npins = ARRAY_SIZE(a##_pins), .altsetting = b }
661
662static const struct nmk_pingroup nmk_db8500_groups[] = {
663 /* Altfunction A column */
664 DB8500_PIN_GROUP(u0_a_1, NMK_GPIO_ALT_A),
665 DB8500_PIN_GROUP(u1rxtx_a_1, NMK_GPIO_ALT_A),
666 DB8500_PIN_GROUP(u1ctsrts_a_1, NMK_GPIO_ALT_A),
667 DB8500_PIN_GROUP(ipi2c_a_1, NMK_GPIO_ALT_A),
668 DB8500_PIN_GROUP(ipi2c_a_2, NMK_GPIO_ALT_A),
669 DB8500_PIN_GROUP(msp0txrx_a_1, NMK_GPIO_ALT_A),
670 DB8500_PIN_GROUP(msp0tfstck_a_1, NMK_GPIO_ALT_A),
671 DB8500_PIN_GROUP(msp0rfsrck_a_1, NMK_GPIO_ALT_A),
672 DB8500_PIN_GROUP(mc0_a_1, NMK_GPIO_ALT_A),
fcd217ed
PC		 673 DB8500_PIN_GROUP(mc0_dat47_a_1, NMK_GPIO_ALT_A),
674 DB8500_PIN_GROUP(mc0dat31dir_a_1, NMK_GPIO_ALT_A),
e98ea774
LW		 675 DB8500_PIN_GROUP(msp1txrx_a_1, NMK_GPIO_ALT_A),
676 DB8500_PIN_GROUP(msp1_a_1, NMK_GPIO_ALT_A),
677 DB8500_PIN_GROUP(lcdb_a_1, NMK_GPIO_ALT_A),
678 DB8500_PIN_GROUP(lcdvsi0_a_1, NMK_GPIO_ALT_A),
679 DB8500_PIN_GROUP(lcdvsi1_a_1, NMK_GPIO_ALT_A),
680 DB8500_PIN_GROUP(lcd_d0_d7_a_1, NMK_GPIO_ALT_A),
681 DB8500_PIN_GROUP(lcd_d8_d11_a_1, NMK_GPIO_ALT_A),
682 DB8500_PIN_GROUP(lcd_d12_d23_a_1, NMK_GPIO_ALT_A),
683 DB8500_PIN_GROUP(kp_a_1, NMK_GPIO_ALT_A),
684 DB8500_PIN_GROUP(mc2_a_1, NMK_GPIO_ALT_A),
685 DB8500_PIN_GROUP(ssp1_a_1, NMK_GPIO_ALT_A),
686 DB8500_PIN_GROUP(ssp0_a_1, NMK_GPIO_ALT_A),
687 DB8500_PIN_GROUP(i2c0_a_1, NMK_GPIO_ALT_A),
688 DB8500_PIN_GROUP(ipgpio0_a_1, NMK_GPIO_ALT_A),
689 DB8500_PIN_GROUP(ipgpio1_a_1, NMK_GPIO_ALT_A),
0c61ae77 690 DB8500_PIN_GROUP(kp_a_2, NMK_GPIO_ALT_A),
e98ea774
LW		 691 DB8500_PIN_GROUP(msp2sck_a_1, NMK_GPIO_ALT_A),
692 DB8500_PIN_GROUP(msp2_a_1, NMK_GPIO_ALT_A),
693 DB8500_PIN_GROUP(mc4_a_1, NMK_GPIO_ALT_A),
694 DB8500_PIN_GROUP(mc1_a_1, NMK_GPIO_ALT_A),
2830c368 695 DB8500_PIN_GROUP(mc1_a_2, NMK_GPIO_ALT_A),
e98ea774
LW		 696 DB8500_PIN_GROUP(hsir_a_1, NMK_GPIO_ALT_A),
697 DB8500_PIN_GROUP(hsit_a_1, NMK_GPIO_ALT_A),
f098e183 698 DB8500_PIN_GROUP(hsit_a_2, NMK_GPIO_ALT_A),
edbdfa8d
PC		 699 DB8500_PIN_GROUP(clkout1_a_1, NMK_GPIO_ALT_A),
700 DB8500_PIN_GROUP(clkout1_a_2, NMK_GPIO_ALT_A),
701 DB8500_PIN_GROUP(clkout2_a_1, NMK_GPIO_ALT_A),
702 DB8500_PIN_GROUP(clkout2_a_2, NMK_GPIO_ALT_A),
e98ea774
LW		 703 DB8500_PIN_GROUP(usb_a_1, NMK_GPIO_ALT_A),
704 /* Altfunction B column */
705 DB8500_PIN_GROUP(trig_b_1, NMK_GPIO_ALT_B),
706 DB8500_PIN_GROUP(i2c4_b_1, NMK_GPIO_ALT_B),
707 DB8500_PIN_GROUP(i2c1_b_1, NMK_GPIO_ALT_B),
708 DB8500_PIN_GROUP(i2c2_b_1, NMK_GPIO_ALT_B),
709 DB8500_PIN_GROUP(i2c2_b_2, NMK_GPIO_ALT_B),
710 DB8500_PIN_GROUP(msp0txrx_b_1, NMK_GPIO_ALT_B),
711 DB8500_PIN_GROUP(i2c1_b_2, NMK_GPIO_ALT_B),
712 DB8500_PIN_GROUP(u2rxtx_b_1, NMK_GPIO_ALT_B),
713 DB8500_PIN_GROUP(uartmodtx_b_1, NMK_GPIO_ALT_B),
714 DB8500_PIN_GROUP(msp0sck_b_1, NMK_GPIO_ALT_B),
715 DB8500_PIN_GROUP(uartmodrx_b_1, NMK_GPIO_ALT_B),
716 DB8500_PIN_GROUP(stmmod_b_1, NMK_GPIO_ALT_B),
717 DB8500_PIN_GROUP(uartmodrx_b_2, NMK_GPIO_ALT_B),
718 DB8500_PIN_GROUP(spi3_b_1, NMK_GPIO_ALT_B),
719 DB8500_PIN_GROUP(msp1txrx_b_1, NMK_GPIO_ALT_B),
720 DB8500_PIN_GROUP(kp_b_1, NMK_GPIO_ALT_B),
4c39104d 721 DB8500_PIN_GROUP(kp_b_2, NMK_GPIO_ALT_B),
e98ea774
LW		 722 DB8500_PIN_GROUP(sm_b_1, NMK_GPIO_ALT_B),
723 DB8500_PIN_GROUP(smcs0_b_1, NMK_GPIO_ALT_B),
a3b01057 724 DB8500_PIN_GROUP(smcs1_b_1, NMK_GPIO_ALT_B),
e98ea774
LW		 725 DB8500_PIN_GROUP(ipgpio7_b_1, NMK_GPIO_ALT_B),
726 DB8500_PIN_GROUP(ipgpio2_b_1, NMK_GPIO_ALT_B),
727 DB8500_PIN_GROUP(ipgpio3_b_1, NMK_GPIO_ALT_B),
728 DB8500_PIN_GROUP(lcdaclk_b_1, NMK_GPIO_ALT_B),
729 DB8500_PIN_GROUP(lcda_b_1, NMK_GPIO_ALT_B),
730 DB8500_PIN_GROUP(lcd_b_1, NMK_GPIO_ALT_B),
731 DB8500_PIN_GROUP(ddrtrig_b_1, NMK_GPIO_ALT_B),
732 DB8500_PIN_GROUP(pwl_b_1, NMK_GPIO_ALT_B),
733 DB8500_PIN_GROUP(spi1_b_1, NMK_GPIO_ALT_B),
734 DB8500_PIN_GROUP(mc3_b_1, NMK_GPIO_ALT_B),
735 DB8500_PIN_GROUP(pwl_b_2, NMK_GPIO_ALT_B),
736 DB8500_PIN_GROUP(pwl_b_3, NMK_GPIO_ALT_B),
737 DB8500_PIN_GROUP(pwl_b_4, NMK_GPIO_ALT_B),
738 /* Altfunction C column */
739 DB8500_PIN_GROUP(ipjtag_c_1, NMK_GPIO_ALT_C),
740 DB8500_PIN_GROUP(ipgpio6_c_1, NMK_GPIO_ALT_C),
741 DB8500_PIN_GROUP(ipgpio0_c_1, NMK_GPIO_ALT_C),
742 DB8500_PIN_GROUP(ipgpio1_c_1, NMK_GPIO_ALT_C),
743 DB8500_PIN_GROUP(ipgpio3_c_1, NMK_GPIO_ALT_C),
744 DB8500_PIN_GROUP(ipgpio2_c_1, NMK_GPIO_ALT_C),
745 DB8500_PIN_GROUP(slim0_c_1, NMK_GPIO_ALT_C),
746 DB8500_PIN_GROUP(ms_c_1, NMK_GPIO_ALT_C),
747 DB8500_PIN_GROUP(iptrigout_c_1, NMK_GPIO_ALT_C),
748 DB8500_PIN_GROUP(u2rxtx_c_1, NMK_GPIO_ALT_C),
749 DB8500_PIN_GROUP(u2ctsrts_c_1, NMK_GPIO_ALT_C),
750 DB8500_PIN_GROUP(u0_c_1, NMK_GPIO_ALT_C),
751 DB8500_PIN_GROUP(ipgpio4_c_1, NMK_GPIO_ALT_C),
752 DB8500_PIN_GROUP(ipgpio5_c_1, NMK_GPIO_ALT_C),
753 DB8500_PIN_GROUP(ipgpio6_c_1, NMK_GPIO_ALT_C),
754 DB8500_PIN_GROUP(ipgpio7_c_1, NMK_GPIO_ALT_C),
755 DB8500_PIN_GROUP(smcleale_c_1, NMK_GPIO_ALT_C),
756 DB8500_PIN_GROUP(stmape_c_1, NMK_GPIO_ALT_C),
757 DB8500_PIN_GROUP(u2rxtx_c_2, NMK_GPIO_ALT_C),
758 DB8500_PIN_GROUP(ipgpio2_c_2, NMK_GPIO_ALT_C),
759 DB8500_PIN_GROUP(ipgpio3_c_2, NMK_GPIO_ALT_C),
760 DB8500_PIN_GROUP(ipgpio4_c_2, NMK_GPIO_ALT_C),
761 DB8500_PIN_GROUP(ipgpio5_c_2, NMK_GPIO_ALT_C),
762 DB8500_PIN_GROUP(mc5_c_1, NMK_GPIO_ALT_C),
763 DB8500_PIN_GROUP(mc2rstn_c_1, NMK_GPIO_ALT_C),
764 DB8500_PIN_GROUP(kp_c_1, NMK_GPIO_ALT_C),
a3b01057 765 DB8500_PIN_GROUP(smps0_c_1, NMK_GPIO_ALT_C),
e98ea774
LW		 766 DB8500_PIN_GROUP(smps1_c_1, NMK_GPIO_ALT_C),
767 DB8500_PIN_GROUP(u2rxtx_c_3, NMK_GPIO_ALT_C),
768 DB8500_PIN_GROUP(stmape_c_2, NMK_GPIO_ALT_C),
769 DB8500_PIN_GROUP(uartmodrx_c_1, NMK_GPIO_ALT_C),
770 DB8500_PIN_GROUP(uartmodtx_c_1, NMK_GPIO_ALT_C),
771 DB8500_PIN_GROUP(stmmod_c_1, NMK_GPIO_ALT_C),
772 DB8500_PIN_GROUP(usbsim_c_1, NMK_GPIO_ALT_C),
773 DB8500_PIN_GROUP(mc4rstn_c_1, NMK_GPIO_ALT_C),
edbdfa8d
PC		 774 DB8500_PIN_GROUP(clkout1_c_1, NMK_GPIO_ALT_C),
775 DB8500_PIN_GROUP(clkout2_c_1, NMK_GPIO_ALT_C),
e98ea774
LW		 776 DB8500_PIN_GROUP(i2c3_c_1, NMK_GPIO_ALT_C),
777 DB8500_PIN_GROUP(spi0_c_1, NMK_GPIO_ALT_C),
778 DB8500_PIN_GROUP(usbsim_c_2, NMK_GPIO_ALT_C),
779 DB8500_PIN_GROUP(i2c3_c_2, NMK_GPIO_ALT_C),
c22df08c 780 /* Other alt C1 column */
d3cd8d0c
JNG		 781 DB8500_PIN_GROUP(u2rx_oc1_1, NMK_GPIO_ALT_C1),
782 DB8500_PIN_GROUP(stmape_oc1_1, NMK_GPIO_ALT_C1),
783 DB8500_PIN_GROUP(remap0_oc1_1, NMK_GPIO_ALT_C1),
784 DB8500_PIN_GROUP(remap1_oc1_1, NMK_GPIO_ALT_C1),
785 DB8500_PIN_GROUP(ptma9_oc1_1, NMK_GPIO_ALT_C1),
c22df08c 786 DB8500_PIN_GROUP(kp_oc1_1, NMK_GPIO_ALT_C1),
d3cd8d0c
JNG		 787 DB8500_PIN_GROUP(rf_oc1_1, NMK_GPIO_ALT_C1),
788 DB8500_PIN_GROUP(hxclk_oc1_1, NMK_GPIO_ALT_C1),
789 DB8500_PIN_GROUP(uartmodrx_oc1_1, NMK_GPIO_ALT_C1),
790 DB8500_PIN_GROUP(uartmodtx_oc1_1, NMK_GPIO_ALT_C1),
791 DB8500_PIN_GROUP(stmmod_oc1_1, NMK_GPIO_ALT_C1),
792 DB8500_PIN_GROUP(hxgpio_oc1_1, NMK_GPIO_ALT_C1),
793 DB8500_PIN_GROUP(rf_oc1_2, NMK_GPIO_ALT_C1),
c22df08c
JNG		 794 DB8500_PIN_GROUP(spi2_oc1_1, NMK_GPIO_ALT_C1),
795 DB8500_PIN_GROUP(spi2_oc1_2, NMK_GPIO_ALT_C1),
d3cd8d0c
JNG		 796 /* Other alt C2 column */
797 DB8500_PIN_GROUP(sbag_oc2_1, NMK_GPIO_ALT_C2),
798 DB8500_PIN_GROUP(etmr4_oc2_1, NMK_GPIO_ALT_C2),
799 DB8500_PIN_GROUP(ptma9_oc2_1, NMK_GPIO_ALT_C2),
800 /* Other alt C3 column */
801 DB8500_PIN_GROUP(stmmod_oc3_1, NMK_GPIO_ALT_C3),
802 DB8500_PIN_GROUP(stmmod_oc3_2, NMK_GPIO_ALT_C3),
803 DB8500_PIN_GROUP(uartmodrx_oc3_1, NMK_GPIO_ALT_C3),
804 DB8500_PIN_GROUP(uartmodtx_oc3_1, NMK_GPIO_ALT_C3),
805 DB8500_PIN_GROUP(etmr4_oc3_1, NMK_GPIO_ALT_C3),
806 /* Other alt C4 column */
807 DB8500_PIN_GROUP(sbag_oc4_1, NMK_GPIO_ALT_C4),
808 DB8500_PIN_GROUP(hwobs_oc4_1, NMK_GPIO_ALT_C4),
e98ea774
LW		 809};
810
dbfe8ca2
LW		 811/* We use this macro to define the groups applicable to a function */
812#define DB8500_FUNC_GROUPS(a, b...) \
813static const char * const a##_groups[] = { b };
814
815DB8500_FUNC_GROUPS(u0, "u0_a_1", "u0_c_1");
816DB8500_FUNC_GROUPS(u1, "u1rxtx_a_1", "u1ctsrts_a_1");
817/*
818 * UART2 can be muxed out with just RX/TX in four places, CTS+RTS is however
819 * only available on two pins in alternative function C
820 */
821DB8500_FUNC_GROUPS(u2, "u2rxtx_b_1", "u2rxtx_c_1", "u2ctsrts_c_1",
d3cd8d0c 822 "u2rxtx_c_2", "u2rxtx_c_3", "u2rx_oc1_1");
dbfe8ca2
LW		 823DB8500_FUNC_GROUPS(ipi2c, "ipi2c_a_1", "ipi2c_a_2");
824/*
825 * MSP0 can only be on a certain set of pins, but the TX/RX pins can be
826 * switched around by selecting the altfunction A or B. The SCK pin is
827 * only available on the altfunction B.
828 */
829DB8500_FUNC_GROUPS(msp0, "msp0txrx_a_1", "msp0tfstck_a_1", "msp0rfstck_a_1",
830 "msp0txrx_b_1", "msp0sck_b_1");
fcd217ed 831DB8500_FUNC_GROUPS(mc0, "mc0_a_1", "mc0_dat47_a_1", "mc0dat31dir_a_1");
dbfe8ca2
LW		 832/* MSP0 can swap RX/TX like MSP0 but has no SCK pin available */
833DB8500_FUNC_GROUPS(msp1, "msp1txrx_a_1", "msp1_a_1", "msp1txrx_b_1");
834DB8500_FUNC_GROUPS(lcdb, "lcdb_a_1");
835DB8500_FUNC_GROUPS(lcd, "lcdvsi0_a_1", "lcdvsi1_a_1", "lcd_d0_d7_a_1",
836 "lcd_d8_d11_a_1", "lcd_d12_d23_a_1", "lcd_b_1");
0c61ae77 837DB8500_FUNC_GROUPS(kp, "kp_a_1", "kp_a_2", "kp_b_1", "kp_b_2", "kp_c_1", "kp_oc1_1");
dbfe8ca2
LW		 838DB8500_FUNC_GROUPS(mc2, "mc2_a_1", "mc2rstn_c_1");
839DB8500_FUNC_GROUPS(ssp1, "ssp1_a_1");
840DB8500_FUNC_GROUPS(ssp0, "ssp0_a_1");
841DB8500_FUNC_GROUPS(i2c0, "i2c0_a_1");
842/* The image processor has 8 GPIO pins that can be muxed out */
843DB8500_FUNC_GROUPS(ipgpio, "ipgpio0_a_1", "ipgpio1_a_1", "ipgpio7_b_1",
844 "ipgpio2_b_1", "ipgpio3_b_1", "ipgpio6_c_1", "ipgpio0_c_1",
845 "ipgpio1_c_1", "ipgpio3_c_1", "ipgpio2_c_1", "ipgpio4_c_1",
846 "ipgpio5_c_1", "ipgpio6_c_2", "ipgpio7_c_1", "ipgpio2_c_2",
847 "ipgpio3_c_2", "ipgpio4_c_2", "ipgpio5_c_2");
848/* MSP2 can not invert the RX/TX pins but has the optional SCK pin */
849DB8500_FUNC_GROUPS(msp2, "msp2sck_a_1", "msp2_a_1");
850DB8500_FUNC_GROUPS(mc4, "mc4_a_1", "mc4rstn_c_1");
2830c368 851DB8500_FUNC_GROUPS(mc1, "mc1_a_1", "mc1_a_2", "mc1dir_a_1");
606b64ea 852DB8500_FUNC_GROUPS(hsi, "hsir_a_1", "hsit_a_1", "hsit_a_2");
edbdfa8d
PC		 853DB8500_FUNC_GROUPS(clkout, "clkout1_a_1", "clkout1_a_2", "clkout1_c_1",
854 "clkout2_a_1", "clkout2_a_2", "clkout2_c_1");
dbfe8ca2
LW		 855DB8500_FUNC_GROUPS(usb, "usb_a_1");
856DB8500_FUNC_GROUPS(trig, "trig_b_1");
857DB8500_FUNC_GROUPS(i2c4, "i2c4_b_1");
858DB8500_FUNC_GROUPS(i2c1, "i2c1_b_1", "i2c1_b_2");
859DB8500_FUNC_GROUPS(i2c2, "i2c2_b_1", "i2c2_b_2");
860/*
861 * The modem UART can output its RX and TX pins in some different places,
862 * so select one of each.
863 */
864DB8500_FUNC_GROUPS(uartmod, "uartmodtx_b_1", "uartmodrx_b_1", "uartmodrx_b_2",
d3cd8d0c
JNG		 865 "uartmodrx_c_1", "uartmod_tx_c_1", "uartmodrx_oc1_1",
866 "uartmodtx_oc1_1", "uartmodrx_oc3_1", "uartmodtx_oc3_1");
867DB8500_FUNC_GROUPS(stmmod, "stmmod_b_1", "stmmod_c_1", "stmmod_oc1_1",
868 "stmmod_oc3_1", "stmmod_oc3_2");
dbfe8ca2
LW		 869DB8500_FUNC_GROUPS(spi3, "spi3_b_1");
870/* Select between CS0 on alt B or PS1 on alt C */
a3b01057
PC		 871DB8500_FUNC_GROUPS(sm, "sm_b_1", "smcs0_b_1", "smcs1_b_1", "smcleale_c_1",
872 "smps0_c_1", "smps1_c_1");
dbfe8ca2
LW		 873DB8500_FUNC_GROUPS(lcda, "lcdaclk_b_1", "lcda_b_1");
874DB8500_FUNC_GROUPS(ddrtrig, "ddrtrig_b_1");
875DB8500_FUNC_GROUPS(pwl, "pwl_b_1", "pwl_b_2", "pwl_b_3", "pwl_b_4");
876DB8500_FUNC_GROUPS(spi1, "spi1_b_1");
877DB8500_FUNC_GROUPS(mc3, "mc3_b_1");
878DB8500_FUNC_GROUPS(ipjtag, "ipjtag_c_1");
879DB8500_FUNC_GROUPS(slim0, "slim0_c_1");
880DB8500_FUNC_GROUPS(ms, "ms_c_1");
881DB8500_FUNC_GROUPS(iptrigout, "iptrigout_c_1");
d3cd8d0c 882DB8500_FUNC_GROUPS(stmape, "stmape_c_1", "stmape_c_2", "stmape_oc1_1");
dbfe8ca2
LW		 883DB8500_FUNC_GROUPS(mc5, "mc5_c_1");
884DB8500_FUNC_GROUPS(usbsim, "usbsim_c_1", "usbsim_c_2");
885DB8500_FUNC_GROUPS(i2c3, "i2c3_c_1", "i2c3_c_2");
886DB8500_FUNC_GROUPS(spi0, "spi0_c_1");
3923040b 887DB8500_FUNC_GROUPS(spi2, "spi2_oc1_1", "spi2_oc1_2");
d3cd8d0c
JNG		 888DB8500_FUNC_GROUPS(remap, "remap0_oc1_1", "remap1_oc1_1");
889DB8500_FUNC_GROUPS(sbag, "sbag_oc2_1", "sbag_oc4_1");
890DB8500_FUNC_GROUPS(ptm, "ptma9_oc1_1", "ptma9_oc2_1");
891DB8500_FUNC_GROUPS(rf, "rf_oc1_1", "rf_oc1_2");
892DB8500_FUNC_GROUPS(hx, "hxclk_oc1_1", "hxgpio_oc1_1");
893DB8500_FUNC_GROUPS(etm, "etmr4_oc2_1", "etmr4_oc3_1");
894DB8500_FUNC_GROUPS(hwobs, "hwobs_oc4_1");
dbfe8ca2
LW		 895#define FUNCTION(fname) \
896 { \
897 .name = #fname, \
898 .groups = fname##_groups, \
899 .ngroups = ARRAY_SIZE(fname##_groups), \
900 }
901
902static const struct nmk_function nmk_db8500_functions[] = {
903 FUNCTION(u0),
904 FUNCTION(u1),
905 FUNCTION(u2),
906 FUNCTION(ipi2c),
907 FUNCTION(msp0),
908 FUNCTION(mc0),
909 FUNCTION(msp1),
910 FUNCTION(lcdb),
911 FUNCTION(lcd),
912 FUNCTION(kp),
913 FUNCTION(mc2),
914 FUNCTION(ssp1),
915 FUNCTION(ssp0),
916 FUNCTION(i2c0),
917 FUNCTION(ipgpio),
918 FUNCTION(msp2),
919 FUNCTION(mc4),
920 FUNCTION(mc1),
921 FUNCTION(hsi),
922 FUNCTION(clkout),
923 FUNCTION(usb),
924 FUNCTION(trig),
925 FUNCTION(i2c4),
926 FUNCTION(i2c1),
927 FUNCTION(i2c2),
928 FUNCTION(uartmod),
929 FUNCTION(stmmod),
930 FUNCTION(spi3),
931 FUNCTION(sm),
932 FUNCTION(lcda),
933 FUNCTION(ddrtrig),
934 FUNCTION(pwl),
935 FUNCTION(spi1),
936 FUNCTION(mc3),
937 FUNCTION(ipjtag),
938 FUNCTION(slim0),
939 FUNCTION(ms),
940 FUNCTION(iptrigout),
941 FUNCTION(stmape),
942 FUNCTION(mc5),
943 FUNCTION(usbsim),
944 FUNCTION(i2c3),
945 FUNCTION(spi0),
946 FUNCTION(spi2),
d3cd8d0c
JNG		 947 FUNCTION(remap),
948 FUNCTION(ptm),
949 FUNCTION(rf),
950 FUNCTION(hx),
951 FUNCTION(etm),
952 FUNCTION(hwobs),
dbfe8ca2
LW		 953};
954
c22df08c
JNG		 955static const struct prcm_gpiocr_altcx_pin_desc db8500_altcx_pins[] = {
956 PRCM_GPIOCR_ALTCX(23, true, PRCM_IDX_GPIOCR1, 9, /* STMAPE_CLK_a */
957 true, PRCM_IDX_GPIOCR1, 7, /* SBAG_CLK_a */
958 false, 0, 0,
959 false, 0, 0
960 ),
961 PRCM_GPIOCR_ALTCX(24, true, PRCM_IDX_GPIOCR1, 9, /* STMAPE or U2_RXD ??? */
962 true, PRCM_IDX_GPIOCR1, 7, /* SBAG_VAL_a */
963 true, PRCM_IDX_GPIOCR1, 10, /* STM_MOD_CMD0 */
964 false, 0, 0
965 ),
966 PRCM_GPIOCR_ALTCX(25, true, PRCM_IDX_GPIOCR1, 9, /* STMAPE_DAT_a[0] */
967 true, PRCM_IDX_GPIOCR1, 7, /* SBAG_D_a[0] */
968 false, 0, 0,
969 false, 0, 0
970 ),
971 PRCM_GPIOCR_ALTCX(26, true, PRCM_IDX_GPIOCR1, 9, /* STMAPE_DAT_a[1] */
972 true, PRCM_IDX_GPIOCR1, 7, /* SBAG_D_a[1] */
973 false, 0, 0,
974 false, 0, 0
975 ),
976 PRCM_GPIOCR_ALTCX(27, true, PRCM_IDX_GPIOCR1, 9, /* STMAPE_DAT_a[2] */
977 true, PRCM_IDX_GPIOCR1, 7, /* SBAG_D_a[2] */
978 false, 0, 0,
979 false, 0, 0
980 ),
981 PRCM_GPIOCR_ALTCX(28, true, PRCM_IDX_GPIOCR1, 9, /* STMAPE_DAT_a[3] */
982 true, PRCM_IDX_GPIOCR1, 7, /* SBAG_D_a[3] */
983 false, 0, 0,
984 false, 0, 0
985 ),
986 PRCM_GPIOCR_ALTCX(29, false, 0, 0,
987 false, 0, 0,
988 true, PRCM_IDX_GPIOCR1, 10, /* STM_MOD_CMD0 */
989 false, 0, 0
990 ),
991 PRCM_GPIOCR_ALTCX(30, false, 0, 0,
992 false, 0, 0,
993 true, PRCM_IDX_GPIOCR1, 10, /* STM_MOD_CMD0 */
994 false, 0, 0
995 ),
996 PRCM_GPIOCR_ALTCX(31, false, 0, 0,
997 false, 0, 0,
998 true, PRCM_IDX_GPIOCR1, 10, /* STM_MOD_CMD0 */
999 false, 0, 0
1000 ),
1001 PRCM_GPIOCR_ALTCX(32, false, 0, 0,
1002 false, 0, 0,
1003 true, PRCM_IDX_GPIOCR1, 10, /* STM_MOD_CMD0 */
1004 false, 0, 0
1005 ),
1006 PRCM_GPIOCR_ALTCX(68, true, PRCM_IDX_GPIOCR1, 18, /* REMAP_SELECT_ON */
1007 false, 0, 0,
1008 false, 0, 0,
1009 false, 0, 0
1010 ),
1011 PRCM_GPIOCR_ALTCX(69, true, PRCM_IDX_GPIOCR1, 18, /* REMAP_SELECT_ON */
1012 false, 0, 0,
1013 false, 0, 0,
1014 false, 0, 0
1015 ),
1016 PRCM_GPIOCR_ALTCX(70, true, PRCM_IDX_GPIOCR1, 5, /* PTM_A9_D23 */
1017 true, PRCM_IDX_GPIOCR2, 2, /* DBG_ETM_R4_CMD0 */
1018 true, PRCM_IDX_GPIOCR1, 11, /* STM_MOD_CMD1 */
1019 true, PRCM_IDX_GPIOCR1, 8 /* SBAG_CLK */
1020 ),
1021 PRCM_GPIOCR_ALTCX(71, true, PRCM_IDX_GPIOCR1, 5, /* PTM_A9_D22 */
1022 true, PRCM_IDX_GPIOCR2, 2, /* DBG_ETM_R4_CMD0 */
1023 true, PRCM_IDX_GPIOCR1, 11, /* STM_MOD_CMD1 */
1024 true, PRCM_IDX_GPIOCR1, 8 /* SBAG_D3 */
1025 ),
1026 PRCM_GPIOCR_ALTCX(72, true, PRCM_IDX_GPIOCR1, 5, /* PTM_A9_D21 */
1027 true, PRCM_IDX_GPIOCR2, 2, /* DBG_ETM_R4_CMD0 */
1028 true, PRCM_IDX_GPIOCR1, 11, /* STM_MOD_CMD1 */
1029 true, PRCM_IDX_GPIOCR1, 8 /* SBAG_D2 */
1030 ),
1031 PRCM_GPIOCR_ALTCX(73, true, PRCM_IDX_GPIOCR1, 5, /* PTM_A9_D20 */
1032 true, PRCM_IDX_GPIOCR2, 2, /* DBG_ETM_R4_CMD0 */
1033 true, PRCM_IDX_GPIOCR1, 11, /* STM_MOD_CMD1 */
1034 true, PRCM_IDX_GPIOCR1, 8 /* SBAG_D1 */
1035 ),
1036 PRCM_GPIOCR_ALTCX(74, true, PRCM_IDX_GPIOCR1, 5, /* PTM_A9_D19 */
1037 true, PRCM_IDX_GPIOCR2, 2, /* DBG_ETM_R4_CMD0 */
1038 true, PRCM_IDX_GPIOCR1, 11, /* STM_MOD_CMD1 */
1039 true, PRCM_IDX_GPIOCR1, 8 /* SBAG_D0 */
1040 ),
1041 PRCM_GPIOCR_ALTCX(75, true, PRCM_IDX_GPIOCR1, 5, /* PTM_A9_D18 */
1042 true, PRCM_IDX_GPIOCR2, 2, /* DBG_ETM_R4_CMD0 */
1043 true, PRCM_IDX_GPIOCR1, 0, /* DBG_UARTMOD_CMD0 */
1044 false, 0, 0
1045 ),
1046 PRCM_GPIOCR_ALTCX(76, true, PRCM_IDX_GPIOCR1, 5, /* PTM_A9_D17 */
1047 true, PRCM_IDX_GPIOCR2, 2, /* DBG_ETM_R4_CMD0 */
1048 true, PRCM_IDX_GPIOCR1, 0, /* DBG_UARTMOD_CMD0 */
1049 false, 0, 0
1050 ),
1051 PRCM_GPIOCR_ALTCX(77, true, PRCM_IDX_GPIOCR1, 5, /* PTM_A9_D16 */
1052 true, PRCM_IDX_GPIOCR2, 2, /* DBG_ETM_R4_CMD0 */
1053 false, 0, 0,
1054 true, PRCM_IDX_GPIOCR1, 8 /* SBAG_VAL */
1055 ),
1056 PRCM_GPIOCR_ALTCX(86, true, PRCM_IDX_GPIOCR1, 12, /* KP_O3 */
1057 false, 0, 0,
1058 false, 0, 0,
1059 false, 0, 0
1060 ),
1061 PRCM_GPIOCR_ALTCX(87, true, PRCM_IDX_GPIOCR1, 12, /* KP_O2 */
1062 false, 0, 0,
1063 false, 0, 0,
1064 false, 0, 0
1065 ),
1066 PRCM_GPIOCR_ALTCX(88, true, PRCM_IDX_GPIOCR1, 12, /* KP_I3 */
1067 false, 0, 0,
1068 false, 0, 0,
1069 false, 0, 0
1070 ),
1071 PRCM_GPIOCR_ALTCX(89, true, PRCM_IDX_GPIOCR1, 12, /* KP_I2 */
1072 false, 0, 0,
1073 false, 0, 0,
1074 false, 0, 0
1075 ),
1076 PRCM_GPIOCR_ALTCX(90, true, PRCM_IDX_GPIOCR1, 12, /* KP_O1 */
1077 false, 0, 0,
1078 false, 0, 0,
1079 false, 0, 0
1080 ),
1081 PRCM_GPIOCR_ALTCX(91, true, PRCM_IDX_GPIOCR1, 12, /* KP_O0 */
1082 false, 0, 0,
1083 false, 0, 0,
1084 false, 0, 0
1085 ),
1086 PRCM_GPIOCR_ALTCX(92, true, PRCM_IDX_GPIOCR1, 12, /* KP_I1 */
1087 false, 0, 0,
1088 false, 0, 0,
1089 false, 0, 0
1090 ),
1091 PRCM_GPIOCR_ALTCX(93, true, PRCM_IDX_GPIOCR1, 12, /* KP_I0 */
1092 false, 0, 0,
1093 false, 0, 0,
1094 false, 0, 0
1095 ),
1096 PRCM_GPIOCR_ALTCX(96, true, PRCM_IDX_GPIOCR2, 3, /* RF_INT */
1097 false, 0, 0,
1098 false, 0, 0,
1099 false, 0, 0
1100 ),
1101 PRCM_GPIOCR_ALTCX(97, true, PRCM_IDX_GPIOCR2, 1, /* RF_CTRL */
1102 false, 0, 0,
1103 false, 0, 0,
1104 false, 0, 0
1105 ),
1106 PRCM_GPIOCR_ALTCX(151, false, 0, 0,
1107 true, PRCM_IDX_GPIOCR1, 6, /* PTM_A9_CTL */
1108 true, PRCM_IDX_GPIOCR1, 15, /* DBG_ETM_R4_CMD1*/
1109 true, PRCM_IDX_GPIOCR1, 25 /* HW_OBS17 */
1110 ),
1111 PRCM_GPIOCR_ALTCX(152, true, PRCM_IDX_GPIOCR1, 4, /* Hx_CLK */
1112 true, PRCM_IDX_GPIOCR1, 6, /* PTM_A9_CLK */
1113 true, PRCM_IDX_GPIOCR1, 15, /* DBG_ETM_R4_CMD1*/
1114 true, PRCM_IDX_GPIOCR1, 25 /* HW_OBS16 */
1115 ),
1116 PRCM_GPIOCR_ALTCX(153, true, PRCM_IDX_GPIOCR1, 1, /* UARTMOD_CMD1 */
1117 true, PRCM_IDX_GPIOCR1, 14, /* PTM_A9_D15 */
1118 true, PRCM_IDX_GPIOCR1, 19, /* DBG_ETM_R4_CMD2 */
1119 true, PRCM_IDX_GPIOCR1, 25 /* HW_OBS15 */
1120 ),
1121 PRCM_GPIOCR_ALTCX(154, true, PRCM_IDX_GPIOCR1, 1, /* UARTMOD_CMD1 */
1122 true, PRCM_IDX_GPIOCR1, 14, /* PTM_A9_D14 */
1123 true, PRCM_IDX_GPIOCR1, 19, /* DBG_ETM_R4_CMD2 */
1124 true, PRCM_IDX_GPIOCR1, 25 /* HW_OBS14 */
1125 ),
1126 PRCM_GPIOCR_ALTCX(155, true, PRCM_IDX_GPIOCR1, 13, /* STM_MOD_CMD2 */
1127 true, PRCM_IDX_GPIOCR1, 14, /* PTM_A9_D13 */
1128 true, PRCM_IDX_GPIOCR1, 19, /* DBG_ETM_R4_CMD2 */
1129 true, PRCM_IDX_GPIOCR1, 25 /* HW_OBS13 */
1130 ),
1131 PRCM_GPIOCR_ALTCX(156, true, PRCM_IDX_GPIOCR1, 13, /* STM_MOD_CMD2 */
1132 true, PRCM_IDX_GPIOCR1, 14, /* PTM_A9_D12 */
1133 true, PRCM_IDX_GPIOCR1, 19, /* DBG_ETM_R4_CMD2 */
1134 true, PRCM_IDX_GPIOCR1, 25 /* HW_OBS12 */
1135 ),
1136 PRCM_GPIOCR_ALTCX(157, true, PRCM_IDX_GPIOCR1, 13, /* STM_MOD_CMD2 */
1137 true, PRCM_IDX_GPIOCR1, 14, /* PTM_A9_D11 */
1138 true, PRCM_IDX_GPIOCR1, 19, /* DBG_ETM_R4_CMD2 */
1139 true, PRCM_IDX_GPIOCR1, 25 /* HW_OBS11 */
1140 ),
1141 PRCM_GPIOCR_ALTCX(158, true, PRCM_IDX_GPIOCR1, 13, /* STM_MOD_CMD2 */
1142 true, PRCM_IDX_GPIOCR1, 14, /* PTM_A9_D10 */
1143 true, PRCM_IDX_GPIOCR1, 19, /* DBG_ETM_R4_CMD2 */
1144 true, PRCM_IDX_GPIOCR1, 25 /* HW_OBS10 */
1145 ),
1146 PRCM_GPIOCR_ALTCX(159, true, PRCM_IDX_GPIOCR1, 13, /* STM_MOD_CMD2 */
1147 true, PRCM_IDX_GPIOCR1, 14, /* PTM_A9_D9 */
1148 true, PRCM_IDX_GPIOCR1, 19, /* DBG_ETM_R4_CMD2 */
1149 true, PRCM_IDX_GPIOCR1, 25 /* HW_OBS9 */
1150 ),
1151 PRCM_GPIOCR_ALTCX(160, false, 0, 0,
1152 true, PRCM_IDX_GPIOCR1, 14, /* PTM_A9_D8 */
1153 true, PRCM_IDX_GPIOCR1, 19, /* DBG_ETM_R4_CMD2 */
1154 true, PRCM_IDX_GPIOCR1, 25 /* HW_OBS8 */
1155 ),
1156 PRCM_GPIOCR_ALTCX(161, true, PRCM_IDX_GPIOCR1, 4, /* Hx_GPIO7 */
1157 true, PRCM_IDX_GPIOCR1, 6, /* PTM_A9_D7 */
1158 true, PRCM_IDX_GPIOCR1, 15, /* DBG_ETM_R4_CMD1*/
1159 true, PRCM_IDX_GPIOCR1, 24 /* HW_OBS7 */
1160 ),
1161 PRCM_GPIOCR_ALTCX(162, true, PRCM_IDX_GPIOCR1, 4, /* Hx_GPIO6 */
1162 true, PRCM_IDX_GPIOCR1, 6, /* PTM_A9_D6 */
1163 true, PRCM_IDX_GPIOCR1, 15, /* DBG_ETM_R4_CMD1*/
1164 true, PRCM_IDX_GPIOCR1, 24 /* HW_OBS6 */
1165 ),
1166 PRCM_GPIOCR_ALTCX(163, true, PRCM_IDX_GPIOCR1, 4, /* Hx_GPIO5 */
1167 true, PRCM_IDX_GPIOCR1, 6, /* PTM_A9_D5 */
1168 true, PRCM_IDX_GPIOCR1, 15, /* DBG_ETM_R4_CMD1*/
1169 true, PRCM_IDX_GPIOCR1, 24 /* HW_OBS5 */
1170 ),
1171 PRCM_GPIOCR_ALTCX(164, true, PRCM_IDX_GPIOCR1, 4, /* Hx_GPIO4 */
1172 true, PRCM_IDX_GPIOCR1, 6, /* PTM_A9_D4 */
1173 true, PRCM_IDX_GPIOCR1, 15, /* DBG_ETM_R4_CMD1*/
1174 true, PRCM_IDX_GPIOCR1, 24 /* HW_OBS4 */
1175 ),
1176 PRCM_GPIOCR_ALTCX(165, true, PRCM_IDX_GPIOCR1, 4, /* Hx_GPIO3 */
1177 true, PRCM_IDX_GPIOCR1, 6, /* PTM_A9_D3 */
1178 true, PRCM_IDX_GPIOCR1, 15, /* DBG_ETM_R4_CMD1*/
1179 true, PRCM_IDX_GPIOCR1, 24 /* HW_OBS3 */
1180 ),
1181 PRCM_GPIOCR_ALTCX(166, true, PRCM_IDX_GPIOCR1, 4, /* Hx_GPIO2 */
1182 true, PRCM_IDX_GPIOCR1, 6, /* PTM_A9_D2 */
1183 true, PRCM_IDX_GPIOCR1, 15, /* DBG_ETM_R4_CMD1*/
1184 true, PRCM_IDX_GPIOCR1, 24 /* HW_OBS2 */
1185 ),
1186 PRCM_GPIOCR_ALTCX(167, true, PRCM_IDX_GPIOCR1, 4, /* Hx_GPIO1 */
1187 true, PRCM_IDX_GPIOCR1, 6, /* PTM_A9_D1 */
1188 true, PRCM_IDX_GPIOCR1, 15, /* DBG_ETM_R4_CMD1*/
1189 true, PRCM_IDX_GPIOCR1, 24 /* HW_OBS1 */
1190 ),
1191 PRCM_GPIOCR_ALTCX(168, true, PRCM_IDX_GPIOCR1, 4, /* Hx_GPIO0 */
1192 true, PRCM_IDX_GPIOCR1, 6, /* PTM_A9_D0 */
1193 true, PRCM_IDX_GPIOCR1, 15, /* DBG_ETM_R4_CMD1*/
1194 true, PRCM_IDX_GPIOCR1, 24 /* HW_OBS0 */
1195 ),
1196 PRCM_GPIOCR_ALTCX(170, true, PRCM_IDX_GPIOCR2, 2, /* RF_INT */
1197 false, 0, 0,
1198 false, 0, 0,
1199 false, 0, 0
1200 ),
1201 PRCM_GPIOCR_ALTCX(171, true, PRCM_IDX_GPIOCR2, 0, /* RF_CTRL */
1202 false, 0, 0,
1203 false, 0, 0,
1204 false, 0, 0
1205 ),
1206 PRCM_GPIOCR_ALTCX(215, true, PRCM_IDX_GPIOCR1, 23, /* SPI2_TXD */
1207 false, 0, 0,
1208 false, 0, 0,
1209 false, 0, 0
1210 ),
1211 PRCM_GPIOCR_ALTCX(216, true, PRCM_IDX_GPIOCR1, 23, /* SPI2_FRM */
1212 false, 0, 0,
1213 false, 0, 0,
1214 false, 0, 0
1215 ),
1216 PRCM_GPIOCR_ALTCX(217, true, PRCM_IDX_GPIOCR1, 23, /* SPI2_CLK */
1217 false, 0, 0,
1218 false, 0, 0,
1219 false, 0, 0
1220 ),
1221 PRCM_GPIOCR_ALTCX(218, true, PRCM_IDX_GPIOCR1, 23, /* SPI2_RXD */
1222 false, 0, 0,
1223 false, 0, 0,
1224 false, 0, 0
1225 ),
1226};
1227
1228static const u16 db8500_prcm_gpiocr_regs[] = {
1229 [PRCM_IDX_GPIOCR1] = 0x138,
1230 [PRCM_IDX_GPIOCR2] = 0x574,
1231};
1232
e98ea774 1233static const struct nmk_pinctrl_soc_data nmk_db8500_soc = {
e98ea774
LW		 1234 .pins = nmk_db8500_pins,
1235 .npins = ARRAY_SIZE(nmk_db8500_pins),
dbfe8ca2
LW		 1236 .functions = nmk_db8500_functions,
1237 .nfunctions = ARRAY_SIZE(nmk_db8500_functions),
e98ea774
LW		 1238 .groups = nmk_db8500_groups,
1239 .ngroups = ARRAY_SIZE(nmk_db8500_groups),
c22df08c
JNG		 1240 .altcx_pins = db8500_altcx_pins,
1241 .npins_altcx = ARRAY_SIZE(db8500_altcx_pins),
1242 .prcm_gpiocr_registers = db8500_prcm_gpiocr_regs,
e98ea774
LW		 1243};
1244
150632b0 1245void nmk_pinctrl_db8500_init(const struct nmk_pinctrl_soc_data **soc)
e98ea774
LW		 1246{
1247 *soc = &nmk_db8500_soc;
1248}
Linux 6.x block layer and io_uring tree(s)