Merge branch 'fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/evalenti/linux...
[linux-2.6-block.git] / drivers / pinctrl / core.c
CommitLineData
2744e8af
LW
1/*
2 * Core driver for the pin control subsystem
3 *
befe5bdf 4 * Copyright (C) 2011-2012 ST-Ericsson SA
2744e8af
LW
5 * Written on behalf of Linaro for ST-Ericsson
6 * Based on bits of regulator core, gpio core and clk core
7 *
8 * Author: Linus Walleij <linus.walleij@linaro.org>
9 *
b2b3e66e
SW
10 * Copyright (C) 2012 NVIDIA CORPORATION. All rights reserved.
11 *
2744e8af
LW
12 * License terms: GNU General Public License (GPL) version 2
13 */
14#define pr_fmt(fmt) "pinctrl core: " fmt
15
16#include <linux/kernel.h>
ab78029e 17#include <linux/kref.h>
a5a697cd 18#include <linux/export.h>
2744e8af
LW
19#include <linux/init.h>
20#include <linux/device.h>
21#include <linux/slab.h>
2744e8af
LW
22#include <linux/err.h>
23#include <linux/list.h>
2744e8af
LW
24#include <linux/sysfs.h>
25#include <linux/debugfs.h>
26#include <linux/seq_file.h>
6d4ca1fb 27#include <linux/pinctrl/consumer.h>
2744e8af
LW
28#include <linux/pinctrl/pinctrl.h>
29#include <linux/pinctrl/machine.h>
2afe8229
HZ
30
31#ifdef CONFIG_GPIOLIB
51e13c24 32#include <asm-generic/gpio.h>
2afe8229
HZ
33#endif
34
2744e8af 35#include "core.h"
57291ce2 36#include "devicetree.h"
2744e8af 37#include "pinmux.h"
ae6b4d85 38#include "pinconf.h"
2744e8af 39
b2b3e66e 40
5b3aa5f7
DA
41static bool pinctrl_dummy_state;
42
42fed7ba 43/* Mutex taken to protect pinctrl_list */
843aec96 44static DEFINE_MUTEX(pinctrl_list_mutex);
42fed7ba
PC
45
46/* Mutex taken to protect pinctrl_maps */
47DEFINE_MUTEX(pinctrl_maps_mutex);
48
49/* Mutex taken to protect pinctrldev_list */
843aec96 50static DEFINE_MUTEX(pinctrldev_list_mutex);
57b676f9
SW
51
52/* Global list of pin control devices (struct pinctrl_dev) */
42fed7ba 53static LIST_HEAD(pinctrldev_list);
2744e8af 54
57b676f9 55/* List of pin controller handles (struct pinctrl) */
befe5bdf
LW
56static LIST_HEAD(pinctrl_list);
57
57b676f9 58/* List of pinctrl maps (struct pinctrl_maps) */
6f9e41f4 59LIST_HEAD(pinctrl_maps);
b2b3e66e 60
befe5bdf 61
5b3aa5f7
DA
62/**
63 * pinctrl_provide_dummies() - indicate if pinctrl provides dummy state support
64 *
65 * Usually this function is called by platforms without pinctrl driver support
66 * but run with some shared drivers using pinctrl APIs.
67 * After calling this function, the pinctrl core will return successfully
68 * with creating a dummy state for the driver to keep going smoothly.
69 */
70void pinctrl_provide_dummies(void)
71{
72 pinctrl_dummy_state = true;
73}
74
2744e8af
LW
75const char *pinctrl_dev_get_name(struct pinctrl_dev *pctldev)
76{
77 /* We're not allowed to register devices without name */
78 return pctldev->desc->name;
79}
80EXPORT_SYMBOL_GPL(pinctrl_dev_get_name);
81
d6e99abb
HZ
82const char *pinctrl_dev_get_devname(struct pinctrl_dev *pctldev)
83{
84 return dev_name(pctldev->dev);
85}
86EXPORT_SYMBOL_GPL(pinctrl_dev_get_devname);
87
2744e8af
LW
88void *pinctrl_dev_get_drvdata(struct pinctrl_dev *pctldev)
89{
90 return pctldev->driver_data;
91}
92EXPORT_SYMBOL_GPL(pinctrl_dev_get_drvdata);
93
94/**
9dfac4fd
LW
95 * get_pinctrl_dev_from_devname() - look up pin controller device
96 * @devname: the name of a device instance, as returned by dev_name()
2744e8af
LW
97 *
98 * Looks up a pin control device matching a certain device name or pure device
99 * pointer, the pure device pointer will take precedence.
100 */
9dfac4fd 101struct pinctrl_dev *get_pinctrl_dev_from_devname(const char *devname)
2744e8af
LW
102{
103 struct pinctrl_dev *pctldev = NULL;
2744e8af 104
9dfac4fd
LW
105 if (!devname)
106 return NULL;
107
44d5f7bb
LW
108 mutex_lock(&pinctrldev_list_mutex);
109
2744e8af 110 list_for_each_entry(pctldev, &pinctrldev_list, node) {
9dfac4fd 111 if (!strcmp(dev_name(pctldev->dev), devname)) {
2744e8af 112 /* Matched on device name */
44d5f7bb
LW
113 mutex_unlock(&pinctrldev_list_mutex);
114 return pctldev;
2744e8af
LW
115 }
116 }
2744e8af 117
44d5f7bb
LW
118 mutex_unlock(&pinctrldev_list_mutex);
119
120 return NULL;
2744e8af
LW
121}
122
42fed7ba
PC
123struct pinctrl_dev *get_pinctrl_dev_from_of_node(struct device_node *np)
124{
125 struct pinctrl_dev *pctldev;
126
127 mutex_lock(&pinctrldev_list_mutex);
128
129 list_for_each_entry(pctldev, &pinctrldev_list, node)
130 if (pctldev->dev->of_node == np) {
131 mutex_unlock(&pinctrldev_list_mutex);
132 return pctldev;
133 }
134
d463f82d 135 mutex_unlock(&pinctrldev_list_mutex);
42fed7ba
PC
136
137 return NULL;
138}
139
ae6b4d85
LW
140/**
141 * pin_get_from_name() - look up a pin number from a name
142 * @pctldev: the pin control device to lookup the pin on
143 * @name: the name of the pin to look up
144 */
145int pin_get_from_name(struct pinctrl_dev *pctldev, const char *name)
146{
706e8520 147 unsigned i, pin;
ae6b4d85 148
706e8520
CP
149 /* The pin number can be retrived from the pin controller descriptor */
150 for (i = 0; i < pctldev->desc->npins; i++) {
ae6b4d85
LW
151 struct pin_desc *desc;
152
706e8520 153 pin = pctldev->desc->pins[i].number;
ae6b4d85
LW
154 desc = pin_desc_get(pctldev, pin);
155 /* Pin space may be sparse */
6c325f87 156 if (desc && !strcmp(name, desc->name))
ae6b4d85
LW
157 return pin;
158 }
159
160 return -EINVAL;
161}
162
dcb5dbc3
DA
163/**
164 * pin_get_name_from_id() - look up a pin name from a pin id
165 * @pctldev: the pin control device to lookup the pin on
166 * @name: the name of the pin to look up
167 */
168const char *pin_get_name(struct pinctrl_dev *pctldev, const unsigned pin)
169{
170 const struct pin_desc *desc;
171
172 desc = pin_desc_get(pctldev, pin);
173 if (desc == NULL) {
174 dev_err(pctldev->dev, "failed to get pin(%d) name\n",
175 pin);
176 return NULL;
177 }
178
179 return desc->name;
180}
181
2744e8af
LW
182/**
183 * pin_is_valid() - check if pin exists on controller
184 * @pctldev: the pin control device to check the pin on
185 * @pin: pin to check, use the local pin controller index number
186 *
187 * This tells us whether a certain pin exist on a certain pin controller or
188 * not. Pin lists may be sparse, so some pins may not exist.
189 */
190bool pin_is_valid(struct pinctrl_dev *pctldev, int pin)
191{
192 struct pin_desc *pindesc;
193
194 if (pin < 0)
195 return false;
196
42fed7ba 197 mutex_lock(&pctldev->mutex);
2744e8af 198 pindesc = pin_desc_get(pctldev, pin);
42fed7ba 199 mutex_unlock(&pctldev->mutex);
2744e8af 200
57b676f9 201 return pindesc != NULL;
2744e8af
LW
202}
203EXPORT_SYMBOL_GPL(pin_is_valid);
204
205/* Deletes a range of pin descriptors */
206static void pinctrl_free_pindescs(struct pinctrl_dev *pctldev,
207 const struct pinctrl_pin_desc *pins,
208 unsigned num_pins)
209{
210 int i;
211
2744e8af
LW
212 for (i = 0; i < num_pins; i++) {
213 struct pin_desc *pindesc;
214
215 pindesc = radix_tree_lookup(&pctldev->pin_desc_tree,
216 pins[i].number);
217 if (pindesc != NULL) {
218 radix_tree_delete(&pctldev->pin_desc_tree,
219 pins[i].number);
ca53c5f1
LW
220 if (pindesc->dynamic_name)
221 kfree(pindesc->name);
2744e8af
LW
222 }
223 kfree(pindesc);
224 }
2744e8af
LW
225}
226
227static int pinctrl_register_one_pin(struct pinctrl_dev *pctldev,
228 unsigned number, const char *name)
229{
230 struct pin_desc *pindesc;
231
232 pindesc = pin_desc_get(pctldev, number);
233 if (pindesc != NULL) {
234 pr_err("pin %d already registered on %s\n", number,
235 pctldev->desc->name);
236 return -EINVAL;
237 }
238
239 pindesc = kzalloc(sizeof(*pindesc), GFP_KERNEL);
95dcd4ae
SW
240 if (pindesc == NULL) {
241 dev_err(pctldev->dev, "failed to alloc struct pin_desc\n");
2744e8af 242 return -ENOMEM;
95dcd4ae 243 }
ae6b4d85 244
2744e8af
LW
245 /* Set owner */
246 pindesc->pctldev = pctldev;
247
9af1e44f 248 /* Copy basic pin info */
8dc6ae4d 249 if (name) {
ca53c5f1
LW
250 pindesc->name = name;
251 } else {
252 pindesc->name = kasprintf(GFP_KERNEL, "PIN%u", number);
eb26cc9c
SK
253 if (pindesc->name == NULL) {
254 kfree(pindesc);
ca53c5f1 255 return -ENOMEM;
eb26cc9c 256 }
ca53c5f1
LW
257 pindesc->dynamic_name = true;
258 }
2744e8af 259
2744e8af 260 radix_tree_insert(&pctldev->pin_desc_tree, number, pindesc);
2744e8af 261 pr_debug("registered pin %d (%s) on %s\n",
ca53c5f1 262 number, pindesc->name, pctldev->desc->name);
2744e8af
LW
263 return 0;
264}
265
266static int pinctrl_register_pins(struct pinctrl_dev *pctldev,
267 struct pinctrl_pin_desc const *pins,
268 unsigned num_descs)
269{
270 unsigned i;
271 int ret = 0;
272
273 for (i = 0; i < num_descs; i++) {
274 ret = pinctrl_register_one_pin(pctldev,
275 pins[i].number, pins[i].name);
276 if (ret)
277 return ret;
278 }
279
280 return 0;
281}
282
c8587eee
CR
283/**
284 * gpio_to_pin() - GPIO range GPIO number to pin number translation
285 * @range: GPIO range used for the translation
286 * @gpio: gpio pin to translate to a pin number
287 *
288 * Finds the pin number for a given GPIO using the specified GPIO range
289 * as a base for translation. The distinction between linear GPIO ranges
290 * and pin list based GPIO ranges is managed correctly by this function.
291 *
292 * This function assumes the gpio is part of the specified GPIO range, use
293 * only after making sure this is the case (e.g. by calling it on the
294 * result of successful pinctrl_get_device_gpio_range calls)!
295 */
296static inline int gpio_to_pin(struct pinctrl_gpio_range *range,
297 unsigned int gpio)
298{
299 unsigned int offset = gpio - range->base;
300 if (range->pins)
301 return range->pins[offset];
302 else
303 return range->pin_base + offset;
304}
305
2744e8af
LW
306/**
307 * pinctrl_match_gpio_range() - check if a certain GPIO pin is in range
308 * @pctldev: pin controller device to check
309 * @gpio: gpio pin to check taken from the global GPIO pin space
310 *
311 * Tries to match a GPIO pin number to the ranges handled by a certain pin
312 * controller, return the range or NULL
313 */
314static struct pinctrl_gpio_range *
315pinctrl_match_gpio_range(struct pinctrl_dev *pctldev, unsigned gpio)
316{
317 struct pinctrl_gpio_range *range = NULL;
318
42fed7ba 319 mutex_lock(&pctldev->mutex);
2744e8af 320 /* Loop over the ranges */
2744e8af
LW
321 list_for_each_entry(range, &pctldev->gpio_ranges, node) {
322 /* Check if we're in the valid range */
323 if (gpio >= range->base &&
324 gpio < range->base + range->npins) {
42fed7ba 325 mutex_unlock(&pctldev->mutex);
2744e8af
LW
326 return range;
327 }
328 }
42fed7ba 329 mutex_unlock(&pctldev->mutex);
2744e8af
LW
330 return NULL;
331}
332
51e13c24
HZ
333/**
334 * pinctrl_ready_for_gpio_range() - check if other GPIO pins of
335 * the same GPIO chip are in range
336 * @gpio: gpio pin to check taken from the global GPIO pin space
337 *
338 * This function is complement of pinctrl_match_gpio_range(). If the return
339 * value of pinctrl_match_gpio_range() is NULL, this function could be used
340 * to check whether pinctrl device is ready or not. Maybe some GPIO pins
341 * of the same GPIO chip don't have back-end pinctrl interface.
342 * If the return value is true, it means that pinctrl device is ready & the
343 * certain GPIO pin doesn't have back-end pinctrl device. If the return value
344 * is false, it means that pinctrl device may not be ready.
345 */
2afe8229 346#ifdef CONFIG_GPIOLIB
51e13c24
HZ
347static bool pinctrl_ready_for_gpio_range(unsigned gpio)
348{
349 struct pinctrl_dev *pctldev;
350 struct pinctrl_gpio_range *range = NULL;
351 struct gpio_chip *chip = gpio_to_chip(gpio);
352
44d5f7bb
LW
353 mutex_lock(&pinctrldev_list_mutex);
354
51e13c24
HZ
355 /* Loop over the pin controllers */
356 list_for_each_entry(pctldev, &pinctrldev_list, node) {
357 /* Loop over the ranges */
5ffbe2e6 358 mutex_lock(&pctldev->mutex);
51e13c24
HZ
359 list_for_each_entry(range, &pctldev->gpio_ranges, node) {
360 /* Check if any gpio range overlapped with gpio chip */
361 if (range->base + range->npins - 1 < chip->base ||
362 range->base > chip->base + chip->ngpio - 1)
363 continue;
5ffbe2e6 364 mutex_unlock(&pctldev->mutex);
44d5f7bb 365 mutex_unlock(&pinctrldev_list_mutex);
51e13c24
HZ
366 return true;
367 }
5ffbe2e6 368 mutex_unlock(&pctldev->mutex);
51e13c24 369 }
44d5f7bb
LW
370
371 mutex_unlock(&pinctrldev_list_mutex);
372
51e13c24
HZ
373 return false;
374}
2afe8229
HZ
375#else
376static bool pinctrl_ready_for_gpio_range(unsigned gpio) { return true; }
377#endif
51e13c24 378
2744e8af
LW
379/**
380 * pinctrl_get_device_gpio_range() - find device for GPIO range
381 * @gpio: the pin to locate the pin controller for
382 * @outdev: the pin control device if found
383 * @outrange: the GPIO range if found
384 *
385 * Find the pin controller handling a certain GPIO pin from the pinspace of
386 * the GPIO subsystem, return the device and the matching GPIO range. Returns
4650b7cb
DA
387 * -EPROBE_DEFER if the GPIO range could not be found in any device since it
388 * may still have not been registered.
2744e8af 389 */
4ecce45d
SW
390static int pinctrl_get_device_gpio_range(unsigned gpio,
391 struct pinctrl_dev **outdev,
392 struct pinctrl_gpio_range **outrange)
2744e8af
LW
393{
394 struct pinctrl_dev *pctldev = NULL;
395
f0059021
AL
396 mutex_lock(&pinctrldev_list_mutex);
397
2744e8af 398 /* Loop over the pin controllers */
2744e8af
LW
399 list_for_each_entry(pctldev, &pinctrldev_list, node) {
400 struct pinctrl_gpio_range *range;
401
402 range = pinctrl_match_gpio_range(pctldev, gpio);
403 if (range != NULL) {
404 *outdev = pctldev;
405 *outrange = range;
f0059021 406 mutex_unlock(&pinctrldev_list_mutex);
2744e8af
LW
407 return 0;
408 }
409 }
2744e8af 410
f0059021
AL
411 mutex_unlock(&pinctrldev_list_mutex);
412
4650b7cb 413 return -EPROBE_DEFER;
2744e8af
LW
414}
415
416/**
417 * pinctrl_add_gpio_range() - register a GPIO range for a controller
418 * @pctldev: pin controller device to add the range to
419 * @range: the GPIO range to add
420 *
421 * This adds a range of GPIOs to be handled by a certain pin controller. Call
422 * this to register handled ranges after registering your pin controller.
423 */
424void pinctrl_add_gpio_range(struct pinctrl_dev *pctldev,
425 struct pinctrl_gpio_range *range)
426{
42fed7ba 427 mutex_lock(&pctldev->mutex);
8b9c139f 428 list_add_tail(&range->node, &pctldev->gpio_ranges);
42fed7ba 429 mutex_unlock(&pctldev->mutex);
2744e8af 430}
4ecce45d 431EXPORT_SYMBOL_GPL(pinctrl_add_gpio_range);
2744e8af 432
3e5e00b6
DA
433void pinctrl_add_gpio_ranges(struct pinctrl_dev *pctldev,
434 struct pinctrl_gpio_range *ranges,
435 unsigned nranges)
436{
437 int i;
438
439 for (i = 0; i < nranges; i++)
440 pinctrl_add_gpio_range(pctldev, &ranges[i]);
441}
442EXPORT_SYMBOL_GPL(pinctrl_add_gpio_ranges);
443
192c369c 444struct pinctrl_dev *pinctrl_find_and_add_gpio_range(const char *devname,
f23f1516
SH
445 struct pinctrl_gpio_range *range)
446{
42fed7ba
PC
447 struct pinctrl_dev *pctldev;
448
42fed7ba 449 pctldev = get_pinctrl_dev_from_devname(devname);
f23f1516 450
dfa97515
LW
451 /*
452 * If we can't find this device, let's assume that is because
453 * it has not probed yet, so the driver trying to register this
454 * range need to defer probing.
455 */
42fed7ba 456 if (!pctldev) {
dfa97515 457 return ERR_PTR(-EPROBE_DEFER);
42fed7ba 458 }
f23f1516 459 pinctrl_add_gpio_range(pctldev, range);
42fed7ba 460
f23f1516
SH
461 return pctldev;
462}
192c369c 463EXPORT_SYMBOL_GPL(pinctrl_find_and_add_gpio_range);
f23f1516 464
586a87e6
CR
465int pinctrl_get_group_pins(struct pinctrl_dev *pctldev, const char *pin_group,
466 const unsigned **pins, unsigned *num_pins)
467{
468 const struct pinctrl_ops *pctlops = pctldev->desc->pctlops;
469 int gs;
470
e5b3b2d9
AT
471 if (!pctlops->get_group_pins)
472 return -EINVAL;
473
586a87e6
CR
474 gs = pinctrl_get_group_selector(pctldev, pin_group);
475 if (gs < 0)
476 return gs;
477
478 return pctlops->get_group_pins(pctldev, gs, pins, num_pins);
479}
480EXPORT_SYMBOL_GPL(pinctrl_get_group_pins);
481
9afbefb2
LW
482/**
483 * pinctrl_find_gpio_range_from_pin() - locate the GPIO range for a pin
484 * @pctldev: the pin controller device to look in
485 * @pin: a controller-local number to find the range for
486 */
487struct pinctrl_gpio_range *
488pinctrl_find_gpio_range_from_pin(struct pinctrl_dev *pctldev,
489 unsigned int pin)
490{
c8f50e86 491 struct pinctrl_gpio_range *range;
9afbefb2 492
42fed7ba 493 mutex_lock(&pctldev->mutex);
9afbefb2
LW
494 /* Loop over the ranges */
495 list_for_each_entry(range, &pctldev->gpio_ranges, node) {
496 /* Check if we're in the valid range */
c8587eee
CR
497 if (range->pins) {
498 int a;
499 for (a = 0; a < range->npins; a++) {
500 if (range->pins[a] == pin)
c8f50e86 501 goto out;
c8587eee
CR
502 }
503 } else if (pin >= range->pin_base &&
c8f50e86
WY
504 pin < range->pin_base + range->npins)
505 goto out;
9afbefb2 506 }
c8f50e86
WY
507 range = NULL;
508out:
42fed7ba 509 mutex_unlock(&pctldev->mutex);
c8f50e86 510 return range;
9afbefb2
LW
511}
512EXPORT_SYMBOL_GPL(pinctrl_find_gpio_range_from_pin);
513
7e10ee68
VK
514/**
515 * pinctrl_remove_gpio_range() - remove a range of GPIOs fro a pin controller
516 * @pctldev: pin controller device to remove the range from
517 * @range: the GPIO range to remove
518 */
519void pinctrl_remove_gpio_range(struct pinctrl_dev *pctldev,
520 struct pinctrl_gpio_range *range)
521{
42fed7ba 522 mutex_lock(&pctldev->mutex);
7e10ee68 523 list_del(&range->node);
42fed7ba 524 mutex_unlock(&pctldev->mutex);
7e10ee68
VK
525}
526EXPORT_SYMBOL_GPL(pinctrl_remove_gpio_range);
527
7afde8ba
LW
528/**
529 * pinctrl_get_group_selector() - returns the group selector for a group
530 * @pctldev: the pin controller handling the group
531 * @pin_group: the pin group to look up
532 */
533int pinctrl_get_group_selector(struct pinctrl_dev *pctldev,
534 const char *pin_group)
535{
536 const struct pinctrl_ops *pctlops = pctldev->desc->pctlops;
d1e90e9e 537 unsigned ngroups = pctlops->get_groups_count(pctldev);
7afde8ba
LW
538 unsigned group_selector = 0;
539
d1e90e9e 540 while (group_selector < ngroups) {
7afde8ba
LW
541 const char *gname = pctlops->get_group_name(pctldev,
542 group_selector);
543 if (!strcmp(gname, pin_group)) {
51cd24ee 544 dev_dbg(pctldev->dev,
7afde8ba
LW
545 "found group selector %u for %s\n",
546 group_selector,
547 pin_group);
548 return group_selector;
549 }
550
551 group_selector++;
552 }
553
51cd24ee 554 dev_err(pctldev->dev, "does not have pin group %s\n",
7afde8ba
LW
555 pin_group);
556
557 return -EINVAL;
558}
559
befe5bdf 560/**
b217e438 561 * pinctrl_request_gpio() - request a single pin to be used as GPIO
befe5bdf
LW
562 * @gpio: the GPIO pin number from the GPIO subsystem number space
563 *
564 * This function should *ONLY* be used from gpiolib-based GPIO drivers,
565 * as part of their gpio_request() semantics, platforms and individual drivers
566 * shall *NOT* request GPIO pins to be muxed in.
567 */
568int pinctrl_request_gpio(unsigned gpio)
569{
570 struct pinctrl_dev *pctldev;
571 struct pinctrl_gpio_range *range;
572 int ret;
573 int pin;
574
575 ret = pinctrl_get_device_gpio_range(gpio, &pctldev, &range);
57b676f9 576 if (ret) {
51e13c24
HZ
577 if (pinctrl_ready_for_gpio_range(gpio))
578 ret = 0;
4650b7cb 579 return ret;
57b676f9 580 }
befe5bdf 581
9b77ace4
AL
582 mutex_lock(&pctldev->mutex);
583
befe5bdf 584 /* Convert to the pin controllers number space */
c8587eee 585 pin = gpio_to_pin(range, gpio);
befe5bdf 586
57b676f9
SW
587 ret = pinmux_request_gpio(pctldev, range, pin, gpio);
588
9b77ace4
AL
589 mutex_unlock(&pctldev->mutex);
590
57b676f9 591 return ret;
befe5bdf
LW
592}
593EXPORT_SYMBOL_GPL(pinctrl_request_gpio);
594
595/**
596 * pinctrl_free_gpio() - free control on a single pin, currently used as GPIO
597 * @gpio: the GPIO pin number from the GPIO subsystem number space
598 *
599 * This function should *ONLY* be used from gpiolib-based GPIO drivers,
600 * as part of their gpio_free() semantics, platforms and individual drivers
601 * shall *NOT* request GPIO pins to be muxed out.
602 */
603void pinctrl_free_gpio(unsigned gpio)
604{
605 struct pinctrl_dev *pctldev;
606 struct pinctrl_gpio_range *range;
607 int ret;
608 int pin;
609
610 ret = pinctrl_get_device_gpio_range(gpio, &pctldev, &range);
57b676f9 611 if (ret) {
befe5bdf 612 return;
57b676f9 613 }
42fed7ba 614 mutex_lock(&pctldev->mutex);
befe5bdf
LW
615
616 /* Convert to the pin controllers number space */
c8587eee 617 pin = gpio_to_pin(range, gpio);
befe5bdf 618
57b676f9
SW
619 pinmux_free_gpio(pctldev, pin, range);
620
42fed7ba 621 mutex_unlock(&pctldev->mutex);
befe5bdf
LW
622}
623EXPORT_SYMBOL_GPL(pinctrl_free_gpio);
624
625static int pinctrl_gpio_direction(unsigned gpio, bool input)
626{
627 struct pinctrl_dev *pctldev;
628 struct pinctrl_gpio_range *range;
629 int ret;
630 int pin;
631
632 ret = pinctrl_get_device_gpio_range(gpio, &pctldev, &range);
42fed7ba 633 if (ret) {
befe5bdf 634 return ret;
42fed7ba
PC
635 }
636
637 mutex_lock(&pctldev->mutex);
befe5bdf
LW
638
639 /* Convert to the pin controllers number space */
c8587eee 640 pin = gpio_to_pin(range, gpio);
42fed7ba
PC
641 ret = pinmux_gpio_direction(pctldev, range, pin, input);
642
643 mutex_unlock(&pctldev->mutex);
befe5bdf 644
42fed7ba 645 return ret;
befe5bdf
LW
646}
647
648/**
649 * pinctrl_gpio_direction_input() - request a GPIO pin to go into input mode
650 * @gpio: the GPIO pin number from the GPIO subsystem number space
651 *
652 * This function should *ONLY* be used from gpiolib-based GPIO drivers,
653 * as part of their gpio_direction_input() semantics, platforms and individual
654 * drivers shall *NOT* touch pin control GPIO calls.
655 */
656int pinctrl_gpio_direction_input(unsigned gpio)
657{
42fed7ba 658 return pinctrl_gpio_direction(gpio, true);
befe5bdf
LW
659}
660EXPORT_SYMBOL_GPL(pinctrl_gpio_direction_input);
661
662/**
663 * pinctrl_gpio_direction_output() - request a GPIO pin to go into output mode
664 * @gpio: the GPIO pin number from the GPIO subsystem number space
665 *
666 * This function should *ONLY* be used from gpiolib-based GPIO drivers,
667 * as part of their gpio_direction_output() semantics, platforms and individual
668 * drivers shall *NOT* touch pin control GPIO calls.
669 */
670int pinctrl_gpio_direction_output(unsigned gpio)
671{
42fed7ba 672 return pinctrl_gpio_direction(gpio, false);
befe5bdf
LW
673}
674EXPORT_SYMBOL_GPL(pinctrl_gpio_direction_output);
675
6e5e959d
SW
676static struct pinctrl_state *find_state(struct pinctrl *p,
677 const char *name)
befe5bdf 678{
6e5e959d
SW
679 struct pinctrl_state *state;
680
681 list_for_each_entry(state, &p->states, node)
682 if (!strcmp(state->name, name))
683 return state;
684
685 return NULL;
686}
687
688static struct pinctrl_state *create_state(struct pinctrl *p,
689 const char *name)
690{
691 struct pinctrl_state *state;
692
693 state = kzalloc(sizeof(*state), GFP_KERNEL);
694 if (state == NULL) {
695 dev_err(p->dev,
696 "failed to alloc struct pinctrl_state\n");
697 return ERR_PTR(-ENOMEM);
698 }
699
700 state->name = name;
701 INIT_LIST_HEAD(&state->settings);
702
703 list_add_tail(&state->node, &p->states);
704
705 return state;
706}
707
708static int add_setting(struct pinctrl *p, struct pinctrl_map const *map)
709{
710 struct pinctrl_state *state;
7ecdb16f 711 struct pinctrl_setting *setting;
6e5e959d 712 int ret;
befe5bdf 713
6e5e959d
SW
714 state = find_state(p, map->name);
715 if (!state)
716 state = create_state(p, map->name);
717 if (IS_ERR(state))
718 return PTR_ERR(state);
befe5bdf 719
1e2082b5
SW
720 if (map->type == PIN_MAP_TYPE_DUMMY_STATE)
721 return 0;
722
6e5e959d
SW
723 setting = kzalloc(sizeof(*setting), GFP_KERNEL);
724 if (setting == NULL) {
725 dev_err(p->dev,
726 "failed to alloc struct pinctrl_setting\n");
727 return -ENOMEM;
728 }
befe5bdf 729
1e2082b5
SW
730 setting->type = map->type;
731
6e5e959d
SW
732 setting->pctldev = get_pinctrl_dev_from_devname(map->ctrl_dev_name);
733 if (setting->pctldev == NULL) {
6e5e959d 734 kfree(setting);
89216494
LW
735 /* Do not defer probing of hogs (circular loop) */
736 if (!strcmp(map->ctrl_dev_name, map->dev_name))
737 return -ENODEV;
c05127c4
LW
738 /*
739 * OK let us guess that the driver is not there yet, and
740 * let's defer obtaining this pinctrl handle to later...
741 */
89216494
LW
742 dev_info(p->dev, "unknown pinctrl device %s in map entry, deferring probe",
743 map->ctrl_dev_name);
c05127c4 744 return -EPROBE_DEFER;
6e5e959d
SW
745 }
746
1a78958d
LW
747 setting->dev_name = map->dev_name;
748
1e2082b5
SW
749 switch (map->type) {
750 case PIN_MAP_TYPE_MUX_GROUP:
751 ret = pinmux_map_to_setting(map, setting);
752 break;
753 case PIN_MAP_TYPE_CONFIGS_PIN:
754 case PIN_MAP_TYPE_CONFIGS_GROUP:
755 ret = pinconf_map_to_setting(map, setting);
756 break;
757 default:
758 ret = -EINVAL;
759 break;
760 }
6e5e959d
SW
761 if (ret < 0) {
762 kfree(setting);
763 return ret;
764 }
765
766 list_add_tail(&setting->node, &state->settings);
767
768 return 0;
769}
770
771static struct pinctrl *find_pinctrl(struct device *dev)
772{
773 struct pinctrl *p;
774
42fed7ba 775 mutex_lock(&pinctrl_list_mutex);
1e2082b5 776 list_for_each_entry(p, &pinctrl_list, node)
42fed7ba
PC
777 if (p->dev == dev) {
778 mutex_unlock(&pinctrl_list_mutex);
6e5e959d 779 return p;
42fed7ba 780 }
6e5e959d 781
42fed7ba 782 mutex_unlock(&pinctrl_list_mutex);
6e5e959d
SW
783 return NULL;
784}
785
42fed7ba 786static void pinctrl_free(struct pinctrl *p, bool inlist);
6e5e959d
SW
787
788static struct pinctrl *create_pinctrl(struct device *dev)
789{
790 struct pinctrl *p;
791 const char *devname;
792 struct pinctrl_maps *maps_node;
793 int i;
794 struct pinctrl_map const *map;
795 int ret;
befe5bdf
LW
796
797 /*
798 * create the state cookie holder struct pinctrl for each
799 * mapping, this is what consumers will get when requesting
800 * a pin control handle with pinctrl_get()
801 */
02f5b989 802 p = kzalloc(sizeof(*p), GFP_KERNEL);
95dcd4ae
SW
803 if (p == NULL) {
804 dev_err(dev, "failed to alloc struct pinctrl\n");
befe5bdf 805 return ERR_PTR(-ENOMEM);
95dcd4ae 806 }
7ecdb16f 807 p->dev = dev;
6e5e959d 808 INIT_LIST_HEAD(&p->states);
57291ce2
SW
809 INIT_LIST_HEAD(&p->dt_maps);
810
811 ret = pinctrl_dt_to_map(p);
812 if (ret < 0) {
813 kfree(p);
814 return ERR_PTR(ret);
815 }
6e5e959d
SW
816
817 devname = dev_name(dev);
befe5bdf 818
42fed7ba 819 mutex_lock(&pinctrl_maps_mutex);
befe5bdf 820 /* Iterate over the pin control maps to locate the right ones */
b2b3e66e 821 for_each_maps(maps_node, i, map) {
7ecdb16f
SW
822 /* Map must be for this device */
823 if (strcmp(map->dev_name, devname))
824 continue;
825
6e5e959d 826 ret = add_setting(p, map);
89216494
LW
827 /*
828 * At this point the adding of a setting may:
829 *
830 * - Defer, if the pinctrl device is not yet available
831 * - Fail, if the pinctrl device is not yet available,
832 * AND the setting is a hog. We cannot defer that, since
833 * the hog will kick in immediately after the device
834 * is registered.
835 *
836 * If the error returned was not -EPROBE_DEFER then we
837 * accumulate the errors to see if we end up with
838 * an -EPROBE_DEFER later, as that is the worst case.
839 */
840 if (ret == -EPROBE_DEFER) {
42fed7ba
PC
841 pinctrl_free(p, false);
842 mutex_unlock(&pinctrl_maps_mutex);
6e5e959d 843 return ERR_PTR(ret);
7ecdb16f 844 }
befe5bdf 845 }
42fed7ba
PC
846 mutex_unlock(&pinctrl_maps_mutex);
847
89216494
LW
848 if (ret < 0) {
849 /* If some other error than deferral occured, return here */
42fed7ba 850 pinctrl_free(p, false);
89216494
LW
851 return ERR_PTR(ret);
852 }
befe5bdf 853
ab78029e
LW
854 kref_init(&p->users);
855
b0666ba4 856 /* Add the pinctrl handle to the global list */
7b320cb1 857 mutex_lock(&pinctrl_list_mutex);
8b9c139f 858 list_add_tail(&p->node, &pinctrl_list);
7b320cb1 859 mutex_unlock(&pinctrl_list_mutex);
befe5bdf
LW
860
861 return p;
6e5e959d 862}
7ecdb16f 863
42fed7ba
PC
864/**
865 * pinctrl_get() - retrieves the pinctrl handle for a device
866 * @dev: the device to obtain the handle for
867 */
868struct pinctrl *pinctrl_get(struct device *dev)
6e5e959d
SW
869{
870 struct pinctrl *p;
7ecdb16f 871
6e5e959d
SW
872 if (WARN_ON(!dev))
873 return ERR_PTR(-EINVAL);
874
ab78029e
LW
875 /*
876 * See if somebody else (such as the device core) has already
877 * obtained a handle to the pinctrl for this device. In that case,
878 * return another pointer to it.
879 */
6e5e959d 880 p = find_pinctrl(dev);
ab78029e
LW
881 if (p != NULL) {
882 dev_dbg(dev, "obtain a copy of previously claimed pinctrl\n");
883 kref_get(&p->users);
884 return p;
885 }
7ecdb16f 886
d599bfb3 887 return create_pinctrl(dev);
befe5bdf
LW
888}
889EXPORT_SYMBOL_GPL(pinctrl_get);
890
d3cee830
RG
891static void pinctrl_free_setting(bool disable_setting,
892 struct pinctrl_setting *setting)
893{
894 switch (setting->type) {
895 case PIN_MAP_TYPE_MUX_GROUP:
896 if (disable_setting)
897 pinmux_disable_setting(setting);
898 pinmux_free_setting(setting);
899 break;
900 case PIN_MAP_TYPE_CONFIGS_PIN:
901 case PIN_MAP_TYPE_CONFIGS_GROUP:
902 pinconf_free_setting(setting);
903 break;
904 default:
905 break;
906 }
907}
908
42fed7ba 909static void pinctrl_free(struct pinctrl *p, bool inlist)
befe5bdf 910{
6e5e959d
SW
911 struct pinctrl_state *state, *n1;
912 struct pinctrl_setting *setting, *n2;
913
42fed7ba 914 mutex_lock(&pinctrl_list_mutex);
6e5e959d
SW
915 list_for_each_entry_safe(state, n1, &p->states, node) {
916 list_for_each_entry_safe(setting, n2, &state->settings, node) {
d3cee830 917 pinctrl_free_setting(state == p->state, setting);
6e5e959d
SW
918 list_del(&setting->node);
919 kfree(setting);
920 }
921 list_del(&state->node);
922 kfree(state);
7ecdb16f 923 }
befe5bdf 924
57291ce2
SW
925 pinctrl_dt_free_maps(p);
926
6e5e959d
SW
927 if (inlist)
928 list_del(&p->node);
befe5bdf 929 kfree(p);
42fed7ba 930 mutex_unlock(&pinctrl_list_mutex);
befe5bdf 931}
befe5bdf
LW
932
933/**
ab78029e
LW
934 * pinctrl_release() - release the pinctrl handle
935 * @kref: the kref in the pinctrl being released
936 */
2917e833 937static void pinctrl_release(struct kref *kref)
ab78029e
LW
938{
939 struct pinctrl *p = container_of(kref, struct pinctrl, users);
940
42fed7ba 941 pinctrl_free(p, true);
ab78029e
LW
942}
943
944/**
945 * pinctrl_put() - decrease use count on a previously claimed pinctrl handle
6e5e959d 946 * @p: the pinctrl handle to release
befe5bdf 947 */
57b676f9
SW
948void pinctrl_put(struct pinctrl *p)
949{
ab78029e 950 kref_put(&p->users, pinctrl_release);
57b676f9
SW
951}
952EXPORT_SYMBOL_GPL(pinctrl_put);
953
42fed7ba
PC
954/**
955 * pinctrl_lookup_state() - retrieves a state handle from a pinctrl handle
956 * @p: the pinctrl handle to retrieve the state from
957 * @name: the state name to retrieve
958 */
959struct pinctrl_state *pinctrl_lookup_state(struct pinctrl *p,
960 const char *name)
befe5bdf 961{
6e5e959d 962 struct pinctrl_state *state;
befe5bdf 963
6e5e959d 964 state = find_state(p, name);
5b3aa5f7
DA
965 if (!state) {
966 if (pinctrl_dummy_state) {
967 /* create dummy state */
968 dev_dbg(p->dev, "using pinctrl dummy state (%s)\n",
969 name);
970 state = create_state(p, name);
d599bfb3
RG
971 } else
972 state = ERR_PTR(-ENODEV);
5b3aa5f7 973 }
57b676f9 974
6e5e959d 975 return state;
befe5bdf 976}
42fed7ba 977EXPORT_SYMBOL_GPL(pinctrl_lookup_state);
befe5bdf
LW
978
979/**
42fed7ba
PC
980 * pinctrl_select_state() - select/activate/program a pinctrl state to HW
981 * @p: the pinctrl handle for the device that requests configuration
982 * @state: the state handle to select/activate/program
befe5bdf 983 */
42fed7ba 984int pinctrl_select_state(struct pinctrl *p, struct pinctrl_state *state)
befe5bdf 985{
6e5e959d 986 struct pinctrl_setting *setting, *setting2;
50cf7c8a 987 struct pinctrl_state *old_state = p->state;
6e5e959d 988 int ret;
7ecdb16f 989
6e5e959d
SW
990 if (p->state == state)
991 return 0;
befe5bdf 992
6e5e959d
SW
993 if (p->state) {
994 /*
2243a87d
FW
995 * For each pinmux setting in the old state, forget SW's record
996 * of mux owner for that pingroup. Any pingroups which are
997 * still owned by the new state will be re-acquired by the call
998 * to pinmux_enable_setting() in the loop below.
6e5e959d
SW
999 */
1000 list_for_each_entry(setting, &p->state->settings, node) {
1e2082b5
SW
1001 if (setting->type != PIN_MAP_TYPE_MUX_GROUP)
1002 continue;
2243a87d 1003 pinmux_disable_setting(setting);
6e5e959d
SW
1004 }
1005 }
1006
3102a76c 1007 p->state = NULL;
6e5e959d
SW
1008
1009 /* Apply all the settings for the new state */
1010 list_for_each_entry(setting, &state->settings, node) {
1e2082b5
SW
1011 switch (setting->type) {
1012 case PIN_MAP_TYPE_MUX_GROUP:
1013 ret = pinmux_enable_setting(setting);
1014 break;
1015 case PIN_MAP_TYPE_CONFIGS_PIN:
1016 case PIN_MAP_TYPE_CONFIGS_GROUP:
1017 ret = pinconf_apply_setting(setting);
1018 break;
1019 default:
1020 ret = -EINVAL;
1021 break;
1022 }
3102a76c 1023
42fed7ba 1024 if (ret < 0) {
3102a76c 1025 goto unapply_new_state;
42fed7ba 1026 }
befe5bdf 1027 }
6e5e959d 1028
3102a76c
RG
1029 p->state = state;
1030
6e5e959d 1031 return 0;
3102a76c
RG
1032
1033unapply_new_state:
da58751c 1034 dev_err(p->dev, "Error applying setting, reverse things back\n");
3102a76c 1035
3102a76c
RG
1036 list_for_each_entry(setting2, &state->settings, node) {
1037 if (&setting2->node == &setting->node)
1038 break;
af606177
RG
1039 /*
1040 * All we can do here is pinmux_disable_setting.
1041 * That means that some pins are muxed differently now
1042 * than they were before applying the setting (We can't
1043 * "unmux a pin"!), but it's not a big deal since the pins
1044 * are free to be muxed by another apply_setting.
1045 */
1046 if (setting2->type == PIN_MAP_TYPE_MUX_GROUP)
1047 pinmux_disable_setting(setting2);
3102a76c 1048 }
8009d5ff 1049
385d9424
RG
1050 /* There's no infinite recursive loop here because p->state is NULL */
1051 if (old_state)
42fed7ba 1052 pinctrl_select_state(p, old_state);
6e5e959d
SW
1053
1054 return ret;
befe5bdf 1055}
6e5e959d 1056EXPORT_SYMBOL_GPL(pinctrl_select_state);
befe5bdf 1057
6d4ca1fb
SW
1058static void devm_pinctrl_release(struct device *dev, void *res)
1059{
1060 pinctrl_put(*(struct pinctrl **)res);
1061}
1062
1063/**
1064 * struct devm_pinctrl_get() - Resource managed pinctrl_get()
1065 * @dev: the device to obtain the handle for
1066 *
1067 * If there is a need to explicitly destroy the returned struct pinctrl,
1068 * devm_pinctrl_put() should be used, rather than plain pinctrl_put().
1069 */
1070struct pinctrl *devm_pinctrl_get(struct device *dev)
1071{
1072 struct pinctrl **ptr, *p;
1073
1074 ptr = devres_alloc(devm_pinctrl_release, sizeof(*ptr), GFP_KERNEL);
1075 if (!ptr)
1076 return ERR_PTR(-ENOMEM);
1077
1078 p = pinctrl_get(dev);
1079 if (!IS_ERR(p)) {
1080 *ptr = p;
1081 devres_add(dev, ptr);
1082 } else {
1083 devres_free(ptr);
1084 }
1085
1086 return p;
1087}
1088EXPORT_SYMBOL_GPL(devm_pinctrl_get);
1089
1090static int devm_pinctrl_match(struct device *dev, void *res, void *data)
1091{
1092 struct pinctrl **p = res;
1093
1094 return *p == data;
1095}
1096
1097/**
1098 * devm_pinctrl_put() - Resource managed pinctrl_put()
1099 * @p: the pinctrl handle to release
1100 *
1101 * Deallocate a struct pinctrl obtained via devm_pinctrl_get(). Normally
1102 * this function will not need to be called and the resource management
1103 * code will ensure that the resource is freed.
1104 */
1105void devm_pinctrl_put(struct pinctrl *p)
1106{
a72149e8 1107 WARN_ON(devres_release(p->dev, devm_pinctrl_release,
6d4ca1fb 1108 devm_pinctrl_match, p));
6d4ca1fb
SW
1109}
1110EXPORT_SYMBOL_GPL(devm_pinctrl_put);
1111
57291ce2 1112int pinctrl_register_map(struct pinctrl_map const *maps, unsigned num_maps,
c5272a28 1113 bool dup)
befe5bdf 1114{
1e2082b5 1115 int i, ret;
b2b3e66e 1116 struct pinctrl_maps *maps_node;
befe5bdf 1117
7e9236ff 1118 pr_debug("add %u pinctrl maps\n", num_maps);
befe5bdf
LW
1119
1120 /* First sanity check the new mapping */
1121 for (i = 0; i < num_maps; i++) {
1e2082b5
SW
1122 if (!maps[i].dev_name) {
1123 pr_err("failed to register map %s (%d): no device given\n",
1124 maps[i].name, i);
1125 return -EINVAL;
1126 }
1127
befe5bdf
LW
1128 if (!maps[i].name) {
1129 pr_err("failed to register map %d: no map name given\n",
95dcd4ae 1130 i);
befe5bdf
LW
1131 return -EINVAL;
1132 }
1133
1e2082b5
SW
1134 if (maps[i].type != PIN_MAP_TYPE_DUMMY_STATE &&
1135 !maps[i].ctrl_dev_name) {
befe5bdf
LW
1136 pr_err("failed to register map %s (%d): no pin control device given\n",
1137 maps[i].name, i);
1138 return -EINVAL;
1139 }
1140
1e2082b5
SW
1141 switch (maps[i].type) {
1142 case PIN_MAP_TYPE_DUMMY_STATE:
1143 break;
1144 case PIN_MAP_TYPE_MUX_GROUP:
1145 ret = pinmux_validate_map(&maps[i], i);
1146 if (ret < 0)
fde04f41 1147 return ret;
1e2082b5
SW
1148 break;
1149 case PIN_MAP_TYPE_CONFIGS_PIN:
1150 case PIN_MAP_TYPE_CONFIGS_GROUP:
1151 ret = pinconf_validate_map(&maps[i], i);
1152 if (ret < 0)
fde04f41 1153 return ret;
1e2082b5
SW
1154 break;
1155 default:
1156 pr_err("failed to register map %s (%d): invalid type given\n",
95dcd4ae 1157 maps[i].name, i);
1681f5ae
SW
1158 return -EINVAL;
1159 }
befe5bdf
LW
1160 }
1161
b2b3e66e
SW
1162 maps_node = kzalloc(sizeof(*maps_node), GFP_KERNEL);
1163 if (!maps_node) {
1164 pr_err("failed to alloc struct pinctrl_maps\n");
1165 return -ENOMEM;
1166 }
befe5bdf 1167
b2b3e66e 1168 maps_node->num_maps = num_maps;
57291ce2
SW
1169 if (dup) {
1170 maps_node->maps = kmemdup(maps, sizeof(*maps) * num_maps,
1171 GFP_KERNEL);
1172 if (!maps_node->maps) {
1173 pr_err("failed to duplicate mapping table\n");
1174 kfree(maps_node);
1175 return -ENOMEM;
1176 }
1177 } else {
1178 maps_node->maps = maps;
befe5bdf
LW
1179 }
1180
c5272a28 1181 mutex_lock(&pinctrl_maps_mutex);
b2b3e66e 1182 list_add_tail(&maps_node->node, &pinctrl_maps);
c5272a28 1183 mutex_unlock(&pinctrl_maps_mutex);
b2b3e66e 1184
befe5bdf
LW
1185 return 0;
1186}
1187
57291ce2
SW
1188/**
1189 * pinctrl_register_mappings() - register a set of pin controller mappings
1190 * @maps: the pincontrol mappings table to register. This should probably be
1191 * marked with __initdata so it can be discarded after boot. This
1192 * function will perform a shallow copy for the mapping entries.
1193 * @num_maps: the number of maps in the mapping table
1194 */
1195int pinctrl_register_mappings(struct pinctrl_map const *maps,
1196 unsigned num_maps)
1197{
c5272a28 1198 return pinctrl_register_map(maps, num_maps, true);
57291ce2
SW
1199}
1200
1201void pinctrl_unregister_map(struct pinctrl_map const *map)
1202{
1203 struct pinctrl_maps *maps_node;
1204
42fed7ba 1205 mutex_lock(&pinctrl_maps_mutex);
57291ce2
SW
1206 list_for_each_entry(maps_node, &pinctrl_maps, node) {
1207 if (maps_node->maps == map) {
1208 list_del(&maps_node->node);
db6c2c69 1209 kfree(maps_node);
42fed7ba 1210 mutex_unlock(&pinctrl_maps_mutex);
57291ce2
SW
1211 return;
1212 }
1213 }
42fed7ba 1214 mutex_unlock(&pinctrl_maps_mutex);
57291ce2
SW
1215}
1216
840a47ba
JD
1217/**
1218 * pinctrl_force_sleep() - turn a given controller device into sleep state
1219 * @pctldev: pin controller device
1220 */
1221int pinctrl_force_sleep(struct pinctrl_dev *pctldev)
1222{
1223 if (!IS_ERR(pctldev->p) && !IS_ERR(pctldev->hog_sleep))
1224 return pinctrl_select_state(pctldev->p, pctldev->hog_sleep);
1225 return 0;
1226}
1227EXPORT_SYMBOL_GPL(pinctrl_force_sleep);
1228
1229/**
1230 * pinctrl_force_default() - turn a given controller device into default state
1231 * @pctldev: pin controller device
1232 */
1233int pinctrl_force_default(struct pinctrl_dev *pctldev)
1234{
1235 if (!IS_ERR(pctldev->p) && !IS_ERR(pctldev->hog_default))
1236 return pinctrl_select_state(pctldev->p, pctldev->hog_default);
1237 return 0;
1238}
1239EXPORT_SYMBOL_GPL(pinctrl_force_default);
1240
14005ee2
LW
1241#ifdef CONFIG_PM
1242
1243/**
f3333497 1244 * pinctrl_pm_select_state() - select pinctrl state for PM
14005ee2 1245 * @dev: device to select default state for
f3333497 1246 * @state: state to set
14005ee2 1247 */
f3333497
TL
1248static int pinctrl_pm_select_state(struct device *dev,
1249 struct pinctrl_state *state)
14005ee2
LW
1250{
1251 struct dev_pin_info *pins = dev->pins;
1252 int ret;
1253
f3333497
TL
1254 if (IS_ERR(state))
1255 return 0; /* No such state */
1256 ret = pinctrl_select_state(pins->p, state);
14005ee2 1257 if (ret)
f3333497
TL
1258 dev_err(dev, "failed to activate pinctrl state %s\n",
1259 state->name);
14005ee2
LW
1260 return ret;
1261}
f3333497
TL
1262
1263/**
1264 * pinctrl_pm_select_default_state() - select default pinctrl state for PM
1265 * @dev: device to select default state for
1266 */
1267int pinctrl_pm_select_default_state(struct device *dev)
1268{
1269 if (!dev->pins)
1270 return 0;
1271
1272 return pinctrl_pm_select_state(dev, dev->pins->default_state);
1273}
f472dead 1274EXPORT_SYMBOL_GPL(pinctrl_pm_select_default_state);
14005ee2
LW
1275
1276/**
1277 * pinctrl_pm_select_sleep_state() - select sleep pinctrl state for PM
1278 * @dev: device to select sleep state for
1279 */
1280int pinctrl_pm_select_sleep_state(struct device *dev)
1281{
f3333497 1282 if (!dev->pins)
14005ee2 1283 return 0;
f3333497
TL
1284
1285 return pinctrl_pm_select_state(dev, dev->pins->sleep_state);
14005ee2 1286}
f472dead 1287EXPORT_SYMBOL_GPL(pinctrl_pm_select_sleep_state);
14005ee2
LW
1288
1289/**
1290 * pinctrl_pm_select_idle_state() - select idle pinctrl state for PM
1291 * @dev: device to select idle state for
1292 */
1293int pinctrl_pm_select_idle_state(struct device *dev)
1294{
f3333497 1295 if (!dev->pins)
14005ee2 1296 return 0;
f3333497
TL
1297
1298 return pinctrl_pm_select_state(dev, dev->pins->idle_state);
14005ee2 1299}
f472dead 1300EXPORT_SYMBOL_GPL(pinctrl_pm_select_idle_state);
14005ee2
LW
1301#endif
1302
2744e8af
LW
1303#ifdef CONFIG_DEBUG_FS
1304
1305static int pinctrl_pins_show(struct seq_file *s, void *what)
1306{
1307 struct pinctrl_dev *pctldev = s->private;
1308 const struct pinctrl_ops *ops = pctldev->desc->pctlops;
706e8520 1309 unsigned i, pin;
2744e8af
LW
1310
1311 seq_printf(s, "registered pins: %d\n", pctldev->desc->npins);
2744e8af 1312
42fed7ba 1313 mutex_lock(&pctldev->mutex);
57b676f9 1314
706e8520
CP
1315 /* The pin number can be retrived from the pin controller descriptor */
1316 for (i = 0; i < pctldev->desc->npins; i++) {
2744e8af
LW
1317 struct pin_desc *desc;
1318
706e8520 1319 pin = pctldev->desc->pins[i].number;
2744e8af
LW
1320 desc = pin_desc_get(pctldev, pin);
1321 /* Pin space may be sparse */
1322 if (desc == NULL)
1323 continue;
1324
1325 seq_printf(s, "pin %d (%s) ", pin,
1326 desc->name ? desc->name : "unnamed");
1327
1328 /* Driver-specific info per pin */
1329 if (ops->pin_dbg_show)
1330 ops->pin_dbg_show(pctldev, s, pin);
1331
1332 seq_puts(s, "\n");
1333 }
1334
42fed7ba 1335 mutex_unlock(&pctldev->mutex);
57b676f9 1336
2744e8af
LW
1337 return 0;
1338}
1339
1340static int pinctrl_groups_show(struct seq_file *s, void *what)
1341{
1342 struct pinctrl_dev *pctldev = s->private;
1343 const struct pinctrl_ops *ops = pctldev->desc->pctlops;
d1e90e9e 1344 unsigned ngroups, selector = 0;
2744e8af 1345
42fed7ba
PC
1346 mutex_lock(&pctldev->mutex);
1347
d1e90e9e 1348 ngroups = ops->get_groups_count(pctldev);
57b676f9 1349
2744e8af 1350 seq_puts(s, "registered pin groups:\n");
d1e90e9e 1351 while (selector < ngroups) {
e5b3b2d9
AT
1352 const unsigned *pins = NULL;
1353 unsigned num_pins = 0;
2744e8af 1354 const char *gname = ops->get_group_name(pctldev, selector);
dcb5dbc3 1355 const char *pname;
e5b3b2d9 1356 int ret = 0;
2744e8af
LW
1357 int i;
1358
e5b3b2d9
AT
1359 if (ops->get_group_pins)
1360 ret = ops->get_group_pins(pctldev, selector,
1361 &pins, &num_pins);
2744e8af
LW
1362 if (ret)
1363 seq_printf(s, "%s [ERROR GETTING PINS]\n",
1364 gname);
1365 else {
dcb5dbc3
DA
1366 seq_printf(s, "group: %s\n", gname);
1367 for (i = 0; i < num_pins; i++) {
1368 pname = pin_get_name(pctldev, pins[i]);
b4dd784b 1369 if (WARN_ON(!pname)) {
42fed7ba 1370 mutex_unlock(&pctldev->mutex);
dcb5dbc3 1371 return -EINVAL;
b4dd784b 1372 }
dcb5dbc3
DA
1373 seq_printf(s, "pin %d (%s)\n", pins[i], pname);
1374 }
1375 seq_puts(s, "\n");
2744e8af
LW
1376 }
1377 selector++;
1378 }
1379
42fed7ba 1380 mutex_unlock(&pctldev->mutex);
2744e8af
LW
1381
1382 return 0;
1383}
1384
1385static int pinctrl_gpioranges_show(struct seq_file *s, void *what)
1386{
1387 struct pinctrl_dev *pctldev = s->private;
1388 struct pinctrl_gpio_range *range = NULL;
1389
1390 seq_puts(s, "GPIO ranges handled:\n");
1391
42fed7ba 1392 mutex_lock(&pctldev->mutex);
57b676f9 1393
2744e8af 1394 /* Loop over the ranges */
2744e8af 1395 list_for_each_entry(range, &pctldev->gpio_ranges, node) {
c8587eee
CR
1396 if (range->pins) {
1397 int a;
1398 seq_printf(s, "%u: %s GPIOS [%u - %u] PINS {",
1399 range->id, range->name,
1400 range->base, (range->base + range->npins - 1));
1401 for (a = 0; a < range->npins - 1; a++)
1402 seq_printf(s, "%u, ", range->pins[a]);
1403 seq_printf(s, "%u}\n", range->pins[a]);
1404 }
1405 else
1406 seq_printf(s, "%u: %s GPIOS [%u - %u] PINS [%u - %u]\n",
1407 range->id, range->name,
1408 range->base, (range->base + range->npins - 1),
1409 range->pin_base,
1410 (range->pin_base + range->npins - 1));
2744e8af 1411 }
57b676f9 1412
42fed7ba 1413 mutex_unlock(&pctldev->mutex);
2744e8af
LW
1414
1415 return 0;
1416}
1417
1418static int pinctrl_devices_show(struct seq_file *s, void *what)
1419{
1420 struct pinctrl_dev *pctldev;
1421
ae6b4d85 1422 seq_puts(s, "name [pinmux] [pinconf]\n");
57b676f9 1423
42fed7ba 1424 mutex_lock(&pinctrldev_list_mutex);
57b676f9 1425
2744e8af
LW
1426 list_for_each_entry(pctldev, &pinctrldev_list, node) {
1427 seq_printf(s, "%s ", pctldev->desc->name);
1428 if (pctldev->desc->pmxops)
ae6b4d85
LW
1429 seq_puts(s, "yes ");
1430 else
1431 seq_puts(s, "no ");
1432 if (pctldev->desc->confops)
2744e8af
LW
1433 seq_puts(s, "yes");
1434 else
1435 seq_puts(s, "no");
1436 seq_puts(s, "\n");
1437 }
57b676f9 1438
42fed7ba 1439 mutex_unlock(&pinctrldev_list_mutex);
2744e8af
LW
1440
1441 return 0;
1442}
1443
1e2082b5
SW
1444static inline const char *map_type(enum pinctrl_map_type type)
1445{
1446 static const char * const names[] = {
1447 "INVALID",
1448 "DUMMY_STATE",
1449 "MUX_GROUP",
1450 "CONFIGS_PIN",
1451 "CONFIGS_GROUP",
1452 };
1453
1454 if (type >= ARRAY_SIZE(names))
1455 return "UNKNOWN";
1456
1457 return names[type];
1458}
1459
3eedb437
SW
1460static int pinctrl_maps_show(struct seq_file *s, void *what)
1461{
1462 struct pinctrl_maps *maps_node;
1463 int i;
1464 struct pinctrl_map const *map;
1465
1466 seq_puts(s, "Pinctrl maps:\n");
1467
42fed7ba 1468 mutex_lock(&pinctrl_maps_mutex);
3eedb437 1469 for_each_maps(maps_node, i, map) {
1e2082b5
SW
1470 seq_printf(s, "device %s\nstate %s\ntype %s (%d)\n",
1471 map->dev_name, map->name, map_type(map->type),
1472 map->type);
1473
1474 if (map->type != PIN_MAP_TYPE_DUMMY_STATE)
1475 seq_printf(s, "controlling device %s\n",
1476 map->ctrl_dev_name);
1477
1478 switch (map->type) {
1479 case PIN_MAP_TYPE_MUX_GROUP:
1480 pinmux_show_map(s, map);
1481 break;
1482 case PIN_MAP_TYPE_CONFIGS_PIN:
1483 case PIN_MAP_TYPE_CONFIGS_GROUP:
1484 pinconf_show_map(s, map);
1485 break;
1486 default:
1487 break;
1488 }
1489
1490 seq_printf(s, "\n");
3eedb437 1491 }
42fed7ba 1492 mutex_unlock(&pinctrl_maps_mutex);
3eedb437
SW
1493
1494 return 0;
1495}
1496
befe5bdf
LW
1497static int pinctrl_show(struct seq_file *s, void *what)
1498{
1499 struct pinctrl *p;
6e5e959d 1500 struct pinctrl_state *state;
7ecdb16f 1501 struct pinctrl_setting *setting;
befe5bdf
LW
1502
1503 seq_puts(s, "Requested pin control handlers their pinmux maps:\n");
57b676f9 1504
42fed7ba 1505 mutex_lock(&pinctrl_list_mutex);
57b676f9 1506
befe5bdf 1507 list_for_each_entry(p, &pinctrl_list, node) {
6e5e959d
SW
1508 seq_printf(s, "device: %s current state: %s\n",
1509 dev_name(p->dev),
1510 p->state ? p->state->name : "none");
1511
1512 list_for_each_entry(state, &p->states, node) {
1513 seq_printf(s, " state: %s\n", state->name);
befe5bdf 1514
6e5e959d 1515 list_for_each_entry(setting, &state->settings, node) {
1e2082b5
SW
1516 struct pinctrl_dev *pctldev = setting->pctldev;
1517
1518 seq_printf(s, " type: %s controller %s ",
1519 map_type(setting->type),
1520 pinctrl_dev_get_name(pctldev));
1521
1522 switch (setting->type) {
1523 case PIN_MAP_TYPE_MUX_GROUP:
1524 pinmux_show_setting(s, setting);
1525 break;
1526 case PIN_MAP_TYPE_CONFIGS_PIN:
1527 case PIN_MAP_TYPE_CONFIGS_GROUP:
1528 pinconf_show_setting(s, setting);
1529 break;
1530 default:
1531 break;
1532 }
6e5e959d 1533 }
befe5bdf 1534 }
befe5bdf
LW
1535 }
1536
42fed7ba 1537 mutex_unlock(&pinctrl_list_mutex);
57b676f9 1538
befe5bdf
LW
1539 return 0;
1540}
1541
2744e8af
LW
1542static int pinctrl_pins_open(struct inode *inode, struct file *file)
1543{
1544 return single_open(file, pinctrl_pins_show, inode->i_private);
1545}
1546
1547static int pinctrl_groups_open(struct inode *inode, struct file *file)
1548{
1549 return single_open(file, pinctrl_groups_show, inode->i_private);
1550}
1551
1552static int pinctrl_gpioranges_open(struct inode *inode, struct file *file)
1553{
1554 return single_open(file, pinctrl_gpioranges_show, inode->i_private);
1555}
1556
1557static int pinctrl_devices_open(struct inode *inode, struct file *file)
1558{
1559 return single_open(file, pinctrl_devices_show, NULL);
1560}
1561
3eedb437
SW
1562static int pinctrl_maps_open(struct inode *inode, struct file *file)
1563{
1564 return single_open(file, pinctrl_maps_show, NULL);
1565}
1566
befe5bdf
LW
1567static int pinctrl_open(struct inode *inode, struct file *file)
1568{
1569 return single_open(file, pinctrl_show, NULL);
1570}
1571
2744e8af
LW
1572static const struct file_operations pinctrl_pins_ops = {
1573 .open = pinctrl_pins_open,
1574 .read = seq_read,
1575 .llseek = seq_lseek,
1576 .release = single_release,
1577};
1578
1579static const struct file_operations pinctrl_groups_ops = {
1580 .open = pinctrl_groups_open,
1581 .read = seq_read,
1582 .llseek = seq_lseek,
1583 .release = single_release,
1584};
1585
1586static const struct file_operations pinctrl_gpioranges_ops = {
1587 .open = pinctrl_gpioranges_open,
1588 .read = seq_read,
1589 .llseek = seq_lseek,
1590 .release = single_release,
1591};
1592
3eedb437
SW
1593static const struct file_operations pinctrl_devices_ops = {
1594 .open = pinctrl_devices_open,
befe5bdf
LW
1595 .read = seq_read,
1596 .llseek = seq_lseek,
1597 .release = single_release,
1598};
1599
3eedb437
SW
1600static const struct file_operations pinctrl_maps_ops = {
1601 .open = pinctrl_maps_open,
2744e8af
LW
1602 .read = seq_read,
1603 .llseek = seq_lseek,
1604 .release = single_release,
1605};
1606
befe5bdf
LW
1607static const struct file_operations pinctrl_ops = {
1608 .open = pinctrl_open,
1609 .read = seq_read,
1610 .llseek = seq_lseek,
1611 .release = single_release,
1612};
1613
2744e8af
LW
1614static struct dentry *debugfs_root;
1615
1616static void pinctrl_init_device_debugfs(struct pinctrl_dev *pctldev)
1617{
02157160 1618 struct dentry *device_root;
2744e8af 1619
51cd24ee 1620 device_root = debugfs_create_dir(dev_name(pctldev->dev),
2744e8af 1621 debugfs_root);
02157160
TL
1622 pctldev->device_root = device_root;
1623
2744e8af
LW
1624 if (IS_ERR(device_root) || !device_root) {
1625 pr_warn("failed to create debugfs directory for %s\n",
51cd24ee 1626 dev_name(pctldev->dev));
2744e8af
LW
1627 return;
1628 }
1629 debugfs_create_file("pins", S_IFREG | S_IRUGO,
1630 device_root, pctldev, &pinctrl_pins_ops);
1631 debugfs_create_file("pingroups", S_IFREG | S_IRUGO,
1632 device_root, pctldev, &pinctrl_groups_ops);
1633 debugfs_create_file("gpio-ranges", S_IFREG | S_IRUGO,
1634 device_root, pctldev, &pinctrl_gpioranges_ops);
e7f2a444
FV
1635 if (pctldev->desc->pmxops)
1636 pinmux_init_device_debugfs(device_root, pctldev);
1637 if (pctldev->desc->confops)
1638 pinconf_init_device_debugfs(device_root, pctldev);
2744e8af
LW
1639}
1640
02157160
TL
1641static void pinctrl_remove_device_debugfs(struct pinctrl_dev *pctldev)
1642{
1643 debugfs_remove_recursive(pctldev->device_root);
1644}
1645
2744e8af
LW
1646static void pinctrl_init_debugfs(void)
1647{
1648 debugfs_root = debugfs_create_dir("pinctrl", NULL);
1649 if (IS_ERR(debugfs_root) || !debugfs_root) {
1650 pr_warn("failed to create debugfs directory\n");
1651 debugfs_root = NULL;
1652 return;
1653 }
1654
1655 debugfs_create_file("pinctrl-devices", S_IFREG | S_IRUGO,
1656 debugfs_root, NULL, &pinctrl_devices_ops);
3eedb437
SW
1657 debugfs_create_file("pinctrl-maps", S_IFREG | S_IRUGO,
1658 debugfs_root, NULL, &pinctrl_maps_ops);
befe5bdf
LW
1659 debugfs_create_file("pinctrl-handles", S_IFREG | S_IRUGO,
1660 debugfs_root, NULL, &pinctrl_ops);
2744e8af
LW
1661}
1662
1663#else /* CONFIG_DEBUG_FS */
1664
1665static void pinctrl_init_device_debugfs(struct pinctrl_dev *pctldev)
1666{
1667}
1668
1669static void pinctrl_init_debugfs(void)
1670{
1671}
1672
02157160
TL
1673static void pinctrl_remove_device_debugfs(struct pinctrl_dev *pctldev)
1674{
1675}
1676
2744e8af
LW
1677#endif
1678
d26bc49f
SW
1679static int pinctrl_check_ops(struct pinctrl_dev *pctldev)
1680{
1681 const struct pinctrl_ops *ops = pctldev->desc->pctlops;
1682
1683 if (!ops ||
d1e90e9e 1684 !ops->get_groups_count ||
e5b3b2d9 1685 !ops->get_group_name)
d26bc49f
SW
1686 return -EINVAL;
1687
57291ce2
SW
1688 if (ops->dt_node_to_map && !ops->dt_free_map)
1689 return -EINVAL;
1690
d26bc49f
SW
1691 return 0;
1692}
1693
2744e8af
LW
1694/**
1695 * pinctrl_register() - register a pin controller device
1696 * @pctldesc: descriptor for this pin controller
1697 * @dev: parent device for this pin controller
1698 * @driver_data: private pin controller data for this pin controller
1699 */
1700struct pinctrl_dev *pinctrl_register(struct pinctrl_desc *pctldesc,
1701 struct device *dev, void *driver_data)
1702{
2744e8af
LW
1703 struct pinctrl_dev *pctldev;
1704 int ret;
1705
da9aecb0 1706 if (!pctldesc)
323de9ef 1707 return ERR_PTR(-EINVAL);
da9aecb0 1708 if (!pctldesc->name)
323de9ef 1709 return ERR_PTR(-EINVAL);
2744e8af 1710
02f5b989 1711 pctldev = kzalloc(sizeof(*pctldev), GFP_KERNEL);
95dcd4ae
SW
1712 if (pctldev == NULL) {
1713 dev_err(dev, "failed to alloc struct pinctrl_dev\n");
323de9ef 1714 return ERR_PTR(-ENOMEM);
95dcd4ae 1715 }
b9130b77
TL
1716
1717 /* Initialize pin control device struct */
1718 pctldev->owner = pctldesc->owner;
1719 pctldev->desc = pctldesc;
1720 pctldev->driver_data = driver_data;
1721 INIT_RADIX_TREE(&pctldev->pin_desc_tree, GFP_KERNEL);
b9130b77 1722 INIT_LIST_HEAD(&pctldev->gpio_ranges);
b9130b77 1723 pctldev->dev = dev;
42fed7ba 1724 mutex_init(&pctldev->mutex);
b9130b77 1725
d26bc49f 1726 /* check core ops for sanity */
323de9ef
MY
1727 ret = pinctrl_check_ops(pctldev);
1728 if (ret) {
ad6e1107 1729 dev_err(dev, "pinctrl ops lacks necessary functions\n");
d26bc49f
SW
1730 goto out_err;
1731 }
1732
2744e8af
LW
1733 /* If we're implementing pinmuxing, check the ops for sanity */
1734 if (pctldesc->pmxops) {
323de9ef
MY
1735 ret = pinmux_check_ops(pctldev);
1736 if (ret)
b9130b77 1737 goto out_err;
2744e8af
LW
1738 }
1739
ae6b4d85
LW
1740 /* If we're implementing pinconfig, check the ops for sanity */
1741 if (pctldesc->confops) {
323de9ef
MY
1742 ret = pinconf_check_ops(pctldev);
1743 if (ret)
b9130b77 1744 goto out_err;
ae6b4d85
LW
1745 }
1746
2744e8af 1747 /* Register all the pins */
ad6e1107 1748 dev_dbg(dev, "try to register %d pins ...\n", pctldesc->npins);
2744e8af
LW
1749 ret = pinctrl_register_pins(pctldev, pctldesc->pins, pctldesc->npins);
1750 if (ret) {
ad6e1107 1751 dev_err(dev, "error during pin registration\n");
2744e8af
LW
1752 pinctrl_free_pindescs(pctldev, pctldesc->pins,
1753 pctldesc->npins);
51cd24ee 1754 goto out_err;
2744e8af
LW
1755 }
1756
42fed7ba 1757 mutex_lock(&pinctrldev_list_mutex);
8b9c139f 1758 list_add_tail(&pctldev->node, &pinctrldev_list);
42fed7ba
PC
1759 mutex_unlock(&pinctrldev_list_mutex);
1760
1761 pctldev->p = pinctrl_get(pctldev->dev);
57b676f9 1762
6e5e959d 1763 if (!IS_ERR(pctldev->p)) {
840a47ba 1764 pctldev->hog_default =
42fed7ba 1765 pinctrl_lookup_state(pctldev->p, PINCTRL_STATE_DEFAULT);
840a47ba 1766 if (IS_ERR(pctldev->hog_default)) {
ad6e1107
JC
1767 dev_dbg(dev, "failed to lookup the default state\n");
1768 } else {
42fed7ba 1769 if (pinctrl_select_state(pctldev->p,
840a47ba 1770 pctldev->hog_default))
ad6e1107
JC
1771 dev_err(dev,
1772 "failed to select default state\n");
ad6e1107 1773 }
840a47ba
JD
1774
1775 pctldev->hog_sleep =
42fed7ba 1776 pinctrl_lookup_state(pctldev->p,
840a47ba
JD
1777 PINCTRL_STATE_SLEEP);
1778 if (IS_ERR(pctldev->hog_sleep))
1779 dev_dbg(dev, "failed to lookup the sleep state\n");
6e5e959d 1780 }
57b676f9 1781
2304b473
SW
1782 pinctrl_init_device_debugfs(pctldev);
1783
2744e8af
LW
1784 return pctldev;
1785
51cd24ee 1786out_err:
42fed7ba 1787 mutex_destroy(&pctldev->mutex);
51cd24ee 1788 kfree(pctldev);
323de9ef 1789 return ERR_PTR(ret);
2744e8af
LW
1790}
1791EXPORT_SYMBOL_GPL(pinctrl_register);
1792
1793/**
1794 * pinctrl_unregister() - unregister pinmux
1795 * @pctldev: pin controller to unregister
1796 *
1797 * Called by pinmux drivers to unregister a pinmux.
1798 */
1799void pinctrl_unregister(struct pinctrl_dev *pctldev)
1800{
5d589b09 1801 struct pinctrl_gpio_range *range, *n;
2744e8af
LW
1802 if (pctldev == NULL)
1803 return;
1804
42fed7ba 1805 mutex_lock(&pctldev->mutex);
42fed7ba 1806 pinctrl_remove_device_debugfs(pctldev);
db93facf 1807 mutex_unlock(&pctldev->mutex);
57b676f9 1808
6e5e959d 1809 if (!IS_ERR(pctldev->p))
42fed7ba 1810 pinctrl_put(pctldev->p);
57b676f9 1811
db93facf
JL
1812 mutex_lock(&pinctrldev_list_mutex);
1813 mutex_lock(&pctldev->mutex);
2744e8af 1814 /* TODO: check that no pinmuxes are still active? */
2744e8af 1815 list_del(&pctldev->node);
2744e8af
LW
1816 /* Destroy descriptor tree */
1817 pinctrl_free_pindescs(pctldev, pctldev->desc->pins,
1818 pctldev->desc->npins);
5d589b09
DA
1819 /* remove gpio ranges map */
1820 list_for_each_entry_safe(range, n, &pctldev->gpio_ranges, node)
1821 list_del(&range->node);
1822
42fed7ba
PC
1823 mutex_unlock(&pctldev->mutex);
1824 mutex_destroy(&pctldev->mutex);
51cd24ee 1825 kfree(pctldev);
42fed7ba 1826 mutex_unlock(&pinctrldev_list_mutex);
2744e8af
LW
1827}
1828EXPORT_SYMBOL_GPL(pinctrl_unregister);
1829
1830static int __init pinctrl_init(void)
1831{
1832 pr_info("initialized pinctrl subsystem\n");
1833 pinctrl_init_debugfs();
1834 return 0;
1835}
1836
1837/* init early since many drivers really need to initialized pinmux early */
1838core_initcall(pinctrl_init);