[linux-2.6-block.git] / drivers / pci / pcie / pme.c

/*
 * PCIe Native PME support
 *
 * Copyright (C) 2007 - 2009 Intel Corp
 * Copyright (C) 2007 - 2009 Shaohua Li <shaohua.li@intel.com>
 * Copyright (C) 2009 Rafael J. Wysocki <rjw@sisk.pl>, Novell Inc.
 *
 * This file is subject to the terms and conditions of the GNU General Public
 * License V2.  See the file "COPYING" in the main directory of this archive
 * for more details.
 */

#include <linux/module.h>
#include <linux/pci.h>
#include <linux/kernel.h>
#include <linux/errno.h>
#include <linux/slab.h>
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/device.h>
#include <linux/pcieport_if.h>
#include <linux/pm_runtime.h>

#include "../pci.h"
#include "portdrv.h"

/*
 * If this switch is set, MSI will not be used for PCIe PME signaling.  This
 * causes the PCIe port driver to use INTx interrupts only, but it turns out
 * that using MSI for PCIe PME signaling doesn't play well with PCIe PME-based
 * wake-up from system sleep states.
 */
bool pcie_pme_msi_disabled;

static int __init pcie_pme_setup(char *str)
{
	if (!strncmp(str, "nomsi", 5))
		pcie_pme_msi_disabled = true;

	return 1;
}
__setup("pcie_pme=", pcie_pme_setup);

enum pme_suspend_level {
	PME_SUSPEND_NONE = 0,
	PME_SUSPEND_WAKEUP,
	PME_SUSPEND_NOIRQ,
};

struct pcie_pme_service_data {
	spinlock_t lock;
	struct pcie_device *srv;
	struct work_struct work;
	enum pme_suspend_level suspend_level;
};

/**
 * pcie_pme_interrupt_enable - Enable/disable PCIe PME interrupt generation.
 * @dev: PCIe root port or event collector.
 * @enable: Enable or disable the interrupt.
 */
void pcie_pme_interrupt_enable(struct pci_dev *dev, bool enable)
{
	if (enable)
		pcie_capability_set_word(dev, PCI_EXP_RTCTL,
					 PCI_EXP_RTCTL_PMEIE);
	else
		pcie_capability_clear_word(dev, PCI_EXP_RTCTL,
					   PCI_EXP_RTCTL_PMEIE);
}

/**
 * pcie_pme_walk_bus - Scan a PCI bus for devices asserting PME#.
 * @bus: PCI bus to scan.
 *
 * Scan given PCI bus and all buses under it for devices asserting PME#.
 */
static bool pcie_pme_walk_bus(struct pci_bus *bus)
{
	struct pci_dev *dev;
	bool ret = false;

	list_for_each_entry(dev, &bus->devices, bus_list) {
		/* Skip PCIe devices in case we started from a root port. */
		if (!pci_is_pcie(dev) && pci_check_pme_status(dev)) {
			if (dev->pme_poll)
				dev->pme_poll = false;

			pci_wakeup_event(dev);
			pm_request_resume(&dev->dev);
			ret = true;
		}

		if (dev->subordinate && pcie_pme_walk_bus(dev->subordinate))
			ret = true;
	}

	return ret;
}

/**
 * pcie_pme_from_pci_bridge - Check if PCIe-PCI bridge generated a PME.
 * @bus: Secondary bus of the bridge.
 * @devfn: Device/function number to check.
 *
 * PME from PCI devices under a PCIe-PCI bridge may be converted to an in-band
 * PCIe PME message.  In such that case the bridge should use the Requester ID
 * of device/function number 0 on its secondary bus.
 */
static bool pcie_pme_from_pci_bridge(struct pci_bus *bus, u8 devfn)
{
	struct pci_dev *dev;
	bool found = false;

	if (devfn)
		return false;

	dev = pci_dev_get(bus->self);
	if (!dev)
		return false;

	if (pci_is_pcie(dev) && pci_pcie_type(dev) == PCI_EXP_TYPE_PCI_BRIDGE) {
		down_read(&pci_bus_sem);
		if (pcie_pme_walk_bus(bus))
			found = true;
		up_read(&pci_bus_sem);
	}

	pci_dev_put(dev);
	return found;
}

/**
 * pcie_pme_handle_request - Find device that generated PME and handle it.
 * @port: Root port or event collector that generated the PME interrupt.
 * @req_id: PCIe Requester ID of the device that generated the PME.
 */
static void pcie_pme_handle_request(struct pci_dev *port, u16 req_id)
{
	u8 busnr = req_id >> 8, devfn = req_id & 0xff;
	struct pci_bus *bus;
	struct pci_dev *dev;
	bool found = false;

	/* First, check if the PME is from the root port itself. */
	if (port->devfn == devfn && port->bus->number == busnr) {
		if (port->pme_poll)
			port->pme_poll = false;

		if (pci_check_pme_status(port)) {
			pm_request_resume(&port->dev);
			found = true;
		} else {
			/*
			 * Apparently, the root port generated the PME on behalf
			 * of a non-PCIe device downstream.  If this is done by
			 * a root port, the Requester ID field in its status
			 * register may contain either the root port's, or the
			 * source device's information (PCI Express Base
			 * Specification, Rev. 2.0, Section 6.1.9).
			 */
			down_read(&pci_bus_sem);
			found = pcie_pme_walk_bus(port->subordinate);
			up_read(&pci_bus_sem);
		}
		goto out;
	}

	/* Second, find the bus the source device is on. */
	bus = pci_find_bus(pci_domain_nr(port->bus), busnr);
	if (!bus)
		goto out;

	/* Next, check if the PME is from a PCIe-PCI bridge. */
	found = pcie_pme_from_pci_bridge(bus, devfn);
	if (found)
		goto out;

	/* Finally, try to find the PME source on the bus. */
	down_read(&pci_bus_sem);
	list_for_each_entry(dev, &bus->devices, bus_list) {
		pci_dev_get(dev);
		if (dev->devfn == devfn) {
			found = true;
			break;
		}
		pci_dev_put(dev);
	}
	up_read(&pci_bus_sem);

	if (found) {
		/* The device is there, but we have to check its PME status. */
		found = pci_check_pme_status(dev);
		if (found) {
			if (dev->pme_poll)
				dev->pme_poll = false;

			pci_wakeup_event(dev);
			pm_request_resume(&dev->dev);
		}
		pci_dev_put(dev);
	} else if (devfn) {
		/*
		 * The device is not there, but we can still try to recover by
		 * assuming that the PME was reported by a PCIe-PCI bridge that
		 * used devfn different from zero.
		 */
		dev_dbg(&port->dev, "PME interrupt generated for non-existent device %02x:%02x.%d\n",
			busnr, PCI_SLOT(devfn), PCI_FUNC(devfn));
		found = pcie_pme_from_pci_bridge(bus, 0);
	}

 out:
	if (!found)
		dev_dbg(&port->dev, "Spurious native PME interrupt!\n");
}

/**
 * pcie_pme_work_fn - Work handler for PCIe PME interrupt.
 * @work: Work structure giving access to service data.
 */
static void pcie_pme_work_fn(struct work_struct *work)
{
	struct pcie_pme_service_data *data =
			container_of(work, struct pcie_pme_service_data, work);
	struct pci_dev *port = data->srv->port;
	u32 rtsta;

	spin_lock_irq(&data->lock);

	for (;;) {
		if (data->suspend_level != PME_SUSPEND_NONE)
			break;

		pcie_capability_read_dword(port, PCI_EXP_RTSTA, &rtsta);
		if (rtsta & PCI_EXP_RTSTA_PME) {
			/*
			 * Clear PME status of the port.  If there are other
			 * pending PMEs, the status will be set again.
			 */
			pcie_clear_root_pme_status(port);

			spin_unlock_irq(&data->lock);
			pcie_pme_handle_request(port, rtsta & 0xffff);
			spin_lock_irq(&data->lock);

			continue;
		}

		/* No need to loop if there are no more PMEs pending. */
		if (!(rtsta & PCI_EXP_RTSTA_PENDING))
			break;

		spin_unlock_irq(&data->lock);
		cpu_relax();
		spin_lock_irq(&data->lock);
	}

	if (data->suspend_level == PME_SUSPEND_NONE)
		pcie_pme_interrupt_enable(port, true);

	spin_unlock_irq(&data->lock);
}

/**
 * pcie_pme_irq - Interrupt handler for PCIe root port PME interrupt.
 * @irq: Interrupt vector.
 * @context: Interrupt context pointer.
 */
static irqreturn_t pcie_pme_irq(int irq, void *context)
{
	struct pci_dev *port;
	struct pcie_pme_service_data *data;
	u32 rtsta;
	unsigned long flags;

	port = ((struct pcie_device *)context)->port;
	data = get_service_data((struct pcie_device *)context);

	spin_lock_irqsave(&data->lock, flags);
	pcie_capability_read_dword(port, PCI_EXP_RTSTA, &rtsta);

	if (!(rtsta & PCI_EXP_RTSTA_PME)) {
		spin_unlock_irqrestore(&data->lock, flags);
		return IRQ_NONE;
	}

	pcie_pme_interrupt_enable(port, false);
	spin_unlock_irqrestore(&data->lock, flags);

	/* We don't use pm_wq, because it's freezable. */
	schedule_work(&data->work);

	return IRQ_HANDLED;
}

/**
 * pcie_pme_set_native - Set the PME interrupt flag for given device.
 * @dev: PCI device to handle.
 * @ign: Ignored.
 */
static int pcie_pme_set_native(struct pci_dev *dev, void *ign)
{
	dev_info(&dev->dev, "Signaling PME through PCIe PME interrupt\n");

	device_set_run_wake(&dev->dev, true);
	dev->pme_interrupt = true;
	return 0;
}

/**
 * pcie_pme_mark_devices - Set the PME interrupt flag for devices below a port.
 * @port: PCIe root port or event collector to handle.
 *
 * For each device below given root port, including the port itself (or for each
 * root complex integrated endpoint if @port is a root complex event collector)
 * set the flag indicating that it can signal run-time wake-up events via PCIe
 * PME interrupts.
 */
static void pcie_pme_mark_devices(struct pci_dev *port)
{
	pcie_pme_set_native(port, NULL);
	if (port->subordinate) {
		pci_walk_bus(port->subordinate, pcie_pme_set_native, NULL);
	} else {
		struct pci_bus *bus = port->bus;
		struct pci_dev *dev;

		/* Check if this is a root port event collector. */
		if (pci_pcie_type(port) != PCI_EXP_TYPE_RC_EC || !bus)
			return;

		down_read(&pci_bus_sem);
		list_for_each_entry(dev, &bus->devices, bus_list)
			if (pci_is_pcie(dev)
			    && pci_pcie_type(dev) == PCI_EXP_TYPE_RC_END)
				pcie_pme_set_native(dev, NULL);
		up_read(&pci_bus_sem);
	}
}

/**
 * pcie_pme_probe - Initialize PCIe PME service for given root port.
 * @srv: PCIe service to initialize.
 */
static int pcie_pme_probe(struct pcie_device *srv)
{
	struct pci_dev *port;
	struct pcie_pme_service_data *data;
	int ret;

	data = kzalloc(sizeof(*data), GFP_KERNEL);
	if (!data)
		return -ENOMEM;

	spin_lock_init(&data->lock);
	INIT_WORK(&data->work, pcie_pme_work_fn);
	data->srv = srv;
	set_service_data(srv, data);

	port = srv->port;
	pcie_pme_interrupt_enable(port, false);
	pcie_clear_root_pme_status(port);

	ret = request_irq(srv->irq, pcie_pme_irq, IRQF_SHARED, "PCIe PME", srv);
	if (ret) {
		kfree(data);
	} else {
		pcie_pme_mark_devices(port);
		pcie_pme_interrupt_enable(port, true);
	}

	return ret;
}

static bool pcie_pme_check_wakeup(struct pci_bus *bus)
{
	struct pci_dev *dev;

	if (!bus)
		return false;

	list_for_each_entry(dev, &bus->devices, bus_list)
		if (device_may_wakeup(&dev->dev)
		    || pcie_pme_check_wakeup(dev->subordinate))
			return true;

	return false;
}

/**
 * pcie_pme_suspend - Suspend PCIe PME service device.
 * @srv: PCIe service device to suspend.
 */
static int pcie_pme_suspend(struct pcie_device *srv)
{
	struct pcie_pme_service_data *data = get_service_data(srv);
	struct pci_dev *port = srv->port;
	bool wakeup, wake_irq_enabled = false;
	int ret;

	if (device_may_wakeup(&port->dev)) {
		wakeup = true;
	} else {
		down_read(&pci_bus_sem);
		wakeup = pcie_pme_check_wakeup(port->subordinate);
		up_read(&pci_bus_sem);
	}
	spin_lock_irq(&data->lock);
	if (wakeup) {
		ret = enable_irq_wake(srv->irq);
		if (ret == 0) {
			data->suspend_level = PME_SUSPEND_WAKEUP;
			wake_irq_enabled = true;
		}
	}
	if (!wake_irq_enabled) {
		pcie_pme_interrupt_enable(port, false);
		pcie_clear_root_pme_status(port);
		data->suspend_level = PME_SUSPEND_NOIRQ;
	}
	spin_unlock_irq(&data->lock);

	synchronize_irq(srv->irq);

	return 0;
}

/**
 * pcie_pme_resume - Resume PCIe PME service device.
 * @srv - PCIe service device to resume.
 */
static int pcie_pme_resume(struct pcie_device *srv)
{
	struct pcie_pme_service_data *data = get_service_data(srv);

	spin_lock_irq(&data->lock);
	if (data->suspend_level == PME_SUSPEND_NOIRQ) {
		struct pci_dev *port = srv->port;

		pcie_clear_root_pme_status(port);
		pcie_pme_interrupt_enable(port, true);
	} else {
		disable_irq_wake(srv->irq);
	}
	data->suspend_level = PME_SUSPEND_NONE;
	spin_unlock_irq(&data->lock);

	return 0;
}

/**
 * pcie_pme_remove - Prepare PCIe PME service device for removal.
 * @srv - PCIe service device to remove.
 */
static void pcie_pme_remove(struct pcie_device *srv)
{
	pcie_pme_suspend(srv);
	free_irq(srv->irq, srv);
	kfree(get_service_data(srv));
}

static struct pcie_port_service_driver pcie_pme_driver = {
	.name		= "pcie_pme",
	.port_type	= PCI_EXP_TYPE_ROOT_PORT,
	.service	= PCIE_PORT_SERVICE_PME,

	.probe		= pcie_pme_probe,
	.suspend	= pcie_pme_suspend,
	.resume		= pcie_pme_resume,
	.remove		= pcie_pme_remove,
};

/**
 * pcie_pme_service_init - Register the PCIe PME service driver.
 */
static int __init pcie_pme_service_init(void)
{
	return pcie_port_service_register(&pcie_pme_driver);
}

module_init(pcie_pme_service_init);
Commit	Line	Data
c7f48656 RW	1	/*
	2	* PCIe Native PME support
	3	*
	4	* Copyright (C) 2007 - 2009 Intel Corp
	5	* Copyright (C) 2007 - 2009 Shaohua Li <shaohua.li@intel.com>
	6	* Copyright (C) 2009 Rafael J. Wysocki <rjw@sisk.pl>, Novell Inc.
	7	*
	8	* This file is subject to the terms and conditions of the GNU General Public
	9	* License V2. See the file "COPYING" in the main directory of this archive
	10	* for more details.
	11	*/
	12
	13	#include <linux/module.h>
	14	#include <linux/pci.h>
	15	#include <linux/kernel.h>
	16	#include <linux/errno.h>
5a0e3ad6	17	#include <linux/slab.h>
c7f48656 RW	18	#include <linux/init.h>
	19	#include <linux/interrupt.h>
	20	#include <linux/device.h>
	21	#include <linux/pcieport_if.h>
c7f48656 RW	22	#include <linux/pm_runtime.h>
c7f48656 RW	23
271fb719 RW	24	#include "../pci.h"
271fb719 RW	25	#include "portdrv.h"
c7f48656	26
c39fae14 RW	27	/*
	28	* If this switch is set, MSI will not be used for PCIe PME signaling. This
	29	* causes the PCIe port driver to use INTx interrupts only, but it turns out
	30	* that using MSI for PCIe PME signaling doesn't play well with PCIe PME-based
	31	* wake-up from system sleep states.
	32	*/
	33	bool pcie_pme_msi_disabled;
	34
c7f48656 RW	35	static int __init pcie_pme_setup(char *str)
c7f48656 RW	36	{
28eb5f27 RW	37	if (!strncmp(str, "nomsi", 5))
28eb5f27 RW	38	pcie_pme_msi_disabled = true;
b27759f8	39
c7f48656 RW	40	return 1;
	41	}
	42	__setup("pcie_pme=", pcie_pme_setup);
	43
76cde7e4 RW	44	enum pme_suspend_level {
	45	PME_SUSPEND_NONE = 0,
	46	PME_SUSPEND_WAKEUP,
	47	PME_SUSPEND_NOIRQ,
	48	};
	49
c7f48656 RW	50	struct pcie_pme_service_data {
	51	spinlock_t lock;
	52	struct pcie_device *srv;
	53	struct work_struct work;
76cde7e4	54	enum pme_suspend_level suspend_level;
c7f48656 RW	55	};
	56
	57	/**
	58	* pcie_pme_interrupt_enable - Enable/disable PCIe PME interrupt generation.
	59	* @dev: PCIe root port or event collector.
	60	* @enable: Enable or disable the interrupt.
	61	*/
28eb5f27	62	void pcie_pme_interrupt_enable(struct pci_dev *dev, bool enable)
c7f48656	63	{
c7f48656	64	if (enable)
263e54b9 JL	65	pcie_capability_set_word(dev, PCI_EXP_RTCTL,
263e54b9 JL	66	PCI_EXP_RTCTL_PMEIE);
c7f48656	67	else
263e54b9 JL	68	pcie_capability_clear_word(dev, PCI_EXP_RTCTL,
263e54b9 JL	69	PCI_EXP_RTCTL_PMEIE);
c7f48656 RW	70	}
c7f48656 RW	71
c7f48656 RW	72	/**
	73	* pcie_pme_walk_bus - Scan a PCI bus for devices asserting PME#.
	74	* @bus: PCI bus to scan.
	75	*
	76	* Scan given PCI bus and all buses under it for devices asserting PME#.
	77	*/
	78	static bool pcie_pme_walk_bus(struct pci_bus *bus)
	79	{
	80	struct pci_dev *dev;
	81	bool ret = false;
	82
	83	list_for_each_entry(dev, &bus->devices, bus_list) {
	84	/* Skip PCIe devices in case we started from a root port. */
552be54c	85	if (!pci_is_pcie(dev) && pci_check_pme_status(dev)) {
379021d5 RW	86	if (dev->pme_poll)
	87	dev->pme_poll = false;
	88
c125e96f	89	pci_wakeup_event(dev);
0f953bf6	90	pm_request_resume(&dev->dev);
c7f48656 RW	91	ret = true;
	92	}
	93
	94	if (dev->subordinate && pcie_pme_walk_bus(dev->subordinate))
	95	ret = true;
	96	}
	97
	98	return ret;
	99	}
	100
	101	/**
	102	* pcie_pme_from_pci_bridge - Check if PCIe-PCI bridge generated a PME.
	103	* @bus: Secondary bus of the bridge.
	104	* @devfn: Device/function number to check.
	105	*
	106	* PME from PCI devices under a PCIe-PCI bridge may be converted to an in-band
	107	* PCIe PME message. In such that case the bridge should use the Requester ID
	108	* of device/function number 0 on its secondary bus.
	109	*/
	110	static bool pcie_pme_from_pci_bridge(struct pci_bus *bus, u8 devfn)
	111	{
	112	struct pci_dev *dev;
	113	bool found = false;
	114
	115	if (devfn)
	116	return false;
	117
	118	dev = pci_dev_get(bus->self);
	119	if (!dev)
	120	return false;
	121
62f87c0e	122	if (pci_is_pcie(dev) && pci_pcie_type(dev) == PCI_EXP_TYPE_PCI_BRIDGE) {
c7f48656 RW	123	down_read(&pci_bus_sem);
	124	if (pcie_pme_walk_bus(bus))
	125	found = true;
	126	up_read(&pci_bus_sem);
	127	}
	128
	129	pci_dev_put(dev);
	130	return found;
	131	}
	132
	133	/**
	134	* pcie_pme_handle_request - Find device that generated PME and handle it.
	135	* @port: Root port or event collector that generated the PME interrupt.
	136	* @req_id: PCIe Requester ID of the device that generated the PME.
	137	*/
	138	static void pcie_pme_handle_request(struct pci_dev *port, u16 req_id)
	139	{
	140	u8 busnr = req_id >> 8, devfn = req_id & 0xff;
	141	struct pci_bus *bus;
	142	struct pci_dev *dev;
	143	bool found = false;
	144
	145	/* First, check if the PME is from the root port itself. */
	146	if (port->devfn == devfn && port->bus->number == busnr) {
379021d5 RW	147	if (port->pme_poll)
	148	port->pme_poll = false;
	149
c7f48656 RW	150	if (pci_check_pme_status(port)) {
	151	pm_request_resume(&port->dev);
	152	found = true;
	153	} else {
	154	/*
	155	* Apparently, the root port generated the PME on behalf
	156	* of a non-PCIe device downstream. If this is done by
	157	* a root port, the Requester ID field in its status
	158	* register may contain either the root port's, or the
	159	* source device's information (PCI Express Base
	160	* Specification, Rev. 2.0, Section 6.1.9).
	161	*/
	162	down_read(&pci_bus_sem);
	163	found = pcie_pme_walk_bus(port->subordinate);
	164	up_read(&pci_bus_sem);
	165	}
	166	goto out;
	167	}
	168
	169	/* Second, find the bus the source device is on. */
	170	bus = pci_find_bus(pci_domain_nr(port->bus), busnr);
	171	if (!bus)
	172	goto out;
	173
	174	/* Next, check if the PME is from a PCIe-PCI bridge. */
	175	found = pcie_pme_from_pci_bridge(bus, devfn);
	176	if (found)
	177	goto out;
	178
	179	/* Finally, try to find the PME source on the bus. */
	180	down_read(&pci_bus_sem);
	181	list_for_each_entry(dev, &bus->devices, bus_list) {
	182	pci_dev_get(dev);
	183	if (dev->devfn == devfn) {
	184	found = true;
	185	break;
	186	}
	187	pci_dev_put(dev);
	188	}
	189	up_read(&pci_bus_sem);
	190
	191	if (found) {
	192	/* The device is there, but we have to check its PME status. */
	193	found = pci_check_pme_status(dev);
c125e96f	194	if (found) {
379021d5 RW	195	if (dev->pme_poll)
	196	dev->pme_poll = false;
	197
c125e96f	198	pci_wakeup_event(dev);
0f953bf6	199	pm_request_resume(&dev->dev);
c125e96f	200	}
c7f48656 RW	201	pci_dev_put(dev);
	202	} else if (devfn) {
	203	/*
	204	* The device is not there, but we can still try to recover by
	205	* assuming that the PME was reported by a PCIe-PCI bridge that
	206	* used devfn different from zero.
	207	*/
227f0647	208	dev_dbg(&port->dev, "PME interrupt generated for non-existent device %02x:%02x.%d\n",
c7f48656 RW	209	busnr, PCI_SLOT(devfn), PCI_FUNC(devfn));
	210	found = pcie_pme_from_pci_bridge(bus, 0);
	211	}
	212
	213	out:
	214	if (!found)
	215	dev_dbg(&port->dev, "Spurious native PME interrupt!\n");
	216	}
	217
	218	/**
	219	* pcie_pme_work_fn - Work handler for PCIe PME interrupt.
	220	* @work: Work structure giving access to service data.
	221	*/
	222	static void pcie_pme_work_fn(struct work_struct *work)
	223	{
	224	struct pcie_pme_service_data *data =
	225	container_of(work, struct pcie_pme_service_data, work);
	226	struct pci_dev *port = data->srv->port;
c7f48656 RW	227	u32 rtsta;
c7f48656 RW	228
c7f48656 RW	229	spin_lock_irq(&data->lock);
	230
	231	for (;;) {
76cde7e4	232	if (data->suspend_level != PME_SUSPEND_NONE)
c7f48656 RW	233	break;
c7f48656 RW	234
263e54b9	235	pcie_capability_read_dword(port, PCI_EXP_RTSTA, &rtsta);
c7f48656 RW	236	if (rtsta & PCI_EXP_RTSTA_PME) {
	237	/*
	238	* Clear PME status of the port. If there are other
	239	* pending PMEs, the status will be set again.
	240	*/
fe31e697	241	pcie_clear_root_pme_status(port);
c7f48656 RW	242
	243	spin_unlock_irq(&data->lock);
	244	pcie_pme_handle_request(port, rtsta & 0xffff);
	245	spin_lock_irq(&data->lock);
	246
	247	continue;
	248	}
	249
	250	/* No need to loop if there are no more PMEs pending. */
	251	if (!(rtsta & PCI_EXP_RTSTA_PENDING))
	252	break;
	253
	254	spin_unlock_irq(&data->lock);
	255	cpu_relax();
	256	spin_lock_irq(&data->lock);
	257	}
	258
76cde7e4	259	if (data->suspend_level == PME_SUSPEND_NONE)
c7f48656 RW	260	pcie_pme_interrupt_enable(port, true);
	261
	262	spin_unlock_irq(&data->lock);
	263	}
	264
	265	/**
	266	* pcie_pme_irq - Interrupt handler for PCIe root port PME interrupt.
	267	* @irq: Interrupt vector.
	268	* @context: Interrupt context pointer.
	269	*/
	270	static irqreturn_t pcie_pme_irq(int irq, void *context)
	271	{
	272	struct pci_dev *port;
	273	struct pcie_pme_service_data *data;
c7f48656 RW	274	u32 rtsta;
	275	unsigned long flags;
	276
	277	port = ((struct pcie_device *)context)->port;
	278	data = get_service_data((struct pcie_device *)context);
	279
c7f48656	280	spin_lock_irqsave(&data->lock, flags);
263e54b9	281	pcie_capability_read_dword(port, PCI_EXP_RTSTA, &rtsta);
c7f48656 RW	282
	283	if (!(rtsta & PCI_EXP_RTSTA_PME)) {
	284	spin_unlock_irqrestore(&data->lock, flags);
	285	return IRQ_NONE;
	286	}
	287
	288	pcie_pme_interrupt_enable(port, false);
	289	spin_unlock_irqrestore(&data->lock, flags);
	290
	291	/* We don't use pm_wq, because it's freezable. */
	292	schedule_work(&data->work);
	293
	294	return IRQ_HANDLED;
	295	}
	296
	297	/**
	298	* pcie_pme_set_native - Set the PME interrupt flag for given device.
	299	* @dev: PCI device to handle.
	300	* @ign: Ignored.
	301	*/
	302	static int pcie_pme_set_native(struct pci_dev dev, void ign)
	303	{
	304	dev_info(&dev->dev, "Signaling PME through PCIe PME interrupt\n");
	305
	306	device_set_run_wake(&dev->dev, true);
	307	dev->pme_interrupt = true;
	308	return 0;
	309	}
	310
	311	/**
	312	* pcie_pme_mark_devices - Set the PME interrupt flag for devices below a port.
	313	* @port: PCIe root port or event collector to handle.
	314	*
	315	* For each device below given root port, including the port itself (or for each
	316	* root complex integrated endpoint if @port is a root complex event collector)
	317	* set the flag indicating that it can signal run-time wake-up events via PCIe
	318	* PME interrupts.
	319	*/
	320	static void pcie_pme_mark_devices(struct pci_dev *port)
	321	{
	322	pcie_pme_set_native(port, NULL);
	323	if (port->subordinate) {
	324	pci_walk_bus(port->subordinate, pcie_pme_set_native, NULL);
	325	} else {
	326	struct pci_bus *bus = port->bus;
	327	struct pci_dev *dev;
	328
	329	/* Check if this is a root port event collector. */
62f87c0e	330	if (pci_pcie_type(port) != PCI_EXP_TYPE_RC_EC \|\| !bus)
c7f48656 RW	331	return;
	332
	333	down_read(&pci_bus_sem);
	334	list_for_each_entry(dev, &bus->devices, bus_list)
552be54c	335	if (pci_is_pcie(dev)
62f87c0e	336	&& pci_pcie_type(dev) == PCI_EXP_TYPE_RC_END)
c7f48656 RW	337	pcie_pme_set_native(dev, NULL);
	338	up_read(&pci_bus_sem);
	339	}
	340	}
	341
	342	/**
	343	* pcie_pme_probe - Initialize PCIe PME service for given root port.
	344	* @srv: PCIe service to initialize.
	345	*/
	346	static int pcie_pme_probe(struct pcie_device *srv)
	347	{
	348	struct pci_dev *port;
	349	struct pcie_pme_service_data *data;
	350	int ret;
	351
c7f48656 RW	352	data = kzalloc(sizeof(*data), GFP_KERNEL);
	353	if (!data)
	354	return -ENOMEM;
	355
	356	spin_lock_init(&data->lock);
	357	INIT_WORK(&data->work, pcie_pme_work_fn);
	358	data->srv = srv;
	359	set_service_data(srv, data);
	360
	361	port = srv->port;
	362	pcie_pme_interrupt_enable(port, false);
fe31e697	363	pcie_clear_root_pme_status(port);
c7f48656 RW	364
	365	ret = request_irq(srv->irq, pcie_pme_irq, IRQF_SHARED, "PCIe PME", srv);
	366	if (ret) {
	367	kfree(data);
	368	} else {
	369	pcie_pme_mark_devices(port);
	370	pcie_pme_interrupt_enable(port, true);
	371	}
	372
	373	return ret;
	374	}
	375
76cde7e4 RW	376	static bool pcie_pme_check_wakeup(struct pci_bus *bus)
	377	{
	378	struct pci_dev *dev;
	379
	380	if (!bus)
	381	return false;
	382
	383	list_for_each_entry(dev, &bus->devices, bus_list)
	384	if (device_may_wakeup(&dev->dev)
	385	\|\| pcie_pme_check_wakeup(dev->subordinate))
	386	return true;
	387
	388	return false;
	389	}
	390
c7f48656 RW	391	/**
	392	* pcie_pme_suspend - Suspend PCIe PME service device.
	393	* @srv: PCIe service device to suspend.
	394	*/
	395	static int pcie_pme_suspend(struct pcie_device *srv)
	396	{
	397	struct pcie_pme_service_data *data = get_service_data(srv);
	398	struct pci_dev *port = srv->port;
41ccebae	399	bool wakeup, wake_irq_enabled = false;
5dfd7f9f	400	int ret;
c7f48656	401
76cde7e4 RW	402	if (device_may_wakeup(&port->dev)) {
	403	wakeup = true;
	404	} else {
	405	down_read(&pci_bus_sem);
	406	wakeup = pcie_pme_check_wakeup(port->subordinate);
	407	up_read(&pci_bus_sem);
	408	}
c7f48656	409	spin_lock_irq(&data->lock);
76cde7e4	410	if (wakeup) {
5dfd7f9f	411	ret = enable_irq_wake(srv->irq);
41ccebae BH	412	if (ret == 0) {
	413	data->suspend_level = PME_SUSPEND_WAKEUP;
	414	wake_irq_enabled = true;
	415	}
5dfd7f9f	416	}
41ccebae	417	if (!wake_irq_enabled) {
76cde7e4 RW	418	pcie_pme_interrupt_enable(port, false);
	419	pcie_clear_root_pme_status(port);
	420	data->suspend_level = PME_SUSPEND_NOIRQ;
	421	}
c7f48656 RW	422	spin_unlock_irq(&data->lock);
	423
	424	synchronize_irq(srv->irq);
	425
	426	return 0;
	427	}
	428
	429	/**
	430	* pcie_pme_resume - Resume PCIe PME service device.
	431	* @srv - PCIe service device to resume.
	432	*/
	433	static int pcie_pme_resume(struct pcie_device *srv)
	434	{
	435	struct pcie_pme_service_data *data = get_service_data(srv);
c7f48656 RW	436
c7f48656 RW	437	spin_lock_irq(&data->lock);
76cde7e4 RW	438	if (data->suspend_level == PME_SUSPEND_NOIRQ) {
	439	struct pci_dev *port = srv->port;
	440
	441	pcie_clear_root_pme_status(port);
	442	pcie_pme_interrupt_enable(port, true);
	443	} else {
	444	disable_irq_wake(srv->irq);
	445	}
	446	data->suspend_level = PME_SUSPEND_NONE;
c7f48656 RW	447	spin_unlock_irq(&data->lock);
	448
	449	return 0;
	450	}
	451
	452	/**
	453	* pcie_pme_remove - Prepare PCIe PME service device for removal.
bd0c5024	454	* @srv - PCIe service device to remove.
c7f48656 RW	455	*/
	456	static void pcie_pme_remove(struct pcie_device *srv)
	457	{
	458	pcie_pme_suspend(srv);
	459	free_irq(srv->irq, srv);
	460	kfree(get_service_data(srv));
	461	}
	462
	463	static struct pcie_port_service_driver pcie_pme_driver = {
	464	.name = "pcie_pme",
f7625980 BH	465	.port_type = PCI_EXP_TYPE_ROOT_PORT,
f7625980 BH	466	.service = PCIE_PORT_SERVICE_PME,
c7f48656 RW	467
	468	.probe = pcie_pme_probe,
	469	.suspend = pcie_pme_suspend,
	470	.resume = pcie_pme_resume,
	471	.remove = pcie_pme_remove,
	472	};
	473
	474	/**
	475	* pcie_pme_service_init - Register the PCIe PME service driver.
	476	*/
	477	static int __init pcie_pme_service_init(void)
	478	{
28eb5f27	479	return pcie_port_service_register(&pcie_pme_driver);
c7f48656 RW	480	}
	481
	482	module_init(pcie_pme_service_init);