cpumask: change cpumask_scnprintf, cpumask_parse_user, cpulist_parse, and cpulist_scn...
[linux-2.6-block.git] / drivers / pci / pci-sysfs.c
CommitLineData
1da177e4
LT
1/*
2 * drivers/pci/pci-sysfs.c
3 *
4 * (C) Copyright 2002-2004 Greg Kroah-Hartman <greg@kroah.com>
5 * (C) Copyright 2002-2004 IBM Corp.
6 * (C) Copyright 2003 Matthew Wilcox
7 * (C) Copyright 2003 Hewlett-Packard
8 * (C) Copyright 2004 Jon Smirl <jonsmirl@yahoo.com>
9 * (C) Copyright 2004 Silicon Graphics, Inc. Jesse Barnes <jbarnes@sgi.com>
10 *
11 * File attributes for PCI devices
12 *
13 * Modeled after usb's driverfs.c
14 *
15 */
16
17
1da177e4 18#include <linux/kernel.h>
b5ff7df3 19#include <linux/sched.h>
1da177e4
LT
20#include <linux/pci.h>
21#include <linux/stat.h>
22#include <linux/topology.h>
23#include <linux/mm.h>
aa0ac365 24#include <linux/capability.h>
7d715a6c 25#include <linux/pci-aspm.h>
1da177e4
LT
26#include "pci.h"
27
28static int sysfs_initialized; /* = 0 */
29
30/* show configuration fields */
31#define pci_config_attr(field, format_string) \
32static ssize_t \
e404e274 33field##_show(struct device *dev, struct device_attribute *attr, char *buf) \
1da177e4
LT
34{ \
35 struct pci_dev *pdev; \
36 \
37 pdev = to_pci_dev (dev); \
38 return sprintf (buf, format_string, pdev->field); \
39}
40
41pci_config_attr(vendor, "0x%04x\n");
42pci_config_attr(device, "0x%04x\n");
43pci_config_attr(subsystem_vendor, "0x%04x\n");
44pci_config_attr(subsystem_device, "0x%04x\n");
45pci_config_attr(class, "0x%06x\n");
46pci_config_attr(irq, "%u\n");
47
bdee9d98
DT
48static ssize_t broken_parity_status_show(struct device *dev,
49 struct device_attribute *attr,
50 char *buf)
51{
52 struct pci_dev *pdev = to_pci_dev(dev);
53 return sprintf (buf, "%u\n", pdev->broken_parity_status);
54}
55
56static ssize_t broken_parity_status_store(struct device *dev,
57 struct device_attribute *attr,
58 const char *buf, size_t count)
59{
60 struct pci_dev *pdev = to_pci_dev(dev);
61 ssize_t consumed = -EINVAL;
62
63 if ((count > 0) && (*buf == '0' || *buf == '1')) {
64 pdev->broken_parity_status = *buf == '1' ? 1 : 0;
65 consumed = count;
66 }
67 return consumed;
68}
69
4327edf6
AC
70static ssize_t local_cpus_show(struct device *dev,
71 struct device_attribute *attr, char *buf)
1da177e4 72{
4327edf6
AC
73 cpumask_t mask;
74 int len;
75
76 mask = pcibus_to_cpumask(to_pci_dev(dev)->bus);
29c0177e 77 len = cpumask_scnprintf(buf, PAGE_SIZE-2, &mask);
39106dcf
MT
78 buf[len++] = '\n';
79 buf[len] = '\0';
80 return len;
81}
82
83
84static ssize_t local_cpulist_show(struct device *dev,
85 struct device_attribute *attr, char *buf)
86{
87 cpumask_t mask;
88 int len;
89
90 mask = pcibus_to_cpumask(to_pci_dev(dev)->bus);
29c0177e 91 len = cpulist_scnprintf(buf, PAGE_SIZE-2, &mask);
39106dcf
MT
92 buf[len++] = '\n';
93 buf[len] = '\0';
94 return len;
1da177e4
LT
95}
96
97/* show resources */
98static ssize_t
e404e274 99resource_show(struct device * dev, struct device_attribute *attr, char * buf)
1da177e4
LT
100{
101 struct pci_dev * pci_dev = to_pci_dev(dev);
102 char * str = buf;
103 int i;
104 int max = 7;
e31dd6e4 105 resource_size_t start, end;
1da177e4
LT
106
107 if (pci_dev->subordinate)
108 max = DEVICE_COUNT_RESOURCE;
109
110 for (i = 0; i < max; i++) {
2311b1f2
ME
111 struct resource *res = &pci_dev->resource[i];
112 pci_resource_to_user(pci_dev, i, res, &start, &end);
113 str += sprintf(str,"0x%016llx 0x%016llx 0x%016llx\n",
114 (unsigned long long)start,
115 (unsigned long long)end,
116 (unsigned long long)res->flags);
1da177e4
LT
117 }
118 return (str - buf);
119}
120
87c8a443 121static ssize_t modalias_show(struct device *dev, struct device_attribute *attr, char *buf)
9888549e
GK
122{
123 struct pci_dev *pci_dev = to_pci_dev(dev);
124
125 return sprintf(buf, "pci:v%08Xd%08Xsv%08Xsd%08Xbc%02Xsc%02Xi%02x\n",
126 pci_dev->vendor, pci_dev->device,
127 pci_dev->subsystem_vendor, pci_dev->subsystem_device,
128 (u8)(pci_dev->class >> 16), (u8)(pci_dev->class >> 8),
129 (u8)(pci_dev->class));
130}
bae94d02
IPG
131
132static ssize_t is_enabled_store(struct device *dev,
133 struct device_attribute *attr, const char *buf,
134 size_t count)
9f125d30 135{
bae94d02 136 ssize_t result = -EINVAL;
9f125d30
AV
137 struct pci_dev *pdev = to_pci_dev(dev);
138
139 /* this can crash the machine when done on the "wrong" device */
140 if (!capable(CAP_SYS_ADMIN))
141 return count;
142
bae94d02
IPG
143 if (*buf == '0') {
144 if (atomic_read(&pdev->enable_cnt) != 0)
145 pci_disable_device(pdev);
146 else
147 result = -EIO;
148 } else if (*buf == '1')
149 result = pci_enable_device(pdev);
9f125d30 150
bae94d02
IPG
151 return result < 0 ? result : count;
152}
153
154static ssize_t is_enabled_show(struct device *dev,
155 struct device_attribute *attr, char *buf)
156{
157 struct pci_dev *pdev;
9f125d30 158
bae94d02
IPG
159 pdev = to_pci_dev (dev);
160 return sprintf (buf, "%u\n", atomic_read(&pdev->enable_cnt));
9f125d30
AV
161}
162
81bb0e19
BG
163#ifdef CONFIG_NUMA
164static ssize_t
165numa_node_show(struct device *dev, struct device_attribute *attr, char *buf)
166{
167 return sprintf (buf, "%d\n", dev->numa_node);
168}
169#endif
170
fe97064c
BG
171static ssize_t
172msi_bus_show(struct device *dev, struct device_attribute *attr, char *buf)
173{
174 struct pci_dev *pdev = to_pci_dev(dev);
175
176 if (!pdev->subordinate)
177 return 0;
178
179 return sprintf (buf, "%u\n",
180 !(pdev->subordinate->bus_flags & PCI_BUS_FLAGS_NO_MSI));
181}
182
183static ssize_t
184msi_bus_store(struct device *dev, struct device_attribute *attr,
185 const char *buf, size_t count)
186{
187 struct pci_dev *pdev = to_pci_dev(dev);
188
189 /* bad things may happen if the no_msi flag is changed
190 * while some drivers are loaded */
191 if (!capable(CAP_SYS_ADMIN))
192 return count;
193
194 if (!pdev->subordinate)
195 return count;
196
197 if (*buf == '0') {
198 pdev->subordinate->bus_flags |= PCI_BUS_FLAGS_NO_MSI;
199 dev_warn(&pdev->dev, "forced subordinate bus to not support MSI,"
200 " bad things could happen.\n");
201 }
202
203 if (*buf == '1') {
204 pdev->subordinate->bus_flags &= ~PCI_BUS_FLAGS_NO_MSI;
205 dev_warn(&pdev->dev, "forced subordinate bus to support MSI,"
206 " bad things could happen.\n");
207 }
208
209 return count;
210}
9888549e 211
1da177e4
LT
212struct device_attribute pci_dev_attrs[] = {
213 __ATTR_RO(resource),
214 __ATTR_RO(vendor),
215 __ATTR_RO(device),
216 __ATTR_RO(subsystem_vendor),
217 __ATTR_RO(subsystem_device),
218 __ATTR_RO(class),
219 __ATTR_RO(irq),
220 __ATTR_RO(local_cpus),
39106dcf 221 __ATTR_RO(local_cpulist),
9888549e 222 __ATTR_RO(modalias),
81bb0e19
BG
223#ifdef CONFIG_NUMA
224 __ATTR_RO(numa_node),
225#endif
9f125d30 226 __ATTR(enable, 0600, is_enabled_show, is_enabled_store),
bdee9d98
DT
227 __ATTR(broken_parity_status,(S_IRUGO|S_IWUSR),
228 broken_parity_status_show,broken_parity_status_store),
fe97064c 229 __ATTR(msi_bus, 0644, msi_bus_show, msi_bus_store),
1da177e4
LT
230 __ATTR_NULL,
231};
232
233static ssize_t
91a69029
ZR
234pci_read_config(struct kobject *kobj, struct bin_attribute *bin_attr,
235 char *buf, loff_t off, size_t count)
1da177e4
LT
236{
237 struct pci_dev *dev = to_pci_dev(container_of(kobj,struct device,kobj));
238 unsigned int size = 64;
239 loff_t init_off = off;
4c0619ad 240 u8 *data = (u8*) buf;
1da177e4
LT
241
242 /* Several chips lock up trying to read undefined config space */
243 if (capable(CAP_SYS_ADMIN)) {
244 size = dev->cfg_size;
245 } else if (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS) {
246 size = 128;
247 }
248
249 if (off > size)
250 return 0;
251 if (off + count > size) {
252 size -= off;
253 count = size;
254 } else {
255 size = count;
256 }
257
4c0619ad 258 if ((off & 1) && size) {
259 u8 val;
e04b0ea2 260 pci_user_read_config_byte(dev, off, &val);
4c0619ad 261 data[off - init_off] = val;
1da177e4 262 off++;
4c0619ad 263 size--;
264 }
265
266 if ((off & 3) && size > 2) {
267 u16 val;
e04b0ea2 268 pci_user_read_config_word(dev, off, &val);
4c0619ad 269 data[off - init_off] = val & 0xff;
270 data[off - init_off + 1] = (val >> 8) & 0xff;
271 off += 2;
272 size -= 2;
1da177e4
LT
273 }
274
275 while (size > 3) {
4c0619ad 276 u32 val;
e04b0ea2 277 pci_user_read_config_dword(dev, off, &val);
4c0619ad 278 data[off - init_off] = val & 0xff;
279 data[off - init_off + 1] = (val >> 8) & 0xff;
280 data[off - init_off + 2] = (val >> 16) & 0xff;
281 data[off - init_off + 3] = (val >> 24) & 0xff;
1da177e4
LT
282 off += 4;
283 size -= 4;
284 }
285
4c0619ad 286 if (size >= 2) {
287 u16 val;
e04b0ea2 288 pci_user_read_config_word(dev, off, &val);
4c0619ad 289 data[off - init_off] = val & 0xff;
290 data[off - init_off + 1] = (val >> 8) & 0xff;
291 off += 2;
292 size -= 2;
293 }
294
295 if (size > 0) {
296 u8 val;
e04b0ea2 297 pci_user_read_config_byte(dev, off, &val);
4c0619ad 298 data[off - init_off] = val;
1da177e4
LT
299 off++;
300 --size;
301 }
302
303 return count;
304}
305
306static ssize_t
91a69029
ZR
307pci_write_config(struct kobject *kobj, struct bin_attribute *bin_attr,
308 char *buf, loff_t off, size_t count)
1da177e4
LT
309{
310 struct pci_dev *dev = to_pci_dev(container_of(kobj,struct device,kobj));
311 unsigned int size = count;
312 loff_t init_off = off;
4c0619ad 313 u8 *data = (u8*) buf;
1da177e4
LT
314
315 if (off > dev->cfg_size)
316 return 0;
317 if (off + count > dev->cfg_size) {
318 size = dev->cfg_size - off;
319 count = size;
320 }
4c0619ad 321
322 if ((off & 1) && size) {
e04b0ea2 323 pci_user_write_config_byte(dev, off, data[off - init_off]);
1da177e4 324 off++;
4c0619ad 325 size--;
1da177e4 326 }
4c0619ad 327
328 if ((off & 3) && size > 2) {
329 u16 val = data[off - init_off];
330 val |= (u16) data[off - init_off + 1] << 8;
e04b0ea2 331 pci_user_write_config_word(dev, off, val);
4c0619ad 332 off += 2;
333 size -= 2;
334 }
1da177e4
LT
335
336 while (size > 3) {
4c0619ad 337 u32 val = data[off - init_off];
338 val |= (u32) data[off - init_off + 1] << 8;
339 val |= (u32) data[off - init_off + 2] << 16;
340 val |= (u32) data[off - init_off + 3] << 24;
e04b0ea2 341 pci_user_write_config_dword(dev, off, val);
1da177e4
LT
342 off += 4;
343 size -= 4;
344 }
4c0619ad 345
346 if (size >= 2) {
347 u16 val = data[off - init_off];
348 val |= (u16) data[off - init_off + 1] << 8;
e04b0ea2 349 pci_user_write_config_word(dev, off, val);
4c0619ad 350 off += 2;
351 size -= 2;
352 }
1da177e4 353
4c0619ad 354 if (size) {
e04b0ea2 355 pci_user_write_config_byte(dev, off, data[off - init_off]);
1da177e4
LT
356 off++;
357 --size;
358 }
359
360 return count;
361}
362
94e61088
BH
363static ssize_t
364pci_read_vpd(struct kobject *kobj, struct bin_attribute *bin_attr,
365 char *buf, loff_t off, size_t count)
366{
367 struct pci_dev *dev =
368 to_pci_dev(container_of(kobj, struct device, kobj));
369 int end;
370 int ret;
371
372 if (off > bin_attr->size)
373 count = 0;
374 else if (count > bin_attr->size - off)
375 count = bin_attr->size - off;
376 end = off + count;
377
378 while (off < end) {
379 ret = dev->vpd->ops->read(dev, off, end - off, buf);
380 if (ret < 0)
381 return ret;
382 buf += ret;
383 off += ret;
384 }
385
386 return count;
387}
388
389static ssize_t
390pci_write_vpd(struct kobject *kobj, struct bin_attribute *bin_attr,
391 char *buf, loff_t off, size_t count)
392{
393 struct pci_dev *dev =
394 to_pci_dev(container_of(kobj, struct device, kobj));
395 int end;
396 int ret;
397
398 if (off > bin_attr->size)
399 count = 0;
400 else if (count > bin_attr->size - off)
401 count = bin_attr->size - off;
402 end = off + count;
403
404 while (off < end) {
405 ret = dev->vpd->ops->write(dev, off, end - off, buf);
406 if (ret < 0)
407 return ret;
408 buf += ret;
409 off += ret;
410 }
411
412 return count;
413}
414
1da177e4
LT
415#ifdef HAVE_PCI_LEGACY
416/**
417 * pci_read_legacy_io - read byte(s) from legacy I/O port space
418 * @kobj: kobject corresponding to file to read from
419 * @buf: buffer to store results
420 * @off: offset into legacy I/O port space
421 * @count: number of bytes to read
422 *
423 * Reads 1, 2, or 4 bytes from legacy I/O port space using an arch specific
424 * callback routine (pci_legacy_read).
425 */
f19aeb1f 426static ssize_t
91a69029
ZR
427pci_read_legacy_io(struct kobject *kobj, struct bin_attribute *bin_attr,
428 char *buf, loff_t off, size_t count)
1da177e4
LT
429{
430 struct pci_bus *bus = to_pci_bus(container_of(kobj,
fd7d1ced 431 struct device,
1da177e4
LT
432 kobj));
433
434 /* Only support 1, 2 or 4 byte accesses */
435 if (count != 1 && count != 2 && count != 4)
436 return -EINVAL;
437
438 return pci_legacy_read(bus, off, (u32 *)buf, count);
439}
440
441/**
442 * pci_write_legacy_io - write byte(s) to legacy I/O port space
443 * @kobj: kobject corresponding to file to read from
444 * @buf: buffer containing value to be written
445 * @off: offset into legacy I/O port space
446 * @count: number of bytes to write
447 *
448 * Writes 1, 2, or 4 bytes from legacy I/O port space using an arch specific
449 * callback routine (pci_legacy_write).
450 */
f19aeb1f 451static ssize_t
91a69029
ZR
452pci_write_legacy_io(struct kobject *kobj, struct bin_attribute *bin_attr,
453 char *buf, loff_t off, size_t count)
1da177e4
LT
454{
455 struct pci_bus *bus = to_pci_bus(container_of(kobj,
fd7d1ced 456 struct device,
1da177e4
LT
457 kobj));
458 /* Only support 1, 2 or 4 byte accesses */
459 if (count != 1 && count != 2 && count != 4)
460 return -EINVAL;
461
462 return pci_legacy_write(bus, off, *(u32 *)buf, count);
463}
464
465/**
466 * pci_mmap_legacy_mem - map legacy PCI memory into user memory space
467 * @kobj: kobject corresponding to device to be mapped
468 * @attr: struct bin_attribute for this file
469 * @vma: struct vm_area_struct passed to mmap
470 *
f19aeb1f 471 * Uses an arch specific callback, pci_mmap_legacy_mem_page_range, to mmap
1da177e4
LT
472 * legacy memory space (first meg of bus space) into application virtual
473 * memory space.
474 */
f19aeb1f 475static int
1da177e4
LT
476pci_mmap_legacy_mem(struct kobject *kobj, struct bin_attribute *attr,
477 struct vm_area_struct *vma)
478{
479 struct pci_bus *bus = to_pci_bus(container_of(kobj,
fd7d1ced 480 struct device,
1da177e4
LT
481 kobj));
482
f19aeb1f
BH
483 return pci_mmap_legacy_page_range(bus, vma, pci_mmap_mem);
484}
485
486/**
487 * pci_mmap_legacy_io - map legacy PCI IO into user memory space
488 * @kobj: kobject corresponding to device to be mapped
489 * @attr: struct bin_attribute for this file
490 * @vma: struct vm_area_struct passed to mmap
491 *
492 * Uses an arch specific callback, pci_mmap_legacy_io_page_range, to mmap
493 * legacy IO space (first meg of bus space) into application virtual
494 * memory space. Returns -ENOSYS if the operation isn't supported
495 */
496static int
497pci_mmap_legacy_io(struct kobject *kobj, struct bin_attribute *attr,
498 struct vm_area_struct *vma)
499{
500 struct pci_bus *bus = to_pci_bus(container_of(kobj,
501 struct device,
502 kobj));
503
504 return pci_mmap_legacy_page_range(bus, vma, pci_mmap_io);
505}
506
507/**
508 * pci_create_legacy_files - create legacy I/O port and memory files
509 * @b: bus to create files under
510 *
511 * Some platforms allow access to legacy I/O port and ISA memory space on
512 * a per-bus basis. This routine creates the files and ties them into
513 * their associated read, write and mmap files from pci-sysfs.c
514 *
515 * On error unwind, but don't propogate the error to the caller
516 * as it is ok to set up the PCI bus without these files.
517 */
518void pci_create_legacy_files(struct pci_bus *b)
519{
520 int error;
521
522 b->legacy_io = kzalloc(sizeof(struct bin_attribute) * 2,
523 GFP_ATOMIC);
524 if (!b->legacy_io)
525 goto kzalloc_err;
526
527 b->legacy_io->attr.name = "legacy_io";
528 b->legacy_io->size = 0xffff;
529 b->legacy_io->attr.mode = S_IRUSR | S_IWUSR;
530 b->legacy_io->read = pci_read_legacy_io;
531 b->legacy_io->write = pci_write_legacy_io;
532 b->legacy_io->mmap = pci_mmap_legacy_io;
533 error = device_create_bin_file(&b->dev, b->legacy_io);
534 if (error)
535 goto legacy_io_err;
536
537 /* Allocated above after the legacy_io struct */
538 b->legacy_mem = b->legacy_io + 1;
539 b->legacy_mem->attr.name = "legacy_mem";
540 b->legacy_mem->size = 1024*1024;
541 b->legacy_mem->attr.mode = S_IRUSR | S_IWUSR;
542 b->legacy_mem->mmap = pci_mmap_legacy_mem;
543 error = device_create_bin_file(&b->dev, b->legacy_mem);
544 if (error)
545 goto legacy_mem_err;
546
547 return;
548
549legacy_mem_err:
550 device_remove_bin_file(&b->dev, b->legacy_io);
551legacy_io_err:
552 kfree(b->legacy_io);
553 b->legacy_io = NULL;
554kzalloc_err:
555 printk(KERN_WARNING "pci: warning: could not create legacy I/O port "
556 "and ISA memory resources to sysfs\n");
557 return;
558}
559
560void pci_remove_legacy_files(struct pci_bus *b)
561{
562 if (b->legacy_io) {
563 device_remove_bin_file(&b->dev, b->legacy_io);
564 device_remove_bin_file(&b->dev, b->legacy_mem);
565 kfree(b->legacy_io); /* both are allocated here */
566 }
1da177e4
LT
567}
568#endif /* HAVE_PCI_LEGACY */
569
570#ifdef HAVE_PCI_MMAP
b5ff7df3
LT
571
572static int pci_mmap_fits(struct pci_dev *pdev, int resno, struct vm_area_struct *vma)
573{
574 unsigned long nr, start, size;
575
576 nr = (vma->vm_end - vma->vm_start) >> PAGE_SHIFT;
577 start = vma->vm_pgoff;
88e7df0b 578 size = ((pci_resource_len(pdev, resno) - 1) >> PAGE_SHIFT) + 1;
b5ff7df3
LT
579 if (start < size && size - start >= nr)
580 return 1;
581 WARN(1, "process \"%s\" tried to map 0x%08lx-0x%08lx on %s BAR %d (size 0x%08lx)\n",
582 current->comm, start, start+nr, pci_name(pdev), resno, size);
583 return 0;
584}
585
1da177e4
LT
586/**
587 * pci_mmap_resource - map a PCI resource into user memory space
588 * @kobj: kobject for mapping
589 * @attr: struct bin_attribute for the file being mapped
590 * @vma: struct vm_area_struct passed into the mmap
45aec1ae 591 * @write_combine: 1 for write_combine mapping
1da177e4
LT
592 *
593 * Use the regular PCI mapping routines to map a PCI resource into userspace.
1da177e4
LT
594 */
595static int
596pci_mmap_resource(struct kobject *kobj, struct bin_attribute *attr,
45aec1ae 597 struct vm_area_struct *vma, int write_combine)
1da177e4
LT
598{
599 struct pci_dev *pdev = to_pci_dev(container_of(kobj,
600 struct device, kobj));
601 struct resource *res = (struct resource *)attr->private;
602 enum pci_mmap_state mmap_type;
e31dd6e4 603 resource_size_t start, end;
2311b1f2 604 int i;
1da177e4 605
2311b1f2
ME
606 for (i = 0; i < PCI_ROM_RESOURCE; i++)
607 if (res == &pdev->resource[i])
608 break;
609 if (i >= PCI_ROM_RESOURCE)
610 return -ENODEV;
611
b5ff7df3
LT
612 if (!pci_mmap_fits(pdev, i, vma))
613 return -EINVAL;
614
2311b1f2
ME
615 /* pci_mmap_page_range() expects the same kind of entry as coming
616 * from /proc/bus/pci/ which is a "user visible" value. If this is
617 * different from the resource itself, arch will do necessary fixup.
618 */
619 pci_resource_to_user(pdev, i, res, &start, &end);
620 vma->vm_pgoff += start >> PAGE_SHIFT;
1da177e4
LT
621 mmap_type = res->flags & IORESOURCE_MEM ? pci_mmap_mem : pci_mmap_io;
622
45aec1ae 623 return pci_mmap_page_range(pdev, vma, mmap_type, write_combine);
624}
625
626static int
627pci_mmap_resource_uc(struct kobject *kobj, struct bin_attribute *attr,
628 struct vm_area_struct *vma)
629{
630 return pci_mmap_resource(kobj, attr, vma, 0);
631}
632
633static int
634pci_mmap_resource_wc(struct kobject *kobj, struct bin_attribute *attr,
635 struct vm_area_struct *vma)
636{
637 return pci_mmap_resource(kobj, attr, vma, 1);
1da177e4
LT
638}
639
b19441af
GKH
640/**
641 * pci_remove_resource_files - cleanup resource files
642 * @dev: dev to cleanup
643 *
644 * If we created resource files for @dev, remove them from sysfs and
645 * free their resources.
646 */
647static void
648pci_remove_resource_files(struct pci_dev *pdev)
649{
650 int i;
651
652 for (i = 0; i < PCI_ROM_RESOURCE; i++) {
653 struct bin_attribute *res_attr;
654
655 res_attr = pdev->res_attr[i];
656 if (res_attr) {
657 sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
658 kfree(res_attr);
659 }
45aec1ae 660
661 res_attr = pdev->res_attr_wc[i];
662 if (res_attr) {
663 sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
664 kfree(res_attr);
665 }
b19441af
GKH
666 }
667}
668
45aec1ae 669static int pci_create_attr(struct pci_dev *pdev, int num, int write_combine)
670{
671 /* allocate attribute structure, piggyback attribute name */
672 int name_len = write_combine ? 13 : 10;
673 struct bin_attribute *res_attr;
674 int retval;
675
676 res_attr = kzalloc(sizeof(*res_attr) + name_len, GFP_ATOMIC);
677 if (res_attr) {
678 char *res_attr_name = (char *)(res_attr + 1);
679
680 if (write_combine) {
681 pdev->res_attr_wc[num] = res_attr;
682 sprintf(res_attr_name, "resource%d_wc", num);
683 res_attr->mmap = pci_mmap_resource_wc;
684 } else {
685 pdev->res_attr[num] = res_attr;
686 sprintf(res_attr_name, "resource%d", num);
687 res_attr->mmap = pci_mmap_resource_uc;
688 }
689 res_attr->attr.name = res_attr_name;
690 res_attr->attr.mode = S_IRUSR | S_IWUSR;
691 res_attr->size = pci_resource_len(pdev, num);
692 res_attr->private = &pdev->resource[num];
693 retval = sysfs_create_bin_file(&pdev->dev.kobj, res_attr);
694 } else
695 retval = -ENOMEM;
696
697 return retval;
698}
699
1da177e4
LT
700/**
701 * pci_create_resource_files - create resource files in sysfs for @dev
702 * @dev: dev in question
703 *
704 * Walk the resources in @dev creating files for each resource available.
705 */
b19441af 706static int pci_create_resource_files(struct pci_dev *pdev)
1da177e4
LT
707{
708 int i;
b19441af 709 int retval;
1da177e4
LT
710
711 /* Expose the PCI resources from this device as files */
712 for (i = 0; i < PCI_ROM_RESOURCE; i++) {
1da177e4
LT
713
714 /* skip empty resources */
715 if (!pci_resource_len(pdev, i))
716 continue;
717
45aec1ae 718 retval = pci_create_attr(pdev, i, 0);
719 /* for prefetchable resources, create a WC mappable file */
720 if (!retval && pdev->resource[i].flags & IORESOURCE_PREFETCH)
721 retval = pci_create_attr(pdev, i, 1);
722
723 if (retval) {
724 pci_remove_resource_files(pdev);
725 return retval;
1da177e4
LT
726 }
727 }
b19441af 728 return 0;
1da177e4
LT
729}
730#else /* !HAVE_PCI_MMAP */
b19441af 731static inline int pci_create_resource_files(struct pci_dev *dev) { return 0; }
1da177e4
LT
732static inline void pci_remove_resource_files(struct pci_dev *dev) { return; }
733#endif /* HAVE_PCI_MMAP */
734
735/**
736 * pci_write_rom - used to enable access to the PCI ROM display
737 * @kobj: kernel object handle
738 * @buf: user input
739 * @off: file offset
740 * @count: number of byte in input
741 *
742 * writing anything except 0 enables it
743 */
744static ssize_t
91a69029
ZR
745pci_write_rom(struct kobject *kobj, struct bin_attribute *bin_attr,
746 char *buf, loff_t off, size_t count)
1da177e4
LT
747{
748 struct pci_dev *pdev = to_pci_dev(container_of(kobj, struct device, kobj));
749
750 if ((off == 0) && (*buf == '0') && (count == 2))
751 pdev->rom_attr_enabled = 0;
752 else
753 pdev->rom_attr_enabled = 1;
754
755 return count;
756}
757
758/**
759 * pci_read_rom - read a PCI ROM
760 * @kobj: kernel object handle
761 * @buf: where to put the data we read from the ROM
762 * @off: file offset
763 * @count: number of bytes to read
764 *
765 * Put @count bytes starting at @off into @buf from the ROM in the PCI
766 * device corresponding to @kobj.
767 */
768static ssize_t
91a69029
ZR
769pci_read_rom(struct kobject *kobj, struct bin_attribute *bin_attr,
770 char *buf, loff_t off, size_t count)
1da177e4
LT
771{
772 struct pci_dev *pdev = to_pci_dev(container_of(kobj, struct device, kobj));
773 void __iomem *rom;
774 size_t size;
775
776 if (!pdev->rom_attr_enabled)
777 return -EINVAL;
778
779 rom = pci_map_rom(pdev, &size); /* size starts out as PCI window size */
780 if (!rom)
781 return 0;
782
783 if (off >= size)
784 count = 0;
785 else {
786 if (off + count > size)
787 count = size - off;
788
789 memcpy_fromio(buf, rom + off, count);
790 }
791 pci_unmap_rom(pdev, rom);
792
793 return count;
794}
795
796static struct bin_attribute pci_config_attr = {
797 .attr = {
798 .name = "config",
799 .mode = S_IRUGO | S_IWUSR,
1da177e4 800 },
557848c3 801 .size = PCI_CFG_SPACE_SIZE,
1da177e4
LT
802 .read = pci_read_config,
803 .write = pci_write_config,
804};
805
806static struct bin_attribute pcie_config_attr = {
807 .attr = {
808 .name = "config",
809 .mode = S_IRUGO | S_IWUSR,
1da177e4 810 },
557848c3 811 .size = PCI_CFG_SPACE_EXP_SIZE,
1da177e4
LT
812 .read = pci_read_config,
813 .write = pci_write_config,
814};
815
a2cd52ca 816int __attribute__ ((weak)) pcibios_add_platform_entries(struct pci_dev *dev)
575e3348 817{
a2cd52ca 818 return 0;
575e3348
ME
819}
820
280c73d3
ZY
821static int pci_create_capabilities_sysfs(struct pci_dev *dev)
822{
823 int retval;
824 struct bin_attribute *attr;
825
826 /* If the device has VPD, try to expose it in sysfs. */
827 if (dev->vpd) {
828 attr = kzalloc(sizeof(*attr), GFP_ATOMIC);
829 if (!attr)
830 return -ENOMEM;
831
832 attr->size = dev->vpd->len;
833 attr->attr.name = "vpd";
834 attr->attr.mode = S_IRUSR | S_IWUSR;
835 attr->read = pci_read_vpd;
836 attr->write = pci_write_vpd;
837 retval = sysfs_create_bin_file(&dev->dev.kobj, attr);
838 if (retval) {
839 kfree(dev->vpd->attr);
840 return retval;
841 }
842 dev->vpd->attr = attr;
843 }
844
845 /* Active State Power Management */
846 pcie_aspm_create_sysfs_dev_files(dev);
847
848 return 0;
849}
850
b19441af 851int __must_check pci_create_sysfs_dev_files (struct pci_dev *pdev)
1da177e4 852{
b19441af 853 int retval;
280c73d3
ZY
854 int rom_size = 0;
855 struct bin_attribute *attr;
b19441af 856
1da177e4
LT
857 if (!sysfs_initialized)
858 return -EACCES;
859
557848c3 860 if (pdev->cfg_size < PCI_CFG_SPACE_EXP_SIZE)
b19441af 861 retval = sysfs_create_bin_file(&pdev->dev.kobj, &pci_config_attr);
1da177e4 862 else
b19441af
GKH
863 retval = sysfs_create_bin_file(&pdev->dev.kobj, &pcie_config_attr);
864 if (retval)
865 goto err;
1da177e4 866
b19441af
GKH
867 retval = pci_create_resource_files(pdev);
868 if (retval)
280c73d3
ZY
869 goto err_config_file;
870
871 if (pci_resource_len(pdev, PCI_ROM_RESOURCE))
872 rom_size = pci_resource_len(pdev, PCI_ROM_RESOURCE);
873 else if (pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW)
874 rom_size = 0x20000;
1da177e4
LT
875
876 /* If the device has a ROM, try to expose it in sysfs. */
280c73d3 877 if (rom_size) {
94e61088 878 attr = kzalloc(sizeof(*attr), GFP_ATOMIC);
280c73d3 879 if (!attr) {
b19441af 880 retval = -ENOMEM;
9890b12a 881 goto err_resource_files;
1da177e4 882 }
280c73d3
ZY
883 attr->size = rom_size;
884 attr->attr.name = "rom";
885 attr->attr.mode = S_IRUSR;
886 attr->read = pci_read_rom;
887 attr->write = pci_write_rom;
888 retval = sysfs_create_bin_file(&pdev->dev.kobj, attr);
889 if (retval) {
890 kfree(attr);
891 goto err_resource_files;
892 }
893 pdev->rom_attr = attr;
1da177e4 894 }
280c73d3 895
1da177e4 896 /* add platform-specific attributes */
280c73d3
ZY
897 retval = pcibios_add_platform_entries(pdev);
898 if (retval)
a2cd52ca 899 goto err_rom_file;
b19441af 900
280c73d3
ZY
901 /* add sysfs entries for various capabilities */
902 retval = pci_create_capabilities_sysfs(pdev);
903 if (retval)
904 goto err_rom_file;
7d715a6c 905
1da177e4 906 return 0;
b19441af 907
a2cd52ca 908err_rom_file:
280c73d3 909 if (rom_size) {
94e61088 910 sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr);
280c73d3
ZY
911 kfree(pdev->rom_attr);
912 pdev->rom_attr = NULL;
913 }
9890b12a
ME
914err_resource_files:
915 pci_remove_resource_files(pdev);
94e61088 916err_config_file:
557848c3 917 if (pdev->cfg_size < PCI_CFG_SPACE_EXP_SIZE)
b19441af
GKH
918 sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr);
919 else
920 sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr);
921err:
922 return retval;
1da177e4
LT
923}
924
280c73d3
ZY
925static void pci_remove_capabilities_sysfs(struct pci_dev *dev)
926{
927 if (dev->vpd && dev->vpd->attr) {
928 sysfs_remove_bin_file(&dev->dev.kobj, dev->vpd->attr);
929 kfree(dev->vpd->attr);
930 }
931
932 pcie_aspm_remove_sysfs_dev_files(dev);
933}
934
1da177e4
LT
935/**
936 * pci_remove_sysfs_dev_files - cleanup PCI specific sysfs files
937 * @pdev: device whose entries we should free
938 *
939 * Cleanup when @pdev is removed from sysfs.
940 */
941void pci_remove_sysfs_dev_files(struct pci_dev *pdev)
942{
280c73d3
ZY
943 int rom_size = 0;
944
d67afe5e
DM
945 if (!sysfs_initialized)
946 return;
947
280c73d3 948 pci_remove_capabilities_sysfs(pdev);
7d715a6c 949
557848c3 950 if (pdev->cfg_size < PCI_CFG_SPACE_EXP_SIZE)
1da177e4
LT
951 sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr);
952 else
953 sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr);
954
955 pci_remove_resource_files(pdev);
956
280c73d3
ZY
957 if (pci_resource_len(pdev, PCI_ROM_RESOURCE))
958 rom_size = pci_resource_len(pdev, PCI_ROM_RESOURCE);
959 else if (pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW)
960 rom_size = 0x20000;
961
962 if (rom_size && pdev->rom_attr) {
963 sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr);
964 kfree(pdev->rom_attr);
1da177e4
LT
965 }
966}
967
968static int __init pci_sysfs_init(void)
969{
970 struct pci_dev *pdev = NULL;
b19441af
GKH
971 int retval;
972
1da177e4 973 sysfs_initialized = 1;
b19441af
GKH
974 for_each_pci_dev(pdev) {
975 retval = pci_create_sysfs_dev_files(pdev);
151fc5df
JL
976 if (retval) {
977 pci_dev_put(pdev);
b19441af 978 return retval;
151fc5df 979 }
b19441af 980 }
1da177e4
LT
981
982 return 0;
983}
984
40ee9e9f 985late_initcall(pci_sysfs_init);