sunrpc: Include missing smp_lock.h
[linux-2.6-block.git] / drivers / pci / pci-sysfs.c
CommitLineData
1da177e4
LT
1/*
2 * drivers/pci/pci-sysfs.c
3 *
4 * (C) Copyright 2002-2004 Greg Kroah-Hartman <greg@kroah.com>
5 * (C) Copyright 2002-2004 IBM Corp.
6 * (C) Copyright 2003 Matthew Wilcox
7 * (C) Copyright 2003 Hewlett-Packard
8 * (C) Copyright 2004 Jon Smirl <jonsmirl@yahoo.com>
9 * (C) Copyright 2004 Silicon Graphics, Inc. Jesse Barnes <jbarnes@sgi.com>
10 *
11 * File attributes for PCI devices
12 *
13 * Modeled after usb's driverfs.c
14 *
15 */
16
17
1da177e4 18#include <linux/kernel.h>
b5ff7df3 19#include <linux/sched.h>
1da177e4
LT
20#include <linux/pci.h>
21#include <linux/stat.h>
22#include <linux/topology.h>
23#include <linux/mm.h>
aa0ac365 24#include <linux/capability.h>
7d715a6c 25#include <linux/pci-aspm.h>
1da177e4
LT
26#include "pci.h"
27
28static int sysfs_initialized; /* = 0 */
29
30/* show configuration fields */
31#define pci_config_attr(field, format_string) \
32static ssize_t \
e404e274 33field##_show(struct device *dev, struct device_attribute *attr, char *buf) \
1da177e4
LT
34{ \
35 struct pci_dev *pdev; \
36 \
37 pdev = to_pci_dev (dev); \
38 return sprintf (buf, format_string, pdev->field); \
39}
40
41pci_config_attr(vendor, "0x%04x\n");
42pci_config_attr(device, "0x%04x\n");
43pci_config_attr(subsystem_vendor, "0x%04x\n");
44pci_config_attr(subsystem_device, "0x%04x\n");
45pci_config_attr(class, "0x%06x\n");
46pci_config_attr(irq, "%u\n");
47
bdee9d98
DT
48static ssize_t broken_parity_status_show(struct device *dev,
49 struct device_attribute *attr,
50 char *buf)
51{
52 struct pci_dev *pdev = to_pci_dev(dev);
53 return sprintf (buf, "%u\n", pdev->broken_parity_status);
54}
55
56static ssize_t broken_parity_status_store(struct device *dev,
57 struct device_attribute *attr,
58 const char *buf, size_t count)
59{
60 struct pci_dev *pdev = to_pci_dev(dev);
92425a40 61 unsigned long val;
bdee9d98 62
92425a40
TP
63 if (strict_strtoul(buf, 0, &val) < 0)
64 return -EINVAL;
65
66 pdev->broken_parity_status = !!val;
67
68 return count;
bdee9d98
DT
69}
70
4327edf6
AC
71static ssize_t local_cpus_show(struct device *dev,
72 struct device_attribute *attr, char *buf)
1da177e4 73{
3be83050 74 const struct cpumask *mask;
4327edf6
AC
75 int len;
76
e0cd5160 77#ifdef CONFIG_NUMA
6be954d1
DJ
78 mask = (dev_to_node(dev) == -1) ? cpu_online_mask :
79 cpumask_of_node(dev_to_node(dev));
e0cd5160 80#else
3be83050 81 mask = cpumask_of_pcibus(to_pci_dev(dev)->bus);
e0cd5160 82#endif
3be83050 83 len = cpumask_scnprintf(buf, PAGE_SIZE-2, mask);
39106dcf
MT
84 buf[len++] = '\n';
85 buf[len] = '\0';
86 return len;
87}
88
89
90static ssize_t local_cpulist_show(struct device *dev,
91 struct device_attribute *attr, char *buf)
92{
3be83050 93 const struct cpumask *mask;
39106dcf
MT
94 int len;
95
e0cd5160 96#ifdef CONFIG_NUMA
6be954d1
DJ
97 mask = (dev_to_node(dev) == -1) ? cpu_online_mask :
98 cpumask_of_node(dev_to_node(dev));
e0cd5160 99#else
3be83050 100 mask = cpumask_of_pcibus(to_pci_dev(dev)->bus);
e0cd5160 101#endif
3be83050 102 len = cpulist_scnprintf(buf, PAGE_SIZE-2, mask);
39106dcf
MT
103 buf[len++] = '\n';
104 buf[len] = '\0';
105 return len;
1da177e4
LT
106}
107
108/* show resources */
109static ssize_t
e404e274 110resource_show(struct device * dev, struct device_attribute *attr, char * buf)
1da177e4
LT
111{
112 struct pci_dev * pci_dev = to_pci_dev(dev);
113 char * str = buf;
114 int i;
fde09c6d 115 int max;
e31dd6e4 116 resource_size_t start, end;
1da177e4
LT
117
118 if (pci_dev->subordinate)
119 max = DEVICE_COUNT_RESOURCE;
fde09c6d
YZ
120 else
121 max = PCI_BRIDGE_RESOURCES;
1da177e4
LT
122
123 for (i = 0; i < max; i++) {
2311b1f2
ME
124 struct resource *res = &pci_dev->resource[i];
125 pci_resource_to_user(pci_dev, i, res, &start, &end);
126 str += sprintf(str,"0x%016llx 0x%016llx 0x%016llx\n",
127 (unsigned long long)start,
128 (unsigned long long)end,
129 (unsigned long long)res->flags);
1da177e4
LT
130 }
131 return (str - buf);
132}
133
87c8a443 134static ssize_t modalias_show(struct device *dev, struct device_attribute *attr, char *buf)
9888549e
GK
135{
136 struct pci_dev *pci_dev = to_pci_dev(dev);
137
138 return sprintf(buf, "pci:v%08Xd%08Xsv%08Xsd%08Xbc%02Xsc%02Xi%02x\n",
139 pci_dev->vendor, pci_dev->device,
140 pci_dev->subsystem_vendor, pci_dev->subsystem_device,
141 (u8)(pci_dev->class >> 16), (u8)(pci_dev->class >> 8),
142 (u8)(pci_dev->class));
143}
bae94d02
IPG
144
145static ssize_t is_enabled_store(struct device *dev,
146 struct device_attribute *attr, const char *buf,
147 size_t count)
9f125d30
AV
148{
149 struct pci_dev *pdev = to_pci_dev(dev);
92425a40
TP
150 unsigned long val;
151 ssize_t result = strict_strtoul(buf, 0, &val);
152
153 if (result < 0)
154 return result;
9f125d30
AV
155
156 /* this can crash the machine when done on the "wrong" device */
157 if (!capable(CAP_SYS_ADMIN))
92425a40 158 return -EPERM;
9f125d30 159
92425a40 160 if (!val) {
296ccb08 161 if (pci_is_enabled(pdev))
bae94d02
IPG
162 pci_disable_device(pdev);
163 else
164 result = -EIO;
92425a40 165 } else
bae94d02 166 result = pci_enable_device(pdev);
9f125d30 167
bae94d02
IPG
168 return result < 0 ? result : count;
169}
170
171static ssize_t is_enabled_show(struct device *dev,
172 struct device_attribute *attr, char *buf)
173{
174 struct pci_dev *pdev;
9f125d30 175
bae94d02
IPG
176 pdev = to_pci_dev (dev);
177 return sprintf (buf, "%u\n", atomic_read(&pdev->enable_cnt));
9f125d30
AV
178}
179
81bb0e19
BG
180#ifdef CONFIG_NUMA
181static ssize_t
182numa_node_show(struct device *dev, struct device_attribute *attr, char *buf)
183{
184 return sprintf (buf, "%d\n", dev->numa_node);
185}
186#endif
187
bb965401
YL
188static ssize_t
189dma_mask_bits_show(struct device *dev, struct device_attribute *attr, char *buf)
190{
191 struct pci_dev *pdev = to_pci_dev(dev);
192
193 return sprintf (buf, "%d\n", fls64(pdev->dma_mask));
194}
195
196static ssize_t
197consistent_dma_mask_bits_show(struct device *dev, struct device_attribute *attr,
198 char *buf)
199{
200 return sprintf (buf, "%d\n", fls64(dev->coherent_dma_mask));
201}
202
fe97064c
BG
203static ssize_t
204msi_bus_show(struct device *dev, struct device_attribute *attr, char *buf)
205{
206 struct pci_dev *pdev = to_pci_dev(dev);
207
208 if (!pdev->subordinate)
209 return 0;
210
211 return sprintf (buf, "%u\n",
212 !(pdev->subordinate->bus_flags & PCI_BUS_FLAGS_NO_MSI));
213}
214
215static ssize_t
216msi_bus_store(struct device *dev, struct device_attribute *attr,
217 const char *buf, size_t count)
218{
219 struct pci_dev *pdev = to_pci_dev(dev);
92425a40
TP
220 unsigned long val;
221
222 if (strict_strtoul(buf, 0, &val) < 0)
223 return -EINVAL;
fe97064c
BG
224
225 /* bad things may happen if the no_msi flag is changed
226 * while some drivers are loaded */
227 if (!capable(CAP_SYS_ADMIN))
92425a40 228 return -EPERM;
fe97064c 229
92425a40
TP
230 /* Maybe pci devices without subordinate busses shouldn't even have this
231 * attribute in the first place? */
fe97064c
BG
232 if (!pdev->subordinate)
233 return count;
234
92425a40
TP
235 /* Is the flag going to change, or keep the value it already had? */
236 if (!(pdev->subordinate->bus_flags & PCI_BUS_FLAGS_NO_MSI) ^
237 !!val) {
238 pdev->subordinate->bus_flags ^= PCI_BUS_FLAGS_NO_MSI;
fe97064c 239
92425a40
TP
240 dev_warn(&pdev->dev, "forced subordinate bus to%s support MSI,"
241 " bad things could happen\n", val ? "" : " not");
fe97064c
BG
242 }
243
244 return count;
245}
9888549e 246
705b1aaa
AC
247#ifdef CONFIG_HOTPLUG
248static DEFINE_MUTEX(pci_remove_rescan_mutex);
249static ssize_t bus_rescan_store(struct bus_type *bus, const char *buf,
250 size_t count)
251{
252 unsigned long val;
253 struct pci_bus *b = NULL;
254
255 if (strict_strtoul(buf, 0, &val) < 0)
256 return -EINVAL;
257
258 if (val) {
259 mutex_lock(&pci_remove_rescan_mutex);
260 while ((b = pci_find_next_bus(b)) != NULL)
261 pci_rescan_bus(b);
262 mutex_unlock(&pci_remove_rescan_mutex);
263 }
264 return count;
265}
266
267struct bus_attribute pci_bus_attrs[] = {
268 __ATTR(rescan, (S_IWUSR|S_IWGRP), NULL, bus_rescan_store),
269 __ATTR_NULL
270};
77c27c7b 271
738a6396
AC
272static ssize_t
273dev_rescan_store(struct device *dev, struct device_attribute *attr,
274 const char *buf, size_t count)
275{
276 unsigned long val;
277 struct pci_dev *pdev = to_pci_dev(dev);
278
279 if (strict_strtoul(buf, 0, &val) < 0)
280 return -EINVAL;
281
282 if (val) {
283 mutex_lock(&pci_remove_rescan_mutex);
284 pci_rescan_bus(pdev->bus);
285 mutex_unlock(&pci_remove_rescan_mutex);
286 }
287 return count;
288}
289
77c27c7b
AC
290static void remove_callback(struct device *dev)
291{
292 struct pci_dev *pdev = to_pci_dev(dev);
293
294 mutex_lock(&pci_remove_rescan_mutex);
295 pci_remove_bus_device(pdev);
296 mutex_unlock(&pci_remove_rescan_mutex);
297}
298
299static ssize_t
300remove_store(struct device *dev, struct device_attribute *dummy,
301 const char *buf, size_t count)
302{
303 int ret = 0;
304 unsigned long val;
77c27c7b
AC
305
306 if (strict_strtoul(buf, 0, &val) < 0)
307 return -EINVAL;
308
77c27c7b
AC
309 /* An attribute cannot be unregistered by one of its own methods,
310 * so we have to use this roundabout approach.
311 */
312 if (val)
313 ret = device_schedule_callback(dev, remove_callback);
314 if (ret)
315 count = ret;
316 return count;
317}
705b1aaa
AC
318#endif
319
1da177e4
LT
320struct device_attribute pci_dev_attrs[] = {
321 __ATTR_RO(resource),
322 __ATTR_RO(vendor),
323 __ATTR_RO(device),
324 __ATTR_RO(subsystem_vendor),
325 __ATTR_RO(subsystem_device),
326 __ATTR_RO(class),
327 __ATTR_RO(irq),
328 __ATTR_RO(local_cpus),
39106dcf 329 __ATTR_RO(local_cpulist),
9888549e 330 __ATTR_RO(modalias),
81bb0e19
BG
331#ifdef CONFIG_NUMA
332 __ATTR_RO(numa_node),
333#endif
bb965401
YL
334 __ATTR_RO(dma_mask_bits),
335 __ATTR_RO(consistent_dma_mask_bits),
9f125d30 336 __ATTR(enable, 0600, is_enabled_show, is_enabled_store),
bdee9d98
DT
337 __ATTR(broken_parity_status,(S_IRUGO|S_IWUSR),
338 broken_parity_status_show,broken_parity_status_store),
fe97064c 339 __ATTR(msi_bus, 0644, msi_bus_show, msi_bus_store),
77c27c7b
AC
340#ifdef CONFIG_HOTPLUG
341 __ATTR(remove, (S_IWUSR|S_IWGRP), NULL, remove_store),
738a6396 342 __ATTR(rescan, (S_IWUSR|S_IWGRP), NULL, dev_rescan_store),
77c27c7b 343#endif
1da177e4
LT
344 __ATTR_NULL,
345};
346
217f45de
DA
347static ssize_t
348boot_vga_show(struct device *dev, struct device_attribute *attr, char *buf)
349{
350 struct pci_dev *pdev = to_pci_dev(dev);
351
352 return sprintf(buf, "%u\n",
353 !!(pdev->resource[PCI_ROM_RESOURCE].flags &
354 IORESOURCE_ROM_SHADOW));
355}
356struct device_attribute vga_attr = __ATTR_RO(boot_vga);
357
1da177e4 358static ssize_t
91a69029
ZR
359pci_read_config(struct kobject *kobj, struct bin_attribute *bin_attr,
360 char *buf, loff_t off, size_t count)
1da177e4
LT
361{
362 struct pci_dev *dev = to_pci_dev(container_of(kobj,struct device,kobj));
363 unsigned int size = 64;
364 loff_t init_off = off;
4c0619ad 365 u8 *data = (u8*) buf;
1da177e4
LT
366
367 /* Several chips lock up trying to read undefined config space */
368 if (capable(CAP_SYS_ADMIN)) {
369 size = dev->cfg_size;
370 } else if (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS) {
371 size = 128;
372 }
373
374 if (off > size)
375 return 0;
376 if (off + count > size) {
377 size -= off;
378 count = size;
379 } else {
380 size = count;
381 }
382
4c0619ad 383 if ((off & 1) && size) {
384 u8 val;
e04b0ea2 385 pci_user_read_config_byte(dev, off, &val);
4c0619ad 386 data[off - init_off] = val;
1da177e4 387 off++;
4c0619ad 388 size--;
389 }
390
391 if ((off & 3) && size > 2) {
392 u16 val;
e04b0ea2 393 pci_user_read_config_word(dev, off, &val);
4c0619ad 394 data[off - init_off] = val & 0xff;
395 data[off - init_off + 1] = (val >> 8) & 0xff;
396 off += 2;
397 size -= 2;
1da177e4
LT
398 }
399
400 while (size > 3) {
4c0619ad 401 u32 val;
e04b0ea2 402 pci_user_read_config_dword(dev, off, &val);
4c0619ad 403 data[off - init_off] = val & 0xff;
404 data[off - init_off + 1] = (val >> 8) & 0xff;
405 data[off - init_off + 2] = (val >> 16) & 0xff;
406 data[off - init_off + 3] = (val >> 24) & 0xff;
1da177e4
LT
407 off += 4;
408 size -= 4;
409 }
410
4c0619ad 411 if (size >= 2) {
412 u16 val;
e04b0ea2 413 pci_user_read_config_word(dev, off, &val);
4c0619ad 414 data[off - init_off] = val & 0xff;
415 data[off - init_off + 1] = (val >> 8) & 0xff;
416 off += 2;
417 size -= 2;
418 }
419
420 if (size > 0) {
421 u8 val;
e04b0ea2 422 pci_user_read_config_byte(dev, off, &val);
4c0619ad 423 data[off - init_off] = val;
1da177e4
LT
424 off++;
425 --size;
426 }
427
428 return count;
429}
430
431static ssize_t
91a69029
ZR
432pci_write_config(struct kobject *kobj, struct bin_attribute *bin_attr,
433 char *buf, loff_t off, size_t count)
1da177e4
LT
434{
435 struct pci_dev *dev = to_pci_dev(container_of(kobj,struct device,kobj));
436 unsigned int size = count;
437 loff_t init_off = off;
4c0619ad 438 u8 *data = (u8*) buf;
1da177e4
LT
439
440 if (off > dev->cfg_size)
441 return 0;
442 if (off + count > dev->cfg_size) {
443 size = dev->cfg_size - off;
444 count = size;
445 }
4c0619ad 446
447 if ((off & 1) && size) {
e04b0ea2 448 pci_user_write_config_byte(dev, off, data[off - init_off]);
1da177e4 449 off++;
4c0619ad 450 size--;
1da177e4 451 }
4c0619ad 452
453 if ((off & 3) && size > 2) {
454 u16 val = data[off - init_off];
455 val |= (u16) data[off - init_off + 1] << 8;
e04b0ea2 456 pci_user_write_config_word(dev, off, val);
4c0619ad 457 off += 2;
458 size -= 2;
459 }
1da177e4
LT
460
461 while (size > 3) {
4c0619ad 462 u32 val = data[off - init_off];
463 val |= (u32) data[off - init_off + 1] << 8;
464 val |= (u32) data[off - init_off + 2] << 16;
465 val |= (u32) data[off - init_off + 3] << 24;
e04b0ea2 466 pci_user_write_config_dword(dev, off, val);
1da177e4
LT
467 off += 4;
468 size -= 4;
469 }
4c0619ad 470
471 if (size >= 2) {
472 u16 val = data[off - init_off];
473 val |= (u16) data[off - init_off + 1] << 8;
e04b0ea2 474 pci_user_write_config_word(dev, off, val);
4c0619ad 475 off += 2;
476 size -= 2;
477 }
1da177e4 478
4c0619ad 479 if (size) {
e04b0ea2 480 pci_user_write_config_byte(dev, off, data[off - init_off]);
1da177e4
LT
481 off++;
482 --size;
483 }
484
485 return count;
486}
487
94e61088 488static ssize_t
287d19ce
SH
489read_vpd_attr(struct kobject *kobj, struct bin_attribute *bin_attr,
490 char *buf, loff_t off, size_t count)
94e61088
BH
491{
492 struct pci_dev *dev =
493 to_pci_dev(container_of(kobj, struct device, kobj));
94e61088
BH
494
495 if (off > bin_attr->size)
496 count = 0;
497 else if (count > bin_attr->size - off)
498 count = bin_attr->size - off;
94e61088 499
287d19ce 500 return pci_read_vpd(dev, off, count, buf);
94e61088
BH
501}
502
503static ssize_t
287d19ce
SH
504write_vpd_attr(struct kobject *kobj, struct bin_attribute *bin_attr,
505 char *buf, loff_t off, size_t count)
94e61088
BH
506{
507 struct pci_dev *dev =
508 to_pci_dev(container_of(kobj, struct device, kobj));
94e61088
BH
509
510 if (off > bin_attr->size)
511 count = 0;
512 else if (count > bin_attr->size - off)
513 count = bin_attr->size - off;
94e61088 514
287d19ce 515 return pci_write_vpd(dev, off, count, buf);
94e61088
BH
516}
517
1da177e4
LT
518#ifdef HAVE_PCI_LEGACY
519/**
520 * pci_read_legacy_io - read byte(s) from legacy I/O port space
521 * @kobj: kobject corresponding to file to read from
cffb2faf 522 * @bin_attr: struct bin_attribute for this file
1da177e4
LT
523 * @buf: buffer to store results
524 * @off: offset into legacy I/O port space
525 * @count: number of bytes to read
526 *
527 * Reads 1, 2, or 4 bytes from legacy I/O port space using an arch specific
528 * callback routine (pci_legacy_read).
529 */
f19aeb1f 530static ssize_t
91a69029
ZR
531pci_read_legacy_io(struct kobject *kobj, struct bin_attribute *bin_attr,
532 char *buf, loff_t off, size_t count)
1da177e4
LT
533{
534 struct pci_bus *bus = to_pci_bus(container_of(kobj,
fd7d1ced 535 struct device,
1da177e4
LT
536 kobj));
537
538 /* Only support 1, 2 or 4 byte accesses */
539 if (count != 1 && count != 2 && count != 4)
540 return -EINVAL;
541
542 return pci_legacy_read(bus, off, (u32 *)buf, count);
543}
544
545/**
546 * pci_write_legacy_io - write byte(s) to legacy I/O port space
547 * @kobj: kobject corresponding to file to read from
cffb2faf 548 * @bin_attr: struct bin_attribute for this file
1da177e4
LT
549 * @buf: buffer containing value to be written
550 * @off: offset into legacy I/O port space
551 * @count: number of bytes to write
552 *
553 * Writes 1, 2, or 4 bytes from legacy I/O port space using an arch specific
554 * callback routine (pci_legacy_write).
555 */
f19aeb1f 556static ssize_t
91a69029
ZR
557pci_write_legacy_io(struct kobject *kobj, struct bin_attribute *bin_attr,
558 char *buf, loff_t off, size_t count)
1da177e4
LT
559{
560 struct pci_bus *bus = to_pci_bus(container_of(kobj,
fd7d1ced 561 struct device,
1da177e4
LT
562 kobj));
563 /* Only support 1, 2 or 4 byte accesses */
564 if (count != 1 && count != 2 && count != 4)
565 return -EINVAL;
566
567 return pci_legacy_write(bus, off, *(u32 *)buf, count);
568}
569
570/**
571 * pci_mmap_legacy_mem - map legacy PCI memory into user memory space
572 * @kobj: kobject corresponding to device to be mapped
573 * @attr: struct bin_attribute for this file
574 * @vma: struct vm_area_struct passed to mmap
575 *
f19aeb1f 576 * Uses an arch specific callback, pci_mmap_legacy_mem_page_range, to mmap
1da177e4
LT
577 * legacy memory space (first meg of bus space) into application virtual
578 * memory space.
579 */
f19aeb1f 580static int
1da177e4
LT
581pci_mmap_legacy_mem(struct kobject *kobj, struct bin_attribute *attr,
582 struct vm_area_struct *vma)
583{
584 struct pci_bus *bus = to_pci_bus(container_of(kobj,
fd7d1ced 585 struct device,
1da177e4
LT
586 kobj));
587
f19aeb1f
BH
588 return pci_mmap_legacy_page_range(bus, vma, pci_mmap_mem);
589}
590
591/**
592 * pci_mmap_legacy_io - map legacy PCI IO into user memory space
593 * @kobj: kobject corresponding to device to be mapped
594 * @attr: struct bin_attribute for this file
595 * @vma: struct vm_area_struct passed to mmap
596 *
597 * Uses an arch specific callback, pci_mmap_legacy_io_page_range, to mmap
598 * legacy IO space (first meg of bus space) into application virtual
599 * memory space. Returns -ENOSYS if the operation isn't supported
600 */
601static int
602pci_mmap_legacy_io(struct kobject *kobj, struct bin_attribute *attr,
603 struct vm_area_struct *vma)
604{
605 struct pci_bus *bus = to_pci_bus(container_of(kobj,
606 struct device,
607 kobj));
608
609 return pci_mmap_legacy_page_range(bus, vma, pci_mmap_io);
610}
611
10a0ef39
IK
612/**
613 * pci_adjust_legacy_attr - adjustment of legacy file attributes
614 * @b: bus to create files under
615 * @mmap_type: I/O port or memory
616 *
617 * Stub implementation. Can be overridden by arch if necessary.
618 */
619void __weak
620pci_adjust_legacy_attr(struct pci_bus *b, enum pci_mmap_state mmap_type)
621{
622 return;
623}
624
f19aeb1f
BH
625/**
626 * pci_create_legacy_files - create legacy I/O port and memory files
627 * @b: bus to create files under
628 *
629 * Some platforms allow access to legacy I/O port and ISA memory space on
630 * a per-bus basis. This routine creates the files and ties them into
631 * their associated read, write and mmap files from pci-sysfs.c
632 *
633 * On error unwind, but don't propogate the error to the caller
634 * as it is ok to set up the PCI bus without these files.
635 */
636void pci_create_legacy_files(struct pci_bus *b)
637{
638 int error;
639
640 b->legacy_io = kzalloc(sizeof(struct bin_attribute) * 2,
641 GFP_ATOMIC);
642 if (!b->legacy_io)
643 goto kzalloc_err;
644
62e877b8 645 sysfs_bin_attr_init(b->legacy_io);
f19aeb1f
BH
646 b->legacy_io->attr.name = "legacy_io";
647 b->legacy_io->size = 0xffff;
648 b->legacy_io->attr.mode = S_IRUSR | S_IWUSR;
649 b->legacy_io->read = pci_read_legacy_io;
650 b->legacy_io->write = pci_write_legacy_io;
651 b->legacy_io->mmap = pci_mmap_legacy_io;
10a0ef39 652 pci_adjust_legacy_attr(b, pci_mmap_io);
f19aeb1f
BH
653 error = device_create_bin_file(&b->dev, b->legacy_io);
654 if (error)
655 goto legacy_io_err;
656
657 /* Allocated above after the legacy_io struct */
658 b->legacy_mem = b->legacy_io + 1;
6757eca3 659 sysfs_bin_attr_init(b->legacy_mem);
f19aeb1f
BH
660 b->legacy_mem->attr.name = "legacy_mem";
661 b->legacy_mem->size = 1024*1024;
662 b->legacy_mem->attr.mode = S_IRUSR | S_IWUSR;
663 b->legacy_mem->mmap = pci_mmap_legacy_mem;
10a0ef39 664 pci_adjust_legacy_attr(b, pci_mmap_mem);
f19aeb1f
BH
665 error = device_create_bin_file(&b->dev, b->legacy_mem);
666 if (error)
667 goto legacy_mem_err;
668
669 return;
670
671legacy_mem_err:
672 device_remove_bin_file(&b->dev, b->legacy_io);
673legacy_io_err:
674 kfree(b->legacy_io);
675 b->legacy_io = NULL;
676kzalloc_err:
677 printk(KERN_WARNING "pci: warning: could not create legacy I/O port "
678 "and ISA memory resources to sysfs\n");
679 return;
680}
681
682void pci_remove_legacy_files(struct pci_bus *b)
683{
684 if (b->legacy_io) {
685 device_remove_bin_file(&b->dev, b->legacy_io);
686 device_remove_bin_file(&b->dev, b->legacy_mem);
687 kfree(b->legacy_io); /* both are allocated here */
688 }
1da177e4
LT
689}
690#endif /* HAVE_PCI_LEGACY */
691
692#ifdef HAVE_PCI_MMAP
b5ff7df3 693
9eff02e2 694int pci_mmap_fits(struct pci_dev *pdev, int resno, struct vm_area_struct *vma)
b5ff7df3
LT
695{
696 unsigned long nr, start, size;
697
698 nr = (vma->vm_end - vma->vm_start) >> PAGE_SHIFT;
699 start = vma->vm_pgoff;
88e7df0b 700 size = ((pci_resource_len(pdev, resno) - 1) >> PAGE_SHIFT) + 1;
b5ff7df3
LT
701 if (start < size && size - start >= nr)
702 return 1;
703 WARN(1, "process \"%s\" tried to map 0x%08lx-0x%08lx on %s BAR %d (size 0x%08lx)\n",
704 current->comm, start, start+nr, pci_name(pdev), resno, size);
705 return 0;
706}
707
1da177e4
LT
708/**
709 * pci_mmap_resource - map a PCI resource into user memory space
710 * @kobj: kobject for mapping
711 * @attr: struct bin_attribute for the file being mapped
712 * @vma: struct vm_area_struct passed into the mmap
45aec1ae 713 * @write_combine: 1 for write_combine mapping
1da177e4
LT
714 *
715 * Use the regular PCI mapping routines to map a PCI resource into userspace.
1da177e4
LT
716 */
717static int
718pci_mmap_resource(struct kobject *kobj, struct bin_attribute *attr,
45aec1ae 719 struct vm_area_struct *vma, int write_combine)
1da177e4
LT
720{
721 struct pci_dev *pdev = to_pci_dev(container_of(kobj,
722 struct device, kobj));
723 struct resource *res = (struct resource *)attr->private;
724 enum pci_mmap_state mmap_type;
e31dd6e4 725 resource_size_t start, end;
2311b1f2 726 int i;
1da177e4 727
2311b1f2
ME
728 for (i = 0; i < PCI_ROM_RESOURCE; i++)
729 if (res == &pdev->resource[i])
730 break;
731 if (i >= PCI_ROM_RESOURCE)
732 return -ENODEV;
733
b5ff7df3
LT
734 if (!pci_mmap_fits(pdev, i, vma))
735 return -EINVAL;
736
2311b1f2
ME
737 /* pci_mmap_page_range() expects the same kind of entry as coming
738 * from /proc/bus/pci/ which is a "user visible" value. If this is
739 * different from the resource itself, arch will do necessary fixup.
740 */
741 pci_resource_to_user(pdev, i, res, &start, &end);
742 vma->vm_pgoff += start >> PAGE_SHIFT;
1da177e4
LT
743 mmap_type = res->flags & IORESOURCE_MEM ? pci_mmap_mem : pci_mmap_io;
744
e8de1481
AV
745 if (res->flags & IORESOURCE_MEM && iomem_is_exclusive(start))
746 return -EINVAL;
747
45aec1ae 748 return pci_mmap_page_range(pdev, vma, mmap_type, write_combine);
749}
750
751static int
752pci_mmap_resource_uc(struct kobject *kobj, struct bin_attribute *attr,
753 struct vm_area_struct *vma)
754{
755 return pci_mmap_resource(kobj, attr, vma, 0);
756}
757
758static int
759pci_mmap_resource_wc(struct kobject *kobj, struct bin_attribute *attr,
760 struct vm_area_struct *vma)
761{
762 return pci_mmap_resource(kobj, attr, vma, 1);
1da177e4
LT
763}
764
b19441af
GKH
765/**
766 * pci_remove_resource_files - cleanup resource files
cffb2faf 767 * @pdev: dev to cleanup
b19441af 768 *
cffb2faf 769 * If we created resource files for @pdev, remove them from sysfs and
b19441af
GKH
770 * free their resources.
771 */
772static void
773pci_remove_resource_files(struct pci_dev *pdev)
774{
775 int i;
776
777 for (i = 0; i < PCI_ROM_RESOURCE; i++) {
778 struct bin_attribute *res_attr;
779
780 res_attr = pdev->res_attr[i];
781 if (res_attr) {
782 sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
783 kfree(res_attr);
784 }
45aec1ae 785
786 res_attr = pdev->res_attr_wc[i];
787 if (res_attr) {
788 sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
789 kfree(res_attr);
790 }
b19441af
GKH
791 }
792}
793
45aec1ae 794static int pci_create_attr(struct pci_dev *pdev, int num, int write_combine)
795{
796 /* allocate attribute structure, piggyback attribute name */
797 int name_len = write_combine ? 13 : 10;
798 struct bin_attribute *res_attr;
799 int retval;
800
801 res_attr = kzalloc(sizeof(*res_attr) + name_len, GFP_ATOMIC);
802 if (res_attr) {
803 char *res_attr_name = (char *)(res_attr + 1);
804
a07e4156 805 sysfs_bin_attr_init(res_attr);
45aec1ae 806 if (write_combine) {
807 pdev->res_attr_wc[num] = res_attr;
808 sprintf(res_attr_name, "resource%d_wc", num);
809 res_attr->mmap = pci_mmap_resource_wc;
810 } else {
811 pdev->res_attr[num] = res_attr;
812 sprintf(res_attr_name, "resource%d", num);
813 res_attr->mmap = pci_mmap_resource_uc;
814 }
815 res_attr->attr.name = res_attr_name;
816 res_attr->attr.mode = S_IRUSR | S_IWUSR;
817 res_attr->size = pci_resource_len(pdev, num);
818 res_attr->private = &pdev->resource[num];
819 retval = sysfs_create_bin_file(&pdev->dev.kobj, res_attr);
820 } else
821 retval = -ENOMEM;
822
823 return retval;
824}
825
1da177e4
LT
826/**
827 * pci_create_resource_files - create resource files in sysfs for @dev
cffb2faf 828 * @pdev: dev in question
1da177e4 829 *
cffb2faf 830 * Walk the resources in @pdev creating files for each resource available.
1da177e4 831 */
b19441af 832static int pci_create_resource_files(struct pci_dev *pdev)
1da177e4
LT
833{
834 int i;
b19441af 835 int retval;
1da177e4
LT
836
837 /* Expose the PCI resources from this device as files */
838 for (i = 0; i < PCI_ROM_RESOURCE; i++) {
1da177e4
LT
839
840 /* skip empty resources */
841 if (!pci_resource_len(pdev, i))
842 continue;
843
45aec1ae 844 retval = pci_create_attr(pdev, i, 0);
845 /* for prefetchable resources, create a WC mappable file */
846 if (!retval && pdev->resource[i].flags & IORESOURCE_PREFETCH)
847 retval = pci_create_attr(pdev, i, 1);
848
849 if (retval) {
850 pci_remove_resource_files(pdev);
851 return retval;
1da177e4
LT
852 }
853 }
b19441af 854 return 0;
1da177e4
LT
855}
856#else /* !HAVE_PCI_MMAP */
10a0ef39
IK
857int __weak pci_create_resource_files(struct pci_dev *dev) { return 0; }
858void __weak pci_remove_resource_files(struct pci_dev *dev) { return; }
1da177e4
LT
859#endif /* HAVE_PCI_MMAP */
860
861/**
862 * pci_write_rom - used to enable access to the PCI ROM display
863 * @kobj: kernel object handle
cffb2faf 864 * @bin_attr: struct bin_attribute for this file
1da177e4
LT
865 * @buf: user input
866 * @off: file offset
867 * @count: number of byte in input
868 *
869 * writing anything except 0 enables it
870 */
871static ssize_t
91a69029
ZR
872pci_write_rom(struct kobject *kobj, struct bin_attribute *bin_attr,
873 char *buf, loff_t off, size_t count)
1da177e4
LT
874{
875 struct pci_dev *pdev = to_pci_dev(container_of(kobj, struct device, kobj));
876
877 if ((off == 0) && (*buf == '0') && (count == 2))
878 pdev->rom_attr_enabled = 0;
879 else
880 pdev->rom_attr_enabled = 1;
881
882 return count;
883}
884
885/**
886 * pci_read_rom - read a PCI ROM
887 * @kobj: kernel object handle
cffb2faf 888 * @bin_attr: struct bin_attribute for this file
1da177e4
LT
889 * @buf: where to put the data we read from the ROM
890 * @off: file offset
891 * @count: number of bytes to read
892 *
893 * Put @count bytes starting at @off into @buf from the ROM in the PCI
894 * device corresponding to @kobj.
895 */
896static ssize_t
91a69029
ZR
897pci_read_rom(struct kobject *kobj, struct bin_attribute *bin_attr,
898 char *buf, loff_t off, size_t count)
1da177e4
LT
899{
900 struct pci_dev *pdev = to_pci_dev(container_of(kobj, struct device, kobj));
901 void __iomem *rom;
902 size_t size;
903
904 if (!pdev->rom_attr_enabled)
905 return -EINVAL;
906
907 rom = pci_map_rom(pdev, &size); /* size starts out as PCI window size */
97c44836
TN
908 if (!rom || !size)
909 return -EIO;
1da177e4
LT
910
911 if (off >= size)
912 count = 0;
913 else {
914 if (off + count > size)
915 count = size - off;
916
917 memcpy_fromio(buf, rom + off, count);
918 }
919 pci_unmap_rom(pdev, rom);
920
921 return count;
922}
923
924static struct bin_attribute pci_config_attr = {
925 .attr = {
926 .name = "config",
927 .mode = S_IRUGO | S_IWUSR,
1da177e4 928 },
557848c3 929 .size = PCI_CFG_SPACE_SIZE,
1da177e4
LT
930 .read = pci_read_config,
931 .write = pci_write_config,
932};
933
934static struct bin_attribute pcie_config_attr = {
935 .attr = {
936 .name = "config",
937 .mode = S_IRUGO | S_IWUSR,
1da177e4 938 },
557848c3 939 .size = PCI_CFG_SPACE_EXP_SIZE,
1da177e4
LT
940 .read = pci_read_config,
941 .write = pci_write_config,
942};
943
a2cd52ca 944int __attribute__ ((weak)) pcibios_add_platform_entries(struct pci_dev *dev)
575e3348 945{
a2cd52ca 946 return 0;
575e3348
ME
947}
948
711d5779
MT
949static ssize_t reset_store(struct device *dev,
950 struct device_attribute *attr, const char *buf,
951 size_t count)
952{
953 struct pci_dev *pdev = to_pci_dev(dev);
954 unsigned long val;
955 ssize_t result = strict_strtoul(buf, 0, &val);
956
957 if (result < 0)
958 return result;
959
960 if (val != 1)
961 return -EINVAL;
962 return pci_reset_function(pdev);
963}
964
965static struct device_attribute reset_attr = __ATTR(reset, 0200, NULL, reset_store);
966
280c73d3
ZY
967static int pci_create_capabilities_sysfs(struct pci_dev *dev)
968{
969 int retval;
970 struct bin_attribute *attr;
971
972 /* If the device has VPD, try to expose it in sysfs. */
973 if (dev->vpd) {
974 attr = kzalloc(sizeof(*attr), GFP_ATOMIC);
975 if (!attr)
976 return -ENOMEM;
977
a07e4156 978 sysfs_bin_attr_init(attr);
280c73d3
ZY
979 attr->size = dev->vpd->len;
980 attr->attr.name = "vpd";
981 attr->attr.mode = S_IRUSR | S_IWUSR;
287d19ce
SH
982 attr->read = read_vpd_attr;
983 attr->write = write_vpd_attr;
280c73d3
ZY
984 retval = sysfs_create_bin_file(&dev->dev.kobj, attr);
985 if (retval) {
986 kfree(dev->vpd->attr);
987 return retval;
988 }
989 dev->vpd->attr = attr;
990 }
991
992 /* Active State Power Management */
993 pcie_aspm_create_sysfs_dev_files(dev);
994
711d5779
MT
995 if (!pci_probe_reset_function(dev)) {
996 retval = device_create_file(&dev->dev, &reset_attr);
997 if (retval)
998 goto error;
999 dev->reset_fn = 1;
1000 }
280c73d3 1001 return 0;
711d5779
MT
1002
1003error:
1004 pcie_aspm_remove_sysfs_dev_files(dev);
1005 if (dev->vpd && dev->vpd->attr) {
1006 sysfs_remove_bin_file(&dev->dev.kobj, dev->vpd->attr);
1007 kfree(dev->vpd->attr);
1008 }
1009
1010 return retval;
280c73d3
ZY
1011}
1012
b19441af 1013int __must_check pci_create_sysfs_dev_files (struct pci_dev *pdev)
1da177e4 1014{
b19441af 1015 int retval;
280c73d3
ZY
1016 int rom_size = 0;
1017 struct bin_attribute *attr;
b19441af 1018
1da177e4
LT
1019 if (!sysfs_initialized)
1020 return -EACCES;
1021
557848c3 1022 if (pdev->cfg_size < PCI_CFG_SPACE_EXP_SIZE)
b19441af 1023 retval = sysfs_create_bin_file(&pdev->dev.kobj, &pci_config_attr);
1da177e4 1024 else
b19441af
GKH
1025 retval = sysfs_create_bin_file(&pdev->dev.kobj, &pcie_config_attr);
1026 if (retval)
1027 goto err;
1da177e4 1028
b19441af
GKH
1029 retval = pci_create_resource_files(pdev);
1030 if (retval)
280c73d3
ZY
1031 goto err_config_file;
1032
1033 if (pci_resource_len(pdev, PCI_ROM_RESOURCE))
1034 rom_size = pci_resource_len(pdev, PCI_ROM_RESOURCE);
1035 else if (pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW)
1036 rom_size = 0x20000;
1da177e4
LT
1037
1038 /* If the device has a ROM, try to expose it in sysfs. */
280c73d3 1039 if (rom_size) {
94e61088 1040 attr = kzalloc(sizeof(*attr), GFP_ATOMIC);
280c73d3 1041 if (!attr) {
b19441af 1042 retval = -ENOMEM;
9890b12a 1043 goto err_resource_files;
1da177e4 1044 }
a07e4156 1045 sysfs_bin_attr_init(attr);
280c73d3
ZY
1046 attr->size = rom_size;
1047 attr->attr.name = "rom";
1048 attr->attr.mode = S_IRUSR;
1049 attr->read = pci_read_rom;
1050 attr->write = pci_write_rom;
1051 retval = sysfs_create_bin_file(&pdev->dev.kobj, attr);
1052 if (retval) {
1053 kfree(attr);
1054 goto err_resource_files;
1055 }
1056 pdev->rom_attr = attr;
1da177e4 1057 }
280c73d3 1058
217f45de
DA
1059 if ((pdev->class >> 8) == PCI_CLASS_DISPLAY_VGA) {
1060 retval = device_create_file(&pdev->dev, &vga_attr);
1061 if (retval)
1062 goto err_rom_file;
1063 }
1064
1da177e4 1065 /* add platform-specific attributes */
280c73d3
ZY
1066 retval = pcibios_add_platform_entries(pdev);
1067 if (retval)
217f45de 1068 goto err_vga_file;
b19441af 1069
280c73d3
ZY
1070 /* add sysfs entries for various capabilities */
1071 retval = pci_create_capabilities_sysfs(pdev);
1072 if (retval)
217f45de 1073 goto err_vga_file;
7d715a6c 1074
1da177e4 1075 return 0;
b19441af 1076
217f45de
DA
1077err_vga_file:
1078 if ((pdev->class >> 8) == PCI_CLASS_DISPLAY_VGA)
1079 device_remove_file(&pdev->dev, &vga_attr);
a2cd52ca 1080err_rom_file:
280c73d3 1081 if (rom_size) {
94e61088 1082 sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr);
280c73d3
ZY
1083 kfree(pdev->rom_attr);
1084 pdev->rom_attr = NULL;
1085 }
9890b12a
ME
1086err_resource_files:
1087 pci_remove_resource_files(pdev);
94e61088 1088err_config_file:
557848c3 1089 if (pdev->cfg_size < PCI_CFG_SPACE_EXP_SIZE)
b19441af
GKH
1090 sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr);
1091 else
1092 sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr);
1093err:
1094 return retval;
1da177e4
LT
1095}
1096
280c73d3
ZY
1097static void pci_remove_capabilities_sysfs(struct pci_dev *dev)
1098{
1099 if (dev->vpd && dev->vpd->attr) {
1100 sysfs_remove_bin_file(&dev->dev.kobj, dev->vpd->attr);
1101 kfree(dev->vpd->attr);
1102 }
1103
1104 pcie_aspm_remove_sysfs_dev_files(dev);
711d5779
MT
1105 if (dev->reset_fn) {
1106 device_remove_file(&dev->dev, &reset_attr);
1107 dev->reset_fn = 0;
1108 }
280c73d3
ZY
1109}
1110
1da177e4
LT
1111/**
1112 * pci_remove_sysfs_dev_files - cleanup PCI specific sysfs files
1113 * @pdev: device whose entries we should free
1114 *
1115 * Cleanup when @pdev is removed from sysfs.
1116 */
1117void pci_remove_sysfs_dev_files(struct pci_dev *pdev)
1118{
280c73d3
ZY
1119 int rom_size = 0;
1120
d67afe5e
DM
1121 if (!sysfs_initialized)
1122 return;
1123
280c73d3 1124 pci_remove_capabilities_sysfs(pdev);
7d715a6c 1125
557848c3 1126 if (pdev->cfg_size < PCI_CFG_SPACE_EXP_SIZE)
1da177e4
LT
1127 sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr);
1128 else
1129 sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr);
1130
1131 pci_remove_resource_files(pdev);
1132
280c73d3
ZY
1133 if (pci_resource_len(pdev, PCI_ROM_RESOURCE))
1134 rom_size = pci_resource_len(pdev, PCI_ROM_RESOURCE);
1135 else if (pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW)
1136 rom_size = 0x20000;
1137
1138 if (rom_size && pdev->rom_attr) {
1139 sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr);
1140 kfree(pdev->rom_attr);
1da177e4
LT
1141 }
1142}
1143
1144static int __init pci_sysfs_init(void)
1145{
1146 struct pci_dev *pdev = NULL;
b19441af
GKH
1147 int retval;
1148
1da177e4 1149 sysfs_initialized = 1;
b19441af
GKH
1150 for_each_pci_dev(pdev) {
1151 retval = pci_create_sysfs_dev_files(pdev);
151fc5df
JL
1152 if (retval) {
1153 pci_dev_put(pdev);
b19441af 1154 return retval;
151fc5df 1155 }
b19441af 1156 }
1da177e4
LT
1157
1158 return 0;
1159}
1160
40ee9e9f 1161late_initcall(pci_sysfs_init);