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b668f2f5 MC |
1 | // SPDX-License-Identifier: GPL-2.0 |
2 | /* | |
3 | * Copyright (c) 2015 Intel Corporation | |
4 | * Keith Busch <kbusch@kernel.org> | |
5 | */ | |
6 | #include <linux/blkdev.h> | |
7 | #include <linux/pr.h> | |
8 | #include <asm/unaligned.h> | |
9 | ||
10 | #include "nvme.h" | |
11 | ||
be1a7cd2 | 12 | static enum nvme_pr_type nvme_pr_type_from_blk(enum pr_type type) |
b668f2f5 MC |
13 | { |
14 | switch (type) { | |
15 | case PR_WRITE_EXCLUSIVE: | |
be1a7cd2 | 16 | return NVME_PR_WRITE_EXCLUSIVE; |
b668f2f5 | 17 | case PR_EXCLUSIVE_ACCESS: |
be1a7cd2 | 18 | return NVME_PR_EXCLUSIVE_ACCESS; |
b668f2f5 | 19 | case PR_WRITE_EXCLUSIVE_REG_ONLY: |
be1a7cd2 | 20 | return NVME_PR_WRITE_EXCLUSIVE_REG_ONLY; |
b668f2f5 | 21 | case PR_EXCLUSIVE_ACCESS_REG_ONLY: |
be1a7cd2 | 22 | return NVME_PR_EXCLUSIVE_ACCESS_REG_ONLY; |
b668f2f5 | 23 | case PR_WRITE_EXCLUSIVE_ALL_REGS: |
be1a7cd2 | 24 | return NVME_PR_WRITE_EXCLUSIVE_ALL_REGS; |
b668f2f5 | 25 | case PR_EXCLUSIVE_ACCESS_ALL_REGS: |
be1a7cd2 | 26 | return NVME_PR_EXCLUSIVE_ACCESS_ALL_REGS; |
b668f2f5 | 27 | } |
be1a7cd2 MC |
28 | |
29 | return 0; | |
b668f2f5 MC |
30 | } |
31 | ||
28c97ba3 MC |
32 | static enum pr_type block_pr_type_from_nvme(enum nvme_pr_type type) |
33 | { | |
34 | switch (type) { | |
35 | case NVME_PR_WRITE_EXCLUSIVE: | |
36 | return PR_WRITE_EXCLUSIVE; | |
37 | case NVME_PR_EXCLUSIVE_ACCESS: | |
38 | return PR_EXCLUSIVE_ACCESS; | |
39 | case NVME_PR_WRITE_EXCLUSIVE_REG_ONLY: | |
40 | return PR_WRITE_EXCLUSIVE_REG_ONLY; | |
41 | case NVME_PR_EXCLUSIVE_ACCESS_REG_ONLY: | |
42 | return PR_EXCLUSIVE_ACCESS_REG_ONLY; | |
43 | case NVME_PR_WRITE_EXCLUSIVE_ALL_REGS: | |
44 | return PR_WRITE_EXCLUSIVE_ALL_REGS; | |
45 | case NVME_PR_EXCLUSIVE_ACCESS_ALL_REGS: | |
46 | return PR_EXCLUSIVE_ACCESS_ALL_REGS; | |
47 | } | |
48 | ||
49 | return 0; | |
50 | } | |
51 | ||
b668f2f5 | 52 | static int nvme_send_ns_head_pr_command(struct block_device *bdev, |
f0614790 | 53 | struct nvme_command *c, void *data, unsigned int data_len) |
b668f2f5 MC |
54 | { |
55 | struct nvme_ns_head *head = bdev->bd_disk->private_data; | |
56 | int srcu_idx = srcu_read_lock(&head->srcu); | |
57 | struct nvme_ns *ns = nvme_find_path(head); | |
58 | int ret = -EWOULDBLOCK; | |
59 | ||
60 | if (ns) { | |
61 | c->common.nsid = cpu_to_le32(ns->head->ns_id); | |
62 | ret = nvme_submit_sync_cmd(ns->queue, c, data, data_len); | |
63 | } | |
64 | srcu_read_unlock(&head->srcu, srcu_idx); | |
65 | return ret; | |
66 | } | |
67 | ||
68 | static int nvme_send_ns_pr_command(struct nvme_ns *ns, struct nvme_command *c, | |
f0614790 | 69 | void *data, unsigned int data_len) |
b668f2f5 MC |
70 | { |
71 | c->common.nsid = cpu_to_le32(ns->head->ns_id); | |
72 | return nvme_submit_sync_cmd(ns->queue, c, data, data_len); | |
73 | } | |
74 | ||
75 | static int nvme_sc_to_pr_err(int nvme_sc) | |
76 | { | |
77 | if (nvme_is_path_error(nvme_sc)) | |
78 | return PR_STS_PATH_FAILED; | |
79 | ||
80 | switch (nvme_sc) { | |
81 | case NVME_SC_SUCCESS: | |
82 | return PR_STS_SUCCESS; | |
83 | case NVME_SC_RESERVATION_CONFLICT: | |
84 | return PR_STS_RESERVATION_CONFLICT; | |
85 | case NVME_SC_ONCS_NOT_SUPPORTED: | |
86 | return -EOPNOTSUPP; | |
87 | case NVME_SC_BAD_ATTRIBUTES: | |
88 | case NVME_SC_INVALID_OPCODE: | |
89 | case NVME_SC_INVALID_FIELD: | |
90 | case NVME_SC_INVALID_NS: | |
91 | return -EINVAL; | |
92 | default: | |
93 | return PR_STS_IOERR; | |
94 | } | |
95 | } | |
96 | ||
f0614790 MC |
97 | static int nvme_send_pr_command(struct block_device *bdev, |
98 | struct nvme_command *c, void *data, unsigned int data_len) | |
99 | { | |
dcad6f5f | 100 | if (nvme_disk_is_ns_head(bdev->bd_disk)) |
f0614790 MC |
101 | return nvme_send_ns_head_pr_command(bdev, c, data, data_len); |
102 | ||
103 | return nvme_send_ns_pr_command(bdev->bd_disk->private_data, c, data, | |
104 | data_len); | |
105 | } | |
106 | ||
b668f2f5 MC |
107 | static int nvme_pr_command(struct block_device *bdev, u32 cdw10, |
108 | u64 key, u64 sa_key, u8 op) | |
109 | { | |
110 | struct nvme_command c = { }; | |
111 | u8 data[16] = { 0, }; | |
112 | int ret; | |
113 | ||
114 | put_unaligned_le64(key, &data[0]); | |
115 | put_unaligned_le64(sa_key, &data[8]); | |
116 | ||
117 | c.common.opcode = op; | |
118 | c.common.cdw10 = cpu_to_le32(cdw10); | |
119 | ||
f0614790 | 120 | ret = nvme_send_pr_command(bdev, &c, data, sizeof(data)); |
b668f2f5 MC |
121 | if (ret < 0) |
122 | return ret; | |
123 | ||
124 | return nvme_sc_to_pr_err(ret); | |
125 | } | |
126 | ||
127 | static int nvme_pr_register(struct block_device *bdev, u64 old, | |
128 | u64 new, unsigned flags) | |
129 | { | |
130 | u32 cdw10; | |
131 | ||
132 | if (flags & ~PR_FL_IGNORE_KEY) | |
133 | return -EOPNOTSUPP; | |
134 | ||
135 | cdw10 = old ? 2 : 0; | |
136 | cdw10 |= (flags & PR_FL_IGNORE_KEY) ? 1 << 3 : 0; | |
137 | cdw10 |= (1 << 30) | (1 << 31); /* PTPL=1 */ | |
138 | return nvme_pr_command(bdev, cdw10, old, new, nvme_cmd_resv_register); | |
139 | } | |
140 | ||
141 | static int nvme_pr_reserve(struct block_device *bdev, u64 key, | |
142 | enum pr_type type, unsigned flags) | |
143 | { | |
144 | u32 cdw10; | |
145 | ||
146 | if (flags & ~PR_FL_IGNORE_KEY) | |
147 | return -EOPNOTSUPP; | |
148 | ||
be1a7cd2 | 149 | cdw10 = nvme_pr_type_from_blk(type) << 8; |
b668f2f5 MC |
150 | cdw10 |= ((flags & PR_FL_IGNORE_KEY) ? 1 << 3 : 0); |
151 | return nvme_pr_command(bdev, cdw10, key, 0, nvme_cmd_resv_acquire); | |
152 | } | |
153 | ||
154 | static int nvme_pr_preempt(struct block_device *bdev, u64 old, u64 new, | |
155 | enum pr_type type, bool abort) | |
156 | { | |
be1a7cd2 | 157 | u32 cdw10 = nvme_pr_type_from_blk(type) << 8 | (abort ? 2 : 1); |
b668f2f5 MC |
158 | |
159 | return nvme_pr_command(bdev, cdw10, old, new, nvme_cmd_resv_acquire); | |
160 | } | |
161 | ||
162 | static int nvme_pr_clear(struct block_device *bdev, u64 key) | |
163 | { | |
164 | u32 cdw10 = 1 | (key ? 0 : 1 << 3); | |
165 | ||
166 | return nvme_pr_command(bdev, cdw10, key, 0, nvme_cmd_resv_release); | |
167 | } | |
168 | ||
169 | static int nvme_pr_release(struct block_device *bdev, u64 key, enum pr_type type) | |
170 | { | |
be1a7cd2 | 171 | u32 cdw10 = nvme_pr_type_from_blk(type) << 8 | (key ? 0 : 1 << 3); |
b668f2f5 MC |
172 | |
173 | return nvme_pr_command(bdev, cdw10, key, 0, nvme_cmd_resv_release); | |
174 | } | |
175 | ||
5fd96a4e MC |
176 | static int nvme_pr_resv_report(struct block_device *bdev, void *data, |
177 | u32 data_len, bool *eds) | |
178 | { | |
179 | struct nvme_command c = { }; | |
180 | int ret; | |
181 | ||
182 | c.common.opcode = nvme_cmd_resv_report; | |
183 | c.common.cdw10 = cpu_to_le32(nvme_bytes_to_numd(data_len)); | |
184 | c.common.cdw11 = cpu_to_le32(NVME_EXTENDED_DATA_STRUCT); | |
185 | *eds = true; | |
186 | ||
187 | retry: | |
188 | ret = nvme_send_pr_command(bdev, &c, data, data_len); | |
189 | if (ret == NVME_SC_HOST_ID_INCONSIST && | |
190 | c.common.cdw11 == cpu_to_le32(NVME_EXTENDED_DATA_STRUCT)) { | |
191 | c.common.cdw11 = 0; | |
192 | *eds = false; | |
193 | goto retry; | |
194 | } | |
195 | ||
196 | if (ret < 0) | |
197 | return ret; | |
198 | ||
199 | return nvme_sc_to_pr_err(ret); | |
200 | } | |
201 | ||
202 | static int nvme_pr_read_keys(struct block_device *bdev, | |
203 | struct pr_keys *keys_info) | |
204 | { | |
205 | u32 rse_len, num_keys = keys_info->num_keys; | |
206 | struct nvme_reservation_status_ext *rse; | |
207 | int ret, i; | |
208 | bool eds; | |
209 | ||
210 | /* | |
211 | * Assume we are using 128-bit host IDs and allocate a buffer large | |
212 | * enough to get enough keys to fill the return keys buffer. | |
213 | */ | |
214 | rse_len = struct_size(rse, regctl_eds, num_keys); | |
215 | rse = kzalloc(rse_len, GFP_KERNEL); | |
216 | if (!rse) | |
217 | return -ENOMEM; | |
218 | ||
219 | ret = nvme_pr_resv_report(bdev, rse, rse_len, &eds); | |
220 | if (ret) | |
221 | goto free_rse; | |
222 | ||
223 | keys_info->generation = le32_to_cpu(rse->gen); | |
224 | keys_info->num_keys = get_unaligned_le16(&rse->regctl); | |
225 | ||
226 | num_keys = min(num_keys, keys_info->num_keys); | |
227 | for (i = 0; i < num_keys; i++) { | |
228 | if (eds) { | |
229 | keys_info->keys[i] = | |
230 | le64_to_cpu(rse->regctl_eds[i].rkey); | |
231 | } else { | |
232 | struct nvme_reservation_status *rs; | |
233 | ||
234 | rs = (struct nvme_reservation_status *)rse; | |
235 | keys_info->keys[i] = le64_to_cpu(rs->regctl_ds[i].rkey); | |
236 | } | |
237 | } | |
238 | ||
239 | free_rse: | |
240 | kfree(rse); | |
241 | return ret; | |
242 | } | |
243 | ||
28c97ba3 MC |
244 | static int nvme_pr_read_reservation(struct block_device *bdev, |
245 | struct pr_held_reservation *resv) | |
246 | { | |
247 | struct nvme_reservation_status_ext tmp_rse, *rse; | |
248 | int ret, i, num_regs; | |
249 | u32 rse_len; | |
250 | bool eds; | |
251 | ||
252 | get_num_regs: | |
253 | /* | |
254 | * Get the number of registrations so we know how big to allocate | |
255 | * the response buffer. | |
256 | */ | |
257 | ret = nvme_pr_resv_report(bdev, &tmp_rse, sizeof(tmp_rse), &eds); | |
258 | if (ret) | |
259 | return ret; | |
260 | ||
261 | num_regs = get_unaligned_le16(&tmp_rse.regctl); | |
262 | if (!num_regs) { | |
263 | resv->generation = le32_to_cpu(tmp_rse.gen); | |
264 | return 0; | |
265 | } | |
266 | ||
267 | rse_len = struct_size(rse, regctl_eds, num_regs); | |
268 | rse = kzalloc(rse_len, GFP_KERNEL); | |
269 | if (!rse) | |
270 | return -ENOMEM; | |
271 | ||
272 | ret = nvme_pr_resv_report(bdev, rse, rse_len, &eds); | |
273 | if (ret) | |
274 | goto free_rse; | |
275 | ||
276 | if (num_regs != get_unaligned_le16(&rse->regctl)) { | |
277 | kfree(rse); | |
278 | goto get_num_regs; | |
279 | } | |
280 | ||
281 | resv->generation = le32_to_cpu(rse->gen); | |
282 | resv->type = block_pr_type_from_nvme(rse->rtype); | |
283 | ||
284 | for (i = 0; i < num_regs; i++) { | |
285 | if (eds) { | |
286 | if (rse->regctl_eds[i].rcsts) { | |
287 | resv->key = le64_to_cpu(rse->regctl_eds[i].rkey); | |
288 | break; | |
289 | } | |
290 | } else { | |
291 | struct nvme_reservation_status *rs; | |
292 | ||
293 | rs = (struct nvme_reservation_status *)rse; | |
294 | if (rs->regctl_ds[i].rcsts) { | |
295 | resv->key = le64_to_cpu(rs->regctl_ds[i].rkey); | |
296 | break; | |
297 | } | |
298 | } | |
299 | } | |
300 | ||
301 | free_rse: | |
302 | kfree(rse); | |
303 | return ret; | |
304 | } | |
305 | ||
b668f2f5 MC |
306 | const struct pr_ops nvme_pr_ops = { |
307 | .pr_register = nvme_pr_register, | |
308 | .pr_reserve = nvme_pr_reserve, | |
309 | .pr_release = nvme_pr_release, | |
310 | .pr_preempt = nvme_pr_preempt, | |
311 | .pr_clear = nvme_pr_clear, | |
5fd96a4e | 312 | .pr_read_keys = nvme_pr_read_keys, |
28c97ba3 | 313 | .pr_read_reservation = nvme_pr_read_reservation, |
b668f2f5 | 314 | }; |