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Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
[linux-2.6-block.git] / drivers / nvme / host / core.c
CommitLineData
21d34711
CH		 1/*
2 * NVM Express device driver
3 * Copyright (c) 2011-2014, Intel Corporation.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License,
7 * version 2, as published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 */
14
15#include <linux/blkdev.h>
16#include <linux/blk-mq.h>
5fd4ce1b 17#include <linux/delay.h>
21d34711 18#include <linux/errno.h>
1673f1f0 19#include <linux/hdreg.h>
21d34711 20#include <linux/kernel.h>
5bae7f73
CH		 21#include <linux/module.h>
22#include <linux/list_sort.h>
21d34711
CH		 23#include <linux/slab.h>
24#include <linux/types.h>
1673f1f0
CH		 25#include <linux/pr.h>
26#include <linux/ptrace.h>
27#include <linux/nvme_ioctl.h>
28#include <linux/t10-pi.h>
29#include <scsi/sg.h>
30#include <asm/unaligned.h>
21d34711
CH		 31
32#include "nvme.h"
038bd4cb 33#include "fabrics.h"
21d34711 34
f3ca80fc
CH		 35#define NVME_MINORS (1U << MINORBITS)
36
ba0ba7d3
ML		 37unsigned char admin_timeout = 60;
38module_param(admin_timeout, byte, 0644);
39MODULE_PARM_DESC(admin_timeout, "timeout in seconds for admin commands");
576d55d6 40EXPORT_SYMBOL_GPL(admin_timeout);
ba0ba7d3
ML		 41
42unsigned char nvme_io_timeout = 30;
43module_param_named(io_timeout, nvme_io_timeout, byte, 0644);
44MODULE_PARM_DESC(io_timeout, "timeout in seconds for I/O");
576d55d6 45EXPORT_SYMBOL_GPL(nvme_io_timeout);
ba0ba7d3
ML		 46
47unsigned char shutdown_timeout = 5;
48module_param(shutdown_timeout, byte, 0644);
49MODULE_PARM_DESC(shutdown_timeout, "timeout in seconds for controller shutdown");
50
f80ec966
KB		 51unsigned int nvme_max_retries = 5;
52module_param_named(max_retries, nvme_max_retries, uint, 0644);
53MODULE_PARM_DESC(max_retries, "max number of retries a command may have");
54EXPORT_SYMBOL_GPL(nvme_max_retries);
5bae7f73 55
f3ca80fc
CH		 56static int nvme_char_major;
57module_param(nvme_char_major, int, 0);
58
59static LIST_HEAD(nvme_ctrl_list);
9f2482b9 60static DEFINE_SPINLOCK(dev_list_lock);
1673f1f0 61
f3ca80fc
CH		 62static struct class *nvme_class;
63
c55a2fd4
ML		 64void nvme_cancel_request(struct request *req, void *data, bool reserved)
65{
66 int status;
67
68 if (!blk_mq_request_started(req))
69 return;
70
71 dev_dbg_ratelimited(((struct nvme_ctrl *) data)->device,
72 "Cancelling I/O %d", req->tag);
73
74 status = NVME_SC_ABORT_REQ;
75 if (blk_queue_dying(req->q))
76 status |= NVME_SC_DNR;
77 blk_mq_complete_request(req, status);
78}
79EXPORT_SYMBOL_GPL(nvme_cancel_request);
80
bb8d261e
CH		 81bool nvme_change_ctrl_state(struct nvme_ctrl *ctrl,
82 enum nvme_ctrl_state new_state)
83{
f6b6a28e 84 enum nvme_ctrl_state old_state;
bb8d261e
CH		 85 bool changed = false;
86
87 spin_lock_irq(&ctrl->lock);
f6b6a28e
GKB		 88
89 old_state = ctrl->state;
bb8d261e
CH		 90 switch (new_state) {
91 case NVME_CTRL_LIVE:
92 switch (old_state) {
7d2e8008 93 case NVME_CTRL_NEW:
bb8d261e 94 case NVME_CTRL_RESETTING:
def61eca 95 case NVME_CTRL_RECONNECTING:
bb8d261e
CH		 96 changed = true;
97 /* FALLTHRU */
98 default:
99 break;
100 }
101 break;
102 case NVME_CTRL_RESETTING:
103 switch (old_state) {
104 case NVME_CTRL_NEW:
def61eca
CH		 105 case NVME_CTRL_LIVE:
106 case NVME_CTRL_RECONNECTING:
107 changed = true;
108 /* FALLTHRU */
109 default:
110 break;
111 }
112 break;
113 case NVME_CTRL_RECONNECTING:
114 switch (old_state) {
bb8d261e
CH		 115 case NVME_CTRL_LIVE:
116 changed = true;
117 /* FALLTHRU */
118 default:
119 break;
120 }
121 break;
122 case NVME_CTRL_DELETING:
123 switch (old_state) {
124 case NVME_CTRL_LIVE:
125 case NVME_CTRL_RESETTING:
def61eca 126 case NVME_CTRL_RECONNECTING:
bb8d261e
CH		 127 changed = true;
128 /* FALLTHRU */
129 default:
130 break;
131 }
132 break;
0ff9d4e1
KB		 133 case NVME_CTRL_DEAD:
134 switch (old_state) {
135 case NVME_CTRL_DELETING:
136 changed = true;
137 /* FALLTHRU */
138 default:
139 break;
140 }
141 break;
bb8d261e
CH		 142 default:
143 break;
144 }
bb8d261e
CH		 145
146 if (changed)
147 ctrl->state = new_state;
148
f6b6a28e
GKB		 149 spin_unlock_irq(&ctrl->lock);
150
bb8d261e
CH		 151 return changed;
152}
153EXPORT_SYMBOL_GPL(nvme_change_ctrl_state);
154
1673f1f0
CH		 155static void nvme_free_ns(struct kref *kref)
156{
157 struct nvme_ns *ns = container_of(kref, struct nvme_ns, kref);
158
b0b4e09c
MB		 159 if (ns->ndev)
160 nvme_nvm_unregister(ns);
1673f1f0 161
b0b4e09c
MB		 162 if (ns->disk) {
163 spin_lock(&dev_list_lock);
164 ns->disk->private_data = NULL;
165 spin_unlock(&dev_list_lock);
166 }
1673f1f0 167
1673f1f0 168 put_disk(ns->disk);
075790eb
KB		 169 ida_simple_remove(&ns->ctrl->ns_ida, ns->instance);
170 nvme_put_ctrl(ns->ctrl);
1673f1f0
CH		 171 kfree(ns);
172}
173
5bae7f73 174static void nvme_put_ns(struct nvme_ns *ns)
1673f1f0
CH		 175{
176 kref_put(&ns->kref, nvme_free_ns);
177}
178
179static struct nvme_ns *nvme_get_ns_from_disk(struct gendisk *disk)
180{
181 struct nvme_ns *ns;
182
183 spin_lock(&dev_list_lock);
184 ns = disk->private_data;
e439bb12
SG		 185 if (ns) {
186 if (!kref_get_unless_zero(&ns->kref))
187 goto fail;
188 if (!try_module_get(ns->ctrl->ops->module))
189 goto fail_put_ns;
190 }
1673f1f0
CH		 191 spin_unlock(&dev_list_lock);
192
193 return ns;
e439bb12
SG		 194
195fail_put_ns:
196 kref_put(&ns->kref, nvme_free_ns);
197fail:
198 spin_unlock(&dev_list_lock);
199 return NULL;
1673f1f0
CH		 200}
201
7688faa6
CH		 202void nvme_requeue_req(struct request *req)
203{
204 unsigned long flags;
205
206 blk_mq_requeue_request(req);
207 spin_lock_irqsave(req->q->queue_lock, flags);
208 if (!blk_queue_stopped(req->q))
209 blk_mq_kick_requeue_list(req->q);
210 spin_unlock_irqrestore(req->q->queue_lock, flags);
211}
576d55d6 212EXPORT_SYMBOL_GPL(nvme_requeue_req);
7688faa6 213
4160982e 214struct request *nvme_alloc_request(struct request_queue *q,
eb71f435 215 struct nvme_command *cmd, unsigned int flags, int qid)
21d34711 216{
21d34711 217 struct request *req;
21d34711 218
eb71f435
CH		 219 if (qid == NVME_QID_ANY) {
220 req = blk_mq_alloc_request(q, nvme_is_write(cmd), flags);
221 } else {
222 req = blk_mq_alloc_request_hctx(q, nvme_is_write(cmd), flags,
223 qid ? qid - 1 : 0);
224 }
21d34711 225 if (IS_ERR(req))
4160982e 226 return req;
21d34711
CH		 227
228 req->cmd_type = REQ_TYPE_DRV_PRIV;
229 req->cmd_flags |= REQ_FAILFAST_DRIVER;
21d34711
CH		 230 req->cmd = (unsigned char *)cmd;
231 req->cmd_len = sizeof(struct nvme_command);
21d34711 232
4160982e
CH		 233 return req;
234}
576d55d6 235EXPORT_SYMBOL_GPL(nvme_alloc_request);
4160982e 236
8093f7ca
ML		 237static inline void nvme_setup_flush(struct nvme_ns *ns,
238 struct nvme_command *cmnd)
239{
240 memset(cmnd, 0, sizeof(*cmnd));
241 cmnd->common.opcode = nvme_cmd_flush;
242 cmnd->common.nsid = cpu_to_le32(ns->ns_id);
243}
244
245static inline int nvme_setup_discard(struct nvme_ns *ns, struct request *req,
246 struct nvme_command *cmnd)
247{
248 struct nvme_dsm_range *range;
249 struct page *page;
250 int offset;
251 unsigned int nr_bytes = blk_rq_bytes(req);
252
253 range = kmalloc(sizeof(*range), GFP_ATOMIC);
254 if (!range)
255 return BLK_MQ_RQ_QUEUE_BUSY;
256
257 range->cattr = cpu_to_le32(0);
258 range->nlb = cpu_to_le32(nr_bytes >> ns->lba_shift);
259 range->slba = cpu_to_le64(nvme_block_nr(ns, blk_rq_pos(req)));
260
261 memset(cmnd, 0, sizeof(*cmnd));
262 cmnd->dsm.opcode = nvme_cmd_dsm;
263 cmnd->dsm.nsid = cpu_to_le32(ns->ns_id);
264 cmnd->dsm.nr = 0;
265 cmnd->dsm.attributes = cpu_to_le32(NVME_DSMGMT_AD);
266
267 req->completion_data = range;
268 page = virt_to_page(range);
269 offset = offset_in_page(range);
270 blk_add_request_payload(req, page, offset, sizeof(*range));
271
272 /*
273 * we set __data_len back to the size of the area to be discarded
274 * on disk. This allows us to report completion on the full amount
275 * of blocks described by the request.
276 */
277 req->__data_len = nr_bytes;
278
279 return 0;
280}
281
282static inline void nvme_setup_rw(struct nvme_ns *ns, struct request *req,
283 struct nvme_command *cmnd)
284{
285 u16 control = 0;
286 u32 dsmgmt = 0;
287
288 if (req->cmd_flags & REQ_FUA)
289 control |= NVME_RW_FUA;
290 if (req->cmd_flags & (REQ_FAILFAST_DEV | REQ_RAHEAD))
291 control |= NVME_RW_LR;
292
293 if (req->cmd_flags & REQ_RAHEAD)
294 dsmgmt |= NVME_RW_DSM_FREQ_PREFETCH;
295
296 memset(cmnd, 0, sizeof(*cmnd));
297 cmnd->rw.opcode = (rq_data_dir(req) ? nvme_cmd_write : nvme_cmd_read);
298 cmnd->rw.command_id = req->tag;
299 cmnd->rw.nsid = cpu_to_le32(ns->ns_id);
300 cmnd->rw.slba = cpu_to_le64(nvme_block_nr(ns, blk_rq_pos(req)));
301 cmnd->rw.length = cpu_to_le16((blk_rq_bytes(req) >> ns->lba_shift) - 1);
302
303 if (ns->ms) {
304 switch (ns->pi_type) {
305 case NVME_NS_DPS_PI_TYPE3:
306 control |= NVME_RW_PRINFO_PRCHK_GUARD;
307 break;
308 case NVME_NS_DPS_PI_TYPE1:
309 case NVME_NS_DPS_PI_TYPE2:
310 control |= NVME_RW_PRINFO_PRCHK_GUARD |
311 NVME_RW_PRINFO_PRCHK_REF;
312 cmnd->rw.reftag = cpu_to_le32(
313 nvme_block_nr(ns, blk_rq_pos(req)));
314 break;
315 }
316 if (!blk_integrity_rq(req))
317 control |= NVME_RW_PRINFO_PRACT;
318 }
319
320 cmnd->rw.control = cpu_to_le16(control);
321 cmnd->rw.dsmgmt = cpu_to_le32(dsmgmt);
322}
323
324int nvme_setup_cmd(struct nvme_ns *ns, struct request *req,
325 struct nvme_command *cmd)
326{
327 int ret = 0;
328
329 if (req->cmd_type == REQ_TYPE_DRV_PRIV)
330 memcpy(cmd, req->cmd, sizeof(*cmd));
3a5e02ce 331 else if (req_op(req) == REQ_OP_FLUSH)
8093f7ca 332 nvme_setup_flush(ns, cmd);
c2df40df 333 else if (req_op(req) == REQ_OP_DISCARD)
8093f7ca
ML		 334 ret = nvme_setup_discard(ns, req, cmd);
335 else
336 nvme_setup_rw(ns, req, cmd);
337
338 return ret;
339}
340EXPORT_SYMBOL_GPL(nvme_setup_cmd);
341
4160982e
CH		 342/*
343 * Returns 0 on success. If the result is negative, it's a Linux error code;
344 * if the result is positive, it's an NVM Express status code
345 */
346int __nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
1cb3cce5 347 struct nvme_completion *cqe, void *buffer, unsigned bufflen,
eb71f435 348 unsigned timeout, int qid, int at_head, int flags)
4160982e
CH		 349{
350 struct request *req;
351 int ret;
352
eb71f435 353 req = nvme_alloc_request(q, cmd, flags, qid);
4160982e
CH		 354 if (IS_ERR(req))
355 return PTR_ERR(req);
356
357 req->timeout = timeout ? timeout : ADMIN_TIMEOUT;
1cb3cce5 358 req->special = cqe;
4160982e 359
21d34711
CH		 360 if (buffer && bufflen) {
361 ret = blk_rq_map_kern(q, req, buffer, bufflen, GFP_KERNEL);
362 if (ret)
363 goto out;
4160982e
CH		 364 }
365
eb71f435 366 blk_execute_rq(req->q, NULL, req, at_head);
4160982e
CH		 367 ret = req->errors;
368 out:
369 blk_mq_free_request(req);
370 return ret;
371}
eb71f435 372EXPORT_SYMBOL_GPL(__nvme_submit_sync_cmd);
4160982e
CH		 373
374int nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
375 void *buffer, unsigned bufflen)
376{
eb71f435
CH		 377 return __nvme_submit_sync_cmd(q, cmd, NULL, buffer, bufflen, 0,
378 NVME_QID_ANY, 0, 0);
4160982e 379}
576d55d6 380EXPORT_SYMBOL_GPL(nvme_submit_sync_cmd);
4160982e 381
0b7f1f26
KB		 382int __nvme_submit_user_cmd(struct request_queue *q, struct nvme_command *cmd,
383 void __user *ubuffer, unsigned bufflen,
384 void __user *meta_buffer, unsigned meta_len, u32 meta_seed,
385 u32 *result, unsigned timeout)
4160982e 386{
7a5abb4b 387 bool write = nvme_is_write(cmd);
1cb3cce5 388 struct nvme_completion cqe;
0b7f1f26
KB		 389 struct nvme_ns *ns = q->queuedata;
390 struct gendisk *disk = ns ? ns->disk : NULL;
4160982e 391 struct request *req;
0b7f1f26
KB		 392 struct bio *bio = NULL;
393 void *meta = NULL;
4160982e
CH		 394 int ret;
395
eb71f435 396 req = nvme_alloc_request(q, cmd, 0, NVME_QID_ANY);
4160982e
CH		 397 if (IS_ERR(req))
398 return PTR_ERR(req);
399
400 req->timeout = timeout ? timeout : ADMIN_TIMEOUT;
1cb3cce5 401 req->special = &cqe;
4160982e
CH		 402
403 if (ubuffer && bufflen) {
21d34711
CH		 404 ret = blk_rq_map_user(q, req, NULL, ubuffer, bufflen,
405 GFP_KERNEL);
406 if (ret)
407 goto out;
408 bio = req->bio;
21d34711 409
0b7f1f26
KB		 410 if (!disk)
411 goto submit;
412 bio->bi_bdev = bdget_disk(disk, 0);
413 if (!bio->bi_bdev) {
414 ret = -ENODEV;
415 goto out_unmap;
416 }
417
e9fc63d6 418 if (meta_buffer && meta_len) {
0b7f1f26
KB		 419 struct bio_integrity_payload *bip;
420
421 meta = kmalloc(meta_len, GFP_KERNEL);
422 if (!meta) {
423 ret = -ENOMEM;
424 goto out_unmap;
425 }
426
427 if (write) {
428 if (copy_from_user(meta, meta_buffer,
429 meta_len)) {
430 ret = -EFAULT;
431 goto out_free_meta;
432 }
433 }
434
435 bip = bio_integrity_alloc(bio, GFP_KERNEL, 1);
06c1e390
KB		 436 if (IS_ERR(bip)) {
437 ret = PTR_ERR(bip);
0b7f1f26
KB		 438 goto out_free_meta;
439 }
440
441 bip->bip_iter.bi_size = meta_len;
442 bip->bip_iter.bi_sector = meta_seed;
443
444 ret = bio_integrity_add_page(bio, virt_to_page(meta),
445 meta_len, offset_in_page(meta));
446 if (ret != meta_len) {
447 ret = -ENOMEM;
448 goto out_free_meta;
449 }
450 }
451 }
452 submit:
453 blk_execute_rq(req->q, disk, req, 0);
454 ret = req->errors;
21d34711 455 if (result)
1cb3cce5 456 *result = le32_to_cpu(cqe.result);
0b7f1f26
KB		 457 if (meta && !ret && !write) {
458 if (copy_to_user(meta_buffer, meta, meta_len))
459 ret = -EFAULT;
460 }
461 out_free_meta:
462 kfree(meta);
463 out_unmap:
464 if (bio) {
465 if (disk && bio->bi_bdev)
466 bdput(bio->bi_bdev);
467 blk_rq_unmap_user(bio);
468 }
21d34711
CH		 469 out:
470 blk_mq_free_request(req);
471 return ret;
472}
473
0b7f1f26
KB		 474int nvme_submit_user_cmd(struct request_queue *q, struct nvme_command *cmd,
475 void __user *ubuffer, unsigned bufflen, u32 *result,
476 unsigned timeout)
477{
478 return __nvme_submit_user_cmd(q, cmd, ubuffer, bufflen, NULL, 0, 0,
479 result, timeout);
480}
481
038bd4cb
SG		 482static void nvme_keep_alive_end_io(struct request *rq, int error)
483{
484 struct nvme_ctrl *ctrl = rq->end_io_data;
485
486 blk_mq_free_request(rq);
487
488 if (error) {
489 dev_err(ctrl->device,
490 "failed nvme_keep_alive_end_io error=%d\n", error);
491 return;
492 }
493
494 schedule_delayed_work(&ctrl->ka_work, ctrl->kato * HZ);
495}
496
497static int nvme_keep_alive(struct nvme_ctrl *ctrl)
498{
499 struct nvme_command c;
500 struct request *rq;
501
502 memset(&c, 0, sizeof(c));
503 c.common.opcode = nvme_admin_keep_alive;
504
505 rq = nvme_alloc_request(ctrl->admin_q, &c, BLK_MQ_REQ_RESERVED,
506 NVME_QID_ANY);
507 if (IS_ERR(rq))
508 return PTR_ERR(rq);
509
510 rq->timeout = ctrl->kato * HZ;
511 rq->end_io_data = ctrl;
512
513 blk_execute_rq_nowait(rq->q, NULL, rq, 0, nvme_keep_alive_end_io);
514
515 return 0;
516}
517
518static void nvme_keep_alive_work(struct work_struct *work)
519{
520 struct nvme_ctrl *ctrl = container_of(to_delayed_work(work),
521 struct nvme_ctrl, ka_work);
522
523 if (nvme_keep_alive(ctrl)) {
524 /* allocation failure, reset the controller */
525 dev_err(ctrl->device, "keep-alive failed\n");
526 ctrl->ops->reset_ctrl(ctrl);
527 return;
528 }
529}
530
531void nvme_start_keep_alive(struct nvme_ctrl *ctrl)
532{
533 if (unlikely(ctrl->kato == 0))
534 return;
535
536 INIT_DELAYED_WORK(&ctrl->ka_work, nvme_keep_alive_work);
537 schedule_delayed_work(&ctrl->ka_work, ctrl->kato * HZ);
538}
539EXPORT_SYMBOL_GPL(nvme_start_keep_alive);
540
541void nvme_stop_keep_alive(struct nvme_ctrl *ctrl)
542{
543 if (unlikely(ctrl->kato == 0))
544 return;
545
546 cancel_delayed_work_sync(&ctrl->ka_work);
547}
548EXPORT_SYMBOL_GPL(nvme_stop_keep_alive);
549
1c63dc66 550int nvme_identify_ctrl(struct nvme_ctrl *dev, struct nvme_id_ctrl **id)
21d34711
CH		 551{
552 struct nvme_command c = { };
553 int error;
554
555 /* gcc-4.4.4 (at least) has issues with initializers and anon unions */
556 c.identify.opcode = nvme_admin_identify;
557 c.identify.cns = cpu_to_le32(1);
558
559 *id = kmalloc(sizeof(struct nvme_id_ctrl), GFP_KERNEL);
560 if (!*id)
561 return -ENOMEM;
562
563 error = nvme_submit_sync_cmd(dev->admin_q, &c, *id,
564 sizeof(struct nvme_id_ctrl));
565 if (error)
566 kfree(*id);
567 return error;
568}
569
540c801c
KB		 570static int nvme_identify_ns_list(struct nvme_ctrl *dev, unsigned nsid, __le32 *ns_list)
571{
572 struct nvme_command c = { };
573
574 c.identify.opcode = nvme_admin_identify;
575 c.identify.cns = cpu_to_le32(2);
576 c.identify.nsid = cpu_to_le32(nsid);
577 return nvme_submit_sync_cmd(dev->admin_q, &c, ns_list, 0x1000);
578}
579
1c63dc66 580int nvme_identify_ns(struct nvme_ctrl *dev, unsigned nsid,
21d34711
CH		 581 struct nvme_id_ns **id)
582{
583 struct nvme_command c = { };
584 int error;
585
586 /* gcc-4.4.4 (at least) has issues with initializers and anon unions */
587 c.identify.opcode = nvme_admin_identify,
588 c.identify.nsid = cpu_to_le32(nsid),
589
590 *id = kmalloc(sizeof(struct nvme_id_ns), GFP_KERNEL);
591 if (!*id)
592 return -ENOMEM;
593
594 error = nvme_submit_sync_cmd(dev->admin_q, &c, *id,
595 sizeof(struct nvme_id_ns));
596 if (error)
597 kfree(*id);
598 return error;
599}
600
1c63dc66 601int nvme_get_features(struct nvme_ctrl *dev, unsigned fid, unsigned nsid,
1a6fe74d 602 void *buffer, size_t buflen, u32 *result)
21d34711
CH		 603{
604 struct nvme_command c;
1cb3cce5
CH		 605 struct nvme_completion cqe;
606 int ret;
21d34711
CH		 607
608 memset(&c, 0, sizeof(c));
609 c.features.opcode = nvme_admin_get_features;
610 c.features.nsid = cpu_to_le32(nsid);
21d34711
CH		 611 c.features.fid = cpu_to_le32(fid);
612
1a6fe74d 613 ret = __nvme_submit_sync_cmd(dev->admin_q, &c, &cqe, buffer, buflen, 0,
eb71f435 614 NVME_QID_ANY, 0, 0);
9b47f77a 615 if (ret >= 0 && result)
1cb3cce5
CH		 616 *result = le32_to_cpu(cqe.result);
617 return ret;
21d34711
CH		 618}
619
1c63dc66 620int nvme_set_features(struct nvme_ctrl *dev, unsigned fid, unsigned dword11,
1a6fe74d 621 void *buffer, size_t buflen, u32 *result)
21d34711
CH		 622{
623 struct nvme_command c;
1cb3cce5
CH		 624 struct nvme_completion cqe;
625 int ret;
21d34711
CH		 626
627 memset(&c, 0, sizeof(c));
628 c.features.opcode = nvme_admin_set_features;
21d34711
CH		 629 c.features.fid = cpu_to_le32(fid);
630 c.features.dword11 = cpu_to_le32(dword11);
631
1a6fe74d
AL		 632 ret = __nvme_submit_sync_cmd(dev->admin_q, &c, &cqe,
633 buffer, buflen, 0, NVME_QID_ANY, 0, 0);
9b47f77a 634 if (ret >= 0 && result)
1cb3cce5
CH		 635 *result = le32_to_cpu(cqe.result);
636 return ret;
21d34711
CH		 637}
638
1c63dc66 639int nvme_get_log_page(struct nvme_ctrl *dev, struct nvme_smart_log **log)
21d34711
CH		 640{
641 struct nvme_command c = { };
642 int error;
643
644 c.common.opcode = nvme_admin_get_log_page,
645 c.common.nsid = cpu_to_le32(0xFFFFFFFF),
646 c.common.cdw10[0] = cpu_to_le32(
647 (((sizeof(struct nvme_smart_log) / 4) - 1) << 16) |
648 NVME_LOG_SMART),
649
650 *log = kmalloc(sizeof(struct nvme_smart_log), GFP_KERNEL);
651 if (!*log)
652 return -ENOMEM;
653
654 error = nvme_submit_sync_cmd(dev->admin_q, &c, *log,
655 sizeof(struct nvme_smart_log));
656 if (error)
657 kfree(*log);
658 return error;
659}
1673f1f0 660
9a0be7ab
CH		 661int nvme_set_queue_count(struct nvme_ctrl *ctrl, int *count)
662{
663 u32 q_count = (*count - 1) | ((*count - 1) << 16);
664 u32 result;
665 int status, nr_io_queues;
666
1a6fe74d 667 status = nvme_set_features(ctrl, NVME_FEAT_NUM_QUEUES, q_count, NULL, 0,
9a0be7ab 668 &result);
f5fa90dc 669 if (status < 0)
9a0be7ab
CH		 670 return status;
671
f5fa90dc
CH		 672 /*
673 * Degraded controllers might return an error when setting the queue
674 * count. We still want to be able to bring them online and offer
675 * access to the admin queue, as that might be only way to fix them up.
676 */
677 if (status > 0) {
678 dev_err(ctrl->dev, "Could not set queue count (%d)\n", status);
679 *count = 0;
680 } else {
681 nr_io_queues = min(result & 0xffff, result >> 16) + 1;
682 *count = min(*count, nr_io_queues);
683 }
684
9a0be7ab
CH		 685 return 0;
686}
576d55d6 687EXPORT_SYMBOL_GPL(nvme_set_queue_count);
9a0be7ab 688
1673f1f0
CH		 689static int nvme_submit_io(struct nvme_ns *ns, struct nvme_user_io __user *uio)
690{
691 struct nvme_user_io io;
692 struct nvme_command c;
693 unsigned length, meta_len;
694 void __user *metadata;
695
696 if (copy_from_user(&io, uio, sizeof(io)))
697 return -EFAULT;
63088ec7
KB		 698 if (io.flags)
699 return -EINVAL;
1673f1f0
CH		 700
701 switch (io.opcode) {
702 case nvme_cmd_write:
703 case nvme_cmd_read:
704 case nvme_cmd_compare:
705 break;
706 default:
707 return -EINVAL;
708 }
709
710 length = (io.nblocks + 1) << ns->lba_shift;
711 meta_len = (io.nblocks + 1) * ns->ms;
712 metadata = (void __user *)(uintptr_t)io.metadata;
713
714 if (ns->ext) {
715 length += meta_len;
716 meta_len = 0;
717 } else if (meta_len) {
718 if ((io.metadata & 3) || !io.metadata)
719 return -EINVAL;
720 }
721
722 memset(&c, 0, sizeof(c));
723 c.rw.opcode = io.opcode;
724 c.rw.flags = io.flags;
725 c.rw.nsid = cpu_to_le32(ns->ns_id);
726 c.rw.slba = cpu_to_le64(io.slba);
727 c.rw.length = cpu_to_le16(io.nblocks);
728 c.rw.control = cpu_to_le16(io.control);
729 c.rw.dsmgmt = cpu_to_le32(io.dsmgmt);
730 c.rw.reftag = cpu_to_le32(io.reftag);
731 c.rw.apptag = cpu_to_le16(io.apptag);
732 c.rw.appmask = cpu_to_le16(io.appmask);
733
734 return __nvme_submit_user_cmd(ns->queue, &c,
735 (void __user *)(uintptr_t)io.addr, length,
736 metadata, meta_len, io.slba, NULL, 0);
737}
738
f3ca80fc 739static int nvme_user_cmd(struct nvme_ctrl *ctrl, struct nvme_ns *ns,
1673f1f0
CH		 740 struct nvme_passthru_cmd __user *ucmd)
741{
742 struct nvme_passthru_cmd cmd;
743 struct nvme_command c;
744 unsigned timeout = 0;
745 int status;
746
747 if (!capable(CAP_SYS_ADMIN))
748 return -EACCES;
749 if (copy_from_user(&cmd, ucmd, sizeof(cmd)))
750 return -EFAULT;
63088ec7
KB		 751 if (cmd.flags)
752 return -EINVAL;
1673f1f0
CH		 753
754 memset(&c, 0, sizeof(c));
755 c.common.opcode = cmd.opcode;
756 c.common.flags = cmd.flags;
757 c.common.nsid = cpu_to_le32(cmd.nsid);
758 c.common.cdw2[0] = cpu_to_le32(cmd.cdw2);
759 c.common.cdw2[1] = cpu_to_le32(cmd.cdw3);
760 c.common.cdw10[0] = cpu_to_le32(cmd.cdw10);
761 c.common.cdw10[1] = cpu_to_le32(cmd.cdw11);
762 c.common.cdw10[2] = cpu_to_le32(cmd.cdw12);
763 c.common.cdw10[3] = cpu_to_le32(cmd.cdw13);
764 c.common.cdw10[4] = cpu_to_le32(cmd.cdw14);
765 c.common.cdw10[5] = cpu_to_le32(cmd.cdw15);
766
767 if (cmd.timeout_ms)
768 timeout = msecs_to_jiffies(cmd.timeout_ms);
769
770 status = nvme_submit_user_cmd(ns ? ns->queue : ctrl->admin_q, &c,
d1ea7be5 771 (void __user *)(uintptr_t)cmd.addr, cmd.data_len,
1673f1f0
CH		 772 &cmd.result, timeout);
773 if (status >= 0) {
774 if (put_user(cmd.result, &ucmd->result))
775 return -EFAULT;
776 }
777
778 return status;
779}
780
781static int nvme_ioctl(struct block_device *bdev, fmode_t mode,
782 unsigned int cmd, unsigned long arg)
783{
784 struct nvme_ns *ns = bdev->bd_disk->private_data;
785
786 switch (cmd) {
787 case NVME_IOCTL_ID:
788 force_successful_syscall_return();
789 return ns->ns_id;
790 case NVME_IOCTL_ADMIN_CMD:
791 return nvme_user_cmd(ns->ctrl, NULL, (void __user *)arg);
792 case NVME_IOCTL_IO_CMD:
793 return nvme_user_cmd(ns->ctrl, ns, (void __user *)arg);
794 case NVME_IOCTL_SUBMIT_IO:
795 return nvme_submit_io(ns, (void __user *)arg);
44907332 796#ifdef CONFIG_BLK_DEV_NVME_SCSI
1673f1f0
CH		 797 case SG_GET_VERSION_NUM:
798 return nvme_sg_get_version_num((void __user *)arg);
799 case SG_IO:
800 return nvme_sg_io(ns, (void __user *)arg);
44907332 801#endif
1673f1f0
CH		 802 default:
803 return -ENOTTY;
804 }
805}
806
807#ifdef CONFIG_COMPAT
808static int nvme_compat_ioctl(struct block_device *bdev, fmode_t mode,
809 unsigned int cmd, unsigned long arg)
810{
811 switch (cmd) {
812 case SG_IO:
813 return -ENOIOCTLCMD;
814 }
815 return nvme_ioctl(bdev, mode, cmd, arg);
816}
817#else
818#define nvme_compat_ioctl NULL
819#endif
820
821static int nvme_open(struct block_device *bdev, fmode_t mode)
822{
823 return nvme_get_ns_from_disk(bdev->bd_disk) ? 0 : -ENXIO;
824}
825
826static void nvme_release(struct gendisk *disk, fmode_t mode)
827{
e439bb12
SG		 828 struct nvme_ns *ns = disk->private_data;
829
830 module_put(ns->ctrl->ops->module);
831 nvme_put_ns(ns);
1673f1f0
CH		 832}
833
834static int nvme_getgeo(struct block_device *bdev, struct hd_geometry *geo)
835{
836 /* some standard values */
837 geo->heads = 1 << 6;
838 geo->sectors = 1 << 5;
839 geo->cylinders = get_capacity(bdev->bd_disk) >> 11;
840 return 0;
841}
842
843#ifdef CONFIG_BLK_DEV_INTEGRITY
844static void nvme_init_integrity(struct nvme_ns *ns)
845{
846 struct blk_integrity integrity;
847
fa9a89fc 848 memset(&integrity, 0, sizeof(integrity));
1673f1f0
CH		 849 switch (ns->pi_type) {
850 case NVME_NS_DPS_PI_TYPE3:
851 integrity.profile = &t10_pi_type3_crc;
ba36c21b
NB		 852 integrity.tag_size = sizeof(u16) + sizeof(u32);
853 integrity.flags |= BLK_INTEGRITY_DEVICE_CAPABLE;
1673f1f0
CH		 854 break;
855 case NVME_NS_DPS_PI_TYPE1:
856 case NVME_NS_DPS_PI_TYPE2:
857 integrity.profile = &t10_pi_type1_crc;
ba36c21b
NB		 858 integrity.tag_size = sizeof(u16);
859 integrity.flags |= BLK_INTEGRITY_DEVICE_CAPABLE;
1673f1f0
CH		 860 break;
861 default:
862 integrity.profile = NULL;
863 break;
864 }
865 integrity.tuple_size = ns->ms;
866 blk_integrity_register(ns->disk, &integrity);
867 blk_queue_max_integrity_segments(ns->queue, 1);
868}
869#else
870static void nvme_init_integrity(struct nvme_ns *ns)
871{
872}
873#endif /* CONFIG_BLK_DEV_INTEGRITY */
874
875static void nvme_config_discard(struct nvme_ns *ns)
876{
08095e70 877 struct nvme_ctrl *ctrl = ns->ctrl;
1673f1f0 878 u32 logical_block_size = queue_logical_block_size(ns->queue);
08095e70
KB		 879
880 if (ctrl->quirks & NVME_QUIRK_DISCARD_ZEROES)
881 ns->queue->limits.discard_zeroes_data = 1;
882 else
883 ns->queue->limits.discard_zeroes_data = 0;
884
1673f1f0
CH		 885 ns->queue->limits.discard_alignment = logical_block_size;
886 ns->queue->limits.discard_granularity = logical_block_size;
bd0fc288 887 blk_queue_max_discard_sectors(ns->queue, UINT_MAX);
1673f1f0
CH		 888 queue_flag_set_unlocked(QUEUE_FLAG_DISCARD, ns->queue);
889}
890
ac81bfa9 891static int nvme_revalidate_ns(struct nvme_ns *ns, struct nvme_id_ns **id)
1673f1f0 892{
ac81bfa9 893 if (nvme_identify_ns(ns->ctrl, ns->ns_id, id)) {
b0b4e09c 894 dev_warn(ns->ctrl->dev, "%s: Identify failure\n", __func__);
1673f1f0
CH		 895 return -ENODEV;
896 }
1673f1f0 897
ac81bfa9
MB		 898 if ((*id)->ncap == 0) {
899 kfree(*id);
900 return -ENODEV;
1673f1f0
CH		 901 }
902
2b9b6e86 903 if (ns->ctrl->vs >= NVME_VS(1, 1))
ac81bfa9 904 memcpy(ns->eui, (*id)->eui64, sizeof(ns->eui));
2b9b6e86 905 if (ns->ctrl->vs >= NVME_VS(1, 2))
ac81bfa9
MB		 906 memcpy(ns->uuid, (*id)->nguid, sizeof(ns->uuid));
907
908 return 0;
909}
910
911static void __nvme_revalidate_disk(struct gendisk *disk, struct nvme_id_ns *id)
912{
913 struct nvme_ns *ns = disk->private_data;
914 u8 lbaf, pi_type;
915 u16 old_ms;
916 unsigned short bs;
2b9b6e86 917
1673f1f0
CH		 918 old_ms = ns->ms;
919 lbaf = id->flbas & NVME_NS_FLBAS_LBA_MASK;
920 ns->lba_shift = id->lbaf[lbaf].ds;
921 ns->ms = le16_to_cpu(id->lbaf[lbaf].ms);
922 ns->ext = ns->ms && (id->flbas & NVME_NS_FLBAS_META_EXT);
923
924 /*
925 * If identify namespace failed, use default 512 byte block size so
926 * block layer can use before failing read/write for 0 capacity.
927 */
928 if (ns->lba_shift == 0)
929 ns->lba_shift = 9;
930 bs = 1 << ns->lba_shift;
1673f1f0
CH		 931 /* XXX: PI implementation requires metadata equal t10 pi tuple size */
932 pi_type = ns->ms == sizeof(struct t10_pi_tuple) ?
933 id->dps & NVME_NS_DPS_PI_MASK : 0;
934
935 blk_mq_freeze_queue(disk->queue);
936 if (blk_get_integrity(disk) && (ns->pi_type != pi_type ||
937 ns->ms != old_ms ||
938 bs != queue_logical_block_size(disk->queue) ||
939 (ns->ms && ns->ext)))
940 blk_integrity_unregister(disk);
941
942 ns->pi_type = pi_type;
943 blk_queue_logical_block_size(ns->queue, bs);
944
4b9d5b15 945 if (ns->ms && !blk_get_integrity(disk) && !ns->ext)
1673f1f0 946 nvme_init_integrity(ns);
1673f1f0
CH		 947 if (ns->ms && !(ns->ms == 8 && ns->pi_type) && !blk_get_integrity(disk))
948 set_capacity(disk, 0);
949 else
950 set_capacity(disk, le64_to_cpup(&id->nsze) << (ns->lba_shift - 9));
951
952 if (ns->ctrl->oncs & NVME_CTRL_ONCS_DSM)
953 nvme_config_discard(ns);
954 blk_mq_unfreeze_queue(disk->queue);
ac81bfa9 955}
1673f1f0 956
ac81bfa9
MB		 957static int nvme_revalidate_disk(struct gendisk *disk)
958{
959 struct nvme_ns *ns = disk->private_data;
960 struct nvme_id_ns *id = NULL;
961 int ret;
962
963 if (test_bit(NVME_NS_DEAD, &ns->flags)) {
964 set_capacity(disk, 0);
965 return -ENODEV;
966 }
967
968 ret = nvme_revalidate_ns(ns, &id);
969 if (ret)
970 return ret;
971
972 __nvme_revalidate_disk(disk, id);
1673f1f0 973 kfree(id);
ac81bfa9 974
1673f1f0
CH		 975 return 0;
976}
977
978static char nvme_pr_type(enum pr_type type)
979{
980 switch (type) {
981 case PR_WRITE_EXCLUSIVE:
982 return 1;
983 case PR_EXCLUSIVE_ACCESS:
984 return 2;
985 case PR_WRITE_EXCLUSIVE_REG_ONLY:
986 return 3;
987 case PR_EXCLUSIVE_ACCESS_REG_ONLY:
988 return 4;
989 case PR_WRITE_EXCLUSIVE_ALL_REGS:
990 return 5;
991 case PR_EXCLUSIVE_ACCESS_ALL_REGS:
992 return 6;
993 default:
994 return 0;
995 }
996};
997
998static int nvme_pr_command(struct block_device *bdev, u32 cdw10,
999 u64 key, u64 sa_key, u8 op)
1000{
1001 struct nvme_ns *ns = bdev->bd_disk->private_data;
1002 struct nvme_command c;
1003 u8 data[16] = { 0, };
1004
1005 put_unaligned_le64(key, &data[0]);
1006 put_unaligned_le64(sa_key, &data[8]);
1007
1008 memset(&c, 0, sizeof(c));
1009 c.common.opcode = op;
1010 c.common.nsid = cpu_to_le32(ns->ns_id);
1011 c.common.cdw10[0] = cpu_to_le32(cdw10);
1012
1013 return nvme_submit_sync_cmd(ns->queue, &c, data, 16);
1014}
1015
1016static int nvme_pr_register(struct block_device *bdev, u64 old,
1017 u64 new, unsigned flags)
1018{
1019 u32 cdw10;
1020
1021 if (flags & ~PR_FL_IGNORE_KEY)
1022 return -EOPNOTSUPP;
1023
1024 cdw10 = old ? 2 : 0;
1025 cdw10 |= (flags & PR_FL_IGNORE_KEY) ? 1 << 3 : 0;
1026 cdw10 |= (1 << 30) | (1 << 31); /* PTPL=1 */
1027 return nvme_pr_command(bdev, cdw10, old, new, nvme_cmd_resv_register);
1028}
1029
1030static int nvme_pr_reserve(struct block_device *bdev, u64 key,
1031 enum pr_type type, unsigned flags)
1032{
1033 u32 cdw10;
1034
1035 if (flags & ~PR_FL_IGNORE_KEY)
1036 return -EOPNOTSUPP;
1037
1038 cdw10 = nvme_pr_type(type) << 8;
1039 cdw10 |= ((flags & PR_FL_IGNORE_KEY) ? 1 << 3 : 0);
1040 return nvme_pr_command(bdev, cdw10, key, 0, nvme_cmd_resv_acquire);
1041}
1042
1043static int nvme_pr_preempt(struct block_device *bdev, u64 old, u64 new,
1044 enum pr_type type, bool abort)
1045{
1046 u32 cdw10 = nvme_pr_type(type) << 8 | abort ? 2 : 1;
1047 return nvme_pr_command(bdev, cdw10, old, new, nvme_cmd_resv_acquire);
1048}
1049
1050static int nvme_pr_clear(struct block_device *bdev, u64 key)
1051{
8c0b3915 1052 u32 cdw10 = 1 | (key ? 1 << 3 : 0);
1673f1f0
CH		 1053 return nvme_pr_command(bdev, cdw10, key, 0, nvme_cmd_resv_register);
1054}
1055
1056static int nvme_pr_release(struct block_device *bdev, u64 key, enum pr_type type)
1057{
1058 u32 cdw10 = nvme_pr_type(type) << 8 | key ? 1 << 3 : 0;
1059 return nvme_pr_command(bdev, cdw10, key, 0, nvme_cmd_resv_release);
1060}
1061
1062static const struct pr_ops nvme_pr_ops = {
1063 .pr_register = nvme_pr_register,
1064 .pr_reserve = nvme_pr_reserve,
1065 .pr_release = nvme_pr_release,
1066 .pr_preempt = nvme_pr_preempt,
1067 .pr_clear = nvme_pr_clear,
1068};
1069
5bae7f73 1070static const struct block_device_operations nvme_fops = {
1673f1f0
CH		 1071 .owner = THIS_MODULE,
1072 .ioctl = nvme_ioctl,
1073 .compat_ioctl = nvme_compat_ioctl,
1074 .open = nvme_open,
1075 .release = nvme_release,
1076 .getgeo = nvme_getgeo,
1077 .revalidate_disk= nvme_revalidate_disk,
1078 .pr_ops = &nvme_pr_ops,
1079};
1080
5fd4ce1b
CH		 1081static int nvme_wait_ready(struct nvme_ctrl *ctrl, u64 cap, bool enabled)
1082{
1083 unsigned long timeout =
1084 ((NVME_CAP_TIMEOUT(cap) + 1) * HZ / 2) + jiffies;
1085 u32 csts, bit = enabled ? NVME_CSTS_RDY : 0;
1086 int ret;
1087
1088 while ((ret = ctrl->ops->reg_read32(ctrl, NVME_REG_CSTS, &csts)) == 0) {
1089 if ((csts & NVME_CSTS_RDY) == bit)
1090 break;
1091
1092 msleep(100);
1093 if (fatal_signal_pending(current))
1094 return -EINTR;
1095 if (time_after(jiffies, timeout)) {
1b3c47c1 1096 dev_err(ctrl->device,
5fd4ce1b
CH		 1097 "Device not ready; aborting %s\n", enabled ?
1098 "initialisation" : "reset");
1099 return -ENODEV;
1100 }
1101 }
1102
1103 return ret;
1104}
1105
1106/*
1107 * If the device has been passed off to us in an enabled state, just clear
1108 * the enabled bit. The spec says we should set the 'shutdown notification
1109 * bits', but doing so may cause the device to complete commands to the
1110 * admin queue ... and we don't know what memory that might be pointing at!
1111 */
1112int nvme_disable_ctrl(struct nvme_ctrl *ctrl, u64 cap)
1113{
1114 int ret;
1115
1116 ctrl->ctrl_config &= ~NVME_CC_SHN_MASK;
1117 ctrl->ctrl_config &= ~NVME_CC_ENABLE;
1118
1119 ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config);
1120 if (ret)
1121 return ret;
54adc010
GP		 1122
1123 /* Checking for ctrl->tagset is a trick to avoid sleeping on module
1124 * load, since we only need the quirk on reset_controller. Notice
1125 * that the HGST device needs this delay only in firmware activation
1126 * procedure; unfortunately we have no (easy) way to verify this.
1127 */
1128 if ((ctrl->quirks & NVME_QUIRK_DELAY_BEFORE_CHK_RDY) && ctrl->tagset)
1129 msleep(NVME_QUIRK_DELAY_AMOUNT);
1130
5fd4ce1b
CH		 1131 return nvme_wait_ready(ctrl, cap, false);
1132}
576d55d6 1133EXPORT_SYMBOL_GPL(nvme_disable_ctrl);
5fd4ce1b
CH		 1134
1135int nvme_enable_ctrl(struct nvme_ctrl *ctrl, u64 cap)
1136{
1137 /*
1138 * Default to a 4K page size, with the intention to update this
1139 * path in the future to accomodate architectures with differing
1140 * kernel and IO page sizes.
1141 */
1142 unsigned dev_page_min = NVME_CAP_MPSMIN(cap) + 12, page_shift = 12;
1143 int ret;
1144
1145 if (page_shift < dev_page_min) {
1b3c47c1 1146 dev_err(ctrl->device,
5fd4ce1b
CH		 1147 "Minimum device page size %u too large for host (%u)\n",
1148 1 << dev_page_min, 1 << page_shift);
1149 return -ENODEV;
1150 }
1151
1152 ctrl->page_size = 1 << page_shift;
1153
1154 ctrl->ctrl_config = NVME_CC_CSS_NVM;
1155 ctrl->ctrl_config |= (page_shift - 12) << NVME_CC_MPS_SHIFT;
1156 ctrl->ctrl_config |= NVME_CC_ARB_RR | NVME_CC_SHN_NONE;
1157 ctrl->ctrl_config |= NVME_CC_IOSQES | NVME_CC_IOCQES;
1158 ctrl->ctrl_config |= NVME_CC_ENABLE;
1159
1160 ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config);
1161 if (ret)
1162 return ret;
1163 return nvme_wait_ready(ctrl, cap, true);
1164}
576d55d6 1165EXPORT_SYMBOL_GPL(nvme_enable_ctrl);
5fd4ce1b
CH		 1166
1167int nvme_shutdown_ctrl(struct nvme_ctrl *ctrl)
1168{
1169 unsigned long timeout = SHUTDOWN_TIMEOUT + jiffies;
1170 u32 csts;
1171 int ret;
1172
1173 ctrl->ctrl_config &= ~NVME_CC_SHN_MASK;
1174 ctrl->ctrl_config |= NVME_CC_SHN_NORMAL;
1175
1176 ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config);
1177 if (ret)
1178 return ret;
1179
1180 while ((ret = ctrl->ops->reg_read32(ctrl, NVME_REG_CSTS, &csts)) == 0) {
1181 if ((csts & NVME_CSTS_SHST_MASK) == NVME_CSTS_SHST_CMPLT)
1182 break;
1183
1184 msleep(100);
1185 if (fatal_signal_pending(current))
1186 return -EINTR;
1187 if (time_after(jiffies, timeout)) {
1b3c47c1 1188 dev_err(ctrl->device,
5fd4ce1b
CH		 1189 "Device shutdown incomplete; abort shutdown\n");
1190 return -ENODEV;
1191 }
1192 }
1193
1194 return ret;
1195}
576d55d6 1196EXPORT_SYMBOL_GPL(nvme_shutdown_ctrl);
5fd4ce1b 1197
da35825d
CH		 1198static void nvme_set_queue_limits(struct nvme_ctrl *ctrl,
1199 struct request_queue *q)
1200{
7c88cb00
JA		 1201 bool vwc = false;
1202
da35825d 1203 if (ctrl->max_hw_sectors) {
45686b61
CH		 1204 u32 max_segments =
1205 (ctrl->max_hw_sectors / (ctrl->page_size >> 9)) + 1;
1206
da35825d 1207 blk_queue_max_hw_sectors(q, ctrl->max_hw_sectors);
45686b61 1208 blk_queue_max_segments(q, min_t(u32, max_segments, USHRT_MAX));
da35825d
CH		 1209 }
1210 if (ctrl->stripe_size)
1211 blk_queue_chunk_sectors(q, ctrl->stripe_size >> 9);
da35825d 1212 blk_queue_virt_boundary(q, ctrl->page_size - 1);
7c88cb00
JA		 1213 if (ctrl->vwc & NVME_CTRL_VWC_PRESENT)
1214 vwc = true;
1215 blk_queue_write_cache(q, vwc, vwc);
da35825d
CH		 1216}
1217
7fd8930f
CH		 1218/*
1219 * Initialize the cached copies of the Identify data and various controller
1220 * register in our nvme_ctrl structure. This should be called as soon as
1221 * the admin queue is fully up and running.
1222 */
1223int nvme_init_identify(struct nvme_ctrl *ctrl)
1224{
1225 struct nvme_id_ctrl *id;
1226 u64 cap;
1227 int ret, page_shift;
a229dbf6 1228 u32 max_hw_sectors;
7fd8930f 1229
f3ca80fc
CH		 1230 ret = ctrl->ops->reg_read32(ctrl, NVME_REG_VS, &ctrl->vs);
1231 if (ret) {
1b3c47c1 1232 dev_err(ctrl->device, "Reading VS failed (%d)\n", ret);
f3ca80fc
CH		 1233 return ret;
1234 }
1235
7fd8930f
CH		 1236 ret = ctrl->ops->reg_read64(ctrl, NVME_REG_CAP, &cap);
1237 if (ret) {
1b3c47c1 1238 dev_err(ctrl->device, "Reading CAP failed (%d)\n", ret);
7fd8930f
CH		 1239 return ret;
1240 }
1241 page_shift = NVME_CAP_MPSMIN(cap) + 12;
1242
f3ca80fc
CH		 1243 if (ctrl->vs >= NVME_VS(1, 1))
1244 ctrl->subsystem = NVME_CAP_NSSRC(cap);
1245
7fd8930f
CH		 1246 ret = nvme_identify_ctrl(ctrl, &id);
1247 if (ret) {
1b3c47c1 1248 dev_err(ctrl->device, "Identify Controller failed (%d)\n", ret);
7fd8930f
CH		 1249 return -EIO;
1250 }
1251
118472ab 1252 ctrl->vid = le16_to_cpu(id->vid);
7fd8930f 1253 ctrl->oncs = le16_to_cpup(&id->oncs);
6bf25d16 1254 atomic_set(&ctrl->abort_limit, id->acl + 1);
7fd8930f 1255 ctrl->vwc = id->vwc;
931e1c22 1256 ctrl->cntlid = le16_to_cpup(&id->cntlid);
7fd8930f
CH		 1257 memcpy(ctrl->serial, id->sn, sizeof(id->sn));
1258 memcpy(ctrl->model, id->mn, sizeof(id->mn));
1259 memcpy(ctrl->firmware_rev, id->fr, sizeof(id->fr));
1260 if (id->mdts)
a229dbf6 1261 max_hw_sectors = 1 << (id->mdts + page_shift - 9);
7fd8930f 1262 else
a229dbf6
CH		 1263 max_hw_sectors = UINT_MAX;
1264 ctrl->max_hw_sectors =
1265 min_not_zero(ctrl->max_hw_sectors, max_hw_sectors);
7fd8930f
CH		 1266
1267 if ((ctrl->quirks & NVME_QUIRK_STRIPE_SIZE) && id->vs[3]) {
1268 unsigned int max_hw_sectors;
1269
1270 ctrl->stripe_size = 1 << (id->vs[3] + page_shift);
1271 max_hw_sectors = ctrl->stripe_size >> (page_shift - 9);
1272 if (ctrl->max_hw_sectors) {
1273 ctrl->max_hw_sectors = min(max_hw_sectors,
1274 ctrl->max_hw_sectors);
1275 } else {
1276 ctrl->max_hw_sectors = max_hw_sectors;
1277 }
1278 }
1279
da35825d 1280 nvme_set_queue_limits(ctrl, ctrl->admin_q);
07bfcd09 1281 ctrl->sgls = le32_to_cpu(id->sgls);
038bd4cb 1282 ctrl->kas = le16_to_cpu(id->kas);
07bfcd09
CH		 1283
1284 if (ctrl->ops->is_fabrics) {
1285 ctrl->icdoff = le16_to_cpu(id->icdoff);
1286 ctrl->ioccsz = le32_to_cpu(id->ioccsz);
1287 ctrl->iorcsz = le32_to_cpu(id->iorcsz);
1288 ctrl->maxcmd = le16_to_cpu(id->maxcmd);
1289
1290 /*
1291 * In fabrics we need to verify the cntlid matches the
1292 * admin connect
1293 */
1294 if (ctrl->cntlid != le16_to_cpu(id->cntlid))
1295 ret = -EINVAL;
038bd4cb
SG		 1296
1297 if (!ctrl->opts->discovery_nqn && !ctrl->kas) {
1298 dev_err(ctrl->dev,
1299 "keep-alive support is mandatory for fabrics\n");
1300 ret = -EINVAL;
1301 }
07bfcd09
CH		 1302 } else {
1303 ctrl->cntlid = le16_to_cpu(id->cntlid);
1304 }
da35825d 1305
7fd8930f 1306 kfree(id);
07bfcd09 1307 return ret;
7fd8930f 1308}
576d55d6 1309EXPORT_SYMBOL_GPL(nvme_init_identify);
7fd8930f 1310
f3ca80fc 1311static int nvme_dev_open(struct inode *inode, struct file *file)
1673f1f0 1312{
f3ca80fc
CH		 1313 struct nvme_ctrl *ctrl;
1314 int instance = iminor(inode);
1315 int ret = -ENODEV;
1673f1f0 1316
f3ca80fc
CH		 1317 spin_lock(&dev_list_lock);
1318 list_for_each_entry(ctrl, &nvme_ctrl_list, node) {
1319 if (ctrl->instance != instance)
1320 continue;
1321
1322 if (!ctrl->admin_q) {
1323 ret = -EWOULDBLOCK;
1324 break;
1325 }
1326 if (!kref_get_unless_zero(&ctrl->kref))
1327 break;
1328 file->private_data = ctrl;
1329 ret = 0;
1330 break;
1331 }
1332 spin_unlock(&dev_list_lock);
1333
1334 return ret;
1673f1f0
CH		 1335}
1336
f3ca80fc 1337static int nvme_dev_release(struct inode *inode, struct file *file)
1673f1f0 1338{
f3ca80fc
CH		 1339 nvme_put_ctrl(file->private_data);
1340 return 0;
1341}
1342
bfd89471
CH		 1343static int nvme_dev_user_cmd(struct nvme_ctrl *ctrl, void __user *argp)
1344{
1345 struct nvme_ns *ns;
1346 int ret;
1347
1348 mutex_lock(&ctrl->namespaces_mutex);
1349 if (list_empty(&ctrl->namespaces)) {
1350 ret = -ENOTTY;
1351 goto out_unlock;
1352 }
1353
1354 ns = list_first_entry(&ctrl->namespaces, struct nvme_ns, list);
1355 if (ns != list_last_entry(&ctrl->namespaces, struct nvme_ns, list)) {
1b3c47c1 1356 dev_warn(ctrl->device,
bfd89471
CH		 1357 "NVME_IOCTL_IO_CMD not supported when multiple namespaces present!\n");
1358 ret = -EINVAL;
1359 goto out_unlock;
1360 }
1361
1b3c47c1 1362 dev_warn(ctrl->device,
bfd89471
CH		 1363 "using deprecated NVME_IOCTL_IO_CMD ioctl on the char device!\n");
1364 kref_get(&ns->kref);
1365 mutex_unlock(&ctrl->namespaces_mutex);
1366
1367 ret = nvme_user_cmd(ctrl, ns, argp);
1368 nvme_put_ns(ns);
1369 return ret;
1370
1371out_unlock:
1372 mutex_unlock(&ctrl->namespaces_mutex);
1373 return ret;
1374}
1375
f3ca80fc
CH		 1376static long nvme_dev_ioctl(struct file *file, unsigned int cmd,
1377 unsigned long arg)
1378{
1379 struct nvme_ctrl *ctrl = file->private_data;
1380 void __user *argp = (void __user *)arg;
f3ca80fc
CH		 1381
1382 switch (cmd) {
1383 case NVME_IOCTL_ADMIN_CMD:
1384 return nvme_user_cmd(ctrl, NULL, argp);
1385 case NVME_IOCTL_IO_CMD:
bfd89471 1386 return nvme_dev_user_cmd(ctrl, argp);
f3ca80fc 1387 case NVME_IOCTL_RESET:
1b3c47c1 1388 dev_warn(ctrl->device, "resetting controller\n");
f3ca80fc
CH		 1389 return ctrl->ops->reset_ctrl(ctrl);
1390 case NVME_IOCTL_SUBSYS_RESET:
1391 return nvme_reset_subsystem(ctrl);
9ec3bb2f
KB		 1392 case NVME_IOCTL_RESCAN:
1393 nvme_queue_scan(ctrl);
1394 return 0;
f3ca80fc
CH		 1395 default:
1396 return -ENOTTY;
1397 }
1398}
1399
1400static const struct file_operations nvme_dev_fops = {
1401 .owner = THIS_MODULE,
1402 .open = nvme_dev_open,
1403 .release = nvme_dev_release,
1404 .unlocked_ioctl = nvme_dev_ioctl,
1405 .compat_ioctl = nvme_dev_ioctl,
1406};
1407
1408static ssize_t nvme_sysfs_reset(struct device *dev,
1409 struct device_attribute *attr, const char *buf,
1410 size_t count)
1411{
1412 struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
1413 int ret;
1414
1415 ret = ctrl->ops->reset_ctrl(ctrl);
1416 if (ret < 0)
1417 return ret;
1418 return count;
1673f1f0 1419}
f3ca80fc 1420static DEVICE_ATTR(reset_controller, S_IWUSR, NULL, nvme_sysfs_reset);
1673f1f0 1421
9ec3bb2f
KB		 1422static ssize_t nvme_sysfs_rescan(struct device *dev,
1423 struct device_attribute *attr, const char *buf,
1424 size_t count)
1425{
1426 struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
1427
1428 nvme_queue_scan(ctrl);
1429 return count;
1430}
1431static DEVICE_ATTR(rescan_controller, S_IWUSR, NULL, nvme_sysfs_rescan);
1432
118472ab
KB		 1433static ssize_t wwid_show(struct device *dev, struct device_attribute *attr,
1434 char *buf)
1435{
40267efd 1436 struct nvme_ns *ns = nvme_get_ns_from_dev(dev);
118472ab
KB		 1437 struct nvme_ctrl *ctrl = ns->ctrl;
1438 int serial_len = sizeof(ctrl->serial);
1439 int model_len = sizeof(ctrl->model);
1440
1441 if (memchr_inv(ns->uuid, 0, sizeof(ns->uuid)))
1442 return sprintf(buf, "eui.%16phN\n", ns->uuid);
1443
1444 if (memchr_inv(ns->eui, 0, sizeof(ns->eui)))
1445 return sprintf(buf, "eui.%8phN\n", ns->eui);
1446
1447 while (ctrl->serial[serial_len - 1] == ' ')
1448 serial_len--;
1449 while (ctrl->model[model_len - 1] == ' ')
1450 model_len--;
1451
1452 return sprintf(buf, "nvme.%04x-%*phN-%*phN-%08x\n", ctrl->vid,
1453 serial_len, ctrl->serial, model_len, ctrl->model, ns->ns_id);
1454}
1455static DEVICE_ATTR(wwid, S_IRUGO, wwid_show, NULL);
1456
2b9b6e86
KB		 1457static ssize_t uuid_show(struct device *dev, struct device_attribute *attr,
1458 char *buf)
1459{
40267efd 1460 struct nvme_ns *ns = nvme_get_ns_from_dev(dev);
2b9b6e86
KB		 1461 return sprintf(buf, "%pU\n", ns->uuid);
1462}
1463static DEVICE_ATTR(uuid, S_IRUGO, uuid_show, NULL);
1464
1465static ssize_t eui_show(struct device *dev, struct device_attribute *attr,
1466 char *buf)
1467{
40267efd 1468 struct nvme_ns *ns = nvme_get_ns_from_dev(dev);
2b9b6e86
KB		 1469 return sprintf(buf, "%8phd\n", ns->eui);
1470}
1471static DEVICE_ATTR(eui, S_IRUGO, eui_show, NULL);
1472
1473static ssize_t nsid_show(struct device *dev, struct device_attribute *attr,
1474 char *buf)
1475{
40267efd 1476 struct nvme_ns *ns = nvme_get_ns_from_dev(dev);
2b9b6e86
KB		 1477 return sprintf(buf, "%d\n", ns->ns_id);
1478}
1479static DEVICE_ATTR(nsid, S_IRUGO, nsid_show, NULL);
1480
1481static struct attribute *nvme_ns_attrs[] = {
118472ab 1482 &dev_attr_wwid.attr,
2b9b6e86
KB		 1483 &dev_attr_uuid.attr,
1484 &dev_attr_eui.attr,
1485 &dev_attr_nsid.attr,
1486 NULL,
1487};
1488
1a353d85 1489static umode_t nvme_ns_attrs_are_visible(struct kobject *kobj,
2b9b6e86
KB		 1490 struct attribute *a, int n)
1491{
1492 struct device *dev = container_of(kobj, struct device, kobj);
40267efd 1493 struct nvme_ns *ns = nvme_get_ns_from_dev(dev);
2b9b6e86
KB		 1494
1495 if (a == &dev_attr_uuid.attr) {
1496 if (!memchr_inv(ns->uuid, 0, sizeof(ns->uuid)))
1497 return 0;
1498 }
1499 if (a == &dev_attr_eui.attr) {
1500 if (!memchr_inv(ns->eui, 0, sizeof(ns->eui)))
1501 return 0;
1502 }
1503 return a->mode;
1504}
1505
1506static const struct attribute_group nvme_ns_attr_group = {
1507 .attrs = nvme_ns_attrs,
1a353d85 1508 .is_visible = nvme_ns_attrs_are_visible,
2b9b6e86
KB		 1509};
1510
931e1c22 1511#define nvme_show_str_function(field) \
779ff756
KB		 1512static ssize_t field##_show(struct device *dev, \
1513 struct device_attribute *attr, char *buf) \
1514{ \
1515 struct nvme_ctrl *ctrl = dev_get_drvdata(dev); \
1516 return sprintf(buf, "%.*s\n", (int)sizeof(ctrl->field), ctrl->field); \
1517} \
1518static DEVICE_ATTR(field, S_IRUGO, field##_show, NULL);
1519
931e1c22
ML		 1520#define nvme_show_int_function(field) \
1521static ssize_t field##_show(struct device *dev, \
1522 struct device_attribute *attr, char *buf) \
1523{ \
1524 struct nvme_ctrl *ctrl = dev_get_drvdata(dev); \
1525 return sprintf(buf, "%d\n", ctrl->field); \
1526} \
1527static DEVICE_ATTR(field, S_IRUGO, field##_show, NULL);
1528
1529nvme_show_str_function(model);
1530nvme_show_str_function(serial);
1531nvme_show_str_function(firmware_rev);
1532nvme_show_int_function(cntlid);
779ff756 1533
1a353d85
ML		 1534static ssize_t nvme_sysfs_delete(struct device *dev,
1535 struct device_attribute *attr, const char *buf,
1536 size_t count)
1537{
1538 struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
1539
1540 if (device_remove_file_self(dev, attr))
1541 ctrl->ops->delete_ctrl(ctrl);
1542 return count;
1543}
1544static DEVICE_ATTR(delete_controller, S_IWUSR, NULL, nvme_sysfs_delete);
1545
1546static ssize_t nvme_sysfs_show_transport(struct device *dev,
1547 struct device_attribute *attr,
1548 char *buf)
1549{
1550 struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
1551
1552 return snprintf(buf, PAGE_SIZE, "%s\n", ctrl->ops->name);
1553}
1554static DEVICE_ATTR(transport, S_IRUGO, nvme_sysfs_show_transport, NULL);
1555
1556static ssize_t nvme_sysfs_show_subsysnqn(struct device *dev,
1557 struct device_attribute *attr,
1558 char *buf)
1559{
1560 struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
1561
1562 return snprintf(buf, PAGE_SIZE, "%s\n",
1563 ctrl->ops->get_subsysnqn(ctrl));
1564}
1565static DEVICE_ATTR(subsysnqn, S_IRUGO, nvme_sysfs_show_subsysnqn, NULL);
1566
1567static ssize_t nvme_sysfs_show_address(struct device *dev,
1568 struct device_attribute *attr,
1569 char *buf)
1570{
1571 struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
1572
1573 return ctrl->ops->get_address(ctrl, buf, PAGE_SIZE);
1574}
1575static DEVICE_ATTR(address, S_IRUGO, nvme_sysfs_show_address, NULL);
1576
779ff756
KB		 1577static struct attribute *nvme_dev_attrs[] = {
1578 &dev_attr_reset_controller.attr,
9ec3bb2f 1579 &dev_attr_rescan_controller.attr,
779ff756
KB		 1580 &dev_attr_model.attr,
1581 &dev_attr_serial.attr,
1582 &dev_attr_firmware_rev.attr,
931e1c22 1583 &dev_attr_cntlid.attr,
1a353d85
ML		 1584 &dev_attr_delete_controller.attr,
1585 &dev_attr_transport.attr,
1586 &dev_attr_subsysnqn.attr,
1587 &dev_attr_address.attr,
779ff756
KB		 1588 NULL
1589};
1590
1a353d85
ML		 1591#define CHECK_ATTR(ctrl, a, name) \
1592 if ((a) == &dev_attr_##name.attr && \
1593 !(ctrl)->ops->get_##name) \
1594 return 0
1595
1596static umode_t nvme_dev_attrs_are_visible(struct kobject *kobj,
1597 struct attribute *a, int n)
1598{
1599 struct device *dev = container_of(kobj, struct device, kobj);
1600 struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
1601
1602 if (a == &dev_attr_delete_controller.attr) {
1603 if (!ctrl->ops->delete_ctrl)
1604 return 0;
1605 }
1606
1607 CHECK_ATTR(ctrl, a, subsysnqn);
1608 CHECK_ATTR(ctrl, a, address);
1609
1610 return a->mode;
1611}
1612
779ff756 1613static struct attribute_group nvme_dev_attrs_group = {
1a353d85
ML		 1614 .attrs = nvme_dev_attrs,
1615 .is_visible = nvme_dev_attrs_are_visible,
779ff756
KB		 1616};
1617
1618static const struct attribute_group *nvme_dev_attr_groups[] = {
1619 &nvme_dev_attrs_group,
1620 NULL,
1621};
1622
5bae7f73
CH		 1623static int ns_cmp(void *priv, struct list_head *a, struct list_head *b)
1624{
1625 struct nvme_ns *nsa = container_of(a, struct nvme_ns, list);
1626 struct nvme_ns *nsb = container_of(b, struct nvme_ns, list);
1627
1628 return nsa->ns_id - nsb->ns_id;
1629}
1630
32f0c4af 1631static struct nvme_ns *nvme_find_get_ns(struct nvme_ctrl *ctrl, unsigned nsid)
5bae7f73 1632{
32f0c4af 1633 struct nvme_ns *ns, *ret = NULL;
69d3b8ac 1634
32f0c4af 1635 mutex_lock(&ctrl->namespaces_mutex);
5bae7f73 1636 list_for_each_entry(ns, &ctrl->namespaces, list) {
32f0c4af
KB		 1637 if (ns->ns_id == nsid) {
1638 kref_get(&ns->kref);
1639 ret = ns;
1640 break;
1641 }
5bae7f73
CH		 1642 if (ns->ns_id > nsid)
1643 break;
1644 }
32f0c4af
KB		 1645 mutex_unlock(&ctrl->namespaces_mutex);
1646 return ret;
5bae7f73
CH		 1647}
1648
1649static void nvme_alloc_ns(struct nvme_ctrl *ctrl, unsigned nsid)
1650{
1651 struct nvme_ns *ns;
1652 struct gendisk *disk;
ac81bfa9
MB		 1653 struct nvme_id_ns *id;
1654 char disk_name[DISK_NAME_LEN];
5bae7f73
CH		 1655 int node = dev_to_node(ctrl->dev);
1656
1657 ns = kzalloc_node(sizeof(*ns), GFP_KERNEL, node);
1658 if (!ns)
1659 return;
1660
075790eb
KB		 1661 ns->instance = ida_simple_get(&ctrl->ns_ida, 1, 0, GFP_KERNEL);
1662 if (ns->instance < 0)
1663 goto out_free_ns;
1664
5bae7f73
CH		 1665 ns->queue = blk_mq_init_queue(ctrl->tagset);
1666 if (IS_ERR(ns->queue))
075790eb 1667 goto out_release_instance;
5bae7f73
CH		 1668 queue_flag_set_unlocked(QUEUE_FLAG_NONROT, ns->queue);
1669 ns->queue->queuedata = ns;
1670 ns->ctrl = ctrl;
1671
5bae7f73
CH		 1672 kref_init(&ns->kref);
1673 ns->ns_id = nsid;
5bae7f73 1674 ns->lba_shift = 9; /* set to a default value for 512 until disk is validated */
5bae7f73
CH		 1675
1676 blk_queue_logical_block_size(ns->queue, 1 << ns->lba_shift);
da35825d 1677 nvme_set_queue_limits(ctrl, ns->queue);
5bae7f73 1678
ac81bfa9 1679 sprintf(disk_name, "nvme%dn%d", ctrl->instance, ns->instance);
5bae7f73 1680
ac81bfa9
MB		 1681 if (nvme_revalidate_ns(ns, &id))
1682 goto out_free_queue;
1683
1684 if (nvme_nvm_ns_supported(ns, id)) {
40267efd
SL		 1685 if (nvme_nvm_register(ns, disk_name, node,
1686 &nvme_ns_attr_group)) {
b0b4e09c
MB		 1687 dev_warn(ctrl->dev, "%s: LightNVM init failure\n",
1688 __func__);
ac81bfa9
MB		 1689 goto out_free_id;
1690 }
ac81bfa9
MB		 1691 } else {
1692 disk = alloc_disk_node(0, node);
1693 if (!disk)
1694 goto out_free_id;
1695
1696 disk->fops = &nvme_fops;
1697 disk->private_data = ns;
1698 disk->queue = ns->queue;
1699 disk->flags = GENHD_FL_EXT_DEVT;
1700 memcpy(disk->disk_name, disk_name, DISK_NAME_LEN);
1701 ns->disk = disk;
1702
1703 __nvme_revalidate_disk(disk, id);
1704 }
5bae7f73 1705
32f0c4af
KB		 1706 mutex_lock(&ctrl->namespaces_mutex);
1707 list_add_tail(&ns->list, &ctrl->namespaces);
1708 mutex_unlock(&ctrl->namespaces_mutex);
1709
5bae7f73 1710 kref_get(&ctrl->kref);
ac81bfa9
MB		 1711
1712 kfree(id);
1713
b0b4e09c 1714 if (ns->ndev)
2b9b6e86 1715 return;
5bae7f73 1716
0d52c756 1717 device_add_disk(ctrl->device, ns->disk);
2b9b6e86
KB		 1718 if (sysfs_create_group(&disk_to_dev(ns->disk)->kobj,
1719 &nvme_ns_attr_group))
1720 pr_warn("%s: failed to create sysfs group for identification\n",
1721 ns->disk->disk_name);
5bae7f73 1722 return;
ac81bfa9
MB		 1723 out_free_id:
1724 kfree(id);
5bae7f73
CH		 1725 out_free_queue:
1726 blk_cleanup_queue(ns->queue);
075790eb
KB		 1727 out_release_instance:
1728 ida_simple_remove(&ctrl->ns_ida, ns->instance);
5bae7f73
CH		 1729 out_free_ns:
1730 kfree(ns);
1731}
1732
1733static void nvme_ns_remove(struct nvme_ns *ns)
1734{
646017a6
KB		 1735 if (test_and_set_bit(NVME_NS_REMOVING, &ns->flags))
1736 return;
69d3b8ac 1737
b0b4e09c 1738 if (ns->disk && ns->disk->flags & GENHD_FL_UP) {
5bae7f73
CH		 1739 if (blk_get_integrity(ns->disk))
1740 blk_integrity_unregister(ns->disk);
2b9b6e86
KB		 1741 sysfs_remove_group(&disk_to_dev(ns->disk)->kobj,
1742 &nvme_ns_attr_group);
5bae7f73 1743 del_gendisk(ns->disk);
5bae7f73
CH		 1744 blk_mq_abort_requeue_list(ns->queue);
1745 blk_cleanup_queue(ns->queue);
1746 }
32f0c4af
KB		 1747
1748 mutex_lock(&ns->ctrl->namespaces_mutex);
5bae7f73 1749 list_del_init(&ns->list);
32f0c4af
KB		 1750 mutex_unlock(&ns->ctrl->namespaces_mutex);
1751
5bae7f73
CH		 1752 nvme_put_ns(ns);
1753}
1754
540c801c
KB		 1755static void nvme_validate_ns(struct nvme_ctrl *ctrl, unsigned nsid)
1756{
1757 struct nvme_ns *ns;
1758
32f0c4af 1759 ns = nvme_find_get_ns(ctrl, nsid);
540c801c 1760 if (ns) {
b0b4e09c 1761 if (ns->disk && revalidate_disk(ns->disk))
540c801c 1762 nvme_ns_remove(ns);
32f0c4af 1763 nvme_put_ns(ns);
540c801c
KB		 1764 } else
1765 nvme_alloc_ns(ctrl, nsid);
1766}
1767
47b0e50a
SB		 1768static void nvme_remove_invalid_namespaces(struct nvme_ctrl *ctrl,
1769 unsigned nsid)
1770{
1771 struct nvme_ns *ns, *next;
1772
1773 list_for_each_entry_safe(ns, next, &ctrl->namespaces, list) {
1774 if (ns->ns_id > nsid)
1775 nvme_ns_remove(ns);
1776 }
1777}
1778
540c801c
KB		 1779static int nvme_scan_ns_list(struct nvme_ctrl *ctrl, unsigned nn)
1780{
1781 struct nvme_ns *ns;
1782 __le32 *ns_list;
1783 unsigned i, j, nsid, prev = 0, num_lists = DIV_ROUND_UP(nn, 1024);
1784 int ret = 0;
1785
1786 ns_list = kzalloc(0x1000, GFP_KERNEL);
1787 if (!ns_list)
1788 return -ENOMEM;
1789
1790 for (i = 0; i < num_lists; i++) {
1791 ret = nvme_identify_ns_list(ctrl, prev, ns_list);
1792 if (ret)
47b0e50a 1793 goto free;
540c801c
KB		 1794
1795 for (j = 0; j < min(nn, 1024U); j++) {
1796 nsid = le32_to_cpu(ns_list[j]);
1797 if (!nsid)
1798 goto out;
1799
1800 nvme_validate_ns(ctrl, nsid);
1801
1802 while (++prev < nsid) {
32f0c4af
KB		 1803 ns = nvme_find_get_ns(ctrl, prev);
1804 if (ns) {
540c801c 1805 nvme_ns_remove(ns);
32f0c4af
KB		 1806 nvme_put_ns(ns);
1807 }
540c801c
KB		 1808 }
1809 }
1810 nn -= j;
1811 }
1812 out:
47b0e50a
SB		 1813 nvme_remove_invalid_namespaces(ctrl, prev);
1814 free:
540c801c
KB		 1815 kfree(ns_list);
1816 return ret;
1817}
1818
5955be21 1819static void nvme_scan_ns_sequential(struct nvme_ctrl *ctrl, unsigned nn)
5bae7f73 1820{
5bae7f73
CH		 1821 unsigned i;
1822
540c801c
KB		 1823 for (i = 1; i <= nn; i++)
1824 nvme_validate_ns(ctrl, i);
1825
47b0e50a 1826 nvme_remove_invalid_namespaces(ctrl, nn);
5bae7f73
CH		 1827}
1828
5955be21 1829static void nvme_scan_work(struct work_struct *work)
5bae7f73 1830{
5955be21
CH		 1831 struct nvme_ctrl *ctrl =
1832 container_of(work, struct nvme_ctrl, scan_work);
5bae7f73 1833 struct nvme_id_ctrl *id;
540c801c 1834 unsigned nn;
5bae7f73 1835
5955be21
CH		 1836 if (ctrl->state != NVME_CTRL_LIVE)
1837 return;
1838
5bae7f73
CH		 1839 if (nvme_identify_ctrl(ctrl, &id))
1840 return;
540c801c
KB		 1841
1842 nn = le32_to_cpu(id->nn);
1843 if (ctrl->vs >= NVME_VS(1, 1) &&
1844 !(ctrl->quirks & NVME_QUIRK_IDENTIFY_CNS)) {
1845 if (!nvme_scan_ns_list(ctrl, nn))
1846 goto done;
1847 }
5955be21 1848 nvme_scan_ns_sequential(ctrl, nn);
540c801c 1849 done:
32f0c4af 1850 mutex_lock(&ctrl->namespaces_mutex);
540c801c 1851 list_sort(NULL, &ctrl->namespaces, ns_cmp);
69d3b8ac 1852 mutex_unlock(&ctrl->namespaces_mutex);
5bae7f73 1853 kfree(id);
5955be21
CH		 1854
1855 if (ctrl->ops->post_scan)
1856 ctrl->ops->post_scan(ctrl);
5bae7f73 1857}
5955be21
CH		 1858
1859void nvme_queue_scan(struct nvme_ctrl *ctrl)
1860{
1861 /*
1862 * Do not queue new scan work when a controller is reset during
1863 * removal.
1864 */
1865 if (ctrl->state == NVME_CTRL_LIVE)
1866 schedule_work(&ctrl->scan_work);
1867}
1868EXPORT_SYMBOL_GPL(nvme_queue_scan);
5bae7f73 1869
32f0c4af
KB		 1870/*
1871 * This function iterates the namespace list unlocked to allow recovery from
1872 * controller failure. It is up to the caller to ensure the namespace list is
1873 * not modified by scan work while this function is executing.
1874 */
5bae7f73
CH		 1875void nvme_remove_namespaces(struct nvme_ctrl *ctrl)
1876{
1877 struct nvme_ns *ns, *next;
1878
0ff9d4e1
KB		 1879 /*
1880 * The dead states indicates the controller was not gracefully
1881 * disconnected. In that case, we won't be able to flush any data while
1882 * removing the namespaces' disks; fail all the queues now to avoid
1883 * potentially having to clean up the failed sync later.
1884 */
1885 if (ctrl->state == NVME_CTRL_DEAD)
1886 nvme_kill_queues(ctrl);
1887
5bae7f73
CH		 1888 list_for_each_entry_safe(ns, next, &ctrl->namespaces, list)
1889 nvme_ns_remove(ns);
1890}
576d55d6 1891EXPORT_SYMBOL_GPL(nvme_remove_namespaces);
5bae7f73 1892
f866fc42
CH		 1893static void nvme_async_event_work(struct work_struct *work)
1894{
1895 struct nvme_ctrl *ctrl =
1896 container_of(work, struct nvme_ctrl, async_event_work);
1897
1898 spin_lock_irq(&ctrl->lock);
1899 while (ctrl->event_limit > 0) {
1900 int aer_idx = --ctrl->event_limit;
1901
1902 spin_unlock_irq(&ctrl->lock);
1903 ctrl->ops->submit_async_event(ctrl, aer_idx);
1904 spin_lock_irq(&ctrl->lock);
1905 }
1906 spin_unlock_irq(&ctrl->lock);
1907}
1908
1909void nvme_complete_async_event(struct nvme_ctrl *ctrl,
1910 struct nvme_completion *cqe)
1911{
1912 u16 status = le16_to_cpu(cqe->status) >> 1;
1913 u32 result = le32_to_cpu(cqe->result);
1914
1915 if (status == NVME_SC_SUCCESS || status == NVME_SC_ABORT_REQ) {
1916 ++ctrl->event_limit;
1917 schedule_work(&ctrl->async_event_work);
1918 }
1919
1920 if (status != NVME_SC_SUCCESS)
1921 return;
1922
1923 switch (result & 0xff07) {
1924 case NVME_AER_NOTICE_NS_CHANGED:
1925 dev_info(ctrl->device, "rescanning\n");
1926 nvme_queue_scan(ctrl);
1927 break;
1928 default:
1929 dev_warn(ctrl->device, "async event result %08x\n", result);
1930 }
1931}
1932EXPORT_SYMBOL_GPL(nvme_complete_async_event);
1933
1934void nvme_queue_async_events(struct nvme_ctrl *ctrl)
1935{
1936 ctrl->event_limit = NVME_NR_AERS;
1937 schedule_work(&ctrl->async_event_work);
1938}
1939EXPORT_SYMBOL_GPL(nvme_queue_async_events);
1940
f3ca80fc
CH		 1941static DEFINE_IDA(nvme_instance_ida);
1942
1943static int nvme_set_instance(struct nvme_ctrl *ctrl)
1944{
1945 int instance, error;
1946
1947 do {
1948 if (!ida_pre_get(&nvme_instance_ida, GFP_KERNEL))
1949 return -ENODEV;
1950
1951 spin_lock(&dev_list_lock);
1952 error = ida_get_new(&nvme_instance_ida, &instance);
1953 spin_unlock(&dev_list_lock);
1954 } while (error == -EAGAIN);
1955
1956 if (error)
1957 return -ENODEV;
1958
1959 ctrl->instance = instance;
1960 return 0;
1961}
1962
1963static void nvme_release_instance(struct nvme_ctrl *ctrl)
1964{
1965 spin_lock(&dev_list_lock);
1966 ida_remove(&nvme_instance_ida, ctrl->instance);
1967 spin_unlock(&dev_list_lock);
1968}
1969
53029b04 1970void nvme_uninit_ctrl(struct nvme_ctrl *ctrl)
576d55d6 1971{
f866fc42 1972 flush_work(&ctrl->async_event_work);
5955be21
CH		 1973 flush_work(&ctrl->scan_work);
1974 nvme_remove_namespaces(ctrl);
1975
53029b04 1976 device_destroy(nvme_class, MKDEV(nvme_char_major, ctrl->instance));
f3ca80fc
CH		 1977
1978 spin_lock(&dev_list_lock);
1979 list_del(&ctrl->node);
1980 spin_unlock(&dev_list_lock);
53029b04 1981}
576d55d6 1982EXPORT_SYMBOL_GPL(nvme_uninit_ctrl);
53029b04
KB		 1983
1984static void nvme_free_ctrl(struct kref *kref)
1985{
1986 struct nvme_ctrl *ctrl = container_of(kref, struct nvme_ctrl, kref);
f3ca80fc
CH		 1987
1988 put_device(ctrl->device);
1989 nvme_release_instance(ctrl);
075790eb 1990 ida_destroy(&ctrl->ns_ida);
f3ca80fc
CH		 1991
1992 ctrl->ops->free_ctrl(ctrl);
1993}
1994
1995void nvme_put_ctrl(struct nvme_ctrl *ctrl)
1996{
1997 kref_put(&ctrl->kref, nvme_free_ctrl);
1998}
576d55d6 1999EXPORT_SYMBOL_GPL(nvme_put_ctrl);
f3ca80fc
CH		 2000
2001/*
2002 * Initialize a NVMe controller structures. This needs to be called during
2003 * earliest initialization so that we have the initialized structured around
2004 * during probing.
2005 */
2006int nvme_init_ctrl(struct nvme_ctrl *ctrl, struct device *dev,
2007 const struct nvme_ctrl_ops *ops, unsigned long quirks)
2008{
2009 int ret;
2010
bb8d261e
CH		 2011 ctrl->state = NVME_CTRL_NEW;
2012 spin_lock_init(&ctrl->lock);
f3ca80fc 2013 INIT_LIST_HEAD(&ctrl->namespaces);
69d3b8ac 2014 mutex_init(&ctrl->namespaces_mutex);
f3ca80fc
CH		 2015 kref_init(&ctrl->kref);
2016 ctrl->dev = dev;
2017 ctrl->ops = ops;
2018 ctrl->quirks = quirks;
5955be21 2019 INIT_WORK(&ctrl->scan_work, nvme_scan_work);
f866fc42 2020 INIT_WORK(&ctrl->async_event_work, nvme_async_event_work);
f3ca80fc
CH		 2021
2022 ret = nvme_set_instance(ctrl);
2023 if (ret)
2024 goto out;
2025
779ff756 2026 ctrl->device = device_create_with_groups(nvme_class, ctrl->dev,
f3ca80fc 2027 MKDEV(nvme_char_major, ctrl->instance),
f4f0f63e 2028 ctrl, nvme_dev_attr_groups,
779ff756 2029 "nvme%d", ctrl->instance);
f3ca80fc
CH		 2030 if (IS_ERR(ctrl->device)) {
2031 ret = PTR_ERR(ctrl->device);
2032 goto out_release_instance;
2033 }
2034 get_device(ctrl->device);
075790eb 2035 ida_init(&ctrl->ns_ida);
f3ca80fc 2036
f3ca80fc
CH		 2037 spin_lock(&dev_list_lock);
2038 list_add_tail(&ctrl->node, &nvme_ctrl_list);
2039 spin_unlock(&dev_list_lock);
2040
2041 return 0;
f3ca80fc
CH		 2042out_release_instance:
2043 nvme_release_instance(ctrl);
2044out:
2045 return ret;
2046}
576d55d6 2047EXPORT_SYMBOL_GPL(nvme_init_ctrl);
f3ca80fc 2048
69d9a99c
KB		 2049/**
2050 * nvme_kill_queues(): Ends all namespace queues
2051 * @ctrl: the dead controller that needs to end
2052 *
2053 * Call this function when the driver determines it is unable to get the
2054 * controller in a state capable of servicing IO.
2055 */
2056void nvme_kill_queues(struct nvme_ctrl *ctrl)
2057{
2058 struct nvme_ns *ns;
2059
32f0c4af
KB		 2060 mutex_lock(&ctrl->namespaces_mutex);
2061 list_for_each_entry(ns, &ctrl->namespaces, list) {
69d9a99c
KB		 2062 /*
2063 * Revalidating a dead namespace sets capacity to 0. This will
2064 * end buffered writers dirtying pages that can't be synced.
2065 */
b0b4e09c 2066 if (ns->disk && !test_and_set_bit(NVME_NS_DEAD, &ns->flags))
69d9a99c
KB		 2067 revalidate_disk(ns->disk);
2068
2069 blk_set_queue_dying(ns->queue);
2070 blk_mq_abort_requeue_list(ns->queue);
2071 blk_mq_start_stopped_hw_queues(ns->queue, true);
69d9a99c 2072 }
32f0c4af 2073 mutex_unlock(&ctrl->namespaces_mutex);
69d9a99c 2074}
237045fc 2075EXPORT_SYMBOL_GPL(nvme_kill_queues);
69d9a99c 2076
25646264 2077void nvme_stop_queues(struct nvme_ctrl *ctrl)
363c9aac
SG		 2078{
2079 struct nvme_ns *ns;
2080
32f0c4af
KB		 2081 mutex_lock(&ctrl->namespaces_mutex);
2082 list_for_each_entry(ns, &ctrl->namespaces, list) {
363c9aac
SG		 2083 spin_lock_irq(ns->queue->queue_lock);
2084 queue_flag_set(QUEUE_FLAG_STOPPED, ns->queue);
2085 spin_unlock_irq(ns->queue->queue_lock);
2086
2087 blk_mq_cancel_requeue_work(ns->queue);
2088 blk_mq_stop_hw_queues(ns->queue);
2089 }
32f0c4af 2090 mutex_unlock(&ctrl->namespaces_mutex);
363c9aac 2091}
576d55d6 2092EXPORT_SYMBOL_GPL(nvme_stop_queues);
363c9aac 2093
25646264 2094void nvme_start_queues(struct nvme_ctrl *ctrl)
363c9aac
SG		 2095{
2096 struct nvme_ns *ns;
2097
32f0c4af
KB		 2098 mutex_lock(&ctrl->namespaces_mutex);
2099 list_for_each_entry(ns, &ctrl->namespaces, list) {
363c9aac 2100 queue_flag_clear_unlocked(QUEUE_FLAG_STOPPED, ns->queue);
363c9aac
SG		 2101 blk_mq_start_stopped_hw_queues(ns->queue, true);
2102 blk_mq_kick_requeue_list(ns->queue);
2103 }
32f0c4af 2104 mutex_unlock(&ctrl->namespaces_mutex);
363c9aac 2105}
576d55d6 2106EXPORT_SYMBOL_GPL(nvme_start_queues);
363c9aac 2107
5bae7f73
CH		 2108int __init nvme_core_init(void)
2109{
2110 int result;
2111
f3ca80fc
CH		 2112 result = __register_chrdev(nvme_char_major, 0, NVME_MINORS, "nvme",
2113 &nvme_dev_fops);
2114 if (result < 0)
b09dcf58 2115 return result;
f3ca80fc
CH		 2116 else if (result > 0)
2117 nvme_char_major = result;
2118
2119 nvme_class = class_create(THIS_MODULE, "nvme");
2120 if (IS_ERR(nvme_class)) {
2121 result = PTR_ERR(nvme_class);
2122 goto unregister_chrdev;
2123 }
2124
5bae7f73 2125 return 0;
f3ca80fc
CH		 2126
2127 unregister_chrdev:
2128 __unregister_chrdev(nvme_char_major, 0, NVME_MINORS, "nvme");
f3ca80fc 2129 return result;
5bae7f73
CH		 2130}
2131
2132void nvme_core_exit(void)
2133{
f3ca80fc
CH		 2134 class_destroy(nvme_class);
2135 __unregister_chrdev(nvme_char_major, 0, NVME_MINORS, "nvme");
5bae7f73 2136}
576d55d6
ML		 2137
2138MODULE_LICENSE("GPL");
2139MODULE_VERSION("1.0");
2140module_init(nvme_core_init);
2141module_exit(nvme_core_exit);
Linux 6.x block layer and io_uring tree(s)