nvme: move namespace scanning to core
[linux-2.6-block.git] / drivers / nvme / host / core.c
CommitLineData
21d34711
CH
1/*
2 * NVM Express device driver
3 * Copyright (c) 2011-2014, Intel Corporation.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License,
7 * version 2, as published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 */
14
15#include <linux/blkdev.h>
16#include <linux/blk-mq.h>
5fd4ce1b 17#include <linux/delay.h>
21d34711 18#include <linux/errno.h>
1673f1f0 19#include <linux/hdreg.h>
21d34711 20#include <linux/kernel.h>
5bae7f73
CH
21#include <linux/module.h>
22#include <linux/list_sort.h>
21d34711
CH
23#include <linux/slab.h>
24#include <linux/types.h>
1673f1f0
CH
25#include <linux/pr.h>
26#include <linux/ptrace.h>
27#include <linux/nvme_ioctl.h>
28#include <linux/t10-pi.h>
29#include <scsi/sg.h>
30#include <asm/unaligned.h>
21d34711
CH
31
32#include "nvme.h"
33
f3ca80fc
CH
34#define NVME_MINORS (1U << MINORBITS)
35
ba0ba7d3
ML
36unsigned char admin_timeout = 60;
37module_param(admin_timeout, byte, 0644);
38MODULE_PARM_DESC(admin_timeout, "timeout in seconds for admin commands");
576d55d6 39EXPORT_SYMBOL_GPL(admin_timeout);
ba0ba7d3
ML
40
41unsigned char nvme_io_timeout = 30;
42module_param_named(io_timeout, nvme_io_timeout, byte, 0644);
43MODULE_PARM_DESC(io_timeout, "timeout in seconds for I/O");
576d55d6 44EXPORT_SYMBOL_GPL(nvme_io_timeout);
ba0ba7d3
ML
45
46unsigned char shutdown_timeout = 5;
47module_param(shutdown_timeout, byte, 0644);
48MODULE_PARM_DESC(shutdown_timeout, "timeout in seconds for controller shutdown");
49
5bae7f73
CH
50static int nvme_major;
51module_param(nvme_major, int, 0);
52
f3ca80fc
CH
53static int nvme_char_major;
54module_param(nvme_char_major, int, 0);
55
56static LIST_HEAD(nvme_ctrl_list);
9f2482b9 57static DEFINE_SPINLOCK(dev_list_lock);
1673f1f0 58
f3ca80fc
CH
59static struct class *nvme_class;
60
bb8d261e
CH
61bool nvme_change_ctrl_state(struct nvme_ctrl *ctrl,
62 enum nvme_ctrl_state new_state)
63{
64 enum nvme_ctrl_state old_state = ctrl->state;
65 bool changed = false;
66
67 spin_lock_irq(&ctrl->lock);
68 switch (new_state) {
69 case NVME_CTRL_LIVE:
70 switch (old_state) {
71 case NVME_CTRL_RESETTING:
72 changed = true;
73 /* FALLTHRU */
74 default:
75 break;
76 }
77 break;
78 case NVME_CTRL_RESETTING:
79 switch (old_state) {
80 case NVME_CTRL_NEW:
81 case NVME_CTRL_LIVE:
82 changed = true;
83 /* FALLTHRU */
84 default:
85 break;
86 }
87 break;
88 case NVME_CTRL_DELETING:
89 switch (old_state) {
90 case NVME_CTRL_LIVE:
91 case NVME_CTRL_RESETTING:
92 changed = true;
93 /* FALLTHRU */
94 default:
95 break;
96 }
97 break;
98 default:
99 break;
100 }
101 spin_unlock_irq(&ctrl->lock);
102
103 if (changed)
104 ctrl->state = new_state;
105
106 return changed;
107}
108EXPORT_SYMBOL_GPL(nvme_change_ctrl_state);
109
1673f1f0
CH
110static void nvme_free_ns(struct kref *kref)
111{
112 struct nvme_ns *ns = container_of(kref, struct nvme_ns, kref);
113
114 if (ns->type == NVME_NS_LIGHTNVM)
115 nvme_nvm_unregister(ns->queue, ns->disk->disk_name);
116
117 spin_lock(&dev_list_lock);
118 ns->disk->private_data = NULL;
119 spin_unlock(&dev_list_lock);
120
1673f1f0 121 put_disk(ns->disk);
075790eb
KB
122 ida_simple_remove(&ns->ctrl->ns_ida, ns->instance);
123 nvme_put_ctrl(ns->ctrl);
1673f1f0
CH
124 kfree(ns);
125}
126
5bae7f73 127static void nvme_put_ns(struct nvme_ns *ns)
1673f1f0
CH
128{
129 kref_put(&ns->kref, nvme_free_ns);
130}
131
132static struct nvme_ns *nvme_get_ns_from_disk(struct gendisk *disk)
133{
134 struct nvme_ns *ns;
135
136 spin_lock(&dev_list_lock);
137 ns = disk->private_data;
e439bb12
SG
138 if (ns) {
139 if (!kref_get_unless_zero(&ns->kref))
140 goto fail;
141 if (!try_module_get(ns->ctrl->ops->module))
142 goto fail_put_ns;
143 }
1673f1f0
CH
144 spin_unlock(&dev_list_lock);
145
146 return ns;
e439bb12
SG
147
148fail_put_ns:
149 kref_put(&ns->kref, nvme_free_ns);
150fail:
151 spin_unlock(&dev_list_lock);
152 return NULL;
1673f1f0
CH
153}
154
7688faa6
CH
155void nvme_requeue_req(struct request *req)
156{
157 unsigned long flags;
158
159 blk_mq_requeue_request(req);
160 spin_lock_irqsave(req->q->queue_lock, flags);
161 if (!blk_queue_stopped(req->q))
162 blk_mq_kick_requeue_list(req->q);
163 spin_unlock_irqrestore(req->q->queue_lock, flags);
164}
576d55d6 165EXPORT_SYMBOL_GPL(nvme_requeue_req);
7688faa6 166
4160982e
CH
167struct request *nvme_alloc_request(struct request_queue *q,
168 struct nvme_command *cmd, unsigned int flags)
21d34711
CH
169{
170 bool write = cmd->common.opcode & 1;
21d34711 171 struct request *req;
21d34711 172
4160982e 173 req = blk_mq_alloc_request(q, write, flags);
21d34711 174 if (IS_ERR(req))
4160982e 175 return req;
21d34711
CH
176
177 req->cmd_type = REQ_TYPE_DRV_PRIV;
178 req->cmd_flags |= REQ_FAILFAST_DRIVER;
179 req->__data_len = 0;
180 req->__sector = (sector_t) -1;
181 req->bio = req->biotail = NULL;
182
21d34711
CH
183 req->cmd = (unsigned char *)cmd;
184 req->cmd_len = sizeof(struct nvme_command);
21d34711 185
4160982e
CH
186 return req;
187}
576d55d6 188EXPORT_SYMBOL_GPL(nvme_alloc_request);
4160982e 189
8093f7ca
ML
190static inline void nvme_setup_flush(struct nvme_ns *ns,
191 struct nvme_command *cmnd)
192{
193 memset(cmnd, 0, sizeof(*cmnd));
194 cmnd->common.opcode = nvme_cmd_flush;
195 cmnd->common.nsid = cpu_to_le32(ns->ns_id);
196}
197
198static inline int nvme_setup_discard(struct nvme_ns *ns, struct request *req,
199 struct nvme_command *cmnd)
200{
201 struct nvme_dsm_range *range;
202 struct page *page;
203 int offset;
204 unsigned int nr_bytes = blk_rq_bytes(req);
205
206 range = kmalloc(sizeof(*range), GFP_ATOMIC);
207 if (!range)
208 return BLK_MQ_RQ_QUEUE_BUSY;
209
210 range->cattr = cpu_to_le32(0);
211 range->nlb = cpu_to_le32(nr_bytes >> ns->lba_shift);
212 range->slba = cpu_to_le64(nvme_block_nr(ns, blk_rq_pos(req)));
213
214 memset(cmnd, 0, sizeof(*cmnd));
215 cmnd->dsm.opcode = nvme_cmd_dsm;
216 cmnd->dsm.nsid = cpu_to_le32(ns->ns_id);
217 cmnd->dsm.nr = 0;
218 cmnd->dsm.attributes = cpu_to_le32(NVME_DSMGMT_AD);
219
220 req->completion_data = range;
221 page = virt_to_page(range);
222 offset = offset_in_page(range);
223 blk_add_request_payload(req, page, offset, sizeof(*range));
224
225 /*
226 * we set __data_len back to the size of the area to be discarded
227 * on disk. This allows us to report completion on the full amount
228 * of blocks described by the request.
229 */
230 req->__data_len = nr_bytes;
231
232 return 0;
233}
234
235static inline void nvme_setup_rw(struct nvme_ns *ns, struct request *req,
236 struct nvme_command *cmnd)
237{
238 u16 control = 0;
239 u32 dsmgmt = 0;
240
241 if (req->cmd_flags & REQ_FUA)
242 control |= NVME_RW_FUA;
243 if (req->cmd_flags & (REQ_FAILFAST_DEV | REQ_RAHEAD))
244 control |= NVME_RW_LR;
245
246 if (req->cmd_flags & REQ_RAHEAD)
247 dsmgmt |= NVME_RW_DSM_FREQ_PREFETCH;
248
249 memset(cmnd, 0, sizeof(*cmnd));
250 cmnd->rw.opcode = (rq_data_dir(req) ? nvme_cmd_write : nvme_cmd_read);
251 cmnd->rw.command_id = req->tag;
252 cmnd->rw.nsid = cpu_to_le32(ns->ns_id);
253 cmnd->rw.slba = cpu_to_le64(nvme_block_nr(ns, blk_rq_pos(req)));
254 cmnd->rw.length = cpu_to_le16((blk_rq_bytes(req) >> ns->lba_shift) - 1);
255
256 if (ns->ms) {
257 switch (ns->pi_type) {
258 case NVME_NS_DPS_PI_TYPE3:
259 control |= NVME_RW_PRINFO_PRCHK_GUARD;
260 break;
261 case NVME_NS_DPS_PI_TYPE1:
262 case NVME_NS_DPS_PI_TYPE2:
263 control |= NVME_RW_PRINFO_PRCHK_GUARD |
264 NVME_RW_PRINFO_PRCHK_REF;
265 cmnd->rw.reftag = cpu_to_le32(
266 nvme_block_nr(ns, blk_rq_pos(req)));
267 break;
268 }
269 if (!blk_integrity_rq(req))
270 control |= NVME_RW_PRINFO_PRACT;
271 }
272
273 cmnd->rw.control = cpu_to_le16(control);
274 cmnd->rw.dsmgmt = cpu_to_le32(dsmgmt);
275}
276
277int nvme_setup_cmd(struct nvme_ns *ns, struct request *req,
278 struct nvme_command *cmd)
279{
280 int ret = 0;
281
282 if (req->cmd_type == REQ_TYPE_DRV_PRIV)
283 memcpy(cmd, req->cmd, sizeof(*cmd));
284 else if (req->cmd_flags & REQ_FLUSH)
285 nvme_setup_flush(ns, cmd);
286 else if (req->cmd_flags & REQ_DISCARD)
287 ret = nvme_setup_discard(ns, req, cmd);
288 else
289 nvme_setup_rw(ns, req, cmd);
290
291 return ret;
292}
293EXPORT_SYMBOL_GPL(nvme_setup_cmd);
294
4160982e
CH
295/*
296 * Returns 0 on success. If the result is negative, it's a Linux error code;
297 * if the result is positive, it's an NVM Express status code
298 */
299int __nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
1cb3cce5
CH
300 struct nvme_completion *cqe, void *buffer, unsigned bufflen,
301 unsigned timeout)
4160982e
CH
302{
303 struct request *req;
304 int ret;
305
306 req = nvme_alloc_request(q, cmd, 0);
307 if (IS_ERR(req))
308 return PTR_ERR(req);
309
310 req->timeout = timeout ? timeout : ADMIN_TIMEOUT;
1cb3cce5 311 req->special = cqe;
4160982e 312
21d34711
CH
313 if (buffer && bufflen) {
314 ret = blk_rq_map_kern(q, req, buffer, bufflen, GFP_KERNEL);
315 if (ret)
316 goto out;
4160982e
CH
317 }
318
319 blk_execute_rq(req->q, NULL, req, 0);
4160982e
CH
320 ret = req->errors;
321 out:
322 blk_mq_free_request(req);
323 return ret;
324}
325
326int nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
327 void *buffer, unsigned bufflen)
328{
1cb3cce5 329 return __nvme_submit_sync_cmd(q, cmd, NULL, buffer, bufflen, 0);
4160982e 330}
576d55d6 331EXPORT_SYMBOL_GPL(nvme_submit_sync_cmd);
4160982e 332
0b7f1f26
KB
333int __nvme_submit_user_cmd(struct request_queue *q, struct nvme_command *cmd,
334 void __user *ubuffer, unsigned bufflen,
335 void __user *meta_buffer, unsigned meta_len, u32 meta_seed,
336 u32 *result, unsigned timeout)
4160982e 337{
0b7f1f26 338 bool write = cmd->common.opcode & 1;
1cb3cce5 339 struct nvme_completion cqe;
0b7f1f26
KB
340 struct nvme_ns *ns = q->queuedata;
341 struct gendisk *disk = ns ? ns->disk : NULL;
4160982e 342 struct request *req;
0b7f1f26
KB
343 struct bio *bio = NULL;
344 void *meta = NULL;
4160982e
CH
345 int ret;
346
347 req = nvme_alloc_request(q, cmd, 0);
348 if (IS_ERR(req))
349 return PTR_ERR(req);
350
351 req->timeout = timeout ? timeout : ADMIN_TIMEOUT;
1cb3cce5 352 req->special = &cqe;
4160982e
CH
353
354 if (ubuffer && bufflen) {
21d34711
CH
355 ret = blk_rq_map_user(q, req, NULL, ubuffer, bufflen,
356 GFP_KERNEL);
357 if (ret)
358 goto out;
359 bio = req->bio;
21d34711 360
0b7f1f26
KB
361 if (!disk)
362 goto submit;
363 bio->bi_bdev = bdget_disk(disk, 0);
364 if (!bio->bi_bdev) {
365 ret = -ENODEV;
366 goto out_unmap;
367 }
368
e9fc63d6 369 if (meta_buffer && meta_len) {
0b7f1f26
KB
370 struct bio_integrity_payload *bip;
371
372 meta = kmalloc(meta_len, GFP_KERNEL);
373 if (!meta) {
374 ret = -ENOMEM;
375 goto out_unmap;
376 }
377
378 if (write) {
379 if (copy_from_user(meta, meta_buffer,
380 meta_len)) {
381 ret = -EFAULT;
382 goto out_free_meta;
383 }
384 }
385
386 bip = bio_integrity_alloc(bio, GFP_KERNEL, 1);
06c1e390
KB
387 if (IS_ERR(bip)) {
388 ret = PTR_ERR(bip);
0b7f1f26
KB
389 goto out_free_meta;
390 }
391
392 bip->bip_iter.bi_size = meta_len;
393 bip->bip_iter.bi_sector = meta_seed;
394
395 ret = bio_integrity_add_page(bio, virt_to_page(meta),
396 meta_len, offset_in_page(meta));
397 if (ret != meta_len) {
398 ret = -ENOMEM;
399 goto out_free_meta;
400 }
401 }
402 }
403 submit:
404 blk_execute_rq(req->q, disk, req, 0);
405 ret = req->errors;
21d34711 406 if (result)
1cb3cce5 407 *result = le32_to_cpu(cqe.result);
0b7f1f26
KB
408 if (meta && !ret && !write) {
409 if (copy_to_user(meta_buffer, meta, meta_len))
410 ret = -EFAULT;
411 }
412 out_free_meta:
413 kfree(meta);
414 out_unmap:
415 if (bio) {
416 if (disk && bio->bi_bdev)
417 bdput(bio->bi_bdev);
418 blk_rq_unmap_user(bio);
419 }
21d34711
CH
420 out:
421 blk_mq_free_request(req);
422 return ret;
423}
424
0b7f1f26
KB
425int nvme_submit_user_cmd(struct request_queue *q, struct nvme_command *cmd,
426 void __user *ubuffer, unsigned bufflen, u32 *result,
427 unsigned timeout)
428{
429 return __nvme_submit_user_cmd(q, cmd, ubuffer, bufflen, NULL, 0, 0,
430 result, timeout);
431}
432
1c63dc66 433int nvme_identify_ctrl(struct nvme_ctrl *dev, struct nvme_id_ctrl **id)
21d34711
CH
434{
435 struct nvme_command c = { };
436 int error;
437
438 /* gcc-4.4.4 (at least) has issues with initializers and anon unions */
439 c.identify.opcode = nvme_admin_identify;
440 c.identify.cns = cpu_to_le32(1);
441
442 *id = kmalloc(sizeof(struct nvme_id_ctrl), GFP_KERNEL);
443 if (!*id)
444 return -ENOMEM;
445
446 error = nvme_submit_sync_cmd(dev->admin_q, &c, *id,
447 sizeof(struct nvme_id_ctrl));
448 if (error)
449 kfree(*id);
450 return error;
451}
452
540c801c
KB
453static int nvme_identify_ns_list(struct nvme_ctrl *dev, unsigned nsid, __le32 *ns_list)
454{
455 struct nvme_command c = { };
456
457 c.identify.opcode = nvme_admin_identify;
458 c.identify.cns = cpu_to_le32(2);
459 c.identify.nsid = cpu_to_le32(nsid);
460 return nvme_submit_sync_cmd(dev->admin_q, &c, ns_list, 0x1000);
461}
462
1c63dc66 463int nvme_identify_ns(struct nvme_ctrl *dev, unsigned nsid,
21d34711
CH
464 struct nvme_id_ns **id)
465{
466 struct nvme_command c = { };
467 int error;
468
469 /* gcc-4.4.4 (at least) has issues with initializers and anon unions */
470 c.identify.opcode = nvme_admin_identify,
471 c.identify.nsid = cpu_to_le32(nsid),
472
473 *id = kmalloc(sizeof(struct nvme_id_ns), GFP_KERNEL);
474 if (!*id)
475 return -ENOMEM;
476
477 error = nvme_submit_sync_cmd(dev->admin_q, &c, *id,
478 sizeof(struct nvme_id_ns));
479 if (error)
480 kfree(*id);
481 return error;
482}
483
1c63dc66 484int nvme_get_features(struct nvme_ctrl *dev, unsigned fid, unsigned nsid,
21d34711
CH
485 dma_addr_t dma_addr, u32 *result)
486{
487 struct nvme_command c;
1cb3cce5
CH
488 struct nvme_completion cqe;
489 int ret;
21d34711
CH
490
491 memset(&c, 0, sizeof(c));
492 c.features.opcode = nvme_admin_get_features;
493 c.features.nsid = cpu_to_le32(nsid);
494 c.features.prp1 = cpu_to_le64(dma_addr);
495 c.features.fid = cpu_to_le32(fid);
496
1cb3cce5
CH
497 ret = __nvme_submit_sync_cmd(dev->admin_q, &c, &cqe, NULL, 0, 0);
498 if (ret >= 0)
499 *result = le32_to_cpu(cqe.result);
500 return ret;
21d34711
CH
501}
502
1c63dc66 503int nvme_set_features(struct nvme_ctrl *dev, unsigned fid, unsigned dword11,
21d34711
CH
504 dma_addr_t dma_addr, u32 *result)
505{
506 struct nvme_command c;
1cb3cce5
CH
507 struct nvme_completion cqe;
508 int ret;
21d34711
CH
509
510 memset(&c, 0, sizeof(c));
511 c.features.opcode = nvme_admin_set_features;
512 c.features.prp1 = cpu_to_le64(dma_addr);
513 c.features.fid = cpu_to_le32(fid);
514 c.features.dword11 = cpu_to_le32(dword11);
515
1cb3cce5
CH
516 ret = __nvme_submit_sync_cmd(dev->admin_q, &c, &cqe, NULL, 0, 0);
517 if (ret >= 0)
518 *result = le32_to_cpu(cqe.result);
519 return ret;
21d34711
CH
520}
521
1c63dc66 522int nvme_get_log_page(struct nvme_ctrl *dev, struct nvme_smart_log **log)
21d34711
CH
523{
524 struct nvme_command c = { };
525 int error;
526
527 c.common.opcode = nvme_admin_get_log_page,
528 c.common.nsid = cpu_to_le32(0xFFFFFFFF),
529 c.common.cdw10[0] = cpu_to_le32(
530 (((sizeof(struct nvme_smart_log) / 4) - 1) << 16) |
531 NVME_LOG_SMART),
532
533 *log = kmalloc(sizeof(struct nvme_smart_log), GFP_KERNEL);
534 if (!*log)
535 return -ENOMEM;
536
537 error = nvme_submit_sync_cmd(dev->admin_q, &c, *log,
538 sizeof(struct nvme_smart_log));
539 if (error)
540 kfree(*log);
541 return error;
542}
1673f1f0 543
9a0be7ab
CH
544int nvme_set_queue_count(struct nvme_ctrl *ctrl, int *count)
545{
546 u32 q_count = (*count - 1) | ((*count - 1) << 16);
547 u32 result;
548 int status, nr_io_queues;
549
550 status = nvme_set_features(ctrl, NVME_FEAT_NUM_QUEUES, q_count, 0,
551 &result);
552 if (status)
553 return status;
554
555 nr_io_queues = min(result & 0xffff, result >> 16) + 1;
556 *count = min(*count, nr_io_queues);
557 return 0;
558}
576d55d6 559EXPORT_SYMBOL_GPL(nvme_set_queue_count);
9a0be7ab 560
1673f1f0
CH
561static int nvme_submit_io(struct nvme_ns *ns, struct nvme_user_io __user *uio)
562{
563 struct nvme_user_io io;
564 struct nvme_command c;
565 unsigned length, meta_len;
566 void __user *metadata;
567
568 if (copy_from_user(&io, uio, sizeof(io)))
569 return -EFAULT;
63088ec7
KB
570 if (io.flags)
571 return -EINVAL;
1673f1f0
CH
572
573 switch (io.opcode) {
574 case nvme_cmd_write:
575 case nvme_cmd_read:
576 case nvme_cmd_compare:
577 break;
578 default:
579 return -EINVAL;
580 }
581
582 length = (io.nblocks + 1) << ns->lba_shift;
583 meta_len = (io.nblocks + 1) * ns->ms;
584 metadata = (void __user *)(uintptr_t)io.metadata;
585
586 if (ns->ext) {
587 length += meta_len;
588 meta_len = 0;
589 } else if (meta_len) {
590 if ((io.metadata & 3) || !io.metadata)
591 return -EINVAL;
592 }
593
594 memset(&c, 0, sizeof(c));
595 c.rw.opcode = io.opcode;
596 c.rw.flags = io.flags;
597 c.rw.nsid = cpu_to_le32(ns->ns_id);
598 c.rw.slba = cpu_to_le64(io.slba);
599 c.rw.length = cpu_to_le16(io.nblocks);
600 c.rw.control = cpu_to_le16(io.control);
601 c.rw.dsmgmt = cpu_to_le32(io.dsmgmt);
602 c.rw.reftag = cpu_to_le32(io.reftag);
603 c.rw.apptag = cpu_to_le16(io.apptag);
604 c.rw.appmask = cpu_to_le16(io.appmask);
605
606 return __nvme_submit_user_cmd(ns->queue, &c,
607 (void __user *)(uintptr_t)io.addr, length,
608 metadata, meta_len, io.slba, NULL, 0);
609}
610
f3ca80fc 611static int nvme_user_cmd(struct nvme_ctrl *ctrl, struct nvme_ns *ns,
1673f1f0
CH
612 struct nvme_passthru_cmd __user *ucmd)
613{
614 struct nvme_passthru_cmd cmd;
615 struct nvme_command c;
616 unsigned timeout = 0;
617 int status;
618
619 if (!capable(CAP_SYS_ADMIN))
620 return -EACCES;
621 if (copy_from_user(&cmd, ucmd, sizeof(cmd)))
622 return -EFAULT;
63088ec7
KB
623 if (cmd.flags)
624 return -EINVAL;
1673f1f0
CH
625
626 memset(&c, 0, sizeof(c));
627 c.common.opcode = cmd.opcode;
628 c.common.flags = cmd.flags;
629 c.common.nsid = cpu_to_le32(cmd.nsid);
630 c.common.cdw2[0] = cpu_to_le32(cmd.cdw2);
631 c.common.cdw2[1] = cpu_to_le32(cmd.cdw3);
632 c.common.cdw10[0] = cpu_to_le32(cmd.cdw10);
633 c.common.cdw10[1] = cpu_to_le32(cmd.cdw11);
634 c.common.cdw10[2] = cpu_to_le32(cmd.cdw12);
635 c.common.cdw10[3] = cpu_to_le32(cmd.cdw13);
636 c.common.cdw10[4] = cpu_to_le32(cmd.cdw14);
637 c.common.cdw10[5] = cpu_to_le32(cmd.cdw15);
638
639 if (cmd.timeout_ms)
640 timeout = msecs_to_jiffies(cmd.timeout_ms);
641
642 status = nvme_submit_user_cmd(ns ? ns->queue : ctrl->admin_q, &c,
d1ea7be5 643 (void __user *)(uintptr_t)cmd.addr, cmd.data_len,
1673f1f0
CH
644 &cmd.result, timeout);
645 if (status >= 0) {
646 if (put_user(cmd.result, &ucmd->result))
647 return -EFAULT;
648 }
649
650 return status;
651}
652
653static int nvme_ioctl(struct block_device *bdev, fmode_t mode,
654 unsigned int cmd, unsigned long arg)
655{
656 struct nvme_ns *ns = bdev->bd_disk->private_data;
657
658 switch (cmd) {
659 case NVME_IOCTL_ID:
660 force_successful_syscall_return();
661 return ns->ns_id;
662 case NVME_IOCTL_ADMIN_CMD:
663 return nvme_user_cmd(ns->ctrl, NULL, (void __user *)arg);
664 case NVME_IOCTL_IO_CMD:
665 return nvme_user_cmd(ns->ctrl, ns, (void __user *)arg);
666 case NVME_IOCTL_SUBMIT_IO:
667 return nvme_submit_io(ns, (void __user *)arg);
44907332 668#ifdef CONFIG_BLK_DEV_NVME_SCSI
1673f1f0
CH
669 case SG_GET_VERSION_NUM:
670 return nvme_sg_get_version_num((void __user *)arg);
671 case SG_IO:
672 return nvme_sg_io(ns, (void __user *)arg);
44907332 673#endif
1673f1f0
CH
674 default:
675 return -ENOTTY;
676 }
677}
678
679#ifdef CONFIG_COMPAT
680static int nvme_compat_ioctl(struct block_device *bdev, fmode_t mode,
681 unsigned int cmd, unsigned long arg)
682{
683 switch (cmd) {
684 case SG_IO:
685 return -ENOIOCTLCMD;
686 }
687 return nvme_ioctl(bdev, mode, cmd, arg);
688}
689#else
690#define nvme_compat_ioctl NULL
691#endif
692
693static int nvme_open(struct block_device *bdev, fmode_t mode)
694{
695 return nvme_get_ns_from_disk(bdev->bd_disk) ? 0 : -ENXIO;
696}
697
698static void nvme_release(struct gendisk *disk, fmode_t mode)
699{
e439bb12
SG
700 struct nvme_ns *ns = disk->private_data;
701
702 module_put(ns->ctrl->ops->module);
703 nvme_put_ns(ns);
1673f1f0
CH
704}
705
706static int nvme_getgeo(struct block_device *bdev, struct hd_geometry *geo)
707{
708 /* some standard values */
709 geo->heads = 1 << 6;
710 geo->sectors = 1 << 5;
711 geo->cylinders = get_capacity(bdev->bd_disk) >> 11;
712 return 0;
713}
714
715#ifdef CONFIG_BLK_DEV_INTEGRITY
716static void nvme_init_integrity(struct nvme_ns *ns)
717{
718 struct blk_integrity integrity;
719
720 switch (ns->pi_type) {
721 case NVME_NS_DPS_PI_TYPE3:
722 integrity.profile = &t10_pi_type3_crc;
723 break;
724 case NVME_NS_DPS_PI_TYPE1:
725 case NVME_NS_DPS_PI_TYPE2:
726 integrity.profile = &t10_pi_type1_crc;
727 break;
728 default:
729 integrity.profile = NULL;
730 break;
731 }
732 integrity.tuple_size = ns->ms;
733 blk_integrity_register(ns->disk, &integrity);
734 blk_queue_max_integrity_segments(ns->queue, 1);
735}
736#else
737static void nvme_init_integrity(struct nvme_ns *ns)
738{
739}
740#endif /* CONFIG_BLK_DEV_INTEGRITY */
741
742static void nvme_config_discard(struct nvme_ns *ns)
743{
08095e70 744 struct nvme_ctrl *ctrl = ns->ctrl;
1673f1f0 745 u32 logical_block_size = queue_logical_block_size(ns->queue);
08095e70
KB
746
747 if (ctrl->quirks & NVME_QUIRK_DISCARD_ZEROES)
748 ns->queue->limits.discard_zeroes_data = 1;
749 else
750 ns->queue->limits.discard_zeroes_data = 0;
751
1673f1f0
CH
752 ns->queue->limits.discard_alignment = logical_block_size;
753 ns->queue->limits.discard_granularity = logical_block_size;
754 blk_queue_max_discard_sectors(ns->queue, 0xffffffff);
755 queue_flag_set_unlocked(QUEUE_FLAG_DISCARD, ns->queue);
756}
757
5bae7f73 758static int nvme_revalidate_disk(struct gendisk *disk)
1673f1f0
CH
759{
760 struct nvme_ns *ns = disk->private_data;
761 struct nvme_id_ns *id;
762 u8 lbaf, pi_type;
763 u16 old_ms;
764 unsigned short bs;
765
69d9a99c
KB
766 if (test_bit(NVME_NS_DEAD, &ns->flags)) {
767 set_capacity(disk, 0);
768 return -ENODEV;
769 }
1673f1f0 770 if (nvme_identify_ns(ns->ctrl, ns->ns_id, &id)) {
1b3c47c1
SG
771 dev_warn(disk_to_dev(ns->disk), "%s: Identify failure\n",
772 __func__);
1673f1f0
CH
773 return -ENODEV;
774 }
775 if (id->ncap == 0) {
776 kfree(id);
777 return -ENODEV;
778 }
779
780 if (nvme_nvm_ns_supported(ns, id) && ns->type != NVME_NS_LIGHTNVM) {
781 if (nvme_nvm_register(ns->queue, disk->disk_name)) {
1b3c47c1 782 dev_warn(disk_to_dev(ns->disk),
1673f1f0
CH
783 "%s: LightNVM init failure\n", __func__);
784 kfree(id);
785 return -ENODEV;
786 }
787 ns->type = NVME_NS_LIGHTNVM;
788 }
789
2b9b6e86
KB
790 if (ns->ctrl->vs >= NVME_VS(1, 1))
791 memcpy(ns->eui, id->eui64, sizeof(ns->eui));
792 if (ns->ctrl->vs >= NVME_VS(1, 2))
793 memcpy(ns->uuid, id->nguid, sizeof(ns->uuid));
794
1673f1f0
CH
795 old_ms = ns->ms;
796 lbaf = id->flbas & NVME_NS_FLBAS_LBA_MASK;
797 ns->lba_shift = id->lbaf[lbaf].ds;
798 ns->ms = le16_to_cpu(id->lbaf[lbaf].ms);
799 ns->ext = ns->ms && (id->flbas & NVME_NS_FLBAS_META_EXT);
800
801 /*
802 * If identify namespace failed, use default 512 byte block size so
803 * block layer can use before failing read/write for 0 capacity.
804 */
805 if (ns->lba_shift == 0)
806 ns->lba_shift = 9;
807 bs = 1 << ns->lba_shift;
1673f1f0
CH
808 /* XXX: PI implementation requires metadata equal t10 pi tuple size */
809 pi_type = ns->ms == sizeof(struct t10_pi_tuple) ?
810 id->dps & NVME_NS_DPS_PI_MASK : 0;
811
812 blk_mq_freeze_queue(disk->queue);
813 if (blk_get_integrity(disk) && (ns->pi_type != pi_type ||
814 ns->ms != old_ms ||
815 bs != queue_logical_block_size(disk->queue) ||
816 (ns->ms && ns->ext)))
817 blk_integrity_unregister(disk);
818
819 ns->pi_type = pi_type;
820 blk_queue_logical_block_size(ns->queue, bs);
821
4b9d5b15 822 if (ns->ms && !blk_get_integrity(disk) && !ns->ext)
1673f1f0 823 nvme_init_integrity(ns);
1673f1f0
CH
824 if (ns->ms && !(ns->ms == 8 && ns->pi_type) && !blk_get_integrity(disk))
825 set_capacity(disk, 0);
826 else
827 set_capacity(disk, le64_to_cpup(&id->nsze) << (ns->lba_shift - 9));
828
829 if (ns->ctrl->oncs & NVME_CTRL_ONCS_DSM)
830 nvme_config_discard(ns);
831 blk_mq_unfreeze_queue(disk->queue);
832
833 kfree(id);
834 return 0;
835}
836
837static char nvme_pr_type(enum pr_type type)
838{
839 switch (type) {
840 case PR_WRITE_EXCLUSIVE:
841 return 1;
842 case PR_EXCLUSIVE_ACCESS:
843 return 2;
844 case PR_WRITE_EXCLUSIVE_REG_ONLY:
845 return 3;
846 case PR_EXCLUSIVE_ACCESS_REG_ONLY:
847 return 4;
848 case PR_WRITE_EXCLUSIVE_ALL_REGS:
849 return 5;
850 case PR_EXCLUSIVE_ACCESS_ALL_REGS:
851 return 6;
852 default:
853 return 0;
854 }
855};
856
857static int nvme_pr_command(struct block_device *bdev, u32 cdw10,
858 u64 key, u64 sa_key, u8 op)
859{
860 struct nvme_ns *ns = bdev->bd_disk->private_data;
861 struct nvme_command c;
862 u8 data[16] = { 0, };
863
864 put_unaligned_le64(key, &data[0]);
865 put_unaligned_le64(sa_key, &data[8]);
866
867 memset(&c, 0, sizeof(c));
868 c.common.opcode = op;
869 c.common.nsid = cpu_to_le32(ns->ns_id);
870 c.common.cdw10[0] = cpu_to_le32(cdw10);
871
872 return nvme_submit_sync_cmd(ns->queue, &c, data, 16);
873}
874
875static int nvme_pr_register(struct block_device *bdev, u64 old,
876 u64 new, unsigned flags)
877{
878 u32 cdw10;
879
880 if (flags & ~PR_FL_IGNORE_KEY)
881 return -EOPNOTSUPP;
882
883 cdw10 = old ? 2 : 0;
884 cdw10 |= (flags & PR_FL_IGNORE_KEY) ? 1 << 3 : 0;
885 cdw10 |= (1 << 30) | (1 << 31); /* PTPL=1 */
886 return nvme_pr_command(bdev, cdw10, old, new, nvme_cmd_resv_register);
887}
888
889static int nvme_pr_reserve(struct block_device *bdev, u64 key,
890 enum pr_type type, unsigned flags)
891{
892 u32 cdw10;
893
894 if (flags & ~PR_FL_IGNORE_KEY)
895 return -EOPNOTSUPP;
896
897 cdw10 = nvme_pr_type(type) << 8;
898 cdw10 |= ((flags & PR_FL_IGNORE_KEY) ? 1 << 3 : 0);
899 return nvme_pr_command(bdev, cdw10, key, 0, nvme_cmd_resv_acquire);
900}
901
902static int nvme_pr_preempt(struct block_device *bdev, u64 old, u64 new,
903 enum pr_type type, bool abort)
904{
905 u32 cdw10 = nvme_pr_type(type) << 8 | abort ? 2 : 1;
906 return nvme_pr_command(bdev, cdw10, old, new, nvme_cmd_resv_acquire);
907}
908
909static int nvme_pr_clear(struct block_device *bdev, u64 key)
910{
8c0b3915 911 u32 cdw10 = 1 | (key ? 1 << 3 : 0);
1673f1f0
CH
912 return nvme_pr_command(bdev, cdw10, key, 0, nvme_cmd_resv_register);
913}
914
915static int nvme_pr_release(struct block_device *bdev, u64 key, enum pr_type type)
916{
917 u32 cdw10 = nvme_pr_type(type) << 8 | key ? 1 << 3 : 0;
918 return nvme_pr_command(bdev, cdw10, key, 0, nvme_cmd_resv_release);
919}
920
921static const struct pr_ops nvme_pr_ops = {
922 .pr_register = nvme_pr_register,
923 .pr_reserve = nvme_pr_reserve,
924 .pr_release = nvme_pr_release,
925 .pr_preempt = nvme_pr_preempt,
926 .pr_clear = nvme_pr_clear,
927};
928
5bae7f73 929static const struct block_device_operations nvme_fops = {
1673f1f0
CH
930 .owner = THIS_MODULE,
931 .ioctl = nvme_ioctl,
932 .compat_ioctl = nvme_compat_ioctl,
933 .open = nvme_open,
934 .release = nvme_release,
935 .getgeo = nvme_getgeo,
936 .revalidate_disk= nvme_revalidate_disk,
937 .pr_ops = &nvme_pr_ops,
938};
939
5fd4ce1b
CH
940static int nvme_wait_ready(struct nvme_ctrl *ctrl, u64 cap, bool enabled)
941{
942 unsigned long timeout =
943 ((NVME_CAP_TIMEOUT(cap) + 1) * HZ / 2) + jiffies;
944 u32 csts, bit = enabled ? NVME_CSTS_RDY : 0;
945 int ret;
946
947 while ((ret = ctrl->ops->reg_read32(ctrl, NVME_REG_CSTS, &csts)) == 0) {
948 if ((csts & NVME_CSTS_RDY) == bit)
949 break;
950
951 msleep(100);
952 if (fatal_signal_pending(current))
953 return -EINTR;
954 if (time_after(jiffies, timeout)) {
1b3c47c1 955 dev_err(ctrl->device,
5fd4ce1b
CH
956 "Device not ready; aborting %s\n", enabled ?
957 "initialisation" : "reset");
958 return -ENODEV;
959 }
960 }
961
962 return ret;
963}
964
965/*
966 * If the device has been passed off to us in an enabled state, just clear
967 * the enabled bit. The spec says we should set the 'shutdown notification
968 * bits', but doing so may cause the device to complete commands to the
969 * admin queue ... and we don't know what memory that might be pointing at!
970 */
971int nvme_disable_ctrl(struct nvme_ctrl *ctrl, u64 cap)
972{
973 int ret;
974
975 ctrl->ctrl_config &= ~NVME_CC_SHN_MASK;
976 ctrl->ctrl_config &= ~NVME_CC_ENABLE;
977
978 ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config);
979 if (ret)
980 return ret;
981 return nvme_wait_ready(ctrl, cap, false);
982}
576d55d6 983EXPORT_SYMBOL_GPL(nvme_disable_ctrl);
5fd4ce1b
CH
984
985int nvme_enable_ctrl(struct nvme_ctrl *ctrl, u64 cap)
986{
987 /*
988 * Default to a 4K page size, with the intention to update this
989 * path in the future to accomodate architectures with differing
990 * kernel and IO page sizes.
991 */
992 unsigned dev_page_min = NVME_CAP_MPSMIN(cap) + 12, page_shift = 12;
993 int ret;
994
995 if (page_shift < dev_page_min) {
1b3c47c1 996 dev_err(ctrl->device,
5fd4ce1b
CH
997 "Minimum device page size %u too large for host (%u)\n",
998 1 << dev_page_min, 1 << page_shift);
999 return -ENODEV;
1000 }
1001
1002 ctrl->page_size = 1 << page_shift;
1003
1004 ctrl->ctrl_config = NVME_CC_CSS_NVM;
1005 ctrl->ctrl_config |= (page_shift - 12) << NVME_CC_MPS_SHIFT;
1006 ctrl->ctrl_config |= NVME_CC_ARB_RR | NVME_CC_SHN_NONE;
1007 ctrl->ctrl_config |= NVME_CC_IOSQES | NVME_CC_IOCQES;
1008 ctrl->ctrl_config |= NVME_CC_ENABLE;
1009
1010 ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config);
1011 if (ret)
1012 return ret;
1013 return nvme_wait_ready(ctrl, cap, true);
1014}
576d55d6 1015EXPORT_SYMBOL_GPL(nvme_enable_ctrl);
5fd4ce1b
CH
1016
1017int nvme_shutdown_ctrl(struct nvme_ctrl *ctrl)
1018{
1019 unsigned long timeout = SHUTDOWN_TIMEOUT + jiffies;
1020 u32 csts;
1021 int ret;
1022
1023 ctrl->ctrl_config &= ~NVME_CC_SHN_MASK;
1024 ctrl->ctrl_config |= NVME_CC_SHN_NORMAL;
1025
1026 ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config);
1027 if (ret)
1028 return ret;
1029
1030 while ((ret = ctrl->ops->reg_read32(ctrl, NVME_REG_CSTS, &csts)) == 0) {
1031 if ((csts & NVME_CSTS_SHST_MASK) == NVME_CSTS_SHST_CMPLT)
1032 break;
1033
1034 msleep(100);
1035 if (fatal_signal_pending(current))
1036 return -EINTR;
1037 if (time_after(jiffies, timeout)) {
1b3c47c1 1038 dev_err(ctrl->device,
5fd4ce1b
CH
1039 "Device shutdown incomplete; abort shutdown\n");
1040 return -ENODEV;
1041 }
1042 }
1043
1044 return ret;
1045}
576d55d6 1046EXPORT_SYMBOL_GPL(nvme_shutdown_ctrl);
5fd4ce1b 1047
da35825d
CH
1048static void nvme_set_queue_limits(struct nvme_ctrl *ctrl,
1049 struct request_queue *q)
1050{
7c88cb00
JA
1051 bool vwc = false;
1052
da35825d 1053 if (ctrl->max_hw_sectors) {
45686b61
CH
1054 u32 max_segments =
1055 (ctrl->max_hw_sectors / (ctrl->page_size >> 9)) + 1;
1056
da35825d 1057 blk_queue_max_hw_sectors(q, ctrl->max_hw_sectors);
45686b61 1058 blk_queue_max_segments(q, min_t(u32, max_segments, USHRT_MAX));
da35825d
CH
1059 }
1060 if (ctrl->stripe_size)
1061 blk_queue_chunk_sectors(q, ctrl->stripe_size >> 9);
da35825d 1062 blk_queue_virt_boundary(q, ctrl->page_size - 1);
7c88cb00
JA
1063 if (ctrl->vwc & NVME_CTRL_VWC_PRESENT)
1064 vwc = true;
1065 blk_queue_write_cache(q, vwc, vwc);
da35825d
CH
1066}
1067
7fd8930f
CH
1068/*
1069 * Initialize the cached copies of the Identify data and various controller
1070 * register in our nvme_ctrl structure. This should be called as soon as
1071 * the admin queue is fully up and running.
1072 */
1073int nvme_init_identify(struct nvme_ctrl *ctrl)
1074{
1075 struct nvme_id_ctrl *id;
1076 u64 cap;
1077 int ret, page_shift;
1078
f3ca80fc
CH
1079 ret = ctrl->ops->reg_read32(ctrl, NVME_REG_VS, &ctrl->vs);
1080 if (ret) {
1b3c47c1 1081 dev_err(ctrl->device, "Reading VS failed (%d)\n", ret);
f3ca80fc
CH
1082 return ret;
1083 }
1084
7fd8930f
CH
1085 ret = ctrl->ops->reg_read64(ctrl, NVME_REG_CAP, &cap);
1086 if (ret) {
1b3c47c1 1087 dev_err(ctrl->device, "Reading CAP failed (%d)\n", ret);
7fd8930f
CH
1088 return ret;
1089 }
1090 page_shift = NVME_CAP_MPSMIN(cap) + 12;
1091
f3ca80fc
CH
1092 if (ctrl->vs >= NVME_VS(1, 1))
1093 ctrl->subsystem = NVME_CAP_NSSRC(cap);
1094
7fd8930f
CH
1095 ret = nvme_identify_ctrl(ctrl, &id);
1096 if (ret) {
1b3c47c1 1097 dev_err(ctrl->device, "Identify Controller failed (%d)\n", ret);
7fd8930f
CH
1098 return -EIO;
1099 }
1100
118472ab 1101 ctrl->vid = le16_to_cpu(id->vid);
7fd8930f 1102 ctrl->oncs = le16_to_cpup(&id->oncs);
6bf25d16 1103 atomic_set(&ctrl->abort_limit, id->acl + 1);
7fd8930f 1104 ctrl->vwc = id->vwc;
931e1c22 1105 ctrl->cntlid = le16_to_cpup(&id->cntlid);
7fd8930f
CH
1106 memcpy(ctrl->serial, id->sn, sizeof(id->sn));
1107 memcpy(ctrl->model, id->mn, sizeof(id->mn));
1108 memcpy(ctrl->firmware_rev, id->fr, sizeof(id->fr));
1109 if (id->mdts)
1110 ctrl->max_hw_sectors = 1 << (id->mdts + page_shift - 9);
1111 else
1112 ctrl->max_hw_sectors = UINT_MAX;
1113
1114 if ((ctrl->quirks & NVME_QUIRK_STRIPE_SIZE) && id->vs[3]) {
1115 unsigned int max_hw_sectors;
1116
1117 ctrl->stripe_size = 1 << (id->vs[3] + page_shift);
1118 max_hw_sectors = ctrl->stripe_size >> (page_shift - 9);
1119 if (ctrl->max_hw_sectors) {
1120 ctrl->max_hw_sectors = min(max_hw_sectors,
1121 ctrl->max_hw_sectors);
1122 } else {
1123 ctrl->max_hw_sectors = max_hw_sectors;
1124 }
1125 }
1126
da35825d
CH
1127 nvme_set_queue_limits(ctrl, ctrl->admin_q);
1128
7fd8930f
CH
1129 kfree(id);
1130 return 0;
1131}
576d55d6 1132EXPORT_SYMBOL_GPL(nvme_init_identify);
7fd8930f 1133
f3ca80fc 1134static int nvme_dev_open(struct inode *inode, struct file *file)
1673f1f0 1135{
f3ca80fc
CH
1136 struct nvme_ctrl *ctrl;
1137 int instance = iminor(inode);
1138 int ret = -ENODEV;
1673f1f0 1139
f3ca80fc
CH
1140 spin_lock(&dev_list_lock);
1141 list_for_each_entry(ctrl, &nvme_ctrl_list, node) {
1142 if (ctrl->instance != instance)
1143 continue;
1144
1145 if (!ctrl->admin_q) {
1146 ret = -EWOULDBLOCK;
1147 break;
1148 }
1149 if (!kref_get_unless_zero(&ctrl->kref))
1150 break;
1151 file->private_data = ctrl;
1152 ret = 0;
1153 break;
1154 }
1155 spin_unlock(&dev_list_lock);
1156
1157 return ret;
1673f1f0
CH
1158}
1159
f3ca80fc 1160static int nvme_dev_release(struct inode *inode, struct file *file)
1673f1f0 1161{
f3ca80fc
CH
1162 nvme_put_ctrl(file->private_data);
1163 return 0;
1164}
1165
bfd89471
CH
1166static int nvme_dev_user_cmd(struct nvme_ctrl *ctrl, void __user *argp)
1167{
1168 struct nvme_ns *ns;
1169 int ret;
1170
1171 mutex_lock(&ctrl->namespaces_mutex);
1172 if (list_empty(&ctrl->namespaces)) {
1173 ret = -ENOTTY;
1174 goto out_unlock;
1175 }
1176
1177 ns = list_first_entry(&ctrl->namespaces, struct nvme_ns, list);
1178 if (ns != list_last_entry(&ctrl->namespaces, struct nvme_ns, list)) {
1b3c47c1 1179 dev_warn(ctrl->device,
bfd89471
CH
1180 "NVME_IOCTL_IO_CMD not supported when multiple namespaces present!\n");
1181 ret = -EINVAL;
1182 goto out_unlock;
1183 }
1184
1b3c47c1 1185 dev_warn(ctrl->device,
bfd89471
CH
1186 "using deprecated NVME_IOCTL_IO_CMD ioctl on the char device!\n");
1187 kref_get(&ns->kref);
1188 mutex_unlock(&ctrl->namespaces_mutex);
1189
1190 ret = nvme_user_cmd(ctrl, ns, argp);
1191 nvme_put_ns(ns);
1192 return ret;
1193
1194out_unlock:
1195 mutex_unlock(&ctrl->namespaces_mutex);
1196 return ret;
1197}
1198
f3ca80fc
CH
1199static long nvme_dev_ioctl(struct file *file, unsigned int cmd,
1200 unsigned long arg)
1201{
1202 struct nvme_ctrl *ctrl = file->private_data;
1203 void __user *argp = (void __user *)arg;
f3ca80fc
CH
1204
1205 switch (cmd) {
1206 case NVME_IOCTL_ADMIN_CMD:
1207 return nvme_user_cmd(ctrl, NULL, argp);
1208 case NVME_IOCTL_IO_CMD:
bfd89471 1209 return nvme_dev_user_cmd(ctrl, argp);
f3ca80fc 1210 case NVME_IOCTL_RESET:
1b3c47c1 1211 dev_warn(ctrl->device, "resetting controller\n");
f3ca80fc
CH
1212 return ctrl->ops->reset_ctrl(ctrl);
1213 case NVME_IOCTL_SUBSYS_RESET:
1214 return nvme_reset_subsystem(ctrl);
1215 default:
1216 return -ENOTTY;
1217 }
1218}
1219
1220static const struct file_operations nvme_dev_fops = {
1221 .owner = THIS_MODULE,
1222 .open = nvme_dev_open,
1223 .release = nvme_dev_release,
1224 .unlocked_ioctl = nvme_dev_ioctl,
1225 .compat_ioctl = nvme_dev_ioctl,
1226};
1227
1228static ssize_t nvme_sysfs_reset(struct device *dev,
1229 struct device_attribute *attr, const char *buf,
1230 size_t count)
1231{
1232 struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
1233 int ret;
1234
1235 ret = ctrl->ops->reset_ctrl(ctrl);
1236 if (ret < 0)
1237 return ret;
1238 return count;
1673f1f0 1239}
f3ca80fc 1240static DEVICE_ATTR(reset_controller, S_IWUSR, NULL, nvme_sysfs_reset);
1673f1f0 1241
118472ab
KB
1242static ssize_t wwid_show(struct device *dev, struct device_attribute *attr,
1243 char *buf)
1244{
1245 struct nvme_ns *ns = dev_to_disk(dev)->private_data;
1246 struct nvme_ctrl *ctrl = ns->ctrl;
1247 int serial_len = sizeof(ctrl->serial);
1248 int model_len = sizeof(ctrl->model);
1249
1250 if (memchr_inv(ns->uuid, 0, sizeof(ns->uuid)))
1251 return sprintf(buf, "eui.%16phN\n", ns->uuid);
1252
1253 if (memchr_inv(ns->eui, 0, sizeof(ns->eui)))
1254 return sprintf(buf, "eui.%8phN\n", ns->eui);
1255
1256 while (ctrl->serial[serial_len - 1] == ' ')
1257 serial_len--;
1258 while (ctrl->model[model_len - 1] == ' ')
1259 model_len--;
1260
1261 return sprintf(buf, "nvme.%04x-%*phN-%*phN-%08x\n", ctrl->vid,
1262 serial_len, ctrl->serial, model_len, ctrl->model, ns->ns_id);
1263}
1264static DEVICE_ATTR(wwid, S_IRUGO, wwid_show, NULL);
1265
2b9b6e86
KB
1266static ssize_t uuid_show(struct device *dev, struct device_attribute *attr,
1267 char *buf)
1268{
1269 struct nvme_ns *ns = dev_to_disk(dev)->private_data;
1270 return sprintf(buf, "%pU\n", ns->uuid);
1271}
1272static DEVICE_ATTR(uuid, S_IRUGO, uuid_show, NULL);
1273
1274static ssize_t eui_show(struct device *dev, struct device_attribute *attr,
1275 char *buf)
1276{
1277 struct nvme_ns *ns = dev_to_disk(dev)->private_data;
1278 return sprintf(buf, "%8phd\n", ns->eui);
1279}
1280static DEVICE_ATTR(eui, S_IRUGO, eui_show, NULL);
1281
1282static ssize_t nsid_show(struct device *dev, struct device_attribute *attr,
1283 char *buf)
1284{
1285 struct nvme_ns *ns = dev_to_disk(dev)->private_data;
1286 return sprintf(buf, "%d\n", ns->ns_id);
1287}
1288static DEVICE_ATTR(nsid, S_IRUGO, nsid_show, NULL);
1289
1290static struct attribute *nvme_ns_attrs[] = {
118472ab 1291 &dev_attr_wwid.attr,
2b9b6e86
KB
1292 &dev_attr_uuid.attr,
1293 &dev_attr_eui.attr,
1294 &dev_attr_nsid.attr,
1295 NULL,
1296};
1297
1298static umode_t nvme_attrs_are_visible(struct kobject *kobj,
1299 struct attribute *a, int n)
1300{
1301 struct device *dev = container_of(kobj, struct device, kobj);
1302 struct nvme_ns *ns = dev_to_disk(dev)->private_data;
1303
1304 if (a == &dev_attr_uuid.attr) {
1305 if (!memchr_inv(ns->uuid, 0, sizeof(ns->uuid)))
1306 return 0;
1307 }
1308 if (a == &dev_attr_eui.attr) {
1309 if (!memchr_inv(ns->eui, 0, sizeof(ns->eui)))
1310 return 0;
1311 }
1312 return a->mode;
1313}
1314
1315static const struct attribute_group nvme_ns_attr_group = {
1316 .attrs = nvme_ns_attrs,
1317 .is_visible = nvme_attrs_are_visible,
1318};
1319
931e1c22 1320#define nvme_show_str_function(field) \
779ff756
KB
1321static ssize_t field##_show(struct device *dev, \
1322 struct device_attribute *attr, char *buf) \
1323{ \
1324 struct nvme_ctrl *ctrl = dev_get_drvdata(dev); \
1325 return sprintf(buf, "%.*s\n", (int)sizeof(ctrl->field), ctrl->field); \
1326} \
1327static DEVICE_ATTR(field, S_IRUGO, field##_show, NULL);
1328
931e1c22
ML
1329#define nvme_show_int_function(field) \
1330static ssize_t field##_show(struct device *dev, \
1331 struct device_attribute *attr, char *buf) \
1332{ \
1333 struct nvme_ctrl *ctrl = dev_get_drvdata(dev); \
1334 return sprintf(buf, "%d\n", ctrl->field); \
1335} \
1336static DEVICE_ATTR(field, S_IRUGO, field##_show, NULL);
1337
1338nvme_show_str_function(model);
1339nvme_show_str_function(serial);
1340nvme_show_str_function(firmware_rev);
1341nvme_show_int_function(cntlid);
779ff756
KB
1342
1343static struct attribute *nvme_dev_attrs[] = {
1344 &dev_attr_reset_controller.attr,
1345 &dev_attr_model.attr,
1346 &dev_attr_serial.attr,
1347 &dev_attr_firmware_rev.attr,
931e1c22 1348 &dev_attr_cntlid.attr,
779ff756
KB
1349 NULL
1350};
1351
1352static struct attribute_group nvme_dev_attrs_group = {
1353 .attrs = nvme_dev_attrs,
1354};
1355
1356static const struct attribute_group *nvme_dev_attr_groups[] = {
1357 &nvme_dev_attrs_group,
1358 NULL,
1359};
1360
5bae7f73
CH
1361static int ns_cmp(void *priv, struct list_head *a, struct list_head *b)
1362{
1363 struct nvme_ns *nsa = container_of(a, struct nvme_ns, list);
1364 struct nvme_ns *nsb = container_of(b, struct nvme_ns, list);
1365
1366 return nsa->ns_id - nsb->ns_id;
1367}
1368
1369static struct nvme_ns *nvme_find_ns(struct nvme_ctrl *ctrl, unsigned nsid)
1370{
1371 struct nvme_ns *ns;
1372
69d3b8ac
CH
1373 lockdep_assert_held(&ctrl->namespaces_mutex);
1374
5bae7f73
CH
1375 list_for_each_entry(ns, &ctrl->namespaces, list) {
1376 if (ns->ns_id == nsid)
1377 return ns;
1378 if (ns->ns_id > nsid)
1379 break;
1380 }
1381 return NULL;
1382}
1383
1384static void nvme_alloc_ns(struct nvme_ctrl *ctrl, unsigned nsid)
1385{
1386 struct nvme_ns *ns;
1387 struct gendisk *disk;
1388 int node = dev_to_node(ctrl->dev);
1389
69d3b8ac
CH
1390 lockdep_assert_held(&ctrl->namespaces_mutex);
1391
5bae7f73
CH
1392 ns = kzalloc_node(sizeof(*ns), GFP_KERNEL, node);
1393 if (!ns)
1394 return;
1395
075790eb
KB
1396 ns->instance = ida_simple_get(&ctrl->ns_ida, 1, 0, GFP_KERNEL);
1397 if (ns->instance < 0)
1398 goto out_free_ns;
1399
5bae7f73
CH
1400 ns->queue = blk_mq_init_queue(ctrl->tagset);
1401 if (IS_ERR(ns->queue))
075790eb 1402 goto out_release_instance;
5bae7f73
CH
1403 queue_flag_set_unlocked(QUEUE_FLAG_NONROT, ns->queue);
1404 ns->queue->queuedata = ns;
1405 ns->ctrl = ctrl;
1406
1407 disk = alloc_disk_node(0, node);
1408 if (!disk)
1409 goto out_free_queue;
1410
1411 kref_init(&ns->kref);
1412 ns->ns_id = nsid;
1413 ns->disk = disk;
1414 ns->lba_shift = 9; /* set to a default value for 512 until disk is validated */
5bae7f73 1415
da35825d 1416
5bae7f73 1417 blk_queue_logical_block_size(ns->queue, 1 << ns->lba_shift);
da35825d 1418 nvme_set_queue_limits(ctrl, ns->queue);
5bae7f73
CH
1419
1420 disk->major = nvme_major;
1421 disk->first_minor = 0;
1422 disk->fops = &nvme_fops;
1423 disk->private_data = ns;
1424 disk->queue = ns->queue;
1425 disk->driverfs_dev = ctrl->device;
1426 disk->flags = GENHD_FL_EXT_DEVT;
075790eb 1427 sprintf(disk->disk_name, "nvme%dn%d", ctrl->instance, ns->instance);
5bae7f73 1428
5bae7f73
CH
1429 if (nvme_revalidate_disk(ns->disk))
1430 goto out_free_disk;
1431
4b9d5b15 1432 list_add_tail(&ns->list, &ctrl->namespaces);
5bae7f73 1433 kref_get(&ctrl->kref);
2b9b6e86
KB
1434 if (ns->type == NVME_NS_LIGHTNVM)
1435 return;
5bae7f73 1436
2b9b6e86
KB
1437 add_disk(ns->disk);
1438 if (sysfs_create_group(&disk_to_dev(ns->disk)->kobj,
1439 &nvme_ns_attr_group))
1440 pr_warn("%s: failed to create sysfs group for identification\n",
1441 ns->disk->disk_name);
5bae7f73
CH
1442 return;
1443 out_free_disk:
1444 kfree(disk);
5bae7f73
CH
1445 out_free_queue:
1446 blk_cleanup_queue(ns->queue);
075790eb
KB
1447 out_release_instance:
1448 ida_simple_remove(&ctrl->ns_ida, ns->instance);
5bae7f73
CH
1449 out_free_ns:
1450 kfree(ns);
1451}
1452
1453static void nvme_ns_remove(struct nvme_ns *ns)
1454{
646017a6
KB
1455 if (test_and_set_bit(NVME_NS_REMOVING, &ns->flags))
1456 return;
69d3b8ac 1457
5bae7f73
CH
1458 if (ns->disk->flags & GENHD_FL_UP) {
1459 if (blk_get_integrity(ns->disk))
1460 blk_integrity_unregister(ns->disk);
2b9b6e86
KB
1461 sysfs_remove_group(&disk_to_dev(ns->disk)->kobj,
1462 &nvme_ns_attr_group);
5bae7f73 1463 del_gendisk(ns->disk);
5bae7f73
CH
1464 blk_mq_abort_requeue_list(ns->queue);
1465 blk_cleanup_queue(ns->queue);
1466 }
646017a6 1467 mutex_lock(&ns->ctrl->namespaces_mutex);
5bae7f73 1468 list_del_init(&ns->list);
646017a6 1469 mutex_unlock(&ns->ctrl->namespaces_mutex);
5bae7f73
CH
1470 nvme_put_ns(ns);
1471}
1472
540c801c
KB
1473static void nvme_validate_ns(struct nvme_ctrl *ctrl, unsigned nsid)
1474{
1475 struct nvme_ns *ns;
1476
1477 ns = nvme_find_ns(ctrl, nsid);
1478 if (ns) {
1479 if (revalidate_disk(ns->disk))
1480 nvme_ns_remove(ns);
1481 } else
1482 nvme_alloc_ns(ctrl, nsid);
1483}
1484
1485static int nvme_scan_ns_list(struct nvme_ctrl *ctrl, unsigned nn)
1486{
1487 struct nvme_ns *ns;
1488 __le32 *ns_list;
1489 unsigned i, j, nsid, prev = 0, num_lists = DIV_ROUND_UP(nn, 1024);
1490 int ret = 0;
1491
1492 ns_list = kzalloc(0x1000, GFP_KERNEL);
1493 if (!ns_list)
1494 return -ENOMEM;
1495
1496 for (i = 0; i < num_lists; i++) {
1497 ret = nvme_identify_ns_list(ctrl, prev, ns_list);
1498 if (ret)
1499 goto out;
1500
1501 for (j = 0; j < min(nn, 1024U); j++) {
1502 nsid = le32_to_cpu(ns_list[j]);
1503 if (!nsid)
1504 goto out;
1505
1506 nvme_validate_ns(ctrl, nsid);
1507
1508 while (++prev < nsid) {
1509 ns = nvme_find_ns(ctrl, prev);
1510 if (ns)
1511 nvme_ns_remove(ns);
1512 }
1513 }
1514 nn -= j;
1515 }
1516 out:
1517 kfree(ns_list);
1518 return ret;
1519}
1520
5955be21 1521static void nvme_scan_ns_sequential(struct nvme_ctrl *ctrl, unsigned nn)
5bae7f73
CH
1522{
1523 struct nvme_ns *ns, *next;
1524 unsigned i;
1525
69d3b8ac
CH
1526 lockdep_assert_held(&ctrl->namespaces_mutex);
1527
540c801c
KB
1528 for (i = 1; i <= nn; i++)
1529 nvme_validate_ns(ctrl, i);
1530
5bae7f73
CH
1531 list_for_each_entry_safe(ns, next, &ctrl->namespaces, list) {
1532 if (ns->ns_id > nn)
1533 nvme_ns_remove(ns);
1534 }
5bae7f73
CH
1535}
1536
5955be21 1537static void nvme_scan_work(struct work_struct *work)
5bae7f73 1538{
5955be21
CH
1539 struct nvme_ctrl *ctrl =
1540 container_of(work, struct nvme_ctrl, scan_work);
5bae7f73 1541 struct nvme_id_ctrl *id;
540c801c 1542 unsigned nn;
5bae7f73 1543
5955be21
CH
1544 if (ctrl->state != NVME_CTRL_LIVE)
1545 return;
1546
5bae7f73
CH
1547 if (nvme_identify_ctrl(ctrl, &id))
1548 return;
540c801c 1549
69d3b8ac 1550 mutex_lock(&ctrl->namespaces_mutex);
540c801c
KB
1551 nn = le32_to_cpu(id->nn);
1552 if (ctrl->vs >= NVME_VS(1, 1) &&
1553 !(ctrl->quirks & NVME_QUIRK_IDENTIFY_CNS)) {
1554 if (!nvme_scan_ns_list(ctrl, nn))
1555 goto done;
1556 }
5955be21 1557 nvme_scan_ns_sequential(ctrl, nn);
540c801c
KB
1558 done:
1559 list_sort(NULL, &ctrl->namespaces, ns_cmp);
69d3b8ac 1560 mutex_unlock(&ctrl->namespaces_mutex);
5bae7f73 1561 kfree(id);
5955be21
CH
1562
1563 if (ctrl->ops->post_scan)
1564 ctrl->ops->post_scan(ctrl);
5bae7f73 1565}
5955be21
CH
1566
1567void nvme_queue_scan(struct nvme_ctrl *ctrl)
1568{
1569 /*
1570 * Do not queue new scan work when a controller is reset during
1571 * removal.
1572 */
1573 if (ctrl->state == NVME_CTRL_LIVE)
1574 schedule_work(&ctrl->scan_work);
1575}
1576EXPORT_SYMBOL_GPL(nvme_queue_scan);
5bae7f73
CH
1577
1578void nvme_remove_namespaces(struct nvme_ctrl *ctrl)
1579{
1580 struct nvme_ns *ns, *next;
1581
1582 list_for_each_entry_safe(ns, next, &ctrl->namespaces, list)
1583 nvme_ns_remove(ns);
1584}
576d55d6 1585EXPORT_SYMBOL_GPL(nvme_remove_namespaces);
5bae7f73 1586
f3ca80fc
CH
1587static DEFINE_IDA(nvme_instance_ida);
1588
1589static int nvme_set_instance(struct nvme_ctrl *ctrl)
1590{
1591 int instance, error;
1592
1593 do {
1594 if (!ida_pre_get(&nvme_instance_ida, GFP_KERNEL))
1595 return -ENODEV;
1596
1597 spin_lock(&dev_list_lock);
1598 error = ida_get_new(&nvme_instance_ida, &instance);
1599 spin_unlock(&dev_list_lock);
1600 } while (error == -EAGAIN);
1601
1602 if (error)
1603 return -ENODEV;
1604
1605 ctrl->instance = instance;
1606 return 0;
1607}
1608
1609static void nvme_release_instance(struct nvme_ctrl *ctrl)
1610{
1611 spin_lock(&dev_list_lock);
1612 ida_remove(&nvme_instance_ida, ctrl->instance);
1613 spin_unlock(&dev_list_lock);
1614}
1615
53029b04 1616void nvme_uninit_ctrl(struct nvme_ctrl *ctrl)
576d55d6 1617{
5955be21
CH
1618 flush_work(&ctrl->scan_work);
1619 nvme_remove_namespaces(ctrl);
1620
53029b04 1621 device_destroy(nvme_class, MKDEV(nvme_char_major, ctrl->instance));
f3ca80fc
CH
1622
1623 spin_lock(&dev_list_lock);
1624 list_del(&ctrl->node);
1625 spin_unlock(&dev_list_lock);
53029b04 1626}
576d55d6 1627EXPORT_SYMBOL_GPL(nvme_uninit_ctrl);
53029b04
KB
1628
1629static void nvme_free_ctrl(struct kref *kref)
1630{
1631 struct nvme_ctrl *ctrl = container_of(kref, struct nvme_ctrl, kref);
f3ca80fc
CH
1632
1633 put_device(ctrl->device);
1634 nvme_release_instance(ctrl);
075790eb 1635 ida_destroy(&ctrl->ns_ida);
f3ca80fc
CH
1636
1637 ctrl->ops->free_ctrl(ctrl);
1638}
1639
1640void nvme_put_ctrl(struct nvme_ctrl *ctrl)
1641{
1642 kref_put(&ctrl->kref, nvme_free_ctrl);
1643}
576d55d6 1644EXPORT_SYMBOL_GPL(nvme_put_ctrl);
f3ca80fc
CH
1645
1646/*
1647 * Initialize a NVMe controller structures. This needs to be called during
1648 * earliest initialization so that we have the initialized structured around
1649 * during probing.
1650 */
1651int nvme_init_ctrl(struct nvme_ctrl *ctrl, struct device *dev,
1652 const struct nvme_ctrl_ops *ops, unsigned long quirks)
1653{
1654 int ret;
1655
bb8d261e
CH
1656 ctrl->state = NVME_CTRL_NEW;
1657 spin_lock_init(&ctrl->lock);
f3ca80fc 1658 INIT_LIST_HEAD(&ctrl->namespaces);
69d3b8ac 1659 mutex_init(&ctrl->namespaces_mutex);
f3ca80fc
CH
1660 kref_init(&ctrl->kref);
1661 ctrl->dev = dev;
1662 ctrl->ops = ops;
1663 ctrl->quirks = quirks;
5955be21 1664 INIT_WORK(&ctrl->scan_work, nvme_scan_work);
f3ca80fc
CH
1665
1666 ret = nvme_set_instance(ctrl);
1667 if (ret)
1668 goto out;
1669
779ff756 1670 ctrl->device = device_create_with_groups(nvme_class, ctrl->dev,
f3ca80fc 1671 MKDEV(nvme_char_major, ctrl->instance),
f4f0f63e 1672 ctrl, nvme_dev_attr_groups,
779ff756 1673 "nvme%d", ctrl->instance);
f3ca80fc
CH
1674 if (IS_ERR(ctrl->device)) {
1675 ret = PTR_ERR(ctrl->device);
1676 goto out_release_instance;
1677 }
1678 get_device(ctrl->device);
075790eb 1679 ida_init(&ctrl->ns_ida);
f3ca80fc 1680
f3ca80fc
CH
1681 spin_lock(&dev_list_lock);
1682 list_add_tail(&ctrl->node, &nvme_ctrl_list);
1683 spin_unlock(&dev_list_lock);
1684
1685 return 0;
f3ca80fc
CH
1686out_release_instance:
1687 nvme_release_instance(ctrl);
1688out:
1689 return ret;
1690}
576d55d6 1691EXPORT_SYMBOL_GPL(nvme_init_ctrl);
f3ca80fc 1692
69d9a99c
KB
1693/**
1694 * nvme_kill_queues(): Ends all namespace queues
1695 * @ctrl: the dead controller that needs to end
1696 *
1697 * Call this function when the driver determines it is unable to get the
1698 * controller in a state capable of servicing IO.
1699 */
1700void nvme_kill_queues(struct nvme_ctrl *ctrl)
1701{
1702 struct nvme_ns *ns;
1703
1704 mutex_lock(&ctrl->namespaces_mutex);
1705 list_for_each_entry(ns, &ctrl->namespaces, list) {
1706 if (!kref_get_unless_zero(&ns->kref))
1707 continue;
1708
1709 /*
1710 * Revalidating a dead namespace sets capacity to 0. This will
1711 * end buffered writers dirtying pages that can't be synced.
1712 */
1713 if (!test_and_set_bit(NVME_NS_DEAD, &ns->flags))
1714 revalidate_disk(ns->disk);
1715
1716 blk_set_queue_dying(ns->queue);
1717 blk_mq_abort_requeue_list(ns->queue);
1718 blk_mq_start_stopped_hw_queues(ns->queue, true);
1719
1720 nvme_put_ns(ns);
1721 }
1722 mutex_unlock(&ctrl->namespaces_mutex);
1723}
237045fc 1724EXPORT_SYMBOL_GPL(nvme_kill_queues);
69d9a99c 1725
25646264 1726void nvme_stop_queues(struct nvme_ctrl *ctrl)
363c9aac
SG
1727{
1728 struct nvme_ns *ns;
1729
69d3b8ac 1730 mutex_lock(&ctrl->namespaces_mutex);
363c9aac 1731 list_for_each_entry(ns, &ctrl->namespaces, list) {
363c9aac
SG
1732 spin_lock_irq(ns->queue->queue_lock);
1733 queue_flag_set(QUEUE_FLAG_STOPPED, ns->queue);
1734 spin_unlock_irq(ns->queue->queue_lock);
1735
1736 blk_mq_cancel_requeue_work(ns->queue);
1737 blk_mq_stop_hw_queues(ns->queue);
1738 }
69d3b8ac 1739 mutex_unlock(&ctrl->namespaces_mutex);
363c9aac 1740}
576d55d6 1741EXPORT_SYMBOL_GPL(nvme_stop_queues);
363c9aac 1742
25646264 1743void nvme_start_queues(struct nvme_ctrl *ctrl)
363c9aac
SG
1744{
1745 struct nvme_ns *ns;
1746
69d3b8ac 1747 mutex_lock(&ctrl->namespaces_mutex);
363c9aac
SG
1748 list_for_each_entry(ns, &ctrl->namespaces, list) {
1749 queue_flag_clear_unlocked(QUEUE_FLAG_STOPPED, ns->queue);
363c9aac
SG
1750 blk_mq_start_stopped_hw_queues(ns->queue, true);
1751 blk_mq_kick_requeue_list(ns->queue);
1752 }
69d3b8ac 1753 mutex_unlock(&ctrl->namespaces_mutex);
363c9aac 1754}
576d55d6 1755EXPORT_SYMBOL_GPL(nvme_start_queues);
363c9aac 1756
5bae7f73
CH
1757int __init nvme_core_init(void)
1758{
1759 int result;
1760
1761 result = register_blkdev(nvme_major, "nvme");
1762 if (result < 0)
1763 return result;
1764 else if (result > 0)
1765 nvme_major = result;
1766
f3ca80fc
CH
1767 result = __register_chrdev(nvme_char_major, 0, NVME_MINORS, "nvme",
1768 &nvme_dev_fops);
1769 if (result < 0)
1770 goto unregister_blkdev;
1771 else if (result > 0)
1772 nvme_char_major = result;
1773
1774 nvme_class = class_create(THIS_MODULE, "nvme");
1775 if (IS_ERR(nvme_class)) {
1776 result = PTR_ERR(nvme_class);
1777 goto unregister_chrdev;
1778 }
1779
5bae7f73 1780 return 0;
f3ca80fc
CH
1781
1782 unregister_chrdev:
1783 __unregister_chrdev(nvme_char_major, 0, NVME_MINORS, "nvme");
1784 unregister_blkdev:
1785 unregister_blkdev(nvme_major, "nvme");
1786 return result;
5bae7f73
CH
1787}
1788
1789void nvme_core_exit(void)
1790{
f3ca80fc
CH
1791 class_destroy(nvme_class);
1792 __unregister_chrdev(nvme_char_major, 0, NVME_MINORS, "nvme");
23bd63ce 1793 unregister_blkdev(nvme_major, "nvme");
5bae7f73 1794}
576d55d6
ML
1795
1796MODULE_LICENSE("GPL");
1797MODULE_VERSION("1.0");
1798module_init(nvme_core_init);
1799module_exit(nvme_core_exit);