treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 13
[linux-2.6-block.git] / drivers / net / wireless / ralink / rt2x00 / rt2x00.h
CommitLineData
1ccea77e 1/* SPDX-License-Identifier: GPL-2.0-or-later */
95ea3627 2/*
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3 Copyright (C) 2010 Willow Garage <http://www.willowgarage.com>
4 Copyright (C) 2004 - 2010 Ivo van Doorn <IvDoorn@gmail.com>
9c9a0d14 5 Copyright (C) 2004 - 2009 Gertjan van Wingerde <gwingerde@gmail.com>
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6 <http://rt2x00.serialmonkey.com>
7
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8 */
9
10/*
11 Module: rt2x00
12 Abstract: rt2x00 global information.
13 */
14
15#ifndef RT2X00_H
16#define RT2X00_H
17
18#include <linux/bitops.h>
a6b7a407 19#include <linux/interrupt.h>
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20#include <linux/skbuff.h>
21#include <linux/workqueue.h>
22#include <linux/firmware.h>
a9450b70 23#include <linux/leds.h>
3d82346c 24#include <linux/mutex.h>
61af43c5 25#include <linux/etherdevice.h>
cca3e998 26#include <linux/input-polldev.h>
96c3da7d 27#include <linux/kfifo.h>
f421111b 28#include <linux/hrtimer.h>
1dc254ac 29#include <linux/average.h>
8b4c0009 30#include <linux/usb.h>
34db70b9 31#include <linux/clk.h>
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32
33#include <net/mac80211.h>
34
35#include "rt2x00debug.h"
b4df4708 36#include "rt2x00dump.h"
a9450b70 37#include "rt2x00leds.h"
95ea3627 38#include "rt2x00reg.h"
181d6902 39#include "rt2x00queue.h"
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40
41/*
42 * Module information.
95ea3627 43 */
754be309 44#define DRV_VERSION "2.3.0"
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45#define DRV_PROJECT "http://rt2x00.serialmonkey.com"
46
ec9c4989 47/* Debug definitions.
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48 * Debug output has to be enabled during compile time.
49 */
95ea3627 50#ifdef CONFIG_RT2X00_DEBUG
ec9c4989 51#define DEBUG
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52#endif /* CONFIG_RT2X00_DEBUG */
53
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54/* Utility printing macros
55 * rt2x00_probe_err is for messages when rt2x00_dev is uninitialized
95ea3627 56 */
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57#define rt2x00_probe_err(fmt, ...) \
58 printk(KERN_ERR KBUILD_MODNAME ": %s: Error - " fmt, \
59 __func__, ##__VA_ARGS__)
60#define rt2x00_err(dev, fmt, ...) \
bb3b18c9 61 wiphy_err_ratelimited((dev)->hw->wiphy, "%s: Error - " fmt, \
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62 __func__, ##__VA_ARGS__)
63#define rt2x00_warn(dev, fmt, ...) \
bb3b18c9 64 wiphy_warn_ratelimited((dev)->hw->wiphy, "%s: Warning - " fmt, \
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65 __func__, ##__VA_ARGS__)
66#define rt2x00_info(dev, fmt, ...) \
67 wiphy_info((dev)->hw->wiphy, "%s: Info - " fmt, \
68 __func__, ##__VA_ARGS__)
69
70/* Various debug levels */
71#define rt2x00_dbg(dev, fmt, ...) \
72 wiphy_dbg((dev)->hw->wiphy, "%s: Debug - " fmt, \
73 __func__, ##__VA_ARGS__)
74#define rt2x00_eeprom_dbg(dev, fmt, ...) \
75 wiphy_dbg((dev)->hw->wiphy, "%s: EEPROM recovery - " fmt, \
76 __func__, ##__VA_ARGS__)
95ea3627 77
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78/*
79 * Duration calculations
80 * The rate variable passed is: 100kbs.
81 * To convert from bytes to bits we multiply size with 8,
82 * then the size is multiplied with 10 to make the
83 * real rate -> rate argument correction.
84 */
85#define GET_DURATION(__size, __rate) (((__size) * 8 * 10) / (__rate))
86#define GET_DURATION_RES(__size, __rate)(((__size) * 8 * 10) % (__rate))
87
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88/*
89 * Determine the number of L2 padding bytes required between the header and
90 * the payload.
91 */
92#define L2PAD_SIZE(__hdrlen) (-(__hdrlen) & 3)
93
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94/*
95 * Determine the alignment requirement,
96 * to make sure the 802.11 payload is padded to a 4-byte boundrary
97 * we must determine the address of the payload and calculate the
98 * amount of bytes needed to move the data.
99 */
100#define ALIGN_SIZE(__skb, __header) \
b2cc2dd8 101 (((unsigned long)((__skb)->data + (__header))) & 3)
9f166171 102
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103/*
104 * Constants for extra TX headroom for alignment purposes.
105 */
106#define RT2X00_ALIGN_SIZE 4 /* Only whole frame needs alignment */
107#define RT2X00_L2PAD_SIZE 8 /* Both header & payload need alignment */
108
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109/*
110 * Standard timing and size defines.
111 * These values should follow the ieee80211 specifications.
112 */
113#define ACK_SIZE 14
114#define IEEE80211_HEADER 24
115#define PLCP 48
116#define BEACON 100
117#define PREAMBLE 144
118#define SHORT_PREAMBLE 72
119#define SLOT_TIME 20
120#define SHORT_SLOT_TIME 9
121#define SIFS 10
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122#define PIFS (SIFS + SLOT_TIME)
123#define SHORT_PIFS (SIFS + SHORT_SLOT_TIME)
124#define DIFS (PIFS + SLOT_TIME)
125#define SHORT_DIFS (SHORT_PIFS + SHORT_SLOT_TIME)
126#define EIFS (SIFS + DIFS + \
127 GET_DURATION(IEEE80211_HEADER + ACK_SIZE, 10))
128#define SHORT_EIFS (SIFS + SHORT_DIFS + \
129 GET_DURATION(IEEE80211_HEADER + ACK_SIZE, 10))
95ea3627 130
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131enum rt2x00_chip_intf {
132 RT2X00_CHIP_INTF_PCI,
6e1fdd11 133 RT2X00_CHIP_INTF_PCIE,
5822e070 134 RT2X00_CHIP_INTF_USB,
cea90e55 135 RT2X00_CHIP_INTF_SOC,
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136};
137
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138/*
139 * Chipset identification
140 * The chipset on the device is composed of a RT and RF chip.
141 * The chipset combination is important for determining device capabilities.
142 */
143struct rt2x00_chip {
144 u16 rt;
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145#define RT2460 0x2460
146#define RT2560 0x2560
147#define RT2570 0x2570
148#define RT2661 0x2661
149#define RT2573 0x2573
5ed8f458 150#define RT2860 0x2860 /* 2.4GHz */
e148b4c8 151#define RT2872 0x2872 /* WSOC */
49e721ec 152#define RT2883 0x2883 /* WSOC */
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153#define RT3070 0x3070
154#define RT3071 0x3071
a9b3a9f7 155#define RT3090 0x3090 /* 2.4GHz PCIe */
a89534ed 156#define RT3290 0x3290
03839951 157#define RT3352 0x3352 /* WSOC */
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158#define RT3390 0x3390
159#define RT3572 0x3572
5a87e7a7 160#define RT3593 0x3593
e148b4c8 161#define RT3883 0x3883 /* WSOC */
98e71f44 162#define RT5350 0x5350 /* WSOC 2.4GHz */
70127cb6 163#define RT5390 0x5390 /* 2.4GHz */
2ed71884 164#define RT5392 0x5392 /* 2.4GHz */
b8863f8b 165#define RT5592 0x5592
41977e86 166#define RT6352 0x6352 /* WSOC 2.4GHz */
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167
168 u16 rf;
49e721ec 169 u16 rev;
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170
171 enum rt2x00_chip_intf intf;
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172};
173
174/*
175 * RF register values that belong to a particular channel.
176 */
177struct rf_channel {
178 int channel;
179 u32 rf1;
180 u32 rf2;
181 u32 rf3;
182 u32 rf4;
183};
184
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185/*
186 * Channel information structure
187 */
188struct channel_info {
189 unsigned int flags;
190#define GEOGRAPHY_ALLOWED 0x00000001
191
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192 short max_power;
193 short default_power1;
194 short default_power2;
c0a14369 195 short default_power3;
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196};
197
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198/*
199 * Antenna setup values.
200 */
201struct antenna_setup {
202 enum antenna rx;
203 enum antenna tx;
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204 u8 rx_chain_num;
205 u8 tx_chain_num;
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206};
207
95ea3627 208/*
ebcf26da 209 * Quality statistics about the currently active link.
95ea3627 210 */
ebcf26da 211struct link_qual {
95ea3627 212 /*
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213 * Statistics required for Link tuning by driver
214 * The rssi value is provided by rt2x00lib during the
215 * link_tuner() callback function.
216 * The false_cca field is filled during the link_stats()
217 * callback function and could be used during the
218 * link_tuner() callback function.
95ea3627 219 */
5352ff65 220 int rssi;
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221 int false_cca;
222
223 /*
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224 * VGC levels
225 * Hardware driver will tune the VGC level during each call
226 * to the link_tuner() callback function. This vgc_level is
227 * is determined based on the link quality statistics like
228 * average RSSI and the false CCA count.
95ea3627 229 *
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230 * In some cases the drivers need to differentiate between
231 * the currently "desired" VGC level and the level configured
232 * in the hardware. The latter is important to reduce the
233 * number of BBP register reads to reduce register access
234 * overhead. For this reason we store both values here.
235 */
236 u8 vgc_level;
237 u8 vgc_level_reg;
238
239 /*
240 * Statistics required for Signal quality calculation.
241 * These fields might be changed during the link_stats()
242 * callback function.
95ea3627 243 */
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244 int rx_success;
245 int rx_failed;
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246 int tx_success;
247 int tx_failed;
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248};
249
eb1e011a 250DECLARE_EWMA(rssi, 10, 8)
11ab35ed 251
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252/*
253 * Antenna settings about the currently active link.
254 */
255struct link_ant {
256 /*
257 * Antenna flags
258 */
259 unsigned int flags;
260#define ANTENNA_RX_DIVERSITY 0x00000001
261#define ANTENNA_TX_DIVERSITY 0x00000002
262#define ANTENNA_MODE_SAMPLE 0x00000004
263
264 /*
265 * Currently active TX/RX antenna setup.
266 * When software diversity is used, this will indicate
267 * which antenna is actually used at this time.
268 */
269 struct antenna_setup active;
270
271 /*
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272 * RSSI history information for the antenna.
273 * Used to determine when to switch antenna
274 * when using software diversity.
69f81a2c 275 */
193df183 276 int rssi_history;
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277
278 /*
279 * Current RSSI average of the currently active antenna.
280 * Similar to the avg_rssi in the link_qual structure
281 * this value is updated by using the walking average.
282 */
11ab35ed 283 struct ewma_rssi rssi_ant;
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284};
285
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286/*
287 * To optimize the quality of the link we need to store
288 * the quality of received frames and periodically
289 * optimize the link.
290 */
291struct link {
292 /*
293 * Link tuner counter
294 * The number of times the link has been tuned
295 * since the radio has been switched on.
296 */
297 u32 count;
298
299 /*
300 * Quality measurement values.
301 */
302 struct link_qual qual;
303
addc81bd 304 /*
69f81a2c 305 * TX/RX antenna setup.
addc81bd 306 */
69f81a2c 307 struct link_ant ant;
addc81bd 308
ebcf26da 309 /*
5352ff65 310 * Currently active average RSSI value
ebcf26da 311 */
11ab35ed 312 struct ewma_rssi avg_rssi;
eb20b4e8 313
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314 /*
315 * Work structure for scheduling periodic link tuning.
316 */
317 struct delayed_work work;
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318
319 /*
320 * Work structure for scheduling periodic watchdog monitoring.
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321 * This work must be scheduled on the kernel workqueue, while
322 * all other work structures must be queued on the mac80211
323 * workqueue. This guarantees that the watchdog can schedule
324 * other work structures and wait for their completion in order
325 * to bring the device/driver back into the desired state.
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326 */
327 struct delayed_work watchdog_work;
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328
329 /*
330 * Work structure for scheduling periodic AGC adjustments.
331 */
332 struct delayed_work agc_work;
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333
334 /*
335 * Work structure for scheduling periodic VCO calibration.
336 */
337 struct delayed_work vco_work;
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338};
339
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340enum rt2x00_delayed_flags {
341 DELAYED_UPDATE_BEACON,
342};
343
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344/*
345 * Interface structure
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346 * Per interface configuration details, this structure
347 * is allocated as the private data for ieee80211_vif.
95ea3627 348 */
6bb40dd1 349struct rt2x00_intf {
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350 /*
351 * beacon->skb must be protected with the mutex.
352 */
353 struct mutex beacon_skb_mutex;
354
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355 /*
356 * Entry in the beacon queue which belongs to
357 * this interface. Each interface has its own
358 * dedicated beacon entry.
359 */
360 struct queue_entry *beacon;
69cf36a4 361 bool enable_beacon;
95ea3627 362
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363 /*
364 * Actions that needed rescheduling.
365 */
bfe6a15d 366 unsigned long delayed_flags;
f591fa5d 367
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368 /*
369 * Software sequence counter, this is only required
370 * for hardware which doesn't support hardware
371 * sequence counting.
372 */
e5851dac 373 atomic_t seqno;
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374};
375
376static inline struct rt2x00_intf* vif_to_intf(struct ieee80211_vif *vif)
95ea3627 377{
6bb40dd1 378 return (struct rt2x00_intf *)vif->drv_priv;
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379}
380
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381/**
382 * struct hw_mode_spec: Hardware specifications structure
383 *
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384 * Details about the supported modes, rates and channels
385 * of a particular chipset. This is used by rt2x00lib
386 * to build the ieee80211_hw_mode array for mac80211.
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387 *
388 * @supported_bands: Bitmask contained the supported bands (2.4GHz, 5.2GHz).
389 * @supported_rates: Rate types which are supported (CCK, OFDM).
390 * @num_channels: Number of supported channels. This is used as array size
391 * for @tx_power_a, @tx_power_bg and @channels.
9a46d44e 392 * @channels: Device/chipset specific channel values (See &struct rf_channel).
8c5e7a5f 393 * @channels_info: Additional information for channels (See &struct channel_info).
35f00cfc 394 * @ht: Driver HT Capabilities (See &ieee80211_sta_ht_cap).
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395 */
396struct hw_mode_spec {
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397 unsigned int supported_bands;
398#define SUPPORT_BAND_2GHZ 0x00000001
399#define SUPPORT_BAND_5GHZ 0x00000002
400
401 unsigned int supported_rates;
402#define SUPPORT_RATE_CCK 0x00000001
403#define SUPPORT_RATE_OFDM 0x00000002
404
405 unsigned int num_channels;
406 const struct rf_channel *channels;
8c5e7a5f 407 const struct channel_info *channels_info;
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408
409 struct ieee80211_sta_ht_cap ht;
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410};
411
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412/*
413 * Configuration structure wrapper around the
414 * mac80211 configuration structure.
415 * When mac80211 configures the driver, rt2x00lib
416 * can precalculate values which are equal for all
417 * rt2x00 drivers. Those values can be stored in here.
418 */
419struct rt2x00lib_conf {
420 struct ieee80211_conf *conf;
8c5e7a5f 421
5c58ee51 422 struct rf_channel rf;
8c5e7a5f 423 struct channel_info channel;
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424};
425
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426/*
427 * Configuration structure for erp settings.
428 */
429struct rt2x00lib_erp {
430 int short_preamble;
e360c4cb 431 int cts_protection;
72810379 432
881d948c 433 u32 basic_rates;
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434
435 int slot_time;
436
437 short sifs;
438 short pifs;
439 short difs;
440 short eifs;
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441
442 u16 beacon_int;
87c1915d 443 u16 ht_opmode;
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444};
445
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446/*
447 * Configuration structure for hardware encryption.
448 */
449struct rt2x00lib_crypto {
450 enum cipher cipher;
451
452 enum set_key_cmd cmd;
453 const u8 *address;
454
455 u32 bssidx;
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456
457 u8 key[16];
458 u8 tx_mic[8];
459 u8 rx_mic[8];
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460
461 int wcid;
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462};
463
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464/*
465 * Configuration structure wrapper around the
466 * rt2x00 interface configuration handler.
467 */
468struct rt2x00intf_conf {
469 /*
470 * Interface type
471 */
05c914fe 472 enum nl80211_iftype type;
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473
474 /*
25985edc 475 * TSF sync value, this is dependent on the operation type.
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476 */
477 enum tsf_sync sync;
478
479 /*
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480 * The MAC and BSSID addresses are simple array of bytes,
481 * these arrays are little endian, so when sending the addresses
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482 * to the drivers, copy the it into a endian-signed variable.
483 *
484 * Note that all devices (except rt2500usb) have 32 bits
485 * register word sizes. This means that whatever variable we
486 * pass _must_ be a multiple of 32 bits. Otherwise the device
487 * might not accept what we are sending to it.
488 * This will also make it easier for the driver to write
489 * the data to the device.
490 */
491 __le32 mac[2];
492 __le32 bssid[2];
493};
494
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495/*
496 * Private structure for storing STA details
497 * wcid: Wireless Client ID
498 */
499struct rt2x00_sta {
500 int wcid;
501};
502
503static inline struct rt2x00_sta* sta_to_rt2x00_sta(struct ieee80211_sta *sta)
504{
505 return (struct rt2x00_sta *)sta->drv_priv;
506}
507
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508/*
509 * rt2x00lib callback functions.
510 */
511struct rt2x00lib_ops {
512 /*
513 * Interrupt handlers.
514 */
515 irq_handler_t irq_handler;
516
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517 /*
518 * TX status tasklet handler.
519 */
520 void (*txstatus_tasklet) (unsigned long data);
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521 void (*pretbtt_tasklet) (unsigned long data);
522 void (*tbtt_tasklet) (unsigned long data);
523 void (*rxdone_tasklet) (unsigned long data);
524 void (*autowake_tasklet) (unsigned long data);
96c3da7d 525
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526 /*
527 * Device init handlers.
528 */
529 int (*probe_hw) (struct rt2x00_dev *rt2x00dev);
530 char *(*get_firmware_name) (struct rt2x00_dev *rt2x00dev);
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531 int (*check_firmware) (struct rt2x00_dev *rt2x00dev,
532 const u8 *data, const size_t len);
533 int (*load_firmware) (struct rt2x00_dev *rt2x00dev,
534 const u8 *data, const size_t len);
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535
536 /*
537 * Device initialization/deinitialization handlers.
538 */
539 int (*initialize) (struct rt2x00_dev *rt2x00dev);
540 void (*uninitialize) (struct rt2x00_dev *rt2x00dev);
541
837e7f24 542 /*
181d6902 543 * queue initialization handlers
837e7f24 544 */
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545 bool (*get_entry_state) (struct queue_entry *entry);
546 void (*clear_entry) (struct queue_entry *entry);
837e7f24 547
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548 /*
549 * Radio control handlers.
550 */
551 int (*set_device_state) (struct rt2x00_dev *rt2x00dev,
552 enum dev_state state);
553 int (*rfkill_poll) (struct rt2x00_dev *rt2x00dev);
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554 void (*link_stats) (struct rt2x00_dev *rt2x00dev,
555 struct link_qual *qual);
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556 void (*reset_tuner) (struct rt2x00_dev *rt2x00dev,
557 struct link_qual *qual);
558 void (*link_tuner) (struct rt2x00_dev *rt2x00dev,
559 struct link_qual *qual, const u32 count);
9e33a355 560 void (*gain_calibration) (struct rt2x00_dev *rt2x00dev);
2e9c43dd 561 void (*vco_calibration) (struct rt2x00_dev *rt2x00dev);
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562
563 /*
564 * Data queue handlers.
565 */
c965c74b 566 void (*watchdog) (struct rt2x00_dev *rt2x00dev);
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567 void (*start_queue) (struct data_queue *queue);
568 void (*kick_queue) (struct data_queue *queue);
569 void (*stop_queue) (struct data_queue *queue);
152a5992 570 void (*flush_queue) (struct data_queue *queue, bool drop);
0e0d39e5 571 void (*tx_dma_done) (struct queue_entry *entry);
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572
573 /*
574 * TX control handlers
575 */
93331458 576 void (*write_tx_desc) (struct queue_entry *entry,
61486e0f 577 struct txentry_desc *txdesc);
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578 void (*write_tx_data) (struct queue_entry *entry,
579 struct txentry_desc *txdesc);
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580 void (*write_beacon) (struct queue_entry *entry,
581 struct txentry_desc *txdesc);
69cf36a4 582 void (*clear_beacon) (struct queue_entry *entry);
f1ca2167 583 int (*get_tx_data_len) (struct queue_entry *entry);
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584
585 /*
586 * RX control handlers
587 */
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588 void (*fill_rxdone) (struct queue_entry *entry,
589 struct rxdone_entry_desc *rxdesc);
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590
591 /*
592 * Configuration handlers.
593 */
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594 int (*config_shared_key) (struct rt2x00_dev *rt2x00dev,
595 struct rt2x00lib_crypto *crypto,
596 struct ieee80211_key_conf *key);
597 int (*config_pairwise_key) (struct rt2x00_dev *rt2x00dev,
598 struct rt2x00lib_crypto *crypto,
599 struct ieee80211_key_conf *key);
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600 void (*config_filter) (struct rt2x00_dev *rt2x00dev,
601 const unsigned int filter_flags);
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602 void (*config_intf) (struct rt2x00_dev *rt2x00dev,
603 struct rt2x00_intf *intf,
604 struct rt2x00intf_conf *conf,
605 const unsigned int flags);
606#define CONFIG_UPDATE_TYPE ( 1 << 1 )
607#define CONFIG_UPDATE_MAC ( 1 << 2 )
608#define CONFIG_UPDATE_BSSID ( 1 << 3 )
609
3a643d24 610 void (*config_erp) (struct rt2x00_dev *rt2x00dev,
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HS
611 struct rt2x00lib_erp *erp,
612 u32 changed);
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613 void (*config_ant) (struct rt2x00_dev *rt2x00dev,
614 struct antenna_setup *ant);
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615 void (*config) (struct rt2x00_dev *rt2x00dev,
616 struct rt2x00lib_conf *libconf,
e4ea1c40 617 const unsigned int changed_flags);
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618 int (*sta_add) (struct rt2x00_dev *rt2x00dev,
619 struct ieee80211_vif *vif,
620 struct ieee80211_sta *sta);
621 int (*sta_remove) (struct rt2x00_dev *rt2x00dev,
8f03a7c6 622 struct ieee80211_sta *sta);
95ea3627
ID
623};
624
625/*
626 * rt2x00 driver callback operation structure.
627 */
628struct rt2x00_ops {
629 const char *name;
1ebbc485 630 const unsigned int drv_data_size;
6bb40dd1 631 const unsigned int max_ap_intf;
95ea3627
ID
632 const unsigned int eeprom_size;
633 const unsigned int rf_size;
61448f88 634 const unsigned int tx_queues;
25bf6ce4 635 void (*queue_init)(struct data_queue *queue);
95ea3627 636 const struct rt2x00lib_ops *lib;
e796643e 637 const void *drv;
95ea3627
ID
638 const struct ieee80211_ops *hw;
639#ifdef CONFIG_RT2X00_LIB_DEBUGFS
640 const struct rt2x00debug *debugfs;
641#endif /* CONFIG_RT2X00_LIB_DEBUGFS */
642};
643
483272f5 644/*
7dab73b3 645 * rt2x00 state flags
483272f5 646 */
7dab73b3 647enum rt2x00_state_flags {
483272f5 648 /*
7dab73b3 649 * Device flags
483272f5 650 */
0262ab0d
ID
651 DEVICE_STATE_PRESENT,
652 DEVICE_STATE_REGISTERED_HW,
653 DEVICE_STATE_INITIALIZED,
654 DEVICE_STATE_STARTED,
0262ab0d 655 DEVICE_STATE_ENABLED_RADIO,
d8147f9d 656 DEVICE_STATE_SCANNING,
adf26a35 657 DEVICE_STATE_FLUSHING,
483272f5 658
2bb057d0
ID
659 /*
660 * Driver configuration
661 */
35f00cfc 662 CONFIG_CHANNEL_HT40,
1c0bcf89 663 CONFIG_POWERSAVING,
da40f407 664 CONFIG_HT_DISABLED,
262c741e 665 CONFIG_MONITORING,
f421111b
SG
666
667 /*
668 * Mark we currently are sequentially reading TX_STA_FIFO register
669 * FIXME: this is for only rt2800usb, should go to private data
670 */
671 TX_STATUS_READING,
483272f5
ID
672};
673
7dab73b3
ID
674/*
675 * rt2x00 capability flags
676 */
677enum rt2x00_capability_flags {
678 /*
679 * Requirements
680 */
681 REQUIRE_FIRMWARE,
682 REQUIRE_BEACON_GUARD,
683 REQUIRE_ATIM_QUEUE,
684 REQUIRE_DMA,
685 REQUIRE_COPY_IV,
686 REQUIRE_L2PAD,
687 REQUIRE_TXSTATUS_FIFO,
688 REQUIRE_TASKLET_CONTEXT,
689 REQUIRE_SW_SEQNO,
690 REQUIRE_HT_TX_DESC,
1c0bcf89 691 REQUIRE_PS_AUTOWAKE,
616a8394 692 REQUIRE_DELAYED_RFKILL,
7dab73b3
ID
693
694 /*
695 * Capabilities
696 */
697 CAPABILITY_HW_BUTTON,
698 CAPABILITY_HW_CRYPTO,
699 CAPABILITY_POWER_LIMIT,
700 CAPABILITY_CONTROL_FILTERS,
701 CAPABILITY_CONTROL_FILTER_PSPOLL,
702 CAPABILITY_PRE_TBTT_INTERRUPT,
703 CAPABILITY_LINK_TUNING,
704 CAPABILITY_FRAME_TYPE,
705 CAPABILITY_RF_SEQUENCE,
706 CAPABILITY_EXTERNAL_LNA_A,
707 CAPABILITY_EXTERNAL_LNA_BG,
708 CAPABILITY_DOUBLE_ANTENNA,
fdbc7b0a 709 CAPABILITY_BT_COEXIST,
2e9c43dd 710 CAPABILITY_VCO_RECALIBRATION,
1f242a3d
DG
711 CAPABILITY_EXTERNAL_PA_TX0,
712 CAPABILITY_EXTERNAL_PA_TX1,
7dab73b3
ID
713};
714
55d2e9da
GW
715/*
716 * Interface combinations
717 */
718enum {
719 IF_COMB_AP = 0,
720 NUM_IF_COMB,
721};
722
95ea3627
ID
723/*
724 * rt2x00 device structure.
725 */
726struct rt2x00_dev {
727 /*
728 * Device structure.
729 * The structure stored in here depends on the
730 * system bus (PCI or USB).
731 * When accessing this variable, the rt2x00dev_{pci,usb}
49513481 732 * macros should be used for correct typecasting.
95ea3627 733 */
14a3bf89 734 struct device *dev;
95ea3627
ID
735
736 /*
737 * Callback functions.
738 */
739 const struct rt2x00_ops *ops;
740
1ebbc485
GW
741 /*
742 * Driver data.
743 */
744 void *drv_data;
745
95ea3627
ID
746 /*
747 * IEEE80211 control structure.
748 */
749 struct ieee80211_hw *hw;
57fbcce3
JB
750 struct ieee80211_supported_band bands[NUM_NL80211_BANDS];
751 enum nl80211_band curr_band;
e5ef5bad 752 int curr_freq;
95ea3627 753
95ea3627
ID
754 /*
755 * If enabled, the debugfs interface structures
756 * required for deregistration of debugfs.
757 */
758#ifdef CONFIG_RT2X00_LIB_DEBUGFS
4d8dd66c 759 struct rt2x00debug_intf *debugfs_intf;
95ea3627
ID
760#endif /* CONFIG_RT2X00_LIB_DEBUGFS */
761
a9450b70
ID
762 /*
763 * LED structure for changing the LED status
764 * by mac8011 or the kernel.
765 */
766#ifdef CONFIG_RT2X00_LIB_LEDS
a9450b70
ID
767 struct rt2x00_led led_radio;
768 struct rt2x00_led led_assoc;
769 struct rt2x00_led led_qual;
770 u16 led_mcu_reg;
771#endif /* CONFIG_RT2X00_LIB_LEDS */
772
95ea3627 773 /*
7dab73b3
ID
774 * Device state flags.
775 * In these flags the current status is stored.
776 * Access to these flags should occur atomically.
95ea3627
ID
777 */
778 unsigned long flags;
95ea3627 779
7dab73b3
ID
780 /*
781 * Device capabiltiy flags.
782 * In these flags the device/driver capabilities are stored.
783 * Access to these flags should occur non-atomically.
784 */
785 unsigned long cap_flags;
786
440ddada
ID
787 /*
788 * Device information, Bus IRQ and name (PCI, SoC)
789 */
790 int irq;
791 const char *name;
792
95ea3627
ID
793 /*
794 * Chipset identification.
795 */
796 struct rt2x00_chip chip;
797
798 /*
799 * hw capability specifications.
800 */
801 struct hw_mode_spec spec;
802
addc81bd
ID
803 /*
804 * This is the default TX/RX antenna setup as indicated
6d64360a 805 * by the device's EEPROM.
addc81bd
ID
806 */
807 struct antenna_setup default_ant;
808
95ea3627
ID
809 /*
810 * Register pointers
21795094
ID
811 * csr.base: CSR base register address. (PCI)
812 * csr.cache: CSR cache for usb_control_msg. (USB)
95ea3627 813 */
21795094
ID
814 union csr {
815 void __iomem *base;
816 void *cache;
817 } csr;
95ea3627 818
3d82346c 819 /*
8ff48a8b
ID
820 * Mutex to protect register accesses.
821 * For PCI and USB devices it protects against concurrent indirect
822 * register access (BBP, RF, MCU) since accessing those
823 * registers require multiple calls to the CSR registers.
824 * For USB devices it also protects the csr_cache since that
825 * field is used for normal CSR access and it cannot support
826 * multiple callers simultaneously.
827 */
828 struct mutex csr_mutex;
3d82346c 829
c7d1c777
SG
830 /*
831 * Mutex to synchronize config and link tuner.
832 */
833 struct mutex conf_mutex;
3c4f2085
ID
834 /*
835 * Current packet filter configuration for the device.
836 * This contains all currently active FIF_* flags send
837 * to us by mac80211 during configure_filter().
838 */
839 unsigned int packet_filter;
840
95ea3627 841 /*
6bb40dd1
ID
842 * Interface details:
843 * - Open ap interface count.
844 * - Open sta interface count.
845 * - Association count.
69cf36a4 846 * - Beaconing enabled count.
95ea3627 847 */
6bb40dd1
ID
848 unsigned int intf_ap_count;
849 unsigned int intf_sta_count;
850 unsigned int intf_associated;
69cf36a4 851 unsigned int intf_beaconing;
95ea3627 852
55d2e9da
GW
853 /*
854 * Interface combinations
855 */
856 struct ieee80211_iface_limit if_limits_ap;
857 struct ieee80211_iface_combination if_combinations[NUM_IF_COMB];
858
95ea3627
ID
859 /*
860 * Link quality
861 */
862 struct link link;
863
864 /*
865 * EEPROM data.
866 */
867 __le16 *eeprom;
868
869 /*
870 * Active RF register values.
871 * These are stored here so we don't need
872 * to read the rf registers and can directly
873 * use this value instead.
874 * This field should be accessed by using
875 * rt2x00_rf_read() and rt2x00_rf_write().
876 */
877 u32 *rf;
878
ba2ab471
ID
879 /*
880 * LNA gain
881 */
882 short lna_gain;
883
95ea3627
ID
884 /*
885 * Current TX power value.
886 */
887 u16 tx_power;
888
42c82857
ID
889 /*
890 * Current retry values.
891 */
892 u8 short_retry;
893 u8 long_retry;
894
95ea3627
ID
895 /*
896 * Rssi <-> Dbm offset
897 */
898 u8 rssi_offset;
899
900 /*
bef453dc 901 * Frequency offset.
95ea3627
ID
902 */
903 u8 freq_offset;
904
1c0bcf89
ID
905 /*
906 * Association id.
907 */
908 u16 aid;
909
6b347bff
ID
910 /*
911 * Beacon interval.
912 */
913 u16 beacon_int;
914
1c0bcf89
ID
915 /**
916 * Timestamp of last received beacon
917 */
918 unsigned long last_beacon;
919
95ea3627
ID
920 /*
921 * Low level statistics which will have
922 * to be kept up to date while device is running.
923 */
924 struct ieee80211_low_level_stats low_level_stats;
925
0439f536
ID
926 /**
927 * Work queue for all work which should not be placed
928 * on the mac80211 workqueue (because of dependencies
929 * between various work structures).
930 */
931 struct workqueue_struct *workqueue;
932
95ea3627 933 /*
4150c572 934 * Scheduled work.
8e260c22
ID
935 * NOTE: intf_work will use ieee80211_iterate_active_interfaces()
936 * which means it cannot be placed on the hw->workqueue
937 * due to RTNL locking requirements.
95ea3627 938 */
6bb40dd1 939 struct work_struct intf_work;
95ea3627 940
7e613e16
ID
941 /**
942 * Scheduled work for TX/RX done handling (USB devices)
943 */
944 struct work_struct rxdone_work;
945 struct work_struct txdone_work;
946
1c0bcf89
ID
947 /*
948 * Powersaving work
949 */
950 struct delayed_work autowakeup_work;
ed66ba47 951 struct work_struct sleep_work;
1c0bcf89 952
95ea3627 953 /*
e74df4a7 954 * Data queue arrays for RX, TX, Beacon and ATIM.
95ea3627 955 */
b869767b 956 unsigned int data_queues;
181d6902
ID
957 struct data_queue *rx;
958 struct data_queue *tx;
959 struct data_queue *bcn;
e74df4a7 960 struct data_queue *atim;
95ea3627
ID
961
962 /*
963 * Firmware image.
964 */
965 const struct firmware *fw;
ee134fcc 966
96c3da7d
HS
967 /*
968 * FIFO for storing tx status reports between isr and tasklet.
969 */
c4d63244 970 DECLARE_KFIFO_PTR(txstatus_fifo, u32);
96c3da7d 971
f0187a19
JS
972 /*
973 * Timer to ensure tx status reports are read (rt2800usb).
974 */
f421111b 975 struct hrtimer txstatus_timer;
f0187a19 976
96c3da7d
HS
977 /*
978 * Tasklet for processing tx status reports (rt2800pci).
979 */
980 struct tasklet_struct txstatus_tasklet;
c5c65761
HS
981 struct tasklet_struct pretbtt_tasklet;
982 struct tasklet_struct tbtt_tasklet;
983 struct tasklet_struct rxdone_tasklet;
984 struct tasklet_struct autowake_tasklet;
985
2e9c43dd
JL
986 /*
987 * Used for VCO periodic calibration.
988 */
989 int rf_channel;
990
c5c65761
HS
991 /*
992 * Protect the interrupt mask register.
993 */
994 spinlock_t irqmask_lock;
84e9e8eb
HS
995
996 /*
997 * List of BlockAckReq TX entries that need driver BlockAck processing.
998 */
999 struct list_head bar_list;
1000 spinlock_t bar_list_lock;
5616a6ef
GJ
1001
1002 /* Extra TX headroom required for alignment purposes. */
1003 unsigned int extra_tx_headroom;
8b4c0009
VT
1004
1005 struct usb_anchor *anchor;
e383c704 1006 unsigned int num_proto_errs;
34db70b9
SG
1007
1008 /* Clock for System On Chip devices. */
1009 struct clk *clk;
84e9e8eb
HS
1010};
1011
1012struct rt2x00_bar_list_entry {
1013 struct list_head list;
1014 struct rcu_head head;
1015
1016 struct queue_entry *entry;
1017 int block_acked;
1018
1019 /* Relevant parts of the IEEE80211 BAR header */
1020 __u8 ra[6];
1021 __u8 ta[6];
1022 __le16 control;
1023 __le16 start_seq_num;
95ea3627
ID
1024};
1025
1f285f14
BZ
1026/*
1027 * Register defines.
1028 * Some registers require multiple attempts before success,
1029 * in those cases REGISTER_BUSY_COUNT attempts should be
7a5a7352
SG
1030 * taken with a REGISTER_BUSY_DELAY interval. Due to USB
1031 * bus delays, we do not have to loop so many times to wait
1032 * for valid register value on that bus.
1f285f14 1033 */
ae4ecb9f 1034#define REGISTER_BUSY_COUNT 100
7a5a7352 1035#define REGISTER_USB_BUSY_COUNT 20
1f285f14
BZ
1036#define REGISTER_BUSY_DELAY 100
1037
95ea3627
ID
1038/*
1039 * Generic RF access.
1040 * The RF is being accessed by word index.
1041 */
aea8baa1
AB
1042static inline u32 rt2x00_rf_read(struct rt2x00_dev *rt2x00dev,
1043 const unsigned int word)
6b81745e
AB
1044{
1045 BUG_ON(word < 1 || word > rt2x00dev->ops->rf_size / sizeof(u32));
1046 return rt2x00dev->rf[word - 1];
1047}
1048
0e14f6d3 1049static inline void rt2x00_rf_write(struct rt2x00_dev *rt2x00dev,
95ea3627
ID
1050 const unsigned int word, u32 data)
1051{
6b26dead
PR
1052 BUG_ON(word < 1 || word > rt2x00dev->ops->rf_size / sizeof(u32));
1053 rt2x00dev->rf[word - 1] = data;
95ea3627
ID
1054}
1055
1056/*
8756130b 1057 * Generic EEPROM access. The EEPROM is being accessed by word or byte index.
95ea3627 1058 */
0e14f6d3 1059static inline void *rt2x00_eeprom_addr(struct rt2x00_dev *rt2x00dev,
95ea3627
ID
1060 const unsigned int word)
1061{
1062 return (void *)&rt2x00dev->eeprom[word];
1063}
1064
38651683
AB
1065static inline u16 rt2x00_eeprom_read(struct rt2x00_dev *rt2x00dev,
1066 const unsigned int word)
6b81745e
AB
1067{
1068 return le16_to_cpu(rt2x00dev->eeprom[word]);
1069}
1070
0e14f6d3 1071static inline void rt2x00_eeprom_write(struct rt2x00_dev *rt2x00dev,
95ea3627
ID
1072 const unsigned int word, u16 data)
1073{
1074 rt2x00dev->eeprom[word] = cpu_to_le16(data);
1075}
1076
8756130b
SG
1077static inline u8 rt2x00_eeprom_byte(struct rt2x00_dev *rt2x00dev,
1078 const unsigned int byte)
1079{
1080 return *(((u8 *)rt2x00dev->eeprom) + byte);
1081}
1082
95ea3627
ID
1083/*
1084 * Chipset handlers
1085 */
1086static inline void rt2x00_set_chip(struct rt2x00_dev *rt2x00dev,
49e721ec 1087 const u16 rt, const u16 rf, const u16 rev)
95ea3627 1088{
95ea3627
ID
1089 rt2x00dev->chip.rt = rt;
1090 rt2x00dev->chip.rf = rf;
1091 rt2x00dev->chip.rev = rev;
440ddada 1092
ec9c4989
JP
1093 rt2x00_info(rt2x00dev, "Chipset detected - rt: %04x, rf: %04x, rev: %04x\n",
1094 rt2x00dev->chip.rt, rt2x00dev->chip.rf,
1095 rt2x00dev->chip.rev);
16475b09
GW
1096}
1097
5ce69003
GJ
1098static inline void rt2x00_set_rt(struct rt2x00_dev *rt2x00dev,
1099 const u16 rt, const u16 rev)
1100{
1101 rt2x00dev->chip.rt = rt;
1102 rt2x00dev->chip.rev = rev;
1103
ec9c4989
JP
1104 rt2x00_info(rt2x00dev, "RT chipset %04x, rev %04x detected\n",
1105 rt2x00dev->chip.rt, rt2x00dev->chip.rev);
5ce69003
GJ
1106}
1107
1108static inline void rt2x00_set_rf(struct rt2x00_dev *rt2x00dev, const u16 rf)
1109{
1110 rt2x00dev->chip.rf = rf;
1111
ec9c4989
JP
1112 rt2x00_info(rt2x00dev, "RF chipset %04x detected\n",
1113 rt2x00dev->chip.rf);
5ce69003
GJ
1114}
1115
8d0c9b65 1116static inline bool rt2x00_rt(struct rt2x00_dev *rt2x00dev, const u16 rt)
95ea3627 1117{
5122d898 1118 return (rt2x00dev->chip.rt == rt);
95ea3627
ID
1119}
1120
8d0c9b65 1121static inline bool rt2x00_rf(struct rt2x00_dev *rt2x00dev, const u16 rf)
95ea3627 1122{
5122d898 1123 return (rt2x00dev->chip.rf == rf);
95ea3627
ID
1124}
1125
49e721ec 1126static inline u16 rt2x00_rev(struct rt2x00_dev *rt2x00dev)
95ea3627 1127{
5122d898 1128 return rt2x00dev->chip.rev;
95ea3627
ID
1129}
1130
8d0c9b65
GW
1131static inline bool rt2x00_rt_rev(struct rt2x00_dev *rt2x00dev,
1132 const u16 rt, const u16 rev)
1133{
1134 return (rt2x00_rt(rt2x00dev, rt) && rt2x00_rev(rt2x00dev) == rev);
1135}
1136
1137static inline bool rt2x00_rt_rev_lt(struct rt2x00_dev *rt2x00dev,
1138 const u16 rt, const u16 rev)
1139{
1140 return (rt2x00_rt(rt2x00dev, rt) && rt2x00_rev(rt2x00dev) < rev);
1141}
1142
1143static inline bool rt2x00_rt_rev_gte(struct rt2x00_dev *rt2x00dev,
1144 const u16 rt, const u16 rev)
1145{
1146 return (rt2x00_rt(rt2x00dev, rt) && rt2x00_rev(rt2x00dev) >= rev);
1147}
1148
5822e070
BZ
1149static inline void rt2x00_set_chip_intf(struct rt2x00_dev *rt2x00dev,
1150 enum rt2x00_chip_intf intf)
1151{
1152 rt2x00dev->chip.intf = intf;
1153}
1154
5122d898 1155static inline bool rt2x00_intf(struct rt2x00_dev *rt2x00dev,
5822e070
BZ
1156 enum rt2x00_chip_intf intf)
1157{
5122d898 1158 return (rt2x00dev->chip.intf == intf);
5822e070
BZ
1159}
1160
cea90e55 1161static inline bool rt2x00_is_pci(struct rt2x00_dev *rt2x00dev)
5822e070 1162{
6e1fdd11
GW
1163 return rt2x00_intf(rt2x00dev, RT2X00_CHIP_INTF_PCI) ||
1164 rt2x00_intf(rt2x00dev, RT2X00_CHIP_INTF_PCIE);
1165}
1166
1167static inline bool rt2x00_is_pcie(struct rt2x00_dev *rt2x00dev)
1168{
1169 return rt2x00_intf(rt2x00dev, RT2X00_CHIP_INTF_PCIE);
5822e070
BZ
1170}
1171
cea90e55 1172static inline bool rt2x00_is_usb(struct rt2x00_dev *rt2x00dev)
5822e070 1173{
5122d898 1174 return rt2x00_intf(rt2x00dev, RT2X00_CHIP_INTF_USB);
5822e070
BZ
1175}
1176
cea90e55
GW
1177static inline bool rt2x00_is_soc(struct rt2x00_dev *rt2x00dev)
1178{
1179 return rt2x00_intf(rt2x00dev, RT2X00_CHIP_INTF_SOC);
1180}
1181
a44d0141
GJ
1182/* Helpers for capability flags */
1183
1184static inline bool
1185rt2x00_has_cap_flag(struct rt2x00_dev *rt2x00dev,
1186 enum rt2x00_capability_flags cap_flag)
1187{
1188 return test_bit(cap_flag, &rt2x00dev->cap_flags);
1189}
1190
1191static inline bool
1192rt2x00_has_cap_hw_crypto(struct rt2x00_dev *rt2x00dev)
1193{
1194 return rt2x00_has_cap_flag(rt2x00dev, CAPABILITY_HW_CRYPTO);
1195}
1196
1197static inline bool
1198rt2x00_has_cap_power_limit(struct rt2x00_dev *rt2x00dev)
1199{
1200 return rt2x00_has_cap_flag(rt2x00dev, CAPABILITY_POWER_LIMIT);
1201}
1202
1203static inline bool
1204rt2x00_has_cap_control_filters(struct rt2x00_dev *rt2x00dev)
1205{
1206 return rt2x00_has_cap_flag(rt2x00dev, CAPABILITY_CONTROL_FILTERS);
1207}
1208
1209static inline bool
1210rt2x00_has_cap_control_filter_pspoll(struct rt2x00_dev *rt2x00dev)
1211{
1212 return rt2x00_has_cap_flag(rt2x00dev, CAPABILITY_CONTROL_FILTER_PSPOLL);
1213}
1214
1215static inline bool
1216rt2x00_has_cap_pre_tbtt_interrupt(struct rt2x00_dev *rt2x00dev)
1217{
1218 return rt2x00_has_cap_flag(rt2x00dev, CAPABILITY_PRE_TBTT_INTERRUPT);
1219}
1220
1221static inline bool
1222rt2x00_has_cap_link_tuning(struct rt2x00_dev *rt2x00dev)
1223{
1224 return rt2x00_has_cap_flag(rt2x00dev, CAPABILITY_LINK_TUNING);
1225}
1226
1227static inline bool
1228rt2x00_has_cap_frame_type(struct rt2x00_dev *rt2x00dev)
1229{
1230 return rt2x00_has_cap_flag(rt2x00dev, CAPABILITY_FRAME_TYPE);
1231}
1232
1233static inline bool
1234rt2x00_has_cap_rf_sequence(struct rt2x00_dev *rt2x00dev)
1235{
1236 return rt2x00_has_cap_flag(rt2x00dev, CAPABILITY_RF_SEQUENCE);
1237}
1238
1239static inline bool
1240rt2x00_has_cap_external_lna_a(struct rt2x00_dev *rt2x00dev)
1241{
1242 return rt2x00_has_cap_flag(rt2x00dev, CAPABILITY_EXTERNAL_LNA_A);
1243}
1244
1245static inline bool
1246rt2x00_has_cap_external_lna_bg(struct rt2x00_dev *rt2x00dev)
1247{
1248 return rt2x00_has_cap_flag(rt2x00dev, CAPABILITY_EXTERNAL_LNA_BG);
1249}
1250
1251static inline bool
1252rt2x00_has_cap_double_antenna(struct rt2x00_dev *rt2x00dev)
1253{
1254 return rt2x00_has_cap_flag(rt2x00dev, CAPABILITY_DOUBLE_ANTENNA);
1255}
1256
1257static inline bool
1258rt2x00_has_cap_bt_coexist(struct rt2x00_dev *rt2x00dev)
1259{
1260 return rt2x00_has_cap_flag(rt2x00dev, CAPABILITY_BT_COEXIST);
1261}
1262
1263static inline bool
1264rt2x00_has_cap_vco_recalibration(struct rt2x00_dev *rt2x00dev)
1265{
1266 return rt2x00_has_cap_flag(rt2x00dev, CAPABILITY_VCO_RECALIBRATION);
1267}
1268
239c249d 1269/**
c4da0048 1270 * rt2x00queue_map_txskb - Map a skb into DMA for TX purposes.
fa69560f 1271 * @entry: Pointer to &struct queue_entry
4ea545d4
SG
1272 *
1273 * Returns -ENOMEM if mapping fail, 0 otherwise.
239c249d 1274 */
4ea545d4 1275int rt2x00queue_map_txskb(struct queue_entry *entry);
239c249d 1276
0b8004aa
GW
1277/**
1278 * rt2x00queue_unmap_skb - Unmap a skb from DMA.
fa69560f 1279 * @entry: Pointer to &struct queue_entry
0b8004aa 1280 */
fa69560f 1281void rt2x00queue_unmap_skb(struct queue_entry *entry);
0b8004aa 1282
11f818e0
HS
1283/**
1284 * rt2x00queue_get_tx_queue - Convert tx queue index to queue pointer
1285 * @rt2x00dev: Pointer to &struct rt2x00_dev.
1286 * @queue: rt2x00 queue index (see &enum data_queue_qid).
1287 *
1288 * Returns NULL for non tx queues.
1289 */
1290static inline struct data_queue *
1291rt2x00queue_get_tx_queue(struct rt2x00_dev *rt2x00dev,
1292 const enum data_queue_qid queue)
1293{
1294 if (queue < rt2x00dev->ops->tx_queues && rt2x00dev->tx)
1295 return &rt2x00dev->tx[queue];
1296
61c6e489
GW
1297 if (queue == QID_ATIM)
1298 return rt2x00dev->atim;
1299
11f818e0
HS
1300 return NULL;
1301}
1302
181d6902
ID
1303/**
1304 * rt2x00queue_get_entry - Get queue entry where the given index points to.
9a46d44e 1305 * @queue: Pointer to &struct data_queue from where we obtain the entry.
181d6902
ID
1306 * @index: Index identifier for obtaining the correct index.
1307 */
1308struct queue_entry *rt2x00queue_get_entry(struct data_queue *queue,
1309 enum queue_index index);
1310
0b7fde54
ID
1311/**
1312 * rt2x00queue_pause_queue - Pause a data queue
1313 * @queue: Pointer to &struct data_queue.
1314 *
1315 * This function will pause the data queue locally, preventing
1316 * new frames to be added to the queue (while the hardware is
1317 * still allowed to run).
1318 */
1319void rt2x00queue_pause_queue(struct data_queue *queue);
1320
1321/**
1322 * rt2x00queue_unpause_queue - unpause a data queue
1323 * @queue: Pointer to &struct data_queue.
1324 *
1325 * This function will unpause the data queue locally, allowing
1326 * new frames to be added to the queue again.
1327 */
1328void rt2x00queue_unpause_queue(struct data_queue *queue);
1329
1330/**
1331 * rt2x00queue_start_queue - Start a data queue
1332 * @queue: Pointer to &struct data_queue.
1333 *
1334 * This function will start handling all pending frames in the queue.
1335 */
1336void rt2x00queue_start_queue(struct data_queue *queue);
1337
1338/**
1339 * rt2x00queue_stop_queue - Halt a data queue
1340 * @queue: Pointer to &struct data_queue.
1341 *
1342 * This function will stop all pending frames in the queue.
1343 */
1344void rt2x00queue_stop_queue(struct data_queue *queue);
1345
5be65609
ID
1346/**
1347 * rt2x00queue_flush_queue - Flush a data queue
1348 * @queue: Pointer to &struct data_queue.
1349 * @drop: True to drop all pending frames.
1350 *
1351 * This function will flush the queue. After this call
25985edc 1352 * the queue is guaranteed to be empty.
5be65609
ID
1353 */
1354void rt2x00queue_flush_queue(struct data_queue *queue, bool drop);
1355
0b7fde54
ID
1356/**
1357 * rt2x00queue_start_queues - Start all data queues
1358 * @rt2x00dev: Pointer to &struct rt2x00_dev.
1359 *
1360 * This function will loop through all available queues to start them
1361 */
1362void rt2x00queue_start_queues(struct rt2x00_dev *rt2x00dev);
1363
1364/**
1365 * rt2x00queue_stop_queues - Halt all data queues
1366 * @rt2x00dev: Pointer to &struct rt2x00_dev.
1367 *
1368 * This function will loop through all available queues to stop
1369 * any pending frames.
1370 */
1371void rt2x00queue_stop_queues(struct rt2x00_dev *rt2x00dev);
1372
5be65609
ID
1373/**
1374 * rt2x00queue_flush_queues - Flush all data queues
1375 * @rt2x00dev: Pointer to &struct rt2x00_dev.
1376 * @drop: True to drop all pending frames.
1377 *
1378 * This function will loop through all available queues to flush
1379 * any pending frames.
1380 */
1381void rt2x00queue_flush_queues(struct rt2x00_dev *rt2x00dev, bool drop);
1382
b4df4708
GW
1383/*
1384 * Debugfs handlers.
1385 */
1386/**
1387 * rt2x00debug_dump_frame - Dump a frame to userspace through debugfs.
1388 * @rt2x00dev: Pointer to &struct rt2x00_dev.
1389 * @type: The type of frame that is being dumped.
dd35cc08 1390 * @entry: The queue entry containing the frame to be dumped.
b4df4708
GW
1391 */
1392#ifdef CONFIG_RT2X00_LIB_DEBUGFS
1393void rt2x00debug_dump_frame(struct rt2x00_dev *rt2x00dev,
2ceb8137 1394 enum rt2x00_dump_type type, struct queue_entry *entry);
b4df4708
GW
1395#else
1396static inline void rt2x00debug_dump_frame(struct rt2x00_dev *rt2x00dev,
1397 enum rt2x00_dump_type type,
2ceb8137 1398 struct queue_entry *entry)
b4df4708
GW
1399{
1400}
1401#endif /* CONFIG_RT2X00_LIB_DEBUGFS */
1402
18325523
HS
1403/*
1404 * Utility functions.
1405 */
1406u32 rt2x00lib_get_bssidx(struct rt2x00_dev *rt2x00dev,
1407 struct ieee80211_vif *vif);
9766cb70 1408void rt2x00lib_set_mac_address(struct rt2x00_dev *rt2x00dev, u8 *eeprom_mac_addr);
18325523 1409
95ea3627
ID
1410/*
1411 * Interrupt context handlers.
1412 */
1413void rt2x00lib_beacondone(struct rt2x00_dev *rt2x00dev);
9f926fb5 1414void rt2x00lib_pretbtt(struct rt2x00_dev *rt2x00dev);
64e7d723 1415void rt2x00lib_dmastart(struct queue_entry *entry);
652a9dd2 1416void rt2x00lib_dmadone(struct queue_entry *entry);
181d6902
ID
1417void rt2x00lib_txdone(struct queue_entry *entry,
1418 struct txdone_entry_desc *txdesc);
a09305d0
SG
1419void rt2x00lib_txdone_nomatch(struct queue_entry *entry,
1420 struct txdone_entry_desc *txdesc);
3392bece 1421void rt2x00lib_txdone_noinfo(struct queue_entry *entry, u32 status);
88211021 1422void rt2x00lib_rxdone(struct queue_entry *entry, gfp_t gfp);
95ea3627 1423
95ea3627
ID
1424/*
1425 * mac80211 handlers.
1426 */
36323f81
TH
1427void rt2x00mac_tx(struct ieee80211_hw *hw,
1428 struct ieee80211_tx_control *control,
1429 struct sk_buff *skb);
95ea3627
ID
1430int rt2x00mac_start(struct ieee80211_hw *hw);
1431void rt2x00mac_stop(struct ieee80211_hw *hw);
1432int rt2x00mac_add_interface(struct ieee80211_hw *hw,
1ed32e4f 1433 struct ieee80211_vif *vif);
95ea3627 1434void rt2x00mac_remove_interface(struct ieee80211_hw *hw,
1ed32e4f 1435 struct ieee80211_vif *vif);
e8975581 1436int rt2x00mac_config(struct ieee80211_hw *hw, u32 changed);
3a643d24
ID
1437void rt2x00mac_configure_filter(struct ieee80211_hw *hw,
1438 unsigned int changed_flags,
1439 unsigned int *total_flags,
3ac64bee 1440 u64 multicast);
930c06f2
SS
1441int rt2x00mac_set_tim(struct ieee80211_hw *hw, struct ieee80211_sta *sta,
1442 bool set);
2bb057d0
ID
1443#ifdef CONFIG_RT2X00_LIB_CRYPTO
1444int rt2x00mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
dc822b5d 1445 struct ieee80211_vif *vif, struct ieee80211_sta *sta,
2bb057d0
ID
1446 struct ieee80211_key_conf *key);
1447#else
1448#define rt2x00mac_set_key NULL
1449#endif /* CONFIG_RT2X00_LIB_CRYPTO */
a344d677
JB
1450void rt2x00mac_sw_scan_start(struct ieee80211_hw *hw,
1451 struct ieee80211_vif *vif,
1452 const u8 *mac_addr);
1453void rt2x00mac_sw_scan_complete(struct ieee80211_hw *hw,
1454 struct ieee80211_vif *vif);
95ea3627
ID
1455int rt2x00mac_get_stats(struct ieee80211_hw *hw,
1456 struct ieee80211_low_level_stats *stats);
471b3efd
JB
1457void rt2x00mac_bss_info_changed(struct ieee80211_hw *hw,
1458 struct ieee80211_vif *vif,
1459 struct ieee80211_bss_conf *bss_conf,
1460 u32 changes);
8a3a3c85
EP
1461int rt2x00mac_conf_tx(struct ieee80211_hw *hw,
1462 struct ieee80211_vif *vif, u16 queue,
95ea3627 1463 const struct ieee80211_tx_queue_params *params);
e47a5cdd 1464void rt2x00mac_rfkill_poll(struct ieee80211_hw *hw);
77be2c54
EG
1465void rt2x00mac_flush(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
1466 u32 queues, bool drop);
0ed7b3c0
ID
1467int rt2x00mac_set_antenna(struct ieee80211_hw *hw, u32 tx_ant, u32 rx_ant);
1468int rt2x00mac_get_antenna(struct ieee80211_hw *hw, u32 *tx_ant, u32 *rx_ant);
e7dee444
ID
1469void rt2x00mac_get_ringparam(struct ieee80211_hw *hw,
1470 u32 *tx, u32 *tx_max, u32 *rx, u32 *rx_max);
5f0dd296 1471bool rt2x00mac_tx_frames_pending(struct ieee80211_hw *hw);
95ea3627
ID
1472
1473/*
1474 * Driver allocation handlers.
1475 */
1476int rt2x00lib_probe_dev(struct rt2x00_dev *rt2x00dev);
1477void rt2x00lib_remove_dev(struct rt2x00_dev *rt2x00dev);
1478#ifdef CONFIG_PM
1479int rt2x00lib_suspend(struct rt2x00_dev *rt2x00dev, pm_message_t state);
1480int rt2x00lib_resume(struct rt2x00_dev *rt2x00dev);
1481#endif /* CONFIG_PM */
1482
1483#endif /* RT2X00_H */