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Merge branch 'for-2.6.28' of git://linux-nfs.org/~bfields/linux
[linux-2.6-block.git] / drivers / net / via-velocity.c
CommitLineData
1da177e4
LT		 1/*
2 * This code is derived from the VIA reference driver (copyright message
3 * below) provided to Red Hat by VIA Networking Technologies, Inc. for
4 * addition to the Linux kernel.
5 *
6 * The code has been merged into one source file, cleaned up to follow
7 * Linux coding style, ported to the Linux 2.6 kernel tree and cleaned
8 * for 64bit hardware platforms.
9 *
10 * TODO
1da177e4
LT		 11 * rx_copybreak/alignment
12 * Scatter gather
13 * More testing
14 *
113aa838 15 * The changes are (c) Copyright 2004, Red Hat Inc. <alan@lxorguk.ukuu.org.uk>
1da177e4
LT		 16 * Additional fixes and clean up: Francois Romieu
17 *
18 * This source has not been verified for use in safety critical systems.
19 *
20 * Please direct queries about the revamped driver to the linux-kernel
21 * list not VIA.
22 *
23 * Original code:
24 *
25 * Copyright (c) 1996, 2003 VIA Networking Technologies, Inc.
26 * All rights reserved.
27 *
28 * This software may be redistributed and/or modified under
29 * the terms of the GNU General Public License as published by the Free
30 * Software Foundation; either version 2 of the License, or
31 * any later version.
32 *
33 * This program is distributed in the hope that it will be useful, but
34 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
35 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
36 * for more details.
37 *
38 * Author: Chuang Liang-Shing, AJ Jiang
39 *
40 * Date: Jan 24, 2003
41 *
42 * MODULE_LICENSE("GPL");
43 *
44 */
45
46
47#include <linux/module.h>
48#include <linux/types.h>
1da177e4
LT		 49#include <linux/init.h>
50#include <linux/mm.h>
51#include <linux/errno.h>
52#include <linux/ioport.h>
53#include <linux/pci.h>
54#include <linux/kernel.h>
55#include <linux/netdevice.h>
56#include <linux/etherdevice.h>
57#include <linux/skbuff.h>
58#include <linux/delay.h>
59#include <linux/timer.h>
60#include <linux/slab.h>
61#include <linux/interrupt.h>
1da177e4
LT		 62#include <linux/string.h>
63#include <linux/wait.h>
64#include <asm/io.h>
65#include <linux/if.h>
1da177e4
LT		 66#include <asm/uaccess.h>
67#include <linux/proc_fs.h>
68#include <linux/inetdevice.h>
69#include <linux/reboot.h>
70#include <linux/ethtool.h>
71#include <linux/mii.h>
72#include <linux/in.h>
73#include <linux/if_arp.h>
501e4d24 74#include <linux/if_vlan.h>
1da177e4
LT		 75#include <linux/ip.h>
76#include <linux/tcp.h>
77#include <linux/udp.h>
78#include <linux/crc-ccitt.h>
79#include <linux/crc32.h>
80
81#include "via-velocity.h"
82
83
84static int velocity_nics = 0;
85static int msglevel = MSG_LEVEL_INFO;
86
01faccbf
SH		 87/**
88 * mac_get_cam_mask - Read a CAM mask
89 * @regs: register block for this velocity
90 * @mask: buffer to store mask
91 *
92 * Fetch the mask bits of the selected CAM and store them into the
93 * provided mask buffer.
94 */
95
96static void mac_get_cam_mask(struct mac_regs __iomem * regs, u8 * mask)
97{
98 int i;
99
100 /* Select CAM mask */
101 BYTE_REG_BITS_SET(CAMCR_PS_CAM_MASK, CAMCR_PS1 | CAMCR_PS0, &regs->CAMCR);
102
103 writeb(0, &regs->CAMADDR);
104
105 /* read mask */
106 for (i = 0; i < 8; i++)
107 *mask++ = readb(&(regs->MARCAM[i]));
108
109 /* disable CAMEN */
110 writeb(0, &regs->CAMADDR);
111
112 /* Select mar */
113 BYTE_REG_BITS_SET(CAMCR_PS_MAR, CAMCR_PS1 | CAMCR_PS0, &regs->CAMCR);
114
115}
116
117
118/**
119 * mac_set_cam_mask - Set a CAM mask
120 * @regs: register block for this velocity
121 * @mask: CAM mask to load
122 *
123 * Store a new mask into a CAM
124 */
125
126static void mac_set_cam_mask(struct mac_regs __iomem * regs, u8 * mask)
127{
128 int i;
129 /* Select CAM mask */
130 BYTE_REG_BITS_SET(CAMCR_PS_CAM_MASK, CAMCR_PS1 | CAMCR_PS0, &regs->CAMCR);
131
132 writeb(CAMADDR_CAMEN, &regs->CAMADDR);
133
134 for (i = 0; i < 8; i++) {
135 writeb(*mask++, &(regs->MARCAM[i]));
136 }
137 /* disable CAMEN */
138 writeb(0, &regs->CAMADDR);
139
140 /* Select mar */
141 BYTE_REG_BITS_SET(CAMCR_PS_MAR, CAMCR_PS1 | CAMCR_PS0, &regs->CAMCR);
142}
143
144static void mac_set_vlan_cam_mask(struct mac_regs __iomem * regs, u8 * mask)
145{
146 int i;
147 /* Select CAM mask */
148 BYTE_REG_BITS_SET(CAMCR_PS_CAM_MASK, CAMCR_PS1 | CAMCR_PS0, &regs->CAMCR);
149
150 writeb(CAMADDR_CAMEN | CAMADDR_VCAMSL, &regs->CAMADDR);
151
152 for (i = 0; i < 8; i++) {
153 writeb(*mask++, &(regs->MARCAM[i]));
154 }
155 /* disable CAMEN */
156 writeb(0, &regs->CAMADDR);
157
158 /* Select mar */
159 BYTE_REG_BITS_SET(CAMCR_PS_MAR, CAMCR_PS1 | CAMCR_PS0, &regs->CAMCR);
160}
161
162/**
163 * mac_set_cam - set CAM data
164 * @regs: register block of this velocity
165 * @idx: Cam index
166 * @addr: 2 or 6 bytes of CAM data
167 *
168 * Load an address or vlan tag into a CAM
169 */
170
171static void mac_set_cam(struct mac_regs __iomem * regs, int idx, const u8 *addr)
172{
173 int i;
174
175 /* Select CAM mask */
176 BYTE_REG_BITS_SET(CAMCR_PS_CAM_DATA, CAMCR_PS1 | CAMCR_PS0, &regs->CAMCR);
177
178 idx &= (64 - 1);
179
180 writeb(CAMADDR_CAMEN | idx, &regs->CAMADDR);
181
182 for (i = 0; i < 6; i++) {
183 writeb(*addr++, &(regs->MARCAM[i]));
184 }
185 BYTE_REG_BITS_ON(CAMCR_CAMWR, &regs->CAMCR);
186
187 udelay(10);
188
189 writeb(0, &regs->CAMADDR);
190
191 /* Select mar */
192 BYTE_REG_BITS_SET(CAMCR_PS_MAR, CAMCR_PS1 | CAMCR_PS0, &regs->CAMCR);
193}
194
195static void mac_set_vlan_cam(struct mac_regs __iomem * regs, int idx,
196 const u8 *addr)
197{
198
199 /* Select CAM mask */
200 BYTE_REG_BITS_SET(CAMCR_PS_CAM_DATA, CAMCR_PS1 | CAMCR_PS0, &regs->CAMCR);
201
202 idx &= (64 - 1);
203
204 writeb(CAMADDR_CAMEN | CAMADDR_VCAMSL | idx, &regs->CAMADDR);
205 writew(*((u16 *) addr), &regs->MARCAM[0]);
206
207 BYTE_REG_BITS_ON(CAMCR_CAMWR, &regs->CAMCR);
208
209 udelay(10);
210
211 writeb(0, &regs->CAMADDR);
212
213 /* Select mar */
214 BYTE_REG_BITS_SET(CAMCR_PS_MAR, CAMCR_PS1 | CAMCR_PS0, &regs->CAMCR);
215}
216
217
218/**
219 * mac_wol_reset - reset WOL after exiting low power
220 * @regs: register block of this velocity
221 *
222 * Called after we drop out of wake on lan mode in order to
223 * reset the Wake on lan features. This function doesn't restore
224 * the rest of the logic from the result of sleep/wakeup
225 */
226
227static void mac_wol_reset(struct mac_regs __iomem * regs)
228{
229
230 /* Turn off SWPTAG right after leaving power mode */
231 BYTE_REG_BITS_OFF(STICKHW_SWPTAG, &regs->STICKHW);
232 /* clear sticky bits */
233 BYTE_REG_BITS_OFF((STICKHW_DS1 | STICKHW_DS0), &regs->STICKHW);
234
235 BYTE_REG_BITS_OFF(CHIPGCR_FCGMII, &regs->CHIPGCR);
236 BYTE_REG_BITS_OFF(CHIPGCR_FCMODE, &regs->CHIPGCR);
237 /* disable force PME-enable */
238 writeb(WOLCFG_PMEOVR, &regs->WOLCFGClr);
239 /* disable power-event config bit */
240 writew(0xFFFF, &regs->WOLCRClr);
241 /* clear power status */
242 writew(0xFFFF, &regs->WOLSRClr);
243}
1da177e4
LT		 244
245static int velocity_mii_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd);
7282d491 246static const struct ethtool_ops velocity_ethtool_ops;
1da177e4
LT		 247
248/*
249 Define module options
250*/
251
252MODULE_AUTHOR("VIA Networking Technologies, Inc.");
253MODULE_LICENSE("GPL");
254MODULE_DESCRIPTION("VIA Networking Velocity Family Gigabit Ethernet Adapter Driver");
255
256#define VELOCITY_PARAM(N,D) \
257 static int N[MAX_UNITS]=OPTION_DEFAULT;\
258 module_param_array(N, int, NULL, 0); \
259 MODULE_PARM_DESC(N, D);
260
261#define RX_DESC_MIN 64
262#define RX_DESC_MAX 255
263#define RX_DESC_DEF 64
264VELOCITY_PARAM(RxDescriptors, "Number of receive descriptors");
265
266#define TX_DESC_MIN 16
267#define TX_DESC_MAX 256
268#define TX_DESC_DEF 64
269VELOCITY_PARAM(TxDescriptors, "Number of transmit descriptors");
270
1da177e4
LT		 271#define RX_THRESH_MIN 0
272#define RX_THRESH_MAX 3
273#define RX_THRESH_DEF 0
274/* rx_thresh[] is used for controlling the receive fifo threshold.
275 0: indicate the rxfifo threshold is 128 bytes.
276 1: indicate the rxfifo threshold is 512 bytes.
277 2: indicate the rxfifo threshold is 1024 bytes.
278 3: indicate the rxfifo threshold is store & forward.
279*/
280VELOCITY_PARAM(rx_thresh, "Receive fifo threshold");
281
282#define DMA_LENGTH_MIN 0
283#define DMA_LENGTH_MAX 7
284#define DMA_LENGTH_DEF 0
285
286/* DMA_length[] is used for controlling the DMA length
287 0: 8 DWORDs
288 1: 16 DWORDs
289 2: 32 DWORDs
290 3: 64 DWORDs
291 4: 128 DWORDs
292 5: 256 DWORDs
293 6: SF(flush till emply)
294 7: SF(flush till emply)
295*/
296VELOCITY_PARAM(DMA_length, "DMA length");
297
1da177e4
LT		 298#define IP_ALIG_DEF 0
299/* IP_byte_align[] is used for IP header DWORD byte aligned
300 0: indicate the IP header won't be DWORD byte aligned.(Default) .
301 1: indicate the IP header will be DWORD byte aligned.
302 In some enviroment, the IP header should be DWORD byte aligned,
303 or the packet will be droped when we receive it. (eg: IPVS)
304*/
305VELOCITY_PARAM(IP_byte_align, "Enable IP header dword aligned");
306
307#define TX_CSUM_DEF 1
308/* txcsum_offload[] is used for setting the checksum offload ability of NIC.
309 (We only support RX checksum offload now)
310 0: disable csum_offload[checksum offload
311 1: enable checksum offload. (Default)
312*/
313VELOCITY_PARAM(txcsum_offload, "Enable transmit packet checksum offload");
314
315#define FLOW_CNTL_DEF 1
316#define FLOW_CNTL_MIN 1
317#define FLOW_CNTL_MAX 5
318
319/* flow_control[] is used for setting the flow control ability of NIC.
320 1: hardware deafult - AUTO (default). Use Hardware default value in ANAR.
321 2: enable TX flow control.
322 3: enable RX flow control.
323 4: enable RX/TX flow control.
324 5: disable
325*/
326VELOCITY_PARAM(flow_control, "Enable flow control ability");
327
328#define MED_LNK_DEF 0
329#define MED_LNK_MIN 0
330#define MED_LNK_MAX 4
331/* speed_duplex[] is used for setting the speed and duplex mode of NIC.
332 0: indicate autonegotiation for both speed and duplex mode
333 1: indicate 100Mbps half duplex mode
334 2: indicate 100Mbps full duplex mode
335 3: indicate 10Mbps half duplex mode
336 4: indicate 10Mbps full duplex mode
337
338 Note:
339 if EEPROM have been set to the force mode, this option is ignored
340 by driver.
341*/
342VELOCITY_PARAM(speed_duplex, "Setting the speed and duplex mode");
343
344#define VAL_PKT_LEN_DEF 0
345/* ValPktLen[] is used for setting the checksum offload ability of NIC.
346 0: Receive frame with invalid layer 2 length (Default)
347 1: Drop frame with invalid layer 2 length
348*/
349VELOCITY_PARAM(ValPktLen, "Receiving or Drop invalid 802.3 frame");
350
351#define WOL_OPT_DEF 0
352#define WOL_OPT_MIN 0
353#define WOL_OPT_MAX 7
354/* wol_opts[] is used for controlling wake on lan behavior.
355 0: Wake up if recevied a magic packet. (Default)
356 1: Wake up if link status is on/off.
357 2: Wake up if recevied an arp packet.
358 4: Wake up if recevied any unicast packet.
359 Those value can be sumed up to support more than one option.
360*/
361VELOCITY_PARAM(wol_opts, "Wake On Lan options");
362
363#define INT_WORKS_DEF 20
364#define INT_WORKS_MIN 10
365#define INT_WORKS_MAX 64
366
367VELOCITY_PARAM(int_works, "Number of packets per interrupt services");
368
369static int rx_copybreak = 200;
370module_param(rx_copybreak, int, 0644);
371MODULE_PARM_DESC(rx_copybreak, "Copy breakpoint for copy-only-tiny-frames");
372
cabb7667
JG		 373static void velocity_init_info(struct pci_dev *pdev, struct velocity_info *vptr,
374 const struct velocity_info_tbl *info);
1da177e4
LT		 375static int velocity_get_pci_info(struct velocity_info *, struct pci_dev *pdev);
376static void velocity_print_info(struct velocity_info *vptr);
377static int velocity_open(struct net_device *dev);
378static int velocity_change_mtu(struct net_device *dev, int mtu);
379static int velocity_xmit(struct sk_buff *skb, struct net_device *dev);
7d12e780 380static int velocity_intr(int irq, void *dev_instance);
1da177e4
LT		 381static void velocity_set_multi(struct net_device *dev);
382static struct net_device_stats *velocity_get_stats(struct net_device *dev);
383static int velocity_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
384static int velocity_close(struct net_device *dev);
385static int velocity_receive_frame(struct velocity_info *, int idx);
386static int velocity_alloc_rx_buf(struct velocity_info *, int idx);
387static void velocity_free_rd_ring(struct velocity_info *vptr);
388static void velocity_free_tx_buf(struct velocity_info *vptr, struct velocity_td_info *);
389static int velocity_soft_reset(struct velocity_info *vptr);
390static void mii_init(struct velocity_info *vptr, u32 mii_status);
8a22dddb 391static u32 velocity_get_link(struct net_device *dev);
1da177e4
LT		 392static u32 velocity_get_opt_media_mode(struct velocity_info *vptr);
393static void velocity_print_link_status(struct velocity_info *vptr);
394static void safe_disable_mii_autopoll(struct mac_regs __iomem * regs);
395static void velocity_shutdown(struct velocity_info *vptr);
396static void enable_flow_control_ability(struct velocity_info *vptr);
397static void enable_mii_autopoll(struct mac_regs __iomem * regs);
398static int velocity_mii_read(struct mac_regs __iomem *, u8 byIdx, u16 * pdata);
399static int velocity_mii_write(struct mac_regs __iomem *, u8 byMiiAddr, u16 data);
400static u32 mii_check_media_mode(struct mac_regs __iomem * regs);
401static u32 check_connection_type(struct mac_regs __iomem * regs);
402static int velocity_set_media_mode(struct velocity_info *vptr, u32 mii_status);
403
404#ifdef CONFIG_PM
405
406static int velocity_suspend(struct pci_dev *pdev, pm_message_t state);
407static int velocity_resume(struct pci_dev *pdev);
408
ce9f7fe3
RD		 409static DEFINE_SPINLOCK(velocity_dev_list_lock);
410static LIST_HEAD(velocity_dev_list);
411
412#endif
413
414#if defined(CONFIG_PM) && defined(CONFIG_INET)
415
1da177e4
LT		 416static int velocity_netdev_event(struct notifier_block *nb, unsigned long notification, void *ptr);
417
418static struct notifier_block velocity_inetaddr_notifier = {
419 .notifier_call = velocity_netdev_event,
420};
421
1da177e4
LT		 422static void velocity_register_notifier(void)
423{
424 register_inetaddr_notifier(&velocity_inetaddr_notifier);
425}
426
427static void velocity_unregister_notifier(void)
428{
429 unregister_inetaddr_notifier(&velocity_inetaddr_notifier);
430}
431
ce9f7fe3 432#else
1da177e4
LT		 433
434#define velocity_register_notifier() do {} while (0)
435#define velocity_unregister_notifier() do {} while (0)
436
ce9f7fe3 437#endif
1da177e4
LT		 438
439/*
440 * Internal board variants. At the moment we have only one
441 */
442
4f14b92f 443static struct velocity_info_tbl chip_info_table[] = {
cabb7667
JG		 444 {CHIP_TYPE_VT6110, "VIA Networking Velocity Family Gigabit Ethernet Adapter", 1, 0x00FFFFFFUL},
445 { }
1da177e4
LT		 446};
447
448/*
449 * Describe the PCI device identifiers that we support in this
450 * device driver. Used for hotplug autoloading.
451 */
452
e54f4893
JG		 453static const struct pci_device_id velocity_id_table[] __devinitdata = {
454 { PCI_DEVICE(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_612X) },
455 { }
1da177e4
LT		 456};
457
458MODULE_DEVICE_TABLE(pci, velocity_id_table);
459
460/**
461 * get_chip_name - identifier to name
462 * @id: chip identifier
463 *
464 * Given a chip identifier return a suitable description. Returns
465 * a pointer a static string valid while the driver is loaded.
466 */
467
01faccbf 468static const char __devinit *get_chip_name(enum chip_type chip_id)
1da177e4
LT		 469{
470 int i;
471 for (i = 0; chip_info_table[i].name != NULL; i++)
472 if (chip_info_table[i].chip_id == chip_id)
473 break;
474 return chip_info_table[i].name;
475}
476
477/**
478 * velocity_remove1 - device unplug
479 * @pdev: PCI device being removed
480 *
481 * Device unload callback. Called on an unplug or on module
482 * unload for each active device that is present. Disconnects
483 * the device from the network layer and frees all the resources
484 */
485
486static void __devexit velocity_remove1(struct pci_dev *pdev)
487{
488 struct net_device *dev = pci_get_drvdata(pdev);
8ab6f3f7 489 struct velocity_info *vptr = netdev_priv(dev);
1da177e4
LT		 490
491#ifdef CONFIG_PM
492 unsigned long flags;
493
494 spin_lock_irqsave(&velocity_dev_list_lock, flags);
495 if (!list_empty(&velocity_dev_list))
496 list_del(&vptr->list);
497 spin_unlock_irqrestore(&velocity_dev_list_lock, flags);
498#endif
499 unregister_netdev(dev);
500 iounmap(vptr->mac_regs);
501 pci_release_regions(pdev);
502 pci_disable_device(pdev);
503 pci_set_drvdata(pdev, NULL);
504 free_netdev(dev);
505
506 velocity_nics--;
507}
508
509/**
510 * velocity_set_int_opt - parser for integer options
511 * @opt: pointer to option value
512 * @val: value the user requested (or -1 for default)
513 * @min: lowest value allowed
514 * @max: highest value allowed
515 * @def: default value
516 * @name: property name
517 * @dev: device name
518 *
519 * Set an integer property in the module options. This function does
520 * all the verification and checking as well as reporting so that
521 * we don't duplicate code for each option.
522 */
523
07b5f6a6 524static void __devinit velocity_set_int_opt(int *opt, int val, int min, int max, int def, char *name, const char *devname)
1da177e4
LT		 525{
526 if (val == -1)
527 *opt = def;
528 else if (val < min || val > max) {
529 VELOCITY_PRT(MSG_LEVEL_INFO, KERN_NOTICE "%s: the value of parameter %s is invalid, the valid range is (%d-%d)\n",
530 devname, name, min, max);
531 *opt = def;
532 } else {
533 VELOCITY_PRT(MSG_LEVEL_INFO, KERN_INFO "%s: set value of parameter %s to %d\n",
534 devname, name, val);
535 *opt = val;
536 }
537}
538
539/**
540 * velocity_set_bool_opt - parser for boolean options
541 * @opt: pointer to option value
542 * @val: value the user requested (or -1 for default)
543 * @def: default value (yes/no)
544 * @flag: numeric value to set for true.
545 * @name: property name
546 * @dev: device name
547 *
548 * Set a boolean property in the module options. This function does
549 * all the verification and checking as well as reporting so that
550 * we don't duplicate code for each option.
551 */
552
07b5f6a6 553static void __devinit velocity_set_bool_opt(u32 * opt, int val, int def, u32 flag, char *name, const char *devname)
1da177e4
LT		 554{
555 (*opt) &= (~flag);
556 if (val == -1)
557 *opt |= (def ? flag : 0);
558 else if (val < 0 || val > 1) {
6aa20a22 559 printk(KERN_NOTICE "%s: the value of parameter %s is invalid, the valid range is (0-1)\n",
1da177e4
LT		 560 devname, name);
561 *opt |= (def ? flag : 0);
562 } else {
6aa20a22 563 printk(KERN_INFO "%s: set parameter %s to %s\n",
1da177e4
LT		 564 devname, name, val ? "TRUE" : "FALSE");
565 *opt |= (val ? flag : 0);
566 }
567}
568
569/**
570 * velocity_get_options - set options on device
571 * @opts: option structure for the device
572 * @index: index of option to use in module options array
573 * @devname: device name
574 *
575 * Turn the module and command options into a single structure
576 * for the current device
577 */
578
07b5f6a6 579static void __devinit velocity_get_options(struct velocity_opt *opts, int index, const char *devname)
1da177e4
LT		 580{
581
582 velocity_set_int_opt(&opts->rx_thresh, rx_thresh[index], RX_THRESH_MIN, RX_THRESH_MAX, RX_THRESH_DEF, "rx_thresh", devname);
583 velocity_set_int_opt(&opts->DMA_length, DMA_length[index], DMA_LENGTH_MIN, DMA_LENGTH_MAX, DMA_LENGTH_DEF, "DMA_length", devname);
584 velocity_set_int_opt(&opts->numrx, RxDescriptors[index], RX_DESC_MIN, RX_DESC_MAX, RX_DESC_DEF, "RxDescriptors", devname);
585 velocity_set_int_opt(&opts->numtx, TxDescriptors[index], TX_DESC_MIN, TX_DESC_MAX, TX_DESC_DEF, "TxDescriptors", devname);
501e4d24 586
1da177e4
LT		 587 velocity_set_bool_opt(&opts->flags, txcsum_offload[index], TX_CSUM_DEF, VELOCITY_FLAGS_TX_CSUM, "txcsum_offload", devname);
588 velocity_set_int_opt(&opts->flow_cntl, flow_control[index], FLOW_CNTL_MIN, FLOW_CNTL_MAX, FLOW_CNTL_DEF, "flow_control", devname);
589 velocity_set_bool_opt(&opts->flags, IP_byte_align[index], IP_ALIG_DEF, VELOCITY_FLAGS_IP_ALIGN, "IP_byte_align", devname);
590 velocity_set_bool_opt(&opts->flags, ValPktLen[index], VAL_PKT_LEN_DEF, VELOCITY_FLAGS_VAL_PKT_LEN, "ValPktLen", devname);
591 velocity_set_int_opt((int *) &opts->spd_dpx, speed_duplex[index], MED_LNK_MIN, MED_LNK_MAX, MED_LNK_DEF, "Media link mode", devname);
592 velocity_set_int_opt((int *) &opts->wol_opts, wol_opts[index], WOL_OPT_MIN, WOL_OPT_MAX, WOL_OPT_DEF, "Wake On Lan options", devname);
593 velocity_set_int_opt((int *) &opts->int_works, int_works[index], INT_WORKS_MIN, INT_WORKS_MAX, INT_WORKS_DEF, "Interrupt service works", devname);
594 opts->numrx = (opts->numrx & ~3);
595}
596
597/**
598 * velocity_init_cam_filter - initialise CAM
599 * @vptr: velocity to program
600 *
601 * Initialize the content addressable memory used for filters. Load
602 * appropriately according to the presence of VLAN
603 */
604
605static void velocity_init_cam_filter(struct velocity_info *vptr)
606{
607 struct mac_regs __iomem * regs = vptr->mac_regs;
608
609 /* Turn on MCFG_PQEN, turn off MCFG_RTGOPT */
610 WORD_REG_BITS_SET(MCFG_PQEN, MCFG_RTGOPT, &regs->MCFG);
611 WORD_REG_BITS_ON(MCFG_VIDFR, &regs->MCFG);
612
613 /* Disable all CAMs */
614 memset(vptr->vCAMmask, 0, sizeof(u8) * 8);
615 memset(vptr->mCAMmask, 0, sizeof(u8) * 8);
01faccbf
SH		 616 mac_set_vlan_cam_mask(regs, vptr->vCAMmask);
617 mac_set_cam_mask(regs, vptr->mCAMmask);
1da177e4 618
d4f73c8e 619 /* Enable VCAMs */
501e4d24 620 if (vptr->vlgrp) {
d4f73c8e
FR		 621 unsigned int vid, i = 0;
622
623 if (!vlan_group_get_device(vptr->vlgrp, 0))
624 WORD_REG_BITS_ON(MCFG_RTGOPT, &regs->MCFG);
501e4d24 625
d4f73c8e
FR		 626 for (vid = 1; (vid < VLAN_VID_MASK); vid++) {
627 if (vlan_group_get_device(vptr->vlgrp, vid)) {
628 mac_set_vlan_cam(regs, i, (u8 *) &vid);
629 vptr->vCAMmask[i / 8] |= 0x1 << (i % 8);
630 if (++i >= VCAM_SIZE)
631 break;
501e4d24
SH		 632 }
633 }
01faccbf 634 mac_set_vlan_cam_mask(regs, vptr->vCAMmask);
1da177e4
LT		 635 }
636}
637
d4f73c8e
FR		 638static void velocity_vlan_rx_register(struct net_device *dev,
639 struct vlan_group *grp)
640{
641 struct velocity_info *vptr = netdev_priv(dev);
642
643 vptr->vlgrp = grp;
644}
645
501e4d24
SH		 646static void velocity_vlan_rx_add_vid(struct net_device *dev, unsigned short vid)
647{
648 struct velocity_info *vptr = netdev_priv(dev);
649
650 spin_lock_irq(&vptr->lock);
651 velocity_init_cam_filter(vptr);
652 spin_unlock_irq(&vptr->lock);
653}
654
655static void velocity_vlan_rx_kill_vid(struct net_device *dev, unsigned short vid)
656{
657 struct velocity_info *vptr = netdev_priv(dev);
658
659 spin_lock_irq(&vptr->lock);
660 vlan_group_set_device(vptr->vlgrp, vid, NULL);
661 velocity_init_cam_filter(vptr);
662 spin_unlock_irq(&vptr->lock);
663}
664
3c4dc711
FR		 665static void velocity_init_rx_ring_indexes(struct velocity_info *vptr)
666{
667 vptr->rx.dirty = vptr->rx.filled = vptr->rx.curr = 0;
668}
501e4d24 669
1da177e4
LT		 670/**
671 * velocity_rx_reset - handle a receive reset
672 * @vptr: velocity we are resetting
673 *
674 * Reset the ownership and status for the receive ring side.
675 * Hand all the receive queue to the NIC.
676 */
677
678static void velocity_rx_reset(struct velocity_info *vptr)
679{
680
681 struct mac_regs __iomem * regs = vptr->mac_regs;
682 int i;
683
3c4dc711 684 velocity_init_rx_ring_indexes(vptr);
1da177e4
LT		 685
686 /*
687 * Init state, all RD entries belong to the NIC
688 */
689 for (i = 0; i < vptr->options.numrx; ++i)
0fe9f15e 690 vptr->rx.ring[i].rdesc0.len |= OWNED_BY_NIC;
1da177e4
LT		 691
692 writew(vptr->options.numrx, &regs->RBRDU);
0fe9f15e 693 writel(vptr->rx.pool_dma, &regs->RDBaseLo);
1da177e4
LT		 694 writew(0, &regs->RDIdx);
695 writew(vptr->options.numrx - 1, &regs->RDCSize);
696}
697
698/**
699 * velocity_init_registers - initialise MAC registers
700 * @vptr: velocity to init
701 * @type: type of initialisation (hot or cold)
702 *
703 * Initialise the MAC on a reset or on first set up on the
704 * hardware.
705 */
706
6aa20a22 707static void velocity_init_registers(struct velocity_info *vptr,
1da177e4
LT		 708 enum velocity_init_type type)
709{
710 struct mac_regs __iomem * regs = vptr->mac_regs;
711 int i, mii_status;
712
713 mac_wol_reset(regs);
714
715 switch (type) {
716 case VELOCITY_INIT_RESET:
717 case VELOCITY_INIT_WOL:
718
719 netif_stop_queue(vptr->dev);
720
721 /*
722 * Reset RX to prevent RX pointer not on the 4X location
723 */
724 velocity_rx_reset(vptr);
725 mac_rx_queue_run(regs);
726 mac_rx_queue_wake(regs);
727
728 mii_status = velocity_get_opt_media_mode(vptr);
729 if (velocity_set_media_mode(vptr, mii_status) != VELOCITY_LINK_CHANGE) {
730 velocity_print_link_status(vptr);
731 if (!(vptr->mii_status & VELOCITY_LINK_FAIL))
732 netif_wake_queue(vptr->dev);
733 }
734
735 enable_flow_control_ability(vptr);
736
737 mac_clear_isr(regs);
738 writel(CR0_STOP, &regs->CR0Clr);
6aa20a22 739 writel((CR0_DPOLL | CR0_TXON | CR0_RXON | CR0_STRT),
1da177e4
LT		 740 &regs->CR0Set);
741
742 break;
743
744 case VELOCITY_INIT_COLD:
745 default:
746 /*
747 * Do reset
748 */
749 velocity_soft_reset(vptr);
750 mdelay(5);
751
752 mac_eeprom_reload(regs);
753 for (i = 0; i < 6; i++) {
754 writeb(vptr->dev->dev_addr[i], &(regs->PAR[i]));
755 }
756 /*
757 * clear Pre_ACPI bit.
758 */
759 BYTE_REG_BITS_OFF(CFGA_PACPI, &(regs->CFGA));
760 mac_set_rx_thresh(regs, vptr->options.rx_thresh);
761 mac_set_dma_length(regs, vptr->options.DMA_length);
762
763 writeb(WOLCFG_SAM | WOLCFG_SAB, &regs->WOLCFGSet);
764 /*
765 * Back off algorithm use original IEEE standard
766 */
767 BYTE_REG_BITS_SET(CFGB_OFSET, (CFGB_CRANDOM | CFGB_CAP | CFGB_MBA | CFGB_BAKOPT), &regs->CFGB);
768
769 /*
770 * Init CAM filter
771 */
772 velocity_init_cam_filter(vptr);
773
774 /*
775 * Set packet filter: Receive directed and broadcast address
776 */
777 velocity_set_multi(vptr->dev);
778
779 /*
780 * Enable MII auto-polling
781 */
782 enable_mii_autopoll(regs);
783
784 vptr->int_mask = INT_MASK_DEF;
785
0fe9f15e 786 writel(vptr->rx.pool_dma, &regs->RDBaseLo);
1da177e4
LT		 787 writew(vptr->options.numrx - 1, &regs->RDCSize);
788 mac_rx_queue_run(regs);
789 mac_rx_queue_wake(regs);
790
791 writew(vptr->options.numtx - 1, &regs->TDCSize);
792
0fe9f15e
FR		 793 for (i = 0; i < vptr->tx.numq; i++) {
794 writel(vptr->tx.pool_dma[i], &regs->TDBaseLo[i]);
1da177e4
LT		 795 mac_tx_queue_run(regs, i);
796 }
797
798 init_flow_control_register(vptr);
799
800 writel(CR0_STOP, &regs->CR0Clr);
801 writel((CR0_DPOLL | CR0_TXON | CR0_RXON | CR0_STRT), &regs->CR0Set);
802
803 mii_status = velocity_get_opt_media_mode(vptr);
804 netif_stop_queue(vptr->dev);
805
806 mii_init(vptr, mii_status);
807
808 if (velocity_set_media_mode(vptr, mii_status) != VELOCITY_LINK_CHANGE) {
809 velocity_print_link_status(vptr);
810 if (!(vptr->mii_status & VELOCITY_LINK_FAIL))
811 netif_wake_queue(vptr->dev);
812 }
813
814 enable_flow_control_ability(vptr);
815 mac_hw_mibs_init(regs);
816 mac_write_int_mask(vptr->int_mask, regs);
817 mac_clear_isr(regs);
818
819 }
820}
821
822/**
823 * velocity_soft_reset - soft reset
824 * @vptr: velocity to reset
825 *
826 * Kick off a soft reset of the velocity adapter and then poll
827 * until the reset sequence has completed before returning.
828 */
829
830static int velocity_soft_reset(struct velocity_info *vptr)
831{
832 struct mac_regs __iomem * regs = vptr->mac_regs;
833 int i = 0;
834
835 writel(CR0_SFRST, &regs->CR0Set);
836
837 for (i = 0; i < W_MAX_TIMEOUT; i++) {
838 udelay(5);
839 if (!DWORD_REG_BITS_IS_ON(CR0_SFRST, &regs->CR0Set))
840 break;
841 }
842
843 if (i == W_MAX_TIMEOUT) {
844 writel(CR0_FORSRST, &regs->CR0Set);
845 /* FIXME: PCI POSTING */
846 /* delay 2ms */
847 mdelay(2);
848 }
849 return 0;
850}
851
852/**
853 * velocity_found1 - set up discovered velocity card
854 * @pdev: PCI device
855 * @ent: PCI device table entry that matched
856 *
857 * Configure a discovered adapter from scratch. Return a negative
858 * errno error code on failure paths.
859 */
860
861static int __devinit velocity_found1(struct pci_dev *pdev, const struct pci_device_id *ent)
862{
863 static int first = 1;
864 struct net_device *dev;
865 int i;
07b5f6a6 866 const char *drv_string;
cabb7667 867 const struct velocity_info_tbl *info = &chip_info_table[ent->driver_data];
1da177e4
LT		 868 struct velocity_info *vptr;
869 struct mac_regs __iomem * regs;
870 int ret = -ENOMEM;
871
e54f4893
JG		 872 /* FIXME: this driver, like almost all other ethernet drivers,
873 * can support more than MAX_UNITS.
874 */
1da177e4 875 if (velocity_nics >= MAX_UNITS) {
6aa20a22 876 dev_notice(&pdev->dev, "already found %d NICs.\n",
e54f4893 877 velocity_nics);
1da177e4
LT		 878 return -ENODEV;
879 }
880
881 dev = alloc_etherdev(sizeof(struct velocity_info));
e54f4893 882 if (!dev) {
9b91cf9d 883 dev_err(&pdev->dev, "allocate net device failed.\n");
1da177e4
LT		 884 goto out;
885 }
6aa20a22 886
1da177e4 887 /* Chain it all together */
6aa20a22 888
1da177e4 889 SET_NETDEV_DEV(dev, &pdev->dev);
8ab6f3f7 890 vptr = netdev_priv(dev);
1da177e4
LT		 891
892
893 if (first) {
6aa20a22 894 printk(KERN_INFO "%s Ver. %s\n",
1da177e4
LT		 895 VELOCITY_FULL_DRV_NAM, VELOCITY_VERSION);
896 printk(KERN_INFO "Copyright (c) 2002, 2003 VIA Networking Technologies, Inc.\n");
897 printk(KERN_INFO "Copyright (c) 2004 Red Hat Inc.\n");
898 first = 0;
899 }
900
901 velocity_init_info(pdev, vptr, info);
902
903 vptr->dev = dev;
904
905 dev->irq = pdev->irq;
906
907 ret = pci_enable_device(pdev);
6aa20a22 908 if (ret < 0)
1da177e4
LT		 909 goto err_free_dev;
910
911 ret = velocity_get_pci_info(vptr, pdev);
912 if (ret < 0) {
e54f4893 913 /* error message already printed */
1da177e4
LT		 914 goto err_disable;
915 }
916
917 ret = pci_request_regions(pdev, VELOCITY_NAME);
918 if (ret < 0) {
9b91cf9d 919 dev_err(&pdev->dev, "No PCI resources.\n");
1da177e4
LT		 920 goto err_disable;
921 }
922
cabb7667 923 regs = ioremap(vptr->memaddr, VELOCITY_IO_SIZE);
1da177e4
LT		 924 if (regs == NULL) {
925 ret = -EIO;
926 goto err_release_res;
927 }
928
929 vptr->mac_regs = regs;
930
931 mac_wol_reset(regs);
932
933 dev->base_addr = vptr->ioaddr;
934
935 for (i = 0; i < 6; i++)
936 dev->dev_addr[i] = readb(&regs->PAR[i]);
937
938
07b5f6a6
SH		 939 drv_string = dev_driver_string(&pdev->dev);
940
941 velocity_get_options(&vptr->options, velocity_nics, drv_string);
1da177e4 942
6aa20a22 943 /*
1da177e4
LT		 944 * Mask out the options cannot be set to the chip
945 */
6aa20a22 946
1da177e4
LT		 947 vptr->options.flags &= info->flags;
948
949 /*
950 * Enable the chip specified capbilities
951 */
6aa20a22 952
1da177e4
LT		 953 vptr->flags = vptr->options.flags | (info->flags & 0xFF000000UL);
954
955 vptr->wol_opts = vptr->options.wol_opts;
956 vptr->flags |= VELOCITY_FLAGS_WOL_ENABLED;
957
958 vptr->phy_id = MII_GET_PHY_ID(vptr->mac_regs);
959
960 dev->irq = pdev->irq;
961 dev->open = velocity_open;
962 dev->hard_start_xmit = velocity_xmit;
963 dev->stop = velocity_close;
964 dev->get_stats = velocity_get_stats;
965 dev->set_multicast_list = velocity_set_multi;
966 dev->do_ioctl = velocity_ioctl;
967 dev->ethtool_ops = &velocity_ethtool_ops;
968 dev->change_mtu = velocity_change_mtu;
501e4d24
SH		 969
970 dev->vlan_rx_add_vid = velocity_vlan_rx_add_vid;
971 dev->vlan_rx_kill_vid = velocity_vlan_rx_kill_vid;
d4f73c8e 972 dev->vlan_rx_register = velocity_vlan_rx_register;
501e4d24 973
1da177e4
LT		 974#ifdef VELOCITY_ZERO_COPY_SUPPORT
975 dev->features |= NETIF_F_SG;
976#endif
d4f73c8e
FR		 977 dev->features |= NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_FILTER |
978 NETIF_F_HW_VLAN_RX;
1da177e4 979
501e4d24 980 if (vptr->flags & VELOCITY_FLAGS_TX_CSUM)
9f3f46b5 981 dev->features |= NETIF_F_IP_CSUM;
1da177e4
LT		 982
983 ret = register_netdev(dev);
984 if (ret < 0)
985 goto err_iounmap;
986
8a22dddb
FR		 987 if (velocity_get_link(dev))
988 netif_carrier_off(dev);
989
1da177e4
LT		 990 velocity_print_info(vptr);
991 pci_set_drvdata(pdev, dev);
6aa20a22 992
1da177e4 993 /* and leave the chip powered down */
6aa20a22 994
1da177e4
LT		 995 pci_set_power_state(pdev, PCI_D3hot);
996#ifdef CONFIG_PM
997 {
998 unsigned long flags;
999
1000 spin_lock_irqsave(&velocity_dev_list_lock, flags);
1001 list_add(&vptr->list, &velocity_dev_list);
1002 spin_unlock_irqrestore(&velocity_dev_list_lock, flags);
1003 }
1004#endif
1005 velocity_nics++;
1006out:
1007 return ret;
1008
1009err_iounmap:
1010 iounmap(regs);
1011err_release_res:
1012 pci_release_regions(pdev);
1013err_disable:
1014 pci_disable_device(pdev);
1015err_free_dev:
1016 free_netdev(dev);
1017 goto out;
1018}
1019
1020/**
1021 * velocity_print_info - per driver data
1022 * @vptr: velocity
1023 *
1024 * Print per driver data as the kernel driver finds Velocity
1025 * hardware
1026 */
1027
1028static void __devinit velocity_print_info(struct velocity_info *vptr)
1029{
1030 struct net_device *dev = vptr->dev;
1031
1032 printk(KERN_INFO "%s: %s\n", dev->name, get_chip_name(vptr->chip_id));
6aa20a22
JG		 1033 printk(KERN_INFO "%s: Ethernet Address: %2.2X:%2.2X:%2.2X:%2.2X:%2.2X:%2.2X\n",
1034 dev->name,
1035 dev->dev_addr[0], dev->dev_addr[1], dev->dev_addr[2],
1da177e4
LT		 1036 dev->dev_addr[3], dev->dev_addr[4], dev->dev_addr[5]);
1037}
1038
1039/**
1040 * velocity_init_info - init private data
1041 * @pdev: PCI device
1042 * @vptr: Velocity info
1043 * @info: Board type
1044 *
1045 * Set up the initial velocity_info struct for the device that has been
1046 * discovered.
1047 */
1048
cabb7667
JG		 1049static void __devinit velocity_init_info(struct pci_dev *pdev,
1050 struct velocity_info *vptr,
1051 const struct velocity_info_tbl *info)
1da177e4
LT		 1052{
1053 memset(vptr, 0, sizeof(struct velocity_info));
1054
1055 vptr->pdev = pdev;
1056 vptr->chip_id = info->chip_id;
0fe9f15e 1057 vptr->tx.numq = info->txqueue;
1da177e4
LT		 1058 vptr->multicast_limit = MCAM_SIZE;
1059 spin_lock_init(&vptr->lock);
1060 INIT_LIST_HEAD(&vptr->list);
1061}
1062
1063/**
1064 * velocity_get_pci_info - retrieve PCI info for device
1065 * @vptr: velocity device
1066 * @pdev: PCI device it matches
1067 *
1068 * Retrieve the PCI configuration space data that interests us from
1069 * the kernel PCI layer
1070 */
1071
1072static int __devinit velocity_get_pci_info(struct velocity_info *vptr, struct pci_dev *pdev)
1073{
44c10138 1074 vptr->rev_id = pdev->revision;
6aa20a22 1075
1da177e4
LT		 1076 pci_set_master(pdev);
1077
1078 vptr->ioaddr = pci_resource_start(pdev, 0);
1079 vptr->memaddr = pci_resource_start(pdev, 1);
6aa20a22 1080
e54f4893 1081 if (!(pci_resource_flags(pdev, 0) & IORESOURCE_IO)) {
9b91cf9d 1082 dev_err(&pdev->dev,
e54f4893 1083 "region #0 is not an I/O resource, aborting.\n");
1da177e4
LT		 1084 return -EINVAL;
1085 }
1086
e54f4893 1087 if ((pci_resource_flags(pdev, 1) & IORESOURCE_IO)) {
9b91cf9d 1088 dev_err(&pdev->dev,
e54f4893 1089 "region #1 is an I/O resource, aborting.\n");
1da177e4
LT		 1090 return -EINVAL;
1091 }
1092
cabb7667 1093 if (pci_resource_len(pdev, 1) < VELOCITY_IO_SIZE) {
9b91cf9d 1094 dev_err(&pdev->dev, "region #1 is too small.\n");
1da177e4
LT		 1095 return -EINVAL;
1096 }
1097 vptr->pdev = pdev;
1098
1099 return 0;
1100}
1101
1102/**
3c4dc711 1103 * velocity_init_dma_rings - set up DMA rings
1da177e4
LT		 1104 * @vptr: Velocity to set up
1105 *
1106 * Allocate PCI mapped DMA rings for the receive and transmit layer
1107 * to use.
1108 */
1109
3c4dc711 1110static int velocity_init_dma_rings(struct velocity_info *vptr)
1da177e4 1111{
8ac53afc
FR		 1112 struct velocity_opt *opt = &vptr->options;
1113 const unsigned int rx_ring_size = opt->numrx * sizeof(struct rx_desc);
1114 const unsigned int tx_ring_size = opt->numtx * sizeof(struct tx_desc);
1115 struct pci_dev *pdev = vptr->pdev;
1da177e4 1116 dma_addr_t pool_dma;
8ac53afc
FR		 1117 void *pool;
1118 unsigned int i;
1da177e4
LT		 1119
1120 /*
8ac53afc
FR		 1121 * Allocate all RD/TD rings a single pool.
1122 *
1da177e4
LT		 1123 * pci_alloc_consistent() fulfills the requirement for 64 bytes
1124 * alignment
1125 */
0fe9f15e 1126 pool = pci_alloc_consistent(pdev, tx_ring_size * vptr->tx.numq +
8ac53afc
FR		 1127 rx_ring_size, &pool_dma);
1128 if (!pool) {
1129 dev_err(&pdev->dev, "%s : DMA memory allocation failed.\n",
1130 vptr->dev->name);
1da177e4
LT		 1131 return -ENOMEM;
1132 }
1133
0fe9f15e
FR		 1134 vptr->rx.ring = pool;
1135 vptr->rx.pool_dma = pool_dma;
1da177e4 1136
8ac53afc
FR		 1137 pool += rx_ring_size;
1138 pool_dma += rx_ring_size;
1da177e4 1139
0fe9f15e
FR		 1140 for (i = 0; i < vptr->tx.numq; i++) {
1141 vptr->tx.rings[i] = pool;
1142 vptr->tx.pool_dma[i] = pool_dma;
8ac53afc
FR		 1143 pool += tx_ring_size;
1144 pool_dma += tx_ring_size;
1da177e4 1145 }
8ac53afc 1146
1da177e4
LT		 1147 return 0;
1148}
1149
1150/**
3c4dc711 1151 * velocity_free_dma_rings - free PCI ring pointers
1da177e4
LT		 1152 * @vptr: Velocity to free from
1153 *
1154 * Clean up the PCI ring buffers allocated to this velocity.
1155 */
1156
3c4dc711 1157static void velocity_free_dma_rings(struct velocity_info *vptr)
1da177e4 1158{
580a6902 1159 const int size = vptr->options.numrx * sizeof(struct rx_desc) +
0fe9f15e 1160 vptr->options.numtx * sizeof(struct tx_desc) * vptr->tx.numq;
1da177e4 1161
0fe9f15e 1162 pci_free_consistent(vptr->pdev, size, vptr->rx.ring, vptr->rx.pool_dma);
1da177e4
LT		 1163}
1164
28133176 1165static void velocity_give_many_rx_descs(struct velocity_info *vptr)
1da177e4
LT		 1166{
1167 struct mac_regs __iomem *regs = vptr->mac_regs;
1168 int avail, dirty, unusable;
1169
1170 /*
1171 * RD number must be equal to 4X per hardware spec
1172 * (programming guide rev 1.20, p.13)
1173 */
0fe9f15e 1174 if (vptr->rx.filled < 4)
1da177e4
LT		 1175 return;
1176
1177 wmb();
1178
0fe9f15e
FR		 1179 unusable = vptr->rx.filled & 0x0003;
1180 dirty = vptr->rx.dirty - unusable;
1181 for (avail = vptr->rx.filled & 0xfffc; avail; avail--) {
1da177e4 1182 dirty = (dirty > 0) ? dirty - 1 : vptr->options.numrx - 1;
0fe9f15e 1183 vptr->rx.ring[dirty].rdesc0.len |= OWNED_BY_NIC;
1da177e4
LT		 1184 }
1185
0fe9f15e
FR		 1186 writew(vptr->rx.filled & 0xfffc, &regs->RBRDU);
1187 vptr->rx.filled = unusable;
1da177e4
LT		 1188}
1189
1190static int velocity_rx_refill(struct velocity_info *vptr)
1191{
0fe9f15e 1192 int dirty = vptr->rx.dirty, done = 0;
1da177e4
LT		 1193
1194 do {
0fe9f15e 1195 struct rx_desc *rd = vptr->rx.ring + dirty;
1da177e4
LT		 1196
1197 /* Fine for an all zero Rx desc at init time as well */
4a51c0d0 1198 if (rd->rdesc0.len & OWNED_BY_NIC)
1da177e4
LT		 1199 break;
1200
0fe9f15e 1201 if (!vptr->rx.info[dirty].skb) {
28133176 1202 if (velocity_alloc_rx_buf(vptr, dirty) < 0)
1da177e4
LT		 1203 break;
1204 }
1205 done++;
6aa20a22 1206 dirty = (dirty < vptr->options.numrx - 1) ? dirty + 1 : 0;
0fe9f15e 1207 } while (dirty != vptr->rx.curr);
1da177e4
LT		 1208
1209 if (done) {
0fe9f15e
FR		 1210 vptr->rx.dirty = dirty;
1211 vptr->rx.filled += done;
1da177e4
LT		 1212 }
1213
28133176 1214 return done;
1da177e4
LT		 1215}
1216
9088d9a4
FR		 1217static void velocity_set_rxbufsize(struct velocity_info *vptr, int mtu)
1218{
0fe9f15e 1219 vptr->rx.buf_sz = (mtu <= ETH_DATA_LEN) ? PKT_BUF_SZ : mtu + 32;
9088d9a4
FR		 1220}
1221
1da177e4
LT		 1222/**
1223 * velocity_init_rd_ring - set up receive ring
1224 * @vptr: velocity to configure
1225 *
1226 * Allocate and set up the receive buffers for each ring slot and
1227 * assign them to the network adapter.
1228 */
1229
1230static int velocity_init_rd_ring(struct velocity_info *vptr)
1231{
28133176 1232 int ret = -ENOMEM;
48f6b053 1233
0fe9f15e 1234 vptr->rx.info = kcalloc(vptr->options.numrx,
ae94607d 1235 sizeof(struct velocity_rd_info), GFP_KERNEL);
0fe9f15e 1236 if (!vptr->rx.info)
28133176 1237 goto out;
1da177e4 1238
3c4dc711 1239 velocity_init_rx_ring_indexes(vptr);
1da177e4 1240
28133176 1241 if (velocity_rx_refill(vptr) != vptr->options.numrx) {
1da177e4
LT		 1242 VELOCITY_PRT(MSG_LEVEL_ERR, KERN_ERR
1243 "%s: failed to allocate RX buffer.\n", vptr->dev->name);
1244 velocity_free_rd_ring(vptr);
28133176 1245 goto out;
1da177e4 1246 }
ae94607d 1247
28133176
FR		 1248 ret = 0;
1249out:
1da177e4
LT		 1250 return ret;
1251}
1252
1253/**
1254 * velocity_free_rd_ring - free receive ring
1255 * @vptr: velocity to clean up
1256 *
1257 * Free the receive buffers for each ring slot and any
1258 * attached socket buffers that need to go away.
1259 */
1260
1261static void velocity_free_rd_ring(struct velocity_info *vptr)
1262{
1263 int i;
1264
0fe9f15e 1265 if (vptr->rx.info == NULL)
1da177e4
LT		 1266 return;
1267
1268 for (i = 0; i < vptr->options.numrx; i++) {
0fe9f15e
FR		 1269 struct velocity_rd_info *rd_info = &(vptr->rx.info[i]);
1270 struct rx_desc *rd = vptr->rx.ring + i;
b3c3e7d7
FR		 1271
1272 memset(rd, 0, sizeof(*rd));
1da177e4
LT		 1273
1274 if (!rd_info->skb)
1275 continue;
0fe9f15e 1276 pci_unmap_single(vptr->pdev, rd_info->skb_dma, vptr->rx.buf_sz,
1da177e4 1277 PCI_DMA_FROMDEVICE);
822f1a57 1278 rd_info->skb_dma = 0;
1da177e4
LT		 1279
1280 dev_kfree_skb(rd_info->skb);
1281 rd_info->skb = NULL;
1282 }
1283
0fe9f15e
FR		 1284 kfree(vptr->rx.info);
1285 vptr->rx.info = NULL;
1da177e4
LT		 1286}
1287
1288/**
1289 * velocity_init_td_ring - set up transmit ring
1290 * @vptr: velocity
1291 *
1292 * Set up the transmit ring and chain the ring pointers together.
1293 * Returns zero on success or a negative posix errno code for
1294 * failure.
1295 */
6aa20a22 1296
1da177e4
LT		 1297static int velocity_init_td_ring(struct velocity_info *vptr)
1298{
1da177e4 1299 dma_addr_t curr;
580a6902 1300 unsigned int j;
1da177e4
LT		 1301
1302 /* Init the TD ring entries */
0fe9f15e
FR		 1303 for (j = 0; j < vptr->tx.numq; j++) {
1304 curr = vptr->tx.pool_dma[j];
1da177e4 1305
0fe9f15e 1306 vptr->tx.infos[j] = kcalloc(vptr->options.numtx,
ae94607d
MK		 1307 sizeof(struct velocity_td_info),
1308 GFP_KERNEL);
0fe9f15e 1309 if (!vptr->tx.infos[j]) {
1da177e4 1310 while(--j >= 0)
0fe9f15e 1311 kfree(vptr->tx.infos[j]);
1da177e4
LT		 1312 return -ENOMEM;
1313 }
1da177e4 1314
0fe9f15e 1315 vptr->tx.tail[j] = vptr->tx.curr[j] = vptr->tx.used[j] = 0;
1da177e4
LT		 1316 }
1317 return 0;
1318}
1319
1320/*
1321 * FIXME: could we merge this with velocity_free_tx_buf ?
1322 */
1323
1324static void velocity_free_td_ring_entry(struct velocity_info *vptr,
1325 int q, int n)
1326{
0fe9f15e 1327 struct velocity_td_info * td_info = &(vptr->tx.infos[q][n]);
1da177e4 1328 int i;
6aa20a22 1329
1da177e4
LT		 1330 if (td_info == NULL)
1331 return;
6aa20a22 1332
1da177e4
LT		 1333 if (td_info->skb) {
1334 for (i = 0; i < td_info->nskb_dma; i++)
1335 {
1336 if (td_info->skb_dma[i]) {
6aa20a22 1337 pci_unmap_single(vptr->pdev, td_info->skb_dma[i],
1da177e4 1338 td_info->skb->len, PCI_DMA_TODEVICE);
822f1a57 1339 td_info->skb_dma[i] = 0;
1da177e4
LT		 1340 }
1341 }
1342 dev_kfree_skb(td_info->skb);
1343 td_info->skb = NULL;
1344 }
1345}
1346
1347/**
1348 * velocity_free_td_ring - free td ring
1349 * @vptr: velocity
1350 *
1351 * Free up the transmit ring for this particular velocity adapter.
1352 * We free the ring contents but not the ring itself.
1353 */
6aa20a22 1354
1da177e4
LT		 1355static void velocity_free_td_ring(struct velocity_info *vptr)
1356{
1357 int i, j;
1358
0fe9f15e
FR		 1359 for (j = 0; j < vptr->tx.numq; j++) {
1360 if (vptr->tx.infos[j] == NULL)
1da177e4
LT		 1361 continue;
1362 for (i = 0; i < vptr->options.numtx; i++) {
1363 velocity_free_td_ring_entry(vptr, j, i);
1364
1365 }
0fe9f15e
FR		 1366 kfree(vptr->tx.infos[j]);
1367 vptr->tx.infos[j] = NULL;
1da177e4
LT		 1368 }
1369}
1370
1371/**
1372 * velocity_rx_srv - service RX interrupt
1373 * @vptr: velocity
1374 * @status: adapter status (unused)
1375 *
1376 * Walk the receive ring of the velocity adapter and remove
1377 * any received packets from the receive queue. Hand the ring
1378 * slots back to the adapter for reuse.
1379 */
6aa20a22 1380
1da177e4
LT		 1381static int velocity_rx_srv(struct velocity_info *vptr, int status)
1382{
1383 struct net_device_stats *stats = &vptr->stats;
0fe9f15e 1384 int rd_curr = vptr->rx.curr;
1da177e4
LT		 1385 int works = 0;
1386
1387 do {
0fe9f15e 1388 struct rx_desc *rd = vptr->rx.ring + rd_curr;
1da177e4 1389
0fe9f15e 1390 if (!vptr->rx.info[rd_curr].skb)
1da177e4
LT		 1391 break;
1392
4a51c0d0 1393 if (rd->rdesc0.len & OWNED_BY_NIC)
1da177e4
LT		 1394 break;
1395
1396 rmb();
1397
1398 /*
1399 * Don't drop CE or RL error frame although RXOK is off
1400 */
4a51c0d0 1401 if (rd->rdesc0.RSR & (RSR_RXOK | RSR_CE | RSR_RL)) {
1da177e4
LT		 1402 if (velocity_receive_frame(vptr, rd_curr) < 0)
1403 stats->rx_dropped++;
1404 } else {
1405 if (rd->rdesc0.RSR & RSR_CRC)
1406 stats->rx_crc_errors++;
1407 if (rd->rdesc0.RSR & RSR_FAE)
1408 stats->rx_frame_errors++;
1409
1410 stats->rx_dropped++;
1411 }
1412
4a51c0d0 1413 rd->size |= RX_INTEN;
1da177e4
LT		 1414
1415 vptr->dev->last_rx = jiffies;
1416
1417 rd_curr++;
1418 if (rd_curr >= vptr->options.numrx)
1419 rd_curr = 0;
1420 } while (++works <= 15);
1421
0fe9f15e 1422 vptr->rx.curr = rd_curr;
1da177e4 1423
28133176
FR		 1424 if ((works > 0) && (velocity_rx_refill(vptr) > 0))
1425 velocity_give_many_rx_descs(vptr);
1da177e4
LT		 1426
1427 VAR_USED(stats);
1428 return works;
1429}
1430
1431/**
1432 * velocity_rx_csum - checksum process
1433 * @rd: receive packet descriptor
1434 * @skb: network layer packet buffer
1435 *
1436 * Process the status bits for the received packet and determine
1437 * if the checksum was computed and verified by the hardware
1438 */
6aa20a22 1439
1da177e4
LT		 1440static inline void velocity_rx_csum(struct rx_desc *rd, struct sk_buff *skb)
1441{
1442 skb->ip_summed = CHECKSUM_NONE;
1443
1444 if (rd->rdesc1.CSM & CSM_IPKT) {
1445 if (rd->rdesc1.CSM & CSM_IPOK) {
6aa20a22 1446 if ((rd->rdesc1.CSM & CSM_TCPKT) ||
1da177e4
LT		 1447 (rd->rdesc1.CSM & CSM_UDPKT)) {
1448 if (!(rd->rdesc1.CSM & CSM_TUPOK)) {
1449 return;
1450 }
1451 }
1452 skb->ip_summed = CHECKSUM_UNNECESSARY;
1453 }
1454 }
1455}
1456
1457/**
1458 * velocity_rx_copy - in place Rx copy for small packets
1459 * @rx_skb: network layer packet buffer candidate
1460 * @pkt_size: received data size
1461 * @rd: receive packet descriptor
1462 * @dev: network device
1463 *
1464 * Replace the current skb that is scheduled for Rx processing by a
1465 * shorter, immediatly allocated skb, if the received packet is small
1466 * enough. This function returns a negative value if the received
1467 * packet is too big or if memory is exhausted.
1468 */
c73d2589
SH		 1469static int velocity_rx_copy(struct sk_buff **rx_skb, int pkt_size,
1470 struct velocity_info *vptr)
1da177e4
LT		 1471{
1472 int ret = -1;
1da177e4
LT		 1473 if (pkt_size < rx_copybreak) {
1474 struct sk_buff *new_skb;
1475
c73d2589 1476 new_skb = netdev_alloc_skb(vptr->dev, pkt_size + 2);
1da177e4 1477 if (new_skb) {
1da177e4 1478 new_skb->ip_summed = rx_skb[0]->ip_summed;
c73d2589
SH		 1479 skb_reserve(new_skb, 2);
1480 skb_copy_from_linear_data(*rx_skb, new_skb->data, pkt_size);
1da177e4
LT		 1481 *rx_skb = new_skb;
1482 ret = 0;
1483 }
6aa20a22 1484
1da177e4
LT		 1485 }
1486 return ret;
1487}
1488
1489/**
1490 * velocity_iph_realign - IP header alignment
1491 * @vptr: velocity we are handling
1492 * @skb: network layer packet buffer
1493 * @pkt_size: received data size
1494 *
1495 * Align IP header on a 2 bytes boundary. This behavior can be
1496 * configured by the user.
1497 */
1498static inline void velocity_iph_realign(struct velocity_info *vptr,
1499 struct sk_buff *skb, int pkt_size)
1500{
1da177e4 1501 if (vptr->flags & VELOCITY_FLAGS_IP_ALIGN) {
c03571a3 1502 memmove(skb->data + 2, skb->data, pkt_size);
1da177e4
LT		 1503 skb_reserve(skb, 2);
1504 }
1505}
1506
1507/**
1508 * velocity_receive_frame - received packet processor
1509 * @vptr: velocity we are handling
1510 * @idx: ring index
6aa20a22 1511 *
1da177e4
LT		 1512 * A packet has arrived. We process the packet and if appropriate
1513 * pass the frame up the network stack
1514 */
6aa20a22 1515
1da177e4
LT		 1516static int velocity_receive_frame(struct velocity_info *vptr, int idx)
1517{
1518 void (*pci_action)(struct pci_dev *, dma_addr_t, size_t, int);
1519 struct net_device_stats *stats = &vptr->stats;
0fe9f15e
FR		 1520 struct velocity_rd_info *rd_info = &(vptr->rx.info[idx]);
1521 struct rx_desc *rd = &(vptr->rx.ring[idx]);
4a51c0d0 1522 int pkt_len = le16_to_cpu(rd->rdesc0.len) & 0x3fff;
1da177e4
LT		 1523 struct sk_buff *skb;
1524
1525 if (rd->rdesc0.RSR & (RSR_STP | RSR_EDP)) {
1526 VELOCITY_PRT(MSG_LEVEL_VERBOSE, KERN_ERR " %s : the received frame span multple RDs.\n", vptr->dev->name);
1527 stats->rx_length_errors++;
1528 return -EINVAL;
1529 }
1530
1531 if (rd->rdesc0.RSR & RSR_MAR)
1532 vptr->stats.multicast++;
1533
1534 skb = rd_info->skb;
1da177e4
LT		 1535
1536 pci_dma_sync_single_for_cpu(vptr->pdev, rd_info->skb_dma,
0fe9f15e 1537 vptr->rx.buf_sz, PCI_DMA_FROMDEVICE);
1da177e4
LT		 1538
1539 /*
1540 * Drop frame not meeting IEEE 802.3
1541 */
6aa20a22 1542
1da177e4
LT		 1543 if (vptr->flags & VELOCITY_FLAGS_VAL_PKT_LEN) {
1544 if (rd->rdesc0.RSR & RSR_RL) {
1545 stats->rx_length_errors++;
1546 return -EINVAL;
1547 }
1548 }
1549
1550 pci_action = pci_dma_sync_single_for_device;
1551
1552 velocity_rx_csum(rd, skb);
1553
1554 if (velocity_rx_copy(&skb, pkt_len, vptr) < 0) {
1555 velocity_iph_realign(vptr, skb, pkt_len);
1556 pci_action = pci_unmap_single;
1557 rd_info->skb = NULL;
1558 }
1559
0fe9f15e 1560 pci_action(vptr->pdev, rd_info->skb_dma, vptr->rx.buf_sz,
1da177e4
LT		 1561 PCI_DMA_FROMDEVICE);
1562
1563 skb_put(skb, pkt_len - 4);
4c13eb66 1564 skb->protocol = eth_type_trans(skb, vptr->dev);
1da177e4 1565
d4f73c8e
FR		 1566 if (vptr->vlgrp && (rd->rdesc0.RSR & RSR_DETAG)) {
1567 vlan_hwaccel_rx(skb, vptr->vlgrp,
1568 swab16(le16_to_cpu(rd->rdesc1.PQTAG)));
1569 } else
1570 netif_rx(skb);
1571
1da177e4 1572 stats->rx_bytes += pkt_len;
1da177e4
LT		 1573
1574 return 0;
1575}
1576
1577/**
1578 * velocity_alloc_rx_buf - allocate aligned receive buffer
1579 * @vptr: velocity
1580 * @idx: ring index
1581 *
1582 * Allocate a new full sized buffer for the reception of a frame and
1583 * map it into PCI space for the hardware to use. The hardware
1584 * requires *64* byte alignment of the buffer which makes life
1585 * less fun than would be ideal.
1586 */
6aa20a22 1587
1da177e4
LT		 1588static int velocity_alloc_rx_buf(struct velocity_info *vptr, int idx)
1589{
0fe9f15e
FR		 1590 struct rx_desc *rd = &(vptr->rx.ring[idx]);
1591 struct velocity_rd_info *rd_info = &(vptr->rx.info[idx]);
1da177e4 1592
0fe9f15e 1593 rd_info->skb = dev_alloc_skb(vptr->rx.buf_sz + 64);
1da177e4
LT		 1594 if (rd_info->skb == NULL)
1595 return -ENOMEM;
1596
1597 /*
1598 * Do the gymnastics to get the buffer head for data at
1599 * 64byte alignment.
1600 */
689be439 1601 skb_reserve(rd_info->skb, (unsigned long) rd_info->skb->data & 63);
0fe9f15e
FR		 1602 rd_info->skb_dma = pci_map_single(vptr->pdev, rd_info->skb->data,
1603 vptr->rx.buf_sz, PCI_DMA_FROMDEVICE);
6aa20a22 1604
1da177e4
LT		 1605 /*
1606 * Fill in the descriptor to match
0fe9f15e 1607 */
6aa20a22 1608
1da177e4 1609 *((u32 *) & (rd->rdesc0)) = 0;
0fe9f15e 1610 rd->size = cpu_to_le16(vptr->rx.buf_sz) | RX_INTEN;
1da177e4
LT		 1611 rd->pa_low = cpu_to_le32(rd_info->skb_dma);
1612 rd->pa_high = 0;
1613 return 0;
1614}
1615
1616/**
1617 * tx_srv - transmit interrupt service
1618 * @vptr; Velocity
1619 * @status:
1620 *
1621 * Scan the queues looking for transmitted packets that
1622 * we can complete and clean up. Update any statistics as
3a4fa0a2 1623 * necessary/
1da177e4 1624 */
6aa20a22 1625
1da177e4
LT		 1626static int velocity_tx_srv(struct velocity_info *vptr, u32 status)
1627{
1628 struct tx_desc *td;
1629 int qnum;
1630 int full = 0;
1631 int idx;
1632 int works = 0;
1633 struct velocity_td_info *tdinfo;
1634 struct net_device_stats *stats = &vptr->stats;
1635
0fe9f15e
FR		 1636 for (qnum = 0; qnum < vptr->tx.numq; qnum++) {
1637 for (idx = vptr->tx.tail[qnum]; vptr->tx.used[qnum] > 0;
1da177e4
LT		 1638 idx = (idx + 1) % vptr->options.numtx) {
1639
1640 /*
1641 * Get Tx Descriptor
1642 */
0fe9f15e
FR		 1643 td = &(vptr->tx.rings[qnum][idx]);
1644 tdinfo = &(vptr->tx.infos[qnum][idx]);
1da177e4 1645
4a51c0d0 1646 if (td->tdesc0.len & OWNED_BY_NIC)
1da177e4
LT		 1647 break;
1648
1649 if ((works++ > 15))
1650 break;
1651
1652 if (td->tdesc0.TSR & TSR0_TERR) {
1653 stats->tx_errors++;
1654 stats->tx_dropped++;
1655 if (td->tdesc0.TSR & TSR0_CDH)
1656 stats->tx_heartbeat_errors++;
1657 if (td->tdesc0.TSR & TSR0_CRS)
1658 stats->tx_carrier_errors++;
1659 if (td->tdesc0.TSR & TSR0_ABT)
1660 stats->tx_aborted_errors++;
1661 if (td->tdesc0.TSR & TSR0_OWC)
1662 stats->tx_window_errors++;
1663 } else {
1664 stats->tx_packets++;
1665 stats->tx_bytes += tdinfo->skb->len;
1666 }
1667 velocity_free_tx_buf(vptr, tdinfo);
0fe9f15e 1668 vptr->tx.used[qnum]--;
1da177e4 1669 }
0fe9f15e 1670 vptr->tx.tail[qnum] = idx;
1da177e4
LT		 1671
1672 if (AVAIL_TD(vptr, qnum) < 1) {
1673 full = 1;
1674 }
1675 }
1676 /*
1677 * Look to see if we should kick the transmit network
1678 * layer for more work.
1679 */
1680 if (netif_queue_stopped(vptr->dev) && (full == 0)
1681 && (!(vptr->mii_status & VELOCITY_LINK_FAIL))) {
1682 netif_wake_queue(vptr->dev);
1683 }
1684 return works;
1685}
1686
1687/**
1688 * velocity_print_link_status - link status reporting
1689 * @vptr: velocity to report on
1690 *
1691 * Turn the link status of the velocity card into a kernel log
1692 * description of the new link state, detailing speed and duplex
1693 * status
1694 */
1695
1696static void velocity_print_link_status(struct velocity_info *vptr)
1697{
1698
1699 if (vptr->mii_status & VELOCITY_LINK_FAIL) {
1700 VELOCITY_PRT(MSG_LEVEL_INFO, KERN_NOTICE "%s: failed to detect cable link\n", vptr->dev->name);
1701 } else if (vptr->options.spd_dpx == SPD_DPX_AUTO) {
b4fea61a 1702 VELOCITY_PRT(MSG_LEVEL_INFO, KERN_NOTICE "%s: Link auto-negotiation", vptr->dev->name);
1da177e4
LT		 1703
1704 if (vptr->mii_status & VELOCITY_SPEED_1000)
1705 VELOCITY_PRT(MSG_LEVEL_INFO, " speed 1000M bps");
1706 else if (vptr->mii_status & VELOCITY_SPEED_100)
1707 VELOCITY_PRT(MSG_LEVEL_INFO, " speed 100M bps");
1708 else
1709 VELOCITY_PRT(MSG_LEVEL_INFO, " speed 10M bps");
1710
1711 if (vptr->mii_status & VELOCITY_DUPLEX_FULL)
1712 VELOCITY_PRT(MSG_LEVEL_INFO, " full duplex\n");
1713 else
1714 VELOCITY_PRT(MSG_LEVEL_INFO, " half duplex\n");
1715 } else {
1716 VELOCITY_PRT(MSG_LEVEL_INFO, KERN_NOTICE "%s: Link forced", vptr->dev->name);
1717 switch (vptr->options.spd_dpx) {
1718 case SPD_DPX_100_HALF:
1719 VELOCITY_PRT(MSG_LEVEL_INFO, " speed 100M bps half duplex\n");
1720 break;
1721 case SPD_DPX_100_FULL:
1722 VELOCITY_PRT(MSG_LEVEL_INFO, " speed 100M bps full duplex\n");
1723 break;
1724 case SPD_DPX_10_HALF:
1725 VELOCITY_PRT(MSG_LEVEL_INFO, " speed 10M bps half duplex\n");
1726 break;
1727 case SPD_DPX_10_FULL:
1728 VELOCITY_PRT(MSG_LEVEL_INFO, " speed 10M bps full duplex\n");
1729 break;
1730 default:
1731 break;
1732 }
1733 }
1734}
1735
1736/**
1737 * velocity_error - handle error from controller
1738 * @vptr: velocity
1739 * @status: card status
1740 *
1741 * Process an error report from the hardware and attempt to recover
6aa20a22 1742 * the card itself. At the moment we cannot recover from some
1da177e4
LT		 1743 * theoretically impossible errors but this could be fixed using
1744 * the pci_device_failed logic to bounce the hardware
1745 *
1746 */
6aa20a22 1747
1da177e4
LT		 1748static void velocity_error(struct velocity_info *vptr, int status)
1749{
1750
1751 if (status & ISR_TXSTLI) {
1752 struct mac_regs __iomem * regs = vptr->mac_regs;
1753
0e6ff158 1754 printk(KERN_ERR "TD structure error TDindex=%hx\n", readw(&regs->TDIdx[0]));
1da177e4
LT		 1755 BYTE_REG_BITS_ON(TXESR_TDSTR, &regs->TXESR);
1756 writew(TRDCSR_RUN, &regs->TDCSRClr);
1757 netif_stop_queue(vptr->dev);
6aa20a22 1758
1da177e4
LT		 1759 /* FIXME: port over the pci_device_failed code and use it
1760 here */
1761 }
1762
1763 if (status & ISR_SRCI) {
1764 struct mac_regs __iomem * regs = vptr->mac_regs;
1765 int linked;
1766
1767 if (vptr->options.spd_dpx == SPD_DPX_AUTO) {
1768 vptr->mii_status = check_connection_type(regs);
1769
1770 /*
6aa20a22 1771 * If it is a 3119, disable frame bursting in
1da177e4
LT		 1772 * halfduplex mode and enable it in fullduplex
1773 * mode
1774 */
1775 if (vptr->rev_id < REV_ID_VT3216_A0) {
1776 if (vptr->mii_status | VELOCITY_DUPLEX_FULL)
1777 BYTE_REG_BITS_ON(TCR_TB2BDIS, &regs->TCR);
1778 else
1779 BYTE_REG_BITS_OFF(TCR_TB2BDIS, &regs->TCR);
1780 }
1781 /*
1782 * Only enable CD heart beat counter in 10HD mode
1783 */
1784 if (!(vptr->mii_status & VELOCITY_DUPLEX_FULL) && (vptr->mii_status & VELOCITY_SPEED_10)) {
1785 BYTE_REG_BITS_OFF(TESTCFG_HBDIS, &regs->TESTCFG);
1786 } else {
1787 BYTE_REG_BITS_ON(TESTCFG_HBDIS, &regs->TESTCFG);
1788 }
1789 }
1790 /*
1791 * Get link status from PHYSR0
1792 */
1793 linked = readb(&regs->PHYSR0) & PHYSR0_LINKGD;
1794
1795 if (linked) {
1796 vptr->mii_status &= ~VELOCITY_LINK_FAIL;
8a22dddb 1797 netif_carrier_on(vptr->dev);
1da177e4
LT		 1798 } else {
1799 vptr->mii_status |= VELOCITY_LINK_FAIL;
8a22dddb 1800 netif_carrier_off(vptr->dev);
1da177e4
LT		 1801 }
1802
1803 velocity_print_link_status(vptr);
1804 enable_flow_control_ability(vptr);
1805
1806 /*
6aa20a22 1807 * Re-enable auto-polling because SRCI will disable
1da177e4
LT		 1808 * auto-polling
1809 */
6aa20a22 1810
1da177e4
LT		 1811 enable_mii_autopoll(regs);
1812
1813 if (vptr->mii_status & VELOCITY_LINK_FAIL)
1814 netif_stop_queue(vptr->dev);
1815 else
1816 netif_wake_queue(vptr->dev);
1817
1818 };
1819 if (status & ISR_MIBFI)
1820 velocity_update_hw_mibs(vptr);
1821 if (status & ISR_LSTEI)
1822 mac_rx_queue_wake(vptr->mac_regs);
1823}
1824
1825/**
1826 * velocity_free_tx_buf - free transmit buffer
1827 * @vptr: velocity
1828 * @tdinfo: buffer
1829 *
1830 * Release an transmit buffer. If the buffer was preallocated then
1831 * recycle it, if not then unmap the buffer.
1832 */
6aa20a22 1833
1da177e4
LT		 1834static void velocity_free_tx_buf(struct velocity_info *vptr, struct velocity_td_info *tdinfo)
1835{
1836 struct sk_buff *skb = tdinfo->skb;
1837 int i;
1838
1839 /*
1840 * Don't unmap the pre-allocated tx_bufs
1841 */
580a6902 1842 if (tdinfo->skb_dma) {
1da177e4
LT		 1843
1844 for (i = 0; i < tdinfo->nskb_dma; i++) {
1845#ifdef VELOCITY_ZERO_COPY_SUPPORT
4a51c0d0 1846 pci_unmap_single(vptr->pdev, tdinfo->skb_dma[i], le16_to_cpu(td->tdesc1.len), PCI_DMA_TODEVICE);
1da177e4
LT		 1847#else
1848 pci_unmap_single(vptr->pdev, tdinfo->skb_dma[i], skb->len, PCI_DMA_TODEVICE);
1849#endif
1850 tdinfo->skb_dma[i] = 0;
1851 }
1852 }
1853 dev_kfree_skb_irq(skb);
1854 tdinfo->skb = NULL;
1855}
1856
3c4dc711
FR		 1857static int velocity_init_rings(struct velocity_info *vptr, int mtu)
1858{
1859 int ret;
1860
1861 velocity_set_rxbufsize(vptr, mtu);
1862
1863 ret = velocity_init_dma_rings(vptr);
1864 if (ret < 0)
1865 goto out;
1866
1867 ret = velocity_init_rd_ring(vptr);
1868 if (ret < 0)
1869 goto err_free_dma_rings_0;
1870
1871 ret = velocity_init_td_ring(vptr);
1872 if (ret < 0)
1873 goto err_free_rd_ring_1;
1874out:
1875 return ret;
1876
1877err_free_rd_ring_1:
1878 velocity_free_rd_ring(vptr);
1879err_free_dma_rings_0:
1880 velocity_free_dma_rings(vptr);
1881 goto out;
1882}
1883
1884static void velocity_free_rings(struct velocity_info *vptr)
1885{
1886 velocity_free_td_ring(vptr);
1887 velocity_free_rd_ring(vptr);
1888 velocity_free_dma_rings(vptr);
1889}
1890
1da177e4
LT		 1891/**
1892 * velocity_open - interface activation callback
1893 * @dev: network layer device to open
1894 *
1895 * Called when the network layer brings the interface up. Returns
1896 * a negative posix error code on failure, or zero on success.
1897 *
1898 * All the ring allocation and set up is done on open for this
1899 * adapter to minimise memory usage when inactive
1900 */
6aa20a22 1901
1da177e4
LT		 1902static int velocity_open(struct net_device *dev)
1903{
8ab6f3f7 1904 struct velocity_info *vptr = netdev_priv(dev);
1da177e4
LT		 1905 int ret;
1906
3c4dc711 1907 ret = velocity_init_rings(vptr, dev->mtu);
1da177e4
LT		 1908 if (ret < 0)
1909 goto out;
1910
6aa20a22 1911 /* Ensure chip is running */
1da177e4 1912 pci_set_power_state(vptr->pdev, PCI_D0);
6aa20a22 1913
28133176
FR		 1914 velocity_give_many_rx_descs(vptr);
1915
1da177e4
LT		 1916 velocity_init_registers(vptr, VELOCITY_INIT_COLD);
1917
1fb9df5d 1918 ret = request_irq(vptr->pdev->irq, &velocity_intr, IRQF_SHARED,
1da177e4
LT		 1919 dev->name, dev);
1920 if (ret < 0) {
1921 /* Power down the chip */
1922 pci_set_power_state(vptr->pdev, PCI_D3hot);
3c4dc711
FR		 1923 velocity_free_rings(vptr);
1924 goto out;
1da177e4
LT		 1925 }
1926
1927 mac_enable_int(vptr->mac_regs);
1928 netif_start_queue(dev);
1929 vptr->flags |= VELOCITY_FLAGS_OPENED;
1930out:
1931 return ret;
1da177e4
LT		 1932}
1933
6aa20a22 1934/**
1da177e4
LT		 1935 * velocity_change_mtu - MTU change callback
1936 * @dev: network device
1937 * @new_mtu: desired MTU
1938 *
1939 * Handle requests from the networking layer for MTU change on
1940 * this interface. It gets called on a change by the network layer.
1941 * Return zero for success or negative posix error code.
1942 */
6aa20a22 1943
1da177e4
LT		 1944static int velocity_change_mtu(struct net_device *dev, int new_mtu)
1945{
8ab6f3f7 1946 struct velocity_info *vptr = netdev_priv(dev);
1da177e4
LT		 1947 int ret = 0;
1948
1949 if ((new_mtu < VELOCITY_MIN_MTU) || new_mtu > (VELOCITY_MAX_MTU)) {
6aa20a22 1950 VELOCITY_PRT(MSG_LEVEL_ERR, KERN_NOTICE "%s: Invalid MTU.\n",
1da177e4 1951 vptr->dev->name);
3c4dc711
FR		 1952 ret = -EINVAL;
1953 goto out_0;
1da177e4
LT		 1954 }
1955
bd7b3f34
SH		 1956 if (!netif_running(dev)) {
1957 dev->mtu = new_mtu;
3c4dc711 1958 goto out_0;
bd7b3f34
SH		 1959 }
1960
3c4dc711
FR		 1961 if (dev->mtu != new_mtu) {
1962 struct velocity_info *tmp_vptr;
1963 unsigned long flags;
1964 struct rx_info rx;
1965 struct tx_info tx;
1966
1967 tmp_vptr = kzalloc(sizeof(*tmp_vptr), GFP_KERNEL);
1968 if (!tmp_vptr) {
1969 ret = -ENOMEM;
1970 goto out_0;
1971 }
1972
1973 tmp_vptr->dev = dev;
1974 tmp_vptr->pdev = vptr->pdev;
1975 tmp_vptr->options = vptr->options;
1976 tmp_vptr->tx.numq = vptr->tx.numq;
1977
1978 ret = velocity_init_rings(tmp_vptr, new_mtu);
1979 if (ret < 0)
1980 goto out_free_tmp_vptr_1;
1981
1da177e4
LT		 1982 spin_lock_irqsave(&vptr->lock, flags);
1983
1984 netif_stop_queue(dev);
1985 velocity_shutdown(vptr);
1986
3c4dc711
FR		 1987 rx = vptr->rx;
1988 tx = vptr->tx;
1da177e4 1989
3c4dc711
FR		 1990 vptr->rx = tmp_vptr->rx;
1991 vptr->tx = tmp_vptr->tx;
1da177e4 1992
3c4dc711
FR		 1993 tmp_vptr->rx = rx;
1994 tmp_vptr->tx = tx;
9088d9a4 1995
3c4dc711 1996 dev->mtu = new_mtu;
1da177e4 1997
3c4dc711 1998 velocity_give_many_rx_descs(vptr);
1da177e4
LT		 1999
2000 velocity_init_registers(vptr, VELOCITY_INIT_COLD);
2001
2002 mac_enable_int(vptr->mac_regs);
2003 netif_start_queue(dev);
3c4dc711 2004
1da177e4 2005 spin_unlock_irqrestore(&vptr->lock, flags);
1da177e4 2006
3c4dc711
FR		 2007 velocity_free_rings(tmp_vptr);
2008
2009out_free_tmp_vptr_1:
2010 kfree(tmp_vptr);
2011 }
2012out_0:
1da177e4
LT		 2013 return ret;
2014}
2015
2016/**
2017 * velocity_shutdown - shut down the chip
2018 * @vptr: velocity to deactivate
2019 *
2020 * Shuts down the internal operations of the velocity and
2021 * disables interrupts, autopolling, transmit and receive
2022 */
6aa20a22 2023
1da177e4
LT		 2024static void velocity_shutdown(struct velocity_info *vptr)
2025{
2026 struct mac_regs __iomem * regs = vptr->mac_regs;
2027 mac_disable_int(regs);
2028 writel(CR0_STOP, &regs->CR0Set);
2029 writew(0xFFFF, &regs->TDCSRClr);
2030 writeb(0xFF, &regs->RDCSRClr);
2031 safe_disable_mii_autopoll(regs);
2032 mac_clear_isr(regs);
2033}
2034
2035/**
2036 * velocity_close - close adapter callback
2037 * @dev: network device
2038 *
2039 * Callback from the network layer when the velocity is being
2040 * deactivated by the network layer
2041 */
2042
2043static int velocity_close(struct net_device *dev)
2044{
8ab6f3f7 2045 struct velocity_info *vptr = netdev_priv(dev);
1da177e4
LT		 2046
2047 netif_stop_queue(dev);
2048 velocity_shutdown(vptr);
2049
2050 if (vptr->flags & VELOCITY_FLAGS_WOL_ENABLED)
2051 velocity_get_ip(vptr);
2052 if (dev->irq != 0)
2053 free_irq(dev->irq, dev);
6aa20a22 2054
1da177e4
LT		 2055 /* Power down the chip */
2056 pci_set_power_state(vptr->pdev, PCI_D3hot);
6aa20a22 2057
1da177e4
LT		 2058 velocity_free_rings(vptr);
2059
2060 vptr->flags &= (~VELOCITY_FLAGS_OPENED);
2061 return 0;
2062}
2063
2064/**
2065 * velocity_xmit - transmit packet callback
2066 * @skb: buffer to transmit
2067 * @dev: network device
2068 *
2069 * Called by the networ layer to request a packet is queued to
2070 * the velocity. Returns zero on success.
2071 */
6aa20a22 2072
1da177e4
LT		 2073static int velocity_xmit(struct sk_buff *skb, struct net_device *dev)
2074{
8ab6f3f7 2075 struct velocity_info *vptr = netdev_priv(dev);
1da177e4
LT		 2076 int qnum = 0;
2077 struct tx_desc *td_ptr;
2078 struct velocity_td_info *tdinfo;
2079 unsigned long flags;
1da177e4 2080 int pktlen = skb->len;
580a6902
FR		 2081 __le16 len;
2082 int index;
2083
2084
2085
2086 if (skb->len < ETH_ZLEN) {
2087 if (skb_padto(skb, ETH_ZLEN))
2088 goto out;
2089 pktlen = ETH_ZLEN;
2090 }
2091
2092 len = cpu_to_le16(pktlen);
1da177e4 2093
364c6bad
HX		 2094#ifdef VELOCITY_ZERO_COPY_SUPPORT
2095 if (skb_shinfo(skb)->nr_frags > 6 && __skb_linearize(skb)) {
2096 kfree_skb(skb);
2097 return 0;
2098 }
2099#endif
2100
1da177e4
LT		 2101 spin_lock_irqsave(&vptr->lock, flags);
2102
0fe9f15e
FR		 2103 index = vptr->tx.curr[qnum];
2104 td_ptr = &(vptr->tx.rings[qnum][index]);
2105 tdinfo = &(vptr->tx.infos[qnum][index]);
1da177e4 2106
1da177e4 2107 td_ptr->tdesc1.TCR = TCR0_TIC;
4a51c0d0 2108 td_ptr->td_buf[0].size &= ~TD_QUEUE;
1da177e4 2109
1da177e4
LT		 2110#ifdef VELOCITY_ZERO_COPY_SUPPORT
2111 if (skb_shinfo(skb)->nr_frags > 0) {
2112 int nfrags = skb_shinfo(skb)->nr_frags;
2113 tdinfo->skb = skb;
2114 if (nfrags > 6) {
d626f62b 2115 skb_copy_from_linear_data(skb, tdinfo->buf, skb->len);
1da177e4 2116 tdinfo->skb_dma[0] = tdinfo->buf_dma;
4a51c0d0 2117 td_ptr->tdesc0.len = len;
0fe9f15e
FR		 2118 td_ptr->tx.buf[0].pa_low = cpu_to_le32(tdinfo->skb_dma[0]);
2119 td_ptr->tx.buf[0].pa_high = 0;
2120 td_ptr->tx.buf[0].size = len; /* queue is 0 anyway */
1da177e4 2121 tdinfo->nskb_dma = 1;
1da177e4
LT		 2122 } else {
2123 int i = 0;
2124 tdinfo->nskb_dma = 0;
4a51c0d0
AV		 2125 tdinfo->skb_dma[i] = pci_map_single(vptr->pdev, skb->data,
2126 skb_headlen(skb), PCI_DMA_TODEVICE);
1da177e4 2127
4a51c0d0 2128 td_ptr->tdesc0.len = len;
1da177e4
LT		 2129
2130 /* FIXME: support 48bit DMA later */
0fe9f15e
FR		 2131 td_ptr->tx.buf[i].pa_low = cpu_to_le32(tdinfo->skb_dma);
2132 td_ptr->tx.buf[i].pa_high = 0;
2133 td_ptr->tx.buf[i].size = cpu_to_le16(skb_headlen(skb));
1da177e4
LT		 2134
2135 for (i = 0; i < nfrags; i++) {
2136 skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
4a51c0d0 2137 void *addr = (void *)page_address(frag->page) + frag->page_offset;
1da177e4
LT		 2138
2139 tdinfo->skb_dma[i + 1] = pci_map_single(vptr->pdev, addr, frag->size, PCI_DMA_TODEVICE);
2140
0fe9f15e
FR		 2141 td_ptr->tx.buf[i + 1].pa_low = cpu_to_le32(tdinfo->skb_dma[i + 1]);
2142 td_ptr->tx.buf[i + 1].pa_high = 0;
2143 td_ptr->tx.buf[i + 1].size = cpu_to_le16(frag->size);
1da177e4
LT		 2144 }
2145 tdinfo->nskb_dma = i - 1;
1da177e4
LT		 2146 }
2147
2148 } else
2149#endif
2150 {
2151 /*
2152 * Map the linear network buffer into PCI space and
2153 * add it to the transmit ring.
2154 */
2155 tdinfo->skb = skb;
2156 tdinfo->skb_dma[0] = pci_map_single(vptr->pdev, skb->data, pktlen, PCI_DMA_TODEVICE);
4a51c0d0 2157 td_ptr->tdesc0.len = len;
1da177e4
LT		 2158 td_ptr->td_buf[0].pa_low = cpu_to_le32(tdinfo->skb_dma[0]);
2159 td_ptr->td_buf[0].pa_high = 0;
4a51c0d0 2160 td_ptr->td_buf[0].size = len;
1da177e4 2161 tdinfo->nskb_dma = 1;
1da177e4 2162 }
4a51c0d0 2163 td_ptr->tdesc1.cmd = TCPLS_NORMAL + (tdinfo->nskb_dma + 1) * 16;
1da177e4 2164
501e4d24 2165 if (vptr->vlgrp && vlan_tx_tag_present(skb)) {
4a51c0d0 2166 td_ptr->tdesc1.vlan = cpu_to_le16(vlan_tx_tag_get(skb));
1da177e4
LT		 2167 td_ptr->tdesc1.TCR |= TCR0_VETAG;
2168 }
2169
2170 /*
2171 * Handle hardware checksum
2172 */
2173 if ((vptr->flags & VELOCITY_FLAGS_TX_CSUM)
84fa7933 2174 && (skb->ip_summed == CHECKSUM_PARTIAL)) {
eddc9ec5 2175 const struct iphdr *ip = ip_hdr(skb);
1da177e4
LT		 2176 if (ip->protocol == IPPROTO_TCP)
2177 td_ptr->tdesc1.TCR |= TCR0_TCPCK;
2178 else if (ip->protocol == IPPROTO_UDP)
2179 td_ptr->tdesc1.TCR |= (TCR0_UDPCK);
2180 td_ptr->tdesc1.TCR |= TCR0_IPCK;
2181 }
2182 {
2183
2184 int prev = index - 1;
2185
2186 if (prev < 0)
2187 prev = vptr->options.numtx - 1;
4a51c0d0 2188 td_ptr->tdesc0.len |= OWNED_BY_NIC;
0fe9f15e
FR		 2189 vptr->tx.used[qnum]++;
2190 vptr->tx.curr[qnum] = (index + 1) % vptr->options.numtx;
1da177e4
LT		 2191
2192 if (AVAIL_TD(vptr, qnum) < 1)
2193 netif_stop_queue(dev);
2194
0fe9f15e 2195 td_ptr = &(vptr->tx.rings[qnum][prev]);
4a51c0d0 2196 td_ptr->td_buf[0].size |= TD_QUEUE;
1da177e4
LT		 2197 mac_tx_queue_wake(vptr->mac_regs, qnum);
2198 }
2199 dev->trans_start = jiffies;
2200 spin_unlock_irqrestore(&vptr->lock, flags);
580a6902
FR		 2201out:
2202 return NETDEV_TX_OK;
1da177e4
LT		 2203}
2204
2205/**
2206 * velocity_intr - interrupt callback
2207 * @irq: interrupt number
2208 * @dev_instance: interrupting device
1da177e4
LT		 2209 *
2210 * Called whenever an interrupt is generated by the velocity
2211 * adapter IRQ line. We may not be the source of the interrupt
2212 * and need to identify initially if we are, and if not exit as
2213 * efficiently as possible.
2214 */
6aa20a22 2215
7d12e780 2216static int velocity_intr(int irq, void *dev_instance)
1da177e4
LT		 2217{
2218 struct net_device *dev = dev_instance;
8ab6f3f7 2219 struct velocity_info *vptr = netdev_priv(dev);
1da177e4
LT		 2220 u32 isr_status;
2221 int max_count = 0;
2222
2223
2224 spin_lock(&vptr->lock);
2225 isr_status = mac_read_isr(vptr->mac_regs);
2226
2227 /* Not us ? */
2228 if (isr_status == 0) {
2229 spin_unlock(&vptr->lock);
2230 return IRQ_NONE;
2231 }
2232
2233 mac_disable_int(vptr->mac_regs);
2234
2235 /*
2236 * Keep processing the ISR until we have completed
2237 * processing and the isr_status becomes zero
2238 */
6aa20a22 2239
1da177e4
LT		 2240 while (isr_status != 0) {
2241 mac_write_isr(vptr->mac_regs, isr_status);
2242 if (isr_status & (~(ISR_PRXI | ISR_PPRXI | ISR_PTXI | ISR_PPTXI)))
2243 velocity_error(vptr, isr_status);
2244 if (isr_status & (ISR_PRXI | ISR_PPRXI))
2245 max_count += velocity_rx_srv(vptr, isr_status);
2246 if (isr_status & (ISR_PTXI | ISR_PPTXI))
2247 max_count += velocity_tx_srv(vptr, isr_status);
2248 isr_status = mac_read_isr(vptr->mac_regs);
2249 if (max_count > vptr->options.int_works)
2250 {
6aa20a22 2251 printk(KERN_WARNING "%s: excessive work at interrupt.\n",
1da177e4
LT		 2252 dev->name);
2253 max_count = 0;
2254 }
2255 }
2256 spin_unlock(&vptr->lock);
2257 mac_enable_int(vptr->mac_regs);
2258 return IRQ_HANDLED;
2259
2260}
2261
2262
2263/**
2264 * velocity_set_multi - filter list change callback
2265 * @dev: network device
2266 *
2267 * Called by the network layer when the filter lists need to change
2268 * for a velocity adapter. Reload the CAMs with the new address
2269 * filter ruleset.
2270 */
6aa20a22 2271
1da177e4
LT		 2272static void velocity_set_multi(struct net_device *dev)
2273{
8ab6f3f7 2274 struct velocity_info *vptr = netdev_priv(dev);
1da177e4
LT		 2275 struct mac_regs __iomem * regs = vptr->mac_regs;
2276 u8 rx_mode;
2277 int i;
2278 struct dev_mc_list *mclist;
2279
2280 if (dev->flags & IFF_PROMISC) { /* Set promiscuous. */
1da177e4
LT		 2281 writel(0xffffffff, &regs->MARCAM[0]);
2282 writel(0xffffffff, &regs->MARCAM[4]);
2283 rx_mode = (RCR_AM | RCR_AB | RCR_PROM);
2284 } else if ((dev->mc_count > vptr->multicast_limit)
2285 || (dev->flags & IFF_ALLMULTI)) {
2286 writel(0xffffffff, &regs->MARCAM[0]);
2287 writel(0xffffffff, &regs->MARCAM[4]);
2288 rx_mode = (RCR_AM | RCR_AB);
2289 } else {
2290 int offset = MCAM_SIZE - vptr->multicast_limit;
01faccbf 2291 mac_get_cam_mask(regs, vptr->mCAMmask);
1da177e4
LT		 2292
2293 for (i = 0, mclist = dev->mc_list; mclist && i < dev->mc_count; i++, mclist = mclist->next) {
01faccbf 2294 mac_set_cam(regs, i + offset, mclist->dmi_addr);
1da177e4
LT		 2295 vptr->mCAMmask[(offset + i) / 8] |= 1 << ((offset + i) & 7);
2296 }
2297
01faccbf 2298 mac_set_cam_mask(regs, vptr->mCAMmask);
5f5c4bdb 2299 rx_mode = RCR_AM | RCR_AB | RCR_AP;
1da177e4
LT		 2300 }
2301 if (dev->mtu > 1500)
2302 rx_mode |= RCR_AL;
2303
2304 BYTE_REG_BITS_ON(rx_mode, &regs->RCR);
2305
2306}
2307
2308/**
2309 * velocity_get_status - statistics callback
2310 * @dev: network device
2311 *
2312 * Callback from the network layer to allow driver statistics
2313 * to be resynchronized with hardware collected state. In the
2314 * case of the velocity we need to pull the MIB counters from
2315 * the hardware into the counters before letting the network
2316 * layer display them.
2317 */
6aa20a22 2318
1da177e4
LT		 2319static struct net_device_stats *velocity_get_stats(struct net_device *dev)
2320{
8ab6f3f7 2321 struct velocity_info *vptr = netdev_priv(dev);
6aa20a22 2322
1da177e4
LT		 2323 /* If the hardware is down, don't touch MII */
2324 if(!netif_running(dev))
2325 return &vptr->stats;
2326
2327 spin_lock_irq(&vptr->lock);
2328 velocity_update_hw_mibs(vptr);
2329 spin_unlock_irq(&vptr->lock);
2330
2331 vptr->stats.rx_packets = vptr->mib_counter[HW_MIB_ifRxAllPkts];
2332 vptr->stats.rx_errors = vptr->mib_counter[HW_MIB_ifRxErrorPkts];
2333 vptr->stats.rx_length_errors = vptr->mib_counter[HW_MIB_ifInRangeLengthErrors];
2334
2335// unsigned long rx_dropped; /* no space in linux buffers */
2336 vptr->stats.collisions = vptr->mib_counter[HW_MIB_ifTxEtherCollisions];
2337 /* detailed rx_errors: */
2338// unsigned long rx_length_errors;
2339// unsigned long rx_over_errors; /* receiver ring buff overflow */
2340 vptr->stats.rx_crc_errors = vptr->mib_counter[HW_MIB_ifRxPktCRCE];
2341// unsigned long rx_frame_errors; /* recv'd frame alignment error */
2342// unsigned long rx_fifo_errors; /* recv'r fifo overrun */
2343// unsigned long rx_missed_errors; /* receiver missed packet */
2344
2345 /* detailed tx_errors */
2346// unsigned long tx_fifo_errors;
2347
2348 return &vptr->stats;
2349}
2350
2351
2352/**
2353 * velocity_ioctl - ioctl entry point
2354 * @dev: network device
2355 * @rq: interface request ioctl
2356 * @cmd: command code
2357 *
2358 * Called when the user issues an ioctl request to the network
2359 * device in question. The velocity interface supports MII.
2360 */
6aa20a22 2361
1da177e4
LT		 2362static int velocity_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
2363{
8ab6f3f7 2364 struct velocity_info *vptr = netdev_priv(dev);
1da177e4
LT		 2365 int ret;
2366
2367 /* If we are asked for information and the device is power
2368 saving then we need to bring the device back up to talk to it */
6aa20a22 2369
1da177e4
LT		 2370 if (!netif_running(dev))
2371 pci_set_power_state(vptr->pdev, PCI_D0);
6aa20a22 2372
1da177e4
LT		 2373 switch (cmd) {
2374 case SIOCGMIIPHY: /* Get address of MII PHY in use. */
2375 case SIOCGMIIREG: /* Read MII PHY register. */
2376 case SIOCSMIIREG: /* Write to MII PHY register. */
2377 ret = velocity_mii_ioctl(dev, rq, cmd);
2378 break;
2379
2380 default:
2381 ret = -EOPNOTSUPP;
2382 }
2383 if (!netif_running(dev))
2384 pci_set_power_state(vptr->pdev, PCI_D3hot);
6aa20a22
JG		 2385
2386
1da177e4
LT		 2387 return ret;
2388}
2389
2390/*
2391 * Definition for our device driver. The PCI layer interface
2392 * uses this to handle all our card discover and plugging
2393 */
6aa20a22 2394
1da177e4
LT		 2395static struct pci_driver velocity_driver = {
2396 .name = VELOCITY_NAME,
2397 .id_table = velocity_id_table,
2398 .probe = velocity_found1,
2399 .remove = __devexit_p(velocity_remove1),
2400#ifdef CONFIG_PM
2401 .suspend = velocity_suspend,
2402 .resume = velocity_resume,
2403#endif
2404};
2405
2406/**
2407 * velocity_init_module - load time function
2408 *
2409 * Called when the velocity module is loaded. The PCI driver
2410 * is registered with the PCI layer, and in turn will call
2411 * the probe functions for each velocity adapter installed
2412 * in the system.
2413 */
6aa20a22 2414
1da177e4
LT		 2415static int __init velocity_init_module(void)
2416{
2417 int ret;
2418
2419 velocity_register_notifier();
29917620 2420 ret = pci_register_driver(&velocity_driver);
1da177e4
LT		 2421 if (ret < 0)
2422 velocity_unregister_notifier();
2423 return ret;
2424}
2425
2426/**
2427 * velocity_cleanup - module unload
2428 *
2429 * When the velocity hardware is unloaded this function is called.
6aa20a22 2430 * It will clean up the notifiers and the unregister the PCI
1da177e4
LT		 2431 * driver interface for this hardware. This in turn cleans up
2432 * all discovered interfaces before returning from the function
2433 */
6aa20a22 2434
1da177e4
LT		 2435static void __exit velocity_cleanup_module(void)
2436{
2437 velocity_unregister_notifier();
2438 pci_unregister_driver(&velocity_driver);
2439}
2440
2441module_init(velocity_init_module);
2442module_exit(velocity_cleanup_module);
2443
2444
2445/*
2446 * MII access , media link mode setting functions
2447 */
6aa20a22
JG		 2448
2449
1da177e4
LT		 2450/**
2451 * mii_init - set up MII
2452 * @vptr: velocity adapter
2453 * @mii_status: links tatus
2454 *
2455 * Set up the PHY for the current link state.
2456 */
6aa20a22 2457
1da177e4
LT		 2458static void mii_init(struct velocity_info *vptr, u32 mii_status)
2459{
2460 u16 BMCR;
2461
2462 switch (PHYID_GET_PHY_ID(vptr->phy_id)) {
2463 case PHYID_CICADA_CS8201:
2464 /*
2465 * Reset to hardware default
2466 */
2467 MII_REG_BITS_OFF((ANAR_ASMDIR | ANAR_PAUSE), MII_REG_ANAR, vptr->mac_regs);
2468 /*
2469 * Turn on ECHODIS bit in NWay-forced full mode and turn it
6aa20a22 2470 * off it in NWay-forced half mode for NWay-forced v.s.
1da177e4
LT		 2471 * legacy-forced issue.
2472 */
2473 if (vptr->mii_status & VELOCITY_DUPLEX_FULL)
2474 MII_REG_BITS_ON(TCSR_ECHODIS, MII_REG_TCSR, vptr->mac_regs);
2475 else
2476 MII_REG_BITS_OFF(TCSR_ECHODIS, MII_REG_TCSR, vptr->mac_regs);
2477 /*
2478 * Turn on Link/Activity LED enable bit for CIS8201
2479 */
2480 MII_REG_BITS_ON(PLED_LALBE, MII_REG_PLED, vptr->mac_regs);
2481 break;
2482 case PHYID_VT3216_32BIT:
2483 case PHYID_VT3216_64BIT:
2484 /*
2485 * Reset to hardware default
2486 */
2487 MII_REG_BITS_ON((ANAR_ASMDIR | ANAR_PAUSE), MII_REG_ANAR, vptr->mac_regs);
2488 /*
2489 * Turn on ECHODIS bit in NWay-forced full mode and turn it
6aa20a22 2490 * off it in NWay-forced half mode for NWay-forced v.s.
1da177e4
LT		 2491 * legacy-forced issue
2492 */
2493 if (vptr->mii_status & VELOCITY_DUPLEX_FULL)
2494 MII_REG_BITS_ON(TCSR_ECHODIS, MII_REG_TCSR, vptr->mac_regs);
2495 else
2496 MII_REG_BITS_OFF(TCSR_ECHODIS, MII_REG_TCSR, vptr->mac_regs);
2497 break;
2498
2499 case PHYID_MARVELL_1000:
2500 case PHYID_MARVELL_1000S:
2501 /*
6aa20a22 2502 * Assert CRS on Transmit
1da177e4
LT		 2503 */
2504 MII_REG_BITS_ON(PSCR_ACRSTX, MII_REG_PSCR, vptr->mac_regs);
2505 /*
6aa20a22 2506 * Reset to hardware default
1da177e4
LT		 2507 */
2508 MII_REG_BITS_ON((ANAR_ASMDIR | ANAR_PAUSE), MII_REG_ANAR, vptr->mac_regs);
2509 break;
2510 default:
2511 ;
2512 }
2513 velocity_mii_read(vptr->mac_regs, MII_REG_BMCR, &BMCR);
2514 if (BMCR & BMCR_ISO) {
2515 BMCR &= ~BMCR_ISO;
2516 velocity_mii_write(vptr->mac_regs, MII_REG_BMCR, BMCR);
2517 }
2518}
2519
2520/**
2521 * safe_disable_mii_autopoll - autopoll off
2522 * @regs: velocity registers
2523 *
2524 * Turn off the autopoll and wait for it to disable on the chip
2525 */
6aa20a22 2526
1da177e4
LT		 2527static void safe_disable_mii_autopoll(struct mac_regs __iomem * regs)
2528{
2529 u16 ww;
2530
2531 /* turn off MAUTO */
2532 writeb(0, &regs->MIICR);
2533 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
2534 udelay(1);
2535 if (BYTE_REG_BITS_IS_ON(MIISR_MIDLE, &regs->MIISR))
2536 break;
2537 }
2538}
2539
2540/**
2541 * enable_mii_autopoll - turn on autopolling
2542 * @regs: velocity registers
2543 *
2544 * Enable the MII link status autopoll feature on the Velocity
2545 * hardware. Wait for it to enable.
2546 */
2547
2548static void enable_mii_autopoll(struct mac_regs __iomem * regs)
2549{
2550 int ii;
2551
2552 writeb(0, &(regs->MIICR));
2553 writeb(MIIADR_SWMPL, &regs->MIIADR);
2554
2555 for (ii = 0; ii < W_MAX_TIMEOUT; ii++) {
2556 udelay(1);
2557 if (BYTE_REG_BITS_IS_ON(MIISR_MIDLE, &regs->MIISR))
2558 break;
2559 }
2560
2561 writeb(MIICR_MAUTO, &regs->MIICR);
2562
2563 for (ii = 0; ii < W_MAX_TIMEOUT; ii++) {
2564 udelay(1);
2565 if (!BYTE_REG_BITS_IS_ON(MIISR_MIDLE, &regs->MIISR))
2566 break;
2567 }
2568
2569}
2570
2571/**
2572 * velocity_mii_read - read MII data
2573 * @regs: velocity registers
2574 * @index: MII register index
2575 * @data: buffer for received data
2576 *
2577 * Perform a single read of an MII 16bit register. Returns zero
2578 * on success or -ETIMEDOUT if the PHY did not respond.
2579 */
6aa20a22 2580
1da177e4
LT		 2581static int velocity_mii_read(struct mac_regs __iomem *regs, u8 index, u16 *data)
2582{
2583 u16 ww;
2584
2585 /*
2586 * Disable MIICR_MAUTO, so that mii addr can be set normally
2587 */
2588 safe_disable_mii_autopoll(regs);
2589
2590 writeb(index, &regs->MIIADR);
2591
2592 BYTE_REG_BITS_ON(MIICR_RCMD, &regs->MIICR);
2593
2594 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
2595 if (!(readb(&regs->MIICR) & MIICR_RCMD))
2596 break;
2597 }
2598
2599 *data = readw(&regs->MIIDATA);
2600
2601 enable_mii_autopoll(regs);
2602 if (ww == W_MAX_TIMEOUT)
2603 return -ETIMEDOUT;
2604 return 0;
2605}
2606
2607/**
2608 * velocity_mii_write - write MII data
2609 * @regs: velocity registers
2610 * @index: MII register index
2611 * @data: 16bit data for the MII register
2612 *
2613 * Perform a single write to an MII 16bit register. Returns zero
2614 * on success or -ETIMEDOUT if the PHY did not respond.
2615 */
6aa20a22 2616
1da177e4
LT		 2617static int velocity_mii_write(struct mac_regs __iomem *regs, u8 mii_addr, u16 data)
2618{
2619 u16 ww;
2620
2621 /*
2622 * Disable MIICR_MAUTO, so that mii addr can be set normally
2623 */
2624 safe_disable_mii_autopoll(regs);
2625
2626 /* MII reg offset */
2627 writeb(mii_addr, &regs->MIIADR);
2628 /* set MII data */
2629 writew(data, &regs->MIIDATA);
2630
2631 /* turn on MIICR_WCMD */
2632 BYTE_REG_BITS_ON(MIICR_WCMD, &regs->MIICR);
2633
2634 /* W_MAX_TIMEOUT is the timeout period */
2635 for (ww = 0; ww < W_MAX_TIMEOUT; ww++) {
2636 udelay(5);
2637 if (!(readb(&regs->MIICR) & MIICR_WCMD))
2638 break;
2639 }
2640 enable_mii_autopoll(regs);
2641
2642 if (ww == W_MAX_TIMEOUT)
2643 return -ETIMEDOUT;
2644 return 0;
2645}
2646
2647/**
2648 * velocity_get_opt_media_mode - get media selection
2649 * @vptr: velocity adapter
2650 *
2651 * Get the media mode stored in EEPROM or module options and load
2652 * mii_status accordingly. The requested link state information
2653 * is also returned.
2654 */
6aa20a22 2655
1da177e4
LT		 2656static u32 velocity_get_opt_media_mode(struct velocity_info *vptr)
2657{
2658 u32 status = 0;
2659
2660 switch (vptr->options.spd_dpx) {
2661 case SPD_DPX_AUTO:
2662 status = VELOCITY_AUTONEG_ENABLE;
2663 break;
2664 case SPD_DPX_100_FULL:
2665 status = VELOCITY_SPEED_100 | VELOCITY_DUPLEX_FULL;
2666 break;
2667 case SPD_DPX_10_FULL:
2668 status = VELOCITY_SPEED_10 | VELOCITY_DUPLEX_FULL;
2669 break;
2670 case SPD_DPX_100_HALF:
2671 status = VELOCITY_SPEED_100;
2672 break;
2673 case SPD_DPX_10_HALF:
2674 status = VELOCITY_SPEED_10;
2675 break;
2676 }
2677 vptr->mii_status = status;
2678 return status;
2679}
2680
2681/**
2682 * mii_set_auto_on - autonegotiate on
2683 * @vptr: velocity
2684 *
2685 * Enable autonegotation on this interface
2686 */
6aa20a22 2687
1da177e4
LT		 2688static void mii_set_auto_on(struct velocity_info *vptr)
2689{
2690 if (MII_REG_BITS_IS_ON(BMCR_AUTO, MII_REG_BMCR, vptr->mac_regs))
2691 MII_REG_BITS_ON(BMCR_REAUTO, MII_REG_BMCR, vptr->mac_regs);
2692 else
2693 MII_REG_BITS_ON(BMCR_AUTO, MII_REG_BMCR, vptr->mac_regs);
2694}
2695
2696
2697/*
2698static void mii_set_auto_off(struct velocity_info * vptr)
2699{
2700 MII_REG_BITS_OFF(BMCR_AUTO, MII_REG_BMCR, vptr->mac_regs);
2701}
2702*/
2703
2704/**
2705 * set_mii_flow_control - flow control setup
2706 * @vptr: velocity interface
2707 *
2708 * Set up the flow control on this interface according to
2709 * the supplied user/eeprom options.
2710 */
6aa20a22 2711
1da177e4
LT		 2712static void set_mii_flow_control(struct velocity_info *vptr)
2713{
2714 /*Enable or Disable PAUSE in ANAR */
2715 switch (vptr->options.flow_cntl) {
2716 case FLOW_CNTL_TX:
2717 MII_REG_BITS_OFF(ANAR_PAUSE, MII_REG_ANAR, vptr->mac_regs);
2718 MII_REG_BITS_ON(ANAR_ASMDIR, MII_REG_ANAR, vptr->mac_regs);
2719 break;
2720
2721 case FLOW_CNTL_RX:
2722 MII_REG_BITS_ON(ANAR_PAUSE, MII_REG_ANAR, vptr->mac_regs);
2723 MII_REG_BITS_ON(ANAR_ASMDIR, MII_REG_ANAR, vptr->mac_regs);
2724 break;
2725
2726 case FLOW_CNTL_TX_RX:
2727 MII_REG_BITS_ON(ANAR_PAUSE, MII_REG_ANAR, vptr->mac_regs);
2728 MII_REG_BITS_ON(ANAR_ASMDIR, MII_REG_ANAR, vptr->mac_regs);
2729 break;
2730
2731 case FLOW_CNTL_DISABLE:
2732 MII_REG_BITS_OFF(ANAR_PAUSE, MII_REG_ANAR, vptr->mac_regs);
2733 MII_REG_BITS_OFF(ANAR_ASMDIR, MII_REG_ANAR, vptr->mac_regs);
2734 break;
2735 default:
2736 break;
2737 }
2738}
2739
2740/**
2741 * velocity_set_media_mode - set media mode
2742 * @mii_status: old MII link state
2743 *
2744 * Check the media link state and configure the flow control
2745 * PHY and also velocity hardware setup accordingly. In particular
2746 * we need to set up CD polling and frame bursting.
2747 */
6aa20a22 2748
1da177e4
LT		 2749static int velocity_set_media_mode(struct velocity_info *vptr, u32 mii_status)
2750{
2751 u32 curr_status;
2752 struct mac_regs __iomem * regs = vptr->mac_regs;
2753
2754 vptr->mii_status = mii_check_media_mode(vptr->mac_regs);
2755 curr_status = vptr->mii_status & (~VELOCITY_LINK_FAIL);
2756
2757 /* Set mii link status */
2758 set_mii_flow_control(vptr);
2759
2760 /*
2761 Check if new status is consisent with current status
2762 if (((mii_status & curr_status) & VELOCITY_AUTONEG_ENABLE)
2763 || (mii_status==curr_status)) {
2764 vptr->mii_status=mii_check_media_mode(vptr->mac_regs);
2765 vptr->mii_status=check_connection_type(vptr->mac_regs);
2766 VELOCITY_PRT(MSG_LEVEL_INFO, "Velocity link no change\n");
2767 return 0;
2768 }
2769 */
2770
2771 if (PHYID_GET_PHY_ID(vptr->phy_id) == PHYID_CICADA_CS8201) {
2772 MII_REG_BITS_ON(AUXCR_MDPPS, MII_REG_AUXCR, vptr->mac_regs);
2773 }
2774
2775 /*
2776 * If connection type is AUTO
2777 */
2778 if (mii_status & VELOCITY_AUTONEG_ENABLE) {
2779 VELOCITY_PRT(MSG_LEVEL_INFO, "Velocity is AUTO mode\n");
2780 /* clear force MAC mode bit */
2781 BYTE_REG_BITS_OFF(CHIPGCR_FCMODE, &regs->CHIPGCR);
2782 /* set duplex mode of MAC according to duplex mode of MII */
2783 MII_REG_BITS_ON(ANAR_TXFD | ANAR_TX | ANAR_10FD | ANAR_10, MII_REG_ANAR, vptr->mac_regs);
2784 MII_REG_BITS_ON(G1000CR_1000FD | G1000CR_1000, MII_REG_G1000CR, vptr->mac_regs);
2785 MII_REG_BITS_ON(BMCR_SPEED1G, MII_REG_BMCR, vptr->mac_regs);
2786
2787 /* enable AUTO-NEGO mode */
2788 mii_set_auto_on(vptr);
2789 } else {
2790 u16 ANAR;
2791 u8 CHIPGCR;
2792
2793 /*
2794 * 1. if it's 3119, disable frame bursting in halfduplex mode
2795 * and enable it in fullduplex mode
2796 * 2. set correct MII/GMII and half/full duplex mode in CHIPGCR
2797 * 3. only enable CD heart beat counter in 10HD mode
2798 */
2799
2800 /* set force MAC mode bit */
2801 BYTE_REG_BITS_ON(CHIPGCR_FCMODE, &regs->CHIPGCR);
2802
2803 CHIPGCR = readb(&regs->CHIPGCR);
2804 CHIPGCR &= ~CHIPGCR_FCGMII;
2805
2806 if (mii_status & VELOCITY_DUPLEX_FULL) {
2807 CHIPGCR |= CHIPGCR_FCFDX;
2808 writeb(CHIPGCR, &regs->CHIPGCR);
2809 VELOCITY_PRT(MSG_LEVEL_INFO, "set Velocity to forced full mode\n");
2810 if (vptr->rev_id < REV_ID_VT3216_A0)
2811 BYTE_REG_BITS_OFF(TCR_TB2BDIS, &regs->TCR);
2812 } else {
2813 CHIPGCR &= ~CHIPGCR_FCFDX;
2814 VELOCITY_PRT(MSG_LEVEL_INFO, "set Velocity to forced half mode\n");
2815 writeb(CHIPGCR, &regs->CHIPGCR);
2816 if (vptr->rev_id < REV_ID_VT3216_A0)
2817 BYTE_REG_BITS_ON(TCR_TB2BDIS, &regs->TCR);
2818 }
2819
2820 MII_REG_BITS_OFF(G1000CR_1000FD | G1000CR_1000, MII_REG_G1000CR, vptr->mac_regs);
2821
2822 if (!(mii_status & VELOCITY_DUPLEX_FULL) && (mii_status & VELOCITY_SPEED_10)) {
2823 BYTE_REG_BITS_OFF(TESTCFG_HBDIS, &regs->TESTCFG);
2824 } else {
2825 BYTE_REG_BITS_ON(TESTCFG_HBDIS, &regs->TESTCFG);
2826 }
2827 /* MII_REG_BITS_OFF(BMCR_SPEED1G, MII_REG_BMCR, vptr->mac_regs); */
2828 velocity_mii_read(vptr->mac_regs, MII_REG_ANAR, &ANAR);
2829 ANAR &= (~(ANAR_TXFD | ANAR_TX | ANAR_10FD | ANAR_10));
2830 if (mii_status & VELOCITY_SPEED_100) {
2831 if (mii_status & VELOCITY_DUPLEX_FULL)
2832 ANAR |= ANAR_TXFD;
2833 else
2834 ANAR |= ANAR_TX;
2835 } else {
2836 if (mii_status & VELOCITY_DUPLEX_FULL)
2837 ANAR |= ANAR_10FD;
2838 else
2839 ANAR |= ANAR_10;
2840 }
2841 velocity_mii_write(vptr->mac_regs, MII_REG_ANAR, ANAR);
2842 /* enable AUTO-NEGO mode */
2843 mii_set_auto_on(vptr);
2844 /* MII_REG_BITS_ON(BMCR_AUTO, MII_REG_BMCR, vptr->mac_regs); */
2845 }
2846 /* vptr->mii_status=mii_check_media_mode(vptr->mac_regs); */
2847 /* vptr->mii_status=check_connection_type(vptr->mac_regs); */
2848 return VELOCITY_LINK_CHANGE;
2849}
2850
2851/**
2852 * mii_check_media_mode - check media state
2853 * @regs: velocity registers
2854 *
2855 * Check the current MII status and determine the link status
2856 * accordingly
2857 */
6aa20a22 2858
1da177e4
LT		 2859static u32 mii_check_media_mode(struct mac_regs __iomem * regs)
2860{
2861 u32 status = 0;
2862 u16 ANAR;
2863
2864 if (!MII_REG_BITS_IS_ON(BMSR_LNK, MII_REG_BMSR, regs))
2865 status |= VELOCITY_LINK_FAIL;
2866
2867 if (MII_REG_BITS_IS_ON(G1000CR_1000FD, MII_REG_G1000CR, regs))
2868 status |= VELOCITY_SPEED_1000 | VELOCITY_DUPLEX_FULL;
2869 else if (MII_REG_BITS_IS_ON(G1000CR_1000, MII_REG_G1000CR, regs))
2870 status |= (VELOCITY_SPEED_1000);
2871 else {
2872 velocity_mii_read(regs, MII_REG_ANAR, &ANAR);
2873 if (ANAR & ANAR_TXFD)
2874 status |= (VELOCITY_SPEED_100 | VELOCITY_DUPLEX_FULL);
2875 else if (ANAR & ANAR_TX)
2876 status |= VELOCITY_SPEED_100;
2877 else if (ANAR & ANAR_10FD)
2878 status |= (VELOCITY_SPEED_10 | VELOCITY_DUPLEX_FULL);
2879 else
2880 status |= (VELOCITY_SPEED_10);
2881 }
2882
2883 if (MII_REG_BITS_IS_ON(BMCR_AUTO, MII_REG_BMCR, regs)) {
2884 velocity_mii_read(regs, MII_REG_ANAR, &ANAR);
2885 if ((ANAR & (ANAR_TXFD | ANAR_TX | ANAR_10FD | ANAR_10))
2886 == (ANAR_TXFD | ANAR_TX | ANAR_10FD | ANAR_10)) {
2887 if (MII_REG_BITS_IS_ON(G1000CR_1000 | G1000CR_1000FD, MII_REG_G1000CR, regs))
2888 status |= VELOCITY_AUTONEG_ENABLE;
2889 }
2890 }
2891
2892 return status;
2893}
2894
2895static u32 check_connection_type(struct mac_regs __iomem * regs)
2896{
2897 u32 status = 0;
2898 u8 PHYSR0;
2899 u16 ANAR;
2900 PHYSR0 = readb(&regs->PHYSR0);
2901
2902 /*
2903 if (!(PHYSR0 & PHYSR0_LINKGD))
2904 status|=VELOCITY_LINK_FAIL;
2905 */
2906
2907 if (PHYSR0 & PHYSR0_FDPX)
2908 status |= VELOCITY_DUPLEX_FULL;
2909
2910 if (PHYSR0 & PHYSR0_SPDG)
2911 status |= VELOCITY_SPEED_1000;
59b693fb 2912 else if (PHYSR0 & PHYSR0_SPD10)
1da177e4
LT		 2913 status |= VELOCITY_SPEED_10;
2914 else
2915 status |= VELOCITY_SPEED_100;
2916
2917 if (MII_REG_BITS_IS_ON(BMCR_AUTO, MII_REG_BMCR, regs)) {
2918 velocity_mii_read(regs, MII_REG_ANAR, &ANAR);
2919 if ((ANAR & (ANAR_TXFD | ANAR_TX | ANAR_10FD | ANAR_10))
2920 == (ANAR_TXFD | ANAR_TX | ANAR_10FD | ANAR_10)) {
2921 if (MII_REG_BITS_IS_ON(G1000CR_1000 | G1000CR_1000FD, MII_REG_G1000CR, regs))
2922 status |= VELOCITY_AUTONEG_ENABLE;
2923 }
2924 }
2925
2926 return status;
2927}
2928
2929/**
2930 * enable_flow_control_ability - flow control
2931 * @vptr: veloity to configure
2932 *
2933 * Set up flow control according to the flow control options
2934 * determined by the eeprom/configuration.
2935 */
2936
2937static void enable_flow_control_ability(struct velocity_info *vptr)
2938{
2939
2940 struct mac_regs __iomem * regs = vptr->mac_regs;
2941
2942 switch (vptr->options.flow_cntl) {
2943
2944 case FLOW_CNTL_DEFAULT:
2945 if (BYTE_REG_BITS_IS_ON(PHYSR0_RXFLC, &regs->PHYSR0))
2946 writel(CR0_FDXRFCEN, &regs->CR0Set);
2947 else
2948 writel(CR0_FDXRFCEN, &regs->CR0Clr);
2949
2950 if (BYTE_REG_BITS_IS_ON(PHYSR0_TXFLC, &regs->PHYSR0))
2951 writel(CR0_FDXTFCEN, &regs->CR0Set);
2952 else
2953 writel(CR0_FDXTFCEN, &regs->CR0Clr);
2954 break;
2955
2956 case FLOW_CNTL_TX:
2957 writel(CR0_FDXTFCEN, &regs->CR0Set);
2958 writel(CR0_FDXRFCEN, &regs->CR0Clr);
2959 break;
2960
2961 case FLOW_CNTL_RX:
2962 writel(CR0_FDXRFCEN, &regs->CR0Set);
2963 writel(CR0_FDXTFCEN, &regs->CR0Clr);
2964 break;
2965
2966 case FLOW_CNTL_TX_RX:
2967 writel(CR0_FDXTFCEN, &regs->CR0Set);
2968 writel(CR0_FDXRFCEN, &regs->CR0Set);
2969 break;
2970
2971 case FLOW_CNTL_DISABLE:
2972 writel(CR0_FDXRFCEN, &regs->CR0Clr);
2973 writel(CR0_FDXTFCEN, &regs->CR0Clr);
2974 break;
2975
2976 default:
2977 break;
2978 }
2979
2980}
2981
2982
2983/**
2984 * velocity_ethtool_up - pre hook for ethtool
2985 * @dev: network device
2986 *
2987 * Called before an ethtool operation. We need to make sure the
2988 * chip is out of D3 state before we poke at it.
2989 */
6aa20a22 2990
1da177e4
LT		 2991static int velocity_ethtool_up(struct net_device *dev)
2992{
8ab6f3f7 2993 struct velocity_info *vptr = netdev_priv(dev);
1da177e4
LT		 2994 if (!netif_running(dev))
2995 pci_set_power_state(vptr->pdev, PCI_D0);
2996 return 0;
6aa20a22 2997}
1da177e4
LT		 2998
2999/**
3000 * velocity_ethtool_down - post hook for ethtool
3001 * @dev: network device
3002 *
3003 * Called after an ethtool operation. Restore the chip back to D3
3004 * state if it isn't running.
3005 */
6aa20a22 3006
1da177e4
LT		 3007static void velocity_ethtool_down(struct net_device *dev)
3008{
8ab6f3f7 3009 struct velocity_info *vptr = netdev_priv(dev);
1da177e4
LT		 3010 if (!netif_running(dev))
3011 pci_set_power_state(vptr->pdev, PCI_D3hot);
3012}
3013
3014static int velocity_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
3015{
8ab6f3f7 3016 struct velocity_info *vptr = netdev_priv(dev);
1da177e4
LT		 3017 struct mac_regs __iomem * regs = vptr->mac_regs;
3018 u32 status;
3019 status = check_connection_type(vptr->mac_regs);
3020
59b693fb
JC		 3021 cmd->supported = SUPPORTED_TP |
3022 SUPPORTED_Autoneg |
3023 SUPPORTED_10baseT_Half |
3024 SUPPORTED_10baseT_Full |
3025 SUPPORTED_100baseT_Half |
3026 SUPPORTED_100baseT_Full |
3027 SUPPORTED_1000baseT_Half |
3028 SUPPORTED_1000baseT_Full;
3029 if (status & VELOCITY_SPEED_1000)
3030 cmd->speed = SPEED_1000;
3031 else if (status & VELOCITY_SPEED_100)
1da177e4
LT		 3032 cmd->speed = SPEED_100;
3033 else
3034 cmd->speed = SPEED_10;
3035 cmd->autoneg = (status & VELOCITY_AUTONEG_ENABLE) ? AUTONEG_ENABLE : AUTONEG_DISABLE;
3036 cmd->port = PORT_TP;
3037 cmd->transceiver = XCVR_INTERNAL;
3038 cmd->phy_address = readb(&regs->MIIADR) & 0x1F;
3039
3040 if (status & VELOCITY_DUPLEX_FULL)
3041 cmd->duplex = DUPLEX_FULL;
3042 else
3043 cmd->duplex = DUPLEX_HALF;
6aa20a22 3044
1da177e4
LT		 3045 return 0;
3046}
3047
3048static int velocity_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
3049{
8ab6f3f7 3050 struct velocity_info *vptr = netdev_priv(dev);
1da177e4
LT		 3051 u32 curr_status;
3052 u32 new_status = 0;
3053 int ret = 0;
6aa20a22 3054
1da177e4
LT		 3055 curr_status = check_connection_type(vptr->mac_regs);
3056 curr_status &= (~VELOCITY_LINK_FAIL);
3057
3058 new_status |= ((cmd->autoneg) ? VELOCITY_AUTONEG_ENABLE : 0);
3059 new_status |= ((cmd->speed == SPEED_100) ? VELOCITY_SPEED_100 : 0);
3060 new_status |= ((cmd->speed == SPEED_10) ? VELOCITY_SPEED_10 : 0);
3061 new_status |= ((cmd->duplex == DUPLEX_FULL) ? VELOCITY_DUPLEX_FULL : 0);
3062
3063 if ((new_status & VELOCITY_AUTONEG_ENABLE) && (new_status != (curr_status | VELOCITY_AUTONEG_ENABLE)))
3064 ret = -EINVAL;
3065 else
3066 velocity_set_media_mode(vptr, new_status);
3067
3068 return ret;
3069}
3070
3071static u32 velocity_get_link(struct net_device *dev)
3072{
8ab6f3f7 3073 struct velocity_info *vptr = netdev_priv(dev);
1da177e4 3074 struct mac_regs __iomem * regs = vptr->mac_regs;
59b693fb 3075 return BYTE_REG_BITS_IS_ON(PHYSR0_LINKGD, &regs->PHYSR0) ? 1 : 0;
1da177e4
LT		 3076}
3077
3078static void velocity_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
3079{
8ab6f3f7 3080 struct velocity_info *vptr = netdev_priv(dev);
1da177e4
LT		 3081 strcpy(info->driver, VELOCITY_NAME);
3082 strcpy(info->version, VELOCITY_VERSION);
3083 strcpy(info->bus_info, pci_name(vptr->pdev));
3084}
3085
3086static void velocity_ethtool_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
3087{
8ab6f3f7 3088 struct velocity_info *vptr = netdev_priv(dev);
1da177e4
LT		 3089 wol->supported = WAKE_PHY | WAKE_MAGIC | WAKE_UCAST | WAKE_ARP;
3090 wol->wolopts |= WAKE_MAGIC;
3091 /*
3092 if (vptr->wol_opts & VELOCITY_WOL_PHY)
3093 wol.wolopts|=WAKE_PHY;
3094 */
3095 if (vptr->wol_opts & VELOCITY_WOL_UCAST)
3096 wol->wolopts |= WAKE_UCAST;
3097 if (vptr->wol_opts & VELOCITY_WOL_ARP)
3098 wol->wolopts |= WAKE_ARP;
3099 memcpy(&wol->sopass, vptr->wol_passwd, 6);
3100}
3101
3102static int velocity_ethtool_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
3103{
8ab6f3f7 3104 struct velocity_info *vptr = netdev_priv(dev);
1da177e4
LT		 3105
3106 if (!(wol->wolopts & (WAKE_PHY | WAKE_MAGIC | WAKE_UCAST | WAKE_ARP)))
3107 return -EFAULT;
3108 vptr->wol_opts = VELOCITY_WOL_MAGIC;
3109
3110 /*
3111 if (wol.wolopts & WAKE_PHY) {
3112 vptr->wol_opts|=VELOCITY_WOL_PHY;
3113 vptr->flags |=VELOCITY_FLAGS_WOL_ENABLED;
3114 }
3115 */
3116
3117 if (wol->wolopts & WAKE_MAGIC) {
3118 vptr->wol_opts |= VELOCITY_WOL_MAGIC;
3119 vptr->flags |= VELOCITY_FLAGS_WOL_ENABLED;
3120 }
3121 if (wol->wolopts & WAKE_UCAST) {
3122 vptr->wol_opts |= VELOCITY_WOL_UCAST;
3123 vptr->flags |= VELOCITY_FLAGS_WOL_ENABLED;
3124 }
3125 if (wol->wolopts & WAKE_ARP) {
3126 vptr->wol_opts |= VELOCITY_WOL_ARP;
3127 vptr->flags |= VELOCITY_FLAGS_WOL_ENABLED;
3128 }
3129 memcpy(vptr->wol_passwd, wol->sopass, 6);
3130 return 0;
3131}
3132
3133static u32 velocity_get_msglevel(struct net_device *dev)
3134{
3135 return msglevel;
3136}
3137
3138static void velocity_set_msglevel(struct net_device *dev, u32 value)
3139{
3140 msglevel = value;
3141}
3142
7282d491 3143static const struct ethtool_ops velocity_ethtool_ops = {
1da177e4
LT		 3144 .get_settings = velocity_get_settings,
3145 .set_settings = velocity_set_settings,
3146 .get_drvinfo = velocity_get_drvinfo,
3147 .get_wol = velocity_ethtool_get_wol,
3148 .set_wol = velocity_ethtool_set_wol,
3149 .get_msglevel = velocity_get_msglevel,
3150 .set_msglevel = velocity_set_msglevel,
3151 .get_link = velocity_get_link,
3152 .begin = velocity_ethtool_up,
3153 .complete = velocity_ethtool_down
3154};
3155
3156/**
3157 * velocity_mii_ioctl - MII ioctl handler
3158 * @dev: network device
3159 * @ifr: the ifreq block for the ioctl
3160 * @cmd: the command
3161 *
3162 * Process MII requests made via ioctl from the network layer. These
3163 * are used by tools like kudzu to interrogate the link state of the
3164 * hardware
3165 */
6aa20a22 3166
1da177e4
LT		 3167static int velocity_mii_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
3168{
8ab6f3f7 3169 struct velocity_info *vptr = netdev_priv(dev);
1da177e4
LT		 3170 struct mac_regs __iomem * regs = vptr->mac_regs;
3171 unsigned long flags;
3172 struct mii_ioctl_data *miidata = if_mii(ifr);
3173 int err;
6aa20a22 3174
1da177e4
LT		 3175 switch (cmd) {
3176 case SIOCGMIIPHY:
3177 miidata->phy_id = readb(&regs->MIIADR) & 0x1f;
3178 break;
3179 case SIOCGMIIREG:
3180 if (!capable(CAP_NET_ADMIN))
3181 return -EPERM;
3182 if(velocity_mii_read(vptr->mac_regs, miidata->reg_num & 0x1f, &(miidata->val_out)) < 0)
3183 return -ETIMEDOUT;
3184 break;
3185 case SIOCSMIIREG:
3186 if (!capable(CAP_NET_ADMIN))
3187 return -EPERM;
3188 spin_lock_irqsave(&vptr->lock, flags);
3189 err = velocity_mii_write(vptr->mac_regs, miidata->reg_num & 0x1f, miidata->val_in);
3190 spin_unlock_irqrestore(&vptr->lock, flags);
3191 check_connection_type(vptr->mac_regs);
3192 if(err)
3193 return err;
3194 break;
3195 default:
3196 return -EOPNOTSUPP;
3197 }
3198 return 0;
3199}
3200
3201#ifdef CONFIG_PM
3202
3203/**
3204 * velocity_save_context - save registers
6aa20a22 3205 * @vptr: velocity
1da177e4
LT		 3206 * @context: buffer for stored context
3207 *
3208 * Retrieve the current configuration from the velocity hardware
3209 * and stash it in the context structure, for use by the context
3210 * restore functions. This allows us to save things we need across
3211 * power down states
3212 */
6aa20a22 3213
1da177e4
LT		 3214static void velocity_save_context(struct velocity_info *vptr, struct velocity_context * context)
3215{
3216 struct mac_regs __iomem * regs = vptr->mac_regs;
3217 u16 i;
3218 u8 __iomem *ptr = (u8 __iomem *)regs;
3219
3220 for (i = MAC_REG_PAR; i < MAC_REG_CR0_CLR; i += 4)
3221 *((u32 *) (context->mac_reg + i)) = readl(ptr + i);
3222
3223 for (i = MAC_REG_MAR; i < MAC_REG_TDCSR_CLR; i += 4)
3224 *((u32 *) (context->mac_reg + i)) = readl(ptr + i);
3225
3226 for (i = MAC_REG_RDBASE_LO; i < MAC_REG_FIFO_TEST0; i += 4)
3227 *((u32 *) (context->mac_reg + i)) = readl(ptr + i);
3228
3229}
3230
3231/**
3232 * velocity_restore_context - restore registers
6aa20a22 3233 * @vptr: velocity
1da177e4
LT		 3234 * @context: buffer for stored context
3235 *
6aa20a22 3236 * Reload the register configuration from the velocity context
1da177e4
LT		 3237 * created by velocity_save_context.
3238 */
6aa20a22 3239
1da177e4
LT		 3240static void velocity_restore_context(struct velocity_info *vptr, struct velocity_context *context)
3241{
3242 struct mac_regs __iomem * regs = vptr->mac_regs;
3243 int i;
3244 u8 __iomem *ptr = (u8 __iomem *)regs;
3245
3246 for (i = MAC_REG_PAR; i < MAC_REG_CR0_SET; i += 4) {
3247 writel(*((u32 *) (context->mac_reg + i)), ptr + i);
3248 }
3249
3250 /* Just skip cr0 */
3251 for (i = MAC_REG_CR1_SET; i < MAC_REG_CR0_CLR; i++) {
3252 /* Clear */
3253 writeb(~(*((u8 *) (context->mac_reg + i))), ptr + i + 4);
3254 /* Set */
3255 writeb(*((u8 *) (context->mac_reg + i)), ptr + i);
3256 }
3257
3258 for (i = MAC_REG_MAR; i < MAC_REG_IMR; i += 4) {
3259 writel(*((u32 *) (context->mac_reg + i)), ptr + i);
3260 }
3261
3262 for (i = MAC_REG_RDBASE_LO; i < MAC_REG_FIFO_TEST0; i += 4) {
3263 writel(*((u32 *) (context->mac_reg + i)), ptr + i);
3264 }
3265
3266 for (i = MAC_REG_TDCSR_SET; i <= MAC_REG_RDCSR_SET; i++) {
3267 writeb(*((u8 *) (context->mac_reg + i)), ptr + i);
3268 }
3269
3270}
3271
3272/**
3273 * wol_calc_crc - WOL CRC
3274 * @pattern: data pattern
3275 * @mask_pattern: mask
3276 *
3277 * Compute the wake on lan crc hashes for the packet header
3278 * we are interested in.
3279 */
3280
3281static u16 wol_calc_crc(int size, u8 * pattern, u8 *mask_pattern)
3282{
3283 u16 crc = 0xFFFF;
3284 u8 mask;
3285 int i, j;
3286
3287 for (i = 0; i < size; i++) {
3288 mask = mask_pattern[i];
3289
3290 /* Skip this loop if the mask equals to zero */
3291 if (mask == 0x00)
3292 continue;
3293
3294 for (j = 0; j < 8; j++) {
3295 if ((mask & 0x01) == 0) {
3296 mask >>= 1;
3297 continue;
3298 }
3299 mask >>= 1;
3300 crc = crc_ccitt(crc, &(pattern[i * 8 + j]), 1);
3301 }
3302 }
3303 /* Finally, invert the result once to get the correct data */
3304 crc = ~crc;
906d66df 3305 return bitrev32(crc) >> 16;
1da177e4
LT		 3306}
3307
3308/**
3309 * velocity_set_wol - set up for wake on lan
3310 * @vptr: velocity to set WOL status on
3311 *
3312 * Set a card up for wake on lan either by unicast or by
3313 * ARP packet.
3314 *
3315 * FIXME: check static buffer is safe here
3316 */
3317
3318static int velocity_set_wol(struct velocity_info *vptr)
3319{
3320 struct mac_regs __iomem * regs = vptr->mac_regs;
3321 static u8 buf[256];
3322 int i;
3323
3324 static u32 mask_pattern[2][4] = {
3325 {0x00203000, 0x000003C0, 0x00000000, 0x0000000}, /* ARP */
3326 {0xfffff000, 0xffffffff, 0xffffffff, 0x000ffff} /* Magic Packet */
3327 };
3328
3329 writew(0xFFFF, &regs->WOLCRClr);
3330 writeb(WOLCFG_SAB | WOLCFG_SAM, &regs->WOLCFGSet);
3331 writew(WOLCR_MAGIC_EN, &regs->WOLCRSet);
3332
3333 /*
3334 if (vptr->wol_opts & VELOCITY_WOL_PHY)
3335 writew((WOLCR_LINKON_EN|WOLCR_LINKOFF_EN), &regs->WOLCRSet);
3336 */
3337
3338 if (vptr->wol_opts & VELOCITY_WOL_UCAST) {
3339 writew(WOLCR_UNICAST_EN, &regs->WOLCRSet);
3340 }
3341
3342 if (vptr->wol_opts & VELOCITY_WOL_ARP) {
3343 struct arp_packet *arp = (struct arp_packet *) buf;
3344 u16 crc;
3345 memset(buf, 0, sizeof(struct arp_packet) + 7);
3346
3347 for (i = 0; i < 4; i++)
3348 writel(mask_pattern[0][i], &regs->ByteMask[0][i]);
3349
3350 arp->type = htons(ETH_P_ARP);
3351 arp->ar_op = htons(1);
3352
3353 memcpy(arp->ar_tip, vptr->ip_addr, 4);
3354
3355 crc = wol_calc_crc((sizeof(struct arp_packet) + 7) / 8, buf,
3356 (u8 *) & mask_pattern[0][0]);
3357
3358 writew(crc, &regs->PatternCRC[0]);
3359 writew(WOLCR_ARP_EN, &regs->WOLCRSet);
3360 }
3361
3362 BYTE_REG_BITS_ON(PWCFG_WOLTYPE, &regs->PWCFGSet);
3363 BYTE_REG_BITS_ON(PWCFG_LEGACY_WOLEN, &regs->PWCFGSet);
3364
3365 writew(0x0FFF, &regs->WOLSRClr);
3366
3367 if (vptr->mii_status & VELOCITY_AUTONEG_ENABLE) {
3368 if (PHYID_GET_PHY_ID(vptr->phy_id) == PHYID_CICADA_CS8201)
3369 MII_REG_BITS_ON(AUXCR_MDPPS, MII_REG_AUXCR, vptr->mac_regs);
3370
3371 MII_REG_BITS_OFF(G1000CR_1000FD | G1000CR_1000, MII_REG_G1000CR, vptr->mac_regs);
3372 }
3373
3374 if (vptr->mii_status & VELOCITY_SPEED_1000)
3375 MII_REG_BITS_ON(BMCR_REAUTO, MII_REG_BMCR, vptr->mac_regs);
3376
3377 BYTE_REG_BITS_ON(CHIPGCR_FCMODE, &regs->CHIPGCR);
3378
3379 {
3380 u8 GCR;
3381 GCR = readb(&regs->CHIPGCR);
3382 GCR = (GCR & ~CHIPGCR_FCGMII) | CHIPGCR_FCFDX;
3383 writeb(GCR, &regs->CHIPGCR);
3384 }
3385
3386 BYTE_REG_BITS_OFF(ISR_PWEI, &regs->ISR);
3387 /* Turn on SWPTAG just before entering power mode */
3388 BYTE_REG_BITS_ON(STICKHW_SWPTAG, &regs->STICKHW);
3389 /* Go to bed ..... */
3390 BYTE_REG_BITS_ON((STICKHW_DS1 | STICKHW_DS0), &regs->STICKHW);
3391
3392 return 0;
3393}
3394
3395static int velocity_suspend(struct pci_dev *pdev, pm_message_t state)
3396{
3397 struct net_device *dev = pci_get_drvdata(pdev);
3398 struct velocity_info *vptr = netdev_priv(dev);
3399 unsigned long flags;
3400
3401 if(!netif_running(vptr->dev))
3402 return 0;
3403
3404 netif_device_detach(vptr->dev);
3405
3406 spin_lock_irqsave(&vptr->lock, flags);
3407 pci_save_state(pdev);
3408#ifdef ETHTOOL_GWOL
3409 if (vptr->flags & VELOCITY_FLAGS_WOL_ENABLED) {
3410 velocity_get_ip(vptr);
3411 velocity_save_context(vptr, &vptr->context);
3412 velocity_shutdown(vptr);
3413 velocity_set_wol(vptr);
4a51c0d0 3414 pci_enable_wake(pdev, PCI_D3hot, 1);
1da177e4
LT		 3415 pci_set_power_state(pdev, PCI_D3hot);
3416 } else {
3417 velocity_save_context(vptr, &vptr->context);
3418 velocity_shutdown(vptr);
3419 pci_disable_device(pdev);
3420 pci_set_power_state(pdev, pci_choose_state(pdev, state));
3421 }
3422#else
3423 pci_set_power_state(pdev, pci_choose_state(pdev, state));
3424#endif
3425 spin_unlock_irqrestore(&vptr->lock, flags);
3426 return 0;
3427}
3428
3429static int velocity_resume(struct pci_dev *pdev)
3430{
3431 struct net_device *dev = pci_get_drvdata(pdev);
3432 struct velocity_info *vptr = netdev_priv(dev);
3433 unsigned long flags;
3434 int i;
3435
3436 if(!netif_running(vptr->dev))
3437 return 0;
3438
3439 pci_set_power_state(pdev, PCI_D0);
3440 pci_enable_wake(pdev, 0, 0);
3441 pci_restore_state(pdev);
3442
3443 mac_wol_reset(vptr->mac_regs);
3444
3445 spin_lock_irqsave(&vptr->lock, flags);
3446 velocity_restore_context(vptr, &vptr->context);
3447 velocity_init_registers(vptr, VELOCITY_INIT_WOL);
3448 mac_disable_int(vptr->mac_regs);
3449
3450 velocity_tx_srv(vptr, 0);
3451
0fe9f15e
FR		 3452 for (i = 0; i < vptr->tx.numq; i++) {
3453 if (vptr->tx.used[i]) {
1da177e4
LT		 3454 mac_tx_queue_wake(vptr->mac_regs, i);
3455 }
3456 }
3457
3458 mac_enable_int(vptr->mac_regs);
3459 spin_unlock_irqrestore(&vptr->lock, flags);
3460 netif_device_attach(vptr->dev);
3461
3462 return 0;
3463}
3464
ce9f7fe3
RD		 3465#ifdef CONFIG_INET
3466
1da177e4
LT		 3467static int velocity_netdev_event(struct notifier_block *nb, unsigned long notification, void *ptr)
3468{
3469 struct in_ifaddr *ifa = (struct in_ifaddr *) ptr;
a337499f
DL		 3470 struct net_device *dev = ifa->ifa_dev->dev;
3471 struct velocity_info *vptr;
3472 unsigned long flags;
1da177e4 3473
c346dca1 3474 if (dev_net(dev) != &init_net)
6133fb1a
DL		 3475 return NOTIFY_DONE;
3476
a337499f
DL		 3477 spin_lock_irqsave(&velocity_dev_list_lock, flags);
3478 list_for_each_entry(vptr, &velocity_dev_list, list) {
3479 if (vptr->dev == dev) {
3480 velocity_get_ip(vptr);
3481 break;
1da177e4 3482 }
1da177e4 3483 }
a337499f
DL		 3484 spin_unlock_irqrestore(&velocity_dev_list_lock, flags);
3485
1da177e4
LT		 3486 return NOTIFY_DONE;
3487}
ce9f7fe3
RD		 3488
3489#endif
1da177e4 3490#endif
Linux 6.x block layer and io_uring tree(s)