treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 13
[linux-2.6-block.git] / drivers / net / usb / smsc95xx.c
CommitLineData
1ccea77e 1// SPDX-License-Identifier: GPL-2.0-or-later
2f7ca802
SG
2 /***************************************************************************
3 *
4 * Copyright (C) 2007-2008 SMSC
5 *
2f7ca802
SG
6 *****************************************************************************/
7
8#include <linux/module.h>
9#include <linux/kmod.h>
2f7ca802
SG
10#include <linux/netdevice.h>
11#include <linux/etherdevice.h>
12#include <linux/ethtool.h>
13#include <linux/mii.h>
14#include <linux/usb.h>
bbd9f9ee
SG
15#include <linux/bitrev.h>
16#include <linux/crc16.h>
2f7ca802
SG
17#include <linux/crc32.h>
18#include <linux/usb/usbnet.h>
5a0e3ad6 19#include <linux/slab.h>
c489565b 20#include <linux/of_net.h>
2f7ca802
SG
21#include "smsc95xx.h"
22
23#define SMSC_CHIPNAME "smsc95xx"
53a759c8 24#define SMSC_DRIVER_VERSION "1.0.6"
2f7ca802
SG
25#define HS_USB_PKT_SIZE (512)
26#define FS_USB_PKT_SIZE (64)
27#define DEFAULT_HS_BURST_CAP_SIZE (16 * 1024 + 5 * HS_USB_PKT_SIZE)
28#define DEFAULT_FS_BURST_CAP_SIZE (6 * 1024 + 33 * FS_USB_PKT_SIZE)
29#define DEFAULT_BULK_IN_DELAY (0x00002000)
30#define MAX_SINGLE_PACKET_SIZE (2048)
31#define LAN95XX_EEPROM_MAGIC (0x9500)
32#define EEPROM_MAC_OFFSET (0x01)
f7b29271 33#define DEFAULT_TX_CSUM_ENABLE (true)
2f7ca802
SG
34#define DEFAULT_RX_CSUM_ENABLE (true)
35#define SMSC95XX_INTERNAL_PHY_ID (1)
36#define SMSC95XX_TX_OVERHEAD (8)
f7b29271 37#define SMSC95XX_TX_OVERHEAD_CSUM (12)
e5e3af83 38#define SUPPORTED_WAKE (WAKE_PHY | WAKE_UCAST | WAKE_BCAST | \
bbd9f9ee 39 WAKE_MCAST | WAKE_ARP | WAKE_MAGIC)
2f7ca802 40
9ebca507
SG
41#define FEATURE_8_WAKEUP_FILTERS (0x01)
42#define FEATURE_PHY_NLP_CROSSOVER (0x02)
eb970ff0 43#define FEATURE_REMOTE_WAKEUP (0x04)
9ebca507 44
b2d4b150
SG
45#define SUSPEND_SUSPEND0 (0x01)
46#define SUSPEND_SUSPEND1 (0x02)
47#define SUSPEND_SUSPEND2 (0x04)
48#define SUSPEND_SUSPEND3 (0x08)
49#define SUSPEND_ALLMODES (SUSPEND_SUSPEND0 | SUSPEND_SUSPEND1 | \
50 SUSPEND_SUSPEND2 | SUSPEND_SUSPEND3)
51
d69d1694
CF
52#define CARRIER_CHECK_DELAY (2 * HZ)
53
2f7ca802 54struct smsc95xx_priv {
13722bbe 55 u32 chip_id;
2f7ca802 56 u32 mac_cr;
3c0f3c60
MZ
57 u32 hash_hi;
58 u32 hash_lo;
e0e474a8 59 u32 wolopts;
2f7ca802 60 spinlock_t mac_cr_lock;
9ebca507 61 u8 features;
b2d4b150 62 u8 suspend_flags;
13722bbe 63 u8 mdix_ctrl;
d69d1694
CF
64 bool link_ok;
65 struct delayed_work carrier_check;
66 struct usbnet *dev;
2f7ca802
SG
67};
68
eb939922 69static bool turbo_mode = true;
2f7ca802
SG
70module_param(turbo_mode, bool, 0644);
71MODULE_PARM_DESC(turbo_mode, "Enable multiple frames per Rx transaction");
72
ec32115d
ML
73static int __must_check __smsc95xx_read_reg(struct usbnet *dev, u32 index,
74 u32 *data, int in_pm)
2f7ca802 75{
72108fd2 76 u32 buf;
2f7ca802 77 int ret;
ec32115d 78 int (*fn)(struct usbnet *, u8, u8, u16, u16, void *, u16);
2f7ca802
SG
79
80 BUG_ON(!dev);
81
ec32115d
ML
82 if (!in_pm)
83 fn = usbnet_read_cmd;
84 else
85 fn = usbnet_read_cmd_nopm;
86
87 ret = fn(dev, USB_VENDOR_REQUEST_READ_REGISTER, USB_DIR_IN
88 | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
89 0, index, &buf, 4);
5a36b68b 90 if (unlikely(ret < 0)) {
1e1d7412
JP
91 netdev_warn(dev->net, "Failed to read reg index 0x%08x: %d\n",
92 index, ret);
5a36b68b
DC
93 return ret;
94 }
2f7ca802 95
72108fd2
ML
96 le32_to_cpus(&buf);
97 *data = buf;
2f7ca802
SG
98
99 return ret;
100}
101
ec32115d
ML
102static int __must_check __smsc95xx_write_reg(struct usbnet *dev, u32 index,
103 u32 data, int in_pm)
2f7ca802 104{
72108fd2 105 u32 buf;
2f7ca802 106 int ret;
ec32115d 107 int (*fn)(struct usbnet *, u8, u8, u16, u16, const void *, u16);
2f7ca802
SG
108
109 BUG_ON(!dev);
110
ec32115d
ML
111 if (!in_pm)
112 fn = usbnet_write_cmd;
113 else
114 fn = usbnet_write_cmd_nopm;
115
72108fd2
ML
116 buf = data;
117 cpu_to_le32s(&buf);
2f7ca802 118
ec32115d
ML
119 ret = fn(dev, USB_VENDOR_REQUEST_WRITE_REGISTER, USB_DIR_OUT
120 | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
121 0, index, &buf, 4);
2f7ca802 122 if (unlikely(ret < 0))
1e1d7412
JP
123 netdev_warn(dev->net, "Failed to write reg index 0x%08x: %d\n",
124 index, ret);
2f7ca802 125
2f7ca802
SG
126 return ret;
127}
128
ec32115d
ML
129static int __must_check smsc95xx_read_reg_nopm(struct usbnet *dev, u32 index,
130 u32 *data)
131{
132 return __smsc95xx_read_reg(dev, index, data, 1);
133}
134
135static int __must_check smsc95xx_write_reg_nopm(struct usbnet *dev, u32 index,
136 u32 data)
137{
138 return __smsc95xx_write_reg(dev, index, data, 1);
139}
140
141static int __must_check smsc95xx_read_reg(struct usbnet *dev, u32 index,
142 u32 *data)
143{
144 return __smsc95xx_read_reg(dev, index, data, 0);
145}
146
147static int __must_check smsc95xx_write_reg(struct usbnet *dev, u32 index,
148 u32 data)
149{
150 return __smsc95xx_write_reg(dev, index, data, 0);
151}
e0e474a8 152
2f7ca802
SG
153/* Loop until the read is completed with timeout
154 * called with phy_mutex held */
e5e3af83
SG
155static int __must_check __smsc95xx_phy_wait_not_busy(struct usbnet *dev,
156 int in_pm)
2f7ca802
SG
157{
158 unsigned long start_time = jiffies;
159 u32 val;
769ea6d8 160 int ret;
2f7ca802
SG
161
162 do {
e5e3af83 163 ret = __smsc95xx_read_reg(dev, MII_ADDR, &val, in_pm);
b052e073
SG
164 if (ret < 0) {
165 netdev_warn(dev->net, "Error reading MII_ACCESS\n");
166 return ret;
167 }
168
2f7ca802
SG
169 if (!(val & MII_BUSY_))
170 return 0;
171 } while (!time_after(jiffies, start_time + HZ));
172
173 return -EIO;
174}
175
e5e3af83
SG
176static int __smsc95xx_mdio_read(struct net_device *netdev, int phy_id, int idx,
177 int in_pm)
2f7ca802
SG
178{
179 struct usbnet *dev = netdev_priv(netdev);
180 u32 val, addr;
769ea6d8 181 int ret;
2f7ca802
SG
182
183 mutex_lock(&dev->phy_mutex);
184
185 /* confirm MII not busy */
e5e3af83 186 ret = __smsc95xx_phy_wait_not_busy(dev, in_pm);
b052e073
SG
187 if (ret < 0) {
188 netdev_warn(dev->net, "MII is busy in smsc95xx_mdio_read\n");
189 goto done;
190 }
2f7ca802
SG
191
192 /* set the address, index & direction (read from PHY) */
193 phy_id &= dev->mii.phy_id_mask;
194 idx &= dev->mii.reg_num_mask;
80928805 195 addr = (phy_id << 11) | (idx << 6) | MII_READ_ | MII_BUSY_;
e5e3af83 196 ret = __smsc95xx_write_reg(dev, MII_ADDR, addr, in_pm);
b052e073
SG
197 if (ret < 0) {
198 netdev_warn(dev->net, "Error writing MII_ADDR\n");
199 goto done;
200 }
2f7ca802 201
e5e3af83 202 ret = __smsc95xx_phy_wait_not_busy(dev, in_pm);
b052e073
SG
203 if (ret < 0) {
204 netdev_warn(dev->net, "Timed out reading MII reg %02X\n", idx);
205 goto done;
206 }
2f7ca802 207
e5e3af83 208 ret = __smsc95xx_read_reg(dev, MII_DATA, &val, in_pm);
b052e073
SG
209 if (ret < 0) {
210 netdev_warn(dev->net, "Error reading MII_DATA\n");
211 goto done;
212 }
2f7ca802 213
769ea6d8 214 ret = (u16)(val & 0xFFFF);
2f7ca802 215
769ea6d8
SG
216done:
217 mutex_unlock(&dev->phy_mutex);
218 return ret;
2f7ca802
SG
219}
220
e5e3af83
SG
221static void __smsc95xx_mdio_write(struct net_device *netdev, int phy_id,
222 int idx, int regval, int in_pm)
2f7ca802
SG
223{
224 struct usbnet *dev = netdev_priv(netdev);
225 u32 val, addr;
769ea6d8 226 int ret;
2f7ca802
SG
227
228 mutex_lock(&dev->phy_mutex);
229
230 /* confirm MII not busy */
e5e3af83 231 ret = __smsc95xx_phy_wait_not_busy(dev, in_pm);
b052e073
SG
232 if (ret < 0) {
233 netdev_warn(dev->net, "MII is busy in smsc95xx_mdio_write\n");
234 goto done;
235 }
2f7ca802
SG
236
237 val = regval;
e5e3af83 238 ret = __smsc95xx_write_reg(dev, MII_DATA, val, in_pm);
b052e073
SG
239 if (ret < 0) {
240 netdev_warn(dev->net, "Error writing MII_DATA\n");
241 goto done;
242 }
2f7ca802
SG
243
244 /* set the address, index & direction (write to PHY) */
245 phy_id &= dev->mii.phy_id_mask;
246 idx &= dev->mii.reg_num_mask;
80928805 247 addr = (phy_id << 11) | (idx << 6) | MII_WRITE_ | MII_BUSY_;
e5e3af83 248 ret = __smsc95xx_write_reg(dev, MII_ADDR, addr, in_pm);
b052e073
SG
249 if (ret < 0) {
250 netdev_warn(dev->net, "Error writing MII_ADDR\n");
251 goto done;
252 }
2f7ca802 253
e5e3af83 254 ret = __smsc95xx_phy_wait_not_busy(dev, in_pm);
b052e073
SG
255 if (ret < 0) {
256 netdev_warn(dev->net, "Timed out writing MII reg %02X\n", idx);
257 goto done;
258 }
2f7ca802 259
769ea6d8 260done:
2f7ca802
SG
261 mutex_unlock(&dev->phy_mutex);
262}
263
e5e3af83
SG
264static int smsc95xx_mdio_read_nopm(struct net_device *netdev, int phy_id,
265 int idx)
266{
267 return __smsc95xx_mdio_read(netdev, phy_id, idx, 1);
268}
269
270static void smsc95xx_mdio_write_nopm(struct net_device *netdev, int phy_id,
271 int idx, int regval)
272{
273 __smsc95xx_mdio_write(netdev, phy_id, idx, regval, 1);
274}
275
276static int smsc95xx_mdio_read(struct net_device *netdev, int phy_id, int idx)
277{
278 return __smsc95xx_mdio_read(netdev, phy_id, idx, 0);
279}
280
281static void smsc95xx_mdio_write(struct net_device *netdev, int phy_id, int idx,
282 int regval)
283{
284 __smsc95xx_mdio_write(netdev, phy_id, idx, regval, 0);
285}
286
769ea6d8 287static int __must_check smsc95xx_wait_eeprom(struct usbnet *dev)
2f7ca802
SG
288{
289 unsigned long start_time = jiffies;
290 u32 val;
769ea6d8 291 int ret;
2f7ca802
SG
292
293 do {
769ea6d8 294 ret = smsc95xx_read_reg(dev, E2P_CMD, &val);
b052e073
SG
295 if (ret < 0) {
296 netdev_warn(dev->net, "Error reading E2P_CMD\n");
297 return ret;
298 }
299
2f7ca802
SG
300 if (!(val & E2P_CMD_BUSY_) || (val & E2P_CMD_TIMEOUT_))
301 break;
302 udelay(40);
303 } while (!time_after(jiffies, start_time + HZ));
304
305 if (val & (E2P_CMD_TIMEOUT_ | E2P_CMD_BUSY_)) {
60b86755 306 netdev_warn(dev->net, "EEPROM read operation timeout\n");
2f7ca802
SG
307 return -EIO;
308 }
309
310 return 0;
311}
312
769ea6d8 313static int __must_check smsc95xx_eeprom_confirm_not_busy(struct usbnet *dev)
2f7ca802
SG
314{
315 unsigned long start_time = jiffies;
316 u32 val;
769ea6d8 317 int ret;
2f7ca802
SG
318
319 do {
769ea6d8 320 ret = smsc95xx_read_reg(dev, E2P_CMD, &val);
b052e073
SG
321 if (ret < 0) {
322 netdev_warn(dev->net, "Error reading E2P_CMD\n");
323 return ret;
324 }
2f7ca802 325
2f7ca802
SG
326 if (!(val & E2P_CMD_BUSY_))
327 return 0;
328
329 udelay(40);
330 } while (!time_after(jiffies, start_time + HZ));
331
60b86755 332 netdev_warn(dev->net, "EEPROM is busy\n");
2f7ca802
SG
333 return -EIO;
334}
335
336static int smsc95xx_read_eeprom(struct usbnet *dev, u32 offset, u32 length,
337 u8 *data)
338{
339 u32 val;
340 int i, ret;
341
342 BUG_ON(!dev);
343 BUG_ON(!data);
344
345 ret = smsc95xx_eeprom_confirm_not_busy(dev);
346 if (ret)
347 return ret;
348
349 for (i = 0; i < length; i++) {
350 val = E2P_CMD_BUSY_ | E2P_CMD_READ_ | (offset & E2P_CMD_ADDR_);
769ea6d8 351 ret = smsc95xx_write_reg(dev, E2P_CMD, val);
b052e073
SG
352 if (ret < 0) {
353 netdev_warn(dev->net, "Error writing E2P_CMD\n");
354 return ret;
355 }
2f7ca802
SG
356
357 ret = smsc95xx_wait_eeprom(dev);
358 if (ret < 0)
359 return ret;
360
769ea6d8 361 ret = smsc95xx_read_reg(dev, E2P_DATA, &val);
b052e073
SG
362 if (ret < 0) {
363 netdev_warn(dev->net, "Error reading E2P_DATA\n");
364 return ret;
365 }
2f7ca802
SG
366
367 data[i] = val & 0xFF;
368 offset++;
369 }
370
371 return 0;
372}
373
374static int smsc95xx_write_eeprom(struct usbnet *dev, u32 offset, u32 length,
375 u8 *data)
376{
377 u32 val;
378 int i, ret;
379
380 BUG_ON(!dev);
381 BUG_ON(!data);
382
383 ret = smsc95xx_eeprom_confirm_not_busy(dev);
384 if (ret)
385 return ret;
386
387 /* Issue write/erase enable command */
388 val = E2P_CMD_BUSY_ | E2P_CMD_EWEN_;
769ea6d8 389 ret = smsc95xx_write_reg(dev, E2P_CMD, val);
b052e073
SG
390 if (ret < 0) {
391 netdev_warn(dev->net, "Error writing E2P_DATA\n");
392 return ret;
393 }
2f7ca802
SG
394
395 ret = smsc95xx_wait_eeprom(dev);
396 if (ret < 0)
397 return ret;
398
399 for (i = 0; i < length; i++) {
400
401 /* Fill data register */
402 val = data[i];
769ea6d8 403 ret = smsc95xx_write_reg(dev, E2P_DATA, val);
b052e073
SG
404 if (ret < 0) {
405 netdev_warn(dev->net, "Error writing E2P_DATA\n");
406 return ret;
407 }
2f7ca802
SG
408
409 /* Send "write" command */
410 val = E2P_CMD_BUSY_ | E2P_CMD_WRITE_ | (offset & E2P_CMD_ADDR_);
769ea6d8 411 ret = smsc95xx_write_reg(dev, E2P_CMD, val);
b052e073
SG
412 if (ret < 0) {
413 netdev_warn(dev->net, "Error writing E2P_CMD\n");
414 return ret;
415 }
2f7ca802
SG
416
417 ret = smsc95xx_wait_eeprom(dev);
418 if (ret < 0)
419 return ret;
420
421 offset++;
422 }
423
424 return 0;
425}
426
769ea6d8 427static int __must_check smsc95xx_write_reg_async(struct usbnet *dev, u16 index,
7b9e7580 428 u32 data)
2f7ca802 429{
1d74a6bd 430 const u16 size = 4;
7b9e7580 431 u32 buf;
72108fd2 432 int ret;
2f7ca802 433
7b9e7580
SG
434 buf = data;
435 cpu_to_le32s(&buf);
436
72108fd2
ML
437 ret = usbnet_write_cmd_async(dev, USB_VENDOR_REQUEST_WRITE_REGISTER,
438 USB_DIR_OUT | USB_TYPE_VENDOR |
439 USB_RECIP_DEVICE,
7b9e7580 440 0, index, &buf, size);
72108fd2
ML
441 if (ret < 0)
442 netdev_warn(dev->net, "Error write async cmd, sts=%d\n",
443 ret);
444 return ret;
2f7ca802
SG
445}
446
447/* returns hash bit number for given MAC address
448 * example:
449 * 01 00 5E 00 00 01 -> returns bit number 31 */
450static unsigned int smsc95xx_hash(char addr[ETH_ALEN])
451{
452 return (ether_crc(ETH_ALEN, addr) >> 26) & 0x3f;
453}
454
455static void smsc95xx_set_multicast(struct net_device *netdev)
456{
457 struct usbnet *dev = netdev_priv(netdev);
458 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
2f7ca802 459 unsigned long flags;
769ea6d8 460 int ret;
2f7ca802 461
3c0f3c60
MZ
462 pdata->hash_hi = 0;
463 pdata->hash_lo = 0;
464
2f7ca802
SG
465 spin_lock_irqsave(&pdata->mac_cr_lock, flags);
466
467 if (dev->net->flags & IFF_PROMISC) {
a475f603 468 netif_dbg(dev, drv, dev->net, "promiscuous mode enabled\n");
2f7ca802
SG
469 pdata->mac_cr |= MAC_CR_PRMS_;
470 pdata->mac_cr &= ~(MAC_CR_MCPAS_ | MAC_CR_HPFILT_);
471 } else if (dev->net->flags & IFF_ALLMULTI) {
a475f603 472 netif_dbg(dev, drv, dev->net, "receive all multicast enabled\n");
2f7ca802
SG
473 pdata->mac_cr |= MAC_CR_MCPAS_;
474 pdata->mac_cr &= ~(MAC_CR_PRMS_ | MAC_CR_HPFILT_);
4cd24eaf 475 } else if (!netdev_mc_empty(dev->net)) {
22bedad3 476 struct netdev_hw_addr *ha;
2f7ca802
SG
477
478 pdata->mac_cr |= MAC_CR_HPFILT_;
479 pdata->mac_cr &= ~(MAC_CR_PRMS_ | MAC_CR_MCPAS_);
480
22bedad3
JP
481 netdev_for_each_mc_addr(ha, netdev) {
482 u32 bitnum = smsc95xx_hash(ha->addr);
a92635dc
JP
483 u32 mask = 0x01 << (bitnum & 0x1F);
484 if (bitnum & 0x20)
3c0f3c60 485 pdata->hash_hi |= mask;
a92635dc 486 else
3c0f3c60 487 pdata->hash_lo |= mask;
2f7ca802
SG
488 }
489
a475f603 490 netif_dbg(dev, drv, dev->net, "HASHH=0x%08X, HASHL=0x%08X\n",
3c0f3c60 491 pdata->hash_hi, pdata->hash_lo);
2f7ca802 492 } else {
a475f603 493 netif_dbg(dev, drv, dev->net, "receive own packets only\n");
2f7ca802
SG
494 pdata->mac_cr &=
495 ~(MAC_CR_PRMS_ | MAC_CR_MCPAS_ | MAC_CR_HPFILT_);
496 }
497
498 spin_unlock_irqrestore(&pdata->mac_cr_lock, flags);
499
500 /* Initiate async writes, as we can't wait for completion here */
7b9e7580 501 ret = smsc95xx_write_reg_async(dev, HASHH, pdata->hash_hi);
b052e073
SG
502 if (ret < 0)
503 netdev_warn(dev->net, "failed to initiate async write to HASHH\n");
769ea6d8 504
7b9e7580 505 ret = smsc95xx_write_reg_async(dev, HASHL, pdata->hash_lo);
b052e073
SG
506 if (ret < 0)
507 netdev_warn(dev->net, "failed to initiate async write to HASHL\n");
769ea6d8 508
7b9e7580 509 ret = smsc95xx_write_reg_async(dev, MAC_CR, pdata->mac_cr);
b052e073
SG
510 if (ret < 0)
511 netdev_warn(dev->net, "failed to initiate async write to MAC_CR\n");
2f7ca802
SG
512}
513
769ea6d8
SG
514static int smsc95xx_phy_update_flowcontrol(struct usbnet *dev, u8 duplex,
515 u16 lcladv, u16 rmtadv)
2f7ca802 516{
9c082731 517 u32 flow = 0, afc_cfg;
2f7ca802
SG
518
519 int ret = smsc95xx_read_reg(dev, AFC_CFG, &afc_cfg);
e360a8b4 520 if (ret < 0)
b052e073 521 return ret;
2f7ca802
SG
522
523 if (duplex == DUPLEX_FULL) {
bc02ff95 524 u8 cap = mii_resolve_flowctrl_fdx(lcladv, rmtadv);
2f7ca802
SG
525
526 if (cap & FLOW_CTRL_RX)
527 flow = 0xFFFF0002;
2f7ca802 528
9c082731 529 if (cap & FLOW_CTRL_TX) {
2f7ca802 530 afc_cfg |= 0xF;
9c082731
NS
531 flow |= 0xFFFF0000;
532 } else {
2f7ca802 533 afc_cfg &= ~0xF;
9c082731 534 }
2f7ca802 535
a475f603 536 netif_dbg(dev, link, dev->net, "rx pause %s, tx pause %s\n",
60b86755
JP
537 cap & FLOW_CTRL_RX ? "enabled" : "disabled",
538 cap & FLOW_CTRL_TX ? "enabled" : "disabled");
2f7ca802 539 } else {
a475f603 540 netif_dbg(dev, link, dev->net, "half duplex\n");
2f7ca802
SG
541 afc_cfg |= 0xF;
542 }
543
769ea6d8 544 ret = smsc95xx_write_reg(dev, FLOW, flow);
b052e073 545 if (ret < 0)
e360a8b4 546 return ret;
769ea6d8 547
e360a8b4 548 return smsc95xx_write_reg(dev, AFC_CFG, afc_cfg);
2f7ca802
SG
549}
550
551static int smsc95xx_link_reset(struct usbnet *dev)
552{
553 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
554 struct mii_if_info *mii = &dev->mii;
8ae6daca 555 struct ethtool_cmd ecmd = { .cmd = ETHTOOL_GSET };
2f7ca802
SG
556 unsigned long flags;
557 u16 lcladv, rmtadv;
769ea6d8 558 int ret;
2f7ca802
SG
559
560 /* clear interrupt status */
769ea6d8 561 ret = smsc95xx_mdio_read(dev->net, mii->phy_id, PHY_INT_SRC);
e360a8b4 562 if (ret < 0)
b052e073 563 return ret;
769ea6d8
SG
564
565 ret = smsc95xx_write_reg(dev, INT_STS, INT_STS_CLEAR_ALL_);
e360a8b4 566 if (ret < 0)
b052e073 567 return ret;
2f7ca802
SG
568
569 mii_check_media(mii, 1, 1);
570 mii_ethtool_gset(&dev->mii, &ecmd);
571 lcladv = smsc95xx_mdio_read(dev->net, mii->phy_id, MII_ADVERTISE);
572 rmtadv = smsc95xx_mdio_read(dev->net, mii->phy_id, MII_LPA);
573
8ae6daca
DD
574 netif_dbg(dev, link, dev->net,
575 "speed: %u duplex: %d lcladv: %04x rmtadv: %04x\n",
576 ethtool_cmd_speed(&ecmd), ecmd.duplex, lcladv, rmtadv);
2f7ca802
SG
577
578 spin_lock_irqsave(&pdata->mac_cr_lock, flags);
579 if (ecmd.duplex != DUPLEX_FULL) {
580 pdata->mac_cr &= ~MAC_CR_FDPX_;
581 pdata->mac_cr |= MAC_CR_RCVOWN_;
582 } else {
583 pdata->mac_cr &= ~MAC_CR_RCVOWN_;
584 pdata->mac_cr |= MAC_CR_FDPX_;
585 }
586 spin_unlock_irqrestore(&pdata->mac_cr_lock, flags);
587
769ea6d8 588 ret = smsc95xx_write_reg(dev, MAC_CR, pdata->mac_cr);
e360a8b4 589 if (ret < 0)
b052e073 590 return ret;
2f7ca802 591
769ea6d8 592 ret = smsc95xx_phy_update_flowcontrol(dev, ecmd.duplex, lcladv, rmtadv);
b052e073
SG
593 if (ret < 0)
594 netdev_warn(dev->net, "Error updating PHY flow control\n");
2f7ca802 595
b052e073 596 return ret;
2f7ca802
SG
597}
598
599static void smsc95xx_status(struct usbnet *dev, struct urb *urb)
600{
601 u32 intdata;
602
603 if (urb->actual_length != 4) {
60b86755
JP
604 netdev_warn(dev->net, "unexpected urb length %d\n",
605 urb->actual_length);
2f7ca802
SG
606 return;
607 }
608
6809d216 609 intdata = get_unaligned_le32(urb->transfer_buffer);
a475f603 610 netif_dbg(dev, link, dev->net, "intdata: 0x%08X\n", intdata);
2f7ca802
SG
611
612 if (intdata & INT_ENP_PHY_INT_)
613 usbnet_defer_kevent(dev, EVENT_LINK_RESET);
614 else
60b86755
JP
615 netdev_warn(dev->net, "unexpected interrupt, intdata=0x%08X\n",
616 intdata);
2f7ca802
SG
617}
618
d69d1694
CF
619static void set_carrier(struct usbnet *dev, bool link)
620{
621 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
622
623 if (pdata->link_ok == link)
624 return;
625
626 pdata->link_ok = link;
627
628 if (link)
629 usbnet_link_change(dev, 1, 0);
630 else
631 usbnet_link_change(dev, 0, 0);
632}
633
634static void check_carrier(struct work_struct *work)
635{
636 struct smsc95xx_priv *pdata = container_of(work, struct smsc95xx_priv,
637 carrier_check.work);
638 struct usbnet *dev = pdata->dev;
639 int ret;
640
641 if (pdata->suspend_flags != 0)
642 return;
643
644 ret = smsc95xx_mdio_read(dev->net, dev->mii.phy_id, MII_BMSR);
645 if (ret < 0) {
646 netdev_warn(dev->net, "Failed to read MII_BMSR\n");
647 return;
648 }
649 if (ret & BMSR_LSTATUS)
650 set_carrier(dev, 1);
651 else
652 set_carrier(dev, 0);
653
654 schedule_delayed_work(&pdata->carrier_check, CARRIER_CHECK_DELAY);
655}
656
f7b29271 657/* Enable or disable Tx & Rx checksum offload engines */
c8f44aff
MM
658static int smsc95xx_set_features(struct net_device *netdev,
659 netdev_features_t features)
2f7ca802 660{
78e47fe4 661 struct usbnet *dev = netdev_priv(netdev);
2f7ca802 662 u32 read_buf;
78e47fe4
MM
663 int ret;
664
665 ret = smsc95xx_read_reg(dev, COE_CR, &read_buf);
e360a8b4 666 if (ret < 0)
b052e073 667 return ret;
2f7ca802 668
fe0cd8ca 669 if (features & NETIF_F_IP_CSUM)
f7b29271
SG
670 read_buf |= Tx_COE_EN_;
671 else
672 read_buf &= ~Tx_COE_EN_;
673
78e47fe4 674 if (features & NETIF_F_RXCSUM)
2f7ca802
SG
675 read_buf |= Rx_COE_EN_;
676 else
677 read_buf &= ~Rx_COE_EN_;
678
679 ret = smsc95xx_write_reg(dev, COE_CR, read_buf);
e360a8b4 680 if (ret < 0)
b052e073 681 return ret;
2f7ca802 682
a475f603 683 netif_dbg(dev, hw, dev->net, "COE_CR = 0x%08x\n", read_buf);
2f7ca802
SG
684 return 0;
685}
686
687static int smsc95xx_ethtool_get_eeprom_len(struct net_device *net)
688{
689 return MAX_EEPROM_SIZE;
690}
691
692static int smsc95xx_ethtool_get_eeprom(struct net_device *netdev,
693 struct ethtool_eeprom *ee, u8 *data)
694{
695 struct usbnet *dev = netdev_priv(netdev);
696
697 ee->magic = LAN95XX_EEPROM_MAGIC;
698
699 return smsc95xx_read_eeprom(dev, ee->offset, ee->len, data);
700}
701
702static int smsc95xx_ethtool_set_eeprom(struct net_device *netdev,
703 struct ethtool_eeprom *ee, u8 *data)
704{
705 struct usbnet *dev = netdev_priv(netdev);
706
707 if (ee->magic != LAN95XX_EEPROM_MAGIC) {
60b86755
JP
708 netdev_warn(dev->net, "EEPROM: magic value mismatch, magic = 0x%x\n",
709 ee->magic);
2f7ca802
SG
710 return -EINVAL;
711 }
712
713 return smsc95xx_write_eeprom(dev, ee->offset, ee->len, data);
714}
715
9fa32e94
EV
716static int smsc95xx_ethtool_getregslen(struct net_device *netdev)
717{
718 /* all smsc95xx registers */
96245317 719 return COE_CR - ID_REV + sizeof(u32);
9fa32e94
EV
720}
721
722static void
723smsc95xx_ethtool_getregs(struct net_device *netdev, struct ethtool_regs *regs,
724 void *buf)
725{
726 struct usbnet *dev = netdev_priv(netdev);
d348446b
DC
727 unsigned int i, j;
728 int retval;
9fa32e94
EV
729 u32 *data = buf;
730
731 retval = smsc95xx_read_reg(dev, ID_REV, &regs->version);
732 if (retval < 0) {
733 netdev_warn(netdev, "REGS: cannot read ID_REV\n");
734 return;
735 }
736
737 for (i = ID_REV, j = 0; i <= COE_CR; i += (sizeof(u32)), j++) {
738 retval = smsc95xx_read_reg(dev, i, &data[j]);
739 if (retval < 0) {
740 netdev_warn(netdev, "REGS: cannot read reg[%x]\n", i);
741 return;
742 }
743 }
744}
745
e0e474a8
SG
746static void smsc95xx_ethtool_get_wol(struct net_device *net,
747 struct ethtool_wolinfo *wolinfo)
748{
749 struct usbnet *dev = netdev_priv(net);
750 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
751
752 wolinfo->supported = SUPPORTED_WAKE;
753 wolinfo->wolopts = pdata->wolopts;
754}
755
756static int smsc95xx_ethtool_set_wol(struct net_device *net,
757 struct ethtool_wolinfo *wolinfo)
758{
759 struct usbnet *dev = netdev_priv(net);
760 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
3b14692c 761 int ret;
e0e474a8 762
c530c471
FF
763 if (wolinfo->wolopts & ~SUPPORTED_WAKE)
764 return -EINVAL;
765
e0e474a8 766 pdata->wolopts = wolinfo->wolopts & SUPPORTED_WAKE;
3b14692c
SG
767
768 ret = device_set_wakeup_enable(&dev->udev->dev, pdata->wolopts);
b052e073
SG
769 if (ret < 0)
770 netdev_warn(dev->net, "device_set_wakeup_enable error %d\n", ret);
3b14692c 771
b052e073 772 return ret;
e0e474a8
SG
773}
774
13722bbe
WH
775static int get_mdix_status(struct net_device *net)
776{
777 struct usbnet *dev = netdev_priv(net);
778 u32 val;
779 int buf;
780
781 buf = smsc95xx_mdio_read(dev->net, dev->mii.phy_id, SPECIAL_CTRL_STS);
782 if (buf & SPECIAL_CTRL_STS_OVRRD_AMDIX_) {
783 if (buf & SPECIAL_CTRL_STS_AMDIX_ENABLE_)
784 return ETH_TP_MDI_AUTO;
785 else if (buf & SPECIAL_CTRL_STS_AMDIX_STATE_)
786 return ETH_TP_MDI_X;
787 } else {
788 buf = smsc95xx_read_reg(dev, STRAP_STATUS, &val);
789 if (val & STRAP_STATUS_AMDIX_EN_)
790 return ETH_TP_MDI_AUTO;
791 }
792
793 return ETH_TP_MDI;
794}
795
796static void set_mdix_status(struct net_device *net, __u8 mdix_ctrl)
797{
798 struct usbnet *dev = netdev_priv(net);
799 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
800 int buf;
801
802 if ((pdata->chip_id == ID_REV_CHIP_ID_9500A_) ||
803 (pdata->chip_id == ID_REV_CHIP_ID_9530_) ||
804 (pdata->chip_id == ID_REV_CHIP_ID_89530_) ||
805 (pdata->chip_id == ID_REV_CHIP_ID_9730_)) {
806 /* Extend Manual AutoMDIX timer for 9500A/9500Ai */
807 buf = smsc95xx_mdio_read(dev->net, dev->mii.phy_id,
808 PHY_EDPD_CONFIG);
809 buf |= PHY_EDPD_CONFIG_EXT_CROSSOVER_;
810 smsc95xx_mdio_write(dev->net, dev->mii.phy_id,
811 PHY_EDPD_CONFIG, buf);
812 }
813
814 if (mdix_ctrl == ETH_TP_MDI) {
815 buf = smsc95xx_mdio_read(dev->net, dev->mii.phy_id,
816 SPECIAL_CTRL_STS);
817 buf |= SPECIAL_CTRL_STS_OVRRD_AMDIX_;
818 buf &= ~(SPECIAL_CTRL_STS_AMDIX_ENABLE_ |
819 SPECIAL_CTRL_STS_AMDIX_STATE_);
820 smsc95xx_mdio_write(dev->net, dev->mii.phy_id,
821 SPECIAL_CTRL_STS, buf);
822 } else if (mdix_ctrl == ETH_TP_MDI_X) {
823 buf = smsc95xx_mdio_read(dev->net, dev->mii.phy_id,
824 SPECIAL_CTRL_STS);
825 buf |= SPECIAL_CTRL_STS_OVRRD_AMDIX_;
826 buf &= ~(SPECIAL_CTRL_STS_AMDIX_ENABLE_ |
827 SPECIAL_CTRL_STS_AMDIX_STATE_);
828 buf |= SPECIAL_CTRL_STS_AMDIX_STATE_;
829 smsc95xx_mdio_write(dev->net, dev->mii.phy_id,
830 SPECIAL_CTRL_STS, buf);
831 } else if (mdix_ctrl == ETH_TP_MDI_AUTO) {
832 buf = smsc95xx_mdio_read(dev->net, dev->mii.phy_id,
833 SPECIAL_CTRL_STS);
834 buf &= ~SPECIAL_CTRL_STS_OVRRD_AMDIX_;
835 buf &= ~(SPECIAL_CTRL_STS_AMDIX_ENABLE_ |
836 SPECIAL_CTRL_STS_AMDIX_STATE_);
837 buf |= SPECIAL_CTRL_STS_AMDIX_ENABLE_;
838 smsc95xx_mdio_write(dev->net, dev->mii.phy_id,
839 SPECIAL_CTRL_STS, buf);
840 }
841 pdata->mdix_ctrl = mdix_ctrl;
842}
843
eaf9a32a
PR
844static int smsc95xx_get_link_ksettings(struct net_device *net,
845 struct ethtool_link_ksettings *cmd)
13722bbe
WH
846{
847 struct usbnet *dev = netdev_priv(net);
848 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
849 int retval;
850
eaf9a32a 851 retval = usbnet_get_link_ksettings(net, cmd);
13722bbe 852
eaf9a32a
PR
853 cmd->base.eth_tp_mdix = pdata->mdix_ctrl;
854 cmd->base.eth_tp_mdix_ctrl = pdata->mdix_ctrl;
13722bbe
WH
855
856 return retval;
857}
858
eaf9a32a
PR
859static int smsc95xx_set_link_ksettings(struct net_device *net,
860 const struct ethtool_link_ksettings *cmd)
13722bbe
WH
861{
862 struct usbnet *dev = netdev_priv(net);
863 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
864 int retval;
865
eaf9a32a
PR
866 if (pdata->mdix_ctrl != cmd->base.eth_tp_mdix_ctrl)
867 set_mdix_status(net, cmd->base.eth_tp_mdix_ctrl);
13722bbe 868
eaf9a32a 869 retval = usbnet_set_link_ksettings(net, cmd);
13722bbe
WH
870
871 return retval;
872}
873
0fc0b732 874static const struct ethtool_ops smsc95xx_ethtool_ops = {
2f7ca802
SG
875 .get_link = usbnet_get_link,
876 .nway_reset = usbnet_nway_reset,
877 .get_drvinfo = usbnet_get_drvinfo,
878 .get_msglevel = usbnet_get_msglevel,
879 .set_msglevel = usbnet_set_msglevel,
2f7ca802
SG
880 .get_eeprom_len = smsc95xx_ethtool_get_eeprom_len,
881 .get_eeprom = smsc95xx_ethtool_get_eeprom,
882 .set_eeprom = smsc95xx_ethtool_set_eeprom,
9fa32e94
EV
883 .get_regs_len = smsc95xx_ethtool_getregslen,
884 .get_regs = smsc95xx_ethtool_getregs,
e0e474a8
SG
885 .get_wol = smsc95xx_ethtool_get_wol,
886 .set_wol = smsc95xx_ethtool_set_wol,
eaf9a32a
PR
887 .get_link_ksettings = smsc95xx_get_link_ksettings,
888 .set_link_ksettings = smsc95xx_set_link_ksettings,
a8f5cb9e 889 .get_ts_info = ethtool_op_get_ts_info,
2f7ca802
SG
890};
891
892static int smsc95xx_ioctl(struct net_device *netdev, struct ifreq *rq, int cmd)
893{
894 struct usbnet *dev = netdev_priv(netdev);
895
896 if (!netif_running(netdev))
897 return -EINVAL;
898
899 return generic_mii_ioctl(&dev->mii, if_mii(rq), cmd, NULL);
900}
901
902static void smsc95xx_init_mac_address(struct usbnet *dev)
903{
c489565b
AB
904 const u8 *mac_addr;
905
906 /* maybe the boot loader passed the MAC address in devicetree */
907 mac_addr = of_get_mac_address(dev->udev->dev.of_node);
adfb3cb2 908 if (!IS_ERR(mac_addr)) {
5503a688 909 ether_addr_copy(dev->net->dev_addr, mac_addr);
c489565b
AB
910 return;
911 }
912
2f7ca802
SG
913 /* try reading mac address from EEPROM */
914 if (smsc95xx_read_eeprom(dev, EEPROM_MAC_OFFSET, ETH_ALEN,
915 dev->net->dev_addr) == 0) {
916 if (is_valid_ether_addr(dev->net->dev_addr)) {
917 /* eeprom values are valid so use them */
a475f603 918 netif_dbg(dev, ifup, dev->net, "MAC address read from EEPROM\n");
2f7ca802
SG
919 return;
920 }
921 }
922
c489565b 923 /* no useful static MAC address found. generate a random one */
f2cedb63 924 eth_hw_addr_random(dev->net);
c7e12ead 925 netif_dbg(dev, ifup, dev->net, "MAC address set to eth_random_addr\n");
2f7ca802
SG
926}
927
928static int smsc95xx_set_mac_address(struct usbnet *dev)
929{
930 u32 addr_lo = dev->net->dev_addr[0] | dev->net->dev_addr[1] << 8 |
931 dev->net->dev_addr[2] << 16 | dev->net->dev_addr[3] << 24;
932 u32 addr_hi = dev->net->dev_addr[4] | dev->net->dev_addr[5] << 8;
933 int ret;
934
935 ret = smsc95xx_write_reg(dev, ADDRL, addr_lo);
b052e073 936 if (ret < 0)
e360a8b4 937 return ret;
2f7ca802 938
e360a8b4 939 return smsc95xx_write_reg(dev, ADDRH, addr_hi);
2f7ca802
SG
940}
941
942/* starts the TX path */
769ea6d8 943static int smsc95xx_start_tx_path(struct usbnet *dev)
2f7ca802
SG
944{
945 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
946 unsigned long flags;
769ea6d8 947 int ret;
2f7ca802
SG
948
949 /* Enable Tx at MAC */
950 spin_lock_irqsave(&pdata->mac_cr_lock, flags);
951 pdata->mac_cr |= MAC_CR_TXEN_;
952 spin_unlock_irqrestore(&pdata->mac_cr_lock, flags);
953
769ea6d8 954 ret = smsc95xx_write_reg(dev, MAC_CR, pdata->mac_cr);
e360a8b4 955 if (ret < 0)
b052e073 956 return ret;
2f7ca802
SG
957
958 /* Enable Tx at SCSRs */
e360a8b4 959 return smsc95xx_write_reg(dev, TX_CFG, TX_CFG_ON_);
2f7ca802
SG
960}
961
962/* Starts the Receive path */
ec32115d 963static int smsc95xx_start_rx_path(struct usbnet *dev, int in_pm)
2f7ca802
SG
964{
965 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
966 unsigned long flags;
967
968 spin_lock_irqsave(&pdata->mac_cr_lock, flags);
969 pdata->mac_cr |= MAC_CR_RXEN_;
970 spin_unlock_irqrestore(&pdata->mac_cr_lock, flags);
971
e360a8b4 972 return __smsc95xx_write_reg(dev, MAC_CR, pdata->mac_cr, in_pm);
2f7ca802
SG
973}
974
975static int smsc95xx_phy_initialize(struct usbnet *dev)
976{
769ea6d8 977 int bmcr, ret, timeout = 0;
db443c44 978
2f7ca802
SG
979 /* Initialize MII structure */
980 dev->mii.dev = dev->net;
981 dev->mii.mdio_read = smsc95xx_mdio_read;
982 dev->mii.mdio_write = smsc95xx_mdio_write;
983 dev->mii.phy_id_mask = 0x1f;
984 dev->mii.reg_num_mask = 0x1f;
985 dev->mii.phy_id = SMSC95XX_INTERNAL_PHY_ID;
986
db443c44 987 /* reset phy and wait for reset to complete */
2f7ca802 988 smsc95xx_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR, BMCR_RESET);
db443c44
SG
989
990 do {
991 msleep(10);
992 bmcr = smsc95xx_mdio_read(dev->net, dev->mii.phy_id, MII_BMCR);
993 timeout++;
d9460920 994 } while ((bmcr & BMCR_RESET) && (timeout < 100));
db443c44
SG
995
996 if (timeout >= 100) {
997 netdev_warn(dev->net, "timeout on PHY Reset");
998 return -EIO;
999 }
1000
2f7ca802
SG
1001 smsc95xx_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE,
1002 ADVERTISE_ALL | ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP |
1003 ADVERTISE_PAUSE_ASYM);
1004
1005 /* read to clear */
769ea6d8 1006 ret = smsc95xx_mdio_read(dev->net, dev->mii.phy_id, PHY_INT_SRC);
b052e073
SG
1007 if (ret < 0) {
1008 netdev_warn(dev->net, "Failed to read PHY_INT_SRC during init\n");
1009 return ret;
1010 }
2f7ca802
SG
1011
1012 smsc95xx_mdio_write(dev->net, dev->mii.phy_id, PHY_INT_MASK,
1013 PHY_INT_MASK_DEFAULT_);
1014 mii_nway_restart(&dev->mii);
1015
a475f603 1016 netif_dbg(dev, ifup, dev->net, "phy initialised successfully\n");
2f7ca802
SG
1017 return 0;
1018}
1019
1020static int smsc95xx_reset(struct usbnet *dev)
1021{
1022 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
1023 u32 read_buf, write_buf, burst_cap;
1024 int ret = 0, timeout;
2f7ca802 1025
a475f603 1026 netif_dbg(dev, ifup, dev->net, "entering smsc95xx_reset\n");
2f7ca802 1027
4436761b 1028 ret = smsc95xx_write_reg(dev, HW_CFG, HW_CFG_LRST_);
e360a8b4 1029 if (ret < 0)
b052e073 1030 return ret;
2f7ca802
SG
1031
1032 timeout = 0;
1033 do {
cf2acec2 1034 msleep(10);
2f7ca802 1035 ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf);
e360a8b4 1036 if (ret < 0)
b052e073 1037 return ret;
2f7ca802
SG
1038 timeout++;
1039 } while ((read_buf & HW_CFG_LRST_) && (timeout < 100));
1040
1041 if (timeout >= 100) {
60b86755 1042 netdev_warn(dev->net, "timeout waiting for completion of Lite Reset\n");
2f7ca802
SG
1043 return ret;
1044 }
1045
4436761b 1046 ret = smsc95xx_write_reg(dev, PM_CTRL, PM_CTL_PHY_RST_);
e360a8b4 1047 if (ret < 0)
b052e073 1048 return ret;
2f7ca802
SG
1049
1050 timeout = 0;
1051 do {
cf2acec2 1052 msleep(10);
2f7ca802 1053 ret = smsc95xx_read_reg(dev, PM_CTRL, &read_buf);
e360a8b4 1054 if (ret < 0)
b052e073 1055 return ret;
2f7ca802
SG
1056 timeout++;
1057 } while ((read_buf & PM_CTL_PHY_RST_) && (timeout < 100));
1058
1059 if (timeout >= 100) {
60b86755 1060 netdev_warn(dev->net, "timeout waiting for PHY Reset\n");
2f7ca802
SG
1061 return ret;
1062 }
1063
2f7ca802
SG
1064 ret = smsc95xx_set_mac_address(dev);
1065 if (ret < 0)
1066 return ret;
1067
1e1d7412
JP
1068 netif_dbg(dev, ifup, dev->net, "MAC Address: %pM\n",
1069 dev->net->dev_addr);
2f7ca802
SG
1070
1071 ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf);
e360a8b4 1072 if (ret < 0)
b052e073 1073 return ret;
2f7ca802 1074
1e1d7412
JP
1075 netif_dbg(dev, ifup, dev->net, "Read Value from HW_CFG : 0x%08x\n",
1076 read_buf);
2f7ca802
SG
1077
1078 read_buf |= HW_CFG_BIR_;
1079
1080 ret = smsc95xx_write_reg(dev, HW_CFG, read_buf);
e360a8b4 1081 if (ret < 0)
b052e073 1082 return ret;
2f7ca802
SG
1083
1084 ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf);
e360a8b4 1085 if (ret < 0)
b052e073 1086 return ret;
b052e073 1087
a475f603
JP
1088 netif_dbg(dev, ifup, dev->net,
1089 "Read Value from HW_CFG after writing HW_CFG_BIR_: 0x%08x\n",
1090 read_buf);
2f7ca802
SG
1091
1092 if (!turbo_mode) {
1093 burst_cap = 0;
1094 dev->rx_urb_size = MAX_SINGLE_PACKET_SIZE;
1095 } else if (dev->udev->speed == USB_SPEED_HIGH) {
1096 burst_cap = DEFAULT_HS_BURST_CAP_SIZE / HS_USB_PKT_SIZE;
1097 dev->rx_urb_size = DEFAULT_HS_BURST_CAP_SIZE;
1098 } else {
1099 burst_cap = DEFAULT_FS_BURST_CAP_SIZE / FS_USB_PKT_SIZE;
1100 dev->rx_urb_size = DEFAULT_FS_BURST_CAP_SIZE;
1101 }
1102
1e1d7412
JP
1103 netif_dbg(dev, ifup, dev->net, "rx_urb_size=%ld\n",
1104 (ulong)dev->rx_urb_size);
2f7ca802
SG
1105
1106 ret = smsc95xx_write_reg(dev, BURST_CAP, burst_cap);
e360a8b4 1107 if (ret < 0)
b052e073 1108 return ret;
2f7ca802
SG
1109
1110 ret = smsc95xx_read_reg(dev, BURST_CAP, &read_buf);
e360a8b4 1111 if (ret < 0)
b052e073 1112 return ret;
769ea6d8 1113
a475f603
JP
1114 netif_dbg(dev, ifup, dev->net,
1115 "Read Value from BURST_CAP after writing: 0x%08x\n",
1116 read_buf);
2f7ca802 1117
4436761b 1118 ret = smsc95xx_write_reg(dev, BULK_IN_DLY, DEFAULT_BULK_IN_DELAY);
e360a8b4 1119 if (ret < 0)
b052e073 1120 return ret;
2f7ca802
SG
1121
1122 ret = smsc95xx_read_reg(dev, BULK_IN_DLY, &read_buf);
e360a8b4 1123 if (ret < 0)
b052e073 1124 return ret;
769ea6d8 1125
a475f603
JP
1126 netif_dbg(dev, ifup, dev->net,
1127 "Read Value from BULK_IN_DLY after writing: 0x%08x\n",
1128 read_buf);
2f7ca802
SG
1129
1130 ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf);
e360a8b4 1131 if (ret < 0)
b052e073 1132 return ret;
769ea6d8 1133
1e1d7412
JP
1134 netif_dbg(dev, ifup, dev->net, "Read Value from HW_CFG: 0x%08x\n",
1135 read_buf);
2f7ca802
SG
1136
1137 if (turbo_mode)
1138 read_buf |= (HW_CFG_MEF_ | HW_CFG_BCE_);
1139
1140 read_buf &= ~HW_CFG_RXDOFF_;
1141
1142 /* set Rx data offset=2, Make IP header aligns on word boundary. */
1143 read_buf |= NET_IP_ALIGN << 9;
1144
1145 ret = smsc95xx_write_reg(dev, HW_CFG, read_buf);
e360a8b4 1146 if (ret < 0)
b052e073 1147 return ret;
2f7ca802
SG
1148
1149 ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf);
e360a8b4 1150 if (ret < 0)
b052e073 1151 return ret;
769ea6d8 1152
a475f603
JP
1153 netif_dbg(dev, ifup, dev->net,
1154 "Read Value from HW_CFG after writing: 0x%08x\n", read_buf);
2f7ca802 1155
4436761b 1156 ret = smsc95xx_write_reg(dev, INT_STS, INT_STS_CLEAR_ALL_);
e360a8b4 1157 if (ret < 0)
b052e073 1158 return ret;
2f7ca802
SG
1159
1160 ret = smsc95xx_read_reg(dev, ID_REV, &read_buf);
e360a8b4 1161 if (ret < 0)
b052e073 1162 return ret;
a475f603 1163 netif_dbg(dev, ifup, dev->net, "ID_REV = 0x%08x\n", read_buf);
2f7ca802 1164
f293501c
SG
1165 /* Configure GPIO pins as LED outputs */
1166 write_buf = LED_GPIO_CFG_SPD_LED | LED_GPIO_CFG_LNK_LED |
1167 LED_GPIO_CFG_FDX_LED;
1168 ret = smsc95xx_write_reg(dev, LED_GPIO_CFG, write_buf);
e360a8b4 1169 if (ret < 0)
b052e073 1170 return ret;
f293501c 1171
2f7ca802 1172 /* Init Tx */
4436761b 1173 ret = smsc95xx_write_reg(dev, FLOW, 0);
e360a8b4 1174 if (ret < 0)
b052e073 1175 return ret;
2f7ca802 1176
4436761b 1177 ret = smsc95xx_write_reg(dev, AFC_CFG, AFC_CFG_DEFAULT);
e360a8b4 1178 if (ret < 0)
b052e073 1179 return ret;
2f7ca802
SG
1180
1181 /* Don't need mac_cr_lock during initialisation */
1182 ret = smsc95xx_read_reg(dev, MAC_CR, &pdata->mac_cr);
e360a8b4 1183 if (ret < 0)
b052e073 1184 return ret;
2f7ca802
SG
1185
1186 /* Init Rx */
1187 /* Set Vlan */
4436761b 1188 ret = smsc95xx_write_reg(dev, VLAN1, (u32)ETH_P_8021Q);
e360a8b4 1189 if (ret < 0)
b052e073 1190 return ret;
2f7ca802 1191
f7b29271 1192 /* Enable or disable checksum offload engines */
769ea6d8 1193 ret = smsc95xx_set_features(dev->net, dev->net->features);
b052e073
SG
1194 if (ret < 0) {
1195 netdev_warn(dev->net, "Failed to set checksum offload features\n");
1196 return ret;
1197 }
2f7ca802
SG
1198
1199 smsc95xx_set_multicast(dev->net);
1200
769ea6d8 1201 ret = smsc95xx_phy_initialize(dev);
b052e073
SG
1202 if (ret < 0) {
1203 netdev_warn(dev->net, "Failed to init PHY\n");
1204 return ret;
1205 }
2f7ca802
SG
1206
1207 ret = smsc95xx_read_reg(dev, INT_EP_CTL, &read_buf);
e360a8b4 1208 if (ret < 0)
b052e073 1209 return ret;
2f7ca802
SG
1210
1211 /* enable PHY interrupts */
1212 read_buf |= INT_EP_CTL_PHY_INT_;
1213
1214 ret = smsc95xx_write_reg(dev, INT_EP_CTL, read_buf);
e360a8b4 1215 if (ret < 0)
b052e073 1216 return ret;
2f7ca802 1217
769ea6d8 1218 ret = smsc95xx_start_tx_path(dev);
b052e073
SG
1219 if (ret < 0) {
1220 netdev_warn(dev->net, "Failed to start TX path\n");
1221 return ret;
1222 }
769ea6d8 1223
ec32115d 1224 ret = smsc95xx_start_rx_path(dev, 0);
b052e073
SG
1225 if (ret < 0) {
1226 netdev_warn(dev->net, "Failed to start RX path\n");
1227 return ret;
1228 }
2f7ca802 1229
a475f603 1230 netif_dbg(dev, ifup, dev->net, "smsc95xx_reset, return 0\n");
2f7ca802
SG
1231 return 0;
1232}
1233
63e77b39
SH
1234static const struct net_device_ops smsc95xx_netdev_ops = {
1235 .ndo_open = usbnet_open,
1236 .ndo_stop = usbnet_stop,
1237 .ndo_start_xmit = usbnet_start_xmit,
1238 .ndo_tx_timeout = usbnet_tx_timeout,
1239 .ndo_change_mtu = usbnet_change_mtu,
c8b5d129 1240 .ndo_get_stats64 = usbnet_get_stats64,
63e77b39
SH
1241 .ndo_set_mac_address = eth_mac_addr,
1242 .ndo_validate_addr = eth_validate_addr,
1243 .ndo_do_ioctl = smsc95xx_ioctl,
afc4b13d 1244 .ndo_set_rx_mode = smsc95xx_set_multicast,
78e47fe4 1245 .ndo_set_features = smsc95xx_set_features,
63e77b39
SH
1246};
1247
2f7ca802
SG
1248static int smsc95xx_bind(struct usbnet *dev, struct usb_interface *intf)
1249{
1250 struct smsc95xx_priv *pdata = NULL;
bbd9f9ee 1251 u32 val;
2f7ca802
SG
1252 int ret;
1253
1254 printk(KERN_INFO SMSC_CHIPNAME " v" SMSC_DRIVER_VERSION "\n");
1255
1256 ret = usbnet_get_endpoints(dev, intf);
b052e073
SG
1257 if (ret < 0) {
1258 netdev_warn(dev->net, "usbnet_get_endpoints failed: %d\n", ret);
1259 return ret;
1260 }
2f7ca802
SG
1261
1262 dev->data[0] = (unsigned long)kzalloc(sizeof(struct smsc95xx_priv),
38673c82 1263 GFP_KERNEL);
2f7ca802
SG
1264
1265 pdata = (struct smsc95xx_priv *)(dev->data[0]);
38673c82 1266 if (!pdata)
2f7ca802 1267 return -ENOMEM;
2f7ca802
SG
1268
1269 spin_lock_init(&pdata->mac_cr_lock);
1270
fe0cd8ca
NS
1271 /* LAN95xx devices do not alter the computed checksum of 0 to 0xffff.
1272 * RFC 2460, ipv6 UDP calculated checksum yields a result of zero must
1273 * be changed to 0xffff. RFC 768, ipv4 UDP computed checksum is zero,
1274 * it is transmitted as all ones. The zero transmitted checksum means
1275 * transmitter generated no checksum. Hence, enable csum offload only
1276 * for ipv4 packets.
1277 */
78e47fe4 1278 if (DEFAULT_TX_CSUM_ENABLE)
fe0cd8ca 1279 dev->net->features |= NETIF_F_IP_CSUM;
78e47fe4
MM
1280 if (DEFAULT_RX_CSUM_ENABLE)
1281 dev->net->features |= NETIF_F_RXCSUM;
1282
fe0cd8ca 1283 dev->net->hw_features = NETIF_F_IP_CSUM | NETIF_F_RXCSUM;
810eeb1f 1284 set_bit(EVENT_NO_IP_ALIGN, &dev->flags);
2f7ca802 1285
f4e8ab7c
BB
1286 smsc95xx_init_mac_address(dev);
1287
2f7ca802
SG
1288 /* Init all registers */
1289 ret = smsc95xx_reset(dev);
1290
bbd9f9ee
SG
1291 /* detect device revision as different features may be available */
1292 ret = smsc95xx_read_reg(dev, ID_REV, &val);
e360a8b4 1293 if (ret < 0)
b052e073 1294 return ret;
bbd9f9ee 1295 val >>= 16;
13722bbe
WH
1296 pdata->chip_id = val;
1297 pdata->mdix_ctrl = get_mdix_status(dev->net);
9ebca507
SG
1298
1299 if ((val == ID_REV_CHIP_ID_9500A_) || (val == ID_REV_CHIP_ID_9530_) ||
1300 (val == ID_REV_CHIP_ID_89530_) || (val == ID_REV_CHIP_ID_9730_))
1301 pdata->features = (FEATURE_8_WAKEUP_FILTERS |
1302 FEATURE_PHY_NLP_CROSSOVER |
eb970ff0 1303 FEATURE_REMOTE_WAKEUP);
9ebca507
SG
1304 else if (val == ID_REV_CHIP_ID_9512_)
1305 pdata->features = FEATURE_8_WAKEUP_FILTERS;
bbd9f9ee 1306
63e77b39 1307 dev->net->netdev_ops = &smsc95xx_netdev_ops;
2f7ca802 1308 dev->net->ethtool_ops = &smsc95xx_ethtool_ops;
2f7ca802 1309 dev->net->flags |= IFF_MULTICAST;
78e47fe4 1310 dev->net->hard_header_len += SMSC95XX_TX_OVERHEAD_CSUM;
85b18b02
SW
1311 dev->net->min_mtu = ETH_MIN_MTU;
1312 dev->net->max_mtu = ETH_DATA_LEN;
9bbf5660 1313 dev->hard_mtu = dev->net->mtu + dev->net->hard_header_len;
d69d1694
CF
1314
1315 pdata->dev = dev;
1316 INIT_DELAYED_WORK(&pdata->carrier_check, check_carrier);
1317 schedule_delayed_work(&pdata->carrier_check, CARRIER_CHECK_DELAY);
1318
2f7ca802
SG
1319 return 0;
1320}
1321
1322static void smsc95xx_unbind(struct usbnet *dev, struct usb_interface *intf)
1323{
1324 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
d69d1694 1325
2f7ca802 1326 if (pdata) {
d69d1694 1327 cancel_delayed_work(&pdata->carrier_check);
a475f603 1328 netif_dbg(dev, ifdown, dev->net, "free pdata\n");
2f7ca802
SG
1329 kfree(pdata);
1330 pdata = NULL;
1331 dev->data[0] = 0;
1332 }
1333}
1334
068bb1a7 1335static u32 smsc_crc(const u8 *buffer, size_t len, int filter)
bbd9f9ee 1336{
068bb1a7
SG
1337 u32 crc = bitrev16(crc16(0xFFFF, buffer, len));
1338 return crc << ((filter % 2) * 16);
bbd9f9ee
SG
1339}
1340
e5e3af83
SG
1341static int smsc95xx_enable_phy_wakeup_interrupts(struct usbnet *dev, u16 mask)
1342{
1343 struct mii_if_info *mii = &dev->mii;
1344 int ret;
1345
1e1d7412 1346 netdev_dbg(dev->net, "enabling PHY wakeup interrupts\n");
e5e3af83
SG
1347
1348 /* read to clear */
1349 ret = smsc95xx_mdio_read_nopm(dev->net, mii->phy_id, PHY_INT_SRC);
e360a8b4 1350 if (ret < 0)
b052e073 1351 return ret;
e5e3af83
SG
1352
1353 /* enable interrupt source */
1354 ret = smsc95xx_mdio_read_nopm(dev->net, mii->phy_id, PHY_INT_MASK);
e360a8b4 1355 if (ret < 0)
b052e073 1356 return ret;
e5e3af83
SG
1357
1358 ret |= mask;
1359
1360 smsc95xx_mdio_write_nopm(dev->net, mii->phy_id, PHY_INT_MASK, ret);
1361
1362 return 0;
1363}
1364
1365static int smsc95xx_link_ok_nopm(struct usbnet *dev)
1366{
1367 struct mii_if_info *mii = &dev->mii;
1368 int ret;
1369
1370 /* first, a dummy read, needed to latch some MII phys */
1371 ret = smsc95xx_mdio_read_nopm(dev->net, mii->phy_id, MII_BMSR);
e360a8b4 1372 if (ret < 0)
b052e073 1373 return ret;
e5e3af83
SG
1374
1375 ret = smsc95xx_mdio_read_nopm(dev->net, mii->phy_id, MII_BMSR);
e360a8b4 1376 if (ret < 0)
b052e073 1377 return ret;
e5e3af83
SG
1378
1379 return !!(ret & BMSR_LSTATUS);
1380}
1381
319b95b5
SG
1382static int smsc95xx_enter_suspend0(struct usbnet *dev)
1383{
1384 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
1385 u32 val;
1386 int ret;
1387
1388 ret = smsc95xx_read_reg_nopm(dev, PM_CTRL, &val);
e360a8b4 1389 if (ret < 0)
b052e073 1390 return ret;
319b95b5
SG
1391
1392 val &= (~(PM_CTL_SUS_MODE_ | PM_CTL_WUPS_ | PM_CTL_PHY_RST_));
1393 val |= PM_CTL_SUS_MODE_0;
1394
1395 ret = smsc95xx_write_reg_nopm(dev, PM_CTRL, val);
e360a8b4 1396 if (ret < 0)
b052e073 1397 return ret;
319b95b5
SG
1398
1399 /* clear wol status */
1400 val &= ~PM_CTL_WUPS_;
1401 val |= PM_CTL_WUPS_WOL_;
1402
1403 /* enable energy detection */
1404 if (pdata->wolopts & WAKE_PHY)
1405 val |= PM_CTL_WUPS_ED_;
1406
1407 ret = smsc95xx_write_reg_nopm(dev, PM_CTRL, val);
e360a8b4 1408 if (ret < 0)
b052e073 1409 return ret;
319b95b5
SG
1410
1411 /* read back PM_CTRL */
1412 ret = smsc95xx_read_reg_nopm(dev, PM_CTRL, &val);
76437214
ML
1413 if (ret < 0)
1414 return ret;
319b95b5 1415
b2d4b150
SG
1416 pdata->suspend_flags |= SUSPEND_SUSPEND0;
1417
76437214 1418 return 0;
319b95b5
SG
1419}
1420
1421static int smsc95xx_enter_suspend1(struct usbnet *dev)
1422{
1423 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
1424 struct mii_if_info *mii = &dev->mii;
1425 u32 val;
1426 int ret;
1427
1428 /* reconfigure link pulse detection timing for
1429 * compatibility with non-standard link partners
1430 */
1431 if (pdata->features & FEATURE_PHY_NLP_CROSSOVER)
1432 smsc95xx_mdio_write_nopm(dev->net, mii->phy_id, PHY_EDPD_CONFIG,
1433 PHY_EDPD_CONFIG_DEFAULT);
1434
1435 /* enable energy detect power-down mode */
1436 ret = smsc95xx_mdio_read_nopm(dev->net, mii->phy_id, PHY_MODE_CTRL_STS);
e360a8b4 1437 if (ret < 0)
b052e073 1438 return ret;
319b95b5
SG
1439
1440 ret |= MODE_CTRL_STS_EDPWRDOWN_;
1441
1442 smsc95xx_mdio_write_nopm(dev->net, mii->phy_id, PHY_MODE_CTRL_STS, ret);
1443
1444 /* enter SUSPEND1 mode */
1445 ret = smsc95xx_read_reg_nopm(dev, PM_CTRL, &val);
e360a8b4 1446 if (ret < 0)
b052e073 1447 return ret;
319b95b5
SG
1448
1449 val &= ~(PM_CTL_SUS_MODE_ | PM_CTL_WUPS_ | PM_CTL_PHY_RST_);
1450 val |= PM_CTL_SUS_MODE_1;
1451
1452 ret = smsc95xx_write_reg_nopm(dev, PM_CTRL, val);
e360a8b4 1453 if (ret < 0)
b052e073 1454 return ret;
319b95b5
SG
1455
1456 /* clear wol status, enable energy detection */
1457 val &= ~PM_CTL_WUPS_;
1458 val |= (PM_CTL_WUPS_ED_ | PM_CTL_ED_EN_);
1459
1460 ret = smsc95xx_write_reg_nopm(dev, PM_CTRL, val);
76437214
ML
1461 if (ret < 0)
1462 return ret;
319b95b5 1463
b2d4b150
SG
1464 pdata->suspend_flags |= SUSPEND_SUSPEND1;
1465
76437214 1466 return 0;
319b95b5
SG
1467}
1468
1469static int smsc95xx_enter_suspend2(struct usbnet *dev)
1470{
b2d4b150 1471 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
319b95b5
SG
1472 u32 val;
1473 int ret;
1474
1475 ret = smsc95xx_read_reg_nopm(dev, PM_CTRL, &val);
e360a8b4 1476 if (ret < 0)
b052e073 1477 return ret;
319b95b5
SG
1478
1479 val &= ~(PM_CTL_SUS_MODE_ | PM_CTL_WUPS_ | PM_CTL_PHY_RST_);
1480 val |= PM_CTL_SUS_MODE_2;
1481
1482 ret = smsc95xx_write_reg_nopm(dev, PM_CTRL, val);
76437214
ML
1483 if (ret < 0)
1484 return ret;
319b95b5 1485
b2d4b150
SG
1486 pdata->suspend_flags |= SUSPEND_SUSPEND2;
1487
76437214 1488 return 0;
319b95b5
SG
1489}
1490
b2d4b150
SG
1491static int smsc95xx_enter_suspend3(struct usbnet *dev)
1492{
1493 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
1494 u32 val;
1495 int ret;
1496
1497 ret = smsc95xx_read_reg_nopm(dev, RX_FIFO_INF, &val);
1498 if (ret < 0)
1499 return ret;
1500
53a759c8 1501 if (val & RX_FIFO_INF_USED_) {
b2d4b150
SG
1502 netdev_info(dev->net, "rx fifo not empty in autosuspend\n");
1503 return -EBUSY;
1504 }
1505
1506 ret = smsc95xx_read_reg_nopm(dev, PM_CTRL, &val);
1507 if (ret < 0)
1508 return ret;
1509
1510 val &= ~(PM_CTL_SUS_MODE_ | PM_CTL_WUPS_ | PM_CTL_PHY_RST_);
1511 val |= PM_CTL_SUS_MODE_3 | PM_CTL_RES_CLR_WKP_STS;
1512
1513 ret = smsc95xx_write_reg_nopm(dev, PM_CTRL, val);
1514 if (ret < 0)
1515 return ret;
1516
1517 /* clear wol status */
1518 val &= ~PM_CTL_WUPS_;
1519 val |= PM_CTL_WUPS_WOL_;
1520
1521 ret = smsc95xx_write_reg_nopm(dev, PM_CTRL, val);
1522 if (ret < 0)
1523 return ret;
1524
1525 pdata->suspend_flags |= SUSPEND_SUSPEND3;
1526
1527 return 0;
1528}
1529
1530static int smsc95xx_autosuspend(struct usbnet *dev, u32 link_up)
1531{
1532 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
1533 int ret;
1534
1535 if (!netif_running(dev->net)) {
1536 /* interface is ifconfig down so fully power down hw */
1537 netdev_dbg(dev->net, "autosuspend entering SUSPEND2\n");
1538 return smsc95xx_enter_suspend2(dev);
1539 }
1540
1541 if (!link_up) {
1542 /* link is down so enter EDPD mode, but only if device can
1543 * reliably resume from it. This check should be redundant
eb970ff0 1544 * as current FEATURE_REMOTE_WAKEUP parts also support
b2d4b150
SG
1545 * FEATURE_PHY_NLP_CROSSOVER but it's included for clarity */
1546 if (!(pdata->features & FEATURE_PHY_NLP_CROSSOVER)) {
1547 netdev_warn(dev->net, "EDPD not supported\n");
1548 return -EBUSY;
1549 }
1550
1551 netdev_dbg(dev->net, "autosuspend entering SUSPEND1\n");
1552
1553 /* enable PHY wakeup events for if cable is attached */
1554 ret = smsc95xx_enable_phy_wakeup_interrupts(dev,
1555 PHY_INT_MASK_ANEG_COMP_);
1556 if (ret < 0) {
1557 netdev_warn(dev->net, "error enabling PHY wakeup ints\n");
1558 return ret;
1559 }
1560
1561 netdev_info(dev->net, "entering SUSPEND1 mode\n");
1562 return smsc95xx_enter_suspend1(dev);
1563 }
1564
1565 /* enable PHY wakeup events so we remote wakeup if cable is pulled */
1566 ret = smsc95xx_enable_phy_wakeup_interrupts(dev,
1567 PHY_INT_MASK_LINK_DOWN_);
1568 if (ret < 0) {
1569 netdev_warn(dev->net, "error enabling PHY wakeup ints\n");
1570 return ret;
1571 }
1572
1573 netdev_dbg(dev->net, "autosuspend entering SUSPEND3\n");
1574 return smsc95xx_enter_suspend3(dev);
1575}
1576
b5a04475
SG
1577static int smsc95xx_suspend(struct usb_interface *intf, pm_message_t message)
1578{
1579 struct usbnet *dev = usb_get_intfdata(intf);
e0e474a8 1580 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
e5e3af83 1581 u32 val, link_up;
b5a04475 1582 int ret;
b5a04475 1583
b5a04475 1584 ret = usbnet_suspend(intf, message);
b052e073
SG
1585 if (ret < 0) {
1586 netdev_warn(dev->net, "usbnet_suspend error\n");
1587 return ret;
1588 }
b5a04475 1589
7b900ead
FS
1590 cancel_delayed_work_sync(&pdata->carrier_check);
1591
b2d4b150
SG
1592 if (pdata->suspend_flags) {
1593 netdev_warn(dev->net, "error during last resume\n");
1594 pdata->suspend_flags = 0;
1595 }
1596
e5e3af83
SG
1597 /* determine if link is up using only _nopm functions */
1598 link_up = smsc95xx_link_ok_nopm(dev);
1599
42e21c01 1600 if (message.event == PM_EVENT_AUTO_SUSPEND &&
eb970ff0 1601 (pdata->features & FEATURE_REMOTE_WAKEUP)) {
b2d4b150
SG
1602 ret = smsc95xx_autosuspend(dev, link_up);
1603 goto done;
1604 }
1605
1606 /* if we get this far we're not autosuspending */
e5e3af83
SG
1607 /* if no wol options set, or if link is down and we're not waking on
1608 * PHY activity, enter lowest power SUSPEND2 mode
1609 */
1610 if (!(pdata->wolopts & SUPPORTED_WAKE) ||
1611 !(link_up || (pdata->wolopts & WAKE_PHY))) {
1e1d7412 1612 netdev_info(dev->net, "entering SUSPEND2 mode\n");
e0e474a8
SG
1613
1614 /* disable energy detect (link up) & wake up events */
ec32115d 1615 ret = smsc95xx_read_reg_nopm(dev, WUCSR, &val);
e360a8b4 1616 if (ret < 0)
b052e073 1617 goto done;
e0e474a8
SG
1618
1619 val &= ~(WUCSR_MPEN_ | WUCSR_WAKE_EN_);
1620
ec32115d 1621 ret = smsc95xx_write_reg_nopm(dev, WUCSR, val);
e360a8b4 1622 if (ret < 0)
b052e073 1623 goto done;
e0e474a8 1624
ec32115d 1625 ret = smsc95xx_read_reg_nopm(dev, PM_CTRL, &val);
e360a8b4 1626 if (ret < 0)
b052e073 1627 goto done;
e0e474a8
SG
1628
1629 val &= ~(PM_CTL_ED_EN_ | PM_CTL_WOL_EN_);
1630
ec32115d 1631 ret = smsc95xx_write_reg_nopm(dev, PM_CTRL, val);
e360a8b4 1632 if (ret < 0)
b052e073 1633 goto done;
e0e474a8 1634
3b9f7d8c
SG
1635 ret = smsc95xx_enter_suspend2(dev);
1636 goto done;
e0e474a8
SG
1637 }
1638
e5e3af83
SG
1639 if (pdata->wolopts & WAKE_PHY) {
1640 ret = smsc95xx_enable_phy_wakeup_interrupts(dev,
1641 (PHY_INT_MASK_ANEG_COMP_ | PHY_INT_MASK_LINK_DOWN_));
b052e073
SG
1642 if (ret < 0) {
1643 netdev_warn(dev->net, "error enabling PHY wakeup ints\n");
1644 goto done;
1645 }
e5e3af83
SG
1646
1647 /* if link is down then configure EDPD and enter SUSPEND1,
1648 * otherwise enter SUSPEND0 below
1649 */
1650 if (!link_up) {
1e1d7412 1651 netdev_info(dev->net, "entering SUSPEND1 mode\n");
3b9f7d8c
SG
1652 ret = smsc95xx_enter_suspend1(dev);
1653 goto done;
e5e3af83
SG
1654 }
1655 }
1656
bbd9f9ee 1657 if (pdata->wolopts & (WAKE_BCAST | WAKE_MCAST | WAKE_ARP | WAKE_UCAST)) {
6396bb22 1658 u32 *filter_mask = kcalloc(32, sizeof(u32), GFP_KERNEL);
06a221be
ML
1659 u32 command[2];
1660 u32 offset[2];
1661 u32 crc[4];
9ebca507
SG
1662 int wuff_filter_count =
1663 (pdata->features & FEATURE_8_WAKEUP_FILTERS) ?
1664 LAN9500A_WUFF_NUM : LAN9500_WUFF_NUM;
bbd9f9ee
SG
1665 int i, filter = 0;
1666
eed9a729
SG
1667 if (!filter_mask) {
1668 netdev_warn(dev->net, "Unable to allocate filter_mask\n");
3b9f7d8c
SG
1669 ret = -ENOMEM;
1670 goto done;
eed9a729
SG
1671 }
1672
06a221be
ML
1673 memset(command, 0, sizeof(command));
1674 memset(offset, 0, sizeof(offset));
1675 memset(crc, 0, sizeof(crc));
1676
bbd9f9ee
SG
1677 if (pdata->wolopts & WAKE_BCAST) {
1678 const u8 bcast[] = {0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF};
1e1d7412 1679 netdev_info(dev->net, "enabling broadcast detection\n");
bbd9f9ee
SG
1680 filter_mask[filter * 4] = 0x003F;
1681 filter_mask[filter * 4 + 1] = 0x00;
1682 filter_mask[filter * 4 + 2] = 0x00;
1683 filter_mask[filter * 4 + 3] = 0x00;
1684 command[filter/4] |= 0x05UL << ((filter % 4) * 8);
1685 offset[filter/4] |= 0x00 << ((filter % 4) * 8);
1686 crc[filter/2] |= smsc_crc(bcast, 6, filter);
1687 filter++;
1688 }
1689
1690 if (pdata->wolopts & WAKE_MCAST) {
1691 const u8 mcast[] = {0x01, 0x00, 0x5E};
1e1d7412 1692 netdev_info(dev->net, "enabling multicast detection\n");
bbd9f9ee
SG
1693 filter_mask[filter * 4] = 0x0007;
1694 filter_mask[filter * 4 + 1] = 0x00;
1695 filter_mask[filter * 4 + 2] = 0x00;
1696 filter_mask[filter * 4 + 3] = 0x00;
1697 command[filter/4] |= 0x09UL << ((filter % 4) * 8);
1698 offset[filter/4] |= 0x00 << ((filter % 4) * 8);
1699 crc[filter/2] |= smsc_crc(mcast, 3, filter);
1700 filter++;
1701 }
1702
1703 if (pdata->wolopts & WAKE_ARP) {
1704 const u8 arp[] = {0x08, 0x06};
1e1d7412 1705 netdev_info(dev->net, "enabling ARP detection\n");
bbd9f9ee
SG
1706 filter_mask[filter * 4] = 0x0003;
1707 filter_mask[filter * 4 + 1] = 0x00;
1708 filter_mask[filter * 4 + 2] = 0x00;
1709 filter_mask[filter * 4 + 3] = 0x00;
1710 command[filter/4] |= 0x05UL << ((filter % 4) * 8);
1711 offset[filter/4] |= 0x0C << ((filter % 4) * 8);
1712 crc[filter/2] |= smsc_crc(arp, 2, filter);
1713 filter++;
1714 }
1715
1716 if (pdata->wolopts & WAKE_UCAST) {
1e1d7412 1717 netdev_info(dev->net, "enabling unicast detection\n");
bbd9f9ee
SG
1718 filter_mask[filter * 4] = 0x003F;
1719 filter_mask[filter * 4 + 1] = 0x00;
1720 filter_mask[filter * 4 + 2] = 0x00;
1721 filter_mask[filter * 4 + 3] = 0x00;
1722 command[filter/4] |= 0x01UL << ((filter % 4) * 8);
1723 offset[filter/4] |= 0x00 << ((filter % 4) * 8);
1724 crc[filter/2] |= smsc_crc(dev->net->dev_addr, ETH_ALEN, filter);
1725 filter++;
1726 }
1727
9ebca507 1728 for (i = 0; i < (wuff_filter_count * 4); i++) {
ec32115d 1729 ret = smsc95xx_write_reg_nopm(dev, WUFF, filter_mask[i]);
b052e073 1730 if (ret < 0) {
06a221be 1731 kfree(filter_mask);
b052e073
SG
1732 goto done;
1733 }
bbd9f9ee 1734 }
06a221be 1735 kfree(filter_mask);
bbd9f9ee 1736
9ebca507 1737 for (i = 0; i < (wuff_filter_count / 4); i++) {
ec32115d 1738 ret = smsc95xx_write_reg_nopm(dev, WUFF, command[i]);
e360a8b4 1739 if (ret < 0)
b052e073 1740 goto done;
bbd9f9ee
SG
1741 }
1742
9ebca507 1743 for (i = 0; i < (wuff_filter_count / 4); i++) {
ec32115d 1744 ret = smsc95xx_write_reg_nopm(dev, WUFF, offset[i]);
e360a8b4 1745 if (ret < 0)
b052e073 1746 goto done;
bbd9f9ee
SG
1747 }
1748
9ebca507 1749 for (i = 0; i < (wuff_filter_count / 2); i++) {
ec32115d 1750 ret = smsc95xx_write_reg_nopm(dev, WUFF, crc[i]);
e360a8b4 1751 if (ret < 0)
b052e073 1752 goto done;
bbd9f9ee
SG
1753 }
1754
1755 /* clear any pending pattern match packet status */
ec32115d 1756 ret = smsc95xx_read_reg_nopm(dev, WUCSR, &val);
e360a8b4 1757 if (ret < 0)
b052e073 1758 goto done;
bbd9f9ee
SG
1759
1760 val |= WUCSR_WUFR_;
1761
ec32115d 1762 ret = smsc95xx_write_reg_nopm(dev, WUCSR, val);
e360a8b4 1763 if (ret < 0)
b052e073 1764 goto done;
bbd9f9ee
SG
1765 }
1766
e0e474a8
SG
1767 if (pdata->wolopts & WAKE_MAGIC) {
1768 /* clear any pending magic packet status */
ec32115d 1769 ret = smsc95xx_read_reg_nopm(dev, WUCSR, &val);
e360a8b4 1770 if (ret < 0)
b052e073 1771 goto done;
e0e474a8
SG
1772
1773 val |= WUCSR_MPR_;
1774
ec32115d 1775 ret = smsc95xx_write_reg_nopm(dev, WUCSR, val);
e360a8b4 1776 if (ret < 0)
b052e073 1777 goto done;
e0e474a8
SG
1778 }
1779
bbd9f9ee 1780 /* enable/disable wakeup sources */
ec32115d 1781 ret = smsc95xx_read_reg_nopm(dev, WUCSR, &val);
e360a8b4 1782 if (ret < 0)
b052e073 1783 goto done;
e0e474a8 1784
bbd9f9ee 1785 if (pdata->wolopts & (WAKE_BCAST | WAKE_MCAST | WAKE_ARP | WAKE_UCAST)) {
1e1d7412 1786 netdev_info(dev->net, "enabling pattern match wakeup\n");
bbd9f9ee
SG
1787 val |= WUCSR_WAKE_EN_;
1788 } else {
1e1d7412 1789 netdev_info(dev->net, "disabling pattern match wakeup\n");
bbd9f9ee
SG
1790 val &= ~WUCSR_WAKE_EN_;
1791 }
1792
e0e474a8 1793 if (pdata->wolopts & WAKE_MAGIC) {
1e1d7412 1794 netdev_info(dev->net, "enabling magic packet wakeup\n");
e0e474a8
SG
1795 val |= WUCSR_MPEN_;
1796 } else {
1e1d7412 1797 netdev_info(dev->net, "disabling magic packet wakeup\n");
e0e474a8
SG
1798 val &= ~WUCSR_MPEN_;
1799 }
1800
ec32115d 1801 ret = smsc95xx_write_reg_nopm(dev, WUCSR, val);
e360a8b4 1802 if (ret < 0)
b052e073 1803 goto done;
e0e474a8
SG
1804
1805 /* enable wol wakeup source */
ec32115d 1806 ret = smsc95xx_read_reg_nopm(dev, PM_CTRL, &val);
e360a8b4 1807 if (ret < 0)
b052e073 1808 goto done;
e0e474a8
SG
1809
1810 val |= PM_CTL_WOL_EN_;
1811
e5e3af83
SG
1812 /* phy energy detect wakeup source */
1813 if (pdata->wolopts & WAKE_PHY)
1814 val |= PM_CTL_ED_EN_;
1815
ec32115d 1816 ret = smsc95xx_write_reg_nopm(dev, PM_CTRL, val);
e360a8b4 1817 if (ret < 0)
b052e073 1818 goto done;
e0e474a8 1819
bbd9f9ee 1820 /* enable receiver to enable frame reception */
ec32115d 1821 smsc95xx_start_rx_path(dev, 1);
e0e474a8
SG
1822
1823 /* some wol options are enabled, so enter SUSPEND0 */
1e1d7412 1824 netdev_info(dev->net, "entering SUSPEND0 mode\n");
3b9f7d8c
SG
1825 ret = smsc95xx_enter_suspend0(dev);
1826
1827done:
0d41be53
ML
1828 /*
1829 * TODO: resume() might need to handle the suspend failure
1830 * in system sleep
1831 */
1832 if (ret && PMSG_IS_AUTO(message))
3b9f7d8c 1833 usbnet_resume(intf);
7b900ead
FS
1834
1835 if (ret)
1836 schedule_delayed_work(&pdata->carrier_check,
1837 CARRIER_CHECK_DELAY);
1838
3b9f7d8c 1839 return ret;
e0e474a8
SG
1840}
1841
1842static int smsc95xx_resume(struct usb_interface *intf)
1843{
1844 struct usbnet *dev = usb_get_intfdata(intf);
8bca81d9
SM
1845 struct smsc95xx_priv *pdata;
1846 u8 suspend_flags;
e0e474a8
SG
1847 int ret;
1848 u32 val;
1849
1850 BUG_ON(!dev);
8bca81d9
SM
1851 pdata = (struct smsc95xx_priv *)(dev->data[0]);
1852 suspend_flags = pdata->suspend_flags;
e0e474a8 1853
b2d4b150
SG
1854 netdev_dbg(dev->net, "resume suspend_flags=0x%02x\n", suspend_flags);
1855
1856 /* do this first to ensure it's cleared even in error case */
1857 pdata->suspend_flags = 0;
d69d1694 1858 schedule_delayed_work(&pdata->carrier_check, CARRIER_CHECK_DELAY);
b2d4b150
SG
1859
1860 if (suspend_flags & SUSPEND_ALLMODES) {
bbd9f9ee 1861 /* clear wake-up sources */
ec32115d 1862 ret = smsc95xx_read_reg_nopm(dev, WUCSR, &val);
e360a8b4 1863 if (ret < 0)
b052e073 1864 return ret;
e0e474a8 1865
bbd9f9ee 1866 val &= ~(WUCSR_WAKE_EN_ | WUCSR_MPEN_);
e0e474a8 1867
ec32115d 1868 ret = smsc95xx_write_reg_nopm(dev, WUCSR, val);
e360a8b4 1869 if (ret < 0)
b052e073 1870 return ret;
e0e474a8
SG
1871
1872 /* clear wake-up status */
ec32115d 1873 ret = smsc95xx_read_reg_nopm(dev, PM_CTRL, &val);
e360a8b4 1874 if (ret < 0)
b052e073 1875 return ret;
e0e474a8
SG
1876
1877 val &= ~PM_CTL_WOL_EN_;
1878 val |= PM_CTL_WUPS_;
1879
ec32115d 1880 ret = smsc95xx_write_reg_nopm(dev, PM_CTRL, val);
e360a8b4 1881 if (ret < 0)
b052e073 1882 return ret;
e0e474a8
SG
1883 }
1884
af3d7c1e 1885 ret = usbnet_resume(intf);
b052e073
SG
1886 if (ret < 0)
1887 netdev_warn(dev->net, "usbnet_resume error\n");
e0e474a8 1888
b052e073 1889 return ret;
b5a04475
SG
1890}
1891
b4df480f
JS
1892static int smsc95xx_reset_resume(struct usb_interface *intf)
1893{
1894 struct usbnet *dev = usb_get_intfdata(intf);
1895 int ret;
1896
1897 ret = smsc95xx_reset(dev);
1898 if (ret < 0)
1899 return ret;
1900
1901 return smsc95xx_resume(intf);
1902}
1903
2f7ca802
SG
1904static void smsc95xx_rx_csum_offload(struct sk_buff *skb)
1905{
1906 skb->csum = *(u16 *)(skb_tail_pointer(skb) - 2);
1907 skb->ip_summed = CHECKSUM_COMPLETE;
1908 skb_trim(skb, skb->len - 2);
1909}
1910
1911static int smsc95xx_rx_fixup(struct usbnet *dev, struct sk_buff *skb)
1912{
eb85569f
EG
1913 /* This check is no longer done by usbnet */
1914 if (skb->len < dev->net->hard_header_len)
1915 return 0;
1916
2f7ca802
SG
1917 while (skb->len > 0) {
1918 u32 header, align_count;
1919 struct sk_buff *ax_skb;
1920 unsigned char *packet;
1921 u16 size;
1922
6809d216 1923 header = get_unaligned_le32(skb->data);
2f7ca802
SG
1924 skb_pull(skb, 4 + NET_IP_ALIGN);
1925 packet = skb->data;
1926
1927 /* get the packet length */
1928 size = (u16)((header & RX_STS_FL_) >> 16);
1929 align_count = (4 - ((size + NET_IP_ALIGN) % 4)) % 4;
1930
1931 if (unlikely(header & RX_STS_ES_)) {
a475f603
JP
1932 netif_dbg(dev, rx_err, dev->net,
1933 "Error header=0x%08x\n", header);
80667ac1
HX
1934 dev->net->stats.rx_errors++;
1935 dev->net->stats.rx_dropped++;
2f7ca802
SG
1936
1937 if (header & RX_STS_CRC_) {
80667ac1 1938 dev->net->stats.rx_crc_errors++;
2f7ca802
SG
1939 } else {
1940 if (header & (RX_STS_TL_ | RX_STS_RF_))
80667ac1 1941 dev->net->stats.rx_frame_errors++;
2f7ca802
SG
1942
1943 if ((header & RX_STS_LE_) &&
1944 (!(header & RX_STS_FT_)))
80667ac1 1945 dev->net->stats.rx_length_errors++;
2f7ca802
SG
1946 }
1947 } else {
1948 /* ETH_FRAME_LEN + 4(CRC) + 2(COE) + 4(Vlan) */
1949 if (unlikely(size > (ETH_FRAME_LEN + 12))) {
a475f603
JP
1950 netif_dbg(dev, rx_err, dev->net,
1951 "size err header=0x%08x\n", header);
2f7ca802
SG
1952 return 0;
1953 }
1954
1955 /* last frame in this batch */
1956 if (skb->len == size) {
78e47fe4 1957 if (dev->net->features & NETIF_F_RXCSUM)
2f7ca802 1958 smsc95xx_rx_csum_offload(skb);
df18acca 1959 skb_trim(skb, skb->len - 4); /* remove fcs */
2f7ca802
SG
1960 skb->truesize = size + sizeof(struct sk_buff);
1961
1962 return 1;
1963 }
1964
1965 ax_skb = skb_clone(skb, GFP_ATOMIC);
1966 if (unlikely(!ax_skb)) {
60b86755 1967 netdev_warn(dev->net, "Error allocating skb\n");
2f7ca802
SG
1968 return 0;
1969 }
1970
1971 ax_skb->len = size;
1972 ax_skb->data = packet;
1973 skb_set_tail_pointer(ax_skb, size);
1974
78e47fe4 1975 if (dev->net->features & NETIF_F_RXCSUM)
2f7ca802 1976 smsc95xx_rx_csum_offload(ax_skb);
df18acca 1977 skb_trim(ax_skb, ax_skb->len - 4); /* remove fcs */
2f7ca802
SG
1978 ax_skb->truesize = size + sizeof(struct sk_buff);
1979
1980 usbnet_skb_return(dev, ax_skb);
1981 }
1982
1983 skb_pull(skb, size);
1984
1985 /* padding bytes before the next frame starts */
1986 if (skb->len)
1987 skb_pull(skb, align_count);
1988 }
1989
2f7ca802
SG
1990 return 1;
1991}
1992
f7b29271
SG
1993static u32 smsc95xx_calc_csum_preamble(struct sk_buff *skb)
1994{
55508d60
MM
1995 u16 low_16 = (u16)skb_checksum_start_offset(skb);
1996 u16 high_16 = low_16 + skb->csum_offset;
f7b29271
SG
1997 return (high_16 << 16) | low_16;
1998}
1999
75938f77
BD
2000/* The TX CSUM won't work if the checksum lies in the last 4 bytes of the
2001 * transmission. This is fairly unlikely, only seems to trigger with some
2002 * short TCP ACK packets sent.
2003 *
2004 * Note, this calculation should probably check for the alignment of the
2005 * data as well, but a straight check for csum being in the last four bytes
2006 * of the packet should be ok for now.
2007 */
2008static bool smsc95xx_can_tx_checksum(struct sk_buff *skb)
2009{
2010 unsigned int len = skb->len - skb_checksum_start_offset(skb);
2011
2012 if (skb->len <= 45)
2013 return false;
2014 return skb->csum_offset < (len - (4 + 1));
2015}
2016
2f7ca802
SG
2017static struct sk_buff *smsc95xx_tx_fixup(struct usbnet *dev,
2018 struct sk_buff *skb, gfp_t flags)
2019{
78e47fe4 2020 bool csum = skb->ip_summed == CHECKSUM_PARTIAL;
f7b29271 2021 int overhead = csum ? SMSC95XX_TX_OVERHEAD_CSUM : SMSC95XX_TX_OVERHEAD;
2f7ca802 2022 u32 tx_cmd_a, tx_cmd_b;
0c8b2655 2023 void *ptr;
2f7ca802 2024
f7b29271
SG
2025 /* We do not advertise SG, so skbs should be already linearized */
2026 BUG_ON(skb_shinfo(skb)->nr_frags);
2027
e9156cd2
JH
2028 /* Make writable and expand header space by overhead if required */
2029 if (skb_cow_head(skb, overhead)) {
2030 /* Must deallocate here as returning NULL to indicate error
2031 * means the skb won't be deallocated in the caller.
2032 */
2f7ca802 2033 dev_kfree_skb_any(skb);
e9156cd2 2034 return NULL;
2f7ca802
SG
2035 }
2036
0c8b2655
BD
2037 tx_cmd_b = (u32)skb->len;
2038 tx_cmd_a = tx_cmd_b | TX_CMD_A_FIRST_SEG_ | TX_CMD_A_LAST_SEG_;
2039
f7b29271 2040 if (csum) {
75938f77 2041 if (!smsc95xx_can_tx_checksum(skb)) {
11bc3088
SG
2042 /* workaround - hardware tx checksum does not work
2043 * properly with extremely small packets */
55508d60 2044 long csstart = skb_checksum_start_offset(skb);
11bc3088
SG
2045 __wsum calc = csum_partial(skb->data + csstart,
2046 skb->len - csstart, 0);
2047 *((__sum16 *)(skb->data + csstart
2048 + skb->csum_offset)) = csum_fold(calc);
2049
2050 csum = false;
2051 } else {
2052 u32 csum_preamble = smsc95xx_calc_csum_preamble(skb);
0c8b2655
BD
2053 ptr = skb_push(skb, 4);
2054 put_unaligned_le32(csum_preamble, ptr);
2055
2056 tx_cmd_a += 4;
2057 tx_cmd_b += 4;
2058 tx_cmd_b |= TX_CMD_B_CSUM_ENABLE;
11bc3088 2059 }
f7b29271
SG
2060 }
2061
0c8b2655
BD
2062 ptr = skb_push(skb, 8);
2063 put_unaligned_le32(tx_cmd_a, ptr);
2064 put_unaligned_le32(tx_cmd_b, ptr+4);
2f7ca802
SG
2065
2066 return skb;
2067}
2068
b2d4b150
SG
2069static int smsc95xx_manage_power(struct usbnet *dev, int on)
2070{
2071 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]);
2072
2073 dev->intf->needs_remote_wakeup = on;
2074
eb970ff0 2075 if (pdata->features & FEATURE_REMOTE_WAKEUP)
b2d4b150
SG
2076 return 0;
2077
eb970ff0
ML
2078 /* this chip revision isn't capable of remote wakeup */
2079 netdev_info(dev->net, "hardware isn't capable of remote wakeup\n");
b2d4b150
SG
2080
2081 if (on)
2082 usb_autopm_get_interface_no_resume(dev->intf);
2083 else
2084 usb_autopm_put_interface(dev->intf);
2085
2086 return 0;
2087}
2088
2f7ca802
SG
2089static const struct driver_info smsc95xx_info = {
2090 .description = "smsc95xx USB 2.0 Ethernet",
2091 .bind = smsc95xx_bind,
2092 .unbind = smsc95xx_unbind,
2093 .link_reset = smsc95xx_link_reset,
2094 .reset = smsc95xx_reset,
2095 .rx_fixup = smsc95xx_rx_fixup,
2096 .tx_fixup = smsc95xx_tx_fixup,
2097 .status = smsc95xx_status,
b2d4b150 2098 .manage_power = smsc95xx_manage_power,
07d69d42 2099 .flags = FLAG_ETHER | FLAG_SEND_ZLP | FLAG_LINK_INTR,
2f7ca802
SG
2100};
2101
2102static const struct usb_device_id products[] = {
2103 {
2104 /* SMSC9500 USB Ethernet Device */
2105 USB_DEVICE(0x0424, 0x9500),
2106 .driver_info = (unsigned long) &smsc95xx_info,
2107 },
6f41d12b
SG
2108 {
2109 /* SMSC9505 USB Ethernet Device */
2110 USB_DEVICE(0x0424, 0x9505),
2111 .driver_info = (unsigned long) &smsc95xx_info,
2112 },
2113 {
2114 /* SMSC9500A USB Ethernet Device */
2115 USB_DEVICE(0x0424, 0x9E00),
2116 .driver_info = (unsigned long) &smsc95xx_info,
2117 },
2118 {
2119 /* SMSC9505A USB Ethernet Device */
2120 USB_DEVICE(0x0424, 0x9E01),
2121 .driver_info = (unsigned long) &smsc95xx_info,
2122 },
726474b8
SG
2123 {
2124 /* SMSC9512/9514 USB Hub & Ethernet Device */
2125 USB_DEVICE(0x0424, 0xec00),
2126 .driver_info = (unsigned long) &smsc95xx_info,
2127 },
6f41d12b
SG
2128 {
2129 /* SMSC9500 USB Ethernet Device (SAL10) */
2130 USB_DEVICE(0x0424, 0x9900),
2131 .driver_info = (unsigned long) &smsc95xx_info,
2132 },
2133 {
2134 /* SMSC9505 USB Ethernet Device (SAL10) */
2135 USB_DEVICE(0x0424, 0x9901),
2136 .driver_info = (unsigned long) &smsc95xx_info,
2137 },
2138 {
2139 /* SMSC9500A USB Ethernet Device (SAL10) */
2140 USB_DEVICE(0x0424, 0x9902),
2141 .driver_info = (unsigned long) &smsc95xx_info,
2142 },
2143 {
2144 /* SMSC9505A USB Ethernet Device (SAL10) */
2145 USB_DEVICE(0x0424, 0x9903),
2146 .driver_info = (unsigned long) &smsc95xx_info,
2147 },
2148 {
2149 /* SMSC9512/9514 USB Hub & Ethernet Device (SAL10) */
2150 USB_DEVICE(0x0424, 0x9904),
2151 .driver_info = (unsigned long) &smsc95xx_info,
2152 },
2153 {
2154 /* SMSC9500A USB Ethernet Device (HAL) */
2155 USB_DEVICE(0x0424, 0x9905),
2156 .driver_info = (unsigned long) &smsc95xx_info,
2157 },
2158 {
2159 /* SMSC9505A USB Ethernet Device (HAL) */
2160 USB_DEVICE(0x0424, 0x9906),
2161 .driver_info = (unsigned long) &smsc95xx_info,
2162 },
2163 {
2164 /* SMSC9500 USB Ethernet Device (Alternate ID) */
2165 USB_DEVICE(0x0424, 0x9907),
2166 .driver_info = (unsigned long) &smsc95xx_info,
2167 },
2168 {
2169 /* SMSC9500A USB Ethernet Device (Alternate ID) */
2170 USB_DEVICE(0x0424, 0x9908),
2171 .driver_info = (unsigned long) &smsc95xx_info,
2172 },
2173 {
2174 /* SMSC9512/9514 USB Hub & Ethernet Device (Alternate ID) */
2175 USB_DEVICE(0x0424, 0x9909),
2176 .driver_info = (unsigned long) &smsc95xx_info,
2177 },
88edaa41
SG
2178 {
2179 /* SMSC LAN9530 USB Ethernet Device */
2180 USB_DEVICE(0x0424, 0x9530),
2181 .driver_info = (unsigned long) &smsc95xx_info,
2182 },
2183 {
2184 /* SMSC LAN9730 USB Ethernet Device */
2185 USB_DEVICE(0x0424, 0x9730),
2186 .driver_info = (unsigned long) &smsc95xx_info,
2187 },
2188 {
2189 /* SMSC LAN89530 USB Ethernet Device */
2190 USB_DEVICE(0x0424, 0x9E08),
2191 .driver_info = (unsigned long) &smsc95xx_info,
2192 },
2f7ca802
SG
2193 { }, /* END */
2194};
2195MODULE_DEVICE_TABLE(usb, products);
2196
2197static struct usb_driver smsc95xx_driver = {
2198 .name = "smsc95xx",
2199 .id_table = products,
2200 .probe = usbnet_probe,
b5a04475 2201 .suspend = smsc95xx_suspend,
e0e474a8 2202 .resume = smsc95xx_resume,
b4df480f 2203 .reset_resume = smsc95xx_reset_resume,
2f7ca802 2204 .disconnect = usbnet_disconnect,
e1f12eb6 2205 .disable_hub_initiated_lpm = 1,
b2d4b150 2206 .supports_autosuspend = 1,
2f7ca802
SG
2207};
2208
d632eb1b 2209module_usb_driver(smsc95xx_driver);
2f7ca802
SG
2210
2211MODULE_AUTHOR("Nancy Lin");
90b24cfb 2212MODULE_AUTHOR("Steve Glendinning <steve.glendinning@shawell.net>");
2f7ca802
SG
2213MODULE_DESCRIPTION("SMSC95XX USB 2.0 Ethernet Devices");
2214MODULE_LICENSE("GPL");