Commit | Line | Data |
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1ccea77e | 1 | // SPDX-License-Identifier: GPL-2.0-or-later |
d0cad871 SG |
2 | /*************************************************************************** |
3 | * | |
4 | * Copyright (C) 2007-2010 SMSC | |
5 | * | |
d0cad871 SG |
6 | *****************************************************************************/ |
7 | ||
8 | #include <linux/module.h> | |
9 | #include <linux/kmod.h> | |
d0cad871 SG |
10 | #include <linux/netdevice.h> |
11 | #include <linux/etherdevice.h> | |
12 | #include <linux/ethtool.h> | |
13 | #include <linux/mii.h> | |
14 | #include <linux/usb.h> | |
899a391b SG |
15 | #include <linux/bitrev.h> |
16 | #include <linux/crc16.h> | |
d0cad871 SG |
17 | #include <linux/crc32.h> |
18 | #include <linux/usb/usbnet.h> | |
5a0e3ad6 | 19 | #include <linux/slab.h> |
c489565b | 20 | #include <linux/of_net.h> |
d0cad871 SG |
21 | #include "smsc75xx.h" |
22 | ||
23 | #define SMSC_CHIPNAME "smsc75xx" | |
24 | #define SMSC_DRIVER_VERSION "1.0.0" | |
25 | #define HS_USB_PKT_SIZE (512) | |
26 | #define FS_USB_PKT_SIZE (64) | |
27 | #define DEFAULT_HS_BURST_CAP_SIZE (16 * 1024 + 5 * HS_USB_PKT_SIZE) | |
28 | #define DEFAULT_FS_BURST_CAP_SIZE (6 * 1024 + 33 * FS_USB_PKT_SIZE) | |
29 | #define DEFAULT_BULK_IN_DELAY (0x00002000) | |
30 | #define MAX_SINGLE_PACKET_SIZE (9000) | |
31 | #define LAN75XX_EEPROM_MAGIC (0x7500) | |
32 | #define EEPROM_MAC_OFFSET (0x01) | |
33 | #define DEFAULT_TX_CSUM_ENABLE (true) | |
34 | #define DEFAULT_RX_CSUM_ENABLE (true) | |
d0cad871 SG |
35 | #define SMSC75XX_INTERNAL_PHY_ID (1) |
36 | #define SMSC75XX_TX_OVERHEAD (8) | |
37 | #define MAX_RX_FIFO_SIZE (20 * 1024) | |
38 | #define MAX_TX_FIFO_SIZE (12 * 1024) | |
39 | #define USB_VENDOR_ID_SMSC (0x0424) | |
40 | #define USB_PRODUCT_ID_LAN7500 (0x7500) | |
41 | #define USB_PRODUCT_ID_LAN7505 (0x7505) | |
ea1649de | 42 | #define RXW_PADDING 2 |
f329ccdc | 43 | #define SUPPORTED_WAKE (WAKE_PHY | WAKE_UCAST | WAKE_BCAST | \ |
899a391b | 44 | WAKE_MCAST | WAKE_ARP | WAKE_MAGIC) |
d0cad871 | 45 | |
b4cdea9c SG |
46 | #define SUSPEND_SUSPEND0 (0x01) |
47 | #define SUSPEND_SUSPEND1 (0x02) | |
48 | #define SUSPEND_SUSPEND2 (0x04) | |
49 | #define SUSPEND_SUSPEND3 (0x08) | |
b4cdea9c SG |
50 | #define SUSPEND_ALLMODES (SUSPEND_SUSPEND0 | SUSPEND_SUSPEND1 | \ |
51 | SUSPEND_SUSPEND2 | SUSPEND_SUSPEND3) | |
52 | ||
d0cad871 SG |
53 | struct smsc75xx_priv { |
54 | struct usbnet *dev; | |
55 | u32 rfe_ctl; | |
6c636503 | 56 | u32 wolopts; |
d0cad871 | 57 | u32 multicast_hash_table[DP_SEL_VHF_HASH_LEN]; |
d0cad871 SG |
58 | struct mutex dataport_mutex; |
59 | spinlock_t rfe_ctl_lock; | |
60 | struct work_struct set_multicast; | |
b4cdea9c | 61 | u8 suspend_flags; |
d0cad871 SG |
62 | }; |
63 | ||
64 | struct usb_context { | |
65 | struct usb_ctrlrequest req; | |
66 | struct usbnet *dev; | |
67 | }; | |
68 | ||
eb939922 | 69 | static bool turbo_mode = true; |
d0cad871 SG |
70 | module_param(turbo_mode, bool, 0644); |
71 | MODULE_PARM_DESC(turbo_mode, "Enable multiple frames per Rx transaction"); | |
72 | ||
d461e3da YO |
73 | static int smsc75xx_link_ok_nopm(struct usbnet *dev); |
74 | static int smsc75xx_phy_gig_workaround(struct usbnet *dev); | |
75 | ||
47bbea41 ML |
76 | static int __must_check __smsc75xx_read_reg(struct usbnet *dev, u32 index, |
77 | u32 *data, int in_pm) | |
d0cad871 | 78 | { |
2b2e41e3 | 79 | u32 buf; |
d0cad871 | 80 | int ret; |
47bbea41 | 81 | int (*fn)(struct usbnet *, u8, u8, u16, u16, void *, u16); |
d0cad871 SG |
82 | |
83 | BUG_ON(!dev); | |
84 | ||
47bbea41 ML |
85 | if (!in_pm) |
86 | fn = usbnet_read_cmd; | |
87 | else | |
88 | fn = usbnet_read_cmd_nopm; | |
89 | ||
90 | ret = fn(dev, USB_VENDOR_REQUEST_READ_REGISTER, USB_DIR_IN | |
91 | | USB_TYPE_VENDOR | USB_RECIP_DEVICE, | |
92 | 0, index, &buf, 4); | |
58ef6a3f | 93 | if (unlikely(ret < 0)) { |
1e1d7412 JP |
94 | netdev_warn(dev->net, "Failed to read reg index 0x%08x: %d\n", |
95 | index, ret); | |
58ef6a3f DC |
96 | return ret; |
97 | } | |
d0cad871 | 98 | |
2b2e41e3 ML |
99 | le32_to_cpus(&buf); |
100 | *data = buf; | |
d0cad871 SG |
101 | |
102 | return ret; | |
103 | } | |
104 | ||
47bbea41 ML |
105 | static int __must_check __smsc75xx_write_reg(struct usbnet *dev, u32 index, |
106 | u32 data, int in_pm) | |
d0cad871 | 107 | { |
2b2e41e3 | 108 | u32 buf; |
d0cad871 | 109 | int ret; |
47bbea41 | 110 | int (*fn)(struct usbnet *, u8, u8, u16, u16, const void *, u16); |
d0cad871 SG |
111 | |
112 | BUG_ON(!dev); | |
113 | ||
47bbea41 ML |
114 | if (!in_pm) |
115 | fn = usbnet_write_cmd; | |
116 | else | |
117 | fn = usbnet_write_cmd_nopm; | |
118 | ||
2b2e41e3 ML |
119 | buf = data; |
120 | cpu_to_le32s(&buf); | |
d0cad871 | 121 | |
47bbea41 ML |
122 | ret = fn(dev, USB_VENDOR_REQUEST_WRITE_REGISTER, USB_DIR_OUT |
123 | | USB_TYPE_VENDOR | USB_RECIP_DEVICE, | |
124 | 0, index, &buf, 4); | |
d0cad871 | 125 | if (unlikely(ret < 0)) |
1e1d7412 JP |
126 | netdev_warn(dev->net, "Failed to write reg index 0x%08x: %d\n", |
127 | index, ret); | |
d0cad871 | 128 | |
d0cad871 SG |
129 | return ret; |
130 | } | |
131 | ||
47bbea41 ML |
132 | static int __must_check smsc75xx_read_reg_nopm(struct usbnet *dev, u32 index, |
133 | u32 *data) | |
134 | { | |
135 | return __smsc75xx_read_reg(dev, index, data, 1); | |
136 | } | |
137 | ||
138 | static int __must_check smsc75xx_write_reg_nopm(struct usbnet *dev, u32 index, | |
139 | u32 data) | |
140 | { | |
141 | return __smsc75xx_write_reg(dev, index, data, 1); | |
142 | } | |
143 | ||
144 | static int __must_check smsc75xx_read_reg(struct usbnet *dev, u32 index, | |
145 | u32 *data) | |
146 | { | |
147 | return __smsc75xx_read_reg(dev, index, data, 0); | |
148 | } | |
149 | ||
150 | static int __must_check smsc75xx_write_reg(struct usbnet *dev, u32 index, | |
151 | u32 data) | |
152 | { | |
153 | return __smsc75xx_write_reg(dev, index, data, 0); | |
154 | } | |
155 | ||
d0cad871 SG |
156 | /* Loop until the read is completed with timeout |
157 | * called with phy_mutex held */ | |
f329ccdc SG |
158 | static __must_check int __smsc75xx_phy_wait_not_busy(struct usbnet *dev, |
159 | int in_pm) | |
d0cad871 SG |
160 | { |
161 | unsigned long start_time = jiffies; | |
162 | u32 val; | |
163 | int ret; | |
164 | ||
165 | do { | |
f329ccdc | 166 | ret = __smsc75xx_read_reg(dev, MII_ACCESS, &val, in_pm); |
e3c678e6 SG |
167 | if (ret < 0) { |
168 | netdev_warn(dev->net, "Error reading MII_ACCESS\n"); | |
169 | return ret; | |
170 | } | |
d0cad871 SG |
171 | |
172 | if (!(val & MII_ACCESS_BUSY)) | |
173 | return 0; | |
174 | } while (!time_after(jiffies, start_time + HZ)); | |
175 | ||
176 | return -EIO; | |
177 | } | |
178 | ||
f329ccdc SG |
179 | static int __smsc75xx_mdio_read(struct net_device *netdev, int phy_id, int idx, |
180 | int in_pm) | |
d0cad871 SG |
181 | { |
182 | struct usbnet *dev = netdev_priv(netdev); | |
183 | u32 val, addr; | |
184 | int ret; | |
185 | ||
186 | mutex_lock(&dev->phy_mutex); | |
187 | ||
188 | /* confirm MII not busy */ | |
f329ccdc | 189 | ret = __smsc75xx_phy_wait_not_busy(dev, in_pm); |
e3c678e6 SG |
190 | if (ret < 0) { |
191 | netdev_warn(dev->net, "MII is busy in smsc75xx_mdio_read\n"); | |
192 | goto done; | |
193 | } | |
d0cad871 SG |
194 | |
195 | /* set the address, index & direction (read from PHY) */ | |
196 | phy_id &= dev->mii.phy_id_mask; | |
197 | idx &= dev->mii.reg_num_mask; | |
198 | addr = ((phy_id << MII_ACCESS_PHY_ADDR_SHIFT) & MII_ACCESS_PHY_ADDR) | |
199 | | ((idx << MII_ACCESS_REG_ADDR_SHIFT) & MII_ACCESS_REG_ADDR) | |
cb8722d3 | 200 | | MII_ACCESS_READ | MII_ACCESS_BUSY; |
f329ccdc | 201 | ret = __smsc75xx_write_reg(dev, MII_ACCESS, addr, in_pm); |
e3c678e6 SG |
202 | if (ret < 0) { |
203 | netdev_warn(dev->net, "Error writing MII_ACCESS\n"); | |
204 | goto done; | |
205 | } | |
d0cad871 | 206 | |
f329ccdc | 207 | ret = __smsc75xx_phy_wait_not_busy(dev, in_pm); |
e3c678e6 SG |
208 | if (ret < 0) { |
209 | netdev_warn(dev->net, "Timed out reading MII reg %02X\n", idx); | |
210 | goto done; | |
211 | } | |
d0cad871 | 212 | |
f329ccdc | 213 | ret = __smsc75xx_read_reg(dev, MII_DATA, &val, in_pm); |
e3c678e6 SG |
214 | if (ret < 0) { |
215 | netdev_warn(dev->net, "Error reading MII_DATA\n"); | |
216 | goto done; | |
217 | } | |
d0cad871 SG |
218 | |
219 | ret = (u16)(val & 0xFFFF); | |
220 | ||
221 | done: | |
222 | mutex_unlock(&dev->phy_mutex); | |
223 | return ret; | |
224 | } | |
225 | ||
f329ccdc SG |
226 | static void __smsc75xx_mdio_write(struct net_device *netdev, int phy_id, |
227 | int idx, int regval, int in_pm) | |
d0cad871 SG |
228 | { |
229 | struct usbnet *dev = netdev_priv(netdev); | |
230 | u32 val, addr; | |
231 | int ret; | |
232 | ||
233 | mutex_lock(&dev->phy_mutex); | |
234 | ||
235 | /* confirm MII not busy */ | |
f329ccdc | 236 | ret = __smsc75xx_phy_wait_not_busy(dev, in_pm); |
e3c678e6 SG |
237 | if (ret < 0) { |
238 | netdev_warn(dev->net, "MII is busy in smsc75xx_mdio_write\n"); | |
239 | goto done; | |
240 | } | |
d0cad871 SG |
241 | |
242 | val = regval; | |
f329ccdc | 243 | ret = __smsc75xx_write_reg(dev, MII_DATA, val, in_pm); |
e3c678e6 SG |
244 | if (ret < 0) { |
245 | netdev_warn(dev->net, "Error writing MII_DATA\n"); | |
246 | goto done; | |
247 | } | |
d0cad871 SG |
248 | |
249 | /* set the address, index & direction (write to PHY) */ | |
250 | phy_id &= dev->mii.phy_id_mask; | |
251 | idx &= dev->mii.reg_num_mask; | |
252 | addr = ((phy_id << MII_ACCESS_PHY_ADDR_SHIFT) & MII_ACCESS_PHY_ADDR) | |
253 | | ((idx << MII_ACCESS_REG_ADDR_SHIFT) & MII_ACCESS_REG_ADDR) | |
cb8722d3 | 254 | | MII_ACCESS_WRITE | MII_ACCESS_BUSY; |
f329ccdc | 255 | ret = __smsc75xx_write_reg(dev, MII_ACCESS, addr, in_pm); |
e3c678e6 SG |
256 | if (ret < 0) { |
257 | netdev_warn(dev->net, "Error writing MII_ACCESS\n"); | |
258 | goto done; | |
259 | } | |
d0cad871 | 260 | |
f329ccdc | 261 | ret = __smsc75xx_phy_wait_not_busy(dev, in_pm); |
e3c678e6 SG |
262 | if (ret < 0) { |
263 | netdev_warn(dev->net, "Timed out writing MII reg %02X\n", idx); | |
264 | goto done; | |
265 | } | |
d0cad871 SG |
266 | |
267 | done: | |
268 | mutex_unlock(&dev->phy_mutex); | |
269 | } | |
270 | ||
f329ccdc SG |
271 | static int smsc75xx_mdio_read_nopm(struct net_device *netdev, int phy_id, |
272 | int idx) | |
273 | { | |
274 | return __smsc75xx_mdio_read(netdev, phy_id, idx, 1); | |
275 | } | |
276 | ||
277 | static void smsc75xx_mdio_write_nopm(struct net_device *netdev, int phy_id, | |
278 | int idx, int regval) | |
279 | { | |
280 | __smsc75xx_mdio_write(netdev, phy_id, idx, regval, 1); | |
281 | } | |
282 | ||
283 | static int smsc75xx_mdio_read(struct net_device *netdev, int phy_id, int idx) | |
284 | { | |
285 | return __smsc75xx_mdio_read(netdev, phy_id, idx, 0); | |
286 | } | |
287 | ||
288 | static void smsc75xx_mdio_write(struct net_device *netdev, int phy_id, int idx, | |
289 | int regval) | |
290 | { | |
291 | __smsc75xx_mdio_write(netdev, phy_id, idx, regval, 0); | |
292 | } | |
293 | ||
d0cad871 SG |
294 | static int smsc75xx_wait_eeprom(struct usbnet *dev) |
295 | { | |
296 | unsigned long start_time = jiffies; | |
297 | u32 val; | |
298 | int ret; | |
299 | ||
300 | do { | |
301 | ret = smsc75xx_read_reg(dev, E2P_CMD, &val); | |
e3c678e6 SG |
302 | if (ret < 0) { |
303 | netdev_warn(dev->net, "Error reading E2P_CMD\n"); | |
304 | return ret; | |
305 | } | |
d0cad871 SG |
306 | |
307 | if (!(val & E2P_CMD_BUSY) || (val & E2P_CMD_TIMEOUT)) | |
308 | break; | |
309 | udelay(40); | |
310 | } while (!time_after(jiffies, start_time + HZ)); | |
311 | ||
312 | if (val & (E2P_CMD_TIMEOUT | E2P_CMD_BUSY)) { | |
1e1d7412 | 313 | netdev_warn(dev->net, "EEPROM read operation timeout\n"); |
d0cad871 SG |
314 | return -EIO; |
315 | } | |
316 | ||
317 | return 0; | |
318 | } | |
319 | ||
320 | static int smsc75xx_eeprom_confirm_not_busy(struct usbnet *dev) | |
321 | { | |
322 | unsigned long start_time = jiffies; | |
323 | u32 val; | |
324 | int ret; | |
325 | ||
326 | do { | |
327 | ret = smsc75xx_read_reg(dev, E2P_CMD, &val); | |
e3c678e6 SG |
328 | if (ret < 0) { |
329 | netdev_warn(dev->net, "Error reading E2P_CMD\n"); | |
330 | return ret; | |
331 | } | |
d0cad871 SG |
332 | |
333 | if (!(val & E2P_CMD_BUSY)) | |
334 | return 0; | |
335 | ||
336 | udelay(40); | |
337 | } while (!time_after(jiffies, start_time + HZ)); | |
338 | ||
1e1d7412 | 339 | netdev_warn(dev->net, "EEPROM is busy\n"); |
d0cad871 SG |
340 | return -EIO; |
341 | } | |
342 | ||
343 | static int smsc75xx_read_eeprom(struct usbnet *dev, u32 offset, u32 length, | |
344 | u8 *data) | |
345 | { | |
346 | u32 val; | |
347 | int i, ret; | |
348 | ||
349 | BUG_ON(!dev); | |
350 | BUG_ON(!data); | |
351 | ||
352 | ret = smsc75xx_eeprom_confirm_not_busy(dev); | |
353 | if (ret) | |
354 | return ret; | |
355 | ||
356 | for (i = 0; i < length; i++) { | |
357 | val = E2P_CMD_BUSY | E2P_CMD_READ | (offset & E2P_CMD_ADDR); | |
358 | ret = smsc75xx_write_reg(dev, E2P_CMD, val); | |
e3c678e6 SG |
359 | if (ret < 0) { |
360 | netdev_warn(dev->net, "Error writing E2P_CMD\n"); | |
361 | return ret; | |
362 | } | |
d0cad871 SG |
363 | |
364 | ret = smsc75xx_wait_eeprom(dev); | |
365 | if (ret < 0) | |
366 | return ret; | |
367 | ||
368 | ret = smsc75xx_read_reg(dev, E2P_DATA, &val); | |
e3c678e6 SG |
369 | if (ret < 0) { |
370 | netdev_warn(dev->net, "Error reading E2P_DATA\n"); | |
371 | return ret; | |
372 | } | |
d0cad871 SG |
373 | |
374 | data[i] = val & 0xFF; | |
375 | offset++; | |
376 | } | |
377 | ||
378 | return 0; | |
379 | } | |
380 | ||
381 | static int smsc75xx_write_eeprom(struct usbnet *dev, u32 offset, u32 length, | |
382 | u8 *data) | |
383 | { | |
384 | u32 val; | |
385 | int i, ret; | |
386 | ||
387 | BUG_ON(!dev); | |
388 | BUG_ON(!data); | |
389 | ||
390 | ret = smsc75xx_eeprom_confirm_not_busy(dev); | |
391 | if (ret) | |
392 | return ret; | |
393 | ||
394 | /* Issue write/erase enable command */ | |
395 | val = E2P_CMD_BUSY | E2P_CMD_EWEN; | |
396 | ret = smsc75xx_write_reg(dev, E2P_CMD, val); | |
e3c678e6 SG |
397 | if (ret < 0) { |
398 | netdev_warn(dev->net, "Error writing E2P_CMD\n"); | |
399 | return ret; | |
400 | } | |
d0cad871 SG |
401 | |
402 | ret = smsc75xx_wait_eeprom(dev); | |
403 | if (ret < 0) | |
404 | return ret; | |
405 | ||
406 | for (i = 0; i < length; i++) { | |
407 | ||
408 | /* Fill data register */ | |
409 | val = data[i]; | |
410 | ret = smsc75xx_write_reg(dev, E2P_DATA, val); | |
e3c678e6 SG |
411 | if (ret < 0) { |
412 | netdev_warn(dev->net, "Error writing E2P_DATA\n"); | |
413 | return ret; | |
414 | } | |
d0cad871 SG |
415 | |
416 | /* Send "write" command */ | |
417 | val = E2P_CMD_BUSY | E2P_CMD_WRITE | (offset & E2P_CMD_ADDR); | |
418 | ret = smsc75xx_write_reg(dev, E2P_CMD, val); | |
e3c678e6 SG |
419 | if (ret < 0) { |
420 | netdev_warn(dev->net, "Error writing E2P_CMD\n"); | |
421 | return ret; | |
422 | } | |
d0cad871 SG |
423 | |
424 | ret = smsc75xx_wait_eeprom(dev); | |
425 | if (ret < 0) | |
426 | return ret; | |
427 | ||
428 | offset++; | |
429 | } | |
430 | ||
431 | return 0; | |
432 | } | |
433 | ||
434 | static int smsc75xx_dataport_wait_not_busy(struct usbnet *dev) | |
435 | { | |
436 | int i, ret; | |
437 | ||
438 | for (i = 0; i < 100; i++) { | |
439 | u32 dp_sel; | |
440 | ret = smsc75xx_read_reg(dev, DP_SEL, &dp_sel); | |
e3c678e6 SG |
441 | if (ret < 0) { |
442 | netdev_warn(dev->net, "Error reading DP_SEL\n"); | |
443 | return ret; | |
444 | } | |
d0cad871 SG |
445 | |
446 | if (dp_sel & DP_SEL_DPRDY) | |
447 | return 0; | |
448 | ||
449 | udelay(40); | |
450 | } | |
451 | ||
1e1d7412 | 452 | netdev_warn(dev->net, "smsc75xx_dataport_wait_not_busy timed out\n"); |
d0cad871 SG |
453 | |
454 | return -EIO; | |
455 | } | |
456 | ||
457 | static int smsc75xx_dataport_write(struct usbnet *dev, u32 ram_select, u32 addr, | |
458 | u32 length, u32 *buf) | |
459 | { | |
460 | struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]); | |
461 | u32 dp_sel; | |
462 | int i, ret; | |
463 | ||
464 | mutex_lock(&pdata->dataport_mutex); | |
465 | ||
466 | ret = smsc75xx_dataport_wait_not_busy(dev); | |
e3c678e6 SG |
467 | if (ret < 0) { |
468 | netdev_warn(dev->net, "smsc75xx_dataport_write busy on entry\n"); | |
469 | goto done; | |
470 | } | |
d0cad871 SG |
471 | |
472 | ret = smsc75xx_read_reg(dev, DP_SEL, &dp_sel); | |
e3c678e6 SG |
473 | if (ret < 0) { |
474 | netdev_warn(dev->net, "Error reading DP_SEL\n"); | |
475 | goto done; | |
476 | } | |
d0cad871 SG |
477 | |
478 | dp_sel &= ~DP_SEL_RSEL; | |
479 | dp_sel |= ram_select; | |
480 | ret = smsc75xx_write_reg(dev, DP_SEL, dp_sel); | |
e3c678e6 SG |
481 | if (ret < 0) { |
482 | netdev_warn(dev->net, "Error writing DP_SEL\n"); | |
483 | goto done; | |
484 | } | |
d0cad871 SG |
485 | |
486 | for (i = 0; i < length; i++) { | |
487 | ret = smsc75xx_write_reg(dev, DP_ADDR, addr + i); | |
e3c678e6 SG |
488 | if (ret < 0) { |
489 | netdev_warn(dev->net, "Error writing DP_ADDR\n"); | |
490 | goto done; | |
491 | } | |
d0cad871 SG |
492 | |
493 | ret = smsc75xx_write_reg(dev, DP_DATA, buf[i]); | |
e3c678e6 SG |
494 | if (ret < 0) { |
495 | netdev_warn(dev->net, "Error writing DP_DATA\n"); | |
496 | goto done; | |
497 | } | |
d0cad871 SG |
498 | |
499 | ret = smsc75xx_write_reg(dev, DP_CMD, DP_CMD_WRITE); | |
e3c678e6 SG |
500 | if (ret < 0) { |
501 | netdev_warn(dev->net, "Error writing DP_CMD\n"); | |
502 | goto done; | |
503 | } | |
d0cad871 SG |
504 | |
505 | ret = smsc75xx_dataport_wait_not_busy(dev); | |
e3c678e6 SG |
506 | if (ret < 0) { |
507 | netdev_warn(dev->net, "smsc75xx_dataport_write timeout\n"); | |
508 | goto done; | |
509 | } | |
d0cad871 SG |
510 | } |
511 | ||
512 | done: | |
513 | mutex_unlock(&pdata->dataport_mutex); | |
514 | return ret; | |
515 | } | |
516 | ||
517 | /* returns hash bit number for given MAC address */ | |
518 | static u32 smsc75xx_hash(char addr[ETH_ALEN]) | |
519 | { | |
520 | return (ether_crc(ETH_ALEN, addr) >> 23) & 0x1ff; | |
521 | } | |
522 | ||
523 | static void smsc75xx_deferred_multicast_write(struct work_struct *param) | |
524 | { | |
525 | struct smsc75xx_priv *pdata = | |
526 | container_of(param, struct smsc75xx_priv, set_multicast); | |
527 | struct usbnet *dev = pdata->dev; | |
528 | int ret; | |
529 | ||
1e1d7412 JP |
530 | netif_dbg(dev, drv, dev->net, "deferred multicast write 0x%08x\n", |
531 | pdata->rfe_ctl); | |
d0cad871 SG |
532 | |
533 | smsc75xx_dataport_write(dev, DP_SEL_VHF, DP_SEL_VHF_VLAN_LEN, | |
534 | DP_SEL_VHF_HASH_LEN, pdata->multicast_hash_table); | |
535 | ||
536 | ret = smsc75xx_write_reg(dev, RFE_CTL, pdata->rfe_ctl); | |
e3c678e6 SG |
537 | if (ret < 0) |
538 | netdev_warn(dev->net, "Error writing RFE_CRL\n"); | |
d0cad871 SG |
539 | } |
540 | ||
541 | static void smsc75xx_set_multicast(struct net_device *netdev) | |
542 | { | |
543 | struct usbnet *dev = netdev_priv(netdev); | |
544 | struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]); | |
545 | unsigned long flags; | |
546 | int i; | |
547 | ||
548 | spin_lock_irqsave(&pdata->rfe_ctl_lock, flags); | |
549 | ||
550 | pdata->rfe_ctl &= | |
551 | ~(RFE_CTL_AU | RFE_CTL_AM | RFE_CTL_DPF | RFE_CTL_MHF); | |
552 | pdata->rfe_ctl |= RFE_CTL_AB; | |
553 | ||
554 | for (i = 0; i < DP_SEL_VHF_HASH_LEN; i++) | |
555 | pdata->multicast_hash_table[i] = 0; | |
556 | ||
557 | if (dev->net->flags & IFF_PROMISC) { | |
1e1d7412 | 558 | netif_dbg(dev, drv, dev->net, "promiscuous mode enabled\n"); |
d0cad871 SG |
559 | pdata->rfe_ctl |= RFE_CTL_AM | RFE_CTL_AU; |
560 | } else if (dev->net->flags & IFF_ALLMULTI) { | |
1e1d7412 | 561 | netif_dbg(dev, drv, dev->net, "receive all multicast enabled\n"); |
d0cad871 SG |
562 | pdata->rfe_ctl |= RFE_CTL_AM | RFE_CTL_DPF; |
563 | } else if (!netdev_mc_empty(dev->net)) { | |
22bedad3 | 564 | struct netdev_hw_addr *ha; |
d0cad871 | 565 | |
1e1d7412 | 566 | netif_dbg(dev, drv, dev->net, "receive multicast hash filter\n"); |
d0cad871 SG |
567 | |
568 | pdata->rfe_ctl |= RFE_CTL_MHF | RFE_CTL_DPF; | |
569 | ||
22bedad3 JP |
570 | netdev_for_each_mc_addr(ha, netdev) { |
571 | u32 bitnum = smsc75xx_hash(ha->addr); | |
d0cad871 SG |
572 | pdata->multicast_hash_table[bitnum / 32] |= |
573 | (1 << (bitnum % 32)); | |
574 | } | |
575 | } else { | |
1e1d7412 | 576 | netif_dbg(dev, drv, dev->net, "receive own packets only\n"); |
d0cad871 SG |
577 | pdata->rfe_ctl |= RFE_CTL_DPF; |
578 | } | |
579 | ||
580 | spin_unlock_irqrestore(&pdata->rfe_ctl_lock, flags); | |
581 | ||
582 | /* defer register writes to a sleepable context */ | |
583 | schedule_work(&pdata->set_multicast); | |
584 | } | |
585 | ||
586 | static int smsc75xx_update_flowcontrol(struct usbnet *dev, u8 duplex, | |
587 | u16 lcladv, u16 rmtadv) | |
588 | { | |
589 | u32 flow = 0, fct_flow = 0; | |
590 | int ret; | |
591 | ||
592 | if (duplex == DUPLEX_FULL) { | |
593 | u8 cap = mii_resolve_flowctrl_fdx(lcladv, rmtadv); | |
594 | ||
595 | if (cap & FLOW_CTRL_TX) { | |
596 | flow = (FLOW_TX_FCEN | 0xFFFF); | |
597 | /* set fct_flow thresholds to 20% and 80% */ | |
598 | fct_flow = (8 << 8) | 32; | |
599 | } | |
600 | ||
601 | if (cap & FLOW_CTRL_RX) | |
602 | flow |= FLOW_RX_FCEN; | |
603 | ||
1e1d7412 JP |
604 | netif_dbg(dev, link, dev->net, "rx pause %s, tx pause %s\n", |
605 | (cap & FLOW_CTRL_RX ? "enabled" : "disabled"), | |
606 | (cap & FLOW_CTRL_TX ? "enabled" : "disabled")); | |
d0cad871 | 607 | } else { |
1e1d7412 | 608 | netif_dbg(dev, link, dev->net, "half duplex\n"); |
d0cad871 SG |
609 | } |
610 | ||
611 | ret = smsc75xx_write_reg(dev, FLOW, flow); | |
e3c678e6 SG |
612 | if (ret < 0) { |
613 | netdev_warn(dev->net, "Error writing FLOW\n"); | |
614 | return ret; | |
615 | } | |
d0cad871 SG |
616 | |
617 | ret = smsc75xx_write_reg(dev, FCT_FLOW, fct_flow); | |
e3c678e6 SG |
618 | if (ret < 0) { |
619 | netdev_warn(dev->net, "Error writing FCT_FLOW\n"); | |
620 | return ret; | |
621 | } | |
d0cad871 SG |
622 | |
623 | return 0; | |
624 | } | |
625 | ||
626 | static int smsc75xx_link_reset(struct usbnet *dev) | |
627 | { | |
628 | struct mii_if_info *mii = &dev->mii; | |
8ae6daca | 629 | struct ethtool_cmd ecmd = { .cmd = ETHTOOL_GSET }; |
d0cad871 SG |
630 | u16 lcladv, rmtadv; |
631 | int ret; | |
632 | ||
4f94a929 | 633 | /* write to clear phy interrupt status */ |
7749622d SG |
634 | smsc75xx_mdio_write(dev->net, mii->phy_id, PHY_INT_SRC, |
635 | PHY_INT_SRC_CLEAR_ALL); | |
d0cad871 SG |
636 | |
637 | ret = smsc75xx_write_reg(dev, INT_STS, INT_STS_CLEAR_ALL); | |
e3c678e6 SG |
638 | if (ret < 0) { |
639 | netdev_warn(dev->net, "Error writing INT_STS\n"); | |
640 | return ret; | |
641 | } | |
d0cad871 SG |
642 | |
643 | mii_check_media(mii, 1, 1); | |
644 | mii_ethtool_gset(&dev->mii, &ecmd); | |
645 | lcladv = smsc75xx_mdio_read(dev->net, mii->phy_id, MII_ADVERTISE); | |
646 | rmtadv = smsc75xx_mdio_read(dev->net, mii->phy_id, MII_LPA); | |
647 | ||
1e1d7412 JP |
648 | netif_dbg(dev, link, dev->net, "speed: %u duplex: %d lcladv: %04x rmtadv: %04x\n", |
649 | ethtool_cmd_speed(&ecmd), ecmd.duplex, lcladv, rmtadv); | |
d0cad871 SG |
650 | |
651 | return smsc75xx_update_flowcontrol(dev, ecmd.duplex, lcladv, rmtadv); | |
652 | } | |
653 | ||
654 | static void smsc75xx_status(struct usbnet *dev, struct urb *urb) | |
655 | { | |
656 | u32 intdata; | |
657 | ||
658 | if (urb->actual_length != 4) { | |
1e1d7412 JP |
659 | netdev_warn(dev->net, "unexpected urb length %d\n", |
660 | urb->actual_length); | |
d0cad871 SG |
661 | return; |
662 | } | |
663 | ||
664 | memcpy(&intdata, urb->transfer_buffer, 4); | |
665 | le32_to_cpus(&intdata); | |
666 | ||
1e1d7412 | 667 | netif_dbg(dev, link, dev->net, "intdata: 0x%08X\n", intdata); |
d0cad871 SG |
668 | |
669 | if (intdata & INT_ENP_PHY_INT) | |
670 | usbnet_defer_kevent(dev, EVENT_LINK_RESET); | |
671 | else | |
1e1d7412 JP |
672 | netdev_warn(dev->net, "unexpected interrupt, intdata=0x%08X\n", |
673 | intdata); | |
d0cad871 SG |
674 | } |
675 | ||
d0cad871 SG |
676 | static int smsc75xx_ethtool_get_eeprom_len(struct net_device *net) |
677 | { | |
678 | return MAX_EEPROM_SIZE; | |
679 | } | |
680 | ||
681 | static int smsc75xx_ethtool_get_eeprom(struct net_device *netdev, | |
682 | struct ethtool_eeprom *ee, u8 *data) | |
683 | { | |
684 | struct usbnet *dev = netdev_priv(netdev); | |
685 | ||
686 | ee->magic = LAN75XX_EEPROM_MAGIC; | |
687 | ||
688 | return smsc75xx_read_eeprom(dev, ee->offset, ee->len, data); | |
689 | } | |
690 | ||
691 | static int smsc75xx_ethtool_set_eeprom(struct net_device *netdev, | |
692 | struct ethtool_eeprom *ee, u8 *data) | |
693 | { | |
694 | struct usbnet *dev = netdev_priv(netdev); | |
695 | ||
696 | if (ee->magic != LAN75XX_EEPROM_MAGIC) { | |
1e1d7412 JP |
697 | netdev_warn(dev->net, "EEPROM: magic value mismatch: 0x%x\n", |
698 | ee->magic); | |
d0cad871 SG |
699 | return -EINVAL; |
700 | } | |
701 | ||
702 | return smsc75xx_write_eeprom(dev, ee->offset, ee->len, data); | |
703 | } | |
704 | ||
6c636503 SG |
705 | static void smsc75xx_ethtool_get_wol(struct net_device *net, |
706 | struct ethtool_wolinfo *wolinfo) | |
707 | { | |
708 | struct usbnet *dev = netdev_priv(net); | |
709 | struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]); | |
710 | ||
711 | wolinfo->supported = SUPPORTED_WAKE; | |
712 | wolinfo->wolopts = pdata->wolopts; | |
713 | } | |
714 | ||
715 | static int smsc75xx_ethtool_set_wol(struct net_device *net, | |
716 | struct ethtool_wolinfo *wolinfo) | |
717 | { | |
718 | struct usbnet *dev = netdev_priv(net); | |
719 | struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]); | |
351f33d9 | 720 | int ret; |
6c636503 | 721 | |
9c734b27 FF |
722 | if (wolinfo->wolopts & ~SUPPORTED_WAKE) |
723 | return -EINVAL; | |
724 | ||
6c636503 | 725 | pdata->wolopts = wolinfo->wolopts & SUPPORTED_WAKE; |
351f33d9 SG |
726 | |
727 | ret = device_set_wakeup_enable(&dev->udev->dev, pdata->wolopts); | |
e3c678e6 SG |
728 | if (ret < 0) |
729 | netdev_warn(dev->net, "device_set_wakeup_enable error %d\n", ret); | |
351f33d9 | 730 | |
e3c678e6 | 731 | return ret; |
6c636503 SG |
732 | } |
733 | ||
d0cad871 SG |
734 | static const struct ethtool_ops smsc75xx_ethtool_ops = { |
735 | .get_link = usbnet_get_link, | |
736 | .nway_reset = usbnet_nway_reset, | |
737 | .get_drvinfo = usbnet_get_drvinfo, | |
738 | .get_msglevel = usbnet_get_msglevel, | |
739 | .set_msglevel = usbnet_set_msglevel, | |
d0cad871 SG |
740 | .get_eeprom_len = smsc75xx_ethtool_get_eeprom_len, |
741 | .get_eeprom = smsc75xx_ethtool_get_eeprom, | |
742 | .set_eeprom = smsc75xx_ethtool_set_eeprom, | |
6c636503 SG |
743 | .get_wol = smsc75xx_ethtool_get_wol, |
744 | .set_wol = smsc75xx_ethtool_set_wol, | |
a44017a5 PR |
745 | .get_link_ksettings = usbnet_get_link_ksettings, |
746 | .set_link_ksettings = usbnet_set_link_ksettings, | |
d0cad871 SG |
747 | }; |
748 | ||
749 | static int smsc75xx_ioctl(struct net_device *netdev, struct ifreq *rq, int cmd) | |
750 | { | |
751 | struct usbnet *dev = netdev_priv(netdev); | |
752 | ||
753 | if (!netif_running(netdev)) | |
754 | return -EINVAL; | |
755 | ||
756 | return generic_mii_ioctl(&dev->mii, if_mii(rq), cmd, NULL); | |
757 | } | |
758 | ||
759 | static void smsc75xx_init_mac_address(struct usbnet *dev) | |
760 | { | |
c489565b AB |
761 | const u8 *mac_addr; |
762 | ||
763 | /* maybe the boot loader passed the MAC address in devicetree */ | |
764 | mac_addr = of_get_mac_address(dev->udev->dev.of_node); | |
adfb3cb2 | 765 | if (!IS_ERR(mac_addr)) { |
5503a688 | 766 | ether_addr_copy(dev->net->dev_addr, mac_addr); |
c489565b AB |
767 | return; |
768 | } | |
769 | ||
d0cad871 SG |
770 | /* try reading mac address from EEPROM */ |
771 | if (smsc75xx_read_eeprom(dev, EEPROM_MAC_OFFSET, ETH_ALEN, | |
772 | dev->net->dev_addr) == 0) { | |
773 | if (is_valid_ether_addr(dev->net->dev_addr)) { | |
774 | /* eeprom values are valid so use them */ | |
775 | netif_dbg(dev, ifup, dev->net, | |
1e1d7412 | 776 | "MAC address read from EEPROM\n"); |
d0cad871 SG |
777 | return; |
778 | } | |
779 | } | |
780 | ||
c489565b | 781 | /* no useful static MAC address found. generate a random one */ |
f2cedb63 | 782 | eth_hw_addr_random(dev->net); |
1e1d7412 | 783 | netif_dbg(dev, ifup, dev->net, "MAC address set to eth_random_addr\n"); |
d0cad871 SG |
784 | } |
785 | ||
786 | static int smsc75xx_set_mac_address(struct usbnet *dev) | |
787 | { | |
788 | u32 addr_lo = dev->net->dev_addr[0] | dev->net->dev_addr[1] << 8 | | |
789 | dev->net->dev_addr[2] << 16 | dev->net->dev_addr[3] << 24; | |
790 | u32 addr_hi = dev->net->dev_addr[4] | dev->net->dev_addr[5] << 8; | |
791 | ||
792 | int ret = smsc75xx_write_reg(dev, RX_ADDRH, addr_hi); | |
e3c678e6 SG |
793 | if (ret < 0) { |
794 | netdev_warn(dev->net, "Failed to write RX_ADDRH: %d\n", ret); | |
795 | return ret; | |
796 | } | |
d0cad871 SG |
797 | |
798 | ret = smsc75xx_write_reg(dev, RX_ADDRL, addr_lo); | |
e3c678e6 SG |
799 | if (ret < 0) { |
800 | netdev_warn(dev->net, "Failed to write RX_ADDRL: %d\n", ret); | |
801 | return ret; | |
802 | } | |
d0cad871 SG |
803 | |
804 | addr_hi |= ADDR_FILTX_FB_VALID; | |
805 | ret = smsc75xx_write_reg(dev, ADDR_FILTX, addr_hi); | |
e3c678e6 SG |
806 | if (ret < 0) { |
807 | netdev_warn(dev->net, "Failed to write ADDR_FILTX: %d\n", ret); | |
808 | return ret; | |
809 | } | |
d0cad871 SG |
810 | |
811 | ret = smsc75xx_write_reg(dev, ADDR_FILTX + 4, addr_lo); | |
e3c678e6 SG |
812 | if (ret < 0) |
813 | netdev_warn(dev->net, "Failed to write ADDR_FILTX+4: %d\n", ret); | |
d0cad871 | 814 | |
e3c678e6 | 815 | return ret; |
d0cad871 SG |
816 | } |
817 | ||
818 | static int smsc75xx_phy_initialize(struct usbnet *dev) | |
819 | { | |
b140504a | 820 | int bmcr, ret, timeout = 0; |
d0cad871 SG |
821 | |
822 | /* Initialize MII structure */ | |
823 | dev->mii.dev = dev->net; | |
824 | dev->mii.mdio_read = smsc75xx_mdio_read; | |
825 | dev->mii.mdio_write = smsc75xx_mdio_write; | |
826 | dev->mii.phy_id_mask = 0x1f; | |
827 | dev->mii.reg_num_mask = 0x1f; | |
c0b92e4d | 828 | dev->mii.supports_gmii = 1; |
d0cad871 SG |
829 | dev->mii.phy_id = SMSC75XX_INTERNAL_PHY_ID; |
830 | ||
831 | /* reset phy and wait for reset to complete */ | |
832 | smsc75xx_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR, BMCR_RESET); | |
833 | ||
834 | do { | |
835 | msleep(10); | |
836 | bmcr = smsc75xx_mdio_read(dev->net, dev->mii.phy_id, MII_BMCR); | |
e3c678e6 SG |
837 | if (bmcr < 0) { |
838 | netdev_warn(dev->net, "Error reading MII_BMCR\n"); | |
839 | return bmcr; | |
840 | } | |
d0cad871 | 841 | timeout++; |
8a1d59d7 | 842 | } while ((bmcr & BMCR_RESET) && (timeout < 100)); |
d0cad871 SG |
843 | |
844 | if (timeout >= 100) { | |
1e1d7412 | 845 | netdev_warn(dev->net, "timeout on PHY Reset\n"); |
d0cad871 SG |
846 | return -EIO; |
847 | } | |
848 | ||
d461e3da YO |
849 | /* phy workaround for gig link */ |
850 | smsc75xx_phy_gig_workaround(dev); | |
851 | ||
d0cad871 SG |
852 | smsc75xx_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE, |
853 | ADVERTISE_ALL | ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP | | |
854 | ADVERTISE_PAUSE_ASYM); | |
c0b92e4d SG |
855 | smsc75xx_mdio_write(dev->net, dev->mii.phy_id, MII_CTRL1000, |
856 | ADVERTISE_1000FULL); | |
d0cad871 | 857 | |
b140504a SG |
858 | /* read and write to clear phy interrupt status */ |
859 | ret = smsc75xx_mdio_read(dev->net, dev->mii.phy_id, PHY_INT_SRC); | |
e3c678e6 SG |
860 | if (ret < 0) { |
861 | netdev_warn(dev->net, "Error reading PHY_INT_SRC\n"); | |
862 | return ret; | |
863 | } | |
864 | ||
b140504a | 865 | smsc75xx_mdio_write(dev->net, dev->mii.phy_id, PHY_INT_SRC, 0xffff); |
d0cad871 SG |
866 | |
867 | smsc75xx_mdio_write(dev->net, dev->mii.phy_id, PHY_INT_MASK, | |
868 | PHY_INT_MASK_DEFAULT); | |
869 | mii_nway_restart(&dev->mii); | |
870 | ||
1e1d7412 | 871 | netif_dbg(dev, ifup, dev->net, "phy initialised successfully\n"); |
d0cad871 SG |
872 | return 0; |
873 | } | |
874 | ||
875 | static int smsc75xx_set_rx_max_frame_length(struct usbnet *dev, int size) | |
876 | { | |
877 | int ret = 0; | |
878 | u32 buf; | |
879 | bool rxenabled; | |
880 | ||
881 | ret = smsc75xx_read_reg(dev, MAC_RX, &buf); | |
e3c678e6 SG |
882 | if (ret < 0) { |
883 | netdev_warn(dev->net, "Failed to read MAC_RX: %d\n", ret); | |
884 | return ret; | |
885 | } | |
d0cad871 SG |
886 | |
887 | rxenabled = ((buf & MAC_RX_RXEN) != 0); | |
888 | ||
889 | if (rxenabled) { | |
890 | buf &= ~MAC_RX_RXEN; | |
891 | ret = smsc75xx_write_reg(dev, MAC_RX, buf); | |
e3c678e6 SG |
892 | if (ret < 0) { |
893 | netdev_warn(dev->net, "Failed to write MAC_RX: %d\n", ret); | |
894 | return ret; | |
895 | } | |
d0cad871 SG |
896 | } |
897 | ||
898 | /* add 4 to size for FCS */ | |
899 | buf &= ~MAC_RX_MAX_SIZE; | |
900 | buf |= (((size + 4) << MAC_RX_MAX_SIZE_SHIFT) & MAC_RX_MAX_SIZE); | |
901 | ||
902 | ret = smsc75xx_write_reg(dev, MAC_RX, buf); | |
e3c678e6 SG |
903 | if (ret < 0) { |
904 | netdev_warn(dev->net, "Failed to write MAC_RX: %d\n", ret); | |
905 | return ret; | |
906 | } | |
d0cad871 SG |
907 | |
908 | if (rxenabled) { | |
909 | buf |= MAC_RX_RXEN; | |
910 | ret = smsc75xx_write_reg(dev, MAC_RX, buf); | |
e3c678e6 SG |
911 | if (ret < 0) { |
912 | netdev_warn(dev->net, "Failed to write MAC_RX: %d\n", ret); | |
913 | return ret; | |
914 | } | |
d0cad871 SG |
915 | } |
916 | ||
917 | return 0; | |
918 | } | |
919 | ||
920 | static int smsc75xx_change_mtu(struct net_device *netdev, int new_mtu) | |
921 | { | |
922 | struct usbnet *dev = netdev_priv(netdev); | |
4c51e536 SG |
923 | int ret; |
924 | ||
4c51e536 | 925 | ret = smsc75xx_set_rx_max_frame_length(dev, new_mtu + ETH_HLEN); |
e3c678e6 SG |
926 | if (ret < 0) { |
927 | netdev_warn(dev->net, "Failed to set mac rx frame length\n"); | |
928 | return ret; | |
929 | } | |
d0cad871 SG |
930 | |
931 | return usbnet_change_mtu(netdev, new_mtu); | |
932 | } | |
933 | ||
78e47fe4 | 934 | /* Enable or disable Rx checksum offload engine */ |
c8f44aff MM |
935 | static int smsc75xx_set_features(struct net_device *netdev, |
936 | netdev_features_t features) | |
78e47fe4 MM |
937 | { |
938 | struct usbnet *dev = netdev_priv(netdev); | |
939 | struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]); | |
940 | unsigned long flags; | |
941 | int ret; | |
942 | ||
943 | spin_lock_irqsave(&pdata->rfe_ctl_lock, flags); | |
944 | ||
945 | if (features & NETIF_F_RXCSUM) | |
946 | pdata->rfe_ctl |= RFE_CTL_TCPUDP_CKM | RFE_CTL_IP_CKM; | |
947 | else | |
948 | pdata->rfe_ctl &= ~(RFE_CTL_TCPUDP_CKM | RFE_CTL_IP_CKM); | |
949 | ||
950 | spin_unlock_irqrestore(&pdata->rfe_ctl_lock, flags); | |
951 | /* it's racing here! */ | |
952 | ||
953 | ret = smsc75xx_write_reg(dev, RFE_CTL, pdata->rfe_ctl); | |
88e80c62 | 954 | if (ret < 0) { |
e3c678e6 | 955 | netdev_warn(dev->net, "Error writing RFE_CTL\n"); |
88e80c62 ED |
956 | return ret; |
957 | } | |
958 | return 0; | |
78e47fe4 MM |
959 | } |
960 | ||
47bbea41 | 961 | static int smsc75xx_wait_ready(struct usbnet *dev, int in_pm) |
8762cec8 SG |
962 | { |
963 | int timeout = 0; | |
964 | ||
965 | do { | |
966 | u32 buf; | |
47bbea41 ML |
967 | int ret; |
968 | ||
969 | ret = __smsc75xx_read_reg(dev, PMT_CTL, &buf, in_pm); | |
970 | ||
e3c678e6 SG |
971 | if (ret < 0) { |
972 | netdev_warn(dev->net, "Failed to read PMT_CTL: %d\n", ret); | |
973 | return ret; | |
974 | } | |
8762cec8 SG |
975 | |
976 | if (buf & PMT_CTL_DEV_RDY) | |
977 | return 0; | |
978 | ||
979 | msleep(10); | |
980 | timeout++; | |
981 | } while (timeout < 100); | |
982 | ||
1e1d7412 | 983 | netdev_warn(dev->net, "timeout waiting for device ready\n"); |
8762cec8 SG |
984 | return -EIO; |
985 | } | |
986 | ||
d461e3da YO |
987 | static int smsc75xx_phy_gig_workaround(struct usbnet *dev) |
988 | { | |
989 | struct mii_if_info *mii = &dev->mii; | |
990 | int ret = 0, timeout = 0; | |
991 | u32 buf, link_up = 0; | |
992 | ||
993 | /* Set the phy in Gig loopback */ | |
994 | smsc75xx_mdio_write(dev->net, mii->phy_id, MII_BMCR, 0x4040); | |
995 | ||
996 | /* Wait for the link up */ | |
997 | do { | |
998 | link_up = smsc75xx_link_ok_nopm(dev); | |
999 | usleep_range(10000, 20000); | |
1000 | timeout++; | |
1001 | } while ((!link_up) && (timeout < 1000)); | |
1002 | ||
1003 | if (timeout >= 1000) { | |
1004 | netdev_warn(dev->net, "Timeout waiting for PHY link up\n"); | |
1005 | return -EIO; | |
1006 | } | |
1007 | ||
1008 | /* phy reset */ | |
1009 | ret = smsc75xx_read_reg(dev, PMT_CTL, &buf); | |
1010 | if (ret < 0) { | |
1011 | netdev_warn(dev->net, "Failed to read PMT_CTL: %d\n", ret); | |
1012 | return ret; | |
1013 | } | |
1014 | ||
1015 | buf |= PMT_CTL_PHY_RST; | |
1016 | ||
1017 | ret = smsc75xx_write_reg(dev, PMT_CTL, buf); | |
1018 | if (ret < 0) { | |
1019 | netdev_warn(dev->net, "Failed to write PMT_CTL: %d\n", ret); | |
1020 | return ret; | |
1021 | } | |
1022 | ||
1023 | timeout = 0; | |
1024 | do { | |
1025 | usleep_range(10000, 20000); | |
1026 | ret = smsc75xx_read_reg(dev, PMT_CTL, &buf); | |
1027 | if (ret < 0) { | |
1028 | netdev_warn(dev->net, "Failed to read PMT_CTL: %d\n", | |
1029 | ret); | |
1030 | return ret; | |
1031 | } | |
1032 | timeout++; | |
1033 | } while ((buf & PMT_CTL_PHY_RST) && (timeout < 100)); | |
1034 | ||
1035 | if (timeout >= 100) { | |
1036 | netdev_warn(dev->net, "timeout waiting for PHY Reset\n"); | |
1037 | return -EIO; | |
1038 | } | |
1039 | ||
1040 | return 0; | |
1041 | } | |
1042 | ||
d0cad871 SG |
1043 | static int smsc75xx_reset(struct usbnet *dev) |
1044 | { | |
1045 | struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]); | |
1046 | u32 buf; | |
1047 | int ret = 0, timeout; | |
1048 | ||
1e1d7412 | 1049 | netif_dbg(dev, ifup, dev->net, "entering smsc75xx_reset\n"); |
d0cad871 | 1050 | |
47bbea41 | 1051 | ret = smsc75xx_wait_ready(dev, 0); |
e3c678e6 SG |
1052 | if (ret < 0) { |
1053 | netdev_warn(dev->net, "device not ready in smsc75xx_reset\n"); | |
1054 | return ret; | |
1055 | } | |
8762cec8 | 1056 | |
d0cad871 | 1057 | ret = smsc75xx_read_reg(dev, HW_CFG, &buf); |
e3c678e6 SG |
1058 | if (ret < 0) { |
1059 | netdev_warn(dev->net, "Failed to read HW_CFG: %d\n", ret); | |
1060 | return ret; | |
1061 | } | |
d0cad871 SG |
1062 | |
1063 | buf |= HW_CFG_LRST; | |
1064 | ||
1065 | ret = smsc75xx_write_reg(dev, HW_CFG, buf); | |
e3c678e6 SG |
1066 | if (ret < 0) { |
1067 | netdev_warn(dev->net, "Failed to write HW_CFG: %d\n", ret); | |
1068 | return ret; | |
1069 | } | |
d0cad871 SG |
1070 | |
1071 | timeout = 0; | |
1072 | do { | |
1073 | msleep(10); | |
1074 | ret = smsc75xx_read_reg(dev, HW_CFG, &buf); | |
e3c678e6 SG |
1075 | if (ret < 0) { |
1076 | netdev_warn(dev->net, "Failed to read HW_CFG: %d\n", ret); | |
1077 | return ret; | |
1078 | } | |
d0cad871 SG |
1079 | timeout++; |
1080 | } while ((buf & HW_CFG_LRST) && (timeout < 100)); | |
1081 | ||
1082 | if (timeout >= 100) { | |
1e1d7412 | 1083 | netdev_warn(dev->net, "timeout on completion of Lite Reset\n"); |
d0cad871 SG |
1084 | return -EIO; |
1085 | } | |
1086 | ||
1e1d7412 | 1087 | netif_dbg(dev, ifup, dev->net, "Lite reset complete, resetting PHY\n"); |
d0cad871 SG |
1088 | |
1089 | ret = smsc75xx_read_reg(dev, PMT_CTL, &buf); | |
e3c678e6 SG |
1090 | if (ret < 0) { |
1091 | netdev_warn(dev->net, "Failed to read PMT_CTL: %d\n", ret); | |
1092 | return ret; | |
1093 | } | |
d0cad871 SG |
1094 | |
1095 | buf |= PMT_CTL_PHY_RST; | |
1096 | ||
1097 | ret = smsc75xx_write_reg(dev, PMT_CTL, buf); | |
e3c678e6 SG |
1098 | if (ret < 0) { |
1099 | netdev_warn(dev->net, "Failed to write PMT_CTL: %d\n", ret); | |
1100 | return ret; | |
1101 | } | |
d0cad871 SG |
1102 | |
1103 | timeout = 0; | |
1104 | do { | |
1105 | msleep(10); | |
1106 | ret = smsc75xx_read_reg(dev, PMT_CTL, &buf); | |
e3c678e6 SG |
1107 | if (ret < 0) { |
1108 | netdev_warn(dev->net, "Failed to read PMT_CTL: %d\n", ret); | |
1109 | return ret; | |
1110 | } | |
d0cad871 SG |
1111 | timeout++; |
1112 | } while ((buf & PMT_CTL_PHY_RST) && (timeout < 100)); | |
1113 | ||
1114 | if (timeout >= 100) { | |
1e1d7412 | 1115 | netdev_warn(dev->net, "timeout waiting for PHY Reset\n"); |
d0cad871 SG |
1116 | return -EIO; |
1117 | } | |
1118 | ||
1e1d7412 | 1119 | netif_dbg(dev, ifup, dev->net, "PHY reset complete\n"); |
d0cad871 | 1120 | |
d0cad871 | 1121 | ret = smsc75xx_set_mac_address(dev); |
e3c678e6 SG |
1122 | if (ret < 0) { |
1123 | netdev_warn(dev->net, "Failed to set mac address\n"); | |
1124 | return ret; | |
1125 | } | |
d0cad871 | 1126 | |
1e1d7412 JP |
1127 | netif_dbg(dev, ifup, dev->net, "MAC Address: %pM\n", |
1128 | dev->net->dev_addr); | |
d0cad871 SG |
1129 | |
1130 | ret = smsc75xx_read_reg(dev, HW_CFG, &buf); | |
e3c678e6 SG |
1131 | if (ret < 0) { |
1132 | netdev_warn(dev->net, "Failed to read HW_CFG: %d\n", ret); | |
1133 | return ret; | |
1134 | } | |
d0cad871 | 1135 | |
1e1d7412 JP |
1136 | netif_dbg(dev, ifup, dev->net, "Read Value from HW_CFG : 0x%08x\n", |
1137 | buf); | |
d0cad871 SG |
1138 | |
1139 | buf |= HW_CFG_BIR; | |
1140 | ||
1141 | ret = smsc75xx_write_reg(dev, HW_CFG, buf); | |
e3c678e6 SG |
1142 | if (ret < 0) { |
1143 | netdev_warn(dev->net, "Failed to write HW_CFG: %d\n", ret); | |
1144 | return ret; | |
1145 | } | |
d0cad871 SG |
1146 | |
1147 | ret = smsc75xx_read_reg(dev, HW_CFG, &buf); | |
e3c678e6 SG |
1148 | if (ret < 0) { |
1149 | netdev_warn(dev->net, "Failed to read HW_CFG: %d\n", ret); | |
1150 | return ret; | |
1151 | } | |
d0cad871 | 1152 | |
1e1d7412 JP |
1153 | netif_dbg(dev, ifup, dev->net, "Read Value from HW_CFG after writing HW_CFG_BIR: 0x%08x\n", |
1154 | buf); | |
d0cad871 SG |
1155 | |
1156 | if (!turbo_mode) { | |
1157 | buf = 0; | |
1158 | dev->rx_urb_size = MAX_SINGLE_PACKET_SIZE; | |
1159 | } else if (dev->udev->speed == USB_SPEED_HIGH) { | |
1160 | buf = DEFAULT_HS_BURST_CAP_SIZE / HS_USB_PKT_SIZE; | |
1161 | dev->rx_urb_size = DEFAULT_HS_BURST_CAP_SIZE; | |
1162 | } else { | |
1163 | buf = DEFAULT_FS_BURST_CAP_SIZE / FS_USB_PKT_SIZE; | |
1164 | dev->rx_urb_size = DEFAULT_FS_BURST_CAP_SIZE; | |
1165 | } | |
1166 | ||
1e1d7412 JP |
1167 | netif_dbg(dev, ifup, dev->net, "rx_urb_size=%ld\n", |
1168 | (ulong)dev->rx_urb_size); | |
d0cad871 SG |
1169 | |
1170 | ret = smsc75xx_write_reg(dev, BURST_CAP, buf); | |
e3c678e6 SG |
1171 | if (ret < 0) { |
1172 | netdev_warn(dev->net, "Failed to write BURST_CAP: %d\n", ret); | |
1173 | return ret; | |
1174 | } | |
d0cad871 SG |
1175 | |
1176 | ret = smsc75xx_read_reg(dev, BURST_CAP, &buf); | |
e3c678e6 SG |
1177 | if (ret < 0) { |
1178 | netdev_warn(dev->net, "Failed to read BURST_CAP: %d\n", ret); | |
1179 | return ret; | |
1180 | } | |
d0cad871 SG |
1181 | |
1182 | netif_dbg(dev, ifup, dev->net, | |
1e1d7412 | 1183 | "Read Value from BURST_CAP after writing: 0x%08x\n", buf); |
d0cad871 SG |
1184 | |
1185 | ret = smsc75xx_write_reg(dev, BULK_IN_DLY, DEFAULT_BULK_IN_DELAY); | |
e3c678e6 SG |
1186 | if (ret < 0) { |
1187 | netdev_warn(dev->net, "Failed to write BULK_IN_DLY: %d\n", ret); | |
1188 | return ret; | |
1189 | } | |
d0cad871 SG |
1190 | |
1191 | ret = smsc75xx_read_reg(dev, BULK_IN_DLY, &buf); | |
e3c678e6 SG |
1192 | if (ret < 0) { |
1193 | netdev_warn(dev->net, "Failed to read BULK_IN_DLY: %d\n", ret); | |
1194 | return ret; | |
1195 | } | |
d0cad871 SG |
1196 | |
1197 | netif_dbg(dev, ifup, dev->net, | |
1e1d7412 | 1198 | "Read Value from BULK_IN_DLY after writing: 0x%08x\n", buf); |
d0cad871 SG |
1199 | |
1200 | if (turbo_mode) { | |
1201 | ret = smsc75xx_read_reg(dev, HW_CFG, &buf); | |
e3c678e6 SG |
1202 | if (ret < 0) { |
1203 | netdev_warn(dev->net, "Failed to read HW_CFG: %d\n", ret); | |
1204 | return ret; | |
1205 | } | |
d0cad871 | 1206 | |
1e1d7412 | 1207 | netif_dbg(dev, ifup, dev->net, "HW_CFG: 0x%08x\n", buf); |
d0cad871 SG |
1208 | |
1209 | buf |= (HW_CFG_MEF | HW_CFG_BCE); | |
1210 | ||
1211 | ret = smsc75xx_write_reg(dev, HW_CFG, buf); | |
e3c678e6 SG |
1212 | if (ret < 0) { |
1213 | netdev_warn(dev->net, "Failed to write HW_CFG: %d\n", ret); | |
1214 | return ret; | |
1215 | } | |
d0cad871 SG |
1216 | |
1217 | ret = smsc75xx_read_reg(dev, HW_CFG, &buf); | |
e3c678e6 SG |
1218 | if (ret < 0) { |
1219 | netdev_warn(dev->net, "Failed to read HW_CFG: %d\n", ret); | |
1220 | return ret; | |
1221 | } | |
d0cad871 | 1222 | |
1e1d7412 | 1223 | netif_dbg(dev, ifup, dev->net, "HW_CFG: 0x%08x\n", buf); |
d0cad871 SG |
1224 | } |
1225 | ||
1226 | /* set FIFO sizes */ | |
1227 | buf = (MAX_RX_FIFO_SIZE - 512) / 512; | |
1228 | ret = smsc75xx_write_reg(dev, FCT_RX_FIFO_END, buf); | |
e3c678e6 SG |
1229 | if (ret < 0) { |
1230 | netdev_warn(dev->net, "Failed to write FCT_RX_FIFO_END: %d\n", ret); | |
1231 | return ret; | |
1232 | } | |
d0cad871 | 1233 | |
1e1d7412 | 1234 | netif_dbg(dev, ifup, dev->net, "FCT_RX_FIFO_END set to 0x%08x\n", buf); |
d0cad871 SG |
1235 | |
1236 | buf = (MAX_TX_FIFO_SIZE - 512) / 512; | |
1237 | ret = smsc75xx_write_reg(dev, FCT_TX_FIFO_END, buf); | |
e3c678e6 SG |
1238 | if (ret < 0) { |
1239 | netdev_warn(dev->net, "Failed to write FCT_TX_FIFO_END: %d\n", ret); | |
1240 | return ret; | |
1241 | } | |
d0cad871 | 1242 | |
1e1d7412 | 1243 | netif_dbg(dev, ifup, dev->net, "FCT_TX_FIFO_END set to 0x%08x\n", buf); |
d0cad871 SG |
1244 | |
1245 | ret = smsc75xx_write_reg(dev, INT_STS, INT_STS_CLEAR_ALL); | |
e3c678e6 SG |
1246 | if (ret < 0) { |
1247 | netdev_warn(dev->net, "Failed to write INT_STS: %d\n", ret); | |
1248 | return ret; | |
1249 | } | |
d0cad871 SG |
1250 | |
1251 | ret = smsc75xx_read_reg(dev, ID_REV, &buf); | |
e3c678e6 SG |
1252 | if (ret < 0) { |
1253 | netdev_warn(dev->net, "Failed to read ID_REV: %d\n", ret); | |
1254 | return ret; | |
1255 | } | |
d0cad871 | 1256 | |
1e1d7412 | 1257 | netif_dbg(dev, ifup, dev->net, "ID_REV = 0x%08x\n", buf); |
d0cad871 | 1258 | |
97138a1c | 1259 | ret = smsc75xx_read_reg(dev, E2P_CMD, &buf); |
e3c678e6 SG |
1260 | if (ret < 0) { |
1261 | netdev_warn(dev->net, "Failed to read E2P_CMD: %d\n", ret); | |
1262 | return ret; | |
1263 | } | |
d0cad871 | 1264 | |
97138a1c SG |
1265 | /* only set default GPIO/LED settings if no EEPROM is detected */ |
1266 | if (!(buf & E2P_CMD_LOADED)) { | |
1267 | ret = smsc75xx_read_reg(dev, LED_GPIO_CFG, &buf); | |
e3c678e6 SG |
1268 | if (ret < 0) { |
1269 | netdev_warn(dev->net, "Failed to read LED_GPIO_CFG: %d\n", ret); | |
1270 | return ret; | |
1271 | } | |
d0cad871 | 1272 | |
97138a1c SG |
1273 | buf &= ~(LED_GPIO_CFG_LED2_FUN_SEL | LED_GPIO_CFG_LED10_FUN_SEL); |
1274 | buf |= LED_GPIO_CFG_LEDGPIO_EN | LED_GPIO_CFG_LED2_FUN_SEL; | |
1275 | ||
1276 | ret = smsc75xx_write_reg(dev, LED_GPIO_CFG, buf); | |
e3c678e6 SG |
1277 | if (ret < 0) { |
1278 | netdev_warn(dev->net, "Failed to write LED_GPIO_CFG: %d\n", ret); | |
1279 | return ret; | |
1280 | } | |
97138a1c | 1281 | } |
d0cad871 SG |
1282 | |
1283 | ret = smsc75xx_write_reg(dev, FLOW, 0); | |
e3c678e6 SG |
1284 | if (ret < 0) { |
1285 | netdev_warn(dev->net, "Failed to write FLOW: %d\n", ret); | |
1286 | return ret; | |
1287 | } | |
d0cad871 SG |
1288 | |
1289 | ret = smsc75xx_write_reg(dev, FCT_FLOW, 0); | |
e3c678e6 SG |
1290 | if (ret < 0) { |
1291 | netdev_warn(dev->net, "Failed to write FCT_FLOW: %d\n", ret); | |
1292 | return ret; | |
1293 | } | |
d0cad871 SG |
1294 | |
1295 | /* Don't need rfe_ctl_lock during initialisation */ | |
1296 | ret = smsc75xx_read_reg(dev, RFE_CTL, &pdata->rfe_ctl); | |
e3c678e6 SG |
1297 | if (ret < 0) { |
1298 | netdev_warn(dev->net, "Failed to read RFE_CTL: %d\n", ret); | |
1299 | return ret; | |
1300 | } | |
d0cad871 SG |
1301 | |
1302 | pdata->rfe_ctl |= RFE_CTL_AB | RFE_CTL_DPF; | |
1303 | ||
1304 | ret = smsc75xx_write_reg(dev, RFE_CTL, pdata->rfe_ctl); | |
e3c678e6 SG |
1305 | if (ret < 0) { |
1306 | netdev_warn(dev->net, "Failed to write RFE_CTL: %d\n", ret); | |
1307 | return ret; | |
1308 | } | |
d0cad871 SG |
1309 | |
1310 | ret = smsc75xx_read_reg(dev, RFE_CTL, &pdata->rfe_ctl); | |
e3c678e6 SG |
1311 | if (ret < 0) { |
1312 | netdev_warn(dev->net, "Failed to read RFE_CTL: %d\n", ret); | |
1313 | return ret; | |
1314 | } | |
d0cad871 | 1315 | |
1e1d7412 JP |
1316 | netif_dbg(dev, ifup, dev->net, "RFE_CTL set to 0x%08x\n", |
1317 | pdata->rfe_ctl); | |
d0cad871 SG |
1318 | |
1319 | /* Enable or disable checksum offload engines */ | |
78e47fe4 | 1320 | smsc75xx_set_features(dev->net, dev->net->features); |
d0cad871 SG |
1321 | |
1322 | smsc75xx_set_multicast(dev->net); | |
1323 | ||
1324 | ret = smsc75xx_phy_initialize(dev); | |
e3c678e6 SG |
1325 | if (ret < 0) { |
1326 | netdev_warn(dev->net, "Failed to initialize PHY: %d\n", ret); | |
1327 | return ret; | |
1328 | } | |
d0cad871 SG |
1329 | |
1330 | ret = smsc75xx_read_reg(dev, INT_EP_CTL, &buf); | |
e3c678e6 SG |
1331 | if (ret < 0) { |
1332 | netdev_warn(dev->net, "Failed to read INT_EP_CTL: %d\n", ret); | |
1333 | return ret; | |
1334 | } | |
d0cad871 SG |
1335 | |
1336 | /* enable PHY interrupts */ | |
1337 | buf |= INT_ENP_PHY_INT; | |
1338 | ||
1339 | ret = smsc75xx_write_reg(dev, INT_EP_CTL, buf); | |
e3c678e6 SG |
1340 | if (ret < 0) { |
1341 | netdev_warn(dev->net, "Failed to write INT_EP_CTL: %d\n", ret); | |
1342 | return ret; | |
1343 | } | |
d0cad871 | 1344 | |
2f3a081e SG |
1345 | /* allow mac to detect speed and duplex from phy */ |
1346 | ret = smsc75xx_read_reg(dev, MAC_CR, &buf); | |
e3c678e6 SG |
1347 | if (ret < 0) { |
1348 | netdev_warn(dev->net, "Failed to read MAC_CR: %d\n", ret); | |
1349 | return ret; | |
1350 | } | |
2f3a081e SG |
1351 | |
1352 | buf |= (MAC_CR_ADD | MAC_CR_ASD); | |
1353 | ret = smsc75xx_write_reg(dev, MAC_CR, buf); | |
e3c678e6 SG |
1354 | if (ret < 0) { |
1355 | netdev_warn(dev->net, "Failed to write MAC_CR: %d\n", ret); | |
1356 | return ret; | |
1357 | } | |
2f3a081e | 1358 | |
d0cad871 | 1359 | ret = smsc75xx_read_reg(dev, MAC_TX, &buf); |
e3c678e6 SG |
1360 | if (ret < 0) { |
1361 | netdev_warn(dev->net, "Failed to read MAC_TX: %d\n", ret); | |
1362 | return ret; | |
1363 | } | |
d0cad871 SG |
1364 | |
1365 | buf |= MAC_TX_TXEN; | |
1366 | ||
1367 | ret = smsc75xx_write_reg(dev, MAC_TX, buf); | |
e3c678e6 SG |
1368 | if (ret < 0) { |
1369 | netdev_warn(dev->net, "Failed to write MAC_TX: %d\n", ret); | |
1370 | return ret; | |
1371 | } | |
d0cad871 | 1372 | |
1e1d7412 | 1373 | netif_dbg(dev, ifup, dev->net, "MAC_TX set to 0x%08x\n", buf); |
d0cad871 SG |
1374 | |
1375 | ret = smsc75xx_read_reg(dev, FCT_TX_CTL, &buf); | |
e3c678e6 SG |
1376 | if (ret < 0) { |
1377 | netdev_warn(dev->net, "Failed to read FCT_TX_CTL: %d\n", ret); | |
1378 | return ret; | |
1379 | } | |
d0cad871 SG |
1380 | |
1381 | buf |= FCT_TX_CTL_EN; | |
1382 | ||
1383 | ret = smsc75xx_write_reg(dev, FCT_TX_CTL, buf); | |
e3c678e6 SG |
1384 | if (ret < 0) { |
1385 | netdev_warn(dev->net, "Failed to write FCT_TX_CTL: %d\n", ret); | |
1386 | return ret; | |
1387 | } | |
d0cad871 | 1388 | |
1e1d7412 | 1389 | netif_dbg(dev, ifup, dev->net, "FCT_TX_CTL set to 0x%08x\n", buf); |
d0cad871 | 1390 | |
4c51e536 | 1391 | ret = smsc75xx_set_rx_max_frame_length(dev, dev->net->mtu + ETH_HLEN); |
e3c678e6 SG |
1392 | if (ret < 0) { |
1393 | netdev_warn(dev->net, "Failed to set max rx frame length\n"); | |
1394 | return ret; | |
1395 | } | |
d0cad871 SG |
1396 | |
1397 | ret = smsc75xx_read_reg(dev, MAC_RX, &buf); | |
e3c678e6 SG |
1398 | if (ret < 0) { |
1399 | netdev_warn(dev->net, "Failed to read MAC_RX: %d\n", ret); | |
1400 | return ret; | |
1401 | } | |
d0cad871 SG |
1402 | |
1403 | buf |= MAC_RX_RXEN; | |
1404 | ||
1405 | ret = smsc75xx_write_reg(dev, MAC_RX, buf); | |
e3c678e6 SG |
1406 | if (ret < 0) { |
1407 | netdev_warn(dev->net, "Failed to write MAC_RX: %d\n", ret); | |
1408 | return ret; | |
1409 | } | |
d0cad871 | 1410 | |
1e1d7412 | 1411 | netif_dbg(dev, ifup, dev->net, "MAC_RX set to 0x%08x\n", buf); |
d0cad871 SG |
1412 | |
1413 | ret = smsc75xx_read_reg(dev, FCT_RX_CTL, &buf); | |
e3c678e6 SG |
1414 | if (ret < 0) { |
1415 | netdev_warn(dev->net, "Failed to read FCT_RX_CTL: %d\n", ret); | |
1416 | return ret; | |
1417 | } | |
d0cad871 SG |
1418 | |
1419 | buf |= FCT_RX_CTL_EN; | |
1420 | ||
1421 | ret = smsc75xx_write_reg(dev, FCT_RX_CTL, buf); | |
e3c678e6 SG |
1422 | if (ret < 0) { |
1423 | netdev_warn(dev->net, "Failed to write FCT_RX_CTL: %d\n", ret); | |
1424 | return ret; | |
1425 | } | |
d0cad871 | 1426 | |
1e1d7412 | 1427 | netif_dbg(dev, ifup, dev->net, "FCT_RX_CTL set to 0x%08x\n", buf); |
d0cad871 | 1428 | |
1e1d7412 | 1429 | netif_dbg(dev, ifup, dev->net, "smsc75xx_reset, return 0\n"); |
d0cad871 SG |
1430 | return 0; |
1431 | } | |
1432 | ||
1433 | static const struct net_device_ops smsc75xx_netdev_ops = { | |
1434 | .ndo_open = usbnet_open, | |
1435 | .ndo_stop = usbnet_stop, | |
1436 | .ndo_start_xmit = usbnet_start_xmit, | |
1437 | .ndo_tx_timeout = usbnet_tx_timeout, | |
c8b5d129 | 1438 | .ndo_get_stats64 = usbnet_get_stats64, |
d0cad871 SG |
1439 | .ndo_change_mtu = smsc75xx_change_mtu, |
1440 | .ndo_set_mac_address = eth_mac_addr, | |
1441 | .ndo_validate_addr = eth_validate_addr, | |
1442 | .ndo_do_ioctl = smsc75xx_ioctl, | |
afc4b13d | 1443 | .ndo_set_rx_mode = smsc75xx_set_multicast, |
78e47fe4 | 1444 | .ndo_set_features = smsc75xx_set_features, |
d0cad871 SG |
1445 | }; |
1446 | ||
1447 | static int smsc75xx_bind(struct usbnet *dev, struct usb_interface *intf) | |
1448 | { | |
1449 | struct smsc75xx_priv *pdata = NULL; | |
1450 | int ret; | |
1451 | ||
1452 | printk(KERN_INFO SMSC_CHIPNAME " v" SMSC_DRIVER_VERSION "\n"); | |
1453 | ||
1454 | ret = usbnet_get_endpoints(dev, intf); | |
e3c678e6 SG |
1455 | if (ret < 0) { |
1456 | netdev_warn(dev->net, "usbnet_get_endpoints failed: %d\n", ret); | |
1457 | return ret; | |
1458 | } | |
d0cad871 SG |
1459 | |
1460 | dev->data[0] = (unsigned long)kzalloc(sizeof(struct smsc75xx_priv), | |
38673c82 | 1461 | GFP_KERNEL); |
d0cad871 SG |
1462 | |
1463 | pdata = (struct smsc75xx_priv *)(dev->data[0]); | |
38673c82 | 1464 | if (!pdata) |
d0cad871 | 1465 | return -ENOMEM; |
d0cad871 SG |
1466 | |
1467 | pdata->dev = dev; | |
1468 | ||
1469 | spin_lock_init(&pdata->rfe_ctl_lock); | |
1470 | mutex_init(&pdata->dataport_mutex); | |
1471 | ||
1472 | INIT_WORK(&pdata->set_multicast, smsc75xx_deferred_multicast_write); | |
1473 | ||
20f01703 | 1474 | if (DEFAULT_TX_CSUM_ENABLE) |
78e47fe4 | 1475 | dev->net->features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM; |
20f01703 | 1476 | |
78e47fe4 MM |
1477 | if (DEFAULT_RX_CSUM_ENABLE) |
1478 | dev->net->features |= NETIF_F_RXCSUM; | |
d0cad871 | 1479 | |
78e47fe4 | 1480 | dev->net->hw_features = NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM | |
20f01703 | 1481 | NETIF_F_RXCSUM; |
d0cad871 | 1482 | |
481705a1 SG |
1483 | ret = smsc75xx_wait_ready(dev, 0); |
1484 | if (ret < 0) { | |
1485 | netdev_warn(dev->net, "device not ready in smsc75xx_bind\n"); | |
1486 | return ret; | |
1487 | } | |
1488 | ||
1489 | smsc75xx_init_mac_address(dev); | |
1490 | ||
d0cad871 SG |
1491 | /* Init all registers */ |
1492 | ret = smsc75xx_reset(dev); | |
e3c678e6 SG |
1493 | if (ret < 0) { |
1494 | netdev_warn(dev->net, "smsc75xx_reset error %d\n", ret); | |
1495 | return ret; | |
1496 | } | |
d0cad871 SG |
1497 | |
1498 | dev->net->netdev_ops = &smsc75xx_netdev_ops; | |
1499 | dev->net->ethtool_ops = &smsc75xx_ethtool_ops; | |
1500 | dev->net->flags |= IFF_MULTICAST; | |
1501 | dev->net->hard_header_len += SMSC75XX_TX_OVERHEAD; | |
a99ff7d0 | 1502 | dev->hard_mtu = dev->net->mtu + dev->net->hard_header_len; |
f77f0aee | 1503 | dev->net->max_mtu = MAX_SINGLE_PACKET_SIZE; |
d0cad871 SG |
1504 | return 0; |
1505 | } | |
1506 | ||
1507 | static void smsc75xx_unbind(struct usbnet *dev, struct usb_interface *intf) | |
1508 | { | |
1509 | struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]); | |
1510 | if (pdata) { | |
f7b2a56e | 1511 | cancel_work_sync(&pdata->set_multicast); |
1e1d7412 | 1512 | netif_dbg(dev, ifdown, dev->net, "free pdata\n"); |
d0cad871 SG |
1513 | kfree(pdata); |
1514 | pdata = NULL; | |
1515 | dev->data[0] = 0; | |
1516 | } | |
1517 | } | |
1518 | ||
899a391b SG |
1519 | static u16 smsc_crc(const u8 *buffer, size_t len) |
1520 | { | |
1521 | return bitrev16(crc16(0xFFFF, buffer, len)); | |
1522 | } | |
1523 | ||
1524 | static int smsc75xx_write_wuff(struct usbnet *dev, int filter, u32 wuf_cfg, | |
1525 | u32 wuf_mask1) | |
1526 | { | |
1527 | int cfg_base = WUF_CFGX + filter * 4; | |
1528 | int mask_base = WUF_MASKX + filter * 16; | |
1529 | int ret; | |
1530 | ||
1531 | ret = smsc75xx_write_reg(dev, cfg_base, wuf_cfg); | |
e3c678e6 SG |
1532 | if (ret < 0) { |
1533 | netdev_warn(dev->net, "Error writing WUF_CFGX\n"); | |
1534 | return ret; | |
1535 | } | |
899a391b SG |
1536 | |
1537 | ret = smsc75xx_write_reg(dev, mask_base, wuf_mask1); | |
e3c678e6 SG |
1538 | if (ret < 0) { |
1539 | netdev_warn(dev->net, "Error writing WUF_MASKX\n"); | |
1540 | return ret; | |
1541 | } | |
899a391b SG |
1542 | |
1543 | ret = smsc75xx_write_reg(dev, mask_base + 4, 0); | |
e3c678e6 SG |
1544 | if (ret < 0) { |
1545 | netdev_warn(dev->net, "Error writing WUF_MASKX\n"); | |
1546 | return ret; | |
1547 | } | |
899a391b SG |
1548 | |
1549 | ret = smsc75xx_write_reg(dev, mask_base + 8, 0); | |
e3c678e6 SG |
1550 | if (ret < 0) { |
1551 | netdev_warn(dev->net, "Error writing WUF_MASKX\n"); | |
1552 | return ret; | |
1553 | } | |
899a391b SG |
1554 | |
1555 | ret = smsc75xx_write_reg(dev, mask_base + 12, 0); | |
e3c678e6 SG |
1556 | if (ret < 0) { |
1557 | netdev_warn(dev->net, "Error writing WUF_MASKX\n"); | |
1558 | return ret; | |
1559 | } | |
899a391b SG |
1560 | |
1561 | return 0; | |
1562 | } | |
1563 | ||
9deb2757 SG |
1564 | static int smsc75xx_enter_suspend0(struct usbnet *dev) |
1565 | { | |
b4cdea9c | 1566 | struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]); |
9deb2757 SG |
1567 | u32 val; |
1568 | int ret; | |
1569 | ||
1570 | ret = smsc75xx_read_reg_nopm(dev, PMT_CTL, &val); | |
e3c678e6 SG |
1571 | if (ret < 0) { |
1572 | netdev_warn(dev->net, "Error reading PMT_CTL\n"); | |
1573 | return ret; | |
1574 | } | |
9deb2757 SG |
1575 | |
1576 | val &= (~(PMT_CTL_SUS_MODE | PMT_CTL_PHY_RST)); | |
1577 | val |= PMT_CTL_SUS_MODE_0 | PMT_CTL_WOL_EN | PMT_CTL_WUPS; | |
1578 | ||
1579 | ret = smsc75xx_write_reg_nopm(dev, PMT_CTL, val); | |
e3c678e6 SG |
1580 | if (ret < 0) { |
1581 | netdev_warn(dev->net, "Error writing PMT_CTL\n"); | |
1582 | return ret; | |
1583 | } | |
9deb2757 | 1584 | |
351f33d9 | 1585 | pdata->suspend_flags |= SUSPEND_SUSPEND0; |
b4cdea9c | 1586 | |
9deb2757 SG |
1587 | return 0; |
1588 | } | |
1589 | ||
f329ccdc SG |
1590 | static int smsc75xx_enter_suspend1(struct usbnet *dev) |
1591 | { | |
b4cdea9c | 1592 | struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]); |
f329ccdc SG |
1593 | u32 val; |
1594 | int ret; | |
1595 | ||
1596 | ret = smsc75xx_read_reg_nopm(dev, PMT_CTL, &val); | |
e3c678e6 SG |
1597 | if (ret < 0) { |
1598 | netdev_warn(dev->net, "Error reading PMT_CTL\n"); | |
1599 | return ret; | |
1600 | } | |
f329ccdc SG |
1601 | |
1602 | val &= ~(PMT_CTL_SUS_MODE | PMT_CTL_WUPS | PMT_CTL_PHY_RST); | |
1603 | val |= PMT_CTL_SUS_MODE_1; | |
1604 | ||
1605 | ret = smsc75xx_write_reg_nopm(dev, PMT_CTL, val); | |
e3c678e6 SG |
1606 | if (ret < 0) { |
1607 | netdev_warn(dev->net, "Error writing PMT_CTL\n"); | |
1608 | return ret; | |
1609 | } | |
f329ccdc SG |
1610 | |
1611 | /* clear wol status, enable energy detection */ | |
1612 | val &= ~PMT_CTL_WUPS; | |
1613 | val |= (PMT_CTL_WUPS_ED | PMT_CTL_ED_EN); | |
1614 | ||
1615 | ret = smsc75xx_write_reg_nopm(dev, PMT_CTL, val); | |
e3c678e6 SG |
1616 | if (ret < 0) { |
1617 | netdev_warn(dev->net, "Error writing PMT_CTL\n"); | |
1618 | return ret; | |
1619 | } | |
f329ccdc | 1620 | |
351f33d9 | 1621 | pdata->suspend_flags |= SUSPEND_SUSPEND1; |
b4cdea9c | 1622 | |
f329ccdc SG |
1623 | return 0; |
1624 | } | |
1625 | ||
9deb2757 SG |
1626 | static int smsc75xx_enter_suspend2(struct usbnet *dev) |
1627 | { | |
b4cdea9c | 1628 | struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]); |
9deb2757 SG |
1629 | u32 val; |
1630 | int ret; | |
1631 | ||
1632 | ret = smsc75xx_read_reg_nopm(dev, PMT_CTL, &val); | |
e3c678e6 SG |
1633 | if (ret < 0) { |
1634 | netdev_warn(dev->net, "Error reading PMT_CTL\n"); | |
1635 | return ret; | |
1636 | } | |
9deb2757 SG |
1637 | |
1638 | val &= ~(PMT_CTL_SUS_MODE | PMT_CTL_WUPS | PMT_CTL_PHY_RST); | |
1639 | val |= PMT_CTL_SUS_MODE_2; | |
1640 | ||
1641 | ret = smsc75xx_write_reg_nopm(dev, PMT_CTL, val); | |
e3c678e6 SG |
1642 | if (ret < 0) { |
1643 | netdev_warn(dev->net, "Error writing PMT_CTL\n"); | |
1644 | return ret; | |
1645 | } | |
9deb2757 | 1646 | |
b4cdea9c SG |
1647 | pdata->suspend_flags |= SUSPEND_SUSPEND2; |
1648 | ||
1649 | return 0; | |
1650 | } | |
1651 | ||
1652 | static int smsc75xx_enter_suspend3(struct usbnet *dev) | |
1653 | { | |
1654 | struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]); | |
1655 | u32 val; | |
1656 | int ret; | |
1657 | ||
1658 | ret = smsc75xx_read_reg_nopm(dev, FCT_RX_CTL, &val); | |
e3c678e6 SG |
1659 | if (ret < 0) { |
1660 | netdev_warn(dev->net, "Error reading FCT_RX_CTL\n"); | |
1661 | return ret; | |
1662 | } | |
b4cdea9c SG |
1663 | |
1664 | if (val & FCT_RX_CTL_RXUSED) { | |
1665 | netdev_dbg(dev->net, "rx fifo not empty in autosuspend\n"); | |
1666 | return -EBUSY; | |
1667 | } | |
1668 | ||
1669 | ret = smsc75xx_read_reg_nopm(dev, PMT_CTL, &val); | |
e3c678e6 SG |
1670 | if (ret < 0) { |
1671 | netdev_warn(dev->net, "Error reading PMT_CTL\n"); | |
1672 | return ret; | |
1673 | } | |
b4cdea9c SG |
1674 | |
1675 | val &= ~(PMT_CTL_SUS_MODE | PMT_CTL_WUPS | PMT_CTL_PHY_RST); | |
1676 | val |= PMT_CTL_SUS_MODE_3 | PMT_CTL_RES_CLR_WKP_EN; | |
1677 | ||
1678 | ret = smsc75xx_write_reg_nopm(dev, PMT_CTL, val); | |
e3c678e6 SG |
1679 | if (ret < 0) { |
1680 | netdev_warn(dev->net, "Error writing PMT_CTL\n"); | |
1681 | return ret; | |
1682 | } | |
b4cdea9c SG |
1683 | |
1684 | /* clear wol status */ | |
1685 | val &= ~PMT_CTL_WUPS; | |
1686 | val |= PMT_CTL_WUPS_WOL; | |
1687 | ||
1688 | ret = smsc75xx_write_reg_nopm(dev, PMT_CTL, val); | |
e3c678e6 SG |
1689 | if (ret < 0) { |
1690 | netdev_warn(dev->net, "Error writing PMT_CTL\n"); | |
1691 | return ret; | |
1692 | } | |
b4cdea9c | 1693 | |
351f33d9 | 1694 | pdata->suspend_flags |= SUSPEND_SUSPEND3; |
b4cdea9c | 1695 | |
9deb2757 SG |
1696 | return 0; |
1697 | } | |
1698 | ||
f329ccdc SG |
1699 | static int smsc75xx_enable_phy_wakeup_interrupts(struct usbnet *dev, u16 mask) |
1700 | { | |
1701 | struct mii_if_info *mii = &dev->mii; | |
1702 | int ret; | |
1703 | ||
1704 | netdev_dbg(dev->net, "enabling PHY wakeup interrupts\n"); | |
1705 | ||
1706 | /* read to clear */ | |
1707 | ret = smsc75xx_mdio_read_nopm(dev->net, mii->phy_id, PHY_INT_SRC); | |
e3c678e6 SG |
1708 | if (ret < 0) { |
1709 | netdev_warn(dev->net, "Error reading PHY_INT_SRC\n"); | |
1710 | return ret; | |
1711 | } | |
f329ccdc SG |
1712 | |
1713 | /* enable interrupt source */ | |
1714 | ret = smsc75xx_mdio_read_nopm(dev->net, mii->phy_id, PHY_INT_MASK); | |
e3c678e6 SG |
1715 | if (ret < 0) { |
1716 | netdev_warn(dev->net, "Error reading PHY_INT_MASK\n"); | |
1717 | return ret; | |
1718 | } | |
f329ccdc SG |
1719 | |
1720 | ret |= mask; | |
1721 | ||
1722 | smsc75xx_mdio_write_nopm(dev->net, mii->phy_id, PHY_INT_MASK, ret); | |
1723 | ||
1724 | return 0; | |
1725 | } | |
1726 | ||
1727 | static int smsc75xx_link_ok_nopm(struct usbnet *dev) | |
1728 | { | |
1729 | struct mii_if_info *mii = &dev->mii; | |
1730 | int ret; | |
1731 | ||
1732 | /* first, a dummy read, needed to latch some MII phys */ | |
1733 | ret = smsc75xx_mdio_read_nopm(dev->net, mii->phy_id, MII_BMSR); | |
e3c678e6 SG |
1734 | if (ret < 0) { |
1735 | netdev_warn(dev->net, "Error reading MII_BMSR\n"); | |
1736 | return ret; | |
1737 | } | |
f329ccdc SG |
1738 | |
1739 | ret = smsc75xx_mdio_read_nopm(dev->net, mii->phy_id, MII_BMSR); | |
e3c678e6 SG |
1740 | if (ret < 0) { |
1741 | netdev_warn(dev->net, "Error reading MII_BMSR\n"); | |
1742 | return ret; | |
1743 | } | |
f329ccdc SG |
1744 | |
1745 | return !!(ret & BMSR_LSTATUS); | |
1746 | } | |
1747 | ||
b4cdea9c SG |
1748 | static int smsc75xx_autosuspend(struct usbnet *dev, u32 link_up) |
1749 | { | |
1750 | int ret; | |
1751 | ||
1752 | if (!netif_running(dev->net)) { | |
1753 | /* interface is ifconfig down so fully power down hw */ | |
1754 | netdev_dbg(dev->net, "autosuspend entering SUSPEND2\n"); | |
1755 | return smsc75xx_enter_suspend2(dev); | |
1756 | } | |
1757 | ||
1758 | if (!link_up) { | |
1759 | /* link is down so enter EDPD mode */ | |
1760 | netdev_dbg(dev->net, "autosuspend entering SUSPEND1\n"); | |
1761 | ||
1762 | /* enable PHY wakeup events for if cable is attached */ | |
1763 | ret = smsc75xx_enable_phy_wakeup_interrupts(dev, | |
1764 | PHY_INT_MASK_ANEG_COMP); | |
e3c678e6 SG |
1765 | if (ret < 0) { |
1766 | netdev_warn(dev->net, "error enabling PHY wakeup ints\n"); | |
1767 | return ret; | |
1768 | } | |
b4cdea9c SG |
1769 | |
1770 | netdev_info(dev->net, "entering SUSPEND1 mode\n"); | |
1771 | return smsc75xx_enter_suspend1(dev); | |
1772 | } | |
1773 | ||
1774 | /* enable PHY wakeup events so we remote wakeup if cable is pulled */ | |
1775 | ret = smsc75xx_enable_phy_wakeup_interrupts(dev, | |
1776 | PHY_INT_MASK_LINK_DOWN); | |
e3c678e6 SG |
1777 | if (ret < 0) { |
1778 | netdev_warn(dev->net, "error enabling PHY wakeup ints\n"); | |
1779 | return ret; | |
1780 | } | |
b4cdea9c SG |
1781 | |
1782 | netdev_dbg(dev->net, "autosuspend entering SUSPEND3\n"); | |
1783 | return smsc75xx_enter_suspend3(dev); | |
1784 | } | |
1785 | ||
16c79a04 SG |
1786 | static int smsc75xx_suspend(struct usb_interface *intf, pm_message_t message) |
1787 | { | |
1788 | struct usbnet *dev = usb_get_intfdata(intf); | |
6c636503 | 1789 | struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]); |
f329ccdc | 1790 | u32 val, link_up; |
16c79a04 | 1791 | int ret; |
16c79a04 | 1792 | |
16c79a04 | 1793 | ret = usbnet_suspend(intf, message); |
e3c678e6 SG |
1794 | if (ret < 0) { |
1795 | netdev_warn(dev->net, "usbnet_suspend error\n"); | |
1796 | return ret; | |
1797 | } | |
16c79a04 | 1798 | |
b4cdea9c SG |
1799 | if (pdata->suspend_flags) { |
1800 | netdev_warn(dev->net, "error during last resume\n"); | |
1801 | pdata->suspend_flags = 0; | |
1802 | } | |
1803 | ||
f329ccdc SG |
1804 | /* determine if link is up using only _nopm functions */ |
1805 | link_up = smsc75xx_link_ok_nopm(dev); | |
1806 | ||
b4cdea9c SG |
1807 | if (message.event == PM_EVENT_AUTO_SUSPEND) { |
1808 | ret = smsc75xx_autosuspend(dev, link_up); | |
1809 | goto done; | |
1810 | } | |
1811 | ||
1812 | /* if we get this far we're not autosuspending */ | |
f329ccdc SG |
1813 | /* if no wol options set, or if link is down and we're not waking on |
1814 | * PHY activity, enter lowest power SUSPEND2 mode | |
1815 | */ | |
1816 | if (!(pdata->wolopts & SUPPORTED_WAKE) || | |
1817 | !(link_up || (pdata->wolopts & WAKE_PHY))) { | |
1e1d7412 | 1818 | netdev_info(dev->net, "entering SUSPEND2 mode\n"); |
6c636503 SG |
1819 | |
1820 | /* disable energy detect (link up) & wake up events */ | |
47bbea41 | 1821 | ret = smsc75xx_read_reg_nopm(dev, WUCSR, &val); |
e3c678e6 SG |
1822 | if (ret < 0) { |
1823 | netdev_warn(dev->net, "Error reading WUCSR\n"); | |
1824 | goto done; | |
1825 | } | |
6c636503 SG |
1826 | |
1827 | val &= ~(WUCSR_MPEN | WUCSR_WUEN); | |
1828 | ||
47bbea41 | 1829 | ret = smsc75xx_write_reg_nopm(dev, WUCSR, val); |
e3c678e6 SG |
1830 | if (ret < 0) { |
1831 | netdev_warn(dev->net, "Error writing WUCSR\n"); | |
1832 | goto done; | |
1833 | } | |
6c636503 | 1834 | |
47bbea41 | 1835 | ret = smsc75xx_read_reg_nopm(dev, PMT_CTL, &val); |
e3c678e6 SG |
1836 | if (ret < 0) { |
1837 | netdev_warn(dev->net, "Error reading PMT_CTL\n"); | |
1838 | goto done; | |
1839 | } | |
6c636503 SG |
1840 | |
1841 | val &= ~(PMT_CTL_ED_EN | PMT_CTL_WOL_EN); | |
1842 | ||
47bbea41 | 1843 | ret = smsc75xx_write_reg_nopm(dev, PMT_CTL, val); |
e3c678e6 SG |
1844 | if (ret < 0) { |
1845 | netdev_warn(dev->net, "Error writing PMT_CTL\n"); | |
1846 | goto done; | |
1847 | } | |
6c636503 | 1848 | |
eacdd6c2 SG |
1849 | ret = smsc75xx_enter_suspend2(dev); |
1850 | goto done; | |
6c636503 SG |
1851 | } |
1852 | ||
f329ccdc SG |
1853 | if (pdata->wolopts & WAKE_PHY) { |
1854 | ret = smsc75xx_enable_phy_wakeup_interrupts(dev, | |
1855 | (PHY_INT_MASK_ANEG_COMP | PHY_INT_MASK_LINK_DOWN)); | |
e3c678e6 SG |
1856 | if (ret < 0) { |
1857 | netdev_warn(dev->net, "error enabling PHY wakeup ints\n"); | |
1858 | goto done; | |
1859 | } | |
f329ccdc SG |
1860 | |
1861 | /* if link is down then configure EDPD and enter SUSPEND1, | |
1862 | * otherwise enter SUSPEND0 below | |
1863 | */ | |
1864 | if (!link_up) { | |
1865 | struct mii_if_info *mii = &dev->mii; | |
1866 | netdev_info(dev->net, "entering SUSPEND1 mode\n"); | |
1867 | ||
1868 | /* enable energy detect power-down mode */ | |
1869 | ret = smsc75xx_mdio_read_nopm(dev->net, mii->phy_id, | |
1870 | PHY_MODE_CTRL_STS); | |
e3c678e6 SG |
1871 | if (ret < 0) { |
1872 | netdev_warn(dev->net, "Error reading PHY_MODE_CTRL_STS\n"); | |
1873 | goto done; | |
1874 | } | |
f329ccdc SG |
1875 | |
1876 | ret |= MODE_CTRL_STS_EDPWRDOWN; | |
1877 | ||
1878 | smsc75xx_mdio_write_nopm(dev->net, mii->phy_id, | |
1879 | PHY_MODE_CTRL_STS, ret); | |
1880 | ||
1881 | /* enter SUSPEND1 mode */ | |
eacdd6c2 SG |
1882 | ret = smsc75xx_enter_suspend1(dev); |
1883 | goto done; | |
f329ccdc SG |
1884 | } |
1885 | } | |
1886 | ||
899a391b SG |
1887 | if (pdata->wolopts & (WAKE_MCAST | WAKE_ARP)) { |
1888 | int i, filter = 0; | |
1889 | ||
1890 | /* disable all filters */ | |
1891 | for (i = 0; i < WUF_NUM; i++) { | |
47bbea41 | 1892 | ret = smsc75xx_write_reg_nopm(dev, WUF_CFGX + i * 4, 0); |
e3c678e6 SG |
1893 | if (ret < 0) { |
1894 | netdev_warn(dev->net, "Error writing WUF_CFGX\n"); | |
1895 | goto done; | |
1896 | } | |
899a391b SG |
1897 | } |
1898 | ||
1899 | if (pdata->wolopts & WAKE_MCAST) { | |
1900 | const u8 mcast[] = {0x01, 0x00, 0x5E}; | |
1e1d7412 | 1901 | netdev_info(dev->net, "enabling multicast detection\n"); |
899a391b SG |
1902 | |
1903 | val = WUF_CFGX_EN | WUF_CFGX_ATYPE_MULTICAST | |
1904 | | smsc_crc(mcast, 3); | |
1905 | ret = smsc75xx_write_wuff(dev, filter++, val, 0x0007); | |
e3c678e6 SG |
1906 | if (ret < 0) { |
1907 | netdev_warn(dev->net, "Error writing wakeup filter\n"); | |
1908 | goto done; | |
1909 | } | |
899a391b SG |
1910 | } |
1911 | ||
1912 | if (pdata->wolopts & WAKE_ARP) { | |
1913 | const u8 arp[] = {0x08, 0x06}; | |
1e1d7412 | 1914 | netdev_info(dev->net, "enabling ARP detection\n"); |
899a391b SG |
1915 | |
1916 | val = WUF_CFGX_EN | WUF_CFGX_ATYPE_ALL | (0x0C << 16) | |
1917 | | smsc_crc(arp, 2); | |
1918 | ret = smsc75xx_write_wuff(dev, filter++, val, 0x0003); | |
e3c678e6 SG |
1919 | if (ret < 0) { |
1920 | netdev_warn(dev->net, "Error writing wakeup filter\n"); | |
1921 | goto done; | |
1922 | } | |
899a391b SG |
1923 | } |
1924 | ||
1925 | /* clear any pending pattern match packet status */ | |
47bbea41 | 1926 | ret = smsc75xx_read_reg_nopm(dev, WUCSR, &val); |
e3c678e6 SG |
1927 | if (ret < 0) { |
1928 | netdev_warn(dev->net, "Error reading WUCSR\n"); | |
1929 | goto done; | |
1930 | } | |
899a391b SG |
1931 | |
1932 | val |= WUCSR_WUFR; | |
1933 | ||
47bbea41 | 1934 | ret = smsc75xx_write_reg_nopm(dev, WUCSR, val); |
e3c678e6 SG |
1935 | if (ret < 0) { |
1936 | netdev_warn(dev->net, "Error writing WUCSR\n"); | |
1937 | goto done; | |
1938 | } | |
899a391b | 1939 | |
1e1d7412 | 1940 | netdev_info(dev->net, "enabling packet match detection\n"); |
47bbea41 | 1941 | ret = smsc75xx_read_reg_nopm(dev, WUCSR, &val); |
e3c678e6 SG |
1942 | if (ret < 0) { |
1943 | netdev_warn(dev->net, "Error reading WUCSR\n"); | |
1944 | goto done; | |
1945 | } | |
899a391b SG |
1946 | |
1947 | val |= WUCSR_WUEN; | |
1948 | ||
47bbea41 | 1949 | ret = smsc75xx_write_reg_nopm(dev, WUCSR, val); |
e3c678e6 SG |
1950 | if (ret < 0) { |
1951 | netdev_warn(dev->net, "Error writing WUCSR\n"); | |
1952 | goto done; | |
1953 | } | |
899a391b | 1954 | } else { |
1e1d7412 | 1955 | netdev_info(dev->net, "disabling packet match detection\n"); |
47bbea41 | 1956 | ret = smsc75xx_read_reg_nopm(dev, WUCSR, &val); |
e3c678e6 SG |
1957 | if (ret < 0) { |
1958 | netdev_warn(dev->net, "Error reading WUCSR\n"); | |
1959 | goto done; | |
1960 | } | |
6c636503 | 1961 | |
899a391b | 1962 | val &= ~WUCSR_WUEN; |
16c79a04 | 1963 | |
47bbea41 | 1964 | ret = smsc75xx_write_reg_nopm(dev, WUCSR, val); |
e3c678e6 SG |
1965 | if (ret < 0) { |
1966 | netdev_warn(dev->net, "Error writing WUCSR\n"); | |
1967 | goto done; | |
1968 | } | |
6c636503 SG |
1969 | } |
1970 | ||
899a391b | 1971 | /* disable magic, bcast & unicast wakeup sources */ |
47bbea41 | 1972 | ret = smsc75xx_read_reg_nopm(dev, WUCSR, &val); |
e3c678e6 SG |
1973 | if (ret < 0) { |
1974 | netdev_warn(dev->net, "Error reading WUCSR\n"); | |
1975 | goto done; | |
1976 | } | |
6c636503 | 1977 | |
899a391b SG |
1978 | val &= ~(WUCSR_MPEN | WUCSR_BCST_EN | WUCSR_PFDA_EN); |
1979 | ||
47bbea41 | 1980 | ret = smsc75xx_write_reg_nopm(dev, WUCSR, val); |
e3c678e6 SG |
1981 | if (ret < 0) { |
1982 | netdev_warn(dev->net, "Error writing WUCSR\n"); | |
1983 | goto done; | |
1984 | } | |
899a391b | 1985 | |
f329ccdc SG |
1986 | if (pdata->wolopts & WAKE_PHY) { |
1987 | netdev_info(dev->net, "enabling PHY wakeup\n"); | |
1988 | ||
1989 | ret = smsc75xx_read_reg_nopm(dev, PMT_CTL, &val); | |
e3c678e6 SG |
1990 | if (ret < 0) { |
1991 | netdev_warn(dev->net, "Error reading PMT_CTL\n"); | |
1992 | goto done; | |
1993 | } | |
f329ccdc SG |
1994 | |
1995 | /* clear wol status, enable energy detection */ | |
1996 | val &= ~PMT_CTL_WUPS; | |
1997 | val |= (PMT_CTL_WUPS_ED | PMT_CTL_ED_EN); | |
1998 | ||
1999 | ret = smsc75xx_write_reg_nopm(dev, PMT_CTL, val); | |
e3c678e6 SG |
2000 | if (ret < 0) { |
2001 | netdev_warn(dev->net, "Error writing PMT_CTL\n"); | |
2002 | goto done; | |
2003 | } | |
f329ccdc SG |
2004 | } |
2005 | ||
6c636503 | 2006 | if (pdata->wolopts & WAKE_MAGIC) { |
1e1d7412 | 2007 | netdev_info(dev->net, "enabling magic packet wakeup\n"); |
47bbea41 | 2008 | ret = smsc75xx_read_reg_nopm(dev, WUCSR, &val); |
e3c678e6 SG |
2009 | if (ret < 0) { |
2010 | netdev_warn(dev->net, "Error reading WUCSR\n"); | |
2011 | goto done; | |
2012 | } | |
899a391b SG |
2013 | |
2014 | /* clear any pending magic packet status */ | |
2015 | val |= WUCSR_MPR | WUCSR_MPEN; | |
2016 | ||
47bbea41 | 2017 | ret = smsc75xx_write_reg_nopm(dev, WUCSR, val); |
e3c678e6 SG |
2018 | if (ret < 0) { |
2019 | netdev_warn(dev->net, "Error writing WUCSR\n"); | |
2020 | goto done; | |
2021 | } | |
6c636503 SG |
2022 | } |
2023 | ||
899a391b | 2024 | if (pdata->wolopts & WAKE_BCAST) { |
1e1d7412 | 2025 | netdev_info(dev->net, "enabling broadcast detection\n"); |
47bbea41 | 2026 | ret = smsc75xx_read_reg_nopm(dev, WUCSR, &val); |
e3c678e6 SG |
2027 | if (ret < 0) { |
2028 | netdev_warn(dev->net, "Error reading WUCSR\n"); | |
2029 | goto done; | |
2030 | } | |
6c636503 | 2031 | |
899a391b | 2032 | val |= WUCSR_BCAST_FR | WUCSR_BCST_EN; |
16c79a04 | 2033 | |
47bbea41 | 2034 | ret = smsc75xx_write_reg_nopm(dev, WUCSR, val); |
e3c678e6 SG |
2035 | if (ret < 0) { |
2036 | netdev_warn(dev->net, "Error writing WUCSR\n"); | |
2037 | goto done; | |
2038 | } | |
899a391b | 2039 | } |
6c636503 | 2040 | |
899a391b | 2041 | if (pdata->wolopts & WAKE_UCAST) { |
1e1d7412 | 2042 | netdev_info(dev->net, "enabling unicast detection\n"); |
47bbea41 | 2043 | ret = smsc75xx_read_reg_nopm(dev, WUCSR, &val); |
e3c678e6 SG |
2044 | if (ret < 0) { |
2045 | netdev_warn(dev->net, "Error reading WUCSR\n"); | |
2046 | goto done; | |
2047 | } | |
899a391b SG |
2048 | |
2049 | val |= WUCSR_WUFR | WUCSR_PFDA_EN; | |
6c636503 | 2050 | |
47bbea41 | 2051 | ret = smsc75xx_write_reg_nopm(dev, WUCSR, val); |
e3c678e6 SG |
2052 | if (ret < 0) { |
2053 | netdev_warn(dev->net, "Error writing WUCSR\n"); | |
2054 | goto done; | |
2055 | } | |
899a391b SG |
2056 | } |
2057 | ||
2058 | /* enable receiver to enable frame reception */ | |
47bbea41 | 2059 | ret = smsc75xx_read_reg_nopm(dev, MAC_RX, &val); |
e3c678e6 SG |
2060 | if (ret < 0) { |
2061 | netdev_warn(dev->net, "Failed to read MAC_RX: %d\n", ret); | |
2062 | goto done; | |
2063 | } | |
6c636503 SG |
2064 | |
2065 | val |= MAC_RX_RXEN; | |
2066 | ||
47bbea41 | 2067 | ret = smsc75xx_write_reg_nopm(dev, MAC_RX, val); |
e3c678e6 SG |
2068 | if (ret < 0) { |
2069 | netdev_warn(dev->net, "Failed to write MAC_RX: %d\n", ret); | |
2070 | goto done; | |
2071 | } | |
6c636503 SG |
2072 | |
2073 | /* some wol options are enabled, so enter SUSPEND0 */ | |
1e1d7412 | 2074 | netdev_info(dev->net, "entering SUSPEND0 mode\n"); |
eacdd6c2 SG |
2075 | ret = smsc75xx_enter_suspend0(dev); |
2076 | ||
2077 | done: | |
5410a473 ML |
2078 | /* |
2079 | * TODO: resume() might need to handle the suspend failure | |
2080 | * in system sleep | |
2081 | */ | |
2082 | if (ret && PMSG_IS_AUTO(message)) | |
eacdd6c2 SG |
2083 | usbnet_resume(intf); |
2084 | return ret; | |
16c79a04 SG |
2085 | } |
2086 | ||
2087 | static int smsc75xx_resume(struct usb_interface *intf) | |
2088 | { | |
2089 | struct usbnet *dev = usb_get_intfdata(intf); | |
6c636503 | 2090 | struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]); |
b4cdea9c | 2091 | u8 suspend_flags = pdata->suspend_flags; |
16c79a04 SG |
2092 | int ret; |
2093 | u32 val; | |
2094 | ||
b4cdea9c | 2095 | netdev_dbg(dev->net, "resume suspend_flags=0x%02x\n", suspend_flags); |
16c79a04 | 2096 | |
b4cdea9c SG |
2097 | /* do this first to ensure it's cleared even in error case */ |
2098 | pdata->suspend_flags = 0; | |
2099 | ||
b4cdea9c | 2100 | if (suspend_flags & SUSPEND_ALLMODES) { |
899a391b | 2101 | /* Disable wakeup sources */ |
47bbea41 | 2102 | ret = smsc75xx_read_reg_nopm(dev, WUCSR, &val); |
e3c678e6 SG |
2103 | if (ret < 0) { |
2104 | netdev_warn(dev->net, "Error reading WUCSR\n"); | |
2105 | return ret; | |
2106 | } | |
16c79a04 | 2107 | |
899a391b SG |
2108 | val &= ~(WUCSR_WUEN | WUCSR_MPEN | WUCSR_PFDA_EN |
2109 | | WUCSR_BCST_EN); | |
16c79a04 | 2110 | |
47bbea41 | 2111 | ret = smsc75xx_write_reg_nopm(dev, WUCSR, val); |
e3c678e6 SG |
2112 | if (ret < 0) { |
2113 | netdev_warn(dev->net, "Error writing WUCSR\n"); | |
2114 | return ret; | |
2115 | } | |
6c636503 SG |
2116 | |
2117 | /* clear wake-up status */ | |
47bbea41 | 2118 | ret = smsc75xx_read_reg_nopm(dev, PMT_CTL, &val); |
e3c678e6 SG |
2119 | if (ret < 0) { |
2120 | netdev_warn(dev->net, "Error reading PMT_CTL\n"); | |
2121 | return ret; | |
2122 | } | |
6c636503 SG |
2123 | |
2124 | val &= ~PMT_CTL_WOL_EN; | |
2125 | val |= PMT_CTL_WUPS; | |
2126 | ||
47bbea41 | 2127 | ret = smsc75xx_write_reg_nopm(dev, PMT_CTL, val); |
e3c678e6 SG |
2128 | if (ret < 0) { |
2129 | netdev_warn(dev->net, "Error writing PMT_CTL\n"); | |
2130 | return ret; | |
2131 | } | |
b4cdea9c SG |
2132 | } |
2133 | ||
2134 | if (suspend_flags & SUSPEND_SUSPEND2) { | |
1e1d7412 | 2135 | netdev_info(dev->net, "resuming from SUSPEND2\n"); |
6c636503 | 2136 | |
47bbea41 | 2137 | ret = smsc75xx_read_reg_nopm(dev, PMT_CTL, &val); |
e3c678e6 SG |
2138 | if (ret < 0) { |
2139 | netdev_warn(dev->net, "Error reading PMT_CTL\n"); | |
2140 | return ret; | |
2141 | } | |
6c636503 SG |
2142 | |
2143 | val |= PMT_CTL_PHY_PWRUP; | |
2144 | ||
47bbea41 | 2145 | ret = smsc75xx_write_reg_nopm(dev, PMT_CTL, val); |
e3c678e6 SG |
2146 | if (ret < 0) { |
2147 | netdev_warn(dev->net, "Error writing PMT_CTL\n"); | |
2148 | return ret; | |
2149 | } | |
6c636503 | 2150 | } |
16c79a04 | 2151 | |
47bbea41 | 2152 | ret = smsc75xx_wait_ready(dev, 1); |
e3c678e6 SG |
2153 | if (ret < 0) { |
2154 | netdev_warn(dev->net, "device not ready in smsc75xx_resume\n"); | |
2155 | return ret; | |
2156 | } | |
16c79a04 SG |
2157 | |
2158 | return usbnet_resume(intf); | |
2159 | } | |
2160 | ||
78e47fe4 MM |
2161 | static void smsc75xx_rx_csum_offload(struct usbnet *dev, struct sk_buff *skb, |
2162 | u32 rx_cmd_a, u32 rx_cmd_b) | |
d0cad871 | 2163 | { |
78e47fe4 MM |
2164 | if (!(dev->net->features & NETIF_F_RXCSUM) || |
2165 | unlikely(rx_cmd_a & RX_CMD_A_LCSM)) { | |
d0cad871 SG |
2166 | skb->ip_summed = CHECKSUM_NONE; |
2167 | } else { | |
2168 | skb->csum = ntohs((u16)(rx_cmd_b >> RX_CMD_B_CSUM_SHIFT)); | |
2169 | skb->ip_summed = CHECKSUM_COMPLETE; | |
2170 | } | |
2171 | } | |
2172 | ||
2173 | static int smsc75xx_rx_fixup(struct usbnet *dev, struct sk_buff *skb) | |
2174 | { | |
eb85569f EG |
2175 | /* This check is no longer done by usbnet */ |
2176 | if (skb->len < dev->net->hard_header_len) | |
2177 | return 0; | |
2178 | ||
d0cad871 SG |
2179 | while (skb->len > 0) { |
2180 | u32 rx_cmd_a, rx_cmd_b, align_count, size; | |
2181 | struct sk_buff *ax_skb; | |
2182 | unsigned char *packet; | |
2183 | ||
2184 | memcpy(&rx_cmd_a, skb->data, sizeof(rx_cmd_a)); | |
2185 | le32_to_cpus(&rx_cmd_a); | |
2186 | skb_pull(skb, 4); | |
2187 | ||
2188 | memcpy(&rx_cmd_b, skb->data, sizeof(rx_cmd_b)); | |
2189 | le32_to_cpus(&rx_cmd_b); | |
ea1649de | 2190 | skb_pull(skb, 4 + RXW_PADDING); |
d0cad871 SG |
2191 | |
2192 | packet = skb->data; | |
2193 | ||
2194 | /* get the packet length */ | |
ea1649de NE |
2195 | size = (rx_cmd_a & RX_CMD_A_LEN) - RXW_PADDING; |
2196 | align_count = (4 - ((size + RXW_PADDING) % 4)) % 4; | |
d0cad871 SG |
2197 | |
2198 | if (unlikely(rx_cmd_a & RX_CMD_A_RED)) { | |
2199 | netif_dbg(dev, rx_err, dev->net, | |
1e1d7412 | 2200 | "Error rx_cmd_a=0x%08x\n", rx_cmd_a); |
d0cad871 SG |
2201 | dev->net->stats.rx_errors++; |
2202 | dev->net->stats.rx_dropped++; | |
2203 | ||
2204 | if (rx_cmd_a & RX_CMD_A_FCS) | |
2205 | dev->net->stats.rx_crc_errors++; | |
2206 | else if (rx_cmd_a & (RX_CMD_A_LONG | RX_CMD_A_RUNT)) | |
2207 | dev->net->stats.rx_frame_errors++; | |
2208 | } else { | |
4c51e536 SG |
2209 | /* MAX_SINGLE_PACKET_SIZE + 4(CRC) + 2(COE) + 4(Vlan) */ |
2210 | if (unlikely(size > (MAX_SINGLE_PACKET_SIZE + ETH_HLEN + 12))) { | |
d0cad871 | 2211 | netif_dbg(dev, rx_err, dev->net, |
1e1d7412 JP |
2212 | "size err rx_cmd_a=0x%08x\n", |
2213 | rx_cmd_a); | |
d0cad871 SG |
2214 | return 0; |
2215 | } | |
2216 | ||
2217 | /* last frame in this batch */ | |
2218 | if (skb->len == size) { | |
78e47fe4 MM |
2219 | smsc75xx_rx_csum_offload(dev, skb, rx_cmd_a, |
2220 | rx_cmd_b); | |
d0cad871 SG |
2221 | |
2222 | skb_trim(skb, skb->len - 4); /* remove fcs */ | |
2223 | skb->truesize = size + sizeof(struct sk_buff); | |
2224 | ||
2225 | return 1; | |
2226 | } | |
2227 | ||
2228 | ax_skb = skb_clone(skb, GFP_ATOMIC); | |
2229 | if (unlikely(!ax_skb)) { | |
1e1d7412 | 2230 | netdev_warn(dev->net, "Error allocating skb\n"); |
d0cad871 SG |
2231 | return 0; |
2232 | } | |
2233 | ||
2234 | ax_skb->len = size; | |
2235 | ax_skb->data = packet; | |
2236 | skb_set_tail_pointer(ax_skb, size); | |
2237 | ||
78e47fe4 MM |
2238 | smsc75xx_rx_csum_offload(dev, ax_skb, rx_cmd_a, |
2239 | rx_cmd_b); | |
d0cad871 SG |
2240 | |
2241 | skb_trim(ax_skb, ax_skb->len - 4); /* remove fcs */ | |
2242 | ax_skb->truesize = size + sizeof(struct sk_buff); | |
2243 | ||
2244 | usbnet_skb_return(dev, ax_skb); | |
2245 | } | |
2246 | ||
2247 | skb_pull(skb, size); | |
2248 | ||
2249 | /* padding bytes before the next frame starts */ | |
2250 | if (skb->len) | |
2251 | skb_pull(skb, align_count); | |
2252 | } | |
2253 | ||
d0cad871 SG |
2254 | return 1; |
2255 | } | |
2256 | ||
2257 | static struct sk_buff *smsc75xx_tx_fixup(struct usbnet *dev, | |
2258 | struct sk_buff *skb, gfp_t flags) | |
2259 | { | |
2260 | u32 tx_cmd_a, tx_cmd_b; | |
2261 | ||
b7c6d267 | 2262 | if (skb_cow_head(skb, SMSC75XX_TX_OVERHEAD)) { |
d0cad871 | 2263 | dev_kfree_skb_any(skb); |
b7c6d267 | 2264 | return NULL; |
d0cad871 SG |
2265 | } |
2266 | ||
2267 | tx_cmd_a = (u32)(skb->len & TX_CMD_A_LEN) | TX_CMD_A_FCS; | |
2268 | ||
2269 | if (skb->ip_summed == CHECKSUM_PARTIAL) | |
2270 | tx_cmd_a |= TX_CMD_A_IPE | TX_CMD_A_TPE; | |
2271 | ||
2272 | if (skb_is_gso(skb)) { | |
2273 | u16 mss = max(skb_shinfo(skb)->gso_size, TX_MSS_MIN); | |
2274 | tx_cmd_b = (mss << TX_CMD_B_MSS_SHIFT) & TX_CMD_B_MSS; | |
2275 | ||
2276 | tx_cmd_a |= TX_CMD_A_LSO; | |
2277 | } else { | |
2278 | tx_cmd_b = 0; | |
2279 | } | |
2280 | ||
2281 | skb_push(skb, 4); | |
2282 | cpu_to_le32s(&tx_cmd_b); | |
2283 | memcpy(skb->data, &tx_cmd_b, 4); | |
2284 | ||
2285 | skb_push(skb, 4); | |
2286 | cpu_to_le32s(&tx_cmd_a); | |
2287 | memcpy(skb->data, &tx_cmd_a, 4); | |
2288 | ||
2289 | return skb; | |
2290 | } | |
2291 | ||
b4cdea9c SG |
2292 | static int smsc75xx_manage_power(struct usbnet *dev, int on) |
2293 | { | |
2294 | dev->intf->needs_remote_wakeup = on; | |
2295 | return 0; | |
2296 | } | |
2297 | ||
d0cad871 SG |
2298 | static const struct driver_info smsc75xx_info = { |
2299 | .description = "smsc75xx USB 2.0 Gigabit Ethernet", | |
2300 | .bind = smsc75xx_bind, | |
2301 | .unbind = smsc75xx_unbind, | |
2302 | .link_reset = smsc75xx_link_reset, | |
2303 | .reset = smsc75xx_reset, | |
2304 | .rx_fixup = smsc75xx_rx_fixup, | |
2305 | .tx_fixup = smsc75xx_tx_fixup, | |
2306 | .status = smsc75xx_status, | |
b4cdea9c | 2307 | .manage_power = smsc75xx_manage_power, |
7bdd305e | 2308 | .flags = FLAG_ETHER | FLAG_SEND_ZLP | FLAG_LINK_INTR, |
d0cad871 SG |
2309 | }; |
2310 | ||
2311 | static const struct usb_device_id products[] = { | |
2312 | { | |
2313 | /* SMSC7500 USB Gigabit Ethernet Device */ | |
2314 | USB_DEVICE(USB_VENDOR_ID_SMSC, USB_PRODUCT_ID_LAN7500), | |
2315 | .driver_info = (unsigned long) &smsc75xx_info, | |
2316 | }, | |
2317 | { | |
2318 | /* SMSC7500 USB Gigabit Ethernet Device */ | |
2319 | USB_DEVICE(USB_VENDOR_ID_SMSC, USB_PRODUCT_ID_LAN7505), | |
2320 | .driver_info = (unsigned long) &smsc75xx_info, | |
2321 | }, | |
2322 | { }, /* END */ | |
2323 | }; | |
2324 | MODULE_DEVICE_TABLE(usb, products); | |
2325 | ||
2326 | static struct usb_driver smsc75xx_driver = { | |
2327 | .name = SMSC_CHIPNAME, | |
2328 | .id_table = products, | |
2329 | .probe = usbnet_probe, | |
16c79a04 SG |
2330 | .suspend = smsc75xx_suspend, |
2331 | .resume = smsc75xx_resume, | |
2332 | .reset_resume = smsc75xx_resume, | |
d0cad871 | 2333 | .disconnect = usbnet_disconnect, |
e1f12eb6 | 2334 | .disable_hub_initiated_lpm = 1, |
b4cdea9c | 2335 | .supports_autosuspend = 1, |
d0cad871 SG |
2336 | }; |
2337 | ||
d632eb1b | 2338 | module_usb_driver(smsc75xx_driver); |
d0cad871 SG |
2339 | |
2340 | MODULE_AUTHOR("Nancy Lin"); | |
90b24cfb | 2341 | MODULE_AUTHOR("Steve Glendinning <steve.glendinning@shawell.net>"); |
d0cad871 SG |
2342 | MODULE_DESCRIPTION("SMSC75XX USB 2.0 Gigabit Ethernet Devices"); |
2343 | MODULE_LICENSE("GPL"); |