Commit | Line | Data |
---|---|---|
3d396eb1 | 1 | /* |
5d242f1c | 2 | * Copyright (C) 2003 - 2009 NetXen, Inc. |
3d396eb1 | 3 | * All rights reserved. |
80922fbc | 4 | * |
3d396eb1 AK |
5 | * This program is free software; you can redistribute it and/or |
6 | * modify it under the terms of the GNU General Public License | |
7 | * as published by the Free Software Foundation; either version 2 | |
8 | * of the License, or (at your option) any later version. | |
80922fbc | 9 | * |
3d396eb1 AK |
10 | * This program is distributed in the hope that it will be useful, but |
11 | * WITHOUT ANY WARRANTY; without even the implied warranty of | |
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
13 | * GNU General Public License for more details. | |
80922fbc | 14 | * |
3d396eb1 AK |
15 | * You should have received a copy of the GNU General Public License |
16 | * along with this program; if not, write to the Free Software | |
17 | * Foundation, Inc., 59 Temple Place - Suite 330, Boston, | |
18 | * MA 02111-1307, USA. | |
80922fbc | 19 | * |
3d396eb1 AK |
20 | * The full GNU General Public License is included in this distribution |
21 | * in the file called LICENSE. | |
80922fbc | 22 | * |
3d396eb1 AK |
23 | * Contact Information: |
24 | * info@netxen.com | |
5d242f1c DP |
25 | * NetXen Inc, |
26 | * 18922 Forge Drive | |
27 | * Cupertino, CA 95014-0701 | |
3d396eb1 AK |
28 | * |
29 | */ | |
30 | ||
cb8011ad | 31 | #include <linux/vmalloc.h> |
e98e3350 | 32 | #include <linux/interrupt.h> |
3d396eb1 AK |
33 | #include "netxen_nic_hw.h" |
34 | ||
35 | #include "netxen_nic.h" | |
3d396eb1 | 36 | #include "netxen_nic_phan_reg.h" |
3d396eb1 | 37 | |
1494a814 | 38 | #include <linux/dma-mapping.h> |
391587c3 | 39 | #include <linux/if_vlan.h> |
c9bdd4b5 | 40 | #include <net/ip.h> |
00977784 | 41 | #include <linux/ipv6.h> |
1494a814 | 42 | |
3d396eb1 AK |
43 | MODULE_DESCRIPTION("NetXen Multi port (1/10) Gigabit Network Driver"); |
44 | MODULE_LICENSE("GPL"); | |
45 | MODULE_VERSION(NETXEN_NIC_LINUX_VERSIONID); | |
46 | ||
ceded32f | 47 | char netxen_nic_driver_name[] = "netxen_nic"; |
3d396eb1 | 48 | static char netxen_nic_driver_string[] = "NetXen Network Driver version " |
cb8011ad | 49 | NETXEN_NIC_LINUX_VERSIONID; |
3d396eb1 | 50 | |
2956640d DP |
51 | static int port_mode = NETXEN_PORT_MODE_AUTO_NEG; |
52 | ||
53 | /* Default to restricted 1G auto-neg mode */ | |
54 | static int wol_port_mode = 5; | |
55 | ||
56 | static int use_msi = 1; | |
57 | ||
58 | static int use_msi_x = 1; | |
59 | ||
3d396eb1 AK |
60 | /* Local functions to NetXen NIC driver */ |
61 | static int __devinit netxen_nic_probe(struct pci_dev *pdev, | |
2956640d | 62 | const struct pci_device_id *ent); |
3d396eb1 AK |
63 | static void __devexit netxen_nic_remove(struct pci_dev *pdev); |
64 | static int netxen_nic_open(struct net_device *netdev); | |
65 | static int netxen_nic_close(struct net_device *netdev); | |
66 | static int netxen_nic_xmit_frame(struct sk_buff *, struct net_device *); | |
67 | static void netxen_tx_timeout(struct net_device *netdev); | |
6d5aefb8 | 68 | static void netxen_tx_timeout_task(struct work_struct *work); |
3d396eb1 | 69 | static void netxen_watchdog(unsigned long); |
bea3348e | 70 | static int netxen_nic_poll(struct napi_struct *napi, int budget); |
3d396eb1 AK |
71 | #ifdef CONFIG_NET_POLL_CONTROLLER |
72 | static void netxen_nic_poll_controller(struct net_device *netdev); | |
73 | #endif | |
1494a814 | 74 | static irqreturn_t netxen_intr(int irq, void *data); |
05aaa02d | 75 | static irqreturn_t netxen_msi_intr(int irq, void *data); |
b3df68f8 | 76 | static irqreturn_t netxen_msix_intr(int irq, void *data); |
3d396eb1 AK |
77 | |
78 | /* PCI Device ID Table */ | |
70081ac5 | 79 | #define ENTRY(device) \ |
040dec3b | 80 | {PCI_DEVICE(PCI_VENDOR_ID_NETXEN, (device)), \ |
70081ac5 AV |
81 | .class = PCI_CLASS_NETWORK_ETHERNET << 8, .class_mask = ~0} |
82 | ||
3d396eb1 | 83 | static struct pci_device_id netxen_pci_tbl[] __devinitdata = { |
040dec3b DP |
84 | ENTRY(PCI_DEVICE_ID_NX2031_10GXSR), |
85 | ENTRY(PCI_DEVICE_ID_NX2031_10GCX4), | |
86 | ENTRY(PCI_DEVICE_ID_NX2031_4GCU), | |
87 | ENTRY(PCI_DEVICE_ID_NX2031_IMEZ), | |
88 | ENTRY(PCI_DEVICE_ID_NX2031_HMEZ), | |
89 | ENTRY(PCI_DEVICE_ID_NX2031_XG_MGMT), | |
90 | ENTRY(PCI_DEVICE_ID_NX2031_XG_MGMT2), | |
91 | ENTRY(PCI_DEVICE_ID_NX3031), | |
3d396eb1 AK |
92 | {0,} |
93 | }; | |
94 | ||
95 | MODULE_DEVICE_TABLE(pci, netxen_pci_tbl); | |
96 | ||
b1555130 AB |
97 | static struct workqueue_struct *netxen_workq; |
98 | #define SCHEDULE_WORK(tp) queue_work(netxen_workq, tp) | |
99 | #define FLUSH_SCHEDULED_WORK() flush_workqueue(netxen_workq) | |
100 | ||
ed25ffa1 AK |
101 | static void netxen_watchdog(unsigned long); |
102 | ||
7830b22c DP |
103 | static uint32_t crb_cmd_producer[4] = { |
104 | CRB_CMD_PRODUCER_OFFSET, CRB_CMD_PRODUCER_OFFSET_1, | |
105 | CRB_CMD_PRODUCER_OFFSET_2, CRB_CMD_PRODUCER_OFFSET_3 | |
106 | }; | |
107 | ||
c9fc891f | 108 | void |
3ce06a32 | 109 | netxen_nic_update_cmd_producer(struct netxen_adapter *adapter, |
d877f1e3 | 110 | struct nx_host_tx_ring *tx_ring, u32 producer) |
3176ff3e | 111 | { |
f98a9f69 | 112 | NXWR32(adapter, tx_ring->crb_cmd_producer, producer); |
3176ff3e MT |
113 | } |
114 | ||
7830b22c DP |
115 | static uint32_t crb_cmd_consumer[4] = { |
116 | CRB_CMD_CONSUMER_OFFSET, CRB_CMD_CONSUMER_OFFSET_1, | |
117 | CRB_CMD_CONSUMER_OFFSET_2, CRB_CMD_CONSUMER_OFFSET_3 | |
118 | }; | |
119 | ||
3ce06a32 DP |
120 | static inline void |
121 | netxen_nic_update_cmd_consumer(struct netxen_adapter *adapter, | |
d877f1e3 | 122 | struct nx_host_tx_ring *tx_ring, u32 consumer) |
3176ff3e | 123 | { |
f98a9f69 | 124 | NXWR32(adapter, tx_ring->crb_cmd_consumer, consumer); |
3176ff3e MT |
125 | } |
126 | ||
2956640d | 127 | static uint32_t msi_tgt_status[8] = { |
443be796 | 128 | ISR_INT_TARGET_STATUS, ISR_INT_TARGET_STATUS_F1, |
2956640d DP |
129 | ISR_INT_TARGET_STATUS_F2, ISR_INT_TARGET_STATUS_F3, |
130 | ISR_INT_TARGET_STATUS_F4, ISR_INT_TARGET_STATUS_F5, | |
131 | ISR_INT_TARGET_STATUS_F6, ISR_INT_TARGET_STATUS_F7 | |
443be796 DP |
132 | }; |
133 | ||
2956640d DP |
134 | static struct netxen_legacy_intr_set legacy_intr[] = NX_LEGACY_INTR_CONFIG; |
135 | ||
d8b100c5 | 136 | static inline void netxen_nic_disable_int(struct nx_host_sds_ring *sds_ring) |
4638aef1 | 137 | { |
d8b100c5 DP |
138 | struct netxen_adapter *adapter = sds_ring->adapter; |
139 | ||
f98a9f69 | 140 | NXWR32(adapter, sds_ring->crb_intr_mask, 0); |
4638aef1 SH |
141 | } |
142 | ||
d8b100c5 | 143 | static inline void netxen_nic_enable_int(struct nx_host_sds_ring *sds_ring) |
4638aef1 | 144 | { |
d8b100c5 DP |
145 | struct netxen_adapter *adapter = sds_ring->adapter; |
146 | ||
f98a9f69 | 147 | NXWR32(adapter, sds_ring->crb_intr_mask, 0x1); |
4638aef1 | 148 | |
092bc571 DP |
149 | if (!NETXEN_IS_MSI_FAMILY(adapter)) |
150 | adapter->pci_write_immediate(adapter, | |
151 | adapter->legacy_intr.tgt_mask_reg, 0xfbff); | |
4638aef1 SH |
152 | } |
153 | ||
71dcddbd DP |
154 | static int |
155 | netxen_alloc_sds_rings(struct netxen_recv_context *recv_ctx, int count) | |
156 | { | |
157 | int size = sizeof(struct nx_host_sds_ring) * count; | |
158 | ||
159 | recv_ctx->sds_rings = kzalloc(size, GFP_KERNEL); | |
160 | ||
161 | return (recv_ctx->sds_rings == NULL); | |
162 | } | |
163 | ||
d8b100c5 | 164 | static void |
71dcddbd DP |
165 | netxen_free_sds_rings(struct netxen_recv_context *recv_ctx) |
166 | { | |
167 | if (recv_ctx->sds_rings != NULL) | |
168 | kfree(recv_ctx->sds_rings); | |
169 | } | |
170 | ||
171 | static int | |
d8b100c5 DP |
172 | netxen_napi_add(struct netxen_adapter *adapter, struct net_device *netdev) |
173 | { | |
174 | int ring; | |
175 | struct nx_host_sds_ring *sds_ring; | |
176 | struct netxen_recv_context *recv_ctx = &adapter->recv_ctx; | |
177 | ||
f6d21f44 DP |
178 | if ((adapter->flags & NETXEN_NIC_MSIX_ENABLED) && |
179 | adapter->rss_supported) | |
d8b100c5 DP |
180 | adapter->max_sds_rings = (num_online_cpus() >= 4) ? 4 : 2; |
181 | else | |
182 | adapter->max_sds_rings = 1; | |
183 | ||
71dcddbd DP |
184 | if (netxen_alloc_sds_rings(recv_ctx, adapter->max_sds_rings)) |
185 | return 1; | |
186 | ||
d8b100c5 DP |
187 | for (ring = 0; ring < adapter->max_sds_rings; ring++) { |
188 | sds_ring = &recv_ctx->sds_rings[ring]; | |
189 | netif_napi_add(netdev, &sds_ring->napi, | |
190 | netxen_nic_poll, NETXEN_NETDEV_WEIGHT); | |
191 | } | |
71dcddbd DP |
192 | |
193 | return 0; | |
d8b100c5 DP |
194 | } |
195 | ||
196 | static void | |
197 | netxen_napi_enable(struct netxen_adapter *adapter) | |
198 | { | |
199 | int ring; | |
200 | struct nx_host_sds_ring *sds_ring; | |
201 | struct netxen_recv_context *recv_ctx = &adapter->recv_ctx; | |
202 | ||
203 | for (ring = 0; ring < adapter->max_sds_rings; ring++) { | |
204 | sds_ring = &recv_ctx->sds_rings[ring]; | |
205 | napi_enable(&sds_ring->napi); | |
206 | netxen_nic_enable_int(sds_ring); | |
207 | } | |
208 | } | |
209 | ||
210 | static void | |
211 | netxen_napi_disable(struct netxen_adapter *adapter) | |
212 | { | |
213 | int ring; | |
214 | struct nx_host_sds_ring *sds_ring; | |
215 | struct netxen_recv_context *recv_ctx = &adapter->recv_ctx; | |
216 | ||
217 | for (ring = 0; ring < adapter->max_sds_rings; ring++) { | |
218 | sds_ring = &recv_ctx->sds_rings[ring]; | |
219 | netxen_nic_disable_int(sds_ring); | |
220 | napi_disable(&sds_ring->napi); | |
221 | } | |
222 | } | |
223 | ||
2956640d DP |
224 | static int nx_set_dma_mask(struct netxen_adapter *adapter, uint8_t revision_id) |
225 | { | |
226 | struct pci_dev *pdev = adapter->pdev; | |
1f434f63 DP |
227 | uint64_t mask, cmask; |
228 | ||
229 | adapter->pci_using_dac = 0; | |
2956640d | 230 | |
6afd142f | 231 | mask = DMA_BIT_MASK(32); |
2956640d DP |
232 | /* |
233 | * Consistent DMA mask is set to 32 bit because it cannot be set to | |
234 | * 35 bits. For P3 also leave it at 32 bits for now. Only the rings | |
235 | * come off this pool. | |
236 | */ | |
6afd142f | 237 | cmask = DMA_BIT_MASK(32); |
1f434f63 DP |
238 | |
239 | #ifndef CONFIG_IA64 | |
240 | if (revision_id >= NX_P3_B0) | |
6afd142f | 241 | mask = DMA_BIT_MASK(39); |
1f434f63 | 242 | else if (revision_id == NX_P2_C1) |
6afd142f | 243 | mask = DMA_BIT_MASK(35); |
1f434f63 | 244 | #endif |
2956640d | 245 | if (pci_set_dma_mask(pdev, mask) == 0 && |
1f434f63 | 246 | pci_set_consistent_dma_mask(pdev, cmask) == 0) { |
2956640d DP |
247 | adapter->pci_using_dac = 1; |
248 | return 0; | |
249 | } | |
2956640d | 250 | |
1f434f63 DP |
251 | return -EIO; |
252 | } | |
253 | ||
254 | /* Update addressable range if firmware supports it */ | |
255 | static int | |
256 | nx_update_dma_mask(struct netxen_adapter *adapter) | |
257 | { | |
258 | int change, shift, err; | |
259 | uint64_t mask, old_mask; | |
260 | struct pci_dev *pdev = adapter->pdev; | |
261 | ||
262 | change = 0; | |
263 | ||
f98a9f69 | 264 | shift = NXRD32(adapter, CRB_DMA_SHIFT); |
1f434f63 DP |
265 | if (shift >= 32) |
266 | return 0; | |
267 | ||
268 | if (NX_IS_REVISION_P3(adapter->ahw.revision_id) && (shift > 9)) | |
269 | change = 1; | |
270 | else if ((adapter->ahw.revision_id == NX_P2_C1) && (shift <= 4)) | |
271 | change = 1; | |
272 | ||
273 | if (change) { | |
274 | old_mask = pdev->dma_mask; | |
275 | mask = (1ULL<<(32+shift)) - 1; | |
276 | ||
277 | err = pci_set_dma_mask(pdev, mask); | |
278 | if (err) | |
279 | return pci_set_dma_mask(pdev, old_mask); | |
2956640d DP |
280 | } |
281 | ||
2956640d DP |
282 | return 0; |
283 | } | |
284 | ||
285 | static void netxen_check_options(struct netxen_adapter *adapter) | |
286 | { | |
438627c7 DP |
287 | if (adapter->ahw.port_type == NETXEN_NIC_XGBE) |
288 | adapter->num_rxd = MAX_RCV_DESCRIPTORS_10G; | |
289 | else if (adapter->ahw.port_type == NETXEN_NIC_GBE) | |
290 | adapter->num_rxd = MAX_RCV_DESCRIPTORS_1G; | |
2956640d | 291 | |
f6d21f44 DP |
292 | adapter->msix_supported = 0; |
293 | if (NX_IS_REVISION_P3(adapter->ahw.revision_id)) { | |
c7860a2a | 294 | adapter->msix_supported = !!use_msi_x; |
f6d21f44 DP |
295 | adapter->rss_supported = !!use_msi_x; |
296 | } else if (adapter->fw_version >= NETXEN_VERSION_CODE(3, 4, 336)) { | |
297 | switch (adapter->ahw.board_type) { | |
298 | case NETXEN_BRDTYPE_P2_SB31_10G: | |
299 | case NETXEN_BRDTYPE_P2_SB31_10G_CX4: | |
300 | case NETXEN_BRDTYPE_P2_SB31_10G_HMEZ: | |
301 | adapter->msix_supported = !!use_msi_x; | |
302 | adapter->rss_supported = !!use_msi_x; | |
303 | break; | |
304 | default: | |
305 | break; | |
306 | } | |
307 | } | |
2956640d | 308 | |
438627c7 DP |
309 | adapter->num_txd = MAX_CMD_DESCRIPTORS_HOST; |
310 | adapter->num_jumbo_rxd = MAX_JUMBO_RCV_DESCRIPTORS; | |
311 | adapter->num_lro_rxd = MAX_LRO_RCV_DESCRIPTORS; | |
2956640d | 312 | |
2956640d DP |
313 | return; |
314 | } | |
315 | ||
316 | static int | |
317 | netxen_check_hw_init(struct netxen_adapter *adapter, int first_boot) | |
318 | { | |
27c915a4 | 319 | u32 val, timeout; |
2956640d DP |
320 | |
321 | if (first_boot == 0x55555555) { | |
322 | /* This is the first boot after power up */ | |
f98a9f69 | 323 | NXWR32(adapter, NETXEN_CAM_RAM(0x1fc), NETXEN_BDINFO_MAGIC); |
27c915a4 DP |
324 | |
325 | if (!NX_IS_REVISION_P2(adapter->ahw.revision_id)) | |
326 | return 0; | |
2956640d DP |
327 | |
328 | /* PCI bus master workaround */ | |
f98a9f69 | 329 | first_boot = NXRD32(adapter, NETXEN_PCIE_REG(0x4)); |
2956640d DP |
330 | if (!(first_boot & 0x4)) { |
331 | first_boot |= 0x4; | |
f98a9f69 DP |
332 | NXWR32(adapter, NETXEN_PCIE_REG(0x4), first_boot); |
333 | first_boot = NXRD32(adapter, NETXEN_PCIE_REG(0x4)); | |
2956640d DP |
334 | } |
335 | ||
336 | /* This is the first boot after power up */ | |
f98a9f69 | 337 | first_boot = NXRD32(adapter, NETXEN_ROMUSB_GLB_SW_RESET); |
2956640d DP |
338 | if (first_boot != 0x80000f) { |
339 | /* clear the register for future unloads/loads */ | |
f98a9f69 | 340 | NXWR32(adapter, NETXEN_CAM_RAM(0x1fc), 0); |
27c915a4 | 341 | return -EIO; |
2956640d DP |
342 | } |
343 | ||
27c915a4 | 344 | /* Start P2 boot loader */ |
f98a9f69 DP |
345 | val = NXRD32(adapter, NETXEN_ROMUSB_GLB_PEGTUNE_DONE); |
346 | NXWR32(adapter, NETXEN_ROMUSB_GLB_PEGTUNE_DONE, val | 0x1); | |
27c915a4 DP |
347 | timeout = 0; |
348 | do { | |
349 | msleep(1); | |
f98a9f69 | 350 | val = NXRD32(adapter, NETXEN_CAM_RAM(0x1fc)); |
27c915a4 DP |
351 | |
352 | if (++timeout > 5000) | |
353 | return -EIO; | |
354 | ||
355 | } while (val == NETXEN_BDINFO_MAGIC); | |
2956640d | 356 | } |
27c915a4 | 357 | return 0; |
2956640d DP |
358 | } |
359 | ||
360 | static void netxen_set_port_mode(struct netxen_adapter *adapter) | |
361 | { | |
362 | u32 val, data; | |
363 | ||
1e2d0059 | 364 | val = adapter->ahw.board_type; |
2956640d DP |
365 | if ((val == NETXEN_BRDTYPE_P3_HMEZ) || |
366 | (val == NETXEN_BRDTYPE_P3_XG_LOM)) { | |
367 | if (port_mode == NETXEN_PORT_MODE_802_3_AP) { | |
368 | data = NETXEN_PORT_MODE_802_3_AP; | |
f98a9f69 | 369 | NXWR32(adapter, NETXEN_PORT_MODE_ADDR, data); |
2956640d DP |
370 | } else if (port_mode == NETXEN_PORT_MODE_XG) { |
371 | data = NETXEN_PORT_MODE_XG; | |
f98a9f69 | 372 | NXWR32(adapter, NETXEN_PORT_MODE_ADDR, data); |
2956640d DP |
373 | } else if (port_mode == NETXEN_PORT_MODE_AUTO_NEG_1G) { |
374 | data = NETXEN_PORT_MODE_AUTO_NEG_1G; | |
f98a9f69 | 375 | NXWR32(adapter, NETXEN_PORT_MODE_ADDR, data); |
2956640d DP |
376 | } else if (port_mode == NETXEN_PORT_MODE_AUTO_NEG_XG) { |
377 | data = NETXEN_PORT_MODE_AUTO_NEG_XG; | |
f98a9f69 | 378 | NXWR32(adapter, NETXEN_PORT_MODE_ADDR, data); |
2956640d DP |
379 | } else { |
380 | data = NETXEN_PORT_MODE_AUTO_NEG; | |
f98a9f69 | 381 | NXWR32(adapter, NETXEN_PORT_MODE_ADDR, data); |
2956640d DP |
382 | } |
383 | ||
384 | if ((wol_port_mode != NETXEN_PORT_MODE_802_3_AP) && | |
385 | (wol_port_mode != NETXEN_PORT_MODE_XG) && | |
386 | (wol_port_mode != NETXEN_PORT_MODE_AUTO_NEG_1G) && | |
387 | (wol_port_mode != NETXEN_PORT_MODE_AUTO_NEG_XG)) { | |
388 | wol_port_mode = NETXEN_PORT_MODE_AUTO_NEG; | |
389 | } | |
f98a9f69 | 390 | NXWR32(adapter, NETXEN_WOL_PORT_MODE, wol_port_mode); |
2956640d DP |
391 | } |
392 | } | |
393 | ||
2956640d DP |
394 | static void netxen_set_msix_bit(struct pci_dev *pdev, int enable) |
395 | { | |
396 | u32 control; | |
397 | int pos; | |
398 | ||
399 | pos = pci_find_capability(pdev, PCI_CAP_ID_MSIX); | |
400 | if (pos) { | |
401 | pci_read_config_dword(pdev, pos, &control); | |
402 | if (enable) | |
403 | control |= PCI_MSIX_FLAGS_ENABLE; | |
404 | else | |
405 | control = 0; | |
406 | pci_write_config_dword(pdev, pos, control); | |
407 | } | |
408 | } | |
409 | ||
410 | static void netxen_init_msix_entries(struct netxen_adapter *adapter) | |
411 | { | |
412 | int i; | |
413 | ||
414 | for (i = 0; i < MSIX_ENTRIES_PER_ADAPTER; i++) | |
415 | adapter->msix_entries[i].entry = i; | |
416 | } | |
417 | ||
9dc28efe DP |
418 | static int |
419 | netxen_read_mac_addr(struct netxen_adapter *adapter) | |
420 | { | |
421 | int i; | |
422 | unsigned char *p; | |
423 | __le64 mac_addr; | |
9dc28efe DP |
424 | struct net_device *netdev = adapter->netdev; |
425 | struct pci_dev *pdev = adapter->pdev; | |
426 | ||
9dc28efe DP |
427 | if (NX_IS_REVISION_P3(adapter->ahw.revision_id)) { |
428 | if (netxen_p3_get_mac_addr(adapter, &mac_addr) != 0) | |
429 | return -EIO; | |
430 | } else { | |
431 | if (netxen_get_flash_mac_addr(adapter, &mac_addr) != 0) | |
432 | return -EIO; | |
433 | } | |
434 | ||
435 | p = (unsigned char *)&mac_addr; | |
436 | for (i = 0; i < 6; i++) | |
437 | netdev->dev_addr[i] = *(p + 5 - i); | |
438 | ||
439 | memcpy(netdev->perm_addr, netdev->dev_addr, netdev->addr_len); | |
440 | ||
441 | /* set station address */ | |
442 | ||
e174961c JB |
443 | if (!is_valid_ether_addr(netdev->perm_addr)) |
444 | dev_warn(&pdev->dev, "Bad MAC address %pM.\n", netdev->dev_addr); | |
445 | else | |
9dc28efe DP |
446 | adapter->macaddr_set(adapter, netdev->dev_addr); |
447 | ||
448 | return 0; | |
449 | } | |
450 | ||
1abd266f SH |
451 | static void netxen_set_multicast_list(struct net_device *dev) |
452 | { | |
453 | struct netxen_adapter *adapter = netdev_priv(dev); | |
454 | ||
455 | if (NX_IS_REVISION_P3(adapter->ahw.revision_id)) | |
456 | netxen_p3_nic_set_multi(dev); | |
457 | else | |
458 | netxen_p2_nic_set_multi(dev); | |
459 | } | |
460 | ||
461 | static const struct net_device_ops netxen_netdev_ops = { | |
462 | .ndo_open = netxen_nic_open, | |
463 | .ndo_stop = netxen_nic_close, | |
464 | .ndo_start_xmit = netxen_nic_xmit_frame, | |
465 | .ndo_get_stats = netxen_nic_get_stats, | |
466 | .ndo_validate_addr = eth_validate_addr, | |
467 | .ndo_set_multicast_list = netxen_set_multicast_list, | |
468 | .ndo_set_mac_address = netxen_nic_set_mac, | |
469 | .ndo_change_mtu = netxen_nic_change_mtu, | |
470 | .ndo_tx_timeout = netxen_tx_timeout, | |
471 | #ifdef CONFIG_NET_POLL_CONTROLLER | |
472 | .ndo_poll_controller = netxen_nic_poll_controller, | |
473 | #endif | |
474 | }; | |
475 | ||
97daee83 DP |
476 | static void |
477 | netxen_setup_intr(struct netxen_adapter *adapter) | |
478 | { | |
479 | struct netxen_legacy_intr_set *legacy_intrp; | |
480 | struct pci_dev *pdev = adapter->pdev; | |
481 | ||
482 | adapter->flags &= ~(NETXEN_NIC_MSI_ENABLED | NETXEN_NIC_MSIX_ENABLED); | |
97daee83 DP |
483 | |
484 | if (adapter->ahw.revision_id >= NX_P3_B0) | |
485 | legacy_intrp = &legacy_intr[adapter->ahw.pci_func]; | |
486 | else | |
487 | legacy_intrp = &legacy_intr[0]; | |
488 | adapter->legacy_intr.int_vec_bit = legacy_intrp->int_vec_bit; | |
489 | adapter->legacy_intr.tgt_status_reg = legacy_intrp->tgt_status_reg; | |
490 | adapter->legacy_intr.tgt_mask_reg = legacy_intrp->tgt_mask_reg; | |
491 | adapter->legacy_intr.pci_int_reg = legacy_intrp->pci_int_reg; | |
492 | ||
493 | netxen_set_msix_bit(pdev, 0); | |
494 | ||
495 | if (adapter->msix_supported) { | |
496 | ||
497 | netxen_init_msix_entries(adapter); | |
498 | if (pci_enable_msix(pdev, adapter->msix_entries, | |
499 | MSIX_ENTRIES_PER_ADAPTER)) | |
500 | goto request_msi; | |
501 | ||
502 | adapter->flags |= NETXEN_NIC_MSIX_ENABLED; | |
503 | netxen_set_msix_bit(pdev, 1); | |
504 | dev_info(&pdev->dev, "using msi-x interrupts\n"); | |
505 | ||
506 | } else { | |
507 | request_msi: | |
508 | if (use_msi && !pci_enable_msi(pdev)) { | |
509 | adapter->flags |= NETXEN_NIC_MSI_ENABLED; | |
510 | dev_info(&pdev->dev, "using msi interrupts\n"); | |
511 | } else | |
512 | dev_info(&pdev->dev, "using legacy interrupts\n"); | |
d8b100c5 | 513 | adapter->msix_entries[0].vector = pdev->irq; |
97daee83 DP |
514 | } |
515 | } | |
516 | ||
517 | static void | |
518 | netxen_teardown_intr(struct netxen_adapter *adapter) | |
519 | { | |
520 | if (adapter->flags & NETXEN_NIC_MSIX_ENABLED) | |
521 | pci_disable_msix(adapter->pdev); | |
522 | if (adapter->flags & NETXEN_NIC_MSI_ENABLED) | |
523 | pci_disable_msi(adapter->pdev); | |
524 | } | |
525 | ||
526 | static void | |
527 | netxen_cleanup_pci_map(struct netxen_adapter *adapter) | |
528 | { | |
529 | if (adapter->ahw.db_base != NULL) | |
530 | iounmap(adapter->ahw.db_base); | |
531 | if (adapter->ahw.pci_base0 != NULL) | |
532 | iounmap(adapter->ahw.pci_base0); | |
533 | if (adapter->ahw.pci_base1 != NULL) | |
534 | iounmap(adapter->ahw.pci_base1); | |
535 | if (adapter->ahw.pci_base2 != NULL) | |
536 | iounmap(adapter->ahw.pci_base2); | |
537 | } | |
538 | ||
539 | static int | |
540 | netxen_setup_pci_map(struct netxen_adapter *adapter) | |
541 | { | |
542 | void __iomem *mem_ptr0 = NULL; | |
543 | void __iomem *mem_ptr1 = NULL; | |
544 | void __iomem *mem_ptr2 = NULL; | |
545 | void __iomem *db_ptr = NULL; | |
546 | ||
97daee83 DP |
547 | unsigned long mem_base, mem_len, db_base, db_len = 0, pci_len0 = 0; |
548 | ||
549 | struct pci_dev *pdev = adapter->pdev; | |
550 | int pci_func = adapter->ahw.pci_func; | |
551 | ||
552 | int err = 0; | |
553 | ||
554 | /* | |
555 | * Set the CRB window to invalid. If any register in window 0 is | |
556 | * accessed it should set the window to 0 and then reset it to 1. | |
557 | */ | |
558 | adapter->curr_window = 255; | |
559 | adapter->ahw.qdr_sn_window = -1; | |
560 | adapter->ahw.ddr_mn_window = -1; | |
561 | ||
562 | /* remap phys address */ | |
563 | mem_base = pci_resource_start(pdev, 0); /* 0 is for BAR 0 */ | |
564 | mem_len = pci_resource_len(pdev, 0); | |
565 | pci_len0 = 0; | |
566 | ||
567 | adapter->hw_write_wx = netxen_nic_hw_write_wx_128M; | |
568 | adapter->hw_read_wx = netxen_nic_hw_read_wx_128M; | |
569 | adapter->pci_read_immediate = netxen_nic_pci_read_immediate_128M; | |
570 | adapter->pci_write_immediate = netxen_nic_pci_write_immediate_128M; | |
97daee83 DP |
571 | adapter->pci_set_window = netxen_nic_pci_set_window_128M; |
572 | adapter->pci_mem_read = netxen_nic_pci_mem_read_128M; | |
573 | adapter->pci_mem_write = netxen_nic_pci_mem_write_128M; | |
574 | ||
575 | /* 128 Meg of memory */ | |
576 | if (mem_len == NETXEN_PCI_128MB_SIZE) { | |
577 | mem_ptr0 = ioremap(mem_base, FIRST_PAGE_GROUP_SIZE); | |
578 | mem_ptr1 = ioremap(mem_base + SECOND_PAGE_GROUP_START, | |
579 | SECOND_PAGE_GROUP_SIZE); | |
580 | mem_ptr2 = ioremap(mem_base + THIRD_PAGE_GROUP_START, | |
581 | THIRD_PAGE_GROUP_SIZE); | |
97daee83 DP |
582 | } else if (mem_len == NETXEN_PCI_32MB_SIZE) { |
583 | mem_ptr1 = ioremap(mem_base, SECOND_PAGE_GROUP_SIZE); | |
584 | mem_ptr2 = ioremap(mem_base + THIRD_PAGE_GROUP_START - | |
585 | SECOND_PAGE_GROUP_START, THIRD_PAGE_GROUP_SIZE); | |
97daee83 DP |
586 | } else if (mem_len == NETXEN_PCI_2MB_SIZE) { |
587 | adapter->hw_write_wx = netxen_nic_hw_write_wx_2M; | |
588 | adapter->hw_read_wx = netxen_nic_hw_read_wx_2M; | |
589 | adapter->pci_read_immediate = netxen_nic_pci_read_immediate_2M; | |
590 | adapter->pci_write_immediate = | |
591 | netxen_nic_pci_write_immediate_2M; | |
97daee83 DP |
592 | adapter->pci_set_window = netxen_nic_pci_set_window_2M; |
593 | adapter->pci_mem_read = netxen_nic_pci_mem_read_2M; | |
594 | adapter->pci_mem_write = netxen_nic_pci_mem_write_2M; | |
595 | ||
596 | mem_ptr0 = pci_ioremap_bar(pdev, 0); | |
597 | if (mem_ptr0 == NULL) { | |
598 | dev_err(&pdev->dev, "failed to map PCI bar 0\n"); | |
599 | return -EIO; | |
600 | } | |
601 | pci_len0 = mem_len; | |
97daee83 DP |
602 | |
603 | adapter->ahw.ddr_mn_window = 0; | |
604 | adapter->ahw.qdr_sn_window = 0; | |
605 | ||
606 | adapter->ahw.mn_win_crb = 0x100000 + PCIX_MN_WINDOW + | |
607 | (pci_func * 0x20); | |
608 | adapter->ahw.ms_win_crb = 0x100000 + PCIX_SN_WINDOW; | |
609 | if (pci_func < 4) | |
610 | adapter->ahw.ms_win_crb += (pci_func * 0x20); | |
611 | else | |
612 | adapter->ahw.ms_win_crb += | |
613 | 0xA0 + ((pci_func - 4) * 0x10); | |
614 | } else { | |
615 | return -EIO; | |
616 | } | |
617 | ||
618 | dev_info(&pdev->dev, "%dMB memory map\n", (int)(mem_len>>20)); | |
619 | ||
620 | adapter->ahw.pci_base0 = mem_ptr0; | |
621 | adapter->ahw.pci_len0 = pci_len0; | |
97daee83 DP |
622 | adapter->ahw.pci_base1 = mem_ptr1; |
623 | adapter->ahw.pci_base2 = mem_ptr2; | |
624 | ||
625 | if (NX_IS_REVISION_P3(adapter->ahw.revision_id)) | |
626 | goto skip_doorbell; | |
627 | ||
628 | db_base = pci_resource_start(pdev, 4); /* doorbell is on bar 4 */ | |
629 | db_len = pci_resource_len(pdev, 4); | |
630 | ||
631 | if (db_len == 0) { | |
632 | printk(KERN_ERR "%s: doorbell is disabled\n", | |
633 | netxen_nic_driver_name); | |
634 | err = -EIO; | |
635 | goto err_out; | |
636 | } | |
637 | ||
638 | db_ptr = ioremap(db_base, NETXEN_DB_MAPSIZE_BYTES); | |
639 | if (!db_ptr) { | |
640 | printk(KERN_ERR "%s: Failed to allocate doorbell map.", | |
641 | netxen_nic_driver_name); | |
642 | err = -EIO; | |
643 | goto err_out; | |
644 | } | |
645 | ||
646 | skip_doorbell: | |
647 | adapter->ahw.db_base = db_ptr; | |
648 | adapter->ahw.db_len = db_len; | |
649 | return 0; | |
650 | ||
651 | err_out: | |
652 | netxen_cleanup_pci_map(adapter); | |
653 | return err; | |
654 | } | |
655 | ||
ba599d4f | 656 | static int |
f7185c71 | 657 | netxen_start_firmware(struct netxen_adapter *adapter, int request_fw) |
ba599d4f DP |
658 | { |
659 | int val, err, first_boot; | |
660 | struct pci_dev *pdev = adapter->pdev; | |
661 | ||
0b72e659 | 662 | int first_driver = 0; |
f7185c71 DP |
663 | |
664 | if (NX_IS_REVISION_P2(adapter->ahw.revision_id)) | |
665 | first_driver = (adapter->portnum == 0); | |
666 | else | |
667 | first_driver = (adapter->ahw.pci_func == 0); | |
0b72e659 DP |
668 | |
669 | if (!first_driver) | |
670 | return 0; | |
671 | ||
f98a9f69 | 672 | first_boot = NXRD32(adapter, NETXEN_CAM_RAM(0x1fc)); |
ba599d4f DP |
673 | |
674 | err = netxen_check_hw_init(adapter, first_boot); | |
675 | if (err) { | |
676 | dev_err(&pdev->dev, "error in init HW init sequence\n"); | |
677 | return err; | |
678 | } | |
679 | ||
f7185c71 DP |
680 | if (request_fw) |
681 | netxen_request_firmware(adapter); | |
682 | ||
ba599d4f | 683 | if (first_boot != 0x55555555) { |
f98a9f69 | 684 | NXWR32(adapter, CRB_CMDPEG_STATE, 0); |
ba599d4f DP |
685 | netxen_pinit_from_rom(adapter, 0); |
686 | msleep(1); | |
687 | } | |
567c6c4e | 688 | |
f98a9f69 | 689 | NXWR32(adapter, CRB_DMA_SHIFT, 0x55555555); |
567c6c4e DP |
690 | if (NX_IS_REVISION_P3(adapter->ahw.revision_id)) |
691 | netxen_set_port_mode(adapter); | |
692 | ||
ba599d4f DP |
693 | netxen_load_firmware(adapter); |
694 | ||
695 | if (NX_IS_REVISION_P2(adapter->ahw.revision_id)) { | |
696 | ||
697 | /* Initialize multicast addr pool owners */ | |
698 | val = 0x7654; | |
1e2d0059 | 699 | if (adapter->ahw.port_type == NETXEN_NIC_XGBE) |
ba599d4f | 700 | val |= 0x0f000000; |
f98a9f69 | 701 | NXWR32(adapter, NETXEN_MAC_ADDR_CNTL_REG, val); |
ba599d4f DP |
702 | |
703 | } | |
704 | ||
705 | err = netxen_initialize_adapter_offload(adapter); | |
706 | if (err) | |
707 | return err; | |
708 | ||
709 | /* | |
710 | * Tell the hardware our version number. | |
711 | */ | |
712 | val = (_NETXEN_NIC_LINUX_MAJOR << 16) | |
713 | | ((_NETXEN_NIC_LINUX_MINOR << 8)) | |
714 | | (_NETXEN_NIC_LINUX_SUBVERSION); | |
f98a9f69 | 715 | NXWR32(adapter, CRB_DRIVER_VERSION, val); |
ba599d4f DP |
716 | |
717 | /* Handshake with the card before we register the devices. */ | |
718 | err = netxen_phantom_init(adapter, NETXEN_NIC_PEG_TUNE); | |
719 | if (err) { | |
720 | netxen_free_adapter_offload(adapter); | |
721 | return err; | |
722 | } | |
723 | ||
724 | return 0; | |
725 | } | |
726 | ||
9f5bc7f1 DP |
727 | static int |
728 | netxen_nic_request_irq(struct netxen_adapter *adapter) | |
729 | { | |
730 | irq_handler_t handler; | |
d8b100c5 DP |
731 | struct nx_host_sds_ring *sds_ring; |
732 | int err, ring; | |
733 | ||
9f5bc7f1 DP |
734 | unsigned long flags = IRQF_SAMPLE_RANDOM; |
735 | struct net_device *netdev = adapter->netdev; | |
d8b100c5 | 736 | struct netxen_recv_context *recv_ctx = &adapter->recv_ctx; |
9f5bc7f1 | 737 | |
9f5bc7f1 DP |
738 | if (adapter->flags & NETXEN_NIC_MSIX_ENABLED) |
739 | handler = netxen_msix_intr; | |
740 | else if (adapter->flags & NETXEN_NIC_MSI_ENABLED) | |
741 | handler = netxen_msi_intr; | |
742 | else { | |
743 | flags |= IRQF_SHARED; | |
744 | handler = netxen_intr; | |
745 | } | |
746 | adapter->irq = netdev->irq; | |
747 | ||
d8b100c5 DP |
748 | for (ring = 0; ring < adapter->max_sds_rings; ring++) { |
749 | sds_ring = &recv_ctx->sds_rings[ring]; | |
750 | sprintf(sds_ring->name, "%16s[%d]", netdev->name, ring); | |
751 | err = request_irq(sds_ring->irq, handler, | |
752 | flags, sds_ring->name, sds_ring); | |
753 | if (err) | |
754 | return err; | |
755 | } | |
756 | ||
757 | return 0; | |
758 | } | |
759 | ||
760 | static void | |
761 | netxen_nic_free_irq(struct netxen_adapter *adapter) | |
762 | { | |
763 | int ring; | |
764 | struct nx_host_sds_ring *sds_ring; | |
765 | ||
766 | struct netxen_recv_context *recv_ctx = &adapter->recv_ctx; | |
767 | ||
768 | for (ring = 0; ring < adapter->max_sds_rings; ring++) { | |
769 | sds_ring = &recv_ctx->sds_rings[ring]; | |
770 | free_irq(sds_ring->irq, sds_ring); | |
771 | } | |
9f5bc7f1 DP |
772 | } |
773 | ||
774 | static int | |
775 | netxen_nic_up(struct netxen_adapter *adapter, struct net_device *netdev) | |
776 | { | |
777 | int err; | |
778 | ||
779 | err = adapter->init_port(adapter, adapter->physical_port); | |
780 | if (err) { | |
781 | printk(KERN_ERR "%s: Failed to initialize port %d\n", | |
782 | netxen_nic_driver_name, adapter->portnum); | |
783 | return err; | |
784 | } | |
785 | adapter->macaddr_set(adapter, netdev->dev_addr); | |
786 | ||
787 | netxen_nic_set_link_parameters(adapter); | |
788 | ||
789 | netxen_set_multicast_list(netdev); | |
790 | if (adapter->set_mtu) | |
791 | adapter->set_mtu(adapter, netdev->mtu); | |
792 | ||
793 | adapter->ahw.linkup = 0; | |
794 | mod_timer(&adapter->watchdog_timer, jiffies); | |
795 | ||
d8b100c5 DP |
796 | netxen_napi_enable(adapter); |
797 | ||
798 | if (adapter->max_sds_rings > 1) | |
799 | netxen_config_rss(adapter, 1); | |
9f5bc7f1 | 800 | |
5103c9f7 | 801 | if (adapter->capabilities & NX_FW_CAPABILITY_LINK_NOTIFICATION) |
3bf26ce3 DP |
802 | netxen_linkevent_request(adapter, 1); |
803 | ||
9f5bc7f1 DP |
804 | return 0; |
805 | } | |
806 | ||
807 | static void | |
808 | netxen_nic_down(struct netxen_adapter *adapter, struct net_device *netdev) | |
809 | { | |
810 | netif_carrier_off(netdev); | |
811 | netif_stop_queue(netdev); | |
22527864 | 812 | smp_mb(); |
d8b100c5 | 813 | netxen_napi_disable(adapter); |
9f5bc7f1 DP |
814 | |
815 | if (adapter->stop_port) | |
816 | adapter->stop_port(adapter); | |
817 | ||
9f5bc7f1 DP |
818 | netxen_release_tx_buffers(adapter); |
819 | ||
820 | FLUSH_SCHEDULED_WORK(); | |
821 | del_timer_sync(&adapter->watchdog_timer); | |
822 | } | |
823 | ||
824 | ||
825 | static int | |
826 | netxen_nic_attach(struct netxen_adapter *adapter) | |
827 | { | |
828 | struct net_device *netdev = adapter->netdev; | |
829 | struct pci_dev *pdev = adapter->pdev; | |
becf46a0 | 830 | int err, ring; |
d8b100c5 | 831 | struct nx_host_rds_ring *rds_ring; |
d877f1e3 | 832 | struct nx_host_tx_ring *tx_ring; |
9f5bc7f1 DP |
833 | |
834 | err = netxen_init_firmware(adapter); | |
835 | if (err != 0) { | |
836 | printk(KERN_ERR "Failed to init firmware\n"); | |
837 | return -EIO; | |
838 | } | |
839 | ||
840 | if (adapter->fw_major < 4) | |
841 | adapter->max_rds_rings = 3; | |
842 | else | |
843 | adapter->max_rds_rings = 2; | |
844 | ||
845 | err = netxen_alloc_sw_resources(adapter); | |
846 | if (err) { | |
847 | printk(KERN_ERR "%s: Error in setting sw resources\n", | |
848 | netdev->name); | |
849 | return err; | |
850 | } | |
851 | ||
852 | netxen_nic_clear_stats(adapter); | |
853 | ||
854 | err = netxen_alloc_hw_resources(adapter); | |
855 | if (err) { | |
856 | printk(KERN_ERR "%s: Error in setting hw resources\n", | |
857 | netdev->name); | |
858 | goto err_out_free_sw; | |
859 | } | |
860 | ||
861 | if (adapter->fw_major < 4) { | |
4ea528a1 | 862 | tx_ring = adapter->tx_ring; |
d877f1e3 DP |
863 | tx_ring->crb_cmd_producer = crb_cmd_producer[adapter->portnum]; |
864 | tx_ring->crb_cmd_consumer = crb_cmd_consumer[adapter->portnum]; | |
9f5bc7f1 | 865 | |
d877f1e3 DP |
866 | netxen_nic_update_cmd_producer(adapter, tx_ring, 0); |
867 | netxen_nic_update_cmd_consumer(adapter, tx_ring, 0); | |
9f5bc7f1 DP |
868 | } |
869 | ||
d8b100c5 DP |
870 | for (ring = 0; ring < adapter->max_rds_rings; ring++) { |
871 | rds_ring = &adapter->recv_ctx.rds_rings[ring]; | |
872 | netxen_post_rx_buffers(adapter, ring, rds_ring); | |
873 | } | |
9f5bc7f1 DP |
874 | |
875 | err = netxen_nic_request_irq(adapter); | |
876 | if (err) { | |
877 | dev_err(&pdev->dev, "%s: failed to setup interrupt\n", | |
878 | netdev->name); | |
879 | goto err_out_free_rxbuf; | |
880 | } | |
881 | ||
882 | adapter->is_up = NETXEN_ADAPTER_UP_MAGIC; | |
883 | return 0; | |
884 | ||
885 | err_out_free_rxbuf: | |
886 | netxen_release_rx_buffers(adapter); | |
887 | netxen_free_hw_resources(adapter); | |
888 | err_out_free_sw: | |
889 | netxen_free_sw_resources(adapter); | |
890 | return err; | |
891 | } | |
892 | ||
893 | static void | |
894 | netxen_nic_detach(struct netxen_adapter *adapter) | |
895 | { | |
d8b100c5 | 896 | netxen_nic_free_irq(adapter); |
9f5bc7f1 DP |
897 | |
898 | netxen_release_rx_buffers(adapter); | |
899 | netxen_free_hw_resources(adapter); | |
900 | netxen_free_sw_resources(adapter); | |
901 | ||
902 | adapter->is_up = 0; | |
903 | } | |
904 | ||
3d396eb1 AK |
905 | static int __devinit |
906 | netxen_nic_probe(struct pci_dev *pdev, const struct pci_device_id *ent) | |
907 | { | |
908 | struct net_device *netdev = NULL; | |
909 | struct netxen_adapter *adapter = NULL; | |
2956640d | 910 | int i = 0, err; |
3176ff3e | 911 | int pci_func_id = PCI_FUNC(pdev->devfn); |
2956640d | 912 | uint8_t revision_id; |
3d396eb1 | 913 | |
3176ff3e | 914 | if (pdev->class != 0x020000) { |
dcd56fdb | 915 | printk(KERN_DEBUG "NetXen function %d, class %x will not " |
3176ff3e | 916 | "be enabled.\n",pci_func_id, pdev->class); |
ed25ffa1 AK |
917 | return -ENODEV; |
918 | } | |
2956640d | 919 | |
11d89d63 DP |
920 | if (pdev->revision >= NX_P3_A0 && pdev->revision < NX_P3_B1) { |
921 | printk(KERN_WARNING "NetXen chip revisions between 0x%x-0x%x" | |
922 | "will not be enabled.\n", | |
923 | NX_P3_A0, NX_P3_B1); | |
924 | return -ENODEV; | |
925 | } | |
926 | ||
3d396eb1 AK |
927 | if ((err = pci_enable_device(pdev))) |
928 | return err; | |
2956640d | 929 | |
3d396eb1 AK |
930 | if (!(pci_resource_flags(pdev, 0) & IORESOURCE_MEM)) { |
931 | err = -ENODEV; | |
932 | goto err_out_disable_pdev; | |
933 | } | |
934 | ||
935 | if ((err = pci_request_regions(pdev, netxen_nic_driver_name))) | |
936 | goto err_out_disable_pdev; | |
937 | ||
938 | pci_set_master(pdev); | |
3176ff3e MT |
939 | |
940 | netdev = alloc_etherdev(sizeof(struct netxen_adapter)); | |
941 | if(!netdev) { | |
942 | printk(KERN_ERR"%s: Failed to allocate memory for the " | |
943 | "device block.Check system memory resource" | |
944 | " usage.\n", netxen_nic_driver_name); | |
945 | goto err_out_free_res; | |
946 | } | |
947 | ||
3176ff3e MT |
948 | SET_NETDEV_DEV(netdev, &pdev->dev); |
949 | ||
4cf1653a | 950 | adapter = netdev_priv(netdev); |
2956640d DP |
951 | adapter->netdev = netdev; |
952 | adapter->pdev = pdev; | |
13ba9c77 | 953 | adapter->ahw.pci_func = pci_func_id; |
2956640d DP |
954 | |
955 | revision_id = pdev->revision; | |
956 | adapter->ahw.revision_id = revision_id; | |
957 | ||
958 | err = nx_set_dma_mask(adapter, revision_id); | |
959 | if (err) | |
960 | goto err_out_free_netdev; | |
961 | ||
3ce06a32 | 962 | rwlock_init(&adapter->adapter_lock); |
d8b100c5 | 963 | spin_lock_init(&adapter->tx_clean_lock); |
3ce06a32 | 964 | |
97daee83 DP |
965 | err = netxen_setup_pci_map(adapter); |
966 | if (err) | |
6c80b18d | 967 | goto err_out_free_netdev; |
3d396eb1 | 968 | |
2d1a3bbd | 969 | /* This will be reset for mezz cards */ |
3176ff3e | 970 | adapter->portnum = pci_func_id; |
200eef20 | 971 | adapter->rx_csum = 1; |
623621b0 | 972 | adapter->mc_enabled = 0; |
83821a07 | 973 | if (NX_IS_REVISION_P3(revision_id)) |
2956640d | 974 | adapter->max_mc_count = 38; |
83821a07 | 975 | else |
2956640d | 976 | adapter->max_mc_count = 16; |
3176ff3e | 977 | |
1abd266f | 978 | netdev->netdev_ops = &netxen_netdev_ops; |
05aaa02d | 979 | netdev->watchdog_timeo = 2*HZ; |
3176ff3e MT |
980 | |
981 | netxen_nic_change_mtu(netdev, netdev->mtu); | |
982 | ||
983 | SET_ETHTOOL_OPS(netdev, &netxen_nic_ethtool_ops); | |
1abd266f | 984 | |
cdff1036 | 985 | netdev->features |= (NETIF_F_SG | NETIF_F_IP_CSUM | NETIF_F_TSO); |
a92e9e65 | 986 | netdev->features |= (NETIF_F_GRO); |
cdff1036 DP |
987 | netdev->vlan_features |= (NETIF_F_SG | NETIF_F_IP_CSUM | NETIF_F_TSO); |
988 | ||
cd1f8160 | 989 | if (NX_IS_REVISION_P3(revision_id)) { |
cdff1036 DP |
990 | netdev->features |= (NETIF_F_IPV6_CSUM | NETIF_F_TSO6); |
991 | netdev->vlan_features |= (NETIF_F_IPV6_CSUM | NETIF_F_TSO6); | |
cd1f8160 | 992 | } |
3176ff3e | 993 | |
cdff1036 | 994 | if (adapter->pci_using_dac) { |
3176ff3e | 995 | netdev->features |= NETIF_F_HIGHDMA; |
cdff1036 DP |
996 | netdev->vlan_features |= NETIF_F_HIGHDMA; |
997 | } | |
3176ff3e | 998 | |
dcd56fdb DP |
999 | if (netxen_nic_get_board_info(adapter) != 0) { |
1000 | printk("%s: Error getting board config info.\n", | |
2956640d | 1001 | netxen_nic_driver_name); |
dcd56fdb DP |
1002 | err = -EIO; |
1003 | goto err_out_iounmap; | |
1004 | } | |
6c80b18d | 1005 | |
6c80b18d MT |
1006 | netxen_initialize_adapter_ops(adapter); |
1007 | ||
13ba9c77 | 1008 | /* Mezz cards have PCI function 0,2,3 enabled */ |
1e2d0059 | 1009 | switch (adapter->ahw.board_type) { |
dc515f2e DP |
1010 | case NETXEN_BRDTYPE_P2_SB31_10G_IMEZ: |
1011 | case NETXEN_BRDTYPE_P2_SB31_10G_HMEZ: | |
1012 | if (pci_func_id >= 2) | |
13ba9c77 | 1013 | adapter->portnum = pci_func_id - 2; |
dc515f2e DP |
1014 | break; |
1015 | default: | |
1016 | break; | |
1017 | } | |
13ba9c77 | 1018 | |
f7185c71 | 1019 | err = netxen_start_firmware(adapter, 1); |
0b72e659 DP |
1020 | if (err) |
1021 | goto err_out_iounmap; | |
2956640d | 1022 | |
1f434f63 DP |
1023 | nx_update_dma_mask(adapter); |
1024 | ||
1e2d0059 | 1025 | netxen_nic_get_firmware_info(adapter); |
d9e651bc | 1026 | |
3d396eb1 | 1027 | /* |
6c80b18d | 1028 | * See if the firmware gave us a virtual-physical port mapping. |
3d396eb1 | 1029 | */ |
dcd56fdb | 1030 | adapter->physical_port = adapter->portnum; |
044fad0d | 1031 | if (adapter->fw_major < 4) { |
f98a9f69 | 1032 | i = NXRD32(adapter, CRB_V2P(adapter->portnum)); |
044fad0d DP |
1033 | if (i != 0x55555555) |
1034 | adapter->physical_port = i; | |
1035 | } | |
6c80b18d | 1036 | |
438627c7 | 1037 | netxen_check_options(adapter); |
2956640d | 1038 | |
97daee83 | 1039 | netxen_setup_intr(adapter); |
2956640d | 1040 | |
d8b100c5 DP |
1041 | netdev->irq = adapter->msix_entries[0].vector; |
1042 | ||
71dcddbd DP |
1043 | if (netxen_napi_add(adapter, netdev)) |
1044 | goto err_out_disable_msi; | |
2956640d | 1045 | |
2956640d | 1046 | init_timer(&adapter->watchdog_timer); |
2956640d DP |
1047 | adapter->watchdog_timer.function = &netxen_watchdog; |
1048 | adapter->watchdog_timer.data = (unsigned long)adapter; | |
1049 | INIT_WORK(&adapter->watchdog_task, netxen_watchdog_task); | |
1050 | INIT_WORK(&adapter->tx_timeout_task, netxen_tx_timeout_task); | |
1051 | ||
9dc28efe DP |
1052 | err = netxen_read_mac_addr(adapter); |
1053 | if (err) | |
1054 | dev_warn(&pdev->dev, "failed to read mac addr\n"); | |
2956640d | 1055 | |
3176ff3e MT |
1056 | netif_carrier_off(netdev); |
1057 | netif_stop_queue(netdev); | |
1058 | ||
6c80b18d MT |
1059 | if ((err = register_netdev(netdev))) { |
1060 | printk(KERN_ERR "%s: register_netdev failed port #%d" | |
1061 | " aborting\n", netxen_nic_driver_name, | |
1062 | adapter->portnum); | |
1063 | err = -EIO; | |
2956640d | 1064 | goto err_out_disable_msi; |
6c80b18d MT |
1065 | } |
1066 | ||
1067 | pci_set_drvdata(pdev, adapter); | |
3d396eb1 | 1068 | |
1e2d0059 | 1069 | switch (adapter->ahw.port_type) { |
2956640d DP |
1070 | case NETXEN_NIC_GBE: |
1071 | dev_info(&adapter->pdev->dev, "%s: GbE port initialized\n", | |
1072 | adapter->netdev->name); | |
1073 | break; | |
1074 | case NETXEN_NIC_XGBE: | |
1075 | dev_info(&adapter->pdev->dev, "%s: XGbE port initialized\n", | |
1076 | adapter->netdev->name); | |
1077 | break; | |
3d396eb1 | 1078 | } |
3d396eb1 | 1079 | |
2956640d DP |
1080 | return 0; |
1081 | ||
1082 | err_out_disable_msi: | |
97daee83 | 1083 | netxen_teardown_intr(adapter); |
6c80b18d | 1084 | |
0b72e659 | 1085 | netxen_free_adapter_offload(adapter); |
3d396eb1 | 1086 | |
2956640d | 1087 | err_out_iounmap: |
97daee83 | 1088 | netxen_cleanup_pci_map(adapter); |
cb8011ad | 1089 | |
6c80b18d MT |
1090 | err_out_free_netdev: |
1091 | free_netdev(netdev); | |
1092 | ||
1093 | err_out_free_res: | |
3d396eb1 | 1094 | pci_release_regions(pdev); |
6c80b18d MT |
1095 | |
1096 | err_out_disable_pdev: | |
2956640d | 1097 | pci_set_drvdata(pdev, NULL); |
3d396eb1 AK |
1098 | pci_disable_device(pdev); |
1099 | return err; | |
1100 | } | |
1101 | ||
1102 | static void __devexit netxen_nic_remove(struct pci_dev *pdev) | |
1103 | { | |
1104 | struct netxen_adapter *adapter; | |
3176ff3e | 1105 | struct net_device *netdev; |
3d396eb1 | 1106 | |
6c80b18d | 1107 | adapter = pci_get_drvdata(pdev); |
3d396eb1 AK |
1108 | if (adapter == NULL) |
1109 | return; | |
1110 | ||
6c80b18d MT |
1111 | netdev = adapter->netdev; |
1112 | ||
96acb6eb DP |
1113 | unregister_netdev(netdev); |
1114 | ||
96acb6eb | 1115 | if (adapter->is_up == NETXEN_ADAPTER_UP_MAGIC) { |
9f5bc7f1 | 1116 | netxen_nic_detach(adapter); |
06e9d9f9 DP |
1117 | |
1118 | if (NX_IS_REVISION_P3(adapter->ahw.revision_id)) | |
1119 | netxen_p3_free_mac_list(adapter); | |
96acb6eb | 1120 | } |
3d396eb1 | 1121 | |
439b454e DP |
1122 | if (adapter->portnum == 0) |
1123 | netxen_free_adapter_offload(adapter); | |
96acb6eb | 1124 | |
97daee83 | 1125 | netxen_teardown_intr(adapter); |
71dcddbd | 1126 | netxen_free_sds_rings(&adapter->recv_ctx); |
3052246c | 1127 | |
97daee83 | 1128 | netxen_cleanup_pci_map(adapter); |
595e3fb8 | 1129 | |
f7185c71 DP |
1130 | netxen_release_firmware(adapter); |
1131 | ||
595e3fb8 | 1132 | pci_release_regions(pdev); |
3052246c | 1133 | pci_disable_device(pdev); |
595e3fb8 MT |
1134 | pci_set_drvdata(pdev, NULL); |
1135 | ||
6c80b18d | 1136 | free_netdev(netdev); |
3d396eb1 AK |
1137 | } |
1138 | ||
0b72e659 DP |
1139 | static int |
1140 | netxen_nic_suspend(struct pci_dev *pdev, pm_message_t state) | |
1141 | { | |
1142 | ||
1143 | struct netxen_adapter *adapter = pci_get_drvdata(pdev); | |
1144 | struct net_device *netdev = adapter->netdev; | |
1145 | ||
1146 | netif_device_detach(netdev); | |
1147 | ||
1148 | if (netif_running(netdev)) | |
1149 | netxen_nic_down(adapter, netdev); | |
1150 | ||
1151 | if (adapter->is_up == NETXEN_ADAPTER_UP_MAGIC) | |
1152 | netxen_nic_detach(adapter); | |
1153 | ||
1154 | pci_save_state(pdev); | |
1155 | ||
1156 | if (netxen_nic_wol_supported(adapter)) { | |
1157 | pci_enable_wake(pdev, PCI_D3cold, 1); | |
1158 | pci_enable_wake(pdev, PCI_D3hot, 1); | |
1159 | } | |
1160 | ||
1161 | pci_disable_device(pdev); | |
1162 | pci_set_power_state(pdev, pci_choose_state(pdev, state)); | |
1163 | ||
1164 | return 0; | |
1165 | } | |
1166 | ||
1167 | static int | |
1168 | netxen_nic_resume(struct pci_dev *pdev) | |
1169 | { | |
1170 | struct netxen_adapter *adapter = pci_get_drvdata(pdev); | |
1171 | struct net_device *netdev = adapter->netdev; | |
1172 | int err; | |
1173 | ||
1174 | pci_set_power_state(pdev, PCI_D0); | |
1175 | pci_restore_state(pdev); | |
1176 | ||
1177 | err = pci_enable_device(pdev); | |
1178 | if (err) | |
1179 | return err; | |
1180 | ||
1181 | adapter->curr_window = 255; | |
1182 | ||
f7185c71 | 1183 | err = netxen_start_firmware(adapter, 0); |
0b72e659 DP |
1184 | if (err) { |
1185 | dev_err(&pdev->dev, "failed to start firmware\n"); | |
1186 | return err; | |
1187 | } | |
1188 | ||
1189 | if (netif_running(netdev)) { | |
1190 | err = netxen_nic_attach(adapter); | |
1191 | if (err) | |
1192 | return err; | |
1193 | ||
1194 | err = netxen_nic_up(adapter, netdev); | |
1195 | if (err) | |
1196 | return err; | |
1197 | ||
1198 | netif_device_attach(netdev); | |
1199 | } | |
1200 | ||
1201 | return 0; | |
1202 | } | |
1203 | ||
3d396eb1 AK |
1204 | static int netxen_nic_open(struct net_device *netdev) |
1205 | { | |
4cf1653a | 1206 | struct netxen_adapter *adapter = netdev_priv(netdev); |
3d396eb1 | 1207 | int err = 0; |
3d396eb1 | 1208 | |
dcd56fdb DP |
1209 | if (adapter->driver_mismatch) |
1210 | return -EIO; | |
1211 | ||
3d396eb1 | 1212 | if (adapter->is_up != NETXEN_ADAPTER_UP_MAGIC) { |
9f5bc7f1 DP |
1213 | err = netxen_nic_attach(adapter); |
1214 | if (err) | |
3d396eb1 | 1215 | return err; |
ed25ffa1 | 1216 | } |
2956640d | 1217 | |
9f5bc7f1 DP |
1218 | err = netxen_nic_up(adapter, netdev); |
1219 | if (err) | |
1220 | goto err_out; | |
05aaa02d | 1221 | |
dcd56fdb | 1222 | netif_start_queue(netdev); |
3d396eb1 AK |
1223 | |
1224 | return 0; | |
2956640d | 1225 | |
9f5bc7f1 DP |
1226 | err_out: |
1227 | netxen_nic_detach(adapter); | |
2956640d | 1228 | return err; |
3d396eb1 AK |
1229 | } |
1230 | ||
1231 | /* | |
1232 | * netxen_nic_close - Disables a network interface entry point | |
1233 | */ | |
1234 | static int netxen_nic_close(struct net_device *netdev) | |
1235 | { | |
3176ff3e | 1236 | struct netxen_adapter *adapter = netdev_priv(netdev); |
3d396eb1 | 1237 | |
9f5bc7f1 | 1238 | netxen_nic_down(adapter, netdev); |
3d396eb1 AK |
1239 | return 0; |
1240 | } | |
1241 | ||
391587c3 | 1242 | static bool netxen_tso_check(struct net_device *netdev, |
cd1f8160 DP |
1243 | struct cmd_desc_type0 *desc, struct sk_buff *skb) |
1244 | { | |
391587c3 DP |
1245 | bool tso = false; |
1246 | u8 opcode = TX_ETHER_PKT; | |
cdff1036 DP |
1247 | __be16 protocol = skb->protocol; |
1248 | u16 flags = 0; | |
1249 | ||
09640e63 | 1250 | if (protocol == cpu_to_be16(ETH_P_8021Q)) { |
cdff1036 DP |
1251 | struct vlan_ethhdr *vh = (struct vlan_ethhdr *)skb->data; |
1252 | protocol = vh->h_vlan_encapsulated_proto; | |
1253 | flags = FLAGS_VLAN_TAGGED; | |
1254 | } | |
cd1f8160 | 1255 | |
391587c3 DP |
1256 | if ((netdev->features & (NETIF_F_TSO | NETIF_F_TSO6)) && |
1257 | skb_shinfo(skb)->gso_size > 0) { | |
1258 | ||
1259 | desc->mss = cpu_to_le16(skb_shinfo(skb)->gso_size); | |
1260 | desc->total_hdr_length = | |
1261 | skb_transport_offset(skb) + tcp_hdrlen(skb); | |
1262 | ||
09640e63 | 1263 | opcode = (protocol == cpu_to_be16(ETH_P_IPV6)) ? |
391587c3 DP |
1264 | TX_TCP_LSO6 : TX_TCP_LSO; |
1265 | tso = true; | |
cd1f8160 DP |
1266 | |
1267 | } else if (skb->ip_summed == CHECKSUM_PARTIAL) { | |
391587c3 DP |
1268 | u8 l4proto; |
1269 | ||
09640e63 | 1270 | if (protocol == cpu_to_be16(ETH_P_IP)) { |
391587c3 DP |
1271 | l4proto = ip_hdr(skb)->protocol; |
1272 | ||
1273 | if (l4proto == IPPROTO_TCP) | |
1274 | opcode = TX_TCP_PKT; | |
1275 | else if(l4proto == IPPROTO_UDP) | |
1276 | opcode = TX_UDP_PKT; | |
09640e63 | 1277 | } else if (protocol == cpu_to_be16(ETH_P_IPV6)) { |
391587c3 DP |
1278 | l4proto = ipv6_hdr(skb)->nexthdr; |
1279 | ||
1280 | if (l4proto == IPPROTO_TCP) | |
1281 | opcode = TX_TCPV6_PKT; | |
1282 | else if(l4proto == IPPROTO_UDP) | |
1283 | opcode = TX_UDPV6_PKT; | |
1284 | } | |
cd1f8160 DP |
1285 | } |
1286 | desc->tcp_hdr_offset = skb_transport_offset(skb); | |
1287 | desc->ip_hdr_offset = skb_network_offset(skb); | |
cdff1036 | 1288 | netxen_set_tx_flags_opcode(desc, flags, opcode); |
391587c3 | 1289 | return tso; |
cd1f8160 DP |
1290 | } |
1291 | ||
6f703406 DP |
1292 | static void |
1293 | netxen_clean_tx_dma_mapping(struct pci_dev *pdev, | |
1294 | struct netxen_cmd_buffer *pbuf, int last) | |
1295 | { | |
1296 | int k; | |
1297 | struct netxen_skb_frag *buffrag; | |
1298 | ||
1299 | buffrag = &pbuf->frag_array[0]; | |
1300 | pci_unmap_single(pdev, buffrag->dma, | |
1301 | buffrag->length, PCI_DMA_TODEVICE); | |
1302 | ||
1303 | for (k = 1; k < last; k++) { | |
1304 | buffrag = &pbuf->frag_array[k]; | |
1305 | pci_unmap_page(pdev, buffrag->dma, | |
1306 | buffrag->length, PCI_DMA_TODEVICE); | |
1307 | } | |
1308 | } | |
1309 | ||
d32cc3d2 DP |
1310 | static inline void |
1311 | netxen_clear_cmddesc(u64 *desc) | |
1312 | { | |
1313 | int i; | |
1314 | for (i = 0; i < 8; i++) | |
1315 | desc[i] = 0ULL; | |
1316 | } | |
1317 | ||
1318 | static int | |
1319 | netxen_nic_xmit_frame(struct sk_buff *skb, struct net_device *netdev) | |
3d396eb1 | 1320 | { |
3176ff3e | 1321 | struct netxen_adapter *adapter = netdev_priv(netdev); |
4ea528a1 | 1322 | struct nx_host_tx_ring *tx_ring = adapter->tx_ring; |
3d396eb1 | 1323 | unsigned int first_seg_len = skb->len - skb->data_len; |
391587c3 | 1324 | struct netxen_cmd_buffer *pbuf; |
3d396eb1 | 1325 | struct netxen_skb_frag *buffrag; |
391587c3 | 1326 | struct cmd_desc_type0 *hwdesc; |
6f703406 DP |
1327 | struct pci_dev *pdev = adapter->pdev; |
1328 | dma_addr_t temp_dma; | |
391587c3 | 1329 | int i, k; |
3d396eb1 | 1330 | |
ba53e6b4 | 1331 | u32 producer, consumer; |
391587c3 | 1332 | int frag_count, no_of_desc; |
d877f1e3 | 1333 | u32 num_txd = tx_ring->num_desc; |
391587c3 | 1334 | bool is_tso = false; |
3d396eb1 | 1335 | |
3d396eb1 AK |
1336 | frag_count = skb_shinfo(skb)->nr_frags + 1; |
1337 | ||
d877f1e3 | 1338 | /* 4 fragments per cmd des */ |
3d396eb1 | 1339 | no_of_desc = (frag_count + 3) >> 2; |
53a01e00 | 1340 | |
d877f1e3 | 1341 | producer = tx_ring->producer; |
ba53e6b4 | 1342 | smp_mb(); |
d877f1e3 | 1343 | consumer = tx_ring->sw_consumer; |
22527864 | 1344 | if ((no_of_desc+2) >= find_diff_among(producer, consumer, num_txd)) { |
ba53e6b4 DP |
1345 | netif_stop_queue(netdev); |
1346 | smp_mb(); | |
1347 | return NETDEV_TX_BUSY; | |
53a01e00 | 1348 | } |
3d396eb1 | 1349 | |
d877f1e3 | 1350 | hwdesc = &tx_ring->desc_head[producer]; |
d32cc3d2 | 1351 | netxen_clear_cmddesc((u64 *)hwdesc); |
d877f1e3 | 1352 | pbuf = &tx_ring->cmd_buf_arr[producer]; |
391587c3 DP |
1353 | |
1354 | is_tso = netxen_tso_check(netdev, hwdesc, skb); | |
1355 | ||
3d396eb1 | 1356 | pbuf->skb = skb; |
3d396eb1 | 1357 | pbuf->frag_count = frag_count; |
3d396eb1 | 1358 | buffrag = &pbuf->frag_array[0]; |
6f703406 | 1359 | temp_dma = pci_map_single(pdev, skb->data, first_seg_len, |
3d396eb1 | 1360 | PCI_DMA_TODEVICE); |
6f703406 DP |
1361 | if (pci_dma_mapping_error(pdev, temp_dma)) |
1362 | goto drop_packet; | |
1363 | ||
1364 | buffrag->dma = temp_dma; | |
3d396eb1 | 1365 | buffrag->length = first_seg_len; |
391587c3 DP |
1366 | netxen_set_tx_frags_len(hwdesc, frag_count, skb->len); |
1367 | netxen_set_tx_port(hwdesc, adapter->portnum); | |
3d396eb1 | 1368 | |
d32cc3d2 | 1369 | hwdesc->buffer_length[0] = cpu_to_le16(first_seg_len); |
3d396eb1 AK |
1370 | hwdesc->addr_buffer1 = cpu_to_le64(buffrag->dma); |
1371 | ||
1372 | for (i = 1, k = 1; i < frag_count; i++, k++) { | |
1373 | struct skb_frag_struct *frag; | |
1374 | int len, temp_len; | |
1375 | unsigned long offset; | |
3d396eb1 AK |
1376 | |
1377 | /* move to next desc. if there is a need */ | |
1378 | if ((i & 0x3) == 0) { | |
1379 | k = 0; | |
ba53e6b4 | 1380 | producer = get_next_index(producer, num_txd); |
d877f1e3 | 1381 | hwdesc = &tx_ring->desc_head[producer]; |
d32cc3d2 | 1382 | netxen_clear_cmddesc((u64 *)hwdesc); |
d877f1e3 | 1383 | pbuf = &tx_ring->cmd_buf_arr[producer]; |
53a01e00 | 1384 | pbuf->skb = NULL; |
3d396eb1 AK |
1385 | } |
1386 | frag = &skb_shinfo(skb)->frags[i - 1]; | |
1387 | len = frag->size; | |
1388 | offset = frag->page_offset; | |
1389 | ||
1390 | temp_len = len; | |
6f703406 | 1391 | temp_dma = pci_map_page(pdev, frag->page, offset, |
3d396eb1 | 1392 | len, PCI_DMA_TODEVICE); |
6f703406 DP |
1393 | if (pci_dma_mapping_error(pdev, temp_dma)) { |
1394 | netxen_clean_tx_dma_mapping(pdev, pbuf, i); | |
1395 | goto drop_packet; | |
1396 | } | |
3d396eb1 AK |
1397 | |
1398 | buffrag++; | |
1399 | buffrag->dma = temp_dma; | |
1400 | buffrag->length = temp_len; | |
1401 | ||
d32cc3d2 | 1402 | hwdesc->buffer_length[k] = cpu_to_le16(temp_len); |
3d396eb1 AK |
1403 | switch (k) { |
1404 | case 0: | |
3d396eb1 AK |
1405 | hwdesc->addr_buffer1 = cpu_to_le64(temp_dma); |
1406 | break; | |
1407 | case 1: | |
3d396eb1 AK |
1408 | hwdesc->addr_buffer2 = cpu_to_le64(temp_dma); |
1409 | break; | |
1410 | case 2: | |
3d396eb1 AK |
1411 | hwdesc->addr_buffer3 = cpu_to_le64(temp_dma); |
1412 | break; | |
1413 | case 3: | |
3d396eb1 AK |
1414 | hwdesc->addr_buffer4 = cpu_to_le64(temp_dma); |
1415 | break; | |
1416 | } | |
1417 | frag++; | |
1418 | } | |
ba53e6b4 | 1419 | producer = get_next_index(producer, num_txd); |
3d396eb1 | 1420 | |
3d396eb1 AK |
1421 | /* For LSO, we need to copy the MAC/IP/TCP headers into |
1422 | * the descriptor ring | |
1423 | */ | |
391587c3 | 1424 | if (is_tso) { |
3d396eb1 | 1425 | int hdr_len, first_hdr_len, more_hdr; |
391587c3 | 1426 | hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb); |
ed25ffa1 AK |
1427 | if (hdr_len > (sizeof(struct cmd_desc_type0) - 2)) { |
1428 | first_hdr_len = sizeof(struct cmd_desc_type0) - 2; | |
3d396eb1 AK |
1429 | more_hdr = 1; |
1430 | } else { | |
1431 | first_hdr_len = hdr_len; | |
1432 | more_hdr = 0; | |
1433 | } | |
1434 | /* copy the MAC/IP/TCP headers to the cmd descriptor list */ | |
d877f1e3 DP |
1435 | hwdesc = &tx_ring->desc_head[producer]; |
1436 | pbuf = &tx_ring->cmd_buf_arr[producer]; | |
53a01e00 | 1437 | pbuf->skb = NULL; |
3d396eb1 AK |
1438 | |
1439 | /* copy the first 64 bytes */ | |
ed25ffa1 | 1440 | memcpy(((void *)hwdesc) + 2, |
3d396eb1 | 1441 | (void *)(skb->data), first_hdr_len); |
ba53e6b4 | 1442 | producer = get_next_index(producer, num_txd); |
3d396eb1 AK |
1443 | |
1444 | if (more_hdr) { | |
d877f1e3 DP |
1445 | hwdesc = &tx_ring->desc_head[producer]; |
1446 | pbuf = &tx_ring->cmd_buf_arr[producer]; | |
53a01e00 | 1447 | pbuf->skb = NULL; |
3d396eb1 AK |
1448 | /* copy the next 64 bytes - should be enough except |
1449 | * for pathological case | |
1450 | */ | |
d626f62b ACM |
1451 | skb_copy_from_linear_data_offset(skb, first_hdr_len, |
1452 | hwdesc, | |
1453 | (hdr_len - | |
1454 | first_hdr_len)); | |
ba53e6b4 | 1455 | producer = get_next_index(producer, num_txd); |
3d396eb1 AK |
1456 | } |
1457 | } | |
6c80b18d | 1458 | |
d877f1e3 | 1459 | tx_ring->producer = producer; |
5dc16268 | 1460 | adapter->stats.txbytes += skb->len; |
6c80b18d | 1461 | |
d877f1e3 | 1462 | netxen_nic_update_cmd_producer(adapter, tx_ring, producer); |
3d396eb1 | 1463 | |
ba53e6b4 | 1464 | adapter->stats.xmitcalled++; |
3d396eb1 AK |
1465 | netdev->trans_start = jiffies; |
1466 | ||
3d396eb1 | 1467 | return NETDEV_TX_OK; |
6f703406 DP |
1468 | |
1469 | drop_packet: | |
1470 | adapter->stats.txdropped++; | |
1471 | dev_kfree_skb_any(skb); | |
1472 | return NETDEV_TX_OK; | |
3d396eb1 AK |
1473 | } |
1474 | ||
a97342f9 DP |
1475 | static int netxen_nic_check_temp(struct netxen_adapter *adapter) |
1476 | { | |
1477 | struct net_device *netdev = adapter->netdev; | |
1478 | uint32_t temp, temp_state, temp_val; | |
1479 | int rv = 0; | |
1480 | ||
f98a9f69 | 1481 | temp = NXRD32(adapter, CRB_TEMP_STATE); |
a97342f9 DP |
1482 | |
1483 | temp_state = nx_get_temp_state(temp); | |
1484 | temp_val = nx_get_temp_val(temp); | |
1485 | ||
1486 | if (temp_state == NX_TEMP_PANIC) { | |
1487 | printk(KERN_ALERT | |
1488 | "%s: Device temperature %d degrees C exceeds" | |
1489 | " maximum allowed. Hardware has been shut down.\n", | |
1490 | netxen_nic_driver_name, temp_val); | |
1491 | ||
1492 | netif_carrier_off(netdev); | |
1493 | netif_stop_queue(netdev); | |
1494 | rv = 1; | |
1495 | } else if (temp_state == NX_TEMP_WARN) { | |
1496 | if (adapter->temp == NX_TEMP_NORMAL) { | |
1497 | printk(KERN_ALERT | |
1498 | "%s: Device temperature %d degrees C " | |
1499 | "exceeds operating range." | |
1500 | " Immediate action needed.\n", | |
1501 | netxen_nic_driver_name, temp_val); | |
1502 | } | |
1503 | } else { | |
1504 | if (adapter->temp == NX_TEMP_WARN) { | |
1505 | printk(KERN_INFO | |
1506 | "%s: Device temperature is now %d degrees C" | |
1507 | " in normal range.\n", netxen_nic_driver_name, | |
1508 | temp_val); | |
1509 | } | |
1510 | } | |
1511 | adapter->temp = temp_state; | |
1512 | return rv; | |
1513 | } | |
1514 | ||
3bf26ce3 | 1515 | void netxen_advert_link_change(struct netxen_adapter *adapter, int linkup) |
a97342f9 DP |
1516 | { |
1517 | struct net_device *netdev = adapter->netdev; | |
a97342f9 DP |
1518 | |
1519 | if (adapter->ahw.linkup && !linkup) { | |
1520 | printk(KERN_INFO "%s: %s NIC Link is down\n", | |
1521 | netxen_nic_driver_name, netdev->name); | |
1522 | adapter->ahw.linkup = 0; | |
1523 | if (netif_running(netdev)) { | |
1524 | netif_carrier_off(netdev); | |
1525 | netif_stop_queue(netdev); | |
1526 | } | |
c7860a2a | 1527 | |
3bf26ce3 DP |
1528 | if (!adapter->has_link_events) |
1529 | netxen_nic_set_link_parameters(adapter); | |
1530 | ||
a97342f9 DP |
1531 | } else if (!adapter->ahw.linkup && linkup) { |
1532 | printk(KERN_INFO "%s: %s NIC Link is up\n", | |
1533 | netxen_nic_driver_name, netdev->name); | |
1534 | adapter->ahw.linkup = 1; | |
1535 | if (netif_running(netdev)) { | |
1536 | netif_carrier_on(netdev); | |
1537 | netif_wake_queue(netdev); | |
1538 | } | |
c7860a2a | 1539 | |
3bf26ce3 DP |
1540 | if (!adapter->has_link_events) |
1541 | netxen_nic_set_link_parameters(adapter); | |
a97342f9 DP |
1542 | } |
1543 | } | |
1544 | ||
3bf26ce3 DP |
1545 | static void netxen_nic_handle_phy_intr(struct netxen_adapter *adapter) |
1546 | { | |
1547 | u32 val, port, linkup; | |
1548 | ||
1549 | port = adapter->physical_port; | |
1550 | ||
1551 | if (NX_IS_REVISION_P3(adapter->ahw.revision_id)) { | |
f98a9f69 | 1552 | val = NXRD32(adapter, CRB_XG_STATE_P3); |
3bf26ce3 DP |
1553 | val = XG_LINK_STATE_P3(adapter->ahw.pci_func, val); |
1554 | linkup = (val == XG_LINK_UP_P3); | |
1555 | } else { | |
f98a9f69 | 1556 | val = NXRD32(adapter, CRB_XG_STATE); |
3bf26ce3 DP |
1557 | if (adapter->ahw.port_type == NETXEN_NIC_GBE) |
1558 | linkup = (val >> port) & 1; | |
1559 | else { | |
1560 | val = (val >> port*8) & 0xff; | |
1561 | linkup = (val == XG_LINK_UP); | |
1562 | } | |
1563 | } | |
1564 | ||
1565 | netxen_advert_link_change(adapter, linkup); | |
1566 | } | |
1567 | ||
3d396eb1 AK |
1568 | static void netxen_watchdog(unsigned long v) |
1569 | { | |
1570 | struct netxen_adapter *adapter = (struct netxen_adapter *)v; | |
ed25ffa1 AK |
1571 | |
1572 | SCHEDULE_WORK(&adapter->watchdog_task); | |
3d396eb1 AK |
1573 | } |
1574 | ||
a97342f9 DP |
1575 | void netxen_watchdog_task(struct work_struct *work) |
1576 | { | |
1577 | struct netxen_adapter *adapter = | |
1578 | container_of(work, struct netxen_adapter, watchdog_task); | |
1579 | ||
1580 | if ((adapter->portnum == 0) && netxen_nic_check_temp(adapter)) | |
1581 | return; | |
1582 | ||
3bf26ce3 DP |
1583 | if (!adapter->has_link_events) |
1584 | netxen_nic_handle_phy_intr(adapter); | |
a97342f9 | 1585 | |
922c4f2c DP |
1586 | if (netif_running(adapter->netdev)) |
1587 | mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ); | |
a97342f9 DP |
1588 | } |
1589 | ||
3d396eb1 AK |
1590 | static void netxen_tx_timeout(struct net_device *netdev) |
1591 | { | |
3176ff3e MT |
1592 | struct netxen_adapter *adapter = (struct netxen_adapter *) |
1593 | netdev_priv(netdev); | |
1594 | SCHEDULE_WORK(&adapter->tx_timeout_task); | |
3d396eb1 AK |
1595 | } |
1596 | ||
6d5aefb8 | 1597 | static void netxen_tx_timeout_task(struct work_struct *work) |
3d396eb1 | 1598 | { |
4790654c | 1599 | struct netxen_adapter *adapter = |
3176ff3e | 1600 | container_of(work, struct netxen_adapter, tx_timeout_task); |
3d396eb1 AK |
1601 | |
1602 | printk(KERN_ERR "%s %s: transmit timeout, resetting.\n", | |
6c80b18d | 1603 | netxen_nic_driver_name, adapter->netdev->name); |
3d396eb1 | 1604 | |
d8b100c5 | 1605 | netxen_napi_disable(adapter); |
ba53e6b4 | 1606 | |
6c80b18d | 1607 | adapter->netdev->trans_start = jiffies; |
ba53e6b4 | 1608 | |
d8b100c5 | 1609 | netxen_napi_enable(adapter); |
6c80b18d | 1610 | netif_wake_queue(adapter->netdev); |
3d396eb1 AK |
1611 | } |
1612 | ||
a97342f9 DP |
1613 | struct net_device_stats *netxen_nic_get_stats(struct net_device *netdev) |
1614 | { | |
1615 | struct netxen_adapter *adapter = netdev_priv(netdev); | |
1616 | struct net_device_stats *stats = &adapter->net_stats; | |
1617 | ||
1618 | memset(stats, 0, sizeof(*stats)); | |
1619 | ||
a97342f9 | 1620 | stats->rx_packets = adapter->stats.no_rcv; |
e98e3350 | 1621 | stats->tx_packets = adapter->stats.xmitfinished; |
a97342f9 | 1622 | stats->rx_bytes = adapter->stats.rxbytes; |
a97342f9 | 1623 | stats->tx_bytes = adapter->stats.txbytes; |
a97342f9 | 1624 | stats->rx_dropped = adapter->stats.rxdropped; |
a97342f9 DP |
1625 | stats->tx_dropped = adapter->stats.txdropped; |
1626 | ||
1627 | return stats; | |
1628 | } | |
1629 | ||
e4c93c81 | 1630 | static irqreturn_t netxen_intr(int irq, void *data) |
3d396eb1 | 1631 | { |
d8b100c5 DP |
1632 | struct nx_host_sds_ring *sds_ring = data; |
1633 | struct netxen_adapter *adapter = sds_ring->adapter; | |
d71e1be8 DP |
1634 | u32 status = 0; |
1635 | ||
1636 | status = adapter->pci_read_immediate(adapter, ISR_INT_VECTOR); | |
1637 | ||
1638 | if (!(status & adapter->legacy_intr.int_vec_bit)) | |
05aaa02d | 1639 | return IRQ_NONE; |
e01872af | 1640 | |
d71e1be8 DP |
1641 | if (adapter->ahw.revision_id >= NX_P3_B1) { |
1642 | /* check interrupt state machine, to be sure */ | |
1643 | status = adapter->pci_read_immediate(adapter, | |
1644 | ISR_INT_STATE_REG); | |
1645 | if (!ISR_LEGACY_INT_TRIGGERED(status)) | |
1646 | return IRQ_NONE; | |
1647 | ||
092bc571 DP |
1648 | } else { |
1649 | unsigned long our_int = 0; | |
d71e1be8 | 1650 | |
f98a9f69 | 1651 | our_int = NXRD32(adapter, CRB_INT_VECTOR); |
092bc571 | 1652 | |
d71e1be8 | 1653 | /* not our interrupt */ |
092bc571 | 1654 | if (!test_and_clear_bit((7 + adapter->portnum), &our_int)) |
d71e1be8 DP |
1655 | return IRQ_NONE; |
1656 | ||
092bc571 | 1657 | /* claim interrupt */ |
f98a9f69 | 1658 | NXWR32(adapter, CRB_INT_VECTOR, (our_int & 0xffffffff)); |
e01872af | 1659 | } |
1660 | ||
092bc571 DP |
1661 | /* clear interrupt */ |
1662 | if (adapter->fw_major < 4) | |
d8b100c5 | 1663 | netxen_nic_disable_int(sds_ring); |
092bc571 DP |
1664 | |
1665 | adapter->pci_write_immediate(adapter, | |
1666 | adapter->legacy_intr.tgt_status_reg, | |
1667 | 0xffffffff); | |
1668 | /* read twice to ensure write is flushed */ | |
1669 | adapter->pci_read_immediate(adapter, ISR_INT_VECTOR); | |
1670 | adapter->pci_read_immediate(adapter, ISR_INT_VECTOR); | |
1671 | ||
d8b100c5 | 1672 | napi_schedule(&sds_ring->napi); |
3d396eb1 AK |
1673 | |
1674 | return IRQ_HANDLED; | |
1675 | } | |
1676 | ||
e4c93c81 | 1677 | static irqreturn_t netxen_msi_intr(int irq, void *data) |
05aaa02d | 1678 | { |
d8b100c5 DP |
1679 | struct nx_host_sds_ring *sds_ring = data; |
1680 | struct netxen_adapter *adapter = sds_ring->adapter; | |
05aaa02d | 1681 | |
092bc571 DP |
1682 | /* clear interrupt */ |
1683 | adapter->pci_write_immediate(adapter, | |
1684 | msi_tgt_status[adapter->ahw.pci_func], 0xffffffff); | |
1685 | ||
d8b100c5 | 1686 | napi_schedule(&sds_ring->napi); |
05aaa02d DP |
1687 | return IRQ_HANDLED; |
1688 | } | |
1689 | ||
b3df68f8 DP |
1690 | static irqreturn_t netxen_msix_intr(int irq, void *data) |
1691 | { | |
d8b100c5 | 1692 | struct nx_host_sds_ring *sds_ring = data; |
b3df68f8 | 1693 | |
d8b100c5 | 1694 | napi_schedule(&sds_ring->napi); |
b3df68f8 DP |
1695 | return IRQ_HANDLED; |
1696 | } | |
1697 | ||
bea3348e | 1698 | static int netxen_nic_poll(struct napi_struct *napi, int budget) |
3d396eb1 | 1699 | { |
d8b100c5 DP |
1700 | struct nx_host_sds_ring *sds_ring = |
1701 | container_of(napi, struct nx_host_sds_ring, napi); | |
1702 | ||
1703 | struct netxen_adapter *adapter = sds_ring->adapter; | |
1704 | ||
05aaa02d | 1705 | int tx_complete; |
bea3348e | 1706 | int work_done; |
3d396eb1 | 1707 | |
05aaa02d | 1708 | tx_complete = netxen_process_cmd_ring(adapter); |
3d396eb1 | 1709 | |
d8b100c5 | 1710 | work_done = netxen_process_rcv_ring(sds_ring, budget); |
3d396eb1 | 1711 | |
05aaa02d | 1712 | if ((work_done < budget) && tx_complete) { |
d8b100c5 DP |
1713 | napi_complete(&sds_ring->napi); |
1714 | netxen_nic_enable_int(sds_ring); | |
3d396eb1 AK |
1715 | } |
1716 | ||
bea3348e | 1717 | return work_done; |
3d396eb1 AK |
1718 | } |
1719 | ||
1720 | #ifdef CONFIG_NET_POLL_CONTROLLER | |
1721 | static void netxen_nic_poll_controller(struct net_device *netdev) | |
1722 | { | |
3176ff3e | 1723 | struct netxen_adapter *adapter = netdev_priv(netdev); |
3d396eb1 | 1724 | disable_irq(adapter->irq); |
1494a814 | 1725 | netxen_intr(adapter->irq, adapter); |
3d396eb1 AK |
1726 | enable_irq(adapter->irq); |
1727 | } | |
1728 | #endif | |
3d396eb1 AK |
1729 | |
1730 | static struct pci_driver netxen_driver = { | |
1731 | .name = netxen_nic_driver_name, | |
1732 | .id_table = netxen_pci_tbl, | |
1733 | .probe = netxen_nic_probe, | |
0b72e659 DP |
1734 | .remove = __devexit_p(netxen_nic_remove), |
1735 | .suspend = netxen_nic_suspend, | |
1736 | .resume = netxen_nic_resume | |
3d396eb1 AK |
1737 | }; |
1738 | ||
1739 | /* Driver Registration on NetXen card */ | |
1740 | ||
1741 | static int __init netxen_init_module(void) | |
1742 | { | |
ff4fbd43 DP |
1743 | printk(KERN_INFO "%s\n", netxen_nic_driver_string); |
1744 | ||
79ea13ce | 1745 | if ((netxen_workq = create_singlethread_workqueue("netxen")) == NULL) |
ed25ffa1 AK |
1746 | return -ENOMEM; |
1747 | ||
184231bd | 1748 | return pci_register_driver(&netxen_driver); |
3d396eb1 AK |
1749 | } |
1750 | ||
1751 | module_init(netxen_init_module); | |
1752 | ||
1753 | static void __exit netxen_exit_module(void) | |
1754 | { | |
3d396eb1 | 1755 | pci_unregister_driver(&netxen_driver); |
9de06610 | 1756 | destroy_workqueue(netxen_workq); |
3d396eb1 AK |
1757 | } |
1758 | ||
1759 | module_exit(netxen_exit_module); |