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netxen: hold tx lock while sending firmware commands
[linux-2.6-block.git] / drivers / net / netxen / netxen_nic_init.c
CommitLineData
3d396eb1
AK		 1/*
2 * Copyright (C) 2003 - 2006 NetXen, Inc.
3 * All rights reserved.
80922fbc 4 *
3d396eb1
AK		 5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License
7 * as published by the Free Software Foundation; either version 2
8 * of the License, or (at your option) any later version.
80922fbc 9 *
3d396eb1
AK		 10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
80922fbc 14 *
3d396eb1
AK		 15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place - Suite 330, Boston,
18 * MA 02111-1307, USA.
80922fbc 19 *
3d396eb1
AK		 20 * The full GNU General Public License is included in this distribution
21 * in the file called LICENSE.
80922fbc 22 *
3d396eb1
AK		 23 * Contact Information:
24 * info@netxen.com
25 * NetXen,
26 * 3965 Freedom Circle, Fourth floor,
27 * Santa Clara, CA 95054
28 *
29 *
30 * Source file for NIC routines to initialize the Phantom Hardware
31 *
32 */
33
34#include <linux/netdevice.h>
35#include <linux/delay.h>
36#include "netxen_nic.h"
37#include "netxen_nic_hw.h"
3d396eb1
AK		 38#include "netxen_nic_phan_reg.h"
39
40struct crb_addr_pair {
e0e20a1a
LCMT		 41 u32 addr;
42 u32 data;
3d396eb1
AK		 43};
44
45#define NETXEN_MAX_CRB_XFORM 60
46static unsigned int crb_addr_xform[NETXEN_MAX_CRB_XFORM];
e0e20a1a 47#define NETXEN_ADDR_ERROR (0xffffffff)
3d396eb1
AK		 48
49#define crb_addr_transform(name) \
50 crb_addr_xform[NETXEN_HW_PX_MAP_CRB_##name] = \
51 NETXEN_HW_CRB_HUB_AGT_ADR_##name << 20
52
cb8011ad
AK		 53#define NETXEN_NIC_XDMA_RESET 0x8000ff
54
993fb90c
AB		 55static void netxen_post_rx_buffers_nodb(struct netxen_adapter *adapter,
56 uint32_t ctx, uint32_t ringid);
57
58#if 0
59static void netxen_nic_locked_write_reg(struct netxen_adapter *adapter,
60 unsigned long off, int *data)
3d396eb1 61{
cb8011ad 62 void __iomem *addr = pci_base_offset(adapter, off);
3d396eb1
AK		 63 writel(*data, addr);
64}
993fb90c 65#endif /* 0 */
3d396eb1
AK		 66
67static void crb_addr_transform_setup(void)
68{
69 crb_addr_transform(XDMA);
70 crb_addr_transform(TIMR);
71 crb_addr_transform(SRE);
72 crb_addr_transform(SQN3);
73 crb_addr_transform(SQN2);
74 crb_addr_transform(SQN1);
75 crb_addr_transform(SQN0);
76 crb_addr_transform(SQS3);
77 crb_addr_transform(SQS2);
78 crb_addr_transform(SQS1);
79 crb_addr_transform(SQS0);
80 crb_addr_transform(RPMX7);
81 crb_addr_transform(RPMX6);
82 crb_addr_transform(RPMX5);
83 crb_addr_transform(RPMX4);
84 crb_addr_transform(RPMX3);
85 crb_addr_transform(RPMX2);
86 crb_addr_transform(RPMX1);
87 crb_addr_transform(RPMX0);
88 crb_addr_transform(ROMUSB);
89 crb_addr_transform(SN);
90 crb_addr_transform(QMN);
91 crb_addr_transform(QMS);
92 crb_addr_transform(PGNI);
93 crb_addr_transform(PGND);
94 crb_addr_transform(PGN3);
95 crb_addr_transform(PGN2);
96 crb_addr_transform(PGN1);
97 crb_addr_transform(PGN0);
98 crb_addr_transform(PGSI);
99 crb_addr_transform(PGSD);
100 crb_addr_transform(PGS3);
101 crb_addr_transform(PGS2);
102 crb_addr_transform(PGS1);
103 crb_addr_transform(PGS0);
104 crb_addr_transform(PS);
105 crb_addr_transform(PH);
106 crb_addr_transform(NIU);
107 crb_addr_transform(I2Q);
108 crb_addr_transform(EG);
109 crb_addr_transform(MN);
110 crb_addr_transform(MS);
111 crb_addr_transform(CAS2);
112 crb_addr_transform(CAS1);
113 crb_addr_transform(CAS0);
114 crb_addr_transform(CAM);
115 crb_addr_transform(C2C1);
116 crb_addr_transform(C2C0);
1fcca1a5 117 crb_addr_transform(SMB);
e4c93c81
DP		 118 crb_addr_transform(OCM0);
119 crb_addr_transform(I2C0);
3d396eb1
AK		 120}
121
122int netxen_init_firmware(struct netxen_adapter *adapter)
123{
124 u32 state = 0, loops = 0, err = 0;
125
126 /* Window 1 call */
3ce06a32 127 state = adapter->pci_read_normalize(adapter, CRB_CMDPEG_STATE);
3d396eb1
AK		 128
129 if (state == PHAN_INITIALIZE_ACK)
130 return 0;
131
132 while (state != PHAN_INITIALIZE_COMPLETE && loops < 2000) {
2956640d 133 msleep(1);
3d396eb1 134 /* Window 1 call */
3ce06a32 135 state = adapter->pci_read_normalize(adapter, CRB_CMDPEG_STATE);
3d396eb1
AK		 136
137 loops++;
138 }
139 if (loops >= 2000) {
140 printk(KERN_ERR "Cmd Peg initialization not complete:%x.\n",
141 state);
142 err = -EIO;
143 return err;
144 }
145 /* Window 1 call */
3ce06a32
DP		 146 adapter->pci_write_normalize(adapter,
147 CRB_NIC_CAPABILITIES_HOST, INTR_SCHEME_PERPORT);
148 adapter->pci_write_normalize(adapter,
149 CRB_NIC_MSI_MODE_HOST, MSI_MODE_MULTIFUNC);
150 adapter->pci_write_normalize(adapter,
151 CRB_MPORT_MODE, MPORT_MULTI_FUNCTION_MODE);
152 adapter->pci_write_normalize(adapter,
153 CRB_CMDPEG_STATE, PHAN_INITIALIZE_ACK);
3d396eb1
AK		 154
155 return err;
156}
157
2956640d 158void netxen_release_rx_buffers(struct netxen_adapter *adapter)
3d396eb1 159{
2956640d 160 struct netxen_recv_context *recv_ctx;
48bfd1e0 161 struct nx_host_rds_ring *rds_ring;
2956640d
DP		 162 struct netxen_rx_buffer *rx_buf;
163 int i, ctxid, ring;
3d396eb1 164
3d396eb1 165 for (ctxid = 0; ctxid < MAX_RCV_CTX; ++ctxid) {
2956640d 166 recv_ctx = &adapter->recv_ctx[ctxid];
48bfd1e0
DP		 167 for (ring = 0; ring < adapter->max_rds_rings; ring++) {
168 rds_ring = &recv_ctx->rds_rings[ring];
169 for (i = 0; i < rds_ring->max_rx_desc_count; ++i) {
170 rx_buf = &(rds_ring->rx_buf_arr[i]);
2956640d
DP		 171 if (rx_buf->state == NETXEN_BUFFER_FREE)
172 continue;
173 pci_unmap_single(adapter->pdev,
174 rx_buf->dma,
48bfd1e0 175 rds_ring->dma_size,
2956640d
DP		 176 PCI_DMA_FROMDEVICE);
177 if (rx_buf->skb != NULL)
178 dev_kfree_skb_any(rx_buf->skb);
179 }
180 }
181 }
182}
183
184void netxen_release_tx_buffers(struct netxen_adapter *adapter)
185{
186 struct netxen_cmd_buffer *cmd_buf;
187 struct netxen_skb_frag *buffrag;
188 int i, j;
189
190 cmd_buf = adapter->cmd_buf_arr;
191 for (i = 0; i < adapter->max_tx_desc_count; i++) {
192 buffrag = cmd_buf->frag_array;
193 if (buffrag->dma) {
194 pci_unmap_single(adapter->pdev, buffrag->dma,
195 buffrag->length, PCI_DMA_TODEVICE);
196 buffrag->dma = 0ULL;
197 }
198 for (j = 0; j < cmd_buf->frag_count; j++) {
199 buffrag++;
200 if (buffrag->dma) {
201 pci_unmap_page(adapter->pdev, buffrag->dma,
202 buffrag->length,
203 PCI_DMA_TODEVICE);
204 buffrag->dma = 0ULL;
205 }
206 }
207 /* Free the skb we received in netxen_nic_xmit_frame */
208 if (cmd_buf->skb) {
209 dev_kfree_skb_any(cmd_buf->skb);
210 cmd_buf->skb = NULL;
211 }
212 cmd_buf++;
213 }
214}
215
216void netxen_free_sw_resources(struct netxen_adapter *adapter)
217{
218 struct netxen_recv_context *recv_ctx;
48bfd1e0 219 struct nx_host_rds_ring *rds_ring;
2956640d
DP		 220 int ctx, ring;
221
222 for (ctx = 0; ctx < MAX_RCV_CTX; ctx++) {
223 recv_ctx = &adapter->recv_ctx[ctx];
48bfd1e0
DP		 224 for (ring = 0; ring < adapter->max_rds_rings; ring++) {
225 rds_ring = &recv_ctx->rds_rings[ring];
226 if (rds_ring->rx_buf_arr) {
227 vfree(rds_ring->rx_buf_arr);
228 rds_ring->rx_buf_arr = NULL;
2956640d
DP		 229 }
230 }
231 }
232 if (adapter->cmd_buf_arr)
233 vfree(adapter->cmd_buf_arr);
234 return;
235}
236
237int netxen_alloc_sw_resources(struct netxen_adapter *adapter)
238{
239 struct netxen_recv_context *recv_ctx;
48bfd1e0 240 struct nx_host_rds_ring *rds_ring;
2956640d
DP		 241 struct netxen_rx_buffer *rx_buf;
242 int ctx, ring, i, num_rx_bufs;
243
244 struct netxen_cmd_buffer *cmd_buf_arr;
245 struct net_device *netdev = adapter->netdev;
246
247 cmd_buf_arr = (struct netxen_cmd_buffer *)vmalloc(TX_RINGSIZE);
248 if (cmd_buf_arr == NULL) {
249 printk(KERN_ERR "%s: Failed to allocate cmd buffer ring\n",
250 netdev->name);
251 return -ENOMEM;
252 }
253 memset(cmd_buf_arr, 0, TX_RINGSIZE);
254 adapter->cmd_buf_arr = cmd_buf_arr;
255
256 for (ctx = 0; ctx < MAX_RCV_CTX; ctx++) {
257 recv_ctx = &adapter->recv_ctx[ctx];
48bfd1e0
DP		 258 for (ring = 0; ring < adapter->max_rds_rings; ring++) {
259 rds_ring = &recv_ctx->rds_rings[ring];
2956640d
DP		 260 switch (RCV_DESC_TYPE(ring)) {
261 case RCV_DESC_NORMAL:
48bfd1e0 262 rds_ring->max_rx_desc_count =
2956640d 263 adapter->max_rx_desc_count;
48bfd1e0 264 rds_ring->flags = RCV_DESC_NORMAL;
d9e651bc
DP		 265 if (adapter->ahw.cut_through) {
266 rds_ring->dma_size =
267 NX_CT_DEFAULT_RX_BUF_LEN;
268 rds_ring->skb_size =
269 NX_CT_DEFAULT_RX_BUF_LEN;
270 } else {
271 rds_ring->dma_size = RX_DMA_MAP_LEN;
272 rds_ring->skb_size =
273 MAX_RX_BUFFER_LENGTH;
274 }
2956640d
DP		 275 break;
276
277 case RCV_DESC_JUMBO:
48bfd1e0 278 rds_ring->max_rx_desc_count =
2956640d 279 adapter->max_jumbo_rx_desc_count;
48bfd1e0 280 rds_ring->flags = RCV_DESC_JUMBO;
d9e651bc
DP		 281 if (NX_IS_REVISION_P3(adapter->ahw.revision_id))
282 rds_ring->dma_size =
283 NX_P3_RX_JUMBO_BUF_MAX_LEN;
284 else
285 rds_ring->dma_size =
286 NX_P2_RX_JUMBO_BUF_MAX_LEN;
48bfd1e0 287 rds_ring->skb_size =
d9e651bc 288 rds_ring->dma_size + NET_IP_ALIGN;
2956640d
DP		 289 break;
290
291 case RCV_RING_LRO:
48bfd1e0 292 rds_ring->max_rx_desc_count =
2956640d 293 adapter->max_lro_rx_desc_count;
48bfd1e0
DP		 294 rds_ring->flags = RCV_DESC_LRO;
295 rds_ring->dma_size = RX_LRO_DMA_MAP_LEN;
296 rds_ring->skb_size = MAX_RX_LRO_BUFFER_LENGTH;
2956640d
DP		 297 break;
298
299 }
48bfd1e0 300 rds_ring->rx_buf_arr = (struct netxen_rx_buffer *)
2956640d 301 vmalloc(RCV_BUFFSIZE);
48bfd1e0 302 if (rds_ring->rx_buf_arr == NULL) {
2956640d
DP		 303 printk(KERN_ERR "%s: Failed to allocate "
304 "rx buffer ring %d\n",
305 netdev->name, ring);
306 /* free whatever was already allocated */
307 goto err_out;
308 }
48bfd1e0 309 memset(rds_ring->rx_buf_arr, 0, RCV_BUFFSIZE);
d9e651bc 310 INIT_LIST_HEAD(&rds_ring->free_list);
48bfd1e0 311 rds_ring->begin_alloc = 0;
3d396eb1
AK		 312 /*
313 * Now go through all of them, set reference handles
314 * and put them in the queues.
315 */
48bfd1e0
DP		 316 num_rx_bufs = rds_ring->max_rx_desc_count;
317 rx_buf = rds_ring->rx_buf_arr;
3d396eb1 318 for (i = 0; i < num_rx_bufs; i++) {
d9e651bc
DP		 319 list_add_tail(&rx_buf->list,
320 &rds_ring->free_list);
3d396eb1
AK		 321 rx_buf->ref_handle = i;
322 rx_buf->state = NETXEN_BUFFER_FREE;
3d396eb1
AK		 323 rx_buf++;
324 }
325 }
326 }
2956640d
DP		 327
328 return 0;
329
330err_out:
331 netxen_free_sw_resources(adapter);
332 return -ENOMEM;
3d396eb1
AK		 333}
334
3d396eb1
AK		 335void netxen_initialize_adapter_ops(struct netxen_adapter *adapter)
336{
3d396eb1
AK		 337 switch (adapter->ahw.board_type) {
338 case NETXEN_NIC_GBE:
80922fbc 339 adapter->enable_phy_interrupts =
3d396eb1 340 netxen_niu_gbe_enable_phy_interrupts;
80922fbc 341 adapter->disable_phy_interrupts =
3d396eb1 342 netxen_niu_gbe_disable_phy_interrupts;
80922fbc
AK		 343 adapter->macaddr_set = netxen_niu_macaddr_set;
344 adapter->set_mtu = netxen_nic_set_mtu_gb;
345 adapter->set_promisc = netxen_niu_set_promiscuous_mode;
80922fbc
AK		 346 adapter->phy_read = netxen_niu_gbe_phy_read;
347 adapter->phy_write = netxen_niu_gbe_phy_write;
c9fc891f 348 adapter->init_port = netxen_niu_gbe_init_port;
80922fbc 349 adapter->stop_port = netxen_niu_disable_gbe_port;
3d396eb1
AK		 350 break;
351
352 case NETXEN_NIC_XGBE:
80922fbc 353 adapter->enable_phy_interrupts =
3d396eb1 354 netxen_niu_xgbe_enable_phy_interrupts;
80922fbc 355 adapter->disable_phy_interrupts =
3d396eb1 356 netxen_niu_xgbe_disable_phy_interrupts;
80922fbc
AK		 357 adapter->macaddr_set = netxen_niu_xg_macaddr_set;
358 adapter->set_mtu = netxen_nic_set_mtu_xgb;
359 adapter->init_port = netxen_niu_xg_init_port;
360 adapter->set_promisc = netxen_niu_xg_set_promiscuous_mode;
80922fbc 361 adapter->stop_port = netxen_niu_disable_xg_port;
3d396eb1
AK		 362 break;
363
364 default:
365 break;
366 }
9ad27643
DP		 367
368 if (NX_IS_REVISION_P3(adapter->ahw.revision_id)) {
369 adapter->set_mtu = nx_fw_cmd_set_mtu;
370 adapter->set_promisc = netxen_p3_nic_set_promisc;
371 }
3d396eb1
AK		 372}
373
374/*
375 * netxen_decode_crb_addr(0 - utility to translate from internal Phantom CRB
376 * address to external PCI CRB address.
377 */
993fb90c 378static u32 netxen_decode_crb_addr(u32 addr)
3d396eb1
AK		 379{
380 int i;
e0e20a1a 381 u32 base_addr, offset, pci_base;
3d396eb1
AK		 382
383 crb_addr_transform_setup();
384
385 pci_base = NETXEN_ADDR_ERROR;
386 base_addr = addr & 0xfff00000;
387 offset = addr & 0x000fffff;
388
389 for (i = 0; i < NETXEN_MAX_CRB_XFORM; i++) {
390 if (crb_addr_xform[i] == base_addr) {
391 pci_base = i << 20;
392 break;
393 }
394 }
395 if (pci_base == NETXEN_ADDR_ERROR)
396 return pci_base;
397 else
398 return (pci_base + offset);
399}
400
13ba9c77
MT		 401static long rom_max_timeout = 100;
402static long rom_lock_timeout = 10000;
7830b22c 403#if 0
27d2ab54 404static long rom_write_timeout = 700;
7830b22c 405#endif
3d396eb1 406
993fb90c 407static int rom_lock(struct netxen_adapter *adapter)
3d396eb1
AK		 408{
409 int iter;
410 u32 done = 0;
411 int timeout = 0;
412
413 while (!done) {
414 /* acquire semaphore2 from PCI HW block */
415 netxen_nic_read_w0(adapter, NETXEN_PCIE_REG(PCIE_SEM2_LOCK),
416 &done);
417 if (done == 1)
418 break;
419 if (timeout >= rom_lock_timeout)
420 return -EIO;
421
422 timeout++;
423 /*
424 * Yield CPU
425 */
426 if (!in_atomic())
427 schedule();
428 else {
429 for (iter = 0; iter < 20; iter++)
430 cpu_relax(); /*This a nop instr on i386 */
431 }
432 }
433 netxen_nic_reg_write(adapter, NETXEN_ROM_LOCK_ID, ROM_LOCK_DRIVER);
434 return 0;
435}
436
993fb90c 437static int netxen_wait_rom_done(struct netxen_adapter *adapter)
3d396eb1
AK		 438{
439 long timeout = 0;
440 long done = 0;
441
27c915a4
DP		 442 cond_resched();
443
3d396eb1
AK		 444 while (done == 0) {
445 done = netxen_nic_reg_read(adapter, NETXEN_ROMUSB_GLB_STATUS);
446 done &= 2;
447 timeout++;
448 if (timeout >= rom_max_timeout) {
449 printk("Timeout reached waiting for rom done");
450 return -EIO;
451 }
452 }
453 return 0;
454}
455
7830b22c 456#if 0
993fb90c 457static int netxen_rom_wren(struct netxen_adapter *adapter)
cb8011ad
AK		 458{
459 /* Set write enable latch in ROM status register */
460 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 0);
461 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_INSTR_OPCODE,
462 M25P_INSTR_WREN);
463 if (netxen_wait_rom_done(adapter)) {
464 return -1;
465 }
466 return 0;
467}
468
993fb90c
AB		 469static unsigned int netxen_rdcrbreg(struct netxen_adapter *adapter,
470 unsigned int addr)
cb8011ad
AK		 471{
472 unsigned int data = 0xdeaddead;
473 data = netxen_nic_reg_read(adapter, addr);
474 return data;
475}
476
993fb90c 477static int netxen_do_rom_rdsr(struct netxen_adapter *adapter)
cb8011ad
AK		 478{
479 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_INSTR_OPCODE,
480 M25P_INSTR_RDSR);
481 if (netxen_wait_rom_done(adapter)) {
482 return -1;
483 }
484 return netxen_rdcrbreg(adapter, NETXEN_ROMUSB_ROM_RDATA);
485}
7830b22c 486#endif
cb8011ad 487
993fb90c 488static void netxen_rom_unlock(struct netxen_adapter *adapter)
cb8011ad
AK		 489{
490 u32 val;
491
492 /* release semaphore2 */
493 netxen_nic_read_w0(adapter, NETXEN_PCIE_REG(PCIE_SEM2_UNLOCK), &val);
494
495}
496
7830b22c 497#if 0
993fb90c 498static int netxen_rom_wip_poll(struct netxen_adapter *adapter)
cb8011ad
AK		 499{
500 long timeout = 0;
501 long wip = 1;
502 int val;
503 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 0);
504 while (wip != 0) {
505 val = netxen_do_rom_rdsr(adapter);
506 wip = val & 1;
507 timeout++;
508 if (timeout > rom_max_timeout) {
509 return -1;
510 }
511 }
512 return 0;
513}
514
993fb90c
AB		 515static int do_rom_fast_write(struct netxen_adapter *adapter, int addr,
516 int data)
cb8011ad
AK		 517{
518 if (netxen_rom_wren(adapter)) {
519 return -1;
520 }
521 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_WDATA, data);
522 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ADDRESS, addr);
523 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 3);
524 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_INSTR_OPCODE,
525 M25P_INSTR_PP);
526 if (netxen_wait_rom_done(adapter)) {
527 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 0);
528 return -1;
529 }
530
531 return netxen_rom_wip_poll(adapter);
532}
7830b22c 533#endif
cb8011ad 534
993fb90c
AB		 535static int do_rom_fast_read(struct netxen_adapter *adapter,
536 int addr, int *valp)
3d396eb1
AK		 537{
538 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ADDRESS, addr);
3d396eb1 539 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_DUMMY_BYTE_CNT, 0);
27c915a4 540 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 3);
3d396eb1
AK		 541 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_INSTR_OPCODE, 0xb);
542 if (netxen_wait_rom_done(adapter)) {
543 printk("Error waiting for rom done\n");
544 return -EIO;
545 }
546 /* reset abyte_cnt and dummy_byte_cnt */
547 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 0);
27c915a4 548 udelay(10);
3d396eb1
AK		 549 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_DUMMY_BYTE_CNT, 0);
550
551 *valp = netxen_nic_reg_read(adapter, NETXEN_ROMUSB_ROM_RDATA);
552 return 0;
553}
554
993fb90c
AB		 555static int do_rom_fast_read_words(struct netxen_adapter *adapter, int addr,
556 u8 *bytes, size_t size)
27d2ab54
AK		 557{
558 int addridx;
559 int ret = 0;
560
561 for (addridx = addr; addridx < (addr + size); addridx += 4) {
f305f789
AV		 562 int v;
563 ret = do_rom_fast_read(adapter, addridx, &v);
27d2ab54
AK		 564 if (ret != 0)
565 break;
f305f789 566 *(__le32 *)bytes = cpu_to_le32(v);
27d2ab54
AK		 567 bytes += 4;
568 }
569
570 return ret;
571}
572
573int
4790654c 574netxen_rom_fast_read_words(struct netxen_adapter *adapter, int addr,
27d2ab54
AK		 575 u8 *bytes, size_t size)
576{
577 int ret;
578
579 ret = rom_lock(adapter);
580 if (ret < 0)
581 return ret;
582
583 ret = do_rom_fast_read_words(adapter, addr, bytes, size);
584
585 netxen_rom_unlock(adapter);
586 return ret;
587}
588
3d396eb1
AK		 589int netxen_rom_fast_read(struct netxen_adapter *adapter, int addr, int *valp)
590{
591 int ret;
592
593 if (rom_lock(adapter) != 0)
594 return -EIO;
595
596 ret = do_rom_fast_read(adapter, addr, valp);
cb8011ad
AK		 597 netxen_rom_unlock(adapter);
598 return ret;
599}
600
993fb90c 601#if 0
cb8011ad
AK		 602int netxen_rom_fast_write(struct netxen_adapter *adapter, int addr, int data)
603{
604 int ret = 0;
605
606 if (rom_lock(adapter) != 0) {
607 return -1;
608 }
609 ret = do_rom_fast_write(adapter, addr, data);
610 netxen_rom_unlock(adapter);
611 return ret;
612}
27d2ab54 613
4790654c 614static int do_rom_fast_write_words(struct netxen_adapter *adapter,
993fb90c 615 int addr, u8 *bytes, size_t size)
27d2ab54
AK		 616{
617 int addridx = addr;
618 int ret = 0;
619
620 while (addridx < (addr + size)) {
621 int last_attempt = 0;
622 int timeout = 0;
623 int data;
624
f305f789 625 data = le32_to_cpu((*(__le32*)bytes));
27d2ab54
AK		 626 ret = do_rom_fast_write(adapter, addridx, data);
627 if (ret < 0)
628 return ret;
4790654c 629
27d2ab54
AK		 630 while(1) {
631 int data1;
632
f8dfdd5c
SH		 633 ret = do_rom_fast_read(adapter, addridx, &data1);
634 if (ret < 0)
635 return ret;
636
27d2ab54
AK		 637 if (data1 == data)
638 break;
639
640 if (timeout++ >= rom_write_timeout) {
641 if (last_attempt++ < 4) {
4790654c 642 ret = do_rom_fast_write(adapter,
27d2ab54
AK		 643 addridx, data);
644 if (ret < 0)
645 return ret;
646 }
647 else {
648 printk(KERN_INFO "Data write did not "
649 "succeed at address 0x%x\n", addridx);
650 break;
651 }
652 }
653 }
654
655 bytes += 4;
656 addridx += 4;
657 }
658
659 return ret;
660}
661
4790654c 662int netxen_rom_fast_write_words(struct netxen_adapter *adapter, int addr,
27d2ab54
AK		 663 u8 *bytes, size_t size)
664{
665 int ret = 0;
666
667 ret = rom_lock(adapter);
668 if (ret < 0)
669 return ret;
670
671 ret = do_rom_fast_write_words(adapter, addr, bytes, size);
672 netxen_rom_unlock(adapter);
673
674 return ret;
675}
676
993fb90c 677static int netxen_rom_wrsr(struct netxen_adapter *adapter, int data)
27d2ab54
AK		 678{
679 int ret;
680
681 ret = netxen_rom_wren(adapter);
682 if (ret < 0)
683 return ret;
684
685 netxen_crb_writelit_adapter(adapter, NETXEN_ROMUSB_ROM_WDATA, data);
4790654c 686 netxen_crb_writelit_adapter(adapter,
27d2ab54
AK		 687 NETXEN_ROMUSB_ROM_INSTR_OPCODE, 0x1);
688
689 ret = netxen_wait_rom_done(adapter);
690 if (ret < 0)
691 return ret;
692
693 return netxen_rom_wip_poll(adapter);
694}
695
993fb90c 696static int netxen_rom_rdsr(struct netxen_adapter *adapter)
27d2ab54
AK		 697{
698 int ret;
699
700 ret = rom_lock(adapter);
701 if (ret < 0)
702 return ret;
703
704 ret = netxen_do_rom_rdsr(adapter);
705 netxen_rom_unlock(adapter);
706 return ret;
707}
708
709int netxen_backup_crbinit(struct netxen_adapter *adapter)
710{
711 int ret = FLASH_SUCCESS;
712 int val;
0d04761d 713 char *buffer = kmalloc(NETXEN_FLASH_SECTOR_SIZE, GFP_KERNEL);
27d2ab54
AK		 714
715 if (!buffer)
4790654c 716 return -ENOMEM;
27d2ab54
AK		 717 /* unlock sector 63 */
718 val = netxen_rom_rdsr(adapter);
719 val = val & 0xe3;
720 ret = netxen_rom_wrsr(adapter, val);
721 if (ret != FLASH_SUCCESS)
722 goto out_kfree;
723
724 ret = netxen_rom_wip_poll(adapter);
725 if (ret != FLASH_SUCCESS)
726 goto out_kfree;
727
728 /* copy sector 0 to sector 63 */
4790654c 729 ret = netxen_rom_fast_read_words(adapter, NETXEN_CRBINIT_START,
0d04761d 730 buffer, NETXEN_FLASH_SECTOR_SIZE);
27d2ab54
AK		 731 if (ret != FLASH_SUCCESS)
732 goto out_kfree;
733
4790654c 734 ret = netxen_rom_fast_write_words(adapter, NETXEN_FIXED_START,
0d04761d 735 buffer, NETXEN_FLASH_SECTOR_SIZE);
27d2ab54
AK		 736 if (ret != FLASH_SUCCESS)
737 goto out_kfree;
738
739 /* lock sector 63 */
740 val = netxen_rom_rdsr(adapter);
741 if (!(val & 0x8)) {
742 val |= (0x1 << 2);
743 /* lock sector 63 */
744 if (netxen_rom_wrsr(adapter, val) == 0) {
745 ret = netxen_rom_wip_poll(adapter);
746 if (ret != FLASH_SUCCESS)
747 goto out_kfree;
748
749 /* lock SR writes */
750 ret = netxen_rom_wip_poll(adapter);
751 if (ret != FLASH_SUCCESS)
752 goto out_kfree;
753 }
754 }
755
756out_kfree:
757 kfree(buffer);
758 return ret;
759}
760
993fb90c 761static int netxen_do_rom_se(struct netxen_adapter *adapter, int addr)
cb8011ad
AK		 762{
763 netxen_rom_wren(adapter);
764 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ADDRESS, addr);
765 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 3);
766 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_INSTR_OPCODE,
767 M25P_INSTR_SE);
768 if (netxen_wait_rom_done(adapter)) {
769 netxen_nic_reg_write(adapter, NETXEN_ROMUSB_ROM_ABYTE_CNT, 0);
770 return -1;
771 }
772 return netxen_rom_wip_poll(adapter);
773}
774
993fb90c 775static void check_erased_flash(struct netxen_adapter *adapter, int addr)
27d2ab54
AK		 776{
777 int i;
778 int val;
779 int count = 0, erased_errors = 0;
780 int range;
781
4790654c 782 range = (addr == NETXEN_USER_START) ?
0d04761d 783 NETXEN_FIXED_START : addr + NETXEN_FLASH_SECTOR_SIZE;
4790654c 784
27d2ab54
AK		 785 for (i = addr; i < range; i += 4) {
786 netxen_rom_fast_read(adapter, i, &val);
787 if (val != 0xffffffff)
788 erased_errors++;
789 count++;
790 }
791
792 if (erased_errors)
793 printk(KERN_INFO "0x%x out of 0x%x words fail to be erased "
794 "for sector address: %x\n", erased_errors, count, addr);
795}
796
cb8011ad
AK		 797int netxen_rom_se(struct netxen_adapter *adapter, int addr)
798{
799 int ret = 0;
800 if (rom_lock(adapter) != 0) {
801 return -1;
802 }
803 ret = netxen_do_rom_se(adapter, addr);
804 netxen_rom_unlock(adapter);
27d2ab54
AK		 805 msleep(30);
806 check_erased_flash(adapter, addr);
807
808 return ret;
809}
810
993fb90c
AB		 811static int netxen_flash_erase_sections(struct netxen_adapter *adapter,
812 int start, int end)
27d2ab54
AK		 813{
814 int ret = FLASH_SUCCESS;
815 int i;
816
817 for (i = start; i < end; i++) {
0d04761d 818 ret = netxen_rom_se(adapter, i * NETXEN_FLASH_SECTOR_SIZE);
27d2ab54
AK		 819 if (ret)
820 break;
821 ret = netxen_rom_wip_poll(adapter);
822 if (ret < 0)
823 return ret;
824 }
825
826 return ret;
827}
828
829int
830netxen_flash_erase_secondary(struct netxen_adapter *adapter)
831{
832 int ret = FLASH_SUCCESS;
833 int start, end;
834
0d04761d
MT		 835 start = NETXEN_SECONDARY_START / NETXEN_FLASH_SECTOR_SIZE;
836 end = NETXEN_USER_START / NETXEN_FLASH_SECTOR_SIZE;
27d2ab54
AK		 837 ret = netxen_flash_erase_sections(adapter, start, end);
838
839 return ret;
840}
841
842int
843netxen_flash_erase_primary(struct netxen_adapter *adapter)
844{
845 int ret = FLASH_SUCCESS;
846 int start, end;
847
0d04761d
MT		 848 start = NETXEN_PRIMARY_START / NETXEN_FLASH_SECTOR_SIZE;
849 end = NETXEN_SECONDARY_START / NETXEN_FLASH_SECTOR_SIZE;
27d2ab54
AK		 850 ret = netxen_flash_erase_sections(adapter, start, end);
851
852 return ret;
853}
854
e45d9ab4
AK		 855void netxen_halt_pegs(struct netxen_adapter *adapter)
856{
857 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_0 + 0x3c, 1);
858 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_1 + 0x3c, 1);
859 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_2 + 0x3c, 1);
860 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_3 + 0x3c, 1);
861}
862
27d2ab54
AK		 863int netxen_flash_unlock(struct netxen_adapter *adapter)
864{
865 int ret = 0;
866
867 ret = netxen_rom_wrsr(adapter, 0);
868 if (ret < 0)
869 return ret;
870
871 ret = netxen_rom_wren(adapter);
872 if (ret < 0)
873 return ret;
874
3d396eb1
AK		 875 return ret;
876}
7830b22c 877#endif /* 0 */
3d396eb1
AK		 878
879#define NETXEN_BOARDTYPE 0x4008
880#define NETXEN_BOARDNUM 0x400c
881#define NETXEN_CHIPNUM 0x4010
3d396eb1
AK		 882
883int netxen_pinit_from_rom(struct netxen_adapter *adapter, int verbose)
884{
dcd56fdb 885 int addr, val;
27c915a4 886 int i, n, init_delay = 0;
3d396eb1 887 struct crb_addr_pair *buf;
27c915a4 888 unsigned offset;
e0e20a1a 889 u32 off;
3d396eb1
AK		 890
891 /* resetall */
27c915a4 892 rom_lock(adapter);
3d396eb1 893 netxen_crb_writelit_adapter(adapter, NETXEN_ROMUSB_GLB_SW_RESET,
2956640d 894 0xffffffff);
27c915a4 895 netxen_rom_unlock(adapter);
3d396eb1
AK		 896
897 if (verbose) {
3d396eb1
AK		 898 if (netxen_rom_fast_read(adapter, NETXEN_BOARDTYPE, &val) == 0)
899 printk("P2 ROM board type: 0x%08x\n", val);
900 else
901 printk("Could not read board type\n");
902 if (netxen_rom_fast_read(adapter, NETXEN_BOARDNUM, &val) == 0)
903 printk("P2 ROM board num: 0x%08x\n", val);
904 else
905 printk("Could not read board number\n");
906 if (netxen_rom_fast_read(adapter, NETXEN_CHIPNUM, &val) == 0)
907 printk("P2 ROM chip num: 0x%08x\n", val);
908 else
909 printk("Could not read chip number\n");
910 }
911
2956640d
DP		 912 if (NX_IS_REVISION_P3(adapter->ahw.revision_id)) {
913 if (netxen_rom_fast_read(adapter, 0, &n) != 0 ||
27c915a4 914 (n != 0xcafecafe) ||
2956640d
DP		 915 netxen_rom_fast_read(adapter, 4, &n) != 0) {
916 printk(KERN_ERR "%s: ERROR Reading crb_init area: "
917 "n: %08x\n", netxen_nic_driver_name, n);
3d396eb1
AK		 918 return -EIO;
919 }
2956640d
DP		 920 offset = n & 0xffffU;
921 n = (n >> 16) & 0xffffU;
922 } else {
923 if (netxen_rom_fast_read(adapter, 0, &n) != 0 ||
924 !(n & 0x80000000)) {
925 printk(KERN_ERR "%s: ERROR Reading crb_init area: "
926 "n: %08x\n", netxen_nic_driver_name, n);
927 return -EIO;
3d396eb1 928 }
2956640d
DP		 929 offset = 1;
930 n &= ~0x80000000;
931 }
932
933 if (n < 1024) {
934 if (verbose)
935 printk(KERN_DEBUG "%s: %d CRB init values found"
936 " in ROM.\n", netxen_nic_driver_name, n);
937 } else {
938 printk(KERN_ERR "%s:n=0x%x Error! NetXen card flash not"
939 " initialized.\n", __func__, n);
940 return -EIO;
941 }
3d396eb1 942
2956640d
DP		 943 buf = kcalloc(n, sizeof(struct crb_addr_pair), GFP_KERNEL);
944 if (buf == NULL) {
945 printk("%s: netxen_pinit_from_rom: Unable to calloc memory.\n",
946 netxen_nic_driver_name);
947 return -ENOMEM;
948 }
949 for (i = 0; i < n; i++) {
950 if (netxen_rom_fast_read(adapter, 8*i + 4*offset, &val) != 0 ||
951 netxen_rom_fast_read(adapter, 8*i + 4*offset + 4, &addr) != 0)
952 return -EIO;
953
954 buf[i].addr = addr;
955 buf[i].data = val;
956
957 if (verbose)
958 printk(KERN_DEBUG "%s: PCI: 0x%08x == 0x%08x\n",
959 netxen_nic_driver_name,
960 (u32)netxen_decode_crb_addr(addr), val);
961 }
962 for (i = 0; i < n; i++) {
963
964 off = netxen_decode_crb_addr(buf[i].addr);
965 if (off == NETXEN_ADDR_ERROR) {
966 printk(KERN_ERR"CRB init value out of range %x\n",
1fcca1a5 967 buf[i].addr);
2956640d
DP		 968 continue;
969 }
970 off += NETXEN_PCI_CRBSPACE;
971 /* skipping cold reboot MAGIC */
972 if (off == NETXEN_CAM_RAM(0x1fc))
973 continue;
974
975 if (NX_IS_REVISION_P3(adapter->ahw.revision_id)) {
976 /* do not reset PCI */
977 if (off == (ROMUSB_GLB + 0xbc))
1fcca1a5 978 continue;
27c915a4
DP		 979 if (off == (ROMUSB_GLB + 0xa8))
980 continue;
981 if (off == (ROMUSB_GLB + 0xc8)) /* core clock */
982 continue;
983 if (off == (ROMUSB_GLB + 0x24)) /* MN clock */
984 continue;
985 if (off == (ROMUSB_GLB + 0x1c)) /* MS clock */
986 continue;
2956640d
DP		 987 if (off == (NETXEN_CRB_PEG_NET_1 + 0x18))
988 buf[i].data = 0x1020;
989 /* skip the function enable register */
990 if (off == NETXEN_PCIE_REG(PCIE_SETUP_FUNCTION))
3d396eb1 991 continue;
2956640d
DP		 992 if (off == NETXEN_PCIE_REG(PCIE_SETUP_FUNCTION2))
993 continue;
994 if ((off & 0x0ff00000) == NETXEN_CRB_SMB)
995 continue;
996 }
3d396eb1 997
2956640d
DP		 998 if (off == NETXEN_ADDR_ERROR) {
999 printk(KERN_ERR "%s: Err: Unknown addr: 0x%08x\n",
1000 netxen_nic_driver_name, buf[i].addr);
1001 continue;
1002 }
1003
27c915a4 1004 init_delay = 1;
2956640d
DP		 1005 /* After writing this register, HW needs time for CRB */
1006 /* to quiet down (else crb_window returns 0xffffffff) */
1007 if (off == NETXEN_ROMUSB_GLB_SW_RESET) {
27c915a4 1008 init_delay = 1000;
2956640d 1009 if (NX_IS_REVISION_P2(adapter->ahw.revision_id)) {
3d396eb1 1010 /* hold xdma in reset also */
cb8011ad 1011 buf[i].data = NETXEN_NIC_XDMA_RESET;
27c915a4 1012 buf[i].data = 0x8000ff;
3d396eb1 1013 }
2956640d 1014 }
3d396eb1 1015
2956640d 1016 adapter->hw_write_wx(adapter, off, &buf[i].data, 4);
3d396eb1 1017
27c915a4 1018 msleep(init_delay);
2956640d
DP		 1019 }
1020 kfree(buf);
3d396eb1 1021
2956640d 1022 /* disable_peg_cache_all */
3d396eb1 1023
2956640d
DP		 1024 /* unreset_net_cache */
1025 if (NX_IS_REVISION_P2(adapter->ahw.revision_id)) {
1026 adapter->hw_read_wx(adapter,
1027 NETXEN_ROMUSB_GLB_SW_RESET, &val, 4);
3d396eb1 1028 netxen_crb_writelit_adapter(adapter,
2956640d 1029 NETXEN_ROMUSB_GLB_SW_RESET, (val & 0xffffff0f));
3d396eb1 1030 }
2956640d
DP		 1031
1032 /* p2dn replyCount */
1033 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_D + 0xec, 0x1e);
1034 /* disable_peg_cache 0 */
1035 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_D + 0x4c, 8);
1036 /* disable_peg_cache 1 */
1037 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_I + 0x4c, 8);
1038
1039 /* peg_clr_all */
1040
1041 /* peg_clr 0 */
1042 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_0 + 0x8, 0);
1043 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_0 + 0xc, 0);
1044 /* peg_clr 1 */
1045 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_1 + 0x8, 0);
1046 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_1 + 0xc, 0);
1047 /* peg_clr 2 */
1048 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_2 + 0x8, 0);
1049 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_2 + 0xc, 0);
1050 /* peg_clr 3 */
1051 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_3 + 0x8, 0);
1052 netxen_crb_writelit_adapter(adapter, NETXEN_CRB_PEG_NET_3 + 0xc, 0);
3d396eb1
AK		 1053 return 0;
1054}
1055
ed25ffa1
AK		 1056int netxen_initialize_adapter_offload(struct netxen_adapter *adapter)
1057{
1058 uint64_t addr;
1059 uint32_t hi;
1060 uint32_t lo;
1061
1062 adapter->dummy_dma.addr =
7830b22c 1063 pci_alloc_consistent(adapter->pdev,
ed25ffa1
AK		 1064 NETXEN_HOST_DUMMY_DMA_SIZE,
1065 &adapter->dummy_dma.phys_addr);
1066 if (adapter->dummy_dma.addr == NULL) {
1067 printk("%s: ERROR: Could not allocate dummy DMA memory\n",
2956640d 1068 __func__);
ed25ffa1
AK		 1069 return -ENOMEM;
1070 }
1071
1072 addr = (uint64_t) adapter->dummy_dma.phys_addr;
1073 hi = (addr >> 32) & 0xffffffff;
1074 lo = addr & 0xffffffff;
1075
3ce06a32
DP		 1076 adapter->pci_write_normalize(adapter, CRB_HOST_DUMMY_BUF_ADDR_HI, hi);
1077 adapter->pci_write_normalize(adapter, CRB_HOST_DUMMY_BUF_ADDR_LO, lo);
ed25ffa1 1078
2956640d
DP		 1079 if (NX_IS_REVISION_P3(adapter->ahw.revision_id)) {
1080 uint32_t temp = 0;
1081 adapter->hw_write_wx(adapter, CRB_HOST_DUMMY_BUF, &temp, 4);
1082 }
1083
ed25ffa1
AK		 1084 return 0;
1085}
1086
1087void netxen_free_adapter_offload(struct netxen_adapter *adapter)
1088{
15eef1e1
DP		 1089 int i = 100;
1090
1091 if (!adapter->dummy_dma.addr)
1092 return;
439b454e 1093
15eef1e1 1094 if (NX_IS_REVISION_P2(adapter->ahw.revision_id)) {
439b454e
DP		 1095 do {
1096 if (dma_watchdog_shutdown_request(adapter) == 1)
1097 break;
1098 msleep(50);
1099 if (dma_watchdog_shutdown_poll_result(adapter) == 1)
1100 break;
1101 } while (--i);
15eef1e1 1102 }
439b454e 1103
15eef1e1
DP		 1104 if (i) {
1105 pci_free_consistent(adapter->pdev,
1106 NETXEN_HOST_DUMMY_DMA_SIZE,
1107 adapter->dummy_dma.addr,
1108 adapter->dummy_dma.phys_addr);
1109 adapter->dummy_dma.addr = NULL;
1110 } else {
1111 printk(KERN_ERR "%s: dma_watchdog_shutdown failed\n",
1112 adapter->netdev->name);
ed25ffa1
AK		 1113 }
1114}
1115
96acb6eb 1116int netxen_phantom_init(struct netxen_adapter *adapter, int pegtune_val)
3d396eb1
AK		 1117{
1118 u32 val = 0;
2956640d 1119 int retries = 60;
3d396eb1 1120
cb8011ad 1121 if (!pegtune_val) {
96acb6eb 1122 do {
3ce06a32
DP		 1123 val = adapter->pci_read_normalize(adapter,
1124 CRB_CMDPEG_STATE);
96acb6eb
DP		 1125
1126 if (val == PHAN_INITIALIZE_COMPLETE ||
1127 val == PHAN_INITIALIZE_ACK)
1128 return 0;
1129
2956640d
DP		 1130 msleep(500);
1131
96acb6eb 1132 } while (--retries);
2956640d 1133
96acb6eb 1134 if (!retries) {
2956640d
DP		 1135 pegtune_val = adapter->pci_read_normalize(adapter,
1136 NETXEN_ROMUSB_GLB_PEGTUNE_DONE);
96acb6eb
DP		 1137 printk(KERN_WARNING "netxen_phantom_init: init failed, "
1138 "pegtune_val=%x\n", pegtune_val);
1139 return -1;
3d396eb1 1140 }
3d396eb1 1141 }
96acb6eb
DP		 1142
1143 return 0;
3d396eb1
AK		 1144}
1145
2956640d
DP		 1146int netxen_receive_peg_ready(struct netxen_adapter *adapter)
1147{
1148 u32 val = 0;
1149 int retries = 2000;
1150
1151 do {
1152 val = adapter->pci_read_normalize(adapter, CRB_RCVPEG_STATE);
1153
1154 if (val == PHAN_PEG_RCV_INITIALIZED)
1155 return 0;
1156
1157 msleep(10);
1158
1159 } while (--retries);
1160
1161 if (!retries) {
1162 printk(KERN_ERR "Receive Peg initialization not "
1163 "complete, state: 0x%x.\n", val);
1164 return -EIO;
1165 }
1166
1167 return 0;
1168}
1169
d9e651bc
DP		 1170static struct sk_buff *netxen_process_rxbuf(struct netxen_adapter *adapter,
1171 struct nx_host_rds_ring *rds_ring, u16 index, u16 cksum)
1172{
1173 struct netxen_rx_buffer *buffer;
1174 struct sk_buff *skb;
1175
1176 buffer = &rds_ring->rx_buf_arr[index];
1177
1178 pci_unmap_single(adapter->pdev, buffer->dma, rds_ring->dma_size,
1179 PCI_DMA_FROMDEVICE);
1180
1181 skb = buffer->skb;
1182 if (!skb)
1183 goto no_skb;
1184
1185 if (likely(adapter->rx_csum && cksum == STATUS_CKSUM_OK)) {
1186 adapter->stats.csummed++;
1187 skb->ip_summed = CHECKSUM_UNNECESSARY;
1188 } else
1189 skb->ip_summed = CHECKSUM_NONE;
1190
1191 skb->dev = adapter->netdev;
1192
1193 buffer->skb = NULL;
1194
1195no_skb:
1196 buffer->state = NETXEN_BUFFER_FREE;
1197 buffer->lro_current_frags = 0;
1198 buffer->lro_expected_frags = 0;
1199 list_add_tail(&buffer->list, &rds_ring->free_list);
1200 return skb;
1201}
1202
3d396eb1
AK		 1203/*
1204 * netxen_process_rcv() send the received packet to the protocol stack.
1205 * and if the number of receives exceeds RX_BUFFERS_REFILL, then we
1206 * invoke the routine to send more rx buffers to the Phantom...
1207 */
993fb90c 1208static void netxen_process_rcv(struct netxen_adapter *adapter, int ctxid,
d9e651bc 1209 struct status_desc *desc, struct status_desc *frag_desc)
3d396eb1 1210{
3176ff3e 1211 struct net_device *netdev = adapter->netdev;
5dc16268
DP		 1212 u64 sts_data = le64_to_cpu(desc->status_desc_data);
1213 int index = netxen_get_sts_refhandle(sts_data);
3d396eb1
AK		 1214 struct netxen_recv_context *recv_ctx = &(adapter->recv_ctx[ctxid]);
1215 struct netxen_rx_buffer *buffer;
1216 struct sk_buff *skb;
5dc16268 1217 u32 length = netxen_get_sts_totallength(sts_data);
3d396eb1 1218 u32 desc_ctx;
d9e651bc 1219 u16 pkt_offset = 0, cksum;
48bfd1e0 1220 struct nx_host_rds_ring *rds_ring;
3d396eb1 1221
5dc16268 1222 desc_ctx = netxen_get_sts_type(sts_data);
3d396eb1
AK		 1223 if (unlikely(desc_ctx >= NUM_RCV_DESC_RINGS)) {
1224 printk("%s: %s Bad Rcv descriptor ring\n",
1225 netxen_nic_driver_name, netdev->name);
1226 return;
1227 }
1228
48bfd1e0
DP		 1229 rds_ring = &recv_ctx->rds_rings[desc_ctx];
1230 if (unlikely(index > rds_ring->max_rx_desc_count)) {
ed25ffa1 1231 DPRINTK(ERR, "Got a buffer index:%x Max is %x\n",
48bfd1e0 1232 index, rds_ring->max_rx_desc_count);
ed25ffa1
AK		 1233 return;
1234 }
48bfd1e0 1235 buffer = &rds_ring->rx_buf_arr[index];
ed25ffa1
AK		 1236 if (desc_ctx == RCV_DESC_LRO_CTXID) {
1237 buffer->lro_current_frags++;
1238 if (netxen_get_sts_desc_lro_last_frag(desc)) {
1239 buffer->lro_expected_frags =
1240 netxen_get_sts_desc_lro_cnt(desc);
1241 buffer->lro_length = length;
1242 }
1243 if (buffer->lro_current_frags != buffer->lro_expected_frags) {
1244 if (buffer->lro_expected_frags != 0) {
5bc51424
JP		 1245 printk("LRO: (refhandle:%x) recv frag. "
1246 "wait for last. flags: %x expected:%d "
ed25ffa1
AK		 1247 "have:%d\n", index,
1248 netxen_get_sts_desc_lro_last_frag(desc),
1249 buffer->lro_expected_frags,
1250 buffer->lro_current_frags);
1251 }
1252 return;
1253 }
1254 }
3d396eb1 1255
d9e651bc 1256 cksum = netxen_get_sts_status(sts_data);
3d396eb1 1257
d9e651bc
DP		 1258 skb = netxen_process_rxbuf(adapter, rds_ring, index, cksum);
1259 if (!skb)
1260 return;
200eef20 1261
ed25ffa1
AK		 1262 if (desc_ctx == RCV_DESC_LRO_CTXID) {
1263 /* True length was only available on the last pkt */
1264 skb_put(skb, buffer->lro_length);
1265 } else {
d9e651bc
DP		 1266 if (length > rds_ring->skb_size)
1267 skb_put(skb, rds_ring->skb_size);
1268 else
1269 skb_put(skb, length);
1270
1271 pkt_offset = netxen_get_sts_pkt_offset(sts_data);
1272 if (pkt_offset)
1273 skb_pull(skb, pkt_offset);
ed25ffa1
AK		 1274 }
1275
3d396eb1
AK		 1276 skb->protocol = eth_type_trans(skb, netdev);
1277
3d396eb1 1278 /*
d9e651bc
DP		 1279 * rx buffer chaining is disabled, walk and free
1280 * any spurious rx buffer chain.
3d396eb1 1281 */
d9e651bc
DP		 1282 if (frag_desc) {
1283 u16 i, nr_frags = desc->nr_frags;
1284
1285 dev_kfree_skb_any(skb);
1286 for (i = 0; i < nr_frags; i++) {
2edbb454 1287 index = le16_to_cpu(frag_desc->frag_handles[i]);
d9e651bc
DP		 1288 skb = netxen_process_rxbuf(adapter,
1289 rds_ring, index, cksum);
1290 if (skb)
1291 dev_kfree_skb_any(skb);
1292 }
1293 adapter->stats.rxdropped++;
1294 } else {
d9e651bc 1295 netif_receive_skb(skb);
d9e651bc
DP		 1296
1297 adapter->stats.no_rcv++;
1298 adapter->stats.rxbytes += length;
1299 }
3d396eb1
AK		 1300}
1301
1302/* Process Receive status ring */
1303u32 netxen_process_rcv_ring(struct netxen_adapter *adapter, int ctxid, int max)
1304{
1305 struct netxen_recv_context *recv_ctx = &(adapter->recv_ctx[ctxid]);
1306 struct status_desc *desc_head = recv_ctx->rcv_status_desc_head;
d9e651bc 1307 struct status_desc *desc, *frag_desc;
3d396eb1
AK		 1308 u32 consumer = recv_ctx->status_rx_consumer;
1309 int count = 0, ring;
d9e651bc
DP		 1310 u64 sts_data;
1311 u16 opcode;
3d396eb1 1312
3d396eb1
AK		 1313 while (count < max) {
1314 desc = &desc_head[consumer];
a608ab9c 1315 if (!(netxen_get_sts_owner(desc) & STATUS_OWNER_HOST)) {
ed25ffa1
AK		 1316 DPRINTK(ERR, "desc %p ownedby %x\n", desc,
1317 netxen_get_sts_owner(desc));
3d396eb1
AK		 1318 break;
1319 }
d9e651bc
DP		 1320
1321 sts_data = le64_to_cpu(desc->status_desc_data);
1322 opcode = netxen_get_sts_opcode(sts_data);
1323 frag_desc = NULL;
1324 if (opcode == NETXEN_NIC_RXPKT_DESC) {
1325 if (desc->nr_frags) {
1326 consumer = get_next_index(consumer,
1327 adapter->max_rx_desc_count);
1328 frag_desc = &desc_head[consumer];
1329 netxen_set_sts_owner(frag_desc,
1330 STATUS_OWNER_PHANTOM);
1331 }
1332 }
1333
1334 netxen_process_rcv(adapter, ctxid, desc, frag_desc);
1335
a608ab9c 1336 netxen_set_sts_owner(desc, STATUS_OWNER_PHANTOM);
d9e651bc
DP		 1337
1338 consumer = get_next_index(consumer,
1339 adapter->max_rx_desc_count);
3d396eb1
AK		 1340 count++;
1341 }
48bfd1e0 1342 for (ring = 0; ring < adapter->max_rds_rings; ring++)
05aaa02d 1343 netxen_post_rx_buffers_nodb(adapter, ctxid, ring);
3d396eb1
AK		 1344
1345 /* update the consumer index in phantom */
1346 if (count) {
3d396eb1
AK		 1347 recv_ctx->status_rx_consumer = consumer;
1348
1349 /* Window = 1 */
3ce06a32
DP		 1350 adapter->pci_write_normalize(adapter,
1351 recv_ctx->crb_sts_consumer, consumer);
3d396eb1
AK		 1352 }
1353
1354 return count;
1355}
1356
1357/* Process Command status ring */
05aaa02d 1358int netxen_process_cmd_ring(struct netxen_adapter *adapter)
3d396eb1 1359{
ba53e6b4
DP		 1360 u32 last_consumer, consumer;
1361 int count = 0, i;
3d396eb1 1362 struct netxen_cmd_buffer *buffer;
ba53e6b4
DP		 1363 struct pci_dev *pdev = adapter->pdev;
1364 struct net_device *netdev = adapter->netdev;
3d396eb1 1365 struct netxen_skb_frag *frag;
ba53e6b4 1366 int done = 0;
3d396eb1 1367
3d396eb1 1368 last_consumer = adapter->last_cmd_consumer;
9b410117 1369 consumer = le32_to_cpu(*(adapter->cmd_consumer));
3d396eb1 1370
ba53e6b4 1371 while (last_consumer != consumer) {
3d396eb1 1372 buffer = &adapter->cmd_buf_arr[last_consumer];
53a01e00 1373 if (buffer->skb) {
1374 frag = &buffer->frag_array[0];
3d396eb1
AK		 1375 pci_unmap_single(pdev, frag->dma, frag->length,
1376 PCI_DMA_TODEVICE);
96acb6eb 1377 frag->dma = 0ULL;
3d396eb1 1378 for (i = 1; i < buffer->frag_count; i++) {
3d396eb1
AK		 1379 frag++; /* Get the next frag */
1380 pci_unmap_page(pdev, frag->dma, frag->length,
1381 PCI_DMA_TODEVICE);
96acb6eb 1382 frag->dma = 0ULL;
3d396eb1
AK		 1383 }
1384
ba53e6b4 1385 adapter->stats.xmitfinished++;
53a01e00 1386 dev_kfree_skb_any(buffer->skb);
1387 buffer->skb = NULL;
3d396eb1
AK		 1388 }
1389
1390 last_consumer = get_next_index(last_consumer,
1391 adapter->max_tx_desc_count);
ba53e6b4
DP		 1392 if (++count >= MAX_STATUS_HANDLE)
1393 break;
3d396eb1 1394 }
3d396eb1 1395
ba53e6b4 1396 if (count) {
3d396eb1 1397 adapter->last_cmd_consumer = last_consumer;
ba53e6b4
DP		 1398 smp_mb();
1399 if (netif_queue_stopped(netdev) && netif_running(netdev)) {
1400 netif_tx_lock(netdev);
1401 netif_wake_queue(netdev);
1402 smp_mb();
1403 netif_tx_unlock(netdev);
3d396eb1
AK		 1404 }
1405 }
ed25ffa1
AK		 1406 /*
1407 * If everything is freed up to consumer then check if the ring is full
1408 * If the ring is full then check if more needs to be freed and
1409 * schedule the call back again.
1410 *
1411 * This happens when there are 2 CPUs. One could be freeing and the
1412 * other filling it. If the ring is full when we get out of here and
1413 * the card has already interrupted the host then the host can miss the
1414 * interrupt.
1415 *
1416 * There is still a possible race condition and the host could miss an
1417 * interrupt. The card has to take care of this.
1418 */
ba53e6b4
DP		 1419 consumer = le32_to_cpu(*(adapter->cmd_consumer));
1420 done = (last_consumer == consumer);
3d396eb1 1421
ed25ffa1 1422 return (done);
3d396eb1
AK		 1423}
1424
1425/*
1426 * netxen_post_rx_buffers puts buffer in the Phantom memory
1427 */
1428void netxen_post_rx_buffers(struct netxen_adapter *adapter, u32 ctx, u32 ringid)
1429{
7830b22c 1430 struct pci_dev *pdev = adapter->pdev;
3d396eb1
AK		 1431 struct sk_buff *skb;
1432 struct netxen_recv_context *recv_ctx = &(adapter->recv_ctx[ctx]);
48bfd1e0 1433 struct nx_host_rds_ring *rds_ring = NULL;
ed25ffa1 1434 uint producer;
3d396eb1
AK		 1435 struct rcv_desc *pdesc;
1436 struct netxen_rx_buffer *buffer;
1437 int count = 0;
1438 int index = 0;
ed25ffa1
AK		 1439 netxen_ctx_msg msg = 0;
1440 dma_addr_t dma;
d9e651bc 1441 struct list_head *head;
3d396eb1 1442
48bfd1e0 1443 rds_ring = &recv_ctx->rds_rings[ringid];
3d396eb1 1444
48bfd1e0
DP		 1445 producer = rds_ring->producer;
1446 index = rds_ring->begin_alloc;
d9e651bc
DP		 1447 head = &rds_ring->free_list;
1448
3d396eb1 1449 /* We can start writing rx descriptors into the phantom memory. */
d9e651bc
DP		 1450 while (!list_empty(head)) {
1451
48bfd1e0 1452 skb = dev_alloc_skb(rds_ring->skb_size);
3d396eb1 1453 if (unlikely(!skb)) {
48bfd1e0 1454 rds_ring->begin_alloc = index;
3d396eb1
AK		 1455 break;
1456 }
ed25ffa1 1457
d9e651bc
DP		 1458 buffer = list_entry(head->next, struct netxen_rx_buffer, list);
1459 list_del(&buffer->list);
1460
ed25ffa1 1461 count++; /* now there should be no failure */
48bfd1e0 1462 pdesc = &rds_ring->desc_head[producer];
ed25ffa1 1463
d9e651bc
DP		 1464 if (!adapter->ahw.cut_through)
1465 skb_reserve(skb, 2);
ed25ffa1
AK		 1466 /* This will be setup when we receive the
1467 * buffer after it has been filled FSL TBD TBD
1468 * skb->dev = netdev;
1469 */
48bfd1e0 1470 dma = pci_map_single(pdev, skb->data, rds_ring->dma_size,
ed25ffa1 1471 PCI_DMA_FROMDEVICE);
ed33ebe4 1472 pdesc->addr_buffer = cpu_to_le64(dma);
ed25ffa1
AK		 1473 buffer->skb = skb;
1474 buffer->state = NETXEN_BUFFER_BUSY;
1475 buffer->dma = dma;
1476 /* make a rcv descriptor */
ed33ebe4 1477 pdesc->reference_handle = cpu_to_le16(buffer->ref_handle);
48bfd1e0 1478 pdesc->buffer_length = cpu_to_le32(rds_ring->dma_size);
ed25ffa1
AK		 1479 DPRINTK(INFO, "done writing descripter\n");
1480 producer =
48bfd1e0
DP		 1481 get_next_index(producer, rds_ring->max_rx_desc_count);
1482 index = get_next_index(index, rds_ring->max_rx_desc_count);
ed25ffa1
AK		 1483 }
1484 /* if we did allocate buffers, then write the count to Phantom */
1485 if (count) {
48bfd1e0
DP		 1486 rds_ring->begin_alloc = index;
1487 rds_ring->producer = producer;
ed25ffa1 1488 /* Window = 1 */
3ce06a32 1489 adapter->pci_write_normalize(adapter,
48bfd1e0
DP		 1490 rds_ring->crb_rcv_producer,
1491 (producer-1) & (rds_ring->max_rx_desc_count-1));
1492
1493 if (adapter->fw_major < 4) {
ed25ffa1
AK		 1494 /*
1495 * Write a doorbell msg to tell phanmon of change in
1496 * receive ring producer
48bfd1e0 1497 * Only for firmware version < 4.0.0
ed25ffa1
AK		 1498 */
1499 netxen_set_msg_peg_id(msg, NETXEN_RCV_PEG_DB_ID);
1500 netxen_set_msg_privid(msg);
1501 netxen_set_msg_count(msg,
1502 ((producer -
48bfd1e0 1503 1) & (rds_ring->
ed25ffa1 1504 max_rx_desc_count - 1)));
3176ff3e 1505 netxen_set_msg_ctxid(msg, adapter->portnum);
ed25ffa1
AK		 1506 netxen_set_msg_opcode(msg, NETXEN_RCV_PRODUCER(ringid));
1507 writel(msg,
1508 DB_NORMALIZE(adapter,
1509 NETXEN_RCV_PRODUCER_OFFSET));
48bfd1e0 1510 }
ed25ffa1
AK		 1511 }
1512}
1513
993fb90c
AB		 1514static void netxen_post_rx_buffers_nodb(struct netxen_adapter *adapter,
1515 uint32_t ctx, uint32_t ringid)
ed25ffa1 1516{
7830b22c 1517 struct pci_dev *pdev = adapter->pdev;
ed25ffa1
AK		 1518 struct sk_buff *skb;
1519 struct netxen_recv_context *recv_ctx = &(adapter->recv_ctx[ctx]);
48bfd1e0 1520 struct nx_host_rds_ring *rds_ring = NULL;
ed25ffa1
AK		 1521 u32 producer;
1522 struct rcv_desc *pdesc;
1523 struct netxen_rx_buffer *buffer;
1524 int count = 0;
1525 int index = 0;
d9e651bc 1526 struct list_head *head;
ed25ffa1 1527
48bfd1e0 1528 rds_ring = &recv_ctx->rds_rings[ringid];
ed25ffa1 1529
48bfd1e0
DP		 1530 producer = rds_ring->producer;
1531 index = rds_ring->begin_alloc;
d9e651bc 1532 head = &rds_ring->free_list;
ed25ffa1 1533 /* We can start writing rx descriptors into the phantom memory. */
d9e651bc
DP		 1534 while (!list_empty(head)) {
1535
48bfd1e0 1536 skb = dev_alloc_skb(rds_ring->skb_size);
ed25ffa1 1537 if (unlikely(!skb)) {
48bfd1e0 1538 rds_ring->begin_alloc = index;
ed25ffa1
AK		 1539 break;
1540 }
d9e651bc
DP		 1541
1542 buffer = list_entry(head->next, struct netxen_rx_buffer, list);
1543 list_del(&buffer->list);
1544
3d396eb1 1545 count++; /* now there should be no failure */
48bfd1e0 1546 pdesc = &rds_ring->desc_head[producer];
d9e651bc
DP		 1547 if (!adapter->ahw.cut_through)
1548 skb_reserve(skb, 2);
3d396eb1
AK		 1549 buffer->skb = skb;
1550 buffer->state = NETXEN_BUFFER_BUSY;
1551 buffer->dma = pci_map_single(pdev, skb->data,
48bfd1e0 1552 rds_ring->dma_size,
3d396eb1 1553 PCI_DMA_FROMDEVICE);
ed25ffa1 1554
3d396eb1 1555 /* make a rcv descriptor */
ed33ebe4 1556 pdesc->reference_handle = cpu_to_le16(buffer->ref_handle);
48bfd1e0 1557 pdesc->buffer_length = cpu_to_le32(rds_ring->dma_size);
3d396eb1 1558 pdesc->addr_buffer = cpu_to_le64(buffer->dma);
3d396eb1 1559 producer =
48bfd1e0
DP		 1560 get_next_index(producer, rds_ring->max_rx_desc_count);
1561 index = get_next_index(index, rds_ring->max_rx_desc_count);
1562 buffer = &rds_ring->rx_buf_arr[index];
3d396eb1
AK		 1563 }
1564
1565 /* if we did allocate buffers, then write the count to Phantom */
1566 if (count) {
48bfd1e0
DP		 1567 rds_ring->begin_alloc = index;
1568 rds_ring->producer = producer;
3d396eb1 1569 /* Window = 1 */
3ce06a32 1570 adapter->pci_write_normalize(adapter,
48bfd1e0
DP		 1571 rds_ring->crb_rcv_producer,
1572 (producer-1) & (rds_ring->max_rx_desc_count-1));
3d396eb1 1573 wmb();
3d396eb1
AK		 1574 }
1575}
1576
3d396eb1
AK		 1577void netxen_nic_clear_stats(struct netxen_adapter *adapter)
1578{
3d396eb1 1579 memset(&adapter->stats, 0, sizeof(adapter->stats));
3176ff3e 1580 return;
3d396eb1
AK		 1581}
1582
Linux 6.x block layer and io_uring tree(s)