Commit | Line | Data |
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\9aöjfors, 2009-06-04 03:35:55 +0000">b07878e5 | 1 | /* |
a1aa8822 | 2 | * ks8842.c timberdale KS8842 ethernet driver |
\9aöjfors, 2009-06-04 03:35:55 +0000" rowspan="18">b07878e5 R |
3 | * Copyright (c) 2009 Intel Corporation |
4 | * | |
5 | * This program is free software; you can redistribute it and/or modify | |
6 | * it under the terms of the GNU General Public License version 2 as | |
7 | * published by the Free Software Foundation. | |
8 | * | |
9 | * This program is distributed in the hope that it will be useful, | |
10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
12 | * GNU General Public License for more details. | |
13 | * | |
14 | * You should have received a copy of the GNU General Public License | |
15 | * along with this program; if not, write to the Free Software | |
16 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
17 | */ | |
18 | ||
19 | /* Supports: | |
20 | * The Micrel KS8842 behind the timberdale FPGA | |
28bd620c | 21 | * The genuine Micrel KS8841/42 device with ISA 16/32bit bus interface |
\9aöjfors, 2009-06-04 03:35:55 +0000" rowspan="2">b07878e5 R |
22 | */ |
23 | ||
0dc7d2b3 JP |
24 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt |
25 | ||
\9aöjfors, 2009-06-04 03:35:55 +0000" rowspan="6">b07878e5 R |
26 | #include <linux/kernel.h> |
27 | #include <linux/module.h> | |
28 | #include <linux/platform_device.h> | |
29 | #include <linux/netdevice.h> | |
30 | #include <linux/etherdevice.h> | |
31 | #include <linux/ethtool.h> | |
a1aa8822 | 32 | #include <linux/ks8842.h> |
\9aöjfors, 2009-06-04 03:35:55 +0000" rowspan="85">b07878e5 R |
33 | |
34 | #define DRV_NAME "ks8842" | |
35 | ||
36 | /* Timberdale specific Registers */ | |
37 | #define REG_TIMB_RST 0x1c | |
38 | ||
39 | /* KS8842 registers */ | |
40 | ||
41 | #define REG_SELECT_BANK 0x0e | |
42 | ||
43 | /* bank 0 registers */ | |
44 | #define REG_QRFCR 0x04 | |
45 | ||
46 | /* bank 2 registers */ | |
47 | #define REG_MARL 0x00 | |
48 | #define REG_MARM 0x02 | |
49 | #define REG_MARH 0x04 | |
50 | ||
51 | /* bank 3 registers */ | |
52 | #define REG_GRR 0x06 | |
53 | ||
54 | /* bank 16 registers */ | |
55 | #define REG_TXCR 0x00 | |
56 | #define REG_TXSR 0x02 | |
57 | #define REG_RXCR 0x04 | |
58 | #define REG_TXMIR 0x08 | |
59 | #define REG_RXMIR 0x0A | |
60 | ||
61 | /* bank 17 registers */ | |
62 | #define REG_TXQCR 0x00 | |
63 | #define REG_RXQCR 0x02 | |
64 | #define REG_TXFDPR 0x04 | |
65 | #define REG_RXFDPR 0x06 | |
66 | #define REG_QMU_DATA_LO 0x08 | |
67 | #define REG_QMU_DATA_HI 0x0A | |
68 | ||
69 | /* bank 18 registers */ | |
70 | #define REG_IER 0x00 | |
71 | #define IRQ_LINK_CHANGE 0x8000 | |
72 | #define IRQ_TX 0x4000 | |
73 | #define IRQ_RX 0x2000 | |
74 | #define IRQ_RX_OVERRUN 0x0800 | |
75 | #define IRQ_TX_STOPPED 0x0200 | |
76 | #define IRQ_RX_STOPPED 0x0100 | |
77 | #define IRQ_RX_ERROR 0x0080 | |
78 | #define ENABLED_IRQS (IRQ_LINK_CHANGE | IRQ_TX | IRQ_RX | IRQ_RX_STOPPED | \ | |
79 | IRQ_TX_STOPPED | IRQ_RX_OVERRUN | IRQ_RX_ERROR) | |
80 | #define REG_ISR 0x02 | |
81 | #define REG_RXSR 0x04 | |
82 | #define RXSR_VALID 0x8000 | |
83 | #define RXSR_BROADCAST 0x80 | |
84 | #define RXSR_MULTICAST 0x40 | |
85 | #define RXSR_UNICAST 0x20 | |
86 | #define RXSR_FRAMETYPE 0x08 | |
87 | #define RXSR_TOO_LONG 0x04 | |
88 | #define RXSR_RUNT 0x02 | |
89 | #define RXSR_CRC_ERROR 0x01 | |
90 | #define RXSR_ERROR (RXSR_TOO_LONG | RXSR_RUNT | RXSR_CRC_ERROR) | |
91 | ||
92 | /* bank 32 registers */ | |
93 | #define REG_SW_ID_AND_ENABLE 0x00 | |
94 | #define REG_SGCR1 0x02 | |
95 | #define REG_SGCR2 0x04 | |
96 | #define REG_SGCR3 0x06 | |
97 | ||
98 | /* bank 39 registers */ | |
99 | #define REG_MACAR1 0x00 | |
100 | #define REG_MACAR2 0x02 | |
101 | #define REG_MACAR3 0x04 | |
102 | ||
103 | /* bank 45 registers */ | |
104 | #define REG_P1MBCR 0x00 | |
105 | #define REG_P1MBSR 0x02 | |
106 | ||
107 | /* bank 46 registers */ | |
108 | #define REG_P2MBCR 0x00 | |
109 | #define REG_P2MBSR 0x02 | |
110 | ||
111 | /* bank 48 registers */ | |
112 | #define REG_P1CR2 0x02 | |
113 | ||
114 | /* bank 49 registers */ | |
115 | #define REG_P1CR4 0x02 | |
116 | #define REG_P1SR 0x04 | |
117 | ||
28bd620c DC |
118 | /* flags passed by platform_device for configuration */ |
119 | #define MICREL_KS884X 0x01 /* 0=Timeberdale(FPGA), 1=Micrel */ | |
120 | #define KS884X_16BIT 0x02 /* 1=16bit, 0=32bit */ | |
121 | ||
\9aöjfors, 2009-06-04 03:35:55 +0000" rowspan="3">b07878e5 R |
122 | struct ks8842_adapter { |
123 | void __iomem *hw_addr; | |
124 | int irq; | |
28bd620c | 125 | unsigned long conf_flags; /* copy of platform_device config */ |
\9aöjfors, 2009-06-04 03:35:55 +0000" rowspan="2">b07878e5 R |
126 | struct tasklet_struct tasklet; |
127 | spinlock_t lock; /* spinlock to be interrupt safe */ | |
cc88e450 RR |
128 | struct work_struct timeout_work; |
129 | struct net_device *netdev; | |
\9aöjfors, 2009-06-04 03:35:55 +0000" rowspan="71">b07878e5 R |
130 | }; |
131 | ||
132 | static inline void ks8842_select_bank(struct ks8842_adapter *adapter, u16 bank) | |
133 | { | |
134 | iowrite16(bank, adapter->hw_addr + REG_SELECT_BANK); | |
135 | } | |
136 | ||
137 | static inline void ks8842_write8(struct ks8842_adapter *adapter, u16 bank, | |
138 | u8 value, int offset) | |
139 | { | |
140 | ks8842_select_bank(adapter, bank); | |
141 | iowrite8(value, adapter->hw_addr + offset); | |
142 | } | |
143 | ||
144 | static inline void ks8842_write16(struct ks8842_adapter *adapter, u16 bank, | |
145 | u16 value, int offset) | |
146 | { | |
147 | ks8842_select_bank(adapter, bank); | |
148 | iowrite16(value, adapter->hw_addr + offset); | |
149 | } | |
150 | ||
151 | static inline void ks8842_enable_bits(struct ks8842_adapter *adapter, u16 bank, | |
152 | u16 bits, int offset) | |
153 | { | |
154 | u16 reg; | |
155 | ks8842_select_bank(adapter, bank); | |
156 | reg = ioread16(adapter->hw_addr + offset); | |
157 | reg |= bits; | |
158 | iowrite16(reg, adapter->hw_addr + offset); | |
159 | } | |
160 | ||
161 | static inline void ks8842_clear_bits(struct ks8842_adapter *adapter, u16 bank, | |
162 | u16 bits, int offset) | |
163 | { | |
164 | u16 reg; | |
165 | ks8842_select_bank(adapter, bank); | |
166 | reg = ioread16(adapter->hw_addr + offset); | |
167 | reg &= ~bits; | |
168 | iowrite16(reg, adapter->hw_addr + offset); | |
169 | } | |
170 | ||
171 | static inline void ks8842_write32(struct ks8842_adapter *adapter, u16 bank, | |
172 | u32 value, int offset) | |
173 | { | |
174 | ks8842_select_bank(adapter, bank); | |
175 | iowrite32(value, adapter->hw_addr + offset); | |
176 | } | |
177 | ||
178 | static inline u8 ks8842_read8(struct ks8842_adapter *adapter, u16 bank, | |
179 | int offset) | |
180 | { | |
181 | ks8842_select_bank(adapter, bank); | |
182 | return ioread8(adapter->hw_addr + offset); | |
183 | } | |
184 | ||
185 | static inline u16 ks8842_read16(struct ks8842_adapter *adapter, u16 bank, | |
186 | int offset) | |
187 | { | |
188 | ks8842_select_bank(adapter, bank); | |
189 | return ioread16(adapter->hw_addr + offset); | |
190 | } | |
191 | ||
192 | static inline u32 ks8842_read32(struct ks8842_adapter *adapter, u16 bank, | |
193 | int offset) | |
194 | { | |
195 | ks8842_select_bank(adapter, bank); | |
196 | return ioread32(adapter->hw_addr + offset); | |
197 | } | |
198 | ||
199 | static void ks8842_reset(struct ks8842_adapter *adapter) | |
200 | { | |
28bd620c DC |
201 | if (adapter->conf_flags & MICREL_KS884X) { |
202 | ks8842_write16(adapter, 3, 1, REG_GRR); | |
203 | msleep(10); | |
204 | iowrite16(0, adapter->hw_addr + REG_GRR); | |
205 | } else { | |
206 | /* The KS8842 goes haywire when doing softare reset | |
207 | * a work around in the timberdale IP is implemented to | |
208 | * do a hardware reset instead | |
209 | ks8842_write16(adapter, 3, 1, REG_GRR); | |
210 | msleep(10); | |
211 | iowrite16(0, adapter->hw_addr + REG_GRR); | |
212 | */ | |
213 | iowrite32(0x1, adapter->hw_addr + REG_TIMB_RST); | |
214 | msleep(20); | |
215 | } | |
\9aöjfors, 2009-06-04 03:35:55 +0000" rowspan="68">b07878e5 R |
216 | } |
217 | ||
218 | static void ks8842_update_link_status(struct net_device *netdev, | |
219 | struct ks8842_adapter *adapter) | |
220 | { | |
221 | /* check the status of the link */ | |
222 | if (ks8842_read16(adapter, 45, REG_P1MBSR) & 0x4) { | |
223 | netif_carrier_on(netdev); | |
224 | netif_wake_queue(netdev); | |
225 | } else { | |
226 | netif_stop_queue(netdev); | |
227 | netif_carrier_off(netdev); | |
228 | } | |
229 | } | |
230 | ||
231 | static void ks8842_enable_tx(struct ks8842_adapter *adapter) | |
232 | { | |
233 | ks8842_enable_bits(adapter, 16, 0x01, REG_TXCR); | |
234 | } | |
235 | ||
236 | static void ks8842_disable_tx(struct ks8842_adapter *adapter) | |
237 | { | |
238 | ks8842_clear_bits(adapter, 16, 0x01, REG_TXCR); | |
239 | } | |
240 | ||
241 | static void ks8842_enable_rx(struct ks8842_adapter *adapter) | |
242 | { | |
243 | ks8842_enable_bits(adapter, 16, 0x01, REG_RXCR); | |
244 | } | |
245 | ||
246 | static void ks8842_disable_rx(struct ks8842_adapter *adapter) | |
247 | { | |
248 | ks8842_clear_bits(adapter, 16, 0x01, REG_RXCR); | |
249 | } | |
250 | ||
251 | static void ks8842_reset_hw(struct ks8842_adapter *adapter) | |
252 | { | |
253 | /* reset the HW */ | |
254 | ks8842_reset(adapter); | |
255 | ||
256 | /* Enable QMU Transmit flow control / transmit padding / Transmit CRC */ | |
257 | ks8842_write16(adapter, 16, 0x000E, REG_TXCR); | |
258 | ||
259 | /* enable the receiver, uni + multi + broadcast + flow ctrl | |
260 | + crc strip */ | |
261 | ks8842_write16(adapter, 16, 0x8 | 0x20 | 0x40 | 0x80 | 0x400, | |
262 | REG_RXCR); | |
263 | ||
264 | /* TX frame pointer autoincrement */ | |
265 | ks8842_write16(adapter, 17, 0x4000, REG_TXFDPR); | |
266 | ||
267 | /* RX frame pointer autoincrement */ | |
268 | ks8842_write16(adapter, 17, 0x4000, REG_RXFDPR); | |
269 | ||
270 | /* RX 2 kb high watermark */ | |
271 | ks8842_write16(adapter, 0, 0x1000, REG_QRFCR); | |
272 | ||
273 | /* aggresive back off in half duplex */ | |
274 | ks8842_enable_bits(adapter, 32, 1 << 8, REG_SGCR1); | |
275 | ||
276 | /* enable no excessive collison drop */ | |
277 | ks8842_enable_bits(adapter, 32, 1 << 3, REG_SGCR2); | |
278 | ||
279 | /* Enable port 1 force flow control / back pressure / transmit / recv */ | |
280 | ks8842_write16(adapter, 48, 0x1E07, REG_P1CR2); | |
281 | ||
282 | /* restart port auto-negotiation */ | |
283 | ks8842_enable_bits(adapter, 49, 1 << 13, REG_P1CR4); | |
28bd620c DC |
284 | |
285 | if (!(adapter->conf_flags & MICREL_KS884X)) | |
286 | /* only advertise 10Mbps */ | |
287 | ks8842_clear_bits(adapter, 49, 3 << 2, REG_P1CR4); | |
\9aöjfors, 2009-06-04 03:35:55 +0000" rowspan="25">b07878e5 R |
288 | |
289 | /* Enable the transmitter */ | |
290 | ks8842_enable_tx(adapter); | |
291 | ||
292 | /* Enable the receiver */ | |
293 | ks8842_enable_rx(adapter); | |
294 | ||
295 | /* clear all interrupts */ | |
296 | ks8842_write16(adapter, 18, 0xffff, REG_ISR); | |
297 | ||
298 | /* enable interrupts */ | |
299 | ks8842_write16(adapter, 18, ENABLED_IRQS, REG_IER); | |
300 | ||
301 | /* enable the switch */ | |
302 | ks8842_write16(adapter, 32, 0x1, REG_SW_ID_AND_ENABLE); | |
303 | } | |
304 | ||
305 | static void ks8842_read_mac_addr(struct ks8842_adapter *adapter, u8 *dest) | |
306 | { | |
307 | int i; | |
308 | u16 mac; | |
309 | ||
310 | for (i = 0; i < ETH_ALEN; i++) | |
311 | dest[ETH_ALEN - i - 1] = ks8842_read8(adapter, 2, REG_MARL + i); | |
312 | ||
28bd620c DC |
313 | if (adapter->conf_flags & MICREL_KS884X) { |
314 | /* | |
315 | the sequence of saving mac addr between MAC and Switch is | |
316 | different. | |
317 | */ | |
318 | ||
319 | mac = ks8842_read16(adapter, 2, REG_MARL); | |
320 | ks8842_write16(adapter, 39, mac, REG_MACAR3); | |
321 | mac = ks8842_read16(adapter, 2, REG_MARM); | |
322 | ks8842_write16(adapter, 39, mac, REG_MACAR2); | |
323 | mac = ks8842_read16(adapter, 2, REG_MARH); | |
324 | ks8842_write16(adapter, 39, mac, REG_MACAR1); | |
325 | } else { | |
326 | ||
327 | /* make sure the switch port uses the same MAC as the QMU */ | |
328 | mac = ks8842_read16(adapter, 2, REG_MARL); | |
329 | ks8842_write16(adapter, 39, mac, REG_MACAR1); | |
330 | mac = ks8842_read16(adapter, 2, REG_MARM); | |
331 | ks8842_write16(adapter, 39, mac, REG_MACAR2); | |
332 | mac = ks8842_read16(adapter, 2, REG_MARH); | |
333 | ks8842_write16(adapter, 39, mac, REG_MACAR3); | |
334 | } | |
\9aöjfors, 2009-06-04 03:35:55 +0000" rowspan="2">b07878e5 R |
335 | } |
336 | ||
a1aa8822 RR |
337 | static void ks8842_write_mac_addr(struct ks8842_adapter *adapter, u8 *mac) |
338 | { | |
339 | unsigned long flags; | |
340 | unsigned i; | |
341 | ||
342 | spin_lock_irqsave(&adapter->lock, flags); | |
343 | for (i = 0; i < ETH_ALEN; i++) { | |
344 | ks8842_write8(adapter, 2, mac[ETH_ALEN - i - 1], REG_MARL + i); | |
28bd620c DC |
345 | if (!(adapter->conf_flags & MICREL_KS884X)) |
346 | ks8842_write8(adapter, 39, mac[ETH_ALEN - i - 1], | |
347 | REG_MACAR1 + i); | |
348 | } | |
349 | ||
350 | if (adapter->conf_flags & MICREL_KS884X) { | |
351 | /* | |
352 | the sequence of saving mac addr between MAC and Switch is | |
353 | different. | |
354 | */ | |
355 | ||
356 | u16 mac; | |
357 | ||
358 | mac = ks8842_read16(adapter, 2, REG_MARL); | |
359 | ks8842_write16(adapter, 39, mac, REG_MACAR3); | |
360 | mac = ks8842_read16(adapter, 2, REG_MARM); | |
361 | ks8842_write16(adapter, 39, mac, REG_MACAR2); | |
362 | mac = ks8842_read16(adapter, 2, REG_MARH); | |
363 | ks8842_write16(adapter, 39, mac, REG_MACAR1); | |
a1aa8822 RR |
364 | } |
365 | spin_unlock_irqrestore(&adapter->lock, flags); | |
366 | } | |
367 | ||
\9aöjfors, 2009-06-04 03:35:55 +0000" rowspan="9">b07878e5 R |
368 | static inline u16 ks8842_tx_fifo_space(struct ks8842_adapter *adapter) |
369 | { | |
370 | return ks8842_read16(adapter, 16, REG_TXMIR) & 0x1fff; | |
371 | } | |
372 | ||
373 | static int ks8842_tx_frame(struct sk_buff *skb, struct net_device *netdev) | |
374 | { | |
375 | struct ks8842_adapter *adapter = netdev_priv(netdev); | |
376 | int len = skb->len; | |
\9aöjfors, 2009-06-04 03:35:55 +0000">b07878e5 | 377 | |
a99db196 | 378 | netdev_dbg(netdev, "%s: len %u head %p data %p tail %p end %p\n", |
\9aöjfors, 2009-06-04 03:35:55 +0000" rowspan="7">b07878e5 R |
379 | __func__, skb->len, skb->head, skb->data, |
380 | skb_tail_pointer(skb), skb_end_pointer(skb)); | |
381 | ||
382 | /* check FIFO buffer space, we need space for CRC and command bits */ | |
383 | if (ks8842_tx_fifo_space(adapter) < len + 8) | |
384 | return NETDEV_TX_BUSY; | |
385 | ||
28bd620c DC |
386 | if (adapter->conf_flags & KS884X_16BIT) { |
387 | u16 *ptr16 = (u16 *)skb->data; | |
388 | ks8842_write16(adapter, 17, 0x8000 | 0x100, REG_QMU_DATA_LO); | |
389 | ks8842_write16(adapter, 17, (u16)len, REG_QMU_DATA_HI); | |
390 | netdev->stats.tx_bytes += len; | |
391 | ||
392 | /* copy buffer */ | |
393 | while (len > 0) { | |
394 | iowrite16(*ptr16++, adapter->hw_addr + REG_QMU_DATA_LO); | |
395 | iowrite16(*ptr16++, adapter->hw_addr + REG_QMU_DATA_HI); | |
396 | len -= sizeof(u32); | |
397 | } | |
398 | } else { | |
399 | ||
400 | u32 *ptr = (u32 *)skb->data; | |
401 | u32 ctrl; | |
402 | /* the control word, enable IRQ, port 1 and the length */ | |
403 | ctrl = 0x8000 | 0x100 | (len << 16); | |
404 | ks8842_write32(adapter, 17, ctrl, REG_QMU_DATA_LO); | |
\9aöjfors, 2009-06-04 03:35:55 +0000">b07878e5 | 405 | |
28bd620c | 406 | netdev->stats.tx_bytes += len; |
\9aöjfors, 2009-06-04 03:35:55 +0000">b07878e5 | 407 | |
28bd620c DC |
408 | /* copy buffer */ |
409 | while (len > 0) { | |
410 | iowrite32(*ptr, adapter->hw_addr + REG_QMU_DATA_LO); | |
411 | len -= sizeof(u32); | |
412 | ptr++; | |
413 | } | |
\9aöjfors, 2009-06-04 03:35:55 +0000" rowspan="13">b07878e5 R |
414 | } |
415 | ||
416 | /* enqueue packet */ | |
417 | ks8842_write16(adapter, 17, 1, REG_TXQCR); | |
418 | ||
419 | dev_kfree_skb(skb); | |
420 | ||
421 | return NETDEV_TX_OK; | |
422 | } | |
423 | ||
424 | static void ks8842_rx_frame(struct net_device *netdev, | |
425 | struct ks8842_adapter *adapter) | |
426 | { | |
28bd620c DC |
427 | u16 status16; |
428 | u32 status; | |
429 | int len; | |
\9aöjfors, 2009-06-04 03:35:55 +0000">b07878e5 | 430 | |
28bd620c DC |
431 | if (adapter->conf_flags & KS884X_16BIT) { |
432 | status16 = ks8842_read16(adapter, 17, REG_QMU_DATA_LO); | |
433 | len = (int)ks8842_read16(adapter, 17, REG_QMU_DATA_HI); | |
434 | len &= 0xffff; | |
435 | netdev_dbg(netdev, "%s - rx_data: status: %x\n", | |
436 | __func__, status16); | |
437 | } else { | |
438 | status = ks8842_read32(adapter, 17, REG_QMU_DATA_LO); | |
439 | len = (status >> 16) & 0x7ff; | |
440 | status &= 0xffff; | |
441 | netdev_dbg(netdev, "%s - rx_data: status: %x\n", | |
442 | __func__, status); | |
443 | } | |
\9aöjfors, 2009-06-04 03:35:55 +0000" rowspan="3">b07878e5 R |
444 | |
445 | /* check the status */ | |
446 | if ((status & RXSR_VALID) && !(status & RXSR_ERROR)) { | |
89d71a66 | 447 | struct sk_buff *skb = netdev_alloc_skb_ip_align(netdev, len); |
\9aöjfors, 2009-06-04 03:35:55 +0000">b07878e5 | 448 | |
a99db196 | 449 | netdev_dbg(netdev, "%s, got package, len: %d\n", __func__, len); |
\9aöjfors, 2009-06-04 03:35:55 +0000">b07878e5 | 450 | if (skb) { |
\9aöjfors, 2009-06-04 03:35:55 +0000" rowspan="6">b07878e5 R |
451 | |
452 | netdev->stats.rx_packets++; | |
453 | netdev->stats.rx_bytes += len; | |
454 | if (status & RXSR_MULTICAST) | |
455 | netdev->stats.multicast++; | |
456 | ||
28bd620c DC |
457 | if (adapter->conf_flags & KS884X_16BIT) { |
458 | u16 *data16 = (u16 *)skb_put(skb, len); | |
459 | ks8842_select_bank(adapter, 17); | |
460 | while (len > 0) { | |
461 | *data16++ = ioread16(adapter->hw_addr + | |
462 | REG_QMU_DATA_LO); | |
463 | *data16++ = ioread16(adapter->hw_addr + | |
464 | REG_QMU_DATA_HI); | |
465 | len -= sizeof(u32); | |
466 | } | |
467 | } else { | |
468 | u32 *data = (u32 *)skb_put(skb, len); | |
469 | ||
470 | ks8842_select_bank(adapter, 17); | |
471 | while (len > 0) { | |
472 | *data++ = ioread32(adapter->hw_addr + | |
473 | REG_QMU_DATA_LO); | |
474 | len -= sizeof(u32); | |
475 | } | |
\9aöjfors, 2009-06-04 03:35:55 +0000">b07878e5 | 476 | } |
\9aöjfors, 2009-06-04 03:35:55 +0000" rowspan="5">b07878e5 R |
477 | skb->protocol = eth_type_trans(skb, netdev); |
478 | netif_rx(skb); | |
479 | } else | |
480 | netdev->stats.rx_dropped++; | |
481 | } else { | |
a99db196 | 482 | netdev_dbg(netdev, "RX error, status: %x\n", status); |
\9aöjfors, 2009-06-04 03:35:55 +0000" rowspan="22">b07878e5 R |
483 | netdev->stats.rx_errors++; |
484 | if (status & RXSR_TOO_LONG) | |
485 | netdev->stats.rx_length_errors++; | |
486 | if (status & RXSR_CRC_ERROR) | |
487 | netdev->stats.rx_crc_errors++; | |
488 | if (status & RXSR_RUNT) | |
489 | netdev->stats.rx_frame_errors++; | |
490 | } | |
491 | ||
492 | /* set high watermark to 3K */ | |
493 | ks8842_clear_bits(adapter, 0, 1 << 12, REG_QRFCR); | |
494 | ||
495 | /* release the frame */ | |
496 | ks8842_write16(adapter, 17, 0x01, REG_RXQCR); | |
497 | ||
498 | /* set high watermark to 2K */ | |
499 | ks8842_enable_bits(adapter, 0, 1 << 12, REG_QRFCR); | |
500 | } | |
501 | ||
502 | void ks8842_handle_rx(struct net_device *netdev, struct ks8842_adapter *adapter) | |
503 | { | |
504 | u16 rx_data = ks8842_read16(adapter, 16, REG_RXMIR) & 0x1fff; | |
a99db196 | 505 | netdev_dbg(netdev, "%s Entry - rx_data: %d\n", __func__, rx_data); |
\9aöjfors, 2009-06-04 03:35:55 +0000" rowspan="9">b07878e5 R |
506 | while (rx_data) { |
507 | ks8842_rx_frame(netdev, adapter); | |
508 | rx_data = ks8842_read16(adapter, 16, REG_RXMIR) & 0x1fff; | |
509 | } | |
510 | } | |
511 | ||
512 | void ks8842_handle_tx(struct net_device *netdev, struct ks8842_adapter *adapter) | |
513 | { | |
514 | u16 sr = ks8842_read16(adapter, 16, REG_TXSR); | |
a99db196 | 515 | netdev_dbg(netdev, "%s - entry, sr: %x\n", __func__, sr); |
\9aöjfors, 2009-06-04 03:35:55 +0000" rowspan="8">b07878e5 R |
516 | netdev->stats.tx_packets++; |
517 | if (netif_queue_stopped(netdev)) | |
518 | netif_wake_queue(netdev); | |
519 | } | |
520 | ||
521 | void ks8842_handle_rx_overrun(struct net_device *netdev, | |
522 | struct ks8842_adapter *adapter) | |
523 | { | |
a99db196 | 524 | netdev_dbg(netdev, "%s: entry\n", __func__); |
\9aöjfors, 2009-06-04 03:35:55 +0000" rowspan="18">b07878e5 R |
525 | netdev->stats.rx_errors++; |
526 | netdev->stats.rx_fifo_errors++; | |
527 | } | |
528 | ||
529 | void ks8842_tasklet(unsigned long arg) | |
530 | { | |
531 | struct net_device *netdev = (struct net_device *)arg; | |
532 | struct ks8842_adapter *adapter = netdev_priv(netdev); | |
533 | u16 isr; | |
534 | unsigned long flags; | |
535 | u16 entry_bank; | |
536 | ||
537 | /* read current bank to be able to set it back */ | |
538 | spin_lock_irqsave(&adapter->lock, flags); | |
539 | entry_bank = ioread16(adapter->hw_addr + REG_SELECT_BANK); | |
540 | spin_unlock_irqrestore(&adapter->lock, flags); | |
541 | ||
542 | isr = ks8842_read16(adapter, 18, REG_ISR); | |
a99db196 | 543 | netdev_dbg(netdev, "%s - ISR: 0x%x\n", __func__, isr); |
\9aöjfors, 2009-06-04 03:35:55 +0000" rowspan="38">b07878e5 R |
544 | |
545 | /* Ack */ | |
546 | ks8842_write16(adapter, 18, isr, REG_ISR); | |
547 | ||
548 | if (!netif_running(netdev)) | |
549 | return; | |
550 | ||
551 | if (isr & IRQ_LINK_CHANGE) | |
552 | ks8842_update_link_status(netdev, adapter); | |
553 | ||
554 | if (isr & (IRQ_RX | IRQ_RX_ERROR)) | |
555 | ks8842_handle_rx(netdev, adapter); | |
556 | ||
557 | if (isr & IRQ_TX) | |
558 | ks8842_handle_tx(netdev, adapter); | |
559 | ||
560 | if (isr & IRQ_RX_OVERRUN) | |
561 | ks8842_handle_rx_overrun(netdev, adapter); | |
562 | ||
563 | if (isr & IRQ_TX_STOPPED) { | |
564 | ks8842_disable_tx(adapter); | |
565 | ks8842_enable_tx(adapter); | |
566 | } | |
567 | ||
568 | if (isr & IRQ_RX_STOPPED) { | |
569 | ks8842_disable_rx(adapter); | |
570 | ks8842_enable_rx(adapter); | |
571 | } | |
572 | ||
573 | /* re-enable interrupts, put back the bank selection register */ | |
574 | spin_lock_irqsave(&adapter->lock, flags); | |
575 | ks8842_write16(adapter, 18, ENABLED_IRQS, REG_IER); | |
576 | iowrite16(entry_bank, adapter->hw_addr + REG_SELECT_BANK); | |
577 | spin_unlock_irqrestore(&adapter->lock, flags); | |
578 | } | |
579 | ||
580 | static irqreturn_t ks8842_irq(int irq, void *devid) | |
581 | { | |
a99db196 RR |
582 | struct net_device *netdev = devid; |
583 | struct ks8842_adapter *adapter = netdev_priv(netdev); | |
\9aöjfors, 2009-06-04 03:35:55 +0000" rowspan="5">b07878e5 R |
584 | u16 isr; |
585 | u16 entry_bank = ioread16(adapter->hw_addr + REG_SELECT_BANK); | |
586 | irqreturn_t ret = IRQ_NONE; | |
587 | ||
588 | isr = ks8842_read16(adapter, 18, REG_ISR); | |
a99db196 | 589 | netdev_dbg(netdev, "%s - ISR: 0x%x\n", __func__, isr); |
\9aöjfors, 2009-06-04 03:35:55 +0000" rowspan="24">b07878e5 R |
590 | |
591 | if (isr) { | |
592 | /* disable IRQ */ | |
593 | ks8842_write16(adapter, 18, 0x00, REG_IER); | |
594 | ||
595 | /* schedule tasklet */ | |
596 | tasklet_schedule(&adapter->tasklet); | |
597 | ||
598 | ret = IRQ_HANDLED; | |
599 | } | |
600 | ||
601 | iowrite16(entry_bank, adapter->hw_addr + REG_SELECT_BANK); | |
602 | ||
603 | return ret; | |
604 | } | |
605 | ||
606 | ||
607 | /* Netdevice operations */ | |
608 | ||
609 | static int ks8842_open(struct net_device *netdev) | |
610 | { | |
611 | struct ks8842_adapter *adapter = netdev_priv(netdev); | |
612 | int err; | |
613 | ||
a99db196 | 614 | netdev_dbg(netdev, "%s - entry\n", __func__); |
\9aöjfors, 2009-06-04 03:35:55 +0000" rowspan="4">b07878e5 R |
615 | |
616 | /* reset the HW */ | |
617 | ks8842_reset_hw(adapter); | |
618 | ||
a1aa8822 RR |
619 | ks8842_write_mac_addr(adapter, netdev->dev_addr); |
620 | ||
\9aöjfors, 2009-06-04 03:35:55 +0000" rowspan="3">b07878e5 R |
621 | ks8842_update_link_status(netdev, adapter); |
622 | ||
623 | err = request_irq(adapter->irq, ks8842_irq, IRQF_SHARED, DRV_NAME, | |
a99db196 | 624 | netdev); |
\9aöjfors, 2009-06-04 03:35:55 +0000">b07878e5 | 625 | if (err) { |
0dc7d2b3 | 626 | pr_err("Failed to request IRQ: %d: %d\n", adapter->irq, err); |
\9aöjfors, 2009-06-04 03:35:55 +0000" rowspan="10">b07878e5 R |
627 | return err; |
628 | } | |
629 | ||
630 | return 0; | |
631 | } | |
632 | ||
633 | static int ks8842_close(struct net_device *netdev) | |
634 | { | |
635 | struct ks8842_adapter *adapter = netdev_priv(netdev); | |
636 | ||
a99db196 | 637 | netdev_dbg(netdev, "%s - entry\n", __func__); |
\9aöjfors, 2009-06-04 03:35:55 +0000">b07878e5 | 638 | |
cc88e450 RR |
639 | cancel_work_sync(&adapter->timeout_work); |
640 | ||
\9aöjfors, 2009-06-04 03:35:55 +0000">b07878e5 | 641 | /* free the irq */ |
a99db196 | 642 | free_irq(adapter->irq, netdev); |
\9aöjfors, 2009-06-04 03:35:55 +0000" rowspan="7">b07878e5 R |
643 | |
644 | /* disable the switch */ | |
645 | ks8842_write16(adapter, 32, 0x0, REG_SW_ID_AND_ENABLE); | |
646 | ||
647 | return 0; | |
648 | } | |
649 | ||
61357325 SH |
650 | static netdev_tx_t ks8842_xmit_frame(struct sk_buff *skb, |
651 | struct net_device *netdev) | |
\9aöjfors, 2009-06-04 03:35:55 +0000" rowspan="4">b07878e5 R |
652 | { |
653 | int ret; | |
654 | struct ks8842_adapter *adapter = netdev_priv(netdev); | |
655 | ||
a99db196 | 656 | netdev_dbg(netdev, "%s: entry\n", __func__); |
\9aöjfors, 2009-06-04 03:35:55 +0000" rowspan="12">b07878e5 R |
657 | |
658 | ret = ks8842_tx_frame(skb, netdev); | |
659 | ||
660 | if (ks8842_tx_fifo_space(adapter) < netdev->mtu + 8) | |
661 | netif_stop_queue(netdev); | |
662 | ||
663 | return ret; | |
664 | } | |
665 | ||
666 | static int ks8842_set_mac(struct net_device *netdev, void *p) | |
667 | { | |
668 | struct ks8842_adapter *adapter = netdev_priv(netdev); | |
\9aöjfors, 2009-06-04 03:35:55 +0000" rowspan="2">b07878e5 R |
669 | struct sockaddr *addr = p; |
670 | char *mac = (u8 *)addr->sa_data; | |
\9aöjfors, 2009-06-04 03:35:55 +0000">b07878e5 | 671 | |
a99db196 | 672 | netdev_dbg(netdev, "%s: entry\n", __func__); |
\9aöjfors, 2009-06-04 03:35:55 +0000" rowspan="6">b07878e5 R |
673 | |
674 | if (!is_valid_ether_addr(addr->sa_data)) | |
675 | return -EADDRNOTAVAIL; | |
676 | ||
677 | memcpy(netdev->dev_addr, mac, netdev->addr_len); | |
678 | ||
a1aa8822 | 679 | ks8842_write_mac_addr(adapter, mac); |
\9aöjfors, 2009-06-04 03:35:55 +0000" rowspan="3">b07878e5 R |
680 | return 0; |
681 | } | |
682 | ||
cc88e450 | 683 | static void ks8842_tx_timeout_work(struct work_struct *work) |
\9aöjfors, 2009-06-04 03:35:55 +0000">b07878e5 | 684 | { |
cc88e450 RR |
685 | struct ks8842_adapter *adapter = |
686 | container_of(work, struct ks8842_adapter, timeout_work); | |
687 | struct net_device *netdev = adapter->netdev; | |
\9aöjfors, 2009-06-04 03:35:55 +0000" rowspan="2">b07878e5 R |
688 | unsigned long flags; |
689 | ||
a99db196 | 690 | netdev_dbg(netdev, "%s: entry\n", __func__); |
\9aöjfors, 2009-06-04 03:35:55 +0000" rowspan="5">b07878e5 R |
691 | |
692 | spin_lock_irqsave(&adapter->lock, flags); | |
693 | /* disable interrupts */ | |
694 | ks8842_write16(adapter, 18, 0, REG_IER); | |
695 | ks8842_write16(adapter, 18, 0xFFFF, REG_ISR); | |
cc88e450 RR |
696 | |
697 | netif_stop_queue(netdev); | |
698 | ||
\9aöjfors, 2009-06-04 03:35:55 +0000" rowspan="4">b07878e5 R |
699 | spin_unlock_irqrestore(&adapter->lock, flags); |
700 | ||
701 | ks8842_reset_hw(adapter); | |
702 | ||
a1aa8822 RR |
703 | ks8842_write_mac_addr(adapter, netdev->dev_addr); |
704 | ||
\9aöjfors, 2009-06-04 03:35:55 +0000" rowspan="3">b07878e5 R |
705 | ks8842_update_link_status(netdev, adapter); |
706 | } | |
707 | ||
cc88e450 RR |
708 | static void ks8842_tx_timeout(struct net_device *netdev) |
709 | { | |
710 | struct ks8842_adapter *adapter = netdev_priv(netdev); | |
711 | ||
712 | netdev_dbg(netdev, "%s: entry\n", __func__); | |
713 | ||
714 | schedule_work(&adapter->timeout_work); | |
715 | } | |
716 | ||
\9aöjfors, 2009-06-04 03:35:55 +0000" rowspan="9">b07878e5 R |
717 | static const struct net_device_ops ks8842_netdev_ops = { |
718 | .ndo_open = ks8842_open, | |
719 | .ndo_stop = ks8842_close, | |
720 | .ndo_start_xmit = ks8842_xmit_frame, | |
721 | .ndo_set_mac_address = ks8842_set_mac, | |
722 | .ndo_tx_timeout = ks8842_tx_timeout, | |
723 | .ndo_validate_addr = eth_validate_addr | |
724 | }; | |
725 | ||
0fc0b732 | 726 | static const struct ethtool_ops ks8842_ethtool_ops = { |
\9aöjfors, 2009-06-04 03:35:55 +0000" rowspan="9">b07878e5 R |
727 | .get_link = ethtool_op_get_link, |
728 | }; | |
729 | ||
730 | static int __devinit ks8842_probe(struct platform_device *pdev) | |
731 | { | |
732 | int err = -ENOMEM; | |
733 | struct resource *iomem; | |
734 | struct net_device *netdev; | |
735 | struct ks8842_adapter *adapter; | |
a1aa8822 | 736 | struct ks8842_platform_data *pdata = pdev->dev.platform_data; |
\9aöjfors, 2009-06-04 03:35:55 +0000">b07878e5 | 737 | u16 id; |
a1aa8822 | 738 | unsigned i; |
\9aöjfors, 2009-06-04 03:35:55 +0000" rowspan="12">b07878e5 R |
739 | |
740 | iomem = platform_get_resource(pdev, IORESOURCE_MEM, 0); | |
741 | if (!request_mem_region(iomem->start, resource_size(iomem), DRV_NAME)) | |
742 | goto err_mem_region; | |
743 | ||
744 | netdev = alloc_etherdev(sizeof(struct ks8842_adapter)); | |
745 | if (!netdev) | |
746 | goto err_alloc_etherdev; | |
747 | ||
748 | SET_NETDEV_DEV(netdev, &pdev->dev); | |
749 | ||
750 | adapter = netdev_priv(netdev); | |
cc88e450 RR |
751 | adapter->netdev = netdev; |
752 | INIT_WORK(&adapter->timeout_work, ks8842_tx_timeout_work); | |
\9aöjfors, 2009-06-04 03:35:55 +0000">b07878e5 | 753 | adapter->hw_addr = ioremap(iomem->start, resource_size(iomem)); |
28bd620c DC |
754 | adapter->conf_flags = iomem->flags; |
755 | ||
\9aöjfors, 2009-06-04 03:35:55 +0000" rowspan="9">b07878e5 R |
756 | if (!adapter->hw_addr) |
757 | goto err_ioremap; | |
758 | ||
759 | adapter->irq = platform_get_irq(pdev, 0); | |
760 | if (adapter->irq < 0) { | |
761 | err = adapter->irq; | |
762 | goto err_get_irq; | |
763 | } | |
764 | ||
\9aöjfors, 2009-06-04 03:35:55 +0000" rowspan="6">b07878e5 R |
765 | tasklet_init(&adapter->tasklet, ks8842_tasklet, (unsigned long)netdev); |
766 | spin_lock_init(&adapter->lock); | |
767 | ||
768 | netdev->netdev_ops = &ks8842_netdev_ops; | |
769 | netdev->ethtool_ops = &ks8842_ethtool_ops; | |
770 | ||
a1aa8822 RR |
771 | /* Check if a mac address was given */ |
772 | i = netdev->addr_len; | |
773 | if (pdata) { | |
774 | for (i = 0; i < netdev->addr_len; i++) | |
775 | if (pdata->macaddr[i] != 0) | |
776 | break; | |
777 | ||
778 | if (i < netdev->addr_len) | |
779 | /* an address was passed, use it */ | |
780 | memcpy(netdev->dev_addr, pdata->macaddr, | |
781 | netdev->addr_len); | |
782 | } | |
783 | ||
784 | if (i == netdev->addr_len) { | |
785 | ks8842_read_mac_addr(adapter, netdev->dev_addr); | |
786 | ||
787 | if (!is_valid_ether_addr(netdev->dev_addr)) | |
788 | random_ether_addr(netdev->dev_addr); | |
789 | } | |
\9aöjfors, 2009-06-04 03:35:55 +0000" rowspan="10">b07878e5 R |
790 | |
791 | id = ks8842_read16(adapter, 32, REG_SW_ID_AND_ENABLE); | |
792 | ||
793 | strcpy(netdev->name, "eth%d"); | |
794 | err = register_netdev(netdev); | |
795 | if (err) | |
796 | goto err_register; | |
797 | ||
798 | platform_set_drvdata(pdev, netdev); | |
799 | ||
0dc7d2b3 | 800 | pr_info("Found chip, family: 0x%x, id: 0x%x, rev: 0x%x\n", |
\9aöjfors, 2009-06-04 03:35:55 +0000" rowspan="58">b07878e5 R |
801 | (id >> 8) & 0xff, (id >> 4) & 0xf, (id >> 1) & 0x7); |
802 | ||
803 | return 0; | |
804 | ||
805 | err_register: | |
806 | err_get_irq: | |
807 | iounmap(adapter->hw_addr); | |
808 | err_ioremap: | |
809 | free_netdev(netdev); | |
810 | err_alloc_etherdev: | |
811 | release_mem_region(iomem->start, resource_size(iomem)); | |
812 | err_mem_region: | |
813 | return err; | |
814 | } | |
815 | ||
816 | static int __devexit ks8842_remove(struct platform_device *pdev) | |
817 | { | |
818 | struct net_device *netdev = platform_get_drvdata(pdev); | |
819 | struct ks8842_adapter *adapter = netdev_priv(netdev); | |
820 | struct resource *iomem = platform_get_resource(pdev, IORESOURCE_MEM, 0); | |
821 | ||
822 | unregister_netdev(netdev); | |
823 | tasklet_kill(&adapter->tasklet); | |
824 | iounmap(adapter->hw_addr); | |
825 | free_netdev(netdev); | |
826 | release_mem_region(iomem->start, resource_size(iomem)); | |
827 | platform_set_drvdata(pdev, NULL); | |
828 | return 0; | |
829 | } | |
830 | ||
831 | ||
832 | static struct platform_driver ks8842_platform_driver = { | |
833 | .driver = { | |
834 | .name = DRV_NAME, | |
835 | .owner = THIS_MODULE, | |
836 | }, | |
837 | .probe = ks8842_probe, | |
838 | .remove = ks8842_remove, | |
839 | }; | |
840 | ||
841 | static int __init ks8842_init(void) | |
842 | { | |
843 | return platform_driver_register(&ks8842_platform_driver); | |
844 | } | |
845 | ||
846 | static void __exit ks8842_exit(void) | |
847 | { | |
848 | platform_driver_unregister(&ks8842_platform_driver); | |
849 | } | |
850 | ||
851 | module_init(ks8842_init); | |
852 | module_exit(ks8842_exit); | |
853 | ||
854 | MODULE_DESCRIPTION("Timberdale KS8842 ethernet driver"); | |
855 | MODULE_AUTHOR("Mocean Laboratories <info@mocean-labs.com>"); | |
856 | MODULE_LICENSE("GPL v2"); | |
857 | MODULE_ALIAS("platform:ks8842"); | |
858 |