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Merge branch 'v2.6.24-rc7-lockdep' of git://git.kernel.org/pub/scm/linux/kernel/git...
[linux-2.6-block.git] / drivers / net / ixgbe / ixgbe_main.c
CommitLineData
9a799d71
AK		 1/*******************************************************************************
2
3 Intel 10 Gigabit PCI Express Linux driver
4 Copyright(c) 1999 - 2007 Intel Corporation.
5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 more details.
14
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
22 Contact Information:
23 Linux NICS <linux.nics@intel.com>
24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27*******************************************************************************/
28
29#include <linux/types.h>
30#include <linux/module.h>
31#include <linux/pci.h>
32#include <linux/netdevice.h>
33#include <linux/vmalloc.h>
34#include <linux/string.h>
35#include <linux/in.h>
36#include <linux/ip.h>
37#include <linux/tcp.h>
38#include <linux/ipv6.h>
39#include <net/checksum.h>
40#include <net/ip6_checksum.h>
41#include <linux/ethtool.h>
42#include <linux/if_vlan.h>
43
44#include "ixgbe.h"
45#include "ixgbe_common.h"
46
47char ixgbe_driver_name[] = "ixgbe";
9c8eb720
SH		 48static const char ixgbe_driver_string[] =
49 "Intel(R) 10 Gigabit PCI Express Network Driver";
9a799d71
AK		 50
51#define DRV_VERSION "1.1.18"
9c8eb720
SH		 52const char ixgbe_driver_version[] = DRV_VERSION;
53static const char ixgbe_copyright[] =
54 "Copyright (c) 1999-2007 Intel Corporation.";
9a799d71
AK		 55
56static const struct ixgbe_info *ixgbe_info_tbl[] = {
57 [board_82598AF] = &ixgbe_82598AF_info,
58 [board_82598EB] = &ixgbe_82598EB_info,
59 [board_82598AT] = &ixgbe_82598AT_info,
60};
61
62/* ixgbe_pci_tbl - PCI Device ID Table
63 *
64 * Wildcard entries (PCI_ANY_ID) should come last
65 * Last entry must be all 0s
66 *
67 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
68 * Class, Class Mask, private data (not used) }
69 */
70static struct pci_device_id ixgbe_pci_tbl[] = {
71 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_DUAL_PORT),
72 board_82598AF },
73 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_SINGLE_PORT),
74 board_82598AF },
75 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AT_DUAL_PORT),
76 board_82598AT },
77 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_CX4),
78 board_82598EB },
79
80 /* required last entry */
81 {0, }
82};
83MODULE_DEVICE_TABLE(pci, ixgbe_pci_tbl);
84
85MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
86MODULE_DESCRIPTION("Intel(R) 10 Gigabit PCI Express Network Driver");
87MODULE_LICENSE("GPL");
88MODULE_VERSION(DRV_VERSION);
89
90#define DEFAULT_DEBUG_LEVEL_SHIFT 3
91
92
93#ifdef DEBUG
94/**
95 * ixgbe_get_hw_dev_name - return device name string
96 * used by hardware layer to print debugging information
97 **/
98char *ixgbe_get_hw_dev_name(struct ixgbe_hw *hw)
99{
100 struct ixgbe_adapter *adapter = hw->back;
101 struct net_device *netdev = adapter->netdev;
102 return netdev->name;
103}
104#endif
105
106static void ixgbe_set_ivar(struct ixgbe_adapter *adapter, u16 int_alloc_entry,
107 u8 msix_vector)
108{
109 u32 ivar, index;
110
111 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
112 index = (int_alloc_entry >> 2) & 0x1F;
113 ivar = IXGBE_READ_REG(&adapter->hw, IXGBE_IVAR(index));
114 ivar &= ~(0xFF << (8 * (int_alloc_entry & 0x3)));
115 ivar |= (msix_vector << (8 * (int_alloc_entry & 0x3)));
116 IXGBE_WRITE_REG(&adapter->hw, IXGBE_IVAR(index), ivar);
117}
118
119static void ixgbe_unmap_and_free_tx_resource(struct ixgbe_adapter *adapter,
120 struct ixgbe_tx_buffer
121 *tx_buffer_info)
122{
123 if (tx_buffer_info->dma) {
124 pci_unmap_page(adapter->pdev,
125 tx_buffer_info->dma,
126 tx_buffer_info->length, PCI_DMA_TODEVICE);
127 tx_buffer_info->dma = 0;
128 }
129 if (tx_buffer_info->skb) {
130 dev_kfree_skb_any(tx_buffer_info->skb);
131 tx_buffer_info->skb = NULL;
132 }
133 /* tx_buffer_info must be completely set up in the transmit path */
134}
135
136static inline bool ixgbe_check_tx_hang(struct ixgbe_adapter *adapter,
137 struct ixgbe_ring *tx_ring,
138 unsigned int eop,
139 union ixgbe_adv_tx_desc *eop_desc)
140{
141 /* Detect a transmit hang in hardware, this serializes the
142 * check with the clearing of time_stamp and movement of i */
143 adapter->detect_tx_hung = false;
144 if (tx_ring->tx_buffer_info[eop].dma &&
145 time_after(jiffies, tx_ring->tx_buffer_info[eop].time_stamp + HZ) &&
146 !(IXGBE_READ_REG(&adapter->hw, IXGBE_TFCS) & IXGBE_TFCS_TXOFF)) {
147 /* detected Tx unit hang */
148 DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n"
149 " TDH <%x>\n"
150 " TDT <%x>\n"
151 " next_to_use <%x>\n"
152 " next_to_clean <%x>\n"
153 "tx_buffer_info[next_to_clean]\n"
154 " time_stamp <%lx>\n"
155 " next_to_watch <%x>\n"
156 " jiffies <%lx>\n"
157 " next_to_watch.status <%x>\n",
158 readl(adapter->hw.hw_addr + tx_ring->head),
159 readl(adapter->hw.hw_addr + tx_ring->tail),
160 tx_ring->next_to_use,
161 tx_ring->next_to_clean,
162 tx_ring->tx_buffer_info[eop].time_stamp,
163 eop, jiffies, eop_desc->wb.status);
164 return true;
165 }
166
167 return false;
168}
169
170/**
171 * ixgbe_clean_tx_irq - Reclaim resources after transmit completes
172 * @adapter: board private structure
173 **/
174static bool ixgbe_clean_tx_irq(struct ixgbe_adapter *adapter,
175 struct ixgbe_ring *tx_ring)
176{
177 struct net_device *netdev = adapter->netdev;
178 union ixgbe_adv_tx_desc *tx_desc, *eop_desc;
179 struct ixgbe_tx_buffer *tx_buffer_info;
180 unsigned int i, eop;
181 bool cleaned = false;
182 int count = 0;
183
184 i = tx_ring->next_to_clean;
185 eop = tx_ring->tx_buffer_info[i].next_to_watch;
186 eop_desc = IXGBE_TX_DESC_ADV(*tx_ring, eop);
187 while (eop_desc->wb.status & cpu_to_le32(IXGBE_TXD_STAT_DD)) {
188 for (cleaned = false; !cleaned;) {
189 tx_desc = IXGBE_TX_DESC_ADV(*tx_ring, i);
190 tx_buffer_info = &tx_ring->tx_buffer_info[i];
191 cleaned = (i == eop);
192
193 tx_ring->stats.bytes += tx_buffer_info->length;
194 ixgbe_unmap_and_free_tx_resource(adapter,
195 tx_buffer_info);
196 tx_desc->wb.status = 0;
197
198 i++;
199 if (i == tx_ring->count)
200 i = 0;
201 }
202
203 tx_ring->stats.packets++;
204
205 eop = tx_ring->tx_buffer_info[i].next_to_watch;
206 eop_desc = IXGBE_TX_DESC_ADV(*tx_ring, eop);
207
208 /* weight of a sort for tx, avoid endless transmit cleanup */
209 if (count++ >= tx_ring->work_limit)
210 break;
211 }
212
213 tx_ring->next_to_clean = i;
214
215#define TX_WAKE_THRESHOLD 32
216 spin_lock(&tx_ring->tx_lock);
217
218 if (cleaned && netif_carrier_ok(netdev) &&
219 (IXGBE_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD) &&
220 !test_bit(__IXGBE_DOWN, &adapter->state))
221 netif_wake_queue(netdev);
222
223 spin_unlock(&tx_ring->tx_lock);
224
225 if (adapter->detect_tx_hung)
226 if (ixgbe_check_tx_hang(adapter, tx_ring, eop, eop_desc))
227 netif_stop_queue(netdev);
228
229 if (count >= tx_ring->work_limit)
230 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS, tx_ring->eims_value);
231
232 return cleaned;
233}
234
235/**
236 * ixgbe_receive_skb - Send a completed packet up the stack
237 * @adapter: board private structure
238 * @skb: packet to send up
239 * @is_vlan: packet has a VLAN tag
240 * @tag: VLAN tag from descriptor
241 **/
242static void ixgbe_receive_skb(struct ixgbe_adapter *adapter,
243 struct sk_buff *skb, bool is_vlan,
244 u16 tag)
245{
246 if (!(adapter->flags & IXGBE_FLAG_IN_NETPOLL)) {
247 if (adapter->vlgrp && is_vlan)
248 vlan_hwaccel_receive_skb(skb, adapter->vlgrp, tag);
249 else
250 netif_receive_skb(skb);
251 } else {
252
253 if (adapter->vlgrp && is_vlan)
254 vlan_hwaccel_rx(skb, adapter->vlgrp, tag);
255 else
256 netif_rx(skb);
257 }
258}
259
260static inline void ixgbe_rx_checksum(struct ixgbe_adapter *adapter,
261 u32 status_err,
262 struct sk_buff *skb)
263{
264 skb->ip_summed = CHECKSUM_NONE;
265
266 /* Ignore Checksum bit is set */
267 if ((status_err & IXGBE_RXD_STAT_IXSM) ||
268 !(adapter->flags & IXGBE_FLAG_RX_CSUM_ENABLED))
269 return;
270 /* TCP/UDP checksum error bit is set */
271 if (status_err & (IXGBE_RXDADV_ERR_TCPE | IXGBE_RXDADV_ERR_IPE)) {
272 /* let the stack verify checksum errors */
273 adapter->hw_csum_rx_error++;
274 return;
275 }
276 /* It must be a TCP or UDP packet with a valid checksum */
277 if (status_err & (IXGBE_RXD_STAT_L4CS | IXGBE_RXD_STAT_UDPCS))
278 skb->ip_summed = CHECKSUM_UNNECESSARY;
279 adapter->hw_csum_rx_good++;
280}
281
282/**
283 * ixgbe_alloc_rx_buffers - Replace used receive buffers; packet split
284 * @adapter: address of board private structure
285 **/
286static void ixgbe_alloc_rx_buffers(struct ixgbe_adapter *adapter,
287 struct ixgbe_ring *rx_ring,
288 int cleaned_count)
289{
290 struct net_device *netdev = adapter->netdev;
291 struct pci_dev *pdev = adapter->pdev;
292 union ixgbe_adv_rx_desc *rx_desc;
293 struct ixgbe_rx_buffer *rx_buffer_info;
294 struct sk_buff *skb;
295 unsigned int i;
296 unsigned int bufsz = adapter->rx_buf_len + NET_IP_ALIGN;
297
298 i = rx_ring->next_to_use;
299 rx_buffer_info = &rx_ring->rx_buffer_info[i];
300
301 while (cleaned_count--) {
302 rx_desc = IXGBE_RX_DESC_ADV(*rx_ring, i);
303
304 if (!rx_buffer_info->page &&
305 (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED)) {
306 rx_buffer_info->page = alloc_page(GFP_ATOMIC);
307 if (!rx_buffer_info->page) {
308 adapter->alloc_rx_page_failed++;
309 goto no_buffers;
310 }
311 rx_buffer_info->page_dma =
312 pci_map_page(pdev, rx_buffer_info->page,
313 0, PAGE_SIZE, PCI_DMA_FROMDEVICE);
314 }
315
316 if (!rx_buffer_info->skb) {
317 skb = netdev_alloc_skb(netdev, bufsz);
318
319 if (!skb) {
320 adapter->alloc_rx_buff_failed++;
321 goto no_buffers;
322 }
323
324 /*
325 * Make buffer alignment 2 beyond a 16 byte boundary
326 * this will result in a 16 byte aligned IP header after
327 * the 14 byte MAC header is removed
328 */
329 skb_reserve(skb, NET_IP_ALIGN);
330
331 rx_buffer_info->skb = skb;
332 rx_buffer_info->dma = pci_map_single(pdev, skb->data,
333 bufsz,
334 PCI_DMA_FROMDEVICE);
335 }
336 /* Refresh the desc even if buffer_addrs didn't change because
337 * each write-back erases this info. */
338 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
339 rx_desc->read.pkt_addr =
340 cpu_to_le64(rx_buffer_info->page_dma);
341 rx_desc->read.hdr_addr =
342 cpu_to_le64(rx_buffer_info->dma);
343 } else {
344 rx_desc->read.pkt_addr =
345 cpu_to_le64(rx_buffer_info->dma);
346 }
347
348 i++;
349 if (i == rx_ring->count)
350 i = 0;
351 rx_buffer_info = &rx_ring->rx_buffer_info[i];
352 }
353no_buffers:
354 if (rx_ring->next_to_use != i) {
355 rx_ring->next_to_use = i;
356 if (i-- == 0)
357 i = (rx_ring->count - 1);
358
359 /*
360 * Force memory writes to complete before letting h/w
361 * know there are new descriptors to fetch. (Only
362 * applicable for weak-ordered memory model archs,
363 * such as IA-64).
364 */
365 wmb();
366 writel(i, adapter->hw.hw_addr + rx_ring->tail);
367 }
368}
369
370static bool ixgbe_clean_rx_irq(struct ixgbe_adapter *adapter,
371 struct ixgbe_ring *rx_ring,
372 int *work_done, int work_to_do)
373{
374 struct net_device *netdev = adapter->netdev;
375 struct pci_dev *pdev = adapter->pdev;
376 union ixgbe_adv_rx_desc *rx_desc, *next_rxd;
377 struct ixgbe_rx_buffer *rx_buffer_info, *next_buffer;
378 struct sk_buff *skb;
379 unsigned int i;
380 u32 upper_len, len, staterr;
381 u16 hdr_info, vlan_tag;
382 bool is_vlan, cleaned = false;
383 int cleaned_count = 0;
384
385 i = rx_ring->next_to_clean;
386 upper_len = 0;
387 rx_desc = IXGBE_RX_DESC_ADV(*rx_ring, i);
388 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
389 rx_buffer_info = &rx_ring->rx_buffer_info[i];
390 is_vlan = (staterr & IXGBE_RXD_STAT_VP);
391 vlan_tag = le16_to_cpu(rx_desc->wb.upper.vlan);
392
393 while (staterr & IXGBE_RXD_STAT_DD) {
394 if (*work_done >= work_to_do)
395 break;
396 (*work_done)++;
397
398 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
399 hdr_info =
400 le16_to_cpu(rx_desc->wb.lower.lo_dword.hdr_info);
401 len =
402 ((hdr_info & IXGBE_RXDADV_HDRBUFLEN_MASK) >>
403 IXGBE_RXDADV_HDRBUFLEN_SHIFT);
404 if (hdr_info & IXGBE_RXDADV_SPH)
405 adapter->rx_hdr_split++;
406 if (len > IXGBE_RX_HDR_SIZE)
407 len = IXGBE_RX_HDR_SIZE;
408 upper_len = le16_to_cpu(rx_desc->wb.upper.length);
409 } else
410 len = le16_to_cpu(rx_desc->wb.upper.length);
411
412 cleaned = true;
413 skb = rx_buffer_info->skb;
414 prefetch(skb->data - NET_IP_ALIGN);
415 rx_buffer_info->skb = NULL;
416
417 if (len && !skb_shinfo(skb)->nr_frags) {
418 pci_unmap_single(pdev, rx_buffer_info->dma,
419 adapter->rx_buf_len + NET_IP_ALIGN,
420 PCI_DMA_FROMDEVICE);
421 skb_put(skb, len);
422 }
423
424 if (upper_len) {
425 pci_unmap_page(pdev, rx_buffer_info->page_dma,
426 PAGE_SIZE, PCI_DMA_FROMDEVICE);
427 rx_buffer_info->page_dma = 0;
428 skb_fill_page_desc(skb, skb_shinfo(skb)->nr_frags,
429 rx_buffer_info->page, 0, upper_len);
430 rx_buffer_info->page = NULL;
431
432 skb->len += upper_len;
433 skb->data_len += upper_len;
434 skb->truesize += upper_len;
435 }
436
437 i++;
438 if (i == rx_ring->count)
439 i = 0;
440 next_buffer = &rx_ring->rx_buffer_info[i];
441
442 next_rxd = IXGBE_RX_DESC_ADV(*rx_ring, i);
443 prefetch(next_rxd);
444
445 cleaned_count++;
446 if (staterr & IXGBE_RXD_STAT_EOP) {
447 rx_ring->stats.packets++;
448 rx_ring->stats.bytes += skb->len;
449 } else {
450 rx_buffer_info->skb = next_buffer->skb;
451 rx_buffer_info->dma = next_buffer->dma;
452 next_buffer->skb = skb;
453 adapter->non_eop_descs++;
454 goto next_desc;
455 }
456
457 if (staterr & IXGBE_RXDADV_ERR_FRAME_ERR_MASK) {
458 dev_kfree_skb_irq(skb);
459 goto next_desc;
460 }
461
462 ixgbe_rx_checksum(adapter, staterr, skb);
463 skb->protocol = eth_type_trans(skb, netdev);
464 ixgbe_receive_skb(adapter, skb, is_vlan, vlan_tag);
465 netdev->last_rx = jiffies;
466
467next_desc:
468 rx_desc->wb.upper.status_error = 0;
469
470 /* return some buffers to hardware, one at a time is too slow */
471 if (cleaned_count >= IXGBE_RX_BUFFER_WRITE) {
472 ixgbe_alloc_rx_buffers(adapter, rx_ring, cleaned_count);
473 cleaned_count = 0;
474 }
475
476 /* use prefetched values */
477 rx_desc = next_rxd;
478 rx_buffer_info = next_buffer;
479
480 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
481 is_vlan = (staterr & IXGBE_RXD_STAT_VP);
482 vlan_tag = le16_to_cpu(rx_desc->wb.upper.vlan);
483 }
484
485 rx_ring->next_to_clean = i;
486 cleaned_count = IXGBE_DESC_UNUSED(rx_ring);
487
488 if (cleaned_count)
489 ixgbe_alloc_rx_buffers(adapter, rx_ring, cleaned_count);
490
491 return cleaned;
492}
493
494#define IXGBE_MAX_INTR 10
495/**
496 * ixgbe_configure_msix - Configure MSI-X hardware
497 * @adapter: board private structure
498 *
499 * ixgbe_configure_msix sets up the hardware to properly generate MSI-X
500 * interrupts.
501 **/
502static void ixgbe_configure_msix(struct ixgbe_adapter *adapter)
503{
504 int i, vector = 0;
505
506 for (i = 0; i < adapter->num_tx_queues; i++) {
507 ixgbe_set_ivar(adapter, IXGBE_IVAR_TX_QUEUE(i),
508 IXGBE_MSIX_VECTOR(vector));
509 writel(EITR_INTS_PER_SEC_TO_REG(adapter->tx_eitr),
510 adapter->hw.hw_addr + adapter->tx_ring[i].itr_register);
511 vector++;
512 }
513
514 for (i = 0; i < adapter->num_rx_queues; i++) {
515 ixgbe_set_ivar(adapter, IXGBE_IVAR_RX_QUEUE(i),
516 IXGBE_MSIX_VECTOR(vector));
517 writel(EITR_INTS_PER_SEC_TO_REG(adapter->rx_eitr),
518 adapter->hw.hw_addr + adapter->rx_ring[i].itr_register);
519 vector++;
520 }
521
522 vector = adapter->num_tx_queues + adapter->num_rx_queues;
523 ixgbe_set_ivar(adapter, IXGBE_IVAR_OTHER_CAUSES_INDEX,
524 IXGBE_MSIX_VECTOR(vector));
525 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITR(vector), 1950);
526}
527
528static irqreturn_t ixgbe_msix_lsc(int irq, void *data)
529{
530 struct net_device *netdev = data;
531 struct ixgbe_adapter *adapter = netdev_priv(netdev);
532 struct ixgbe_hw *hw = &adapter->hw;
533 u32 eicr = IXGBE_READ_REG(hw, IXGBE_EICR);
534
535 if (eicr & IXGBE_EICR_LSC) {
536 adapter->lsc_int++;
537 if (!test_bit(__IXGBE_DOWN, &adapter->state))
538 mod_timer(&adapter->watchdog_timer, jiffies);
539 }
540 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, IXGBE_EIMS_OTHER);
541
542 return IRQ_HANDLED;
543}
544
545static irqreturn_t ixgbe_msix_clean_tx(int irq, void *data)
546{
547 struct ixgbe_ring *txr = data;
548 struct ixgbe_adapter *adapter = txr->adapter;
549
550 ixgbe_clean_tx_irq(adapter, txr);
551
552 return IRQ_HANDLED;
553}
554
555static irqreturn_t ixgbe_msix_clean_rx(int irq, void *data)
556{
557 struct ixgbe_ring *rxr = data;
558 struct ixgbe_adapter *adapter = rxr->adapter;
559
560 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, rxr->eims_value);
561 netif_rx_schedule(adapter->netdev, &adapter->napi);
562 return IRQ_HANDLED;
563}
564
565static int ixgbe_clean_rxonly(struct napi_struct *napi, int budget)
566{
567 struct ixgbe_adapter *adapter = container_of(napi,
568 struct ixgbe_adapter, napi);
569 struct net_device *netdev = adapter->netdev;
570 int work_done = 0;
571 struct ixgbe_ring *rxr = adapter->rx_ring;
572
573 /* Keep link state information with original netdev */
574 if (!netif_carrier_ok(netdev))
575 goto quit_polling;
576
577 ixgbe_clean_rx_irq(adapter, rxr, &work_done, budget);
578
579 /* If no Tx and not enough Rx work done, exit the polling mode */
580 if ((work_done < budget) || !netif_running(netdev)) {
581quit_polling:
582 netif_rx_complete(netdev, napi);
583 if (!test_bit(__IXGBE_DOWN, &adapter->state))
584 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS,
585 rxr->eims_value);
586 }
587
588 return work_done;
589}
590
591/**
592 * ixgbe_setup_msix - Initialize MSI-X interrupts
593 *
594 * ixgbe_setup_msix allocates MSI-X vectors and requests
595 * interrutps from the kernel.
596 **/
597static int ixgbe_setup_msix(struct ixgbe_adapter *adapter)
598{
599 struct net_device *netdev = adapter->netdev;
600 int i, int_vector = 0, err = 0;
601 int max_msix_count;
602
603 /* +1 for the LSC interrupt */
604 max_msix_count = adapter->num_rx_queues + adapter->num_tx_queues + 1;
605 adapter->msix_entries = kcalloc(max_msix_count,
606 sizeof(struct msix_entry), GFP_KERNEL);
607 if (!adapter->msix_entries)
608 return -ENOMEM;
609
610 for (i = 0; i < max_msix_count; i++)
611 adapter->msix_entries[i].entry = i;
612
613 err = pci_enable_msix(adapter->pdev, adapter->msix_entries,
614 max_msix_count);
615 if (err)
616 goto out;
617
618 for (i = 0; i < adapter->num_tx_queues; i++) {
619 sprintf(adapter->tx_ring[i].name, "%s-tx%d", netdev->name, i);
620 err = request_irq(adapter->msix_entries[int_vector].vector,
621 &ixgbe_msix_clean_tx,
622 0,
623 adapter->tx_ring[i].name,
624 &(adapter->tx_ring[i]));
625 if (err) {
626 DPRINTK(PROBE, ERR,
627 "request_irq failed for MSIX interrupt "
628 "Error: %d\n", err);
629 goto release_irqs;
630 }
631 adapter->tx_ring[i].eims_value =
632 (1 << IXGBE_MSIX_VECTOR(int_vector));
633 adapter->tx_ring[i].itr_register = IXGBE_EITR(int_vector);
634 int_vector++;
635 }
636
637 for (i = 0; i < adapter->num_rx_queues; i++) {
638 if (strlen(netdev->name) < (IFNAMSIZ - 5))
639 sprintf(adapter->rx_ring[i].name,
640 "%s-rx%d", netdev->name, i);
641 else
642 memcpy(adapter->rx_ring[i].name,
643 netdev->name, IFNAMSIZ);
644 err = request_irq(adapter->msix_entries[int_vector].vector,
645 &ixgbe_msix_clean_rx, 0,
646 adapter->rx_ring[i].name,
647 &(adapter->rx_ring[i]));
648 if (err) {
649 DPRINTK(PROBE, ERR,
650 "request_irq failed for MSIX interrupt "
651 "Error: %d\n", err);
652 goto release_irqs;
653 }
654
655 adapter->rx_ring[i].eims_value =
656 (1 << IXGBE_MSIX_VECTOR(int_vector));
657 adapter->rx_ring[i].itr_register = IXGBE_EITR(int_vector);
658 int_vector++;
659 }
660
661 sprintf(adapter->lsc_name, "%s-lsc", netdev->name);
662 err = request_irq(adapter->msix_entries[int_vector].vector,
663 &ixgbe_msix_lsc, 0, adapter->lsc_name, netdev);
664 if (err) {
665 DPRINTK(PROBE, ERR,
666 "request_irq for msix_lsc failed: %d\n", err);
667 goto release_irqs;
668 }
669
670 /* FIXME: implement netif_napi_remove() instead */
671 adapter->napi.poll = ixgbe_clean_rxonly;
672 adapter->flags |= IXGBE_FLAG_MSIX_ENABLED;
673 return 0;
674
675release_irqs:
676 int_vector--;
677 for (; int_vector >= adapter->num_tx_queues; int_vector--)
678 free_irq(adapter->msix_entries[int_vector].vector,
679 &(adapter->rx_ring[int_vector -
680 adapter->num_tx_queues]));
681
682 for (; int_vector >= 0; int_vector--)
683 free_irq(adapter->msix_entries[int_vector].vector,
684 &(adapter->tx_ring[int_vector]));
685out:
686 kfree(adapter->msix_entries);
687 adapter->msix_entries = NULL;
688 adapter->flags &= ~IXGBE_FLAG_MSIX_ENABLED;
689 return err;
690}
691
692/**
693 * ixgbe_intr - Interrupt Handler
694 * @irq: interrupt number
695 * @data: pointer to a network interface device structure
696 * @pt_regs: CPU registers structure
697 **/
698static irqreturn_t ixgbe_intr(int irq, void *data)
699{
700 struct net_device *netdev = data;
701 struct ixgbe_adapter *adapter = netdev_priv(netdev);
702 struct ixgbe_hw *hw = &adapter->hw;
703 u32 eicr;
704
705 eicr = IXGBE_READ_REG(hw, IXGBE_EICR);
706
707 if (!eicr)
708 return IRQ_NONE; /* Not our interrupt */
709
710 if (eicr & IXGBE_EICR_LSC) {
711 adapter->lsc_int++;
712 if (!test_bit(__IXGBE_DOWN, &adapter->state))
713 mod_timer(&adapter->watchdog_timer, jiffies);
714 }
715 if (netif_rx_schedule_prep(netdev, &adapter->napi)) {
716 /* Disable interrupts and register for poll. The flush of the
717 * posted write is intentionally left out. */
718 atomic_inc(&adapter->irq_sem);
719 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, ~0);
720 __netif_rx_schedule(netdev, &adapter->napi);
721 }
722
723 return IRQ_HANDLED;
724}
725
726/**
727 * ixgbe_request_irq - initialize interrupts
728 * @adapter: board private structure
729 *
730 * Attempts to configure interrupts using the best available
731 * capabilities of the hardware and kernel.
732 **/
733static int ixgbe_request_irq(struct ixgbe_adapter *adapter, u32 *num_rx_queues)
734{
735 struct net_device *netdev = adapter->netdev;
736 int flags, err;
737 irqreturn_t(*handler) (int, void *) = &ixgbe_intr;
738
739 flags = IRQF_SHARED;
740
741 err = ixgbe_setup_msix(adapter);
742 if (!err)
743 goto request_done;
744
745 /*
746 * if we can't do MSI-X, fall through and try MSI
747 * No need to reallocate memory since we're decreasing the number of
748 * queues. We just won't use the other ones, also it is freed correctly
749 * on ixgbe_remove.
750 */
751 *num_rx_queues = 1;
752
753 /* do MSI */
754 err = pci_enable_msi(adapter->pdev);
755 if (!err) {
756 adapter->flags |= IXGBE_FLAG_MSI_ENABLED;
757 flags &= ~IRQF_SHARED;
758 handler = &ixgbe_intr;
759 }
760
761 err = request_irq(adapter->pdev->irq, handler, flags,
762 netdev->name, netdev);
763 if (err)
764 DPRINTK(PROBE, ERR, "request_irq failed, Error %d\n", err);
765
766request_done:
767 return err;
768}
769
770static void ixgbe_free_irq(struct ixgbe_adapter *adapter)
771{
772 struct net_device *netdev = adapter->netdev;
773
774 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
775 int i;
776
777 for (i = 0; i < adapter->num_tx_queues; i++)
778 free_irq(adapter->msix_entries[i].vector,
779 &(adapter->tx_ring[i]));
780 for (i = 0; i < adapter->num_rx_queues; i++)
781 free_irq(adapter->msix_entries[i +
782 adapter->num_tx_queues].vector,
783 &(adapter->rx_ring[i]));
784 i = adapter->num_rx_queues + adapter->num_tx_queues;
785 free_irq(adapter->msix_entries[i].vector, netdev);
786 pci_disable_msix(adapter->pdev);
787 kfree(adapter->msix_entries);
788 adapter->msix_entries = NULL;
789 adapter->flags &= ~IXGBE_FLAG_MSIX_ENABLED;
790 return;
791 }
792
793 free_irq(adapter->pdev->irq, netdev);
794 if (adapter->flags & IXGBE_FLAG_MSI_ENABLED) {
795 pci_disable_msi(adapter->pdev);
796 adapter->flags &= ~IXGBE_FLAG_MSI_ENABLED;
797 }
798}
799
800/**
801 * ixgbe_irq_disable - Mask off interrupt generation on the NIC
802 * @adapter: board private structure
803 **/
804static inline void ixgbe_irq_disable(struct ixgbe_adapter *adapter)
805{
806 atomic_inc(&adapter->irq_sem);
807 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, ~0);
808 IXGBE_WRITE_FLUSH(&adapter->hw);
809 synchronize_irq(adapter->pdev->irq);
810}
811
812/**
813 * ixgbe_irq_enable - Enable default interrupt generation settings
814 * @adapter: board private structure
815 **/
816static inline void ixgbe_irq_enable(struct ixgbe_adapter *adapter)
817{
818 if (atomic_dec_and_test(&adapter->irq_sem)) {
819 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
820 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIAC,
821 (IXGBE_EIMS_ENABLE_MASK &
822 ~(IXGBE_EIMS_OTHER | IXGBE_EIMS_LSC)));
823 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS,
824 IXGBE_EIMS_ENABLE_MASK);
825 IXGBE_WRITE_FLUSH(&adapter->hw);
826 }
827}
828
829/**
830 * ixgbe_configure_msi_and_legacy - Initialize PIN (INTA...) and MSI interrupts
831 *
832 **/
833static void ixgbe_configure_msi_and_legacy(struct ixgbe_adapter *adapter)
834{
835 int i;
836 struct ixgbe_hw *hw = &adapter->hw;
837
838 if (adapter->rx_eitr)
839 IXGBE_WRITE_REG(hw, IXGBE_EITR(0),
840 EITR_INTS_PER_SEC_TO_REG(adapter->rx_eitr));
841
842 /* for re-triggering the interrupt in non-NAPI mode */
843 adapter->rx_ring[0].eims_value = (1 << IXGBE_MSIX_VECTOR(0));
844 adapter->tx_ring[0].eims_value = (1 << IXGBE_MSIX_VECTOR(0));
845
846 ixgbe_set_ivar(adapter, IXGBE_IVAR_RX_QUEUE(0), 0);
847 for (i = 0; i < adapter->num_tx_queues; i++)
848 ixgbe_set_ivar(adapter, IXGBE_IVAR_TX_QUEUE(i), i);
849}
850
851/**
852 * ixgbe_configure_tx - Configure 8254x Transmit Unit after Reset
853 * @adapter: board private structure
854 *
855 * Configure the Tx unit of the MAC after a reset.
856 **/
857static void ixgbe_configure_tx(struct ixgbe_adapter *adapter)
858{
859 u64 tdba;
860 struct ixgbe_hw *hw = &adapter->hw;
861 u32 i, tdlen;
862
863 /* Setup the HW Tx Head and Tail descriptor pointers */
864 for (i = 0; i < adapter->num_tx_queues; i++) {
865 tdba = adapter->tx_ring[i].dma;
866 tdlen = adapter->tx_ring[i].count *
867 sizeof(union ixgbe_adv_tx_desc);
868 IXGBE_WRITE_REG(hw, IXGBE_TDBAL(i), (tdba & DMA_32BIT_MASK));
869 IXGBE_WRITE_REG(hw, IXGBE_TDBAH(i), (tdba >> 32));
870 IXGBE_WRITE_REG(hw, IXGBE_TDLEN(i), tdlen);
871 IXGBE_WRITE_REG(hw, IXGBE_TDH(i), 0);
872 IXGBE_WRITE_REG(hw, IXGBE_TDT(i), 0);
873 adapter->tx_ring[i].head = IXGBE_TDH(i);
874 adapter->tx_ring[i].tail = IXGBE_TDT(i);
875 }
876
877 IXGBE_WRITE_REG(hw, IXGBE_TIPG, IXGBE_TIPG_FIBER_DEFAULT);
878}
879
880#define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
881 (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
882
883#define IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT 2
884/**
885 * ixgbe_configure_rx - Configure 8254x Receive Unit after Reset
886 * @adapter: board private structure
887 *
888 * Configure the Rx unit of the MAC after a reset.
889 **/
890static void ixgbe_configure_rx(struct ixgbe_adapter *adapter)
891{
892 u64 rdba;
893 struct ixgbe_hw *hw = &adapter->hw;
894 struct net_device *netdev = adapter->netdev;
895 int max_frame = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
896 u32 rdlen, rxctrl, rxcsum;
897 u32 random[10];
898 u32 reta, mrqc;
899 int i;
900 u32 fctrl, hlreg0;
901 u32 srrctl;
902 u32 pages;
903
904 /* Decide whether to use packet split mode or not */
905 if (netdev->mtu > ETH_DATA_LEN)
906 adapter->flags |= IXGBE_FLAG_RX_PS_ENABLED;
907 else
908 adapter->flags &= ~IXGBE_FLAG_RX_PS_ENABLED;
909
910 /* Set the RX buffer length according to the mode */
911 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
912 adapter->rx_buf_len = IXGBE_RX_HDR_SIZE;
913 } else {
914 if (netdev->mtu <= ETH_DATA_LEN)
915 adapter->rx_buf_len = MAXIMUM_ETHERNET_VLAN_SIZE;
916 else
917 adapter->rx_buf_len = ALIGN(max_frame, 1024);
918 }
919
920 fctrl = IXGBE_READ_REG(&adapter->hw, IXGBE_FCTRL);
921 fctrl |= IXGBE_FCTRL_BAM;
922 IXGBE_WRITE_REG(&adapter->hw, IXGBE_FCTRL, fctrl);
923
924 hlreg0 = IXGBE_READ_REG(hw, IXGBE_HLREG0);
925 if (adapter->netdev->mtu <= ETH_DATA_LEN)
926 hlreg0 &= ~IXGBE_HLREG0_JUMBOEN;
927 else
928 hlreg0 |= IXGBE_HLREG0_JUMBOEN;
929 IXGBE_WRITE_REG(hw, IXGBE_HLREG0, hlreg0);
930
931 pages = PAGE_USE_COUNT(adapter->netdev->mtu);
932
933 srrctl = IXGBE_READ_REG(&adapter->hw, IXGBE_SRRCTL(0));
934 srrctl &= ~IXGBE_SRRCTL_BSIZEHDR_MASK;
935 srrctl &= ~IXGBE_SRRCTL_BSIZEPKT_MASK;
936
937 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
938 srrctl |= PAGE_SIZE >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
939 srrctl |= IXGBE_SRRCTL_DESCTYPE_HDR_SPLIT_ALWAYS;
940 srrctl |= ((IXGBE_RX_HDR_SIZE <<
941 IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT) &
942 IXGBE_SRRCTL_BSIZEHDR_MASK);
943 } else {
944 srrctl |= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF;
945
946 if (adapter->rx_buf_len == MAXIMUM_ETHERNET_VLAN_SIZE)
947 srrctl |=
948 IXGBE_RXBUFFER_2048 >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
949 else
950 srrctl |=
951 adapter->rx_buf_len >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
952 }
953 IXGBE_WRITE_REG(&adapter->hw, IXGBE_SRRCTL(0), srrctl);
954
955 rdlen = adapter->rx_ring[0].count * sizeof(union ixgbe_adv_rx_desc);
956 /* disable receives while setting up the descriptors */
957 rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
958 IXGBE_WRITE_REG(hw, IXGBE_RXCTRL, rxctrl & ~IXGBE_RXCTRL_RXEN);
959
960 /* Setup the HW Rx Head and Tail Descriptor Pointers and
961 * the Base and Length of the Rx Descriptor Ring */
962 for (i = 0; i < adapter->num_rx_queues; i++) {
963 rdba = adapter->rx_ring[i].dma;
964 IXGBE_WRITE_REG(hw, IXGBE_RDBAL(i), (rdba & DMA_32BIT_MASK));
965 IXGBE_WRITE_REG(hw, IXGBE_RDBAH(i), (rdba >> 32));
966 IXGBE_WRITE_REG(hw, IXGBE_RDLEN(i), rdlen);
967 IXGBE_WRITE_REG(hw, IXGBE_RDH(i), 0);
968 IXGBE_WRITE_REG(hw, IXGBE_RDT(i), 0);
969 adapter->rx_ring[i].head = IXGBE_RDH(i);
970 adapter->rx_ring[i].tail = IXGBE_RDT(i);
971 }
972
973 if (adapter->num_rx_queues > 1) {
974 /* Random 40bytes used as random key in RSS hash function */
975 get_random_bytes(&random[0], 40);
976
977 switch (adapter->num_rx_queues) {
978 case 8:
979 case 4:
980 /* Bits [3:0] in each byte refers the Rx queue no */
981 reta = 0x00010203;
982 break;
983 case 2:
984 reta = 0x00010001;
985 break;
986 default:
987 reta = 0x00000000;
988 break;
989 }
990
991 /* Fill out redirection table */
992 for (i = 0; i < 32; i++) {
993 IXGBE_WRITE_REG_ARRAY(hw, IXGBE_RETA(0), i, reta);
994 if (adapter->num_rx_queues > 4) {
995 i++;
996 IXGBE_WRITE_REG_ARRAY(hw, IXGBE_RETA(0), i,
997 0x04050607);
998 }
999 }
1000
1001 /* Fill out hash function seeds */
1002 for (i = 0; i < 10; i++)
1003 IXGBE_WRITE_REG_ARRAY(hw, IXGBE_RSSRK(0), i, random[i]);
1004
1005 mrqc = IXGBE_MRQC_RSSEN
1006 /* Perform hash on these packet types */
1007 | IXGBE_MRQC_RSS_FIELD_IPV4
1008 | IXGBE_MRQC_RSS_FIELD_IPV4_TCP
1009 | IXGBE_MRQC_RSS_FIELD_IPV4_UDP
1010 | IXGBE_MRQC_RSS_FIELD_IPV6_EX_TCP
1011 | IXGBE_MRQC_RSS_FIELD_IPV6_EX
1012 | IXGBE_MRQC_RSS_FIELD_IPV6
1013 | IXGBE_MRQC_RSS_FIELD_IPV6_TCP
1014 | IXGBE_MRQC_RSS_FIELD_IPV6_UDP
1015 | IXGBE_MRQC_RSS_FIELD_IPV6_EX_UDP;
1016 IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc);
1017
1018 /* Multiqueue and packet checksumming are mutually exclusive. */
1019 rxcsum = IXGBE_READ_REG(hw, IXGBE_RXCSUM);
1020 rxcsum |= IXGBE_RXCSUM_PCSD;
1021 IXGBE_WRITE_REG(hw, IXGBE_RXCSUM, rxcsum);
1022 } else {
1023 /* Enable Receive Checksum Offload for TCP and UDP */
1024 rxcsum = IXGBE_READ_REG(hw, IXGBE_RXCSUM);
1025 if (adapter->flags & IXGBE_FLAG_RX_CSUM_ENABLED) {
1026 /* Enable IPv4 payload checksum for UDP fragments
1027 * Must be used in conjunction with packet-split. */
1028 rxcsum |= IXGBE_RXCSUM_IPPCSE;
1029 } else {
1030 /* don't need to clear IPPCSE as it defaults to 0 */
1031 }
1032 IXGBE_WRITE_REG(hw, IXGBE_RXCSUM, rxcsum);
1033 }
1034 /* Enable Receives */
1035 IXGBE_WRITE_REG(hw, IXGBE_RXCTRL, rxctrl);
1036 rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
1037}
1038
1039static void ixgbe_vlan_rx_register(struct net_device *netdev,
1040 struct vlan_group *grp)
1041{
1042 struct ixgbe_adapter *adapter = netdev_priv(netdev);
1043 u32 ctrl;
1044
1045 ixgbe_irq_disable(adapter);
1046 adapter->vlgrp = grp;
1047
1048 if (grp) {
1049 /* enable VLAN tag insert/strip */
1050 ctrl = IXGBE_READ_REG(&adapter->hw, IXGBE_VLNCTRL);
1051 ctrl |= IXGBE_VLNCTRL_VME | IXGBE_VLNCTRL_VFE;
1052 ctrl &= ~IXGBE_VLNCTRL_CFIEN;
1053 IXGBE_WRITE_REG(&adapter->hw, IXGBE_VLNCTRL, ctrl);
1054 }
1055
1056 ixgbe_irq_enable(adapter);
1057}
1058
1059static void ixgbe_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
1060{
1061 struct ixgbe_adapter *adapter = netdev_priv(netdev);
1062
1063 /* add VID to filter table */
1064 ixgbe_set_vfta(&adapter->hw, vid, 0, true);
1065}
1066
1067static void ixgbe_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
1068{
1069 struct ixgbe_adapter *adapter = netdev_priv(netdev);
1070
1071 ixgbe_irq_disable(adapter);
1072 vlan_group_set_device(adapter->vlgrp, vid, NULL);
1073 ixgbe_irq_enable(adapter);
1074
1075 /* remove VID from filter table */
1076 ixgbe_set_vfta(&adapter->hw, vid, 0, false);
1077}
1078
1079static void ixgbe_restore_vlan(struct ixgbe_adapter *adapter)
1080{
1081 ixgbe_vlan_rx_register(adapter->netdev, adapter->vlgrp);
1082
1083 if (adapter->vlgrp) {
1084 u16 vid;
1085 for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
1086 if (!vlan_group_get_device(adapter->vlgrp, vid))
1087 continue;
1088 ixgbe_vlan_rx_add_vid(adapter->netdev, vid);
1089 }
1090 }
1091}
1092
1093/**
1094 * ixgbe_set_multi - Multicast and Promiscuous mode set
1095 * @netdev: network interface device structure
1096 *
1097 * The set_multi entry point is called whenever the multicast address
1098 * list or the network interface flags are updated. This routine is
1099 * responsible for configuring the hardware for proper multicast,
1100 * promiscuous mode, and all-multi behavior.
1101 **/
1102static void ixgbe_set_multi(struct net_device *netdev)
1103{
1104 struct ixgbe_adapter *adapter = netdev_priv(netdev);
1105 struct ixgbe_hw *hw = &adapter->hw;
1106 struct dev_mc_list *mc_ptr;
1107 u8 *mta_list;
1108 u32 fctrl;
1109 int i;
1110
1111 /* Check for Promiscuous and All Multicast modes */
1112
1113 fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
1114
1115 if (netdev->flags & IFF_PROMISC) {
1116 fctrl |= (IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
1117 } else if (netdev->flags & IFF_ALLMULTI) {
1118 fctrl |= IXGBE_FCTRL_MPE;
1119 fctrl &= ~IXGBE_FCTRL_UPE;
1120 } else {
1121 fctrl &= ~(IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
1122 }
1123
1124 IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl);
1125
1126 if (netdev->mc_count) {
1127 mta_list = kcalloc(netdev->mc_count, ETH_ALEN, GFP_ATOMIC);
1128 if (!mta_list)
1129 return;
1130
1131 /* Shared function expects packed array of only addresses. */
1132 mc_ptr = netdev->mc_list;
1133
1134 for (i = 0; i < netdev->mc_count; i++) {
1135 if (!mc_ptr)
1136 break;
1137 memcpy(mta_list + (i * ETH_ALEN), mc_ptr->dmi_addr,
1138 ETH_ALEN);
1139 mc_ptr = mc_ptr->next;
1140 }
1141
1142 ixgbe_update_mc_addr_list(hw, mta_list, i, 0);
1143 kfree(mta_list);
1144 } else {
1145 ixgbe_update_mc_addr_list(hw, NULL, 0, 0);
1146 }
1147
1148}
1149
1150static void ixgbe_configure(struct ixgbe_adapter *adapter)
1151{
1152 struct net_device *netdev = adapter->netdev;
1153 int i;
1154
1155 ixgbe_set_multi(netdev);
1156
1157 ixgbe_restore_vlan(adapter);
1158
1159 ixgbe_configure_tx(adapter);
1160 ixgbe_configure_rx(adapter);
1161 for (i = 0; i < adapter->num_rx_queues; i++)
1162 ixgbe_alloc_rx_buffers(adapter, &adapter->rx_ring[i],
1163 (adapter->rx_ring[i].count - 1));
1164}
1165
1166static int ixgbe_up_complete(struct ixgbe_adapter *adapter)
1167{
1168 struct net_device *netdev = adapter->netdev;
1169 int i;
1170 u32 gpie = 0;
1171 struct ixgbe_hw *hw = &adapter->hw;
1172 u32 txdctl, rxdctl, mhadd;
1173 int max_frame = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
1174
1175 if (adapter->flags & (IXGBE_FLAG_MSIX_ENABLED |
1176 IXGBE_FLAG_MSI_ENABLED)) {
1177 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
1178 gpie = (IXGBE_GPIE_MSIX_MODE | IXGBE_GPIE_EIAME |
1179 IXGBE_GPIE_PBA_SUPPORT | IXGBE_GPIE_OCD);
1180 } else {
1181 /* MSI only */
1182 gpie = (IXGBE_GPIE_EIAME |
1183 IXGBE_GPIE_PBA_SUPPORT);
1184 }
1185 IXGBE_WRITE_REG(&adapter->hw, IXGBE_GPIE, gpie);
1186 gpie = IXGBE_READ_REG(&adapter->hw, IXGBE_GPIE);
1187 }
1188
1189 mhadd = IXGBE_READ_REG(hw, IXGBE_MHADD);
1190
1191 if (max_frame != (mhadd >> IXGBE_MHADD_MFS_SHIFT)) {
1192 mhadd &= ~IXGBE_MHADD_MFS_MASK;
1193 mhadd |= max_frame << IXGBE_MHADD_MFS_SHIFT;
1194
1195 IXGBE_WRITE_REG(hw, IXGBE_MHADD, mhadd);
1196 }
1197
1198 for (i = 0; i < adapter->num_tx_queues; i++) {
1199 txdctl = IXGBE_READ_REG(&adapter->hw, IXGBE_TXDCTL(i));
1200 txdctl |= IXGBE_TXDCTL_ENABLE;
1201 IXGBE_WRITE_REG(&adapter->hw, IXGBE_TXDCTL(i), txdctl);
1202 }
1203
1204 for (i = 0; i < adapter->num_rx_queues; i++) {
1205 rxdctl = IXGBE_READ_REG(&adapter->hw, IXGBE_RXDCTL(i));
1206 rxdctl |= IXGBE_RXDCTL_ENABLE;
1207 IXGBE_WRITE_REG(&adapter->hw, IXGBE_RXDCTL(i), rxdctl);
1208 }
1209 /* enable all receives */
1210 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
1211 rxdctl |= (IXGBE_RXCTRL_DMBYPS | IXGBE_RXCTRL_RXEN);
1212 IXGBE_WRITE_REG(hw, IXGBE_RXCTRL, rxdctl);
1213
1214 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
1215 ixgbe_configure_msix(adapter);
1216 else
1217 ixgbe_configure_msi_and_legacy(adapter);
1218
1219 clear_bit(__IXGBE_DOWN, &adapter->state);
1220 napi_enable(&adapter->napi);
1221 ixgbe_irq_enable(adapter);
1222
1223 /* bring the link up in the watchdog, this could race with our first
1224 * link up interrupt but shouldn't be a problem */
1225 mod_timer(&adapter->watchdog_timer, jiffies);
1226 return 0;
1227}
1228
1229int ixgbe_up(struct ixgbe_adapter *adapter)
1230{
1231 /* hardware has been reset, we need to reload some things */
1232 ixgbe_configure(adapter);
1233
1234 return ixgbe_up_complete(adapter);
1235}
1236
1237void ixgbe_reset(struct ixgbe_adapter *adapter)
1238{
1239 if (ixgbe_init_hw(&adapter->hw))
1240 DPRINTK(PROBE, ERR, "Hardware Error\n");
1241
1242 /* reprogram the RAR[0] in case user changed it. */
1243 ixgbe_set_rar(&adapter->hw, 0, adapter->hw.mac.addr, 0, IXGBE_RAH_AV);
1244
1245}
1246
1247#ifdef CONFIG_PM
1248static int ixgbe_resume(struct pci_dev *pdev)
1249{
1250 struct net_device *netdev = pci_get_drvdata(pdev);
1251 struct ixgbe_adapter *adapter = netdev_priv(netdev);
1252 u32 err, num_rx_queues = adapter->num_rx_queues;
1253
1254 pci_set_power_state(pdev, PCI_D0);
1255 pci_restore_state(pdev);
1256 err = pci_enable_device(pdev);
1257 if (err) {
1258 printk(KERN_ERR "ixgbe: Cannot enable PCI device from " \
1259 "suspend\n");
1260 return err;
1261 }
1262 pci_set_master(pdev);
1263
1264 pci_enable_wake(pdev, PCI_D3hot, 0);
1265 pci_enable_wake(pdev, PCI_D3cold, 0);
1266
1267 if (netif_running(netdev)) {
1268 err = ixgbe_request_irq(adapter, &num_rx_queues);
1269 if (err)
1270 return err;
1271 }
1272
1273 ixgbe_reset(adapter);
1274
1275 if (netif_running(netdev))
1276 ixgbe_up(adapter);
1277
1278 netif_device_attach(netdev);
1279
1280 return 0;
1281}
1282#endif
1283
1284/**
1285 * ixgbe_clean_rx_ring - Free Rx Buffers per Queue
1286 * @adapter: board private structure
1287 * @rx_ring: ring to free buffers from
1288 **/
1289static void ixgbe_clean_rx_ring(struct ixgbe_adapter *adapter,
1290 struct ixgbe_ring *rx_ring)
1291{
1292 struct pci_dev *pdev = adapter->pdev;
1293 unsigned long size;
1294 unsigned int i;
1295
1296 /* Free all the Rx ring sk_buffs */
1297
1298 for (i = 0; i < rx_ring->count; i++) {
1299 struct ixgbe_rx_buffer *rx_buffer_info;
1300
1301 rx_buffer_info = &rx_ring->rx_buffer_info[i];
1302 if (rx_buffer_info->dma) {
1303 pci_unmap_single(pdev, rx_buffer_info->dma,
1304 adapter->rx_buf_len,
1305 PCI_DMA_FROMDEVICE);
1306 rx_buffer_info->dma = 0;
1307 }
1308 if (rx_buffer_info->skb) {
1309 dev_kfree_skb(rx_buffer_info->skb);
1310 rx_buffer_info->skb = NULL;
1311 }
1312 if (!rx_buffer_info->page)
1313 continue;
1314 pci_unmap_page(pdev, rx_buffer_info->page_dma, PAGE_SIZE,
1315 PCI_DMA_FROMDEVICE);
1316 rx_buffer_info->page_dma = 0;
1317
1318 put_page(rx_buffer_info->page);
1319 rx_buffer_info->page = NULL;
1320 }
1321
1322 size = sizeof(struct ixgbe_rx_buffer) * rx_ring->count;
1323 memset(rx_ring->rx_buffer_info, 0, size);
1324
1325 /* Zero out the descriptor ring */
1326 memset(rx_ring->desc, 0, rx_ring->size);
1327
1328 rx_ring->next_to_clean = 0;
1329 rx_ring->next_to_use = 0;
1330
1331 writel(0, adapter->hw.hw_addr + rx_ring->head);
1332 writel(0, adapter->hw.hw_addr + rx_ring->tail);
1333}
1334
1335/**
1336 * ixgbe_clean_tx_ring - Free Tx Buffers
1337 * @adapter: board private structure
1338 * @tx_ring: ring to be cleaned
1339 **/
1340static void ixgbe_clean_tx_ring(struct ixgbe_adapter *adapter,
1341 struct ixgbe_ring *tx_ring)
1342{
1343 struct ixgbe_tx_buffer *tx_buffer_info;
1344 unsigned long size;
1345 unsigned int i;
1346
1347 /* Free all the Tx ring sk_buffs */
1348
1349 for (i = 0; i < tx_ring->count; i++) {
1350 tx_buffer_info = &tx_ring->tx_buffer_info[i];
1351 ixgbe_unmap_and_free_tx_resource(adapter, tx_buffer_info);
1352 }
1353
1354 size = sizeof(struct ixgbe_tx_buffer) * tx_ring->count;
1355 memset(tx_ring->tx_buffer_info, 0, size);
1356
1357 /* Zero out the descriptor ring */
1358 memset(tx_ring->desc, 0, tx_ring->size);
1359
1360 tx_ring->next_to_use = 0;
1361 tx_ring->next_to_clean = 0;
1362
1363 writel(0, adapter->hw.hw_addr + tx_ring->head);
1364 writel(0, adapter->hw.hw_addr + tx_ring->tail);
1365}
1366
1367/**
1368 * ixgbe_clean_all_tx_rings - Free Tx Buffers for all queues
1369 * @adapter: board private structure
1370 **/
1371static void ixgbe_clean_all_tx_rings(struct ixgbe_adapter *adapter)
1372{
1373 int i;
1374
1375 for (i = 0; i < adapter->num_tx_queues; i++)
1376 ixgbe_clean_tx_ring(adapter, &adapter->tx_ring[i]);
1377}
1378
1379/**
1380 * ixgbe_clean_all_rx_rings - Free Rx Buffers for all queues
1381 * @adapter: board private structure
1382 **/
1383static void ixgbe_clean_all_rx_rings(struct ixgbe_adapter *adapter)
1384{
1385 int i;
1386
1387 for (i = 0; i < adapter->num_rx_queues; i++)
1388 ixgbe_clean_rx_ring(adapter, &adapter->rx_ring[i]);
1389}
1390
1391void ixgbe_down(struct ixgbe_adapter *adapter)
1392{
1393 struct net_device *netdev = adapter->netdev;
1394 u32 rxctrl;
1395
1396 /* signal that we are down to the interrupt handler */
1397 set_bit(__IXGBE_DOWN, &adapter->state);
1398
1399 /* disable receives */
1400 rxctrl = IXGBE_READ_REG(&adapter->hw, IXGBE_RXCTRL);
1401 IXGBE_WRITE_REG(&adapter->hw, IXGBE_RXCTRL,
1402 rxctrl & ~IXGBE_RXCTRL_RXEN);
1403
1404 netif_tx_disable(netdev);
1405
1406 /* disable transmits in the hardware */
1407
1408 /* flush both disables */
1409 IXGBE_WRITE_FLUSH(&adapter->hw);
1410 msleep(10);
1411
1412 ixgbe_irq_disable(adapter);
1413
1414 napi_disable(&adapter->napi);
1415 del_timer_sync(&adapter->watchdog_timer);
1416
1417 netif_carrier_off(netdev);
1418 netif_stop_queue(netdev);
1419
1420 ixgbe_reset(adapter);
1421 ixgbe_clean_all_tx_rings(adapter);
1422 ixgbe_clean_all_rx_rings(adapter);
1423
1424}
1425
1426static int ixgbe_suspend(struct pci_dev *pdev, pm_message_t state)
1427{
1428 struct net_device *netdev = pci_get_drvdata(pdev);
1429 struct ixgbe_adapter *adapter = netdev_priv(netdev);
1430#ifdef CONFIG_PM
1431 int retval = 0;
1432#endif
1433
1434 netif_device_detach(netdev);
1435
1436 if (netif_running(netdev)) {
1437 ixgbe_down(adapter);
1438 ixgbe_free_irq(adapter);
1439 }
1440
1441#ifdef CONFIG_PM
1442 retval = pci_save_state(pdev);
1443 if (retval)
1444 return retval;
1445#endif
1446
1447 pci_enable_wake(pdev, PCI_D3hot, 0);
1448 pci_enable_wake(pdev, PCI_D3cold, 0);
1449
1450 pci_disable_device(pdev);
1451
1452 pci_set_power_state(pdev, pci_choose_state(pdev, state));
1453
1454 return 0;
1455}
1456
1457static void ixgbe_shutdown(struct pci_dev *pdev)
1458{
1459 ixgbe_suspend(pdev, PMSG_SUSPEND);
1460}
1461
1462/**
1463 * ixgbe_clean - NAPI Rx polling callback
1464 * @adapter: board private structure
1465 **/
1466static int ixgbe_clean(struct napi_struct *napi, int budget)
1467{
1468 struct ixgbe_adapter *adapter = container_of(napi,
1469 struct ixgbe_adapter, napi);
1470 struct net_device *netdev = adapter->netdev;
53e52c72 1471 int work_done = 0;
9a799d71 1472
9a799d71 1473 /* In non-MSIX case, there is no multi-Tx/Rx queue */
53e52c72 1474 ixgbe_clean_tx_irq(adapter, adapter->tx_ring);
9a799d71
AK		 1475 ixgbe_clean_rx_irq(adapter, &adapter->rx_ring[0], &work_done,
1476 budget);
1477
53e52c72
DM		 1478 /* If budget not fully consumed, exit the polling mode */
1479 if (work_done < budget) {
9a799d71
AK		 1480 netif_rx_complete(netdev, napi);
1481 ixgbe_irq_enable(adapter);
1482 }
1483
1484 return work_done;
1485}
1486
1487/**
1488 * ixgbe_tx_timeout - Respond to a Tx Hang
1489 * @netdev: network interface device structure
1490 **/
1491static void ixgbe_tx_timeout(struct net_device *netdev)
1492{
1493 struct ixgbe_adapter *adapter = netdev_priv(netdev);
1494
1495 /* Do the reset outside of interrupt context */
1496 schedule_work(&adapter->reset_task);
1497}
1498
1499static void ixgbe_reset_task(struct work_struct *work)
1500{
1501 struct ixgbe_adapter *adapter;
1502 adapter = container_of(work, struct ixgbe_adapter, reset_task);
1503
1504 adapter->tx_timeout_count++;
1505
1506 ixgbe_down(adapter);
1507 ixgbe_up(adapter);
1508}
1509
1510/**
1511 * ixgbe_alloc_queues - Allocate memory for all rings
1512 * @adapter: board private structure to initialize
1513 *
1514 * We allocate one ring per queue at run-time since we don't know the
1515 * number of queues at compile-time. The polling_netdev array is
1516 * intended for Multiqueue, but should work fine with a single queue.
1517 **/
1518static int __devinit ixgbe_alloc_queues(struct ixgbe_adapter *adapter)
1519{
1520 int i;
1521
1522 adapter->tx_ring = kcalloc(adapter->num_tx_queues,
1523 sizeof(struct ixgbe_ring), GFP_KERNEL);
1524 if (!adapter->tx_ring)
1525 return -ENOMEM;
1526
1527 for (i = 0; i < adapter->num_tx_queues; i++)
1528 adapter->tx_ring[i].count = IXGBE_DEFAULT_TXD;
1529
1530 adapter->rx_ring = kcalloc(adapter->num_rx_queues,
1531 sizeof(struct ixgbe_ring), GFP_KERNEL);
1532 if (!adapter->rx_ring) {
1533 kfree(adapter->tx_ring);
1534 return -ENOMEM;
1535 }
1536
1537 for (i = 0; i < adapter->num_rx_queues; i++) {
1538 adapter->rx_ring[i].adapter = adapter;
1539 adapter->rx_ring[i].itr_register = IXGBE_EITR(i);
1540 adapter->rx_ring[i].count = IXGBE_DEFAULT_RXD;
1541 }
1542
1543 return 0;
1544}
1545
1546/**
1547 * ixgbe_sw_init - Initialize general software structures (struct ixgbe_adapter)
1548 * @adapter: board private structure to initialize
1549 *
1550 * ixgbe_sw_init initializes the Adapter private data structure.
1551 * Fields are initialized based on PCI device information and
1552 * OS network device settings (MTU size).
1553 **/
1554static int __devinit ixgbe_sw_init(struct ixgbe_adapter *adapter)
1555{
1556 struct ixgbe_hw *hw = &adapter->hw;
1557 struct pci_dev *pdev = adapter->pdev;
1558
1559 /* default flow control settings */
1560 hw->fc.original_type = ixgbe_fc_full;
1561 hw->fc.type = ixgbe_fc_full;
1562
1563 hw->mac.link_mode_select = IXGBE_AUTOC_LMS_10G_LINK_NO_AN;
1564 if (hw->mac.ops.reset(hw)) {
1565 dev_err(&pdev->dev, "HW Init failed\n");
1566 return -EIO;
1567 }
1568 if (hw->phy.ops.setup_speed(hw, IXGBE_LINK_SPEED_10GB_FULL, true,
1569 false)) {
1570 dev_err(&pdev->dev, "Link Speed setup failed\n");
1571 return -EIO;
1572 }
1573
1574 /* initialize eeprom parameters */
1575 if (ixgbe_init_eeprom(hw)) {
1576 dev_err(&pdev->dev, "EEPROM initialization failed\n");
1577 return -EIO;
1578 }
1579
1580 /* Set the default values */
1581 adapter->num_rx_queues = IXGBE_DEFAULT_RXQ;
1582 adapter->num_tx_queues = 1;
1583 adapter->flags |= IXGBE_FLAG_RX_CSUM_ENABLED;
1584
1585 if (ixgbe_alloc_queues(adapter)) {
1586 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
1587 return -ENOMEM;
1588 }
1589
1590 atomic_set(&adapter->irq_sem, 1);
1591 set_bit(__IXGBE_DOWN, &adapter->state);
1592
1593 return 0;
1594}
1595
1596/**
1597 * ixgbe_setup_tx_resources - allocate Tx resources (Descriptors)
1598 * @adapter: board private structure
1599 * @txdr: tx descriptor ring (for a specific queue) to setup
1600 *
1601 * Return 0 on success, negative on failure
1602 **/
1603int ixgbe_setup_tx_resources(struct ixgbe_adapter *adapter,
1604 struct ixgbe_ring *txdr)
1605{
1606 struct pci_dev *pdev = adapter->pdev;
1607 int size;
1608
1609 size = sizeof(struct ixgbe_tx_buffer) * txdr->count;
1610 txdr->tx_buffer_info = vmalloc(size);
1611 if (!txdr->tx_buffer_info) {
1612 DPRINTK(PROBE, ERR,
1613 "Unable to allocate memory for the transmit descriptor ring\n");
1614 return -ENOMEM;
1615 }
1616 memset(txdr->tx_buffer_info, 0, size);
1617
1618 /* round up to nearest 4K */
1619 txdr->size = txdr->count * sizeof(union ixgbe_adv_tx_desc);
1620 txdr->size = ALIGN(txdr->size, 4096);
1621
1622 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
1623 if (!txdr->desc) {
1624 vfree(txdr->tx_buffer_info);
1625 DPRINTK(PROBE, ERR,
1626 "Memory allocation failed for the tx desc ring\n");
1627 return -ENOMEM;
1628 }
1629
1630 txdr->adapter = adapter;
1631 txdr->next_to_use = 0;
1632 txdr->next_to_clean = 0;
1633 txdr->work_limit = txdr->count;
1634 spin_lock_init(&txdr->tx_lock);
1635
1636 return 0;
1637}
1638
1639/**
1640 * ixgbe_setup_rx_resources - allocate Rx resources (Descriptors)
1641 * @adapter: board private structure
1642 * @rxdr: rx descriptor ring (for a specific queue) to setup
1643 *
1644 * Returns 0 on success, negative on failure
1645 **/
1646int ixgbe_setup_rx_resources(struct ixgbe_adapter *adapter,
1647 struct ixgbe_ring *rxdr)
1648{
1649 struct pci_dev *pdev = adapter->pdev;
1650 int size, desc_len;
1651
1652 size = sizeof(struct ixgbe_rx_buffer) * rxdr->count;
1653 rxdr->rx_buffer_info = vmalloc(size);
1654 if (!rxdr->rx_buffer_info) {
1655 DPRINTK(PROBE, ERR,
1656 "vmalloc allocation failed for the rx desc ring\n");
1657 return -ENOMEM;
1658 }
1659 memset(rxdr->rx_buffer_info, 0, size);
1660
1661 desc_len = sizeof(union ixgbe_adv_rx_desc);
1662
1663 /* Round up to nearest 4K */
1664 rxdr->size = rxdr->count * desc_len;
1665 rxdr->size = ALIGN(rxdr->size, 4096);
1666
1667 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
1668
1669 if (!rxdr->desc) {
1670 DPRINTK(PROBE, ERR,
1671 "Memory allocation failed for the rx desc ring\n");
1672 vfree(rxdr->rx_buffer_info);
1673 return -ENOMEM;
1674 }
1675
1676 rxdr->next_to_clean = 0;
1677 rxdr->next_to_use = 0;
1678 rxdr->adapter = adapter;
1679
1680 return 0;
1681}
1682
1683/**
1684 * ixgbe_free_tx_resources - Free Tx Resources per Queue
1685 * @adapter: board private structure
1686 * @tx_ring: Tx descriptor ring for a specific queue
1687 *
1688 * Free all transmit software resources
1689 **/
1690static void ixgbe_free_tx_resources(struct ixgbe_adapter *adapter,
1691 struct ixgbe_ring *tx_ring)
1692{
1693 struct pci_dev *pdev = adapter->pdev;
1694
1695 ixgbe_clean_tx_ring(adapter, tx_ring);
1696
1697 vfree(tx_ring->tx_buffer_info);
1698 tx_ring->tx_buffer_info = NULL;
1699
1700 pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma);
1701
1702 tx_ring->desc = NULL;
1703}
1704
1705/**
1706 * ixgbe_free_all_tx_resources - Free Tx Resources for All Queues
1707 * @adapter: board private structure
1708 *
1709 * Free all transmit software resources
1710 **/
1711static void ixgbe_free_all_tx_resources(struct ixgbe_adapter *adapter)
1712{
1713 int i;
1714
1715 for (i = 0; i < adapter->num_tx_queues; i++)
1716 ixgbe_free_tx_resources(adapter, &adapter->tx_ring[i]);
1717}
1718
1719/**
1720 * ixgbe_free_rx_resources - Free Rx Resources
1721 * @adapter: board private structure
1722 * @rx_ring: ring to clean the resources from
1723 *
1724 * Free all receive software resources
1725 **/
1726static void ixgbe_free_rx_resources(struct ixgbe_adapter *adapter,
1727 struct ixgbe_ring *rx_ring)
1728{
1729 struct pci_dev *pdev = adapter->pdev;
1730
1731 ixgbe_clean_rx_ring(adapter, rx_ring);
1732
1733 vfree(rx_ring->rx_buffer_info);
1734 rx_ring->rx_buffer_info = NULL;
1735
1736 pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
1737
1738 rx_ring->desc = NULL;
1739}
1740
1741/**
1742 * ixgbe_free_all_rx_resources - Free Rx Resources for All Queues
1743 * @adapter: board private structure
1744 *
1745 * Free all receive software resources
1746 **/
1747static void ixgbe_free_all_rx_resources(struct ixgbe_adapter *adapter)
1748{
1749 int i;
1750
1751 for (i = 0; i < adapter->num_rx_queues; i++)
1752 ixgbe_free_rx_resources(adapter, &adapter->rx_ring[i]);
1753}
1754
1755/**
1756 * ixgbe_setup_all_tx_resources - wrapper to allocate Tx resources
1757 * (Descriptors) for all queues
1758 * @adapter: board private structure
1759 *
1760 * If this function returns with an error, then it's possible one or
1761 * more of the rings is populated (while the rest are not). It is the
1762 * callers duty to clean those orphaned rings.
1763 *
1764 * Return 0 on success, negative on failure
1765 **/
1766static int ixgbe_setup_all_tx_resources(struct ixgbe_adapter *adapter)
1767{
1768 int i, err = 0;
1769
1770 for (i = 0; i < adapter->num_tx_queues; i++) {
1771 err = ixgbe_setup_tx_resources(adapter, &adapter->tx_ring[i]);
1772 if (err) {
1773 DPRINTK(PROBE, ERR,
1774 "Allocation for Tx Queue %u failed\n", i);
1775 break;
1776 }
1777 }
1778
1779 return err;
1780}
1781
1782/**
1783 * ixgbe_setup_all_rx_resources - wrapper to allocate Rx resources
1784 * (Descriptors) for all queues
1785 * @adapter: board private structure
1786 *
1787 * If this function returns with an error, then it's possible one or
1788 * more of the rings is populated (while the rest are not). It is the
1789 * callers duty to clean those orphaned rings.
1790 *
1791 * Return 0 on success, negative on failure
1792 **/
1793
1794static int ixgbe_setup_all_rx_resources(struct ixgbe_adapter *adapter)
1795{
1796 int i, err = 0;
1797
1798 for (i = 0; i < adapter->num_rx_queues; i++) {
1799 err = ixgbe_setup_rx_resources(adapter, &adapter->rx_ring[i]);
1800 if (err) {
1801 DPRINTK(PROBE, ERR,
1802 "Allocation for Rx Queue %u failed\n", i);
1803 break;
1804 }
1805 }
1806
1807 return err;
1808}
1809
1810/**
1811 * ixgbe_change_mtu - Change the Maximum Transfer Unit
1812 * @netdev: network interface device structure
1813 * @new_mtu: new value for maximum frame size
1814 *
1815 * Returns 0 on success, negative on failure
1816 **/
1817static int ixgbe_change_mtu(struct net_device *netdev, int new_mtu)
1818{
1819 struct ixgbe_adapter *adapter = netdev_priv(netdev);
1820 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
1821
1822 if ((max_frame < (ETH_ZLEN + ETH_FCS_LEN)) ||
1823 (max_frame > IXGBE_MAX_JUMBO_FRAME_SIZE))
1824 return -EINVAL;
1825
1826 netdev->mtu = new_mtu;
1827
1828 if (netif_running(netdev)) {
1829 ixgbe_down(adapter);
1830 ixgbe_up(adapter);
1831 }
1832
1833 return 0;
1834}
1835
1836/**
1837 * ixgbe_open - Called when a network interface is made active
1838 * @netdev: network interface device structure
1839 *
1840 * Returns 0 on success, negative value on failure
1841 *
1842 * The open entry point is called when a network interface is made
1843 * active by the system (IFF_UP). At this point all resources needed
1844 * for transmit and receive operations are allocated, the interrupt
1845 * handler is registered with the OS, the watchdog timer is started,
1846 * and the stack is notified that the interface is ready.
1847 **/
1848static int ixgbe_open(struct net_device *netdev)
1849{
1850 struct ixgbe_adapter *adapter = netdev_priv(netdev);
1851 int err;
1852 u32 ctrl_ext;
1853 u32 num_rx_queues = adapter->num_rx_queues;
1854
1855 /* Let firmware know the driver has taken over */
1856 ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
1857 IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT,
1858 ctrl_ext | IXGBE_CTRL_EXT_DRV_LOAD);
1859
1860try_intr_reinit:
1861 /* allocate transmit descriptors */
1862 err = ixgbe_setup_all_tx_resources(adapter);
1863 if (err)
1864 goto err_setup_tx;
1865
1866 if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) {
1867 num_rx_queues = 1;
1868 adapter->num_rx_queues = num_rx_queues;
1869 }
1870
1871 /* allocate receive descriptors */
1872 err = ixgbe_setup_all_rx_resources(adapter);
1873 if (err)
1874 goto err_setup_rx;
1875
1876 ixgbe_configure(adapter);
1877
1878 err = ixgbe_request_irq(adapter, &num_rx_queues);
1879 if (err)
1880 goto err_req_irq;
1881
1882 /* ixgbe_request might have reduced num_rx_queues */
1883 if (num_rx_queues < adapter->num_rx_queues) {
1884 /* We didn't get MSI-X, so we need to release everything,
1885 * set our Rx queue count to num_rx_queues, and redo the
1886 * whole init process.
1887 */
1888 ixgbe_free_irq(adapter);
1889 if (adapter->flags & IXGBE_FLAG_MSI_ENABLED) {
1890 pci_disable_msi(adapter->pdev);
1891 adapter->flags &= ~IXGBE_FLAG_MSI_ENABLED;
1892 }
1893 ixgbe_free_all_rx_resources(adapter);
1894 ixgbe_free_all_tx_resources(adapter);
1895 adapter->num_rx_queues = num_rx_queues;
1896
1897 /* Reset the hardware, and start over. */
1898 ixgbe_reset(adapter);
1899
1900 goto try_intr_reinit;
1901 }
1902
1903 err = ixgbe_up_complete(adapter);
1904 if (err)
1905 goto err_up;
1906
1907 return 0;
1908
1909err_up:
1910 ixgbe_free_irq(adapter);
1911err_req_irq:
1912 ixgbe_free_all_rx_resources(adapter);
1913err_setup_rx:
1914 ixgbe_free_all_tx_resources(adapter);
1915err_setup_tx:
1916 ixgbe_reset(adapter);
1917
1918 return err;
1919}
1920
1921/**
1922 * ixgbe_close - Disables a network interface
1923 * @netdev: network interface device structure
1924 *
1925 * Returns 0, this is not allowed to fail
1926 *
1927 * The close entry point is called when an interface is de-activated
1928 * by the OS. The hardware is still under the drivers control, but
1929 * needs to be disabled. A global MAC reset is issued to stop the
1930 * hardware, and all transmit and receive resources are freed.
1931 **/
1932static int ixgbe_close(struct net_device *netdev)
1933{
1934 struct ixgbe_adapter *adapter = netdev_priv(netdev);
1935 u32 ctrl_ext;
1936
1937 ixgbe_down(adapter);
1938 ixgbe_free_irq(adapter);
1939
1940 ixgbe_free_all_tx_resources(adapter);
1941 ixgbe_free_all_rx_resources(adapter);
1942
1943 ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
1944 IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT,
1945 ctrl_ext & ~IXGBE_CTRL_EXT_DRV_LOAD);
1946
1947 return 0;
1948}
1949
1950/**
1951 * ixgbe_update_stats - Update the board statistics counters.
1952 * @adapter: board private structure
1953 **/
1954void ixgbe_update_stats(struct ixgbe_adapter *adapter)
1955{
1956 struct ixgbe_hw *hw = &adapter->hw;
1957 u64 good_rx, missed_rx, bprc;
1958
1959 adapter->stats.crcerrs += IXGBE_READ_REG(hw, IXGBE_CRCERRS);
1960 good_rx = IXGBE_READ_REG(hw, IXGBE_GPRC);
1961 missed_rx = IXGBE_READ_REG(hw, IXGBE_MPC(0));
1962 missed_rx += IXGBE_READ_REG(hw, IXGBE_MPC(1));
1963 missed_rx += IXGBE_READ_REG(hw, IXGBE_MPC(2));
1964 missed_rx += IXGBE_READ_REG(hw, IXGBE_MPC(3));
1965 missed_rx += IXGBE_READ_REG(hw, IXGBE_MPC(4));
1966 missed_rx += IXGBE_READ_REG(hw, IXGBE_MPC(5));
1967 missed_rx += IXGBE_READ_REG(hw, IXGBE_MPC(6));
1968 missed_rx += IXGBE_READ_REG(hw, IXGBE_MPC(7));
1969 adapter->stats.gprc += (good_rx - missed_rx);
1970
1971 adapter->stats.mpc[0] += missed_rx;
1972 adapter->stats.gorc += IXGBE_READ_REG(hw, IXGBE_GORCH);
1973 bprc = IXGBE_READ_REG(hw, IXGBE_BPRC);
1974 adapter->stats.bprc += bprc;
1975 adapter->stats.mprc += IXGBE_READ_REG(hw, IXGBE_MPRC);
1976 adapter->stats.mprc -= bprc;
1977 adapter->stats.roc += IXGBE_READ_REG(hw, IXGBE_ROC);
1978 adapter->stats.prc64 += IXGBE_READ_REG(hw, IXGBE_PRC64);
1979 adapter->stats.prc127 += IXGBE_READ_REG(hw, IXGBE_PRC127);
1980 adapter->stats.prc255 += IXGBE_READ_REG(hw, IXGBE_PRC255);
1981 adapter->stats.prc511 += IXGBE_READ_REG(hw, IXGBE_PRC511);
1982 adapter->stats.prc1023 += IXGBE_READ_REG(hw, IXGBE_PRC1023);
1983 adapter->stats.prc1522 += IXGBE_READ_REG(hw, IXGBE_PRC1522);
1984
1985 adapter->stats.rlec += IXGBE_READ_REG(hw, IXGBE_RLEC);
1986 adapter->stats.lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXC);
1987 adapter->stats.lxontxc += IXGBE_READ_REG(hw, IXGBE_LXONTXC);
1988 adapter->stats.lxoffrxc += IXGBE_READ_REG(hw, IXGBE_LXOFFRXC);
1989 adapter->stats.lxofftxc += IXGBE_READ_REG(hw, IXGBE_LXOFFTXC);
1990 adapter->stats.ruc += IXGBE_READ_REG(hw, IXGBE_RUC);
1991 adapter->stats.gptc += IXGBE_READ_REG(hw, IXGBE_GPTC);
1992 adapter->stats.gotc += IXGBE_READ_REG(hw, IXGBE_GOTCH);
1993 adapter->stats.rnbc[0] += IXGBE_READ_REG(hw, IXGBE_RNBC(0));
1994 adapter->stats.ruc += IXGBE_READ_REG(hw, IXGBE_RUC);
1995 adapter->stats.rfc += IXGBE_READ_REG(hw, IXGBE_RFC);
1996 adapter->stats.rjc += IXGBE_READ_REG(hw, IXGBE_RJC);
1997 adapter->stats.tor += IXGBE_READ_REG(hw, IXGBE_TORH);
1998 adapter->stats.tpr += IXGBE_READ_REG(hw, IXGBE_TPR);
1999 adapter->stats.ptc64 += IXGBE_READ_REG(hw, IXGBE_PTC64);
2000 adapter->stats.ptc127 += IXGBE_READ_REG(hw, IXGBE_PTC127);
2001 adapter->stats.ptc255 += IXGBE_READ_REG(hw, IXGBE_PTC255);
2002 adapter->stats.ptc511 += IXGBE_READ_REG(hw, IXGBE_PTC511);
2003 adapter->stats.ptc1023 += IXGBE_READ_REG(hw, IXGBE_PTC1023);
2004 adapter->stats.ptc1522 += IXGBE_READ_REG(hw, IXGBE_PTC1522);
2005 adapter->stats.mptc += IXGBE_READ_REG(hw, IXGBE_MPTC);
2006 adapter->stats.bptc += IXGBE_READ_REG(hw, IXGBE_BPTC);
2007
2008 /* Fill out the OS statistics structure */
2009 adapter->net_stats.rx_packets = adapter->stats.gprc;
2010 adapter->net_stats.tx_packets = adapter->stats.gptc;
2011 adapter->net_stats.rx_bytes = adapter->stats.gorc;
2012 adapter->net_stats.tx_bytes = adapter->stats.gotc;
2013 adapter->net_stats.multicast = adapter->stats.mprc;
2014
2015 /* Rx Errors */
2016 adapter->net_stats.rx_errors = adapter->stats.crcerrs +
2017 adapter->stats.rlec;
2018 adapter->net_stats.rx_dropped = 0;
2019 adapter->net_stats.rx_length_errors = adapter->stats.rlec;
2020 adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
2021 adapter->net_stats.rx_missed_errors = adapter->stats.mpc[0];
2022
2023}
2024
2025/**
2026 * ixgbe_watchdog - Timer Call-back
2027 * @data: pointer to adapter cast into an unsigned long
2028 **/
2029static void ixgbe_watchdog(unsigned long data)
2030{
2031 struct ixgbe_adapter *adapter = (struct ixgbe_adapter *)data;
2032 struct net_device *netdev = adapter->netdev;
2033 bool link_up;
2034 u32 link_speed = 0;
2035
2036 adapter->hw.phy.ops.check(&adapter->hw, &(link_speed), &link_up);
2037
2038 if (link_up) {
2039 if (!netif_carrier_ok(netdev)) {
2040 u32 frctl = IXGBE_READ_REG(&adapter->hw, IXGBE_FCTRL);
2041 u32 rmcs = IXGBE_READ_REG(&adapter->hw, IXGBE_RMCS);
2042#define FLOW_RX (frctl & IXGBE_FCTRL_RFCE)
2043#define FLOW_TX (rmcs & IXGBE_RMCS_TFCE_802_3X)
2044 DPRINTK(LINK, INFO, "NIC Link is Up %s, "
2045 "Flow Control: %s\n",
2046 (link_speed == IXGBE_LINK_SPEED_10GB_FULL ?
2047 "10 Gbps" :
2048 (link_speed == IXGBE_LINK_SPEED_1GB_FULL ?
2049 "1 Gpbs" : "unknown speed")),
2050 ((FLOW_RX && FLOW_TX) ? "RX/TX" :
2051 (FLOW_RX ? "RX" :
2052 (FLOW_TX ? "TX" : "None"))));
2053
2054 netif_carrier_on(netdev);
2055 netif_wake_queue(netdev);
2056 } else {
2057 /* Force detection of hung controller */
2058 adapter->detect_tx_hung = true;
2059 }
2060 } else {
2061 if (netif_carrier_ok(netdev)) {
2062 DPRINTK(LINK, INFO, "NIC Link is Down\n");
2063 netif_carrier_off(netdev);
2064 netif_stop_queue(netdev);
2065 }
2066 }
2067
2068 ixgbe_update_stats(adapter);
2069
2070 /* Reset the timer */
2071 if (!test_bit(__IXGBE_DOWN, &adapter->state))
2072 mod_timer(&adapter->watchdog_timer,
2073 round_jiffies(jiffies + 2 * HZ));
2074}
2075
2076#define IXGBE_MAX_TXD_PWR 14
2077#define IXGBE_MAX_DATA_PER_TXD (1 << IXGBE_MAX_TXD_PWR)
2078
2079/* Tx Descriptors needed, worst case */
2080#define TXD_USE_COUNT(S) (((S) >> IXGBE_MAX_TXD_PWR) + \
2081 (((S) & (IXGBE_MAX_DATA_PER_TXD - 1)) ? 1 : 0))
2082#define DESC_NEEDED (TXD_USE_COUNT(IXGBE_MAX_DATA_PER_TXD) /* skb->data */ + \
2083 MAX_SKB_FRAGS * TXD_USE_COUNT(PAGE_SIZE) + 1) /* for context */
2084
2085static int ixgbe_tso(struct ixgbe_adapter *adapter,
2086 struct ixgbe_ring *tx_ring, struct sk_buff *skb,
2087 u32 tx_flags, u8 *hdr_len)
2088{
2089 struct ixgbe_adv_tx_context_desc *context_desc;
2090 unsigned int i;
2091 int err;
2092 struct ixgbe_tx_buffer *tx_buffer_info;
2093 u32 vlan_macip_lens = 0, type_tucmd_mlhl = 0;
2094 u32 mss_l4len_idx = 0, l4len;
2095 *hdr_len = 0;
2096
2097 if (skb_is_gso(skb)) {
2098 if (skb_header_cloned(skb)) {
2099 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
2100 if (err)
2101 return err;
2102 }
2103 l4len = tcp_hdrlen(skb);
2104 *hdr_len += l4len;
2105
2106 if (skb->protocol == ntohs(ETH_P_IP)) {
2107 struct iphdr *iph = ip_hdr(skb);
2108 iph->tot_len = 0;
2109 iph->check = 0;
2110 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
2111 iph->daddr, 0,
2112 IPPROTO_TCP,
2113 0);
2114 adapter->hw_tso_ctxt++;
2115 } else if (skb_shinfo(skb)->gso_type == SKB_GSO_TCPV6) {
2116 ipv6_hdr(skb)->payload_len = 0;
2117 tcp_hdr(skb)->check =
2118 ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
2119 &ipv6_hdr(skb)->daddr,
2120 0, IPPROTO_TCP, 0);
2121 adapter->hw_tso6_ctxt++;
2122 }
2123
2124 i = tx_ring->next_to_use;
2125
2126 tx_buffer_info = &tx_ring->tx_buffer_info[i];
2127 context_desc = IXGBE_TX_CTXTDESC_ADV(*tx_ring, i);
2128
2129 /* VLAN MACLEN IPLEN */
2130 if (tx_flags & IXGBE_TX_FLAGS_VLAN)
2131 vlan_macip_lens |=
2132 (tx_flags & IXGBE_TX_FLAGS_VLAN_MASK);
2133 vlan_macip_lens |= ((skb_network_offset(skb)) <<
2134 IXGBE_ADVTXD_MACLEN_SHIFT);
2135 *hdr_len += skb_network_offset(skb);
2136 vlan_macip_lens |=
2137 (skb_transport_header(skb) - skb_network_header(skb));
2138 *hdr_len +=
2139 (skb_transport_header(skb) - skb_network_header(skb));
2140 context_desc->vlan_macip_lens = cpu_to_le32(vlan_macip_lens);
2141 context_desc->seqnum_seed = 0;
2142
2143 /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
2144 type_tucmd_mlhl |= (IXGBE_TXD_CMD_DEXT |
2145 IXGBE_ADVTXD_DTYP_CTXT);
2146
2147 if (skb->protocol == ntohs(ETH_P_IP))
2148 type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_IPV4;
2149 type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_L4T_TCP;
2150 context_desc->type_tucmd_mlhl = cpu_to_le32(type_tucmd_mlhl);
2151
2152 /* MSS L4LEN IDX */
2153 mss_l4len_idx |=
2154 (skb_shinfo(skb)->gso_size << IXGBE_ADVTXD_MSS_SHIFT);
2155 mss_l4len_idx |= (l4len << IXGBE_ADVTXD_L4LEN_SHIFT);
2156 context_desc->mss_l4len_idx = cpu_to_le32(mss_l4len_idx);
2157
2158 tx_buffer_info->time_stamp = jiffies;
2159 tx_buffer_info->next_to_watch = i;
2160
2161 i++;
2162 if (i == tx_ring->count)
2163 i = 0;
2164 tx_ring->next_to_use = i;
2165
2166 return true;
2167 }
2168 return false;
2169}
2170
2171static bool ixgbe_tx_csum(struct ixgbe_adapter *adapter,
2172 struct ixgbe_ring *tx_ring,
2173 struct sk_buff *skb, u32 tx_flags)
2174{
2175 struct ixgbe_adv_tx_context_desc *context_desc;
2176 unsigned int i;
2177 struct ixgbe_tx_buffer *tx_buffer_info;
2178 u32 vlan_macip_lens = 0, type_tucmd_mlhl = 0;
2179
2180 if (skb->ip_summed == CHECKSUM_PARTIAL ||
2181 (tx_flags & IXGBE_TX_FLAGS_VLAN)) {
2182 i = tx_ring->next_to_use;
2183 tx_buffer_info = &tx_ring->tx_buffer_info[i];
2184 context_desc = IXGBE_TX_CTXTDESC_ADV(*tx_ring, i);
2185
2186 if (tx_flags & IXGBE_TX_FLAGS_VLAN)
2187 vlan_macip_lens |=
2188 (tx_flags & IXGBE_TX_FLAGS_VLAN_MASK);
2189 vlan_macip_lens |= (skb_network_offset(skb) <<
2190 IXGBE_ADVTXD_MACLEN_SHIFT);
2191 if (skb->ip_summed == CHECKSUM_PARTIAL)
2192 vlan_macip_lens |= (skb_transport_header(skb) -
2193 skb_network_header(skb));
2194
2195 context_desc->vlan_macip_lens = cpu_to_le32(vlan_macip_lens);
2196 context_desc->seqnum_seed = 0;
2197
2198 type_tucmd_mlhl |= (IXGBE_TXD_CMD_DEXT |
2199 IXGBE_ADVTXD_DTYP_CTXT);
2200
2201 if (skb->ip_summed == CHECKSUM_PARTIAL) {
2202 if (skb->protocol == ntohs(ETH_P_IP))
2203 type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_IPV4;
2204
2205 if (skb->sk->sk_protocol == IPPROTO_TCP)
2206 type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_L4T_TCP;
2207 }
2208
2209 context_desc->type_tucmd_mlhl = cpu_to_le32(type_tucmd_mlhl);
2210 context_desc->mss_l4len_idx = 0;
2211
2212 tx_buffer_info->time_stamp = jiffies;
2213 tx_buffer_info->next_to_watch = i;
2214 adapter->hw_csum_tx_good++;
2215 i++;
2216 if (i == tx_ring->count)
2217 i = 0;
2218 tx_ring->next_to_use = i;
2219
2220 return true;
2221 }
2222 return false;
2223}
2224
2225static int ixgbe_tx_map(struct ixgbe_adapter *adapter,
2226 struct ixgbe_ring *tx_ring,
2227 struct sk_buff *skb, unsigned int first)
2228{
2229 struct ixgbe_tx_buffer *tx_buffer_info;
2230 unsigned int len = skb->len;
2231 unsigned int offset = 0, size, count = 0, i;
2232 unsigned int nr_frags = skb_shinfo(skb)->nr_frags;
2233 unsigned int f;
2234
2235 len -= skb->data_len;
2236
2237 i = tx_ring->next_to_use;
2238
2239 while (len) {
2240 tx_buffer_info = &tx_ring->tx_buffer_info[i];
2241 size = min(len, (uint)IXGBE_MAX_DATA_PER_TXD);
2242
2243 tx_buffer_info->length = size;
2244 tx_buffer_info->dma = pci_map_single(adapter->pdev,
2245 skb->data + offset,
2246 size, PCI_DMA_TODEVICE);
2247 tx_buffer_info->time_stamp = jiffies;
2248 tx_buffer_info->next_to_watch = i;
2249
2250 len -= size;
2251 offset += size;
2252 count++;
2253 i++;
2254 if (i == tx_ring->count)
2255 i = 0;
2256 }
2257
2258 for (f = 0; f < nr_frags; f++) {
2259 struct skb_frag_struct *frag;
2260
2261 frag = &skb_shinfo(skb)->frags[f];
2262 len = frag->size;
2263 offset = frag->page_offset;
2264
2265 while (len) {
2266 tx_buffer_info = &tx_ring->tx_buffer_info[i];
2267 size = min(len, (uint)IXGBE_MAX_DATA_PER_TXD);
2268
2269 tx_buffer_info->length = size;
2270 tx_buffer_info->dma = pci_map_page(adapter->pdev,
2271 frag->page,
2272 offset,
2273 size, PCI_DMA_TODEVICE);
2274 tx_buffer_info->time_stamp = jiffies;
2275 tx_buffer_info->next_to_watch = i;
2276
2277 len -= size;
2278 offset += size;
2279 count++;
2280 i++;
2281 if (i == tx_ring->count)
2282 i = 0;
2283 }
2284 }
2285 if (i == 0)
2286 i = tx_ring->count - 1;
2287 else
2288 i = i - 1;
2289 tx_ring->tx_buffer_info[i].skb = skb;
2290 tx_ring->tx_buffer_info[first].next_to_watch = i;
2291
2292 return count;
2293}
2294
2295static void ixgbe_tx_queue(struct ixgbe_adapter *adapter,
2296 struct ixgbe_ring *tx_ring,
2297 int tx_flags, int count, u32 paylen, u8 hdr_len)
2298{
2299 union ixgbe_adv_tx_desc *tx_desc = NULL;
2300 struct ixgbe_tx_buffer *tx_buffer_info;
2301 u32 olinfo_status = 0, cmd_type_len = 0;
2302 unsigned int i;
2303 u32 txd_cmd = IXGBE_TXD_CMD_EOP | IXGBE_TXD_CMD_RS | IXGBE_TXD_CMD_IFCS;
2304
2305 cmd_type_len |= IXGBE_ADVTXD_DTYP_DATA;
2306
2307 cmd_type_len |= IXGBE_ADVTXD_DCMD_IFCS | IXGBE_ADVTXD_DCMD_DEXT;
2308
2309 if (tx_flags & IXGBE_TX_FLAGS_VLAN)
2310 cmd_type_len |= IXGBE_ADVTXD_DCMD_VLE;
2311
2312 if (tx_flags & IXGBE_TX_FLAGS_TSO) {
2313 cmd_type_len |= IXGBE_ADVTXD_DCMD_TSE;
2314
2315 olinfo_status |= IXGBE_TXD_POPTS_TXSM <<
2316 IXGBE_ADVTXD_POPTS_SHIFT;
2317
2318 if (tx_flags & IXGBE_TX_FLAGS_IPV4)
2319 olinfo_status |= IXGBE_TXD_POPTS_IXSM <<
2320 IXGBE_ADVTXD_POPTS_SHIFT;
2321
2322 } else if (tx_flags & IXGBE_TX_FLAGS_CSUM)
2323 olinfo_status |= IXGBE_TXD_POPTS_TXSM <<
2324 IXGBE_ADVTXD_POPTS_SHIFT;
2325
2326 olinfo_status |= ((paylen - hdr_len) << IXGBE_ADVTXD_PAYLEN_SHIFT);
2327
2328 i = tx_ring->next_to_use;
2329 while (count--) {
2330 tx_buffer_info = &tx_ring->tx_buffer_info[i];
2331 tx_desc = IXGBE_TX_DESC_ADV(*tx_ring, i);
2332 tx_desc->read.buffer_addr = cpu_to_le64(tx_buffer_info->dma);
2333 tx_desc->read.cmd_type_len =
2334 cpu_to_le32(cmd_type_len | tx_buffer_info->length);
2335 tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
2336
2337 i++;
2338 if (i == tx_ring->count)
2339 i = 0;
2340 }
2341
2342 tx_desc->read.cmd_type_len |= cpu_to_le32(txd_cmd);
2343
2344 /*
2345 * Force memory writes to complete before letting h/w
2346 * know there are new descriptors to fetch. (Only
2347 * applicable for weak-ordered memory model archs,
2348 * such as IA-64).
2349 */
2350 wmb();
2351
2352 tx_ring->next_to_use = i;
2353 writel(i, adapter->hw.hw_addr + tx_ring->tail);
2354}
2355
2356static int ixgbe_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
2357{
2358 struct ixgbe_adapter *adapter = netdev_priv(netdev);
2359 struct ixgbe_ring *tx_ring;
2360 unsigned int len = skb->len;
2361 unsigned int first;
2362 unsigned int tx_flags = 0;
2363 unsigned long flags = 0;
2364 u8 hdr_len;
2365 int tso;
2366 unsigned int mss = 0;
2367 int count = 0;
2368 unsigned int f;
2369 unsigned int nr_frags = skb_shinfo(skb)->nr_frags;
2370 len -= skb->data_len;
2371
2372 tx_ring = adapter->tx_ring;
2373
2374 if (skb->len <= 0) {
2375 dev_kfree_skb(skb);
2376 return NETDEV_TX_OK;
2377 }
2378 mss = skb_shinfo(skb)->gso_size;
2379
2380 if (mss)
2381 count++;
2382 else if (skb->ip_summed == CHECKSUM_PARTIAL)
2383 count++;
2384
2385 count += TXD_USE_COUNT(len);
2386 for (f = 0; f < nr_frags; f++)
2387 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size);
2388
2389 spin_lock_irqsave(&tx_ring->tx_lock, flags);
2390 if (IXGBE_DESC_UNUSED(tx_ring) < (count + 2)) {
2391 adapter->tx_busy++;
2392 netif_stop_queue(netdev);
2393 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
2394 return NETDEV_TX_BUSY;
2395 }
2396 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
2397 if (adapter->vlgrp && vlan_tx_tag_present(skb)) {
2398 tx_flags |= IXGBE_TX_FLAGS_VLAN;
2399 tx_flags |= (vlan_tx_tag_get(skb) << IXGBE_TX_FLAGS_VLAN_SHIFT);
2400 }
2401
2402 if (skb->protocol == ntohs(ETH_P_IP))
2403 tx_flags |= IXGBE_TX_FLAGS_IPV4;
2404 first = tx_ring->next_to_use;
2405 tso = ixgbe_tso(adapter, tx_ring, skb, tx_flags, &hdr_len);
2406 if (tso < 0) {
2407 dev_kfree_skb_any(skb);
2408 return NETDEV_TX_OK;
2409 }
2410
2411 if (tso)
2412 tx_flags |= IXGBE_TX_FLAGS_TSO;
2413 else if (ixgbe_tx_csum(adapter, tx_ring, skb, tx_flags) &&
2414 (skb->ip_summed == CHECKSUM_PARTIAL))
2415 tx_flags |= IXGBE_TX_FLAGS_CSUM;
2416
2417 ixgbe_tx_queue(adapter, tx_ring, tx_flags,
2418 ixgbe_tx_map(adapter, tx_ring, skb, first),
2419 skb->len, hdr_len);
2420
2421 netdev->trans_start = jiffies;
2422
2423 spin_lock_irqsave(&tx_ring->tx_lock, flags);
2424 /* Make sure there is space in the ring for the next send. */
2425 if (IXGBE_DESC_UNUSED(tx_ring) < DESC_NEEDED)
2426 netif_stop_queue(netdev);
2427 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
2428
2429 return NETDEV_TX_OK;
2430}
2431
2432/**
2433 * ixgbe_get_stats - Get System Network Statistics
2434 * @netdev: network interface device structure
2435 *
2436 * Returns the address of the device statistics structure.
2437 * The statistics are actually updated from the timer callback.
2438 **/
2439static struct net_device_stats *ixgbe_get_stats(struct net_device *netdev)
2440{
2441 struct ixgbe_adapter *adapter = netdev_priv(netdev);
2442
2443 /* only return the current stats */
2444 return &adapter->net_stats;
2445}
2446
2447/**
2448 * ixgbe_set_mac - Change the Ethernet Address of the NIC
2449 * @netdev: network interface device structure
2450 * @p: pointer to an address structure
2451 *
2452 * Returns 0 on success, negative on failure
2453 **/
2454static int ixgbe_set_mac(struct net_device *netdev, void *p)
2455{
2456 struct ixgbe_adapter *adapter = netdev_priv(netdev);
2457 struct sockaddr *addr = p;
2458
2459 if (!is_valid_ether_addr(addr->sa_data))
2460 return -EADDRNOTAVAIL;
2461
2462 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
2463 memcpy(adapter->hw.mac.addr, addr->sa_data, netdev->addr_len);
2464
2465 ixgbe_set_rar(&adapter->hw, 0, adapter->hw.mac.addr, 0, IXGBE_RAH_AV);
2466
2467 return 0;
2468}
2469
2470#ifdef CONFIG_NET_POLL_CONTROLLER
2471/*
2472 * Polling 'interrupt' - used by things like netconsole to send skbs
2473 * without having to re-enable interrupts. It's not called while
2474 * the interrupt routine is executing.
2475 */
2476static void ixgbe_netpoll(struct net_device *netdev)
2477{
2478 struct ixgbe_adapter *adapter = netdev_priv(netdev);
2479
2480 disable_irq(adapter->pdev->irq);
2481 adapter->flags |= IXGBE_FLAG_IN_NETPOLL;
2482 ixgbe_intr(adapter->pdev->irq, netdev);
2483 adapter->flags &= ~IXGBE_FLAG_IN_NETPOLL;
2484 enable_irq(adapter->pdev->irq);
2485}
2486#endif
2487
2488/**
2489 * ixgbe_probe - Device Initialization Routine
2490 * @pdev: PCI device information struct
2491 * @ent: entry in ixgbe_pci_tbl
2492 *
2493 * Returns 0 on success, negative on failure
2494 *
2495 * ixgbe_probe initializes an adapter identified by a pci_dev structure.
2496 * The OS initialization, configuring of the adapter private structure,
2497 * and a hardware reset occur.
2498 **/
2499static int __devinit ixgbe_probe(struct pci_dev *pdev,
2500 const struct pci_device_id *ent)
2501{
2502 struct net_device *netdev;
2503 struct ixgbe_adapter *adapter = NULL;
2504 struct ixgbe_hw *hw;
2505 const struct ixgbe_info *ii = ixgbe_info_tbl[ent->driver_data];
2506 unsigned long mmio_start, mmio_len;
2507 static int cards_found;
2508 int i, err, pci_using_dac;
2509 u16 link_status, link_speed, link_width;
2510 u32 part_num;
2511
2512 err = pci_enable_device(pdev);
2513 if (err)
2514 return err;
2515
2516 if (!pci_set_dma_mask(pdev, DMA_64BIT_MASK) &&
2517 !pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK)) {
2518 pci_using_dac = 1;
2519 } else {
2520 err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
2521 if (err) {
2522 err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
2523 if (err) {
2524 dev_err(&pdev->dev, "No usable DMA "
2525 "configuration, aborting\n");
2526 goto err_dma;
2527 }
2528 }
2529 pci_using_dac = 0;
2530 }
2531
2532 err = pci_request_regions(pdev, ixgbe_driver_name);
2533 if (err) {
2534 dev_err(&pdev->dev, "pci_request_regions failed 0x%x\n", err);
2535 goto err_pci_reg;
2536 }
2537
2538 pci_set_master(pdev);
2539
2540 netdev = alloc_etherdev(sizeof(struct ixgbe_adapter));
2541 if (!netdev) {
2542 err = -ENOMEM;
2543 goto err_alloc_etherdev;
2544 }
2545
9a799d71
AK		 2546 SET_NETDEV_DEV(netdev, &pdev->dev);
2547
2548 pci_set_drvdata(pdev, netdev);
2549 adapter = netdev_priv(netdev);
2550
2551 adapter->netdev = netdev;
2552 adapter->pdev = pdev;
2553 hw = &adapter->hw;
2554 hw->back = adapter;
2555 adapter->msg_enable = (1 << DEFAULT_DEBUG_LEVEL_SHIFT) - 1;
2556
2557 mmio_start = pci_resource_start(pdev, 0);
2558 mmio_len = pci_resource_len(pdev, 0);
2559
2560 hw->hw_addr = ioremap(mmio_start, mmio_len);
2561 if (!hw->hw_addr) {
2562 err = -EIO;
2563 goto err_ioremap;
2564 }
2565
2566 for (i = 1; i <= 5; i++) {
2567 if (pci_resource_len(pdev, i) == 0)
2568 continue;
2569 }
2570
2571 netdev->open = &ixgbe_open;
2572 netdev->stop = &ixgbe_close;
2573 netdev->hard_start_xmit = &ixgbe_xmit_frame;
2574 netdev->get_stats = &ixgbe_get_stats;
2575 netdev->set_multicast_list = &ixgbe_set_multi;
2576 netdev->set_mac_address = &ixgbe_set_mac;
2577 netdev->change_mtu = &ixgbe_change_mtu;
2578 ixgbe_set_ethtool_ops(netdev);
2579 netdev->tx_timeout = &ixgbe_tx_timeout;
2580 netdev->watchdog_timeo = 5 * HZ;
2581 netif_napi_add(netdev, &adapter->napi, ixgbe_clean, 64);
2582 netdev->vlan_rx_register = ixgbe_vlan_rx_register;
2583 netdev->vlan_rx_add_vid = ixgbe_vlan_rx_add_vid;
2584 netdev->vlan_rx_kill_vid = ixgbe_vlan_rx_kill_vid;
2585#ifdef CONFIG_NET_POLL_CONTROLLER
2586 netdev->poll_controller = ixgbe_netpoll;
2587#endif
2588 strcpy(netdev->name, pci_name(pdev));
2589
2590 netdev->mem_start = mmio_start;
2591 netdev->mem_end = mmio_start + mmio_len;
2592
2593 adapter->bd_number = cards_found;
2594
2595 /* PCI config space info */
2596 hw->vendor_id = pdev->vendor;
2597 hw->device_id = pdev->device;
2598 hw->revision_id = pdev->revision;
2599 hw->subsystem_vendor_id = pdev->subsystem_vendor;
2600 hw->subsystem_device_id = pdev->subsystem_device;
2601
2602 /* Setup hw api */
2603 memcpy(&hw->mac.ops, ii->mac_ops, sizeof(hw->mac.ops));
2604 memcpy(&hw->phy.ops, ii->phy_ops, sizeof(hw->phy.ops));
2605
2606 err = ii->get_invariants(hw);
2607 if (err)
2608 goto err_hw_init;
2609
2610 /* setup the private structure */
2611 err = ixgbe_sw_init(adapter);
2612 if (err)
2613 goto err_sw_init;
2614
2615 netdev->features = NETIF_F_SG |
2616 NETIF_F_HW_CSUM |
2617 NETIF_F_HW_VLAN_TX |
2618 NETIF_F_HW_VLAN_RX |
2619 NETIF_F_HW_VLAN_FILTER;
2620
2621 netdev->features |= NETIF_F_TSO;
2622
2623 netdev->features |= NETIF_F_TSO6;
2624 if (pci_using_dac)
2625 netdev->features |= NETIF_F_HIGHDMA;
2626
2627
2628 /* make sure the EEPROM is good */
2629 if (ixgbe_validate_eeprom_checksum(hw, NULL) < 0) {
2630 dev_err(&pdev->dev, "The EEPROM Checksum Is Not Valid\n");
2631 err = -EIO;
2632 goto err_eeprom;
2633 }
2634
2635 memcpy(netdev->dev_addr, hw->mac.perm_addr, netdev->addr_len);
2636 memcpy(netdev->perm_addr, hw->mac.perm_addr, netdev->addr_len);
2637
2638 if (ixgbe_validate_mac_addr(netdev->dev_addr)) {
2639 err = -EIO;
2640 goto err_eeprom;
2641 }
2642
2643 init_timer(&adapter->watchdog_timer);
2644 adapter->watchdog_timer.function = &ixgbe_watchdog;
2645 adapter->watchdog_timer.data = (unsigned long)adapter;
2646
2647 INIT_WORK(&adapter->reset_task, ixgbe_reset_task);
2648
2649 /* initialize default flow control settings */
2650 hw->fc.original_type = ixgbe_fc_full;
2651 hw->fc.type = ixgbe_fc_full;
2652 hw->fc.high_water = IXGBE_DEFAULT_FCRTH;
2653 hw->fc.low_water = IXGBE_DEFAULT_FCRTL;
2654 hw->fc.pause_time = IXGBE_DEFAULT_FCPAUSE;
2655
2656 /* Interrupt Throttle Rate */
2657 adapter->rx_eitr = (1000000 / IXGBE_DEFAULT_ITR_RX_USECS);
2658 adapter->tx_eitr = (1000000 / IXGBE_DEFAULT_ITR_TX_USECS);
2659
2660 /* print bus type/speed/width info */
2661 pci_read_config_word(pdev, IXGBE_PCI_LINK_STATUS, &link_status);
2662 link_speed = link_status & IXGBE_PCI_LINK_SPEED;
2663 link_width = link_status & IXGBE_PCI_LINK_WIDTH;
2664 dev_info(&pdev->dev, "(PCI Express:%s:%s) "
2665 "%02x:%02x:%02x:%02x:%02x:%02x\n",
2666 ((link_speed == IXGBE_PCI_LINK_SPEED_5000) ? "5.0Gb/s" :
2667 (link_speed == IXGBE_PCI_LINK_SPEED_2500) ? "2.5Gb/s" :
2668 "Unknown"),
2669 ((link_width == IXGBE_PCI_LINK_WIDTH_8) ? "Width x8" :
2670 (link_width == IXGBE_PCI_LINK_WIDTH_4) ? "Width x4" :
2671 (link_width == IXGBE_PCI_LINK_WIDTH_2) ? "Width x2" :
2672 (link_width == IXGBE_PCI_LINK_WIDTH_1) ? "Width x1" :
2673 "Unknown"),
2674 netdev->dev_addr[0], netdev->dev_addr[1], netdev->dev_addr[2],
2675 netdev->dev_addr[3], netdev->dev_addr[4], netdev->dev_addr[5]);
2676 ixgbe_read_part_num(hw, &part_num);
2677 dev_info(&pdev->dev, "MAC: %d, PHY: %d, PBA No: %06x-%03x\n",
2678 hw->mac.type, hw->phy.type,
2679 (part_num >> 8), (part_num & 0xff));
2680
2681 /* reset the hardware with the new settings */
2682 ixgbe_start_hw(hw);
2683
2684 netif_carrier_off(netdev);
2685 netif_stop_queue(netdev);
2686
2687 strcpy(netdev->name, "eth%d");
2688 err = register_netdev(netdev);
2689 if (err)
2690 goto err_register;
2691
2692
2693 dev_info(&pdev->dev, "Intel(R) 10 Gigabit Network Connection\n");
2694 cards_found++;
2695 return 0;
2696
2697err_register:
2698err_hw_init:
2699err_sw_init:
2700err_eeprom:
2701 iounmap(hw->hw_addr);
2702err_ioremap:
2703 free_netdev(netdev);
2704err_alloc_etherdev:
2705 pci_release_regions(pdev);
2706err_pci_reg:
2707err_dma:
2708 pci_disable_device(pdev);
2709 return err;
2710}
2711
2712/**
2713 * ixgbe_remove - Device Removal Routine
2714 * @pdev: PCI device information struct
2715 *
2716 * ixgbe_remove is called by the PCI subsystem to alert the driver
2717 * that it should release a PCI device. The could be caused by a
2718 * Hot-Plug event, or because the driver is going to be removed from
2719 * memory.
2720 **/
2721static void __devexit ixgbe_remove(struct pci_dev *pdev)
2722{
2723 struct net_device *netdev = pci_get_drvdata(pdev);
2724 struct ixgbe_adapter *adapter = netdev_priv(netdev);
2725
2726 set_bit(__IXGBE_DOWN, &adapter->state);
2727 del_timer_sync(&adapter->watchdog_timer);
2728
2729 flush_scheduled_work();
2730
2731 unregister_netdev(netdev);
2732
2733 kfree(adapter->tx_ring);
2734 kfree(adapter->rx_ring);
2735
2736 iounmap(adapter->hw.hw_addr);
2737 pci_release_regions(pdev);
2738
2739 free_netdev(netdev);
2740
2741 pci_disable_device(pdev);
2742}
2743
2744/**
2745 * ixgbe_io_error_detected - called when PCI error is detected
2746 * @pdev: Pointer to PCI device
2747 * @state: The current pci connection state
2748 *
2749 * This function is called after a PCI bus error affecting
2750 * this device has been detected.
2751 */
2752static pci_ers_result_t ixgbe_io_error_detected(struct pci_dev *pdev,
2753 pci_channel_state_t state)
2754{
2755 struct net_device *netdev = pci_get_drvdata(pdev);
2756 struct ixgbe_adapter *adapter = netdev->priv;
2757
2758 netif_device_detach(netdev);
2759
2760 if (netif_running(netdev))
2761 ixgbe_down(adapter);
2762 pci_disable_device(pdev);
2763
2764 /* Request a slot slot reset. */
2765 return PCI_ERS_RESULT_NEED_RESET;
2766}
2767
2768/**
2769 * ixgbe_io_slot_reset - called after the pci bus has been reset.
2770 * @pdev: Pointer to PCI device
2771 *
2772 * Restart the card from scratch, as if from a cold-boot.
2773 */
2774static pci_ers_result_t ixgbe_io_slot_reset(struct pci_dev *pdev)
2775{
2776 struct net_device *netdev = pci_get_drvdata(pdev);
2777 struct ixgbe_adapter *adapter = netdev->priv;
2778
2779 if (pci_enable_device(pdev)) {
2780 DPRINTK(PROBE, ERR,
2781 "Cannot re-enable PCI device after reset.\n");
2782 return PCI_ERS_RESULT_DISCONNECT;
2783 }
2784 pci_set_master(pdev);
2785
2786 pci_enable_wake(pdev, PCI_D3hot, 0);
2787 pci_enable_wake(pdev, PCI_D3cold, 0);
2788
2789 ixgbe_reset(adapter);
2790
2791 return PCI_ERS_RESULT_RECOVERED;
2792}
2793
2794/**
2795 * ixgbe_io_resume - called when traffic can start flowing again.
2796 * @pdev: Pointer to PCI device
2797 *
2798 * This callback is called when the error recovery driver tells us that
2799 * its OK to resume normal operation.
2800 */
2801static void ixgbe_io_resume(struct pci_dev *pdev)
2802{
2803 struct net_device *netdev = pci_get_drvdata(pdev);
2804 struct ixgbe_adapter *adapter = netdev->priv;
2805
2806 if (netif_running(netdev)) {
2807 if (ixgbe_up(adapter)) {
2808 DPRINTK(PROBE, INFO, "ixgbe_up failed after reset\n");
2809 return;
2810 }
2811 }
2812
2813 netif_device_attach(netdev);
2814
2815}
2816
2817static struct pci_error_handlers ixgbe_err_handler = {
2818 .error_detected = ixgbe_io_error_detected,
2819 .slot_reset = ixgbe_io_slot_reset,
2820 .resume = ixgbe_io_resume,
2821};
2822
2823static struct pci_driver ixgbe_driver = {
2824 .name = ixgbe_driver_name,
2825 .id_table = ixgbe_pci_tbl,
2826 .probe = ixgbe_probe,
2827 .remove = __devexit_p(ixgbe_remove),
2828#ifdef CONFIG_PM
2829 .suspend = ixgbe_suspend,
2830 .resume = ixgbe_resume,
2831#endif
2832 .shutdown = ixgbe_shutdown,
2833 .err_handler = &ixgbe_err_handler
2834};
2835
2836/**
2837 * ixgbe_init_module - Driver Registration Routine
2838 *
2839 * ixgbe_init_module is the first routine called when the driver is
2840 * loaded. All it does is register with the PCI subsystem.
2841 **/
2842static int __init ixgbe_init_module(void)
2843{
2844 int ret;
2845 printk(KERN_INFO "%s: %s - version %s\n", ixgbe_driver_name,
2846 ixgbe_driver_string, ixgbe_driver_version);
2847
2848 printk(KERN_INFO "%s: %s\n", ixgbe_driver_name, ixgbe_copyright);
2849
2850 ret = pci_register_driver(&ixgbe_driver);
2851 return ret;
2852}
2853module_init(ixgbe_init_module);
2854
2855/**
2856 * ixgbe_exit_module - Driver Exit Cleanup Routine
2857 *
2858 * ixgbe_exit_module is called just before the driver is removed
2859 * from memory.
2860 **/
2861static void __exit ixgbe_exit_module(void)
2862{
2863 pci_unregister_driver(&ixgbe_driver);
2864}
2865module_exit(ixgbe_exit_module);
2866
2867/* ixgbe_main.c */
Linux 6.x block layer and io_uring tree(s)