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e1000e: Fix logic reversal keeping link active
[linux-2.6-block.git] / drivers / net / ixgbe / ixgbe_main.c
CommitLineData
9a799d71
AK		 1/*******************************************************************************
2
3 Intel 10 Gigabit PCI Express Linux driver
4 Copyright(c) 1999 - 2007 Intel Corporation.
5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 more details.
14
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
22 Contact Information:
23 Linux NICS <linux.nics@intel.com>
24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27*******************************************************************************/
28
29#include <linux/types.h>
30#include <linux/module.h>
31#include <linux/pci.h>
32#include <linux/netdevice.h>
33#include <linux/vmalloc.h>
34#include <linux/string.h>
35#include <linux/in.h>
36#include <linux/ip.h>
37#include <linux/tcp.h>
38#include <linux/ipv6.h>
39#include <net/checksum.h>
40#include <net/ip6_checksum.h>
41#include <linux/ethtool.h>
42#include <linux/if_vlan.h>
43
44#include "ixgbe.h"
45#include "ixgbe_common.h"
46
47char ixgbe_driver_name[] = "ixgbe";
9c8eb720
SH		 48static const char ixgbe_driver_string[] =
49 "Intel(R) 10 Gigabit PCI Express Network Driver";
9a799d71
AK		 50
51#define DRV_VERSION "1.1.18"
9c8eb720
SH		 52const char ixgbe_driver_version[] = DRV_VERSION;
53static const char ixgbe_copyright[] =
54 "Copyright (c) 1999-2007 Intel Corporation.";
9a799d71
AK		 55
56static const struct ixgbe_info *ixgbe_info_tbl[] = {
3957d63d 57 [board_82598] = &ixgbe_82598_info,
9a799d71
AK		 58};
59
60/* ixgbe_pci_tbl - PCI Device ID Table
61 *
62 * Wildcard entries (PCI_ANY_ID) should come last
63 * Last entry must be all 0s
64 *
65 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
66 * Class, Class Mask, private data (not used) }
67 */
68static struct pci_device_id ixgbe_pci_tbl[] = {
69 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_DUAL_PORT),
3957d63d 70 board_82598 },
9a799d71 71 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_SINGLE_PORT),
3957d63d 72 board_82598 },
9a799d71 73 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AT_DUAL_PORT),
3957d63d 74 board_82598 },
9a799d71 75 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_CX4),
3957d63d 76 board_82598 },
9a799d71
AK		 77
78 /* required last entry */
79 {0, }
80};
81MODULE_DEVICE_TABLE(pci, ixgbe_pci_tbl);
82
83MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
84MODULE_DESCRIPTION("Intel(R) 10 Gigabit PCI Express Network Driver");
85MODULE_LICENSE("GPL");
86MODULE_VERSION(DRV_VERSION);
87
88#define DEFAULT_DEBUG_LEVEL_SHIFT 3
89
5eba3699
AV		 90static void ixgbe_release_hw_control(struct ixgbe_adapter *adapter)
91{
92 u32 ctrl_ext;
93
94 /* Let firmware take over control of h/w */
95 ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
96 IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT,
97 ctrl_ext & ~IXGBE_CTRL_EXT_DRV_LOAD);
98}
99
100static void ixgbe_get_hw_control(struct ixgbe_adapter *adapter)
101{
102 u32 ctrl_ext;
103
104 /* Let firmware know the driver has taken over */
105 ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
106 IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT,
107 ctrl_ext | IXGBE_CTRL_EXT_DRV_LOAD);
108}
9a799d71
AK		 109
110#ifdef DEBUG
111/**
112 * ixgbe_get_hw_dev_name - return device name string
113 * used by hardware layer to print debugging information
114 **/
115char *ixgbe_get_hw_dev_name(struct ixgbe_hw *hw)
116{
117 struct ixgbe_adapter *adapter = hw->back;
118 struct net_device *netdev = adapter->netdev;
119 return netdev->name;
120}
121#endif
122
123static void ixgbe_set_ivar(struct ixgbe_adapter *adapter, u16 int_alloc_entry,
124 u8 msix_vector)
125{
126 u32 ivar, index;
127
128 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
129 index = (int_alloc_entry >> 2) & 0x1F;
130 ivar = IXGBE_READ_REG(&adapter->hw, IXGBE_IVAR(index));
131 ivar &= ~(0xFF << (8 * (int_alloc_entry & 0x3)));
132 ivar |= (msix_vector << (8 * (int_alloc_entry & 0x3)));
133 IXGBE_WRITE_REG(&adapter->hw, IXGBE_IVAR(index), ivar);
134}
135
136static void ixgbe_unmap_and_free_tx_resource(struct ixgbe_adapter *adapter,
137 struct ixgbe_tx_buffer
138 *tx_buffer_info)
139{
140 if (tx_buffer_info->dma) {
141 pci_unmap_page(adapter->pdev,
142 tx_buffer_info->dma,
143 tx_buffer_info->length, PCI_DMA_TODEVICE);
144 tx_buffer_info->dma = 0;
145 }
146 if (tx_buffer_info->skb) {
147 dev_kfree_skb_any(tx_buffer_info->skb);
148 tx_buffer_info->skb = NULL;
149 }
150 /* tx_buffer_info must be completely set up in the transmit path */
151}
152
153static inline bool ixgbe_check_tx_hang(struct ixgbe_adapter *adapter,
154 struct ixgbe_ring *tx_ring,
155 unsigned int eop,
156 union ixgbe_adv_tx_desc *eop_desc)
157{
158 /* Detect a transmit hang in hardware, this serializes the
159 * check with the clearing of time_stamp and movement of i */
160 adapter->detect_tx_hung = false;
161 if (tx_ring->tx_buffer_info[eop].dma &&
162 time_after(jiffies, tx_ring->tx_buffer_info[eop].time_stamp + HZ) &&
163 !(IXGBE_READ_REG(&adapter->hw, IXGBE_TFCS) & IXGBE_TFCS_TXOFF)) {
164 /* detected Tx unit hang */
165 DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n"
166 " TDH <%x>\n"
167 " TDT <%x>\n"
168 " next_to_use <%x>\n"
169 " next_to_clean <%x>\n"
170 "tx_buffer_info[next_to_clean]\n"
171 " time_stamp <%lx>\n"
172 " next_to_watch <%x>\n"
173 " jiffies <%lx>\n"
174 " next_to_watch.status <%x>\n",
175 readl(adapter->hw.hw_addr + tx_ring->head),
176 readl(adapter->hw.hw_addr + tx_ring->tail),
177 tx_ring->next_to_use,
178 tx_ring->next_to_clean,
179 tx_ring->tx_buffer_info[eop].time_stamp,
180 eop, jiffies, eop_desc->wb.status);
181 return true;
182 }
183
184 return false;
185}
186
e092be60
AV		 187#define IXGBE_MAX_TXD_PWR 14
188#define IXGBE_MAX_DATA_PER_TXD (1 << IXGBE_MAX_TXD_PWR)
189
190/* Tx Descriptors needed, worst case */
191#define TXD_USE_COUNT(S) (((S) >> IXGBE_MAX_TXD_PWR) + \
192 (((S) & (IXGBE_MAX_DATA_PER_TXD - 1)) ? 1 : 0))
193#define DESC_NEEDED (TXD_USE_COUNT(IXGBE_MAX_DATA_PER_TXD) /* skb->data */ + \
194 MAX_SKB_FRAGS * TXD_USE_COUNT(PAGE_SIZE) + 1) /* for context */
195
9a799d71
AK		 196/**
197 * ixgbe_clean_tx_irq - Reclaim resources after transmit completes
198 * @adapter: board private structure
199 **/
200static bool ixgbe_clean_tx_irq(struct ixgbe_adapter *adapter,
201 struct ixgbe_ring *tx_ring)
202{
203 struct net_device *netdev = adapter->netdev;
204 union ixgbe_adv_tx_desc *tx_desc, *eop_desc;
205 struct ixgbe_tx_buffer *tx_buffer_info;
206 unsigned int i, eop;
207 bool cleaned = false;
e092be60 208 unsigned int total_tx_bytes = 0, total_tx_packets = 0;
9a799d71
AK		 209
210 i = tx_ring->next_to_clean;
211 eop = tx_ring->tx_buffer_info[i].next_to_watch;
212 eop_desc = IXGBE_TX_DESC_ADV(*tx_ring, eop);
213 while (eop_desc->wb.status & cpu_to_le32(IXGBE_TXD_STAT_DD)) {
e092be60
AV		 214 cleaned = false;
215 while (!cleaned) {
9a799d71
AK		 216 tx_desc = IXGBE_TX_DESC_ADV(*tx_ring, i);
217 tx_buffer_info = &tx_ring->tx_buffer_info[i];
218 cleaned = (i == eop);
219
220 tx_ring->stats.bytes += tx_buffer_info->length;
e092be60
AV		 221 if (cleaned) {
222 struct sk_buff *skb = tx_buffer_info->skb;
223#ifdef NETIF_F_TSO
224 unsigned int segs, bytecount;
225 segs = skb_shinfo(skb)->gso_segs ?: 1;
226 /* multiply data chunks by size of headers */
227 bytecount = ((segs - 1) * skb_headlen(skb)) +
228 skb->len;
229 total_tx_packets += segs;
230 total_tx_bytes += bytecount;
231#else
232 total_tx_packets++;
233 total_tx_bytes += skb->len;
234#endif
235 }
9a799d71
AK		 236 ixgbe_unmap_and_free_tx_resource(adapter,
237 tx_buffer_info);
238 tx_desc->wb.status = 0;
239
240 i++;
241 if (i == tx_ring->count)
242 i = 0;
243 }
244
245 tx_ring->stats.packets++;
246
247 eop = tx_ring->tx_buffer_info[i].next_to_watch;
248 eop_desc = IXGBE_TX_DESC_ADV(*tx_ring, eop);
249
250 /* weight of a sort for tx, avoid endless transmit cleanup */
e092be60 251 if (total_tx_packets >= tx_ring->work_limit)
9a799d71
AK		 252 break;
253 }
254
255 tx_ring->next_to_clean = i;
256
e092be60
AV		 257#define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
258 if (total_tx_packets && netif_carrier_ok(netdev) &&
259 (IXGBE_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD)) {
260 /* Make sure that anybody stopping the queue after this
261 * sees the new next_to_clean.
262 */
263 smp_mb();
264 if (netif_queue_stopped(netdev) &&
265 !test_bit(__IXGBE_DOWN, &adapter->state)) {
266 netif_wake_queue(netdev);
267 adapter->restart_queue++;
268 }
269 }
9a799d71
AK		 270
271 if (adapter->detect_tx_hung)
272 if (ixgbe_check_tx_hang(adapter, tx_ring, eop, eop_desc))
273 netif_stop_queue(netdev);
274
e092be60 275 if (total_tx_packets >= tx_ring->work_limit)
9a799d71
AK		 276 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS, tx_ring->eims_value);
277
d2f4fbe2
AV		 278 adapter->net_stats.tx_bytes += total_tx_bytes;
279 adapter->net_stats.tx_packets += total_tx_packets;
e092be60 280 cleaned = total_tx_packets ? true : false;
9a799d71
AK		 281 return cleaned;
282}
283
284/**
285 * ixgbe_receive_skb - Send a completed packet up the stack
286 * @adapter: board private structure
287 * @skb: packet to send up
288 * @is_vlan: packet has a VLAN tag
289 * @tag: VLAN tag from descriptor
290 **/
291static void ixgbe_receive_skb(struct ixgbe_adapter *adapter,
292 struct sk_buff *skb, bool is_vlan,
293 u16 tag)
294{
295 if (!(adapter->flags & IXGBE_FLAG_IN_NETPOLL)) {
296 if (adapter->vlgrp && is_vlan)
297 vlan_hwaccel_receive_skb(skb, adapter->vlgrp, tag);
298 else
299 netif_receive_skb(skb);
300 } else {
301
302 if (adapter->vlgrp && is_vlan)
303 vlan_hwaccel_rx(skb, adapter->vlgrp, tag);
304 else
305 netif_rx(skb);
306 }
307}
308
e59bd25d
AV		 309/**
310 * ixgbe_rx_checksum - indicate in skb if hw indicated a good cksum
311 * @adapter: address of board private structure
312 * @status_err: hardware indication of status of receive
313 * @skb: skb currently being received and modified
314 **/
9a799d71
AK		 315static inline void ixgbe_rx_checksum(struct ixgbe_adapter *adapter,
316 u32 status_err,
317 struct sk_buff *skb)
318{
319 skb->ip_summed = CHECKSUM_NONE;
320
e59bd25d 321 /* Ignore Checksum bit is set, or rx csum disabled */
9a799d71 322 if ((status_err & IXGBE_RXD_STAT_IXSM) ||
e59bd25d 323 !(adapter->flags & IXGBE_FLAG_RX_CSUM_ENABLED))
9a799d71 324 return;
e59bd25d
AV		 325
326 /* if IP and error */
327 if ((status_err & IXGBE_RXD_STAT_IPCS) &&
328 (status_err & IXGBE_RXDADV_ERR_IPE)) {
9a799d71
AK		 329 adapter->hw_csum_rx_error++;
330 return;
331 }
e59bd25d
AV		 332
333 if (!(status_err & IXGBE_RXD_STAT_L4CS))
334 return;
335
336 if (status_err & IXGBE_RXDADV_ERR_TCPE) {
337 adapter->hw_csum_rx_error++;
338 return;
339 }
340
9a799d71 341 /* It must be a TCP or UDP packet with a valid checksum */
e59bd25d 342 skb->ip_summed = CHECKSUM_UNNECESSARY;
9a799d71
AK		 343 adapter->hw_csum_rx_good++;
344}
345
346/**
347 * ixgbe_alloc_rx_buffers - Replace used receive buffers; packet split
348 * @adapter: address of board private structure
349 **/
350static void ixgbe_alloc_rx_buffers(struct ixgbe_adapter *adapter,
351 struct ixgbe_ring *rx_ring,
352 int cleaned_count)
353{
354 struct net_device *netdev = adapter->netdev;
355 struct pci_dev *pdev = adapter->pdev;
356 union ixgbe_adv_rx_desc *rx_desc;
357 struct ixgbe_rx_buffer *rx_buffer_info;
358 struct sk_buff *skb;
359 unsigned int i;
360 unsigned int bufsz = adapter->rx_buf_len + NET_IP_ALIGN;
361
362 i = rx_ring->next_to_use;
363 rx_buffer_info = &rx_ring->rx_buffer_info[i];
364
365 while (cleaned_count--) {
366 rx_desc = IXGBE_RX_DESC_ADV(*rx_ring, i);
367
368 if (!rx_buffer_info->page &&
369 (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED)) {
370 rx_buffer_info->page = alloc_page(GFP_ATOMIC);
371 if (!rx_buffer_info->page) {
372 adapter->alloc_rx_page_failed++;
373 goto no_buffers;
374 }
375 rx_buffer_info->page_dma =
376 pci_map_page(pdev, rx_buffer_info->page,
377 0, PAGE_SIZE, PCI_DMA_FROMDEVICE);
378 }
379
380 if (!rx_buffer_info->skb) {
381 skb = netdev_alloc_skb(netdev, bufsz);
382
383 if (!skb) {
384 adapter->alloc_rx_buff_failed++;
385 goto no_buffers;
386 }
387
388 /*
389 * Make buffer alignment 2 beyond a 16 byte boundary
390 * this will result in a 16 byte aligned IP header after
391 * the 14 byte MAC header is removed
392 */
393 skb_reserve(skb, NET_IP_ALIGN);
394
395 rx_buffer_info->skb = skb;
396 rx_buffer_info->dma = pci_map_single(pdev, skb->data,
397 bufsz,
398 PCI_DMA_FROMDEVICE);
399 }
400 /* Refresh the desc even if buffer_addrs didn't change because
401 * each write-back erases this info. */
402 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
403 rx_desc->read.pkt_addr =
404 cpu_to_le64(rx_buffer_info->page_dma);
405 rx_desc->read.hdr_addr =
406 cpu_to_le64(rx_buffer_info->dma);
407 } else {
408 rx_desc->read.pkt_addr =
409 cpu_to_le64(rx_buffer_info->dma);
410 }
411
412 i++;
413 if (i == rx_ring->count)
414 i = 0;
415 rx_buffer_info = &rx_ring->rx_buffer_info[i];
416 }
417no_buffers:
418 if (rx_ring->next_to_use != i) {
419 rx_ring->next_to_use = i;
420 if (i-- == 0)
421 i = (rx_ring->count - 1);
422
423 /*
424 * Force memory writes to complete before letting h/w
425 * know there are new descriptors to fetch. (Only
426 * applicable for weak-ordered memory model archs,
427 * such as IA-64).
428 */
429 wmb();
430 writel(i, adapter->hw.hw_addr + rx_ring->tail);
431 }
432}
433
434static bool ixgbe_clean_rx_irq(struct ixgbe_adapter *adapter,
435 struct ixgbe_ring *rx_ring,
436 int *work_done, int work_to_do)
437{
438 struct net_device *netdev = adapter->netdev;
439 struct pci_dev *pdev = adapter->pdev;
440 union ixgbe_adv_rx_desc *rx_desc, *next_rxd;
441 struct ixgbe_rx_buffer *rx_buffer_info, *next_buffer;
442 struct sk_buff *skb;
443 unsigned int i;
444 u32 upper_len, len, staterr;
445 u16 hdr_info, vlan_tag;
446 bool is_vlan, cleaned = false;
447 int cleaned_count = 0;
d2f4fbe2 448 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
9a799d71
AK		 449
450 i = rx_ring->next_to_clean;
451 upper_len = 0;
452 rx_desc = IXGBE_RX_DESC_ADV(*rx_ring, i);
453 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
454 rx_buffer_info = &rx_ring->rx_buffer_info[i];
455 is_vlan = (staterr & IXGBE_RXD_STAT_VP);
456 vlan_tag = le16_to_cpu(rx_desc->wb.upper.vlan);
457
458 while (staterr & IXGBE_RXD_STAT_DD) {
459 if (*work_done >= work_to_do)
460 break;
461 (*work_done)++;
462
463 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
464 hdr_info =
465 le16_to_cpu(rx_desc->wb.lower.lo_dword.hdr_info);
466 len =
467 ((hdr_info & IXGBE_RXDADV_HDRBUFLEN_MASK) >>
468 IXGBE_RXDADV_HDRBUFLEN_SHIFT);
469 if (hdr_info & IXGBE_RXDADV_SPH)
470 adapter->rx_hdr_split++;
471 if (len > IXGBE_RX_HDR_SIZE)
472 len = IXGBE_RX_HDR_SIZE;
473 upper_len = le16_to_cpu(rx_desc->wb.upper.length);
474 } else
475 len = le16_to_cpu(rx_desc->wb.upper.length);
476
477 cleaned = true;
478 skb = rx_buffer_info->skb;
479 prefetch(skb->data - NET_IP_ALIGN);
480 rx_buffer_info->skb = NULL;
481
482 if (len && !skb_shinfo(skb)->nr_frags) {
483 pci_unmap_single(pdev, rx_buffer_info->dma,
484 adapter->rx_buf_len + NET_IP_ALIGN,
485 PCI_DMA_FROMDEVICE);
486 skb_put(skb, len);
487 }
488
489 if (upper_len) {
490 pci_unmap_page(pdev, rx_buffer_info->page_dma,
491 PAGE_SIZE, PCI_DMA_FROMDEVICE);
492 rx_buffer_info->page_dma = 0;
493 skb_fill_page_desc(skb, skb_shinfo(skb)->nr_frags,
494 rx_buffer_info->page, 0, upper_len);
495 rx_buffer_info->page = NULL;
496
497 skb->len += upper_len;
498 skb->data_len += upper_len;
499 skb->truesize += upper_len;
500 }
501
502 i++;
503 if (i == rx_ring->count)
504 i = 0;
505 next_buffer = &rx_ring->rx_buffer_info[i];
506
507 next_rxd = IXGBE_RX_DESC_ADV(*rx_ring, i);
508 prefetch(next_rxd);
509
510 cleaned_count++;
511 if (staterr & IXGBE_RXD_STAT_EOP) {
512 rx_ring->stats.packets++;
513 rx_ring->stats.bytes += skb->len;
514 } else {
515 rx_buffer_info->skb = next_buffer->skb;
516 rx_buffer_info->dma = next_buffer->dma;
517 next_buffer->skb = skb;
518 adapter->non_eop_descs++;
519 goto next_desc;
520 }
521
522 if (staterr & IXGBE_RXDADV_ERR_FRAME_ERR_MASK) {
523 dev_kfree_skb_irq(skb);
524 goto next_desc;
525 }
526
527 ixgbe_rx_checksum(adapter, staterr, skb);
d2f4fbe2
AV		 528
529 /* probably a little skewed due to removing CRC */
530 total_rx_bytes += skb->len;
531 total_rx_packets++;
532
9a799d71
AK		 533 skb->protocol = eth_type_trans(skb, netdev);
534 ixgbe_receive_skb(adapter, skb, is_vlan, vlan_tag);
535 netdev->last_rx = jiffies;
536
537next_desc:
538 rx_desc->wb.upper.status_error = 0;
539
540 /* return some buffers to hardware, one at a time is too slow */
541 if (cleaned_count >= IXGBE_RX_BUFFER_WRITE) {
542 ixgbe_alloc_rx_buffers(adapter, rx_ring, cleaned_count);
543 cleaned_count = 0;
544 }
545
546 /* use prefetched values */
547 rx_desc = next_rxd;
548 rx_buffer_info = next_buffer;
549
550 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
551 is_vlan = (staterr & IXGBE_RXD_STAT_VP);
552 vlan_tag = le16_to_cpu(rx_desc->wb.upper.vlan);
553 }
554
555 rx_ring->next_to_clean = i;
556 cleaned_count = IXGBE_DESC_UNUSED(rx_ring);
557
558 if (cleaned_count)
559 ixgbe_alloc_rx_buffers(adapter, rx_ring, cleaned_count);
560
d2f4fbe2
AV		 561 adapter->net_stats.rx_bytes += total_rx_bytes;
562 adapter->net_stats.rx_packets += total_rx_packets;
563
9a799d71
AK		 564 return cleaned;
565}
566
567#define IXGBE_MAX_INTR 10
568/**
569 * ixgbe_configure_msix - Configure MSI-X hardware
570 * @adapter: board private structure
571 *
572 * ixgbe_configure_msix sets up the hardware to properly generate MSI-X
573 * interrupts.
574 **/
575static void ixgbe_configure_msix(struct ixgbe_adapter *adapter)
576{
577 int i, vector = 0;
578
579 for (i = 0; i < adapter->num_tx_queues; i++) {
580 ixgbe_set_ivar(adapter, IXGBE_IVAR_TX_QUEUE(i),
581 IXGBE_MSIX_VECTOR(vector));
582 writel(EITR_INTS_PER_SEC_TO_REG(adapter->tx_eitr),
583 adapter->hw.hw_addr + adapter->tx_ring[i].itr_register);
584 vector++;
585 }
586
587 for (i = 0; i < adapter->num_rx_queues; i++) {
588 ixgbe_set_ivar(adapter, IXGBE_IVAR_RX_QUEUE(i),
589 IXGBE_MSIX_VECTOR(vector));
590 writel(EITR_INTS_PER_SEC_TO_REG(adapter->rx_eitr),
591 adapter->hw.hw_addr + adapter->rx_ring[i].itr_register);
592 vector++;
593 }
594
595 vector = adapter->num_tx_queues + adapter->num_rx_queues;
596 ixgbe_set_ivar(adapter, IXGBE_IVAR_OTHER_CAUSES_INDEX,
597 IXGBE_MSIX_VECTOR(vector));
598 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITR(vector), 1950);
599}
600
601static irqreturn_t ixgbe_msix_lsc(int irq, void *data)
602{
603 struct net_device *netdev = data;
604 struct ixgbe_adapter *adapter = netdev_priv(netdev);
605 struct ixgbe_hw *hw = &adapter->hw;
606 u32 eicr = IXGBE_READ_REG(hw, IXGBE_EICR);
607
608 if (eicr & IXGBE_EICR_LSC) {
609 adapter->lsc_int++;
610 if (!test_bit(__IXGBE_DOWN, &adapter->state))
611 mod_timer(&adapter->watchdog_timer, jiffies);
612 }
d4f80882
AV		 613
614 if (!test_bit(__IXGBE_DOWN, &adapter->state))
615 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMS_OTHER);
9a799d71
AK		 616
617 return IRQ_HANDLED;
618}
619
620static irqreturn_t ixgbe_msix_clean_tx(int irq, void *data)
621{
622 struct ixgbe_ring *txr = data;
623 struct ixgbe_adapter *adapter = txr->adapter;
624
625 ixgbe_clean_tx_irq(adapter, txr);
626
627 return IRQ_HANDLED;
628}
629
630static irqreturn_t ixgbe_msix_clean_rx(int irq, void *data)
631{
632 struct ixgbe_ring *rxr = data;
633 struct ixgbe_adapter *adapter = rxr->adapter;
634
635 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, rxr->eims_value);
636 netif_rx_schedule(adapter->netdev, &adapter->napi);
637 return IRQ_HANDLED;
638}
639
640static int ixgbe_clean_rxonly(struct napi_struct *napi, int budget)
641{
642 struct ixgbe_adapter *adapter = container_of(napi,
643 struct ixgbe_adapter, napi);
644 struct net_device *netdev = adapter->netdev;
645 int work_done = 0;
646 struct ixgbe_ring *rxr = adapter->rx_ring;
647
648 /* Keep link state information with original netdev */
649 if (!netif_carrier_ok(netdev))
650 goto quit_polling;
651
652 ixgbe_clean_rx_irq(adapter, rxr, &work_done, budget);
653
654 /* If no Tx and not enough Rx work done, exit the polling mode */
655 if ((work_done < budget) || !netif_running(netdev)) {
656quit_polling:
657 netif_rx_complete(netdev, napi);
658 if (!test_bit(__IXGBE_DOWN, &adapter->state))
659 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS,
660 rxr->eims_value);
661 }
662
663 return work_done;
664}
665
666/**
667 * ixgbe_setup_msix - Initialize MSI-X interrupts
668 *
669 * ixgbe_setup_msix allocates MSI-X vectors and requests
670 * interrutps from the kernel.
671 **/
672static int ixgbe_setup_msix(struct ixgbe_adapter *adapter)
673{
674 struct net_device *netdev = adapter->netdev;
675 int i, int_vector = 0, err = 0;
676 int max_msix_count;
677
678 /* +1 for the LSC interrupt */
679 max_msix_count = adapter->num_rx_queues + adapter->num_tx_queues + 1;
680 adapter->msix_entries = kcalloc(max_msix_count,
681 sizeof(struct msix_entry), GFP_KERNEL);
682 if (!adapter->msix_entries)
683 return -ENOMEM;
684
685 for (i = 0; i < max_msix_count; i++)
686 adapter->msix_entries[i].entry = i;
687
688 err = pci_enable_msix(adapter->pdev, adapter->msix_entries,
689 max_msix_count);
690 if (err)
691 goto out;
692
693 for (i = 0; i < adapter->num_tx_queues; i++) {
694 sprintf(adapter->tx_ring[i].name, "%s-tx%d", netdev->name, i);
695 err = request_irq(adapter->msix_entries[int_vector].vector,
696 &ixgbe_msix_clean_tx,
697 0,
698 adapter->tx_ring[i].name,
699 &(adapter->tx_ring[i]));
700 if (err) {
701 DPRINTK(PROBE, ERR,
702 "request_irq failed for MSIX interrupt "
703 "Error: %d\n", err);
704 goto release_irqs;
705 }
706 adapter->tx_ring[i].eims_value =
707 (1 << IXGBE_MSIX_VECTOR(int_vector));
708 adapter->tx_ring[i].itr_register = IXGBE_EITR(int_vector);
709 int_vector++;
710 }
711
712 for (i = 0; i < adapter->num_rx_queues; i++) {
713 if (strlen(netdev->name) < (IFNAMSIZ - 5))
714 sprintf(adapter->rx_ring[i].name,
715 "%s-rx%d", netdev->name, i);
716 else
717 memcpy(adapter->rx_ring[i].name,
718 netdev->name, IFNAMSIZ);
719 err = request_irq(adapter->msix_entries[int_vector].vector,
720 &ixgbe_msix_clean_rx, 0,
721 adapter->rx_ring[i].name,
722 &(adapter->rx_ring[i]));
723 if (err) {
724 DPRINTK(PROBE, ERR,
725 "request_irq failed for MSIX interrupt "
726 "Error: %d\n", err);
727 goto release_irqs;
728 }
729
730 adapter->rx_ring[i].eims_value =
731 (1 << IXGBE_MSIX_VECTOR(int_vector));
732 adapter->rx_ring[i].itr_register = IXGBE_EITR(int_vector);
733 int_vector++;
734 }
735
736 sprintf(adapter->lsc_name, "%s-lsc", netdev->name);
737 err = request_irq(adapter->msix_entries[int_vector].vector,
738 &ixgbe_msix_lsc, 0, adapter->lsc_name, netdev);
739 if (err) {
740 DPRINTK(PROBE, ERR,
741 "request_irq for msix_lsc failed: %d\n", err);
742 goto release_irqs;
743 }
744
745 /* FIXME: implement netif_napi_remove() instead */
746 adapter->napi.poll = ixgbe_clean_rxonly;
747 adapter->flags |= IXGBE_FLAG_MSIX_ENABLED;
748 return 0;
749
750release_irqs:
751 int_vector--;
752 for (; int_vector >= adapter->num_tx_queues; int_vector--)
753 free_irq(adapter->msix_entries[int_vector].vector,
754 &(adapter->rx_ring[int_vector -
755 adapter->num_tx_queues]));
756
757 for (; int_vector >= 0; int_vector--)
758 free_irq(adapter->msix_entries[int_vector].vector,
759 &(adapter->tx_ring[int_vector]));
760out:
761 kfree(adapter->msix_entries);
762 adapter->msix_entries = NULL;
763 adapter->flags &= ~IXGBE_FLAG_MSIX_ENABLED;
764 return err;
765}
766
767/**
768 * ixgbe_intr - Interrupt Handler
769 * @irq: interrupt number
770 * @data: pointer to a network interface device structure
771 * @pt_regs: CPU registers structure
772 **/
773static irqreturn_t ixgbe_intr(int irq, void *data)
774{
775 struct net_device *netdev = data;
776 struct ixgbe_adapter *adapter = netdev_priv(netdev);
777 struct ixgbe_hw *hw = &adapter->hw;
778 u32 eicr;
779
780 eicr = IXGBE_READ_REG(hw, IXGBE_EICR);
781
782 if (!eicr)
783 return IRQ_NONE; /* Not our interrupt */
784
785 if (eicr & IXGBE_EICR_LSC) {
786 adapter->lsc_int++;
787 if (!test_bit(__IXGBE_DOWN, &adapter->state))
788 mod_timer(&adapter->watchdog_timer, jiffies);
789 }
790 if (netif_rx_schedule_prep(netdev, &adapter->napi)) {
791 /* Disable interrupts and register for poll. The flush of the
792 * posted write is intentionally left out. */
9a799d71
AK		 793 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, ~0);
794 __netif_rx_schedule(netdev, &adapter->napi);
795 }
796
797 return IRQ_HANDLED;
798}
799
800/**
801 * ixgbe_request_irq - initialize interrupts
802 * @adapter: board private structure
803 *
804 * Attempts to configure interrupts using the best available
805 * capabilities of the hardware and kernel.
806 **/
807static int ixgbe_request_irq(struct ixgbe_adapter *adapter, u32 *num_rx_queues)
808{
809 struct net_device *netdev = adapter->netdev;
810 int flags, err;
28fc1f5a 811 irq_handler_t handler = ixgbe_intr;
9a799d71
AK		 812
813 flags = IRQF_SHARED;
814
815 err = ixgbe_setup_msix(adapter);
816 if (!err)
817 goto request_done;
818
819 /*
820 * if we can't do MSI-X, fall through and try MSI
821 * No need to reallocate memory since we're decreasing the number of
822 * queues. We just won't use the other ones, also it is freed correctly
823 * on ixgbe_remove.
824 */
825 *num_rx_queues = 1;
826
827 /* do MSI */
828 err = pci_enable_msi(adapter->pdev);
829 if (!err) {
830 adapter->flags |= IXGBE_FLAG_MSI_ENABLED;
831 flags &= ~IRQF_SHARED;
832 handler = &ixgbe_intr;
833 }
834
835 err = request_irq(adapter->pdev->irq, handler, flags,
836 netdev->name, netdev);
837 if (err)
838 DPRINTK(PROBE, ERR, "request_irq failed, Error %d\n", err);
839
840request_done:
841 return err;
842}
843
844static void ixgbe_free_irq(struct ixgbe_adapter *adapter)
845{
846 struct net_device *netdev = adapter->netdev;
847
848 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
849 int i;
850
851 for (i = 0; i < adapter->num_tx_queues; i++)
852 free_irq(adapter->msix_entries[i].vector,
853 &(adapter->tx_ring[i]));
854 for (i = 0; i < adapter->num_rx_queues; i++)
855 free_irq(adapter->msix_entries[i +
856 adapter->num_tx_queues].vector,
857 &(adapter->rx_ring[i]));
858 i = adapter->num_rx_queues + adapter->num_tx_queues;
859 free_irq(adapter->msix_entries[i].vector, netdev);
860 pci_disable_msix(adapter->pdev);
861 kfree(adapter->msix_entries);
862 adapter->msix_entries = NULL;
863 adapter->flags &= ~IXGBE_FLAG_MSIX_ENABLED;
864 return;
865 }
866
867 free_irq(adapter->pdev->irq, netdev);
868 if (adapter->flags & IXGBE_FLAG_MSI_ENABLED) {
869 pci_disable_msi(adapter->pdev);
870 adapter->flags &= ~IXGBE_FLAG_MSI_ENABLED;
871 }
872}
873
874/**
875 * ixgbe_irq_disable - Mask off interrupt generation on the NIC
876 * @adapter: board private structure
877 **/
878static inline void ixgbe_irq_disable(struct ixgbe_adapter *adapter)
879{
9a799d71
AK		 880 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, ~0);
881 IXGBE_WRITE_FLUSH(&adapter->hw);
882 synchronize_irq(adapter->pdev->irq);
883}
884
885/**
886 * ixgbe_irq_enable - Enable default interrupt generation settings
887 * @adapter: board private structure
888 **/
889static inline void ixgbe_irq_enable(struct ixgbe_adapter *adapter)
890{
d4f80882
AV		 891 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
892 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIAC,
893 (IXGBE_EIMS_ENABLE_MASK &
894 ~(IXGBE_EIMS_OTHER | IXGBE_EIMS_LSC)));
895 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS,
896 IXGBE_EIMS_ENABLE_MASK);
897 IXGBE_WRITE_FLUSH(&adapter->hw);
9a799d71
AK		 898}
899
900/**
901 * ixgbe_configure_msi_and_legacy - Initialize PIN (INTA...) and MSI interrupts
902 *
903 **/
904static void ixgbe_configure_msi_and_legacy(struct ixgbe_adapter *adapter)
905{
906 int i;
907 struct ixgbe_hw *hw = &adapter->hw;
908
909 if (adapter->rx_eitr)
910 IXGBE_WRITE_REG(hw, IXGBE_EITR(0),
911 EITR_INTS_PER_SEC_TO_REG(adapter->rx_eitr));
912
913 /* for re-triggering the interrupt in non-NAPI mode */
914 adapter->rx_ring[0].eims_value = (1 << IXGBE_MSIX_VECTOR(0));
915 adapter->tx_ring[0].eims_value = (1 << IXGBE_MSIX_VECTOR(0));
916
917 ixgbe_set_ivar(adapter, IXGBE_IVAR_RX_QUEUE(0), 0);
918 for (i = 0; i < adapter->num_tx_queues; i++)
919 ixgbe_set_ivar(adapter, IXGBE_IVAR_TX_QUEUE(i), i);
920}
921
922/**
923 * ixgbe_configure_tx - Configure 8254x Transmit Unit after Reset
924 * @adapter: board private structure
925 *
926 * Configure the Tx unit of the MAC after a reset.
927 **/
928static void ixgbe_configure_tx(struct ixgbe_adapter *adapter)
929{
930 u64 tdba;
931 struct ixgbe_hw *hw = &adapter->hw;
932 u32 i, tdlen;
933
934 /* Setup the HW Tx Head and Tail descriptor pointers */
935 for (i = 0; i < adapter->num_tx_queues; i++) {
936 tdba = adapter->tx_ring[i].dma;
937 tdlen = adapter->tx_ring[i].count *
938 sizeof(union ixgbe_adv_tx_desc);
939 IXGBE_WRITE_REG(hw, IXGBE_TDBAL(i), (tdba & DMA_32BIT_MASK));
940 IXGBE_WRITE_REG(hw, IXGBE_TDBAH(i), (tdba >> 32));
941 IXGBE_WRITE_REG(hw, IXGBE_TDLEN(i), tdlen);
942 IXGBE_WRITE_REG(hw, IXGBE_TDH(i), 0);
943 IXGBE_WRITE_REG(hw, IXGBE_TDT(i), 0);
944 adapter->tx_ring[i].head = IXGBE_TDH(i);
945 adapter->tx_ring[i].tail = IXGBE_TDT(i);
946 }
947
948 IXGBE_WRITE_REG(hw, IXGBE_TIPG, IXGBE_TIPG_FIBER_DEFAULT);
949}
950
951#define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
952 (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
953
954#define IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT 2
955/**
956 * ixgbe_configure_rx - Configure 8254x Receive Unit after Reset
957 * @adapter: board private structure
958 *
959 * Configure the Rx unit of the MAC after a reset.
960 **/
961static void ixgbe_configure_rx(struct ixgbe_adapter *adapter)
962{
963 u64 rdba;
964 struct ixgbe_hw *hw = &adapter->hw;
965 struct net_device *netdev = adapter->netdev;
966 int max_frame = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
967 u32 rdlen, rxctrl, rxcsum;
968 u32 random[10];
969 u32 reta, mrqc;
970 int i;
971 u32 fctrl, hlreg0;
972 u32 srrctl;
973 u32 pages;
974
975 /* Decide whether to use packet split mode or not */
976 if (netdev->mtu > ETH_DATA_LEN)
977 adapter->flags |= IXGBE_FLAG_RX_PS_ENABLED;
978 else
979 adapter->flags &= ~IXGBE_FLAG_RX_PS_ENABLED;
980
981 /* Set the RX buffer length according to the mode */
982 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
983 adapter->rx_buf_len = IXGBE_RX_HDR_SIZE;
984 } else {
985 if (netdev->mtu <= ETH_DATA_LEN)
986 adapter->rx_buf_len = MAXIMUM_ETHERNET_VLAN_SIZE;
987 else
988 adapter->rx_buf_len = ALIGN(max_frame, 1024);
989 }
990
991 fctrl = IXGBE_READ_REG(&adapter->hw, IXGBE_FCTRL);
992 fctrl |= IXGBE_FCTRL_BAM;
993 IXGBE_WRITE_REG(&adapter->hw, IXGBE_FCTRL, fctrl);
994
995 hlreg0 = IXGBE_READ_REG(hw, IXGBE_HLREG0);
996 if (adapter->netdev->mtu <= ETH_DATA_LEN)
997 hlreg0 &= ~IXGBE_HLREG0_JUMBOEN;
998 else
999 hlreg0 |= IXGBE_HLREG0_JUMBOEN;
1000 IXGBE_WRITE_REG(hw, IXGBE_HLREG0, hlreg0);
1001
1002 pages = PAGE_USE_COUNT(adapter->netdev->mtu);
1003
1004 srrctl = IXGBE_READ_REG(&adapter->hw, IXGBE_SRRCTL(0));
1005 srrctl &= ~IXGBE_SRRCTL_BSIZEHDR_MASK;
1006 srrctl &= ~IXGBE_SRRCTL_BSIZEPKT_MASK;
1007
1008 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
1009 srrctl |= PAGE_SIZE >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
1010 srrctl |= IXGBE_SRRCTL_DESCTYPE_HDR_SPLIT_ALWAYS;
1011 srrctl |= ((IXGBE_RX_HDR_SIZE <<
1012 IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT) &
1013 IXGBE_SRRCTL_BSIZEHDR_MASK);
1014 } else {
1015 srrctl |= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF;
1016
1017 if (adapter->rx_buf_len == MAXIMUM_ETHERNET_VLAN_SIZE)
1018 srrctl |=
1019 IXGBE_RXBUFFER_2048 >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
1020 else
1021 srrctl |=
1022 adapter->rx_buf_len >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
1023 }
1024 IXGBE_WRITE_REG(&adapter->hw, IXGBE_SRRCTL(0), srrctl);
1025
1026 rdlen = adapter->rx_ring[0].count * sizeof(union ixgbe_adv_rx_desc);
1027 /* disable receives while setting up the descriptors */
1028 rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
1029 IXGBE_WRITE_REG(hw, IXGBE_RXCTRL, rxctrl & ~IXGBE_RXCTRL_RXEN);
1030
1031 /* Setup the HW Rx Head and Tail Descriptor Pointers and
1032 * the Base and Length of the Rx Descriptor Ring */
1033 for (i = 0; i < adapter->num_rx_queues; i++) {
1034 rdba = adapter->rx_ring[i].dma;
1035 IXGBE_WRITE_REG(hw, IXGBE_RDBAL(i), (rdba & DMA_32BIT_MASK));
1036 IXGBE_WRITE_REG(hw, IXGBE_RDBAH(i), (rdba >> 32));
1037 IXGBE_WRITE_REG(hw, IXGBE_RDLEN(i), rdlen);
1038 IXGBE_WRITE_REG(hw, IXGBE_RDH(i), 0);
1039 IXGBE_WRITE_REG(hw, IXGBE_RDT(i), 0);
1040 adapter->rx_ring[i].head = IXGBE_RDH(i);
1041 adapter->rx_ring[i].tail = IXGBE_RDT(i);
1042 }
1043
1044 if (adapter->num_rx_queues > 1) {
1045 /* Random 40bytes used as random key in RSS hash function */
1046 get_random_bytes(&random[0], 40);
1047
1048 switch (adapter->num_rx_queues) {
1049 case 8:
1050 case 4:
1051 /* Bits [3:0] in each byte refers the Rx queue no */
1052 reta = 0x00010203;
1053 break;
1054 case 2:
1055 reta = 0x00010001;
1056 break;
1057 default:
1058 reta = 0x00000000;
1059 break;
1060 }
1061
1062 /* Fill out redirection table */
1063 for (i = 0; i < 32; i++) {
1064 IXGBE_WRITE_REG_ARRAY(hw, IXGBE_RETA(0), i, reta);
1065 if (adapter->num_rx_queues > 4) {
1066 i++;
1067 IXGBE_WRITE_REG_ARRAY(hw, IXGBE_RETA(0), i,
1068 0x04050607);
1069 }
1070 }
1071
1072 /* Fill out hash function seeds */
1073 for (i = 0; i < 10; i++)
1074 IXGBE_WRITE_REG_ARRAY(hw, IXGBE_RSSRK(0), i, random[i]);
1075
1076 mrqc = IXGBE_MRQC_RSSEN
1077 /* Perform hash on these packet types */
1078 | IXGBE_MRQC_RSS_FIELD_IPV4
1079 | IXGBE_MRQC_RSS_FIELD_IPV4_TCP
1080 | IXGBE_MRQC_RSS_FIELD_IPV4_UDP
1081 | IXGBE_MRQC_RSS_FIELD_IPV6_EX_TCP
1082 | IXGBE_MRQC_RSS_FIELD_IPV6_EX
1083 | IXGBE_MRQC_RSS_FIELD_IPV6
1084 | IXGBE_MRQC_RSS_FIELD_IPV6_TCP
1085 | IXGBE_MRQC_RSS_FIELD_IPV6_UDP
1086 | IXGBE_MRQC_RSS_FIELD_IPV6_EX_UDP;
1087 IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc);
1088
1089 /* Multiqueue and packet checksumming are mutually exclusive. */
1090 rxcsum = IXGBE_READ_REG(hw, IXGBE_RXCSUM);
1091 rxcsum |= IXGBE_RXCSUM_PCSD;
1092 IXGBE_WRITE_REG(hw, IXGBE_RXCSUM, rxcsum);
1093 } else {
1094 /* Enable Receive Checksum Offload for TCP and UDP */
1095 rxcsum = IXGBE_READ_REG(hw, IXGBE_RXCSUM);
1096 if (adapter->flags & IXGBE_FLAG_RX_CSUM_ENABLED) {
1097 /* Enable IPv4 payload checksum for UDP fragments
1098 * Must be used in conjunction with packet-split. */
1099 rxcsum |= IXGBE_RXCSUM_IPPCSE;
1100 } else {
1101 /* don't need to clear IPPCSE as it defaults to 0 */
1102 }
1103 IXGBE_WRITE_REG(hw, IXGBE_RXCSUM, rxcsum);
1104 }
1105 /* Enable Receives */
1106 IXGBE_WRITE_REG(hw, IXGBE_RXCTRL, rxctrl);
1107 rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
1108}
1109
1110static void ixgbe_vlan_rx_register(struct net_device *netdev,
1111 struct vlan_group *grp)
1112{
1113 struct ixgbe_adapter *adapter = netdev_priv(netdev);
1114 u32 ctrl;
1115
d4f80882
AV		 1116 if (!test_bit(__IXGBE_DOWN, &adapter->state))
1117 ixgbe_irq_disable(adapter);
9a799d71
AK		 1118 adapter->vlgrp = grp;
1119
1120 if (grp) {
1121 /* enable VLAN tag insert/strip */
1122 ctrl = IXGBE_READ_REG(&adapter->hw, IXGBE_VLNCTRL);
1123 ctrl |= IXGBE_VLNCTRL_VME | IXGBE_VLNCTRL_VFE;
1124 ctrl &= ~IXGBE_VLNCTRL_CFIEN;
1125 IXGBE_WRITE_REG(&adapter->hw, IXGBE_VLNCTRL, ctrl);
1126 }
1127
d4f80882
AV		 1128 if (!test_bit(__IXGBE_DOWN, &adapter->state))
1129 ixgbe_irq_enable(adapter);
9a799d71
AK		 1130}
1131
1132static void ixgbe_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
1133{
1134 struct ixgbe_adapter *adapter = netdev_priv(netdev);
1135
1136 /* add VID to filter table */
1137 ixgbe_set_vfta(&adapter->hw, vid, 0, true);
1138}
1139
1140static void ixgbe_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
1141{
1142 struct ixgbe_adapter *adapter = netdev_priv(netdev);
1143
d4f80882
AV		 1144 if (!test_bit(__IXGBE_DOWN, &adapter->state))
1145 ixgbe_irq_disable(adapter);
1146
9a799d71 1147 vlan_group_set_device(adapter->vlgrp, vid, NULL);
d4f80882
AV		 1148
1149 if (!test_bit(__IXGBE_DOWN, &adapter->state))
1150 ixgbe_irq_enable(adapter);
9a799d71
AK		 1151
1152 /* remove VID from filter table */
1153 ixgbe_set_vfta(&adapter->hw, vid, 0, false);
1154}
1155
1156static void ixgbe_restore_vlan(struct ixgbe_adapter *adapter)
1157{
1158 ixgbe_vlan_rx_register(adapter->netdev, adapter->vlgrp);
1159
1160 if (adapter->vlgrp) {
1161 u16 vid;
1162 for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
1163 if (!vlan_group_get_device(adapter->vlgrp, vid))
1164 continue;
1165 ixgbe_vlan_rx_add_vid(adapter->netdev, vid);
1166 }
1167 }
1168}
1169
1170/**
1171 * ixgbe_set_multi - Multicast and Promiscuous mode set
1172 * @netdev: network interface device structure
1173 *
1174 * The set_multi entry point is called whenever the multicast address
1175 * list or the network interface flags are updated. This routine is
1176 * responsible for configuring the hardware for proper multicast,
1177 * promiscuous mode, and all-multi behavior.
1178 **/
1179static void ixgbe_set_multi(struct net_device *netdev)
1180{
1181 struct ixgbe_adapter *adapter = netdev_priv(netdev);
1182 struct ixgbe_hw *hw = &adapter->hw;
1183 struct dev_mc_list *mc_ptr;
1184 u8 *mta_list;
1185 u32 fctrl;
1186 int i;
1187
1188 /* Check for Promiscuous and All Multicast modes */
1189
1190 fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
1191
1192 if (netdev->flags & IFF_PROMISC) {
1193 fctrl |= (IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
1194 } else if (netdev->flags & IFF_ALLMULTI) {
1195 fctrl |= IXGBE_FCTRL_MPE;
1196 fctrl &= ~IXGBE_FCTRL_UPE;
1197 } else {
1198 fctrl &= ~(IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
1199 }
1200
1201 IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl);
1202
1203 if (netdev->mc_count) {
1204 mta_list = kcalloc(netdev->mc_count, ETH_ALEN, GFP_ATOMIC);
1205 if (!mta_list)
1206 return;
1207
1208 /* Shared function expects packed array of only addresses. */
1209 mc_ptr = netdev->mc_list;
1210
1211 for (i = 0; i < netdev->mc_count; i++) {
1212 if (!mc_ptr)
1213 break;
1214 memcpy(mta_list + (i * ETH_ALEN), mc_ptr->dmi_addr,
1215 ETH_ALEN);
1216 mc_ptr = mc_ptr->next;
1217 }
1218
1219 ixgbe_update_mc_addr_list(hw, mta_list, i, 0);
1220 kfree(mta_list);
1221 } else {
1222 ixgbe_update_mc_addr_list(hw, NULL, 0, 0);
1223 }
1224
1225}
1226
1227static void ixgbe_configure(struct ixgbe_adapter *adapter)
1228{
1229 struct net_device *netdev = adapter->netdev;
1230 int i;
1231
1232 ixgbe_set_multi(netdev);
1233
1234 ixgbe_restore_vlan(adapter);
1235
1236 ixgbe_configure_tx(adapter);
1237 ixgbe_configure_rx(adapter);
1238 for (i = 0; i < adapter->num_rx_queues; i++)
1239 ixgbe_alloc_rx_buffers(adapter, &adapter->rx_ring[i],
1240 (adapter->rx_ring[i].count - 1));
1241}
1242
1243static int ixgbe_up_complete(struct ixgbe_adapter *adapter)
1244{
1245 struct net_device *netdev = adapter->netdev;
1246 int i;
1247 u32 gpie = 0;
1248 struct ixgbe_hw *hw = &adapter->hw;
1249 u32 txdctl, rxdctl, mhadd;
1250 int max_frame = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
1251
5eba3699
AV		 1252 ixgbe_get_hw_control(adapter);
1253
9a799d71
AK		 1254 if (adapter->flags & (IXGBE_FLAG_MSIX_ENABLED |
1255 IXGBE_FLAG_MSI_ENABLED)) {
1256 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) {
1257 gpie = (IXGBE_GPIE_MSIX_MODE | IXGBE_GPIE_EIAME |
1258 IXGBE_GPIE_PBA_SUPPORT | IXGBE_GPIE_OCD);
1259 } else {
1260 /* MSI only */
1261 gpie = (IXGBE_GPIE_EIAME |
1262 IXGBE_GPIE_PBA_SUPPORT);
1263 }
1264 IXGBE_WRITE_REG(&adapter->hw, IXGBE_GPIE, gpie);
1265 gpie = IXGBE_READ_REG(&adapter->hw, IXGBE_GPIE);
1266 }
1267
1268 mhadd = IXGBE_READ_REG(hw, IXGBE_MHADD);
1269
1270 if (max_frame != (mhadd >> IXGBE_MHADD_MFS_SHIFT)) {
1271 mhadd &= ~IXGBE_MHADD_MFS_MASK;
1272 mhadd |= max_frame << IXGBE_MHADD_MFS_SHIFT;
1273
1274 IXGBE_WRITE_REG(hw, IXGBE_MHADD, mhadd);
1275 }
1276
1277 for (i = 0; i < adapter->num_tx_queues; i++) {
1278 txdctl = IXGBE_READ_REG(&adapter->hw, IXGBE_TXDCTL(i));
1279 txdctl |= IXGBE_TXDCTL_ENABLE;
1280 IXGBE_WRITE_REG(&adapter->hw, IXGBE_TXDCTL(i), txdctl);
1281 }
1282
1283 for (i = 0; i < adapter->num_rx_queues; i++) {
1284 rxdctl = IXGBE_READ_REG(&adapter->hw, IXGBE_RXDCTL(i));
1285 rxdctl |= IXGBE_RXDCTL_ENABLE;
1286 IXGBE_WRITE_REG(&adapter->hw, IXGBE_RXDCTL(i), rxdctl);
1287 }
1288 /* enable all receives */
1289 rxdctl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
1290 rxdctl |= (IXGBE_RXCTRL_DMBYPS | IXGBE_RXCTRL_RXEN);
1291 IXGBE_WRITE_REG(hw, IXGBE_RXCTRL, rxdctl);
1292
1293 if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
1294 ixgbe_configure_msix(adapter);
1295 else
1296 ixgbe_configure_msi_and_legacy(adapter);
1297
1298 clear_bit(__IXGBE_DOWN, &adapter->state);
1299 napi_enable(&adapter->napi);
1300 ixgbe_irq_enable(adapter);
1301
1302 /* bring the link up in the watchdog, this could race with our first
1303 * link up interrupt but shouldn't be a problem */
1304 mod_timer(&adapter->watchdog_timer, jiffies);
1305 return 0;
1306}
1307
d4f80882
AV		 1308void ixgbe_reinit_locked(struct ixgbe_adapter *adapter)
1309{
1310 WARN_ON(in_interrupt());
1311 while (test_and_set_bit(__IXGBE_RESETTING, &adapter->state))
1312 msleep(1);
1313 ixgbe_down(adapter);
1314 ixgbe_up(adapter);
1315 clear_bit(__IXGBE_RESETTING, &adapter->state);
1316}
1317
9a799d71
AK		 1318int ixgbe_up(struct ixgbe_adapter *adapter)
1319{
1320 /* hardware has been reset, we need to reload some things */
1321 ixgbe_configure(adapter);
1322
1323 return ixgbe_up_complete(adapter);
1324}
1325
1326void ixgbe_reset(struct ixgbe_adapter *adapter)
1327{
1328 if (ixgbe_init_hw(&adapter->hw))
1329 DPRINTK(PROBE, ERR, "Hardware Error\n");
1330
1331 /* reprogram the RAR[0] in case user changed it. */
1332 ixgbe_set_rar(&adapter->hw, 0, adapter->hw.mac.addr, 0, IXGBE_RAH_AV);
1333
1334}
1335
1336#ifdef CONFIG_PM
1337static int ixgbe_resume(struct pci_dev *pdev)
1338{
1339 struct net_device *netdev = pci_get_drvdata(pdev);
1340 struct ixgbe_adapter *adapter = netdev_priv(netdev);
1341 u32 err, num_rx_queues = adapter->num_rx_queues;
1342
1343 pci_set_power_state(pdev, PCI_D0);
1344 pci_restore_state(pdev);
1345 err = pci_enable_device(pdev);
1346 if (err) {
1347 printk(KERN_ERR "ixgbe: Cannot enable PCI device from " \
1348 "suspend\n");
1349 return err;
1350 }
1351 pci_set_master(pdev);
1352
1353 pci_enable_wake(pdev, PCI_D3hot, 0);
1354 pci_enable_wake(pdev, PCI_D3cold, 0);
1355
1356 if (netif_running(netdev)) {
1357 err = ixgbe_request_irq(adapter, &num_rx_queues);
1358 if (err)
1359 return err;
1360 }
1361
1362 ixgbe_reset(adapter);
1363
1364 if (netif_running(netdev))
1365 ixgbe_up(adapter);
1366
1367 netif_device_attach(netdev);
1368
1369 return 0;
1370}
1371#endif
1372
1373/**
1374 * ixgbe_clean_rx_ring - Free Rx Buffers per Queue
1375 * @adapter: board private structure
1376 * @rx_ring: ring to free buffers from
1377 **/
1378static void ixgbe_clean_rx_ring(struct ixgbe_adapter *adapter,
1379 struct ixgbe_ring *rx_ring)
1380{
1381 struct pci_dev *pdev = adapter->pdev;
1382 unsigned long size;
1383 unsigned int i;
1384
1385 /* Free all the Rx ring sk_buffs */
1386
1387 for (i = 0; i < rx_ring->count; i++) {
1388 struct ixgbe_rx_buffer *rx_buffer_info;
1389
1390 rx_buffer_info = &rx_ring->rx_buffer_info[i];
1391 if (rx_buffer_info->dma) {
1392 pci_unmap_single(pdev, rx_buffer_info->dma,
1393 adapter->rx_buf_len,
1394 PCI_DMA_FROMDEVICE);
1395 rx_buffer_info->dma = 0;
1396 }
1397 if (rx_buffer_info->skb) {
1398 dev_kfree_skb(rx_buffer_info->skb);
1399 rx_buffer_info->skb = NULL;
1400 }
1401 if (!rx_buffer_info->page)
1402 continue;
1403 pci_unmap_page(pdev, rx_buffer_info->page_dma, PAGE_SIZE,
1404 PCI_DMA_FROMDEVICE);
1405 rx_buffer_info->page_dma = 0;
1406
1407 put_page(rx_buffer_info->page);
1408 rx_buffer_info->page = NULL;
1409 }
1410
1411 size = sizeof(struct ixgbe_rx_buffer) * rx_ring->count;
1412 memset(rx_ring->rx_buffer_info, 0, size);
1413
1414 /* Zero out the descriptor ring */
1415 memset(rx_ring->desc, 0, rx_ring->size);
1416
1417 rx_ring->next_to_clean = 0;
1418 rx_ring->next_to_use = 0;
1419
1420 writel(0, adapter->hw.hw_addr + rx_ring->head);
1421 writel(0, adapter->hw.hw_addr + rx_ring->tail);
1422}
1423
1424/**
1425 * ixgbe_clean_tx_ring - Free Tx Buffers
1426 * @adapter: board private structure
1427 * @tx_ring: ring to be cleaned
1428 **/
1429static void ixgbe_clean_tx_ring(struct ixgbe_adapter *adapter,
1430 struct ixgbe_ring *tx_ring)
1431{
1432 struct ixgbe_tx_buffer *tx_buffer_info;
1433 unsigned long size;
1434 unsigned int i;
1435
1436 /* Free all the Tx ring sk_buffs */
1437
1438 for (i = 0; i < tx_ring->count; i++) {
1439 tx_buffer_info = &tx_ring->tx_buffer_info[i];
1440 ixgbe_unmap_and_free_tx_resource(adapter, tx_buffer_info);
1441 }
1442
1443 size = sizeof(struct ixgbe_tx_buffer) * tx_ring->count;
1444 memset(tx_ring->tx_buffer_info, 0, size);
1445
1446 /* Zero out the descriptor ring */
1447 memset(tx_ring->desc, 0, tx_ring->size);
1448
1449 tx_ring->next_to_use = 0;
1450 tx_ring->next_to_clean = 0;
1451
1452 writel(0, adapter->hw.hw_addr + tx_ring->head);
1453 writel(0, adapter->hw.hw_addr + tx_ring->tail);
1454}
1455
1456/**
1457 * ixgbe_clean_all_tx_rings - Free Tx Buffers for all queues
1458 * @adapter: board private structure
1459 **/
1460static void ixgbe_clean_all_tx_rings(struct ixgbe_adapter *adapter)
1461{
1462 int i;
1463
1464 for (i = 0; i < adapter->num_tx_queues; i++)
1465 ixgbe_clean_tx_ring(adapter, &adapter->tx_ring[i]);
1466}
1467
1468/**
1469 * ixgbe_clean_all_rx_rings - Free Rx Buffers for all queues
1470 * @adapter: board private structure
1471 **/
1472static void ixgbe_clean_all_rx_rings(struct ixgbe_adapter *adapter)
1473{
1474 int i;
1475
1476 for (i = 0; i < adapter->num_rx_queues; i++)
1477 ixgbe_clean_rx_ring(adapter, &adapter->rx_ring[i]);
1478}
1479
1480void ixgbe_down(struct ixgbe_adapter *adapter)
1481{
1482 struct net_device *netdev = adapter->netdev;
1483 u32 rxctrl;
1484
1485 /* signal that we are down to the interrupt handler */
1486 set_bit(__IXGBE_DOWN, &adapter->state);
1487
1488 /* disable receives */
1489 rxctrl = IXGBE_READ_REG(&adapter->hw, IXGBE_RXCTRL);
1490 IXGBE_WRITE_REG(&adapter->hw, IXGBE_RXCTRL,
1491 rxctrl & ~IXGBE_RXCTRL_RXEN);
1492
1493 netif_tx_disable(netdev);
1494
1495 /* disable transmits in the hardware */
1496
1497 /* flush both disables */
1498 IXGBE_WRITE_FLUSH(&adapter->hw);
1499 msleep(10);
1500
49d85c50 1501 napi_disable(&adapter->napi);
49d85c50 1502
9a799d71
AK		 1503 ixgbe_irq_disable(adapter);
1504
9a799d71
AK		 1505 del_timer_sync(&adapter->watchdog_timer);
1506
1507 netif_carrier_off(netdev);
1508 netif_stop_queue(netdev);
1509
1510 ixgbe_reset(adapter);
1511 ixgbe_clean_all_tx_rings(adapter);
1512 ixgbe_clean_all_rx_rings(adapter);
1513
1514}
1515
1516static int ixgbe_suspend(struct pci_dev *pdev, pm_message_t state)
1517{
1518 struct net_device *netdev = pci_get_drvdata(pdev);
1519 struct ixgbe_adapter *adapter = netdev_priv(netdev);
1520#ifdef CONFIG_PM
1521 int retval = 0;
1522#endif
1523
1524 netif_device_detach(netdev);
1525
1526 if (netif_running(netdev)) {
1527 ixgbe_down(adapter);
1528 ixgbe_free_irq(adapter);
1529 }
1530
1531#ifdef CONFIG_PM
1532 retval = pci_save_state(pdev);
1533 if (retval)
1534 return retval;
1535#endif
1536
1537 pci_enable_wake(pdev, PCI_D3hot, 0);
1538 pci_enable_wake(pdev, PCI_D3cold, 0);
1539
5eba3699
AV		 1540 ixgbe_release_hw_control(adapter);
1541
9a799d71
AK		 1542 pci_disable_device(pdev);
1543
1544 pci_set_power_state(pdev, pci_choose_state(pdev, state));
1545
1546 return 0;
1547}
1548
1549static void ixgbe_shutdown(struct pci_dev *pdev)
1550{
1551 ixgbe_suspend(pdev, PMSG_SUSPEND);
1552}
1553
1554/**
1555 * ixgbe_clean - NAPI Rx polling callback
1556 * @adapter: board private structure
1557 **/
1558static int ixgbe_clean(struct napi_struct *napi, int budget)
1559{
1560 struct ixgbe_adapter *adapter = container_of(napi,
1561 struct ixgbe_adapter, napi);
1562 struct net_device *netdev = adapter->netdev;
d2c7ddd6 1563 int tx_cleaned = 0, work_done = 0;
9a799d71 1564
9a799d71 1565 /* In non-MSIX case, there is no multi-Tx/Rx queue */
d2c7ddd6 1566 tx_cleaned = ixgbe_clean_tx_irq(adapter, adapter->tx_ring);
9a799d71
AK		 1567 ixgbe_clean_rx_irq(adapter, &adapter->rx_ring[0], &work_done,
1568 budget);
1569
d2c7ddd6
DM		 1570 if (tx_cleaned)
1571 work_done = budget;
1572
53e52c72
DM		 1573 /* If budget not fully consumed, exit the polling mode */
1574 if (work_done < budget) {
9a799d71 1575 netif_rx_complete(netdev, napi);
d4f80882
AV		 1576 if (!test_bit(__IXGBE_DOWN, &adapter->state))
1577 ixgbe_irq_enable(adapter);
9a799d71
AK		 1578 }
1579
1580 return work_done;
1581}
1582
1583/**
1584 * ixgbe_tx_timeout - Respond to a Tx Hang
1585 * @netdev: network interface device structure
1586 **/
1587static void ixgbe_tx_timeout(struct net_device *netdev)
1588{
1589 struct ixgbe_adapter *adapter = netdev_priv(netdev);
1590
1591 /* Do the reset outside of interrupt context */
1592 schedule_work(&adapter->reset_task);
1593}
1594
1595static void ixgbe_reset_task(struct work_struct *work)
1596{
1597 struct ixgbe_adapter *adapter;
1598 adapter = container_of(work, struct ixgbe_adapter, reset_task);
1599
1600 adapter->tx_timeout_count++;
1601
d4f80882 1602 ixgbe_reinit_locked(adapter);
9a799d71
AK		 1603}
1604
1605/**
1606 * ixgbe_alloc_queues - Allocate memory for all rings
1607 * @adapter: board private structure to initialize
1608 *
1609 * We allocate one ring per queue at run-time since we don't know the
1610 * number of queues at compile-time. The polling_netdev array is
1611 * intended for Multiqueue, but should work fine with a single queue.
1612 **/
1613static int __devinit ixgbe_alloc_queues(struct ixgbe_adapter *adapter)
1614{
1615 int i;
1616
1617 adapter->tx_ring = kcalloc(adapter->num_tx_queues,
1618 sizeof(struct ixgbe_ring), GFP_KERNEL);
1619 if (!adapter->tx_ring)
1620 return -ENOMEM;
1621
1622 for (i = 0; i < adapter->num_tx_queues; i++)
1623 adapter->tx_ring[i].count = IXGBE_DEFAULT_TXD;
1624
1625 adapter->rx_ring = kcalloc(adapter->num_rx_queues,
1626 sizeof(struct ixgbe_ring), GFP_KERNEL);
1627 if (!adapter->rx_ring) {
1628 kfree(adapter->tx_ring);
1629 return -ENOMEM;
1630 }
1631
1632 for (i = 0; i < adapter->num_rx_queues; i++) {
1633 adapter->rx_ring[i].adapter = adapter;
1634 adapter->rx_ring[i].itr_register = IXGBE_EITR(i);
1635 adapter->rx_ring[i].count = IXGBE_DEFAULT_RXD;
1636 }
1637
1638 return 0;
1639}
1640
1641/**
1642 * ixgbe_sw_init - Initialize general software structures (struct ixgbe_adapter)
1643 * @adapter: board private structure to initialize
1644 *
1645 * ixgbe_sw_init initializes the Adapter private data structure.
1646 * Fields are initialized based on PCI device information and
1647 * OS network device settings (MTU size).
1648 **/
1649static int __devinit ixgbe_sw_init(struct ixgbe_adapter *adapter)
1650{
1651 struct ixgbe_hw *hw = &adapter->hw;
1652 struct pci_dev *pdev = adapter->pdev;
1653
1654 /* default flow control settings */
1655 hw->fc.original_type = ixgbe_fc_full;
1656 hw->fc.type = ixgbe_fc_full;
1657
1658 hw->mac.link_mode_select = IXGBE_AUTOC_LMS_10G_LINK_NO_AN;
1659 if (hw->mac.ops.reset(hw)) {
1660 dev_err(&pdev->dev, "HW Init failed\n");
1661 return -EIO;
1662 }
3957d63d
AK		 1663 if (hw->mac.ops.setup_link_speed(hw, IXGBE_LINK_SPEED_10GB_FULL, true,
1664 false)) {
9a799d71
AK		 1665 dev_err(&pdev->dev, "Link Speed setup failed\n");
1666 return -EIO;
1667 }
1668
1669 /* initialize eeprom parameters */
1670 if (ixgbe_init_eeprom(hw)) {
1671 dev_err(&pdev->dev, "EEPROM initialization failed\n");
1672 return -EIO;
1673 }
1674
1675 /* Set the default values */
1676 adapter->num_rx_queues = IXGBE_DEFAULT_RXQ;
1677 adapter->num_tx_queues = 1;
1678 adapter->flags |= IXGBE_FLAG_RX_CSUM_ENABLED;
1679
1680 if (ixgbe_alloc_queues(adapter)) {
1681 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
1682 return -ENOMEM;
1683 }
1684
9a799d71
AK		 1685 set_bit(__IXGBE_DOWN, &adapter->state);
1686
1687 return 0;
1688}
1689
1690/**
1691 * ixgbe_setup_tx_resources - allocate Tx resources (Descriptors)
1692 * @adapter: board private structure
1693 * @txdr: tx descriptor ring (for a specific queue) to setup
1694 *
1695 * Return 0 on success, negative on failure
1696 **/
1697int ixgbe_setup_tx_resources(struct ixgbe_adapter *adapter,
1698 struct ixgbe_ring *txdr)
1699{
1700 struct pci_dev *pdev = adapter->pdev;
1701 int size;
1702
1703 size = sizeof(struct ixgbe_tx_buffer) * txdr->count;
1704 txdr->tx_buffer_info = vmalloc(size);
1705 if (!txdr->tx_buffer_info) {
1706 DPRINTK(PROBE, ERR,
1707 "Unable to allocate memory for the transmit descriptor ring\n");
1708 return -ENOMEM;
1709 }
1710 memset(txdr->tx_buffer_info, 0, size);
1711
1712 /* round up to nearest 4K */
1713 txdr->size = txdr->count * sizeof(union ixgbe_adv_tx_desc);
1714 txdr->size = ALIGN(txdr->size, 4096);
1715
1716 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
1717 if (!txdr->desc) {
1718 vfree(txdr->tx_buffer_info);
1719 DPRINTK(PROBE, ERR,
1720 "Memory allocation failed for the tx desc ring\n");
1721 return -ENOMEM;
1722 }
1723
1724 txdr->adapter = adapter;
1725 txdr->next_to_use = 0;
1726 txdr->next_to_clean = 0;
1727 txdr->work_limit = txdr->count;
9a799d71
AK		 1728
1729 return 0;
1730}
1731
1732/**
1733 * ixgbe_setup_rx_resources - allocate Rx resources (Descriptors)
1734 * @adapter: board private structure
1735 * @rxdr: rx descriptor ring (for a specific queue) to setup
1736 *
1737 * Returns 0 on success, negative on failure
1738 **/
1739int ixgbe_setup_rx_resources(struct ixgbe_adapter *adapter,
1740 struct ixgbe_ring *rxdr)
1741{
1742 struct pci_dev *pdev = adapter->pdev;
1743 int size, desc_len;
1744
1745 size = sizeof(struct ixgbe_rx_buffer) * rxdr->count;
1746 rxdr->rx_buffer_info = vmalloc(size);
1747 if (!rxdr->rx_buffer_info) {
1748 DPRINTK(PROBE, ERR,
1749 "vmalloc allocation failed for the rx desc ring\n");
1750 return -ENOMEM;
1751 }
1752 memset(rxdr->rx_buffer_info, 0, size);
1753
1754 desc_len = sizeof(union ixgbe_adv_rx_desc);
1755
1756 /* Round up to nearest 4K */
1757 rxdr->size = rxdr->count * desc_len;
1758 rxdr->size = ALIGN(rxdr->size, 4096);
1759
1760 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
1761
1762 if (!rxdr->desc) {
1763 DPRINTK(PROBE, ERR,
1764 "Memory allocation failed for the rx desc ring\n");
1765 vfree(rxdr->rx_buffer_info);
1766 return -ENOMEM;
1767 }
1768
1769 rxdr->next_to_clean = 0;
1770 rxdr->next_to_use = 0;
1771 rxdr->adapter = adapter;
1772
1773 return 0;
1774}
1775
1776/**
1777 * ixgbe_free_tx_resources - Free Tx Resources per Queue
1778 * @adapter: board private structure
1779 * @tx_ring: Tx descriptor ring for a specific queue
1780 *
1781 * Free all transmit software resources
1782 **/
1783static void ixgbe_free_tx_resources(struct ixgbe_adapter *adapter,
1784 struct ixgbe_ring *tx_ring)
1785{
1786 struct pci_dev *pdev = adapter->pdev;
1787
1788 ixgbe_clean_tx_ring(adapter, tx_ring);
1789
1790 vfree(tx_ring->tx_buffer_info);
1791 tx_ring->tx_buffer_info = NULL;
1792
1793 pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma);
1794
1795 tx_ring->desc = NULL;
1796}
1797
1798/**
1799 * ixgbe_free_all_tx_resources - Free Tx Resources for All Queues
1800 * @adapter: board private structure
1801 *
1802 * Free all transmit software resources
1803 **/
1804static void ixgbe_free_all_tx_resources(struct ixgbe_adapter *adapter)
1805{
1806 int i;
1807
1808 for (i = 0; i < adapter->num_tx_queues; i++)
1809 ixgbe_free_tx_resources(adapter, &adapter->tx_ring[i]);
1810}
1811
1812/**
1813 * ixgbe_free_rx_resources - Free Rx Resources
1814 * @adapter: board private structure
1815 * @rx_ring: ring to clean the resources from
1816 *
1817 * Free all receive software resources
1818 **/
1819static void ixgbe_free_rx_resources(struct ixgbe_adapter *adapter,
1820 struct ixgbe_ring *rx_ring)
1821{
1822 struct pci_dev *pdev = adapter->pdev;
1823
1824 ixgbe_clean_rx_ring(adapter, rx_ring);
1825
1826 vfree(rx_ring->rx_buffer_info);
1827 rx_ring->rx_buffer_info = NULL;
1828
1829 pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
1830
1831 rx_ring->desc = NULL;
1832}
1833
1834/**
1835 * ixgbe_free_all_rx_resources - Free Rx Resources for All Queues
1836 * @adapter: board private structure
1837 *
1838 * Free all receive software resources
1839 **/
1840static void ixgbe_free_all_rx_resources(struct ixgbe_adapter *adapter)
1841{
1842 int i;
1843
1844 for (i = 0; i < adapter->num_rx_queues; i++)
1845 ixgbe_free_rx_resources(adapter, &adapter->rx_ring[i]);
1846}
1847
1848/**
1849 * ixgbe_setup_all_tx_resources - wrapper to allocate Tx resources
1850 * (Descriptors) for all queues
1851 * @adapter: board private structure
1852 *
1853 * If this function returns with an error, then it's possible one or
1854 * more of the rings is populated (while the rest are not). It is the
1855 * callers duty to clean those orphaned rings.
1856 *
1857 * Return 0 on success, negative on failure
1858 **/
1859static int ixgbe_setup_all_tx_resources(struct ixgbe_adapter *adapter)
1860{
1861 int i, err = 0;
1862
1863 for (i = 0; i < adapter->num_tx_queues; i++) {
1864 err = ixgbe_setup_tx_resources(adapter, &adapter->tx_ring[i]);
1865 if (err) {
1866 DPRINTK(PROBE, ERR,
1867 "Allocation for Tx Queue %u failed\n", i);
1868 break;
1869 }
1870 }
1871
1872 return err;
1873}
1874
1875/**
1876 * ixgbe_setup_all_rx_resources - wrapper to allocate Rx resources
1877 * (Descriptors) for all queues
1878 * @adapter: board private structure
1879 *
1880 * If this function returns with an error, then it's possible one or
1881 * more of the rings is populated (while the rest are not). It is the
1882 * callers duty to clean those orphaned rings.
1883 *
1884 * Return 0 on success, negative on failure
1885 **/
1886
1887static int ixgbe_setup_all_rx_resources(struct ixgbe_adapter *adapter)
1888{
1889 int i, err = 0;
1890
1891 for (i = 0; i < adapter->num_rx_queues; i++) {
1892 err = ixgbe_setup_rx_resources(adapter, &adapter->rx_ring[i]);
1893 if (err) {
1894 DPRINTK(PROBE, ERR,
1895 "Allocation for Rx Queue %u failed\n", i);
1896 break;
1897 }
1898 }
1899
1900 return err;
1901}
1902
1903/**
1904 * ixgbe_change_mtu - Change the Maximum Transfer Unit
1905 * @netdev: network interface device structure
1906 * @new_mtu: new value for maximum frame size
1907 *
1908 * Returns 0 on success, negative on failure
1909 **/
1910static int ixgbe_change_mtu(struct net_device *netdev, int new_mtu)
1911{
1912 struct ixgbe_adapter *adapter = netdev_priv(netdev);
1913 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
1914
1915 if ((max_frame < (ETH_ZLEN + ETH_FCS_LEN)) ||
1916 (max_frame > IXGBE_MAX_JUMBO_FRAME_SIZE))
1917 return -EINVAL;
1918
1919 netdev->mtu = new_mtu;
1920
d4f80882
AV		 1921 if (netif_running(netdev))
1922 ixgbe_reinit_locked(adapter);
9a799d71
AK		 1923
1924 return 0;
1925}
1926
1927/**
1928 * ixgbe_open - Called when a network interface is made active
1929 * @netdev: network interface device structure
1930 *
1931 * Returns 0 on success, negative value on failure
1932 *
1933 * The open entry point is called when a network interface is made
1934 * active by the system (IFF_UP). At this point all resources needed
1935 * for transmit and receive operations are allocated, the interrupt
1936 * handler is registered with the OS, the watchdog timer is started,
1937 * and the stack is notified that the interface is ready.
1938 **/
1939static int ixgbe_open(struct net_device *netdev)
1940{
1941 struct ixgbe_adapter *adapter = netdev_priv(netdev);
1942 int err;
9a799d71
AK		 1943 u32 num_rx_queues = adapter->num_rx_queues;
1944
9a799d71
AK		 1945try_intr_reinit:
1946 /* allocate transmit descriptors */
1947 err = ixgbe_setup_all_tx_resources(adapter);
1948 if (err)
1949 goto err_setup_tx;
1950
1951 if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) {
1952 num_rx_queues = 1;
1953 adapter->num_rx_queues = num_rx_queues;
1954 }
1955
1956 /* allocate receive descriptors */
1957 err = ixgbe_setup_all_rx_resources(adapter);
1958 if (err)
1959 goto err_setup_rx;
1960
1961 ixgbe_configure(adapter);
1962
1963 err = ixgbe_request_irq(adapter, &num_rx_queues);
1964 if (err)
1965 goto err_req_irq;
1966
1967 /* ixgbe_request might have reduced num_rx_queues */
1968 if (num_rx_queues < adapter->num_rx_queues) {
1969 /* We didn't get MSI-X, so we need to release everything,
1970 * set our Rx queue count to num_rx_queues, and redo the
1971 * whole init process.
1972 */
1973 ixgbe_free_irq(adapter);
1974 if (adapter->flags & IXGBE_FLAG_MSI_ENABLED) {
1975 pci_disable_msi(adapter->pdev);
1976 adapter->flags &= ~IXGBE_FLAG_MSI_ENABLED;
1977 }
1978 ixgbe_free_all_rx_resources(adapter);
1979 ixgbe_free_all_tx_resources(adapter);
1980 adapter->num_rx_queues = num_rx_queues;
1981
1982 /* Reset the hardware, and start over. */
1983 ixgbe_reset(adapter);
1984
1985 goto try_intr_reinit;
1986 }
1987
1988 err = ixgbe_up_complete(adapter);
1989 if (err)
1990 goto err_up;
1991
1992 return 0;
1993
1994err_up:
5eba3699 1995 ixgbe_release_hw_control(adapter);
9a799d71
AK		 1996 ixgbe_free_irq(adapter);
1997err_req_irq:
1998 ixgbe_free_all_rx_resources(adapter);
1999err_setup_rx:
2000 ixgbe_free_all_tx_resources(adapter);
2001err_setup_tx:
2002 ixgbe_reset(adapter);
2003
2004 return err;
2005}
2006
2007/**
2008 * ixgbe_close - Disables a network interface
2009 * @netdev: network interface device structure
2010 *
2011 * Returns 0, this is not allowed to fail
2012 *
2013 * The close entry point is called when an interface is de-activated
2014 * by the OS. The hardware is still under the drivers control, but
2015 * needs to be disabled. A global MAC reset is issued to stop the
2016 * hardware, and all transmit and receive resources are freed.
2017 **/
2018static int ixgbe_close(struct net_device *netdev)
2019{
2020 struct ixgbe_adapter *adapter = netdev_priv(netdev);
9a799d71
AK		 2021
2022 ixgbe_down(adapter);
2023 ixgbe_free_irq(adapter);
2024
2025 ixgbe_free_all_tx_resources(adapter);
2026 ixgbe_free_all_rx_resources(adapter);
2027
5eba3699 2028 ixgbe_release_hw_control(adapter);
9a799d71
AK		 2029
2030 return 0;
2031}
2032
2033/**
2034 * ixgbe_update_stats - Update the board statistics counters.
2035 * @adapter: board private structure
2036 **/
2037void ixgbe_update_stats(struct ixgbe_adapter *adapter)
2038{
2039 struct ixgbe_hw *hw = &adapter->hw;
6f11eef7
AV		 2040 u64 total_mpc = 0;
2041 u32 i, missed_rx = 0, mpc, bprc, lxon, lxoff, xon_off_tot;
9a799d71
AK		 2042
2043 adapter->stats.crcerrs += IXGBE_READ_REG(hw, IXGBE_CRCERRS);
6f11eef7
AV		 2044 for (i = 0; i < 8; i++) {
2045 /* for packet buffers not used, the register should read 0 */
2046 mpc = IXGBE_READ_REG(hw, IXGBE_MPC(i));
2047 missed_rx += mpc;
2048 adapter->stats.mpc[i] += mpc;
2049 total_mpc += adapter->stats.mpc[i];
2050 adapter->stats.rnbc[i] += IXGBE_READ_REG(hw, IXGBE_RNBC(i));
2051 }
2052 adapter->stats.gprc += IXGBE_READ_REG(hw, IXGBE_GPRC);
2053 /* work around hardware counting issue */
2054 adapter->stats.gprc -= missed_rx;
2055
2056 /* 82598 hardware only has a 32 bit counter in the high register */
9a799d71 2057 adapter->stats.gorc += IXGBE_READ_REG(hw, IXGBE_GORCH);
6f11eef7
AV		 2058 adapter->stats.gotc += IXGBE_READ_REG(hw, IXGBE_GOTCH);
2059 adapter->stats.tor += IXGBE_READ_REG(hw, IXGBE_TORH);
9a799d71
AK		 2060 bprc = IXGBE_READ_REG(hw, IXGBE_BPRC);
2061 adapter->stats.bprc += bprc;
2062 adapter->stats.mprc += IXGBE_READ_REG(hw, IXGBE_MPRC);
2063 adapter->stats.mprc -= bprc;
2064 adapter->stats.roc += IXGBE_READ_REG(hw, IXGBE_ROC);
2065 adapter->stats.prc64 += IXGBE_READ_REG(hw, IXGBE_PRC64);
2066 adapter->stats.prc127 += IXGBE_READ_REG(hw, IXGBE_PRC127);
2067 adapter->stats.prc255 += IXGBE_READ_REG(hw, IXGBE_PRC255);
2068 adapter->stats.prc511 += IXGBE_READ_REG(hw, IXGBE_PRC511);
2069 adapter->stats.prc1023 += IXGBE_READ_REG(hw, IXGBE_PRC1023);
2070 adapter->stats.prc1522 += IXGBE_READ_REG(hw, IXGBE_PRC1522);
9a799d71
AK		 2071 adapter->stats.rlec += IXGBE_READ_REG(hw, IXGBE_RLEC);
2072 adapter->stats.lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXC);
9a799d71 2073 adapter->stats.lxoffrxc += IXGBE_READ_REG(hw, IXGBE_LXOFFRXC);
6f11eef7
AV		 2074 lxon = IXGBE_READ_REG(hw, IXGBE_LXONTXC);
2075 adapter->stats.lxontxc += lxon;
2076 lxoff = IXGBE_READ_REG(hw, IXGBE_LXOFFTXC);
2077 adapter->stats.lxofftxc += lxoff;
9a799d71
AK		 2078 adapter->stats.ruc += IXGBE_READ_REG(hw, IXGBE_RUC);
2079 adapter->stats.gptc += IXGBE_READ_REG(hw, IXGBE_GPTC);
6f11eef7
AV		 2080 adapter->stats.mptc += IXGBE_READ_REG(hw, IXGBE_MPTC);
2081 /*
2082 * 82598 errata - tx of flow control packets is included in tx counters
2083 */
2084 xon_off_tot = lxon + lxoff;
2085 adapter->stats.gptc -= xon_off_tot;
2086 adapter->stats.mptc -= xon_off_tot;
2087 adapter->stats.gotc -= (xon_off_tot * (ETH_ZLEN + ETH_FCS_LEN));
9a799d71
AK		 2088 adapter->stats.ruc += IXGBE_READ_REG(hw, IXGBE_RUC);
2089 adapter->stats.rfc += IXGBE_READ_REG(hw, IXGBE_RFC);
2090 adapter->stats.rjc += IXGBE_READ_REG(hw, IXGBE_RJC);
9a799d71
AK		 2091 adapter->stats.tpr += IXGBE_READ_REG(hw, IXGBE_TPR);
2092 adapter->stats.ptc64 += IXGBE_READ_REG(hw, IXGBE_PTC64);
6f11eef7 2093 adapter->stats.ptc64 -= xon_off_tot;
9a799d71
AK		 2094 adapter->stats.ptc127 += IXGBE_READ_REG(hw, IXGBE_PTC127);
2095 adapter->stats.ptc255 += IXGBE_READ_REG(hw, IXGBE_PTC255);
2096 adapter->stats.ptc511 += IXGBE_READ_REG(hw, IXGBE_PTC511);
2097 adapter->stats.ptc1023 += IXGBE_READ_REG(hw, IXGBE_PTC1023);
2098 adapter->stats.ptc1522 += IXGBE_READ_REG(hw, IXGBE_PTC1522);
9a799d71
AK		 2099 adapter->stats.bptc += IXGBE_READ_REG(hw, IXGBE_BPTC);
2100
2101 /* Fill out the OS statistics structure */
9a799d71
AK		 2102 adapter->net_stats.multicast = adapter->stats.mprc;
2103
2104 /* Rx Errors */
2105 adapter->net_stats.rx_errors = adapter->stats.crcerrs +
2106 adapter->stats.rlec;
2107 adapter->net_stats.rx_dropped = 0;
2108 adapter->net_stats.rx_length_errors = adapter->stats.rlec;
2109 adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
6f11eef7 2110 adapter->net_stats.rx_missed_errors = total_mpc;
9a799d71
AK		 2111}
2112
2113/**
2114 * ixgbe_watchdog - Timer Call-back
2115 * @data: pointer to adapter cast into an unsigned long
2116 **/
2117static void ixgbe_watchdog(unsigned long data)
2118{
2119 struct ixgbe_adapter *adapter = (struct ixgbe_adapter *)data;
2120 struct net_device *netdev = adapter->netdev;
2121 bool link_up;
2122 u32 link_speed = 0;
2123
3957d63d 2124 adapter->hw.mac.ops.check_link(&adapter->hw, &(link_speed), &link_up);
9a799d71
AK		 2125
2126 if (link_up) {
2127 if (!netif_carrier_ok(netdev)) {
2128 u32 frctl = IXGBE_READ_REG(&adapter->hw, IXGBE_FCTRL);
2129 u32 rmcs = IXGBE_READ_REG(&adapter->hw, IXGBE_RMCS);
2130#define FLOW_RX (frctl & IXGBE_FCTRL_RFCE)
2131#define FLOW_TX (rmcs & IXGBE_RMCS_TFCE_802_3X)
2132 DPRINTK(LINK, INFO, "NIC Link is Up %s, "
2133 "Flow Control: %s\n",
2134 (link_speed == IXGBE_LINK_SPEED_10GB_FULL ?
2135 "10 Gbps" :
2136 (link_speed == IXGBE_LINK_SPEED_1GB_FULL ?
2137 "1 Gpbs" : "unknown speed")),
2138 ((FLOW_RX && FLOW_TX) ? "RX/TX" :
2139 (FLOW_RX ? "RX" :
2140 (FLOW_TX ? "TX" : "None"))));
2141
2142 netif_carrier_on(netdev);
2143 netif_wake_queue(netdev);
2144 } else {
2145 /* Force detection of hung controller */
2146 adapter->detect_tx_hung = true;
2147 }
2148 } else {
2149 if (netif_carrier_ok(netdev)) {
2150 DPRINTK(LINK, INFO, "NIC Link is Down\n");
2151 netif_carrier_off(netdev);
2152 netif_stop_queue(netdev);
2153 }
2154 }
2155
2156 ixgbe_update_stats(adapter);
2157
2158 /* Reset the timer */
2159 if (!test_bit(__IXGBE_DOWN, &adapter->state))
2160 mod_timer(&adapter->watchdog_timer,
2161 round_jiffies(jiffies + 2 * HZ));
2162}
2163
9a799d71
AK		 2164static int ixgbe_tso(struct ixgbe_adapter *adapter,
2165 struct ixgbe_ring *tx_ring, struct sk_buff *skb,
2166 u32 tx_flags, u8 *hdr_len)
2167{
2168 struct ixgbe_adv_tx_context_desc *context_desc;
2169 unsigned int i;
2170 int err;
2171 struct ixgbe_tx_buffer *tx_buffer_info;
2172 u32 vlan_macip_lens = 0, type_tucmd_mlhl = 0;
2173 u32 mss_l4len_idx = 0, l4len;
2174 *hdr_len = 0;
2175
2176 if (skb_is_gso(skb)) {
2177 if (skb_header_cloned(skb)) {
2178 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
2179 if (err)
2180 return err;
2181 }
2182 l4len = tcp_hdrlen(skb);
2183 *hdr_len += l4len;
2184
8327d000 2185 if (skb->protocol == htons(ETH_P_IP)) {
9a799d71
AK		 2186 struct iphdr *iph = ip_hdr(skb);
2187 iph->tot_len = 0;
2188 iph->check = 0;
2189 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
2190 iph->daddr, 0,
2191 IPPROTO_TCP,
2192 0);
2193 adapter->hw_tso_ctxt++;
2194 } else if (skb_shinfo(skb)->gso_type == SKB_GSO_TCPV6) {
2195 ipv6_hdr(skb)->payload_len = 0;
2196 tcp_hdr(skb)->check =
2197 ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
2198 &ipv6_hdr(skb)->daddr,
2199 0, IPPROTO_TCP, 0);
2200 adapter->hw_tso6_ctxt++;
2201 }
2202
2203 i = tx_ring->next_to_use;
2204
2205 tx_buffer_info = &tx_ring->tx_buffer_info[i];
2206 context_desc = IXGBE_TX_CTXTDESC_ADV(*tx_ring, i);
2207
2208 /* VLAN MACLEN IPLEN */
2209 if (tx_flags & IXGBE_TX_FLAGS_VLAN)
2210 vlan_macip_lens |=
2211 (tx_flags & IXGBE_TX_FLAGS_VLAN_MASK);
2212 vlan_macip_lens |= ((skb_network_offset(skb)) <<
2213 IXGBE_ADVTXD_MACLEN_SHIFT);
2214 *hdr_len += skb_network_offset(skb);
2215 vlan_macip_lens |=
2216 (skb_transport_header(skb) - skb_network_header(skb));
2217 *hdr_len +=
2218 (skb_transport_header(skb) - skb_network_header(skb));
2219 context_desc->vlan_macip_lens = cpu_to_le32(vlan_macip_lens);
2220 context_desc->seqnum_seed = 0;
2221
2222 /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
2223 type_tucmd_mlhl |= (IXGBE_TXD_CMD_DEXT |
2224 IXGBE_ADVTXD_DTYP_CTXT);
2225
8327d000 2226 if (skb->protocol == htons(ETH_P_IP))
9a799d71
AK		 2227 type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_IPV4;
2228 type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_L4T_TCP;
2229 context_desc->type_tucmd_mlhl = cpu_to_le32(type_tucmd_mlhl);
2230
2231 /* MSS L4LEN IDX */
2232 mss_l4len_idx |=
2233 (skb_shinfo(skb)->gso_size << IXGBE_ADVTXD_MSS_SHIFT);
2234 mss_l4len_idx |= (l4len << IXGBE_ADVTXD_L4LEN_SHIFT);
2235 context_desc->mss_l4len_idx = cpu_to_le32(mss_l4len_idx);
2236
2237 tx_buffer_info->time_stamp = jiffies;
2238 tx_buffer_info->next_to_watch = i;
2239
2240 i++;
2241 if (i == tx_ring->count)
2242 i = 0;
2243 tx_ring->next_to_use = i;
2244
2245 return true;
2246 }
2247 return false;
2248}
2249
2250static bool ixgbe_tx_csum(struct ixgbe_adapter *adapter,
2251 struct ixgbe_ring *tx_ring,
2252 struct sk_buff *skb, u32 tx_flags)
2253{
2254 struct ixgbe_adv_tx_context_desc *context_desc;
2255 unsigned int i;
2256 struct ixgbe_tx_buffer *tx_buffer_info;
2257 u32 vlan_macip_lens = 0, type_tucmd_mlhl = 0;
2258
2259 if (skb->ip_summed == CHECKSUM_PARTIAL ||
2260 (tx_flags & IXGBE_TX_FLAGS_VLAN)) {
2261 i = tx_ring->next_to_use;
2262 tx_buffer_info = &tx_ring->tx_buffer_info[i];
2263 context_desc = IXGBE_TX_CTXTDESC_ADV(*tx_ring, i);
2264
2265 if (tx_flags & IXGBE_TX_FLAGS_VLAN)
2266 vlan_macip_lens |=
2267 (tx_flags & IXGBE_TX_FLAGS_VLAN_MASK);
2268 vlan_macip_lens |= (skb_network_offset(skb) <<
2269 IXGBE_ADVTXD_MACLEN_SHIFT);
2270 if (skb->ip_summed == CHECKSUM_PARTIAL)
2271 vlan_macip_lens |= (skb_transport_header(skb) -
2272 skb_network_header(skb));
2273
2274 context_desc->vlan_macip_lens = cpu_to_le32(vlan_macip_lens);
2275 context_desc->seqnum_seed = 0;
2276
2277 type_tucmd_mlhl |= (IXGBE_TXD_CMD_DEXT |
2278 IXGBE_ADVTXD_DTYP_CTXT);
2279
2280 if (skb->ip_summed == CHECKSUM_PARTIAL) {
8327d000 2281 if (skb->protocol == htons(ETH_P_IP))
9a799d71
AK		 2282 type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_IPV4;
2283
2284 if (skb->sk->sk_protocol == IPPROTO_TCP)
2285 type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_L4T_TCP;
2286 }
2287
2288 context_desc->type_tucmd_mlhl = cpu_to_le32(type_tucmd_mlhl);
2289 context_desc->mss_l4len_idx = 0;
2290
2291 tx_buffer_info->time_stamp = jiffies;
2292 tx_buffer_info->next_to_watch = i;
2293 adapter->hw_csum_tx_good++;
2294 i++;
2295 if (i == tx_ring->count)
2296 i = 0;
2297 tx_ring->next_to_use = i;
2298
2299 return true;
2300 }
2301 return false;
2302}
2303
2304static int ixgbe_tx_map(struct ixgbe_adapter *adapter,
2305 struct ixgbe_ring *tx_ring,
2306 struct sk_buff *skb, unsigned int first)
2307{
2308 struct ixgbe_tx_buffer *tx_buffer_info;
2309 unsigned int len = skb->len;
2310 unsigned int offset = 0, size, count = 0, i;
2311 unsigned int nr_frags = skb_shinfo(skb)->nr_frags;
2312 unsigned int f;
2313
2314 len -= skb->data_len;
2315
2316 i = tx_ring->next_to_use;
2317
2318 while (len) {
2319 tx_buffer_info = &tx_ring->tx_buffer_info[i];
2320 size = min(len, (uint)IXGBE_MAX_DATA_PER_TXD);
2321
2322 tx_buffer_info->length = size;
2323 tx_buffer_info->dma = pci_map_single(adapter->pdev,
2324 skb->data + offset,
2325 size, PCI_DMA_TODEVICE);
2326 tx_buffer_info->time_stamp = jiffies;
2327 tx_buffer_info->next_to_watch = i;
2328
2329 len -= size;
2330 offset += size;
2331 count++;
2332 i++;
2333 if (i == tx_ring->count)
2334 i = 0;
2335 }
2336
2337 for (f = 0; f < nr_frags; f++) {
2338 struct skb_frag_struct *frag;
2339
2340 frag = &skb_shinfo(skb)->frags[f];
2341 len = frag->size;
2342 offset = frag->page_offset;
2343
2344 while (len) {
2345 tx_buffer_info = &tx_ring->tx_buffer_info[i];
2346 size = min(len, (uint)IXGBE_MAX_DATA_PER_TXD);
2347
2348 tx_buffer_info->length = size;
2349 tx_buffer_info->dma = pci_map_page(adapter->pdev,
2350 frag->page,
2351 offset,
2352 size, PCI_DMA_TODEVICE);
2353 tx_buffer_info->time_stamp = jiffies;
2354 tx_buffer_info->next_to_watch = i;
2355
2356 len -= size;
2357 offset += size;
2358 count++;
2359 i++;
2360 if (i == tx_ring->count)
2361 i = 0;
2362 }
2363 }
2364 if (i == 0)
2365 i = tx_ring->count - 1;
2366 else
2367 i = i - 1;
2368 tx_ring->tx_buffer_info[i].skb = skb;
2369 tx_ring->tx_buffer_info[first].next_to_watch = i;
2370
2371 return count;
2372}
2373
2374static void ixgbe_tx_queue(struct ixgbe_adapter *adapter,
2375 struct ixgbe_ring *tx_ring,
2376 int tx_flags, int count, u32 paylen, u8 hdr_len)
2377{
2378 union ixgbe_adv_tx_desc *tx_desc = NULL;
2379 struct ixgbe_tx_buffer *tx_buffer_info;
2380 u32 olinfo_status = 0, cmd_type_len = 0;
2381 unsigned int i;
2382 u32 txd_cmd = IXGBE_TXD_CMD_EOP | IXGBE_TXD_CMD_RS | IXGBE_TXD_CMD_IFCS;
2383
2384 cmd_type_len |= IXGBE_ADVTXD_DTYP_DATA;
2385
2386 cmd_type_len |= IXGBE_ADVTXD_DCMD_IFCS | IXGBE_ADVTXD_DCMD_DEXT;
2387
2388 if (tx_flags & IXGBE_TX_FLAGS_VLAN)
2389 cmd_type_len |= IXGBE_ADVTXD_DCMD_VLE;
2390
2391 if (tx_flags & IXGBE_TX_FLAGS_TSO) {
2392 cmd_type_len |= IXGBE_ADVTXD_DCMD_TSE;
2393
2394 olinfo_status |= IXGBE_TXD_POPTS_TXSM <<
2395 IXGBE_ADVTXD_POPTS_SHIFT;
2396
2397 if (tx_flags & IXGBE_TX_FLAGS_IPV4)
2398 olinfo_status |= IXGBE_TXD_POPTS_IXSM <<
2399 IXGBE_ADVTXD_POPTS_SHIFT;
2400
2401 } else if (tx_flags & IXGBE_TX_FLAGS_CSUM)
2402 olinfo_status |= IXGBE_TXD_POPTS_TXSM <<
2403 IXGBE_ADVTXD_POPTS_SHIFT;
2404
2405 olinfo_status |= ((paylen - hdr_len) << IXGBE_ADVTXD_PAYLEN_SHIFT);
2406
2407 i = tx_ring->next_to_use;
2408 while (count--) {
2409 tx_buffer_info = &tx_ring->tx_buffer_info[i];
2410 tx_desc = IXGBE_TX_DESC_ADV(*tx_ring, i);
2411 tx_desc->read.buffer_addr = cpu_to_le64(tx_buffer_info->dma);
2412 tx_desc->read.cmd_type_len =
2413 cpu_to_le32(cmd_type_len | tx_buffer_info->length);
2414 tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
2415
2416 i++;
2417 if (i == tx_ring->count)
2418 i = 0;
2419 }
2420
2421 tx_desc->read.cmd_type_len |= cpu_to_le32(txd_cmd);
2422
2423 /*
2424 * Force memory writes to complete before letting h/w
2425 * know there are new descriptors to fetch. (Only
2426 * applicable for weak-ordered memory model archs,
2427 * such as IA-64).
2428 */
2429 wmb();
2430
2431 tx_ring->next_to_use = i;
2432 writel(i, adapter->hw.hw_addr + tx_ring->tail);
2433}
2434
e092be60
AV		 2435static int __ixgbe_maybe_stop_tx(struct net_device *netdev,
2436 struct ixgbe_ring *tx_ring, int size)
2437{
2438 struct ixgbe_adapter *adapter = netdev_priv(netdev);
2439
2440 netif_stop_queue(netdev);
2441 /* Herbert's original patch had:
2442 * smp_mb__after_netif_stop_queue();
2443 * but since that doesn't exist yet, just open code it. */
2444 smp_mb();
2445
2446 /* We need to check again in a case another CPU has just
2447 * made room available. */
2448 if (likely(IXGBE_DESC_UNUSED(tx_ring) < size))
2449 return -EBUSY;
2450
2451 /* A reprieve! - use start_queue because it doesn't call schedule */
2452 netif_wake_queue(netdev);
2453 ++adapter->restart_queue;
2454 return 0;
2455}
2456
2457static int ixgbe_maybe_stop_tx(struct net_device *netdev,
2458 struct ixgbe_ring *tx_ring, int size)
2459{
2460 if (likely(IXGBE_DESC_UNUSED(tx_ring) >= size))
2461 return 0;
2462 return __ixgbe_maybe_stop_tx(netdev, tx_ring, size);
2463}
2464
2465
9a799d71
AK		 2466static int ixgbe_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
2467{
2468 struct ixgbe_adapter *adapter = netdev_priv(netdev);
2469 struct ixgbe_ring *tx_ring;
2470 unsigned int len = skb->len;
2471 unsigned int first;
2472 unsigned int tx_flags = 0;
9a799d71
AK		 2473 u8 hdr_len;
2474 int tso;
2475 unsigned int mss = 0;
2476 int count = 0;
2477 unsigned int f;
2478 unsigned int nr_frags = skb_shinfo(skb)->nr_frags;
2479 len -= skb->data_len;
2480
2481 tx_ring = adapter->tx_ring;
2482
2483 if (skb->len <= 0) {
2484 dev_kfree_skb(skb);
2485 return NETDEV_TX_OK;
2486 }
2487 mss = skb_shinfo(skb)->gso_size;
2488
2489 if (mss)
2490 count++;
2491 else if (skb->ip_summed == CHECKSUM_PARTIAL)
2492 count++;
2493
2494 count += TXD_USE_COUNT(len);
2495 for (f = 0; f < nr_frags; f++)
2496 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size);
2497
e092be60 2498 if (ixgbe_maybe_stop_tx(netdev, tx_ring, count)) {
9a799d71 2499 adapter->tx_busy++;
9a799d71
AK		 2500 return NETDEV_TX_BUSY;
2501 }
9a799d71
AK		 2502 if (adapter->vlgrp && vlan_tx_tag_present(skb)) {
2503 tx_flags |= IXGBE_TX_FLAGS_VLAN;
2504 tx_flags |= (vlan_tx_tag_get(skb) << IXGBE_TX_FLAGS_VLAN_SHIFT);
2505 }
2506
8327d000 2507 if (skb->protocol == htons(ETH_P_IP))
9a799d71
AK		 2508 tx_flags |= IXGBE_TX_FLAGS_IPV4;
2509 first = tx_ring->next_to_use;
2510 tso = ixgbe_tso(adapter, tx_ring, skb, tx_flags, &hdr_len);
2511 if (tso < 0) {
2512 dev_kfree_skb_any(skb);
2513 return NETDEV_TX_OK;
2514 }
2515
2516 if (tso)
2517 tx_flags |= IXGBE_TX_FLAGS_TSO;
2518 else if (ixgbe_tx_csum(adapter, tx_ring, skb, tx_flags) &&
2519 (skb->ip_summed == CHECKSUM_PARTIAL))
2520 tx_flags |= IXGBE_TX_FLAGS_CSUM;
2521
2522 ixgbe_tx_queue(adapter, tx_ring, tx_flags,
2523 ixgbe_tx_map(adapter, tx_ring, skb, first),
2524 skb->len, hdr_len);
2525
2526 netdev->trans_start = jiffies;
2527
e092be60 2528 ixgbe_maybe_stop_tx(netdev, tx_ring, DESC_NEEDED);
9a799d71
AK		 2529
2530 return NETDEV_TX_OK;
2531}
2532
2533/**
2534 * ixgbe_get_stats - Get System Network Statistics
2535 * @netdev: network interface device structure
2536 *
2537 * Returns the address of the device statistics structure.
2538 * The statistics are actually updated from the timer callback.
2539 **/
2540static struct net_device_stats *ixgbe_get_stats(struct net_device *netdev)
2541{
2542 struct ixgbe_adapter *adapter = netdev_priv(netdev);
2543
2544 /* only return the current stats */
2545 return &adapter->net_stats;
2546}
2547
2548/**
2549 * ixgbe_set_mac - Change the Ethernet Address of the NIC
2550 * @netdev: network interface device structure
2551 * @p: pointer to an address structure
2552 *
2553 * Returns 0 on success, negative on failure
2554 **/
2555static int ixgbe_set_mac(struct net_device *netdev, void *p)
2556{
2557 struct ixgbe_adapter *adapter = netdev_priv(netdev);
2558 struct sockaddr *addr = p;
2559
2560 if (!is_valid_ether_addr(addr->sa_data))
2561 return -EADDRNOTAVAIL;
2562
2563 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
2564 memcpy(adapter->hw.mac.addr, addr->sa_data, netdev->addr_len);
2565
2566 ixgbe_set_rar(&adapter->hw, 0, adapter->hw.mac.addr, 0, IXGBE_RAH_AV);
2567
2568 return 0;
2569}
2570
2571#ifdef CONFIG_NET_POLL_CONTROLLER
2572/*
2573 * Polling 'interrupt' - used by things like netconsole to send skbs
2574 * without having to re-enable interrupts. It's not called while
2575 * the interrupt routine is executing.
2576 */
2577static void ixgbe_netpoll(struct net_device *netdev)
2578{
2579 struct ixgbe_adapter *adapter = netdev_priv(netdev);
2580
2581 disable_irq(adapter->pdev->irq);
2582 adapter->flags |= IXGBE_FLAG_IN_NETPOLL;
2583 ixgbe_intr(adapter->pdev->irq, netdev);
2584 adapter->flags &= ~IXGBE_FLAG_IN_NETPOLL;
2585 enable_irq(adapter->pdev->irq);
2586}
2587#endif
2588
2589/**
2590 * ixgbe_probe - Device Initialization Routine
2591 * @pdev: PCI device information struct
2592 * @ent: entry in ixgbe_pci_tbl
2593 *
2594 * Returns 0 on success, negative on failure
2595 *
2596 * ixgbe_probe initializes an adapter identified by a pci_dev structure.
2597 * The OS initialization, configuring of the adapter private structure,
2598 * and a hardware reset occur.
2599 **/
2600static int __devinit ixgbe_probe(struct pci_dev *pdev,
2601 const struct pci_device_id *ent)
2602{
2603 struct net_device *netdev;
2604 struct ixgbe_adapter *adapter = NULL;
2605 struct ixgbe_hw *hw;
2606 const struct ixgbe_info *ii = ixgbe_info_tbl[ent->driver_data];
2607 unsigned long mmio_start, mmio_len;
2608 static int cards_found;
2609 int i, err, pci_using_dac;
2610 u16 link_status, link_speed, link_width;
2611 u32 part_num;
2612
2613 err = pci_enable_device(pdev);
2614 if (err)
2615 return err;
2616
2617 if (!pci_set_dma_mask(pdev, DMA_64BIT_MASK) &&
2618 !pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK)) {
2619 pci_using_dac = 1;
2620 } else {
2621 err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
2622 if (err) {
2623 err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
2624 if (err) {
2625 dev_err(&pdev->dev, "No usable DMA "
2626 "configuration, aborting\n");
2627 goto err_dma;
2628 }
2629 }
2630 pci_using_dac = 0;
2631 }
2632
2633 err = pci_request_regions(pdev, ixgbe_driver_name);
2634 if (err) {
2635 dev_err(&pdev->dev, "pci_request_regions failed 0x%x\n", err);
2636 goto err_pci_reg;
2637 }
2638
2639 pci_set_master(pdev);
2640
2641 netdev = alloc_etherdev(sizeof(struct ixgbe_adapter));
2642 if (!netdev) {
2643 err = -ENOMEM;
2644 goto err_alloc_etherdev;
2645 }
2646
9a799d71
AK		 2647 SET_NETDEV_DEV(netdev, &pdev->dev);
2648
2649 pci_set_drvdata(pdev, netdev);
2650 adapter = netdev_priv(netdev);
2651
2652 adapter->netdev = netdev;
2653 adapter->pdev = pdev;
2654 hw = &adapter->hw;
2655 hw->back = adapter;
2656 adapter->msg_enable = (1 << DEFAULT_DEBUG_LEVEL_SHIFT) - 1;
2657
2658 mmio_start = pci_resource_start(pdev, 0);
2659 mmio_len = pci_resource_len(pdev, 0);
2660
2661 hw->hw_addr = ioremap(mmio_start, mmio_len);
2662 if (!hw->hw_addr) {
2663 err = -EIO;
2664 goto err_ioremap;
2665 }
2666
2667 for (i = 1; i <= 5; i++) {
2668 if (pci_resource_len(pdev, i) == 0)
2669 continue;
2670 }
2671
2672 netdev->open = &ixgbe_open;
2673 netdev->stop = &ixgbe_close;
2674 netdev->hard_start_xmit = &ixgbe_xmit_frame;
2675 netdev->get_stats = &ixgbe_get_stats;
2676 netdev->set_multicast_list = &ixgbe_set_multi;
2677 netdev->set_mac_address = &ixgbe_set_mac;
2678 netdev->change_mtu = &ixgbe_change_mtu;
2679 ixgbe_set_ethtool_ops(netdev);
2680 netdev->tx_timeout = &ixgbe_tx_timeout;
2681 netdev->watchdog_timeo = 5 * HZ;
2682 netif_napi_add(netdev, &adapter->napi, ixgbe_clean, 64);
2683 netdev->vlan_rx_register = ixgbe_vlan_rx_register;
2684 netdev->vlan_rx_add_vid = ixgbe_vlan_rx_add_vid;
2685 netdev->vlan_rx_kill_vid = ixgbe_vlan_rx_kill_vid;
2686#ifdef CONFIG_NET_POLL_CONTROLLER
2687 netdev->poll_controller = ixgbe_netpoll;
2688#endif
2689 strcpy(netdev->name, pci_name(pdev));
2690
2691 netdev->mem_start = mmio_start;
2692 netdev->mem_end = mmio_start + mmio_len;
2693
2694 adapter->bd_number = cards_found;
2695
2696 /* PCI config space info */
2697 hw->vendor_id = pdev->vendor;
2698 hw->device_id = pdev->device;
2699 hw->revision_id = pdev->revision;
2700 hw->subsystem_vendor_id = pdev->subsystem_vendor;
2701 hw->subsystem_device_id = pdev->subsystem_device;
2702
2703 /* Setup hw api */
2704 memcpy(&hw->mac.ops, ii->mac_ops, sizeof(hw->mac.ops));
9a799d71
AK		 2705
2706 err = ii->get_invariants(hw);
2707 if (err)
2708 goto err_hw_init;
2709
2710 /* setup the private structure */
2711 err = ixgbe_sw_init(adapter);
2712 if (err)
2713 goto err_sw_init;
2714
2715 netdev->features = NETIF_F_SG |
2716 NETIF_F_HW_CSUM |
2717 NETIF_F_HW_VLAN_TX |
2718 NETIF_F_HW_VLAN_RX |
2719 NETIF_F_HW_VLAN_FILTER;
2720
2721 netdev->features |= NETIF_F_TSO;
2722
2723 netdev->features |= NETIF_F_TSO6;
2724 if (pci_using_dac)
2725 netdev->features |= NETIF_F_HIGHDMA;
2726
2727
2728 /* make sure the EEPROM is good */
2729 if (ixgbe_validate_eeprom_checksum(hw, NULL) < 0) {
2730 dev_err(&pdev->dev, "The EEPROM Checksum Is Not Valid\n");
2731 err = -EIO;
2732 goto err_eeprom;
2733 }
2734
2735 memcpy(netdev->dev_addr, hw->mac.perm_addr, netdev->addr_len);
2736 memcpy(netdev->perm_addr, hw->mac.perm_addr, netdev->addr_len);
2737
2738 if (ixgbe_validate_mac_addr(netdev->dev_addr)) {
2739 err = -EIO;
2740 goto err_eeprom;
2741 }
2742
2743 init_timer(&adapter->watchdog_timer);
2744 adapter->watchdog_timer.function = &ixgbe_watchdog;
2745 adapter->watchdog_timer.data = (unsigned long)adapter;
2746
2747 INIT_WORK(&adapter->reset_task, ixgbe_reset_task);
2748
2749 /* initialize default flow control settings */
2750 hw->fc.original_type = ixgbe_fc_full;
2751 hw->fc.type = ixgbe_fc_full;
2752 hw->fc.high_water = IXGBE_DEFAULT_FCRTH;
2753 hw->fc.low_water = IXGBE_DEFAULT_FCRTL;
2754 hw->fc.pause_time = IXGBE_DEFAULT_FCPAUSE;
2755
2756 /* Interrupt Throttle Rate */
2757 adapter->rx_eitr = (1000000 / IXGBE_DEFAULT_ITR_RX_USECS);
2758 adapter->tx_eitr = (1000000 / IXGBE_DEFAULT_ITR_TX_USECS);
2759
2760 /* print bus type/speed/width info */
2761 pci_read_config_word(pdev, IXGBE_PCI_LINK_STATUS, &link_status);
2762 link_speed = link_status & IXGBE_PCI_LINK_SPEED;
2763 link_width = link_status & IXGBE_PCI_LINK_WIDTH;
2764 dev_info(&pdev->dev, "(PCI Express:%s:%s) "
2765 "%02x:%02x:%02x:%02x:%02x:%02x\n",
2766 ((link_speed == IXGBE_PCI_LINK_SPEED_5000) ? "5.0Gb/s" :
2767 (link_speed == IXGBE_PCI_LINK_SPEED_2500) ? "2.5Gb/s" :
2768 "Unknown"),
2769 ((link_width == IXGBE_PCI_LINK_WIDTH_8) ? "Width x8" :
2770 (link_width == IXGBE_PCI_LINK_WIDTH_4) ? "Width x4" :
2771 (link_width == IXGBE_PCI_LINK_WIDTH_2) ? "Width x2" :
2772 (link_width == IXGBE_PCI_LINK_WIDTH_1) ? "Width x1" :
2773 "Unknown"),
2774 netdev->dev_addr[0], netdev->dev_addr[1], netdev->dev_addr[2],
2775 netdev->dev_addr[3], netdev->dev_addr[4], netdev->dev_addr[5]);
2776 ixgbe_read_part_num(hw, &part_num);
2777 dev_info(&pdev->dev, "MAC: %d, PHY: %d, PBA No: %06x-%03x\n",
2778 hw->mac.type, hw->phy.type,
2779 (part_num >> 8), (part_num & 0xff));
2780
2781 /* reset the hardware with the new settings */
2782 ixgbe_start_hw(hw);
2783
2784 netif_carrier_off(netdev);
2785 netif_stop_queue(netdev);
2786
2787 strcpy(netdev->name, "eth%d");
2788 err = register_netdev(netdev);
2789 if (err)
2790 goto err_register;
2791
2792
2793 dev_info(&pdev->dev, "Intel(R) 10 Gigabit Network Connection\n");
2794 cards_found++;
2795 return 0;
2796
2797err_register:
5eba3699 2798 ixgbe_release_hw_control(adapter);
9a799d71
AK		 2799err_hw_init:
2800err_sw_init:
2801err_eeprom:
2802 iounmap(hw->hw_addr);
2803err_ioremap:
2804 free_netdev(netdev);
2805err_alloc_etherdev:
2806 pci_release_regions(pdev);
2807err_pci_reg:
2808err_dma:
2809 pci_disable_device(pdev);
2810 return err;
2811}
2812
2813/**
2814 * ixgbe_remove - Device Removal Routine
2815 * @pdev: PCI device information struct
2816 *
2817 * ixgbe_remove is called by the PCI subsystem to alert the driver
2818 * that it should release a PCI device. The could be caused by a
2819 * Hot-Plug event, or because the driver is going to be removed from
2820 * memory.
2821 **/
2822static void __devexit ixgbe_remove(struct pci_dev *pdev)
2823{
2824 struct net_device *netdev = pci_get_drvdata(pdev);
2825 struct ixgbe_adapter *adapter = netdev_priv(netdev);
2826
2827 set_bit(__IXGBE_DOWN, &adapter->state);
2828 del_timer_sync(&adapter->watchdog_timer);
2829
2830 flush_scheduled_work();
2831
2832 unregister_netdev(netdev);
2833
5eba3699
AV		 2834 ixgbe_release_hw_control(adapter);
2835
9a799d71
AK		 2836 kfree(adapter->tx_ring);
2837 kfree(adapter->rx_ring);
2838
2839 iounmap(adapter->hw.hw_addr);
2840 pci_release_regions(pdev);
2841
2842 free_netdev(netdev);
2843
2844 pci_disable_device(pdev);
2845}
2846
2847/**
2848 * ixgbe_io_error_detected - called when PCI error is detected
2849 * @pdev: Pointer to PCI device
2850 * @state: The current pci connection state
2851 *
2852 * This function is called after a PCI bus error affecting
2853 * this device has been detected.
2854 */
2855static pci_ers_result_t ixgbe_io_error_detected(struct pci_dev *pdev,
2856 pci_channel_state_t state)
2857{
2858 struct net_device *netdev = pci_get_drvdata(pdev);
2859 struct ixgbe_adapter *adapter = netdev->priv;
2860
2861 netif_device_detach(netdev);
2862
2863 if (netif_running(netdev))
2864 ixgbe_down(adapter);
2865 pci_disable_device(pdev);
2866
2867 /* Request a slot slot reset. */
2868 return PCI_ERS_RESULT_NEED_RESET;
2869}
2870
2871/**
2872 * ixgbe_io_slot_reset - called after the pci bus has been reset.
2873 * @pdev: Pointer to PCI device
2874 *
2875 * Restart the card from scratch, as if from a cold-boot.
2876 */
2877static pci_ers_result_t ixgbe_io_slot_reset(struct pci_dev *pdev)
2878{
2879 struct net_device *netdev = pci_get_drvdata(pdev);
2880 struct ixgbe_adapter *adapter = netdev->priv;
2881
2882 if (pci_enable_device(pdev)) {
2883 DPRINTK(PROBE, ERR,
2884 "Cannot re-enable PCI device after reset.\n");
2885 return PCI_ERS_RESULT_DISCONNECT;
2886 }
2887 pci_set_master(pdev);
2888
2889 pci_enable_wake(pdev, PCI_D3hot, 0);
2890 pci_enable_wake(pdev, PCI_D3cold, 0);
2891
2892 ixgbe_reset(adapter);
2893
2894 return PCI_ERS_RESULT_RECOVERED;
2895}
2896
2897/**
2898 * ixgbe_io_resume - called when traffic can start flowing again.
2899 * @pdev: Pointer to PCI device
2900 *
2901 * This callback is called when the error recovery driver tells us that
2902 * its OK to resume normal operation.
2903 */
2904static void ixgbe_io_resume(struct pci_dev *pdev)
2905{
2906 struct net_device *netdev = pci_get_drvdata(pdev);
2907 struct ixgbe_adapter *adapter = netdev->priv;
2908
2909 if (netif_running(netdev)) {
2910 if (ixgbe_up(adapter)) {
2911 DPRINTK(PROBE, INFO, "ixgbe_up failed after reset\n");
2912 return;
2913 }
2914 }
2915
2916 netif_device_attach(netdev);
2917
2918}
2919
2920static struct pci_error_handlers ixgbe_err_handler = {
2921 .error_detected = ixgbe_io_error_detected,
2922 .slot_reset = ixgbe_io_slot_reset,
2923 .resume = ixgbe_io_resume,
2924};
2925
2926static struct pci_driver ixgbe_driver = {
2927 .name = ixgbe_driver_name,
2928 .id_table = ixgbe_pci_tbl,
2929 .probe = ixgbe_probe,
2930 .remove = __devexit_p(ixgbe_remove),
2931#ifdef CONFIG_PM
2932 .suspend = ixgbe_suspend,
2933 .resume = ixgbe_resume,
2934#endif
2935 .shutdown = ixgbe_shutdown,
2936 .err_handler = &ixgbe_err_handler
2937};
2938
2939/**
2940 * ixgbe_init_module - Driver Registration Routine
2941 *
2942 * ixgbe_init_module is the first routine called when the driver is
2943 * loaded. All it does is register with the PCI subsystem.
2944 **/
2945static int __init ixgbe_init_module(void)
2946{
2947 int ret;
2948 printk(KERN_INFO "%s: %s - version %s\n", ixgbe_driver_name,
2949 ixgbe_driver_string, ixgbe_driver_version);
2950
2951 printk(KERN_INFO "%s: %s\n", ixgbe_driver_name, ixgbe_copyright);
2952
2953 ret = pci_register_driver(&ixgbe_driver);
2954 return ret;
2955}
2956module_init(ixgbe_init_module);
2957
2958/**
2959 * ixgbe_exit_module - Driver Exit Cleanup Routine
2960 *
2961 * ixgbe_exit_module is called just before the driver is removed
2962 * from memory.
2963 **/
2964static void __exit ixgbe_exit_module(void)
2965{
2966 pci_unregister_driver(&ixgbe_driver);
2967}
2968module_exit(ixgbe_exit_module);
2969
2970/* ixgbe_main.c */
Linux 6.x block layer and io_uring tree(s)