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qlcnic: 83xx data path routines
[linux-2.6-block.git] / drivers / net / ethernet / qlogic / qlcnic / qlcnic_83xx_hw.h
CommitLineData
7f966452
SC		 1#ifndef __QLCNIC_83XX_HW_H
2#define __QLCNIC_83XX_HW_H
3
4#include <linux/types.h>
5#include <linux/etherdevice.h>
6#include "qlcnic_hw.h"
7
8/* Directly mapped registers */
9#define QLC_83XX_CRB_WIN_BASE 0x3800
10#define QLC_83XX_CRB_WIN_FUNC(f) (QLC_83XX_CRB_WIN_BASE+((f)*4))
11#define QLC_83XX_SEM_LOCK_BASE 0x3840
12#define QLC_83XX_SEM_UNLOCK_BASE 0x3844
13#define QLC_83XX_SEM_LOCK_FUNC(f) (QLC_83XX_SEM_LOCK_BASE+((f)*8))
14#define QLC_83XX_SEM_UNLOCK_FUNC(f) (QLC_83XX_SEM_UNLOCK_BASE+((f)*8))
15#define QLC_83XX_LINK_STATE(f) (0x3698+((f) > 7 ? 4 : 0))
16#define QLC_83XX_LINK_SPEED(f) (0x36E0+(((f) >> 2) * 4))
17#define QLC_83XX_LINK_SPEED_FACTOR 10
18#define QLC_83xx_FUNC_VAL(v, f) ((v) & (1 << (f * 4)))
19#define QLC_83XX_INTX_PTR 0x38C0
20#define QLC_83XX_INTX_TRGR 0x38C4
21#define QLC_83XX_INTX_MASK 0x38C8
22
23#define QLC_83XX_DRV_LOCK_WAIT_COUNTER 100
24#define QLC_83XX_DRV_LOCK_WAIT_DELAY 20
25#define QLC_83XX_NEED_DRV_LOCK_RECOVERY 1
26#define QLC_83XX_DRV_LOCK_RECOVERY_IN_PROGRESS 2
27#define QLC_83XX_MAX_DRV_LOCK_RECOVERY_ATTEMPT 3
28#define QLC_83XX_DRV_LOCK_RECOVERY_DELAY 200
29#define QLC_83XX_DRV_LOCK_RECOVERY_STATUS_MASK 0x3
30
31#define QLC_83XX_NO_NIC_RESOURCE 0x5
32#define QLC_83XX_MAC_PRESENT 0xC
33#define QLC_83XX_MAC_ABSENT 0xD
34
35
36#define QLC_83XX_FLASH_SECTOR_SIZE (64 * 1024)
37
38/* PEG status definitions */
39#define QLC_83XX_CMDPEG_COMPLETE 0xff01
40#define QLC_83XX_VALID_INTX_BIT30(val) ((val) & BIT_30)
41#define QLC_83XX_VALID_INTX_BIT31(val) ((val) & BIT_31)
42#define QLC_83XX_INTX_FUNC(val) ((val) & 0xFF)
43#define QLC_83XX_LEGACY_INTX_MAX_RETRY 100
44#define QLC_83XX_LEGACY_INTX_DELAY 4
45#define QLC_83XX_REG_DESC 1
46#define QLC_83XX_LRO_DESC 2
47#define QLC_83XX_CTRL_DESC 3
48#define QLC_83XX_FW_CAPABILITY_TSO BIT_6
49#define QLC_83XX_FW_CAP_LRO_MSS BIT_17
50#define QLC_83XX_HOST_RDS_MODE_UNIQUE 0
51#define QLC_83XX_HOST_SDS_MBX_IDX 8
52
53#define QLCNIC_HOST_RDS_MBX_IDX 88
54#define QLCNIC_MAX_RING_SETS 8
55
56struct qlcnic_intrpt_config {
57 u8 type;
58 u8 enabled;
59 u16 id;
60 u32 src;
61};
62
63struct qlcnic_macvlan_mbx {
64 u8 mac[ETH_ALEN];
65 u16 vlan;
66};
67
68
69/* Mailbox process AEN count */
70#define QLC_83XX_IDC_COMP_AEN 3
71#define QLC_83XX_MBX_AEN_CNT 5
72#define QLC_83XX_MODULE_LOADED 1
73#define QLC_83XX_MBX_READY 2
74#define QLC_83XX_MBX_AEN_ACK 3
75#define QLC_83XX_SFP_PRESENT(data) ((data) & 3)
76#define QLC_83XX_SFP_ERR(data) (((data) >> 2) & 3)
77#define QLC_83XX_SFP_MODULE_TYPE(data) (((data) >> 4) & 0x1F)
78#define QLC_83XX_SFP_CU_LENGTH(data) (LSB((data) >> 16))
79#define QLC_83XX_SFP_TX_FAULT(data) ((data) & BIT_10)
80#define QLC_83XX_SFP_10G_CAPABLE(data) ((data) & BIT_11)
81#define QLC_83XX_LINK_STATS(data) ((data) & BIT_0)
82#define QLC_83XX_CURRENT_LINK_SPEED(data) (((data) >> 3) & 7)
83#define QLC_83XX_LINK_PAUSE(data) (((data) >> 6) & 3)
84#define QLC_83XX_LINK_LB(data) (((data) >> 8) & 7)
85#define QLC_83XX_LINK_FEC(data) ((data) & BIT_12)
86#define QLC_83XX_LINK_EEE(data) ((data) & BIT_13)
87#define QLC_83XX_DCBX(data) (((data) >> 28) & 7)
88#define QLC_83XX_AUTONEG(data) ((data) & BIT_15)
89#define QLC_83XX_CFG_STD_PAUSE (1 << 5)
90#define QLC_83XX_CFG_STD_TX_PAUSE (1 << 20)
91#define QLC_83XX_CFG_STD_RX_PAUSE (2 << 20)
92#define QLC_83XX_CFG_STD_TX_RX_PAUSE (3 << 20)
93#define QLC_83XX_ENABLE_AUTONEG (1 << 15)
94#define QLC_83XX_CFG_LOOPBACK_HSS (2 << 1)
95#define QLC_83XX_CFG_LOOPBACK_PHY (3 << 1)
96#define QLC_83XX_CFG_LOOPBACK_EXT (4 << 1)
97
98/* LED configuration settings */
99#define QLC_83XX_ENABLE_BEACON 0xe
100#define QLC_83XX_LED_RATE 0xff
101#define QLC_83XX_LED_ACT (1 << 10)
102#define QLC_83XX_LED_MOD (0 << 13)
103#define QLC_83XX_LED_CONFIG (QLC_83XX_LED_RATE | QLC_83XX_LED_ACT | \
104 QLC_83XX_LED_MOD)
105
106#define QLC_83XX_10M_LINK 1
107#define QLC_83XX_100M_LINK 2
108#define QLC_83XX_1G_LINK 3
109#define QLC_83XX_10G_LINK 4
110#define QLC_83XX_STAT_TX 3
111#define QLC_83XX_STAT_RX 2
112#define QLC_83XX_STAT_MAC 1
113#define QLC_83XX_TX_STAT_REGS 14
114#define QLC_83XX_RX_STAT_REGS 40
115#define QLC_83XX_MAC_STAT_REGS 80
116
117#define QLC_83XX_GET_FUNC_PRIVILEGE(VAL, FN) (0x3 & ((VAL) >> (FN * 2)))
118#define QLC_83XX_SET_FUNC_OPMODE(VAL, FN) ((VAL) << (FN * 2))
119#define QLC_83XX_DEFAULT_OPMODE 0x55555555
120#define QLC_83XX_PRIVLEGED_FUNC 0x1
121#define QLC_83XX_VIRTUAL_FUNC 0x2
122
123#define QLC_83XX_LB_MAX_FILTERS 2048
124#define QLC_83XX_LB_BUCKET_SIZE 256
125#define QLC_83XX_MINIMUM_VECTOR 3
126
127#define QLC_83XX_GET_FUNC_MODE_FROM_NPAR_INFO(val) (val & 0x80000000)
128#define QLC_83XX_GET_LRO_CAPABILITY(val) (val & 0x20)
129#define QLC_83XX_GET_LSO_CAPABILITY(val) (val & 0x40)
130#define QLC_83XX_GET_LSO_CAPABILITY(val) (val & 0x40)
131#define QLC_83XX_GET_HW_LRO_CAPABILITY(val) (val & 0x400)
132#define QLC_83XX_GET_VLAN_ALIGN_CAPABILITY(val) (val & 0x4000)
133#define QLC_83XX_VIRTUAL_NIC_MODE 0xFF
134#define QLC_83XX_DEFAULT_MODE 0x0
135#define QLCNIC_BRDTYPE_83XX_10G 0x0083
136
137/* Additional registers in 83xx */
138enum qlc_83xx_ext_regs {
139 QLCNIC_GLOBAL_RESET = 0,
140 QLCNIC_WILDCARD,
141 QLCNIC_INFORMANT,
142 QLCNIC_HOST_MBX_CTRL,
143 QLCNIC_FW_MBX_CTRL,
144 QLCNIC_BOOTLOADER_ADDR,
145 QLCNIC_BOOTLOADER_SIZE,
146 QLCNIC_FW_IMAGE_ADDR,
147 QLCNIC_MBX_INTR_ENBL,
148 QLCNIC_DEF_INT_MASK,
149 QLCNIC_DEF_INT_ID,
150 QLC_83XX_IDC_MAJ_VERSION,
151 QLC_83XX_IDC_DEV_STATE,
152 QLC_83XX_IDC_DRV_PRESENCE,
153 QLC_83XX_IDC_DRV_ACK,
154 QLC_83XX_IDC_CTRL,
155 QLC_83XX_IDC_DRV_AUDIT,
156 QLC_83XX_IDC_MIN_VERSION,
157 QLC_83XX_RECOVER_DRV_LOCK,
158 QLC_83XX_IDC_PF_0,
159 QLC_83XX_IDC_PF_1,
160 QLC_83XX_IDC_PF_2,
161 QLC_83XX_IDC_PF_3,
162 QLC_83XX_IDC_PF_4,
163 QLC_83XX_IDC_PF_5,
164 QLC_83XX_IDC_PF_6,
165 QLC_83XX_IDC_PF_7,
166 QLC_83XX_IDC_PF_8,
167 QLC_83XX_IDC_PF_9,
168 QLC_83XX_IDC_PF_10,
169 QLC_83XX_IDC_PF_11,
170 QLC_83XX_IDC_PF_12,
171 QLC_83XX_IDC_PF_13,
172 QLC_83XX_IDC_PF_14,
173 QLC_83XX_IDC_PF_15,
174 QLC_83XX_IDC_DEV_PARTITION_INFO_1,
175 QLC_83XX_IDC_DEV_PARTITION_INFO_2,
176 QLC_83XX_DRV_OP_MODE,
177 QLC_83XX_VNIC_STATE,
178 QLC_83XX_DRV_LOCK,
179 QLC_83XX_DRV_UNLOCK,
180 QLC_83XX_DRV_LOCK_ID,
181 QLC_83XX_ASIC_TEMP,
182};
183
184/* 83xx funcitons */
185int qlcnic_83xx_get_fw_version(struct qlcnic_adapter *);
186int qlcnic_83xx_mbx_op(struct qlcnic_adapter *, struct qlcnic_cmd_args *);
187int qlcnic_83xx_setup_intr(struct qlcnic_adapter *, u8);
188void qlcnic_83xx_get_func_no(struct qlcnic_adapter *);
189int qlcnic_83xx_cam_lock(struct qlcnic_adapter *);
190void qlcnic_83xx_cam_unlock(struct qlcnic_adapter *);
191int qlcnic_send_ctrl_op(struct qlcnic_adapter *, struct qlcnic_cmd_args *, u32);
192void qlcnic_83xx_write_crb(struct qlcnic_adapter *, char *, loff_t, size_t);
193void qlcnic_83xx_read_crb(struct qlcnic_adapter *, char *, loff_t, size_t);
194int qlcnic_83xx_rd_reg_indirect(struct qlcnic_adapter *, ulong);
195int qlcnic_83xx_wrt_reg_indirect(struct qlcnic_adapter *, ulong, u32);
4be41e92 196void qlcnic_83xx_process_rcv_diag(struct qlcnic_adapter *, int, u64 []);
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SC		 197int qlcnic_83xx_nic_set_promisc(struct qlcnic_adapter *, u32);
198int qlcnic_83xx_set_lb_mode(struct qlcnic_adapter *, u8);
199int qlcnic_83xx_clear_lb_mode(struct qlcnic_adapter *, u8);
200int qlcnic_83xx_config_hw_lro(struct qlcnic_adapter *, int);
201int qlcnic_83xx_config_rss(struct qlcnic_adapter *, int);
202int qlcnic_83xx_config_intr_coalesce(struct qlcnic_adapter *);
203void qlcnic_83xx_change_l2_filter(struct qlcnic_adapter *, u64 *, __le16);
204int qlcnic_83xx_get_pci_info(struct qlcnic_adapter *, struct qlcnic_pci_info *);
205int qlcnic_83xx_set_nic_info(struct qlcnic_adapter *, struct qlcnic_info *);
206void qlcnic_83xx_register_nic_idc_func(struct qlcnic_adapter *, int);
207
4be41e92
SC		 208int qlcnic_83xx_napi_add(struct qlcnic_adapter *, struct net_device *);
209void qlcnic_83xx_napi_del(struct qlcnic_adapter *);
210void qlcnic_83xx_napi_enable(struct qlcnic_adapter *);
211void qlcnic_83xx_napi_disable(struct qlcnic_adapter *);
212
7f966452
SC		 213void qlcnic_ind_wr(struct qlcnic_adapter *, u32, u32);
214int qlcnic_ind_rd(struct qlcnic_adapter *, u32);
215void qlcnic_83xx_get_stats(struct qlcnic_adapter *,
216 struct ethtool_stats *, u64 *);
217int qlcnic_83xx_create_rx_ctx(struct qlcnic_adapter *);
218int qlcnic_83xx_create_tx_ctx(struct qlcnic_adapter *,
219 struct qlcnic_host_tx_ring *, int);
220int qlcnic_83xx_get_nic_info(struct qlcnic_adapter *, struct qlcnic_info *, u8);
221int qlcnic_83xx_setup_link_event(struct qlcnic_adapter *, int);
222void qlcnic_83xx_process_rcv_ring_diag(struct qlcnic_host_sds_ring *);
223int qlcnic_83xx_config_intrpt(struct qlcnic_adapter *, bool);
224int qlcnic_83xx_sre_macaddr_change(struct qlcnic_adapter *, u8 *, __le16, u8);
225int qlcnic_83xx_get_mac_address(struct qlcnic_adapter *, u8 *);
226void qlcnic_83xx_configure_mac(struct qlcnic_adapter *, u8 *, u8,
227 struct qlcnic_cmd_args *);
228int qlcnic_83xx_alloc_mbx_args(struct qlcnic_cmd_args *,
229 struct qlcnic_adapter *, u32);
230void qlcnic_free_mbx_args(struct qlcnic_cmd_args *);
231void qlcnic_set_npar_data(struct qlcnic_adapter *, const struct qlcnic_info *,
232 struct qlcnic_info *);
233void qlcnic_83xx_config_intr_coal(struct qlcnic_adapter *);
234irqreturn_t qlcnic_83xx_handle_aen(int, void *);
235int qlcnic_83xx_get_port_info(struct qlcnic_adapter *);
236void qlcnic_83xx_enable_mbx_intrpt(struct qlcnic_adapter *);
237irqreturn_t qlcnic_83xx_clear_legacy_intr(struct qlcnic_adapter *);
238irqreturn_t qlcnic_83xx_tmp_intr(int, void *);
239void qlcnic_83xx_enable_intr(struct qlcnic_adapter *,
240 struct qlcnic_host_sds_ring *);
241void qlcnic_83xx_check_vf(struct qlcnic_adapter *,
242 const struct pci_device_id *);
243void qlcnic_83xx_process_aen(struct qlcnic_adapter *);
244int qlcnic_83xx_get_port_config(struct qlcnic_adapter *);
245int qlcnic_83xx_set_port_config(struct qlcnic_adapter *);
246int qlcnic_enable_eswitch(struct qlcnic_adapter *, u8, u8);
247int qlcnic_83xx_get_nic_configuration(struct qlcnic_adapter *);
248int qlcnic_83xx_config_default_opmode(struct qlcnic_adapter *);
249int qlcnic_83xx_setup_mbx_intr(struct qlcnic_adapter *);
250void qlcnic_83xx_free_mbx_intr(struct qlcnic_adapter *);
251void qlcnic_83xx_register_map(struct qlcnic_hardware_context *);
252void qlcnic_83xx_idc_aen_work(struct work_struct *);
253void qlcnic_83xx_config_ipaddr(struct qlcnic_adapter *, __be32, int);
254#endif
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