projects / linux-2.6-block.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
net: add skb frag size accessors
[linux-2.6-block.git] / drivers / net / ethernet / neterion / vxge / vxge-main.c
CommitLineData
703da5a1
RV		 1/******************************************************************************
2* This software may be used and distributed according to the terms of
3* the GNU General Public License (GPL), incorporated herein by reference.
4* Drivers based on or derived from this code fall under the GPL and must
5* retain the authorship, copyright and license notice. This file is not
6* a complete program and may only be used when the entire operating
7* system is licensed under the GPL.
8* See the file COPYING in this distribution for more information.
9*
926bd900 10* vxge-main.c: Driver for Exar Corp's X3100 Series 10GbE PCIe I/O
703da5a1 11* Virtualized Server Adapter.
926bd900 12* Copyright(c) 2002-2010 Exar Corp.
703da5a1
RV		 13*
14* The module loadable parameters that are supported by the driver and a brief
15* explanation of all the variables:
16* vlan_tag_strip:
17* Strip VLAN Tag enable/disable. Instructs the device to remove
18* the VLAN tag from all received tagged frames that are not
19* replicated at the internal L2 switch.
20* 0 - Do not strip the VLAN tag.
21* 1 - Strip the VLAN tag.
22*
23* addr_learn_en:
24* Enable learning the mac address of the guest OS interface in
25* a virtualization environment.
26* 0 - DISABLE
27* 1 - ENABLE
28*
29* max_config_port:
30* Maximum number of port to be supported.
31* MIN -1 and MAX - 2
32*
33* max_config_vpath:
34* This configures the maximum no of VPATH configures for each
35* device function.
36* MIN - 1 and MAX - 17
37*
38* max_config_dev:
39* This configures maximum no of Device function to be enabled.
40* MIN - 1 and MAX - 17
41*
42******************************************************************************/
43
75f5e1c6
JP		 44#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
45
53515734 46#include <linux/bitops.h>
703da5a1 47#include <linux/if_vlan.h>
a6b7a407 48#include <linux/interrupt.h>
703da5a1 49#include <linux/pci.h>
5a0e3ad6 50#include <linux/slab.h>
2b05e002 51#include <linux/tcp.h>
703da5a1
RV		 52#include <net/ip.h>
53#include <linux/netdevice.h>
54#include <linux/etherdevice.h>
e8ac1756 55#include <linux/firmware.h>
b81b3733 56#include <linux/net_tstamp.h>
70c71606 57#include <linux/prefetch.h>
703da5a1
RV		 58#include "vxge-main.h"
59#include "vxge-reg.h"
60
61MODULE_LICENSE("Dual BSD/GPL");
62MODULE_DESCRIPTION("Neterion's X3100 Series 10GbE PCIe I/O"
63 "Virtualized Server Adapter");
64
a3aa1884 65static DEFINE_PCI_DEVICE_TABLE(vxge_id_table) = {
703da5a1
RV		 66 {PCI_VENDOR_ID_S2IO, PCI_DEVICE_ID_TITAN_WIN, PCI_ANY_ID,
67 PCI_ANY_ID},
68 {PCI_VENDOR_ID_S2IO, PCI_DEVICE_ID_TITAN_UNI, PCI_ANY_ID,
69 PCI_ANY_ID},
70 {0}
71};
72
73MODULE_DEVICE_TABLE(pci, vxge_id_table);
74
75VXGE_MODULE_PARAM_INT(vlan_tag_strip, VXGE_HW_VPATH_RPA_STRIP_VLAN_TAG_ENABLE);
76VXGE_MODULE_PARAM_INT(addr_learn_en, VXGE_HW_MAC_ADDR_LEARN_DEFAULT);
77VXGE_MODULE_PARAM_INT(max_config_port, VXGE_MAX_CONFIG_PORT);
78VXGE_MODULE_PARAM_INT(max_config_vpath, VXGE_USE_DEFAULT);
79VXGE_MODULE_PARAM_INT(max_mac_vpath, VXGE_MAX_MAC_ADDR_COUNT);
80VXGE_MODULE_PARAM_INT(max_config_dev, VXGE_MAX_CONFIG_DEV);
81
82static u16 vpath_selector[VXGE_HW_MAX_VIRTUAL_PATHS] =
83 {0, 1, 3, 3, 7, 7, 7, 7, 15, 15, 15, 15, 15, 15, 15, 15, 31};
84static unsigned int bw_percentage[VXGE_HW_MAX_VIRTUAL_PATHS] =
85 {[0 ...(VXGE_HW_MAX_VIRTUAL_PATHS - 1)] = 0xFF};
86module_param_array(bw_percentage, uint, NULL, 0);
87
88static struct vxge_drv_config *driver_config;
89
90static inline int is_vxge_card_up(struct vxgedev *vdev)
91{
92 return test_bit(__VXGE_STATE_CARD_UP, &vdev->state);
93}
94
95static inline void VXGE_COMPLETE_VPATH_TX(struct vxge_fifo *fifo)
96{
ff67df55
BL		 97 struct sk_buff **skb_ptr = NULL;
98 struct sk_buff **temp;
99#define NR_SKB_COMPLETED 128
100 struct sk_buff *completed[NR_SKB_COMPLETED];
101 int more;
703da5a1 102
ff67df55
BL		 103 do {
104 more = 0;
105 skb_ptr = completed;
106
98f45da2 107 if (__netif_tx_trylock(fifo->txq)) {
ff67df55
BL		 108 vxge_hw_vpath_poll_tx(fifo->handle, &skb_ptr,
109 NR_SKB_COMPLETED, &more);
98f45da2 110 __netif_tx_unlock(fifo->txq);
ff67df55 111 }
98f45da2 112
ff67df55
BL		 113 /* free SKBs */
114 for (temp = completed; temp != skb_ptr; temp++)
115 dev_kfree_skb_irq(*temp);
98f45da2 116 } while (more);
703da5a1
RV		 117}
118
119static inline void VXGE_COMPLETE_ALL_TX(struct vxgedev *vdev)
120{
121 int i;
122
123 /* Complete all transmits */
124 for (i = 0; i < vdev->no_of_vpath; i++)
125 VXGE_COMPLETE_VPATH_TX(&vdev->vpaths[i].fifo);
126}
127
128static inline void VXGE_COMPLETE_ALL_RX(struct vxgedev *vdev)
129{
130 int i;
131 struct vxge_ring *ring;
132
133 /* Complete all receives*/
134 for (i = 0; i < vdev->no_of_vpath; i++) {
135 ring = &vdev->vpaths[i].ring;
136 vxge_hw_vpath_poll_rx(ring->handle);
137 }
138}
139
703da5a1
RV		 140/*
141 * vxge_callback_link_up
142 *
143 * This function is called during interrupt context to notify link up state
144 * change.
145 */
528f7272 146static void vxge_callback_link_up(struct __vxge_hw_device *hldev)
703da5a1
RV		 147{
148 struct net_device *dev = hldev->ndev;
5f54cebb 149 struct vxgedev *vdev = netdev_priv(dev);
703da5a1
RV		 150
151 vxge_debug_entryexit(VXGE_TRACE, "%s: %s:%d",
152 vdev->ndev->name, __func__, __LINE__);
75f5e1c6 153 netdev_notice(vdev->ndev, "Link Up\n");
703da5a1
RV		 154 vdev->stats.link_up++;
155
156 netif_carrier_on(vdev->ndev);
d03848e0 157 netif_tx_wake_all_queues(vdev->ndev);
703da5a1
RV		 158
159 vxge_debug_entryexit(VXGE_TRACE,
160 "%s: %s:%d Exiting...", vdev->ndev->name, __func__, __LINE__);
161}
162
163/*
164 * vxge_callback_link_down
165 *
166 * This function is called during interrupt context to notify link down state
167 * change.
168 */
528f7272 169static void vxge_callback_link_down(struct __vxge_hw_device *hldev)
703da5a1
RV		 170{
171 struct net_device *dev = hldev->ndev;
5f54cebb 172 struct vxgedev *vdev = netdev_priv(dev);
703da5a1
RV		 173
174 vxge_debug_entryexit(VXGE_TRACE,
175 "%s: %s:%d", vdev->ndev->name, __func__, __LINE__);
75f5e1c6 176 netdev_notice(vdev->ndev, "Link Down\n");
703da5a1
RV		 177
178 vdev->stats.link_down++;
179 netif_carrier_off(vdev->ndev);
d03848e0 180 netif_tx_stop_all_queues(vdev->ndev);
703da5a1
RV		 181
182 vxge_debug_entryexit(VXGE_TRACE,
183 "%s: %s:%d Exiting...", vdev->ndev->name, __func__, __LINE__);
184}
185
186/*
187 * vxge_rx_alloc
188 *
189 * Allocate SKB.
190 */
528f7272 191static struct sk_buff *
703da5a1
RV		 192vxge_rx_alloc(void *dtrh, struct vxge_ring *ring, const int skb_size)
193{
194 struct net_device *dev;
195 struct sk_buff *skb;
196 struct vxge_rx_priv *rx_priv;
197
198 dev = ring->ndev;
199 vxge_debug_entryexit(VXGE_TRACE, "%s: %s:%d",
200 ring->ndev->name, __func__, __LINE__);
201
202 rx_priv = vxge_hw_ring_rxd_private_get(dtrh);
203
204 /* try to allocate skb first. this one may fail */
205 skb = netdev_alloc_skb(dev, skb_size +
206 VXGE_HW_HEADER_ETHERNET_II_802_3_ALIGN);
207 if (skb == NULL) {
208 vxge_debug_mem(VXGE_ERR,
209 "%s: out of memory to allocate SKB", dev->name);
210 ring->stats.skb_alloc_fail++;
211 return NULL;
212 }
213
214 vxge_debug_mem(VXGE_TRACE,
215 "%s: %s:%d Skb : 0x%p", ring->ndev->name,
216 __func__, __LINE__, skb);
217
218 skb_reserve(skb, VXGE_HW_HEADER_ETHERNET_II_802_3_ALIGN);
219
220 rx_priv->skb = skb;
ea11bbe0 221 rx_priv->skb_data = NULL;
703da5a1
RV		 222 rx_priv->data_size = skb_size;
223 vxge_debug_entryexit(VXGE_TRACE,
224 "%s: %s:%d Exiting...", ring->ndev->name, __func__, __LINE__);
225
226 return skb;
227}
228
229/*
230 * vxge_rx_map
231 */
232static int vxge_rx_map(void *dtrh, struct vxge_ring *ring)
233{
234 struct vxge_rx_priv *rx_priv;
235 dma_addr_t dma_addr;
236
237 vxge_debug_entryexit(VXGE_TRACE, "%s: %s:%d",
238 ring->ndev->name, __func__, __LINE__);
239 rx_priv = vxge_hw_ring_rxd_private_get(dtrh);
240
ea11bbe0
BL		 241 rx_priv->skb_data = rx_priv->skb->data;
242 dma_addr = pci_map_single(ring->pdev, rx_priv->skb_data,
703da5a1
RV		 243 rx_priv->data_size, PCI_DMA_FROMDEVICE);
244
fa15e99b 245 if (unlikely(pci_dma_mapping_error(ring->pdev, dma_addr))) {
703da5a1
RV		 246 ring->stats.pci_map_fail++;
247 return -EIO;
248 }
249 vxge_debug_mem(VXGE_TRACE,
250 "%s: %s:%d 1 buffer mode dma_addr = 0x%llx",
251 ring->ndev->name, __func__, __LINE__,
252 (unsigned long long)dma_addr);
253 vxge_hw_ring_rxd_1b_set(dtrh, dma_addr, rx_priv->data_size);
254
255 rx_priv->data_dma = dma_addr;
256 vxge_debug_entryexit(VXGE_TRACE,
257 "%s: %s:%d Exiting...", ring->ndev->name, __func__, __LINE__);
258
259 return 0;
260}
261
262/*
263 * vxge_rx_initial_replenish
264 * Allocation of RxD as an initial replenish procedure.
265 */
266static enum vxge_hw_status
267vxge_rx_initial_replenish(void *dtrh, void *userdata)
268{
269 struct vxge_ring *ring = (struct vxge_ring *)userdata;
270 struct vxge_rx_priv *rx_priv;
271
272 vxge_debug_entryexit(VXGE_TRACE, "%s: %s:%d",
273 ring->ndev->name, __func__, __LINE__);
274 if (vxge_rx_alloc(dtrh, ring,
275 VXGE_LL_MAX_FRAME_SIZE(ring->ndev)) == NULL)
276 return VXGE_HW_FAIL;
277
278 if (vxge_rx_map(dtrh, ring)) {
279 rx_priv = vxge_hw_ring_rxd_private_get(dtrh);
280 dev_kfree_skb(rx_priv->skb);
281
282 return VXGE_HW_FAIL;
283 }
284 vxge_debug_entryexit(VXGE_TRACE,
285 "%s: %s:%d Exiting...", ring->ndev->name, __func__, __LINE__);
286
287 return VXGE_HW_OK;
288}
289
290static inline void
291vxge_rx_complete(struct vxge_ring *ring, struct sk_buff *skb, u16 vlan,
292 int pkt_length, struct vxge_hw_ring_rxd_info *ext_info)
293{
294
295 vxge_debug_entryexit(VXGE_TRACE, "%s: %s:%d",
296 ring->ndev->name, __func__, __LINE__);
297 skb_record_rx_queue(skb, ring->driver_id);
298 skb->protocol = eth_type_trans(skb, ring->ndev);
299
62ea0557 300 u64_stats_update_begin(&ring->stats.syncp);
703da5a1
RV		 301 ring->stats.rx_frms++;
302 ring->stats.rx_bytes += pkt_length;
303
304 if (skb->pkt_type == PACKET_MULTICAST)
305 ring->stats.rx_mcast++;
62ea0557 306 u64_stats_update_end(&ring->stats.syncp);
703da5a1
RV		 307
308 vxge_debug_rx(VXGE_TRACE,
309 "%s: %s:%d skb protocol = %d",
310 ring->ndev->name, __func__, __LINE__, skb->protocol);
311
53515734
JP		 312 if (ext_info->vlan &&
313 ring->vlan_tag_strip == VXGE_HW_VPATH_RPA_STRIP_VLAN_TAG_ENABLE)
314 __vlan_hwaccel_put_tag(skb, ext_info->vlan);
315 napi_gro_receive(ring->napi_p, skb);
feb990d4 316
703da5a1
RV		 317 vxge_debug_entryexit(VXGE_TRACE,
318 "%s: %s:%d Exiting...", ring->ndev->name, __func__, __LINE__);
319}
320
321static inline void vxge_re_pre_post(void *dtr, struct vxge_ring *ring,
322 struct vxge_rx_priv *rx_priv)
323{
324 pci_dma_sync_single_for_device(ring->pdev,
325 rx_priv->data_dma, rx_priv->data_size, PCI_DMA_FROMDEVICE);
326
327 vxge_hw_ring_rxd_1b_set(dtr, rx_priv->data_dma, rx_priv->data_size);
328 vxge_hw_ring_rxd_pre_post(ring->handle, dtr);
329}
330
331static inline void vxge_post(int *dtr_cnt, void **first_dtr,
332 void *post_dtr, struct __vxge_hw_ring *ringh)
333{
334 int dtr_count = *dtr_cnt;
335 if ((*dtr_cnt % VXGE_HW_RXSYNC_FREQ_CNT) == 0) {
336 if (*first_dtr)
337 vxge_hw_ring_rxd_post_post_wmb(ringh, *first_dtr);
338 *first_dtr = post_dtr;
339 } else
340 vxge_hw_ring_rxd_post_post(ringh, post_dtr);
341 dtr_count++;
342 *dtr_cnt = dtr_count;
343}
344
345/*
346 * vxge_rx_1b_compl
347 *
348 * If the interrupt is because of a received frame or if the receive ring
349 * contains fresh as yet un-processed frames, this function is called.
350 */
42821a5b 351static enum vxge_hw_status
703da5a1
RV		 352vxge_rx_1b_compl(struct __vxge_hw_ring *ringh, void *dtr,
353 u8 t_code, void *userdata)
354{
355 struct vxge_ring *ring = (struct vxge_ring *)userdata;
b81b3733 356 struct net_device *dev = ring->ndev;
703da5a1
RV		 357 unsigned int dma_sizes;
358 void *first_dtr = NULL;
359 int dtr_cnt = 0;
360 int data_size;
361 dma_addr_t data_dma;
362 int pkt_length;
363 struct sk_buff *skb;
364 struct vxge_rx_priv *rx_priv;
365 struct vxge_hw_ring_rxd_info ext_info;
366 vxge_debug_entryexit(VXGE_TRACE, "%s: %s:%d",
367 ring->ndev->name, __func__, __LINE__);
703da5a1
RV		 368
369 do {
3f23e436 370 prefetch((char *)dtr + L1_CACHE_BYTES);
703da5a1
RV		 371 rx_priv = vxge_hw_ring_rxd_private_get(dtr);
372 skb = rx_priv->skb;
373 data_size = rx_priv->data_size;
374 data_dma = rx_priv->data_dma;
ea11bbe0 375 prefetch(rx_priv->skb_data);
703da5a1
RV		 376
377 vxge_debug_rx(VXGE_TRACE,
378 "%s: %s:%d skb = 0x%p",
379 ring->ndev->name, __func__, __LINE__, skb);
380
381 vxge_hw_ring_rxd_1b_get(ringh, dtr, &dma_sizes);
382 pkt_length = dma_sizes;
383
22fa125e
SH		 384 pkt_length -= ETH_FCS_LEN;
385
703da5a1
RV		 386 vxge_debug_rx(VXGE_TRACE,
387 "%s: %s:%d Packet Length = %d",
388 ring->ndev->name, __func__, __LINE__, pkt_length);
389
390 vxge_hw_ring_rxd_1b_info_get(ringh, dtr, &ext_info);
391
392 /* check skb validity */
393 vxge_assert(skb);
394
395 prefetch((char *)skb + L1_CACHE_BYTES);
396 if (unlikely(t_code)) {
703da5a1
RV		 397 if (vxge_hw_ring_handle_tcode(ringh, dtr, t_code) !=
398 VXGE_HW_OK) {
399
400 ring->stats.rx_errors++;
401 vxge_debug_rx(VXGE_TRACE,
402 "%s: %s :%d Rx T_code is %d",
403 ring->ndev->name, __func__,
404 __LINE__, t_code);
405
406 /* If the t_code is not supported and if the
407 * t_code is other than 0x5 (unparseable packet
408 * such as unknown UPV6 header), Drop it !!!
409 */
410 vxge_re_pre_post(dtr, ring, rx_priv);
411
412 vxge_post(&dtr_cnt, &first_dtr, dtr, ringh);
413 ring->stats.rx_dropped++;
414 continue;
415 }
416 }
417
418 if (pkt_length > VXGE_LL_RX_COPY_THRESHOLD) {
703da5a1 419 if (vxge_rx_alloc(dtr, ring, data_size) != NULL) {
703da5a1
RV		 420 if (!vxge_rx_map(dtr, ring)) {
421 skb_put(skb, pkt_length);
422
423 pci_unmap_single(ring->pdev, data_dma,
424 data_size, PCI_DMA_FROMDEVICE);
425
426 vxge_hw_ring_rxd_pre_post(ringh, dtr);
427 vxge_post(&dtr_cnt, &first_dtr, dtr,
428 ringh);
429 } else {
430 dev_kfree_skb(rx_priv->skb);
431 rx_priv->skb = skb;
432 rx_priv->data_size = data_size;
433 vxge_re_pre_post(dtr, ring, rx_priv);
434
435 vxge_post(&dtr_cnt, &first_dtr, dtr,
436 ringh);
437 ring->stats.rx_dropped++;
438 break;
439 }
440 } else {
441 vxge_re_pre_post(dtr, ring, rx_priv);
442
443 vxge_post(&dtr_cnt, &first_dtr, dtr, ringh);
444 ring->stats.rx_dropped++;
445 break;
446 }
447 } else {
448 struct sk_buff *skb_up;
449
450 skb_up = netdev_alloc_skb(dev, pkt_length +
451 VXGE_HW_HEADER_ETHERNET_II_802_3_ALIGN);
452 if (skb_up != NULL) {
453 skb_reserve(skb_up,
454 VXGE_HW_HEADER_ETHERNET_II_802_3_ALIGN);
455
456 pci_dma_sync_single_for_cpu(ring->pdev,
457 data_dma, data_size,
458 PCI_DMA_FROMDEVICE);
459
460 vxge_debug_mem(VXGE_TRACE,
461 "%s: %s:%d skb_up = %p",
462 ring->ndev->name, __func__,
463 __LINE__, skb);
464 memcpy(skb_up->data, skb->data, pkt_length);
465
466 vxge_re_pre_post(dtr, ring, rx_priv);
467
468 vxge_post(&dtr_cnt, &first_dtr, dtr,
469 ringh);
470 /* will netif_rx small SKB instead */
471 skb = skb_up;
472 skb_put(skb, pkt_length);
473 } else {
474 vxge_re_pre_post(dtr, ring, rx_priv);
475
476 vxge_post(&dtr_cnt, &first_dtr, dtr, ringh);
477 vxge_debug_rx(VXGE_ERR,
478 "%s: vxge_rx_1b_compl: out of "
479 "memory", dev->name);
480 ring->stats.skb_alloc_fail++;
481 break;
482 }
483 }
484
485 if ((ext_info.proto & VXGE_HW_FRAME_PROTO_TCP_OR_UDP) &&
486 !(ext_info.proto & VXGE_HW_FRAME_PROTO_IP_FRAG) &&
feb990d4 487 (dev->features & NETIF_F_RXCSUM) && /* Offload Rx side CSUM */
703da5a1
RV		 488 ext_info.l3_cksum == VXGE_HW_L3_CKSUM_OK &&
489 ext_info.l4_cksum == VXGE_HW_L4_CKSUM_OK)
490 skb->ip_summed = CHECKSUM_UNNECESSARY;
491 else
bc8acf2c 492 skb_checksum_none_assert(skb);
703da5a1 493
b81b3733
JM		 494
495 if (ring->rx_hwts) {
496 struct skb_shared_hwtstamps *skb_hwts;
497 u32 ns = *(u32 *)(skb->head + pkt_length);
498
499 skb_hwts = skb_hwtstamps(skb);
500 skb_hwts->hwtstamp = ns_to_ktime(ns);
501 skb_hwts->syststamp.tv64 = 0;
502 }
503
47f01db4
JM		 504 /* rth_hash_type and rth_it_hit are non-zero regardless of
505 * whether rss is enabled. Only the rth_value is zero/non-zero
506 * if rss is disabled/enabled, so key off of that.
507 */
508 if (ext_info.rth_value)
509 skb->rxhash = ext_info.rth_value;
510
703da5a1
RV		 511 vxge_rx_complete(ring, skb, ext_info.vlan,
512 pkt_length, &ext_info);
513
514 ring->budget--;
515 ring->pkts_processed++;
516 if (!ring->budget)
517 break;
518
519 } while (vxge_hw_ring_rxd_next_completed(ringh, &dtr,
520 &t_code) == VXGE_HW_OK);
521
522 if (first_dtr)
523 vxge_hw_ring_rxd_post_post_wmb(ringh, first_dtr);
524
703da5a1
RV		 525 vxge_debug_entryexit(VXGE_TRACE,
526 "%s:%d Exiting...",
527 __func__, __LINE__);
528 return VXGE_HW_OK;
529}
530
531/*
532 * vxge_xmit_compl
533 *
534 * If an interrupt was raised to indicate DMA complete of the Tx packet,
535 * this function is called. It identifies the last TxD whose buffer was
536 * freed and frees all skbs whose data have already DMA'ed into the NICs
537 * internal memory.
538 */
42821a5b 539static enum vxge_hw_status
703da5a1
RV		 540vxge_xmit_compl(struct __vxge_hw_fifo *fifo_hw, void *dtr,
541 enum vxge_hw_fifo_tcode t_code, void *userdata,
ff67df55 542 struct sk_buff ***skb_ptr, int nr_skb, int *more)
703da5a1
RV		 543{
544 struct vxge_fifo *fifo = (struct vxge_fifo *)userdata;
ff67df55 545 struct sk_buff *skb, **done_skb = *skb_ptr;
703da5a1
RV		 546 int pkt_cnt = 0;
547
548 vxge_debug_entryexit(VXGE_TRACE,
549 "%s:%d Entered....", __func__, __LINE__);
550
551 do {
552 int frg_cnt;
553 skb_frag_t *frag;
554 int i = 0, j;
555 struct vxge_tx_priv *txd_priv =
556 vxge_hw_fifo_txdl_private_get(dtr);
557
558 skb = txd_priv->skb;
559 frg_cnt = skb_shinfo(skb)->nr_frags;
560 frag = &skb_shinfo(skb)->frags[0];
561
562 vxge_debug_tx(VXGE_TRACE,
563 "%s: %s:%d fifo_hw = %p dtr = %p "
564 "tcode = 0x%x", fifo->ndev->name, __func__,
565 __LINE__, fifo_hw, dtr, t_code);
566 /* check skb validity */
567 vxge_assert(skb);
568 vxge_debug_tx(VXGE_TRACE,
569 "%s: %s:%d skb = %p itxd_priv = %p frg_cnt = %d",
570 fifo->ndev->name, __func__, __LINE__,
571 skb, txd_priv, frg_cnt);
572 if (unlikely(t_code)) {
573 fifo->stats.tx_errors++;
574 vxge_debug_tx(VXGE_ERR,
575 "%s: tx: dtr %p completed due to "
576 "error t_code %01x", fifo->ndev->name,
577 dtr, t_code);
578 vxge_hw_fifo_handle_tcode(fifo_hw, dtr, t_code);
579 }
580
581 /* for unfragmented skb */
582 pci_unmap_single(fifo->pdev, txd_priv->dma_buffers[i++],
583 skb_headlen(skb), PCI_DMA_TODEVICE);
584
585 for (j = 0; j < frg_cnt; j++) {
586 pci_unmap_page(fifo->pdev,
587 txd_priv->dma_buffers[i++],
9e903e08 588 skb_frag_size(frag), PCI_DMA_TODEVICE);
703da5a1
RV		 589 frag += 1;
590 }
591
592 vxge_hw_fifo_txdl_free(fifo_hw, dtr);
593
594 /* Updating the statistics block */
62ea0557 595 u64_stats_update_begin(&fifo->stats.syncp);
703da5a1
RV		 596 fifo->stats.tx_frms++;
597 fifo->stats.tx_bytes += skb->len;
62ea0557 598 u64_stats_update_end(&fifo->stats.syncp);
703da5a1 599
ff67df55
BL		 600 *done_skb++ = skb;
601
602 if (--nr_skb <= 0) {
603 *more = 1;
604 break;
605 }
703da5a1
RV		 606
607 pkt_cnt++;
608 if (pkt_cnt > fifo->indicate_max_pkts)
609 break;
610
611 } while (vxge_hw_fifo_txdl_next_completed(fifo_hw,
612 &dtr, &t_code) == VXGE_HW_OK);
613
ff67df55 614 *skb_ptr = done_skb;
98f45da2
JM		 615 if (netif_tx_queue_stopped(fifo->txq))
616 netif_tx_wake_queue(fifo->txq);
703da5a1 617
703da5a1
RV		 618 vxge_debug_entryexit(VXGE_TRACE,
619 "%s: %s:%d Exiting...",
620 fifo->ndev->name, __func__, __LINE__);
621 return VXGE_HW_OK;
622}
623
28679751 624/* select a vpath to transmit the packet */
98f45da2 625static u32 vxge_get_vpath_no(struct vxgedev *vdev, struct sk_buff *skb)
703da5a1
RV		 626{
627 u16 queue_len, counter = 0;
628 if (skb->protocol == htons(ETH_P_IP)) {
629 struct iphdr *ip;
630 struct tcphdr *th;
631
632 ip = ip_hdr(skb);
633
56f8a75c 634 if (!ip_is_fragment(ip)) {
703da5a1
RV		 635 th = (struct tcphdr *)(((unsigned char *)ip) +
636 ip->ihl*4);
637
638 queue_len = vdev->no_of_vpath;
639 counter = (ntohs(th->source) +
640 ntohs(th->dest)) &
641 vdev->vpath_selector[queue_len - 1];
642 if (counter >= queue_len)
643 counter = queue_len - 1;
703da5a1
RV		 644 }
645 }
646 return counter;
647}
648
649static enum vxge_hw_status vxge_search_mac_addr_in_list(
650 struct vxge_vpath *vpath, u64 del_mac)
651{
652 struct list_head *entry, *next;
653 list_for_each_safe(entry, next, &vpath->mac_addr_list) {
654 if (((struct vxge_mac_addrs *)entry)->macaddr == del_mac)
655 return TRUE;
656 }
657 return FALSE;
658}
659
528f7272
JM		 660static int vxge_mac_list_add(struct vxge_vpath *vpath, struct macInfo *mac)
661{
662 struct vxge_mac_addrs *new_mac_entry;
663 u8 *mac_address = NULL;
664
665 if (vpath->mac_addr_cnt >= VXGE_MAX_LEARN_MAC_ADDR_CNT)
666 return TRUE;
667
668 new_mac_entry = kzalloc(sizeof(struct vxge_mac_addrs), GFP_ATOMIC);
669 if (!new_mac_entry) {
670 vxge_debug_mem(VXGE_ERR,
671 "%s: memory allocation failed",
672 VXGE_DRIVER_NAME);
673 return FALSE;
674 }
675
676 list_add(&new_mac_entry->item, &vpath->mac_addr_list);
677
678 /* Copy the new mac address to the list */
679 mac_address = (u8 *)&new_mac_entry->macaddr;
680 memcpy(mac_address, mac->macaddr, ETH_ALEN);
681
682 new_mac_entry->state = mac->state;
683 vpath->mac_addr_cnt++;
684
f8d4aa29 685 if (is_multicast_ether_addr(mac->macaddr))
528f7272
JM		 686 vpath->mcast_addr_cnt++;
687
688 return TRUE;
689}
690
691/* Add a mac address to DA table */
692static enum vxge_hw_status
693vxge_add_mac_addr(struct vxgedev *vdev, struct macInfo *mac)
694{
695 enum vxge_hw_status status = VXGE_HW_OK;
696 struct vxge_vpath *vpath;
697 enum vxge_hw_vpath_mac_addr_add_mode duplicate_mode;
698
f8d4aa29 699 if (is_multicast_ether_addr(mac->macaddr))
528f7272
JM		 700 duplicate_mode = VXGE_HW_VPATH_MAC_ADDR_ADD_DUPLICATE;
701 else
702 duplicate_mode = VXGE_HW_VPATH_MAC_ADDR_REPLACE_DUPLICATE;
703
704 vpath = &vdev->vpaths[mac->vpath_no];
705 status = vxge_hw_vpath_mac_addr_add(vpath->handle, mac->macaddr,
706 mac->macmask, duplicate_mode);
707 if (status != VXGE_HW_OK) {
708 vxge_debug_init(VXGE_ERR,
709 "DA config add entry failed for vpath:%d",
710 vpath->device_id);
711 } else
712 if (FALSE == vxge_mac_list_add(vpath, mac))
713 status = -EPERM;
714
715 return status;
716}
717
703da5a1
RV		 718static int vxge_learn_mac(struct vxgedev *vdev, u8 *mac_header)
719{
720 struct macInfo mac_info;
721 u8 *mac_address = NULL;
722 u64 mac_addr = 0, vpath_vector = 0;
723 int vpath_idx = 0;
724 enum vxge_hw_status status = VXGE_HW_OK;
725 struct vxge_vpath *vpath = NULL;
726 struct __vxge_hw_device *hldev;
727
d8ee7071 728 hldev = pci_get_drvdata(vdev->pdev);
703da5a1
RV		 729
730 mac_address = (u8 *)&mac_addr;
731 memcpy(mac_address, mac_header, ETH_ALEN);
732
733 /* Is this mac address already in the list? */
734 for (vpath_idx = 0; vpath_idx < vdev->no_of_vpath; vpath_idx++) {
735 vpath = &vdev->vpaths[vpath_idx];
736 if (vxge_search_mac_addr_in_list(vpath, mac_addr))
737 return vpath_idx;
738 }
739
740 memset(&mac_info, 0, sizeof(struct macInfo));
741 memcpy(mac_info.macaddr, mac_header, ETH_ALEN);
742
743 /* Any vpath has room to add mac address to its da table? */
744 for (vpath_idx = 0; vpath_idx < vdev->no_of_vpath; vpath_idx++) {
745 vpath = &vdev->vpaths[vpath_idx];
746 if (vpath->mac_addr_cnt < vpath->max_mac_addr_cnt) {
747 /* Add this mac address to this vpath */
748 mac_info.vpath_no = vpath_idx;
749 mac_info.state = VXGE_LL_MAC_ADDR_IN_DA_TABLE;
750 status = vxge_add_mac_addr(vdev, &mac_info);
751 if (status != VXGE_HW_OK)
752 return -EPERM;
753 return vpath_idx;
754 }
755 }
756
757 mac_info.state = VXGE_LL_MAC_ADDR_IN_LIST;
758 vpath_idx = 0;
759 mac_info.vpath_no = vpath_idx;
760 /* Is the first vpath already selected as catch-basin ? */
761 vpath = &vdev->vpaths[vpath_idx];
762 if (vpath->mac_addr_cnt > vpath->max_mac_addr_cnt) {
763 /* Add this mac address to this vpath */
764 if (FALSE == vxge_mac_list_add(vpath, &mac_info))
765 return -EPERM;
766 return vpath_idx;
767 }
768
769 /* Select first vpath as catch-basin */
770 vpath_vector = vxge_mBIT(vpath->device_id);
771 status = vxge_hw_mgmt_reg_write(vpath->vdev->devh,
772 vxge_hw_mgmt_reg_type_mrpcim,
773 0,
774 (ulong)offsetof(
775 struct vxge_hw_mrpcim_reg,
776 rts_mgr_cbasin_cfg),
777 vpath_vector);
778 if (status != VXGE_HW_OK) {
779 vxge_debug_tx(VXGE_ERR,
780 "%s: Unable to set the vpath-%d in catch-basin mode",
781 VXGE_DRIVER_NAME, vpath->device_id);
782 return -EPERM;
783 }
784
785 if (FALSE == vxge_mac_list_add(vpath, &mac_info))
786 return -EPERM;
787
788 return vpath_idx;
789}
790
791/**
792 * vxge_xmit
793 * @skb : the socket buffer containing the Tx data.
794 * @dev : device pointer.
795 *
796 * This function is the Tx entry point of the driver. Neterion NIC supports
797 * certain protocol assist features on Tx side, namely CSO, S/G, LSO.
703da5a1 798*/
61357325 799static netdev_tx_t
703da5a1
RV		 800vxge_xmit(struct sk_buff *skb, struct net_device *dev)
801{
802 struct vxge_fifo *fifo = NULL;
803 void *dtr_priv;
804 void *dtr = NULL;
805 struct vxgedev *vdev = NULL;
806 enum vxge_hw_status status;
807 int frg_cnt, first_frg_len;
808 skb_frag_t *frag;
809 int i = 0, j = 0, avail;
810 u64 dma_pointer;
811 struct vxge_tx_priv *txdl_priv = NULL;
812 struct __vxge_hw_fifo *fifo_hw;
703da5a1 813 int offload_type;
703da5a1 814 int vpath_no = 0;
703da5a1
RV		 815
816 vxge_debug_entryexit(VXGE_TRACE, "%s: %s:%d",
817 dev->name, __func__, __LINE__);
818
819 /* A buffer with no data will be dropped */
820 if (unlikely(skb->len <= 0)) {
821 vxge_debug_tx(VXGE_ERR,
822 "%s: Buffer has no data..", dev->name);
823 dev_kfree_skb(skb);
824 return NETDEV_TX_OK;
825 }
826
5f54cebb 827 vdev = netdev_priv(dev);
703da5a1
RV		 828
829 if (unlikely(!is_vxge_card_up(vdev))) {
830 vxge_debug_tx(VXGE_ERR,
831 "%s: vdev not initialized", dev->name);
832 dev_kfree_skb(skb);
833 return NETDEV_TX_OK;
834 }
835
836 if (vdev->config.addr_learn_en) {
837 vpath_no = vxge_learn_mac(vdev, skb->data + ETH_ALEN);
838 if (vpath_no == -EPERM) {
839 vxge_debug_tx(VXGE_ERR,
840 "%s: Failed to store the mac address",
841 dev->name);
842 dev_kfree_skb(skb);
843 return NETDEV_TX_OK;
844 }
845 }
846
847 if (vdev->config.tx_steering_type == TX_MULTIQ_STEERING)
848 vpath_no = skb_get_queue_mapping(skb);
849 else if (vdev->config.tx_steering_type == TX_PORT_STEERING)
98f45da2 850 vpath_no = vxge_get_vpath_no(vdev, skb);
703da5a1
RV		 851
852 vxge_debug_tx(VXGE_TRACE, "%s: vpath_no= %d", dev->name, vpath_no);
853
854 if (vpath_no >= vdev->no_of_vpath)
855 vpath_no = 0;
856
857 fifo = &vdev->vpaths[vpath_no].fifo;
858 fifo_hw = fifo->handle;
859
98f45da2 860 if (netif_tx_queue_stopped(fifo->txq))
d03848e0 861 return NETDEV_TX_BUSY;
d03848e0 862
703da5a1
RV		 863 avail = vxge_hw_fifo_free_txdl_count_get(fifo_hw);
864 if (avail == 0) {
865 vxge_debug_tx(VXGE_ERR,
866 "%s: No free TXDs available", dev->name);
867 fifo->stats.txd_not_free++;
98f45da2 868 goto _exit0;
703da5a1
RV		 869 }
870
4403b371
BL		 871 /* Last TXD? Stop tx queue to avoid dropping packets. TX
872 * completion will resume the queue.
873 */
874 if (avail == 1)
98f45da2 875 netif_tx_stop_queue(fifo->txq);
4403b371 876
703da5a1
RV		 877 status = vxge_hw_fifo_txdl_reserve(fifo_hw, &dtr, &dtr_priv);
878 if (unlikely(status != VXGE_HW_OK)) {
879 vxge_debug_tx(VXGE_ERR,
880 "%s: Out of descriptors .", dev->name);
881 fifo->stats.txd_out_of_desc++;
98f45da2 882 goto _exit0;
703da5a1
RV		 883 }
884
885 vxge_debug_tx(VXGE_TRACE,
886 "%s: %s:%d fifo_hw = %p dtr = %p dtr_priv = %p",
887 dev->name, __func__, __LINE__,
888 fifo_hw, dtr, dtr_priv);
889
eab6d18d 890 if (vlan_tx_tag_present(skb)) {
703da5a1
RV		 891 u16 vlan_tag = vlan_tx_tag_get(skb);
892 vxge_hw_fifo_txdl_vlan_set(dtr, vlan_tag);
893 }
894
895 first_frg_len = skb_headlen(skb);
896
897 dma_pointer = pci_map_single(fifo->pdev, skb->data, first_frg_len,
898 PCI_DMA_TODEVICE);
899
900 if (unlikely(pci_dma_mapping_error(fifo->pdev, dma_pointer))) {
901 vxge_hw_fifo_txdl_free(fifo_hw, dtr);
703da5a1 902 fifo->stats.pci_map_fail++;
98f45da2 903 goto _exit0;
703da5a1
RV		 904 }
905
906 txdl_priv = vxge_hw_fifo_txdl_private_get(dtr);
907 txdl_priv->skb = skb;
908 txdl_priv->dma_buffers[j] = dma_pointer;
909
910 frg_cnt = skb_shinfo(skb)->nr_frags;
911 vxge_debug_tx(VXGE_TRACE,
912 "%s: %s:%d skb = %p txdl_priv = %p "
913 "frag_cnt = %d dma_pointer = 0x%llx", dev->name,
914 __func__, __LINE__, skb, txdl_priv,
915 frg_cnt, (unsigned long long)dma_pointer);
916
917 vxge_hw_fifo_txdl_buffer_set(fifo_hw, dtr, j++, dma_pointer,
918 first_frg_len);
919
920 frag = &skb_shinfo(skb)->frags[0];
921 for (i = 0; i < frg_cnt; i++) {
922 /* ignore 0 length fragment */
9e903e08 923 if (!skb_frag_size(frag))
703da5a1
RV		 924 continue;
925
94d60a7b 926 dma_pointer = (u64)skb_frag_dma_map(&fifo->pdev->dev, frag,
9e903e08 927 0, skb_frag_size(frag),
94d60a7b 928 DMA_TO_DEVICE);
703da5a1 929
94d60a7b 930 if (unlikely(dma_mapping_error(&fifo->pdev->dev, dma_pointer)))
98f45da2 931 goto _exit2;
703da5a1
RV		 932 vxge_debug_tx(VXGE_TRACE,
933 "%s: %s:%d frag = %d dma_pointer = 0x%llx",
934 dev->name, __func__, __LINE__, i,
935 (unsigned long long)dma_pointer);
936
937 txdl_priv->dma_buffers[j] = dma_pointer;
938 vxge_hw_fifo_txdl_buffer_set(fifo_hw, dtr, j++, dma_pointer,
9e903e08 939 skb_frag_size(frag));
703da5a1
RV		 940 frag += 1;
941 }
942
943 offload_type = vxge_offload_type(skb);
944
945 if (offload_type & (SKB_GSO_TCPV4 | SKB_GSO_TCPV6)) {
703da5a1
RV		 946 int mss = vxge_tcp_mss(skb);
947 if (mss) {
98f45da2 948 vxge_debug_tx(VXGE_TRACE, "%s: %s:%d mss = %d",
703da5a1
RV		 949 dev->name, __func__, __LINE__, mss);
950 vxge_hw_fifo_txdl_mss_set(dtr, mss);
951 } else {
952 vxge_assert(skb->len <=
953 dev->mtu + VXGE_HW_MAC_HEADER_MAX_SIZE);
954 vxge_assert(0);
955 goto _exit1;
956 }
957 }
958
959 if (skb->ip_summed == CHECKSUM_PARTIAL)
960 vxge_hw_fifo_txdl_cksum_set_bits(dtr,
961 VXGE_HW_FIFO_TXD_TX_CKO_IPV4_EN |
962 VXGE_HW_FIFO_TXD_TX_CKO_TCP_EN |
963 VXGE_HW_FIFO_TXD_TX_CKO_UDP_EN);
964
965 vxge_hw_fifo_txdl_post(fifo_hw, dtr);
703da5a1 966
703da5a1
RV		 967 vxge_debug_entryexit(VXGE_TRACE, "%s: %s:%d Exiting...",
968 dev->name, __func__, __LINE__);
6ed10654 969 return NETDEV_TX_OK;
703da5a1 970
98f45da2 971_exit2:
703da5a1 972 vxge_debug_tx(VXGE_TRACE, "%s: pci_map_page failed", dev->name);
703da5a1
RV		 973_exit1:
974 j = 0;
975 frag = &skb_shinfo(skb)->frags[0];
976
977 pci_unmap_single(fifo->pdev, txdl_priv->dma_buffers[j++],
978 skb_headlen(skb), PCI_DMA_TODEVICE);
979
980 for (; j < i; j++) {
981 pci_unmap_page(fifo->pdev, txdl_priv->dma_buffers[j],
9e903e08 982 skb_frag_size(frag), PCI_DMA_TODEVICE);
703da5a1
RV		 983 frag += 1;
984 }
985
986 vxge_hw_fifo_txdl_free(fifo_hw, dtr);
98f45da2
JM		 987_exit0:
988 netif_tx_stop_queue(fifo->txq);
703da5a1 989 dev_kfree_skb(skb);
703da5a1 990
6ed10654 991 return NETDEV_TX_OK;
703da5a1
RV		 992}
993
994/*
995 * vxge_rx_term
996 *
997 * Function will be called by hw function to abort all outstanding receive
998 * descriptors.
999 */
1000static void
1001vxge_rx_term(void *dtrh, enum vxge_hw_rxd_state state, void *userdata)
1002{
1003 struct vxge_ring *ring = (struct vxge_ring *)userdata;
1004 struct vxge_rx_priv *rx_priv =
1005 vxge_hw_ring_rxd_private_get(dtrh);
1006
1007 vxge_debug_entryexit(VXGE_TRACE, "%s: %s:%d",
1008 ring->ndev->name, __func__, __LINE__);
1009 if (state != VXGE_HW_RXD_STATE_POSTED)
1010 return;
1011
1012 pci_unmap_single(ring->pdev, rx_priv->data_dma,
1013 rx_priv->data_size, PCI_DMA_FROMDEVICE);
1014
1015 dev_kfree_skb(rx_priv->skb);
ea11bbe0 1016 rx_priv->skb_data = NULL;
703da5a1
RV		 1017
1018 vxge_debug_entryexit(VXGE_TRACE,
1019 "%s: %s:%d Exiting...",
1020 ring->ndev->name, __func__, __LINE__);
1021}
1022
1023/*
1024 * vxge_tx_term
1025 *
1026 * Function will be called to abort all outstanding tx descriptors
1027 */
1028static void
1029vxge_tx_term(void *dtrh, enum vxge_hw_txdl_state state, void *userdata)
1030{
1031 struct vxge_fifo *fifo = (struct vxge_fifo *)userdata;
1032 skb_frag_t *frag;
1033 int i = 0, j, frg_cnt;
1034 struct vxge_tx_priv *txd_priv = vxge_hw_fifo_txdl_private_get(dtrh);
1035 struct sk_buff *skb = txd_priv->skb;
1036
1037 vxge_debug_entryexit(VXGE_TRACE, "%s:%d", __func__, __LINE__);
1038
1039 if (state != VXGE_HW_TXDL_STATE_POSTED)
1040 return;
1041
1042 /* check skb validity */
1043 vxge_assert(skb);
1044 frg_cnt = skb_shinfo(skb)->nr_frags;
1045 frag = &skb_shinfo(skb)->frags[0];
1046
1047 /* for unfragmented skb */
1048 pci_unmap_single(fifo->pdev, txd_priv->dma_buffers[i++],
1049 skb_headlen(skb), PCI_DMA_TODEVICE);
1050
1051 for (j = 0; j < frg_cnt; j++) {
1052 pci_unmap_page(fifo->pdev, txd_priv->dma_buffers[i++],
9e903e08 1053 skb_frag_size(frag), PCI_DMA_TODEVICE);
703da5a1
RV		 1054 frag += 1;
1055 }
1056
1057 dev_kfree_skb(skb);
1058
1059 vxge_debug_entryexit(VXGE_TRACE,
1060 "%s:%d Exiting...", __func__, __LINE__);
1061}
1062
528f7272
JM		 1063static int vxge_mac_list_del(struct vxge_vpath *vpath, struct macInfo *mac)
1064{
1065 struct list_head *entry, *next;
1066 u64 del_mac = 0;
1067 u8 *mac_address = (u8 *) (&del_mac);
1068
1069 /* Copy the mac address to delete from the list */
1070 memcpy(mac_address, mac->macaddr, ETH_ALEN);
1071
1072 list_for_each_safe(entry, next, &vpath->mac_addr_list) {
1073 if (((struct vxge_mac_addrs *)entry)->macaddr == del_mac) {
1074 list_del(entry);
1075 kfree((struct vxge_mac_addrs *)entry);
1076 vpath->mac_addr_cnt--;
1077
f8d4aa29 1078 if (is_multicast_ether_addr(mac->macaddr))
528f7272
JM		 1079 vpath->mcast_addr_cnt--;
1080 return TRUE;
1081 }
1082 }
1083
1084 return FALSE;
1085}
1086
1087/* delete a mac address from DA table */
1088static enum vxge_hw_status
1089vxge_del_mac_addr(struct vxgedev *vdev, struct macInfo *mac)
1090{
1091 enum vxge_hw_status status = VXGE_HW_OK;
1092 struct vxge_vpath *vpath;
1093
1094 vpath = &vdev->vpaths[mac->vpath_no];
1095 status = vxge_hw_vpath_mac_addr_delete(vpath->handle, mac->macaddr,
1096 mac->macmask);
1097 if (status != VXGE_HW_OK) {
1098 vxge_debug_init(VXGE_ERR,
1099 "DA config delete entry failed for vpath:%d",
1100 vpath->device_id);
1101 } else
1102 vxge_mac_list_del(vpath, mac);
1103 return status;
1104}
1105
703da5a1
RV		 1106/**
1107 * vxge_set_multicast
1108 * @dev: pointer to the device structure
1109 *
1110 * Entry point for multicast address enable/disable
1111 * This function is a driver entry point which gets called by the kernel
1112 * whenever multicast addresses must be enabled/disabled. This also gets
1113 * called to set/reset promiscuous mode. Depending on the deivce flag, we
1114 * determine, if multicast address must be enabled or if promiscuous mode
1115 * is to be disabled etc.
1116 */
1117static void vxge_set_multicast(struct net_device *dev)
1118{
22bedad3 1119 struct netdev_hw_addr *ha;
703da5a1
RV		 1120 struct vxgedev *vdev;
1121 int i, mcast_cnt = 0;
7adf7d1b
JM		 1122 struct __vxge_hw_device *hldev;
1123 struct vxge_vpath *vpath;
703da5a1
RV		 1124 enum vxge_hw_status status = VXGE_HW_OK;
1125 struct macInfo mac_info;
1126 int vpath_idx = 0;
1127 struct vxge_mac_addrs *mac_entry;
1128 struct list_head *list_head;
1129 struct list_head *entry, *next;
1130 u8 *mac_address = NULL;
1131
1132 vxge_debug_entryexit(VXGE_TRACE,
1133 "%s:%d", __func__, __LINE__);
1134
5f54cebb 1135 vdev = netdev_priv(dev);
703da5a1
RV		 1136 hldev = (struct __vxge_hw_device *)vdev->devh;
1137
1138 if (unlikely(!is_vxge_card_up(vdev)))
1139 return;
1140
1141 if ((dev->flags & IFF_ALLMULTI) && (!vdev->all_multi_flg)) {
1142 for (i = 0; i < vdev->no_of_vpath; i++) {
7adf7d1b
JM		 1143 vpath = &vdev->vpaths[i];
1144 vxge_assert(vpath->is_open);
1145 status = vxge_hw_vpath_mcast_enable(vpath->handle);
1146 if (status != VXGE_HW_OK)
1147 vxge_debug_init(VXGE_ERR, "failed to enable "
1148 "multicast, status %d", status);
703da5a1
RV		 1149 vdev->all_multi_flg = 1;
1150 }
7adf7d1b 1151 } else if (!(dev->flags & IFF_ALLMULTI) && (vdev->all_multi_flg)) {
703da5a1 1152 for (i = 0; i < vdev->no_of_vpath; i++) {
7adf7d1b
JM		 1153 vpath = &vdev->vpaths[i];
1154 vxge_assert(vpath->is_open);
1155 status = vxge_hw_vpath_mcast_disable(vpath->handle);
1156 if (status != VXGE_HW_OK)
1157 vxge_debug_init(VXGE_ERR, "failed to disable "
1158 "multicast, status %d", status);
1159 vdev->all_multi_flg = 0;
703da5a1
RV		 1160 }
1161 }
1162
703da5a1
RV		 1163
1164 if (!vdev->config.addr_learn_en) {
7adf7d1b
JM		 1165 for (i = 0; i < vdev->no_of_vpath; i++) {
1166 vpath = &vdev->vpaths[i];
1167 vxge_assert(vpath->is_open);
1168
1169 if (dev->flags & IFF_PROMISC)
703da5a1 1170 status = vxge_hw_vpath_promisc_enable(
7adf7d1b
JM		 1171 vpath->handle);
1172 else
703da5a1 1173 status = vxge_hw_vpath_promisc_disable(
7adf7d1b
JM		 1174 vpath->handle);
1175 if (status != VXGE_HW_OK)
1176 vxge_debug_init(VXGE_ERR, "failed to %s promisc"
1177 ", status %d", dev->flags&IFF_PROMISC ?
1178 "enable" : "disable", status);
703da5a1
RV		 1179 }
1180 }
1181
1182 memset(&mac_info, 0, sizeof(struct macInfo));
1183 /* Update individual M_CAST address list */
4cd24eaf 1184 if ((!vdev->all_multi_flg) && netdev_mc_count(dev)) {
703da5a1
RV		 1185 mcast_cnt = vdev->vpaths[0].mcast_addr_cnt;
1186 list_head = &vdev->vpaths[0].mac_addr_list;
4cd24eaf 1187 if ((netdev_mc_count(dev) +
703da5a1
RV		 1188 (vdev->vpaths[0].mac_addr_cnt - mcast_cnt)) >
1189 vdev->vpaths[0].max_mac_addr_cnt)
1190 goto _set_all_mcast;
1191
1192 /* Delete previous MC's */
1193 for (i = 0; i < mcast_cnt; i++) {
703da5a1 1194 list_for_each_safe(entry, next, list_head) {
2c91308f 1195 mac_entry = (struct vxge_mac_addrs *)entry;
703da5a1
RV		 1196 /* Copy the mac address to delete */
1197 mac_address = (u8 *)&mac_entry->macaddr;
1198 memcpy(mac_info.macaddr, mac_address, ETH_ALEN);
1199
f8d4aa29 1200 if (is_multicast_ether_addr(mac_info.macaddr)) {
703da5a1
RV		 1201 for (vpath_idx = 0; vpath_idx <
1202 vdev->no_of_vpath;
1203 vpath_idx++) {
1204 mac_info.vpath_no = vpath_idx;
1205 status = vxge_del_mac_addr(
1206 vdev,
1207 &mac_info);
1208 }
1209 }
1210 }
1211 }
1212
1213 /* Add new ones */
22bedad3
JP		 1214 netdev_for_each_mc_addr(ha, dev) {
1215 memcpy(mac_info.macaddr, ha->addr, ETH_ALEN);
703da5a1
RV		 1216 for (vpath_idx = 0; vpath_idx < vdev->no_of_vpath;
1217 vpath_idx++) {
1218 mac_info.vpath_no = vpath_idx;
1219 mac_info.state = VXGE_LL_MAC_ADDR_IN_DA_TABLE;
1220 status = vxge_add_mac_addr(vdev, &mac_info);
1221 if (status != VXGE_HW_OK) {
1222 vxge_debug_init(VXGE_ERR,
1223 "%s:%d Setting individual"
1224 "multicast address failed",
1225 __func__, __LINE__);
1226 goto _set_all_mcast;
1227 }
1228 }
1229 }
1230
1231 return;
1232_set_all_mcast:
1233 mcast_cnt = vdev->vpaths[0].mcast_addr_cnt;
1234 /* Delete previous MC's */
1235 for (i = 0; i < mcast_cnt; i++) {
703da5a1 1236 list_for_each_safe(entry, next, list_head) {
2c91308f 1237 mac_entry = (struct vxge_mac_addrs *)entry;
703da5a1
RV		 1238 /* Copy the mac address to delete */
1239 mac_address = (u8 *)&mac_entry->macaddr;
1240 memcpy(mac_info.macaddr, mac_address, ETH_ALEN);
1241
f8d4aa29 1242 if (is_multicast_ether_addr(mac_info.macaddr))
703da5a1
RV		 1243 break;
1244 }
1245
1246 for (vpath_idx = 0; vpath_idx < vdev->no_of_vpath;
1247 vpath_idx++) {
1248 mac_info.vpath_no = vpath_idx;
1249 status = vxge_del_mac_addr(vdev, &mac_info);
1250 }
1251 }
1252
1253 /* Enable all multicast */
1254 for (i = 0; i < vdev->no_of_vpath; i++) {
7adf7d1b
JM		 1255 vpath = &vdev->vpaths[i];
1256 vxge_assert(vpath->is_open);
1257
1258 status = vxge_hw_vpath_mcast_enable(vpath->handle);
703da5a1
RV		 1259 if (status != VXGE_HW_OK) {
1260 vxge_debug_init(VXGE_ERR,
1261 "%s:%d Enabling all multicasts failed",
1262 __func__, __LINE__);
1263 }
1264 vdev->all_multi_flg = 1;
1265 }
1266 dev->flags |= IFF_ALLMULTI;
1267 }
1268
1269 vxge_debug_entryexit(VXGE_TRACE,
1270 "%s:%d Exiting...", __func__, __LINE__);
1271}
1272
1273/**
1274 * vxge_set_mac_addr
1275 * @dev: pointer to the device structure
1276 *
1277 * Update entry "0" (default MAC addr)
1278 */
1279static int vxge_set_mac_addr(struct net_device *dev, void *p)
1280{
1281 struct sockaddr *addr = p;
1282 struct vxgedev *vdev;
2c91308f 1283 struct __vxge_hw_device *hldev;
703da5a1
RV		 1284 enum vxge_hw_status status = VXGE_HW_OK;
1285 struct macInfo mac_info_new, mac_info_old;
1286 int vpath_idx = 0;
1287
1288 vxge_debug_entryexit(VXGE_TRACE, "%s:%d", __func__, __LINE__);
1289
5f54cebb 1290 vdev = netdev_priv(dev);
703da5a1
RV		 1291 hldev = vdev->devh;
1292
1293 if (!is_valid_ether_addr(addr->sa_data))
1294 return -EINVAL;
1295
1296 memset(&mac_info_new, 0, sizeof(struct macInfo));
1297 memset(&mac_info_old, 0, sizeof(struct macInfo));
1298
1299 vxge_debug_entryexit(VXGE_TRACE, "%s:%d Exiting...",
1300 __func__, __LINE__);
1301
1302 /* Get the old address */
1303 memcpy(mac_info_old.macaddr, dev->dev_addr, dev->addr_len);
1304
1305 /* Copy the new address */
1306 memcpy(mac_info_new.macaddr, addr->sa_data, dev->addr_len);
1307
1308 /* First delete the old mac address from all the vpaths
1309 as we can't specify the index while adding new mac address */
1310 for (vpath_idx = 0; vpath_idx < vdev->no_of_vpath; vpath_idx++) {
1311 struct vxge_vpath *vpath = &vdev->vpaths[vpath_idx];
1312 if (!vpath->is_open) {
1313 /* This can happen when this interface is added/removed
1314 to the bonding interface. Delete this station address
1315 from the linked list */
1316 vxge_mac_list_del(vpath, &mac_info_old);
1317
1318 /* Add this new address to the linked list
1319 for later restoring */
1320 vxge_mac_list_add(vpath, &mac_info_new);
1321
1322 continue;
1323 }
1324 /* Delete the station address */
1325 mac_info_old.vpath_no = vpath_idx;
1326 status = vxge_del_mac_addr(vdev, &mac_info_old);
1327 }
1328
1329 if (unlikely(!is_vxge_card_up(vdev))) {
1330 memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
1331 return VXGE_HW_OK;
1332 }
1333
1334 /* Set this mac address to all the vpaths */
1335 for (vpath_idx = 0; vpath_idx < vdev->no_of_vpath; vpath_idx++) {
1336 mac_info_new.vpath_no = vpath_idx;
1337 mac_info_new.state = VXGE_LL_MAC_ADDR_IN_DA_TABLE;
1338 status = vxge_add_mac_addr(vdev, &mac_info_new);
1339 if (status != VXGE_HW_OK)
1340 return -EINVAL;
1341 }
1342
1343 memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
1344
1345 return status;
1346}
1347
1348/*
1349 * vxge_vpath_intr_enable
1350 * @vdev: pointer to vdev
1351 * @vp_id: vpath for which to enable the interrupts
1352 *
1353 * Enables the interrupts for the vpath
1354*/
42821a5b 1355static void vxge_vpath_intr_enable(struct vxgedev *vdev, int vp_id)
703da5a1
RV		 1356{
1357 struct vxge_vpath *vpath = &vdev->vpaths[vp_id];
b59c9457
SH		 1358 int msix_id = 0;
1359 int tim_msix_id[4] = {0, 1, 0, 0};
1360 int alarm_msix_id = VXGE_ALARM_MSIX_ID;
703da5a1
RV		 1361
1362 vxge_hw_vpath_intr_enable(vpath->handle);
1363
1364 if (vdev->config.intr_type == INTA)
1365 vxge_hw_vpath_inta_unmask_tx_rx(vpath->handle);
1366 else {
703da5a1
RV		 1367 vxge_hw_vpath_msix_set(vpath->handle, tim_msix_id,
1368 alarm_msix_id);
1369
b59c9457 1370 msix_id = vpath->device_id * VXGE_HW_VPATH_MSIX_ACTIVE;
703da5a1
RV		 1371 vxge_hw_vpath_msix_unmask(vpath->handle, msix_id);
1372 vxge_hw_vpath_msix_unmask(vpath->handle, msix_id + 1);
1373
1374 /* enable the alarm vector */
b59c9457
SH		 1375 msix_id = (vpath->handle->vpath->hldev->first_vp_id *
1376 VXGE_HW_VPATH_MSIX_ACTIVE) + alarm_msix_id;
1377 vxge_hw_vpath_msix_unmask(vpath->handle, msix_id);
703da5a1
RV		 1378 }
1379}
1380
1381/*
1382 * vxge_vpath_intr_disable
1383 * @vdev: pointer to vdev
1384 * @vp_id: vpath for which to disable the interrupts
1385 *
1386 * Disables the interrupts for the vpath
1387*/
42821a5b 1388static void vxge_vpath_intr_disable(struct vxgedev *vdev, int vp_id)
703da5a1
RV		 1389{
1390 struct vxge_vpath *vpath = &vdev->vpaths[vp_id];
4d2a5b40 1391 struct __vxge_hw_device *hldev;
703da5a1
RV		 1392 int msix_id;
1393
d8ee7071 1394 hldev = pci_get_drvdata(vdev->pdev);
4d2a5b40
JM		 1395
1396 vxge_hw_vpath_wait_receive_idle(hldev, vpath->device_id);
1397
703da5a1
RV		 1398 vxge_hw_vpath_intr_disable(vpath->handle);
1399
1400 if (vdev->config.intr_type == INTA)
1401 vxge_hw_vpath_inta_mask_tx_rx(vpath->handle);
1402 else {
b59c9457 1403 msix_id = vpath->device_id * VXGE_HW_VPATH_MSIX_ACTIVE;
703da5a1
RV		 1404 vxge_hw_vpath_msix_mask(vpath->handle, msix_id);
1405 vxge_hw_vpath_msix_mask(vpath->handle, msix_id + 1);
1406
1407 /* disable the alarm vector */
b59c9457
SH		 1408 msix_id = (vpath->handle->vpath->hldev->first_vp_id *
1409 VXGE_HW_VPATH_MSIX_ACTIVE) + VXGE_ALARM_MSIX_ID;
703da5a1
RV		 1410 vxge_hw_vpath_msix_mask(vpath->handle, msix_id);
1411 }
1412}
1413
528f7272
JM		 1414/* list all mac addresses from DA table */
1415static enum vxge_hw_status
1416vxge_search_mac_addr_in_da_table(struct vxge_vpath *vpath, struct macInfo *mac)
1417{
1418 enum vxge_hw_status status = VXGE_HW_OK;
1419 unsigned char macmask[ETH_ALEN];
1420 unsigned char macaddr[ETH_ALEN];
1421
1422 status = vxge_hw_vpath_mac_addr_get(vpath->handle,
1423 macaddr, macmask);
1424 if (status != VXGE_HW_OK) {
1425 vxge_debug_init(VXGE_ERR,
1426 "DA config list entry failed for vpath:%d",
1427 vpath->device_id);
1428 return status;
1429 }
1430
1431 while (memcmp(mac->macaddr, macaddr, ETH_ALEN)) {
1432 status = vxge_hw_vpath_mac_addr_get_next(vpath->handle,
1433 macaddr, macmask);
1434 if (status != VXGE_HW_OK)
1435 break;
1436 }
1437
1438 return status;
1439}
1440
1441/* Store all mac addresses from the list to the DA table */
1442static enum vxge_hw_status vxge_restore_vpath_mac_addr(struct vxge_vpath *vpath)
1443{
1444 enum vxge_hw_status status = VXGE_HW_OK;
1445 struct macInfo mac_info;
1446 u8 *mac_address = NULL;
1447 struct list_head *entry, *next;
1448
1449 memset(&mac_info, 0, sizeof(struct macInfo));
1450
1451 if (vpath->is_open) {
1452 list_for_each_safe(entry, next, &vpath->mac_addr_list) {
1453 mac_address =
1454 (u8 *)&
1455 ((struct vxge_mac_addrs *)entry)->macaddr;
1456 memcpy(mac_info.macaddr, mac_address, ETH_ALEN);
1457 ((struct vxge_mac_addrs *)entry)->state =
1458 VXGE_LL_MAC_ADDR_IN_DA_TABLE;
1459 /* does this mac address already exist in da table? */
1460 status = vxge_search_mac_addr_in_da_table(vpath,
1461 &mac_info);
1462 if (status != VXGE_HW_OK) {
1463 /* Add this mac address to the DA table */
1464 status = vxge_hw_vpath_mac_addr_add(
1465 vpath->handle, mac_info.macaddr,
1466 mac_info.macmask,
1467 VXGE_HW_VPATH_MAC_ADDR_ADD_DUPLICATE);
1468 if (status != VXGE_HW_OK) {
1469 vxge_debug_init(VXGE_ERR,
1470 "DA add entry failed for vpath:%d",
1471 vpath->device_id);
1472 ((struct vxge_mac_addrs *)entry)->state
1473 = VXGE_LL_MAC_ADDR_IN_LIST;
1474 }
1475 }
1476 }
1477 }
1478
1479 return status;
1480}
1481
1482/* Store all vlan ids from the list to the vid table */
1483static enum vxge_hw_status
1484vxge_restore_vpath_vid_table(struct vxge_vpath *vpath)
1485{
1486 enum vxge_hw_status status = VXGE_HW_OK;
1487 struct vxgedev *vdev = vpath->vdev;
1488 u16 vid;
1489
53515734
JP		 1490 if (!vpath->is_open)
1491 return status;
528f7272 1492
53515734
JP		 1493 for_each_set_bit(vid, vdev->active_vlans, VLAN_N_VID)
1494 status = vxge_hw_vpath_vid_add(vpath->handle, vid);
528f7272
JM		 1495
1496 return status;
1497}
1498
703da5a1
RV		 1499/*
1500 * vxge_reset_vpath
1501 * @vdev: pointer to vdev
1502 * @vp_id: vpath to reset
1503 *
1504 * Resets the vpath
1505*/
1506static int vxge_reset_vpath(struct vxgedev *vdev, int vp_id)
1507{
1508 enum vxge_hw_status status = VXGE_HW_OK;
7adf7d1b 1509 struct vxge_vpath *vpath = &vdev->vpaths[vp_id];
703da5a1
RV		 1510 int ret = 0;
1511
1512 /* check if device is down already */
1513 if (unlikely(!is_vxge_card_up(vdev)))
1514 return 0;
1515
1516 /* is device reset already scheduled */
1517 if (test_bit(__VXGE_STATE_RESET_CARD, &vdev->state))
1518 return 0;
1519
7adf7d1b
JM		 1520 if (vpath->handle) {
1521 if (vxge_hw_vpath_reset(vpath->handle) == VXGE_HW_OK) {
703da5a1 1522 if (is_vxge_card_up(vdev) &&
7adf7d1b 1523 vxge_hw_vpath_recover_from_reset(vpath->handle)
703da5a1
RV		 1524 != VXGE_HW_OK) {
1525 vxge_debug_init(VXGE_ERR,
1526 "vxge_hw_vpath_recover_from_reset"
1527 "failed for vpath:%d", vp_id);
1528 return status;
1529 }
1530 } else {
1531 vxge_debug_init(VXGE_ERR,
1532 "vxge_hw_vpath_reset failed for"
1533 "vpath:%d", vp_id);
1534 return status;
1535 }
1536 } else
1537 return VXGE_HW_FAIL;
1538
7adf7d1b
JM		 1539 vxge_restore_vpath_mac_addr(vpath);
1540 vxge_restore_vpath_vid_table(vpath);
703da5a1
RV		 1541
1542 /* Enable all broadcast */
7adf7d1b
JM		 1543 vxge_hw_vpath_bcast_enable(vpath->handle);
1544
1545 /* Enable all multicast */
1546 if (vdev->all_multi_flg) {
1547 status = vxge_hw_vpath_mcast_enable(vpath->handle);
1548 if (status != VXGE_HW_OK)
1549 vxge_debug_init(VXGE_ERR,
1550 "%s:%d Enabling multicast failed",
1551 __func__, __LINE__);
1552 }
703da5a1
RV		 1553
1554 /* Enable the interrupts */
1555 vxge_vpath_intr_enable(vdev, vp_id);
1556
1557 smp_wmb();
1558
1559 /* Enable the flow of traffic through the vpath */
7adf7d1b 1560 vxge_hw_vpath_enable(vpath->handle);
703da5a1
RV		 1561
1562 smp_wmb();
7adf7d1b
JM		 1563 vxge_hw_vpath_rx_doorbell_init(vpath->handle);
1564 vpath->ring.last_status = VXGE_HW_OK;
703da5a1
RV		 1565
1566 /* Vpath reset done */
1567 clear_bit(vp_id, &vdev->vp_reset);
1568
1569 /* Start the vpath queue */
98f45da2
JM		 1570 if (netif_tx_queue_stopped(vpath->fifo.txq))
1571 netif_tx_wake_queue(vpath->fifo.txq);
703da5a1
RV		 1572
1573 return ret;
1574}
1575
16fded7d
JM		 1576/* Configure CI */
1577static void vxge_config_ci_for_tti_rti(struct vxgedev *vdev)
1578{
1579 int i = 0;
1580
1581 /* Enable CI for RTI */
1582 if (vdev->config.intr_type == MSI_X) {
1583 for (i = 0; i < vdev->no_of_vpath; i++) {
1584 struct __vxge_hw_ring *hw_ring;
1585
1586 hw_ring = vdev->vpaths[i].ring.handle;
1587 vxge_hw_vpath_dynamic_rti_ci_set(hw_ring);
1588 }
1589 }
1590
1591 /* Enable CI for TTI */
1592 for (i = 0; i < vdev->no_of_vpath; i++) {
1593 struct __vxge_hw_fifo *hw_fifo = vdev->vpaths[i].fifo.handle;
1594 vxge_hw_vpath_tti_ci_set(hw_fifo);
1595 /*
1596 * For Inta (with or without napi), Set CI ON for only one
1597 * vpath. (Have only one free running timer).
1598 */
1599 if ((vdev->config.intr_type == INTA) && (i == 0))
1600 break;
1601 }
1602
1603 return;
1604}
1605
703da5a1
RV		 1606static int do_vxge_reset(struct vxgedev *vdev, int event)
1607{
1608 enum vxge_hw_status status;
1609 int ret = 0, vp_id, i;
1610
1611 vxge_debug_entryexit(VXGE_TRACE, "%s:%d", __func__, __LINE__);
1612
1613 if ((event == VXGE_LL_FULL_RESET) || (event == VXGE_LL_START_RESET)) {
1614 /* check if device is down already */
1615 if (unlikely(!is_vxge_card_up(vdev)))
1616 return 0;
1617
1618 /* is reset already scheduled */
1619 if (test_and_set_bit(__VXGE_STATE_RESET_CARD, &vdev->state))
1620 return 0;
1621 }
1622
1623 if (event == VXGE_LL_FULL_RESET) {
2e41f644
JM		 1624 netif_carrier_off(vdev->ndev);
1625
703da5a1
RV		 1626 /* wait for all the vpath reset to complete */
1627 for (vp_id = 0; vp_id < vdev->no_of_vpath; vp_id++) {
1628 while (test_bit(vp_id, &vdev->vp_reset))
1629 msleep(50);
1630 }
1631
2e41f644
JM		 1632 netif_carrier_on(vdev->ndev);
1633
703da5a1
RV		 1634 /* if execution mode is set to debug, don't reset the adapter */
1635 if (unlikely(vdev->exec_mode)) {
1636 vxge_debug_init(VXGE_ERR,
1637 "%s: execution mode is debug, returning..",
1638 vdev->ndev->name);
7adf7d1b
JM		 1639 clear_bit(__VXGE_STATE_CARD_UP, &vdev->state);
1640 netif_tx_stop_all_queues(vdev->ndev);
1641 return 0;
703da5a1
RV		 1642 }
1643 }
1644
1645 if (event == VXGE_LL_FULL_RESET) {
4d2a5b40 1646 vxge_hw_device_wait_receive_idle(vdev->devh);
703da5a1
RV		 1647 vxge_hw_device_intr_disable(vdev->devh);
1648
1649 switch (vdev->cric_err_event) {
1650 case VXGE_HW_EVENT_UNKNOWN:
d03848e0 1651 netif_tx_stop_all_queues(vdev->ndev);
703da5a1
RV		 1652 vxge_debug_init(VXGE_ERR,
1653 "fatal: %s: Disabling device due to"
1654 "unknown error",
1655 vdev->ndev->name);
1656 ret = -EPERM;
1657 goto out;
1658 case VXGE_HW_EVENT_RESET_START:
1659 break;
1660 case VXGE_HW_EVENT_RESET_COMPLETE:
1661 case VXGE_HW_EVENT_LINK_DOWN:
1662 case VXGE_HW_EVENT_LINK_UP:
1663 case VXGE_HW_EVENT_ALARM_CLEARED:
1664 case VXGE_HW_EVENT_ECCERR:
1665 case VXGE_HW_EVENT_MRPCIM_ECCERR:
1666 ret = -EPERM;
1667 goto out;
1668 case VXGE_HW_EVENT_FIFO_ERR:
1669 case VXGE_HW_EVENT_VPATH_ERR:
1670 break;
1671 case VXGE_HW_EVENT_CRITICAL_ERR:
d03848e0 1672 netif_tx_stop_all_queues(vdev->ndev);
703da5a1
RV		 1673 vxge_debug_init(VXGE_ERR,
1674 "fatal: %s: Disabling device due to"
1675 "serious error",
1676 vdev->ndev->name);
1677 /* SOP or device reset required */
1678 /* This event is not currently used */
1679 ret = -EPERM;
1680 goto out;
1681 case VXGE_HW_EVENT_SERR:
d03848e0 1682 netif_tx_stop_all_queues(vdev->ndev);
703da5a1
RV		 1683 vxge_debug_init(VXGE_ERR,
1684 "fatal: %s: Disabling device due to"
1685 "serious error",
1686 vdev->ndev->name);
1687 ret = -EPERM;
1688 goto out;
1689 case VXGE_HW_EVENT_SRPCIM_SERR:
1690 case VXGE_HW_EVENT_MRPCIM_SERR:
1691 ret = -EPERM;
1692 goto out;
1693 case VXGE_HW_EVENT_SLOT_FREEZE:
d03848e0 1694 netif_tx_stop_all_queues(vdev->ndev);
703da5a1
RV		 1695 vxge_debug_init(VXGE_ERR,
1696 "fatal: %s: Disabling device due to"
1697 "slot freeze",
1698 vdev->ndev->name);
1699 ret = -EPERM;
1700 goto out;
1701 default:
1702 break;
1703
1704 }
1705 }
1706
1707 if ((event == VXGE_LL_FULL_RESET) || (event == VXGE_LL_START_RESET))
d03848e0 1708 netif_tx_stop_all_queues(vdev->ndev);
703da5a1
RV		 1709
1710 if (event == VXGE_LL_FULL_RESET) {
1711 status = vxge_reset_all_vpaths(vdev);
1712 if (status != VXGE_HW_OK) {
1713 vxge_debug_init(VXGE_ERR,
1714 "fatal: %s: can not reset vpaths",
1715 vdev->ndev->name);
1716 ret = -EPERM;
1717 goto out;
1718 }
1719 }
1720
1721 if (event == VXGE_LL_COMPL_RESET) {
1722 for (i = 0; i < vdev->no_of_vpath; i++)
1723 if (vdev->vpaths[i].handle) {
1724 if (vxge_hw_vpath_recover_from_reset(
1725 vdev->vpaths[i].handle)
1726 != VXGE_HW_OK) {
1727 vxge_debug_init(VXGE_ERR,
1728 "vxge_hw_vpath_recover_"
1729 "from_reset failed for vpath: "
1730 "%d", i);
1731 ret = -EPERM;
1732 goto out;
1733 }
1734 } else {
1735 vxge_debug_init(VXGE_ERR,
1736 "vxge_hw_vpath_reset failed for "
1737 "vpath:%d", i);
1738 ret = -EPERM;
1739 goto out;
1740 }
1741 }
1742
1743 if ((event == VXGE_LL_FULL_RESET) || (event == VXGE_LL_COMPL_RESET)) {
1744 /* Reprogram the DA table with populated mac addresses */
1745 for (vp_id = 0; vp_id < vdev->no_of_vpath; vp_id++) {
1746 vxge_restore_vpath_mac_addr(&vdev->vpaths[vp_id]);
1747 vxge_restore_vpath_vid_table(&vdev->vpaths[vp_id]);
1748 }
1749
1750 /* enable vpath interrupts */
1751 for (i = 0; i < vdev->no_of_vpath; i++)
1752 vxge_vpath_intr_enable(vdev, i);
1753
1754 vxge_hw_device_intr_enable(vdev->devh);
1755
1756 smp_wmb();
1757
1758 /* Indicate card up */
1759 set_bit(__VXGE_STATE_CARD_UP, &vdev->state);
1760
1761 /* Get the traffic to flow through the vpaths */
1762 for (i = 0; i < vdev->no_of_vpath; i++) {
1763 vxge_hw_vpath_enable(vdev->vpaths[i].handle);
1764 smp_wmb();
1765 vxge_hw_vpath_rx_doorbell_init(vdev->vpaths[i].handle);
1766 }
1767
d03848e0 1768 netif_tx_wake_all_queues(vdev->ndev);
703da5a1
RV		 1769 }
1770
16fded7d
JM		 1771 /* configure CI */
1772 vxge_config_ci_for_tti_rti(vdev);
1773
703da5a1
RV		 1774out:
1775 vxge_debug_entryexit(VXGE_TRACE,
1776 "%s:%d Exiting...", __func__, __LINE__);
1777
1778 /* Indicate reset done */
1779 if ((event == VXGE_LL_FULL_RESET) || (event == VXGE_LL_COMPL_RESET))
1780 clear_bit(__VXGE_STATE_RESET_CARD, &vdev->state);
1781 return ret;
1782}
1783
1784/*
1785 * vxge_reset
1786 * @vdev: pointer to ll device
1787 *
1788 * driver may reset the chip on events of serr, eccerr, etc
1789 */
2e41f644 1790static void vxge_reset(struct work_struct *work)
703da5a1 1791{
2e41f644
JM		 1792 struct vxgedev *vdev = container_of(work, struct vxgedev, reset_task);
1793
1794 if (!netif_running(vdev->ndev))
1795 return;
1796
1797 do_vxge_reset(vdev, VXGE_LL_FULL_RESET);
703da5a1
RV		 1798}
1799
1800/**
1801 * vxge_poll - Receive handler when Receive Polling is used.
1802 * @dev: pointer to the device structure.
1803 * @budget: Number of packets budgeted to be processed in this iteration.
1804 *
1805 * This function comes into picture only if Receive side is being handled
1806 * through polling (called NAPI in linux). It mostly does what the normal
1807 * Rx interrupt handler does in terms of descriptor and packet processing
1808 * but not in an interrupt context. Also it will process a specified number
1809 * of packets at most in one iteration. This value is passed down by the
1810 * kernel as the function argument 'budget'.
1811 */
1812static int vxge_poll_msix(struct napi_struct *napi, int budget)
1813{
16fded7d
JM		 1814 struct vxge_ring *ring = container_of(napi, struct vxge_ring, napi);
1815 int pkts_processed;
703da5a1 1816 int budget_org = budget;
703da5a1 1817
16fded7d
JM		 1818 ring->budget = budget;
1819 ring->pkts_processed = 0;
703da5a1 1820 vxge_hw_vpath_poll_rx(ring->handle);
16fded7d 1821 pkts_processed = ring->pkts_processed;
703da5a1
RV		 1822
1823 if (ring->pkts_processed < budget_org) {
1824 napi_complete(napi);
16fded7d 1825
703da5a1
RV		 1826 /* Re enable the Rx interrupts for the vpath */
1827 vxge_hw_channel_msix_unmask(
1828 (struct __vxge_hw_channel *)ring->handle,
1829 ring->rx_vector_no);
16fded7d 1830 mmiowb();
703da5a1
RV		 1831 }
1832
16fded7d
JM		 1833 /* We are copying and returning the local variable, in case if after
1834 * clearing the msix interrupt above, if the interrupt fires right
1835 * away which can preempt this NAPI thread */
1836 return pkts_processed;
703da5a1
RV		 1837}
1838
1839static int vxge_poll_inta(struct napi_struct *napi, int budget)
1840{
1841 struct vxgedev *vdev = container_of(napi, struct vxgedev, napi);
1842 int pkts_processed = 0;
1843 int i;
1844 int budget_org = budget;
1845 struct vxge_ring *ring;
1846
d8ee7071 1847 struct __vxge_hw_device *hldev = pci_get_drvdata(vdev->pdev);
703da5a1
RV		 1848
1849 for (i = 0; i < vdev->no_of_vpath; i++) {
1850 ring = &vdev->vpaths[i].ring;
1851 ring->budget = budget;
16fded7d 1852 ring->pkts_processed = 0;
703da5a1
RV		 1853 vxge_hw_vpath_poll_rx(ring->handle);
1854 pkts_processed += ring->pkts_processed;
1855 budget -= ring->pkts_processed;
1856 if (budget <= 0)
1857 break;
1858 }
1859
1860 VXGE_COMPLETE_ALL_TX(vdev);
1861
1862 if (pkts_processed < budget_org) {
1863 napi_complete(napi);
1864 /* Re enable the Rx interrupts for the ring */
1865 vxge_hw_device_unmask_all(hldev);
1866 vxge_hw_device_flush_io(hldev);
1867 }
1868
1869 return pkts_processed;
1870}
1871
1872#ifdef CONFIG_NET_POLL_CONTROLLER
1873/**
1874 * vxge_netpoll - netpoll event handler entry point
1875 * @dev : pointer to the device structure.
1876 * Description:
1877 * This function will be called by upper layer to check for events on the
1878 * interface in situations where interrupts are disabled. It is used for
1879 * specific in-kernel networking tasks, such as remote consoles and kernel
1880 * debugging over the network (example netdump in RedHat).
1881 */
1882static void vxge_netpoll(struct net_device *dev)
1883{
2c91308f 1884 struct __vxge_hw_device *hldev;
703da5a1
RV		 1885 struct vxgedev *vdev;
1886
5f54cebb 1887 vdev = netdev_priv(dev);
d8ee7071 1888 hldev = pci_get_drvdata(vdev->pdev);
703da5a1
RV		 1889
1890 vxge_debug_entryexit(VXGE_TRACE, "%s:%d", __func__, __LINE__);
1891
1892 if (pci_channel_offline(vdev->pdev))
1893 return;
1894
1895 disable_irq(dev->irq);
1896 vxge_hw_device_clear_tx_rx(hldev);
1897
1898 vxge_hw_device_clear_tx_rx(hldev);
1899 VXGE_COMPLETE_ALL_RX(vdev);
1900 VXGE_COMPLETE_ALL_TX(vdev);
1901
1902 enable_irq(dev->irq);
1903
1904 vxge_debug_entryexit(VXGE_TRACE,
1905 "%s:%d Exiting...", __func__, __LINE__);
703da5a1
RV		 1906}
1907#endif
1908
1909/* RTH configuration */
1910static enum vxge_hw_status vxge_rth_configure(struct vxgedev *vdev)
1911{
1912 enum vxge_hw_status status = VXGE_HW_OK;
1913 struct vxge_hw_rth_hash_types hash_types;
1914 u8 itable[256] = {0}; /* indirection table */
1915 u8 mtable[256] = {0}; /* CPU to vpath mapping */
1916 int index;
1917
1918 /*
1919 * Filling
1920 * - itable with bucket numbers
1921 * - mtable with bucket-to-vpath mapping
1922 */
1923 for (index = 0; index < (1 << vdev->config.rth_bkt_sz); index++) {
1924 itable[index] = index;
1925 mtable[index] = index % vdev->no_of_vpath;
1926 }
1927
703da5a1
RV		 1928 /* set indirection table, bucket-to-vpath mapping */
1929 status = vxge_hw_vpath_rts_rth_itable_set(vdev->vp_handles,
1930 vdev->no_of_vpath,
1931 mtable, itable,
1932 vdev->config.rth_bkt_sz);
1933 if (status != VXGE_HW_OK) {
1934 vxge_debug_init(VXGE_ERR,
1935 "RTH indirection table configuration failed "
1936 "for vpath:%d", vdev->vpaths[0].device_id);
1937 return status;
1938 }
1939
47f01db4
JM		 1940 /* Fill RTH hash types */
1941 hash_types.hash_type_tcpipv4_en = vdev->config.rth_hash_type_tcpipv4;
1942 hash_types.hash_type_ipv4_en = vdev->config.rth_hash_type_ipv4;
1943 hash_types.hash_type_tcpipv6_en = vdev->config.rth_hash_type_tcpipv6;
1944 hash_types.hash_type_ipv6_en = vdev->config.rth_hash_type_ipv6;
1945 hash_types.hash_type_tcpipv6ex_en =
1946 vdev->config.rth_hash_type_tcpipv6ex;
1947 hash_types.hash_type_ipv6ex_en = vdev->config.rth_hash_type_ipv6ex;
1948
703da5a1 1949 /*
47f01db4
JM		 1950 * Because the itable_set() method uses the active_table field
1951 * for the target virtual path the RTH config should be updated
1952 * for all VPATHs. The h/w only uses the lowest numbered VPATH
1953 * when steering frames.
1954 */
703da5a1
RV		 1955 for (index = 0; index < vdev->no_of_vpath; index++) {
1956 status = vxge_hw_vpath_rts_rth_set(
1957 vdev->vpaths[index].handle,
1958 vdev->config.rth_algorithm,
1959 &hash_types,
1960 vdev->config.rth_bkt_sz);
703da5a1
RV		 1961 if (status != VXGE_HW_OK) {
1962 vxge_debug_init(VXGE_ERR,
1963 "RTH configuration failed for vpath:%d",
1964 vdev->vpaths[index].device_id);
1965 return status;
1966 }
1967 }
1968
1969 return status;
1970}
1971
703da5a1 1972/* reset vpaths */
4d2a5b40 1973enum vxge_hw_status vxge_reset_all_vpaths(struct vxgedev *vdev)
703da5a1 1974{
703da5a1 1975 enum vxge_hw_status status = VXGE_HW_OK;
7adf7d1b
JM		 1976 struct vxge_vpath *vpath;
1977 int i;
703da5a1 1978
7adf7d1b
JM		 1979 for (i = 0; i < vdev->no_of_vpath; i++) {
1980 vpath = &vdev->vpaths[i];
1981 if (vpath->handle) {
1982 if (vxge_hw_vpath_reset(vpath->handle) == VXGE_HW_OK) {
703da5a1
RV		 1983 if (is_vxge_card_up(vdev) &&
1984 vxge_hw_vpath_recover_from_reset(
7adf7d1b 1985 vpath->handle) != VXGE_HW_OK) {
703da5a1
RV		 1986 vxge_debug_init(VXGE_ERR,
1987 "vxge_hw_vpath_recover_"
1988 "from_reset failed for vpath: "
1989 "%d", i);
1990 return status;
1991 }
1992 } else {
1993 vxge_debug_init(VXGE_ERR,
1994 "vxge_hw_vpath_reset failed for "
1995 "vpath:%d", i);
1996 return status;
1997 }
1998 }
7adf7d1b
JM		 1999 }
2000
703da5a1
RV		 2001 return status;
2002}
2003
2004/* close vpaths */
42821a5b 2005static void vxge_close_vpaths(struct vxgedev *vdev, int index)
703da5a1 2006{
7adf7d1b 2007 struct vxge_vpath *vpath;
703da5a1 2008 int i;
7adf7d1b 2009
703da5a1 2010 for (i = index; i < vdev->no_of_vpath; i++) {
7adf7d1b
JM		 2011 vpath = &vdev->vpaths[i];
2012
2013 if (vpath->handle && vpath->is_open) {
2014 vxge_hw_vpath_close(vpath->handle);
703da5a1
RV		 2015 vdev->stats.vpaths_open--;
2016 }
7adf7d1b
JM		 2017 vpath->is_open = 0;
2018 vpath->handle = NULL;
703da5a1
RV		 2019 }
2020}
2021
2022/* open vpaths */
42821a5b 2023static int vxge_open_vpaths(struct vxgedev *vdev)
703da5a1 2024{
7adf7d1b 2025 struct vxge_hw_vpath_attr attr;
703da5a1 2026 enum vxge_hw_status status;
7adf7d1b 2027 struct vxge_vpath *vpath;
703da5a1 2028 u32 vp_id = 0;
7adf7d1b 2029 int i;
703da5a1
RV		 2030
2031 for (i = 0; i < vdev->no_of_vpath; i++) {
7adf7d1b 2032 vpath = &vdev->vpaths[i];
7adf7d1b 2033 vxge_assert(vpath->is_configured);
e7935c96
JM		 2034
2035 if (!vdev->titan1) {
2036 struct vxge_hw_vp_config *vcfg;
2037 vcfg = &vdev->devh->config.vp_config[vpath->device_id];
2038
2039 vcfg->rti.urange_a = RTI_T1A_RX_URANGE_A;
2040 vcfg->rti.urange_b = RTI_T1A_RX_URANGE_B;
2041 vcfg->rti.urange_c = RTI_T1A_RX_URANGE_C;
2042 vcfg->tti.uec_a = TTI_T1A_TX_UFC_A;
2043 vcfg->tti.uec_b = TTI_T1A_TX_UFC_B;
2044 vcfg->tti.uec_c = TTI_T1A_TX_UFC_C(vdev->mtu);
2045 vcfg->tti.uec_d = TTI_T1A_TX_UFC_D(vdev->mtu);
2046 vcfg->tti.ltimer_val = VXGE_T1A_TTI_LTIMER_VAL;
2047 vcfg->tti.rtimer_val = VXGE_T1A_TTI_RTIMER_VAL;
2048 }
2049
7adf7d1b 2050 attr.vp_id = vpath->device_id;
703da5a1
RV		 2051 attr.fifo_attr.callback = vxge_xmit_compl;
2052 attr.fifo_attr.txdl_term = vxge_tx_term;
2053 attr.fifo_attr.per_txdl_space = sizeof(struct vxge_tx_priv);
7adf7d1b 2054 attr.fifo_attr.userdata = &vpath->fifo;
703da5a1
RV		 2055
2056 attr.ring_attr.callback = vxge_rx_1b_compl;
2057 attr.ring_attr.rxd_init = vxge_rx_initial_replenish;
2058 attr.ring_attr.rxd_term = vxge_rx_term;
2059 attr.ring_attr.per_rxd_space = sizeof(struct vxge_rx_priv);
7adf7d1b 2060 attr.ring_attr.userdata = &vpath->ring;
703da5a1 2061
7adf7d1b
JM		 2062 vpath->ring.ndev = vdev->ndev;
2063 vpath->ring.pdev = vdev->pdev;
528f7272 2064
7adf7d1b 2065 status = vxge_hw_vpath_open(vdev->devh, &attr, &vpath->handle);
703da5a1 2066 if (status == VXGE_HW_OK) {
7adf7d1b 2067 vpath->fifo.handle =
703da5a1 2068 (struct __vxge_hw_fifo *)attr.fifo_attr.userdata;
7adf7d1b 2069 vpath->ring.handle =
703da5a1 2070 (struct __vxge_hw_ring *)attr.ring_attr.userdata;
7adf7d1b 2071 vpath->fifo.tx_steering_type =
703da5a1 2072 vdev->config.tx_steering_type;
7adf7d1b
JM		 2073 vpath->fifo.ndev = vdev->ndev;
2074 vpath->fifo.pdev = vdev->pdev;
98f45da2
JM		 2075 if (vdev->config.tx_steering_type)
2076 vpath->fifo.txq =
2077 netdev_get_tx_queue(vdev->ndev, i);
2078 else
2079 vpath->fifo.txq =
2080 netdev_get_tx_queue(vdev->ndev, 0);
7adf7d1b 2081 vpath->fifo.indicate_max_pkts =
703da5a1 2082 vdev->config.fifo_indicate_max_pkts;
16fded7d 2083 vpath->fifo.tx_vector_no = 0;
7adf7d1b 2084 vpath->ring.rx_vector_no = 0;
b81b3733 2085 vpath->ring.rx_hwts = vdev->rx_hwts;
7adf7d1b
JM		 2086 vpath->is_open = 1;
2087 vdev->vp_handles[i] = vpath->handle;
7adf7d1b 2088 vpath->ring.vlan_tag_strip = vdev->vlan_tag_strip;
703da5a1
RV		 2089 vdev->stats.vpaths_open++;
2090 } else {
2091 vdev->stats.vpath_open_fail++;
528f7272
JM		 2092 vxge_debug_init(VXGE_ERR, "%s: vpath: %d failed to "
2093 "open with status: %d",
2094 vdev->ndev->name, vpath->device_id,
2095 status);
703da5a1
RV		 2096 vxge_close_vpaths(vdev, 0);
2097 return -EPERM;
2098 }
2099
7adf7d1b 2100 vp_id = vpath->handle->vpath->vp_id;
703da5a1
RV		 2101 vdev->vpaths_deployed |= vxge_mBIT(vp_id);
2102 }
528f7272 2103
703da5a1
RV		 2104 return VXGE_HW_OK;
2105}
2106
16fded7d
JM		 2107/**
2108 * adaptive_coalesce_tx_interrupts - Changes the interrupt coalescing
2109 * if the interrupts are not within a range
2110 * @fifo: pointer to transmit fifo structure
2111 * Description: The function changes boundary timer and restriction timer
2112 * value depends on the traffic
2113 * Return Value: None
2114 */
2115static void adaptive_coalesce_tx_interrupts(struct vxge_fifo *fifo)
2116{
2117 fifo->interrupt_count++;
2118 if (jiffies > fifo->jiffies + HZ / 100) {
2119 struct __vxge_hw_fifo *hw_fifo = fifo->handle;
2120
2121 fifo->jiffies = jiffies;
2122 if (fifo->interrupt_count > VXGE_T1A_MAX_TX_INTERRUPT_COUNT &&
2123 hw_fifo->rtimer != VXGE_TTI_RTIMER_ADAPT_VAL) {
2124 hw_fifo->rtimer = VXGE_TTI_RTIMER_ADAPT_VAL;
2125 vxge_hw_vpath_dynamic_tti_rtimer_set(hw_fifo);
2126 } else if (hw_fifo->rtimer != 0) {
2127 hw_fifo->rtimer = 0;
2128 vxge_hw_vpath_dynamic_tti_rtimer_set(hw_fifo);
2129 }
2130 fifo->interrupt_count = 0;
2131 }
2132}
2133
2134/**
2135 * adaptive_coalesce_rx_interrupts - Changes the interrupt coalescing
2136 * if the interrupts are not within a range
2137 * @ring: pointer to receive ring structure
2138 * Description: The function increases of decreases the packet counts within
2139 * the ranges of traffic utilization, if the interrupts due to this ring are
2140 * not within a fixed range.
2141 * Return Value: Nothing
2142 */
2143static void adaptive_coalesce_rx_interrupts(struct vxge_ring *ring)
2144{
2145 ring->interrupt_count++;
2146 if (jiffies > ring->jiffies + HZ / 100) {
2147 struct __vxge_hw_ring *hw_ring = ring->handle;
2148
2149 ring->jiffies = jiffies;
2150 if (ring->interrupt_count > VXGE_T1A_MAX_INTERRUPT_COUNT &&
2151 hw_ring->rtimer != VXGE_RTI_RTIMER_ADAPT_VAL) {
2152 hw_ring->rtimer = VXGE_RTI_RTIMER_ADAPT_VAL;
2153 vxge_hw_vpath_dynamic_rti_rtimer_set(hw_ring);
2154 } else if (hw_ring->rtimer != 0) {
2155 hw_ring->rtimer = 0;
2156 vxge_hw_vpath_dynamic_rti_rtimer_set(hw_ring);
2157 }
2158 ring->interrupt_count = 0;
2159 }
2160}
2161
703da5a1
RV		 2162/*
2163 * vxge_isr_napi
2164 * @irq: the irq of the device.
2165 * @dev_id: a void pointer to the hldev structure of the Titan device
2166 * @ptregs: pointer to the registers pushed on the stack.
2167 *
2168 * This function is the ISR handler of the device when napi is enabled. It
2169 * identifies the reason for the interrupt and calls the relevant service
2170 * routines.
2171 */
2172static irqreturn_t vxge_isr_napi(int irq, void *dev_id)
2173{
703da5a1 2174 struct net_device *dev;
a5d165b5 2175 struct __vxge_hw_device *hldev;
703da5a1
RV		 2176 u64 reason;
2177 enum vxge_hw_status status;
2c91308f 2178 struct vxgedev *vdev = (struct vxgedev *)dev_id;
703da5a1
RV		 2179
2180 vxge_debug_intr(VXGE_TRACE, "%s:%d", __func__, __LINE__);
2181
a5d165b5 2182 dev = vdev->ndev;
d8ee7071 2183 hldev = pci_get_drvdata(vdev->pdev);
703da5a1
RV		 2184
2185 if (pci_channel_offline(vdev->pdev))
2186 return IRQ_NONE;
2187
2188 if (unlikely(!is_vxge_card_up(vdev)))
4d2a5b40 2189 return IRQ_HANDLED;
703da5a1 2190
528f7272 2191 status = vxge_hw_device_begin_irq(hldev, vdev->exec_mode, &reason);
703da5a1
RV		 2192 if (status == VXGE_HW_OK) {
2193 vxge_hw_device_mask_all(hldev);
2194
2195 if (reason &
2196 VXGE_HW_TITAN_GENERAL_INT_STATUS_VPATH_TRAFFIC_INT(
2197 vdev->vpaths_deployed >>
2198 (64 - VXGE_HW_MAX_VIRTUAL_PATHS))) {
2199
2200 vxge_hw_device_clear_tx_rx(hldev);
2201 napi_schedule(&vdev->napi);
2202 vxge_debug_intr(VXGE_TRACE,
2203 "%s:%d Exiting...", __func__, __LINE__);
2204 return IRQ_HANDLED;
2205 } else
2206 vxge_hw_device_unmask_all(hldev);
2207 } else if (unlikely((status == VXGE_HW_ERR_VPATH) ||
2208 (status == VXGE_HW_ERR_CRITICAL) ||
2209 (status == VXGE_HW_ERR_FIFO))) {
2210 vxge_hw_device_mask_all(hldev);
2211 vxge_hw_device_flush_io(hldev);
2212 return IRQ_HANDLED;
2213 } else if (unlikely(status == VXGE_HW_ERR_SLOT_FREEZE))
2214 return IRQ_HANDLED;
2215
2216 vxge_debug_intr(VXGE_TRACE, "%s:%d Exiting...", __func__, __LINE__);
2217 return IRQ_NONE;
2218}
2219
2220#ifdef CONFIG_PCI_MSI
2221
16fded7d 2222static irqreturn_t vxge_tx_msix_handle(int irq, void *dev_id)
703da5a1
RV		 2223{
2224 struct vxge_fifo *fifo = (struct vxge_fifo *)dev_id;
2225
16fded7d
JM		 2226 adaptive_coalesce_tx_interrupts(fifo);
2227
2228 vxge_hw_channel_msix_mask((struct __vxge_hw_channel *)fifo->handle,
2229 fifo->tx_vector_no);
2230
2231 vxge_hw_channel_msix_clear((struct __vxge_hw_channel *)fifo->handle,
2232 fifo->tx_vector_no);
2233
703da5a1
RV		 2234 VXGE_COMPLETE_VPATH_TX(fifo);
2235
16fded7d
JM		 2236 vxge_hw_channel_msix_unmask((struct __vxge_hw_channel *)fifo->handle,
2237 fifo->tx_vector_no);
2238
2239 mmiowb();
2240
703da5a1
RV		 2241 return IRQ_HANDLED;
2242}
2243
16fded7d 2244static irqreturn_t vxge_rx_msix_napi_handle(int irq, void *dev_id)
703da5a1
RV		 2245{
2246 struct vxge_ring *ring = (struct vxge_ring *)dev_id;
2247
16fded7d
JM		 2248 adaptive_coalesce_rx_interrupts(ring);
2249
703da5a1 2250 vxge_hw_channel_msix_mask((struct __vxge_hw_channel *)ring->handle,
16fded7d
JM		 2251 ring->rx_vector_no);
2252
2253 vxge_hw_channel_msix_clear((struct __vxge_hw_channel *)ring->handle,
2254 ring->rx_vector_no);
703da5a1
RV		 2255
2256 napi_schedule(&ring->napi);
2257 return IRQ_HANDLED;
2258}
2259
2260static irqreturn_t
2261vxge_alarm_msix_handle(int irq, void *dev_id)
2262{
2263 int i;
2264 enum vxge_hw_status status;
2265 struct vxge_vpath *vpath = (struct vxge_vpath *)dev_id;
2266 struct vxgedev *vdev = vpath->vdev;
b59c9457
SH		 2267 int msix_id = (vpath->handle->vpath->vp_id *
2268 VXGE_HW_VPATH_MSIX_ACTIVE) + VXGE_ALARM_MSIX_ID;
703da5a1
RV		 2269
2270 for (i = 0; i < vdev->no_of_vpath; i++) {
25985edc 2271 /* Reduce the chance of losing alarm interrupts by masking
16fded7d
JM		 2272 * the vector. A pending bit will be set if an alarm is
2273 * generated and on unmask the interrupt will be fired.
2274 */
b59c9457 2275 vxge_hw_vpath_msix_mask(vdev->vpaths[i].handle, msix_id);
16fded7d
JM		 2276 vxge_hw_vpath_msix_clear(vdev->vpaths[i].handle, msix_id);
2277 mmiowb();
703da5a1
RV		 2278
2279 status = vxge_hw_vpath_alarm_process(vdev->vpaths[i].handle,
2280 vdev->exec_mode);
2281 if (status == VXGE_HW_OK) {
703da5a1 2282 vxge_hw_vpath_msix_unmask(vdev->vpaths[i].handle,
16fded7d
JM		 2283 msix_id);
2284 mmiowb();
703da5a1
RV		 2285 continue;
2286 }
2287 vxge_debug_intr(VXGE_ERR,
2288 "%s: vxge_hw_vpath_alarm_process failed %x ",
2289 VXGE_DRIVER_NAME, status);
2290 }
2291 return IRQ_HANDLED;
2292}
2293
2294static int vxge_alloc_msix(struct vxgedev *vdev)
2295{
2296 int j, i, ret = 0;
b59c9457 2297 int msix_intr_vect = 0, temp;
703da5a1
RV		 2298 vdev->intr_cnt = 0;
2299
b59c9457 2300start:
703da5a1
RV		 2301 /* Tx/Rx MSIX Vectors count */
2302 vdev->intr_cnt = vdev->no_of_vpath * 2;
2303
2304 /* Alarm MSIX Vectors count */
2305 vdev->intr_cnt++;
2306
baeb2ffa
JP		 2307 vdev->entries = kcalloc(vdev->intr_cnt, sizeof(struct msix_entry),
2308 GFP_KERNEL);
703da5a1
RV		 2309 if (!vdev->entries) {
2310 vxge_debug_init(VXGE_ERR,
2311 "%s: memory allocation failed",
2312 VXGE_DRIVER_NAME);
cc413d90
MS		 2313 ret = -ENOMEM;
2314 goto alloc_entries_failed;
703da5a1
RV		 2315 }
2316
baeb2ffa
JP		 2317 vdev->vxge_entries = kcalloc(vdev->intr_cnt,
2318 sizeof(struct vxge_msix_entry),
2319 GFP_KERNEL);
703da5a1
RV		 2320 if (!vdev->vxge_entries) {
2321 vxge_debug_init(VXGE_ERR, "%s: memory allocation failed",
2322 VXGE_DRIVER_NAME);
cc413d90
MS		 2323 ret = -ENOMEM;
2324 goto alloc_vxge_entries_failed;
703da5a1
RV		 2325 }
2326
b59c9457 2327 for (i = 0, j = 0; i < vdev->no_of_vpath; i++) {
703da5a1
RV		 2328
2329 msix_intr_vect = i * VXGE_HW_VPATH_MSIX_ACTIVE;
2330
2331 /* Initialize the fifo vector */
2332 vdev->entries[j].entry = msix_intr_vect;
2333 vdev->vxge_entries[j].entry = msix_intr_vect;
2334 vdev->vxge_entries[j].in_use = 0;
2335 j++;
2336
2337 /* Initialize the ring vector */
2338 vdev->entries[j].entry = msix_intr_vect + 1;
2339 vdev->vxge_entries[j].entry = msix_intr_vect + 1;
2340 vdev->vxge_entries[j].in_use = 0;
2341 j++;
2342 }
2343
2344 /* Initialize the alarm vector */
b59c9457
SH		 2345 vdev->entries[j].entry = VXGE_ALARM_MSIX_ID;
2346 vdev->vxge_entries[j].entry = VXGE_ALARM_MSIX_ID;
703da5a1
RV		 2347 vdev->vxge_entries[j].in_use = 0;
2348
b59c9457 2349 ret = pci_enable_msix(vdev->pdev, vdev->entries, vdev->intr_cnt);
b59c9457 2350 if (ret > 0) {
703da5a1
RV		 2351 vxge_debug_init(VXGE_ERR,
2352 "%s: MSI-X enable failed for %d vectors, ret: %d",
b59c9457 2353 VXGE_DRIVER_NAME, vdev->intr_cnt, ret);
cc413d90
MS		 2354 if ((max_config_vpath != VXGE_USE_DEFAULT) || (ret < 3)) {
2355 ret = -ENODEV;
2356 goto enable_msix_failed;
2357 }
2358
703da5a1
RV		 2359 kfree(vdev->entries);
2360 kfree(vdev->vxge_entries);
2361 vdev->entries = NULL;
2362 vdev->vxge_entries = NULL;
b59c9457
SH		 2363 /* Try with less no of vector by reducing no of vpaths count */
2364 temp = (ret - 1)/2;
2365 vxge_close_vpaths(vdev, temp);
2366 vdev->no_of_vpath = temp;
2367 goto start;
cc413d90
MS		 2368 } else if (ret < 0) {
2369 ret = -ENODEV;
2370 goto enable_msix_failed;
2371 }
703da5a1 2372 return 0;
cc413d90
MS		 2373
2374enable_msix_failed:
2375 kfree(vdev->vxge_entries);
2376alloc_vxge_entries_failed:
2377 kfree(vdev->entries);
2378alloc_entries_failed:
2379 return ret;
703da5a1
RV		 2380}
2381
2382static int vxge_enable_msix(struct vxgedev *vdev)
2383{
2384
2385 int i, ret = 0;
703da5a1 2386 /* 0 - Tx, 1 - Rx */
b59c9457
SH		 2387 int tim_msix_id[4] = {0, 1, 0, 0};
2388
703da5a1
RV		 2389 vdev->intr_cnt = 0;
2390
2391 /* allocate msix vectors */
2392 ret = vxge_alloc_msix(vdev);
2393 if (!ret) {
703da5a1 2394 for (i = 0; i < vdev->no_of_vpath; i++) {
7adf7d1b 2395 struct vxge_vpath *vpath = &vdev->vpaths[i];
703da5a1 2396
7adf7d1b
JM		 2397 /* If fifo or ring are not enabled, the MSIX vector for
2398 * it should be set to 0.
2399 */
2400 vpath->ring.rx_vector_no = (vpath->device_id *
2401 VXGE_HW_VPATH_MSIX_ACTIVE) + 1;
703da5a1 2402
16fded7d
JM		 2403 vpath->fifo.tx_vector_no = (vpath->device_id *
2404 VXGE_HW_VPATH_MSIX_ACTIVE);
2405
7adf7d1b
JM		 2406 vxge_hw_vpath_msix_set(vpath->handle, tim_msix_id,
2407 VXGE_ALARM_MSIX_ID);
703da5a1
RV		 2408 }
2409 }
2410
2411 return ret;
2412}
2413
2414static void vxge_rem_msix_isr(struct vxgedev *vdev)
2415{
2416 int intr_cnt;
2417
b59c9457 2418 for (intr_cnt = 0; intr_cnt < (vdev->no_of_vpath * 2 + 1);
703da5a1
RV		 2419 intr_cnt++) {
2420 if (vdev->vxge_entries[intr_cnt].in_use) {
2421 synchronize_irq(vdev->entries[intr_cnt].vector);
2422 free_irq(vdev->entries[intr_cnt].vector,
2423 vdev->vxge_entries[intr_cnt].arg);
2424 vdev->vxge_entries[intr_cnt].in_use = 0;
2425 }
2426 }
2427
2428 kfree(vdev->entries);
2429 kfree(vdev->vxge_entries);
2430 vdev->entries = NULL;
2431 vdev->vxge_entries = NULL;
2432
2433 if (vdev->config.intr_type == MSI_X)
2434 pci_disable_msix(vdev->pdev);
2435}
2436#endif
2437
2438static void vxge_rem_isr(struct vxgedev *vdev)
2439{
2c91308f 2440 struct __vxge_hw_device *hldev;
d8ee7071 2441 hldev = pci_get_drvdata(vdev->pdev);
703da5a1
RV		 2442
2443#ifdef CONFIG_PCI_MSI
2444 if (vdev->config.intr_type == MSI_X) {
2445 vxge_rem_msix_isr(vdev);
2446 } else
2447#endif
2448 if (vdev->config.intr_type == INTA) {
2449 synchronize_irq(vdev->pdev->irq);
a5d165b5 2450 free_irq(vdev->pdev->irq, vdev);
703da5a1
RV		 2451 }
2452}
2453
2454static int vxge_add_isr(struct vxgedev *vdev)
2455{
2456 int ret = 0;
703da5a1
RV		 2457#ifdef CONFIG_PCI_MSI
2458 int vp_idx = 0, intr_idx = 0, intr_cnt = 0, msix_idx = 0, irq_req = 0;
703da5a1
RV		 2459 int pci_fun = PCI_FUNC(vdev->pdev->devfn);
2460
2461 if (vdev->config.intr_type == MSI_X)
2462 ret = vxge_enable_msix(vdev);
2463
2464 if (ret) {
2465 vxge_debug_init(VXGE_ERR,
2466 "%s: Enabling MSI-X Failed", VXGE_DRIVER_NAME);
eb5f10c2
SH		 2467 vxge_debug_init(VXGE_ERR,
2468 "%s: Defaulting to INTA", VXGE_DRIVER_NAME);
2469 vdev->config.intr_type = INTA;
703da5a1
RV		 2470 }
2471
2472 if (vdev->config.intr_type == MSI_X) {
2473 for (intr_idx = 0;
2474 intr_idx < (vdev->no_of_vpath *
2475 VXGE_HW_VPATH_MSIX_ACTIVE); intr_idx++) {
2476
2477 msix_idx = intr_idx % VXGE_HW_VPATH_MSIX_ACTIVE;
2478 irq_req = 0;
2479
2480 switch (msix_idx) {
2481 case 0:
2482 snprintf(vdev->desc[intr_cnt], VXGE_INTR_STRLEN,
b59c9457
SH		 2483 "%s:vxge:MSI-X %d - Tx - fn:%d vpath:%d",
2484 vdev->ndev->name,
2485 vdev->entries[intr_cnt].entry,
2486 pci_fun, vp_idx);
703da5a1
RV		 2487 ret = request_irq(
2488 vdev->entries[intr_cnt].vector,
2489 vxge_tx_msix_handle, 0,
2490 vdev->desc[intr_cnt],
2491 &vdev->vpaths[vp_idx].fifo);
2492 vdev->vxge_entries[intr_cnt].arg =
2493 &vdev->vpaths[vp_idx].fifo;
2494 irq_req = 1;
2495 break;
2496 case 1:
2497 snprintf(vdev->desc[intr_cnt], VXGE_INTR_STRLEN,
b59c9457
SH		 2498 "%s:vxge:MSI-X %d - Rx - fn:%d vpath:%d",
2499 vdev->ndev->name,
2500 vdev->entries[intr_cnt].entry,
2501 pci_fun, vp_idx);
703da5a1
RV		 2502 ret = request_irq(
2503 vdev->entries[intr_cnt].vector,
2504 vxge_rx_msix_napi_handle,
2505 0,
2506 vdev->desc[intr_cnt],
2507 &vdev->vpaths[vp_idx].ring);
2508 vdev->vxge_entries[intr_cnt].arg =
2509 &vdev->vpaths[vp_idx].ring;
2510 irq_req = 1;
2511 break;
2512 }
2513
2514 if (ret) {
2515 vxge_debug_init(VXGE_ERR,
2516 "%s: MSIX - %d Registration failed",
2517 vdev->ndev->name, intr_cnt);
2518 vxge_rem_msix_isr(vdev);
eb5f10c2
SH		 2519 vdev->config.intr_type = INTA;
2520 vxge_debug_init(VXGE_ERR,
2521 "%s: Defaulting to INTA"
2522 , vdev->ndev->name);
703da5a1 2523 goto INTA_MODE;
703da5a1
RV		 2524 }
2525
2526 if (irq_req) {
2527 /* We requested for this msix interrupt */
2528 vdev->vxge_entries[intr_cnt].in_use = 1;
b59c9457
SH		 2529 msix_idx += vdev->vpaths[vp_idx].device_id *
2530 VXGE_HW_VPATH_MSIX_ACTIVE;
703da5a1
RV		 2531 vxge_hw_vpath_msix_unmask(
2532 vdev->vpaths[vp_idx].handle,
b59c9457 2533 msix_idx);
703da5a1
RV		 2534 intr_cnt++;
2535 }
2536
2537 /* Point to next vpath handler */
8e95a202
JP		 2538 if (((intr_idx + 1) % VXGE_HW_VPATH_MSIX_ACTIVE == 0) &&
2539 (vp_idx < (vdev->no_of_vpath - 1)))
2540 vp_idx++;
703da5a1
RV		 2541 }
2542
b59c9457 2543 intr_cnt = vdev->no_of_vpath * 2;
703da5a1 2544 snprintf(vdev->desc[intr_cnt], VXGE_INTR_STRLEN,
b59c9457
SH		 2545 "%s:vxge:MSI-X %d - Alarm - fn:%d",
2546 vdev->ndev->name,
2547 vdev->entries[intr_cnt].entry,
2548 pci_fun);
703da5a1
RV		 2549 /* For Alarm interrupts */
2550 ret = request_irq(vdev->entries[intr_cnt].vector,
2551 vxge_alarm_msix_handle, 0,
2552 vdev->desc[intr_cnt],
b59c9457 2553 &vdev->vpaths[0]);
703da5a1
RV		 2554 if (ret) {
2555 vxge_debug_init(VXGE_ERR,
2556 "%s: MSIX - %d Registration failed",
2557 vdev->ndev->name, intr_cnt);
2558 vxge_rem_msix_isr(vdev);
eb5f10c2
SH		 2559 vdev->config.intr_type = INTA;
2560 vxge_debug_init(VXGE_ERR,
2561 "%s: Defaulting to INTA",
2562 vdev->ndev->name);
703da5a1 2563 goto INTA_MODE;
703da5a1
RV		 2564 }
2565
b59c9457
SH		 2566 msix_idx = (vdev->vpaths[0].handle->vpath->vp_id *
2567 VXGE_HW_VPATH_MSIX_ACTIVE) + VXGE_ALARM_MSIX_ID;
703da5a1 2568 vxge_hw_vpath_msix_unmask(vdev->vpaths[vp_idx].handle,
b59c9457 2569 msix_idx);
703da5a1 2570 vdev->vxge_entries[intr_cnt].in_use = 1;
b59c9457 2571 vdev->vxge_entries[intr_cnt].arg = &vdev->vpaths[0];
703da5a1
RV		 2572 }
2573INTA_MODE:
2574#endif
703da5a1
RV		 2575
2576 if (vdev->config.intr_type == INTA) {
b59c9457
SH		 2577 snprintf(vdev->desc[0], VXGE_INTR_STRLEN,
2578 "%s:vxge:INTA", vdev->ndev->name);
eb5f10c2
SH		 2579 vxge_hw_device_set_intr_type(vdev->devh,
2580 VXGE_HW_INTR_MODE_IRQLINE);
16fded7d
JM		 2581
2582 vxge_hw_vpath_tti_ci_set(vdev->vpaths[0].fifo.handle);
2583
703da5a1
RV		 2584 ret = request_irq((int) vdev->pdev->irq,
2585 vxge_isr_napi,
a5d165b5 2586 IRQF_SHARED, vdev->desc[0], vdev);
703da5a1
RV		 2587 if (ret) {
2588 vxge_debug_init(VXGE_ERR,
2589 "%s %s-%d: ISR registration failed",
2590 VXGE_DRIVER_NAME, "IRQ", vdev->pdev->irq);
2591 return -ENODEV;
2592 }
2593 vxge_debug_init(VXGE_TRACE,
2594 "new %s-%d line allocated",
2595 "IRQ", vdev->pdev->irq);
2596 }
2597
2598 return VXGE_HW_OK;
2599}
2600
2601static void vxge_poll_vp_reset(unsigned long data)
2602{
2603 struct vxgedev *vdev = (struct vxgedev *)data;
2604 int i, j = 0;
2605
2606 for (i = 0; i < vdev->no_of_vpath; i++) {
2607 if (test_bit(i, &vdev->vp_reset)) {
2608 vxge_reset_vpath(vdev, i);
2609 j++;
2610 }
2611 }
2612 if (j && (vdev->config.intr_type != MSI_X)) {
2613 vxge_hw_device_unmask_all(vdev->devh);
2614 vxge_hw_device_flush_io(vdev->devh);
2615 }
2616
2617 mod_timer(&vdev->vp_reset_timer, jiffies + HZ / 2);
2618}
2619
2620static void vxge_poll_vp_lockup(unsigned long data)
2621{
2622 struct vxgedev *vdev = (struct vxgedev *)data;
703da5a1 2623 enum vxge_hw_status status = VXGE_HW_OK;
7adf7d1b
JM		 2624 struct vxge_vpath *vpath;
2625 struct vxge_ring *ring;
2626 int i;
62ea0557 2627 unsigned long rx_frms;
703da5a1
RV		 2628
2629 for (i = 0; i < vdev->no_of_vpath; i++) {
2630 ring = &vdev->vpaths[i].ring;
62ea0557 2631
2632 /* Truncated to machine word size number of frames */
2633 rx_frms = ACCESS_ONCE(ring->stats.rx_frms);
2634
703da5a1 2635 /* Did this vpath received any packets */
62ea0557 2636 if (ring->stats.prev_rx_frms == rx_frms) {
703da5a1
RV		 2637 status = vxge_hw_vpath_check_leak(ring->handle);
2638
2639 /* Did it received any packets last time */
2640 if ((VXGE_HW_FAIL == status) &&
2641 (VXGE_HW_FAIL == ring->last_status)) {
2642
2643 /* schedule vpath reset */
2644 if (!test_and_set_bit(i, &vdev->vp_reset)) {
7adf7d1b 2645 vpath = &vdev->vpaths[i];
703da5a1
RV		 2646
2647 /* disable interrupts for this vpath */
2648 vxge_vpath_intr_disable(vdev, i);
2649
2650 /* stop the queue for this vpath */
98f45da2 2651 netif_tx_stop_queue(vpath->fifo.txq);
703da5a1
RV		 2652 continue;
2653 }
2654 }
2655 }
62ea0557 2656 ring->stats.prev_rx_frms = rx_frms;
703da5a1
RV		 2657 ring->last_status = status;
2658 }
2659
2660 /* Check every 1 milli second */
2661 mod_timer(&vdev->vp_lockup_timer, jiffies + HZ / 1000);
2662}
2663
feb990d4
MM		 2664static u32 vxge_fix_features(struct net_device *dev, u32 features)
2665{
2666 u32 changed = dev->features ^ features;
2667
2668 /* Enabling RTH requires some of the logic in vxge_device_register and a
2669 * vpath reset. Due to these restrictions, only allow modification
2670 * while the interface is down.
2671 */
2672 if ((changed & NETIF_F_RXHASH) && netif_running(dev))
2673 features ^= NETIF_F_RXHASH;
2674
2675 return features;
2676}
2677
2678static int vxge_set_features(struct net_device *dev, u32 features)
2679{
2680 struct vxgedev *vdev = netdev_priv(dev);
2681 u32 changed = dev->features ^ features;
2682
2683 if (!(changed & NETIF_F_RXHASH))
2684 return 0;
2685
2686 /* !netif_running() ensured by vxge_fix_features() */
2687
2688 vdev->devh->config.rth_en = !!(features & NETIF_F_RXHASH);
2689 if (vxge_reset_all_vpaths(vdev) != VXGE_HW_OK) {
2690 dev->features = features ^ NETIF_F_RXHASH;
2691 vdev->devh->config.rth_en = !!(dev->features & NETIF_F_RXHASH);
2692 return -EIO;
2693 }
2694
2695 return 0;
2696}
2697
703da5a1
RV		 2698/**
2699 * vxge_open
2700 * @dev: pointer to the device structure.
2701 *
2702 * This function is the open entry point of the driver. It mainly calls a
2703 * function to allocate Rx buffers and inserts them into the buffer
2704 * descriptors and then enables the Rx part of the NIC.
2705 * Return value: '0' on success and an appropriate (-)ve integer as
2706 * defined in errno.h file on failure.
2707 */
528f7272 2708static int vxge_open(struct net_device *dev)
703da5a1
RV		 2709{
2710 enum vxge_hw_status status;
2711 struct vxgedev *vdev;
2712 struct __vxge_hw_device *hldev;
7adf7d1b 2713 struct vxge_vpath *vpath;
703da5a1
RV		 2714 int ret = 0;
2715 int i;
2716 u64 val64, function_mode;
528f7272 2717
703da5a1
RV		 2718 vxge_debug_entryexit(VXGE_TRACE,
2719 "%s: %s:%d", dev->name, __func__, __LINE__);
2720
5f54cebb 2721 vdev = netdev_priv(dev);
d8ee7071 2722 hldev = pci_get_drvdata(vdev->pdev);
703da5a1
RV		 2723 function_mode = vdev->config.device_hw_info.function_mode;
2724
2725 /* make sure you have link off by default every time Nic is
2726 * initialized */
2727 netif_carrier_off(dev);
2728
703da5a1
RV		 2729 /* Open VPATHs */
2730 status = vxge_open_vpaths(vdev);
2731 if (status != VXGE_HW_OK) {
2732 vxge_debug_init(VXGE_ERR,
2733 "%s: fatal: Vpath open failed", vdev->ndev->name);
2734 ret = -EPERM;
2735 goto out0;
2736 }
2737
2738 vdev->mtu = dev->mtu;
2739
2740 status = vxge_add_isr(vdev);
2741 if (status != VXGE_HW_OK) {
2742 vxge_debug_init(VXGE_ERR,
2743 "%s: fatal: ISR add failed", dev->name);
2744 ret = -EPERM;
2745 goto out1;
2746 }
2747
703da5a1
RV		 2748 if (vdev->config.intr_type != MSI_X) {
2749 netif_napi_add(dev, &vdev->napi, vxge_poll_inta,
2750 vdev->config.napi_weight);
2751 napi_enable(&vdev->napi);
7adf7d1b
JM		 2752 for (i = 0; i < vdev->no_of_vpath; i++) {
2753 vpath = &vdev->vpaths[i];
2754 vpath->ring.napi_p = &vdev->napi;
2755 }
703da5a1
RV		 2756 } else {
2757 for (i = 0; i < vdev->no_of_vpath; i++) {
7adf7d1b
JM		 2758 vpath = &vdev->vpaths[i];
2759 netif_napi_add(dev, &vpath->ring.napi,
703da5a1 2760 vxge_poll_msix, vdev->config.napi_weight);
7adf7d1b
JM		 2761 napi_enable(&vpath->ring.napi);
2762 vpath->ring.napi_p = &vpath->ring.napi;
703da5a1
RV		 2763 }
2764 }
2765
2766 /* configure RTH */
2767 if (vdev->config.rth_steering) {
2768 status = vxge_rth_configure(vdev);
2769 if (status != VXGE_HW_OK) {
2770 vxge_debug_init(VXGE_ERR,
2771 "%s: fatal: RTH configuration failed",
2772 dev->name);
2773 ret = -EPERM;
2774 goto out2;
2775 }
2776 }
47f01db4
JM		 2777 printk(KERN_INFO "%s: Receive Hashing Offload %s\n", dev->name,
2778 hldev->config.rth_en ? "enabled" : "disabled");
703da5a1
RV		 2779
2780 for (i = 0; i < vdev->no_of_vpath; i++) {
7adf7d1b
JM		 2781 vpath = &vdev->vpaths[i];
2782
703da5a1 2783 /* set initial mtu before enabling the device */
7adf7d1b 2784 status = vxge_hw_vpath_mtu_set(vpath->handle, vdev->mtu);
703da5a1
RV		 2785 if (status != VXGE_HW_OK) {
2786 vxge_debug_init(VXGE_ERR,
2787 "%s: fatal: can not set new MTU", dev->name);
2788 ret = -EPERM;
2789 goto out2;
2790 }
2791 }
2792
2793 VXGE_DEVICE_DEBUG_LEVEL_SET(VXGE_TRACE, VXGE_COMPONENT_LL, vdev);
2794 vxge_debug_init(vdev->level_trace,
2795 "%s: MTU is %d", vdev->ndev->name, vdev->mtu);
2796 VXGE_DEVICE_DEBUG_LEVEL_SET(VXGE_ERR, VXGE_COMPONENT_LL, vdev);
2797
7adf7d1b
JM		 2798 /* Restore the DA, VID table and also multicast and promiscuous mode
2799 * states
2800 */
2801 if (vdev->all_multi_flg) {
2802 for (i = 0; i < vdev->no_of_vpath; i++) {
2803 vpath = &vdev->vpaths[i];
2804 vxge_restore_vpath_mac_addr(vpath);
2805 vxge_restore_vpath_vid_table(vpath);
2806
2807 status = vxge_hw_vpath_mcast_enable(vpath->handle);
2808 if (status != VXGE_HW_OK)
2809 vxge_debug_init(VXGE_ERR,
2810 "%s:%d Enabling multicast failed",
2811 __func__, __LINE__);
2812 }
703da5a1
RV		 2813 }
2814
2815 /* Enable vpath to sniff all unicast/multicast traffic that not
25985edc 2816 * addressed to them. We allow promiscuous mode for PF only
703da5a1
RV		 2817 */
2818
2819 val64 = 0;
2820 for (i = 0; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++)
2821 val64 |= VXGE_HW_RXMAC_AUTHORIZE_ALL_ADDR_VP(i);
2822
2823 vxge_hw_mgmt_reg_write(vdev->devh,
2824 vxge_hw_mgmt_reg_type_mrpcim,
2825 0,
2826 (ulong)offsetof(struct vxge_hw_mrpcim_reg,
2827 rxmac_authorize_all_addr),
2828 val64);
2829
2830 vxge_hw_mgmt_reg_write(vdev->devh,
2831 vxge_hw_mgmt_reg_type_mrpcim,
2832 0,
2833 (ulong)offsetof(struct vxge_hw_mrpcim_reg,
2834 rxmac_authorize_all_vid),
2835 val64);
2836
2837 vxge_set_multicast(dev);
2838
2839 /* Enabling Bcast and mcast for all vpath */
2840 for (i = 0; i < vdev->no_of_vpath; i++) {
7adf7d1b
JM		 2841 vpath = &vdev->vpaths[i];
2842 status = vxge_hw_vpath_bcast_enable(vpath->handle);
703da5a1
RV		 2843 if (status != VXGE_HW_OK)
2844 vxge_debug_init(VXGE_ERR,
2845 "%s : Can not enable bcast for vpath "
2846 "id %d", dev->name, i);
2847 if (vdev->config.addr_learn_en) {
7adf7d1b 2848 status = vxge_hw_vpath_mcast_enable(vpath->handle);
703da5a1
RV		 2849 if (status != VXGE_HW_OK)
2850 vxge_debug_init(VXGE_ERR,
2851 "%s : Can not enable mcast for vpath "
2852 "id %d", dev->name, i);
2853 }
2854 }
2855
2856 vxge_hw_device_setpause_data(vdev->devh, 0,
2857 vdev->config.tx_pause_enable,
2858 vdev->config.rx_pause_enable);
2859
2860 if (vdev->vp_reset_timer.function == NULL)
2861 vxge_os_timer(vdev->vp_reset_timer,
2862 vxge_poll_vp_reset, vdev, (HZ/2));
2863
e7935c96
JM		 2864 /* There is no need to check for RxD leak and RxD lookup on Titan1A */
2865 if (vdev->titan1 && vdev->vp_lockup_timer.function == NULL)
2866 vxge_os_timer(vdev->vp_lockup_timer, vxge_poll_vp_lockup, vdev,
2867 HZ / 2);
703da5a1
RV		 2868
2869 set_bit(__VXGE_STATE_CARD_UP, &vdev->state);
2870
2871 smp_wmb();
2872
2873 if (vxge_hw_device_link_state_get(vdev->devh) == VXGE_HW_LINK_UP) {
2874 netif_carrier_on(vdev->ndev);
75f5e1c6 2875 netdev_notice(vdev->ndev, "Link Up\n");
703da5a1
RV		 2876 vdev->stats.link_up++;
2877 }
2878
2879 vxge_hw_device_intr_enable(vdev->devh);
2880
2881 smp_wmb();
2882
2883 for (i = 0; i < vdev->no_of_vpath; i++) {
7adf7d1b
JM		 2884 vpath = &vdev->vpaths[i];
2885
2886 vxge_hw_vpath_enable(vpath->handle);
703da5a1 2887 smp_wmb();
7adf7d1b 2888 vxge_hw_vpath_rx_doorbell_init(vpath->handle);
703da5a1
RV		 2889 }
2890
d03848e0 2891 netif_tx_start_all_queues(vdev->ndev);
16fded7d
JM		 2892
2893 /* configure CI */
2894 vxge_config_ci_for_tti_rti(vdev);
2895
703da5a1
RV		 2896 goto out0;
2897
2898out2:
2899 vxge_rem_isr(vdev);
2900
2901 /* Disable napi */
2902 if (vdev->config.intr_type != MSI_X)
2903 napi_disable(&vdev->napi);
2904 else {
2905 for (i = 0; i < vdev->no_of_vpath; i++)
2906 napi_disable(&vdev->vpaths[i].ring.napi);
2907 }
2908
2909out1:
2910 vxge_close_vpaths(vdev, 0);
2911out0:
2912 vxge_debug_entryexit(VXGE_TRACE,
2913 "%s: %s:%d Exiting...",
2914 dev->name, __func__, __LINE__);
2915 return ret;
2916}
2917
25985edc 2918/* Loop through the mac address list and delete all the entries */
42821a5b 2919static void vxge_free_mac_add_list(struct vxge_vpath *vpath)
703da5a1
RV		 2920{
2921
2922 struct list_head *entry, *next;
2923 if (list_empty(&vpath->mac_addr_list))
2924 return;
2925
2926 list_for_each_safe(entry, next, &vpath->mac_addr_list) {
2927 list_del(entry);
2928 kfree((struct vxge_mac_addrs *)entry);
2929 }
2930}
2931
2932static void vxge_napi_del_all(struct vxgedev *vdev)
2933{
2934 int i;
2935 if (vdev->config.intr_type != MSI_X)
2936 netif_napi_del(&vdev->napi);
2937 else {
2938 for (i = 0; i < vdev->no_of_vpath; i++)
2939 netif_napi_del(&vdev->vpaths[i].ring.napi);
2940 }
703da5a1
RV		 2941}
2942
42821a5b 2943static int do_vxge_close(struct net_device *dev, int do_io)
703da5a1
RV		 2944{
2945 enum vxge_hw_status status;
2946 struct vxgedev *vdev;
2947 struct __vxge_hw_device *hldev;
2948 int i;
2949 u64 val64, vpath_vector;
2950 vxge_debug_entryexit(VXGE_TRACE, "%s: %s:%d",
2951 dev->name, __func__, __LINE__);
2952
5f54cebb 2953 vdev = netdev_priv(dev);
d8ee7071 2954 hldev = pci_get_drvdata(vdev->pdev);
703da5a1 2955
bd9ee680
SH		 2956 if (unlikely(!is_vxge_card_up(vdev)))
2957 return 0;
2958
703da5a1
RV		 2959 /* If vxge_handle_crit_err task is executing,
2960 * wait till it completes. */
2961 while (test_and_set_bit(__VXGE_STATE_RESET_CARD, &vdev->state))
2962 msleep(50);
2963
703da5a1
RV		 2964 if (do_io) {
2965 /* Put the vpath back in normal mode */
2966 vpath_vector = vxge_mBIT(vdev->vpaths[0].device_id);
2967 status = vxge_hw_mgmt_reg_read(vdev->devh,
2968 vxge_hw_mgmt_reg_type_mrpcim,
2969 0,
2970 (ulong)offsetof(
2971 struct vxge_hw_mrpcim_reg,
2972 rts_mgr_cbasin_cfg),
2973 &val64);
703da5a1
RV		 2974 if (status == VXGE_HW_OK) {
2975 val64 &= ~vpath_vector;
2976 status = vxge_hw_mgmt_reg_write(vdev->devh,
2977 vxge_hw_mgmt_reg_type_mrpcim,
2978 0,
2979 (ulong)offsetof(
2980 struct vxge_hw_mrpcim_reg,
2981 rts_mgr_cbasin_cfg),
2982 val64);
2983 }
2984
25985edc 2985 /* Remove the function 0 from promiscuous mode */
703da5a1
RV		 2986 vxge_hw_mgmt_reg_write(vdev->devh,
2987 vxge_hw_mgmt_reg_type_mrpcim,
2988 0,
2989 (ulong)offsetof(struct vxge_hw_mrpcim_reg,
2990 rxmac_authorize_all_addr),
2991 0);
2992
2993 vxge_hw_mgmt_reg_write(vdev->devh,
2994 vxge_hw_mgmt_reg_type_mrpcim,
2995 0,
2996 (ulong)offsetof(struct vxge_hw_mrpcim_reg,
2997 rxmac_authorize_all_vid),
2998 0);
2999
3000 smp_wmb();
3001 }
e7935c96
JM		 3002
3003 if (vdev->titan1)
3004 del_timer_sync(&vdev->vp_lockup_timer);
703da5a1
RV		 3005
3006 del_timer_sync(&vdev->vp_reset_timer);
3007
4d2a5b40
JM		 3008 if (do_io)
3009 vxge_hw_device_wait_receive_idle(hldev);
3010
3011 clear_bit(__VXGE_STATE_CARD_UP, &vdev->state);
3012
703da5a1
RV		 3013 /* Disable napi */
3014 if (vdev->config.intr_type != MSI_X)
3015 napi_disable(&vdev->napi);
3016 else {
3017 for (i = 0; i < vdev->no_of_vpath; i++)
3018 napi_disable(&vdev->vpaths[i].ring.napi);
3019 }
3020
3021 netif_carrier_off(vdev->ndev);
75f5e1c6 3022 netdev_notice(vdev->ndev, "Link Down\n");
d03848e0 3023 netif_tx_stop_all_queues(vdev->ndev);
703da5a1
RV		 3024
3025 /* Note that at this point xmit() is stopped by upper layer */
3026 if (do_io)
3027 vxge_hw_device_intr_disable(vdev->devh);
3028
703da5a1
RV		 3029 vxge_rem_isr(vdev);
3030
3031 vxge_napi_del_all(vdev);
3032
3033 if (do_io)
3034 vxge_reset_all_vpaths(vdev);
3035
3036 vxge_close_vpaths(vdev, 0);
3037
3038 vxge_debug_entryexit(VXGE_TRACE,
3039 "%s: %s:%d Exiting...", dev->name, __func__, __LINE__);
3040
703da5a1
RV		 3041 clear_bit(__VXGE_STATE_RESET_CARD, &vdev->state);
3042
3043 return 0;
3044}
3045
3046/**
3047 * vxge_close
3048 * @dev: device pointer.
3049 *
3050 * This is the stop entry point of the driver. It needs to undo exactly
3051 * whatever was done by the open entry point, thus it's usually referred to
3052 * as the close function.Among other things this function mainly stops the
3053 * Rx side of the NIC and frees all the Rx buffers in the Rx rings.
3054 * Return value: '0' on success and an appropriate (-)ve integer as
3055 * defined in errno.h file on failure.
3056 */
528f7272 3057static int vxge_close(struct net_device *dev)
703da5a1
RV		 3058{
3059 do_vxge_close(dev, 1);
3060 return 0;
3061}
3062
3063/**
3064 * vxge_change_mtu
3065 * @dev: net device pointer.
3066 * @new_mtu :the new MTU size for the device.
3067 *
3068 * A driver entry point to change MTU size for the device. Before changing
3069 * the MTU the device must be stopped.
3070 */
3071static int vxge_change_mtu(struct net_device *dev, int new_mtu)
3072{
3073 struct vxgedev *vdev = netdev_priv(dev);
3074
3075 vxge_debug_entryexit(vdev->level_trace,
3076 "%s:%d", __func__, __LINE__);
3077 if ((new_mtu < VXGE_HW_MIN_MTU) || (new_mtu > VXGE_HW_MAX_MTU)) {
3078 vxge_debug_init(vdev->level_err,
3079 "%s: mtu size is invalid", dev->name);
3080 return -EPERM;
3081 }
3082
3083 /* check if device is down already */
3084 if (unlikely(!is_vxge_card_up(vdev))) {
3085 /* just store new value, will use later on open() */
3086 dev->mtu = new_mtu;
3087 vxge_debug_init(vdev->level_err,
3088 "%s", "device is down on MTU change");
3089 return 0;
3090 }
3091
3092 vxge_debug_init(vdev->level_trace,
3093 "trying to apply new MTU %d", new_mtu);
3094
3095 if (vxge_close(dev))
3096 return -EIO;
3097
3098 dev->mtu = new_mtu;
3099 vdev->mtu = new_mtu;
3100
3101 if (vxge_open(dev))
3102 return -EIO;
3103
3104 vxge_debug_init(vdev->level_trace,
3105 "%s: MTU changed to %d", vdev->ndev->name, new_mtu);
3106
3107 vxge_debug_entryexit(vdev->level_trace,
3108 "%s:%d Exiting...", __func__, __LINE__);
3109
3110 return 0;
3111}
3112
3113/**
dd57f970 3114 * vxge_get_stats64
703da5a1 3115 * @dev: pointer to the device structure
dd57f970 3116 * @stats: pointer to struct rtnl_link_stats64
703da5a1 3117 *
703da5a1 3118 */
dd57f970
ED		 3119static struct rtnl_link_stats64 *
3120vxge_get_stats64(struct net_device *dev, struct rtnl_link_stats64 *net_stats)
703da5a1 3121{
dd57f970 3122 struct vxgedev *vdev = netdev_priv(dev);
703da5a1
RV		 3123 int k;
3124
dd57f970 3125 /* net_stats already zeroed by caller */
703da5a1 3126 for (k = 0; k < vdev->no_of_vpath; k++) {
62ea0557 3127 struct vxge_ring_stats *rxstats = &vdev->vpaths[k].ring.stats;
3128 struct vxge_fifo_stats *txstats = &vdev->vpaths[k].fifo.stats;
3129 unsigned int start;
3130 u64 packets, bytes, multicast;
3131
3132 do {
3133 start = u64_stats_fetch_begin(&rxstats->syncp);
3134
3135 packets = rxstats->rx_frms;
3136 multicast = rxstats->rx_mcast;
3137 bytes = rxstats->rx_bytes;
3138 } while (u64_stats_fetch_retry(&rxstats->syncp, start));
3139
3140 net_stats->rx_packets += packets;
3141 net_stats->rx_bytes += bytes;
3142 net_stats->multicast += multicast;
3143
3144 net_stats->rx_errors += rxstats->rx_errors;
3145 net_stats->rx_dropped += rxstats->rx_dropped;
3146
3147 do {
3148 start = u64_stats_fetch_begin(&txstats->syncp);
3149
3150 packets = txstats->tx_frms;
3151 bytes = txstats->tx_bytes;
3152 } while (u64_stats_fetch_retry(&txstats->syncp, start));
3153
3154 net_stats->tx_packets += packets;
3155 net_stats->tx_bytes += bytes;
3156 net_stats->tx_errors += txstats->tx_errors;
703da5a1
RV		 3157 }
3158
3159 return net_stats;
3160}
3161
cd883a79 3162static enum vxge_hw_status vxge_timestamp_config(struct __vxge_hw_device *devh)
b81b3733
JM		 3163{
3164 enum vxge_hw_status status;
3165 u64 val64;
3166
3167 /* Timestamp is passed to the driver via the FCS, therefore we
3168 * must disable the FCS stripping by the adapter. Since this is
3169 * required for the driver to load (due to a hardware bug),
3170 * there is no need to do anything special here.
3171 */
cd883a79
JM		 3172 val64 = VXGE_HW_XMAC_TIMESTAMP_EN |
3173 VXGE_HW_XMAC_TIMESTAMP_USE_LINK_ID(0) |
3174 VXGE_HW_XMAC_TIMESTAMP_INTERVAL(0);
b81b3733 3175
cd883a79 3176 status = vxge_hw_mgmt_reg_write(devh,
b81b3733
JM		 3177 vxge_hw_mgmt_reg_type_mrpcim,
3178 0,
3179 offsetof(struct vxge_hw_mrpcim_reg,
3180 xmac_timestamp),
3181 val64);
cd883a79
JM		 3182 vxge_hw_device_flush_io(devh);
3183 devh->config.hwts_en = VXGE_HW_HWTS_ENABLE;
b81b3733
JM		 3184 return status;
3185}
3186
3187static int vxge_hwtstamp_ioctl(struct vxgedev *vdev, void __user *data)
3188{
3189 struct hwtstamp_config config;
b81b3733
JM		 3190 int i;
3191
3192 if (copy_from_user(&config, data, sizeof(config)))
3193 return -EFAULT;
3194
3195 /* reserved for future extensions */
3196 if (config.flags)
3197 return -EINVAL;
3198
3199 /* Transmit HW Timestamp not supported */
3200 switch (config.tx_type) {
3201 case HWTSTAMP_TX_OFF:
3202 break;
3203 case HWTSTAMP_TX_ON:
3204 default:
3205 return -ERANGE;
3206 }
3207
3208 switch (config.rx_filter) {
3209 case HWTSTAMP_FILTER_NONE:
b81b3733
JM		 3210 vdev->rx_hwts = 0;
3211 config.rx_filter = HWTSTAMP_FILTER_NONE;
3212 break;
3213
3214 case HWTSTAMP_FILTER_ALL:
3215 case HWTSTAMP_FILTER_SOME:
3216 case HWTSTAMP_FILTER_PTP_V1_L4_EVENT:
3217 case HWTSTAMP_FILTER_PTP_V1_L4_SYNC:
3218 case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ:
3219 case HWTSTAMP_FILTER_PTP_V2_L4_EVENT:
3220 case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:
3221 case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:
3222 case HWTSTAMP_FILTER_PTP_V2_L2_EVENT:
3223 case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:
3224 case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ:
3225 case HWTSTAMP_FILTER_PTP_V2_EVENT:
3226 case HWTSTAMP_FILTER_PTP_V2_SYNC:
3227 case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:
cd883a79 3228 if (vdev->devh->config.hwts_en != VXGE_HW_HWTS_ENABLE)
b81b3733
JM		 3229 return -EFAULT;
3230
3231 vdev->rx_hwts = 1;
3232 config.rx_filter = HWTSTAMP_FILTER_ALL;
3233 break;
3234
3235 default:
3236 return -ERANGE;
3237 }
3238
3239 for (i = 0; i < vdev->no_of_vpath; i++)
3240 vdev->vpaths[i].ring.rx_hwts = vdev->rx_hwts;
3241
3242 if (copy_to_user(data, &config, sizeof(config)))
3243 return -EFAULT;
3244
3245 return 0;
3246}
3247
703da5a1
RV		 3248/**
3249 * vxge_ioctl
3250 * @dev: Device pointer.
3251 * @ifr: An IOCTL specific structure, that can contain a pointer to
3252 * a proprietary structure used to pass information to the driver.
3253 * @cmd: This is used to distinguish between the different commands that
3254 * can be passed to the IOCTL functions.
3255 *
3256 * Entry point for the Ioctl.
3257 */
3258static int vxge_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
3259{
b81b3733
JM		 3260 struct vxgedev *vdev = netdev_priv(dev);
3261 int ret;
3262
3263 switch (cmd) {
3264 case SIOCSHWTSTAMP:
3265 ret = vxge_hwtstamp_ioctl(vdev, rq->ifr_data);
3266 if (ret)
3267 return ret;
3268 break;
3269 default:
3270 return -EOPNOTSUPP;
3271 }
3272
3273 return 0;
703da5a1
RV		 3274}
3275
3276/**
3277 * vxge_tx_watchdog
3278 * @dev: pointer to net device structure
3279 *
3280 * Watchdog for transmit side.
3281 * This function is triggered if the Tx Queue is stopped
3282 * for a pre-defined amount of time when the Interface is still up.
3283 */
2e41f644 3284static void vxge_tx_watchdog(struct net_device *dev)
703da5a1
RV		 3285{
3286 struct vxgedev *vdev;
3287
3288 vxge_debug_entryexit(VXGE_TRACE, "%s:%d", __func__, __LINE__);
3289
5f54cebb 3290 vdev = netdev_priv(dev);
703da5a1
RV		 3291
3292 vdev->cric_err_event = VXGE_HW_EVENT_RESET_START;
3293
2e41f644 3294 schedule_work(&vdev->reset_task);
703da5a1
RV		 3295 vxge_debug_entryexit(VXGE_TRACE,
3296 "%s:%d Exiting...", __func__, __LINE__);
3297}
3298
703da5a1
RV		 3299/**
3300 * vxge_vlan_rx_add_vid
3301 * @dev: net device pointer.
3302 * @vid: vid
3303 *
3304 * Add the vlan id to the devices vlan id table
3305 */
3306static void
3307vxge_vlan_rx_add_vid(struct net_device *dev, unsigned short vid)
3308{
53515734 3309 struct vxgedev *vdev = netdev_priv(dev);
703da5a1
RV		 3310 struct vxge_vpath *vpath;
3311 int vp_id;
3312
703da5a1
RV		 3313 /* Add these vlan to the vid table */
3314 for (vp_id = 0; vp_id < vdev->no_of_vpath; vp_id++) {
3315 vpath = &vdev->vpaths[vp_id];
3316 if (!vpath->is_open)
3317 continue;
3318 vxge_hw_vpath_vid_add(vpath->handle, vid);
3319 }
53515734 3320 set_bit(vid, vdev->active_vlans);
703da5a1
RV		 3321}
3322
3323/**
3324 * vxge_vlan_rx_add_vid
3325 * @dev: net device pointer.
3326 * @vid: vid
3327 *
3328 * Remove the vlan id from the device's vlan id table
3329 */
3330static void
3331vxge_vlan_rx_kill_vid(struct net_device *dev, unsigned short vid)
3332{
53515734 3333 struct vxgedev *vdev = netdev_priv(dev);
703da5a1
RV		 3334 struct vxge_vpath *vpath;
3335 int vp_id;
3336
3337 vxge_debug_entryexit(VXGE_TRACE, "%s:%d", __func__, __LINE__);
3338
703da5a1
RV		 3339 /* Delete this vlan from the vid table */
3340 for (vp_id = 0; vp_id < vdev->no_of_vpath; vp_id++) {
3341 vpath = &vdev->vpaths[vp_id];
3342 if (!vpath->is_open)
3343 continue;
3344 vxge_hw_vpath_vid_delete(vpath->handle, vid);
3345 }
3346 vxge_debug_entryexit(VXGE_TRACE,
3347 "%s:%d Exiting...", __func__, __LINE__);
53515734 3348 clear_bit(vid, vdev->active_vlans);
703da5a1
RV		 3349}
3350
3351static const struct net_device_ops vxge_netdev_ops = {
3352 .ndo_open = vxge_open,
3353 .ndo_stop = vxge_close,
dd57f970 3354 .ndo_get_stats64 = vxge_get_stats64,
703da5a1
RV		 3355 .ndo_start_xmit = vxge_xmit,
3356 .ndo_validate_addr = eth_validate_addr,
afc4b13d 3357 .ndo_set_rx_mode = vxge_set_multicast,
703da5a1 3358 .ndo_do_ioctl = vxge_ioctl,
703da5a1
RV		 3359 .ndo_set_mac_address = vxge_set_mac_addr,
3360 .ndo_change_mtu = vxge_change_mtu,
feb990d4
MM		 3361 .ndo_fix_features = vxge_fix_features,
3362 .ndo_set_features = vxge_set_features,
703da5a1
RV		 3363 .ndo_vlan_rx_kill_vid = vxge_vlan_rx_kill_vid,
3364 .ndo_vlan_rx_add_vid = vxge_vlan_rx_add_vid,
703da5a1
RV		 3365 .ndo_tx_timeout = vxge_tx_watchdog,
3366#ifdef CONFIG_NET_POLL_CONTROLLER
3367 .ndo_poll_controller = vxge_netpoll,
3368#endif
3369};
3370
42821a5b 3371static int __devinit vxge_device_register(struct __vxge_hw_device *hldev,
3372 struct vxge_config *config,
3373 int high_dma, int no_of_vpath,
3374 struct vxgedev **vdev_out)
703da5a1
RV		 3375{
3376 struct net_device *ndev;
3377 enum vxge_hw_status status = VXGE_HW_OK;
3378 struct vxgedev *vdev;
98f45da2 3379 int ret = 0, no_of_queue = 1;
703da5a1
RV		 3380 u64 stat;
3381
3382 *vdev_out = NULL;
d03848e0 3383 if (config->tx_steering_type)
703da5a1
RV		 3384 no_of_queue = no_of_vpath;
3385
3386 ndev = alloc_etherdev_mq(sizeof(struct vxgedev),
3387 no_of_queue);
3388 if (ndev == NULL) {
3389 vxge_debug_init(
3390 vxge_hw_device_trace_level_get(hldev),
3391 "%s : device allocation failed", __func__);
3392 ret = -ENODEV;
3393 goto _out0;
3394 }
3395
3396 vxge_debug_entryexit(
3397 vxge_hw_device_trace_level_get(hldev),
3398 "%s: %s:%d Entering...",
3399 ndev->name, __func__, __LINE__);
3400
3401 vdev = netdev_priv(ndev);
3402 memset(vdev, 0, sizeof(struct vxgedev));
3403
3404 vdev->ndev = ndev;
3405 vdev->devh = hldev;
3406 vdev->pdev = hldev->pdev;
3407 memcpy(&vdev->config, config, sizeof(struct vxge_config));
b81b3733 3408 vdev->rx_hwts = 0;
ff938e43 3409 vdev->titan1 = (vdev->pdev->revision == VXGE_HW_TITAN1_PCI_REVISION);
e7935c96 3410
703da5a1
RV		 3411 SET_NETDEV_DEV(ndev, &vdev->pdev->dev);
3412
feb990d4
MM		 3413 ndev->hw_features = NETIF_F_RXCSUM | NETIF_F_SG |
3414 NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
3415 NETIF_F_TSO | NETIF_F_TSO6 |
3416 NETIF_F_HW_VLAN_TX;
3417 if (vdev->config.rth_steering != NO_STEERING)
3418 ndev->hw_features |= NETIF_F_RXHASH;
3419
3420 ndev->features |= ndev->hw_features |
3421 NETIF_F_HW_VLAN_RX | NETIF_F_HW_VLAN_FILTER;
3422
703da5a1
RV		 3423 /* Driver entry points */
3424 ndev->irq = vdev->pdev->irq;
3425 ndev->base_addr = (unsigned long) hldev->bar0;
3426
3427 ndev->netdev_ops = &vxge_netdev_ops;
3428
3429 ndev->watchdog_timeo = VXGE_LL_WATCH_DOG_TIMEOUT;
2e41f644 3430 INIT_WORK(&vdev->reset_task, vxge_reset);
703da5a1 3431
42821a5b 3432 vxge_initialize_ethtool_ops(ndev);
703da5a1
RV		 3433
3434 /* Allocate memory for vpath */
3435 vdev->vpaths = kzalloc((sizeof(struct vxge_vpath)) *
3436 no_of_vpath, GFP_KERNEL);
3437 if (!vdev->vpaths) {
3438 vxge_debug_init(VXGE_ERR,
3439 "%s: vpath memory allocation failed",
3440 vdev->ndev->name);
6cca2003 3441 ret = -ENOMEM;
703da5a1
RV		 3442 goto _out1;
3443 }
3444
703da5a1
RV		 3445 vxge_debug_init(vxge_hw_device_trace_level_get(hldev),
3446 "%s : checksuming enabled", __func__);
3447
3448 if (high_dma) {
3449 ndev->features |= NETIF_F_HIGHDMA;
3450 vxge_debug_init(vxge_hw_device_trace_level_get(hldev),
3451 "%s : using High DMA", __func__);
3452 }
3453
6cca2003
JM		 3454 ret = register_netdev(ndev);
3455 if (ret) {
703da5a1
RV		 3456 vxge_debug_init(vxge_hw_device_trace_level_get(hldev),
3457 "%s: %s : device registration failed!",
3458 ndev->name, __func__);
703da5a1
RV		 3459 goto _out2;
3460 }
3461
3462 /* Set the factory defined MAC address initially */
3463 ndev->addr_len = ETH_ALEN;
3464
3465 /* Make Link state as off at this point, when the Link change
3466 * interrupt comes the state will be automatically changed to
3467 * the right state.
3468 */
3469 netif_carrier_off(ndev);
3470
3471 vxge_debug_init(vxge_hw_device_trace_level_get(hldev),
3472 "%s: Ethernet device registered",
3473 ndev->name);
3474
e8ac1756 3475 hldev->ndev = ndev;
703da5a1
RV		 3476 *vdev_out = vdev;
3477
3478 /* Resetting the Device stats */
3479 status = vxge_hw_mrpcim_stats_access(
3480 hldev,
3481 VXGE_HW_STATS_OP_CLEAR_ALL_STATS,
3482 0,
3483 0,
3484 &stat);
3485
3486 if (status == VXGE_HW_ERR_PRIVILAGED_OPEARATION)
3487 vxge_debug_init(
3488 vxge_hw_device_trace_level_get(hldev),
3489 "%s: device stats clear returns"
3490 "VXGE_HW_ERR_PRIVILAGED_OPEARATION", ndev->name);
3491
3492 vxge_debug_entryexit(vxge_hw_device_trace_level_get(hldev),
3493 "%s: %s:%d Exiting...",
3494 ndev->name, __func__, __LINE__);
3495
3496 return ret;
3497_out2:
3498 kfree(vdev->vpaths);
3499_out1:
3500 free_netdev(ndev);
3501_out0:
3502 return ret;
3503}
3504
3505/*
3506 * vxge_device_unregister
3507 *
3508 * This function will unregister and free network device
3509 */
2c91308f 3510static void vxge_device_unregister(struct __vxge_hw_device *hldev)
703da5a1
RV		 3511{
3512 struct vxgedev *vdev;
3513 struct net_device *dev;
3514 char buf[IFNAMSIZ];
703da5a1
RV		 3515
3516 dev = hldev->ndev;
3517 vdev = netdev_priv(dev);
703da5a1 3518
2c91308f
JM		 3519 vxge_debug_entryexit(vdev->level_trace, "%s: %s:%d", vdev->ndev->name,
3520 __func__, __LINE__);
3521
ead5d238 3522 strncpy(buf, dev->name, IFNAMSIZ);
703da5a1 3523
ba27d85c
TH		 3524 flush_work_sync(&vdev->reset_task);
3525
703da5a1
RV		 3526 /* in 2.6 will call stop() if device is up */
3527 unregister_netdev(dev);
3528
6cca2003
JM		 3529 kfree(vdev->vpaths);
3530
3531 /* we are safe to free it now */
3532 free_netdev(dev);
3533
2c91308f
JM		 3534 vxge_debug_init(vdev->level_trace, "%s: ethernet device unregistered",
3535 buf);
3536 vxge_debug_entryexit(vdev->level_trace, "%s: %s:%d Exiting...", buf,
3537 __func__, __LINE__);
703da5a1
RV		 3538}
3539
3540/*
3541 * vxge_callback_crit_err
3542 *
3543 * This function is called by the alarm handler in interrupt context.
3544 * Driver must analyze it based on the event type.
3545 */
3546static void
3547vxge_callback_crit_err(struct __vxge_hw_device *hldev,
3548 enum vxge_hw_event type, u64 vp_id)
3549{
3550 struct net_device *dev = hldev->ndev;
5f54cebb 3551 struct vxgedev *vdev = netdev_priv(dev);
98f45da2 3552 struct vxge_vpath *vpath = NULL;
703da5a1
RV		 3553 int vpath_idx;
3554
3555 vxge_debug_entryexit(vdev->level_trace,
3556 "%s: %s:%d", vdev->ndev->name, __func__, __LINE__);
3557
3558 /* Note: This event type should be used for device wide
3559 * indications only - Serious errors, Slot freeze and critical errors
3560 */
3561 vdev->cric_err_event = type;
3562
98f45da2
JM		 3563 for (vpath_idx = 0; vpath_idx < vdev->no_of_vpath; vpath_idx++) {
3564 vpath = &vdev->vpaths[vpath_idx];
3565 if (vpath->device_id == vp_id)
703da5a1 3566 break;
98f45da2 3567 }
703da5a1
RV		 3568
3569 if (!test_bit(__VXGE_STATE_RESET_CARD, &vdev->state)) {
3570 if (type == VXGE_HW_EVENT_SLOT_FREEZE) {
3571 vxge_debug_init(VXGE_ERR,
3572 "%s: Slot is frozen", vdev->ndev->name);
3573 } else if (type == VXGE_HW_EVENT_SERR) {
3574 vxge_debug_init(VXGE_ERR,
3575 "%s: Encountered Serious Error",
3576 vdev->ndev->name);
3577 } else if (type == VXGE_HW_EVENT_CRITICAL_ERR)
3578 vxge_debug_init(VXGE_ERR,
3579 "%s: Encountered Critical Error",
3580 vdev->ndev->name);
3581 }
3582
3583 if ((type == VXGE_HW_EVENT_SERR) ||
3584 (type == VXGE_HW_EVENT_SLOT_FREEZE)) {
3585 if (unlikely(vdev->exec_mode))
3586 clear_bit(__VXGE_STATE_CARD_UP, &vdev->state);
3587 } else if (type == VXGE_HW_EVENT_CRITICAL_ERR) {
3588 vxge_hw_device_mask_all(hldev);
3589 if (unlikely(vdev->exec_mode))
3590 clear_bit(__VXGE_STATE_CARD_UP, &vdev->state);
3591 } else if ((type == VXGE_HW_EVENT_FIFO_ERR) ||
3592 (type == VXGE_HW_EVENT_VPATH_ERR)) {
3593
3594 if (unlikely(vdev->exec_mode))
3595 clear_bit(__VXGE_STATE_CARD_UP, &vdev->state);
3596 else {
3597 /* check if this vpath is already set for reset */
3598 if (!test_and_set_bit(vpath_idx, &vdev->vp_reset)) {
3599
3600 /* disable interrupts for this vpath */
3601 vxge_vpath_intr_disable(vdev, vpath_idx);
3602
3603 /* stop the queue for this vpath */
98f45da2 3604 netif_tx_stop_queue(vpath->fifo.txq);
703da5a1
RV		 3605 }
3606 }
3607 }
3608
3609 vxge_debug_entryexit(vdev->level_trace,
3610 "%s: %s:%d Exiting...",
3611 vdev->ndev->name, __func__, __LINE__);
3612}
3613
3614static void verify_bandwidth(void)
3615{
3616 int i, band_width, total = 0, equal_priority = 0;
3617
3618 /* 1. If user enters 0 for some fifo, give equal priority to all */
3619 for (i = 0; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++) {
3620 if (bw_percentage[i] == 0) {
3621 equal_priority = 1;
3622 break;
3623 }
3624 }
3625
3626 if (!equal_priority) {
3627 /* 2. If sum exceeds 100, give equal priority to all */
3628 for (i = 0; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++) {
3629 if (bw_percentage[i] == 0xFF)
3630 break;
3631
3632 total += bw_percentage[i];
3633 if (total > VXGE_HW_VPATH_BANDWIDTH_MAX) {
3634 equal_priority = 1;
3635 break;
3636 }
3637 }
3638 }
3639
3640 if (!equal_priority) {
3641 /* Is all the bandwidth consumed? */
3642 if (total < VXGE_HW_VPATH_BANDWIDTH_MAX) {
3643 if (i < VXGE_HW_MAX_VIRTUAL_PATHS) {
3644 /* Split rest of bw equally among next VPs*/
3645 band_width =
3646 (VXGE_HW_VPATH_BANDWIDTH_MAX - total) /
3647 (VXGE_HW_MAX_VIRTUAL_PATHS - i);
3648 if (band_width < 2) /* min of 2% */
3649 equal_priority = 1;
3650 else {
3651 for (; i < VXGE_HW_MAX_VIRTUAL_PATHS;
3652 i++)
3653 bw_percentage[i] =
3654 band_width;
3655 }
3656 }
3657 } else if (i < VXGE_HW_MAX_VIRTUAL_PATHS)
3658 equal_priority = 1;
3659 }
3660
3661 if (equal_priority) {
3662 vxge_debug_init(VXGE_ERR,
3663 "%s: Assigning equal bandwidth to all the vpaths",
3664 VXGE_DRIVER_NAME);
3665 bw_percentage[0] = VXGE_HW_VPATH_BANDWIDTH_MAX /
3666 VXGE_HW_MAX_VIRTUAL_PATHS;
3667 for (i = 1; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++)
3668 bw_percentage[i] = bw_percentage[0];
3669 }
703da5a1
RV		 3670}
3671
3672/*
3673 * Vpath configuration
3674 */
3675static int __devinit vxge_config_vpaths(
3676 struct vxge_hw_device_config *device_config,
3677 u64 vpath_mask, struct vxge_config *config_param)
3678{
3679 int i, no_of_vpaths = 0, default_no_vpath = 0, temp;
3680 u32 txdl_size, txdl_per_memblock;
3681
3682 temp = driver_config->vpath_per_dev;
3683 if ((driver_config->vpath_per_dev == VXGE_USE_DEFAULT) &&
3684 (max_config_dev == VXGE_MAX_CONFIG_DEV)) {
3685 /* No more CPU. Return vpath number as zero.*/
3686 if (driver_config->g_no_cpus == -1)
3687 return 0;
3688
3689 if (!driver_config->g_no_cpus)
3690 driver_config->g_no_cpus = num_online_cpus();
3691
3692 driver_config->vpath_per_dev = driver_config->g_no_cpus >> 1;
3693 if (!driver_config->vpath_per_dev)
3694 driver_config->vpath_per_dev = 1;
3695
3696 for (i = 0; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++)
3697 if (!vxge_bVALn(vpath_mask, i, 1))
3698 continue;
3699 else
3700 default_no_vpath++;
3701 if (default_no_vpath < driver_config->vpath_per_dev)
3702 driver_config->vpath_per_dev = default_no_vpath;
3703
3704 driver_config->g_no_cpus = driver_config->g_no_cpus -
3705 (driver_config->vpath_per_dev * 2);
3706 if (driver_config->g_no_cpus <= 0)
3707 driver_config->g_no_cpus = -1;
3708 }
3709
3710 if (driver_config->vpath_per_dev == 1) {
3711 vxge_debug_ll_config(VXGE_TRACE,
3712 "%s: Disable tx and rx steering, "
3713 "as single vpath is configured", VXGE_DRIVER_NAME);
3714 config_param->rth_steering = NO_STEERING;
3715 config_param->tx_steering_type = NO_STEERING;
3716 device_config->rth_en = 0;
3717 }
3718
3719 /* configure bandwidth */
3720 for (i = 0; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++)
3721 device_config->vp_config[i].min_bandwidth = bw_percentage[i];
3722
3723 for (i = 0; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++) {
3724 device_config->vp_config[i].vp_id = i;
3725 device_config->vp_config[i].mtu = VXGE_HW_DEFAULT_MTU;
3726 if (no_of_vpaths < driver_config->vpath_per_dev) {
3727 if (!vxge_bVALn(vpath_mask, i, 1)) {
3728 vxge_debug_ll_config(VXGE_TRACE,
3729 "%s: vpath: %d is not available",
3730 VXGE_DRIVER_NAME, i);
3731 continue;
3732 } else {
3733 vxge_debug_ll_config(VXGE_TRACE,
3734 "%s: vpath: %d available",
3735 VXGE_DRIVER_NAME, i);
3736 no_of_vpaths++;
3737 }
3738 } else {
3739 vxge_debug_ll_config(VXGE_TRACE,
3740 "%s: vpath: %d is not configured, "
3741 "max_config_vpath exceeded",
3742 VXGE_DRIVER_NAME, i);
3743 break;
3744 }
3745
3746 /* Configure Tx fifo's */
3747 device_config->vp_config[i].fifo.enable =
3748 VXGE_HW_FIFO_ENABLE;
3749 device_config->vp_config[i].fifo.max_frags =
5beefb4f 3750 MAX_SKB_FRAGS + 1;
703da5a1
RV		 3751 device_config->vp_config[i].fifo.memblock_size =
3752 VXGE_HW_MIN_FIFO_MEMBLOCK_SIZE;
3753
5beefb4f
SH		 3754 txdl_size = device_config->vp_config[i].fifo.max_frags *
3755 sizeof(struct vxge_hw_fifo_txd);
703da5a1
RV		 3756 txdl_per_memblock = VXGE_HW_MIN_FIFO_MEMBLOCK_SIZE / txdl_size;
3757
3758 device_config->vp_config[i].fifo.fifo_blocks =
3759 ((VXGE_DEF_FIFO_LENGTH - 1) / txdl_per_memblock) + 1;
3760
3761 device_config->vp_config[i].fifo.intr =
3762 VXGE_HW_FIFO_QUEUE_INTR_DISABLE;
3763
3764 /* Configure tti properties */
3765 device_config->vp_config[i].tti.intr_enable =
3766 VXGE_HW_TIM_INTR_ENABLE;
3767
3768 device_config->vp_config[i].tti.btimer_val =
3769 (VXGE_TTI_BTIMER_VAL * 1000) / 272;
3770
3771 device_config->vp_config[i].tti.timer_ac_en =
3772 VXGE_HW_TIM_TIMER_AC_ENABLE;
3773
528f7272
JM		 3774 /* For msi-x with napi (each vector has a handler of its own) -
3775 * Set CI to OFF for all vpaths
3776 */
703da5a1
RV		 3777 device_config->vp_config[i].tti.timer_ci_en =
3778 VXGE_HW_TIM_TIMER_CI_DISABLE;
3779
3780 device_config->vp_config[i].tti.timer_ri_en =
3781 VXGE_HW_TIM_TIMER_RI_DISABLE;
3782
3783 device_config->vp_config[i].tti.util_sel =
3784 VXGE_HW_TIM_UTIL_SEL_LEGACY_TX_NET_UTIL;
3785
3786 device_config->vp_config[i].tti.ltimer_val =
3787 (VXGE_TTI_LTIMER_VAL * 1000) / 272;
3788
3789 device_config->vp_config[i].tti.rtimer_val =
3790 (VXGE_TTI_RTIMER_VAL * 1000) / 272;
3791
3792 device_config->vp_config[i].tti.urange_a = TTI_TX_URANGE_A;
3793 device_config->vp_config[i].tti.urange_b = TTI_TX_URANGE_B;
3794 device_config->vp_config[i].tti.urange_c = TTI_TX_URANGE_C;
3795 device_config->vp_config[i].tti.uec_a = TTI_TX_UFC_A;
3796 device_config->vp_config[i].tti.uec_b = TTI_TX_UFC_B;
3797 device_config->vp_config[i].tti.uec_c = TTI_TX_UFC_C;
3798 device_config->vp_config[i].tti.uec_d = TTI_TX_UFC_D;
3799
3800 /* Configure Rx rings */
3801 device_config->vp_config[i].ring.enable =
3802 VXGE_HW_RING_ENABLE;
3803
3804 device_config->vp_config[i].ring.ring_blocks =
3805 VXGE_HW_DEF_RING_BLOCKS;
528f7272 3806
703da5a1
RV		 3807 device_config->vp_config[i].ring.buffer_mode =
3808 VXGE_HW_RING_RXD_BUFFER_MODE_1;
528f7272 3809
703da5a1
RV		 3810 device_config->vp_config[i].ring.rxds_limit =
3811 VXGE_HW_DEF_RING_RXDS_LIMIT;
528f7272 3812
703da5a1
RV		 3813 device_config->vp_config[i].ring.scatter_mode =
3814 VXGE_HW_RING_SCATTER_MODE_A;
3815
3816 /* Configure rti properties */
3817 device_config->vp_config[i].rti.intr_enable =
3818 VXGE_HW_TIM_INTR_ENABLE;
3819
3820 device_config->vp_config[i].rti.btimer_val =
3821 (VXGE_RTI_BTIMER_VAL * 1000)/272;
3822
3823 device_config->vp_config[i].rti.timer_ac_en =
3824 VXGE_HW_TIM_TIMER_AC_ENABLE;
3825
3826 device_config->vp_config[i].rti.timer_ci_en =
3827 VXGE_HW_TIM_TIMER_CI_DISABLE;
3828
3829 device_config->vp_config[i].rti.timer_ri_en =
3830 VXGE_HW_TIM_TIMER_RI_DISABLE;
3831
3832 device_config->vp_config[i].rti.util_sel =
3833 VXGE_HW_TIM_UTIL_SEL_LEGACY_RX_NET_UTIL;
3834
3835 device_config->vp_config[i].rti.urange_a =
3836 RTI_RX_URANGE_A;
3837 device_config->vp_config[i].rti.urange_b =
3838 RTI_RX_URANGE_B;
3839 device_config->vp_config[i].rti.urange_c =
3840 RTI_RX_URANGE_C;
3841 device_config->vp_config[i].rti.uec_a = RTI_RX_UFC_A;
3842 device_config->vp_config[i].rti.uec_b = RTI_RX_UFC_B;
3843 device_config->vp_config[i].rti.uec_c = RTI_RX_UFC_C;
3844 device_config->vp_config[i].rti.uec_d = RTI_RX_UFC_D;
3845
3846 device_config->vp_config[i].rti.rtimer_val =
3847 (VXGE_RTI_RTIMER_VAL * 1000) / 272;
3848
3849 device_config->vp_config[i].rti.ltimer_val =
3850 (VXGE_RTI_LTIMER_VAL * 1000) / 272;
3851
3852 device_config->vp_config[i].rpa_strip_vlan_tag =
3853 vlan_tag_strip;
3854 }
3855
3856 driver_config->vpath_per_dev = temp;
3857 return no_of_vpaths;
3858}
3859
3860/* initialize device configuratrions */
3861static void __devinit vxge_device_config_init(
3862 struct vxge_hw_device_config *device_config,
3863 int *intr_type)
3864{
3865 /* Used for CQRQ/SRQ. */
3866 device_config->dma_blockpool_initial =
3867 VXGE_HW_INITIAL_DMA_BLOCK_POOL_SIZE;
3868
3869 device_config->dma_blockpool_max =
3870 VXGE_HW_MAX_DMA_BLOCK_POOL_SIZE;
3871
3872 if (max_mac_vpath > VXGE_MAX_MAC_ADDR_COUNT)
3873 max_mac_vpath = VXGE_MAX_MAC_ADDR_COUNT;
3874
3875#ifndef CONFIG_PCI_MSI
3876 vxge_debug_init(VXGE_ERR,
3877 "%s: This Kernel does not support "
3878 "MSI-X. Defaulting to INTA", VXGE_DRIVER_NAME);
3879 *intr_type = INTA;
3880#endif
3881
3882 /* Configure whether MSI-X or IRQL. */
3883 switch (*intr_type) {
3884 case INTA:
3885 device_config->intr_mode = VXGE_HW_INTR_MODE_IRQLINE;
3886 break;
3887
3888 case MSI_X:
16fded7d 3889 device_config->intr_mode = VXGE_HW_INTR_MODE_MSIX_ONE_SHOT;
703da5a1
RV		 3890 break;
3891 }
528f7272 3892
703da5a1
RV		 3893 /* Timer period between device poll */
3894 device_config->device_poll_millis = VXGE_TIMER_DELAY;
3895
3896 /* Configure mac based steering. */
3897 device_config->rts_mac_en = addr_learn_en;
3898
3899 /* Configure Vpaths */
3900 device_config->rth_it_type = VXGE_HW_RTH_IT_TYPE_MULTI_IT;
3901
3902 vxge_debug_ll_config(VXGE_TRACE, "%s : Device Config Params ",
3903 __func__);
703da5a1
RV		 3904 vxge_debug_ll_config(VXGE_TRACE, "intr_mode : %d",
3905 device_config->intr_mode);
3906 vxge_debug_ll_config(VXGE_TRACE, "device_poll_millis : %d",
3907 device_config->device_poll_millis);
703da5a1
RV		 3908 vxge_debug_ll_config(VXGE_TRACE, "rth_en : %d",
3909 device_config->rth_en);
3910 vxge_debug_ll_config(VXGE_TRACE, "rth_it_type : %d",
3911 device_config->rth_it_type);
3912}
3913
3914static void __devinit vxge_print_parm(struct vxgedev *vdev, u64 vpath_mask)
3915{
3916 int i;
3917
3918 vxge_debug_init(VXGE_TRACE,
3919 "%s: %d Vpath(s) opened",
3920 vdev->ndev->name, vdev->no_of_vpath);
3921
3922 switch (vdev->config.intr_type) {
3923 case INTA:
3924 vxge_debug_init(VXGE_TRACE,
3925 "%s: Interrupt type INTA", vdev->ndev->name);
3926 break;
3927
3928 case MSI_X:
3929 vxge_debug_init(VXGE_TRACE,
3930 "%s: Interrupt type MSI-X", vdev->ndev->name);
3931 break;
3932 }
3933
3934 if (vdev->config.rth_steering) {
3935 vxge_debug_init(VXGE_TRACE,
3936 "%s: RTH steering enabled for TCP_IPV4",
3937 vdev->ndev->name);
3938 } else {
3939 vxge_debug_init(VXGE_TRACE,
3940 "%s: RTH steering disabled", vdev->ndev->name);
3941 }
3942
3943 switch (vdev->config.tx_steering_type) {
3944 case NO_STEERING:
3945 vxge_debug_init(VXGE_TRACE,
3946 "%s: Tx steering disabled", vdev->ndev->name);
3947 break;
3948 case TX_PRIORITY_STEERING:
3949 vxge_debug_init(VXGE_TRACE,
3950 "%s: Unsupported tx steering option",
3951 vdev->ndev->name);
3952 vxge_debug_init(VXGE_TRACE,
3953 "%s: Tx steering disabled", vdev->ndev->name);
3954 vdev->config.tx_steering_type = 0;
3955 break;
3956 case TX_VLAN_STEERING:
3957 vxge_debug_init(VXGE_TRACE,
3958 "%s: Unsupported tx steering option",
3959 vdev->ndev->name);
3960 vxge_debug_init(VXGE_TRACE,
3961 "%s: Tx steering disabled", vdev->ndev->name);
3962 vdev->config.tx_steering_type = 0;
3963 break;
3964 case TX_MULTIQ_STEERING:
3965 vxge_debug_init(VXGE_TRACE,
3966 "%s: Tx multiqueue steering enabled",
3967 vdev->ndev->name);
3968 break;
3969 case TX_PORT_STEERING:
3970 vxge_debug_init(VXGE_TRACE,
3971 "%s: Tx port steering enabled",
3972 vdev->ndev->name);
3973 break;
3974 default:
3975 vxge_debug_init(VXGE_ERR,
3976 "%s: Unsupported tx steering type",
3977 vdev->ndev->name);
3978 vxge_debug_init(VXGE_TRACE,
3979 "%s: Tx steering disabled", vdev->ndev->name);
3980 vdev->config.tx_steering_type = 0;
3981 }
3982
703da5a1
RV		 3983 if (vdev->config.addr_learn_en)
3984 vxge_debug_init(VXGE_TRACE,
3985 "%s: MAC Address learning enabled", vdev->ndev->name);
3986
703da5a1
RV		 3987 for (i = 0; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++) {
3988 if (!vxge_bVALn(vpath_mask, i, 1))
3989 continue;
3990 vxge_debug_ll_config(VXGE_TRACE,
3991 "%s: MTU size - %d", vdev->ndev->name,
3992 ((struct __vxge_hw_device *)(vdev->devh))->
3993 config.vp_config[i].mtu);
3994 vxge_debug_init(VXGE_TRACE,
3995 "%s: VLAN tag stripping %s", vdev->ndev->name,
3996 ((struct __vxge_hw_device *)(vdev->devh))->
3997 config.vp_config[i].rpa_strip_vlan_tag
3998 ? "Enabled" : "Disabled");
703da5a1
RV		 3999 vxge_debug_ll_config(VXGE_TRACE,
4000 "%s: Max frags : %d", vdev->ndev->name,
4001 ((struct __vxge_hw_device *)(vdev->devh))->
4002 config.vp_config[i].fifo.max_frags);
4003 break;
4004 }
4005}
4006
4007#ifdef CONFIG_PM
4008/**
4009 * vxge_pm_suspend - vxge power management suspend entry point
4010 *
4011 */
4012static int vxge_pm_suspend(struct pci_dev *pdev, pm_message_t state)
4013{
4014 return -ENOSYS;
4015}
4016/**
4017 * vxge_pm_resume - vxge power management resume entry point
4018 *
4019 */
4020static int vxge_pm_resume(struct pci_dev *pdev)
4021{
4022 return -ENOSYS;
4023}
4024
4025#endif
4026
4027/**
4028 * vxge_io_error_detected - called when PCI error is detected
4029 * @pdev: Pointer to PCI device
4030 * @state: The current pci connection state
4031 *
4032 * This function is called after a PCI bus error affecting
4033 * this device has been detected.
4034 */
4035static pci_ers_result_t vxge_io_error_detected(struct pci_dev *pdev,
4036 pci_channel_state_t state)
4037{
d8ee7071 4038 struct __vxge_hw_device *hldev = pci_get_drvdata(pdev);
703da5a1
RV		 4039 struct net_device *netdev = hldev->ndev;
4040
4041 netif_device_detach(netdev);
4042
e33b992d
DN		 4043 if (state == pci_channel_io_perm_failure)
4044 return PCI_ERS_RESULT_DISCONNECT;
4045
703da5a1
RV		 4046 if (netif_running(netdev)) {
4047 /* Bring down the card, while avoiding PCI I/O */
4048 do_vxge_close(netdev, 0);
4049 }
4050
4051 pci_disable_device(pdev);
4052
4053 return PCI_ERS_RESULT_NEED_RESET;
4054}
4055
4056/**
4057 * vxge_io_slot_reset - called after the pci bus has been reset.
4058 * @pdev: Pointer to PCI device
4059 *
4060 * Restart the card from scratch, as if from a cold-boot.
4061 * At this point, the card has exprienced a hard reset,
4062 * followed by fixups by BIOS, and has its config space
4063 * set up identically to what it was at cold boot.
4064 */
4065static pci_ers_result_t vxge_io_slot_reset(struct pci_dev *pdev)
4066{
d8ee7071 4067 struct __vxge_hw_device *hldev = pci_get_drvdata(pdev);
703da5a1
RV		 4068 struct net_device *netdev = hldev->ndev;
4069
4070 struct vxgedev *vdev = netdev_priv(netdev);
4071
4072 if (pci_enable_device(pdev)) {
75f5e1c6 4073 netdev_err(netdev, "Cannot re-enable device after reset\n");
703da5a1
RV		 4074 return PCI_ERS_RESULT_DISCONNECT;
4075 }
4076
4077 pci_set_master(pdev);
528f7272 4078 do_vxge_reset(vdev, VXGE_LL_FULL_RESET);
703da5a1
RV		 4079
4080 return PCI_ERS_RESULT_RECOVERED;
4081}
4082
4083/**
4084 * vxge_io_resume - called when traffic can start flowing again.
4085 * @pdev: Pointer to PCI device
4086 *
4087 * This callback is called when the error recovery driver tells
4088 * us that its OK to resume normal operation.
4089 */
4090static void vxge_io_resume(struct pci_dev *pdev)
4091{
d8ee7071 4092 struct __vxge_hw_device *hldev = pci_get_drvdata(pdev);
703da5a1
RV		 4093 struct net_device *netdev = hldev->ndev;
4094
4095 if (netif_running(netdev)) {
4096 if (vxge_open(netdev)) {
75f5e1c6
JP		 4097 netdev_err(netdev,
4098 "Can't bring device back up after reset\n");
703da5a1
RV		 4099 return;
4100 }
4101 }
4102
4103 netif_device_attach(netdev);
4104}
4105
cb27ec60
SH		 4106static inline u32 vxge_get_num_vfs(u64 function_mode)
4107{
4108 u32 num_functions = 0;
4109
4110 switch (function_mode) {
4111 case VXGE_HW_FUNCTION_MODE_MULTI_FUNCTION:
4112 case VXGE_HW_FUNCTION_MODE_SRIOV_8:
4113 num_functions = 8;
4114 break;
4115 case VXGE_HW_FUNCTION_MODE_SINGLE_FUNCTION:
4116 num_functions = 1;
4117 break;
4118 case VXGE_HW_FUNCTION_MODE_SRIOV:
4119 case VXGE_HW_FUNCTION_MODE_MRIOV:
4120 case VXGE_HW_FUNCTION_MODE_MULTI_FUNCTION_17:
4121 num_functions = 17;
4122 break;
4123 case VXGE_HW_FUNCTION_MODE_SRIOV_4:
4124 num_functions = 4;
4125 break;
4126 case VXGE_HW_FUNCTION_MODE_MULTI_FUNCTION_2:
4127 num_functions = 2;
4128 break;
4129 case VXGE_HW_FUNCTION_MODE_MRIOV_8:
4130 num_functions = 8; /* TODO */
4131 break;
4132 }
4133 return num_functions;
4134}
4135
e8ac1756
JM		 4136int vxge_fw_upgrade(struct vxgedev *vdev, char *fw_name, int override)
4137{
4138 struct __vxge_hw_device *hldev = vdev->devh;
4139 u32 maj, min, bld, cmaj, cmin, cbld;
4140 enum vxge_hw_status status;
4141 const struct firmware *fw;
4142 int ret;
4143
4144 ret = request_firmware(&fw, fw_name, &vdev->pdev->dev);
4145 if (ret) {
4146 vxge_debug_init(VXGE_ERR, "%s: Firmware file '%s' not found",
4147 VXGE_DRIVER_NAME, fw_name);
4148 goto out;
4149 }
4150
4151 /* Load the new firmware onto the adapter */
4152 status = vxge_update_fw_image(hldev, fw->data, fw->size);
4153 if (status != VXGE_HW_OK) {
4154 vxge_debug_init(VXGE_ERR,
4155 "%s: FW image download to adapter failed '%s'.",
4156 VXGE_DRIVER_NAME, fw_name);
4157 ret = -EIO;
4158 goto out;
4159 }
4160
4161 /* Read the version of the new firmware */
4162 status = vxge_hw_upgrade_read_version(hldev, &maj, &min, &bld);
4163 if (status != VXGE_HW_OK) {
4164 vxge_debug_init(VXGE_ERR,
4165 "%s: Upgrade read version failed '%s'.",
4166 VXGE_DRIVER_NAME, fw_name);
4167 ret = -EIO;
4168 goto out;
4169 }
4170
4171 cmaj = vdev->config.device_hw_info.fw_version.major;
4172 cmin = vdev->config.device_hw_info.fw_version.minor;
4173 cbld = vdev->config.device_hw_info.fw_version.build;
4174 /* It's possible the version in /lib/firmware is not the latest version.
4175 * If so, we could get into a loop of trying to upgrade to the latest
4176 * and flashing the older version.
4177 */
4178 if (VXGE_FW_VER(maj, min, bld) == VXGE_FW_VER(cmaj, cmin, cbld) &&
4179 !override) {
4180 ret = -EINVAL;
4181 goto out;
4182 }
4183
4184 printk(KERN_NOTICE "Upgrade to firmware version %d.%d.%d commencing\n",
4185 maj, min, bld);
4186
4187 /* Flash the adapter with the new firmware */
4188 status = vxge_hw_flash_fw(hldev);
4189 if (status != VXGE_HW_OK) {
4190 vxge_debug_init(VXGE_ERR, "%s: Upgrade commit failed '%s'.",
4191 VXGE_DRIVER_NAME, fw_name);
4192 ret = -EIO;
4193 goto out;
4194 }
4195
4196 printk(KERN_NOTICE "Upgrade of firmware successful! Adapter must be "
4197 "hard reset before using, thus requiring a system reboot or a "
4198 "hotplug event.\n");
4199
4200out:
e84f885e 4201 release_firmware(fw);
e8ac1756
JM		 4202 return ret;
4203}
4204
4205static int vxge_probe_fw_update(struct vxgedev *vdev)
4206{
4207 u32 maj, min, bld;
4208 int ret, gpxe = 0;
4209 char *fw_name;
4210
4211 maj = vdev->config.device_hw_info.fw_version.major;
4212 min = vdev->config.device_hw_info.fw_version.minor;
4213 bld = vdev->config.device_hw_info.fw_version.build;
4214
4215 if (VXGE_FW_VER(maj, min, bld) == VXGE_CERT_FW_VER)
4216 return 0;
4217
4218 /* Ignore the build number when determining if the current firmware is
4219 * "too new" to load the driver
4220 */
4221 if (VXGE_FW_VER(maj, min, 0) > VXGE_CERT_FW_VER) {
4222 vxge_debug_init(VXGE_ERR, "%s: Firmware newer than last known "
4223 "version, unable to load driver\n",
4224 VXGE_DRIVER_NAME);
4225 return -EINVAL;
4226 }
4227
4228 /* Firmware 1.4.4 and older cannot be upgraded, and is too ancient to
4229 * work with this driver.
4230 */
4231 if (VXGE_FW_VER(maj, min, bld) <= VXGE_FW_DEAD_VER) {
4232 vxge_debug_init(VXGE_ERR, "%s: Firmware %d.%d.%d cannot be "
4233 "upgraded\n", VXGE_DRIVER_NAME, maj, min, bld);
4234 return -EINVAL;
4235 }
4236
4237 /* If file not specified, determine gPXE or not */
4238 if (VXGE_FW_VER(maj, min, bld) >= VXGE_EPROM_FW_VER) {
4239 int i;
4240 for (i = 0; i < VXGE_HW_MAX_ROM_IMAGES; i++)
4241 if (vdev->devh->eprom_versions[i]) {
4242 gpxe = 1;
4243 break;
4244 }
4245 }
4246 if (gpxe)
4247 fw_name = "vxge/X3fw-pxe.ncf";
4248 else
4249 fw_name = "vxge/X3fw.ncf";
4250
4251 ret = vxge_fw_upgrade(vdev, fw_name, 0);
4252 /* -EINVAL and -ENOENT are not fatal errors for flashing firmware on
4253 * probe, so ignore them
4254 */
4255 if (ret != -EINVAL && ret != -ENOENT)
4256 return -EIO;
4257 else
4258 ret = 0;
4259
4260 if (VXGE_FW_VER(VXGE_CERT_FW_VER_MAJOR, VXGE_CERT_FW_VER_MINOR, 0) >
4261 VXGE_FW_VER(maj, min, 0)) {
4262 vxge_debug_init(VXGE_ERR, "%s: Firmware %d.%d.%d is too old to"
4263 " be used with this driver.\n"
4264 "Please get the latest version from "
4265 "ftp://ftp.s2io.com/pub/X3100-Drivers/FIRMWARE",
4266 VXGE_DRIVER_NAME, maj, min, bld);
4267 return -EINVAL;
4268 }
4269
4270 return ret;
4271}
4272
c92bf70d
JM		 4273static int __devinit is_sriov_initialized(struct pci_dev *pdev)
4274{
4275 int pos;
4276 u16 ctrl;
4277
4278 pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_SRIOV);
4279 if (pos) {
4280 pci_read_config_word(pdev, pos + PCI_SRIOV_CTRL, &ctrl);
4281 if (ctrl & PCI_SRIOV_CTRL_VFE)
4282 return 1;
4283 }
4284 return 0;
4285}
4286
956a2066 4287static const struct vxge_hw_uld_cbs vxge_callbacks = {
4288 .link_up = vxge_callback_link_up,
4289 .link_down = vxge_callback_link_down,
4290 .crit_err = vxge_callback_crit_err,
4291};
4292
703da5a1
RV		 4293/**
4294 * vxge_probe
4295 * @pdev : structure containing the PCI related information of the device.
4296 * @pre: List of PCI devices supported by the driver listed in vxge_id_table.
4297 * Description:
4298 * This function is called when a new PCI device gets detected and initializes
4299 * it.
4300 * Return value:
4301 * returns 0 on success and negative on failure.
4302 *
4303 */
4304static int __devinit
4305vxge_probe(struct pci_dev *pdev, const struct pci_device_id *pre)
4306{
2c91308f 4307 struct __vxge_hw_device *hldev;
703da5a1
RV		 4308 enum vxge_hw_status status;
4309 int ret;
4310 int high_dma = 0;
4311 u64 vpath_mask = 0;
4312 struct vxgedev *vdev;
7dad171c 4313 struct vxge_config *ll_config = NULL;
703da5a1
RV		 4314 struct vxge_hw_device_config *device_config = NULL;
4315 struct vxge_hw_device_attr attr;
4316 int i, j, no_of_vpath = 0, max_vpath_supported = 0;
4317 u8 *macaddr;
4318 struct vxge_mac_addrs *entry;
4319 static int bus = -1, device = -1;
cb27ec60 4320 u32 host_type;
703da5a1 4321 u8 new_device = 0;
cb27ec60
SH		 4322 enum vxge_hw_status is_privileged;
4323 u32 function_mode;
4324 u32 num_vfs = 0;
703da5a1
RV		 4325
4326 vxge_debug_entryexit(VXGE_TRACE, "%s:%d", __func__, __LINE__);
4327 attr.pdev = pdev;
4328
cb27ec60 4329 /* In SRIOV-17 mode, functions of the same adapter
528f7272
JM		 4330 * can be deployed on different buses
4331 */
4332 if (((bus != pdev->bus->number) || (device != PCI_SLOT(pdev->devfn))) &&
4333 !pdev->is_virtfn)
703da5a1
RV		 4334 new_device = 1;
4335
4336 bus = pdev->bus->number;
4337 device = PCI_SLOT(pdev->devfn);
4338
4339 if (new_device) {
4340 if (driver_config->config_dev_cnt &&
4341 (driver_config->config_dev_cnt !=
4342 driver_config->total_dev_cnt))
4343 vxge_debug_init(VXGE_ERR,
4344 "%s: Configured %d of %d devices",
4345 VXGE_DRIVER_NAME,
4346 driver_config->config_dev_cnt,
4347 driver_config->total_dev_cnt);
4348 driver_config->config_dev_cnt = 0;
4349 driver_config->total_dev_cnt = 0;
703da5a1 4350 }
528f7272 4351
9002397e
SH		 4352 /* Now making the CPU based no of vpath calculation
4353 * applicable for individual functions as well.
4354 */
4355 driver_config->g_no_cpus = 0;
657205bd
SH		 4356 driver_config->vpath_per_dev = max_config_vpath;
4357
703da5a1
RV		 4358 driver_config->total_dev_cnt++;
4359 if (++driver_config->config_dev_cnt > max_config_dev) {
4360 ret = 0;
4361 goto _exit0;
4362 }
4363
4364 device_config = kzalloc(sizeof(struct vxge_hw_device_config),
4365 GFP_KERNEL);
4366 if (!device_config) {
4367 ret = -ENOMEM;
4368 vxge_debug_init(VXGE_ERR,
4369 "device_config : malloc failed %s %d",
4370 __FILE__, __LINE__);
4371 goto _exit0;
4372 }
4373
528f7272 4374 ll_config = kzalloc(sizeof(struct vxge_config), GFP_KERNEL);
7dad171c
PB		 4375 if (!ll_config) {
4376 ret = -ENOMEM;
4377 vxge_debug_init(VXGE_ERR,
528f7272 4378 "device_config : malloc failed %s %d",
7dad171c
PB		 4379 __FILE__, __LINE__);
4380 goto _exit0;
4381 }
4382 ll_config->tx_steering_type = TX_MULTIQ_STEERING;
4383 ll_config->intr_type = MSI_X;
4384 ll_config->napi_weight = NEW_NAPI_WEIGHT;
4385 ll_config->rth_steering = RTH_STEERING;
703da5a1
RV		 4386
4387 /* get the default configuration parameters */
4388 vxge_hw_device_config_default_get(device_config);
4389
4390 /* initialize configuration parameters */
7dad171c 4391 vxge_device_config_init(device_config, &ll_config->intr_type);
703da5a1
RV		 4392
4393 ret = pci_enable_device(pdev);
4394 if (ret) {
4395 vxge_debug_init(VXGE_ERR,
4396 "%s : can not enable PCI device", __func__);
4397 goto _exit0;
4398 }
4399
b3837cec 4400 if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(64))) {
703da5a1
RV		 4401 vxge_debug_ll_config(VXGE_TRACE,
4402 "%s : using 64bit DMA", __func__);
4403
4404 high_dma = 1;
4405
4406 if (pci_set_consistent_dma_mask(pdev,
b3837cec 4407 DMA_BIT_MASK(64))) {
703da5a1
RV		 4408 vxge_debug_init(VXGE_ERR,
4409 "%s : unable to obtain 64bit DMA for "
4410 "consistent allocations", __func__);
4411 ret = -ENOMEM;
4412 goto _exit1;
4413 }
b3837cec 4414 } else if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32))) {
703da5a1
RV		 4415 vxge_debug_ll_config(VXGE_TRACE,
4416 "%s : using 32bit DMA", __func__);
4417 } else {
4418 ret = -ENOMEM;
4419 goto _exit1;
4420 }
4421
6cca2003
JM		 4422 ret = pci_request_region(pdev, 0, VXGE_DRIVER_NAME);
4423 if (ret) {
703da5a1
RV		 4424 vxge_debug_init(VXGE_ERR,
4425 "%s : request regions failed", __func__);
703da5a1
RV		 4426 goto _exit1;
4427 }
4428
4429 pci_set_master(pdev);
4430
4431 attr.bar0 = pci_ioremap_bar(pdev, 0);
4432 if (!attr.bar0) {
4433 vxge_debug_init(VXGE_ERR,
4434 "%s : cannot remap io memory bar0", __func__);
4435 ret = -ENODEV;
4436 goto _exit2;
4437 }
4438 vxge_debug_ll_config(VXGE_TRACE,
4439 "pci ioremap bar0: %p:0x%llx",
4440 attr.bar0,
4441 (unsigned long long)pci_resource_start(pdev, 0));
4442
703da5a1 4443 status = vxge_hw_device_hw_info_get(attr.bar0,
7dad171c 4444 &ll_config->device_hw_info);
703da5a1
RV		 4445 if (status != VXGE_HW_OK) {
4446 vxge_debug_init(VXGE_ERR,
4447 "%s: Reading of hardware info failed."
4448 "Please try upgrading the firmware.", VXGE_DRIVER_NAME);
4449 ret = -EINVAL;
7975d1ee 4450 goto _exit3;
703da5a1
RV		 4451 }
4452
7dad171c 4453 vpath_mask = ll_config->device_hw_info.vpath_mask;
703da5a1
RV		 4454 if (vpath_mask == 0) {
4455 vxge_debug_ll_config(VXGE_TRACE,
4456 "%s: No vpaths available in device", VXGE_DRIVER_NAME);
4457 ret = -EINVAL;
7975d1ee 4458 goto _exit3;
703da5a1
RV		 4459 }
4460
4461 vxge_debug_ll_config(VXGE_TRACE,
4462 "%s:%d Vpath mask = %llx", __func__, __LINE__,
4463 (unsigned long long)vpath_mask);
4464
7dad171c
PB		 4465 function_mode = ll_config->device_hw_info.function_mode;
4466 host_type = ll_config->device_hw_info.host_type;
cb27ec60 4467 is_privileged = __vxge_hw_device_is_privilaged(host_type,
7dad171c 4468 ll_config->device_hw_info.func_id);
cb27ec60 4469
703da5a1
RV		 4470 /* Check how many vpaths are available */
4471 for (i = 0; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++) {
4472 if (!((vpath_mask) & vxge_mBIT(i)))
4473 continue;
4474 max_vpath_supported++;
4475 }
4476
cb27ec60
SH		 4477 if (new_device)
4478 num_vfs = vxge_get_num_vfs(function_mode) - 1;
4479
5dbc9011 4480 /* Enable SRIOV mode, if firmware has SRIOV support and if it is a PF */
c92bf70d
JM		 4481 if (is_sriov(function_mode) && !is_sriov_initialized(pdev) &&
4482 (ll_config->intr_type != INTA)) {
4483 ret = pci_enable_sriov(pdev, num_vfs);
cb27ec60
SH		 4484 if (ret)
4485 vxge_debug_ll_config(VXGE_ERR,
4486 "Failed in enabling SRIOV mode: %d\n", ret);
c92bf70d 4487 /* No need to fail out, as an error here is non-fatal */
5dbc9011
SS		 4488 }
4489
703da5a1
RV		 4490 /*
4491 * Configure vpaths and get driver configured number of vpaths
4492 * which is less than or equal to the maximum vpaths per function.
4493 */
7dad171c 4494 no_of_vpath = vxge_config_vpaths(device_config, vpath_mask, ll_config);
703da5a1
RV		 4495 if (!no_of_vpath) {
4496 vxge_debug_ll_config(VXGE_ERR,
4497 "%s: No more vpaths to configure", VXGE_DRIVER_NAME);
4498 ret = 0;
7975d1ee 4499 goto _exit3;
703da5a1
RV		 4500 }
4501
4502 /* Setting driver callbacks */
956a2066 4503 attr.uld_callbacks = &vxge_callbacks;
703da5a1
RV		 4504
4505 status = vxge_hw_device_initialize(&hldev, &attr, device_config);
4506 if (status != VXGE_HW_OK) {
4507 vxge_debug_init(VXGE_ERR,
4508 "Failed to initialize device (%d)", status);
4509 ret = -EINVAL;
7975d1ee 4510 goto _exit3;
703da5a1
RV		 4511 }
4512
e8ac1756
JM		 4513 if (VXGE_FW_VER(ll_config->device_hw_info.fw_version.major,
4514 ll_config->device_hw_info.fw_version.minor,
4515 ll_config->device_hw_info.fw_version.build) >=
4516 VXGE_EPROM_FW_VER) {
4517 struct eprom_image img[VXGE_HW_MAX_ROM_IMAGES];
4518
4519 status = vxge_hw_vpath_eprom_img_ver_get(hldev, img);
4520 if (status != VXGE_HW_OK) {
4521 vxge_debug_init(VXGE_ERR, "%s: Reading of EPROM failed",
4522 VXGE_DRIVER_NAME);
4523 /* This is a non-fatal error, continue */
4524 }
4525
4526 for (i = 0; i < VXGE_HW_MAX_ROM_IMAGES; i++) {
4527 hldev->eprom_versions[i] = img[i].version;
4528 if (!img[i].is_valid)
4529 break;
4530 vxge_debug_init(VXGE_TRACE, "%s: EPROM %d, version "
1d15f81c 4531 "%d.%d.%d.%d", VXGE_DRIVER_NAME, i,
e8ac1756
JM		 4532 VXGE_EPROM_IMG_MAJOR(img[i].version),
4533 VXGE_EPROM_IMG_MINOR(img[i].version),
4534 VXGE_EPROM_IMG_FIX(img[i].version),
4535 VXGE_EPROM_IMG_BUILD(img[i].version));
4536 }
4537 }
4538
fa41fd10 4539 /* if FCS stripping is not disabled in MAC fail driver load */
b81b3733
JM		 4540 status = vxge_hw_vpath_strip_fcs_check(hldev, vpath_mask);
4541 if (status != VXGE_HW_OK) {
4542 vxge_debug_init(VXGE_ERR, "%s: FCS stripping is enabled in MAC"
4543 " failing driver load", VXGE_DRIVER_NAME);
fa41fd10
SH		 4544 ret = -EINVAL;
4545 goto _exit4;
4546 }
4547
cd883a79
JM		 4548 /* Always enable HWTS. This will always cause the FCS to be invalid,
4549 * due to the fact that HWTS is using the FCS as the location of the
4550 * timestamp. The HW FCS checking will still correctly determine if
4551 * there is a valid checksum, and the FCS is being removed by the driver
4552 * anyway. So no fucntionality is being lost. Since it is always
4553 * enabled, we now simply use the ioctl call to set whether or not the
4554 * driver should be paying attention to the HWTS.
4555 */
4556 if (is_privileged == VXGE_HW_OK) {
4557 status = vxge_timestamp_config(hldev);
4558 if (status != VXGE_HW_OK) {
4559 vxge_debug_init(VXGE_ERR, "%s: HWTS enable failed",
4560 VXGE_DRIVER_NAME);
4561 ret = -EFAULT;
4562 goto _exit4;
4563 }
4564 }
4565
703da5a1
RV		 4566 vxge_hw_device_debug_set(hldev, VXGE_ERR, VXGE_COMPONENT_LL);
4567
4568 /* set private device info */
4569 pci_set_drvdata(pdev, hldev);
4570
7dad171c
PB		 4571 ll_config->fifo_indicate_max_pkts = VXGE_FIFO_INDICATE_MAX_PKTS;
4572 ll_config->addr_learn_en = addr_learn_en;
4573 ll_config->rth_algorithm = RTH_ALG_JENKINS;
47f01db4
JM		 4574 ll_config->rth_hash_type_tcpipv4 = 1;
4575 ll_config->rth_hash_type_ipv4 = 0;
4576 ll_config->rth_hash_type_tcpipv6 = 0;
4577 ll_config->rth_hash_type_ipv6 = 0;
4578 ll_config->rth_hash_type_tcpipv6ex = 0;
4579 ll_config->rth_hash_type_ipv6ex = 0;
7dad171c
PB		 4580 ll_config->rth_bkt_sz = RTH_BUCKET_SIZE;
4581 ll_config->tx_pause_enable = VXGE_PAUSE_CTRL_ENABLE;
4582 ll_config->rx_pause_enable = VXGE_PAUSE_CTRL_ENABLE;
4583
e8ac1756
JM		 4584 ret = vxge_device_register(hldev, ll_config, high_dma, no_of_vpath,
4585 &vdev);
4586 if (ret) {
703da5a1 4587 ret = -EINVAL;
7975d1ee 4588 goto _exit4;
703da5a1
RV		 4589 }
4590
e8ac1756
JM		 4591 ret = vxge_probe_fw_update(vdev);
4592 if (ret)
4593 goto _exit5;
4594
703da5a1
RV		 4595 vxge_hw_device_debug_set(hldev, VXGE_TRACE, VXGE_COMPONENT_LL);
4596 VXGE_COPY_DEBUG_INFO_TO_LL(vdev, vxge_hw_device_error_level_get(hldev),
4597 vxge_hw_device_trace_level_get(hldev));
4598
4599 /* set private HW device info */
703da5a1
RV		 4600 vdev->mtu = VXGE_HW_DEFAULT_MTU;
4601 vdev->bar0 = attr.bar0;
703da5a1
RV		 4602 vdev->max_vpath_supported = max_vpath_supported;
4603 vdev->no_of_vpath = no_of_vpath;
4604
4605 /* Virtual Path count */
4606 for (i = 0, j = 0; i < VXGE_HW_MAX_VIRTUAL_PATHS; i++) {
4607 if (!vxge_bVALn(vpath_mask, i, 1))
4608 continue;
4609 if (j >= vdev->no_of_vpath)
4610 break;
4611
4612 vdev->vpaths[j].is_configured = 1;
4613 vdev->vpaths[j].device_id = i;
703da5a1
RV		 4614 vdev->vpaths[j].ring.driver_id = j;
4615 vdev->vpaths[j].vdev = vdev;
4616 vdev->vpaths[j].max_mac_addr_cnt = max_mac_vpath;
4617 memcpy((u8 *)vdev->vpaths[j].macaddr,
7dad171c 4618 ll_config->device_hw_info.mac_addrs[i],
703da5a1
RV		 4619 ETH_ALEN);
4620
4621 /* Initialize the mac address list header */
4622 INIT_LIST_HEAD(&vdev->vpaths[j].mac_addr_list);
4623
4624 vdev->vpaths[j].mac_addr_cnt = 0;
4625 vdev->vpaths[j].mcast_addr_cnt = 0;
4626 j++;
4627 }
4628 vdev->exec_mode = VXGE_EXEC_MODE_DISABLE;
4629 vdev->max_config_port = max_config_port;
4630
4631 vdev->vlan_tag_strip = vlan_tag_strip;
4632
4633 /* map the hashing selector table to the configured vpaths */
4634 for (i = 0; i < vdev->no_of_vpath; i++)
4635 vdev->vpath_selector[i] = vpath_selector[i];
4636
4637 macaddr = (u8 *)vdev->vpaths[0].macaddr;
4638
7dad171c
PB		 4639 ll_config->device_hw_info.serial_number[VXGE_HW_INFO_LEN - 1] = '\0';
4640 ll_config->device_hw_info.product_desc[VXGE_HW_INFO_LEN - 1] = '\0';
4641 ll_config->device_hw_info.part_number[VXGE_HW_INFO_LEN - 1] = '\0';
703da5a1
RV		 4642
4643 vxge_debug_init(VXGE_TRACE, "%s: SERIAL NUMBER: %s",
7dad171c 4644 vdev->ndev->name, ll_config->device_hw_info.serial_number);
703da5a1
RV		 4645
4646 vxge_debug_init(VXGE_TRACE, "%s: PART NUMBER: %s",
7dad171c 4647 vdev->ndev->name, ll_config->device_hw_info.part_number);
703da5a1
RV		 4648
4649 vxge_debug_init(VXGE_TRACE, "%s: Neterion %s Server Adapter",
7dad171c 4650 vdev->ndev->name, ll_config->device_hw_info.product_desc);
703da5a1 4651
bf54e736 4652 vxge_debug_init(VXGE_TRACE, "%s: MAC ADDR: %pM",
4653 vdev->ndev->name, macaddr);
703da5a1
RV		 4654
4655 vxge_debug_init(VXGE_TRACE, "%s: Link Width x%d",
4656 vdev->ndev->name, vxge_hw_device_link_width_get(hldev));
4657
4658 vxge_debug_init(VXGE_TRACE,
4659 "%s: Firmware version : %s Date : %s", vdev->ndev->name,
7dad171c
PB		 4660 ll_config->device_hw_info.fw_version.version,
4661 ll_config->device_hw_info.fw_date.date);
703da5a1 4662
0a25bdc6 4663 if (new_device) {
7dad171c 4664 switch (ll_config->device_hw_info.function_mode) {
0a25bdc6
SH		 4665 case VXGE_HW_FUNCTION_MODE_SINGLE_FUNCTION:
4666 vxge_debug_init(VXGE_TRACE,
4667 "%s: Single Function Mode Enabled", vdev->ndev->name);
4668 break;
4669 case VXGE_HW_FUNCTION_MODE_MULTI_FUNCTION:
4670 vxge_debug_init(VXGE_TRACE,
4671 "%s: Multi Function Mode Enabled", vdev->ndev->name);
4672 break;
4673 case VXGE_HW_FUNCTION_MODE_SRIOV:
4674 vxge_debug_init(VXGE_TRACE,
4675 "%s: Single Root IOV Mode Enabled", vdev->ndev->name);
4676 break;
4677 case VXGE_HW_FUNCTION_MODE_MRIOV:
4678 vxge_debug_init(VXGE_TRACE,
4679 "%s: Multi Root IOV Mode Enabled", vdev->ndev->name);
4680 break;
4681 }
4682 }
4683
703da5a1
RV		 4684 vxge_print_parm(vdev, vpath_mask);
4685
4686 /* Store the fw version for ethttool option */
7dad171c 4687 strcpy(vdev->fw_version, ll_config->device_hw_info.fw_version.version);
703da5a1
RV		 4688 memcpy(vdev->ndev->dev_addr, (u8 *)vdev->vpaths[0].macaddr, ETH_ALEN);
4689 memcpy(vdev->ndev->perm_addr, vdev->ndev->dev_addr, ETH_ALEN);
4690
4691 /* Copy the station mac address to the list */
4692 for (i = 0; i < vdev->no_of_vpath; i++) {
e80be0b0 4693 entry = kzalloc(sizeof(struct vxge_mac_addrs), GFP_KERNEL);
703da5a1
RV		 4694 if (NULL == entry) {
4695 vxge_debug_init(VXGE_ERR,
4696 "%s: mac_addr_list : memory allocation failed",
4697 vdev->ndev->name);
4698 ret = -EPERM;
e8ac1756 4699 goto _exit6;
703da5a1
RV		 4700 }
4701 macaddr = (u8 *)&entry->macaddr;
4702 memcpy(macaddr, vdev->ndev->dev_addr, ETH_ALEN);
4703 list_add(&entry->item, &vdev->vpaths[i].mac_addr_list);
4704 vdev->vpaths[i].mac_addr_cnt = 1;
4705 }
4706
914d0d71 4707 kfree(device_config);
eb5f10c2
SH		 4708
4709 /*
4710 * INTA is shared in multi-function mode. This is unlike the INTA
4711 * implementation in MR mode, where each VH has its own INTA message.
4712 * - INTA is masked (disabled) as long as at least one function sets
4713 * its TITAN_MASK_ALL_INT.ALARM bit.
4714 * - INTA is unmasked (enabled) when all enabled functions have cleared
4715 * their own TITAN_MASK_ALL_INT.ALARM bit.
4716 * The TITAN_MASK_ALL_INT ALARM & TRAFFIC bits are cleared on power up.
4717 * Though this driver leaves the top level interrupts unmasked while
4718 * leaving the required module interrupt bits masked on exit, there
4719 * could be a rougue driver around that does not follow this procedure
4720 * resulting in a failure to generate interrupts. The following code is
4721 * present to prevent such a failure.
4722 */
4723
7dad171c 4724 if (ll_config->device_hw_info.function_mode ==
eb5f10c2
SH		 4725 VXGE_HW_FUNCTION_MODE_MULTI_FUNCTION)
4726 if (vdev->config.intr_type == INTA)
4727 vxge_hw_device_unmask_all(hldev);
4728
703da5a1
RV		 4729 vxge_debug_entryexit(VXGE_TRACE, "%s: %s:%d Exiting...",
4730 vdev->ndev->name, __func__, __LINE__);
4731
4732 vxge_hw_device_debug_set(hldev, VXGE_ERR, VXGE_COMPONENT_LL);
4733 VXGE_COPY_DEBUG_INFO_TO_LL(vdev, vxge_hw_device_error_level_get(hldev),
4734 vxge_hw_device_trace_level_get(hldev));
4735
7dad171c 4736 kfree(ll_config);
703da5a1
RV		 4737 return 0;
4738
e8ac1756 4739_exit6:
703da5a1
RV		 4740 for (i = 0; i < vdev->no_of_vpath; i++)
4741 vxge_free_mac_add_list(&vdev->vpaths[i]);
e8ac1756 4742_exit5:
703da5a1 4743 vxge_device_unregister(hldev);
7975d1ee 4744_exit4:
6cca2003 4745 pci_set_drvdata(pdev, NULL);
703da5a1 4746 vxge_hw_device_terminate(hldev);
6cca2003 4747 pci_disable_sriov(pdev);
703da5a1
RV		 4748_exit3:
4749 iounmap(attr.bar0);
4750_exit2:
dc66daa9 4751 pci_release_region(pdev, 0);
703da5a1
RV		 4752_exit1:
4753 pci_disable_device(pdev);
4754_exit0:
7dad171c 4755 kfree(ll_config);
703da5a1
RV		 4756 kfree(device_config);
4757 driver_config->config_dev_cnt--;
6cca2003 4758 driver_config->total_dev_cnt--;
703da5a1
RV		 4759 return ret;
4760}
4761
4762/**
4763 * vxge_rem_nic - Free the PCI device
4764 * @pdev: structure containing the PCI related information of the device.
4765 * Description: This function is called by the Pci subsystem to release a
4766 * PCI device and free up all resource held up by the device.
4767 */
2c91308f 4768static void __devexit vxge_remove(struct pci_dev *pdev)
703da5a1 4769{
2c91308f 4770 struct __vxge_hw_device *hldev;
6cca2003
JM		 4771 struct vxgedev *vdev;
4772 int i;
703da5a1 4773
d8ee7071 4774 hldev = pci_get_drvdata(pdev);
703da5a1
RV		 4775 if (hldev == NULL)
4776 return;
2c91308f 4777
6cca2003 4778 vdev = netdev_priv(hldev->ndev);
703da5a1 4779
2c91308f 4780 vxge_debug_entryexit(vdev->level_trace, "%s:%d", __func__, __LINE__);
2c91308f
JM		 4781 vxge_debug_init(vdev->level_trace, "%s : removing PCI device...",
4782 __func__);
703da5a1 4783
6cca2003 4784 for (i = 0; i < vdev->no_of_vpath; i++)
703da5a1 4785 vxge_free_mac_add_list(&vdev->vpaths[i]);
703da5a1 4786
6cca2003
JM		 4787 vxge_device_unregister(hldev);
4788 pci_set_drvdata(pdev, NULL);
4789 /* Do not call pci_disable_sriov here, as it will break child devices */
4790 vxge_hw_device_terminate(hldev);
703da5a1 4791 iounmap(vdev->bar0);
6cca2003
JM		 4792 pci_release_region(pdev, 0);
4793 pci_disable_device(pdev);
4794 driver_config->config_dev_cnt--;
4795 driver_config->total_dev_cnt--;
703da5a1 4796
2c91308f
JM		 4797 vxge_debug_init(vdev->level_trace, "%s:%d Device unregistered",
4798 __func__, __LINE__);
2c91308f
JM		 4799 vxge_debug_entryexit(vdev->level_trace, "%s:%d Exiting...", __func__,
4800 __LINE__);
703da5a1
RV		 4801}
4802
4803static struct pci_error_handlers vxge_err_handler = {
4804 .error_detected = vxge_io_error_detected,
4805 .slot_reset = vxge_io_slot_reset,
4806 .resume = vxge_io_resume,
4807};
4808
4809static struct pci_driver vxge_driver = {
4810 .name = VXGE_DRIVER_NAME,
4811 .id_table = vxge_id_table,
4812 .probe = vxge_probe,
4813 .remove = __devexit_p(vxge_remove),
4814#ifdef CONFIG_PM
4815 .suspend = vxge_pm_suspend,
4816 .resume = vxge_pm_resume,
4817#endif
4818 .err_handler = &vxge_err_handler,
4819};
4820
4821static int __init
4822vxge_starter(void)
4823{
4824 int ret = 0;
703da5a1 4825
75f5e1c6
JP		 4826 pr_info("Copyright(c) 2002-2010 Exar Corp.\n");
4827 pr_info("Driver version: %s\n", DRV_VERSION);
703da5a1
RV		 4828
4829 verify_bandwidth();
4830
4831 driver_config = kzalloc(sizeof(struct vxge_drv_config), GFP_KERNEL);
4832 if (!driver_config)
4833 return -ENOMEM;
4834
4835 ret = pci_register_driver(&vxge_driver);
528f7272
JM		 4836 if (ret) {
4837 kfree(driver_config);
4838 goto err;
4839 }
703da5a1
RV		 4840
4841 if (driver_config->config_dev_cnt &&
4842 (driver_config->config_dev_cnt != driver_config->total_dev_cnt))
4843 vxge_debug_init(VXGE_ERR,
4844 "%s: Configured %d of %d devices",
4845 VXGE_DRIVER_NAME, driver_config->config_dev_cnt,
4846 driver_config->total_dev_cnt);
528f7272 4847err:
703da5a1
RV		 4848 return ret;
4849}
4850
4851static void __exit
4852vxge_closer(void)
4853{
4854 pci_unregister_driver(&vxge_driver);
4855 kfree(driver_config);
4856}
4857module_init(vxge_starter);
4858module_exit(vxge_closer);
Linux 6.x block layer and io_uring tree(s)