projects / linux-2.6-block.git / blame
| Commit | Line | Data |
|---|---|---|
| 93c1edb2 JP |
1 | /* |
| 2 | * drivers/net/ethernet/mellanox/mlxsw/trap.h | |
| 3 | * Copyright (c) 2015 Mellanox Technologies. All rights reserved. | |
| 4 | * Copyright (c) 2015 Elad Raz <eladr@mellanox.com> | |
| 5 | * Copyright (c) 2015 Jiri Pirko <jiri@mellanox.com> | |
| 6 | * Copyright (c) 2015 Ido Schimmel <idosch@mellanox.com> | |
| 7 | * | |
| 8 | * Redistribution and use in source and binary forms, with or without | |
| 9 | * modification, are permitted provided that the following conditions are met: | |
| 10 | * | |
| 11 | * 1. Redistributions of source code must retain the above copyright | |
| 12 | * notice, this list of conditions and the following disclaimer. | |
| 13 | * 2. Redistributions in binary form must reproduce the above copyright | |
| 14 | * notice, this list of conditions and the following disclaimer in the | |
| 15 | * documentation and/or other materials provided with the distribution. | |
| 16 | * 3. Neither the names of the copyright holders nor the names of its | |
| 17 | * contributors may be used to endorse or promote products derived from | |
| 18 | * this software without specific prior written permission. | |
| 19 | * | |
| 20 | * Alternatively, this software may be distributed under the terms of the | |
| 21 | * GNU General Public License ("GPL") version 2 as published by the Free | |
| 22 | * Software Foundation. | |
| 23 | * | |
| 24 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" | |
| 25 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE | |
| 26 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE | |
| 27 | * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE | |
| 28 | * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR | |
| 29 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF | |
| 30 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS | |
| 31 | * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN | |
| 32 | * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) | |
| 33 | * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE | |
| 34 | * POSSIBILITY OF SUCH DAMAGE. | |
| 35 | */ | |
| 36 | #ifndef _MLXSW_TRAP_H | |
| 37 | #define _MLXSW_TRAP_H | |
| 38 | ||
| 39 | enum { | |
| 40 | /* Ethernet EMAD and FDB miss */ | |
| 41 | MLXSW_TRAP_ID_FDB_MC = 0x01, | |
| 42 | MLXSW_TRAP_ID_ETHEMAD = 0x05, | |
| 43 | /* L2 traps for specific packet types */ | |
| 44 | MLXSW_TRAP_ID_STP = 0x10, | |
| 45 | MLXSW_TRAP_ID_LACP = 0x11, | |
| 46 | MLXSW_TRAP_ID_EAPOL = 0x12, | |
| 47 | MLXSW_TRAP_ID_LLDP = 0x13, | |
| 48 | MLXSW_TRAP_ID_MMRP = 0x14, | |
| 49 | MLXSW_TRAP_ID_MVRP = 0x15, | |
| 50 | MLXSW_TRAP_ID_RPVST = 0x16, | |
| 51 | MLXSW_TRAP_ID_DHCP = 0x19, | |
| 52 | MLXSW_TRAP_ID_IGMP_QUERY = 0x30, | |
| 53 | MLXSW_TRAP_ID_IGMP_V1_REPORT = 0x31, | |
| 54 | MLXSW_TRAP_ID_IGMP_V2_REPORT = 0x32, | |
| 55 | MLXSW_TRAP_ID_IGMP_V2_LEAVE = 0x33, | |
| 56 | MLXSW_TRAP_ID_IGMP_V3_REPORT = 0x34, | |
| 7b27ce7b JP |
57 | MLXSW_TRAP_ID_ARPBC = 0x50, |
| 58 | MLXSW_TRAP_ID_ARPUC = 0x51, | |
| c20b8018 ER |
59 | MLXSW_TRAP_ID_MTUERROR = 0x52, |
| 60 | MLXSW_TRAP_ID_TTLERROR = 0x53, | |
| a94a614f | 61 | MLXSW_TRAP_ID_LBERROR = 0x54, |
| c20b8018 | 62 | MLXSW_TRAP_ID_OSPF = 0x55, |
| 7b27ce7b JP |
63 | MLXSW_TRAP_ID_IP2ME = 0x5F, |
| 64 | MLXSW_TRAP_ID_RTR_INGRESS0 = 0x70, | |
| 65 | MLXSW_TRAP_ID_HOST_MISS_IPV4 = 0x90, | |
| 93c1edb2 JP |
66 | |
| 67 | MLXSW_TRAP_ID_MAX = 0x1FF | |
| 68 | }; | |
| 69 | ||
| 70 | enum mlxsw_event_trap_id { | |
| 71 | /* Port Up/Down event generated by hardware */ | |
| 72 | MLXSW_TRAP_ID_PUDE = 0x8, | |
| 73 | }; | |
| 74 | ||
| 75 | #endif /* _MLXSW_TRAP_H */ |