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net/mlx4_en: Cleanup MAC resources on module unload or port stop
[linux-2.6-block.git] / drivers / net / ethernet / mellanox / mlx4 / en_netdev.c
CommitLineData
c27a02cd
YP		 1/*
2 * Copyright (c) 2007 Mellanox Technologies. All rights reserved.
3 *
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
9 *
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
12 * conditions are met:
13 *
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
16 * disclaimer.
17 *
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30 * SOFTWARE.
31 *
32 */
33
34#include <linux/etherdevice.h>
35#include <linux/tcp.h>
36#include <linux/if_vlan.h>
37#include <linux/delay.h>
5a0e3ad6 38#include <linux/slab.h>
1eb8c695
AV		 39#include <linux/hash.h>
40#include <net/ip.h>
c27a02cd
YP		 41
42#include <linux/mlx4/driver.h>
43#include <linux/mlx4/device.h>
44#include <linux/mlx4/cmd.h>
45#include <linux/mlx4/cq.h>
46
47#include "mlx4_en.h"
48#include "en_port.h"
49
d317966b 50int mlx4_en_setup_tc(struct net_device *dev, u8 up)
897d7846 51{
bc6a4744
AV		 52 struct mlx4_en_priv *priv = netdev_priv(dev);
53 int i;
d317966b 54 unsigned int offset = 0;
bc6a4744
AV		 55
56 if (up && up != MLX4_EN_NUM_UP)
897d7846
AV		 57 return -EINVAL;
58
bc6a4744
AV		 59 netdev_set_num_tc(dev, up);
60
61 /* Partition Tx queues evenly amongst UP's */
bc6a4744 62 for (i = 0; i < up; i++) {
d317966b
AV		 63 netdev_set_tc_queue(dev, i, priv->num_tx_rings_p_up, offset);
64 offset += priv->num_tx_rings_p_up;
bc6a4744
AV		 65 }
66
897d7846
AV		 67 return 0;
68}
69
1eb8c695
AV		 70#ifdef CONFIG_RFS_ACCEL
71
72struct mlx4_en_filter {
73 struct list_head next;
74 struct work_struct work;
75
76 __be32 src_ip;
77 __be32 dst_ip;
78 __be16 src_port;
79 __be16 dst_port;
80
81 int rxq_index;
82 struct mlx4_en_priv *priv;
83 u32 flow_id; /* RFS infrastructure id */
84 int id; /* mlx4_en driver id */
85 u64 reg_id; /* Flow steering API id */
86 u8 activated; /* Used to prevent expiry before filter
87 * is attached
88 */
89 struct hlist_node filter_chain;
90};
91
92static void mlx4_en_filter_rfs_expire(struct mlx4_en_priv *priv);
93
94static void mlx4_en_filter_work(struct work_struct *work)
95{
96 struct mlx4_en_filter *filter = container_of(work,
97 struct mlx4_en_filter,
98 work);
99 struct mlx4_en_priv *priv = filter->priv;
100 struct mlx4_spec_list spec_tcp = {
101 .id = MLX4_NET_TRANS_RULE_ID_TCP,
102 {
103 .tcp_udp = {
104 .dst_port = filter->dst_port,
105 .dst_port_msk = (__force __be16)-1,
106 .src_port = filter->src_port,
107 .src_port_msk = (__force __be16)-1,
108 },
109 },
110 };
111 struct mlx4_spec_list spec_ip = {
112 .id = MLX4_NET_TRANS_RULE_ID_IPV4,
113 {
114 .ipv4 = {
115 .dst_ip = filter->dst_ip,
116 .dst_ip_msk = (__force __be32)-1,
117 .src_ip = filter->src_ip,
118 .src_ip_msk = (__force __be32)-1,
119 },
120 },
121 };
122 struct mlx4_spec_list spec_eth = {
123 .id = MLX4_NET_TRANS_RULE_ID_ETH,
124 };
125 struct mlx4_net_trans_rule rule = {
126 .list = LIST_HEAD_INIT(rule.list),
127 .queue_mode = MLX4_NET_TRANS_Q_LIFO,
128 .exclusive = 1,
129 .allow_loopback = 1,
130 .promisc_mode = MLX4_FS_PROMISC_NONE,
131 .port = priv->port,
132 .priority = MLX4_DOMAIN_RFS,
133 };
134 int rc;
1eb8c695
AV		 135 __be64 mac_mask = cpu_to_be64(MLX4_MAC_MASK << 16);
136
137 list_add_tail(&spec_eth.list, &rule.list);
138 list_add_tail(&spec_ip.list, &rule.list);
139 list_add_tail(&spec_tcp.list, &rule.list);
140
1eb8c695 141 rule.qpn = priv->rss_map.qps[filter->rxq_index].qpn;
6bbb6d99 142 memcpy(spec_eth.eth.dst_mac, priv->dev->dev_addr, ETH_ALEN);
1eb8c695
AV		 143 memcpy(spec_eth.eth.dst_mac_msk, &mac_mask, ETH_ALEN);
144
145 filter->activated = 0;
146
147 if (filter->reg_id) {
148 rc = mlx4_flow_detach(priv->mdev->dev, filter->reg_id);
149 if (rc && rc != -ENOENT)
150 en_err(priv, "Error detaching flow. rc = %d\n", rc);
151 }
152
153 rc = mlx4_flow_attach(priv->mdev->dev, &rule, &filter->reg_id);
154 if (rc)
155 en_err(priv, "Error attaching flow. err = %d\n", rc);
156
157 mlx4_en_filter_rfs_expire(priv);
158
159 filter->activated = 1;
160}
161
162static inline struct hlist_head *
163filter_hash_bucket(struct mlx4_en_priv *priv, __be32 src_ip, __be32 dst_ip,
164 __be16 src_port, __be16 dst_port)
165{
166 unsigned long l;
167 int bucket_idx;
168
169 l = (__force unsigned long)src_port |
170 ((__force unsigned long)dst_port << 2);
171 l ^= (__force unsigned long)(src_ip ^ dst_ip);
172
173 bucket_idx = hash_long(l, MLX4_EN_FILTER_HASH_SHIFT);
174
175 return &priv->filter_hash[bucket_idx];
176}
177
178static struct mlx4_en_filter *
179mlx4_en_filter_alloc(struct mlx4_en_priv *priv, int rxq_index, __be32 src_ip,
180 __be32 dst_ip, __be16 src_port, __be16 dst_port,
181 u32 flow_id)
182{
183 struct mlx4_en_filter *filter = NULL;
184
185 filter = kzalloc(sizeof(struct mlx4_en_filter), GFP_ATOMIC);
186 if (!filter)
187 return NULL;
188
189 filter->priv = priv;
190 filter->rxq_index = rxq_index;
191 INIT_WORK(&filter->work, mlx4_en_filter_work);
192
193 filter->src_ip = src_ip;
194 filter->dst_ip = dst_ip;
195 filter->src_port = src_port;
196 filter->dst_port = dst_port;
197
198 filter->flow_id = flow_id;
199
ee64c0ee 200 filter->id = priv->last_filter_id++ % RPS_NO_FILTER;
1eb8c695
AV		 201
202 list_add_tail(&filter->next, &priv->filters);
203 hlist_add_head(&filter->filter_chain,
204 filter_hash_bucket(priv, src_ip, dst_ip, src_port,
205 dst_port));
206
207 return filter;
208}
209
210static void mlx4_en_filter_free(struct mlx4_en_filter *filter)
211{
212 struct mlx4_en_priv *priv = filter->priv;
213 int rc;
214
215 list_del(&filter->next);
216
217 rc = mlx4_flow_detach(priv->mdev->dev, filter->reg_id);
218 if (rc && rc != -ENOENT)
219 en_err(priv, "Error detaching flow. rc = %d\n", rc);
220
221 kfree(filter);
222}
223
224static inline struct mlx4_en_filter *
225mlx4_en_filter_find(struct mlx4_en_priv *priv, __be32 src_ip, __be32 dst_ip,
226 __be16 src_port, __be16 dst_port)
227{
1eb8c695
AV		 228 struct mlx4_en_filter *filter;
229 struct mlx4_en_filter *ret = NULL;
230
b67bfe0d 231 hlist_for_each_entry(filter,
1eb8c695
AV		 232 filter_hash_bucket(priv, src_ip, dst_ip,
233 src_port, dst_port),
234 filter_chain) {
235 if (filter->src_ip == src_ip &&
236 filter->dst_ip == dst_ip &&
237 filter->src_port == src_port &&
238 filter->dst_port == dst_port) {
239 ret = filter;
240 break;
241 }
242 }
243
244 return ret;
245}
246
247static int
248mlx4_en_filter_rfs(struct net_device *net_dev, const struct sk_buff *skb,
249 u16 rxq_index, u32 flow_id)
250{
251 struct mlx4_en_priv *priv = netdev_priv(net_dev);
252 struct mlx4_en_filter *filter;
253 const struct iphdr *ip;
254 const __be16 *ports;
255 __be32 src_ip;
256 __be32 dst_ip;
257 __be16 src_port;
258 __be16 dst_port;
259 int nhoff = skb_network_offset(skb);
260 int ret = 0;
261
262 if (skb->protocol != htons(ETH_P_IP))
263 return -EPROTONOSUPPORT;
264
265 ip = (const struct iphdr *)(skb->data + nhoff);
266 if (ip_is_fragment(ip))
267 return -EPROTONOSUPPORT;
268
269 ports = (const __be16 *)(skb->data + nhoff + 4 * ip->ihl);
270
271 src_ip = ip->saddr;
272 dst_ip = ip->daddr;
273 src_port = ports[0];
274 dst_port = ports[1];
275
276 if (ip->protocol != IPPROTO_TCP)
277 return -EPROTONOSUPPORT;
278
279 spin_lock_bh(&priv->filters_lock);
280 filter = mlx4_en_filter_find(priv, src_ip, dst_ip, src_port, dst_port);
281 if (filter) {
282 if (filter->rxq_index == rxq_index)
283 goto out;
284
285 filter->rxq_index = rxq_index;
286 } else {
287 filter = mlx4_en_filter_alloc(priv, rxq_index,
288 src_ip, dst_ip,
289 src_port, dst_port, flow_id);
290 if (!filter) {
291 ret = -ENOMEM;
292 goto err;
293 }
294 }
295
296 queue_work(priv->mdev->workqueue, &filter->work);
297
298out:
299 ret = filter->id;
300err:
301 spin_unlock_bh(&priv->filters_lock);
302
303 return ret;
304}
305
306void mlx4_en_cleanup_filters(struct mlx4_en_priv *priv,
307 struct mlx4_en_rx_ring *rx_ring)
308{
309 struct mlx4_en_filter *filter, *tmp;
310 LIST_HEAD(del_list);
311
312 spin_lock_bh(&priv->filters_lock);
313 list_for_each_entry_safe(filter, tmp, &priv->filters, next) {
314 list_move(&filter->next, &del_list);
315 hlist_del(&filter->filter_chain);
316 }
317 spin_unlock_bh(&priv->filters_lock);
318
319 list_for_each_entry_safe(filter, tmp, &del_list, next) {
320 cancel_work_sync(&filter->work);
321 mlx4_en_filter_free(filter);
322 }
323}
324
325static void mlx4_en_filter_rfs_expire(struct mlx4_en_priv *priv)
326{
327 struct mlx4_en_filter *filter = NULL, *tmp, *last_filter = NULL;
328 LIST_HEAD(del_list);
329 int i = 0;
330
331 spin_lock_bh(&priv->filters_lock);
332 list_for_each_entry_safe(filter, tmp, &priv->filters, next) {
333 if (i > MLX4_EN_FILTER_EXPIRY_QUOTA)
334 break;
335
336 if (filter->activated &&
337 !work_pending(&filter->work) &&
338 rps_may_expire_flow(priv->dev,
339 filter->rxq_index, filter->flow_id,
340 filter->id)) {
341 list_move(&filter->next, &del_list);
342 hlist_del(&filter->filter_chain);
343 } else
344 last_filter = filter;
345
346 i++;
347 }
348
349 if (last_filter && (&last_filter->next != priv->filters.next))
350 list_move(&priv->filters, &last_filter->next);
351
352 spin_unlock_bh(&priv->filters_lock);
353
354 list_for_each_entry_safe(filter, tmp, &del_list, next)
355 mlx4_en_filter_free(filter);
356}
357#endif
358
8e586137 359static int mlx4_en_vlan_rx_add_vid(struct net_device *dev, unsigned short vid)
c27a02cd
YP		 360{
361 struct mlx4_en_priv *priv = netdev_priv(dev);
362 struct mlx4_en_dev *mdev = priv->mdev;
363 int err;
4c3eb3ca 364 int idx;
c27a02cd 365
f1b553fb 366 en_dbg(HW, priv, "adding VLAN:%d\n", vid);
c27a02cd 367
f1b553fb 368 set_bit(vid, priv->active_vlans);
c27a02cd
YP		 369
370 /* Add VID to port VLAN filter */
371 mutex_lock(&mdev->state_lock);
372 if (mdev->device_up && priv->port_up) {
f1b553fb 373 err = mlx4_SET_VLAN_FLTR(mdev->dev, priv);
c27a02cd 374 if (err)
453a6082 375 en_err(priv, "Failed configuring VLAN filter\n");
c27a02cd 376 }
4c3eb3ca
EC		 377 if (mlx4_register_vlan(mdev->dev, priv->port, vid, &idx))
378 en_err(priv, "failed adding vlan %d\n", vid);
c27a02cd 379 mutex_unlock(&mdev->state_lock);
4c3eb3ca 380
8e586137 381 return 0;
c27a02cd
YP		 382}
383
8e586137 384static int mlx4_en_vlan_rx_kill_vid(struct net_device *dev, unsigned short vid)
c27a02cd
YP		 385{
386 struct mlx4_en_priv *priv = netdev_priv(dev);
387 struct mlx4_en_dev *mdev = priv->mdev;
388 int err;
4c3eb3ca 389 int idx;
c27a02cd 390
f1b553fb 391 en_dbg(HW, priv, "Killing VID:%d\n", vid);
c27a02cd 392
f1b553fb 393 clear_bit(vid, priv->active_vlans);
c27a02cd
YP		 394
395 /* Remove VID from port VLAN filter */
396 mutex_lock(&mdev->state_lock);
4c3eb3ca
EC		 397 if (!mlx4_find_cached_vlan(mdev->dev, priv->port, vid, &idx))
398 mlx4_unregister_vlan(mdev->dev, priv->port, idx);
399 else
400 en_err(priv, "could not find vid %d in cache\n", vid);
401
c27a02cd 402 if (mdev->device_up && priv->port_up) {
f1b553fb 403 err = mlx4_SET_VLAN_FLTR(mdev->dev, priv);
c27a02cd 404 if (err)
453a6082 405 en_err(priv, "Failed configuring VLAN filter\n");
c27a02cd
YP		 406 }
407 mutex_unlock(&mdev->state_lock);
8e586137
JP		 408
409 return 0;
c27a02cd
YP		 410}
411
6bbb6d99
YB		 412static void mlx4_en_u64_to_mac(unsigned char dst_mac[ETH_ALEN + 2], u64 src_mac)
413{
414 unsigned int i;
415 for (i = ETH_ALEN - 1; i; --i) {
416 dst_mac[i] = src_mac & 0xff;
417 src_mac >>= 8;
418 }
419 memset(&dst_mac[ETH_ALEN], 0, 2);
420}
421
16a10ffd
YB		 422static int mlx4_en_uc_steer_add(struct mlx4_en_priv *priv,
423 unsigned char *mac, int *qpn, u64 *reg_id)
424{
425 struct mlx4_en_dev *mdev = priv->mdev;
426 struct mlx4_dev *dev = mdev->dev;
427 int err;
428
429 switch (dev->caps.steering_mode) {
430 case MLX4_STEERING_MODE_B0: {
431 struct mlx4_qp qp;
432 u8 gid[16] = {0};
433
434 qp.qpn = *qpn;
435 memcpy(&gid[10], mac, ETH_ALEN);
436 gid[5] = priv->port;
437
438 err = mlx4_unicast_attach(dev, &qp, gid, 0, MLX4_PROT_ETH);
439 break;
440 }
441 case MLX4_STEERING_MODE_DEVICE_MANAGED: {
442 struct mlx4_spec_list spec_eth = { {NULL} };
443 __be64 mac_mask = cpu_to_be64(MLX4_MAC_MASK << 16);
444
445 struct mlx4_net_trans_rule rule = {
446 .queue_mode = MLX4_NET_TRANS_Q_FIFO,
447 .exclusive = 0,
448 .allow_loopback = 1,
449 .promisc_mode = MLX4_FS_PROMISC_NONE,
450 .priority = MLX4_DOMAIN_NIC,
451 };
452
453 rule.port = priv->port;
454 rule.qpn = *qpn;
455 INIT_LIST_HEAD(&rule.list);
456
457 spec_eth.id = MLX4_NET_TRANS_RULE_ID_ETH;
458 memcpy(spec_eth.eth.dst_mac, mac, ETH_ALEN);
459 memcpy(spec_eth.eth.dst_mac_msk, &mac_mask, ETH_ALEN);
460 list_add_tail(&spec_eth.list, &rule.list);
461
462 err = mlx4_flow_attach(dev, &rule, reg_id);
463 break;
464 }
465 default:
466 return -EINVAL;
467 }
468 if (err)
469 en_warn(priv, "Failed Attaching Unicast\n");
470
471 return err;
472}
473
474static void mlx4_en_uc_steer_release(struct mlx4_en_priv *priv,
475 unsigned char *mac, int qpn, u64 reg_id)
476{
477 struct mlx4_en_dev *mdev = priv->mdev;
478 struct mlx4_dev *dev = mdev->dev;
479
480 switch (dev->caps.steering_mode) {
481 case MLX4_STEERING_MODE_B0: {
482 struct mlx4_qp qp;
483 u8 gid[16] = {0};
484
485 qp.qpn = qpn;
486 memcpy(&gid[10], mac, ETH_ALEN);
487 gid[5] = priv->port;
488
489 mlx4_unicast_detach(dev, &qp, gid, MLX4_PROT_ETH);
490 break;
491 }
492 case MLX4_STEERING_MODE_DEVICE_MANAGED: {
493 mlx4_flow_detach(dev, reg_id);
494 break;
495 }
496 default:
497 en_err(priv, "Invalid steering mode.\n");
498 }
499}
500
501static int mlx4_en_get_qp(struct mlx4_en_priv *priv)
502{
503 struct mlx4_en_dev *mdev = priv->mdev;
504 struct mlx4_dev *dev = mdev->dev;
505 struct mlx4_mac_entry *entry;
506 int index = 0;
507 int err = 0;
508 u64 reg_id;
509 int *qpn = &priv->base_qpn;
510 u64 mac = mlx4_en_mac_to_u64(priv->dev->dev_addr);
511
512 en_dbg(DRV, priv, "Registering MAC: %pM for adding\n",
513 priv->dev->dev_addr);
514 index = mlx4_register_mac(dev, priv->port, mac);
515 if (index < 0) {
516 err = index;
517 en_err(priv, "Failed adding MAC: %pM\n",
518 priv->dev->dev_addr);
519 return err;
520 }
521
522 if (dev->caps.steering_mode == MLX4_STEERING_MODE_A0) {
523 int base_qpn = mlx4_get_base_qpn(dev, priv->port);
524 *qpn = base_qpn + index;
525 return 0;
526 }
527
528 err = mlx4_qp_reserve_range(dev, 1, 1, qpn);
529 en_dbg(DRV, priv, "Reserved qp %d\n", *qpn);
530 if (err) {
531 en_err(priv, "Failed to reserve qp for mac registration\n");
532 goto qp_err;
533 }
534
535 err = mlx4_en_uc_steer_add(priv, priv->dev->dev_addr, qpn, &reg_id);
536 if (err)
537 goto steer_err;
538
539 entry = kmalloc(sizeof(*entry), GFP_KERNEL);
540 if (!entry) {
541 err = -ENOMEM;
542 goto alloc_err;
543 }
544 memcpy(entry->mac, priv->dev->dev_addr, sizeof(entry->mac));
545 entry->reg_id = reg_id;
546
c07cb4b0
YB		 547 hlist_add_head_rcu(&entry->hlist,
548 &priv->mac_hash[entry->mac[MLX4_EN_MAC_HASH_IDX]]);
16a10ffd 549
c07cb4b0 550 return 0;
16a10ffd
YB		 551
552alloc_err:
553 mlx4_en_uc_steer_release(priv, priv->dev->dev_addr, *qpn, reg_id);
554
555steer_err:
556 mlx4_qp_release_range(dev, *qpn, 1);
557
558qp_err:
559 mlx4_unregister_mac(dev, priv->port, mac);
560 return err;
561}
562
563static void mlx4_en_put_qp(struct mlx4_en_priv *priv)
564{
565 struct mlx4_en_dev *mdev = priv->mdev;
566 struct mlx4_dev *dev = mdev->dev;
16a10ffd 567 int qpn = priv->base_qpn;
83a5a6ce 568 u64 mac;
16a10ffd 569
83a5a6ce
YB		 570 if (dev->caps.steering_mode == MLX4_STEERING_MODE_A0) {
571 mac = mlx4_en_mac_to_u64(priv->dev->dev_addr);
572 en_dbg(DRV, priv, "Registering MAC: %pM for deleting\n",
573 priv->dev->dev_addr);
574 mlx4_unregister_mac(dev, priv->port, mac);
575 } else {
c07cb4b0 576 struct mlx4_mac_entry *entry;
b67bfe0d 577 struct hlist_node *tmp;
c07cb4b0 578 struct hlist_head *bucket;
83a5a6ce
YB		 579 unsigned int i;
580
581 for (i = 0; i < MLX4_EN_MAC_HASH_SIZE; ++i) {
582 bucket = &priv->mac_hash[i];
583 hlist_for_each_entry_safe(entry, tmp, bucket, hlist) {
584 mac = mlx4_en_mac_to_u64(entry->mac);
585 en_dbg(DRV, priv, "Registering MAC: %pM for deleting\n",
586 entry->mac);
c07cb4b0
YB		 587 mlx4_en_uc_steer_release(priv, entry->mac,
588 qpn, entry->reg_id);
c07cb4b0 589
83a5a6ce 590 mlx4_unregister_mac(dev, priv->port, mac);
c07cb4b0
YB		 591 hlist_del_rcu(&entry->hlist);
592 kfree_rcu(entry, rcu);
c07cb4b0 593 }
16a10ffd 594 }
83a5a6ce
YB		 595
596 en_dbg(DRV, priv, "Releasing qp: port %d, qpn %d\n",
597 priv->port, qpn);
598 mlx4_qp_release_range(dev, qpn, 1);
599 priv->flags &= ~MLX4_EN_FLAG_FORCE_PROMISC;
16a10ffd
YB		 600 }
601}
602
603static int mlx4_en_replace_mac(struct mlx4_en_priv *priv, int qpn,
90bbb74a 604 unsigned char *new_mac, unsigned char *prev_mac)
16a10ffd
YB		 605{
606 struct mlx4_en_dev *mdev = priv->mdev;
607 struct mlx4_dev *dev = mdev->dev;
16a10ffd
YB		 608 int err = 0;
609 u64 new_mac_u64 = mlx4_en_mac_to_u64(new_mac);
610
611 if (dev->caps.steering_mode != MLX4_STEERING_MODE_A0) {
c07cb4b0
YB		 612 struct hlist_head *bucket;
613 unsigned int mac_hash;
614 struct mlx4_mac_entry *entry;
b67bfe0d 615 struct hlist_node *tmp;
c07cb4b0
YB		 616 u64 prev_mac_u64 = mlx4_en_mac_to_u64(prev_mac);
617
618 bucket = &priv->mac_hash[prev_mac[MLX4_EN_MAC_HASH_IDX]];
b67bfe0d 619 hlist_for_each_entry_safe(entry, tmp, bucket, hlist) {
c07cb4b0
YB		 620 if (ether_addr_equal_64bits(entry->mac, prev_mac)) {
621 mlx4_en_uc_steer_release(priv, entry->mac,
622 qpn, entry->reg_id);
623 mlx4_unregister_mac(dev, priv->port,
624 prev_mac_u64);
625 hlist_del_rcu(&entry->hlist);
626 synchronize_rcu();
627 memcpy(entry->mac, new_mac, ETH_ALEN);
628 entry->reg_id = 0;
629 mac_hash = new_mac[MLX4_EN_MAC_HASH_IDX];
630 hlist_add_head_rcu(&entry->hlist,
631 &priv->mac_hash[mac_hash]);
632 mlx4_register_mac(dev, priv->port, new_mac_u64);
633 err = mlx4_en_uc_steer_add(priv, new_mac,
634 &qpn,
635 &entry->reg_id);
636 return err;
637 }
638 }
639 return -EINVAL;
16a10ffd
YB		 640 }
641
642 return __mlx4_replace_mac(dev, priv->port, qpn, new_mac_u64);
643}
644
e7c1c2c4 645u64 mlx4_en_mac_to_u64(u8 *addr)
c27a02cd
YP		 646{
647 u64 mac = 0;
648 int i;
649
650 for (i = 0; i < ETH_ALEN; i++) {
651 mac <<= 8;
652 mac |= addr[i];
653 }
654 return mac;
655}
656
bfa8ab47 657static int mlx4_en_do_set_mac(struct mlx4_en_priv *priv)
c27a02cd 658{
c27a02cd
YP		 659 int err = 0;
660
c27a02cd
YP		 661 if (priv->port_up) {
662 /* Remove old MAC and insert the new one */
16a10ffd 663 err = mlx4_en_replace_mac(priv, priv->base_qpn,
90bbb74a 664 priv->dev->dev_addr, priv->prev_mac);
c27a02cd 665 if (err)
453a6082 666 en_err(priv, "Failed changing HW MAC address\n");
6bbb6d99
YB		 667 memcpy(priv->prev_mac, priv->dev->dev_addr,
668 sizeof(priv->prev_mac));
c27a02cd 669 } else
48e551ff 670 en_dbg(HW, priv, "Port is down while registering mac, exiting...\n");
c27a02cd 671
bfa8ab47
YB		 672 return err;
673}
674
675static int mlx4_en_set_mac(struct net_device *dev, void *addr)
676{
677 struct mlx4_en_priv *priv = netdev_priv(dev);
678 struct mlx4_en_dev *mdev = priv->mdev;
679 struct sockaddr *saddr = addr;
680 int err;
681
682 if (!is_valid_ether_addr(saddr->sa_data))
683 return -EADDRNOTAVAIL;
684
685 memcpy(dev->dev_addr, saddr->sa_data, ETH_ALEN);
686
687 mutex_lock(&mdev->state_lock);
688 err = mlx4_en_do_set_mac(priv);
c27a02cd 689 mutex_unlock(&mdev->state_lock);
bfa8ab47
YB		 690
691 return err;
c27a02cd
YP		 692}
693
694static void mlx4_en_clear_list(struct net_device *dev)
695{
696 struct mlx4_en_priv *priv = netdev_priv(dev);
6d199937 697 struct mlx4_en_mc_list *tmp, *mc_to_del;
c27a02cd 698
6d199937
YP		 699 list_for_each_entry_safe(mc_to_del, tmp, &priv->mc_list, list) {
700 list_del(&mc_to_del->list);
701 kfree(mc_to_del);
702 }
c27a02cd
YP		 703}
704
705static void mlx4_en_cache_mclist(struct net_device *dev)
706{
707 struct mlx4_en_priv *priv = netdev_priv(dev);
22bedad3 708 struct netdev_hw_addr *ha;
6d199937 709 struct mlx4_en_mc_list *tmp;
ff6e2163 710
0e03567a 711 mlx4_en_clear_list(dev);
6d199937
YP		 712 netdev_for_each_mc_addr(ha, dev) {
713 tmp = kzalloc(sizeof(struct mlx4_en_mc_list), GFP_ATOMIC);
714 if (!tmp) {
6d199937
YP		 715 mlx4_en_clear_list(dev);
716 return;
717 }
718 memcpy(tmp->addr, ha->addr, ETH_ALEN);
719 list_add_tail(&tmp->list, &priv->mc_list);
720 }
c27a02cd
YP		 721}
722
6d199937
YP		 723static void update_mclist_flags(struct mlx4_en_priv *priv,
724 struct list_head *dst,
725 struct list_head *src)
726{
727 struct mlx4_en_mc_list *dst_tmp, *src_tmp, *new_mc;
728 bool found;
729
730 /* Find all the entries that should be removed from dst,
731 * These are the entries that are not found in src
732 */
733 list_for_each_entry(dst_tmp, dst, list) {
734 found = false;
735 list_for_each_entry(src_tmp, src, list) {
736 if (!memcmp(dst_tmp->addr, src_tmp->addr, ETH_ALEN)) {
737 found = true;
738 break;
739 }
740 }
741 if (!found)
742 dst_tmp->action = MCLIST_REM;
743 }
744
745 /* Add entries that exist in src but not in dst
746 * mark them as need to add
747 */
748 list_for_each_entry(src_tmp, src, list) {
749 found = false;
750 list_for_each_entry(dst_tmp, dst, list) {
751 if (!memcmp(dst_tmp->addr, src_tmp->addr, ETH_ALEN)) {
752 dst_tmp->action = MCLIST_NONE;
753 found = true;
754 break;
755 }
756 }
757 if (!found) {
14f8dc49
JP		 758 new_mc = kmemdup(src_tmp,
759 sizeof(struct mlx4_en_mc_list),
6d199937 760 GFP_KERNEL);
14f8dc49 761 if (!new_mc)
6d199937 762 return;
14f8dc49 763
6d199937
YP		 764 new_mc->action = MCLIST_ADD;
765 list_add_tail(&new_mc->list, dst);
766 }
767 }
768}
c27a02cd 769
0eb74fdd 770static void mlx4_en_set_rx_mode(struct net_device *dev)
c27a02cd
YP		 771{
772 struct mlx4_en_priv *priv = netdev_priv(dev);
773
774 if (!priv->port_up)
775 return;
776
0eb74fdd 777 queue_work(priv->mdev->workqueue, &priv->rx_mode_task);
c27a02cd
YP		 778}
779
0eb74fdd
YB		 780static void mlx4_en_set_promisc_mode(struct mlx4_en_priv *priv,
781 struct mlx4_en_dev *mdev)
c27a02cd 782{
c96d97f4 783 int err = 0;
c27a02cd 784
0eb74fdd 785 if (!(priv->flags & MLX4_EN_FLAG_PROMISC)) {
c27a02cd 786 if (netif_msg_rx_status(priv))
0eb74fdd
YB		 787 en_warn(priv, "Entering promiscuous mode\n");
788 priv->flags |= MLX4_EN_FLAG_PROMISC;
c27a02cd 789
0eb74fdd 790 /* Enable promiscouos mode */
c96d97f4 791 switch (mdev->dev->caps.steering_mode) {
592e49dd 792 case MLX4_STEERING_MODE_DEVICE_MANAGED:
0eb74fdd
YB		 793 err = mlx4_flow_steer_promisc_add(mdev->dev,
794 priv->port,
795 priv->base_qpn,
796 MLX4_FS_PROMISC_UPLINK);
592e49dd 797 if (err)
0eb74fdd
YB		 798 en_err(priv, "Failed enabling promiscuous mode\n");
799 priv->flags |= MLX4_EN_FLAG_MC_PROMISC;
592e49dd
HHZ		 800 break;
801
c96d97f4 802 case MLX4_STEERING_MODE_B0:
0eb74fdd
YB		 803 err = mlx4_unicast_promisc_add(mdev->dev,
804 priv->base_qpn,
805 priv->port);
c96d97f4 806 if (err)
0eb74fdd
YB		 807 en_err(priv, "Failed enabling unicast promiscuous mode\n");
808
809 /* Add the default qp number as multicast
810 * promisc
811 */
812 if (!(priv->flags & MLX4_EN_FLAG_MC_PROMISC)) {
813 err = mlx4_multicast_promisc_add(mdev->dev,
814 priv->base_qpn,
815 priv->port);
c96d97f4 816 if (err)
0eb74fdd
YB		 817 en_err(priv, "Failed enabling multicast promiscuous mode\n");
818 priv->flags |= MLX4_EN_FLAG_MC_PROMISC;
c96d97f4
HHZ		 819 }
820 break;
c27a02cd 821
c96d97f4
HHZ		 822 case MLX4_STEERING_MODE_A0:
823 err = mlx4_SET_PORT_qpn_calc(mdev->dev,
824 priv->port,
0eb74fdd
YB		 825 priv->base_qpn,
826 1);
1679200f 827 if (err)
0eb74fdd 828 en_err(priv, "Failed enabling promiscuous mode\n");
c96d97f4 829 break;
1679200f
YP		 830 }
831
0eb74fdd
YB		 832 /* Disable port multicast filter (unconditionally) */
833 err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0,
834 0, MLX4_MCAST_DISABLE);
835 if (err)
836 en_err(priv, "Failed disabling multicast filter\n");
837
838 /* Disable port VLAN filter */
f1b553fb 839 err = mlx4_SET_VLAN_FLTR(mdev->dev, priv);
c27a02cd 840 if (err)
0eb74fdd
YB		 841 en_err(priv, "Failed disabling VLAN filter\n");
842 }
843}
844
845static void mlx4_en_clear_promisc_mode(struct mlx4_en_priv *priv,
846 struct mlx4_en_dev *mdev)
847{
848 int err = 0;
849
850 if (netif_msg_rx_status(priv))
851 en_warn(priv, "Leaving promiscuous mode\n");
852 priv->flags &= ~MLX4_EN_FLAG_PROMISC;
853
854 /* Disable promiscouos mode */
855 switch (mdev->dev->caps.steering_mode) {
856 case MLX4_STEERING_MODE_DEVICE_MANAGED:
857 err = mlx4_flow_steer_promisc_remove(mdev->dev,
858 priv->port,
859 MLX4_FS_PROMISC_UPLINK);
860 if (err)
861 en_err(priv, "Failed disabling promiscuous mode\n");
862 priv->flags &= ~MLX4_EN_FLAG_MC_PROMISC;
863 break;
864
865 case MLX4_STEERING_MODE_B0:
866 err = mlx4_unicast_promisc_remove(mdev->dev,
867 priv->base_qpn,
868 priv->port);
869 if (err)
870 en_err(priv, "Failed disabling unicast promiscuous mode\n");
871 /* Disable Multicast promisc */
872 if (priv->flags & MLX4_EN_FLAG_MC_PROMISC) {
873 err = mlx4_multicast_promisc_remove(mdev->dev,
874 priv->base_qpn,
875 priv->port);
876 if (err)
877 en_err(priv, "Failed disabling multicast promiscuous mode\n");
878 priv->flags &= ~MLX4_EN_FLAG_MC_PROMISC;
879 }
880 break;
881
882 case MLX4_STEERING_MODE_A0:
883 err = mlx4_SET_PORT_qpn_calc(mdev->dev,
884 priv->port,
885 priv->base_qpn, 0);
886 if (err)
887 en_err(priv, "Failed disabling promiscuous mode\n");
888 break;
c27a02cd
YP		 889 }
890
0eb74fdd
YB		 891 /* Enable port VLAN filter */
892 err = mlx4_SET_VLAN_FLTR(mdev->dev, priv);
893 if (err)
894 en_err(priv, "Failed enabling VLAN filter\n");
895}
896
897static void mlx4_en_do_multicast(struct mlx4_en_priv *priv,
898 struct net_device *dev,
899 struct mlx4_en_dev *mdev)
900{
901 struct mlx4_en_mc_list *mclist, *tmp;
902 u64 mcast_addr = 0;
903 u8 mc_list[16] = {0};
904 int err = 0;
905
c27a02cd
YP		 906 /* Enable/disable the multicast filter according to IFF_ALLMULTI */
907 if (dev->flags & IFF_ALLMULTI) {
908 err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0,
909 0, MLX4_MCAST_DISABLE);
910 if (err)
453a6082 911 en_err(priv, "Failed disabling multicast filter\n");
1679200f
YP		 912
913 /* Add the default qp number as multicast promisc */
914 if (!(priv->flags & MLX4_EN_FLAG_MC_PROMISC)) {
c96d97f4 915 switch (mdev->dev->caps.steering_mode) {
592e49dd
HHZ		 916 case MLX4_STEERING_MODE_DEVICE_MANAGED:
917 err = mlx4_flow_steer_promisc_add(mdev->dev,
918 priv->port,
919 priv->base_qpn,
920 MLX4_FS_PROMISC_ALL_MULTI);
921 break;
922
c96d97f4
HHZ		 923 case MLX4_STEERING_MODE_B0:
924 err = mlx4_multicast_promisc_add(mdev->dev,
925 priv->base_qpn,
926 priv->port);
927 break;
928
929 case MLX4_STEERING_MODE_A0:
930 break;
931 }
1679200f
YP		 932 if (err)
933 en_err(priv, "Failed entering multicast promisc mode\n");
934 priv->flags |= MLX4_EN_FLAG_MC_PROMISC;
935 }
c27a02cd 936 } else {
1679200f
YP		 937 /* Disable Multicast promisc */
938 if (priv->flags & MLX4_EN_FLAG_MC_PROMISC) {
c96d97f4 939 switch (mdev->dev->caps.steering_mode) {
592e49dd
HHZ		 940 case MLX4_STEERING_MODE_DEVICE_MANAGED:
941 err = mlx4_flow_steer_promisc_remove(mdev->dev,
942 priv->port,
943 MLX4_FS_PROMISC_ALL_MULTI);
944 break;
945
c96d97f4
HHZ		 946 case MLX4_STEERING_MODE_B0:
947 err = mlx4_multicast_promisc_remove(mdev->dev,
948 priv->base_qpn,
949 priv->port);
950 break;
951
952 case MLX4_STEERING_MODE_A0:
953 break;
954 }
1679200f 955 if (err)
25985edc 956 en_err(priv, "Failed disabling multicast promiscuous mode\n");
1679200f
YP		 957 priv->flags &= ~MLX4_EN_FLAG_MC_PROMISC;
958 }
ff6e2163 959
c27a02cd
YP		 960 err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0,
961 0, MLX4_MCAST_DISABLE);
962 if (err)
453a6082 963 en_err(priv, "Failed disabling multicast filter\n");
c27a02cd
YP		 964
965 /* Flush mcast filter and init it with broadcast address */
966 mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, ETH_BCAST,
967 1, MLX4_MCAST_CONFIG);
968
969 /* Update multicast list - we cache all addresses so they won't
970 * change while HW is updated holding the command semaphor */
dbd501a8 971 netif_addr_lock_bh(dev);
c27a02cd 972 mlx4_en_cache_mclist(dev);
dbd501a8 973 netif_addr_unlock_bh(dev);
6d199937
YP		 974 list_for_each_entry(mclist, &priv->mc_list, list) {
975 mcast_addr = mlx4_en_mac_to_u64(mclist->addr);
c27a02cd
YP		 976 mlx4_SET_MCAST_FLTR(mdev->dev, priv->port,
977 mcast_addr, 0, MLX4_MCAST_CONFIG);
978 }
979 err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0,
980 0, MLX4_MCAST_ENABLE);
981 if (err)
453a6082 982 en_err(priv, "Failed enabling multicast filter\n");
6d199937
YP		 983
984 update_mclist_flags(priv, &priv->curr_list, &priv->mc_list);
985 list_for_each_entry_safe(mclist, tmp, &priv->curr_list, list) {
986 if (mclist->action == MCLIST_REM) {
987 /* detach this address and delete from list */
988 memcpy(&mc_list[10], mclist->addr, ETH_ALEN);
989 mc_list[5] = priv->port;
990 err = mlx4_multicast_detach(mdev->dev,
991 &priv->rss_map.indir_qp,
992 mc_list,
0ff1fb65
HHZ		 993 MLX4_PROT_ETH,
994 mclist->reg_id);
6d199937
YP		 995 if (err)
996 en_err(priv, "Fail to detach multicast address\n");
997
998 /* remove from list */
999 list_del(&mclist->list);
1000 kfree(mclist);
9c64508a 1001 } else if (mclist->action == MCLIST_ADD) {
6d199937
YP		 1002 /* attach the address */
1003 memcpy(&mc_list[10], mclist->addr, ETH_ALEN);
0ff1fb65 1004 /* needed for B0 steering support */
6d199937
YP		 1005 mc_list[5] = priv->port;
1006 err = mlx4_multicast_attach(mdev->dev,
1007 &priv->rss_map.indir_qp,
0ff1fb65
HHZ		 1008 mc_list,
1009 priv->port, 0,
1010 MLX4_PROT_ETH,
1011 &mclist->reg_id);
6d199937
YP		 1012 if (err)
1013 en_err(priv, "Fail to attach multicast address\n");
1014
1015 }
1016 }
c27a02cd 1017 }
0eb74fdd
YB		 1018}
1019
cc5387f7
YB		 1020static void mlx4_en_do_uc_filter(struct mlx4_en_priv *priv,
1021 struct net_device *dev,
1022 struct mlx4_en_dev *mdev)
1023{
1024 struct netdev_hw_addr *ha;
1025 struct mlx4_mac_entry *entry;
b67bfe0d 1026 struct hlist_node *tmp;
cc5387f7
YB		 1027 bool found;
1028 u64 mac;
1029 int err = 0;
1030 struct hlist_head *bucket;
1031 unsigned int i;
1032 int removed = 0;
1033 u32 prev_flags;
1034
1035 /* Note that we do not need to protect our mac_hash traversal with rcu,
1036 * since all modification code is protected by mdev->state_lock
1037 */
1038
1039 /* find what to remove */
1040 for (i = 0; i < MLX4_EN_MAC_HASH_SIZE; ++i) {
1041 bucket = &priv->mac_hash[i];
b67bfe0d 1042 hlist_for_each_entry_safe(entry, tmp, bucket, hlist) {
cc5387f7
YB		 1043 found = false;
1044 netdev_for_each_uc_addr(ha, dev) {
1045 if (ether_addr_equal_64bits(entry->mac,
1046 ha->addr)) {
1047 found = true;
1048 break;
1049 }
1050 }
1051
1052 /* MAC address of the port is not in uc list */
1053 if (ether_addr_equal_64bits(entry->mac, dev->dev_addr))
1054 found = true;
1055
1056 if (!found) {
1057 mac = mlx4_en_mac_to_u64(entry->mac);
1058 mlx4_en_uc_steer_release(priv, entry->mac,
1059 priv->base_qpn,
1060 entry->reg_id);
1061 mlx4_unregister_mac(mdev->dev, priv->port, mac);
1062
1063 hlist_del_rcu(&entry->hlist);
1064 kfree_rcu(entry, rcu);
1065 en_dbg(DRV, priv, "Removed MAC %pM on port:%d\n",
1066 entry->mac, priv->port);
1067 ++removed;
1068 }
1069 }
1070 }
1071
1072 /* if we didn't remove anything, there is no use in trying to add
1073 * again once we are in a forced promisc mode state
1074 */
1075 if ((priv->flags & MLX4_EN_FLAG_FORCE_PROMISC) && 0 == removed)
1076 return;
1077
1078 prev_flags = priv->flags;
1079 priv->flags &= ~MLX4_EN_FLAG_FORCE_PROMISC;
1080
1081 /* find what to add */
1082 netdev_for_each_uc_addr(ha, dev) {
1083 found = false;
1084 bucket = &priv->mac_hash[ha->addr[MLX4_EN_MAC_HASH_IDX]];
b67bfe0d 1085 hlist_for_each_entry(entry, bucket, hlist) {
cc5387f7
YB		 1086 if (ether_addr_equal_64bits(entry->mac, ha->addr)) {
1087 found = true;
1088 break;
1089 }
1090 }
1091
1092 if (!found) {
1093 entry = kmalloc(sizeof(*entry), GFP_KERNEL);
1094 if (!entry) {
1095 en_err(priv, "Failed adding MAC %pM on port:%d (out of memory)\n",
1096 ha->addr, priv->port);
1097 priv->flags |= MLX4_EN_FLAG_FORCE_PROMISC;
1098 break;
1099 }
1100 mac = mlx4_en_mac_to_u64(ha->addr);
1101 memcpy(entry->mac, ha->addr, ETH_ALEN);
1102 err = mlx4_register_mac(mdev->dev, priv->port, mac);
1103 if (err < 0) {
1104 en_err(priv, "Failed registering MAC %pM on port %d: %d\n",
1105 ha->addr, priv->port, err);
1106 kfree(entry);
1107 priv->flags |= MLX4_EN_FLAG_FORCE_PROMISC;
1108 break;
1109 }
1110 err = mlx4_en_uc_steer_add(priv, ha->addr,
1111 &priv->base_qpn,
1112 &entry->reg_id);
1113 if (err) {
1114 en_err(priv, "Failed adding MAC %pM on port %d: %d\n",
1115 ha->addr, priv->port, err);
1116 mlx4_unregister_mac(mdev->dev, priv->port, mac);
1117 kfree(entry);
1118 priv->flags |= MLX4_EN_FLAG_FORCE_PROMISC;
1119 break;
1120 } else {
1121 unsigned int mac_hash;
1122 en_dbg(DRV, priv, "Added MAC %pM on port:%d\n",
1123 ha->addr, priv->port);
1124 mac_hash = ha->addr[MLX4_EN_MAC_HASH_IDX];
1125 bucket = &priv->mac_hash[mac_hash];
1126 hlist_add_head_rcu(&entry->hlist, bucket);
1127 }
1128 }
1129 }
1130
1131 if (priv->flags & MLX4_EN_FLAG_FORCE_PROMISC) {
1132 en_warn(priv, "Forcing promiscuous mode on port:%d\n",
1133 priv->port);
1134 } else if (prev_flags & MLX4_EN_FLAG_FORCE_PROMISC) {
1135 en_warn(priv, "Stop forcing promiscuous mode on port:%d\n",
1136 priv->port);
1137 }
1138}
1139
0eb74fdd
YB		 1140static void mlx4_en_do_set_rx_mode(struct work_struct *work)
1141{
1142 struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv,
1143 rx_mode_task);
1144 struct mlx4_en_dev *mdev = priv->mdev;
1145 struct net_device *dev = priv->dev;
1146
1147 mutex_lock(&mdev->state_lock);
1148 if (!mdev->device_up) {
1149 en_dbg(HW, priv, "Card is not up, ignoring rx mode change.\n");
1150 goto out;
1151 }
1152 if (!priv->port_up) {
1153 en_dbg(HW, priv, "Port is down, ignoring rx mode change.\n");
1154 goto out;
1155 }
1156
1157 if (!netif_carrier_ok(dev)) {
1158 if (!mlx4_en_QUERY_PORT(mdev, priv->port)) {
1159 if (priv->port_state.link_state) {
1160 priv->last_link_state = MLX4_DEV_EVENT_PORT_UP;
1161 netif_carrier_on(dev);
1162 en_dbg(LINK, priv, "Link Up\n");
1163 }
1164 }
1165 }
1166
cc5387f7
YB		 1167 if (dev->priv_flags & IFF_UNICAST_FLT)
1168 mlx4_en_do_uc_filter(priv, dev, mdev);
1169
0eb74fdd 1170 /* Promsicuous mode: disable all filters */
cc5387f7
YB		 1171 if ((dev->flags & IFF_PROMISC) ||
1172 (priv->flags & MLX4_EN_FLAG_FORCE_PROMISC)) {
0eb74fdd
YB		 1173 mlx4_en_set_promisc_mode(priv, mdev);
1174 goto out;
1175 }
1176
1177 /* Not in promiscuous mode */
1178 if (priv->flags & MLX4_EN_FLAG_PROMISC)
1179 mlx4_en_clear_promisc_mode(priv, mdev);
1180
1181 mlx4_en_do_multicast(priv, dev, mdev);
c27a02cd
YP		 1182out:
1183 mutex_unlock(&mdev->state_lock);
1184}
1185
1186#ifdef CONFIG_NET_POLL_CONTROLLER
1187static void mlx4_en_netpoll(struct net_device *dev)
1188{
1189 struct mlx4_en_priv *priv = netdev_priv(dev);
1190 struct mlx4_en_cq *cq;
1191 unsigned long flags;
1192 int i;
1193
1194 for (i = 0; i < priv->rx_ring_num; i++) {
1195 cq = &priv->rx_cq[i];
1196 spin_lock_irqsave(&cq->lock, flags);
1197 napi_synchronize(&cq->napi);
1198 mlx4_en_process_rx_cq(dev, cq, 0);
1199 spin_unlock_irqrestore(&cq->lock, flags);
1200 }
1201}
1202#endif
1203
1204static void mlx4_en_tx_timeout(struct net_device *dev)
1205{
1206 struct mlx4_en_priv *priv = netdev_priv(dev);
1207 struct mlx4_en_dev *mdev = priv->mdev;
1208
1209 if (netif_msg_timer(priv))
453a6082 1210 en_warn(priv, "Tx timeout called on port:%d\n", priv->port);
c27a02cd 1211
1e338db5 1212 priv->port_stats.tx_timeout++;
453a6082 1213 en_dbg(DRV, priv, "Scheduling watchdog\n");
1e338db5 1214 queue_work(mdev->workqueue, &priv->watchdog_task);
c27a02cd
YP		 1215}
1216
1217
1218static struct net_device_stats *mlx4_en_get_stats(struct net_device *dev)
1219{
1220 struct mlx4_en_priv *priv = netdev_priv(dev);
1221
1222 spin_lock_bh(&priv->stats_lock);
1223 memcpy(&priv->ret_stats, &priv->stats, sizeof(priv->stats));
1224 spin_unlock_bh(&priv->stats_lock);
1225
1226 return &priv->ret_stats;
1227}
1228
1229static void mlx4_en_set_default_moderation(struct mlx4_en_priv *priv)
1230{
c27a02cd
YP		 1231 struct mlx4_en_cq *cq;
1232 int i;
1233
1234 /* If we haven't received a specific coalescing setting
98a1708d 1235 * (module param), we set the moderation parameters as follows:
c27a02cd 1236 * - moder_cnt is set to the number of mtu sized packets to
ecfd2ce1 1237 * satisfy our coalescing target.
c27a02cd
YP		 1238 * - moder_time is set to a fixed value.
1239 */
3db36fb2 1240 priv->rx_frames = MLX4_EN_RX_COAL_TARGET;
60b9f9e5 1241 priv->rx_usecs = MLX4_EN_RX_COAL_TIME;
a19a848a
YP		 1242 priv->tx_frames = MLX4_EN_TX_COAL_PKTS;
1243 priv->tx_usecs = MLX4_EN_TX_COAL_TIME;
48e551ff
YB		 1244 en_dbg(INTR, priv, "Default coalesing params for mtu:%d - rx_frames:%d rx_usecs:%d\n",
1245 priv->dev->mtu, priv->rx_frames, priv->rx_usecs);
c27a02cd
YP		 1246
1247 /* Setup cq moderation params */
1248 for (i = 0; i < priv->rx_ring_num; i++) {
1249 cq = &priv->rx_cq[i];
1250 cq->moder_cnt = priv->rx_frames;
1251 cq->moder_time = priv->rx_usecs;
6b4d8d9f
AG		 1252 priv->last_moder_time[i] = MLX4_EN_AUTO_CONF;
1253 priv->last_moder_packets[i] = 0;
1254 priv->last_moder_bytes[i] = 0;
c27a02cd
YP		 1255 }
1256
1257 for (i = 0; i < priv->tx_ring_num; i++) {
1258 cq = &priv->tx_cq[i];
a19a848a
YP		 1259 cq->moder_cnt = priv->tx_frames;
1260 cq->moder_time = priv->tx_usecs;
c27a02cd
YP		 1261 }
1262
1263 /* Reset auto-moderation params */
1264 priv->pkt_rate_low = MLX4_EN_RX_RATE_LOW;
1265 priv->rx_usecs_low = MLX4_EN_RX_COAL_TIME_LOW;
1266 priv->pkt_rate_high = MLX4_EN_RX_RATE_HIGH;
1267 priv->rx_usecs_high = MLX4_EN_RX_COAL_TIME_HIGH;
1268 priv->sample_interval = MLX4_EN_SAMPLE_INTERVAL;
60b9f9e5 1269 priv->adaptive_rx_coal = 1;
c27a02cd 1270 priv->last_moder_jiffies = 0;
c27a02cd 1271 priv->last_moder_tx_packets = 0;
c27a02cd
YP		 1272}
1273
1274static void mlx4_en_auto_moderation(struct mlx4_en_priv *priv)
1275{
1276 unsigned long period = (unsigned long) (jiffies - priv->last_moder_jiffies);
c27a02cd
YP		 1277 struct mlx4_en_cq *cq;
1278 unsigned long packets;
1279 unsigned long rate;
1280 unsigned long avg_pkt_size;
1281 unsigned long rx_packets;
1282 unsigned long rx_bytes;
c27a02cd
YP		 1283 unsigned long rx_pkt_diff;
1284 int moder_time;
6b4d8d9f 1285 int ring, err;
c27a02cd
YP		 1286
1287 if (!priv->adaptive_rx_coal || period < priv->sample_interval * HZ)
1288 return;
1289
6b4d8d9f
AG		 1290 for (ring = 0; ring < priv->rx_ring_num; ring++) {
1291 spin_lock_bh(&priv->stats_lock);
1292 rx_packets = priv->rx_ring[ring].packets;
1293 rx_bytes = priv->rx_ring[ring].bytes;
1294 spin_unlock_bh(&priv->stats_lock);
1295
1296 rx_pkt_diff = ((unsigned long) (rx_packets -
1297 priv->last_moder_packets[ring]));
1298 packets = rx_pkt_diff;
1299 rate = packets * HZ / period;
1300 avg_pkt_size = packets ? ((unsigned long) (rx_bytes -
1301 priv->last_moder_bytes[ring])) / packets : 0;
1302
1303 /* Apply auto-moderation only when packet rate
1304 * exceeds a rate that it matters */
1305 if (rate > (MLX4_EN_RX_RATE_THRESH / priv->rx_ring_num) &&
1306 avg_pkt_size > MLX4_EN_AVG_PKT_SMALL) {
c27a02cd
YP		 1307 if (rate < priv->pkt_rate_low)
1308 moder_time = priv->rx_usecs_low;
1309 else if (rate > priv->pkt_rate_high)
1310 moder_time = priv->rx_usecs_high;
1311 else
1312 moder_time = (rate - priv->pkt_rate_low) *
1313 (priv->rx_usecs_high - priv->rx_usecs_low) /
1314 (priv->pkt_rate_high - priv->pkt_rate_low) +
1315 priv->rx_usecs_low;
6b4d8d9f
AG		 1316 } else {
1317 moder_time = priv->rx_usecs_low;
c27a02cd 1318 }
c27a02cd 1319
6b4d8d9f
AG		 1320 if (moder_time != priv->last_moder_time[ring]) {
1321 priv->last_moder_time[ring] = moder_time;
1322 cq = &priv->rx_cq[ring];
c27a02cd
YP		 1323 cq->moder_time = moder_time;
1324 err = mlx4_en_set_cq_moder(priv, cq);
6b4d8d9f 1325 if (err)
48e551ff
YB		 1326 en_err(priv, "Failed modifying moderation for cq:%d\n",
1327 ring);
c27a02cd 1328 }
6b4d8d9f
AG		 1329 priv->last_moder_packets[ring] = rx_packets;
1330 priv->last_moder_bytes[ring] = rx_bytes;
c27a02cd
YP		 1331 }
1332
c27a02cd
YP		 1333 priv->last_moder_jiffies = jiffies;
1334}
1335
1336static void mlx4_en_do_get_stats(struct work_struct *work)
1337{
bf6aede7 1338 struct delayed_work *delay = to_delayed_work(work);
c27a02cd
YP		 1339 struct mlx4_en_priv *priv = container_of(delay, struct mlx4_en_priv,
1340 stats_task);
1341 struct mlx4_en_dev *mdev = priv->mdev;
1342 int err;
1343
c27a02cd
YP		 1344 mutex_lock(&mdev->state_lock);
1345 if (mdev->device_up) {
2d51837f
EE		 1346 err = mlx4_en_DUMP_ETH_STATS(mdev, priv->port, 0);
1347 if (err)
1348 en_dbg(HW, priv, "Could not update stats\n");
1349
c27a02cd
YP		 1350 if (priv->port_up)
1351 mlx4_en_auto_moderation(priv);
1352
1353 queue_delayed_work(mdev->workqueue, &priv->stats_task, STATS_DELAY);
1354 }
d7e1a487 1355 if (mdev->mac_removed[MLX4_MAX_PORTS + 1 - priv->port]) {
bfa8ab47 1356 mlx4_en_do_set_mac(priv);
d7e1a487
YP		 1357 mdev->mac_removed[MLX4_MAX_PORTS + 1 - priv->port] = 0;
1358 }
c27a02cd
YP		 1359 mutex_unlock(&mdev->state_lock);
1360}
1361
1362static void mlx4_en_linkstate(struct work_struct *work)
1363{
1364 struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv,
1365 linkstate_task);
1366 struct mlx4_en_dev *mdev = priv->mdev;
1367 int linkstate = priv->link_state;
1368
1369 mutex_lock(&mdev->state_lock);
1370 /* If observable port state changed set carrier state and
1371 * report to system log */
1372 if (priv->last_link_state != linkstate) {
1373 if (linkstate == MLX4_DEV_EVENT_PORT_DOWN) {
e5cc44b2 1374 en_info(priv, "Link Down\n");
c27a02cd
YP		 1375 netif_carrier_off(priv->dev);
1376 } else {
e5cc44b2 1377 en_info(priv, "Link Up\n");
c27a02cd
YP		 1378 netif_carrier_on(priv->dev);
1379 }
1380 }
1381 priv->last_link_state = linkstate;
1382 mutex_unlock(&mdev->state_lock);
1383}
1384
1385
18cc42a3 1386int mlx4_en_start_port(struct net_device *dev)
c27a02cd
YP		 1387{
1388 struct mlx4_en_priv *priv = netdev_priv(dev);
1389 struct mlx4_en_dev *mdev = priv->mdev;
1390 struct mlx4_en_cq *cq;
1391 struct mlx4_en_tx_ring *tx_ring;
c27a02cd
YP		 1392 int rx_index = 0;
1393 int tx_index = 0;
c27a02cd
YP		 1394 int err = 0;
1395 int i;
1396 int j;
1679200f 1397 u8 mc_list[16] = {0};
c27a02cd
YP		 1398
1399 if (priv->port_up) {
453a6082 1400 en_dbg(DRV, priv, "start port called while port already up\n");
c27a02cd
YP		 1401 return 0;
1402 }
1403
6d199937
YP		 1404 INIT_LIST_HEAD(&priv->mc_list);
1405 INIT_LIST_HEAD(&priv->curr_list);
0d256c0e
HHZ		 1406 INIT_LIST_HEAD(&priv->ethtool_list);
1407 memset(&priv->ethtool_rules[0], 0,
1408 sizeof(struct ethtool_flow_id) * MAX_NUM_OF_FS_RULES);
6d199937 1409
c27a02cd
YP		 1410 /* Calculate Rx buf size */
1411 dev->mtu = min(dev->mtu, priv->max_mtu);
1412 mlx4_en_calc_rx_buf(dev);
453a6082 1413 en_dbg(DRV, priv, "Rx buf size:%d\n", priv->rx_skb_size);
38aab07c 1414
c27a02cd 1415 /* Configure rx cq's and rings */
38aab07c
YP		 1416 err = mlx4_en_activate_rx_rings(priv);
1417 if (err) {
453a6082 1418 en_err(priv, "Failed to activate RX rings\n");
38aab07c
YP		 1419 return err;
1420 }
c27a02cd
YP		 1421 for (i = 0; i < priv->rx_ring_num; i++) {
1422 cq = &priv->rx_cq[i];
c27a02cd 1423
76532d0c 1424 err = mlx4_en_activate_cq(priv, cq, i);
c27a02cd 1425 if (err) {
453a6082 1426 en_err(priv, "Failed activating Rx CQ\n");
a4233304 1427 goto cq_err;
c27a02cd
YP		 1428 }
1429 for (j = 0; j < cq->size; j++)
1430 cq->buf[j].owner_sr_opcode = MLX4_CQE_OWNER_MASK;
1431 err = mlx4_en_set_cq_moder(priv, cq);
1432 if (err) {
453a6082 1433 en_err(priv, "Failed setting cq moderation parameters");
c27a02cd
YP		 1434 mlx4_en_deactivate_cq(priv, cq);
1435 goto cq_err;
1436 }
1437 mlx4_en_arm_cq(priv, cq);
38aab07c 1438 priv->rx_ring[i].cqn = cq->mcq.cqn;
c27a02cd
YP		 1439 ++rx_index;
1440 }
1441
ffe455ad
EE		 1442 /* Set qp number */
1443 en_dbg(DRV, priv, "Getting qp number for port %d\n", priv->port);
16a10ffd 1444 err = mlx4_en_get_qp(priv);
1679200f 1445 if (err) {
ffe455ad 1446 en_err(priv, "Failed getting eth qp\n");
1679200f
YP		 1447 goto cq_err;
1448 }
1449 mdev->mac_removed[priv->port] = 0;
1450
c27a02cd
YP		 1451 err = mlx4_en_config_rss_steer(priv);
1452 if (err) {
453a6082 1453 en_err(priv, "Failed configuring rss steering\n");
1679200f 1454 goto mac_err;
c27a02cd
YP		 1455 }
1456
cabdc8ee
HHZ		 1457 err = mlx4_en_create_drop_qp(priv);
1458 if (err)
1459 goto rss_err;
1460
c27a02cd
YP		 1461 /* Configure tx cq's and rings */
1462 for (i = 0; i < priv->tx_ring_num; i++) {
1463 /* Configure cq */
1464 cq = &priv->tx_cq[i];
76532d0c 1465 err = mlx4_en_activate_cq(priv, cq, i);
c27a02cd 1466 if (err) {
453a6082 1467 en_err(priv, "Failed allocating Tx CQ\n");
c27a02cd
YP		 1468 goto tx_err;
1469 }
1470 err = mlx4_en_set_cq_moder(priv, cq);
1471 if (err) {
453a6082 1472 en_err(priv, "Failed setting cq moderation parameters");
c27a02cd
YP		 1473 mlx4_en_deactivate_cq(priv, cq);
1474 goto tx_err;
1475 }
453a6082 1476 en_dbg(DRV, priv, "Resetting index of collapsed CQ:%d to -1\n", i);
c27a02cd
YP		 1477 cq->buf->wqe_index = cpu_to_be16(0xffff);
1478
1479 /* Configure ring */
1480 tx_ring = &priv->tx_ring[i];
0e98b523 1481 err = mlx4_en_activate_tx_ring(priv, tx_ring, cq->mcq.cqn,
d317966b 1482 i / priv->num_tx_rings_p_up);
c27a02cd 1483 if (err) {
453a6082 1484 en_err(priv, "Failed allocating Tx ring\n");
c27a02cd
YP		 1485 mlx4_en_deactivate_cq(priv, cq);
1486 goto tx_err;
1487 }
5b263f53 1488 tx_ring->tx_queue = netdev_get_tx_queue(dev, i);
e22979d9
YP		 1489
1490 /* Arm CQ for TX completions */
1491 mlx4_en_arm_cq(priv, cq);
1492
c27a02cd
YP		 1493 /* Set initial ownership of all Tx TXBBs to SW (1) */
1494 for (j = 0; j < tx_ring->buf_size; j += STAMP_STRIDE)
1495 *((u32 *) (tx_ring->buf + j)) = 0xffffffff;
1496 ++tx_index;
1497 }
1498
1499 /* Configure port */
1500 err = mlx4_SET_PORT_general(mdev->dev, priv->port,
1501 priv->rx_skb_size + ETH_FCS_LEN,
d53b93f2
YP		 1502 priv->prof->tx_pause,
1503 priv->prof->tx_ppp,
1504 priv->prof->rx_pause,
1505 priv->prof->rx_ppp);
c27a02cd 1506 if (err) {
48e551ff
YB		 1507 en_err(priv, "Failed setting port general configurations for port %d, with error %d\n",
1508 priv->port, err);
c27a02cd
YP		 1509 goto tx_err;
1510 }
1511 /* Set default qp number */
1512 err = mlx4_SET_PORT_qpn_calc(mdev->dev, priv->port, priv->base_qpn, 0);
1513 if (err) {
453a6082 1514 en_err(priv, "Failed setting default qp numbers\n");
c27a02cd
YP		 1515 goto tx_err;
1516 }
c27a02cd
YP		 1517
1518 /* Init port */
453a6082 1519 en_dbg(HW, priv, "Initializing port\n");
c27a02cd
YP		 1520 err = mlx4_INIT_PORT(mdev->dev, priv->port);
1521 if (err) {
453a6082 1522 en_err(priv, "Failed Initializing port\n");
1679200f 1523 goto tx_err;
c27a02cd
YP		 1524 }
1525
1679200f
YP		 1526 /* Attach rx QP to bradcast address */
1527 memset(&mc_list[10], 0xff, ETH_ALEN);
0ff1fb65 1528 mc_list[5] = priv->port; /* needed for B0 steering support */
1679200f 1529 if (mlx4_multicast_attach(mdev->dev, &priv->rss_map.indir_qp, mc_list,
0ff1fb65
HHZ		 1530 priv->port, 0, MLX4_PROT_ETH,
1531 &priv->broadcast_id))
1679200f
YP		 1532 mlx4_warn(mdev, "Failed Attaching Broadcast\n");
1533
b5845f98
HX		 1534 /* Must redo promiscuous mode setup. */
1535 priv->flags &= ~(MLX4_EN_FLAG_PROMISC | MLX4_EN_FLAG_MC_PROMISC);
1536
c27a02cd 1537 /* Schedule multicast task to populate multicast list */
0eb74fdd 1538 queue_work(mdev->workqueue, &priv->rx_mode_task);
c27a02cd 1539
93ece0c1
EE		 1540 mlx4_set_stats_bitmap(mdev->dev, &priv->stats_bitmap);
1541
c27a02cd 1542 priv->port_up = true;
a11faac7 1543 netif_tx_start_all_queues(dev);
3484aac1
AV		 1544 netif_device_attach(dev);
1545
c27a02cd
YP		 1546 return 0;
1547
c27a02cd
YP		 1548tx_err:
1549 while (tx_index--) {
1550 mlx4_en_deactivate_tx_ring(priv, &priv->tx_ring[tx_index]);
1551 mlx4_en_deactivate_cq(priv, &priv->tx_cq[tx_index]);
1552 }
cabdc8ee
HHZ		 1553 mlx4_en_destroy_drop_qp(priv);
1554rss_err:
c27a02cd 1555 mlx4_en_release_rss_steer(priv);
1679200f 1556mac_err:
16a10ffd 1557 mlx4_en_put_qp(priv);
c27a02cd
YP		 1558cq_err:
1559 while (rx_index--)
1560 mlx4_en_deactivate_cq(priv, &priv->rx_cq[rx_index]);
38aab07c
YP		 1561 for (i = 0; i < priv->rx_ring_num; i++)
1562 mlx4_en_deactivate_rx_ring(priv, &priv->rx_ring[i]);
c27a02cd
YP		 1563
1564 return err; /* need to close devices */
1565}
1566
1567
3484aac1 1568void mlx4_en_stop_port(struct net_device *dev, int detach)
c27a02cd
YP		 1569{
1570 struct mlx4_en_priv *priv = netdev_priv(dev);
1571 struct mlx4_en_dev *mdev = priv->mdev;
6d199937 1572 struct mlx4_en_mc_list *mclist, *tmp;
0d256c0e 1573 struct ethtool_flow_id *flow, *tmp_flow;
c27a02cd 1574 int i;
1679200f 1575 u8 mc_list[16] = {0};
c27a02cd
YP		 1576
1577 if (!priv->port_up) {
453a6082 1578 en_dbg(DRV, priv, "stop port called while port already down\n");
c27a02cd
YP		 1579 return;
1580 }
c27a02cd
YP		 1581
1582 /* Synchronize with tx routine */
1583 netif_tx_lock_bh(dev);
3484aac1
AV		 1584 if (detach)
1585 netif_device_detach(dev);
3c05f5ef 1586 netif_tx_stop_all_queues(dev);
c27a02cd
YP		 1587 netif_tx_unlock_bh(dev);
1588
3484aac1
AV		 1589 netif_tx_disable(dev);
1590
7c287380 1591 /* Set port as not active */
3c05f5ef 1592 priv->port_up = false;
c27a02cd 1593
db0e7cba
AY		 1594 /* Promsicuous mode */
1595 if (mdev->dev->caps.steering_mode ==
1596 MLX4_STEERING_MODE_DEVICE_MANAGED) {
1597 priv->flags &= ~(MLX4_EN_FLAG_PROMISC |
1598 MLX4_EN_FLAG_MC_PROMISC);
1599 mlx4_flow_steer_promisc_remove(mdev->dev,
1600 priv->port,
1601 MLX4_FS_PROMISC_UPLINK);
1602 mlx4_flow_steer_promisc_remove(mdev->dev,
1603 priv->port,
1604 MLX4_FS_PROMISC_ALL_MULTI);
1605 } else if (priv->flags & MLX4_EN_FLAG_PROMISC) {
1606 priv->flags &= ~MLX4_EN_FLAG_PROMISC;
1607
1608 /* Disable promiscouos mode */
1609 mlx4_unicast_promisc_remove(mdev->dev, priv->base_qpn,
1610 priv->port);
1611
1612 /* Disable Multicast promisc */
1613 if (priv->flags & MLX4_EN_FLAG_MC_PROMISC) {
1614 mlx4_multicast_promisc_remove(mdev->dev, priv->base_qpn,
1615 priv->port);
1616 priv->flags &= ~MLX4_EN_FLAG_MC_PROMISC;
1617 }
1618 }
1619
1679200f
YP		 1620 /* Detach All multicasts */
1621 memset(&mc_list[10], 0xff, ETH_ALEN);
0ff1fb65 1622 mc_list[5] = priv->port; /* needed for B0 steering support */
1679200f 1623 mlx4_multicast_detach(mdev->dev, &priv->rss_map.indir_qp, mc_list,
0ff1fb65 1624 MLX4_PROT_ETH, priv->broadcast_id);
6d199937
YP		 1625 list_for_each_entry(mclist, &priv->curr_list, list) {
1626 memcpy(&mc_list[10], mclist->addr, ETH_ALEN);
1679200f
YP		 1627 mc_list[5] = priv->port;
1628 mlx4_multicast_detach(mdev->dev, &priv->rss_map.indir_qp,
0ff1fb65 1629 mc_list, MLX4_PROT_ETH, mclist->reg_id);
1679200f
YP		 1630 }
1631 mlx4_en_clear_list(dev);
6d199937
YP		 1632 list_for_each_entry_safe(mclist, tmp, &priv->curr_list, list) {
1633 list_del(&mclist->list);
1634 kfree(mclist);
1635 }
1636
1679200f
YP		 1637 /* Flush multicast filter */
1638 mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0, 1, MLX4_MCAST_CONFIG);
1639
cabdc8ee
HHZ		 1640 mlx4_en_destroy_drop_qp(priv);
1641
c27a02cd
YP		 1642 /* Free TX Rings */
1643 for (i = 0; i < priv->tx_ring_num; i++) {
1644 mlx4_en_deactivate_tx_ring(priv, &priv->tx_ring[i]);
1645 mlx4_en_deactivate_cq(priv, &priv->tx_cq[i]);
1646 }
1647 msleep(10);
1648
1649 for (i = 0; i < priv->tx_ring_num; i++)
1650 mlx4_en_free_tx_buf(dev, &priv->tx_ring[i]);
1651
1652 /* Free RSS qps */
1653 mlx4_en_release_rss_steer(priv);
1654
ffe455ad 1655 /* Unregister Mac address for the port */
16a10ffd 1656 mlx4_en_put_qp(priv);
955154fa
MB		 1657 if (!(mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAGS2_REASSIGN_MAC_EN))
1658 mdev->mac_removed[priv->port] = 1;
ffe455ad 1659
0d256c0e
HHZ		 1660 /* Remove flow steering rules for the port*/
1661 if (mdev->dev->caps.steering_mode ==
1662 MLX4_STEERING_MODE_DEVICE_MANAGED) {
1663 ASSERT_RTNL();
1664 list_for_each_entry_safe(flow, tmp_flow,
1665 &priv->ethtool_list, list) {
1666 mlx4_flow_detach(mdev->dev, flow->id);
1667 list_del(&flow->list);
1668 }
1669 }
1670
c27a02cd
YP		 1671 /* Free RX Rings */
1672 for (i = 0; i < priv->rx_ring_num; i++) {
1673 mlx4_en_deactivate_rx_ring(priv, &priv->rx_ring[i]);
1674 while (test_bit(NAPI_STATE_SCHED, &priv->rx_cq[i].napi.state))
1675 msleep(1);
1676 mlx4_en_deactivate_cq(priv, &priv->rx_cq[i]);
1677 }
7c287380
YP		 1678
1679 /* close port*/
1680 mlx4_CLOSE_PORT(mdev->dev, priv->port);
c27a02cd
YP		 1681}
1682
1683static void mlx4_en_restart(struct work_struct *work)
1684{
1685 struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv,
1686 watchdog_task);
1687 struct mlx4_en_dev *mdev = priv->mdev;
1688 struct net_device *dev = priv->dev;
1689
453a6082 1690 en_dbg(DRV, priv, "Watchdog task called for port %d\n", priv->port);
1e338db5
YP		 1691
1692 mutex_lock(&mdev->state_lock);
1693 if (priv->port_up) {
3484aac1 1694 mlx4_en_stop_port(dev, 1);
1e338db5 1695 if (mlx4_en_start_port(dev))
453a6082 1696 en_err(priv, "Failed restarting port %d\n", priv->port);
1e338db5
YP		 1697 }
1698 mutex_unlock(&mdev->state_lock);
c27a02cd
YP		 1699}
1700
b477ba62 1701static void mlx4_en_clear_stats(struct net_device *dev)
c27a02cd
YP		 1702{
1703 struct mlx4_en_priv *priv = netdev_priv(dev);
1704 struct mlx4_en_dev *mdev = priv->mdev;
1705 int i;
c27a02cd 1706
c27a02cd 1707 if (mlx4_en_DUMP_ETH_STATS(mdev, priv->port, 1))
453a6082 1708 en_dbg(HW, priv, "Failed dumping statistics\n");
c27a02cd
YP		 1709
1710 memset(&priv->stats, 0, sizeof(priv->stats));
1711 memset(&priv->pstats, 0, sizeof(priv->pstats));
b477ba62
EE		 1712 memset(&priv->pkstats, 0, sizeof(priv->pkstats));
1713 memset(&priv->port_stats, 0, sizeof(priv->port_stats));
c27a02cd
YP		 1714
1715 for (i = 0; i < priv->tx_ring_num; i++) {
1716 priv->tx_ring[i].bytes = 0;
1717 priv->tx_ring[i].packets = 0;
b477ba62 1718 priv->tx_ring[i].tx_csum = 0;
c27a02cd
YP		 1719 }
1720 for (i = 0; i < priv->rx_ring_num; i++) {
1721 priv->rx_ring[i].bytes = 0;
1722 priv->rx_ring[i].packets = 0;
b477ba62
EE		 1723 priv->rx_ring[i].csum_ok = 0;
1724 priv->rx_ring[i].csum_none = 0;
c27a02cd 1725 }
b477ba62
EE		 1726}
1727
1728static int mlx4_en_open(struct net_device *dev)
1729{
1730 struct mlx4_en_priv *priv = netdev_priv(dev);
1731 struct mlx4_en_dev *mdev = priv->mdev;
1732 int err = 0;
1733
1734 mutex_lock(&mdev->state_lock);
1735
1736 if (!mdev->device_up) {
1737 en_err(priv, "Cannot open - device down/disabled\n");
1738 err = -EBUSY;
1739 goto out;
1740 }
1741
1742 /* Reset HW statistics and SW counters */
1743 mlx4_en_clear_stats(dev);
c27a02cd 1744
c27a02cd
YP		 1745 err = mlx4_en_start_port(dev);
1746 if (err)
453a6082 1747 en_err(priv, "Failed starting port:%d\n", priv->port);
c27a02cd
YP		 1748
1749out:
1750 mutex_unlock(&mdev->state_lock);
1751 return err;
1752}
1753
1754
1755static int mlx4_en_close(struct net_device *dev)
1756{
1757 struct mlx4_en_priv *priv = netdev_priv(dev);
1758 struct mlx4_en_dev *mdev = priv->mdev;
1759
453a6082 1760 en_dbg(IFDOWN, priv, "Close port called\n");
c27a02cd
YP		 1761
1762 mutex_lock(&mdev->state_lock);
1763
3484aac1 1764 mlx4_en_stop_port(dev, 0);
c27a02cd
YP		 1765 netif_carrier_off(dev);
1766
1767 mutex_unlock(&mdev->state_lock);
1768 return 0;
1769}
1770
fe0af03c 1771void mlx4_en_free_resources(struct mlx4_en_priv *priv)
c27a02cd
YP		 1772{
1773 int i;
1774
1eb8c695
AV		 1775#ifdef CONFIG_RFS_ACCEL
1776 free_irq_cpu_rmap(priv->dev->rx_cpu_rmap);
1777 priv->dev->rx_cpu_rmap = NULL;
1778#endif
1779
c27a02cd
YP		 1780 for (i = 0; i < priv->tx_ring_num; i++) {
1781 if (priv->tx_ring[i].tx_info)
1782 mlx4_en_destroy_tx_ring(priv, &priv->tx_ring[i]);
1783 if (priv->tx_cq[i].buf)
fe0af03c 1784 mlx4_en_destroy_cq(priv, &priv->tx_cq[i]);
c27a02cd
YP		 1785 }
1786
1787 for (i = 0; i < priv->rx_ring_num; i++) {
1788 if (priv->rx_ring[i].rx_info)
68355f71
TLSC		 1789 mlx4_en_destroy_rx_ring(priv, &priv->rx_ring[i],
1790 priv->prof->rx_ring_size, priv->stride);
c27a02cd 1791 if (priv->rx_cq[i].buf)
fe0af03c 1792 mlx4_en_destroy_cq(priv, &priv->rx_cq[i]);
c27a02cd 1793 }
044ca2a5
YP		 1794
1795 if (priv->base_tx_qpn) {
1796 mlx4_qp_release_range(priv->mdev->dev, priv->base_tx_qpn, priv->tx_ring_num);
1797 priv->base_tx_qpn = 0;
1798 }
c27a02cd
YP		 1799}
1800
18cc42a3 1801int mlx4_en_alloc_resources(struct mlx4_en_priv *priv)
c27a02cd 1802{
c27a02cd
YP		 1803 struct mlx4_en_port_profile *prof = priv->prof;
1804 int i;
044ca2a5 1805 int err;
87a5c389 1806
044ca2a5 1807 err = mlx4_qp_reserve_range(priv->mdev->dev, priv->tx_ring_num, 256, &priv->base_tx_qpn);
87a5c389
YP		 1808 if (err) {
1809 en_err(priv, "failed reserving range for TX rings\n");
1810 return err;
1811 }
c27a02cd
YP		 1812
1813 /* Create tx Rings */
1814 for (i = 0; i < priv->tx_ring_num; i++) {
1815 if (mlx4_en_create_cq(priv, &priv->tx_cq[i],
1816 prof->tx_ring_size, i, TX))
1817 goto err;
1818
044ca2a5 1819 if (mlx4_en_create_tx_ring(priv, &priv->tx_ring[i], priv->base_tx_qpn + i,
c27a02cd
YP		 1820 prof->tx_ring_size, TXBB_SIZE))
1821 goto err;
1822 }
1823
1824 /* Create rx Rings */
1825 for (i = 0; i < priv->rx_ring_num; i++) {
1826 if (mlx4_en_create_cq(priv, &priv->rx_cq[i],
1827 prof->rx_ring_size, i, RX))
1828 goto err;
1829
1830 if (mlx4_en_create_rx_ring(priv, &priv->rx_ring[i],
1831 prof->rx_ring_size, priv->stride))
1832 goto err;
1833 }
1834
1eb8c695 1835#ifdef CONFIG_RFS_ACCEL
37706996 1836 priv->dev->rx_cpu_rmap = alloc_irq_cpu_rmap(priv->mdev->dev->caps.comp_pool);
1eb8c695
AV		 1837 if (!priv->dev->rx_cpu_rmap)
1838 goto err;
1eb8c695
AV		 1839#endif
1840
c27a02cd
YP		 1841 return 0;
1842
1843err:
453a6082 1844 en_err(priv, "Failed to allocate NIC resources\n");
c27a02cd
YP		 1845 return -ENOMEM;
1846}
1847
1848
1849void mlx4_en_destroy_netdev(struct net_device *dev)
1850{
1851 struct mlx4_en_priv *priv = netdev_priv(dev);
1852 struct mlx4_en_dev *mdev = priv->mdev;
1853
453a6082 1854 en_dbg(DRV, priv, "Destroying netdev on port:%d\n", priv->port);
c27a02cd
YP		 1855
1856 /* Unregister device - this will close the port if it was up */
1857 if (priv->registered)
1858 unregister_netdev(dev);
1859
1860 if (priv->allocated)
1861 mlx4_free_hwq_res(mdev->dev, &priv->res, MLX4_EN_PAGE_SIZE);
1862
1863 cancel_delayed_work(&priv->stats_task);
c27a02cd
YP		 1864 /* flush any pending task for this netdev */
1865 flush_workqueue(mdev->workqueue);
1866
1867 /* Detach the netdev so tasks would not attempt to access it */
1868 mutex_lock(&mdev->state_lock);
1869 mdev->pndev[priv->port] = NULL;
1870 mutex_unlock(&mdev->state_lock);
1871
fe0af03c 1872 mlx4_en_free_resources(priv);
564c274c 1873
bc6a4744
AV		 1874 kfree(priv->tx_ring);
1875 kfree(priv->tx_cq);
1876
c27a02cd
YP		 1877 free_netdev(dev);
1878}
1879
1880static int mlx4_en_change_mtu(struct net_device *dev, int new_mtu)
1881{
1882 struct mlx4_en_priv *priv = netdev_priv(dev);
1883 struct mlx4_en_dev *mdev = priv->mdev;
1884 int err = 0;
1885
453a6082 1886 en_dbg(DRV, priv, "Change MTU called - current:%d new:%d\n",
c27a02cd
YP		 1887 dev->mtu, new_mtu);
1888
1889 if ((new_mtu < MLX4_EN_MIN_MTU) || (new_mtu > priv->max_mtu)) {
453a6082 1890 en_err(priv, "Bad MTU size:%d.\n", new_mtu);
c27a02cd
YP		 1891 return -EPERM;
1892 }
1893 dev->mtu = new_mtu;
1894
1895 if (netif_running(dev)) {
1896 mutex_lock(&mdev->state_lock);
1897 if (!mdev->device_up) {
1898 /* NIC is probably restarting - let watchdog task reset
1899 * the port */
453a6082 1900 en_dbg(DRV, priv, "Change MTU called with card down!?\n");
c27a02cd 1901 } else {
3484aac1 1902 mlx4_en_stop_port(dev, 1);
c27a02cd
YP		 1903 err = mlx4_en_start_port(dev);
1904 if (err) {
453a6082 1905 en_err(priv, "Failed restarting port:%d\n",
c27a02cd
YP		 1906 priv->port);
1907 queue_work(mdev->workqueue, &priv->watchdog_task);
1908 }
1909 }
1910 mutex_unlock(&mdev->state_lock);
1911 }
1912 return 0;
1913}
1914
60d6fe99
AV		 1915static int mlx4_en_set_features(struct net_device *netdev,
1916 netdev_features_t features)
1917{
1918 struct mlx4_en_priv *priv = netdev_priv(netdev);
1919
1920 if (features & NETIF_F_LOOPBACK)
1921 priv->ctrl_flags |= cpu_to_be32(MLX4_WQE_CTRL_FORCE_LOOPBACK);
1922 else
1923 priv->ctrl_flags &=
1924 cpu_to_be32(~MLX4_WQE_CTRL_FORCE_LOOPBACK);
1925
79aeaccd
YB		 1926 mlx4_en_update_loopback_state(netdev, features);
1927
60d6fe99
AV		 1928 return 0;
1929
1930}
1931
0ccddcd1
YB		 1932static int mlx4_en_fdb_add(struct ndmsg *ndm, struct nlattr *tb[],
1933 struct net_device *dev,
1934 const unsigned char *addr, u16 flags)
1935{
1936 struct mlx4_en_priv *priv = netdev_priv(dev);
1937 struct mlx4_dev *mdev = priv->mdev->dev;
1938 int err;
1939
1940 if (!mlx4_is_mfunc(mdev))
1941 return -EOPNOTSUPP;
1942
1943 /* Hardware does not support aging addresses, allow only
1944 * permanent addresses if ndm_state is given
1945 */
1946 if (ndm->ndm_state && !(ndm->ndm_state & NUD_PERMANENT)) {
1947 en_info(priv, "Add FDB only supports static addresses\n");
1948 return -EINVAL;
1949 }
1950
1951 if (is_unicast_ether_addr(addr) || is_link_local_ether_addr(addr))
1952 err = dev_uc_add_excl(dev, addr);
1953 else if (is_multicast_ether_addr(addr))
1954 err = dev_mc_add_excl(dev, addr);
1955 else
1956 err = -EINVAL;
1957
1958 /* Only return duplicate errors if NLM_F_EXCL is set */
1959 if (err == -EEXIST && !(flags & NLM_F_EXCL))
1960 err = 0;
1961
1962 return err;
1963}
1964
1965static int mlx4_en_fdb_del(struct ndmsg *ndm,
1690be63 1966 struct nlattr *tb[],
0ccddcd1
YB		 1967 struct net_device *dev,
1968 const unsigned char *addr)
1969{
1970 struct mlx4_en_priv *priv = netdev_priv(dev);
1971 struct mlx4_dev *mdev = priv->mdev->dev;
1972 int err;
1973
1974 if (!mlx4_is_mfunc(mdev))
1975 return -EOPNOTSUPP;
1976
1977 if (ndm->ndm_state && !(ndm->ndm_state & NUD_PERMANENT)) {
1978 en_info(priv, "Del FDB only supports static addresses\n");
1979 return -EINVAL;
1980 }
1981
1982 if (is_unicast_ether_addr(addr) || is_link_local_ether_addr(addr))
1983 err = dev_uc_del(dev, addr);
1984 else if (is_multicast_ether_addr(addr))
1985 err = dev_mc_del(dev, addr);
1986 else
1987 err = -EINVAL;
1988
1989 return err;
1990}
1991
1992static int mlx4_en_fdb_dump(struct sk_buff *skb,
1993 struct netlink_callback *cb,
1994 struct net_device *dev, int idx)
1995{
1996 struct mlx4_en_priv *priv = netdev_priv(dev);
1997 struct mlx4_dev *mdev = priv->mdev->dev;
1998
1999 if (mlx4_is_mfunc(mdev))
2000 idx = ndo_dflt_fdb_dump(skb, cb, dev, idx);
2001
2002 return idx;
2003}
2004
3addc568
SH		 2005static const struct net_device_ops mlx4_netdev_ops = {
2006 .ndo_open = mlx4_en_open,
2007 .ndo_stop = mlx4_en_close,
2008 .ndo_start_xmit = mlx4_en_xmit,
f813cad8 2009 .ndo_select_queue = mlx4_en_select_queue,
3addc568 2010 .ndo_get_stats = mlx4_en_get_stats,
0eb74fdd 2011 .ndo_set_rx_mode = mlx4_en_set_rx_mode,
3addc568 2012 .ndo_set_mac_address = mlx4_en_set_mac,
52255bbe 2013 .ndo_validate_addr = eth_validate_addr,
3addc568
SH		 2014 .ndo_change_mtu = mlx4_en_change_mtu,
2015 .ndo_tx_timeout = mlx4_en_tx_timeout,
3addc568
SH		 2016 .ndo_vlan_rx_add_vid = mlx4_en_vlan_rx_add_vid,
2017 .ndo_vlan_rx_kill_vid = mlx4_en_vlan_rx_kill_vid,
2018#ifdef CONFIG_NET_POLL_CONTROLLER
2019 .ndo_poll_controller = mlx4_en_netpoll,
2020#endif
60d6fe99 2021 .ndo_set_features = mlx4_en_set_features,
897d7846 2022 .ndo_setup_tc = mlx4_en_setup_tc,
1eb8c695
AV		 2023#ifdef CONFIG_RFS_ACCEL
2024 .ndo_rx_flow_steer = mlx4_en_filter_rfs,
2025#endif
0ccddcd1
YB		 2026 .ndo_fdb_add = mlx4_en_fdb_add,
2027 .ndo_fdb_del = mlx4_en_fdb_del,
2028 .ndo_fdb_dump = mlx4_en_fdb_dump,
3addc568
SH		 2029};
2030
c27a02cd
YP		 2031int mlx4_en_init_netdev(struct mlx4_en_dev *mdev, int port,
2032 struct mlx4_en_port_profile *prof)
2033{
2034 struct net_device *dev;
2035 struct mlx4_en_priv *priv;
c07cb4b0 2036 int i;
c27a02cd
YP		 2037 int err;
2038
f1593d22 2039 dev = alloc_etherdev_mqs(sizeof(struct mlx4_en_priv),
d317966b 2040 MAX_TX_RINGS, MAX_RX_RINGS);
41de8d4c 2041 if (dev == NULL)
c27a02cd 2042 return -ENOMEM;
c27a02cd 2043
d317966b
AV		 2044 netif_set_real_num_tx_queues(dev, prof->tx_ring_num);
2045 netif_set_real_num_rx_queues(dev, prof->rx_ring_num);
2046
c27a02cd 2047 SET_NETDEV_DEV(dev, &mdev->dev->pdev->dev);
741a00be 2048 dev->dev_id = port - 1;
c27a02cd
YP		 2049
2050 /*
2051 * Initialize driver private data
2052 */
2053
2054 priv = netdev_priv(dev);
2055 memset(priv, 0, sizeof(struct mlx4_en_priv));
2056 priv->dev = dev;
2057 priv->mdev = mdev;
ebf8c9aa 2058 priv->ddev = &mdev->pdev->dev;
c27a02cd
YP		 2059 priv->prof = prof;
2060 priv->port = port;
2061 priv->port_up = false;
c27a02cd 2062 priv->flags = prof->flags;
60d6fe99
AV		 2063 priv->ctrl_flags = cpu_to_be32(MLX4_WQE_CTRL_CQ_UPDATE |
2064 MLX4_WQE_CTRL_SOLICITED);
d317966b 2065 priv->num_tx_rings_p_up = mdev->profile.num_tx_rings_p_up;
c27a02cd 2066 priv->tx_ring_num = prof->tx_ring_num;
d317966b
AV		 2067
2068 priv->tx_ring = kzalloc(sizeof(struct mlx4_en_tx_ring) * MAX_TX_RINGS,
2069 GFP_KERNEL);
bc6a4744
AV		 2070 if (!priv->tx_ring) {
2071 err = -ENOMEM;
2072 goto out;
2073 }
427a9625 2074 priv->tx_cq = kzalloc(sizeof(struct mlx4_en_cq) * MAX_TX_RINGS,
d317966b 2075 GFP_KERNEL);
bc6a4744
AV		 2076 if (!priv->tx_cq) {
2077 err = -ENOMEM;
2078 goto out;
2079 }
c27a02cd 2080 priv->rx_ring_num = prof->rx_ring_num;
08ff3235 2081 priv->cqe_factor = (mdev->dev->caps.cqe_size == 64) ? 1 : 0;
c27a02cd
YP		 2082 priv->mac_index = -1;
2083 priv->msg_enable = MLX4_EN_MSG_LEVEL;
2084 spin_lock_init(&priv->stats_lock);
0eb74fdd 2085 INIT_WORK(&priv->rx_mode_task, mlx4_en_do_set_rx_mode);
c27a02cd
YP		 2086 INIT_WORK(&priv->watchdog_task, mlx4_en_restart);
2087 INIT_WORK(&priv->linkstate_task, mlx4_en_linkstate);
2088 INIT_DELAYED_WORK(&priv->stats_task, mlx4_en_do_get_stats);
564c274c
AV		 2089#ifdef CONFIG_MLX4_EN_DCB
2090 if (!mlx4_is_slave(priv->mdev->dev))
2091 dev->dcbnl_ops = &mlx4_en_dcbnl_ops;
2092#endif
c27a02cd 2093
c07cb4b0
YB		 2094 for (i = 0; i < MLX4_EN_MAC_HASH_SIZE; ++i)
2095 INIT_HLIST_HEAD(&priv->mac_hash[i]);
16a10ffd 2096
c27a02cd
YP		 2097 /* Query for default mac and max mtu */
2098 priv->max_mtu = mdev->dev->caps.eth_mtu_cap[priv->port];
6bbb6d99
YB		 2099
2100 /* Set default MAC */
2101 dev->addr_len = ETH_ALEN;
2102 mlx4_en_u64_to_mac(dev->dev_addr, mdev->dev->caps.def_mac[priv->port]);
2103 if (!is_valid_ether_addr(dev->dev_addr)) {
2104 en_err(priv, "Port: %d, invalid mac burned: %pM, quiting\n",
2105 priv->port, dev->dev_addr);
c27a02cd
YP		 2106 err = -EINVAL;
2107 goto out;
2108 }
2109
6bbb6d99
YB		 2110 memcpy(priv->prev_mac, dev->dev_addr, sizeof(priv->prev_mac));
2111
c27a02cd
YP		 2112 priv->stride = roundup_pow_of_two(sizeof(struct mlx4_en_rx_desc) +
2113 DS_SIZE * MLX4_EN_MAX_RX_FRAGS);
2114 err = mlx4_en_alloc_resources(priv);
2115 if (err)
2116 goto out;
2117
78fb2de7
AV		 2118#ifdef CONFIG_RFS_ACCEL
2119 INIT_LIST_HEAD(&priv->filters);
2120 spin_lock_init(&priv->filters_lock);
2121#endif
2122
c27a02cd
YP		 2123 /* Allocate page for receive rings */
2124 err = mlx4_alloc_hwq_res(mdev->dev, &priv->res,
2125 MLX4_EN_PAGE_SIZE, MLX4_EN_PAGE_SIZE);
2126 if (err) {
453a6082 2127 en_err(priv, "Failed to allocate page for rx qps\n");
c27a02cd
YP		 2128 goto out;
2129 }
2130 priv->allocated = 1;
2131
c27a02cd
YP		 2132 /*
2133 * Initialize netdev entry points
2134 */
3addc568 2135 dev->netdev_ops = &mlx4_netdev_ops;
c27a02cd 2136 dev->watchdog_timeo = MLX4_EN_WATCHDOG_TIMEOUT;
1eb63a28
BH		 2137 netif_set_real_num_tx_queues(dev, priv->tx_ring_num);
2138 netif_set_real_num_rx_queues(dev, priv->rx_ring_num);
3addc568 2139
c27a02cd
YP		 2140 SET_ETHTOOL_OPS(dev, &mlx4_en_ethtool_ops);
2141
c27a02cd
YP		 2142 /*
2143 * Set driver features
2144 */
c8c64cff
MM		 2145 dev->hw_features = NETIF_F_SG | NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM;
2146 if (mdev->LSO_support)
2147 dev->hw_features |= NETIF_F_TSO | NETIF_F_TSO6;
2148
2149 dev->vlan_features = dev->hw_features;
2150
ad86107f 2151 dev->hw_features |= NETIF_F_RXCSUM | NETIF_F_RXHASH;
c8c64cff
MM		 2152 dev->features = dev->hw_features | NETIF_F_HIGHDMA |
2153 NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX |
2154 NETIF_F_HW_VLAN_FILTER;
60d6fe99 2155 dev->hw_features |= NETIF_F_LOOPBACK;
c27a02cd 2156
1eb8c695
AV		 2157 if (mdev->dev->caps.steering_mode ==
2158 MLX4_STEERING_MODE_DEVICE_MANAGED)
2159 dev->hw_features |= NETIF_F_NTUPLE;
2160
cc5387f7
YB		 2161 if (mdev->dev->caps.steering_mode != MLX4_STEERING_MODE_A0)
2162 dev->priv_flags |= IFF_UNICAST_FLT;
2163
c27a02cd
YP		 2164 mdev->pndev[port] = dev;
2165
2166 netif_carrier_off(dev);
2167 err = register_netdev(dev);
2168 if (err) {
453a6082 2169 en_err(priv, "Netdev registration failed for port %d\n", port);
c27a02cd
YP		 2170 goto out;
2171 }
4234144f 2172 priv->registered = 1;
453a6082
YP		 2173
2174 en_warn(priv, "Using %d TX rings\n", prof->tx_ring_num);
2175 en_warn(priv, "Using %d RX rings\n", prof->rx_ring_num);
2176
79aeaccd
YB		 2177 mlx4_en_update_loopback_state(priv->dev, priv->dev->features);
2178
90822265 2179 /* Configure port */
5c8e9046 2180 mlx4_en_calc_rx_buf(dev);
90822265 2181 err = mlx4_SET_PORT_general(mdev->dev, priv->port,
5c8e9046
YP		 2182 priv->rx_skb_size + ETH_FCS_LEN,
2183 prof->tx_pause, prof->tx_ppp,
2184 prof->rx_pause, prof->rx_ppp);
90822265
YP		 2185 if (err) {
2186 en_err(priv, "Failed setting port general configurations "
2187 "for port %d, with error %d\n", priv->port, err);
2188 goto out;
2189 }
2190
2191 /* Init port */
2192 en_warn(priv, "Initializing port\n");
2193 err = mlx4_INIT_PORT(mdev->dev, priv->port);
2194 if (err) {
2195 en_err(priv, "Failed Initializing port\n");
2196 goto out;
2197 }
39f17b44 2198 mlx4_en_set_default_moderation(priv);
c27a02cd
YP		 2199 queue_delayed_work(mdev->workqueue, &priv->stats_task, STATS_DELAY);
2200 return 0;
2201
2202out:
2203 mlx4_en_destroy_netdev(dev);
2204 return err;
2205}
2206
Linux 6.x block layer and io_uring tree(s)