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net/mlx4: Add set VF default vlan ID and priority support
[linux-2.6-block.git] / drivers / net / ethernet / mellanox / mlx4 / en_netdev.c
CommitLineData
c27a02cd
YP		 1/*
2 * Copyright (c) 2007 Mellanox Technologies. All rights reserved.
3 *
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
9 *
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
12 * conditions are met:
13 *
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
16 * disclaimer.
17 *
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30 * SOFTWARE.
31 *
32 */
33
34#include <linux/etherdevice.h>
35#include <linux/tcp.h>
36#include <linux/if_vlan.h>
37#include <linux/delay.h>
5a0e3ad6 38#include <linux/slab.h>
1eb8c695
AV		 39#include <linux/hash.h>
40#include <net/ip.h>
c27a02cd
YP		 41
42#include <linux/mlx4/driver.h>
43#include <linux/mlx4/device.h>
44#include <linux/mlx4/cmd.h>
45#include <linux/mlx4/cq.h>
46
47#include "mlx4_en.h"
48#include "en_port.h"
49
d317966b 50int mlx4_en_setup_tc(struct net_device *dev, u8 up)
897d7846 51{
bc6a4744
AV		 52 struct mlx4_en_priv *priv = netdev_priv(dev);
53 int i;
d317966b 54 unsigned int offset = 0;
bc6a4744
AV		 55
56 if (up && up != MLX4_EN_NUM_UP)
897d7846
AV		 57 return -EINVAL;
58
bc6a4744
AV		 59 netdev_set_num_tc(dev, up);
60
61 /* Partition Tx queues evenly amongst UP's */
bc6a4744 62 for (i = 0; i < up; i++) {
d317966b
AV		 63 netdev_set_tc_queue(dev, i, priv->num_tx_rings_p_up, offset);
64 offset += priv->num_tx_rings_p_up;
bc6a4744
AV		 65 }
66
897d7846
AV		 67 return 0;
68}
69
1eb8c695
AV		 70#ifdef CONFIG_RFS_ACCEL
71
72struct mlx4_en_filter {
73 struct list_head next;
74 struct work_struct work;
75
76 __be32 src_ip;
77 __be32 dst_ip;
78 __be16 src_port;
79 __be16 dst_port;
80
81 int rxq_index;
82 struct mlx4_en_priv *priv;
83 u32 flow_id; /* RFS infrastructure id */
84 int id; /* mlx4_en driver id */
85 u64 reg_id; /* Flow steering API id */
86 u8 activated; /* Used to prevent expiry before filter
87 * is attached
88 */
89 struct hlist_node filter_chain;
90};
91
92static void mlx4_en_filter_rfs_expire(struct mlx4_en_priv *priv);
93
94static void mlx4_en_filter_work(struct work_struct *work)
95{
96 struct mlx4_en_filter *filter = container_of(work,
97 struct mlx4_en_filter,
98 work);
99 struct mlx4_en_priv *priv = filter->priv;
100 struct mlx4_spec_list spec_tcp = {
101 .id = MLX4_NET_TRANS_RULE_ID_TCP,
102 {
103 .tcp_udp = {
104 .dst_port = filter->dst_port,
105 .dst_port_msk = (__force __be16)-1,
106 .src_port = filter->src_port,
107 .src_port_msk = (__force __be16)-1,
108 },
109 },
110 };
111 struct mlx4_spec_list spec_ip = {
112 .id = MLX4_NET_TRANS_RULE_ID_IPV4,
113 {
114 .ipv4 = {
115 .dst_ip = filter->dst_ip,
116 .dst_ip_msk = (__force __be32)-1,
117 .src_ip = filter->src_ip,
118 .src_ip_msk = (__force __be32)-1,
119 },
120 },
121 };
122 struct mlx4_spec_list spec_eth = {
123 .id = MLX4_NET_TRANS_RULE_ID_ETH,
124 };
125 struct mlx4_net_trans_rule rule = {
126 .list = LIST_HEAD_INIT(rule.list),
127 .queue_mode = MLX4_NET_TRANS_Q_LIFO,
128 .exclusive = 1,
129 .allow_loopback = 1,
130 .promisc_mode = MLX4_FS_PROMISC_NONE,
131 .port = priv->port,
132 .priority = MLX4_DOMAIN_RFS,
133 };
134 int rc;
1eb8c695
AV		 135 __be64 mac_mask = cpu_to_be64(MLX4_MAC_MASK << 16);
136
137 list_add_tail(&spec_eth.list, &rule.list);
138 list_add_tail(&spec_ip.list, &rule.list);
139 list_add_tail(&spec_tcp.list, &rule.list);
140
1eb8c695 141 rule.qpn = priv->rss_map.qps[filter->rxq_index].qpn;
6bbb6d99 142 memcpy(spec_eth.eth.dst_mac, priv->dev->dev_addr, ETH_ALEN);
1eb8c695
AV		 143 memcpy(spec_eth.eth.dst_mac_msk, &mac_mask, ETH_ALEN);
144
145 filter->activated = 0;
146
147 if (filter->reg_id) {
148 rc = mlx4_flow_detach(priv->mdev->dev, filter->reg_id);
149 if (rc && rc != -ENOENT)
150 en_err(priv, "Error detaching flow. rc = %d\n", rc);
151 }
152
153 rc = mlx4_flow_attach(priv->mdev->dev, &rule, &filter->reg_id);
154 if (rc)
155 en_err(priv, "Error attaching flow. err = %d\n", rc);
156
157 mlx4_en_filter_rfs_expire(priv);
158
159 filter->activated = 1;
160}
161
162static inline struct hlist_head *
163filter_hash_bucket(struct mlx4_en_priv *priv, __be32 src_ip, __be32 dst_ip,
164 __be16 src_port, __be16 dst_port)
165{
166 unsigned long l;
167 int bucket_idx;
168
169 l = (__force unsigned long)src_port |
170 ((__force unsigned long)dst_port << 2);
171 l ^= (__force unsigned long)(src_ip ^ dst_ip);
172
173 bucket_idx = hash_long(l, MLX4_EN_FILTER_HASH_SHIFT);
174
175 return &priv->filter_hash[bucket_idx];
176}
177
178static struct mlx4_en_filter *
179mlx4_en_filter_alloc(struct mlx4_en_priv *priv, int rxq_index, __be32 src_ip,
180 __be32 dst_ip, __be16 src_port, __be16 dst_port,
181 u32 flow_id)
182{
183 struct mlx4_en_filter *filter = NULL;
184
185 filter = kzalloc(sizeof(struct mlx4_en_filter), GFP_ATOMIC);
186 if (!filter)
187 return NULL;
188
189 filter->priv = priv;
190 filter->rxq_index = rxq_index;
191 INIT_WORK(&filter->work, mlx4_en_filter_work);
192
193 filter->src_ip = src_ip;
194 filter->dst_ip = dst_ip;
195 filter->src_port = src_port;
196 filter->dst_port = dst_port;
197
198 filter->flow_id = flow_id;
199
ee64c0ee 200 filter->id = priv->last_filter_id++ % RPS_NO_FILTER;
1eb8c695
AV		 201
202 list_add_tail(&filter->next, &priv->filters);
203 hlist_add_head(&filter->filter_chain,
204 filter_hash_bucket(priv, src_ip, dst_ip, src_port,
205 dst_port));
206
207 return filter;
208}
209
210static void mlx4_en_filter_free(struct mlx4_en_filter *filter)
211{
212 struct mlx4_en_priv *priv = filter->priv;
213 int rc;
214
215 list_del(&filter->next);
216
217 rc = mlx4_flow_detach(priv->mdev->dev, filter->reg_id);
218 if (rc && rc != -ENOENT)
219 en_err(priv, "Error detaching flow. rc = %d\n", rc);
220
221 kfree(filter);
222}
223
224static inline struct mlx4_en_filter *
225mlx4_en_filter_find(struct mlx4_en_priv *priv, __be32 src_ip, __be32 dst_ip,
226 __be16 src_port, __be16 dst_port)
227{
1eb8c695
AV		 228 struct mlx4_en_filter *filter;
229 struct mlx4_en_filter *ret = NULL;
230
b67bfe0d 231 hlist_for_each_entry(filter,
1eb8c695
AV		 232 filter_hash_bucket(priv, src_ip, dst_ip,
233 src_port, dst_port),
234 filter_chain) {
235 if (filter->src_ip == src_ip &&
236 filter->dst_ip == dst_ip &&
237 filter->src_port == src_port &&
238 filter->dst_port == dst_port) {
239 ret = filter;
240 break;
241 }
242 }
243
244 return ret;
245}
246
247static int
248mlx4_en_filter_rfs(struct net_device *net_dev, const struct sk_buff *skb,
249 u16 rxq_index, u32 flow_id)
250{
251 struct mlx4_en_priv *priv = netdev_priv(net_dev);
252 struct mlx4_en_filter *filter;
253 const struct iphdr *ip;
254 const __be16 *ports;
255 __be32 src_ip;
256 __be32 dst_ip;
257 __be16 src_port;
258 __be16 dst_port;
259 int nhoff = skb_network_offset(skb);
260 int ret = 0;
261
262 if (skb->protocol != htons(ETH_P_IP))
263 return -EPROTONOSUPPORT;
264
265 ip = (const struct iphdr *)(skb->data + nhoff);
266 if (ip_is_fragment(ip))
267 return -EPROTONOSUPPORT;
268
269 ports = (const __be16 *)(skb->data + nhoff + 4 * ip->ihl);
270
271 src_ip = ip->saddr;
272 dst_ip = ip->daddr;
273 src_port = ports[0];
274 dst_port = ports[1];
275
276 if (ip->protocol != IPPROTO_TCP)
277 return -EPROTONOSUPPORT;
278
279 spin_lock_bh(&priv->filters_lock);
280 filter = mlx4_en_filter_find(priv, src_ip, dst_ip, src_port, dst_port);
281 if (filter) {
282 if (filter->rxq_index == rxq_index)
283 goto out;
284
285 filter->rxq_index = rxq_index;
286 } else {
287 filter = mlx4_en_filter_alloc(priv, rxq_index,
288 src_ip, dst_ip,
289 src_port, dst_port, flow_id);
290 if (!filter) {
291 ret = -ENOMEM;
292 goto err;
293 }
294 }
295
296 queue_work(priv->mdev->workqueue, &filter->work);
297
298out:
299 ret = filter->id;
300err:
301 spin_unlock_bh(&priv->filters_lock);
302
303 return ret;
304}
305
306void mlx4_en_cleanup_filters(struct mlx4_en_priv *priv,
307 struct mlx4_en_rx_ring *rx_ring)
308{
309 struct mlx4_en_filter *filter, *tmp;
310 LIST_HEAD(del_list);
311
312 spin_lock_bh(&priv->filters_lock);
313 list_for_each_entry_safe(filter, tmp, &priv->filters, next) {
314 list_move(&filter->next, &del_list);
315 hlist_del(&filter->filter_chain);
316 }
317 spin_unlock_bh(&priv->filters_lock);
318
319 list_for_each_entry_safe(filter, tmp, &del_list, next) {
320 cancel_work_sync(&filter->work);
321 mlx4_en_filter_free(filter);
322 }
323}
324
325static void mlx4_en_filter_rfs_expire(struct mlx4_en_priv *priv)
326{
327 struct mlx4_en_filter *filter = NULL, *tmp, *last_filter = NULL;
328 LIST_HEAD(del_list);
329 int i = 0;
330
331 spin_lock_bh(&priv->filters_lock);
332 list_for_each_entry_safe(filter, tmp, &priv->filters, next) {
333 if (i > MLX4_EN_FILTER_EXPIRY_QUOTA)
334 break;
335
336 if (filter->activated &&
337 !work_pending(&filter->work) &&
338 rps_may_expire_flow(priv->dev,
339 filter->rxq_index, filter->flow_id,
340 filter->id)) {
341 list_move(&filter->next, &del_list);
342 hlist_del(&filter->filter_chain);
343 } else
344 last_filter = filter;
345
346 i++;
347 }
348
349 if (last_filter && (&last_filter->next != priv->filters.next))
350 list_move(&priv->filters, &last_filter->next);
351
352 spin_unlock_bh(&priv->filters_lock);
353
354 list_for_each_entry_safe(filter, tmp, &del_list, next)
355 mlx4_en_filter_free(filter);
356}
357#endif
358
80d5c368
PM		 359static int mlx4_en_vlan_rx_add_vid(struct net_device *dev,
360 __be16 proto, u16 vid)
c27a02cd
YP		 361{
362 struct mlx4_en_priv *priv = netdev_priv(dev);
363 struct mlx4_en_dev *mdev = priv->mdev;
364 int err;
4c3eb3ca 365 int idx;
c27a02cd 366
f1b553fb 367 en_dbg(HW, priv, "adding VLAN:%d\n", vid);
c27a02cd 368
f1b553fb 369 set_bit(vid, priv->active_vlans);
c27a02cd
YP		 370
371 /* Add VID to port VLAN filter */
372 mutex_lock(&mdev->state_lock);
373 if (mdev->device_up && priv->port_up) {
f1b553fb 374 err = mlx4_SET_VLAN_FLTR(mdev->dev, priv);
c27a02cd 375 if (err)
453a6082 376 en_err(priv, "Failed configuring VLAN filter\n");
c27a02cd 377 }
4c3eb3ca
EC		 378 if (mlx4_register_vlan(mdev->dev, priv->port, vid, &idx))
379 en_err(priv, "failed adding vlan %d\n", vid);
c27a02cd 380 mutex_unlock(&mdev->state_lock);
4c3eb3ca 381
8e586137 382 return 0;
c27a02cd
YP		 383}
384
80d5c368
PM		 385static int mlx4_en_vlan_rx_kill_vid(struct net_device *dev,
386 __be16 proto, u16 vid)
c27a02cd
YP		 387{
388 struct mlx4_en_priv *priv = netdev_priv(dev);
389 struct mlx4_en_dev *mdev = priv->mdev;
390 int err;
4c3eb3ca 391 int idx;
c27a02cd 392
f1b553fb 393 en_dbg(HW, priv, "Killing VID:%d\n", vid);
c27a02cd 394
f1b553fb 395 clear_bit(vid, priv->active_vlans);
c27a02cd
YP		 396
397 /* Remove VID from port VLAN filter */
398 mutex_lock(&mdev->state_lock);
4c3eb3ca
EC		 399 if (!mlx4_find_cached_vlan(mdev->dev, priv->port, vid, &idx))
400 mlx4_unregister_vlan(mdev->dev, priv->port, idx);
401 else
402 en_err(priv, "could not find vid %d in cache\n", vid);
403
c27a02cd 404 if (mdev->device_up && priv->port_up) {
f1b553fb 405 err = mlx4_SET_VLAN_FLTR(mdev->dev, priv);
c27a02cd 406 if (err)
453a6082 407 en_err(priv, "Failed configuring VLAN filter\n");
c27a02cd
YP		 408 }
409 mutex_unlock(&mdev->state_lock);
8e586137
JP		 410
411 return 0;
c27a02cd
YP		 412}
413
6bbb6d99
YB		 414static void mlx4_en_u64_to_mac(unsigned char dst_mac[ETH_ALEN + 2], u64 src_mac)
415{
bab6a9ea
YB		 416 int i;
417 for (i = ETH_ALEN - 1; i >= 0; --i) {
6bbb6d99
YB		 418 dst_mac[i] = src_mac & 0xff;
419 src_mac >>= 8;
420 }
421 memset(&dst_mac[ETH_ALEN], 0, 2);
422}
423
16a10ffd
YB		 424static int mlx4_en_uc_steer_add(struct mlx4_en_priv *priv,
425 unsigned char *mac, int *qpn, u64 *reg_id)
426{
427 struct mlx4_en_dev *mdev = priv->mdev;
428 struct mlx4_dev *dev = mdev->dev;
429 int err;
430
431 switch (dev->caps.steering_mode) {
432 case MLX4_STEERING_MODE_B0: {
433 struct mlx4_qp qp;
434 u8 gid[16] = {0};
435
436 qp.qpn = *qpn;
437 memcpy(&gid[10], mac, ETH_ALEN);
438 gid[5] = priv->port;
439
440 err = mlx4_unicast_attach(dev, &qp, gid, 0, MLX4_PROT_ETH);
441 break;
442 }
443 case MLX4_STEERING_MODE_DEVICE_MANAGED: {
444 struct mlx4_spec_list spec_eth = { {NULL} };
445 __be64 mac_mask = cpu_to_be64(MLX4_MAC_MASK << 16);
446
447 struct mlx4_net_trans_rule rule = {
448 .queue_mode = MLX4_NET_TRANS_Q_FIFO,
449 .exclusive = 0,
450 .allow_loopback = 1,
451 .promisc_mode = MLX4_FS_PROMISC_NONE,
452 .priority = MLX4_DOMAIN_NIC,
453 };
454
455 rule.port = priv->port;
456 rule.qpn = *qpn;
457 INIT_LIST_HEAD(&rule.list);
458
459 spec_eth.id = MLX4_NET_TRANS_RULE_ID_ETH;
460 memcpy(spec_eth.eth.dst_mac, mac, ETH_ALEN);
461 memcpy(spec_eth.eth.dst_mac_msk, &mac_mask, ETH_ALEN);
462 list_add_tail(&spec_eth.list, &rule.list);
463
464 err = mlx4_flow_attach(dev, &rule, reg_id);
465 break;
466 }
467 default:
468 return -EINVAL;
469 }
470 if (err)
471 en_warn(priv, "Failed Attaching Unicast\n");
472
473 return err;
474}
475
476static void mlx4_en_uc_steer_release(struct mlx4_en_priv *priv,
477 unsigned char *mac, int qpn, u64 reg_id)
478{
479 struct mlx4_en_dev *mdev = priv->mdev;
480 struct mlx4_dev *dev = mdev->dev;
481
482 switch (dev->caps.steering_mode) {
483 case MLX4_STEERING_MODE_B0: {
484 struct mlx4_qp qp;
485 u8 gid[16] = {0};
486
487 qp.qpn = qpn;
488 memcpy(&gid[10], mac, ETH_ALEN);
489 gid[5] = priv->port;
490
491 mlx4_unicast_detach(dev, &qp, gid, MLX4_PROT_ETH);
492 break;
493 }
494 case MLX4_STEERING_MODE_DEVICE_MANAGED: {
495 mlx4_flow_detach(dev, reg_id);
496 break;
497 }
498 default:
499 en_err(priv, "Invalid steering mode.\n");
500 }
501}
502
503static int mlx4_en_get_qp(struct mlx4_en_priv *priv)
504{
505 struct mlx4_en_dev *mdev = priv->mdev;
506 struct mlx4_dev *dev = mdev->dev;
507 struct mlx4_mac_entry *entry;
508 int index = 0;
509 int err = 0;
510 u64 reg_id;
511 int *qpn = &priv->base_qpn;
512 u64 mac = mlx4_en_mac_to_u64(priv->dev->dev_addr);
513
514 en_dbg(DRV, priv, "Registering MAC: %pM for adding\n",
515 priv->dev->dev_addr);
516 index = mlx4_register_mac(dev, priv->port, mac);
517 if (index < 0) {
518 err = index;
519 en_err(priv, "Failed adding MAC: %pM\n",
520 priv->dev->dev_addr);
521 return err;
522 }
523
524 if (dev->caps.steering_mode == MLX4_STEERING_MODE_A0) {
525 int base_qpn = mlx4_get_base_qpn(dev, priv->port);
526 *qpn = base_qpn + index;
527 return 0;
528 }
529
530 err = mlx4_qp_reserve_range(dev, 1, 1, qpn);
531 en_dbg(DRV, priv, "Reserved qp %d\n", *qpn);
532 if (err) {
533 en_err(priv, "Failed to reserve qp for mac registration\n");
534 goto qp_err;
535 }
536
537 err = mlx4_en_uc_steer_add(priv, priv->dev->dev_addr, qpn, &reg_id);
538 if (err)
539 goto steer_err;
540
541 entry = kmalloc(sizeof(*entry), GFP_KERNEL);
542 if (!entry) {
543 err = -ENOMEM;
544 goto alloc_err;
545 }
546 memcpy(entry->mac, priv->dev->dev_addr, sizeof(entry->mac));
547 entry->reg_id = reg_id;
548
c07cb4b0
YB		 549 hlist_add_head_rcu(&entry->hlist,
550 &priv->mac_hash[entry->mac[MLX4_EN_MAC_HASH_IDX]]);
16a10ffd 551
c07cb4b0 552 return 0;
16a10ffd
YB		 553
554alloc_err:
555 mlx4_en_uc_steer_release(priv, priv->dev->dev_addr, *qpn, reg_id);
556
557steer_err:
558 mlx4_qp_release_range(dev, *qpn, 1);
559
560qp_err:
561 mlx4_unregister_mac(dev, priv->port, mac);
562 return err;
563}
564
565static void mlx4_en_put_qp(struct mlx4_en_priv *priv)
566{
567 struct mlx4_en_dev *mdev = priv->mdev;
568 struct mlx4_dev *dev = mdev->dev;
16a10ffd 569 int qpn = priv->base_qpn;
83a5a6ce 570 u64 mac;
16a10ffd 571
83a5a6ce
YB		 572 if (dev->caps.steering_mode == MLX4_STEERING_MODE_A0) {
573 mac = mlx4_en_mac_to_u64(priv->dev->dev_addr);
574 en_dbg(DRV, priv, "Registering MAC: %pM for deleting\n",
575 priv->dev->dev_addr);
576 mlx4_unregister_mac(dev, priv->port, mac);
577 } else {
c07cb4b0 578 struct mlx4_mac_entry *entry;
b67bfe0d 579 struct hlist_node *tmp;
c07cb4b0 580 struct hlist_head *bucket;
83a5a6ce 581 unsigned int i;
c07cb4b0 582
83a5a6ce
YB		 583 for (i = 0; i < MLX4_EN_MAC_HASH_SIZE; ++i) {
584 bucket = &priv->mac_hash[i];
585 hlist_for_each_entry_safe(entry, tmp, bucket, hlist) {
586 mac = mlx4_en_mac_to_u64(entry->mac);
587 en_dbg(DRV, priv, "Registering MAC: %pM for deleting\n",
588 entry->mac);
c07cb4b0
YB		 589 mlx4_en_uc_steer_release(priv, entry->mac,
590 qpn, entry->reg_id);
c07cb4b0 591
83a5a6ce 592 mlx4_unregister_mac(dev, priv->port, mac);
c07cb4b0
YB		 593 hlist_del_rcu(&entry->hlist);
594 kfree_rcu(entry, rcu);
c07cb4b0 595 }
16a10ffd 596 }
83a5a6ce
YB		 597
598 en_dbg(DRV, priv, "Releasing qp: port %d, qpn %d\n",
599 priv->port, qpn);
600 mlx4_qp_release_range(dev, qpn, 1);
601 priv->flags &= ~MLX4_EN_FLAG_FORCE_PROMISC;
16a10ffd
YB		 602 }
603}
604
605static int mlx4_en_replace_mac(struct mlx4_en_priv *priv, int qpn,
90bbb74a 606 unsigned char *new_mac, unsigned char *prev_mac)
16a10ffd
YB		 607{
608 struct mlx4_en_dev *mdev = priv->mdev;
609 struct mlx4_dev *dev = mdev->dev;
16a10ffd
YB		 610 int err = 0;
611 u64 new_mac_u64 = mlx4_en_mac_to_u64(new_mac);
612
613 if (dev->caps.steering_mode != MLX4_STEERING_MODE_A0) {
c07cb4b0
YB		 614 struct hlist_head *bucket;
615 unsigned int mac_hash;
616 struct mlx4_mac_entry *entry;
b67bfe0d 617 struct hlist_node *tmp;
c07cb4b0
YB		 618 u64 prev_mac_u64 = mlx4_en_mac_to_u64(prev_mac);
619
620 bucket = &priv->mac_hash[prev_mac[MLX4_EN_MAC_HASH_IDX]];
b67bfe0d 621 hlist_for_each_entry_safe(entry, tmp, bucket, hlist) {
c07cb4b0
YB		 622 if (ether_addr_equal_64bits(entry->mac, prev_mac)) {
623 mlx4_en_uc_steer_release(priv, entry->mac,
624 qpn, entry->reg_id);
625 mlx4_unregister_mac(dev, priv->port,
626 prev_mac_u64);
627 hlist_del_rcu(&entry->hlist);
628 synchronize_rcu();
629 memcpy(entry->mac, new_mac, ETH_ALEN);
630 entry->reg_id = 0;
631 mac_hash = new_mac[MLX4_EN_MAC_HASH_IDX];
632 hlist_add_head_rcu(&entry->hlist,
633 &priv->mac_hash[mac_hash]);
634 mlx4_register_mac(dev, priv->port, new_mac_u64);
635 err = mlx4_en_uc_steer_add(priv, new_mac,
636 &qpn,
637 &entry->reg_id);
638 return err;
639 }
640 }
641 return -EINVAL;
16a10ffd
YB		 642 }
643
644 return __mlx4_replace_mac(dev, priv->port, qpn, new_mac_u64);
645}
646
e7c1c2c4 647u64 mlx4_en_mac_to_u64(u8 *addr)
c27a02cd
YP		 648{
649 u64 mac = 0;
650 int i;
651
652 for (i = 0; i < ETH_ALEN; i++) {
653 mac <<= 8;
654 mac |= addr[i];
655 }
656 return mac;
657}
658
bfa8ab47 659static int mlx4_en_do_set_mac(struct mlx4_en_priv *priv)
c27a02cd 660{
c27a02cd
YP		 661 int err = 0;
662
c27a02cd
YP		 663 if (priv->port_up) {
664 /* Remove old MAC and insert the new one */
16a10ffd 665 err = mlx4_en_replace_mac(priv, priv->base_qpn,
90bbb74a 666 priv->dev->dev_addr, priv->prev_mac);
c27a02cd 667 if (err)
453a6082 668 en_err(priv, "Failed changing HW MAC address\n");
6bbb6d99
YB		 669 memcpy(priv->prev_mac, priv->dev->dev_addr,
670 sizeof(priv->prev_mac));
c27a02cd 671 } else
48e551ff 672 en_dbg(HW, priv, "Port is down while registering mac, exiting...\n");
c27a02cd 673
bfa8ab47
YB		 674 return err;
675}
676
677static int mlx4_en_set_mac(struct net_device *dev, void *addr)
678{
679 struct mlx4_en_priv *priv = netdev_priv(dev);
680 struct mlx4_en_dev *mdev = priv->mdev;
681 struct sockaddr *saddr = addr;
682 int err;
683
684 if (!is_valid_ether_addr(saddr->sa_data))
685 return -EADDRNOTAVAIL;
686
687 memcpy(dev->dev_addr, saddr->sa_data, ETH_ALEN);
688
689 mutex_lock(&mdev->state_lock);
690 err = mlx4_en_do_set_mac(priv);
c27a02cd 691 mutex_unlock(&mdev->state_lock);
bfa8ab47
YB		 692
693 return err;
c27a02cd
YP		 694}
695
696static void mlx4_en_clear_list(struct net_device *dev)
697{
698 struct mlx4_en_priv *priv = netdev_priv(dev);
6d199937 699 struct mlx4_en_mc_list *tmp, *mc_to_del;
c27a02cd 700
6d199937
YP		 701 list_for_each_entry_safe(mc_to_del, tmp, &priv->mc_list, list) {
702 list_del(&mc_to_del->list);
703 kfree(mc_to_del);
704 }
c27a02cd
YP		 705}
706
707static void mlx4_en_cache_mclist(struct net_device *dev)
708{
709 struct mlx4_en_priv *priv = netdev_priv(dev);
22bedad3 710 struct netdev_hw_addr *ha;
6d199937 711 struct mlx4_en_mc_list *tmp;
ff6e2163 712
0e03567a 713 mlx4_en_clear_list(dev);
6d199937
YP		 714 netdev_for_each_mc_addr(ha, dev) {
715 tmp = kzalloc(sizeof(struct mlx4_en_mc_list), GFP_ATOMIC);
716 if (!tmp) {
6d199937
YP		 717 mlx4_en_clear_list(dev);
718 return;
719 }
720 memcpy(tmp->addr, ha->addr, ETH_ALEN);
721 list_add_tail(&tmp->list, &priv->mc_list);
722 }
c27a02cd
YP		 723}
724
6d199937
YP		 725static void update_mclist_flags(struct mlx4_en_priv *priv,
726 struct list_head *dst,
727 struct list_head *src)
728{
729 struct mlx4_en_mc_list *dst_tmp, *src_tmp, *new_mc;
730 bool found;
731
732 /* Find all the entries that should be removed from dst,
733 * These are the entries that are not found in src
734 */
735 list_for_each_entry(dst_tmp, dst, list) {
736 found = false;
737 list_for_each_entry(src_tmp, src, list) {
738 if (!memcmp(dst_tmp->addr, src_tmp->addr, ETH_ALEN)) {
739 found = true;
740 break;
741 }
742 }
743 if (!found)
744 dst_tmp->action = MCLIST_REM;
745 }
746
747 /* Add entries that exist in src but not in dst
748 * mark them as need to add
749 */
750 list_for_each_entry(src_tmp, src, list) {
751 found = false;
752 list_for_each_entry(dst_tmp, dst, list) {
753 if (!memcmp(dst_tmp->addr, src_tmp->addr, ETH_ALEN)) {
754 dst_tmp->action = MCLIST_NONE;
755 found = true;
756 break;
757 }
758 }
759 if (!found) {
14f8dc49
JP		 760 new_mc = kmemdup(src_tmp,
761 sizeof(struct mlx4_en_mc_list),
6d199937 762 GFP_KERNEL);
14f8dc49 763 if (!new_mc)
6d199937 764 return;
14f8dc49 765
6d199937
YP		 766 new_mc->action = MCLIST_ADD;
767 list_add_tail(&new_mc->list, dst);
768 }
769 }
770}
c27a02cd 771
0eb74fdd 772static void mlx4_en_set_rx_mode(struct net_device *dev)
c27a02cd
YP		 773{
774 struct mlx4_en_priv *priv = netdev_priv(dev);
775
776 if (!priv->port_up)
777 return;
778
0eb74fdd 779 queue_work(priv->mdev->workqueue, &priv->rx_mode_task);
c27a02cd
YP		 780}
781
0eb74fdd
YB		 782static void mlx4_en_set_promisc_mode(struct mlx4_en_priv *priv,
783 struct mlx4_en_dev *mdev)
c27a02cd 784{
c96d97f4 785 int err = 0;
c27a02cd 786
0eb74fdd 787 if (!(priv->flags & MLX4_EN_FLAG_PROMISC)) {
c27a02cd 788 if (netif_msg_rx_status(priv))
0eb74fdd
YB		 789 en_warn(priv, "Entering promiscuous mode\n");
790 priv->flags |= MLX4_EN_FLAG_PROMISC;
c27a02cd 791
0eb74fdd 792 /* Enable promiscouos mode */
c96d97f4 793 switch (mdev->dev->caps.steering_mode) {
592e49dd 794 case MLX4_STEERING_MODE_DEVICE_MANAGED:
0eb74fdd
YB		 795 err = mlx4_flow_steer_promisc_add(mdev->dev,
796 priv->port,
797 priv->base_qpn,
798 MLX4_FS_PROMISC_UPLINK);
592e49dd 799 if (err)
0eb74fdd
YB		 800 en_err(priv, "Failed enabling promiscuous mode\n");
801 priv->flags |= MLX4_EN_FLAG_MC_PROMISC;
592e49dd
HHZ		 802 break;
803
c96d97f4 804 case MLX4_STEERING_MODE_B0:
0eb74fdd
YB		 805 err = mlx4_unicast_promisc_add(mdev->dev,
806 priv->base_qpn,
807 priv->port);
c96d97f4 808 if (err)
0eb74fdd
YB		 809 en_err(priv, "Failed enabling unicast promiscuous mode\n");
810
811 /* Add the default qp number as multicast
812 * promisc
813 */
814 if (!(priv->flags & MLX4_EN_FLAG_MC_PROMISC)) {
815 err = mlx4_multicast_promisc_add(mdev->dev,
816 priv->base_qpn,
817 priv->port);
c96d97f4 818 if (err)
0eb74fdd
YB		 819 en_err(priv, "Failed enabling multicast promiscuous mode\n");
820 priv->flags |= MLX4_EN_FLAG_MC_PROMISC;
c96d97f4
HHZ		 821 }
822 break;
c27a02cd 823
c96d97f4
HHZ		 824 case MLX4_STEERING_MODE_A0:
825 err = mlx4_SET_PORT_qpn_calc(mdev->dev,
826 priv->port,
0eb74fdd
YB		 827 priv->base_qpn,
828 1);
1679200f 829 if (err)
0eb74fdd 830 en_err(priv, "Failed enabling promiscuous mode\n");
c96d97f4 831 break;
1679200f
YP		 832 }
833
0eb74fdd
YB		 834 /* Disable port multicast filter (unconditionally) */
835 err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0,
836 0, MLX4_MCAST_DISABLE);
837 if (err)
838 en_err(priv, "Failed disabling multicast filter\n");
839
840 /* Disable port VLAN filter */
f1b553fb 841 err = mlx4_SET_VLAN_FLTR(mdev->dev, priv);
c27a02cd 842 if (err)
0eb74fdd
YB		 843 en_err(priv, "Failed disabling VLAN filter\n");
844 }
845}
846
847static void mlx4_en_clear_promisc_mode(struct mlx4_en_priv *priv,
848 struct mlx4_en_dev *mdev)
849{
850 int err = 0;
851
852 if (netif_msg_rx_status(priv))
853 en_warn(priv, "Leaving promiscuous mode\n");
854 priv->flags &= ~MLX4_EN_FLAG_PROMISC;
855
856 /* Disable promiscouos mode */
857 switch (mdev->dev->caps.steering_mode) {
858 case MLX4_STEERING_MODE_DEVICE_MANAGED:
859 err = mlx4_flow_steer_promisc_remove(mdev->dev,
860 priv->port,
861 MLX4_FS_PROMISC_UPLINK);
862 if (err)
863 en_err(priv, "Failed disabling promiscuous mode\n");
864 priv->flags &= ~MLX4_EN_FLAG_MC_PROMISC;
865 break;
866
867 case MLX4_STEERING_MODE_B0:
868 err = mlx4_unicast_promisc_remove(mdev->dev,
869 priv->base_qpn,
870 priv->port);
871 if (err)
872 en_err(priv, "Failed disabling unicast promiscuous mode\n");
873 /* Disable Multicast promisc */
874 if (priv->flags & MLX4_EN_FLAG_MC_PROMISC) {
875 err = mlx4_multicast_promisc_remove(mdev->dev,
876 priv->base_qpn,
877 priv->port);
878 if (err)
879 en_err(priv, "Failed disabling multicast promiscuous mode\n");
880 priv->flags &= ~MLX4_EN_FLAG_MC_PROMISC;
881 }
882 break;
883
884 case MLX4_STEERING_MODE_A0:
885 err = mlx4_SET_PORT_qpn_calc(mdev->dev,
886 priv->port,
887 priv->base_qpn, 0);
888 if (err)
889 en_err(priv, "Failed disabling promiscuous mode\n");
890 break;
c27a02cd
YP		 891 }
892
0eb74fdd
YB		 893 /* Enable port VLAN filter */
894 err = mlx4_SET_VLAN_FLTR(mdev->dev, priv);
895 if (err)
896 en_err(priv, "Failed enabling VLAN filter\n");
897}
898
899static void mlx4_en_do_multicast(struct mlx4_en_priv *priv,
900 struct net_device *dev,
901 struct mlx4_en_dev *mdev)
902{
903 struct mlx4_en_mc_list *mclist, *tmp;
904 u64 mcast_addr = 0;
905 u8 mc_list[16] = {0};
906 int err = 0;
907
c27a02cd
YP		 908 /* Enable/disable the multicast filter according to IFF_ALLMULTI */
909 if (dev->flags & IFF_ALLMULTI) {
910 err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0,
911 0, MLX4_MCAST_DISABLE);
912 if (err)
453a6082 913 en_err(priv, "Failed disabling multicast filter\n");
1679200f
YP		 914
915 /* Add the default qp number as multicast promisc */
916 if (!(priv->flags & MLX4_EN_FLAG_MC_PROMISC)) {
c96d97f4 917 switch (mdev->dev->caps.steering_mode) {
592e49dd
HHZ		 918 case MLX4_STEERING_MODE_DEVICE_MANAGED:
919 err = mlx4_flow_steer_promisc_add(mdev->dev,
920 priv->port,
921 priv->base_qpn,
922 MLX4_FS_PROMISC_ALL_MULTI);
923 break;
924
c96d97f4
HHZ		 925 case MLX4_STEERING_MODE_B0:
926 err = mlx4_multicast_promisc_add(mdev->dev,
927 priv->base_qpn,
928 priv->port);
929 break;
930
931 case MLX4_STEERING_MODE_A0:
932 break;
933 }
1679200f
YP		 934 if (err)
935 en_err(priv, "Failed entering multicast promisc mode\n");
936 priv->flags |= MLX4_EN_FLAG_MC_PROMISC;
937 }
c27a02cd 938 } else {
1679200f
YP		 939 /* Disable Multicast promisc */
940 if (priv->flags & MLX4_EN_FLAG_MC_PROMISC) {
c96d97f4 941 switch (mdev->dev->caps.steering_mode) {
592e49dd
HHZ		 942 case MLX4_STEERING_MODE_DEVICE_MANAGED:
943 err = mlx4_flow_steer_promisc_remove(mdev->dev,
944 priv->port,
945 MLX4_FS_PROMISC_ALL_MULTI);
946 break;
947
c96d97f4
HHZ		 948 case MLX4_STEERING_MODE_B0:
949 err = mlx4_multicast_promisc_remove(mdev->dev,
950 priv->base_qpn,
951 priv->port);
952 break;
953
954 case MLX4_STEERING_MODE_A0:
955 break;
956 }
1679200f 957 if (err)
25985edc 958 en_err(priv, "Failed disabling multicast promiscuous mode\n");
1679200f
YP		 959 priv->flags &= ~MLX4_EN_FLAG_MC_PROMISC;
960 }
ff6e2163 961
c27a02cd
YP		 962 err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0,
963 0, MLX4_MCAST_DISABLE);
964 if (err)
453a6082 965 en_err(priv, "Failed disabling multicast filter\n");
c27a02cd
YP		 966
967 /* Flush mcast filter and init it with broadcast address */
968 mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, ETH_BCAST,
969 1, MLX4_MCAST_CONFIG);
970
971 /* Update multicast list - we cache all addresses so they won't
972 * change while HW is updated holding the command semaphor */
dbd501a8 973 netif_addr_lock_bh(dev);
c27a02cd 974 mlx4_en_cache_mclist(dev);
dbd501a8 975 netif_addr_unlock_bh(dev);
6d199937
YP		 976 list_for_each_entry(mclist, &priv->mc_list, list) {
977 mcast_addr = mlx4_en_mac_to_u64(mclist->addr);
c27a02cd
YP		 978 mlx4_SET_MCAST_FLTR(mdev->dev, priv->port,
979 mcast_addr, 0, MLX4_MCAST_CONFIG);
980 }
981 err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0,
982 0, MLX4_MCAST_ENABLE);
983 if (err)
453a6082 984 en_err(priv, "Failed enabling multicast filter\n");
6d199937
YP		 985
986 update_mclist_flags(priv, &priv->curr_list, &priv->mc_list);
987 list_for_each_entry_safe(mclist, tmp, &priv->curr_list, list) {
988 if (mclist->action == MCLIST_REM) {
989 /* detach this address and delete from list */
990 memcpy(&mc_list[10], mclist->addr, ETH_ALEN);
991 mc_list[5] = priv->port;
992 err = mlx4_multicast_detach(mdev->dev,
993 &priv->rss_map.indir_qp,
994 mc_list,
0ff1fb65
HHZ		 995 MLX4_PROT_ETH,
996 mclist->reg_id);
6d199937
YP		 997 if (err)
998 en_err(priv, "Fail to detach multicast address\n");
999
1000 /* remove from list */
1001 list_del(&mclist->list);
1002 kfree(mclist);
9c64508a 1003 } else if (mclist->action == MCLIST_ADD) {
6d199937
YP		 1004 /* attach the address */
1005 memcpy(&mc_list[10], mclist->addr, ETH_ALEN);
0ff1fb65 1006 /* needed for B0 steering support */
6d199937
YP		 1007 mc_list[5] = priv->port;
1008 err = mlx4_multicast_attach(mdev->dev,
1009 &priv->rss_map.indir_qp,
0ff1fb65
HHZ		 1010 mc_list,
1011 priv->port, 0,
1012 MLX4_PROT_ETH,
1013 &mclist->reg_id);
6d199937
YP		 1014 if (err)
1015 en_err(priv, "Fail to attach multicast address\n");
1016
1017 }
1018 }
c27a02cd 1019 }
0eb74fdd
YB		 1020}
1021
cc5387f7
YB		 1022static void mlx4_en_do_uc_filter(struct mlx4_en_priv *priv,
1023 struct net_device *dev,
1024 struct mlx4_en_dev *mdev)
1025{
1026 struct netdev_hw_addr *ha;
1027 struct mlx4_mac_entry *entry;
b67bfe0d 1028 struct hlist_node *tmp;
cc5387f7
YB		 1029 bool found;
1030 u64 mac;
1031 int err = 0;
1032 struct hlist_head *bucket;
1033 unsigned int i;
1034 int removed = 0;
1035 u32 prev_flags;
1036
1037 /* Note that we do not need to protect our mac_hash traversal with rcu,
1038 * since all modification code is protected by mdev->state_lock
1039 */
1040
1041 /* find what to remove */
1042 for (i = 0; i < MLX4_EN_MAC_HASH_SIZE; ++i) {
1043 bucket = &priv->mac_hash[i];
b67bfe0d 1044 hlist_for_each_entry_safe(entry, tmp, bucket, hlist) {
cc5387f7
YB		 1045 found = false;
1046 netdev_for_each_uc_addr(ha, dev) {
1047 if (ether_addr_equal_64bits(entry->mac,
1048 ha->addr)) {
1049 found = true;
1050 break;
1051 }
1052 }
1053
1054 /* MAC address of the port is not in uc list */
1055 if (ether_addr_equal_64bits(entry->mac, dev->dev_addr))
1056 found = true;
1057
1058 if (!found) {
1059 mac = mlx4_en_mac_to_u64(entry->mac);
1060 mlx4_en_uc_steer_release(priv, entry->mac,
1061 priv->base_qpn,
1062 entry->reg_id);
1063 mlx4_unregister_mac(mdev->dev, priv->port, mac);
1064
1065 hlist_del_rcu(&entry->hlist);
1066 kfree_rcu(entry, rcu);
1067 en_dbg(DRV, priv, "Removed MAC %pM on port:%d\n",
1068 entry->mac, priv->port);
1069 ++removed;
1070 }
1071 }
1072 }
1073
1074 /* if we didn't remove anything, there is no use in trying to add
1075 * again once we are in a forced promisc mode state
1076 */
1077 if ((priv->flags & MLX4_EN_FLAG_FORCE_PROMISC) && 0 == removed)
1078 return;
1079
1080 prev_flags = priv->flags;
1081 priv->flags &= ~MLX4_EN_FLAG_FORCE_PROMISC;
1082
1083 /* find what to add */
1084 netdev_for_each_uc_addr(ha, dev) {
1085 found = false;
1086 bucket = &priv->mac_hash[ha->addr[MLX4_EN_MAC_HASH_IDX]];
b67bfe0d 1087 hlist_for_each_entry(entry, bucket, hlist) {
cc5387f7
YB		 1088 if (ether_addr_equal_64bits(entry->mac, ha->addr)) {
1089 found = true;
1090 break;
1091 }
1092 }
1093
1094 if (!found) {
1095 entry = kmalloc(sizeof(*entry), GFP_KERNEL);
1096 if (!entry) {
1097 en_err(priv, "Failed adding MAC %pM on port:%d (out of memory)\n",
1098 ha->addr, priv->port);
1099 priv->flags |= MLX4_EN_FLAG_FORCE_PROMISC;
1100 break;
1101 }
1102 mac = mlx4_en_mac_to_u64(ha->addr);
1103 memcpy(entry->mac, ha->addr, ETH_ALEN);
1104 err = mlx4_register_mac(mdev->dev, priv->port, mac);
1105 if (err < 0) {
1106 en_err(priv, "Failed registering MAC %pM on port %d: %d\n",
1107 ha->addr, priv->port, err);
1108 kfree(entry);
1109 priv->flags |= MLX4_EN_FLAG_FORCE_PROMISC;
1110 break;
1111 }
1112 err = mlx4_en_uc_steer_add(priv, ha->addr,
1113 &priv->base_qpn,
1114 &entry->reg_id);
1115 if (err) {
1116 en_err(priv, "Failed adding MAC %pM on port %d: %d\n",
1117 ha->addr, priv->port, err);
1118 mlx4_unregister_mac(mdev->dev, priv->port, mac);
1119 kfree(entry);
1120 priv->flags |= MLX4_EN_FLAG_FORCE_PROMISC;
1121 break;
1122 } else {
1123 unsigned int mac_hash;
1124 en_dbg(DRV, priv, "Added MAC %pM on port:%d\n",
1125 ha->addr, priv->port);
1126 mac_hash = ha->addr[MLX4_EN_MAC_HASH_IDX];
1127 bucket = &priv->mac_hash[mac_hash];
1128 hlist_add_head_rcu(&entry->hlist, bucket);
1129 }
1130 }
1131 }
1132
1133 if (priv->flags & MLX4_EN_FLAG_FORCE_PROMISC) {
1134 en_warn(priv, "Forcing promiscuous mode on port:%d\n",
1135 priv->port);
1136 } else if (prev_flags & MLX4_EN_FLAG_FORCE_PROMISC) {
1137 en_warn(priv, "Stop forcing promiscuous mode on port:%d\n",
1138 priv->port);
1139 }
1140}
1141
0eb74fdd
YB		 1142static void mlx4_en_do_set_rx_mode(struct work_struct *work)
1143{
1144 struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv,
1145 rx_mode_task);
1146 struct mlx4_en_dev *mdev = priv->mdev;
1147 struct net_device *dev = priv->dev;
1148
1149 mutex_lock(&mdev->state_lock);
1150 if (!mdev->device_up) {
1151 en_dbg(HW, priv, "Card is not up, ignoring rx mode change.\n");
1152 goto out;
1153 }
1154 if (!priv->port_up) {
1155 en_dbg(HW, priv, "Port is down, ignoring rx mode change.\n");
1156 goto out;
1157 }
1158
1159 if (!netif_carrier_ok(dev)) {
1160 if (!mlx4_en_QUERY_PORT(mdev, priv->port)) {
1161 if (priv->port_state.link_state) {
1162 priv->last_link_state = MLX4_DEV_EVENT_PORT_UP;
1163 netif_carrier_on(dev);
1164 en_dbg(LINK, priv, "Link Up\n");
1165 }
1166 }
1167 }
1168
cc5387f7
YB		 1169 if (dev->priv_flags & IFF_UNICAST_FLT)
1170 mlx4_en_do_uc_filter(priv, dev, mdev);
1171
0eb74fdd 1172 /* Promsicuous mode: disable all filters */
cc5387f7
YB		 1173 if ((dev->flags & IFF_PROMISC) ||
1174 (priv->flags & MLX4_EN_FLAG_FORCE_PROMISC)) {
0eb74fdd
YB		 1175 mlx4_en_set_promisc_mode(priv, mdev);
1176 goto out;
1177 }
1178
1179 /* Not in promiscuous mode */
1180 if (priv->flags & MLX4_EN_FLAG_PROMISC)
1181 mlx4_en_clear_promisc_mode(priv, mdev);
1182
1183 mlx4_en_do_multicast(priv, dev, mdev);
c27a02cd
YP		 1184out:
1185 mutex_unlock(&mdev->state_lock);
1186}
1187
1188#ifdef CONFIG_NET_POLL_CONTROLLER
1189static void mlx4_en_netpoll(struct net_device *dev)
1190{
1191 struct mlx4_en_priv *priv = netdev_priv(dev);
1192 struct mlx4_en_cq *cq;
1193 unsigned long flags;
1194 int i;
1195
1196 for (i = 0; i < priv->rx_ring_num; i++) {
1197 cq = &priv->rx_cq[i];
1198 spin_lock_irqsave(&cq->lock, flags);
1199 napi_synchronize(&cq->napi);
1200 mlx4_en_process_rx_cq(dev, cq, 0);
1201 spin_unlock_irqrestore(&cq->lock, flags);
1202 }
1203}
1204#endif
1205
1206static void mlx4_en_tx_timeout(struct net_device *dev)
1207{
1208 struct mlx4_en_priv *priv = netdev_priv(dev);
1209 struct mlx4_en_dev *mdev = priv->mdev;
1210
1211 if (netif_msg_timer(priv))
453a6082 1212 en_warn(priv, "Tx timeout called on port:%d\n", priv->port);
c27a02cd 1213
1e338db5 1214 priv->port_stats.tx_timeout++;
453a6082 1215 en_dbg(DRV, priv, "Scheduling watchdog\n");
1e338db5 1216 queue_work(mdev->workqueue, &priv->watchdog_task);
c27a02cd
YP		 1217}
1218
1219
1220static struct net_device_stats *mlx4_en_get_stats(struct net_device *dev)
1221{
1222 struct mlx4_en_priv *priv = netdev_priv(dev);
1223
1224 spin_lock_bh(&priv->stats_lock);
1225 memcpy(&priv->ret_stats, &priv->stats, sizeof(priv->stats));
1226 spin_unlock_bh(&priv->stats_lock);
1227
1228 return &priv->ret_stats;
1229}
1230
1231static void mlx4_en_set_default_moderation(struct mlx4_en_priv *priv)
1232{
c27a02cd
YP		 1233 struct mlx4_en_cq *cq;
1234 int i;
1235
1236 /* If we haven't received a specific coalescing setting
98a1708d 1237 * (module param), we set the moderation parameters as follows:
c27a02cd 1238 * - moder_cnt is set to the number of mtu sized packets to
ecfd2ce1 1239 * satisfy our coalescing target.
c27a02cd
YP		 1240 * - moder_time is set to a fixed value.
1241 */
3db36fb2 1242 priv->rx_frames = MLX4_EN_RX_COAL_TARGET;
60b9f9e5 1243 priv->rx_usecs = MLX4_EN_RX_COAL_TIME;
a19a848a
YP		 1244 priv->tx_frames = MLX4_EN_TX_COAL_PKTS;
1245 priv->tx_usecs = MLX4_EN_TX_COAL_TIME;
48e551ff
YB		 1246 en_dbg(INTR, priv, "Default coalesing params for mtu:%d - rx_frames:%d rx_usecs:%d\n",
1247 priv->dev->mtu, priv->rx_frames, priv->rx_usecs);
c27a02cd
YP		 1248
1249 /* Setup cq moderation params */
1250 for (i = 0; i < priv->rx_ring_num; i++) {
1251 cq = &priv->rx_cq[i];
1252 cq->moder_cnt = priv->rx_frames;
1253 cq->moder_time = priv->rx_usecs;
6b4d8d9f
AG		 1254 priv->last_moder_time[i] = MLX4_EN_AUTO_CONF;
1255 priv->last_moder_packets[i] = 0;
1256 priv->last_moder_bytes[i] = 0;
c27a02cd
YP		 1257 }
1258
1259 for (i = 0; i < priv->tx_ring_num; i++) {
1260 cq = &priv->tx_cq[i];
a19a848a
YP		 1261 cq->moder_cnt = priv->tx_frames;
1262 cq->moder_time = priv->tx_usecs;
c27a02cd
YP		 1263 }
1264
1265 /* Reset auto-moderation params */
1266 priv->pkt_rate_low = MLX4_EN_RX_RATE_LOW;
1267 priv->rx_usecs_low = MLX4_EN_RX_COAL_TIME_LOW;
1268 priv->pkt_rate_high = MLX4_EN_RX_RATE_HIGH;
1269 priv->rx_usecs_high = MLX4_EN_RX_COAL_TIME_HIGH;
1270 priv->sample_interval = MLX4_EN_SAMPLE_INTERVAL;
60b9f9e5 1271 priv->adaptive_rx_coal = 1;
c27a02cd 1272 priv->last_moder_jiffies = 0;
c27a02cd 1273 priv->last_moder_tx_packets = 0;
c27a02cd
YP		 1274}
1275
1276static void mlx4_en_auto_moderation(struct mlx4_en_priv *priv)
1277{
1278 unsigned long period = (unsigned long) (jiffies - priv->last_moder_jiffies);
c27a02cd
YP		 1279 struct mlx4_en_cq *cq;
1280 unsigned long packets;
1281 unsigned long rate;
1282 unsigned long avg_pkt_size;
1283 unsigned long rx_packets;
1284 unsigned long rx_bytes;
c27a02cd
YP		 1285 unsigned long rx_pkt_diff;
1286 int moder_time;
6b4d8d9f 1287 int ring, err;
c27a02cd
YP		 1288
1289 if (!priv->adaptive_rx_coal || period < priv->sample_interval * HZ)
1290 return;
1291
6b4d8d9f
AG		 1292 for (ring = 0; ring < priv->rx_ring_num; ring++) {
1293 spin_lock_bh(&priv->stats_lock);
1294 rx_packets = priv->rx_ring[ring].packets;
1295 rx_bytes = priv->rx_ring[ring].bytes;
1296 spin_unlock_bh(&priv->stats_lock);
1297
1298 rx_pkt_diff = ((unsigned long) (rx_packets -
1299 priv->last_moder_packets[ring]));
1300 packets = rx_pkt_diff;
1301 rate = packets * HZ / period;
1302 avg_pkt_size = packets ? ((unsigned long) (rx_bytes -
1303 priv->last_moder_bytes[ring])) / packets : 0;
1304
1305 /* Apply auto-moderation only when packet rate
1306 * exceeds a rate that it matters */
1307 if (rate > (MLX4_EN_RX_RATE_THRESH / priv->rx_ring_num) &&
1308 avg_pkt_size > MLX4_EN_AVG_PKT_SMALL) {
c27a02cd
YP		 1309 if (rate < priv->pkt_rate_low)
1310 moder_time = priv->rx_usecs_low;
1311 else if (rate > priv->pkt_rate_high)
1312 moder_time = priv->rx_usecs_high;
1313 else
1314 moder_time = (rate - priv->pkt_rate_low) *
1315 (priv->rx_usecs_high - priv->rx_usecs_low) /
1316 (priv->pkt_rate_high - priv->pkt_rate_low) +
1317 priv->rx_usecs_low;
6b4d8d9f
AG		 1318 } else {
1319 moder_time = priv->rx_usecs_low;
c27a02cd 1320 }
c27a02cd 1321
6b4d8d9f
AG		 1322 if (moder_time != priv->last_moder_time[ring]) {
1323 priv->last_moder_time[ring] = moder_time;
1324 cq = &priv->rx_cq[ring];
c27a02cd
YP		 1325 cq->moder_time = moder_time;
1326 err = mlx4_en_set_cq_moder(priv, cq);
6b4d8d9f 1327 if (err)
48e551ff
YB		 1328 en_err(priv, "Failed modifying moderation for cq:%d\n",
1329 ring);
c27a02cd 1330 }
6b4d8d9f
AG		 1331 priv->last_moder_packets[ring] = rx_packets;
1332 priv->last_moder_bytes[ring] = rx_bytes;
c27a02cd
YP		 1333 }
1334
c27a02cd
YP		 1335 priv->last_moder_jiffies = jiffies;
1336}
1337
1338static void mlx4_en_do_get_stats(struct work_struct *work)
1339{
bf6aede7 1340 struct delayed_work *delay = to_delayed_work(work);
c27a02cd
YP		 1341 struct mlx4_en_priv *priv = container_of(delay, struct mlx4_en_priv,
1342 stats_task);
1343 struct mlx4_en_dev *mdev = priv->mdev;
1344 int err;
1345
c27a02cd
YP		 1346 mutex_lock(&mdev->state_lock);
1347 if (mdev->device_up) {
2d51837f
EE		 1348 err = mlx4_en_DUMP_ETH_STATS(mdev, priv->port, 0);
1349 if (err)
1350 en_dbg(HW, priv, "Could not update stats\n");
1351
c27a02cd
YP		 1352 if (priv->port_up)
1353 mlx4_en_auto_moderation(priv);
1354
1355 queue_delayed_work(mdev->workqueue, &priv->stats_task, STATS_DELAY);
1356 }
d7e1a487 1357 if (mdev->mac_removed[MLX4_MAX_PORTS + 1 - priv->port]) {
bfa8ab47 1358 mlx4_en_do_set_mac(priv);
d7e1a487
YP		 1359 mdev->mac_removed[MLX4_MAX_PORTS + 1 - priv->port] = 0;
1360 }
c27a02cd
YP		 1361 mutex_unlock(&mdev->state_lock);
1362}
1363
b6c39bfc
AV		 1364/* mlx4_en_service_task - Run service task for tasks that needed to be done
1365 * periodically
1366 */
1367static void mlx4_en_service_task(struct work_struct *work)
1368{
1369 struct delayed_work *delay = to_delayed_work(work);
1370 struct mlx4_en_priv *priv = container_of(delay, struct mlx4_en_priv,
1371 service_task);
1372 struct mlx4_en_dev *mdev = priv->mdev;
1373
1374 mutex_lock(&mdev->state_lock);
1375 if (mdev->device_up) {
dc8142ea
AV		 1376 if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_TS)
1377 mlx4_en_ptp_overflow_check(mdev);
b6c39bfc
AV		 1378
1379 queue_delayed_work(mdev->workqueue, &priv->service_task,
1380 SERVICE_TASK_DELAY);
1381 }
1382 mutex_unlock(&mdev->state_lock);
1383}
1384
c27a02cd
YP		 1385static void mlx4_en_linkstate(struct work_struct *work)
1386{
1387 struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv,
1388 linkstate_task);
1389 struct mlx4_en_dev *mdev = priv->mdev;
1390 int linkstate = priv->link_state;
1391
1392 mutex_lock(&mdev->state_lock);
1393 /* If observable port state changed set carrier state and
1394 * report to system log */
1395 if (priv->last_link_state != linkstate) {
1396 if (linkstate == MLX4_DEV_EVENT_PORT_DOWN) {
e5cc44b2 1397 en_info(priv, "Link Down\n");
c27a02cd
YP		 1398 netif_carrier_off(priv->dev);
1399 } else {
e5cc44b2 1400 en_info(priv, "Link Up\n");
c27a02cd
YP		 1401 netif_carrier_on(priv->dev);
1402 }
1403 }
1404 priv->last_link_state = linkstate;
1405 mutex_unlock(&mdev->state_lock);
1406}
1407
1408
18cc42a3 1409int mlx4_en_start_port(struct net_device *dev)
c27a02cd
YP		 1410{
1411 struct mlx4_en_priv *priv = netdev_priv(dev);
1412 struct mlx4_en_dev *mdev = priv->mdev;
1413 struct mlx4_en_cq *cq;
1414 struct mlx4_en_tx_ring *tx_ring;
c27a02cd
YP		 1415 int rx_index = 0;
1416 int tx_index = 0;
c27a02cd
YP		 1417 int err = 0;
1418 int i;
1419 int j;
1679200f 1420 u8 mc_list[16] = {0};
c27a02cd
YP		 1421
1422 if (priv->port_up) {
453a6082 1423 en_dbg(DRV, priv, "start port called while port already up\n");
c27a02cd
YP		 1424 return 0;
1425 }
1426
6d199937
YP		 1427 INIT_LIST_HEAD(&priv->mc_list);
1428 INIT_LIST_HEAD(&priv->curr_list);
0d256c0e
HHZ		 1429 INIT_LIST_HEAD(&priv->ethtool_list);
1430 memset(&priv->ethtool_rules[0], 0,
1431 sizeof(struct ethtool_flow_id) * MAX_NUM_OF_FS_RULES);
6d199937 1432
c27a02cd
YP		 1433 /* Calculate Rx buf size */
1434 dev->mtu = min(dev->mtu, priv->max_mtu);
1435 mlx4_en_calc_rx_buf(dev);
453a6082 1436 en_dbg(DRV, priv, "Rx buf size:%d\n", priv->rx_skb_size);
38aab07c 1437
c27a02cd 1438 /* Configure rx cq's and rings */
38aab07c
YP		 1439 err = mlx4_en_activate_rx_rings(priv);
1440 if (err) {
453a6082 1441 en_err(priv, "Failed to activate RX rings\n");
38aab07c
YP		 1442 return err;
1443 }
c27a02cd
YP		 1444 for (i = 0; i < priv->rx_ring_num; i++) {
1445 cq = &priv->rx_cq[i];
c27a02cd 1446
76532d0c 1447 err = mlx4_en_activate_cq(priv, cq, i);
c27a02cd 1448 if (err) {
453a6082 1449 en_err(priv, "Failed activating Rx CQ\n");
a4233304 1450 goto cq_err;
c27a02cd
YP		 1451 }
1452 for (j = 0; j < cq->size; j++)
1453 cq->buf[j].owner_sr_opcode = MLX4_CQE_OWNER_MASK;
1454 err = mlx4_en_set_cq_moder(priv, cq);
1455 if (err) {
453a6082 1456 en_err(priv, "Failed setting cq moderation parameters");
c27a02cd
YP		 1457 mlx4_en_deactivate_cq(priv, cq);
1458 goto cq_err;
1459 }
1460 mlx4_en_arm_cq(priv, cq);
38aab07c 1461 priv->rx_ring[i].cqn = cq->mcq.cqn;
c27a02cd
YP		 1462 ++rx_index;
1463 }
1464
ffe455ad
EE		 1465 /* Set qp number */
1466 en_dbg(DRV, priv, "Getting qp number for port %d\n", priv->port);
16a10ffd 1467 err = mlx4_en_get_qp(priv);
1679200f 1468 if (err) {
ffe455ad 1469 en_err(priv, "Failed getting eth qp\n");
1679200f
YP		 1470 goto cq_err;
1471 }
1472 mdev->mac_removed[priv->port] = 0;
1473
c27a02cd
YP		 1474 err = mlx4_en_config_rss_steer(priv);
1475 if (err) {
453a6082 1476 en_err(priv, "Failed configuring rss steering\n");
1679200f 1477 goto mac_err;
c27a02cd
YP		 1478 }
1479
cabdc8ee
HHZ		 1480 err = mlx4_en_create_drop_qp(priv);
1481 if (err)
1482 goto rss_err;
1483
c27a02cd
YP		 1484 /* Configure tx cq's and rings */
1485 for (i = 0; i < priv->tx_ring_num; i++) {
1486 /* Configure cq */
1487 cq = &priv->tx_cq[i];
76532d0c 1488 err = mlx4_en_activate_cq(priv, cq, i);
c27a02cd 1489 if (err) {
453a6082 1490 en_err(priv, "Failed allocating Tx CQ\n");
c27a02cd
YP		 1491 goto tx_err;
1492 }
1493 err = mlx4_en_set_cq_moder(priv, cq);
1494 if (err) {
453a6082 1495 en_err(priv, "Failed setting cq moderation parameters");
c27a02cd
YP		 1496 mlx4_en_deactivate_cq(priv, cq);
1497 goto tx_err;
1498 }
453a6082 1499 en_dbg(DRV, priv, "Resetting index of collapsed CQ:%d to -1\n", i);
c27a02cd
YP		 1500 cq->buf->wqe_index = cpu_to_be16(0xffff);
1501
1502 /* Configure ring */
1503 tx_ring = &priv->tx_ring[i];
0e98b523 1504 err = mlx4_en_activate_tx_ring(priv, tx_ring, cq->mcq.cqn,
d317966b 1505 i / priv->num_tx_rings_p_up);
c27a02cd 1506 if (err) {
453a6082 1507 en_err(priv, "Failed allocating Tx ring\n");
c27a02cd
YP		 1508 mlx4_en_deactivate_cq(priv, cq);
1509 goto tx_err;
1510 }
5b263f53 1511 tx_ring->tx_queue = netdev_get_tx_queue(dev, i);
e22979d9
YP		 1512
1513 /* Arm CQ for TX completions */
1514 mlx4_en_arm_cq(priv, cq);
1515
c27a02cd
YP		 1516 /* Set initial ownership of all Tx TXBBs to SW (1) */
1517 for (j = 0; j < tx_ring->buf_size; j += STAMP_STRIDE)
1518 *((u32 *) (tx_ring->buf + j)) = 0xffffffff;
1519 ++tx_index;
1520 }
1521
1522 /* Configure port */
1523 err = mlx4_SET_PORT_general(mdev->dev, priv->port,
1524 priv->rx_skb_size + ETH_FCS_LEN,
d53b93f2
YP		 1525 priv->prof->tx_pause,
1526 priv->prof->tx_ppp,
1527 priv->prof->rx_pause,
1528 priv->prof->rx_ppp);
c27a02cd 1529 if (err) {
48e551ff
YB		 1530 en_err(priv, "Failed setting port general configurations for port %d, with error %d\n",
1531 priv->port, err);
c27a02cd
YP		 1532 goto tx_err;
1533 }
1534 /* Set default qp number */
1535 err = mlx4_SET_PORT_qpn_calc(mdev->dev, priv->port, priv->base_qpn, 0);
1536 if (err) {
453a6082 1537 en_err(priv, "Failed setting default qp numbers\n");
c27a02cd
YP		 1538 goto tx_err;
1539 }
c27a02cd
YP		 1540
1541 /* Init port */
453a6082 1542 en_dbg(HW, priv, "Initializing port\n");
c27a02cd
YP		 1543 err = mlx4_INIT_PORT(mdev->dev, priv->port);
1544 if (err) {
453a6082 1545 en_err(priv, "Failed Initializing port\n");
1679200f 1546 goto tx_err;
c27a02cd
YP		 1547 }
1548
1679200f
YP		 1549 /* Attach rx QP to bradcast address */
1550 memset(&mc_list[10], 0xff, ETH_ALEN);
0ff1fb65 1551 mc_list[5] = priv->port; /* needed for B0 steering support */
1679200f 1552 if (mlx4_multicast_attach(mdev->dev, &priv->rss_map.indir_qp, mc_list,
0ff1fb65
HHZ		 1553 priv->port, 0, MLX4_PROT_ETH,
1554 &priv->broadcast_id))
1679200f
YP		 1555 mlx4_warn(mdev, "Failed Attaching Broadcast\n");
1556
b5845f98
HX		 1557 /* Must redo promiscuous mode setup. */
1558 priv->flags &= ~(MLX4_EN_FLAG_PROMISC | MLX4_EN_FLAG_MC_PROMISC);
1559
c27a02cd 1560 /* Schedule multicast task to populate multicast list */
0eb74fdd 1561 queue_work(mdev->workqueue, &priv->rx_mode_task);
c27a02cd 1562
93ece0c1
EE		 1563 mlx4_set_stats_bitmap(mdev->dev, &priv->stats_bitmap);
1564
c27a02cd 1565 priv->port_up = true;
a11faac7 1566 netif_tx_start_all_queues(dev);
3484aac1
AV		 1567 netif_device_attach(dev);
1568
c27a02cd
YP		 1569 return 0;
1570
c27a02cd
YP		 1571tx_err:
1572 while (tx_index--) {
1573 mlx4_en_deactivate_tx_ring(priv, &priv->tx_ring[tx_index]);
1574 mlx4_en_deactivate_cq(priv, &priv->tx_cq[tx_index]);
1575 }
cabdc8ee
HHZ		 1576 mlx4_en_destroy_drop_qp(priv);
1577rss_err:
c27a02cd 1578 mlx4_en_release_rss_steer(priv);
1679200f 1579mac_err:
16a10ffd 1580 mlx4_en_put_qp(priv);
c27a02cd
YP		 1581cq_err:
1582 while (rx_index--)
1583 mlx4_en_deactivate_cq(priv, &priv->rx_cq[rx_index]);
38aab07c
YP		 1584 for (i = 0; i < priv->rx_ring_num; i++)
1585 mlx4_en_deactivate_rx_ring(priv, &priv->rx_ring[i]);
c27a02cd
YP		 1586
1587 return err; /* need to close devices */
1588}
1589
1590
3484aac1 1591void mlx4_en_stop_port(struct net_device *dev, int detach)
c27a02cd
YP		 1592{
1593 struct mlx4_en_priv *priv = netdev_priv(dev);
1594 struct mlx4_en_dev *mdev = priv->mdev;
6d199937 1595 struct mlx4_en_mc_list *mclist, *tmp;
0d256c0e 1596 struct ethtool_flow_id *flow, *tmp_flow;
c27a02cd 1597 int i;
1679200f 1598 u8 mc_list[16] = {0};
c27a02cd
YP		 1599
1600 if (!priv->port_up) {
453a6082 1601 en_dbg(DRV, priv, "stop port called while port already down\n");
c27a02cd
YP		 1602 return;
1603 }
c27a02cd
YP		 1604
1605 /* Synchronize with tx routine */
1606 netif_tx_lock_bh(dev);
3484aac1
AV		 1607 if (detach)
1608 netif_device_detach(dev);
3c05f5ef 1609 netif_tx_stop_all_queues(dev);
c27a02cd
YP		 1610 netif_tx_unlock_bh(dev);
1611
3484aac1
AV		 1612 netif_tx_disable(dev);
1613
7c287380 1614 /* Set port as not active */
3c05f5ef 1615 priv->port_up = false;
c27a02cd 1616
db0e7cba
AY		 1617 /* Promsicuous mode */
1618 if (mdev->dev->caps.steering_mode ==
1619 MLX4_STEERING_MODE_DEVICE_MANAGED) {
1620 priv->flags &= ~(MLX4_EN_FLAG_PROMISC |
1621 MLX4_EN_FLAG_MC_PROMISC);
1622 mlx4_flow_steer_promisc_remove(mdev->dev,
1623 priv->port,
1624 MLX4_FS_PROMISC_UPLINK);
1625 mlx4_flow_steer_promisc_remove(mdev->dev,
1626 priv->port,
1627 MLX4_FS_PROMISC_ALL_MULTI);
1628 } else if (priv->flags & MLX4_EN_FLAG_PROMISC) {
1629 priv->flags &= ~MLX4_EN_FLAG_PROMISC;
1630
1631 /* Disable promiscouos mode */
1632 mlx4_unicast_promisc_remove(mdev->dev, priv->base_qpn,
1633 priv->port);
1634
1635 /* Disable Multicast promisc */
1636 if (priv->flags & MLX4_EN_FLAG_MC_PROMISC) {
1637 mlx4_multicast_promisc_remove(mdev->dev, priv->base_qpn,
1638 priv->port);
1639 priv->flags &= ~MLX4_EN_FLAG_MC_PROMISC;
1640 }
1641 }
1642
1679200f
YP		 1643 /* Detach All multicasts */
1644 memset(&mc_list[10], 0xff, ETH_ALEN);
0ff1fb65 1645 mc_list[5] = priv->port; /* needed for B0 steering support */
1679200f 1646 mlx4_multicast_detach(mdev->dev, &priv->rss_map.indir_qp, mc_list,
0ff1fb65 1647 MLX4_PROT_ETH, priv->broadcast_id);
6d199937
YP		 1648 list_for_each_entry(mclist, &priv->curr_list, list) {
1649 memcpy(&mc_list[10], mclist->addr, ETH_ALEN);
1679200f
YP		 1650 mc_list[5] = priv->port;
1651 mlx4_multicast_detach(mdev->dev, &priv->rss_map.indir_qp,
0ff1fb65 1652 mc_list, MLX4_PROT_ETH, mclist->reg_id);
1679200f
YP		 1653 }
1654 mlx4_en_clear_list(dev);
6d199937
YP		 1655 list_for_each_entry_safe(mclist, tmp, &priv->curr_list, list) {
1656 list_del(&mclist->list);
1657 kfree(mclist);
1658 }
1659
1679200f
YP		 1660 /* Flush multicast filter */
1661 mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0, 1, MLX4_MCAST_CONFIG);
1662
6efb5fac
HHZ		 1663 /* Remove flow steering rules for the port*/
1664 if (mdev->dev->caps.steering_mode ==
1665 MLX4_STEERING_MODE_DEVICE_MANAGED) {
1666 ASSERT_RTNL();
1667 list_for_each_entry_safe(flow, tmp_flow,
1668 &priv->ethtool_list, list) {
1669 mlx4_flow_detach(mdev->dev, flow->id);
1670 list_del(&flow->list);
1671 }
1672 }
1673
cabdc8ee
HHZ		 1674 mlx4_en_destroy_drop_qp(priv);
1675
c27a02cd
YP		 1676 /* Free TX Rings */
1677 for (i = 0; i < priv->tx_ring_num; i++) {
1678 mlx4_en_deactivate_tx_ring(priv, &priv->tx_ring[i]);
1679 mlx4_en_deactivate_cq(priv, &priv->tx_cq[i]);
1680 }
1681 msleep(10);
1682
1683 for (i = 0; i < priv->tx_ring_num; i++)
1684 mlx4_en_free_tx_buf(dev, &priv->tx_ring[i]);
1685
1686 /* Free RSS qps */
1687 mlx4_en_release_rss_steer(priv);
1688
ffe455ad 1689 /* Unregister Mac address for the port */
16a10ffd 1690 mlx4_en_put_qp(priv);
955154fa
MB		 1691 if (!(mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAGS2_REASSIGN_MAC_EN))
1692 mdev->mac_removed[priv->port] = 1;
ffe455ad 1693
c27a02cd
YP		 1694 /* Free RX Rings */
1695 for (i = 0; i < priv->rx_ring_num; i++) {
1696 mlx4_en_deactivate_rx_ring(priv, &priv->rx_ring[i]);
1697 while (test_bit(NAPI_STATE_SCHED, &priv->rx_cq[i].napi.state))
1698 msleep(1);
1699 mlx4_en_deactivate_cq(priv, &priv->rx_cq[i]);
1700 }
7c287380
YP		 1701
1702 /* close port*/
1703 mlx4_CLOSE_PORT(mdev->dev, priv->port);
c27a02cd
YP		 1704}
1705
1706static void mlx4_en_restart(struct work_struct *work)
1707{
1708 struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv,
1709 watchdog_task);
1710 struct mlx4_en_dev *mdev = priv->mdev;
1711 struct net_device *dev = priv->dev;
1712
453a6082 1713 en_dbg(DRV, priv, "Watchdog task called for port %d\n", priv->port);
1e338db5
YP		 1714
1715 mutex_lock(&mdev->state_lock);
1716 if (priv->port_up) {
3484aac1 1717 mlx4_en_stop_port(dev, 1);
1e338db5 1718 if (mlx4_en_start_port(dev))
453a6082 1719 en_err(priv, "Failed restarting port %d\n", priv->port);
1e338db5
YP		 1720 }
1721 mutex_unlock(&mdev->state_lock);
c27a02cd
YP		 1722}
1723
b477ba62 1724static void mlx4_en_clear_stats(struct net_device *dev)
c27a02cd
YP		 1725{
1726 struct mlx4_en_priv *priv = netdev_priv(dev);
1727 struct mlx4_en_dev *mdev = priv->mdev;
1728 int i;
c27a02cd 1729
c27a02cd 1730 if (mlx4_en_DUMP_ETH_STATS(mdev, priv->port, 1))
453a6082 1731 en_dbg(HW, priv, "Failed dumping statistics\n");
c27a02cd
YP		 1732
1733 memset(&priv->stats, 0, sizeof(priv->stats));
1734 memset(&priv->pstats, 0, sizeof(priv->pstats));
b477ba62
EE		 1735 memset(&priv->pkstats, 0, sizeof(priv->pkstats));
1736 memset(&priv->port_stats, 0, sizeof(priv->port_stats));
c27a02cd
YP		 1737
1738 for (i = 0; i < priv->tx_ring_num; i++) {
1739 priv->tx_ring[i].bytes = 0;
1740 priv->tx_ring[i].packets = 0;
b477ba62 1741 priv->tx_ring[i].tx_csum = 0;
c27a02cd
YP		 1742 }
1743 for (i = 0; i < priv->rx_ring_num; i++) {
1744 priv->rx_ring[i].bytes = 0;
1745 priv->rx_ring[i].packets = 0;
b477ba62
EE		 1746 priv->rx_ring[i].csum_ok = 0;
1747 priv->rx_ring[i].csum_none = 0;
c27a02cd 1748 }
b477ba62
EE		 1749}
1750
1751static int mlx4_en_open(struct net_device *dev)
1752{
1753 struct mlx4_en_priv *priv = netdev_priv(dev);
1754 struct mlx4_en_dev *mdev = priv->mdev;
1755 int err = 0;
1756
1757 mutex_lock(&mdev->state_lock);
1758
1759 if (!mdev->device_up) {
1760 en_err(priv, "Cannot open - device down/disabled\n");
1761 err = -EBUSY;
1762 goto out;
1763 }
1764
1765 /* Reset HW statistics and SW counters */
1766 mlx4_en_clear_stats(dev);
c27a02cd 1767
c27a02cd
YP		 1768 err = mlx4_en_start_port(dev);
1769 if (err)
453a6082 1770 en_err(priv, "Failed starting port:%d\n", priv->port);
c27a02cd
YP		 1771
1772out:
1773 mutex_unlock(&mdev->state_lock);
1774 return err;
1775}
1776
1777
1778static int mlx4_en_close(struct net_device *dev)
1779{
1780 struct mlx4_en_priv *priv = netdev_priv(dev);
1781 struct mlx4_en_dev *mdev = priv->mdev;
1782
453a6082 1783 en_dbg(IFDOWN, priv, "Close port called\n");
c27a02cd
YP		 1784
1785 mutex_lock(&mdev->state_lock);
1786
3484aac1 1787 mlx4_en_stop_port(dev, 0);
c27a02cd
YP		 1788 netif_carrier_off(dev);
1789
1790 mutex_unlock(&mdev->state_lock);
1791 return 0;
1792}
1793
fe0af03c 1794void mlx4_en_free_resources(struct mlx4_en_priv *priv)
c27a02cd
YP		 1795{
1796 int i;
1797
1eb8c695
AV		 1798#ifdef CONFIG_RFS_ACCEL
1799 free_irq_cpu_rmap(priv->dev->rx_cpu_rmap);
1800 priv->dev->rx_cpu_rmap = NULL;
1801#endif
1802
c27a02cd
YP		 1803 for (i = 0; i < priv->tx_ring_num; i++) {
1804 if (priv->tx_ring[i].tx_info)
1805 mlx4_en_destroy_tx_ring(priv, &priv->tx_ring[i]);
1806 if (priv->tx_cq[i].buf)
fe0af03c 1807 mlx4_en_destroy_cq(priv, &priv->tx_cq[i]);
c27a02cd
YP		 1808 }
1809
1810 for (i = 0; i < priv->rx_ring_num; i++) {
1811 if (priv->rx_ring[i].rx_info)
68355f71
TLSC		 1812 mlx4_en_destroy_rx_ring(priv, &priv->rx_ring[i],
1813 priv->prof->rx_ring_size, priv->stride);
c27a02cd 1814 if (priv->rx_cq[i].buf)
fe0af03c 1815 mlx4_en_destroy_cq(priv, &priv->rx_cq[i]);
c27a02cd 1816 }
044ca2a5
YP		 1817
1818 if (priv->base_tx_qpn) {
1819 mlx4_qp_release_range(priv->mdev->dev, priv->base_tx_qpn, priv->tx_ring_num);
1820 priv->base_tx_qpn = 0;
1821 }
c27a02cd
YP		 1822}
1823
18cc42a3 1824int mlx4_en_alloc_resources(struct mlx4_en_priv *priv)
c27a02cd 1825{
c27a02cd
YP		 1826 struct mlx4_en_port_profile *prof = priv->prof;
1827 int i;
044ca2a5 1828 int err;
87a5c389 1829
044ca2a5 1830 err = mlx4_qp_reserve_range(priv->mdev->dev, priv->tx_ring_num, 256, &priv->base_tx_qpn);
87a5c389
YP		 1831 if (err) {
1832 en_err(priv, "failed reserving range for TX rings\n");
1833 return err;
1834 }
c27a02cd
YP		 1835
1836 /* Create tx Rings */
1837 for (i = 0; i < priv->tx_ring_num; i++) {
1838 if (mlx4_en_create_cq(priv, &priv->tx_cq[i],
1839 prof->tx_ring_size, i, TX))
1840 goto err;
1841
044ca2a5 1842 if (mlx4_en_create_tx_ring(priv, &priv->tx_ring[i], priv->base_tx_qpn + i,
c27a02cd
YP		 1843 prof->tx_ring_size, TXBB_SIZE))
1844 goto err;
1845 }
1846
1847 /* Create rx Rings */
1848 for (i = 0; i < priv->rx_ring_num; i++) {
1849 if (mlx4_en_create_cq(priv, &priv->rx_cq[i],
1850 prof->rx_ring_size, i, RX))
1851 goto err;
1852
1853 if (mlx4_en_create_rx_ring(priv, &priv->rx_ring[i],
1854 prof->rx_ring_size, priv->stride))
1855 goto err;
1856 }
1857
1eb8c695 1858#ifdef CONFIG_RFS_ACCEL
a229e488
AV		 1859 if (priv->mdev->dev->caps.comp_pool) {
1860 priv->dev->rx_cpu_rmap = alloc_irq_cpu_rmap(priv->mdev->dev->caps.comp_pool);
1861 if (!priv->dev->rx_cpu_rmap)
1862 goto err;
1863 }
1eb8c695
AV		 1864#endif
1865
c27a02cd
YP		 1866 return 0;
1867
1868err:
453a6082 1869 en_err(priv, "Failed to allocate NIC resources\n");
c27a02cd
YP		 1870 return -ENOMEM;
1871}
1872
1873
1874void mlx4_en_destroy_netdev(struct net_device *dev)
1875{
1876 struct mlx4_en_priv *priv = netdev_priv(dev);
1877 struct mlx4_en_dev *mdev = priv->mdev;
1878
453a6082 1879 en_dbg(DRV, priv, "Destroying netdev on port:%d\n", priv->port);
c27a02cd
YP		 1880
1881 /* Unregister device - this will close the port if it was up */
1882 if (priv->registered)
1883 unregister_netdev(dev);
1884
1885 if (priv->allocated)
1886 mlx4_free_hwq_res(mdev->dev, &priv->res, MLX4_EN_PAGE_SIZE);
1887
1888 cancel_delayed_work(&priv->stats_task);
b6c39bfc 1889 cancel_delayed_work(&priv->service_task);
c27a02cd
YP		 1890 /* flush any pending task for this netdev */
1891 flush_workqueue(mdev->workqueue);
1892
1893 /* Detach the netdev so tasks would not attempt to access it */
1894 mutex_lock(&mdev->state_lock);
1895 mdev->pndev[priv->port] = NULL;
1896 mutex_unlock(&mdev->state_lock);
1897
fe0af03c 1898 mlx4_en_free_resources(priv);
564c274c 1899
bc6a4744
AV		 1900 kfree(priv->tx_ring);
1901 kfree(priv->tx_cq);
1902
c27a02cd
YP		 1903 free_netdev(dev);
1904}
1905
1906static int mlx4_en_change_mtu(struct net_device *dev, int new_mtu)
1907{
1908 struct mlx4_en_priv *priv = netdev_priv(dev);
1909 struct mlx4_en_dev *mdev = priv->mdev;
1910 int err = 0;
1911
453a6082 1912 en_dbg(DRV, priv, "Change MTU called - current:%d new:%d\n",
c27a02cd
YP		 1913 dev->mtu, new_mtu);
1914
1915 if ((new_mtu < MLX4_EN_MIN_MTU) || (new_mtu > priv->max_mtu)) {
453a6082 1916 en_err(priv, "Bad MTU size:%d.\n", new_mtu);
c27a02cd
YP		 1917 return -EPERM;
1918 }
1919 dev->mtu = new_mtu;
1920
1921 if (netif_running(dev)) {
1922 mutex_lock(&mdev->state_lock);
1923 if (!mdev->device_up) {
1924 /* NIC is probably restarting - let watchdog task reset
1925 * the port */
453a6082 1926 en_dbg(DRV, priv, "Change MTU called with card down!?\n");
c27a02cd 1927 } else {
3484aac1 1928 mlx4_en_stop_port(dev, 1);
c27a02cd
YP		 1929 err = mlx4_en_start_port(dev);
1930 if (err) {
453a6082 1931 en_err(priv, "Failed restarting port:%d\n",
c27a02cd
YP		 1932 priv->port);
1933 queue_work(mdev->workqueue, &priv->watchdog_task);
1934 }
1935 }
1936 mutex_unlock(&mdev->state_lock);
1937 }
1938 return 0;
1939}
1940
ec693d47
AV		 1941static int mlx4_en_hwtstamp_ioctl(struct net_device *dev, struct ifreq *ifr)
1942{
1943 struct mlx4_en_priv *priv = netdev_priv(dev);
1944 struct mlx4_en_dev *mdev = priv->mdev;
1945 struct hwtstamp_config config;
1946
1947 if (copy_from_user(&config, ifr->ifr_data, sizeof(config)))
1948 return -EFAULT;
1949
1950 /* reserved for future extensions */
1951 if (config.flags)
1952 return -EINVAL;
1953
1954 /* device doesn't support time stamping */
1955 if (!(mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_TS))
1956 return -EINVAL;
1957
1958 /* TX HW timestamp */
1959 switch (config.tx_type) {
1960 case HWTSTAMP_TX_OFF:
1961 case HWTSTAMP_TX_ON:
1962 break;
1963 default:
1964 return -ERANGE;
1965 }
1966
1967 /* RX HW timestamp */
1968 switch (config.rx_filter) {
1969 case HWTSTAMP_FILTER_NONE:
1970 break;
1971 case HWTSTAMP_FILTER_ALL:
1972 case HWTSTAMP_FILTER_SOME:
1973 case HWTSTAMP_FILTER_PTP_V1_L4_EVENT:
1974 case HWTSTAMP_FILTER_PTP_V1_L4_SYNC:
1975 case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ:
1976 case HWTSTAMP_FILTER_PTP_V2_L4_EVENT:
1977 case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:
1978 case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:
1979 case HWTSTAMP_FILTER_PTP_V2_L2_EVENT:
1980 case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:
1981 case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ:
1982 case HWTSTAMP_FILTER_PTP_V2_EVENT:
1983 case HWTSTAMP_FILTER_PTP_V2_SYNC:
1984 case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:
1985 config.rx_filter = HWTSTAMP_FILTER_ALL;
1986 break;
1987 default:
1988 return -ERANGE;
1989 }
1990
1991 if (mlx4_en_timestamp_config(dev, config.tx_type, config.rx_filter)) {
1992 config.tx_type = HWTSTAMP_TX_OFF;
1993 config.rx_filter = HWTSTAMP_FILTER_NONE;
1994 }
1995
1996 return copy_to_user(ifr->ifr_data, &config,
1997 sizeof(config)) ? -EFAULT : 0;
1998}
1999
2000static int mlx4_en_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
2001{
2002 switch (cmd) {
2003 case SIOCSHWTSTAMP:
2004 return mlx4_en_hwtstamp_ioctl(dev, ifr);
2005 default:
2006 return -EOPNOTSUPP;
2007 }
2008}
2009
60d6fe99
AV		 2010static int mlx4_en_set_features(struct net_device *netdev,
2011 netdev_features_t features)
2012{
2013 struct mlx4_en_priv *priv = netdev_priv(netdev);
2014
2015 if (features & NETIF_F_LOOPBACK)
2016 priv->ctrl_flags |= cpu_to_be32(MLX4_WQE_CTRL_FORCE_LOOPBACK);
2017 else
2018 priv->ctrl_flags &=
2019 cpu_to_be32(~MLX4_WQE_CTRL_FORCE_LOOPBACK);
2020
79aeaccd
YB		 2021 mlx4_en_update_loopback_state(netdev, features);
2022
60d6fe99
AV		 2023 return 0;
2024
2025}
2026
8f7ba3ca
RE		 2027static int mlx4_en_set_vf_mac(struct net_device *dev, int queue, u8 *mac)
2028{
2029 struct mlx4_en_priv *en_priv = netdev_priv(dev);
2030 struct mlx4_en_dev *mdev = en_priv->mdev;
2031 u64 mac_u64 = mlx4_en_mac_to_u64(mac);
2032
2033 if (!is_valid_ether_addr(mac))
2034 return -EINVAL;
2035
2036 return mlx4_set_vf_mac(mdev->dev, en_priv->port, queue, mac_u64);
2037}
2038
3f7fb021
RE		 2039static int mlx4_en_set_vf_vlan(struct net_device *dev, int vf, u16 vlan, u8 qos)
2040{
2041 struct mlx4_en_priv *en_priv = netdev_priv(dev);
2042 struct mlx4_en_dev *mdev = en_priv->mdev;
2043
2044 return mlx4_set_vf_vlan(mdev->dev, en_priv->port, vf, vlan, qos);
2045}
2046
8f7ba3ca 2047
3addc568
SH		 2048static const struct net_device_ops mlx4_netdev_ops = {
2049 .ndo_open = mlx4_en_open,
2050 .ndo_stop = mlx4_en_close,
2051 .ndo_start_xmit = mlx4_en_xmit,
f813cad8 2052 .ndo_select_queue = mlx4_en_select_queue,
3addc568 2053 .ndo_get_stats = mlx4_en_get_stats,
0eb74fdd 2054 .ndo_set_rx_mode = mlx4_en_set_rx_mode,
3addc568 2055 .ndo_set_mac_address = mlx4_en_set_mac,
52255bbe 2056 .ndo_validate_addr = eth_validate_addr,
3addc568 2057 .ndo_change_mtu = mlx4_en_change_mtu,
ec693d47 2058 .ndo_do_ioctl = mlx4_en_ioctl,
3addc568 2059 .ndo_tx_timeout = mlx4_en_tx_timeout,
3addc568
SH		 2060 .ndo_vlan_rx_add_vid = mlx4_en_vlan_rx_add_vid,
2061 .ndo_vlan_rx_kill_vid = mlx4_en_vlan_rx_kill_vid,
2062#ifdef CONFIG_NET_POLL_CONTROLLER
2063 .ndo_poll_controller = mlx4_en_netpoll,
2064#endif
60d6fe99 2065 .ndo_set_features = mlx4_en_set_features,
897d7846 2066 .ndo_setup_tc = mlx4_en_setup_tc,
1eb8c695
AV		 2067#ifdef CONFIG_RFS_ACCEL
2068 .ndo_rx_flow_steer = mlx4_en_filter_rfs,
2069#endif
3addc568
SH		 2070};
2071
8f7ba3ca
RE		 2072static const struct net_device_ops mlx4_netdev_ops_master = {
2073 .ndo_open = mlx4_en_open,
2074 .ndo_stop = mlx4_en_close,
2075 .ndo_start_xmit = mlx4_en_xmit,
2076 .ndo_select_queue = mlx4_en_select_queue,
2077 .ndo_get_stats = mlx4_en_get_stats,
2078 .ndo_set_rx_mode = mlx4_en_set_rx_mode,
2079 .ndo_set_mac_address = mlx4_en_set_mac,
2080 .ndo_validate_addr = eth_validate_addr,
2081 .ndo_change_mtu = mlx4_en_change_mtu,
2082 .ndo_tx_timeout = mlx4_en_tx_timeout,
2083 .ndo_vlan_rx_add_vid = mlx4_en_vlan_rx_add_vid,
2084 .ndo_vlan_rx_kill_vid = mlx4_en_vlan_rx_kill_vid,
2085 .ndo_set_vf_mac = mlx4_en_set_vf_mac,
3f7fb021 2086 .ndo_set_vf_vlan = mlx4_en_set_vf_vlan,
8f7ba3ca
RE		 2087#ifdef CONFIG_NET_POLL_CONTROLLER
2088 .ndo_poll_controller = mlx4_en_netpoll,
2089#endif
2090 .ndo_set_features = mlx4_en_set_features,
2091 .ndo_setup_tc = mlx4_en_setup_tc,
2092#ifdef CONFIG_RFS_ACCEL
2093 .ndo_rx_flow_steer = mlx4_en_filter_rfs,
2094#endif
2095};
2096
c27a02cd
YP		 2097int mlx4_en_init_netdev(struct mlx4_en_dev *mdev, int port,
2098 struct mlx4_en_port_profile *prof)
2099{
2100 struct net_device *dev;
2101 struct mlx4_en_priv *priv;
c07cb4b0 2102 int i;
c27a02cd
YP		 2103 int err;
2104
f1593d22 2105 dev = alloc_etherdev_mqs(sizeof(struct mlx4_en_priv),
d317966b 2106 MAX_TX_RINGS, MAX_RX_RINGS);
41de8d4c 2107 if (dev == NULL)
c27a02cd 2108 return -ENOMEM;
c27a02cd 2109
d317966b
AV		 2110 netif_set_real_num_tx_queues(dev, prof->tx_ring_num);
2111 netif_set_real_num_rx_queues(dev, prof->rx_ring_num);
2112
c27a02cd 2113 SET_NETDEV_DEV(dev, &mdev->dev->pdev->dev);
741a00be 2114 dev->dev_id = port - 1;
c27a02cd
YP		 2115
2116 /*
2117 * Initialize driver private data
2118 */
2119
2120 priv = netdev_priv(dev);
2121 memset(priv, 0, sizeof(struct mlx4_en_priv));
2122 priv->dev = dev;
2123 priv->mdev = mdev;
ebf8c9aa 2124 priv->ddev = &mdev->pdev->dev;
c27a02cd
YP		 2125 priv->prof = prof;
2126 priv->port = port;
2127 priv->port_up = false;
c27a02cd 2128 priv->flags = prof->flags;
60d6fe99
AV		 2129 priv->ctrl_flags = cpu_to_be32(MLX4_WQE_CTRL_CQ_UPDATE |
2130 MLX4_WQE_CTRL_SOLICITED);
d317966b 2131 priv->num_tx_rings_p_up = mdev->profile.num_tx_rings_p_up;
c27a02cd 2132 priv->tx_ring_num = prof->tx_ring_num;
d317966b
AV		 2133
2134 priv->tx_ring = kzalloc(sizeof(struct mlx4_en_tx_ring) * MAX_TX_RINGS,
2135 GFP_KERNEL);
bc6a4744
AV		 2136 if (!priv->tx_ring) {
2137 err = -ENOMEM;
2138 goto out;
2139 }
427a9625 2140 priv->tx_cq = kzalloc(sizeof(struct mlx4_en_cq) * MAX_TX_RINGS,
d317966b 2141 GFP_KERNEL);
bc6a4744
AV		 2142 if (!priv->tx_cq) {
2143 err = -ENOMEM;
2144 goto out;
2145 }
c27a02cd 2146 priv->rx_ring_num = prof->rx_ring_num;
08ff3235 2147 priv->cqe_factor = (mdev->dev->caps.cqe_size == 64) ? 1 : 0;
c27a02cd
YP		 2148 priv->mac_index = -1;
2149 priv->msg_enable = MLX4_EN_MSG_LEVEL;
2150 spin_lock_init(&priv->stats_lock);
0eb74fdd 2151 INIT_WORK(&priv->rx_mode_task, mlx4_en_do_set_rx_mode);
c27a02cd
YP		 2152 INIT_WORK(&priv->watchdog_task, mlx4_en_restart);
2153 INIT_WORK(&priv->linkstate_task, mlx4_en_linkstate);
2154 INIT_DELAYED_WORK(&priv->stats_task, mlx4_en_do_get_stats);
b6c39bfc 2155 INIT_DELAYED_WORK(&priv->service_task, mlx4_en_service_task);
564c274c 2156#ifdef CONFIG_MLX4_EN_DCB
540b3a39
OG		 2157 if (!mlx4_is_slave(priv->mdev->dev)) {
2158 if (mdev->dev->caps.flags & MLX4_DEV_CAP_FLAG_SET_ETH_SCHED) {
2159 dev->dcbnl_ops = &mlx4_en_dcbnl_ops;
2160 } else {
2161 en_info(priv, "enabling only PFC DCB ops\n");
2162 dev->dcbnl_ops = &mlx4_en_dcbnl_pfc_ops;
2163 }
2164 }
564c274c 2165#endif
c27a02cd 2166
c07cb4b0
YB		 2167 for (i = 0; i < MLX4_EN_MAC_HASH_SIZE; ++i)
2168 INIT_HLIST_HEAD(&priv->mac_hash[i]);
16a10ffd 2169
c27a02cd
YP		 2170 /* Query for default mac and max mtu */
2171 priv->max_mtu = mdev->dev->caps.eth_mtu_cap[priv->port];
6bbb6d99
YB		 2172
2173 /* Set default MAC */
2174 dev->addr_len = ETH_ALEN;
2175 mlx4_en_u64_to_mac(dev->dev_addr, mdev->dev->caps.def_mac[priv->port]);
2176 if (!is_valid_ether_addr(dev->dev_addr)) {
2177 en_err(priv, "Port: %d, invalid mac burned: %pM, quiting\n",
2178 priv->port, dev->dev_addr);
c27a02cd
YP		 2179 err = -EINVAL;
2180 goto out;
2181 }
2182
6bbb6d99
YB		 2183 memcpy(priv->prev_mac, dev->dev_addr, sizeof(priv->prev_mac));
2184
c27a02cd
YP		 2185 priv->stride = roundup_pow_of_two(sizeof(struct mlx4_en_rx_desc) +
2186 DS_SIZE * MLX4_EN_MAX_RX_FRAGS);
2187 err = mlx4_en_alloc_resources(priv);
2188 if (err)
2189 goto out;
2190
78fb2de7
AV		 2191#ifdef CONFIG_RFS_ACCEL
2192 INIT_LIST_HEAD(&priv->filters);
2193 spin_lock_init(&priv->filters_lock);
2194#endif
2195
ec693d47
AV		 2196 /* Initialize time stamping config */
2197 priv->hwtstamp_config.flags = 0;
2198 priv->hwtstamp_config.tx_type = HWTSTAMP_TX_OFF;
2199 priv->hwtstamp_config.rx_filter = HWTSTAMP_FILTER_NONE;
2200
c27a02cd
YP		 2201 /* Allocate page for receive rings */
2202 err = mlx4_alloc_hwq_res(mdev->dev, &priv->res,
2203 MLX4_EN_PAGE_SIZE, MLX4_EN_PAGE_SIZE);
2204 if (err) {
453a6082 2205 en_err(priv, "Failed to allocate page for rx qps\n");
c27a02cd
YP		 2206 goto out;
2207 }
2208 priv->allocated = 1;
2209
c27a02cd
YP		 2210 /*
2211 * Initialize netdev entry points
2212 */
8f7ba3ca
RE		 2213 if (mlx4_is_master(priv->mdev->dev))
2214 dev->netdev_ops = &mlx4_netdev_ops_master;
2215 else
2216 dev->netdev_ops = &mlx4_netdev_ops;
c27a02cd 2217 dev->watchdog_timeo = MLX4_EN_WATCHDOG_TIMEOUT;
1eb63a28
BH		 2218 netif_set_real_num_tx_queues(dev, priv->tx_ring_num);
2219 netif_set_real_num_rx_queues(dev, priv->rx_ring_num);
3addc568 2220
c27a02cd
YP		 2221 SET_ETHTOOL_OPS(dev, &mlx4_en_ethtool_ops);
2222
c27a02cd
YP		 2223 /*
2224 * Set driver features
2225 */
c8c64cff
MM		 2226 dev->hw_features = NETIF_F_SG | NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM;
2227 if (mdev->LSO_support)
2228 dev->hw_features |= NETIF_F_TSO | NETIF_F_TSO6;
2229
2230 dev->vlan_features = dev->hw_features;
2231
ad86107f 2232 dev->hw_features |= NETIF_F_RXCSUM | NETIF_F_RXHASH;
c8c64cff 2233 dev->features = dev->hw_features | NETIF_F_HIGHDMA |
f646968f
PM		 2234 NETIF_F_HW_VLAN_CTAG_TX | NETIF_F_HW_VLAN_CTAG_RX |
2235 NETIF_F_HW_VLAN_CTAG_FILTER;
60d6fe99 2236 dev->hw_features |= NETIF_F_LOOPBACK;
c27a02cd 2237
1eb8c695
AV		 2238 if (mdev->dev->caps.steering_mode ==
2239 MLX4_STEERING_MODE_DEVICE_MANAGED)
2240 dev->hw_features |= NETIF_F_NTUPLE;
2241
cc5387f7
YB		 2242 if (mdev->dev->caps.steering_mode != MLX4_STEERING_MODE_A0)
2243 dev->priv_flags |= IFF_UNICAST_FLT;
2244
c27a02cd
YP		 2245 mdev->pndev[port] = dev;
2246
2247 netif_carrier_off(dev);
2248 err = register_netdev(dev);
2249 if (err) {
453a6082 2250 en_err(priv, "Netdev registration failed for port %d\n", port);
c27a02cd
YP		 2251 goto out;
2252 }
4234144f 2253 priv->registered = 1;
453a6082
YP		 2254
2255 en_warn(priv, "Using %d TX rings\n", prof->tx_ring_num);
2256 en_warn(priv, "Using %d RX rings\n", prof->rx_ring_num);
2257
79aeaccd
YB		 2258 mlx4_en_update_loopback_state(priv->dev, priv->dev->features);
2259
90822265 2260 /* Configure port */
5c8e9046 2261 mlx4_en_calc_rx_buf(dev);
90822265 2262 err = mlx4_SET_PORT_general(mdev->dev, priv->port,
5c8e9046
YP		 2263 priv->rx_skb_size + ETH_FCS_LEN,
2264 prof->tx_pause, prof->tx_ppp,
2265 prof->rx_pause, prof->rx_ppp);
90822265
YP		 2266 if (err) {
2267 en_err(priv, "Failed setting port general configurations "
2268 "for port %d, with error %d\n", priv->port, err);
2269 goto out;
2270 }
2271
2272 /* Init port */
2273 en_warn(priv, "Initializing port\n");
2274 err = mlx4_INIT_PORT(mdev->dev, priv->port);
2275 if (err) {
2276 en_err(priv, "Failed Initializing port\n");
2277 goto out;
2278 }
39f17b44 2279 mlx4_en_set_default_moderation(priv);
c27a02cd 2280 queue_delayed_work(mdev->workqueue, &priv->stats_task, STATS_DELAY);
dc8142ea
AV		 2281
2282 if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_TS)
2283 queue_delayed_work(mdev->workqueue, &priv->service_task,
2284 SERVICE_TASK_DELAY);
2285
c27a02cd
YP		 2286 return 0;
2287
2288out:
2289 mlx4_en_destroy_netdev(dev);
2290 return err;
2291}
2292
Linux 6.x block layer and io_uring tree(s)