bnx2x: uses build_skb() in receive path
[linux-2.6-block.git] / drivers / net / ethernet / mellanox / mlx4 / en_ethtool.c
CommitLineData
c27a02cd
YP
1/*
2 * Copyright (c) 2007 Mellanox Technologies. All rights reserved.
3 *
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
9 *
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
12 * conditions are met:
13 *
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
16 * disclaimer.
17 *
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30 * SOFTWARE.
31 *
32 */
33
34#include <linux/kernel.h>
35#include <linux/ethtool.h>
36#include <linux/netdevice.h>
37
38#include "mlx4_en.h"
39#include "en_port.h"
40
c27a02cd 41
c27a02cd
YP
42static void
43mlx4_en_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *drvinfo)
44{
45 struct mlx4_en_priv *priv = netdev_priv(dev);
46 struct mlx4_en_dev *mdev = priv->mdev;
47
6f71d792 48 strncpy(drvinfo->driver, DRV_NAME, 32);
c27a02cd
YP
49 strncpy(drvinfo->version, DRV_VERSION " (" DRV_RELDATE ")", 32);
50 sprintf(drvinfo->fw_version, "%d.%d.%d",
51 (u16) (mdev->dev->caps.fw_ver >> 32),
52 (u16) ((mdev->dev->caps.fw_ver >> 16) & 0xffff),
53 (u16) (mdev->dev->caps.fw_ver & 0xffff));
54 strncpy(drvinfo->bus_info, pci_name(mdev->dev->pdev), 32);
55 drvinfo->n_stats = 0;
56 drvinfo->regdump_len = 0;
57 drvinfo->eedump_len = 0;
58}
59
c27a02cd
YP
60static const char main_strings[][ETH_GSTRING_LEN] = {
61 "rx_packets", "tx_packets", "rx_bytes", "tx_bytes", "rx_errors",
62 "tx_errors", "rx_dropped", "tx_dropped", "multicast", "collisions",
63 "rx_length_errors", "rx_over_errors", "rx_crc_errors",
64 "rx_frame_errors", "rx_fifo_errors", "rx_missed_errors",
65 "tx_aborted_errors", "tx_carrier_errors", "tx_fifo_errors",
66 "tx_heartbeat_errors", "tx_window_errors",
67
68 /* port statistics */
fa37a958 69 "tso_packets",
c27a02cd
YP
70 "queue_stopped", "wake_queue", "tx_timeout", "rx_alloc_failed",
71 "rx_csum_good", "rx_csum_none", "tx_chksum_offload",
72
73 /* packet statistics */
74 "broadcast", "rx_prio_0", "rx_prio_1", "rx_prio_2", "rx_prio_3",
75 "rx_prio_4", "rx_prio_5", "rx_prio_6", "rx_prio_7", "tx_prio_0",
76 "tx_prio_1", "tx_prio_2", "tx_prio_3", "tx_prio_4", "tx_prio_5",
77 "tx_prio_6", "tx_prio_7",
78};
d61702f1 79#define NUM_MAIN_STATS 21
c27a02cd
YP
80#define NUM_ALL_STATS (NUM_MAIN_STATS + NUM_PORT_STATS + NUM_PKT_STATS + NUM_PERF_STATS)
81
e7c1c2c4
YP
82static const char mlx4_en_test_names[][ETH_GSTRING_LEN]= {
83 "Interupt Test",
84 "Link Test",
85 "Speed Test",
86 "Register Test",
87 "Loopback Test",
88};
89
c27a02cd
YP
90static u32 mlx4_en_get_msglevel(struct net_device *dev)
91{
92 return ((struct mlx4_en_priv *) netdev_priv(dev))->msg_enable;
93}
94
95static void mlx4_en_set_msglevel(struct net_device *dev, u32 val)
96{
97 ((struct mlx4_en_priv *) netdev_priv(dev))->msg_enable = val;
98}
99
100static void mlx4_en_get_wol(struct net_device *netdev,
101 struct ethtool_wolinfo *wol)
102{
14c07b13
YP
103 struct mlx4_en_priv *priv = netdev_priv(netdev);
104 int err = 0;
105 u64 config = 0;
106
ccf86321 107 if (!(priv->mdev->dev->caps.flags & MLX4_DEV_CAP_FLAG_WOL)) {
14c07b13
YP
108 wol->supported = 0;
109 wol->wolopts = 0;
110 return;
111 }
112
113 err = mlx4_wol_read(priv->mdev->dev, &config, priv->port);
114 if (err) {
115 en_err(priv, "Failed to get WoL information\n");
116 return;
117 }
118
119 if (config & MLX4_EN_WOL_MAGIC)
120 wol->supported = WAKE_MAGIC;
121 else
122 wol->supported = 0;
123
124 if (config & MLX4_EN_WOL_ENABLED)
125 wol->wolopts = WAKE_MAGIC;
126 else
127 wol->wolopts = 0;
128}
129
130static int mlx4_en_set_wol(struct net_device *netdev,
131 struct ethtool_wolinfo *wol)
132{
133 struct mlx4_en_priv *priv = netdev_priv(netdev);
134 u64 config = 0;
135 int err = 0;
136
ccf86321 137 if (!(priv->mdev->dev->caps.flags & MLX4_DEV_CAP_FLAG_WOL))
14c07b13
YP
138 return -EOPNOTSUPP;
139
140 if (wol->supported & ~WAKE_MAGIC)
141 return -EINVAL;
142
143 err = mlx4_wol_read(priv->mdev->dev, &config, priv->port);
144 if (err) {
145 en_err(priv, "Failed to get WoL info, unable to modify\n");
146 return err;
147 }
148
149 if (wol->wolopts & WAKE_MAGIC) {
150 config |= MLX4_EN_WOL_DO_MODIFY | MLX4_EN_WOL_ENABLED |
151 MLX4_EN_WOL_MAGIC;
152 } else {
153 config &= ~(MLX4_EN_WOL_ENABLED | MLX4_EN_WOL_MAGIC);
154 config |= MLX4_EN_WOL_DO_MODIFY;
155 }
156
157 err = mlx4_wol_write(priv->mdev->dev, config, priv->port);
158 if (err)
159 en_err(priv, "Failed to set WoL information\n");
160
161 return err;
c27a02cd
YP
162}
163
164static int mlx4_en_get_sset_count(struct net_device *dev, int sset)
165{
166 struct mlx4_en_priv *priv = netdev_priv(dev);
167
e7c1c2c4
YP
168 switch (sset) {
169 case ETH_SS_STATS:
170 return NUM_ALL_STATS +
171 (priv->tx_ring_num + priv->rx_ring_num) * 2;
172 case ETH_SS_TEST:
ccf86321
OG
173 return MLX4_EN_NUM_SELF_TEST - !(priv->mdev->dev->caps.flags
174 & MLX4_DEV_CAP_FLAG_UC_LOOPBACK) * 2;
e7c1c2c4 175 default:
c27a02cd 176 return -EOPNOTSUPP;
e7c1c2c4 177 }
c27a02cd
YP
178}
179
180static void mlx4_en_get_ethtool_stats(struct net_device *dev,
181 struct ethtool_stats *stats, uint64_t *data)
182{
183 struct mlx4_en_priv *priv = netdev_priv(dev);
184 int index = 0;
185 int i;
186
187 spin_lock_bh(&priv->stats_lock);
188
c27a02cd
YP
189 for (i = 0; i < NUM_MAIN_STATS; i++)
190 data[index++] = ((unsigned long *) &priv->stats)[i];
191 for (i = 0; i < NUM_PORT_STATS; i++)
192 data[index++] = ((unsigned long *) &priv->port_stats)[i];
193 for (i = 0; i < priv->tx_ring_num; i++) {
194 data[index++] = priv->tx_ring[i].packets;
195 data[index++] = priv->tx_ring[i].bytes;
196 }
197 for (i = 0; i < priv->rx_ring_num; i++) {
198 data[index++] = priv->rx_ring[i].packets;
199 data[index++] = priv->rx_ring[i].bytes;
200 }
201 for (i = 0; i < NUM_PKT_STATS; i++)
202 data[index++] = ((unsigned long *) &priv->pkstats)[i];
203 spin_unlock_bh(&priv->stats_lock);
204
205}
206
e7c1c2c4
YP
207static void mlx4_en_self_test(struct net_device *dev,
208 struct ethtool_test *etest, u64 *buf)
209{
210 mlx4_en_ex_selftest(dev, &etest->flags, buf);
211}
212
c27a02cd
YP
213static void mlx4_en_get_strings(struct net_device *dev,
214 uint32_t stringset, uint8_t *data)
215{
216 struct mlx4_en_priv *priv = netdev_priv(dev);
217 int index = 0;
218 int i;
219
e7c1c2c4
YP
220 switch (stringset) {
221 case ETH_SS_TEST:
222 for (i = 0; i < MLX4_EN_NUM_SELF_TEST - 2; i++)
223 strcpy(data + i * ETH_GSTRING_LEN, mlx4_en_test_names[i]);
ccf86321 224 if (priv->mdev->dev->caps.flags & MLX4_DEV_CAP_FLAG_UC_LOOPBACK)
e7c1c2c4
YP
225 for (; i < MLX4_EN_NUM_SELF_TEST; i++)
226 strcpy(data + i * ETH_GSTRING_LEN, mlx4_en_test_names[i]);
227 break;
228
229 case ETH_SS_STATS:
230 /* Add main counters */
231 for (i = 0; i < NUM_MAIN_STATS; i++)
232 strcpy(data + (index++) * ETH_GSTRING_LEN, main_strings[i]);
233 for (i = 0; i< NUM_PORT_STATS; i++)
234 strcpy(data + (index++) * ETH_GSTRING_LEN,
c27a02cd 235 main_strings[i + NUM_MAIN_STATS]);
e7c1c2c4
YP
236 for (i = 0; i < priv->tx_ring_num; i++) {
237 sprintf(data + (index++) * ETH_GSTRING_LEN,
238 "tx%d_packets", i);
239 sprintf(data + (index++) * ETH_GSTRING_LEN,
240 "tx%d_bytes", i);
241 }
242 for (i = 0; i < priv->rx_ring_num; i++) {
243 sprintf(data + (index++) * ETH_GSTRING_LEN,
244 "rx%d_packets", i);
245 sprintf(data + (index++) * ETH_GSTRING_LEN,
246 "rx%d_bytes", i);
247 }
248 for (i = 0; i< NUM_PKT_STATS; i++)
249 strcpy(data + (index++) * ETH_GSTRING_LEN,
c27a02cd 250 main_strings[i + NUM_MAIN_STATS + NUM_PORT_STATS]);
e7c1c2c4
YP
251 break;
252 }
c27a02cd
YP
253}
254
255static int mlx4_en_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
256{
7699517d
YP
257 struct mlx4_en_priv *priv = netdev_priv(dev);
258 int trans_type;
259
c27a02cd
YP
260 cmd->autoneg = AUTONEG_DISABLE;
261 cmd->supported = SUPPORTED_10000baseT_Full;
7699517d
YP
262 cmd->advertising = ADVERTISED_10000baseT_Full;
263
264 if (mlx4_en_QUERY_PORT(priv->mdev, priv->port))
265 return -ENOMEM;
266
267 trans_type = priv->port_state.transciver;
c27a02cd 268 if (netif_carrier_ok(dev)) {
70739497 269 ethtool_cmd_speed_set(cmd, priv->port_state.link_speed);
c27a02cd
YP
270 cmd->duplex = DUPLEX_FULL;
271 } else {
70739497 272 ethtool_cmd_speed_set(cmd, -1);
c27a02cd
YP
273 cmd->duplex = -1;
274 }
7699517d
YP
275
276 if (trans_type > 0 && trans_type <= 0xC) {
277 cmd->port = PORT_FIBRE;
278 cmd->transceiver = XCVR_EXTERNAL;
279 cmd->supported |= SUPPORTED_FIBRE;
280 cmd->advertising |= ADVERTISED_FIBRE;
281 } else if (trans_type == 0x80 || trans_type == 0) {
282 cmd->port = PORT_TP;
283 cmd->transceiver = XCVR_INTERNAL;
284 cmd->supported |= SUPPORTED_TP;
285 cmd->advertising |= ADVERTISED_TP;
286 } else {
287 cmd->port = -1;
288 cmd->transceiver = -1;
289 }
c27a02cd
YP
290 return 0;
291}
292
293static int mlx4_en_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
294{
295 if ((cmd->autoneg == AUTONEG_ENABLE) ||
25db0338
DD
296 (ethtool_cmd_speed(cmd) != SPEED_10000) ||
297 (cmd->duplex != DUPLEX_FULL))
c27a02cd
YP
298 return -EINVAL;
299
300 /* Nothing to change */
301 return 0;
302}
303
304static int mlx4_en_get_coalesce(struct net_device *dev,
305 struct ethtool_coalesce *coal)
306{
307 struct mlx4_en_priv *priv = netdev_priv(dev);
308
309 coal->tx_coalesce_usecs = 0;
310 coal->tx_max_coalesced_frames = 0;
311 coal->rx_coalesce_usecs = priv->rx_usecs;
312 coal->rx_max_coalesced_frames = priv->rx_frames;
313
314 coal->pkt_rate_low = priv->pkt_rate_low;
315 coal->rx_coalesce_usecs_low = priv->rx_usecs_low;
316 coal->pkt_rate_high = priv->pkt_rate_high;
317 coal->rx_coalesce_usecs_high = priv->rx_usecs_high;
318 coal->rate_sample_interval = priv->sample_interval;
319 coal->use_adaptive_rx_coalesce = priv->adaptive_rx_coal;
320 return 0;
321}
322
323static int mlx4_en_set_coalesce(struct net_device *dev,
324 struct ethtool_coalesce *coal)
325{
326 struct mlx4_en_priv *priv = netdev_priv(dev);
327 int err, i;
328
329 priv->rx_frames = (coal->rx_max_coalesced_frames ==
330 MLX4_EN_AUTO_CONF) ?
3db36fb2 331 MLX4_EN_RX_COAL_TARGET :
c27a02cd
YP
332 coal->rx_max_coalesced_frames;
333 priv->rx_usecs = (coal->rx_coalesce_usecs ==
334 MLX4_EN_AUTO_CONF) ?
335 MLX4_EN_RX_COAL_TIME :
336 coal->rx_coalesce_usecs;
337
338 /* Set adaptive coalescing params */
339 priv->pkt_rate_low = coal->pkt_rate_low;
340 priv->rx_usecs_low = coal->rx_coalesce_usecs_low;
341 priv->pkt_rate_high = coal->pkt_rate_high;
342 priv->rx_usecs_high = coal->rx_coalesce_usecs_high;
343 priv->sample_interval = coal->rate_sample_interval;
344 priv->adaptive_rx_coal = coal->use_adaptive_rx_coalesce;
c27a02cd
YP
345 if (priv->adaptive_rx_coal)
346 return 0;
347
348 for (i = 0; i < priv->rx_ring_num; i++) {
349 priv->rx_cq[i].moder_cnt = priv->rx_frames;
350 priv->rx_cq[i].moder_time = priv->rx_usecs;
6b4d8d9f 351 priv->last_moder_time[i] = MLX4_EN_AUTO_CONF;
c27a02cd
YP
352 err = mlx4_en_set_cq_moder(priv, &priv->rx_cq[i]);
353 if (err)
354 return err;
355 }
356 return 0;
357}
358
359static int mlx4_en_set_pauseparam(struct net_device *dev,
360 struct ethtool_pauseparam *pause)
361{
362 struct mlx4_en_priv *priv = netdev_priv(dev);
363 struct mlx4_en_dev *mdev = priv->mdev;
364 int err;
365
d53b93f2
YP
366 priv->prof->tx_pause = pause->tx_pause != 0;
367 priv->prof->rx_pause = pause->rx_pause != 0;
c27a02cd
YP
368 err = mlx4_SET_PORT_general(mdev->dev, priv->port,
369 priv->rx_skb_size + ETH_FCS_LEN,
d53b93f2
YP
370 priv->prof->tx_pause,
371 priv->prof->tx_ppp,
372 priv->prof->rx_pause,
373 priv->prof->rx_ppp);
c27a02cd 374 if (err)
453a6082 375 en_err(priv, "Failed setting pause params\n");
c27a02cd
YP
376
377 return err;
378}
379
380static void mlx4_en_get_pauseparam(struct net_device *dev,
381 struct ethtool_pauseparam *pause)
382{
383 struct mlx4_en_priv *priv = netdev_priv(dev);
c27a02cd 384
d53b93f2
YP
385 pause->tx_pause = priv->prof->tx_pause;
386 pause->rx_pause = priv->prof->rx_pause;
c27a02cd
YP
387}
388
18cc42a3
YP
389static int mlx4_en_set_ringparam(struct net_device *dev,
390 struct ethtool_ringparam *param)
391{
392 struct mlx4_en_priv *priv = netdev_priv(dev);
393 struct mlx4_en_dev *mdev = priv->mdev;
394 u32 rx_size, tx_size;
395 int port_up = 0;
396 int err = 0;
6b4d8d9f 397 int i;
18cc42a3
YP
398
399 if (param->rx_jumbo_pending || param->rx_mini_pending)
400 return -EINVAL;
401
402 rx_size = roundup_pow_of_two(param->rx_pending);
403 rx_size = max_t(u32, rx_size, MLX4_EN_MIN_RX_SIZE);
bd531e36 404 rx_size = min_t(u32, rx_size, MLX4_EN_MAX_RX_SIZE);
18cc42a3
YP
405 tx_size = roundup_pow_of_two(param->tx_pending);
406 tx_size = max_t(u32, tx_size, MLX4_EN_MIN_TX_SIZE);
bd531e36 407 tx_size = min_t(u32, tx_size, MLX4_EN_MAX_TX_SIZE);
18cc42a3 408
bc081cec
YP
409 if (rx_size == (priv->port_up ? priv->rx_ring[0].actual_size :
410 priv->rx_ring[0].size) &&
411 tx_size == priv->tx_ring[0].size)
18cc42a3
YP
412 return 0;
413
414 mutex_lock(&mdev->state_lock);
415 if (priv->port_up) {
416 port_up = 1;
417 mlx4_en_stop_port(dev);
418 }
419
fe0af03c 420 mlx4_en_free_resources(priv);
18cc42a3
YP
421
422 priv->prof->tx_ring_size = tx_size;
423 priv->prof->rx_ring_size = rx_size;
424
425 err = mlx4_en_alloc_resources(priv);
426 if (err) {
453a6082 427 en_err(priv, "Failed reallocating port resources\n");
18cc42a3
YP
428 goto out;
429 }
430 if (port_up) {
431 err = mlx4_en_start_port(dev);
432 if (err)
453a6082 433 en_err(priv, "Failed starting port\n");
18cc42a3
YP
434 }
435
6b4d8d9f
AG
436 for (i = 0; i < priv->rx_ring_num; i++) {
437 priv->rx_cq[i].moder_cnt = priv->rx_frames;
438 priv->rx_cq[i].moder_time = priv->rx_usecs;
439 priv->last_moder_time[i] = MLX4_EN_AUTO_CONF;
440 err = mlx4_en_set_cq_moder(priv, &priv->rx_cq[i]);
441 if (err)
442 goto out;
443 }
444
18cc42a3
YP
445out:
446 mutex_unlock(&mdev->state_lock);
447 return err;
448}
449
c27a02cd
YP
450static void mlx4_en_get_ringparam(struct net_device *dev,
451 struct ethtool_ringparam *param)
452{
453 struct mlx4_en_priv *priv = netdev_priv(dev);
c27a02cd
YP
454
455 memset(param, 0, sizeof(*param));
bd531e36
YP
456 param->rx_max_pending = MLX4_EN_MAX_RX_SIZE;
457 param->tx_max_pending = MLX4_EN_MAX_TX_SIZE;
bc081cec
YP
458 param->rx_pending = priv->port_up ?
459 priv->rx_ring[0].actual_size : priv->rx_ring[0].size;
460 param->tx_pending = priv->tx_ring[0].size;
c27a02cd
YP
461}
462
463const struct ethtool_ops mlx4_en_ethtool_ops = {
464 .get_drvinfo = mlx4_en_get_drvinfo,
465 .get_settings = mlx4_en_get_settings,
466 .set_settings = mlx4_en_set_settings,
c27a02cd 467 .get_link = ethtool_op_get_link,
c27a02cd
YP
468 .get_strings = mlx4_en_get_strings,
469 .get_sset_count = mlx4_en_get_sset_count,
470 .get_ethtool_stats = mlx4_en_get_ethtool_stats,
e7c1c2c4 471 .self_test = mlx4_en_self_test,
c27a02cd 472 .get_wol = mlx4_en_get_wol,
14c07b13 473 .set_wol = mlx4_en_set_wol,
c27a02cd
YP
474 .get_msglevel = mlx4_en_get_msglevel,
475 .set_msglevel = mlx4_en_set_msglevel,
476 .get_coalesce = mlx4_en_get_coalesce,
477 .set_coalesce = mlx4_en_set_coalesce,
478 .get_pauseparam = mlx4_en_get_pauseparam,
479 .set_pauseparam = mlx4_en_set_pauseparam,
480 .get_ringparam = mlx4_en_get_ringparam,
18cc42a3 481 .set_ringparam = mlx4_en_set_ringparam,
c27a02cd
YP
482};
483
484
485
486
487