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net/mlx4_en: current_mac isn't updated in port up
[linux-2.6-block.git] / drivers / net / ethernet / mellanox / mlx4 / en_ethtool.c
CommitLineData
c27a02cd
YP		 1/*
2 * Copyright (c) 2007 Mellanox Technologies. All rights reserved.
3 *
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
9 *
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
12 * conditions are met:
13 *
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
16 * disclaimer.
17 *
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30 * SOFTWARE.
31 *
32 */
33
34#include <linux/kernel.h>
35#include <linux/ethtool.h>
36#include <linux/netdevice.h>
af22d9de 37#include <linux/mlx4/driver.h>
f90a3673
HHZ		 38#include <linux/in.h>
39#include <net/ip.h>
c27a02cd
YP		 40
41#include "mlx4_en.h"
42#include "en_port.h"
43
82067281 44#define EN_ETHTOOL_QP_ATTACH (1ull << 63)
82067281
HHZ		 45#define EN_ETHTOOL_SHORT_MASK cpu_to_be16(0xffff)
46#define EN_ETHTOOL_WORD_MASK cpu_to_be32(0xffffffff)
c27a02cd 47
79c54b6b
AV		 48static int mlx4_en_moderation_update(struct mlx4_en_priv *priv)
49{
50 int i;
51 int err = 0;
52
53 for (i = 0; i < priv->tx_ring_num; i++) {
41d942d5
EE		 54 priv->tx_cq[i]->moder_cnt = priv->tx_frames;
55 priv->tx_cq[i]->moder_time = priv->tx_usecs;
38463e2c 56 if (priv->port_up) {
41d942d5 57 err = mlx4_en_set_cq_moder(priv, priv->tx_cq[i]);
38463e2c
EE		 58 if (err)
59 return err;
60 }
79c54b6b
AV		 61 }
62
63 if (priv->adaptive_rx_coal)
64 return 0;
65
66 for (i = 0; i < priv->rx_ring_num; i++) {
41d942d5
EE		 67 priv->rx_cq[i]->moder_cnt = priv->rx_frames;
68 priv->rx_cq[i]->moder_time = priv->rx_usecs;
79c54b6b 69 priv->last_moder_time[i] = MLX4_EN_AUTO_CONF;
38463e2c 70 if (priv->port_up) {
41d942d5 71 err = mlx4_en_set_cq_moder(priv, priv->rx_cq[i]);
38463e2c
EE		 72 if (err)
73 return err;
74 }
79c54b6b
AV		 75 }
76
77 return err;
78}
79
c27a02cd
YP		 80static void
81mlx4_en_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *drvinfo)
82{
83 struct mlx4_en_priv *priv = netdev_priv(dev);
84 struct mlx4_en_dev *mdev = priv->mdev;
85
612a94d6
RJ		 86 strlcpy(drvinfo->driver, DRV_NAME, sizeof(drvinfo->driver));
87 strlcpy(drvinfo->version, DRV_VERSION " (" DRV_RELDATE ")",
88 sizeof(drvinfo->version));
89 snprintf(drvinfo->fw_version, sizeof(drvinfo->fw_version),
90 "%d.%d.%d",
c27a02cd
YP		 91 (u16) (mdev->dev->caps.fw_ver >> 32),
92 (u16) ((mdev->dev->caps.fw_ver >> 16) & 0xffff),
93 (u16) (mdev->dev->caps.fw_ver & 0xffff));
612a94d6
RJ		 94 strlcpy(drvinfo->bus_info, pci_name(mdev->dev->pdev),
95 sizeof(drvinfo->bus_info));
c27a02cd
YP		 96 drvinfo->n_stats = 0;
97 drvinfo->regdump_len = 0;
98 drvinfo->eedump_len = 0;
99}
100
c27a02cd
YP		 101static const char main_strings[][ETH_GSTRING_LEN] = {
102 "rx_packets", "tx_packets", "rx_bytes", "tx_bytes", "rx_errors",
103 "tx_errors", "rx_dropped", "tx_dropped", "multicast", "collisions",
104 "rx_length_errors", "rx_over_errors", "rx_crc_errors",
105 "rx_frame_errors", "rx_fifo_errors", "rx_missed_errors",
106 "tx_aborted_errors", "tx_carrier_errors", "tx_fifo_errors",
107 "tx_heartbeat_errors", "tx_window_errors",
108
109 /* port statistics */
fa37a958 110 "tso_packets",
c27a02cd
YP		 111 "queue_stopped", "wake_queue", "tx_timeout", "rx_alloc_failed",
112 "rx_csum_good", "rx_csum_none", "tx_chksum_offload",
113
114 /* packet statistics */
115 "broadcast", "rx_prio_0", "rx_prio_1", "rx_prio_2", "rx_prio_3",
116 "rx_prio_4", "rx_prio_5", "rx_prio_6", "rx_prio_7", "tx_prio_0",
117 "tx_prio_1", "tx_prio_2", "tx_prio_3", "tx_prio_4", "tx_prio_5",
118 "tx_prio_6", "tx_prio_7",
119};
d61702f1 120#define NUM_MAIN_STATS 21
c27a02cd
YP		 121#define NUM_ALL_STATS (NUM_MAIN_STATS + NUM_PORT_STATS + NUM_PKT_STATS + NUM_PERF_STATS)
122
e7c1c2c4 123static const char mlx4_en_test_names[][ETH_GSTRING_LEN]= {
fd9071ec 124 "Interrupt Test",
e7c1c2c4
YP		 125 "Link Test",
126 "Speed Test",
127 "Register Test",
128 "Loopback Test",
129};
130
c27a02cd
YP		 131static u32 mlx4_en_get_msglevel(struct net_device *dev)
132{
133 return ((struct mlx4_en_priv *) netdev_priv(dev))->msg_enable;
134}
135
136static void mlx4_en_set_msglevel(struct net_device *dev, u32 val)
137{
138 ((struct mlx4_en_priv *) netdev_priv(dev))->msg_enable = val;
139}
140
141static void mlx4_en_get_wol(struct net_device *netdev,
142 struct ethtool_wolinfo *wol)
143{
14c07b13
YP		 144 struct mlx4_en_priv *priv = netdev_priv(netdev);
145 int err = 0;
146 u64 config = 0;
559a9f1d 147 u64 mask;
14c07b13 148
559a9f1d
OD		 149 if ((priv->port < 1) || (priv->port > 2)) {
150 en_err(priv, "Failed to get WoL information\n");
151 return;
152 }
153
154 mask = (priv->port == 1) ? MLX4_DEV_CAP_FLAG_WOL_PORT1 :
155 MLX4_DEV_CAP_FLAG_WOL_PORT2;
156
157 if (!(priv->mdev->dev->caps.flags & mask)) {
14c07b13
YP		 158 wol->supported = 0;
159 wol->wolopts = 0;
160 return;
161 }
162
163 err = mlx4_wol_read(priv->mdev->dev, &config, priv->port);
164 if (err) {
165 en_err(priv, "Failed to get WoL information\n");
166 return;
167 }
168
169 if (config & MLX4_EN_WOL_MAGIC)
170 wol->supported = WAKE_MAGIC;
171 else
172 wol->supported = 0;
173
174 if (config & MLX4_EN_WOL_ENABLED)
175 wol->wolopts = WAKE_MAGIC;
176 else
177 wol->wolopts = 0;
178}
179
180static int mlx4_en_set_wol(struct net_device *netdev,
181 struct ethtool_wolinfo *wol)
182{
183 struct mlx4_en_priv *priv = netdev_priv(netdev);
184 u64 config = 0;
185 int err = 0;
559a9f1d
OD		 186 u64 mask;
187
188 if ((priv->port < 1) || (priv->port > 2))
189 return -EOPNOTSUPP;
190
191 mask = (priv->port == 1) ? MLX4_DEV_CAP_FLAG_WOL_PORT1 :
192 MLX4_DEV_CAP_FLAG_WOL_PORT2;
14c07b13 193
559a9f1d 194 if (!(priv->mdev->dev->caps.flags & mask))
14c07b13
YP		 195 return -EOPNOTSUPP;
196
197 if (wol->supported & ~WAKE_MAGIC)
198 return -EINVAL;
199
200 err = mlx4_wol_read(priv->mdev->dev, &config, priv->port);
201 if (err) {
202 en_err(priv, "Failed to get WoL info, unable to modify\n");
203 return err;
204 }
205
206 if (wol->wolopts & WAKE_MAGIC) {
207 config |= MLX4_EN_WOL_DO_MODIFY | MLX4_EN_WOL_ENABLED |
208 MLX4_EN_WOL_MAGIC;
209 } else {
210 config &= ~(MLX4_EN_WOL_ENABLED | MLX4_EN_WOL_MAGIC);
211 config |= MLX4_EN_WOL_DO_MODIFY;
212 }
213
214 err = mlx4_wol_write(priv->mdev->dev, config, priv->port);
215 if (err)
216 en_err(priv, "Failed to set WoL information\n");
217
218 return err;
c27a02cd
YP		 219}
220
221static int mlx4_en_get_sset_count(struct net_device *dev, int sset)
222{
223 struct mlx4_en_priv *priv = netdev_priv(dev);
93ece0c1 224 int bit_count = hweight64(priv->stats_bitmap);
c27a02cd 225
e7c1c2c4
YP		 226 switch (sset) {
227 case ETH_SS_STATS:
93ece0c1 228 return (priv->stats_bitmap ? bit_count : NUM_ALL_STATS) +
8501841a 229 (priv->tx_ring_num * 2) +
e0d1095a 230#ifdef CONFIG_NET_RX_BUSY_POLL
8501841a
AV		 231 (priv->rx_ring_num * 5);
232#else
233 (priv->rx_ring_num * 2);
234#endif
e7c1c2c4 235 case ETH_SS_TEST:
ccf86321
OG		 236 return MLX4_EN_NUM_SELF_TEST - !(priv->mdev->dev->caps.flags
237 & MLX4_DEV_CAP_FLAG_UC_LOOPBACK) * 2;
e7c1c2c4 238 default:
c27a02cd 239 return -EOPNOTSUPP;
e7c1c2c4 240 }
c27a02cd
YP		 241}
242
243static void mlx4_en_get_ethtool_stats(struct net_device *dev,
244 struct ethtool_stats *stats, uint64_t *data)
245{
246 struct mlx4_en_priv *priv = netdev_priv(dev);
247 int index = 0;
93ece0c1 248 int i, j = 0;
c27a02cd
YP		 249
250 spin_lock_bh(&priv->stats_lock);
251
93ece0c1
EE		 252 if (!(priv->stats_bitmap)) {
253 for (i = 0; i < NUM_MAIN_STATS; i++)
254 data[index++] =
255 ((unsigned long *) &priv->stats)[i];
256 for (i = 0; i < NUM_PORT_STATS; i++)
257 data[index++] =
258 ((unsigned long *) &priv->port_stats)[i];
259 for (i = 0; i < NUM_PKT_STATS; i++)
260 data[index++] =
261 ((unsigned long *) &priv->pkstats)[i];
262 } else {
263 for (i = 0; i < NUM_MAIN_STATS; i++) {
264 if ((priv->stats_bitmap >> j) & 1)
265 data[index++] =
266 ((unsigned long *) &priv->stats)[i];
267 j++;
268 }
269 for (i = 0; i < NUM_PORT_STATS; i++) {
270 if ((priv->stats_bitmap >> j) & 1)
271 data[index++] =
272 ((unsigned long *) &priv->port_stats)[i];
273 j++;
274 }
275 }
c27a02cd 276 for (i = 0; i < priv->tx_ring_num; i++) {
41d942d5
EE		 277 data[index++] = priv->tx_ring[i]->packets;
278 data[index++] = priv->tx_ring[i]->bytes;
c27a02cd
YP		 279 }
280 for (i = 0; i < priv->rx_ring_num; i++) {
41d942d5
EE		 281 data[index++] = priv->rx_ring[i]->packets;
282 data[index++] = priv->rx_ring[i]->bytes;
e0d1095a 283#ifdef CONFIG_NET_RX_BUSY_POLL
41d942d5
EE		 284 data[index++] = priv->rx_ring[i]->yields;
285 data[index++] = priv->rx_ring[i]->misses;
286 data[index++] = priv->rx_ring[i]->cleaned;
8501841a 287#endif
c27a02cd 288 }
c27a02cd
YP		 289 spin_unlock_bh(&priv->stats_lock);
290
291}
292
e7c1c2c4
YP		 293static void mlx4_en_self_test(struct net_device *dev,
294 struct ethtool_test *etest, u64 *buf)
295{
296 mlx4_en_ex_selftest(dev, &etest->flags, buf);
297}
298
c27a02cd
YP		 299static void mlx4_en_get_strings(struct net_device *dev,
300 uint32_t stringset, uint8_t *data)
301{
302 struct mlx4_en_priv *priv = netdev_priv(dev);
303 int index = 0;
304 int i;
305
e7c1c2c4
YP		 306 switch (stringset) {
307 case ETH_SS_TEST:
308 for (i = 0; i < MLX4_EN_NUM_SELF_TEST - 2; i++)
309 strcpy(data + i * ETH_GSTRING_LEN, mlx4_en_test_names[i]);
ccf86321 310 if (priv->mdev->dev->caps.flags & MLX4_DEV_CAP_FLAG_UC_LOOPBACK)
e7c1c2c4
YP		 311 for (; i < MLX4_EN_NUM_SELF_TEST; i++)
312 strcpy(data + i * ETH_GSTRING_LEN, mlx4_en_test_names[i]);
313 break;
314
315 case ETH_SS_STATS:
316 /* Add main counters */
93ece0c1
EE		 317 if (!priv->stats_bitmap) {
318 for (i = 0; i < NUM_MAIN_STATS; i++)
319 strcpy(data + (index++) * ETH_GSTRING_LEN,
320 main_strings[i]);
321 for (i = 0; i < NUM_PORT_STATS; i++)
322 strcpy(data + (index++) * ETH_GSTRING_LEN,
323 main_strings[i +
324 NUM_MAIN_STATS]);
325 for (i = 0; i < NUM_PKT_STATS; i++)
326 strcpy(data + (index++) * ETH_GSTRING_LEN,
327 main_strings[i +
328 NUM_MAIN_STATS +
329 NUM_PORT_STATS]);
330 } else
331 for (i = 0; i < NUM_MAIN_STATS + NUM_PORT_STATS; i++) {
332 if ((priv->stats_bitmap >> i) & 1) {
333 strcpy(data +
334 (index++) * ETH_GSTRING_LEN,
335 main_strings[i]);
336 }
337 if (!(priv->stats_bitmap >> i))
338 break;
339 }
e7c1c2c4
YP		 340 for (i = 0; i < priv->tx_ring_num; i++) {
341 sprintf(data + (index++) * ETH_GSTRING_LEN,
342 "tx%d_packets", i);
343 sprintf(data + (index++) * ETH_GSTRING_LEN,
344 "tx%d_bytes", i);
345 }
346 for (i = 0; i < priv->rx_ring_num; i++) {
347 sprintf(data + (index++) * ETH_GSTRING_LEN,
348 "rx%d_packets", i);
349 sprintf(data + (index++) * ETH_GSTRING_LEN,
350 "rx%d_bytes", i);
e0d1095a 351#ifdef CONFIG_NET_RX_BUSY_POLL
8501841a
AV		 352 sprintf(data + (index++) * ETH_GSTRING_LEN,
353 "rx%d_napi_yield", i);
354 sprintf(data + (index++) * ETH_GSTRING_LEN,
355 "rx%d_misses", i);
356 sprintf(data + (index++) * ETH_GSTRING_LEN,
357 "rx%d_cleaned", i);
358#endif
e7c1c2c4 359 }
e7c1c2c4
YP		 360 break;
361 }
c27a02cd
YP		 362}
363
364static int mlx4_en_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
365{
7699517d
YP		 366 struct mlx4_en_priv *priv = netdev_priv(dev);
367 int trans_type;
368
c27a02cd
YP		 369 cmd->autoneg = AUTONEG_DISABLE;
370 cmd->supported = SUPPORTED_10000baseT_Full;
7699517d
YP		 371 cmd->advertising = ADVERTISED_10000baseT_Full;
372
373 if (mlx4_en_QUERY_PORT(priv->mdev, priv->port))
374 return -ENOMEM;
375
376 trans_type = priv->port_state.transciver;
c27a02cd 377 if (netif_carrier_ok(dev)) {
70739497 378 ethtool_cmd_speed_set(cmd, priv->port_state.link_speed);
c27a02cd
YP		 379 cmd->duplex = DUPLEX_FULL;
380 } else {
537fae01
JP		 381 ethtool_cmd_speed_set(cmd, SPEED_UNKNOWN);
382 cmd->duplex = DUPLEX_UNKNOWN;
c27a02cd 383 }
7699517d
YP		 384
385 if (trans_type > 0 && trans_type <= 0xC) {
386 cmd->port = PORT_FIBRE;
387 cmd->transceiver = XCVR_EXTERNAL;
388 cmd->supported |= SUPPORTED_FIBRE;
389 cmd->advertising |= ADVERTISED_FIBRE;
390 } else if (trans_type == 0x80 || trans_type == 0) {
391 cmd->port = PORT_TP;
392 cmd->transceiver = XCVR_INTERNAL;
393 cmd->supported |= SUPPORTED_TP;
394 cmd->advertising |= ADVERTISED_TP;
395 } else {
396 cmd->port = -1;
397 cmd->transceiver = -1;
398 }
c27a02cd
YP		 399 return 0;
400}
401
402static int mlx4_en_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
403{
404 if ((cmd->autoneg == AUTONEG_ENABLE) ||
25db0338
DD		 405 (ethtool_cmd_speed(cmd) != SPEED_10000) ||
406 (cmd->duplex != DUPLEX_FULL))
c27a02cd
YP		 407 return -EINVAL;
408
409 /* Nothing to change */
410 return 0;
411}
412
413static int mlx4_en_get_coalesce(struct net_device *dev,
414 struct ethtool_coalesce *coal)
415{
416 struct mlx4_en_priv *priv = netdev_priv(dev);
417
a19a848a
YP		 418 coal->tx_coalesce_usecs = priv->tx_usecs;
419 coal->tx_max_coalesced_frames = priv->tx_frames;
fbc6daf1
AV		 420 coal->tx_max_coalesced_frames_irq = priv->tx_work_limit;
421
c27a02cd
YP		 422 coal->rx_coalesce_usecs = priv->rx_usecs;
423 coal->rx_max_coalesced_frames = priv->rx_frames;
424
425 coal->pkt_rate_low = priv->pkt_rate_low;
426 coal->rx_coalesce_usecs_low = priv->rx_usecs_low;
427 coal->pkt_rate_high = priv->pkt_rate_high;
428 coal->rx_coalesce_usecs_high = priv->rx_usecs_high;
429 coal->rate_sample_interval = priv->sample_interval;
430 coal->use_adaptive_rx_coalesce = priv->adaptive_rx_coal;
fbc6daf1 431
c27a02cd
YP		 432 return 0;
433}
434
435static int mlx4_en_set_coalesce(struct net_device *dev,
436 struct ethtool_coalesce *coal)
437{
438 struct mlx4_en_priv *priv = netdev_priv(dev);
c27a02cd 439
fbc6daf1
AV		 440 if (!coal->tx_max_coalesced_frames_irq)
441 return -EINVAL;
442
c27a02cd
YP		 443 priv->rx_frames = (coal->rx_max_coalesced_frames ==
444 MLX4_EN_AUTO_CONF) ?
3db36fb2 445 MLX4_EN_RX_COAL_TARGET :
c27a02cd
YP		 446 coal->rx_max_coalesced_frames;
447 priv->rx_usecs = (coal->rx_coalesce_usecs ==
448 MLX4_EN_AUTO_CONF) ?
449 MLX4_EN_RX_COAL_TIME :
450 coal->rx_coalesce_usecs;
451
a19a848a
YP		 452 /* Setting TX coalescing parameters */
453 if (coal->tx_coalesce_usecs != priv->tx_usecs ||
454 coal->tx_max_coalesced_frames != priv->tx_frames) {
455 priv->tx_usecs = coal->tx_coalesce_usecs;
456 priv->tx_frames = coal->tx_max_coalesced_frames;
a19a848a
YP		 457 }
458
c27a02cd
YP		 459 /* Set adaptive coalescing params */
460 priv->pkt_rate_low = coal->pkt_rate_low;
461 priv->rx_usecs_low = coal->rx_coalesce_usecs_low;
462 priv->pkt_rate_high = coal->pkt_rate_high;
463 priv->rx_usecs_high = coal->rx_coalesce_usecs_high;
464 priv->sample_interval = coal->rate_sample_interval;
465 priv->adaptive_rx_coal = coal->use_adaptive_rx_coalesce;
fbc6daf1 466 priv->tx_work_limit = coal->tx_max_coalesced_frames_irq;
c27a02cd 467
79c54b6b 468 return mlx4_en_moderation_update(priv);
c27a02cd
YP		 469}
470
471static int mlx4_en_set_pauseparam(struct net_device *dev,
472 struct ethtool_pauseparam *pause)
473{
474 struct mlx4_en_priv *priv = netdev_priv(dev);
475 struct mlx4_en_dev *mdev = priv->mdev;
476 int err;
477
d53b93f2
YP		 478 priv->prof->tx_pause = pause->tx_pause != 0;
479 priv->prof->rx_pause = pause->rx_pause != 0;
c27a02cd
YP		 480 err = mlx4_SET_PORT_general(mdev->dev, priv->port,
481 priv->rx_skb_size + ETH_FCS_LEN,
d53b93f2
YP		 482 priv->prof->tx_pause,
483 priv->prof->tx_ppp,
484 priv->prof->rx_pause,
485 priv->prof->rx_ppp);
c27a02cd 486 if (err)
453a6082 487 en_err(priv, "Failed setting pause params\n");
c27a02cd
YP		 488
489 return err;
490}
491
492static void mlx4_en_get_pauseparam(struct net_device *dev,
493 struct ethtool_pauseparam *pause)
494{
495 struct mlx4_en_priv *priv = netdev_priv(dev);
c27a02cd 496
d53b93f2
YP		 497 pause->tx_pause = priv->prof->tx_pause;
498 pause->rx_pause = priv->prof->rx_pause;
c27a02cd
YP		 499}
500
18cc42a3
YP		 501static int mlx4_en_set_ringparam(struct net_device *dev,
502 struct ethtool_ringparam *param)
503{
504 struct mlx4_en_priv *priv = netdev_priv(dev);
505 struct mlx4_en_dev *mdev = priv->mdev;
506 u32 rx_size, tx_size;
507 int port_up = 0;
508 int err = 0;
509
510 if (param->rx_jumbo_pending || param->rx_mini_pending)
511 return -EINVAL;
512
513 rx_size = roundup_pow_of_two(param->rx_pending);
514 rx_size = max_t(u32, rx_size, MLX4_EN_MIN_RX_SIZE);
bd531e36 515 rx_size = min_t(u32, rx_size, MLX4_EN_MAX_RX_SIZE);
18cc42a3
YP		 516 tx_size = roundup_pow_of_two(param->tx_pending);
517 tx_size = max_t(u32, tx_size, MLX4_EN_MIN_TX_SIZE);
bd531e36 518 tx_size = min_t(u32, tx_size, MLX4_EN_MAX_TX_SIZE);
18cc42a3 519
41d942d5
EE		 520 if (rx_size == (priv->port_up ? priv->rx_ring[0]->actual_size :
521 priv->rx_ring[0]->size) &&
522 tx_size == priv->tx_ring[0]->size)
18cc42a3
YP		 523 return 0;
524
525 mutex_lock(&mdev->state_lock);
526 if (priv->port_up) {
527 port_up = 1;
3484aac1 528 mlx4_en_stop_port(dev, 1);
18cc42a3
YP		 529 }
530
fe0af03c 531 mlx4_en_free_resources(priv);
18cc42a3
YP		 532
533 priv->prof->tx_ring_size = tx_size;
534 priv->prof->rx_ring_size = rx_size;
535
536 err = mlx4_en_alloc_resources(priv);
537 if (err) {
453a6082 538 en_err(priv, "Failed reallocating port resources\n");
18cc42a3
YP		 539 goto out;
540 }
541 if (port_up) {
542 err = mlx4_en_start_port(dev);
543 if (err)
453a6082 544 en_err(priv, "Failed starting port\n");
18cc42a3
YP		 545 }
546
79c54b6b 547 err = mlx4_en_moderation_update(priv);
6b4d8d9f 548
18cc42a3
YP		 549out:
550 mutex_unlock(&mdev->state_lock);
551 return err;
552}
553
c27a02cd
YP		 554static void mlx4_en_get_ringparam(struct net_device *dev,
555 struct ethtool_ringparam *param)
556{
557 struct mlx4_en_priv *priv = netdev_priv(dev);
c27a02cd
YP		 558
559 memset(param, 0, sizeof(*param));
bd531e36
YP		 560 param->rx_max_pending = MLX4_EN_MAX_RX_SIZE;
561 param->tx_max_pending = MLX4_EN_MAX_TX_SIZE;
bc081cec 562 param->rx_pending = priv->port_up ?
41d942d5
EE		 563 priv->rx_ring[0]->actual_size : priv->rx_ring[0]->size;
564 param->tx_pending = priv->tx_ring[0]->size;
c27a02cd
YP		 565}
566
93d3e367
YP		 567static u32 mlx4_en_get_rxfh_indir_size(struct net_device *dev)
568{
569 struct mlx4_en_priv *priv = netdev_priv(dev);
570
571 return priv->rx_ring_num;
572}
573
fe62d001 574static int mlx4_en_get_rxfh(struct net_device *dev, u32 *ring_index, u8 *key)
93d3e367
YP		 575{
576 struct mlx4_en_priv *priv = netdev_priv(dev);
577 struct mlx4_en_rss_map *rss_map = &priv->rss_map;
578 int rss_rings;
579 size_t n = priv->rx_ring_num;
580 int err = 0;
581
582 rss_rings = priv->prof->rss_rings ?: priv->rx_ring_num;
583
584 while (n--) {
585 ring_index[n] = rss_map->qps[n % rss_rings].qpn -
586 rss_map->base_qpn;
587 }
588
589 return err;
590}
591
fe62d001
BH		 592static int mlx4_en_set_rxfh(struct net_device *dev, const u32 *ring_index,
593 const u8 *key)
93d3e367
YP		 594{
595 struct mlx4_en_priv *priv = netdev_priv(dev);
596 struct mlx4_en_dev *mdev = priv->mdev;
597 int port_up = 0;
598 int err = 0;
599 int i;
600 int rss_rings = 0;
601
602 /* Calculate RSS table size and make sure flows are spread evenly
603 * between rings
604 */
605 for (i = 0; i < priv->rx_ring_num; i++) {
606 if (i > 0 && !ring_index[i] && !rss_rings)
607 rss_rings = i;
608
609 if (ring_index[i] != (i % (rss_rings ?: priv->rx_ring_num)))
610 return -EINVAL;
611 }
612
613 if (!rss_rings)
614 rss_rings = priv->rx_ring_num;
615
616 /* RSS table size must be an order of 2 */
617 if (!is_power_of_2(rss_rings))
618 return -EINVAL;
619
620 mutex_lock(&mdev->state_lock);
621 if (priv->port_up) {
622 port_up = 1;
3484aac1 623 mlx4_en_stop_port(dev, 1);
93d3e367
YP		 624 }
625
626 priv->prof->rss_rings = rss_rings;
627
628 if (port_up) {
629 err = mlx4_en_start_port(dev);
630 if (err)
631 en_err(priv, "Failed starting port\n");
632 }
633
634 mutex_unlock(&mdev->state_lock);
635 return err;
636}
637
82067281
HHZ		 638#define all_zeros_or_all_ones(field) \
639 ((field) == 0 || (field) == (__force typeof(field))-1)
640
641static int mlx4_en_validate_flow(struct net_device *dev,
642 struct ethtool_rxnfc *cmd)
643{
644 struct ethtool_usrip4_spec *l3_mask;
645 struct ethtool_tcpip4_spec *l4_mask;
646 struct ethhdr *eth_mask;
82067281
HHZ		 647
648 if (cmd->fs.location >= MAX_NUM_OF_FS_RULES)
649 return -EINVAL;
650
520dfe3a
YB		 651 if (cmd->fs.flow_type & FLOW_MAC_EXT) {
652 /* dest mac mask must be ff:ff:ff:ff:ff:ff */
653 if (!is_broadcast_ether_addr(cmd->fs.m_ext.h_dest))
654 return -EINVAL;
655 }
656
657 switch (cmd->fs.flow_type & ~(FLOW_EXT | FLOW_MAC_EXT)) {
82067281
HHZ		 658 case TCP_V4_FLOW:
659 case UDP_V4_FLOW:
660 if (cmd->fs.m_u.tcp_ip4_spec.tos)
661 return -EINVAL;
662 l4_mask = &cmd->fs.m_u.tcp_ip4_spec;
663 /* don't allow mask which isn't all 0 or 1 */
664 if (!all_zeros_or_all_ones(l4_mask->ip4src) ||
665 !all_zeros_or_all_ones(l4_mask->ip4dst) ||
666 !all_zeros_or_all_ones(l4_mask->psrc) ||
667 !all_zeros_or_all_ones(l4_mask->pdst))
668 return -EINVAL;
669 break;
670 case IP_USER_FLOW:
671 l3_mask = &cmd->fs.m_u.usr_ip4_spec;
672 if (l3_mask->l4_4_bytes || l3_mask->tos || l3_mask->proto ||
673 cmd->fs.h_u.usr_ip4_spec.ip_ver != ETH_RX_NFC_IP4 ||
674 (!l3_mask->ip4src && !l3_mask->ip4dst) ||
675 !all_zeros_or_all_ones(l3_mask->ip4src) ||
676 !all_zeros_or_all_ones(l3_mask->ip4dst))
677 return -EINVAL;
678 break;
679 case ETHER_FLOW:
680 eth_mask = &cmd->fs.m_u.ether_spec;
681 /* source mac mask must not be set */
c402b947 682 if (!is_zero_ether_addr(eth_mask->h_source))
82067281
HHZ		 683 return -EINVAL;
684
685 /* dest mac mask must be ff:ff:ff:ff:ff:ff */
c402b947 686 if (!is_broadcast_ether_addr(eth_mask->h_dest))
82067281
HHZ		 687 return -EINVAL;
688
689 if (!all_zeros_or_all_ones(eth_mask->h_proto))
690 return -EINVAL;
691 break;
692 default:
693 return -EINVAL;
694 }
695
696 if ((cmd->fs.flow_type & FLOW_EXT)) {
697 if (cmd->fs.m_ext.vlan_etype ||
8258bd27
HHZ		 698 !((cmd->fs.m_ext.vlan_tci & cpu_to_be16(VLAN_VID_MASK)) ==
699 0 ||
700 (cmd->fs.m_ext.vlan_tci & cpu_to_be16(VLAN_VID_MASK)) ==
701 cpu_to_be16(VLAN_VID_MASK)))
82067281 702 return -EINVAL;
8258bd27 703
69d7126b
HHZ		 704 if (cmd->fs.m_ext.vlan_tci) {
705 if (be16_to_cpu(cmd->fs.h_ext.vlan_tci) >= VLAN_N_VID)
706 return -EINVAL;
8258bd27 707
69d7126b 708 }
82067281
HHZ		 709 }
710
711 return 0;
712}
713
f90a3673
HHZ		 714static int mlx4_en_ethtool_add_mac_rule(struct ethtool_rxnfc *cmd,
715 struct list_head *rule_list_h,
716 struct mlx4_spec_list *spec_l2,
717 unsigned char *mac)
718{
719 int err = 0;
720 __be64 mac_msk = cpu_to_be64(MLX4_MAC_MASK << 16);
721
722 spec_l2->id = MLX4_NET_TRANS_RULE_ID_ETH;
723 memcpy(spec_l2->eth.dst_mac_msk, &mac_msk, ETH_ALEN);
724 memcpy(spec_l2->eth.dst_mac, mac, ETH_ALEN);
725
8258bd27
HHZ		 726 if ((cmd->fs.flow_type & FLOW_EXT) &&
727 (cmd->fs.m_ext.vlan_tci & cpu_to_be16(VLAN_VID_MASK))) {
f90a3673 728 spec_l2->eth.vlan_id = cmd->fs.h_ext.vlan_tci;
8258bd27 729 spec_l2->eth.vlan_id_msk = cpu_to_be16(VLAN_VID_MASK);
f90a3673
HHZ		 730 }
731
732 list_add_tail(&spec_l2->list, rule_list_h);
733
734 return err;
735}
736
737static int mlx4_en_ethtool_add_mac_rule_by_ipv4(struct mlx4_en_priv *priv,
738 struct ethtool_rxnfc *cmd,
739 struct list_head *rule_list_h,
740 struct mlx4_spec_list *spec_l2,
741 __be32 ipv4_dst)
742{
f9d96862 743#ifdef CONFIG_INET
f90a3673
HHZ		 744 unsigned char mac[ETH_ALEN];
745
746 if (!ipv4_is_multicast(ipv4_dst)) {
6bbb6d99 747 if (cmd->fs.flow_type & FLOW_MAC_EXT)
f90a3673 748 memcpy(&mac, cmd->fs.h_ext.h_dest, ETH_ALEN);
6bbb6d99
YB		 749 else
750 memcpy(&mac, priv->dev->dev_addr, ETH_ALEN);
f90a3673
HHZ		 751 } else {
752 ip_eth_mc_map(ipv4_dst, mac);
753 }
754
755 return mlx4_en_ethtool_add_mac_rule(cmd, rule_list_h, spec_l2, &mac[0]);
f9d96862
HHZ		 756#else
757 return -EINVAL;
758#endif
f90a3673
HHZ		 759}
760
82067281 761static int add_ip_rule(struct mlx4_en_priv *priv,
f90a3673
HHZ		 762 struct ethtool_rxnfc *cmd,
763 struct list_head *list_h)
82067281 764{
377d9739 765 int err;
f90a3673
HHZ		 766 struct mlx4_spec_list *spec_l2 = NULL;
767 struct mlx4_spec_list *spec_l3 = NULL;
82067281
HHZ		 768 struct ethtool_usrip4_spec *l3_mask = &cmd->fs.m_u.usr_ip4_spec;
769
f90a3673
HHZ		 770 spec_l3 = kzalloc(sizeof(*spec_l3), GFP_KERNEL);
771 spec_l2 = kzalloc(sizeof(*spec_l2), GFP_KERNEL);
772 if (!spec_l2 || !spec_l3) {
377d9739
HHZ		 773 err = -ENOMEM;
774 goto free_spec;
82067281
HHZ		 775 }
776
377d9739
HHZ		 777 err = mlx4_en_ethtool_add_mac_rule_by_ipv4(priv, cmd, list_h, spec_l2,
778 cmd->fs.h_u.
779 usr_ip4_spec.ip4dst);
780 if (err)
781 goto free_spec;
82067281
HHZ		 782 spec_l3->id = MLX4_NET_TRANS_RULE_ID_IPV4;
783 spec_l3->ipv4.src_ip = cmd->fs.h_u.usr_ip4_spec.ip4src;
784 if (l3_mask->ip4src)
785 spec_l3->ipv4.src_ip_msk = EN_ETHTOOL_WORD_MASK;
786 spec_l3->ipv4.dst_ip = cmd->fs.h_u.usr_ip4_spec.ip4dst;
787 if (l3_mask->ip4dst)
788 spec_l3->ipv4.dst_ip_msk = EN_ETHTOOL_WORD_MASK;
789 list_add_tail(&spec_l3->list, list_h);
790
791 return 0;
377d9739
HHZ		 792
793free_spec:
794 kfree(spec_l2);
795 kfree(spec_l3);
796 return err;
82067281
HHZ		 797}
798
799static int add_tcp_udp_rule(struct mlx4_en_priv *priv,
800 struct ethtool_rxnfc *cmd,
801 struct list_head *list_h, int proto)
802{
377d9739 803 int err;
f90a3673
HHZ		 804 struct mlx4_spec_list *spec_l2 = NULL;
805 struct mlx4_spec_list *spec_l3 = NULL;
806 struct mlx4_spec_list *spec_l4 = NULL;
82067281
HHZ		 807 struct ethtool_tcpip4_spec *l4_mask = &cmd->fs.m_u.tcp_ip4_spec;
808
f90a3673
HHZ		 809 spec_l2 = kzalloc(sizeof(*spec_l2), GFP_KERNEL);
810 spec_l3 = kzalloc(sizeof(*spec_l3), GFP_KERNEL);
811 spec_l4 = kzalloc(sizeof(*spec_l4), GFP_KERNEL);
812 if (!spec_l2 || !spec_l3 || !spec_l4) {
377d9739
HHZ		 813 err = -ENOMEM;
814 goto free_spec;
82067281
HHZ		 815 }
816
817 spec_l3->id = MLX4_NET_TRANS_RULE_ID_IPV4;
818
819 if (proto == TCP_V4_FLOW) {
377d9739
HHZ		 820 err = mlx4_en_ethtool_add_mac_rule_by_ipv4(priv, cmd, list_h,
821 spec_l2,
822 cmd->fs.h_u.
823 tcp_ip4_spec.ip4dst);
824 if (err)
825 goto free_spec;
82067281
HHZ		 826 spec_l4->id = MLX4_NET_TRANS_RULE_ID_TCP;
827 spec_l3->ipv4.src_ip = cmd->fs.h_u.tcp_ip4_spec.ip4src;
828 spec_l3->ipv4.dst_ip = cmd->fs.h_u.tcp_ip4_spec.ip4dst;
829 spec_l4->tcp_udp.src_port = cmd->fs.h_u.tcp_ip4_spec.psrc;
830 spec_l4->tcp_udp.dst_port = cmd->fs.h_u.tcp_ip4_spec.pdst;
831 } else {
377d9739
HHZ		 832 err = mlx4_en_ethtool_add_mac_rule_by_ipv4(priv, cmd, list_h,
833 spec_l2,
834 cmd->fs.h_u.
835 udp_ip4_spec.ip4dst);
836 if (err)
837 goto free_spec;
82067281
HHZ		 838 spec_l4->id = MLX4_NET_TRANS_RULE_ID_UDP;
839 spec_l3->ipv4.src_ip = cmd->fs.h_u.udp_ip4_spec.ip4src;
840 spec_l3->ipv4.dst_ip = cmd->fs.h_u.udp_ip4_spec.ip4dst;
841 spec_l4->tcp_udp.src_port = cmd->fs.h_u.udp_ip4_spec.psrc;
842 spec_l4->tcp_udp.dst_port = cmd->fs.h_u.udp_ip4_spec.pdst;
843 }
844
845 if (l4_mask->ip4src)
846 spec_l3->ipv4.src_ip_msk = EN_ETHTOOL_WORD_MASK;
847 if (l4_mask->ip4dst)
848 spec_l3->ipv4.dst_ip_msk = EN_ETHTOOL_WORD_MASK;
849
850 if (l4_mask->psrc)
851 spec_l4->tcp_udp.src_port_msk = EN_ETHTOOL_SHORT_MASK;
852 if (l4_mask->pdst)
853 spec_l4->tcp_udp.dst_port_msk = EN_ETHTOOL_SHORT_MASK;
854
855 list_add_tail(&spec_l3->list, list_h);
856 list_add_tail(&spec_l4->list, list_h);
857
858 return 0;
377d9739
HHZ		 859
860free_spec:
861 kfree(spec_l2);
862 kfree(spec_l3);
863 kfree(spec_l4);
864 return err;
82067281
HHZ		 865}
866
867static int mlx4_en_ethtool_to_net_trans_rule(struct net_device *dev,
868 struct ethtool_rxnfc *cmd,
869 struct list_head *rule_list_h)
870{
871 int err;
82067281 872 struct ethhdr *eth_spec;
82067281 873 struct mlx4_spec_list *spec_l2;
f90a3673 874 struct mlx4_en_priv *priv = netdev_priv(dev);
82067281
HHZ		 875
876 err = mlx4_en_validate_flow(dev, cmd);
877 if (err)
878 return err;
879
520dfe3a 880 switch (cmd->fs.flow_type & ~(FLOW_EXT | FLOW_MAC_EXT)) {
82067281 881 case ETHER_FLOW:
f90a3673
HHZ		 882 spec_l2 = kzalloc(sizeof(*spec_l2), GFP_KERNEL);
883 if (!spec_l2)
884 return -ENOMEM;
885
82067281 886 eth_spec = &cmd->fs.h_u.ether_spec;
f90a3673
HHZ		 887 mlx4_en_ethtool_add_mac_rule(cmd, rule_list_h, spec_l2,
888 &eth_spec->h_dest[0]);
82067281
HHZ		 889 spec_l2->eth.ether_type = eth_spec->h_proto;
890 if (eth_spec->h_proto)
891 spec_l2->eth.ether_type_enable = 1;
892 break;
893 case IP_USER_FLOW:
894 err = add_ip_rule(priv, cmd, rule_list_h);
895 break;
896 case TCP_V4_FLOW:
897 err = add_tcp_udp_rule(priv, cmd, rule_list_h, TCP_V4_FLOW);
898 break;
899 case UDP_V4_FLOW:
900 err = add_tcp_udp_rule(priv, cmd, rule_list_h, UDP_V4_FLOW);
901 break;
902 }
903
904 return err;
905}
906
907static int mlx4_en_flow_replace(struct net_device *dev,
908 struct ethtool_rxnfc *cmd)
909{
910 int err;
911 struct mlx4_en_priv *priv = netdev_priv(dev);
912 struct ethtool_flow_id *loc_rule;
913 struct mlx4_spec_list *spec, *tmp_spec;
914 u32 qpn;
915 u64 reg_id;
916
917 struct mlx4_net_trans_rule rule = {
918 .queue_mode = MLX4_NET_TRANS_Q_FIFO,
919 .exclusive = 0,
920 .allow_loopback = 1,
f9162539 921 .promisc_mode = MLX4_FS_REGULAR,
82067281
HHZ		 922 };
923
924 rule.port = priv->port;
925 rule.priority = MLX4_DOMAIN_ETHTOOL | cmd->fs.location;
926 INIT_LIST_HEAD(&rule.list);
927
928 /* Allow direct QP attaches if the EN_ETHTOOL_QP_ATTACH flag is set */
929 if (cmd->fs.ring_cookie == RX_CLS_FLOW_DISC)
cabdc8ee 930 qpn = priv->drop_qp.qpn;
82067281
HHZ		 931 else if (cmd->fs.ring_cookie & EN_ETHTOOL_QP_ATTACH) {
932 qpn = cmd->fs.ring_cookie & (EN_ETHTOOL_QP_ATTACH - 1);
933 } else {
934 if (cmd->fs.ring_cookie >= priv->rx_ring_num) {
1a91de28 935 en_warn(priv, "rxnfc: RX ring (%llu) doesn't exist\n",
82067281
HHZ		 936 cmd->fs.ring_cookie);
937 return -EINVAL;
938 }
939 qpn = priv->rss_map.qps[cmd->fs.ring_cookie].qpn;
940 if (!qpn) {
1a91de28 941 en_warn(priv, "rxnfc: RX ring (%llu) is inactive\n",
82067281
HHZ		 942 cmd->fs.ring_cookie);
943 return -EINVAL;
944 }
945 }
946 rule.qpn = qpn;
947 err = mlx4_en_ethtool_to_net_trans_rule(dev, cmd, &rule.list);
948 if (err)
949 goto out_free_list;
950
951 loc_rule = &priv->ethtool_rules[cmd->fs.location];
952 if (loc_rule->id) {
953 err = mlx4_flow_detach(priv->mdev->dev, loc_rule->id);
954 if (err) {
955 en_err(priv, "Fail to detach network rule at location %d. registration id = %llx\n",
956 cmd->fs.location, loc_rule->id);
957 goto out_free_list;
958 }
959 loc_rule->id = 0;
960 memset(&loc_rule->flow_spec, 0,
961 sizeof(struct ethtool_rx_flow_spec));
0d256c0e 962 list_del(&loc_rule->list);
82067281
HHZ		 963 }
964 err = mlx4_flow_attach(priv->mdev->dev, &rule, &reg_id);
965 if (err) {
1a91de28 966 en_err(priv, "Fail to attach network rule at location %d\n",
82067281
HHZ		 967 cmd->fs.location);
968 goto out_free_list;
969 }
970 loc_rule->id = reg_id;
971 memcpy(&loc_rule->flow_spec, &cmd->fs,
972 sizeof(struct ethtool_rx_flow_spec));
0d256c0e 973 list_add_tail(&loc_rule->list, &priv->ethtool_list);
82067281
HHZ		 974
975out_free_list:
976 list_for_each_entry_safe(spec, tmp_spec, &rule.list, list) {
977 list_del(&spec->list);
978 kfree(spec);
979 }
980 return err;
981}
982
983static int mlx4_en_flow_detach(struct net_device *dev,
984 struct ethtool_rxnfc *cmd)
985{
986 int err = 0;
987 struct ethtool_flow_id *rule;
988 struct mlx4_en_priv *priv = netdev_priv(dev);
989
990 if (cmd->fs.location >= MAX_NUM_OF_FS_RULES)
991 return -EINVAL;
992
993 rule = &priv->ethtool_rules[cmd->fs.location];
994 if (!rule->id) {
995 err = -ENOENT;
996 goto out;
997 }
998
999 err = mlx4_flow_detach(priv->mdev->dev, rule->id);
1000 if (err) {
1001 en_err(priv, "Fail to detach network rule at location %d. registration id = 0x%llx\n",
1002 cmd->fs.location, rule->id);
1003 goto out;
1004 }
1005 rule->id = 0;
1006 memset(&rule->flow_spec, 0, sizeof(struct ethtool_rx_flow_spec));
0d256c0e 1007 list_del(&rule->list);
82067281
HHZ		 1008out:
1009 return err;
1010
1011}
1012
1013static int mlx4_en_get_flow(struct net_device *dev, struct ethtool_rxnfc *cmd,
1014 int loc)
1015{
1016 int err = 0;
1017 struct ethtool_flow_id *rule;
1018 struct mlx4_en_priv *priv = netdev_priv(dev);
1019
1020 if (loc < 0 || loc >= MAX_NUM_OF_FS_RULES)
1021 return -EINVAL;
1022
1023 rule = &priv->ethtool_rules[loc];
1024 if (rule->id)
1025 memcpy(&cmd->fs, &rule->flow_spec,
1026 sizeof(struct ethtool_rx_flow_spec));
1027 else
1028 err = -ENOENT;
1029
1030 return err;
1031}
1032
1033static int mlx4_en_get_num_flows(struct mlx4_en_priv *priv)
1034{
1035
1036 int i, res = 0;
1037 for (i = 0; i < MAX_NUM_OF_FS_RULES; i++) {
1038 if (priv->ethtool_rules[i].id)
1039 res++;
1040 }
1041 return res;
1042
1043}
1044
93d3e367
YP		 1045static int mlx4_en_get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd,
1046 u32 *rule_locs)
1047{
1048 struct mlx4_en_priv *priv = netdev_priv(dev);
82067281 1049 struct mlx4_en_dev *mdev = priv->mdev;
93d3e367 1050 int err = 0;
82067281
HHZ		 1051 int i = 0, priority = 0;
1052
1053 if ((cmd->cmd == ETHTOOL_GRXCLSRLCNT ||
1054 cmd->cmd == ETHTOOL_GRXCLSRULE ||
1055 cmd->cmd == ETHTOOL_GRXCLSRLALL) &&
280fce1e
HHZ		 1056 (mdev->dev->caps.steering_mode !=
1057 MLX4_STEERING_MODE_DEVICE_MANAGED || !priv->port_up))
82067281 1058 return -EINVAL;
93d3e367
YP		 1059
1060 switch (cmd->cmd) {
1061 case ETHTOOL_GRXRINGS:
1062 cmd->data = priv->rx_ring_num;
1063 break;
82067281
HHZ		 1064 case ETHTOOL_GRXCLSRLCNT:
1065 cmd->rule_cnt = mlx4_en_get_num_flows(priv);
1066 break;
1067 case ETHTOOL_GRXCLSRULE:
1068 err = mlx4_en_get_flow(dev, cmd, cmd->fs.location);
1069 break;
1070 case ETHTOOL_GRXCLSRLALL:
1071 while ((!err || err == -ENOENT) && priority < cmd->rule_cnt) {
1072 err = mlx4_en_get_flow(dev, cmd, i);
1073 if (!err)
1074 rule_locs[priority++] = i;
1075 i++;
1076 }
1077 err = 0;
1078 break;
93d3e367
YP		 1079 default:
1080 err = -EOPNOTSUPP;
1081 break;
1082 }
1083
1084 return err;
1085}
1086
82067281
HHZ		 1087static int mlx4_en_set_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd)
1088{
1089 int err = 0;
1090 struct mlx4_en_priv *priv = netdev_priv(dev);
1091 struct mlx4_en_dev *mdev = priv->mdev;
1092
280fce1e
HHZ		 1093 if (mdev->dev->caps.steering_mode !=
1094 MLX4_STEERING_MODE_DEVICE_MANAGED || !priv->port_up)
82067281
HHZ		 1095 return -EINVAL;
1096
1097 switch (cmd->cmd) {
1098 case ETHTOOL_SRXCLSRLINS:
1099 err = mlx4_en_flow_replace(dev, cmd);
1100 break;
1101 case ETHTOOL_SRXCLSRLDEL:
1102 err = mlx4_en_flow_detach(dev, cmd);
1103 break;
1104 default:
1105 en_warn(priv, "Unsupported ethtool command. (%d)\n", cmd->cmd);
1106 return -EINVAL;
1107 }
1108
1109 return err;
1110}
1111
d317966b
AV		 1112static void mlx4_en_get_channels(struct net_device *dev,
1113 struct ethtool_channels *channel)
1114{
1115 struct mlx4_en_priv *priv = netdev_priv(dev);
1116
1117 memset(channel, 0, sizeof(*channel));
1118
1119 channel->max_rx = MAX_RX_RINGS;
1120 channel->max_tx = MLX4_EN_MAX_TX_RING_P_UP;
1121
1122 channel->rx_count = priv->rx_ring_num;
1123 channel->tx_count = priv->tx_ring_num / MLX4_EN_NUM_UP;
1124}
1125
1126static int mlx4_en_set_channels(struct net_device *dev,
1127 struct ethtool_channels *channel)
1128{
1129 struct mlx4_en_priv *priv = netdev_priv(dev);
1130 struct mlx4_en_dev *mdev = priv->mdev;
da26a625 1131 int port_up = 0;
d317966b
AV		 1132 int err = 0;
1133
1134 if (channel->other_count || channel->combined_count ||
1135 channel->tx_count > MLX4_EN_MAX_TX_RING_P_UP ||
1136 channel->rx_count > MAX_RX_RINGS ||
1137 !channel->tx_count || !channel->rx_count)
1138 return -EINVAL;
1139
1140 mutex_lock(&mdev->state_lock);
1141 if (priv->port_up) {
1142 port_up = 1;
3484aac1 1143 mlx4_en_stop_port(dev, 1);
d317966b
AV		 1144 }
1145
1146 mlx4_en_free_resources(priv);
1147
1148 priv->num_tx_rings_p_up = channel->tx_count;
1149 priv->tx_ring_num = channel->tx_count * MLX4_EN_NUM_UP;
1150 priv->rx_ring_num = channel->rx_count;
1151
1152 err = mlx4_en_alloc_resources(priv);
1153 if (err) {
1154 en_err(priv, "Failed reallocating port resources\n");
1155 goto out;
1156 }
1157
1158 netif_set_real_num_tx_queues(dev, priv->tx_ring_num);
1159 netif_set_real_num_rx_queues(dev, priv->rx_ring_num);
1160
f5b6345b
IS		 1161 if (dev->num_tc)
1162 mlx4_en_setup_tc(dev, MLX4_EN_NUM_UP);
d317966b
AV		 1163
1164 en_warn(priv, "Using %d TX rings\n", priv->tx_ring_num);
1165 en_warn(priv, "Using %d RX rings\n", priv->rx_ring_num);
1166
1167 if (port_up) {
1168 err = mlx4_en_start_port(dev);
1169 if (err)
1170 en_err(priv, "Failed starting port\n");
1171 }
1172
1173 err = mlx4_en_moderation_update(priv);
1174
1175out:
1176 mutex_unlock(&mdev->state_lock);
1177 return err;
1178}
1179
ec693d47
AV		 1180static int mlx4_en_get_ts_info(struct net_device *dev,
1181 struct ethtool_ts_info *info)
1182{
1183 struct mlx4_en_priv *priv = netdev_priv(dev);
1184 struct mlx4_en_dev *mdev = priv->mdev;
1185 int ret;
1186
1187 ret = ethtool_op_get_ts_info(dev, info);
1188 if (ret)
1189 return ret;
1190
1191 if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_TS) {
1192 info->so_timestamping |=
1193 SOF_TIMESTAMPING_TX_HARDWARE |
1194 SOF_TIMESTAMPING_RX_HARDWARE |
1195 SOF_TIMESTAMPING_RAW_HARDWARE;
1196
1197 info->tx_types =
1198 (1 << HWTSTAMP_TX_OFF) |
1199 (1 << HWTSTAMP_TX_ON);
1200
1201 info->rx_filters =
1202 (1 << HWTSTAMP_FILTER_NONE) |
1203 (1 << HWTSTAMP_FILTER_ALL);
ad7d4eae
SB		 1204
1205 if (mdev->ptp_clock)
1206 info->phc_index = ptp_clock_index(mdev->ptp_clock);
ec693d47
AV		 1207 }
1208
1209 return ret;
1210}
1211
c27a02cd
YP		 1212const struct ethtool_ops mlx4_en_ethtool_ops = {
1213 .get_drvinfo = mlx4_en_get_drvinfo,
1214 .get_settings = mlx4_en_get_settings,
1215 .set_settings = mlx4_en_set_settings,
c27a02cd 1216 .get_link = ethtool_op_get_link,
c27a02cd
YP		 1217 .get_strings = mlx4_en_get_strings,
1218 .get_sset_count = mlx4_en_get_sset_count,
1219 .get_ethtool_stats = mlx4_en_get_ethtool_stats,
e7c1c2c4 1220 .self_test = mlx4_en_self_test,
c27a02cd 1221 .get_wol = mlx4_en_get_wol,
14c07b13 1222 .set_wol = mlx4_en_set_wol,
c27a02cd
YP		 1223 .get_msglevel = mlx4_en_get_msglevel,
1224 .set_msglevel = mlx4_en_set_msglevel,
1225 .get_coalesce = mlx4_en_get_coalesce,
1226 .set_coalesce = mlx4_en_set_coalesce,
1227 .get_pauseparam = mlx4_en_get_pauseparam,
1228 .set_pauseparam = mlx4_en_set_pauseparam,
1229 .get_ringparam = mlx4_en_get_ringparam,
18cc42a3 1230 .set_ringparam = mlx4_en_set_ringparam,
93d3e367 1231 .get_rxnfc = mlx4_en_get_rxnfc,
82067281 1232 .set_rxnfc = mlx4_en_set_rxnfc,
93d3e367 1233 .get_rxfh_indir_size = mlx4_en_get_rxfh_indir_size,
fe62d001
BH		 1234 .get_rxfh = mlx4_en_get_rxfh,
1235 .set_rxfh = mlx4_en_set_rxfh,
d317966b
AV		 1236 .get_channels = mlx4_en_get_channels,
1237 .set_channels = mlx4_en_set_channels,
ec693d47 1238 .get_ts_info = mlx4_en_get_ts_info,
c27a02cd
YP		 1239};
1240
1241
1242
1243
1244
Linux 6.x block layer and io_uring tree(s)